1 ;; Scheduling description for Motorola PowerPC processor cores.
2 ;; Copyright (C) 2003, 2004 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify it
7 ;; under the terms of the GNU General Public License as published
8 ;; by the Free Software Foundation; either version 2, or (at your
9 ;; option) any later version.
11 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
12 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 ;; License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING. If not, write to the
18 ;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
19 ;; MA 02110-1301, USA.
21 (define_automaton "mpc,mpcfp")
22 (define_cpu_unit "iu_mpc,mciu_mpc" "mpc")
23 (define_cpu_unit "fpu_mpc" "mpcfp")
24 (define_cpu_unit "lsu_mpc,bpu_mpc" "mpc")
26 ;; MPCCORE 32-bit SCIU, MCIU, LSU, FPU, BPU
29 (define_insn_reservation "mpccore-load" 2
30 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
32 (eq_attr "cpu" "mpccore"))
35 (define_insn_reservation "mpccore-store" 2
36 (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u")
37 (eq_attr "cpu" "mpccore"))
40 (define_insn_reservation "mpccore-fpload" 2
41 (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
42 (eq_attr "cpu" "mpccore"))
45 (define_insn_reservation "mpccore-integer" 1
46 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
47 var_shift_rotate,cntlz,exts")
48 (eq_attr "cpu" "mpccore"))
51 (define_insn_reservation "mpccore-two" 1
52 (and (eq_attr "type" "two")
53 (eq_attr "cpu" "mpccore"))
56 (define_insn_reservation "mpccore-three" 1
57 (and (eq_attr "type" "three")
58 (eq_attr "cpu" "mpccore"))
59 "iu_mpc,iu_mpc,iu_mpc")
61 (define_insn_reservation "mpccore-imul" 2
62 (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
63 (eq_attr "cpu" "mpccore"))
66 ; Divide latency varies greatly from 2-11, use 6 as average
67 (define_insn_reservation "mpccore-idiv" 6
68 (and (eq_attr "type" "idiv")
69 (eq_attr "cpu" "mpccore"))
72 (define_insn_reservation "mpccore-compare" 3
73 (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare,\
75 (eq_attr "cpu" "mpccore"))
76 "iu_mpc,nothing,bpu_mpc")
78 (define_insn_reservation "mpccore-fpcompare" 2
79 (and (eq_attr "type" "fpcompare")
80 (eq_attr "cpu" "mpccore"))
83 (define_insn_reservation "mpccore-fp" 4
84 (and (eq_attr "type" "fp")
85 (eq_attr "cpu" "mpccore"))
88 (define_insn_reservation "mpccore-dmul" 5
89 (and (eq_attr "type" "dmul")
90 (eq_attr "cpu" "mpccore"))
93 (define_insn_reservation "mpccore-sdiv" 10
94 (and (eq_attr "type" "sdiv")
95 (eq_attr "cpu" "mpccore"))
98 (define_insn_reservation "mpccore-ddiv" 17
99 (and (eq_attr "type" "ddiv")
100 (eq_attr "cpu" "mpccore"))
103 (define_insn_reservation "mpccore-mtjmpr" 4
104 (and (eq_attr "type" "mtjmpr,mfjmpr")
105 (eq_attr "cpu" "mpccore"))
108 (define_insn_reservation "mpccore-jmpreg" 1
109 (and (eq_attr "type" "jmpreg,branch,cr_logical,delayed_cr,mfcr,mtcr,isync")
110 (eq_attr "cpu" "mpccore"))