1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "hard-reg-set.h"
30 #include "basic-block.h"
32 #include "insn-config.h"
43 #include "rtlhooks-def.h"
44 #include "tree-pass.h"
48 /* The basic idea of common subexpression elimination is to go
49 through the code, keeping a record of expressions that would
50 have the same value at the current scan point, and replacing
51 expressions encountered with the cheapest equivalent expression.
53 It is too complicated to keep track of the different possibilities
54 when control paths merge in this code; so, at each label, we forget all
55 that is known and start fresh. This can be described as processing each
56 extended basic block separately. We have a separate pass to perform
59 Note CSE can turn a conditional or computed jump into a nop or
60 an unconditional jump. When this occurs we arrange to run the jump
61 optimizer after CSE to delete the unreachable code.
63 We use two data structures to record the equivalent expressions:
64 a hash table for most expressions, and a vector of "quantity
65 numbers" to record equivalent (pseudo) registers.
67 The use of the special data structure for registers is desirable
68 because it is faster. It is possible because registers references
69 contain a fairly small number, the register number, taken from
70 a contiguously allocated series, and two register references are
71 identical if they have the same number. General expressions
72 do not have any such thing, so the only way to retrieve the
73 information recorded on an expression other than a register
74 is to keep it in a hash table.
76 Registers and "quantity numbers":
78 At the start of each basic block, all of the (hardware and pseudo)
79 registers used in the function are given distinct quantity
80 numbers to indicate their contents. During scan, when the code
81 copies one register into another, we copy the quantity number.
82 When a register is loaded in any other way, we allocate a new
83 quantity number to describe the value generated by this operation.
84 `REG_QTY (N)' records what quantity register N is currently thought
87 All real quantity numbers are greater than or equal to zero.
88 If register N has not been assigned a quantity, `REG_QTY (N)' will
89 equal -N - 1, which is always negative.
91 Quantity numbers below zero do not exist and none of the `qty_table'
92 entries should be referenced with a negative index.
94 We also maintain a bidirectional chain of registers for each
95 quantity number. The `qty_table` members `first_reg' and `last_reg',
96 and `reg_eqv_table' members `next' and `prev' hold these chains.
98 The first register in a chain is the one whose lifespan is least local.
99 Among equals, it is the one that was seen first.
100 We replace any equivalent register with that one.
102 If two registers have the same quantity number, it must be true that
103 REG expressions with qty_table `mode' must be in the hash table for both
104 registers and must be in the same class.
106 The converse is not true. Since hard registers may be referenced in
107 any mode, two REG expressions might be equivalent in the hash table
108 but not have the same quantity number if the quantity number of one
109 of the registers is not the same mode as those expressions.
111 Constants and quantity numbers
113 When a quantity has a known constant value, that value is stored
114 in the appropriate qty_table `const_rtx'. This is in addition to
115 putting the constant in the hash table as is usual for non-regs.
117 Whether a reg or a constant is preferred is determined by the configuration
118 macro CONST_COSTS and will often depend on the constant value. In any
119 event, expressions containing constants can be simplified, by fold_rtx.
121 When a quantity has a known nearly constant value (such as an address
122 of a stack slot), that value is stored in the appropriate qty_table
125 Integer constants don't have a machine mode. However, cse
126 determines the intended machine mode from the destination
127 of the instruction that moves the constant. The machine mode
128 is recorded in the hash table along with the actual RTL
129 constant expression so that different modes are kept separate.
133 To record known equivalences among expressions in general
134 we use a hash table called `table'. It has a fixed number of buckets
135 that contain chains of `struct table_elt' elements for expressions.
136 These chains connect the elements whose expressions have the same
139 Other chains through the same elements connect the elements which
140 currently have equivalent values.
142 Register references in an expression are canonicalized before hashing
143 the expression. This is done using `reg_qty' and qty_table `first_reg'.
144 The hash code of a register reference is computed using the quantity
145 number, not the register number.
147 When the value of an expression changes, it is necessary to remove from the
148 hash table not just that expression but all expressions whose values
149 could be different as a result.
151 1. If the value changing is in memory, except in special cases
152 ANYTHING referring to memory could be changed. That is because
153 nobody knows where a pointer does not point.
154 The function `invalidate_memory' removes what is necessary.
156 The special cases are when the address is constant or is
157 a constant plus a fixed register such as the frame pointer
158 or a static chain pointer. When such addresses are stored in,
159 we can tell exactly which other such addresses must be invalidated
160 due to overlap. `invalidate' does this.
161 All expressions that refer to non-constant
162 memory addresses are also invalidated. `invalidate_memory' does this.
164 2. If the value changing is a register, all expressions
165 containing references to that register, and only those,
168 Because searching the entire hash table for expressions that contain
169 a register is very slow, we try to figure out when it isn't necessary.
170 Precisely, this is necessary only when expressions have been
171 entered in the hash table using this register, and then the value has
172 changed, and then another expression wants to be added to refer to
173 the register's new value. This sequence of circumstances is rare
174 within any one basic block.
176 `REG_TICK' and `REG_IN_TABLE', accessors for members of
177 cse_reg_info, are used to detect this case. REG_TICK (i) is
178 incremented whenever a value is stored in register i.
179 REG_IN_TABLE (i) holds -1 if no references to register i have been
180 entered in the table; otherwise, it contains the value REG_TICK (i)
181 had when the references were entered. If we want to enter a
182 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
183 remove old references. Until we want to enter a new entry, the
184 mere fact that the two vectors don't match makes the entries be
185 ignored if anyone tries to match them.
187 Registers themselves are entered in the hash table as well as in
188 the equivalent-register chains. However, `REG_TICK' and
189 `REG_IN_TABLE' do not apply to expressions which are simple
190 register references. These expressions are removed from the table
191 immediately when they become invalid, and this can be done even if
192 we do not immediately search for all the expressions that refer to
195 A CLOBBER rtx in an instruction invalidates its operand for further
196 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
197 invalidates everything that resides in memory.
201 Constant expressions that differ only by an additive integer
202 are called related. When a constant expression is put in
203 the table, the related expression with no constant term
204 is also entered. These are made to point at each other
205 so that it is possible to find out if there exists any
206 register equivalent to an expression related to a given expression. */
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
247 rtx comparison_const
;
249 unsigned int first_reg
, last_reg
;
250 /* The sizes of these fields should match the sizes of the
251 code and mode fields of struct rtx_def (see rtl.h). */
252 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
253 ENUM_BITFIELD(machine_mode
) mode
: 8;
256 /* The table of all qtys, indexed by qty number. */
257 static struct qty_table_elem
*qty_table
;
259 /* Structure used to pass arguments via for_each_rtx to function
260 cse_change_cc_mode. */
261 struct change_cc_mode_args
268 /* For machines that have a CC0, we do not record its value in the hash
269 table since its use is guaranteed to be the insn immediately following
270 its definition and any other insn is presumed to invalidate it.
272 Instead, we store below the current and last value assigned to CC0.
273 If it should happen to be a constant, it is stored in preference
274 to the actual assigned value. In case it is a constant, we store
275 the mode in which the constant should be interpreted. */
277 static rtx this_insn_cc0
, prev_insn_cc0
;
278 static enum machine_mode this_insn_cc0_mode
, prev_insn_cc0_mode
;
281 /* Insn being scanned. */
283 static rtx this_insn
;
284 static bool optimize_this_for_speed_p
;
286 /* Index by register number, gives the number of the next (or
287 previous) register in the chain of registers sharing the same
290 Or -1 if this register is at the end of the chain.
292 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
294 /* Per-register equivalence chain. */
300 /* The table of all register equivalence chains. */
301 static struct reg_eqv_elem
*reg_eqv_table
;
305 /* The timestamp at which this register is initialized. */
306 unsigned int timestamp
;
308 /* The quantity number of the register's current contents. */
311 /* The number of times the register has been altered in the current
315 /* The REG_TICK value at which rtx's containing this register are
316 valid in the hash table. If this does not equal the current
317 reg_tick value, such expressions existing in the hash table are
321 /* The SUBREG that was set when REG_TICK was last incremented. Set
322 to -1 if the last store was to the whole register, not a subreg. */
323 unsigned int subreg_ticked
;
326 /* A table of cse_reg_info indexed by register numbers. */
327 static struct cse_reg_info
*cse_reg_info_table
;
329 /* The size of the above table. */
330 static unsigned int cse_reg_info_table_size
;
332 /* The index of the first entry that has not been initialized. */
333 static unsigned int cse_reg_info_table_first_uninitialized
;
335 /* The timestamp at the beginning of the current run of
336 cse_extended_basic_block. We increment this variable at the beginning of
337 the current run of cse_extended_basic_block. The timestamp field of a
338 cse_reg_info entry matches the value of this variable if and only
339 if the entry has been initialized during the current run of
340 cse_extended_basic_block. */
341 static unsigned int cse_reg_info_timestamp
;
343 /* A HARD_REG_SET containing all the hard registers for which there is
344 currently a REG expression in the hash table. Note the difference
345 from the above variables, which indicate if the REG is mentioned in some
346 expression in the table. */
348 static HARD_REG_SET hard_regs_in_table
;
350 /* True if CSE has altered the CFG. */
351 static bool cse_cfg_altered
;
353 /* True if CSE has altered conditional jump insns in such a way
354 that jump optimization should be redone. */
355 static bool cse_jumps_altered
;
357 /* True if we put a LABEL_REF into the hash table for an INSN
358 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
359 to put in the note. */
360 static bool recorded_label_ref
;
362 /* canon_hash stores 1 in do_not_record
363 if it notices a reference to CC0, PC, or some other volatile
366 static int do_not_record
;
368 /* canon_hash stores 1 in hash_arg_in_memory
369 if it notices a reference to memory within the expression being hashed. */
371 static int hash_arg_in_memory
;
373 /* The hash table contains buckets which are chains of `struct table_elt's,
374 each recording one expression's information.
375 That expression is in the `exp' field.
377 The canon_exp field contains a canonical (from the point of view of
378 alias analysis) version of the `exp' field.
380 Those elements with the same hash code are chained in both directions
381 through the `next_same_hash' and `prev_same_hash' fields.
383 Each set of expressions with equivalent values
384 are on a two-way chain through the `next_same_value'
385 and `prev_same_value' fields, and all point with
386 the `first_same_value' field at the first element in
387 that chain. The chain is in order of increasing cost.
388 Each element's cost value is in its `cost' field.
390 The `in_memory' field is nonzero for elements that
391 involve any reference to memory. These elements are removed
392 whenever a write is done to an unidentified location in memory.
393 To be safe, we assume that a memory address is unidentified unless
394 the address is either a symbol constant or a constant plus
395 the frame pointer or argument pointer.
397 The `related_value' field is used to connect related expressions
398 (that differ by adding an integer).
399 The related expressions are chained in a circular fashion.
400 `related_value' is zero for expressions for which this
403 The `cost' field stores the cost of this element's expression.
404 The `regcost' field stores the value returned by approx_reg_cost for
405 this element's expression.
407 The `is_const' flag is set if the element is a constant (including
410 The `flag' field is used as a temporary during some search routines.
412 The `mode' field is usually the same as GET_MODE (`exp'), but
413 if `exp' is a CONST_INT and has no machine mode then the `mode'
414 field is the mode it was being used as. Each constant is
415 recorded separately for each mode it is used with. */
421 struct table_elt
*next_same_hash
;
422 struct table_elt
*prev_same_hash
;
423 struct table_elt
*next_same_value
;
424 struct table_elt
*prev_same_value
;
425 struct table_elt
*first_same_value
;
426 struct table_elt
*related_value
;
429 /* The size of this field should match the size
430 of the mode field of struct rtx_def (see rtl.h). */
431 ENUM_BITFIELD(machine_mode
) mode
: 8;
437 /* We don't want a lot of buckets, because we rarely have very many
438 things stored in the hash table, and a lot of buckets slows
439 down a lot of loops that happen frequently. */
441 #define HASH_SIZE (1 << HASH_SHIFT)
442 #define HASH_MASK (HASH_SIZE - 1)
444 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
445 register (hard registers may require `do_not_record' to be set). */
448 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
449 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
450 : canon_hash (X, M)) & HASH_MASK)
452 /* Like HASH, but without side-effects. */
453 #define SAFE_HASH(X, M) \
454 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
455 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
456 : safe_hash (X, M)) & HASH_MASK)
458 /* Determine whether register number N is considered a fixed register for the
459 purpose of approximating register costs.
460 It is desirable to replace other regs with fixed regs, to reduce need for
462 A reg wins if it is either the frame pointer or designated as fixed. */
463 #define FIXED_REGNO_P(N) \
464 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
465 || fixed_regs[N] || global_regs[N])
467 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
468 hard registers and pointers into the frame are the cheapest with a cost
469 of 0. Next come pseudos with a cost of one and other hard registers with
470 a cost of 2. Aside from these special cases, call `rtx_cost'. */
472 #define CHEAP_REGNO(N) \
473 (REGNO_PTR_FRAME_P(N) \
474 || (HARD_REGISTER_NUM_P (N) \
475 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
477 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
478 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
480 /* Get the number of times this register has been updated in this
483 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
485 /* Get the point at which REG was recorded in the table. */
487 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
489 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
492 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
494 /* Get the quantity number for REG. */
496 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
498 /* Determine if the quantity number for register X represents a valid index
499 into the qty_table. */
501 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
503 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
505 #define CHEAPER(X, Y) \
506 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
508 static struct table_elt
*table
[HASH_SIZE
];
510 /* Chain of `struct table_elt's made so far for this function
511 but currently removed from the table. */
513 static struct table_elt
*free_element_chain
;
515 /* Set to the cost of a constant pool reference if one was found for a
516 symbolic constant. If this was found, it means we should try to
517 convert constants into constant pool entries if they don't fit in
520 static int constant_pool_entries_cost
;
521 static int constant_pool_entries_regcost
;
523 /* Trace a patch through the CFG. */
527 /* The basic block for this path entry. */
531 /* This data describes a block that will be processed by
532 cse_extended_basic_block. */
534 struct cse_basic_block_data
536 /* Total number of SETs in block. */
538 /* Size of current branch path, if any. */
540 /* Current path, indicating which basic_blocks will be processed. */
541 struct branch_path
*path
;
545 /* Pointers to the live in/live out bitmaps for the boundaries of the
547 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
549 /* A simple bitmap to track which basic blocks have been visited
550 already as part of an already processed extended basic block. */
551 static sbitmap cse_visited_basic_blocks
;
553 static bool fixed_base_plus_p (rtx x
);
554 static int notreg_cost (rtx
, enum rtx_code
);
555 static int approx_reg_cost_1 (rtx
*, void *);
556 static int approx_reg_cost (rtx
);
557 static int preferable (int, int, int, int);
558 static void new_basic_block (void);
559 static void make_new_qty (unsigned int, enum machine_mode
);
560 static void make_regs_eqv (unsigned int, unsigned int);
561 static void delete_reg_equiv (unsigned int);
562 static int mention_regs (rtx
);
563 static int insert_regs (rtx
, struct table_elt
*, int);
564 static void remove_from_table (struct table_elt
*, unsigned);
565 static void remove_pseudo_from_table (rtx
, unsigned);
566 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
567 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
568 static rtx
lookup_as_function (rtx
, enum rtx_code
);
569 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
570 enum machine_mode
, int, int);
571 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
573 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
574 static void invalidate (rtx
, enum machine_mode
);
575 static bool cse_rtx_varies_p (const_rtx
, bool);
576 static void remove_invalid_refs (unsigned int);
577 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
579 static void rehash_using_reg (rtx
);
580 static void invalidate_memory (void);
581 static void invalidate_for_call (void);
582 static rtx
use_related_value (rtx
, struct table_elt
*);
584 static inline unsigned canon_hash (rtx
, enum machine_mode
);
585 static inline unsigned safe_hash (rtx
, enum machine_mode
);
586 static inline unsigned hash_rtx_string (const char *);
588 static rtx
canon_reg (rtx
, rtx
);
589 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
591 enum machine_mode
*);
592 static rtx
fold_rtx (rtx
, rtx
);
593 static rtx
equiv_constant (rtx
);
594 static void record_jump_equiv (rtx
, bool);
595 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
597 static void cse_insn (rtx
);
598 static void cse_prescan_path (struct cse_basic_block_data
*);
599 static void invalidate_from_clobbers (rtx
);
600 static rtx
cse_process_notes (rtx
, rtx
, bool *);
601 static void cse_extended_basic_block (struct cse_basic_block_data
*);
602 static void count_reg_usage (rtx
, int *, rtx
, int);
603 static int check_for_label_ref (rtx
*, void *);
604 extern void dump_class (struct table_elt
*);
605 static void get_cse_reg_info_1 (unsigned int regno
);
606 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
607 static int check_dependence (rtx
*, void *);
609 static void flush_hash_table (void);
610 static bool insn_live_p (rtx
, int *);
611 static bool set_live_p (rtx
, rtx
, int *);
612 static int cse_change_cc_mode (rtx
*, void *);
613 static void cse_change_cc_mode_insn (rtx
, rtx
);
614 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
615 static enum machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
619 #undef RTL_HOOKS_GEN_LOWPART
620 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
622 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
624 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
625 virtual regs here because the simplify_*_operation routines are called
626 by integrate.c, which is called before virtual register instantiation. */
629 fixed_base_plus_p (rtx x
)
631 switch (GET_CODE (x
))
634 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
636 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
638 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
639 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
644 if (!CONST_INT_P (XEXP (x
, 1)))
646 return fixed_base_plus_p (XEXP (x
, 0));
653 /* Dump the expressions in the equivalence class indicated by CLASSP.
654 This function is used only for debugging. */
656 dump_class (struct table_elt
*classp
)
658 struct table_elt
*elt
;
660 fprintf (stderr
, "Equivalence chain for ");
661 print_rtl (stderr
, classp
->exp
);
662 fprintf (stderr
, ": \n");
664 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
666 print_rtl (stderr
, elt
->exp
);
667 fprintf (stderr
, "\n");
671 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
674 approx_reg_cost_1 (rtx
*xp
, void *data
)
677 int *cost_p
= (int *) data
;
681 unsigned int regno
= REGNO (x
);
683 if (! CHEAP_REGNO (regno
))
685 if (regno
< FIRST_PSEUDO_REGISTER
)
687 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
699 /* Return an estimate of the cost of the registers used in an rtx.
700 This is mostly the number of different REG expressions in the rtx;
701 however for some exceptions like fixed registers we use a cost of
702 0. If any other hard register reference occurs, return MAX_COST. */
705 approx_reg_cost (rtx x
)
709 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
715 /* Return a negative value if an rtx A, whose costs are given by COST_A
716 and REGCOST_A, is more desirable than an rtx B.
717 Return a positive value if A is less desirable, or 0 if the two are
720 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
722 /* First, get rid of cases involving expressions that are entirely
724 if (cost_a
!= cost_b
)
726 if (cost_a
== MAX_COST
)
728 if (cost_b
== MAX_COST
)
732 /* Avoid extending lifetimes of hardregs. */
733 if (regcost_a
!= regcost_b
)
735 if (regcost_a
== MAX_COST
)
737 if (regcost_b
== MAX_COST
)
741 /* Normal operation costs take precedence. */
742 if (cost_a
!= cost_b
)
743 return cost_a
- cost_b
;
744 /* Only if these are identical consider effects on register pressure. */
745 if (regcost_a
!= regcost_b
)
746 return regcost_a
- regcost_b
;
750 /* Internal function, to compute cost when X is not a register; called
751 from COST macro to keep it simple. */
754 notreg_cost (rtx x
, enum rtx_code outer
)
756 return ((GET_CODE (x
) == SUBREG
757 && REG_P (SUBREG_REG (x
))
758 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
759 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
760 && (GET_MODE_SIZE (GET_MODE (x
))
761 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
762 && subreg_lowpart_p (x
)
763 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
764 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
766 : rtx_cost (x
, outer
, optimize_this_for_speed_p
) * 2);
770 /* Initialize CSE_REG_INFO_TABLE. */
773 init_cse_reg_info (unsigned int nregs
)
775 /* Do we need to grow the table? */
776 if (nregs
> cse_reg_info_table_size
)
778 unsigned int new_size
;
780 if (cse_reg_info_table_size
< 2048)
782 /* Compute a new size that is a power of 2 and no smaller
783 than the large of NREGS and 64. */
784 new_size
= (cse_reg_info_table_size
785 ? cse_reg_info_table_size
: 64);
787 while (new_size
< nregs
)
792 /* If we need a big table, allocate just enough to hold
797 /* Reallocate the table with NEW_SIZE entries. */
798 if (cse_reg_info_table
)
799 free (cse_reg_info_table
);
800 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
801 cse_reg_info_table_size
= new_size
;
802 cse_reg_info_table_first_uninitialized
= 0;
805 /* Do we have all of the first NREGS entries initialized? */
806 if (cse_reg_info_table_first_uninitialized
< nregs
)
808 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
811 /* Put the old timestamp on newly allocated entries so that they
812 will all be considered out of date. We do not touch those
813 entries beyond the first NREGS entries to be nice to the
815 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
816 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
818 cse_reg_info_table_first_uninitialized
= nregs
;
822 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
825 get_cse_reg_info_1 (unsigned int regno
)
827 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
828 entry will be considered to have been initialized. */
829 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
831 /* Initialize the rest of the entry. */
832 cse_reg_info_table
[regno
].reg_tick
= 1;
833 cse_reg_info_table
[regno
].reg_in_table
= -1;
834 cse_reg_info_table
[regno
].subreg_ticked
= -1;
835 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
838 /* Find a cse_reg_info entry for REGNO. */
840 static inline struct cse_reg_info
*
841 get_cse_reg_info (unsigned int regno
)
843 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
845 /* If this entry has not been initialized, go ahead and initialize
847 if (p
->timestamp
!= cse_reg_info_timestamp
)
848 get_cse_reg_info_1 (regno
);
853 /* Clear the hash table and initialize each register with its own quantity,
854 for a new basic block. */
857 new_basic_block (void)
863 /* Invalidate cse_reg_info_table. */
864 cse_reg_info_timestamp
++;
866 /* Clear out hash table state for this pass. */
867 CLEAR_HARD_REG_SET (hard_regs_in_table
);
869 /* The per-quantity values used to be initialized here, but it is
870 much faster to initialize each as it is made in `make_new_qty'. */
872 for (i
= 0; i
< HASH_SIZE
; i
++)
874 struct table_elt
*first
;
879 struct table_elt
*last
= first
;
883 while (last
->next_same_hash
!= NULL
)
884 last
= last
->next_same_hash
;
886 /* Now relink this hash entire chain into
887 the free element list. */
889 last
->next_same_hash
= free_element_chain
;
890 free_element_chain
= first
;
899 /* Say that register REG contains a quantity in mode MODE not in any
900 register before and initialize that quantity. */
903 make_new_qty (unsigned int reg
, enum machine_mode mode
)
906 struct qty_table_elem
*ent
;
907 struct reg_eqv_elem
*eqv
;
909 gcc_assert (next_qty
< max_qty
);
911 q
= REG_QTY (reg
) = next_qty
++;
913 ent
->first_reg
= reg
;
916 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
917 ent
->comparison_code
= UNKNOWN
;
919 eqv
= ®_eqv_table
[reg
];
920 eqv
->next
= eqv
->prev
= -1;
923 /* Make reg NEW equivalent to reg OLD.
924 OLD is not changing; NEW is. */
927 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
929 unsigned int lastr
, firstr
;
930 int q
= REG_QTY (old_reg
);
931 struct qty_table_elem
*ent
;
935 /* Nothing should become eqv until it has a "non-invalid" qty number. */
936 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
938 REG_QTY (new_reg
) = q
;
939 firstr
= ent
->first_reg
;
940 lastr
= ent
->last_reg
;
942 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
943 hard regs. Among pseudos, if NEW will live longer than any other reg
944 of the same qty, and that is beyond the current basic block,
945 make it the new canonical replacement for this qty. */
946 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
947 /* Certain fixed registers might be of the class NO_REGS. This means
948 that not only can they not be allocated by the compiler, but
949 they cannot be used in substitutions or canonicalizations
951 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
952 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
953 || (new_reg
>= FIRST_PSEUDO_REGISTER
954 && (firstr
< FIRST_PSEUDO_REGISTER
955 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
956 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
957 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
958 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
960 reg_eqv_table
[firstr
].prev
= new_reg
;
961 reg_eqv_table
[new_reg
].next
= firstr
;
962 reg_eqv_table
[new_reg
].prev
= -1;
963 ent
->first_reg
= new_reg
;
967 /* If NEW is a hard reg (known to be non-fixed), insert at end.
968 Otherwise, insert before any non-fixed hard regs that are at the
969 end. Registers of class NO_REGS cannot be used as an
970 equivalent for anything. */
971 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
972 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
973 && new_reg
>= FIRST_PSEUDO_REGISTER
)
974 lastr
= reg_eqv_table
[lastr
].prev
;
975 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
976 if (reg_eqv_table
[lastr
].next
>= 0)
977 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
979 qty_table
[q
].last_reg
= new_reg
;
980 reg_eqv_table
[lastr
].next
= new_reg
;
981 reg_eqv_table
[new_reg
].prev
= lastr
;
985 /* Remove REG from its equivalence class. */
988 delete_reg_equiv (unsigned int reg
)
990 struct qty_table_elem
*ent
;
991 int q
= REG_QTY (reg
);
994 /* If invalid, do nothing. */
995 if (! REGNO_QTY_VALID_P (reg
))
1000 p
= reg_eqv_table
[reg
].prev
;
1001 n
= reg_eqv_table
[reg
].next
;
1004 reg_eqv_table
[n
].prev
= p
;
1008 reg_eqv_table
[p
].next
= n
;
1012 REG_QTY (reg
) = -reg
- 1;
1015 /* Remove any invalid expressions from the hash table
1016 that refer to any of the registers contained in expression X.
1018 Make sure that newly inserted references to those registers
1019 as subexpressions will be considered valid.
1021 mention_regs is not called when a register itself
1022 is being stored in the table.
1024 Return 1 if we have done something that may have changed the hash code
1028 mention_regs (rtx x
)
1038 code
= GET_CODE (x
);
1041 unsigned int regno
= REGNO (x
);
1042 unsigned int endregno
= END_REGNO (x
);
1045 for (i
= regno
; i
< endregno
; i
++)
1047 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1048 remove_invalid_refs (i
);
1050 REG_IN_TABLE (i
) = REG_TICK (i
);
1051 SUBREG_TICKED (i
) = -1;
1057 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1058 pseudo if they don't use overlapping words. We handle only pseudos
1059 here for simplicity. */
1060 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1061 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1063 unsigned int i
= REGNO (SUBREG_REG (x
));
1065 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1067 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1068 the last store to this register really stored into this
1069 subreg, then remove the memory of this subreg.
1070 Otherwise, remove any memory of the entire register and
1071 all its subregs from the table. */
1072 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1073 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1074 remove_invalid_refs (i
);
1076 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1079 REG_IN_TABLE (i
) = REG_TICK (i
);
1080 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1084 /* If X is a comparison or a COMPARE and either operand is a register
1085 that does not have a quantity, give it one. This is so that a later
1086 call to record_jump_equiv won't cause X to be assigned a different
1087 hash code and not found in the table after that call.
1089 It is not necessary to do this here, since rehash_using_reg can
1090 fix up the table later, but doing this here eliminates the need to
1091 call that expensive function in the most common case where the only
1092 use of the register is in the comparison. */
1094 if (code
== COMPARE
|| COMPARISON_P (x
))
1096 if (REG_P (XEXP (x
, 0))
1097 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1098 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1100 rehash_using_reg (XEXP (x
, 0));
1104 if (REG_P (XEXP (x
, 1))
1105 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1106 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1108 rehash_using_reg (XEXP (x
, 1));
1113 fmt
= GET_RTX_FORMAT (code
);
1114 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1116 changed
|= mention_regs (XEXP (x
, i
));
1117 else if (fmt
[i
] == 'E')
1118 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1119 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1124 /* Update the register quantities for inserting X into the hash table
1125 with a value equivalent to CLASSP.
1126 (If the class does not contain a REG, it is irrelevant.)
1127 If MODIFIED is nonzero, X is a destination; it is being modified.
1128 Note that delete_reg_equiv should be called on a register
1129 before insert_regs is done on that register with MODIFIED != 0.
1131 Nonzero value means that elements of reg_qty have changed
1132 so X's hash code may be different. */
1135 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1139 unsigned int regno
= REGNO (x
);
1142 /* If REGNO is in the equivalence table already but is of the
1143 wrong mode for that equivalence, don't do anything here. */
1145 qty_valid
= REGNO_QTY_VALID_P (regno
);
1148 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1150 if (ent
->mode
!= GET_MODE (x
))
1154 if (modified
|| ! qty_valid
)
1157 for (classp
= classp
->first_same_value
;
1159 classp
= classp
->next_same_value
)
1160 if (REG_P (classp
->exp
)
1161 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1163 unsigned c_regno
= REGNO (classp
->exp
);
1165 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1167 /* Suppose that 5 is hard reg and 100 and 101 are
1170 (set (reg:si 100) (reg:si 5))
1171 (set (reg:si 5) (reg:si 100))
1172 (set (reg:di 101) (reg:di 5))
1174 We would now set REG_QTY (101) = REG_QTY (5), but the
1175 entry for 5 is in SImode. When we use this later in
1176 copy propagation, we get the register in wrong mode. */
1177 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1180 make_regs_eqv (regno
, c_regno
);
1184 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1185 than REG_IN_TABLE to find out if there was only a single preceding
1186 invalidation - for the SUBREG - or another one, which would be
1187 for the full register. However, if we find here that REG_TICK
1188 indicates that the register is invalid, it means that it has
1189 been invalidated in a separate operation. The SUBREG might be used
1190 now (then this is a recursive call), or we might use the full REG
1191 now and a SUBREG of it later. So bump up REG_TICK so that
1192 mention_regs will do the right thing. */
1194 && REG_IN_TABLE (regno
) >= 0
1195 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1197 make_new_qty (regno
, GET_MODE (x
));
1204 /* If X is a SUBREG, we will likely be inserting the inner register in the
1205 table. If that register doesn't have an assigned quantity number at
1206 this point but does later, the insertion that we will be doing now will
1207 not be accessible because its hash code will have changed. So assign
1208 a quantity number now. */
1210 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1211 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1213 insert_regs (SUBREG_REG (x
), NULL
, 0);
1218 return mention_regs (x
);
1222 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1223 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1224 CST is equal to an anchor. */
1227 compute_const_anchors (rtx cst
,
1228 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1229 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1231 HOST_WIDE_INT n
= INTVAL (cst
);
1233 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1234 if (*lower_base
== n
)
1238 (n
+ (targetm
.const_anchor
- 1)) & ~(targetm
.const_anchor
- 1);
1239 *upper_offs
= n
- *upper_base
;
1240 *lower_offs
= n
- *lower_base
;
1244 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1247 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1248 enum machine_mode mode
)
1250 struct table_elt
*elt
;
1255 anchor_exp
= GEN_INT (anchor
);
1256 hash
= HASH (anchor_exp
, mode
);
1257 elt
= lookup (anchor_exp
, hash
, mode
);
1259 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1261 exp
= plus_constant (reg
, offs
);
1262 /* REG has just been inserted and the hash codes recomputed. */
1264 hash
= HASH (exp
, mode
);
1266 /* Use the cost of the register rather than the whole expression. When
1267 looking up constant anchors we will further offset the corresponding
1268 expression therefore it does not make sense to prefer REGs over
1269 reg-immediate additions. Prefer instead the oldest expression. Also
1270 don't prefer pseudos over hard regs so that we derive constants in
1271 argument registers from other argument registers rather than from the
1272 original pseudo that was used to synthesize the constant. */
1273 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
), 1);
1276 /* The constant CST is equivalent to the register REG. Create
1277 equivalences between the two anchors of CST and the corresponding
1278 register-offset expressions using REG. */
1281 insert_const_anchors (rtx reg
, rtx cst
, enum machine_mode mode
)
1283 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1285 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1286 &upper_base
, &upper_offs
))
1289 /* Ignore anchors of value 0. Constants accessible from zero are
1291 if (lower_base
!= 0)
1292 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1294 if (upper_base
!= 0)
1295 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1298 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1299 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1300 valid expression. Return the cheapest and oldest of such expressions. In
1301 *OLD, return how old the resulting expression is compared to the other
1302 equivalent expressions. */
1305 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1308 struct table_elt
*elt
;
1310 struct table_elt
*match_elt
;
1313 /* Find the cheapest and *oldest* expression to maximize the chance of
1314 reusing the same pseudo. */
1318 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1320 elt
= elt
->next_same_value
, idx
++)
1322 if (match_elt
&& CHEAPER (match_elt
, elt
))
1325 if (REG_P (elt
->exp
)
1326 || (GET_CODE (elt
->exp
) == PLUS
1327 && REG_P (XEXP (elt
->exp
, 0))
1328 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1332 /* Ignore expressions that are no longer valid. */
1333 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1336 x
= plus_constant (elt
->exp
, offs
);
1338 || (GET_CODE (x
) == PLUS
1339 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1340 -targetm
.const_anchor
,
1341 targetm
.const_anchor
- 1)))
1353 /* Try to express the constant SRC_CONST using a register+offset expression
1354 derived from a constant anchor. Return it if successful or NULL_RTX,
1358 try_const_anchors (rtx src_const
, enum machine_mode mode
)
1360 struct table_elt
*lower_elt
, *upper_elt
;
1361 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1362 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1363 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1364 unsigned lower_old
, upper_old
;
1366 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1367 &upper_base
, &upper_offs
))
1370 lower_anchor_rtx
= GEN_INT (lower_base
);
1371 upper_anchor_rtx
= GEN_INT (upper_base
);
1372 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1373 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1376 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1378 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1385 /* Return the older expression. */
1386 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1389 /* Look in or update the hash table. */
1391 /* Remove table element ELT from use in the table.
1392 HASH is its hash code, made using the HASH macro.
1393 It's an argument because often that is known in advance
1394 and we save much time not recomputing it. */
1397 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1402 /* Mark this element as removed. See cse_insn. */
1403 elt
->first_same_value
= 0;
1405 /* Remove the table element from its equivalence class. */
1408 struct table_elt
*prev
= elt
->prev_same_value
;
1409 struct table_elt
*next
= elt
->next_same_value
;
1412 next
->prev_same_value
= prev
;
1415 prev
->next_same_value
= next
;
1418 struct table_elt
*newfirst
= next
;
1421 next
->first_same_value
= newfirst
;
1422 next
= next
->next_same_value
;
1427 /* Remove the table element from its hash bucket. */
1430 struct table_elt
*prev
= elt
->prev_same_hash
;
1431 struct table_elt
*next
= elt
->next_same_hash
;
1434 next
->prev_same_hash
= prev
;
1437 prev
->next_same_hash
= next
;
1438 else if (table
[hash
] == elt
)
1442 /* This entry is not in the proper hash bucket. This can happen
1443 when two classes were merged by `merge_equiv_classes'. Search
1444 for the hash bucket that it heads. This happens only very
1445 rarely, so the cost is acceptable. */
1446 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1447 if (table
[hash
] == elt
)
1452 /* Remove the table element from its related-value circular chain. */
1454 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1456 struct table_elt
*p
= elt
->related_value
;
1458 while (p
->related_value
!= elt
)
1459 p
= p
->related_value
;
1460 p
->related_value
= elt
->related_value
;
1461 if (p
->related_value
== p
)
1462 p
->related_value
= 0;
1465 /* Now add it to the free element chain. */
1466 elt
->next_same_hash
= free_element_chain
;
1467 free_element_chain
= elt
;
1470 /* Same as above, but X is a pseudo-register. */
1473 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1475 struct table_elt
*elt
;
1477 /* Because a pseudo-register can be referenced in more than one
1478 mode, we might have to remove more than one table entry. */
1479 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1480 remove_from_table (elt
, hash
);
1483 /* Look up X in the hash table and return its table element,
1484 or 0 if X is not in the table.
1486 MODE is the machine-mode of X, or if X is an integer constant
1487 with VOIDmode then MODE is the mode with which X will be used.
1489 Here we are satisfied to find an expression whose tree structure
1492 static struct table_elt
*
1493 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1495 struct table_elt
*p
;
1497 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1498 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1499 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1505 /* Like `lookup' but don't care whether the table element uses invalid regs.
1506 Also ignore discrepancies in the machine mode of a register. */
1508 static struct table_elt
*
1509 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1511 struct table_elt
*p
;
1515 unsigned int regno
= REGNO (x
);
1517 /* Don't check the machine mode when comparing registers;
1518 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1519 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1521 && REGNO (p
->exp
) == regno
)
1526 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1528 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1535 /* Look for an expression equivalent to X and with code CODE.
1536 If one is found, return that expression. */
1539 lookup_as_function (rtx x
, enum rtx_code code
)
1542 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1547 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1548 if (GET_CODE (p
->exp
) == code
1549 /* Make sure this is a valid entry in the table. */
1550 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1556 /* Insert X in the hash table, assuming HASH is its hash code and
1557 CLASSP is an element of the class it should go in (or 0 if a new
1558 class should be made). COST is the code of X and reg_cost is the
1559 cost of registers in X. It is inserted at the proper position to
1560 keep the class in the order cheapest first.
1562 MODE is the machine-mode of X, or if X is an integer constant
1563 with VOIDmode then MODE is the mode with which X will be used.
1565 For elements of equal cheapness, the most recent one
1566 goes in front, except that the first element in the list
1567 remains first unless a cheaper element is added. The order of
1568 pseudo-registers does not matter, as canon_reg will be called to
1569 find the cheapest when a register is retrieved from the table.
1571 The in_memory field in the hash table element is set to 0.
1572 The caller must set it nonzero if appropriate.
1574 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1575 and if insert_regs returns a nonzero value
1576 you must then recompute its hash code before calling here.
1578 If necessary, update table showing constant values of quantities. */
1580 static struct table_elt
*
1581 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1582 enum machine_mode mode
, int cost
, int reg_cost
)
1584 struct table_elt
*elt
;
1586 /* If X is a register and we haven't made a quantity for it,
1587 something is wrong. */
1588 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1590 /* If X is a hard register, show it is being put in the table. */
1591 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1592 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1594 /* Put an element for X into the right hash bucket. */
1596 elt
= free_element_chain
;
1598 free_element_chain
= elt
->next_same_hash
;
1600 elt
= XNEW (struct table_elt
);
1603 elt
->canon_exp
= NULL_RTX
;
1605 elt
->regcost
= reg_cost
;
1606 elt
->next_same_value
= 0;
1607 elt
->prev_same_value
= 0;
1608 elt
->next_same_hash
= table
[hash
];
1609 elt
->prev_same_hash
= 0;
1610 elt
->related_value
= 0;
1613 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1616 table
[hash
]->prev_same_hash
= elt
;
1619 /* Put it into the proper value-class. */
1622 classp
= classp
->first_same_value
;
1623 if (CHEAPER (elt
, classp
))
1624 /* Insert at the head of the class. */
1626 struct table_elt
*p
;
1627 elt
->next_same_value
= classp
;
1628 classp
->prev_same_value
= elt
;
1629 elt
->first_same_value
= elt
;
1631 for (p
= classp
; p
; p
= p
->next_same_value
)
1632 p
->first_same_value
= elt
;
1636 /* Insert not at head of the class. */
1637 /* Put it after the last element cheaper than X. */
1638 struct table_elt
*p
, *next
;
1640 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1643 /* Put it after P and before NEXT. */
1644 elt
->next_same_value
= next
;
1646 next
->prev_same_value
= elt
;
1648 elt
->prev_same_value
= p
;
1649 p
->next_same_value
= elt
;
1650 elt
->first_same_value
= classp
;
1654 elt
->first_same_value
= elt
;
1656 /* If this is a constant being set equivalent to a register or a register
1657 being set equivalent to a constant, note the constant equivalence.
1659 If this is a constant, it cannot be equivalent to a different constant,
1660 and a constant is the only thing that can be cheaper than a register. So
1661 we know the register is the head of the class (before the constant was
1664 If this is a register that is not already known equivalent to a
1665 constant, we must check the entire class.
1667 If this is a register that is already known equivalent to an insn,
1668 update the qtys `const_insn' to show that `this_insn' is the latest
1669 insn making that quantity equivalent to the constant. */
1671 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1674 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1675 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1677 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1678 exp_ent
->const_insn
= this_insn
;
1683 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1686 struct table_elt
*p
;
1688 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1690 if (p
->is_const
&& !REG_P (p
->exp
))
1692 int x_q
= REG_QTY (REGNO (x
));
1693 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1696 = gen_lowpart (GET_MODE (x
), p
->exp
);
1697 x_ent
->const_insn
= this_insn
;
1704 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1705 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1706 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1708 /* If this is a constant with symbolic value,
1709 and it has a term with an explicit integer value,
1710 link it up with related expressions. */
1711 if (GET_CODE (x
) == CONST
)
1713 rtx subexp
= get_related_value (x
);
1715 struct table_elt
*subelt
, *subelt_prev
;
1719 /* Get the integer-free subexpression in the hash table. */
1720 subhash
= SAFE_HASH (subexp
, mode
);
1721 subelt
= lookup (subexp
, subhash
, mode
);
1723 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1724 /* Initialize SUBELT's circular chain if it has none. */
1725 if (subelt
->related_value
== 0)
1726 subelt
->related_value
= subelt
;
1727 /* Find the element in the circular chain that precedes SUBELT. */
1728 subelt_prev
= subelt
;
1729 while (subelt_prev
->related_value
!= subelt
)
1730 subelt_prev
= subelt_prev
->related_value
;
1731 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1732 This way the element that follows SUBELT is the oldest one. */
1733 elt
->related_value
= subelt_prev
->related_value
;
1734 subelt_prev
->related_value
= elt
;
1741 /* Wrap insert_with_costs by passing the default costs. */
1743 static struct table_elt
*
1744 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1745 enum machine_mode mode
)
1748 insert_with_costs (x
, classp
, hash
, mode
, COST (x
), approx_reg_cost (x
));
1752 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1753 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1754 the two classes equivalent.
1756 CLASS1 will be the surviving class; CLASS2 should not be used after this
1759 Any invalid entries in CLASS2 will not be copied. */
1762 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1764 struct table_elt
*elt
, *next
, *new_elt
;
1766 /* Ensure we start with the head of the classes. */
1767 class1
= class1
->first_same_value
;
1768 class2
= class2
->first_same_value
;
1770 /* If they were already equal, forget it. */
1771 if (class1
== class2
)
1774 for (elt
= class2
; elt
; elt
= next
)
1778 enum machine_mode mode
= elt
->mode
;
1780 next
= elt
->next_same_value
;
1782 /* Remove old entry, make a new one in CLASS1's class.
1783 Don't do this for invalid entries as we cannot find their
1784 hash code (it also isn't necessary). */
1785 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1787 bool need_rehash
= false;
1789 hash_arg_in_memory
= 0;
1790 hash
= HASH (exp
, mode
);
1794 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1795 delete_reg_equiv (REGNO (exp
));
1798 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1799 remove_pseudo_from_table (exp
, hash
);
1801 remove_from_table (elt
, hash
);
1803 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1805 rehash_using_reg (exp
);
1806 hash
= HASH (exp
, mode
);
1808 new_elt
= insert (exp
, class1
, hash
, mode
);
1809 new_elt
->in_memory
= hash_arg_in_memory
;
1814 /* Flush the entire hash table. */
1817 flush_hash_table (void)
1820 struct table_elt
*p
;
1822 for (i
= 0; i
< HASH_SIZE
; i
++)
1823 for (p
= table
[i
]; p
; p
= table
[i
])
1825 /* Note that invalidate can remove elements
1826 after P in the current hash chain. */
1828 invalidate (p
->exp
, VOIDmode
);
1830 remove_from_table (p
, i
);
1834 /* Function called for each rtx to check whether true dependence exist. */
1835 struct check_dependence_data
1837 enum machine_mode mode
;
1843 check_dependence (rtx
*x
, void *data
)
1845 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1846 if (*x
&& MEM_P (*x
))
1847 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
, NULL_RTX
,
1853 /* Remove from the hash table, or mark as invalid, all expressions whose
1854 values could be altered by storing in X. X is a register, a subreg, or
1855 a memory reference with nonvarying address (because, when a memory
1856 reference with a varying address is stored in, all memory references are
1857 removed by invalidate_memory so specific invalidation is superfluous).
1858 FULL_MODE, if not VOIDmode, indicates that this much should be
1859 invalidated instead of just the amount indicated by the mode of X. This
1860 is only used for bitfield stores into memory.
1862 A nonvarying address may be just a register or just a symbol reference,
1863 or it may be either of those plus a numeric offset. */
1866 invalidate (rtx x
, enum machine_mode full_mode
)
1869 struct table_elt
*p
;
1872 switch (GET_CODE (x
))
1876 /* If X is a register, dependencies on its contents are recorded
1877 through the qty number mechanism. Just change the qty number of
1878 the register, mark it as invalid for expressions that refer to it,
1879 and remove it itself. */
1880 unsigned int regno
= REGNO (x
);
1881 unsigned int hash
= HASH (x
, GET_MODE (x
));
1883 /* Remove REGNO from any quantity list it might be on and indicate
1884 that its value might have changed. If it is a pseudo, remove its
1885 entry from the hash table.
1887 For a hard register, we do the first two actions above for any
1888 additional hard registers corresponding to X. Then, if any of these
1889 registers are in the table, we must remove any REG entries that
1890 overlap these registers. */
1892 delete_reg_equiv (regno
);
1894 SUBREG_TICKED (regno
) = -1;
1896 if (regno
>= FIRST_PSEUDO_REGISTER
)
1897 remove_pseudo_from_table (x
, hash
);
1900 HOST_WIDE_INT in_table
1901 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1902 unsigned int endregno
= END_HARD_REGNO (x
);
1903 unsigned int tregno
, tendregno
, rn
;
1904 struct table_elt
*p
, *next
;
1906 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1908 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1910 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1911 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1912 delete_reg_equiv (rn
);
1914 SUBREG_TICKED (rn
) = -1;
1918 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1919 for (p
= table
[hash
]; p
; p
= next
)
1921 next
= p
->next_same_hash
;
1924 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1927 tregno
= REGNO (p
->exp
);
1928 tendregno
= END_HARD_REGNO (p
->exp
);
1929 if (tendregno
> regno
&& tregno
< endregno
)
1930 remove_from_table (p
, hash
);
1937 invalidate (SUBREG_REG (x
), VOIDmode
);
1941 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1942 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1946 /* This is part of a disjoint return value; extract the location in
1947 question ignoring the offset. */
1948 invalidate (XEXP (x
, 0), VOIDmode
);
1952 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1953 /* Calculate the canonical version of X here so that
1954 true_dependence doesn't generate new RTL for X on each call. */
1957 /* Remove all hash table elements that refer to overlapping pieces of
1959 if (full_mode
== VOIDmode
)
1960 full_mode
= GET_MODE (x
);
1962 for (i
= 0; i
< HASH_SIZE
; i
++)
1964 struct table_elt
*next
;
1966 for (p
= table
[i
]; p
; p
= next
)
1968 next
= p
->next_same_hash
;
1971 struct check_dependence_data d
;
1973 /* Just canonicalize the expression once;
1974 otherwise each time we call invalidate
1975 true_dependence will canonicalize the
1976 expression again. */
1978 p
->canon_exp
= canon_rtx (p
->exp
);
1982 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1983 remove_from_table (p
, i
);
1994 /* Remove all expressions that refer to register REGNO,
1995 since they are already invalid, and we are about to
1996 mark that register valid again and don't want the old
1997 expressions to reappear as valid. */
2000 remove_invalid_refs (unsigned int regno
)
2003 struct table_elt
*p
, *next
;
2005 for (i
= 0; i
< HASH_SIZE
; i
++)
2006 for (p
= table
[i
]; p
; p
= next
)
2008 next
= p
->next_same_hash
;
2010 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2011 remove_from_table (p
, i
);
2015 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
2018 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
2019 enum machine_mode mode
)
2022 struct table_elt
*p
, *next
;
2023 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
2025 for (i
= 0; i
< HASH_SIZE
; i
++)
2026 for (p
= table
[i
]; p
; p
= next
)
2029 next
= p
->next_same_hash
;
2032 && (GET_CODE (exp
) != SUBREG
2033 || !REG_P (SUBREG_REG (exp
))
2034 || REGNO (SUBREG_REG (exp
)) != regno
2035 || (((SUBREG_BYTE (exp
)
2036 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
2037 && SUBREG_BYTE (exp
) <= end
))
2038 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
2039 remove_from_table (p
, i
);
2043 /* Recompute the hash codes of any valid entries in the hash table that
2044 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2046 This is called when we make a jump equivalence. */
2049 rehash_using_reg (rtx x
)
2052 struct table_elt
*p
, *next
;
2055 if (GET_CODE (x
) == SUBREG
)
2058 /* If X is not a register or if the register is known not to be in any
2059 valid entries in the table, we have no work to do. */
2062 || REG_IN_TABLE (REGNO (x
)) < 0
2063 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2066 /* Scan all hash chains looking for valid entries that mention X.
2067 If we find one and it is in the wrong hash chain, move it. */
2069 for (i
= 0; i
< HASH_SIZE
; i
++)
2070 for (p
= table
[i
]; p
; p
= next
)
2072 next
= p
->next_same_hash
;
2073 if (reg_mentioned_p (x
, p
->exp
)
2074 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2075 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2077 if (p
->next_same_hash
)
2078 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2080 if (p
->prev_same_hash
)
2081 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2083 table
[i
] = p
->next_same_hash
;
2085 p
->next_same_hash
= table
[hash
];
2086 p
->prev_same_hash
= 0;
2088 table
[hash
]->prev_same_hash
= p
;
2094 /* Remove from the hash table any expression that is a call-clobbered
2095 register. Also update their TICK values. */
2098 invalidate_for_call (void)
2100 unsigned int regno
, endregno
;
2103 struct table_elt
*p
, *next
;
2106 /* Go through all the hard registers. For each that is clobbered in
2107 a CALL_INSN, remove the register from quantity chains and update
2108 reg_tick if defined. Also see if any of these registers is currently
2111 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2112 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2114 delete_reg_equiv (regno
);
2115 if (REG_TICK (regno
) >= 0)
2118 SUBREG_TICKED (regno
) = -1;
2121 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2124 /* In the case where we have no call-clobbered hard registers in the
2125 table, we are done. Otherwise, scan the table and remove any
2126 entry that overlaps a call-clobbered register. */
2129 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2130 for (p
= table
[hash
]; p
; p
= next
)
2132 next
= p
->next_same_hash
;
2135 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2138 regno
= REGNO (p
->exp
);
2139 endregno
= END_HARD_REGNO (p
->exp
);
2141 for (i
= regno
; i
< endregno
; i
++)
2142 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2144 remove_from_table (p
, hash
);
2150 /* Given an expression X of type CONST,
2151 and ELT which is its table entry (or 0 if it
2152 is not in the hash table),
2153 return an alternate expression for X as a register plus integer.
2154 If none can be found, return 0. */
2157 use_related_value (rtx x
, struct table_elt
*elt
)
2159 struct table_elt
*relt
= 0;
2160 struct table_elt
*p
, *q
;
2161 HOST_WIDE_INT offset
;
2163 /* First, is there anything related known?
2164 If we have a table element, we can tell from that.
2165 Otherwise, must look it up. */
2167 if (elt
!= 0 && elt
->related_value
!= 0)
2169 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2171 rtx subexp
= get_related_value (x
);
2173 relt
= lookup (subexp
,
2174 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2181 /* Search all related table entries for one that has an
2182 equivalent register. */
2187 /* This loop is strange in that it is executed in two different cases.
2188 The first is when X is already in the table. Then it is searching
2189 the RELATED_VALUE list of X's class (RELT). The second case is when
2190 X is not in the table. Then RELT points to a class for the related
2193 Ensure that, whatever case we are in, that we ignore classes that have
2194 the same value as X. */
2196 if (rtx_equal_p (x
, p
->exp
))
2199 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2206 p
= p
->related_value
;
2208 /* We went all the way around, so there is nothing to be found.
2209 Alternatively, perhaps RELT was in the table for some other reason
2210 and it has no related values recorded. */
2211 if (p
== relt
|| p
== 0)
2218 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2219 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2220 return plus_constant (q
->exp
, offset
);
2224 /* Hash a string. Just add its bytes up. */
2225 static inline unsigned
2226 hash_rtx_string (const char *ps
)
2229 const unsigned char *p
= (const unsigned char *) ps
;
2238 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2239 When the callback returns true, we continue with the new rtx. */
2242 hash_rtx_cb (const_rtx x
, enum machine_mode mode
,
2243 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2244 bool have_reg_qty
, hash_rtx_callback_function cb
)
2250 enum machine_mode newmode
;
2253 /* Used to turn recursion into iteration. We can't rely on GCC's
2254 tail-recursion elimination since we need to keep accumulating values
2260 /* Invoke the callback first. */
2262 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2264 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2265 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2269 code
= GET_CODE (x
);
2274 unsigned int regno
= REGNO (x
);
2276 if (do_not_record_p
&& !reload_completed
)
2278 /* On some machines, we can't record any non-fixed hard register,
2279 because extending its life will cause reload problems. We
2280 consider ap, fp, sp, gp to be fixed for this purpose.
2282 We also consider CCmode registers to be fixed for this purpose;
2283 failure to do so leads to failure to simplify 0<100 type of
2286 On all machines, we can't record any global registers.
2287 Nor should we record any register that is in a small
2288 class, as defined by CLASS_LIKELY_SPILLED_P. */
2291 if (regno
>= FIRST_PSEUDO_REGISTER
)
2293 else if (x
== frame_pointer_rtx
2294 || x
== hard_frame_pointer_rtx
2295 || x
== arg_pointer_rtx
2296 || x
== stack_pointer_rtx
2297 || x
== pic_offset_table_rtx
)
2299 else if (global_regs
[regno
])
2301 else if (fixed_regs
[regno
])
2303 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2305 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2307 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2314 *do_not_record_p
= 1;
2319 hash
+= ((unsigned int) REG
<< 7);
2320 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2324 /* We handle SUBREG of a REG specially because the underlying
2325 reg changes its hash value with every value change; we don't
2326 want to have to forget unrelated subregs when one subreg changes. */
2329 if (REG_P (SUBREG_REG (x
)))
2331 hash
+= (((unsigned int) SUBREG
<< 7)
2332 + REGNO (SUBREG_REG (x
))
2333 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2340 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2341 + (unsigned int) INTVAL (x
));
2345 /* This is like the general case, except that it only counts
2346 the integers representing the constant. */
2347 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2348 if (GET_MODE (x
) != VOIDmode
)
2349 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2351 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2352 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2356 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2357 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2365 units
= CONST_VECTOR_NUNITS (x
);
2367 for (i
= 0; i
< units
; ++i
)
2369 elt
= CONST_VECTOR_ELT (x
, i
);
2370 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2371 do_not_record_p
, hash_arg_in_memory_p
,
2378 /* Assume there is only one rtx object for any given label. */
2380 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2381 differences and differences between each stage's debugging dumps. */
2382 hash
+= (((unsigned int) LABEL_REF
<< 7)
2383 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2388 /* Don't hash on the symbol's address to avoid bootstrap differences.
2389 Different hash values may cause expressions to be recorded in
2390 different orders and thus different registers to be used in the
2391 final assembler. This also avoids differences in the dump files
2392 between various stages. */
2394 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2397 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2399 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2404 /* We don't record if marked volatile or if BLKmode since we don't
2405 know the size of the move. */
2406 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2408 *do_not_record_p
= 1;
2411 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2412 *hash_arg_in_memory_p
= 1;
2414 /* Now that we have already found this special case,
2415 might as well speed it up as much as possible. */
2416 hash
+= (unsigned) MEM
;
2421 /* A USE that mentions non-volatile memory needs special
2422 handling since the MEM may be BLKmode which normally
2423 prevents an entry from being made. Pure calls are
2424 marked by a USE which mentions BLKmode memory.
2425 See calls.c:emit_call_1. */
2426 if (MEM_P (XEXP (x
, 0))
2427 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2429 hash
+= (unsigned) USE
;
2432 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2433 *hash_arg_in_memory_p
= 1;
2435 /* Now that we have already found this special case,
2436 might as well speed it up as much as possible. */
2437 hash
+= (unsigned) MEM
;
2452 case UNSPEC_VOLATILE
:
2453 if (do_not_record_p
) {
2454 *do_not_record_p
= 1;
2462 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2464 *do_not_record_p
= 1;
2469 /* We don't want to take the filename and line into account. */
2470 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2471 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2472 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2473 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2475 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2477 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2479 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2480 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2481 do_not_record_p
, hash_arg_in_memory_p
,
2484 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2487 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2488 x
= ASM_OPERANDS_INPUT (x
, 0);
2489 mode
= GET_MODE (x
);
2501 i
= GET_RTX_LENGTH (code
) - 1;
2502 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2503 fmt
= GET_RTX_FORMAT (code
);
2509 /* If we are about to do the last recursive call
2510 needed at this level, change it into iteration.
2511 This function is called enough to be worth it. */
2518 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2519 hash_arg_in_memory_p
,
2524 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2525 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2526 hash_arg_in_memory_p
,
2531 hash
+= hash_rtx_string (XSTR (x
, i
));
2535 hash
+= (unsigned int) XINT (x
, i
);
2550 /* Hash an rtx. We are careful to make sure the value is never negative.
2551 Equivalent registers hash identically.
2552 MODE is used in hashing for CONST_INTs only;
2553 otherwise the mode of X is used.
2555 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2557 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2558 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2560 Note that cse_insn knows that the hash code of a MEM expression
2561 is just (int) MEM plus the hash code of the address. */
2564 hash_rtx (const_rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2565 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2567 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2568 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2571 /* Hash an rtx X for cse via hash_rtx.
2572 Stores 1 in do_not_record if any subexpression is volatile.
2573 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2574 does not have the RTX_UNCHANGING_P bit set. */
2576 static inline unsigned
2577 canon_hash (rtx x
, enum machine_mode mode
)
2579 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2582 /* Like canon_hash but with no side effects, i.e. do_not_record
2583 and hash_arg_in_memory are not changed. */
2585 static inline unsigned
2586 safe_hash (rtx x
, enum machine_mode mode
)
2588 int dummy_do_not_record
;
2589 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2592 /* Return 1 iff X and Y would canonicalize into the same thing,
2593 without actually constructing the canonicalization of either one.
2594 If VALIDATE is nonzero,
2595 we assume X is an expression being processed from the rtl
2596 and Y was found in the hash table. We check register refs
2597 in Y for being marked as valid.
2599 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2602 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2608 /* Note: it is incorrect to assume an expression is equivalent to itself
2609 if VALIDATE is nonzero. */
2610 if (x
== y
&& !validate
)
2613 if (x
== 0 || y
== 0)
2616 code
= GET_CODE (x
);
2617 if (code
!= GET_CODE (y
))
2620 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2621 if (GET_MODE (x
) != GET_MODE (y
))
2624 /* MEMs refering to different address space are not equivalent. */
2625 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2638 return XEXP (x
, 0) == XEXP (y
, 0);
2641 return XSTR (x
, 0) == XSTR (y
, 0);
2645 return REGNO (x
) == REGNO (y
);
2648 unsigned int regno
= REGNO (y
);
2650 unsigned int endregno
= END_REGNO (y
);
2652 /* If the quantities are not the same, the expressions are not
2653 equivalent. If there are and we are not to validate, they
2654 are equivalent. Otherwise, ensure all regs are up-to-date. */
2656 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2662 for (i
= regno
; i
< endregno
; i
++)
2663 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2672 /* Can't merge two expressions in different alias sets, since we
2673 can decide that the expression is transparent in a block when
2674 it isn't, due to it being set with the different alias set. */
2675 if (MEM_ALIAS_SET (x
) != MEM_ALIAS_SET (y
))
2678 /* A volatile mem should not be considered equivalent to any
2680 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2685 /* For commutative operations, check both orders. */
2693 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2695 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2696 validate
, for_gcse
))
2697 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2699 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2700 validate
, for_gcse
)));
2703 /* We don't use the generic code below because we want to
2704 disregard filename and line numbers. */
2706 /* A volatile asm isn't equivalent to any other. */
2707 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2710 if (GET_MODE (x
) != GET_MODE (y
)
2711 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2712 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2713 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2714 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2715 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2718 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2720 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2721 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2722 ASM_OPERANDS_INPUT (y
, i
),
2724 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2725 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2735 /* Compare the elements. If any pair of corresponding elements
2736 fail to match, return 0 for the whole thing. */
2738 fmt
= GET_RTX_FORMAT (code
);
2739 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2744 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2745 validate
, for_gcse
))
2750 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2752 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2753 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2754 validate
, for_gcse
))
2759 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2764 if (XINT (x
, i
) != XINT (y
, i
))
2769 if (XWINT (x
, i
) != XWINT (y
, i
))
2785 /* Return 1 if X has a value that can vary even between two
2786 executions of the program. 0 means X can be compared reliably
2787 against certain constants or near-constants. */
2790 cse_rtx_varies_p (const_rtx x
, bool from_alias
)
2792 /* We need not check for X and the equivalence class being of the same
2793 mode because if X is equivalent to a constant in some mode, it
2794 doesn't vary in any mode. */
2797 && REGNO_QTY_VALID_P (REGNO (x
)))
2799 int x_q
= REG_QTY (REGNO (x
));
2800 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2802 if (GET_MODE (x
) == x_ent
->mode
2803 && x_ent
->const_rtx
!= NULL_RTX
)
2807 if (GET_CODE (x
) == PLUS
2808 && CONST_INT_P (XEXP (x
, 1))
2809 && REG_P (XEXP (x
, 0))
2810 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2812 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2813 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2815 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2816 && x0_ent
->const_rtx
!= NULL_RTX
)
2820 /* This can happen as the result of virtual register instantiation, if
2821 the initial constant is too large to be a valid address. This gives
2822 us a three instruction sequence, load large offset into a register,
2823 load fp minus a constant into a register, then a MEM which is the
2824 sum of the two `constant' registers. */
2825 if (GET_CODE (x
) == PLUS
2826 && REG_P (XEXP (x
, 0))
2827 && REG_P (XEXP (x
, 1))
2828 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2829 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2831 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2832 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2833 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2834 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2836 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2837 && x0_ent
->const_rtx
!= NULL_RTX
2838 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2839 && x1_ent
->const_rtx
!= NULL_RTX
)
2843 return rtx_varies_p (x
, from_alias
);
2846 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2847 the result if necessary. INSN is as for canon_reg. */
2850 validate_canon_reg (rtx
*xloc
, rtx insn
)
2854 rtx new_rtx
= canon_reg (*xloc
, insn
);
2856 /* If replacing pseudo with hard reg or vice versa, ensure the
2857 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2858 gcc_assert (insn
&& new_rtx
);
2859 validate_change (insn
, xloc
, new_rtx
, 1);
2863 /* Canonicalize an expression:
2864 replace each register reference inside it
2865 with the "oldest" equivalent register.
2867 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2868 after we make our substitution. The calls are made with IN_GROUP nonzero
2869 so apply_change_group must be called upon the outermost return from this
2870 function (unless INSN is zero). The result of apply_change_group can
2871 generally be discarded since the changes we are making are optional. */
2874 canon_reg (rtx x
, rtx insn
)
2883 code
= GET_CODE (x
);
2903 struct qty_table_elem
*ent
;
2905 /* Never replace a hard reg, because hard regs can appear
2906 in more than one machine mode, and we must preserve the mode
2907 of each occurrence. Also, some hard regs appear in
2908 MEMs that are shared and mustn't be altered. Don't try to
2909 replace any reg that maps to a reg of class NO_REGS. */
2910 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2911 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2914 q
= REG_QTY (REGNO (x
));
2915 ent
= &qty_table
[q
];
2916 first
= ent
->first_reg
;
2917 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2918 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2919 : gen_rtx_REG (ent
->mode
, first
));
2926 fmt
= GET_RTX_FORMAT (code
);
2927 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2932 validate_canon_reg (&XEXP (x
, i
), insn
);
2933 else if (fmt
[i
] == 'E')
2934 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2935 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2941 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2942 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2943 what values are being compared.
2945 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2946 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2947 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2948 compared to produce cc0.
2950 The return value is the comparison operator and is either the code of
2951 A or the code corresponding to the inverse of the comparison. */
2953 static enum rtx_code
2954 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2955 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
2959 arg1
= *parg1
, arg2
= *parg2
;
2961 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2963 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2965 /* Set nonzero when we find something of interest. */
2967 int reverse_code
= 0;
2968 struct table_elt
*p
= 0;
2970 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2971 On machines with CC0, this is the only case that can occur, since
2972 fold_rtx will return the COMPARE or item being compared with zero
2975 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2978 /* If ARG1 is a comparison operator and CODE is testing for
2979 STORE_FLAG_VALUE, get the inner arguments. */
2981 else if (COMPARISON_P (arg1
))
2983 #ifdef FLOAT_STORE_FLAG_VALUE
2984 REAL_VALUE_TYPE fsfv
;
2988 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2989 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2990 #ifdef FLOAT_STORE_FLAG_VALUE
2991 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2992 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2993 REAL_VALUE_NEGATIVE (fsfv
)))
2998 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2999 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3000 #ifdef FLOAT_STORE_FLAG_VALUE
3001 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
3002 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3003 REAL_VALUE_NEGATIVE (fsfv
)))
3006 x
= arg1
, reverse_code
= 1;
3009 /* ??? We could also check for
3011 (ne (and (eq (...) (const_int 1))) (const_int 0))
3013 and related forms, but let's wait until we see them occurring. */
3016 /* Look up ARG1 in the hash table and see if it has an equivalence
3017 that lets us see what is being compared. */
3018 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3021 p
= p
->first_same_value
;
3023 /* If what we compare is already known to be constant, that is as
3025 We need to break the loop in this case, because otherwise we
3026 can have an infinite loop when looking at a reg that is known
3027 to be a constant which is the same as a comparison of a reg
3028 against zero which appears later in the insn stream, which in
3029 turn is constant and the same as the comparison of the first reg
3035 for (; p
; p
= p
->next_same_value
)
3037 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3038 #ifdef FLOAT_STORE_FLAG_VALUE
3039 REAL_VALUE_TYPE fsfv
;
3042 /* If the entry isn't valid, skip it. */
3043 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3046 if (GET_CODE (p
->exp
) == COMPARE
3047 /* Another possibility is that this machine has a compare insn
3048 that includes the comparison code. In that case, ARG1 would
3049 be equivalent to a comparison operation that would set ARG1 to
3050 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3051 ORIG_CODE is the actual comparison being done; if it is an EQ,
3052 we must reverse ORIG_CODE. On machine with a negative value
3053 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3056 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3057 && (GET_MODE_BITSIZE (inner_mode
)
3058 <= HOST_BITS_PER_WIDE_INT
)
3059 && (STORE_FLAG_VALUE
3060 & ((HOST_WIDE_INT
) 1
3061 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3062 #ifdef FLOAT_STORE_FLAG_VALUE
3064 && SCALAR_FLOAT_MODE_P (inner_mode
)
3065 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3066 REAL_VALUE_NEGATIVE (fsfv
)))
3069 && COMPARISON_P (p
->exp
)))
3074 else if ((code
== EQ
3076 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3077 && (GET_MODE_BITSIZE (inner_mode
)
3078 <= HOST_BITS_PER_WIDE_INT
)
3079 && (STORE_FLAG_VALUE
3080 & ((HOST_WIDE_INT
) 1
3081 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3082 #ifdef FLOAT_STORE_FLAG_VALUE
3084 && SCALAR_FLOAT_MODE_P (inner_mode
)
3085 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3086 REAL_VALUE_NEGATIVE (fsfv
)))
3089 && COMPARISON_P (p
->exp
))
3096 /* If this non-trapping address, e.g. fp + constant, the
3097 equivalent is a better operand since it may let us predict
3098 the value of the comparison. */
3099 else if (!rtx_addr_can_trap_p (p
->exp
))
3106 /* If we didn't find a useful equivalence for ARG1, we are done.
3107 Otherwise, set up for the next iteration. */
3111 /* If we need to reverse the comparison, make sure that that is
3112 possible -- we can't necessarily infer the value of GE from LT
3113 with floating-point operands. */
3116 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3117 if (reversed
== UNKNOWN
)
3122 else if (COMPARISON_P (x
))
3123 code
= GET_CODE (x
);
3124 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3127 /* Return our results. Return the modes from before fold_rtx
3128 because fold_rtx might produce const_int, and then it's too late. */
3129 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3130 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3135 /* If X is a nontrivial arithmetic operation on an argument for which
3136 a constant value can be determined, return the result of operating
3137 on that value, as a constant. Otherwise, return X, possibly with
3138 one or more operands changed to a forward-propagated constant.
3140 If X is a register whose contents are known, we do NOT return
3141 those contents here; equiv_constant is called to perform that task.
3142 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3144 INSN is the insn that we may be modifying. If it is 0, make a copy
3145 of X before modifying it. */
3148 fold_rtx (rtx x
, rtx insn
)
3151 enum machine_mode mode
;
3157 /* Operands of X. */
3161 /* Constant equivalents of first three operands of X;
3162 0 when no such equivalent is known. */
3167 /* The mode of the first operand of X. We need this for sign and zero
3169 enum machine_mode mode_arg0
;
3174 /* Try to perform some initial simplifications on X. */
3175 code
= GET_CODE (x
);
3180 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3193 /* No use simplifying an EXPR_LIST
3194 since they are used only for lists of args
3195 in a function call's REG_EQUAL note. */
3201 return prev_insn_cc0
;
3207 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3208 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3209 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3213 #ifdef NO_FUNCTION_CSE
3215 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3220 /* Anything else goes through the loop below. */
3225 mode
= GET_MODE (x
);
3229 mode_arg0
= VOIDmode
;
3231 /* Try folding our operands.
3232 Then see which ones have constant values known. */
3234 fmt
= GET_RTX_FORMAT (code
);
3235 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3238 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3239 enum machine_mode mode_arg
= GET_MODE (folded_arg
);
3241 switch (GET_CODE (folded_arg
))
3246 const_arg
= equiv_constant (folded_arg
);
3256 const_arg
= folded_arg
;
3261 folded_arg
= prev_insn_cc0
;
3262 mode_arg
= prev_insn_cc0_mode
;
3263 const_arg
= equiv_constant (folded_arg
);
3268 folded_arg
= fold_rtx (folded_arg
, insn
);
3269 const_arg
= equiv_constant (folded_arg
);
3273 /* For the first three operands, see if the operand
3274 is constant or equivalent to a constant. */
3278 folded_arg0
= folded_arg
;
3279 const_arg0
= const_arg
;
3280 mode_arg0
= mode_arg
;
3283 folded_arg1
= folded_arg
;
3284 const_arg1
= const_arg
;
3287 const_arg2
= const_arg
;
3291 /* Pick the least expensive of the argument and an equivalent constant
3294 && const_arg
!= folded_arg
3295 && COST_IN (const_arg
, code
) <= COST_IN (folded_arg
, code
)
3297 /* It's not safe to substitute the operand of a conversion
3298 operator with a constant, as the conversion's identity
3299 depends upon the mode of its operand. This optimization
3300 is handled by the call to simplify_unary_operation. */
3301 && (GET_RTX_CLASS (code
) != RTX_UNARY
3302 || GET_MODE (const_arg
) == mode_arg0
3303 || (code
!= ZERO_EXTEND
3304 && code
!= SIGN_EXTEND
3306 && code
!= FLOAT_TRUNCATE
3307 && code
!= FLOAT_EXTEND
3310 && code
!= UNSIGNED_FLOAT
3311 && code
!= UNSIGNED_FIX
)))
3312 folded_arg
= const_arg
;
3314 if (folded_arg
== XEXP (x
, i
))
3317 if (insn
== NULL_RTX
&& !changed
)
3320 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3325 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3326 consistent with the order in X. */
3327 if (canonicalize_change_group (insn
, x
))
3330 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3331 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3334 apply_change_group ();
3337 /* If X is an arithmetic operation, see if we can simplify it. */
3339 switch (GET_RTX_CLASS (code
))
3343 /* We can't simplify extension ops unless we know the
3345 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3346 && mode_arg0
== VOIDmode
)
3349 new_rtx
= simplify_unary_operation (code
, mode
,
3350 const_arg0
? const_arg0
: folded_arg0
,
3356 case RTX_COMM_COMPARE
:
3357 /* See what items are actually being compared and set FOLDED_ARG[01]
3358 to those values and CODE to the actual comparison code. If any are
3359 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3360 do anything if both operands are already known to be constant. */
3362 /* ??? Vector mode comparisons are not supported yet. */
3363 if (VECTOR_MODE_P (mode
))
3366 if (const_arg0
== 0 || const_arg1
== 0)
3368 struct table_elt
*p0
, *p1
;
3369 rtx true_rtx
, false_rtx
;
3370 enum machine_mode mode_arg1
;
3372 if (SCALAR_FLOAT_MODE_P (mode
))
3374 #ifdef FLOAT_STORE_FLAG_VALUE
3375 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3376 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3378 true_rtx
= NULL_RTX
;
3380 false_rtx
= CONST0_RTX (mode
);
3384 true_rtx
= const_true_rtx
;
3385 false_rtx
= const0_rtx
;
3388 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3389 &mode_arg0
, &mode_arg1
);
3391 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3392 what kinds of things are being compared, so we can't do
3393 anything with this comparison. */
3395 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3398 const_arg0
= equiv_constant (folded_arg0
);
3399 const_arg1
= equiv_constant (folded_arg1
);
3401 /* If we do not now have two constants being compared, see
3402 if we can nevertheless deduce some things about the
3404 if (const_arg0
== 0 || const_arg1
== 0)
3406 if (const_arg1
!= NULL
)
3408 rtx cheapest_simplification
;
3411 struct table_elt
*p
;
3413 /* See if we can find an equivalent of folded_arg0
3414 that gets us a cheaper expression, possibly a
3415 constant through simplifications. */
3416 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3421 cheapest_simplification
= x
;
3422 cheapest_cost
= COST (x
);
3424 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3428 /* If the entry isn't valid, skip it. */
3429 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3432 /* Try to simplify using this equivalence. */
3434 = simplify_relational_operation (code
, mode
,
3439 if (simp_result
== NULL
)
3442 cost
= COST (simp_result
);
3443 if (cost
< cheapest_cost
)
3445 cheapest_cost
= cost
;
3446 cheapest_simplification
= simp_result
;
3450 /* If we have a cheaper expression now, use that
3451 and try folding it further, from the top. */
3452 if (cheapest_simplification
!= x
)
3453 return fold_rtx (copy_rtx (cheapest_simplification
),
3458 /* See if the two operands are the same. */
3460 if ((REG_P (folded_arg0
)
3461 && REG_P (folded_arg1
)
3462 && (REG_QTY (REGNO (folded_arg0
))
3463 == REG_QTY (REGNO (folded_arg1
))))
3464 || ((p0
= lookup (folded_arg0
,
3465 SAFE_HASH (folded_arg0
, mode_arg0
),
3467 && (p1
= lookup (folded_arg1
,
3468 SAFE_HASH (folded_arg1
, mode_arg0
),
3470 && p0
->first_same_value
== p1
->first_same_value
))
3471 folded_arg1
= folded_arg0
;
3473 /* If FOLDED_ARG0 is a register, see if the comparison we are
3474 doing now is either the same as we did before or the reverse
3475 (we only check the reverse if not floating-point). */
3476 else if (REG_P (folded_arg0
))
3478 int qty
= REG_QTY (REGNO (folded_arg0
));
3480 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3482 struct qty_table_elem
*ent
= &qty_table
[qty
];
3484 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3485 || (! FLOAT_MODE_P (mode_arg0
)
3486 && comparison_dominates_p (ent
->comparison_code
,
3487 reverse_condition (code
))))
3488 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3490 && rtx_equal_p (ent
->comparison_const
,
3492 || (REG_P (folded_arg1
)
3493 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3495 if (comparison_dominates_p (ent
->comparison_code
, code
))
3510 /* If we are comparing against zero, see if the first operand is
3511 equivalent to an IOR with a constant. If so, we may be able to
3512 determine the result of this comparison. */
3513 if (const_arg1
== const0_rtx
&& !const_arg0
)
3515 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3519 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3520 && CONST_INT_P (inner_const
)
3521 && INTVAL (inner_const
) != 0)
3522 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3526 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
3527 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
3528 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
3533 case RTX_COMM_ARITH
:
3537 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3538 with that LABEL_REF as its second operand. If so, the result is
3539 the first operand of that MINUS. This handles switches with an
3540 ADDR_DIFF_VEC table. */
3541 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3544 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3545 : lookup_as_function (folded_arg0
, MINUS
);
3547 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3548 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
3551 /* Now try for a CONST of a MINUS like the above. */
3552 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3553 : lookup_as_function (folded_arg0
, CONST
))) != 0
3554 && GET_CODE (XEXP (y
, 0)) == MINUS
3555 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3556 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
3557 return XEXP (XEXP (y
, 0), 0);
3560 /* Likewise if the operands are in the other order. */
3561 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3564 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3565 : lookup_as_function (folded_arg1
, MINUS
);
3567 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3568 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
3571 /* Now try for a CONST of a MINUS like the above. */
3572 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3573 : lookup_as_function (folded_arg1
, CONST
))) != 0
3574 && GET_CODE (XEXP (y
, 0)) == MINUS
3575 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3576 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
3577 return XEXP (XEXP (y
, 0), 0);
3580 /* If second operand is a register equivalent to a negative
3581 CONST_INT, see if we can find a register equivalent to the
3582 positive constant. Make a MINUS if so. Don't do this for
3583 a non-negative constant since we might then alternate between
3584 choosing positive and negative constants. Having the positive
3585 constant previously-used is the more common case. Be sure
3586 the resulting constant is non-negative; if const_arg1 were
3587 the smallest negative number this would overflow: depending
3588 on the mode, this would either just be the same value (and
3589 hence not save anything) or be incorrect. */
3590 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3591 && INTVAL (const_arg1
) < 0
3592 /* This used to test
3594 -INTVAL (const_arg1) >= 0
3596 But The Sun V5.0 compilers mis-compiled that test. So
3597 instead we test for the problematic value in a more direct
3598 manner and hope the Sun compilers get it correct. */
3599 && INTVAL (const_arg1
) !=
3600 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
3601 && REG_P (folded_arg1
))
3603 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3605 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3608 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3610 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3611 canon_reg (p
->exp
, NULL_RTX
));
3616 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3617 If so, produce (PLUS Z C2-C). */
3618 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
))
3620 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3621 if (y
&& CONST_INT_P (XEXP (y
, 1)))
3622 return fold_rtx (plus_constant (copy_rtx (y
),
3623 -INTVAL (const_arg1
)),
3630 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3631 case IOR
: case AND
: case XOR
:
3633 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3634 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3635 is known to be of similar form, we may be able to replace the
3636 operation with a combined operation. This may eliminate the
3637 intermediate operation if every use is simplified in this way.
3638 Note that the similar optimization done by combine.c only works
3639 if the intermediate operation's result has only one reference. */
3641 if (REG_P (folded_arg0
)
3642 && const_arg1
&& CONST_INT_P (const_arg1
))
3645 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3646 rtx y
, inner_const
, new_const
;
3647 rtx canon_const_arg1
= const_arg1
;
3648 enum rtx_code associate_code
;
3651 && (INTVAL (const_arg1
) >= GET_MODE_BITSIZE (mode
)
3652 || INTVAL (const_arg1
) < 0))
3654 if (SHIFT_COUNT_TRUNCATED
)
3655 canon_const_arg1
= GEN_INT (INTVAL (const_arg1
)
3656 & (GET_MODE_BITSIZE (mode
)
3662 y
= lookup_as_function (folded_arg0
, code
);
3666 /* If we have compiled a statement like
3667 "if (x == (x & mask1))", and now are looking at
3668 "x & mask2", we will have a case where the first operand
3669 of Y is the same as our first operand. Unless we detect
3670 this case, an infinite loop will result. */
3671 if (XEXP (y
, 0) == folded_arg0
)
3674 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3675 if (!inner_const
|| !CONST_INT_P (inner_const
))
3678 /* Don't associate these operations if they are a PLUS with the
3679 same constant and it is a power of two. These might be doable
3680 with a pre- or post-increment. Similarly for two subtracts of
3681 identical powers of two with post decrement. */
3683 if (code
== PLUS
&& const_arg1
== inner_const
3684 && ((HAVE_PRE_INCREMENT
3685 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3686 || (HAVE_POST_INCREMENT
3687 && exact_log2 (INTVAL (const_arg1
)) >= 0)
3688 || (HAVE_PRE_DECREMENT
3689 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
3690 || (HAVE_POST_DECREMENT
3691 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
3694 /* ??? Vector mode shifts by scalar
3695 shift operand are not supported yet. */
3696 if (is_shift
&& VECTOR_MODE_P (mode
))
3700 && (INTVAL (inner_const
) >= GET_MODE_BITSIZE (mode
)
3701 || INTVAL (inner_const
) < 0))
3703 if (SHIFT_COUNT_TRUNCATED
)
3704 inner_const
= GEN_INT (INTVAL (inner_const
)
3705 & (GET_MODE_BITSIZE (mode
) - 1));
3710 /* Compute the code used to compose the constants. For example,
3711 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3713 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3715 new_const
= simplify_binary_operation (associate_code
, mode
,
3722 /* If we are associating shift operations, don't let this
3723 produce a shift of the size of the object or larger.
3724 This could occur when we follow a sign-extend by a right
3725 shift on a machine that does a sign-extend as a pair
3729 && CONST_INT_P (new_const
)
3730 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
3732 /* As an exception, we can turn an ASHIFTRT of this
3733 form into a shift of the number of bits - 1. */
3734 if (code
== ASHIFTRT
)
3735 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
3736 else if (!side_effects_p (XEXP (y
, 0)))
3737 return CONST0_RTX (mode
);
3742 y
= copy_rtx (XEXP (y
, 0));
3744 /* If Y contains our first operand (the most common way this
3745 can happen is if Y is a MEM), we would do into an infinite
3746 loop if we tried to fold it. So don't in that case. */
3748 if (! reg_mentioned_p (folded_arg0
, y
))
3749 y
= fold_rtx (y
, insn
);
3751 return simplify_gen_binary (code
, mode
, y
, new_const
);
3755 case DIV
: case UDIV
:
3756 /* ??? The associative optimization performed immediately above is
3757 also possible for DIV and UDIV using associate_code of MULT.
3758 However, we would need extra code to verify that the
3759 multiplication does not overflow, that is, there is no overflow
3760 in the calculation of new_const. */
3767 new_rtx
= simplify_binary_operation (code
, mode
,
3768 const_arg0
? const_arg0
: folded_arg0
,
3769 const_arg1
? const_arg1
: folded_arg1
);
3773 /* (lo_sum (high X) X) is simply X. */
3774 if (code
== LO_SUM
&& const_arg0
!= 0
3775 && GET_CODE (const_arg0
) == HIGH
3776 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3781 case RTX_BITFIELD_OPS
:
3782 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3783 const_arg0
? const_arg0
: folded_arg0
,
3784 const_arg1
? const_arg1
: folded_arg1
,
3785 const_arg2
? const_arg2
: XEXP (x
, 2));
3792 return new_rtx
? new_rtx
: x
;
3795 /* Return a constant value currently equivalent to X.
3796 Return 0 if we don't know one. */
3799 equiv_constant (rtx x
)
3802 && REGNO_QTY_VALID_P (REGNO (x
)))
3804 int x_q
= REG_QTY (REGNO (x
));
3805 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3807 if (x_ent
->const_rtx
)
3808 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3811 if (x
== 0 || CONSTANT_P (x
))
3814 if (GET_CODE (x
) == SUBREG
)
3816 enum machine_mode mode
= GET_MODE (x
);
3817 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3820 /* See if we previously assigned a constant value to this SUBREG. */
3821 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3822 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3823 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3826 /* If we didn't and if doing so makes sense, see if we previously
3827 assigned a constant value to the enclosing word mode SUBREG. */
3828 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
)
3829 && GET_MODE_SIZE (word_mode
) < GET_MODE_SIZE (imode
))
3831 int byte
= SUBREG_BYTE (x
) - subreg_lowpart_offset (mode
, word_mode
);
3832 if (byte
>= 0 && (byte
% UNITS_PER_WORD
) == 0)
3834 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3835 new_rtx
= lookup_as_function (y
, CONST_INT
);
3837 return gen_lowpart (mode
, new_rtx
);
3841 /* Otherwise see if we already have a constant for the inner REG. */
3842 if (REG_P (SUBREG_REG (x
))
3843 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3844 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3849 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3850 the hash table in case its value was seen before. */
3854 struct table_elt
*elt
;
3856 x
= avoid_constant_pool_reference (x
);
3860 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3864 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3865 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3872 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3875 In certain cases, this can cause us to add an equivalence. For example,
3876 if we are following the taken case of
3878 we can add the fact that `i' and '2' are now equivalent.
3880 In any case, we can record that this comparison was passed. If the same
3881 comparison is seen later, we will know its value. */
3884 record_jump_equiv (rtx insn
, bool taken
)
3886 int cond_known_true
;
3889 enum machine_mode mode
, mode0
, mode1
;
3890 int reversed_nonequality
= 0;
3893 /* Ensure this is the right kind of insn. */
3894 gcc_assert (any_condjump_p (insn
));
3896 set
= pc_set (insn
);
3898 /* See if this jump condition is known true or false. */
3900 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3902 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3904 /* Get the type of comparison being done and the operands being compared.
3905 If we had to reverse a non-equality condition, record that fact so we
3906 know that it isn't valid for floating-point. */
3907 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3908 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3909 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3911 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3912 if (! cond_known_true
)
3914 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3916 /* Don't remember if we can't find the inverse. */
3917 if (code
== UNKNOWN
)
3921 /* The mode is the mode of the non-constant. */
3923 if (mode1
!= VOIDmode
)
3926 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3929 /* Yet another form of subreg creation. In this case, we want something in
3930 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3933 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
3935 enum machine_mode op_mode
= GET_MODE (op
);
3936 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3938 return lowpart_subreg (mode
, op
, op_mode
);
3941 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3942 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3943 Make any useful entries we can with that information. Called from
3944 above function and called recursively. */
3947 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
3948 rtx op1
, int reversed_nonequality
)
3950 unsigned op0_hash
, op1_hash
;
3951 int op0_in_memory
, op1_in_memory
;
3952 struct table_elt
*op0_elt
, *op1_elt
;
3954 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3955 we know that they are also equal in the smaller mode (this is also
3956 true for all smaller modes whether or not there is a SUBREG, but
3957 is not worth testing for with no SUBREG). */
3959 /* Note that GET_MODE (op0) may not equal MODE. */
3960 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
3961 && (GET_MODE_SIZE (GET_MODE (op0
))
3962 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3964 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3965 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3967 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3968 reversed_nonequality
);
3971 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
3972 && (GET_MODE_SIZE (GET_MODE (op1
))
3973 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
3975 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3976 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3978 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3979 reversed_nonequality
);
3982 /* Similarly, if this is an NE comparison, and either is a SUBREG
3983 making a smaller mode, we know the whole thing is also NE. */
3985 /* Note that GET_MODE (op0) may not equal MODE;
3986 if we test MODE instead, we can get an infinite recursion
3987 alternating between two modes each wider than MODE. */
3989 if (code
== NE
&& GET_CODE (op0
) == SUBREG
3990 && subreg_lowpart_p (op0
)
3991 && (GET_MODE_SIZE (GET_MODE (op0
))
3992 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
3994 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3995 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3997 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3998 reversed_nonequality
);
4001 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4002 && subreg_lowpart_p (op1
)
4003 && (GET_MODE_SIZE (GET_MODE (op1
))
4004 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4006 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4007 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4009 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4010 reversed_nonequality
);
4013 /* Hash both operands. */
4016 hash_arg_in_memory
= 0;
4017 op0_hash
= HASH (op0
, mode
);
4018 op0_in_memory
= hash_arg_in_memory
;
4024 hash_arg_in_memory
= 0;
4025 op1_hash
= HASH (op1
, mode
);
4026 op1_in_memory
= hash_arg_in_memory
;
4031 /* Look up both operands. */
4032 op0_elt
= lookup (op0
, op0_hash
, mode
);
4033 op1_elt
= lookup (op1
, op1_hash
, mode
);
4035 /* If both operands are already equivalent or if they are not in the
4036 table but are identical, do nothing. */
4037 if ((op0_elt
!= 0 && op1_elt
!= 0
4038 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4039 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4042 /* If we aren't setting two things equal all we can do is save this
4043 comparison. Similarly if this is floating-point. In the latter
4044 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4045 If we record the equality, we might inadvertently delete code
4046 whose intent was to change -0 to +0. */
4048 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4050 struct qty_table_elem
*ent
;
4053 /* If we reversed a floating-point comparison, if OP0 is not a
4054 register, or if OP1 is neither a register or constant, we can't
4058 op1
= equiv_constant (op1
);
4060 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4061 || !REG_P (op0
) || op1
== 0)
4064 /* Put OP0 in the hash table if it isn't already. This gives it a
4065 new quantity number. */
4068 if (insert_regs (op0
, NULL
, 0))
4070 rehash_using_reg (op0
);
4071 op0_hash
= HASH (op0
, mode
);
4073 /* If OP0 is contained in OP1, this changes its hash code
4074 as well. Faster to rehash than to check, except
4075 for the simple case of a constant. */
4076 if (! CONSTANT_P (op1
))
4077 op1_hash
= HASH (op1
,mode
);
4080 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4081 op0_elt
->in_memory
= op0_in_memory
;
4084 qty
= REG_QTY (REGNO (op0
));
4085 ent
= &qty_table
[qty
];
4087 ent
->comparison_code
= code
;
4090 /* Look it up again--in case op0 and op1 are the same. */
4091 op1_elt
= lookup (op1
, op1_hash
, mode
);
4093 /* Put OP1 in the hash table so it gets a new quantity number. */
4096 if (insert_regs (op1
, NULL
, 0))
4098 rehash_using_reg (op1
);
4099 op1_hash
= HASH (op1
, mode
);
4102 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4103 op1_elt
->in_memory
= op1_in_memory
;
4106 ent
->comparison_const
= NULL_RTX
;
4107 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4111 ent
->comparison_const
= op1
;
4112 ent
->comparison_qty
= -1;
4118 /* If either side is still missing an equivalence, make it now,
4119 then merge the equivalences. */
4123 if (insert_regs (op0
, NULL
, 0))
4125 rehash_using_reg (op0
);
4126 op0_hash
= HASH (op0
, mode
);
4129 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4130 op0_elt
->in_memory
= op0_in_memory
;
4135 if (insert_regs (op1
, NULL
, 0))
4137 rehash_using_reg (op1
);
4138 op1_hash
= HASH (op1
, mode
);
4141 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4142 op1_elt
->in_memory
= op1_in_memory
;
4145 merge_equiv_classes (op0_elt
, op1_elt
);
4148 /* CSE processing for one instruction.
4149 First simplify sources and addresses of all assignments
4150 in the instruction, using previously-computed equivalents values.
4151 Then install the new sources and destinations in the table
4152 of available values. */
4154 /* Data on one SET contained in the instruction. */
4158 /* The SET rtx itself. */
4160 /* The SET_SRC of the rtx (the original value, if it is changing). */
4162 /* The hash-table element for the SET_SRC of the SET. */
4163 struct table_elt
*src_elt
;
4164 /* Hash value for the SET_SRC. */
4166 /* Hash value for the SET_DEST. */
4168 /* The SET_DEST, with SUBREG, etc., stripped. */
4170 /* Nonzero if the SET_SRC is in memory. */
4172 /* Nonzero if the SET_SRC contains something
4173 whose value cannot be predicted and understood. */
4175 /* Original machine mode, in case it becomes a CONST_INT.
4176 The size of this field should match the size of the mode
4177 field of struct rtx_def (see rtl.h). */
4178 ENUM_BITFIELD(machine_mode
) mode
: 8;
4179 /* A constant equivalent for SET_SRC, if any. */
4181 /* Hash value of constant equivalent for SET_SRC. */
4182 unsigned src_const_hash
;
4183 /* Table entry for constant equivalent for SET_SRC, if any. */
4184 struct table_elt
*src_const_elt
;
4185 /* Table entry for the destination address. */
4186 struct table_elt
*dest_addr_elt
;
4192 rtx x
= PATTERN (insn
);
4198 struct table_elt
*src_eqv_elt
= 0;
4199 int src_eqv_volatile
= 0;
4200 int src_eqv_in_memory
= 0;
4201 unsigned src_eqv_hash
= 0;
4203 struct set
*sets
= (struct set
*) 0;
4207 /* Records what this insn does to set CC0. */
4209 this_insn_cc0_mode
= VOIDmode
;
4212 /* Find all the SETs and CLOBBERs in this instruction.
4213 Record all the SETs in the array `set' and count them.
4214 Also determine whether there is a CLOBBER that invalidates
4215 all memory references, or all references at varying addresses. */
4219 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4221 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4222 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4223 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4227 if (GET_CODE (x
) == SET
)
4229 sets
= XALLOCA (struct set
);
4232 /* Ignore SETs that are unconditional jumps.
4233 They never need cse processing, so this does not hurt.
4234 The reason is not efficiency but rather
4235 so that we can test at the end for instructions
4236 that have been simplified to unconditional jumps
4237 and not be misled by unchanged instructions
4238 that were unconditional jumps to begin with. */
4239 if (SET_DEST (x
) == pc_rtx
4240 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4243 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4244 The hard function value register is used only once, to copy to
4245 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4246 Ensure we invalidate the destination register. On the 80386 no
4247 other code would invalidate it since it is a fixed_reg.
4248 We need not check the return of apply_change_group; see canon_reg. */
4250 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4252 canon_reg (SET_SRC (x
), insn
);
4253 apply_change_group ();
4254 fold_rtx (SET_SRC (x
), insn
);
4255 invalidate (SET_DEST (x
), VOIDmode
);
4260 else if (GET_CODE (x
) == PARALLEL
)
4262 int lim
= XVECLEN (x
, 0);
4264 sets
= XALLOCAVEC (struct set
, lim
);
4266 /* Find all regs explicitly clobbered in this insn,
4267 and ensure they are not replaced with any other regs
4268 elsewhere in this insn.
4269 When a reg that is clobbered is also used for input,
4270 we should presume that that is for a reason,
4271 and we should not substitute some other register
4272 which is not supposed to be clobbered.
4273 Therefore, this loop cannot be merged into the one below
4274 because a CALL may precede a CLOBBER and refer to the
4275 value clobbered. We must not let a canonicalization do
4276 anything in that case. */
4277 for (i
= 0; i
< lim
; i
++)
4279 rtx y
= XVECEXP (x
, 0, i
);
4280 if (GET_CODE (y
) == CLOBBER
)
4282 rtx clobbered
= XEXP (y
, 0);
4284 if (REG_P (clobbered
)
4285 || GET_CODE (clobbered
) == SUBREG
)
4286 invalidate (clobbered
, VOIDmode
);
4287 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4288 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4289 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4293 for (i
= 0; i
< lim
; i
++)
4295 rtx y
= XVECEXP (x
, 0, i
);
4296 if (GET_CODE (y
) == SET
)
4298 /* As above, we ignore unconditional jumps and call-insns and
4299 ignore the result of apply_change_group. */
4300 if (GET_CODE (SET_SRC (y
)) == CALL
)
4302 canon_reg (SET_SRC (y
), insn
);
4303 apply_change_group ();
4304 fold_rtx (SET_SRC (y
), insn
);
4305 invalidate (SET_DEST (y
), VOIDmode
);
4307 else if (SET_DEST (y
) == pc_rtx
4308 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4311 sets
[n_sets
++].rtl
= y
;
4313 else if (GET_CODE (y
) == CLOBBER
)
4315 /* If we clobber memory, canon the address.
4316 This does nothing when a register is clobbered
4317 because we have already invalidated the reg. */
4318 if (MEM_P (XEXP (y
, 0)))
4319 canon_reg (XEXP (y
, 0), insn
);
4321 else if (GET_CODE (y
) == USE
4322 && ! (REG_P (XEXP (y
, 0))
4323 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4324 canon_reg (y
, insn
);
4325 else if (GET_CODE (y
) == CALL
)
4327 /* The result of apply_change_group can be ignored; see
4329 canon_reg (y
, insn
);
4330 apply_change_group ();
4335 else if (GET_CODE (x
) == CLOBBER
)
4337 if (MEM_P (XEXP (x
, 0)))
4338 canon_reg (XEXP (x
, 0), insn
);
4341 /* Canonicalize a USE of a pseudo register or memory location. */
4342 else if (GET_CODE (x
) == USE
4343 && ! (REG_P (XEXP (x
, 0))
4344 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4345 canon_reg (XEXP (x
, 0), insn
);
4346 else if (GET_CODE (x
) == CALL
)
4348 /* The result of apply_change_group can be ignored; see canon_reg. */
4349 canon_reg (x
, insn
);
4350 apply_change_group ();
4353 else if (DEBUG_INSN_P (insn
))
4354 canon_reg (PATTERN (insn
), insn
);
4356 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4357 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4358 is handled specially for this case, and if it isn't set, then there will
4359 be no equivalence for the destination. */
4360 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4361 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4362 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4363 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4365 /* The result of apply_change_group can be ignored; see canon_reg. */
4366 canon_reg (XEXP (tem
, 0), insn
);
4367 apply_change_group ();
4368 src_eqv
= fold_rtx (XEXP (tem
, 0), insn
);
4369 XEXP (tem
, 0) = copy_rtx (src_eqv
);
4370 df_notes_rescan (insn
);
4373 /* Canonicalize sources and addresses of destinations.
4374 We do this in a separate pass to avoid problems when a MATCH_DUP is
4375 present in the insn pattern. In that case, we want to ensure that
4376 we don't break the duplicate nature of the pattern. So we will replace
4377 both operands at the same time. Otherwise, we would fail to find an
4378 equivalent substitution in the loop calling validate_change below.
4380 We used to suppress canonicalization of DEST if it appears in SRC,
4381 but we don't do this any more. */
4383 for (i
= 0; i
< n_sets
; i
++)
4385 rtx dest
= SET_DEST (sets
[i
].rtl
);
4386 rtx src
= SET_SRC (sets
[i
].rtl
);
4387 rtx new_rtx
= canon_reg (src
, insn
);
4389 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4391 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4393 validate_change (insn
, &XEXP (dest
, 1),
4394 canon_reg (XEXP (dest
, 1), insn
), 1);
4395 validate_change (insn
, &XEXP (dest
, 2),
4396 canon_reg (XEXP (dest
, 2), insn
), 1);
4399 while (GET_CODE (dest
) == SUBREG
4400 || GET_CODE (dest
) == ZERO_EXTRACT
4401 || GET_CODE (dest
) == STRICT_LOW_PART
)
4402 dest
= XEXP (dest
, 0);
4405 canon_reg (dest
, insn
);
4408 /* Now that we have done all the replacements, we can apply the change
4409 group and see if they all work. Note that this will cause some
4410 canonicalizations that would have worked individually not to be applied
4411 because some other canonicalization didn't work, but this should not
4414 The result of apply_change_group can be ignored; see canon_reg. */
4416 apply_change_group ();
4418 /* Set sets[i].src_elt to the class each source belongs to.
4419 Detect assignments from or to volatile things
4420 and set set[i] to zero so they will be ignored
4421 in the rest of this function.
4423 Nothing in this loop changes the hash table or the register chains. */
4425 for (i
= 0; i
< n_sets
; i
++)
4427 bool repeat
= false;
4430 struct table_elt
*elt
= 0, *p
;
4431 enum machine_mode mode
;
4434 rtx src_related
= 0;
4435 bool src_related_is_const_anchor
= false;
4436 struct table_elt
*src_const_elt
= 0;
4437 int src_cost
= MAX_COST
;
4438 int src_eqv_cost
= MAX_COST
;
4439 int src_folded_cost
= MAX_COST
;
4440 int src_related_cost
= MAX_COST
;
4441 int src_elt_cost
= MAX_COST
;
4442 int src_regcost
= MAX_COST
;
4443 int src_eqv_regcost
= MAX_COST
;
4444 int src_folded_regcost
= MAX_COST
;
4445 int src_related_regcost
= MAX_COST
;
4446 int src_elt_regcost
= MAX_COST
;
4447 /* Set nonzero if we need to call force_const_mem on with the
4448 contents of src_folded before using it. */
4449 int src_folded_force_flag
= 0;
4451 dest
= SET_DEST (sets
[i
].rtl
);
4452 src
= SET_SRC (sets
[i
].rtl
);
4454 /* If SRC is a constant that has no machine mode,
4455 hash it with the destination's machine mode.
4456 This way we can keep different modes separate. */
4458 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4459 sets
[i
].mode
= mode
;
4463 enum machine_mode eqvmode
= mode
;
4464 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4465 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4467 hash_arg_in_memory
= 0;
4468 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4470 /* Find the equivalence class for the equivalent expression. */
4473 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4475 src_eqv_volatile
= do_not_record
;
4476 src_eqv_in_memory
= hash_arg_in_memory
;
4479 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4480 value of the INNER register, not the destination. So it is not
4481 a valid substitution for the source. But save it for later. */
4482 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4485 src_eqv_here
= src_eqv
;
4487 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4488 simplified result, which may not necessarily be valid. */
4489 src_folded
= fold_rtx (src
, insn
);
4492 /* ??? This caused bad code to be generated for the m68k port with -O2.
4493 Suppose src is (CONST_INT -1), and that after truncation src_folded
4494 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4495 At the end we will add src and src_const to the same equivalence
4496 class. We now have 3 and -1 on the same equivalence class. This
4497 causes later instructions to be mis-optimized. */
4498 /* If storing a constant in a bitfield, pre-truncate the constant
4499 so we will be able to record it later. */
4500 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4502 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4504 if (CONST_INT_P (src
)
4505 && CONST_INT_P (width
)
4506 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4507 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4509 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
4510 << INTVAL (width
)) - 1));
4514 /* Compute SRC's hash code, and also notice if it
4515 should not be recorded at all. In that case,
4516 prevent any further processing of this assignment. */
4518 hash_arg_in_memory
= 0;
4521 sets
[i
].src_hash
= HASH (src
, mode
);
4522 sets
[i
].src_volatile
= do_not_record
;
4523 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4525 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4526 a pseudo, do not record SRC. Using SRC as a replacement for
4527 anything else will be incorrect in that situation. Note that
4528 this usually occurs only for stack slots, in which case all the
4529 RTL would be referring to SRC, so we don't lose any optimization
4530 opportunities by not having SRC in the hash table. */
4533 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4535 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4536 sets
[i
].src_volatile
= 1;
4539 /* It is no longer clear why we used to do this, but it doesn't
4540 appear to still be needed. So let's try without it since this
4541 code hurts cse'ing widened ops. */
4542 /* If source is a paradoxical subreg (such as QI treated as an SI),
4543 treat it as volatile. It may do the work of an SI in one context
4544 where the extra bits are not being used, but cannot replace an SI
4546 if (GET_CODE (src
) == SUBREG
4547 && (GET_MODE_SIZE (GET_MODE (src
))
4548 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
4549 sets
[i
].src_volatile
= 1;
4552 /* Locate all possible equivalent forms for SRC. Try to replace
4553 SRC in the insn with each cheaper equivalent.
4555 We have the following types of equivalents: SRC itself, a folded
4556 version, a value given in a REG_EQUAL note, or a value related
4559 Each of these equivalents may be part of an additional class
4560 of equivalents (if more than one is in the table, they must be in
4561 the same class; we check for this).
4563 If the source is volatile, we don't do any table lookups.
4565 We note any constant equivalent for possible later use in a
4568 if (!sets
[i
].src_volatile
)
4569 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4571 sets
[i
].src_elt
= elt
;
4573 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4575 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4577 /* The REG_EQUAL is indicating that two formerly distinct
4578 classes are now equivalent. So merge them. */
4579 merge_equiv_classes (elt
, src_eqv_elt
);
4580 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4581 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4587 else if (src_eqv_elt
)
4590 /* Try to find a constant somewhere and record it in `src_const'.
4591 Record its table element, if any, in `src_const_elt'. Look in
4592 any known equivalences first. (If the constant is not in the
4593 table, also set `sets[i].src_const_hash'). */
4595 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4599 src_const_elt
= elt
;
4604 && (CONSTANT_P (src_folded
)
4605 /* Consider (minus (label_ref L1) (label_ref L2)) as
4606 "constant" here so we will record it. This allows us
4607 to fold switch statements when an ADDR_DIFF_VEC is used. */
4608 || (GET_CODE (src_folded
) == MINUS
4609 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4610 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4611 src_const
= src_folded
, src_const_elt
= elt
;
4612 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4613 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4615 /* If we don't know if the constant is in the table, get its
4616 hash code and look it up. */
4617 if (src_const
&& src_const_elt
== 0)
4619 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4620 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4623 sets
[i
].src_const
= src_const
;
4624 sets
[i
].src_const_elt
= src_const_elt
;
4626 /* If the constant and our source are both in the table, mark them as
4627 equivalent. Otherwise, if a constant is in the table but the source
4628 isn't, set ELT to it. */
4629 if (src_const_elt
&& elt
4630 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4631 merge_equiv_classes (elt
, src_const_elt
);
4632 else if (src_const_elt
&& elt
== 0)
4633 elt
= src_const_elt
;
4635 /* See if there is a register linearly related to a constant
4636 equivalent of SRC. */
4638 && (GET_CODE (src_const
) == CONST
4639 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4641 src_related
= use_related_value (src_const
, src_const_elt
);
4644 struct table_elt
*src_related_elt
4645 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4646 if (src_related_elt
&& elt
)
4648 if (elt
->first_same_value
4649 != src_related_elt
->first_same_value
)
4650 /* This can occur when we previously saw a CONST
4651 involving a SYMBOL_REF and then see the SYMBOL_REF
4652 twice. Merge the involved classes. */
4653 merge_equiv_classes (elt
, src_related_elt
);
4656 src_related_elt
= 0;
4658 else if (src_related_elt
&& elt
== 0)
4659 elt
= src_related_elt
;
4663 /* See if we have a CONST_INT that is already in a register in a
4666 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4667 && GET_MODE_CLASS (mode
) == MODE_INT
4668 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
4670 enum machine_mode wider_mode
;
4672 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
4673 wider_mode
!= VOIDmode
4674 && GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
4675 && src_related
== 0;
4676 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4678 struct table_elt
*const_elt
4679 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4684 for (const_elt
= const_elt
->first_same_value
;
4685 const_elt
; const_elt
= const_elt
->next_same_value
)
4686 if (REG_P (const_elt
->exp
))
4688 src_related
= gen_lowpart (mode
, const_elt
->exp
);
4694 /* Another possibility is that we have an AND with a constant in
4695 a mode narrower than a word. If so, it might have been generated
4696 as part of an "if" which would narrow the AND. If we already
4697 have done the AND in a wider mode, we can use a SUBREG of that
4700 if (flag_expensive_optimizations
&& ! src_related
4701 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4702 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4704 enum machine_mode tmode
;
4705 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4707 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4708 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4709 tmode
= GET_MODE_WIDER_MODE (tmode
))
4711 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4712 struct table_elt
*larger_elt
;
4716 PUT_MODE (new_and
, tmode
);
4717 XEXP (new_and
, 0) = inner
;
4718 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4719 if (larger_elt
== 0)
4722 for (larger_elt
= larger_elt
->first_same_value
;
4723 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4724 if (REG_P (larger_elt
->exp
))
4727 = gen_lowpart (mode
, larger_elt
->exp
);
4737 #ifdef LOAD_EXTEND_OP
4738 /* See if a MEM has already been loaded with a widening operation;
4739 if it has, we can use a subreg of that. Many CISC machines
4740 also have such operations, but this is only likely to be
4741 beneficial on these machines. */
4743 if (flag_expensive_optimizations
&& src_related
== 0
4744 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
4745 && GET_MODE_CLASS (mode
) == MODE_INT
4746 && MEM_P (src
) && ! do_not_record
4747 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
4749 struct rtx_def memory_extend_buf
;
4750 rtx memory_extend_rtx
= &memory_extend_buf
;
4751 enum machine_mode tmode
;
4753 /* Set what we are trying to extend and the operation it might
4754 have been extended with. */
4755 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
4756 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
4757 XEXP (memory_extend_rtx
, 0) = src
;
4759 for (tmode
= GET_MODE_WIDER_MODE (mode
);
4760 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
4761 tmode
= GET_MODE_WIDER_MODE (tmode
))
4763 struct table_elt
*larger_elt
;
4765 PUT_MODE (memory_extend_rtx
, tmode
);
4766 larger_elt
= lookup (memory_extend_rtx
,
4767 HASH (memory_extend_rtx
, tmode
), tmode
);
4768 if (larger_elt
== 0)
4771 for (larger_elt
= larger_elt
->first_same_value
;
4772 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4773 if (REG_P (larger_elt
->exp
))
4775 src_related
= gen_lowpart (mode
, larger_elt
->exp
);
4783 #endif /* LOAD_EXTEND_OP */
4785 /* Try to express the constant using a register+offset expression
4786 derived from a constant anchor. */
4788 if (targetm
.const_anchor
4791 && GET_CODE (src_const
) == CONST_INT
)
4793 src_related
= try_const_anchors (src_const
, mode
);
4794 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
4798 if (src
== src_folded
)
4801 /* At this point, ELT, if nonzero, points to a class of expressions
4802 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4803 and SRC_RELATED, if nonzero, each contain additional equivalent
4804 expressions. Prune these latter expressions by deleting expressions
4805 already in the equivalence class.
4807 Check for an equivalent identical to the destination. If found,
4808 this is the preferred equivalent since it will likely lead to
4809 elimination of the insn. Indicate this by placing it in
4813 elt
= elt
->first_same_value
;
4814 for (p
= elt
; p
; p
= p
->next_same_value
)
4816 enum rtx_code code
= GET_CODE (p
->exp
);
4818 /* If the expression is not valid, ignore it. Then we do not
4819 have to check for validity below. In most cases, we can use
4820 `rtx_equal_p', since canonicalization has already been done. */
4821 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
4824 /* Also skip paradoxical subregs, unless that's what we're
4827 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
4828 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
4830 && GET_CODE (src
) == SUBREG
4831 && GET_MODE (src
) == GET_MODE (p
->exp
)
4832 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4833 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
4836 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
4838 else if (src_folded
&& GET_CODE (src_folded
) == code
4839 && rtx_equal_p (src_folded
, p
->exp
))
4841 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
4842 && rtx_equal_p (src_eqv_here
, p
->exp
))
4844 else if (src_related
&& GET_CODE (src_related
) == code
4845 && rtx_equal_p (src_related
, p
->exp
))
4848 /* This is the same as the destination of the insns, we want
4849 to prefer it. Copy it to src_related. The code below will
4850 then give it a negative cost. */
4851 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
4855 /* Find the cheapest valid equivalent, trying all the available
4856 possibilities. Prefer items not in the hash table to ones
4857 that are when they are equal cost. Note that we can never
4858 worsen an insn as the current contents will also succeed.
4859 If we find an equivalent identical to the destination, use it as best,
4860 since this insn will probably be eliminated in that case. */
4863 if (rtx_equal_p (src
, dest
))
4864 src_cost
= src_regcost
= -1;
4867 src_cost
= COST (src
);
4868 src_regcost
= approx_reg_cost (src
);
4874 if (rtx_equal_p (src_eqv_here
, dest
))
4875 src_eqv_cost
= src_eqv_regcost
= -1;
4878 src_eqv_cost
= COST (src_eqv_here
);
4879 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
4885 if (rtx_equal_p (src_folded
, dest
))
4886 src_folded_cost
= src_folded_regcost
= -1;
4889 src_folded_cost
= COST (src_folded
);
4890 src_folded_regcost
= approx_reg_cost (src_folded
);
4896 if (rtx_equal_p (src_related
, dest
))
4897 src_related_cost
= src_related_regcost
= -1;
4900 src_related_cost
= COST (src_related
);
4901 src_related_regcost
= approx_reg_cost (src_related
);
4903 /* If a const-anchor is used to synthesize a constant that
4904 normally requires multiple instructions then slightly prefer
4905 it over the original sequence. These instructions are likely
4906 to become redundant now. We can't compare against the cost
4907 of src_eqv_here because, on MIPS for example, multi-insn
4908 constants have zero cost; they are assumed to be hoisted from
4910 if (src_related_is_const_anchor
4911 && src_related_cost
== src_cost
4917 /* If this was an indirect jump insn, a known label will really be
4918 cheaper even though it looks more expensive. */
4919 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
4920 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
4922 /* Terminate loop when replacement made. This must terminate since
4923 the current contents will be tested and will always be valid. */
4928 /* Skip invalid entries. */
4929 while (elt
&& !REG_P (elt
->exp
)
4930 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
4931 elt
= elt
->next_same_value
;
4933 /* A paradoxical subreg would be bad here: it'll be the right
4934 size, but later may be adjusted so that the upper bits aren't
4935 what we want. So reject it. */
4937 && GET_CODE (elt
->exp
) == SUBREG
4938 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
4939 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
4940 /* It is okay, though, if the rtx we're trying to match
4941 will ignore any of the bits we can't predict. */
4943 && GET_CODE (src
) == SUBREG
4944 && GET_MODE (src
) == GET_MODE (elt
->exp
)
4945 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
4946 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
4948 elt
= elt
->next_same_value
;
4954 src_elt_cost
= elt
->cost
;
4955 src_elt_regcost
= elt
->regcost
;
4958 /* Find cheapest and skip it for the next time. For items
4959 of equal cost, use this order:
4960 src_folded, src, src_eqv, src_related and hash table entry. */
4962 && preferable (src_folded_cost
, src_folded_regcost
,
4963 src_cost
, src_regcost
) <= 0
4964 && preferable (src_folded_cost
, src_folded_regcost
,
4965 src_eqv_cost
, src_eqv_regcost
) <= 0
4966 && preferable (src_folded_cost
, src_folded_regcost
,
4967 src_related_cost
, src_related_regcost
) <= 0
4968 && preferable (src_folded_cost
, src_folded_regcost
,
4969 src_elt_cost
, src_elt_regcost
) <= 0)
4971 trial
= src_folded
, src_folded_cost
= MAX_COST
;
4972 if (src_folded_force_flag
)
4974 rtx forced
= force_const_mem (mode
, trial
);
4980 && preferable (src_cost
, src_regcost
,
4981 src_eqv_cost
, src_eqv_regcost
) <= 0
4982 && preferable (src_cost
, src_regcost
,
4983 src_related_cost
, src_related_regcost
) <= 0
4984 && preferable (src_cost
, src_regcost
,
4985 src_elt_cost
, src_elt_regcost
) <= 0)
4986 trial
= src
, src_cost
= MAX_COST
;
4987 else if (src_eqv_here
4988 && preferable (src_eqv_cost
, src_eqv_regcost
,
4989 src_related_cost
, src_related_regcost
) <= 0
4990 && preferable (src_eqv_cost
, src_eqv_regcost
,
4991 src_elt_cost
, src_elt_regcost
) <= 0)
4992 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
4993 else if (src_related
4994 && preferable (src_related_cost
, src_related_regcost
,
4995 src_elt_cost
, src_elt_regcost
) <= 0)
4996 trial
= src_related
, src_related_cost
= MAX_COST
;
5000 elt
= elt
->next_same_value
;
5001 src_elt_cost
= MAX_COST
;
5004 /* Avoid creation of overlapping memory moves. */
5005 if (MEM_P (trial
) && MEM_P (SET_DEST (sets
[i
].rtl
)))
5009 /* BLKmode moves are not handled by cse anyway. */
5010 if (GET_MODE (trial
) == BLKmode
)
5013 src
= canon_rtx (trial
);
5014 dest
= canon_rtx (SET_DEST (sets
[i
].rtl
));
5016 if (!MEM_P (src
) || !MEM_P (dest
)
5017 || !nonoverlapping_memrefs_p (src
, dest
))
5022 (set (reg:M N) (const_int A))
5023 (set (reg:M2 O) (const_int B))
5024 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5026 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5027 && CONST_INT_P (trial
)
5028 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5029 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5030 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5031 && (GET_MODE_BITSIZE (GET_MODE (SET_DEST (sets
[i
].rtl
)))
5032 >= INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1)))
5033 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5034 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5035 <= HOST_BITS_PER_WIDE_INT
))
5037 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5038 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5039 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5040 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5041 struct table_elt
*dest_elt
5042 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5043 rtx dest_cst
= NULL
;
5046 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5047 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5054 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5057 if (BITS_BIG_ENDIAN
)
5058 shift
= GET_MODE_BITSIZE (GET_MODE (dest_reg
))
5059 - INTVAL (pos
) - INTVAL (width
);
5061 shift
= INTVAL (pos
);
5062 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5063 mask
= ~(HOST_WIDE_INT
) 0;
5065 mask
= ((HOST_WIDE_INT
) 1 << INTVAL (width
)) - 1;
5066 val
&= ~(mask
<< shift
);
5067 val
|= (INTVAL (trial
) & mask
) << shift
;
5068 val
= trunc_int_for_mode (val
, GET_MODE (dest_reg
));
5069 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5071 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5073 if (apply_change_group ())
5075 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5078 remove_note (insn
, note
);
5079 df_notes_rescan (insn
);
5083 src_eqv_volatile
= 0;
5084 src_eqv_in_memory
= 0;
5092 /* We don't normally have an insn matching (set (pc) (pc)), so
5093 check for this separately here. We will delete such an
5096 For other cases such as a table jump or conditional jump
5097 where we know the ultimate target, go ahead and replace the
5098 operand. While that may not make a valid insn, we will
5099 reemit the jump below (and also insert any necessary
5101 if (n_sets
== 1 && dest
== pc_rtx
5103 || (GET_CODE (trial
) == LABEL_REF
5104 && ! condjump_p (insn
))))
5106 /* Don't substitute non-local labels, this confuses CFG. */
5107 if (GET_CODE (trial
) == LABEL_REF
5108 && LABEL_REF_NONLOCAL_P (trial
))
5111 SET_SRC (sets
[i
].rtl
) = trial
;
5112 cse_jumps_altered
= true;
5116 /* Reject certain invalid forms of CONST that we create. */
5117 else if (CONSTANT_P (trial
)
5118 && GET_CODE (trial
) == CONST
5119 /* Reject cases that will cause decode_rtx_const to
5120 die. On the alpha when simplifying a switch, we
5121 get (const (truncate (minus (label_ref)
5123 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5124 /* Likewise on IA-64, except without the
5126 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5127 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5128 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5129 /* Do nothing for this case. */
5132 /* Look for a substitution that makes a valid insn. */
5133 else if (validate_unshare_change
5134 (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5136 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5138 /* The result of apply_change_group can be ignored; see
5141 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5142 apply_change_group ();
5147 /* If we previously found constant pool entries for
5148 constants and this is a constant, try making a
5149 pool entry. Put it in src_folded unless we already have done
5150 this since that is where it likely came from. */
5152 else if (constant_pool_entries_cost
5153 && CONSTANT_P (trial
)
5155 || (!MEM_P (src_folded
)
5156 && ! src_folded_force_flag
))
5157 && GET_MODE_CLASS (mode
) != MODE_CC
5158 && mode
!= VOIDmode
)
5160 src_folded_force_flag
= 1;
5162 src_folded_cost
= constant_pool_entries_cost
;
5163 src_folded_regcost
= constant_pool_entries_regcost
;
5167 /* If we changed the insn too much, handle this set from scratch. */
5174 src
= SET_SRC (sets
[i
].rtl
);
5176 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5177 However, there is an important exception: If both are registers
5178 that are not the head of their equivalence class, replace SET_SRC
5179 with the head of the class. If we do not do this, we will have
5180 both registers live over a portion of the basic block. This way,
5181 their lifetimes will likely abut instead of overlapping. */
5183 && REGNO_QTY_VALID_P (REGNO (dest
)))
5185 int dest_q
= REG_QTY (REGNO (dest
));
5186 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5188 if (dest_ent
->mode
== GET_MODE (dest
)
5189 && dest_ent
->first_reg
!= REGNO (dest
)
5190 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5191 /* Don't do this if the original insn had a hard reg as
5192 SET_SRC or SET_DEST. */
5193 && (!REG_P (sets
[i
].src
)
5194 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5195 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5196 /* We can't call canon_reg here because it won't do anything if
5197 SRC is a hard register. */
5199 int src_q
= REG_QTY (REGNO (src
));
5200 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5201 int first
= src_ent
->first_reg
;
5203 = (first
>= FIRST_PSEUDO_REGISTER
5204 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5206 /* We must use validate-change even for this, because this
5207 might be a special no-op instruction, suitable only to
5209 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5212 /* If we had a constant that is cheaper than what we are now
5213 setting SRC to, use that constant. We ignored it when we
5214 thought we could make this into a no-op. */
5215 if (src_const
&& COST (src_const
) < COST (src
)
5216 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5223 /* If we made a change, recompute SRC values. */
5224 if (src
!= sets
[i
].src
)
5227 hash_arg_in_memory
= 0;
5229 sets
[i
].src_hash
= HASH (src
, mode
);
5230 sets
[i
].src_volatile
= do_not_record
;
5231 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5232 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5235 /* If this is a single SET, we are setting a register, and we have an
5236 equivalent constant, we want to add a REG_NOTE. We don't want
5237 to write a REG_EQUAL note for a constant pseudo since verifying that
5238 that pseudo hasn't been eliminated is a pain. Such a note also
5239 won't help anything.
5241 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5242 which can be created for a reference to a compile time computable
5243 entry in a jump table. */
5245 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5246 && !REG_P (src_const
)
5247 && ! (GET_CODE (src_const
) == CONST
5248 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5249 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5250 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5252 /* We only want a REG_EQUAL note if src_const != src. */
5253 if (! rtx_equal_p (src
, src_const
))
5255 /* Make sure that the rtx is not shared. */
5256 src_const
= copy_rtx (src_const
);
5258 /* Record the actual constant value in a REG_EQUAL note,
5259 making a new one if one does not already exist. */
5260 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5261 df_notes_rescan (insn
);
5265 /* Now deal with the destination. */
5268 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5269 while (GET_CODE (dest
) == SUBREG
5270 || GET_CODE (dest
) == ZERO_EXTRACT
5271 || GET_CODE (dest
) == STRICT_LOW_PART
)
5272 dest
= XEXP (dest
, 0);
5274 sets
[i
].inner_dest
= dest
;
5278 #ifdef PUSH_ROUNDING
5279 /* Stack pushes invalidate the stack pointer. */
5280 rtx addr
= XEXP (dest
, 0);
5281 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5282 && XEXP (addr
, 0) == stack_pointer_rtx
)
5283 invalidate (stack_pointer_rtx
, VOIDmode
);
5285 dest
= fold_rtx (dest
, insn
);
5288 /* Compute the hash code of the destination now,
5289 before the effects of this instruction are recorded,
5290 since the register values used in the address computation
5291 are those before this instruction. */
5292 sets
[i
].dest_hash
= HASH (dest
, mode
);
5294 /* Don't enter a bit-field in the hash table
5295 because the value in it after the store
5296 may not equal what was stored, due to truncation. */
5298 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5300 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5302 if (src_const
!= 0 && CONST_INT_P (src_const
)
5303 && CONST_INT_P (width
)
5304 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5305 && ! (INTVAL (src_const
)
5306 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5307 /* Exception: if the value is constant,
5308 and it won't be truncated, record it. */
5312 /* This is chosen so that the destination will be invalidated
5313 but no new value will be recorded.
5314 We must invalidate because sometimes constant
5315 values can be recorded for bitfields. */
5316 sets
[i
].src_elt
= 0;
5317 sets
[i
].src_volatile
= 1;
5323 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5325 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5327 /* One less use of the label this insn used to jump to. */
5328 delete_insn_and_edges (insn
);
5329 cse_jumps_altered
= true;
5330 /* No more processing for this set. */
5334 /* If this SET is now setting PC to a label, we know it used to
5335 be a conditional or computed branch. */
5336 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5337 && !LABEL_REF_NONLOCAL_P (src
))
5339 /* We reemit the jump in as many cases as possible just in
5340 case the form of an unconditional jump is significantly
5341 different than a computed jump or conditional jump.
5343 If this insn has multiple sets, then reemitting the
5344 jump is nontrivial. So instead we just force rerecognition
5345 and hope for the best. */
5350 new_rtx
= emit_jump_insn_before (gen_jump (XEXP (src
, 0)), insn
);
5351 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5352 LABEL_NUSES (XEXP (src
, 0))++;
5354 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5355 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5358 XEXP (note
, 1) = NULL_RTX
;
5359 REG_NOTES (new_rtx
) = note
;
5362 delete_insn_and_edges (insn
);
5366 INSN_CODE (insn
) = -1;
5368 /* Do not bother deleting any unreachable code, let jump do it. */
5369 cse_jumps_altered
= true;
5373 /* If destination is volatile, invalidate it and then do no further
5374 processing for this assignment. */
5376 else if (do_not_record
)
5378 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5379 invalidate (dest
, VOIDmode
);
5380 else if (MEM_P (dest
))
5381 invalidate (dest
, VOIDmode
);
5382 else if (GET_CODE (dest
) == STRICT_LOW_PART
5383 || GET_CODE (dest
) == ZERO_EXTRACT
)
5384 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5388 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5389 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5392 /* If setting CC0, record what it was set to, or a constant, if it
5393 is equivalent to a constant. If it is being set to a floating-point
5394 value, make a COMPARE with the appropriate constant of 0. If we
5395 don't do this, later code can interpret this as a test against
5396 const0_rtx, which can cause problems if we try to put it into an
5397 insn as a floating-point operand. */
5398 if (dest
== cc0_rtx
)
5400 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5401 this_insn_cc0_mode
= mode
;
5402 if (FLOAT_MODE_P (mode
))
5403 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5409 /* Now enter all non-volatile source expressions in the hash table
5410 if they are not already present.
5411 Record their equivalence classes in src_elt.
5412 This way we can insert the corresponding destinations into
5413 the same classes even if the actual sources are no longer in them
5414 (having been invalidated). */
5416 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5417 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5419 struct table_elt
*elt
;
5420 struct table_elt
*classp
= sets
[0].src_elt
;
5421 rtx dest
= SET_DEST (sets
[0].rtl
);
5422 enum machine_mode eqvmode
= GET_MODE (dest
);
5424 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5426 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5429 if (insert_regs (src_eqv
, classp
, 0))
5431 rehash_using_reg (src_eqv
);
5432 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5434 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5435 elt
->in_memory
= src_eqv_in_memory
;
5438 /* Check to see if src_eqv_elt is the same as a set source which
5439 does not yet have an elt, and if so set the elt of the set source
5441 for (i
= 0; i
< n_sets
; i
++)
5442 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5443 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5444 sets
[i
].src_elt
= src_eqv_elt
;
5447 for (i
= 0; i
< n_sets
; i
++)
5448 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5449 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5451 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5453 /* REG_EQUAL in setting a STRICT_LOW_PART
5454 gives an equivalent for the entire destination register,
5455 not just for the subreg being stored in now.
5456 This is a more interesting equivalence, so we arrange later
5457 to treat the entire reg as the destination. */
5458 sets
[i
].src_elt
= src_eqv_elt
;
5459 sets
[i
].src_hash
= src_eqv_hash
;
5463 /* Insert source and constant equivalent into hash table, if not
5465 struct table_elt
*classp
= src_eqv_elt
;
5466 rtx src
= sets
[i
].src
;
5467 rtx dest
= SET_DEST (sets
[i
].rtl
);
5468 enum machine_mode mode
5469 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5471 /* It's possible that we have a source value known to be
5472 constant but don't have a REG_EQUAL note on the insn.
5473 Lack of a note will mean src_eqv_elt will be NULL. This
5474 can happen where we've generated a SUBREG to access a
5475 CONST_INT that is already in a register in a wider mode.
5476 Ensure that the source expression is put in the proper
5479 classp
= sets
[i
].src_const_elt
;
5481 if (sets
[i
].src_elt
== 0)
5483 struct table_elt
*elt
;
5485 /* Note that these insert_regs calls cannot remove
5486 any of the src_elt's, because they would have failed to
5487 match if not still valid. */
5488 if (insert_regs (src
, classp
, 0))
5490 rehash_using_reg (src
);
5491 sets
[i
].src_hash
= HASH (src
, mode
);
5493 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5494 elt
->in_memory
= sets
[i
].src_in_memory
;
5495 sets
[i
].src_elt
= classp
= elt
;
5497 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5498 && src
!= sets
[i
].src_const
5499 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5500 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5501 sets
[i
].src_const_hash
, mode
);
5504 else if (sets
[i
].src_elt
== 0)
5505 /* If we did not insert the source into the hash table (e.g., it was
5506 volatile), note the equivalence class for the REG_EQUAL value, if any,
5507 so that the destination goes into that class. */
5508 sets
[i
].src_elt
= src_eqv_elt
;
5510 /* Record destination addresses in the hash table. This allows us to
5511 check if they are invalidated by other sets. */
5512 for (i
= 0; i
< n_sets
; i
++)
5516 rtx x
= sets
[i
].inner_dest
;
5517 struct table_elt
*elt
;
5518 enum machine_mode mode
;
5524 mode
= GET_MODE (x
);
5525 hash
= HASH (x
, mode
);
5526 elt
= lookup (x
, hash
, mode
);
5529 if (insert_regs (x
, NULL
, 0))
5531 rtx dest
= SET_DEST (sets
[i
].rtl
);
5533 rehash_using_reg (x
);
5534 hash
= HASH (x
, mode
);
5535 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5537 elt
= insert (x
, NULL
, hash
, mode
);
5540 sets
[i
].dest_addr_elt
= elt
;
5543 sets
[i
].dest_addr_elt
= NULL
;
5547 invalidate_from_clobbers (x
);
5549 /* Some registers are invalidated by subroutine calls. Memory is
5550 invalidated by non-constant calls. */
5554 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5555 invalidate_memory ();
5556 invalidate_for_call ();
5559 /* Now invalidate everything set by this instruction.
5560 If a SUBREG or other funny destination is being set,
5561 sets[i].rtl is still nonzero, so here we invalidate the reg
5562 a part of which is being set. */
5564 for (i
= 0; i
< n_sets
; i
++)
5567 /* We can't use the inner dest, because the mode associated with
5568 a ZERO_EXTRACT is significant. */
5569 rtx dest
= SET_DEST (sets
[i
].rtl
);
5571 /* Needed for registers to remove the register from its
5572 previous quantity's chain.
5573 Needed for memory if this is a nonvarying address, unless
5574 we have just done an invalidate_memory that covers even those. */
5575 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5576 invalidate (dest
, VOIDmode
);
5577 else if (MEM_P (dest
))
5578 invalidate (dest
, VOIDmode
);
5579 else if (GET_CODE (dest
) == STRICT_LOW_PART
5580 || GET_CODE (dest
) == ZERO_EXTRACT
)
5581 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5584 /* A volatile ASM invalidates everything. */
5585 if (NONJUMP_INSN_P (insn
)
5586 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5587 && MEM_VOLATILE_P (PATTERN (insn
)))
5588 flush_hash_table ();
5590 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5591 the regs restored by the longjmp come from a later time
5593 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5595 flush_hash_table ();
5599 /* Make sure registers mentioned in destinations
5600 are safe for use in an expression to be inserted.
5601 This removes from the hash table
5602 any invalid entry that refers to one of these registers.
5604 We don't care about the return value from mention_regs because
5605 we are going to hash the SET_DEST values unconditionally. */
5607 for (i
= 0; i
< n_sets
; i
++)
5611 rtx x
= SET_DEST (sets
[i
].rtl
);
5617 /* We used to rely on all references to a register becoming
5618 inaccessible when a register changes to a new quantity,
5619 since that changes the hash code. However, that is not
5620 safe, since after HASH_SIZE new quantities we get a
5621 hash 'collision' of a register with its own invalid
5622 entries. And since SUBREGs have been changed not to
5623 change their hash code with the hash code of the register,
5624 it wouldn't work any longer at all. So we have to check
5625 for any invalid references lying around now.
5626 This code is similar to the REG case in mention_regs,
5627 but it knows that reg_tick has been incremented, and
5628 it leaves reg_in_table as -1 . */
5629 unsigned int regno
= REGNO (x
);
5630 unsigned int endregno
= END_REGNO (x
);
5633 for (i
= regno
; i
< endregno
; i
++)
5635 if (REG_IN_TABLE (i
) >= 0)
5637 remove_invalid_refs (i
);
5638 REG_IN_TABLE (i
) = -1;
5645 /* We may have just removed some of the src_elt's from the hash table.
5646 So replace each one with the current head of the same class.
5647 Also check if destination addresses have been removed. */
5649 for (i
= 0; i
< n_sets
; i
++)
5652 if (sets
[i
].dest_addr_elt
5653 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5655 /* The elt was removed, which means this destination is not
5656 valid after this instruction. */
5657 sets
[i
].rtl
= NULL_RTX
;
5659 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5660 /* If elt was removed, find current head of same class,
5661 or 0 if nothing remains of that class. */
5663 struct table_elt
*elt
= sets
[i
].src_elt
;
5665 while (elt
&& elt
->prev_same_value
)
5666 elt
= elt
->prev_same_value
;
5668 while (elt
&& elt
->first_same_value
== 0)
5669 elt
= elt
->next_same_value
;
5670 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5674 /* Now insert the destinations into their equivalence classes. */
5676 for (i
= 0; i
< n_sets
; i
++)
5679 rtx dest
= SET_DEST (sets
[i
].rtl
);
5680 struct table_elt
*elt
;
5682 /* Don't record value if we are not supposed to risk allocating
5683 floating-point values in registers that might be wider than
5685 if ((flag_float_store
5687 && FLOAT_MODE_P (GET_MODE (dest
)))
5688 /* Don't record BLKmode values, because we don't know the
5689 size of it, and can't be sure that other BLKmode values
5690 have the same or smaller size. */
5691 || GET_MODE (dest
) == BLKmode
5692 /* If we didn't put a REG_EQUAL value or a source into the hash
5693 table, there is no point is recording DEST. */
5694 || sets
[i
].src_elt
== 0
5695 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5696 or SIGN_EXTEND, don't record DEST since it can cause
5697 some tracking to be wrong.
5699 ??? Think about this more later. */
5700 || (GET_CODE (dest
) == SUBREG
5701 && (GET_MODE_SIZE (GET_MODE (dest
))
5702 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5703 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
5704 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
5707 /* STRICT_LOW_PART isn't part of the value BEING set,
5708 and neither is the SUBREG inside it.
5709 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5710 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5711 dest
= SUBREG_REG (XEXP (dest
, 0));
5713 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5714 /* Registers must also be inserted into chains for quantities. */
5715 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5717 /* If `insert_regs' changes something, the hash code must be
5719 rehash_using_reg (dest
);
5720 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5723 elt
= insert (dest
, sets
[i
].src_elt
,
5724 sets
[i
].dest_hash
, GET_MODE (dest
));
5726 /* If this is a constant, insert the constant anchors with the
5727 equivalent register-offset expressions using register DEST. */
5728 if (targetm
.const_anchor
5730 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5731 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5732 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5734 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5735 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5737 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5738 narrower than M2, and both M1 and M2 are the same number of words,
5739 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5740 make that equivalence as well.
5742 However, BAR may have equivalences for which gen_lowpart
5743 will produce a simpler value than gen_lowpart applied to
5744 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5745 BAR's equivalences. If we don't get a simplified form, make
5746 the SUBREG. It will not be used in an equivalence, but will
5747 cause two similar assignments to be detected.
5749 Note the loop below will find SUBREG_REG (DEST) since we have
5750 already entered SRC and DEST of the SET in the table. */
5752 if (GET_CODE (dest
) == SUBREG
5753 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
5755 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
5756 && (GET_MODE_SIZE (GET_MODE (dest
))
5757 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
5758 && sets
[i
].src_elt
!= 0)
5760 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
5761 struct table_elt
*elt
, *classp
= 0;
5763 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
5764 elt
= elt
->next_same_value
)
5768 struct table_elt
*src_elt
;
5771 /* Ignore invalid entries. */
5772 if (!REG_P (elt
->exp
)
5773 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5776 /* We may have already been playing subreg games. If the
5777 mode is already correct for the destination, use it. */
5778 if (GET_MODE (elt
->exp
) == new_mode
)
5782 /* Calculate big endian correction for the SUBREG_BYTE.
5783 We have already checked that M1 (GET_MODE (dest))
5784 is not narrower than M2 (new_mode). */
5785 if (BYTES_BIG_ENDIAN
)
5786 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
5787 - GET_MODE_SIZE (new_mode
));
5789 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
5790 GET_MODE (dest
), byte
);
5793 /* The call to simplify_gen_subreg fails if the value
5794 is VOIDmode, yet we can't do any simplification, e.g.
5795 for EXPR_LISTs denoting function call results.
5796 It is invalid to construct a SUBREG with a VOIDmode
5797 SUBREG_REG, hence a zero new_src means we can't do
5798 this substitution. */
5802 src_hash
= HASH (new_src
, new_mode
);
5803 src_elt
= lookup (new_src
, src_hash
, new_mode
);
5805 /* Put the new source in the hash table is if isn't
5809 if (insert_regs (new_src
, classp
, 0))
5811 rehash_using_reg (new_src
);
5812 src_hash
= HASH (new_src
, new_mode
);
5814 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
5815 src_elt
->in_memory
= elt
->in_memory
;
5817 else if (classp
&& classp
!= src_elt
->first_same_value
)
5818 /* Show that two things that we've seen before are
5819 actually the same. */
5820 merge_equiv_classes (src_elt
, classp
);
5822 classp
= src_elt
->first_same_value
;
5823 /* Ignore invalid entries. */
5825 && !REG_P (classp
->exp
)
5826 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
5827 classp
= classp
->next_same_value
;
5832 /* Special handling for (set REG0 REG1) where REG0 is the
5833 "cheapest", cheaper than REG1. After cse, REG1 will probably not
5834 be used in the sequel, so (if easily done) change this insn to
5835 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
5836 that computed their value. Then REG1 will become a dead store
5837 and won't cloud the situation for later optimizations.
5839 Do not make this change if REG1 is a hard register, because it will
5840 then be used in the sequel and we may be changing a two-operand insn
5841 into a three-operand insn.
5843 Also do not do this if we are operating on a copy of INSN. */
5845 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
5846 && NEXT_INSN (PREV_INSN (insn
)) == insn
5847 && REG_P (SET_SRC (sets
[0].rtl
))
5848 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
5849 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
5851 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
5852 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5854 if (src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
5856 /* Scan for the previous nonnote insn, but stop at a basic
5859 rtx bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
5862 prev
= PREV_INSN (prev
);
5864 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
5866 /* Do not swap the registers around if the previous instruction
5867 attaches a REG_EQUIV note to REG1.
5869 ??? It's not entirely clear whether we can transfer a REG_EQUIV
5870 from the pseudo that originally shadowed an incoming argument
5871 to another register. Some uses of REG_EQUIV might rely on it
5872 being attached to REG1 rather than REG2.
5874 This section previously turned the REG_EQUIV into a REG_EQUAL
5875 note. We cannot do that because REG_EQUIV may provide an
5876 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
5877 if (NONJUMP_INSN_P (prev
)
5878 && GET_CODE (PATTERN (prev
)) == SET
5879 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
5880 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
5882 rtx dest
= SET_DEST (sets
[0].rtl
);
5883 rtx src
= SET_SRC (sets
[0].rtl
);
5886 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
5887 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
5888 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
5889 apply_change_group ();
5891 /* If INSN has a REG_EQUAL note, and this note mentions
5892 REG0, then we must delete it, because the value in
5893 REG0 has changed. If the note's value is REG1, we must
5894 also delete it because that is now this insn's dest. */
5895 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5897 && (reg_mentioned_p (dest
, XEXP (note
, 0))
5898 || rtx_equal_p (src
, XEXP (note
, 0))))
5899 remove_note (insn
, note
);
5907 /* Remove from the hash table all expressions that reference memory. */
5910 invalidate_memory (void)
5913 struct table_elt
*p
, *next
;
5915 for (i
= 0; i
< HASH_SIZE
; i
++)
5916 for (p
= table
[i
]; p
; p
= next
)
5918 next
= p
->next_same_hash
;
5920 remove_from_table (p
, i
);
5924 /* Perform invalidation on the basis of everything about an insn
5925 except for invalidating the actual places that are SET in it.
5926 This includes the places CLOBBERed, and anything that might
5927 alias with something that is SET or CLOBBERed.
5929 X is the pattern of the insn. */
5932 invalidate_from_clobbers (rtx x
)
5934 if (GET_CODE (x
) == CLOBBER
)
5936 rtx ref
= XEXP (x
, 0);
5939 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5941 invalidate (ref
, VOIDmode
);
5942 else if (GET_CODE (ref
) == STRICT_LOW_PART
5943 || GET_CODE (ref
) == ZERO_EXTRACT
)
5944 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5947 else if (GET_CODE (x
) == PARALLEL
)
5950 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
5952 rtx y
= XVECEXP (x
, 0, i
);
5953 if (GET_CODE (y
) == CLOBBER
)
5955 rtx ref
= XEXP (y
, 0);
5956 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
5958 invalidate (ref
, VOIDmode
);
5959 else if (GET_CODE (ref
) == STRICT_LOW_PART
5960 || GET_CODE (ref
) == ZERO_EXTRACT
)
5961 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
5967 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
5968 and replace any registers in them with either an equivalent constant
5969 or the canonical form of the register. If we are inside an address,
5970 only do this if the address remains valid.
5972 OBJECT is 0 except when within a MEM in which case it is the MEM.
5974 Return the replacement for X. */
5977 cse_process_notes_1 (rtx x
, rtx object
, bool *changed
)
5979 enum rtx_code code
= GET_CODE (x
);
5980 const char *fmt
= GET_RTX_FORMAT (code
);
5998 validate_change (x
, &XEXP (x
, 0),
5999 cse_process_notes (XEXP (x
, 0), x
, changed
), 0);
6004 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6005 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
, changed
);
6007 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
, changed
);
6014 rtx new_rtx
= cse_process_notes (XEXP (x
, 0), object
, changed
);
6015 /* We don't substitute VOIDmode constants into these rtx,
6016 since they would impede folding. */
6017 if (GET_MODE (new_rtx
) != VOIDmode
)
6018 validate_change (object
, &XEXP (x
, 0), new_rtx
, 0);
6023 i
= REG_QTY (REGNO (x
));
6025 /* Return a constant or a constant register. */
6026 if (REGNO_QTY_VALID_P (REGNO (x
)))
6028 struct qty_table_elem
*ent
= &qty_table
[i
];
6030 if (ent
->const_rtx
!= NULL_RTX
6031 && (CONSTANT_P (ent
->const_rtx
)
6032 || REG_P (ent
->const_rtx
)))
6034 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6036 return copy_rtx (new_rtx
);
6040 /* Otherwise, canonicalize this register. */
6041 return canon_reg (x
, NULL_RTX
);
6047 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6049 validate_change (object
, &XEXP (x
, i
),
6050 cse_process_notes (XEXP (x
, i
), object
, changed
), 0);
6056 cse_process_notes (rtx x
, rtx object
, bool *changed
)
6058 rtx new_rtx
= cse_process_notes_1 (x
, object
, changed
);
6065 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6067 DATA is a pointer to a struct cse_basic_block_data, that is used to
6069 It is filled with a queue of basic blocks, starting with FIRST_BB
6070 and following a trace through the CFG.
6072 If all paths starting at FIRST_BB have been followed, or no new path
6073 starting at FIRST_BB can be constructed, this function returns FALSE.
6074 Otherwise, DATA->path is filled and the function returns TRUE indicating
6075 that a path to follow was found.
6077 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6078 block in the path will be FIRST_BB. */
6081 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6088 SET_BIT (cse_visited_basic_blocks
, first_bb
->index
);
6090 /* See if there is a previous path. */
6091 path_size
= data
->path_size
;
6093 /* There is a previous path. Make sure it started with FIRST_BB. */
6095 gcc_assert (data
->path
[0].bb
== first_bb
);
6097 /* There was only one basic block in the last path. Clear the path and
6098 return, so that paths starting at another basic block can be tried. */
6105 /* If the path was empty from the beginning, construct a new path. */
6107 data
->path
[path_size
++].bb
= first_bb
;
6110 /* Otherwise, path_size must be equal to or greater than 2, because
6111 a previous path exists that is at least two basic blocks long.
6113 Update the previous branch path, if any. If the last branch was
6114 previously along the branch edge, take the fallthrough edge now. */
6115 while (path_size
>= 2)
6117 basic_block last_bb_in_path
, previous_bb_in_path
;
6121 last_bb_in_path
= data
->path
[path_size
].bb
;
6122 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6124 /* If we previously followed a path along the branch edge, try
6125 the fallthru edge now. */
6126 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6127 && any_condjump_p (BB_END (previous_bb_in_path
))
6128 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6129 && e
== BRANCH_EDGE (previous_bb_in_path
))
6131 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6132 if (bb
!= EXIT_BLOCK_PTR
6133 && single_pred_p (bb
)
6134 /* We used to assert here that we would only see blocks
6135 that we have not visited yet. But we may end up
6136 visiting basic blocks twice if the CFG has changed
6137 in this run of cse_main, because when the CFG changes
6138 the topological sort of the CFG also changes. A basic
6139 blocks that previously had more than two predecessors
6140 may now have a single predecessor, and become part of
6141 a path that starts at another basic block.
6143 We still want to visit each basic block only once, so
6144 halt the path here if we have already visited BB. */
6145 && !TEST_BIT (cse_visited_basic_blocks
, bb
->index
))
6147 SET_BIT (cse_visited_basic_blocks
, bb
->index
);
6148 data
->path
[path_size
++].bb
= bb
;
6153 data
->path
[path_size
].bb
= NULL
;
6156 /* If only one block remains in the path, bail. */
6164 /* Extend the path if possible. */
6167 bb
= data
->path
[path_size
- 1].bb
;
6168 while (bb
&& path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
))
6170 if (single_succ_p (bb
))
6171 e
= single_succ_edge (bb
);
6172 else if (EDGE_COUNT (bb
->succs
) == 2
6173 && any_condjump_p (BB_END (bb
)))
6175 /* First try to follow the branch. If that doesn't lead
6176 to a useful path, follow the fallthru edge. */
6177 e
= BRANCH_EDGE (bb
);
6178 if (!single_pred_p (e
->dest
))
6179 e
= FALLTHRU_EDGE (bb
);
6184 if (e
&& e
->dest
!= EXIT_BLOCK_PTR
6185 && single_pred_p (e
->dest
)
6186 /* Avoid visiting basic blocks twice. The large comment
6187 above explains why this can happen. */
6188 && !TEST_BIT (cse_visited_basic_blocks
, e
->dest
->index
))
6190 basic_block bb2
= e
->dest
;
6191 SET_BIT (cse_visited_basic_blocks
, bb2
->index
);
6192 data
->path
[path_size
++].bb
= bb2
;
6201 data
->path_size
= path_size
;
6202 return path_size
!= 0;
6205 /* Dump the path in DATA to file F. NSETS is the number of sets
6209 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6213 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6214 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6215 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6216 fputc ('\n', dump_file
);
6221 /* Return true if BB has exception handling successor edges. */
6224 have_eh_succ_edges (basic_block bb
)
6229 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6230 if (e
->flags
& EDGE_EH
)
6237 /* Scan to the end of the path described by DATA. Return an estimate of
6238 the total number of SETs of all insns in the path. */
6241 cse_prescan_path (struct cse_basic_block_data
*data
)
6244 int path_size
= data
->path_size
;
6247 /* Scan to end of each basic block in the path. */
6248 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6253 bb
= data
->path
[path_entry
].bb
;
6255 FOR_BB_INSNS (bb
, insn
)
6260 /* A PARALLEL can have lots of SETs in it,
6261 especially if it is really an ASM_OPERANDS. */
6262 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6263 nsets
+= XVECLEN (PATTERN (insn
), 0);
6269 data
->nsets
= nsets
;
6272 /* Process a single extended basic block described by EBB_DATA. */
6275 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6277 int path_size
= ebb_data
->path_size
;
6281 /* Allocate the space needed by qty_table. */
6282 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6285 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6286 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6287 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6292 bb
= ebb_data
->path
[path_entry
].bb
;
6294 /* Invalidate recorded information for eh regs if there is an EH
6295 edge pointing to that bb. */
6296 if (bb_has_eh_pred (bb
))
6300 for (def_rec
= df_get_artificial_defs (bb
->index
); *def_rec
; def_rec
++)
6302 df_ref def
= *def_rec
;
6303 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6304 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6308 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6309 FOR_BB_INSNS (bb
, insn
)
6311 /* If we have processed 1,000 insns, flush the hash table to
6312 avoid extreme quadratic behavior. We must not include NOTEs
6313 in the count since there may be more of them when generating
6314 debugging information. If we clear the table at different
6315 times, code generated with -g -O might be different than code
6316 generated with -O but not -g.
6318 FIXME: This is a real kludge and needs to be done some other
6320 if (NONDEBUG_INSN_P (insn
)
6321 && num_insns
++ > PARAM_VALUE (PARAM_MAX_CSE_INSNS
))
6323 flush_hash_table ();
6329 /* Process notes first so we have all notes in canonical forms
6330 when looking for duplicate operations. */
6331 if (REG_NOTES (insn
))
6333 bool changed
= false;
6334 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
),
6335 NULL_RTX
, &changed
);
6337 df_notes_rescan (insn
);
6342 /* If we haven't already found an insn where we added a LABEL_REF,
6344 if (INSN_P (insn
) && !recorded_label_ref
6345 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6347 recorded_label_ref
= true;
6350 /* If the previous insn set CC0 and this insn no longer
6351 references CC0, delete the previous insn. Here we use
6352 fact that nothing expects CC0 to be valid over an insn,
6353 which is true until the final pass. */
6357 prev_insn
= PREV_INSN (insn
);
6358 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6359 && (tem
= single_set (prev_insn
)) != 0
6360 && SET_DEST (tem
) == cc0_rtx
6361 && ! reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
6362 delete_insn (prev_insn
);
6365 /* If this insn is not the last insn in the basic block,
6366 it will be PREV_INSN(insn) in the next iteration. If
6367 we recorded any CC0-related information for this insn,
6369 if (insn
!= BB_END (bb
))
6371 prev_insn_cc0
= this_insn_cc0
;
6372 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6378 /* With non-call exceptions, we are not always able to update
6379 the CFG properly inside cse_insn. So clean up possibly
6380 redundant EH edges here. */
6381 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6382 cse_cfg_altered
|= purge_dead_edges (bb
);
6384 /* If we changed a conditional jump, we may have terminated
6385 the path we are following. Check that by verifying that
6386 the edge we would take still exists. If the edge does
6387 not exist anymore, purge the remainder of the path.
6388 Note that this will cause us to return to the caller. */
6389 if (path_entry
< path_size
- 1)
6391 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6392 if (!find_edge (bb
, next_bb
))
6398 /* If we truncate the path, we must also reset the
6399 visited bit on the remaining blocks in the path,
6400 or we will never visit them at all. */
6401 RESET_BIT (cse_visited_basic_blocks
,
6402 ebb_data
->path
[path_size
].bb
->index
);
6403 ebb_data
->path
[path_size
].bb
= NULL
;
6405 while (path_size
- 1 != path_entry
);
6406 ebb_data
->path_size
= path_size
;
6410 /* If this is a conditional jump insn, record any known
6411 equivalences due to the condition being tested. */
6413 if (path_entry
< path_size
- 1
6415 && single_set (insn
)
6416 && any_condjump_p (insn
))
6418 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6419 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6420 record_jump_equiv (insn
, taken
);
6424 /* Clear the CC0-tracking related insns, they can't provide
6425 useful information across basic block boundaries. */
6430 gcc_assert (next_qty
<= max_qty
);
6436 /* Perform cse on the instructions of a function.
6437 F is the first instruction.
6438 NREGS is one plus the highest pseudo-reg number used in the instruction.
6440 Return 2 if jump optimizations should be redone due to simplifications
6441 in conditional jump instructions.
6442 Return 1 if the CFG should be cleaned up because it has been modified.
6443 Return 0 otherwise. */
6446 cse_main (rtx f ATTRIBUTE_UNUSED
, int nregs
)
6448 struct cse_basic_block_data ebb_data
;
6450 int *rc_order
= XNEWVEC (int, last_basic_block
);
6453 df_set_flags (DF_LR_RUN_DCE
);
6455 df_set_flags (DF_DEFER_INSN_RESCAN
);
6457 reg_scan (get_insns (), max_reg_num ());
6458 init_cse_reg_info (nregs
);
6460 ebb_data
.path
= XNEWVEC (struct branch_path
,
6461 PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6463 cse_cfg_altered
= false;
6464 cse_jumps_altered
= false;
6465 recorded_label_ref
= false;
6466 constant_pool_entries_cost
= 0;
6467 constant_pool_entries_regcost
= 0;
6468 ebb_data
.path_size
= 0;
6470 rtl_hooks
= cse_rtl_hooks
;
6473 init_alias_analysis ();
6475 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6477 /* Set up the table of already visited basic blocks. */
6478 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block
);
6479 sbitmap_zero (cse_visited_basic_blocks
);
6481 /* Loop over basic blocks in reverse completion order (RPO),
6482 excluding the ENTRY and EXIT blocks. */
6483 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6485 while (i
< n_blocks
)
6487 /* Find the first block in the RPO queue that we have not yet
6488 processed before. */
6491 bb
= BASIC_BLOCK (rc_order
[i
++]);
6493 while (TEST_BIT (cse_visited_basic_blocks
, bb
->index
)
6496 /* Find all paths starting with BB, and process them. */
6497 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6499 /* Pre-scan the path. */
6500 cse_prescan_path (&ebb_data
);
6502 /* If this basic block has no sets, skip it. */
6503 if (ebb_data
.nsets
== 0)
6506 /* Get a reasonable estimate for the maximum number of qty's
6507 needed for this path. For this, we take the number of sets
6508 and multiply that by MAX_RECOG_OPERANDS. */
6509 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6511 /* Dump the path we're about to process. */
6513 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6515 cse_extended_basic_block (&ebb_data
);
6520 end_alias_analysis ();
6521 free (reg_eqv_table
);
6522 free (ebb_data
.path
);
6523 sbitmap_free (cse_visited_basic_blocks
);
6525 rtl_hooks
= general_rtl_hooks
;
6527 if (cse_jumps_altered
|| recorded_label_ref
)
6529 else if (cse_cfg_altered
)
6535 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for
6536 which there isn't a REG_LABEL_OPERAND note.
6537 Return one if so. DATA is the insn. */
6540 check_for_label_ref (rtx
*rtl
, void *data
)
6542 rtx insn
= (rtx
) data
;
6544 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6545 note for it, we must rerun jump since it needs to place the note. If
6546 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6547 don't do this since no REG_LABEL_OPERAND will be added. */
6548 return (GET_CODE (*rtl
) == LABEL_REF
6549 && ! LABEL_REF_NONLOCAL_P (*rtl
)
6551 || !label_is_jump_target_p (XEXP (*rtl
, 0), insn
))
6552 && LABEL_P (XEXP (*rtl
, 0))
6553 && INSN_UID (XEXP (*rtl
, 0)) != 0
6554 && ! find_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (*rtl
, 0)));
6557 /* Count the number of times registers are used (not set) in X.
6558 COUNTS is an array in which we accumulate the count, INCR is how much
6559 we count each register usage.
6561 Don't count a usage of DEST, which is the SET_DEST of a SET which
6562 contains X in its SET_SRC. This is because such a SET does not
6563 modify the liveness of DEST.
6564 DEST is set to pc_rtx for a trapping insn, which means that we must count
6565 uses of a SET_DEST regardless because the insn can't be deleted here. */
6568 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6578 switch (code
= GET_CODE (x
))
6582 counts
[REGNO (x
)] += incr
;
6597 /* If we are clobbering a MEM, mark any registers inside the address
6599 if (MEM_P (XEXP (x
, 0)))
6600 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6604 /* Unless we are setting a REG, count everything in SET_DEST. */
6605 if (!REG_P (SET_DEST (x
)))
6606 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6607 count_reg_usage (SET_SRC (x
), counts
,
6608 dest
? dest
: SET_DEST (x
),
6618 /* We expect dest to be NULL_RTX here. If the insn may trap, mark
6619 this fact by setting DEST to pc_rtx. */
6620 if (insn_could_throw_p (x
))
6622 if (code
== CALL_INSN
)
6623 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6624 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6626 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6629 note
= find_reg_equal_equiv_note (x
);
6632 rtx eqv
= XEXP (note
, 0);
6634 if (GET_CODE (eqv
) == EXPR_LIST
)
6635 /* This REG_EQUAL note describes the result of a function call.
6636 Process all the arguments. */
6639 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6640 eqv
= XEXP (eqv
, 1);
6642 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6644 count_reg_usage (eqv
, counts
, dest
, incr
);
6649 if (REG_NOTE_KIND (x
) == REG_EQUAL
6650 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6651 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6652 involving registers in the address. */
6653 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6654 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6656 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6660 /* If the asm is volatile, then this insn cannot be deleted,
6661 and so the inputs *must* be live. */
6662 if (MEM_VOLATILE_P (x
))
6664 /* Iterate over just the inputs, not the constraints as well. */
6665 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6666 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6676 fmt
= GET_RTX_FORMAT (code
);
6677 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6680 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6681 else if (fmt
[i
] == 'E')
6682 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6683 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6687 /* Return true if a register is dead. Can be used in for_each_rtx. */
6690 is_dead_reg (rtx
*loc
, void *data
)
6693 int *counts
= (int *)data
;
6696 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6697 && counts
[REGNO (x
)] == 0);
6700 /* Return true if set is live. */
6702 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
6709 if (set_noop_p (set
))
6713 else if (GET_CODE (SET_DEST (set
)) == CC0
6714 && !side_effects_p (SET_SRC (set
))
6715 && ((tem
= next_nonnote_insn (insn
)) == 0
6717 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
6720 else if (!is_dead_reg (&SET_DEST (set
), counts
)
6721 || side_effects_p (SET_SRC (set
)))
6726 /* Return true if insn is live. */
6729 insn_live_p (rtx insn
, int *counts
)
6732 if (insn_could_throw_p (insn
))
6734 else if (GET_CODE (PATTERN (insn
)) == SET
)
6735 return set_live_p (PATTERN (insn
), insn
, counts
);
6736 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6738 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6740 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6742 if (GET_CODE (elt
) == SET
)
6744 if (set_live_p (elt
, insn
, counts
))
6747 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6752 else if (DEBUG_INSN_P (insn
))
6756 for (next
= NEXT_INSN (insn
); next
; next
= NEXT_INSN (next
))
6759 else if (!DEBUG_INSN_P (next
))
6761 else if (INSN_VAR_LOCATION_DECL (insn
) == INSN_VAR_LOCATION_DECL (next
))
6764 /* If this debug insn references a dead register, drop the
6765 location expression for now. ??? We could try to find the
6766 def and see if propagation is possible. */
6767 if (for_each_rtx (&INSN_VAR_LOCATION_LOC (insn
), is_dead_reg
, counts
))
6769 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
6770 df_insn_rescan (insn
);
6779 /* Scan all the insns and delete any that are dead; i.e., they store a register
6780 that is never used or they copy a register to itself.
6782 This is used to remove insns made obviously dead by cse, loop or other
6783 optimizations. It improves the heuristics in loop since it won't try to
6784 move dead invariants out of loops or make givs for dead quantities. The
6785 remaining passes of the compilation are also sped up. */
6788 delete_trivially_dead_insns (rtx insns
, int nreg
)
6794 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
6795 /* First count the number of times each register is used. */
6796 counts
= XCNEWVEC (int, nreg
);
6797 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
6799 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
6801 /* Go from the last insn to the first and delete insns that only set unused
6802 registers or copy a register to itself. As we delete an insn, remove
6803 usage counts for registers it uses.
6805 The first jump optimization pass may leave a real insn as the last
6806 insn in the function. We must not skip that insn or we may end
6807 up deleting code that is not really dead. */
6808 for (insn
= get_last_insn (); insn
; insn
= prev
)
6812 prev
= PREV_INSN (insn
);
6816 live_insn
= insn_live_p (insn
, counts
);
6818 /* If this is a dead insn, delete it and show registers in it aren't
6821 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
6823 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
6824 delete_insn_and_edges (insn
);
6829 if (dump_file
&& ndead
)
6830 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
6834 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
6838 /* This function is called via for_each_rtx. The argument, NEWREG, is
6839 a condition code register with the desired mode. If we are looking
6840 at the same register in a different mode, replace it with
6844 cse_change_cc_mode (rtx
*loc
, void *data
)
6846 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
6850 && REGNO (*loc
) == REGNO (args
->newreg
)
6851 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
6853 validate_change (args
->insn
, loc
, args
->newreg
, 1);
6860 /* Change the mode of any reference to the register REGNO (NEWREG) to
6861 GET_MODE (NEWREG) in INSN. */
6864 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
6866 struct change_cc_mode_args args
;
6873 args
.newreg
= newreg
;
6875 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
6876 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
6878 /* If the following assertion was triggered, there is most probably
6879 something wrong with the cc_modes_compatible back end function.
6880 CC modes only can be considered compatible if the insn - with the mode
6881 replaced by any of the compatible modes - can still be recognized. */
6882 success
= apply_change_group ();
6883 gcc_assert (success
);
6886 /* Change the mode of any reference to the register REGNO (NEWREG) to
6887 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
6888 any instruction which modifies NEWREG. */
6891 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
6895 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
6897 if (! INSN_P (insn
))
6900 if (reg_set_p (newreg
, insn
))
6903 cse_change_cc_mode_insn (insn
, newreg
);
6907 /* BB is a basic block which finishes with CC_REG as a condition code
6908 register which is set to CC_SRC. Look through the successors of BB
6909 to find blocks which have a single predecessor (i.e., this one),
6910 and look through those blocks for an assignment to CC_REG which is
6911 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
6912 permitted to change the mode of CC_SRC to a compatible mode. This
6913 returns VOIDmode if no equivalent assignments were found.
6914 Otherwise it returns the mode which CC_SRC should wind up with.
6915 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
6916 but is passed unmodified down to recursive calls in order to prevent
6919 The main complexity in this function is handling the mode issues.
6920 We may have more than one duplicate which we can eliminate, and we
6921 try to find a mode which will work for multiple duplicates. */
6923 static enum machine_mode
6924 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
6925 bool can_change_mode
)
6928 enum machine_mode mode
;
6929 unsigned int insn_count
;
6932 enum machine_mode modes
[2];
6938 /* We expect to have two successors. Look at both before picking
6939 the final mode for the comparison. If we have more successors
6940 (i.e., some sort of table jump, although that seems unlikely),
6941 then we require all beyond the first two to use the same
6944 found_equiv
= false;
6945 mode
= GET_MODE (cc_src
);
6947 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6952 if (e
->flags
& EDGE_COMPLEX
)
6955 if (EDGE_COUNT (e
->dest
->preds
) != 1
6956 || e
->dest
== EXIT_BLOCK_PTR
6957 /* Avoid endless recursion on unreachable blocks. */
6958 || e
->dest
== orig_bb
)
6961 end
= NEXT_INSN (BB_END (e
->dest
));
6962 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
6966 if (! INSN_P (insn
))
6969 /* If CC_SRC is modified, we have to stop looking for
6970 something which uses it. */
6971 if (modified_in_p (cc_src
, insn
))
6974 /* Check whether INSN sets CC_REG to CC_SRC. */
6975 set
= single_set (insn
);
6977 && REG_P (SET_DEST (set
))
6978 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
6981 enum machine_mode set_mode
;
6982 enum machine_mode comp_mode
;
6985 set_mode
= GET_MODE (SET_SRC (set
));
6986 comp_mode
= set_mode
;
6987 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
6989 else if (GET_CODE (cc_src
) == COMPARE
6990 && GET_CODE (SET_SRC (set
)) == COMPARE
6992 && rtx_equal_p (XEXP (cc_src
, 0),
6993 XEXP (SET_SRC (set
), 0))
6994 && rtx_equal_p (XEXP (cc_src
, 1),
6995 XEXP (SET_SRC (set
), 1)))
6998 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
6999 if (comp_mode
!= VOIDmode
7000 && (can_change_mode
|| comp_mode
== mode
))
7007 if (insn_count
< ARRAY_SIZE (insns
))
7009 insns
[insn_count
] = insn
;
7010 modes
[insn_count
] = set_mode
;
7011 last_insns
[insn_count
] = end
;
7014 if (mode
!= comp_mode
)
7016 gcc_assert (can_change_mode
);
7019 /* The modified insn will be re-recognized later. */
7020 PUT_MODE (cc_src
, mode
);
7025 if (set_mode
!= mode
)
7027 /* We found a matching expression in the
7028 wrong mode, but we don't have room to
7029 store it in the array. Punt. This case
7033 /* INSN sets CC_REG to a value equal to CC_SRC
7034 with the right mode. We can simply delete
7039 /* We found an instruction to delete. Keep looking,
7040 in the hopes of finding a three-way jump. */
7044 /* We found an instruction which sets the condition
7045 code, so don't look any farther. */
7049 /* If INSN sets CC_REG in some other way, don't look any
7051 if (reg_set_p (cc_reg
, insn
))
7055 /* If we fell off the bottom of the block, we can keep looking
7056 through successors. We pass CAN_CHANGE_MODE as false because
7057 we aren't prepared to handle compatibility between the
7058 further blocks and this block. */
7061 enum machine_mode submode
;
7063 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7064 if (submode
!= VOIDmode
)
7066 gcc_assert (submode
== mode
);
7068 can_change_mode
= false;
7076 /* Now INSN_COUNT is the number of instructions we found which set
7077 CC_REG to a value equivalent to CC_SRC. The instructions are in
7078 INSNS. The modes used by those instructions are in MODES. */
7081 for (i
= 0; i
< insn_count
; ++i
)
7083 if (modes
[i
] != mode
)
7085 /* We need to change the mode of CC_REG in INSNS[i] and
7086 subsequent instructions. */
7089 if (GET_MODE (cc_reg
) == mode
)
7092 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7094 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7098 delete_insn_and_edges (insns
[i
]);
7104 /* If we have a fixed condition code register (or two), walk through
7105 the instructions and try to eliminate duplicate assignments. */
7108 cse_condition_code_reg (void)
7110 unsigned int cc_regno_1
;
7111 unsigned int cc_regno_2
;
7116 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7119 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7120 if (cc_regno_2
!= INVALID_REGNUM
)
7121 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7123 cc_reg_2
= NULL_RTX
;
7132 enum machine_mode mode
;
7133 enum machine_mode orig_mode
;
7135 /* Look for blocks which end with a conditional jump based on a
7136 condition code register. Then look for the instruction which
7137 sets the condition code register. Then look through the
7138 successor blocks for instructions which set the condition
7139 code register to the same value. There are other possible
7140 uses of the condition code register, but these are by far the
7141 most common and the ones which we are most likely to be able
7144 last_insn
= BB_END (bb
);
7145 if (!JUMP_P (last_insn
))
7148 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7150 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7155 cc_src_insn
= NULL_RTX
;
7157 for (insn
= PREV_INSN (last_insn
);
7158 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7159 insn
= PREV_INSN (insn
))
7163 if (! INSN_P (insn
))
7165 set
= single_set (insn
);
7167 && REG_P (SET_DEST (set
))
7168 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7171 cc_src
= SET_SRC (set
);
7174 else if (reg_set_p (cc_reg
, insn
))
7181 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7184 /* Now CC_REG is a condition code register used for a
7185 conditional jump at the end of the block, and CC_SRC, in
7186 CC_SRC_INSN, is the value to which that condition code
7187 register is set, and CC_SRC is still meaningful at the end of
7190 orig_mode
= GET_MODE (cc_src
);
7191 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7192 if (mode
!= VOIDmode
)
7194 gcc_assert (mode
== GET_MODE (cc_src
));
7195 if (mode
!= orig_mode
)
7197 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7199 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7201 /* Do the same in the following insns that use the
7202 current value of CC_REG within BB. */
7203 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7204 NEXT_INSN (last_insn
),
7212 /* Perform common subexpression elimination. Nonzero value from
7213 `cse_main' means that jumps were simplified and some code may now
7214 be unreachable, so do jump optimization again. */
7216 gate_handle_cse (void)
7218 return optimize
> 0;
7222 rest_of_handle_cse (void)
7227 dump_flow_info (dump_file
, dump_flags
);
7229 tem
= cse_main (get_insns (), max_reg_num ());
7231 /* If we are not running more CSE passes, then we are no longer
7232 expecting CSE to be run. But always rerun it in a cheap mode. */
7233 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7237 timevar_push (TV_JUMP
);
7238 rebuild_jump_labels (get_insns ());
7240 timevar_pop (TV_JUMP
);
7242 else if (tem
== 1 || optimize
> 1)
7248 struct rtl_opt_pass pass_cse
=
7253 gate_handle_cse
, /* gate */
7254 rest_of_handle_cse
, /* execute */
7257 0, /* static_pass_number */
7259 0, /* properties_required */
7260 0, /* properties_provided */
7261 0, /* properties_destroyed */
7262 0, /* todo_flags_start */
7263 TODO_df_finish
| TODO_verify_rtl_sharing
|
7266 TODO_verify_flow
, /* todo_flags_finish */
7272 gate_handle_cse2 (void)
7274 return optimize
> 0 && flag_rerun_cse_after_loop
;
7277 /* Run second CSE pass after loop optimizations. */
7279 rest_of_handle_cse2 (void)
7284 dump_flow_info (dump_file
, dump_flags
);
7286 tem
= cse_main (get_insns (), max_reg_num ());
7288 /* Run a pass to eliminate duplicated assignments to condition code
7289 registers. We have to run this after bypass_jumps, because it
7290 makes it harder for that pass to determine whether a jump can be
7292 cse_condition_code_reg ();
7294 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7298 timevar_push (TV_JUMP
);
7299 rebuild_jump_labels (get_insns ());
7301 timevar_pop (TV_JUMP
);
7306 cse_not_expected
= 1;
7311 struct rtl_opt_pass pass_cse2
=
7316 gate_handle_cse2
, /* gate */
7317 rest_of_handle_cse2
, /* execute */
7320 0, /* static_pass_number */
7321 TV_CSE2
, /* tv_id */
7322 0, /* properties_required */
7323 0, /* properties_provided */
7324 0, /* properties_destroyed */
7325 0, /* todo_flags_start */
7326 TODO_df_finish
| TODO_verify_rtl_sharing
|
7329 TODO_verify_flow
/* todo_flags_finish */
7334 gate_handle_cse_after_global_opts (void)
7336 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7339 /* Run second CSE pass after loop optimizations. */
7341 rest_of_handle_cse_after_global_opts (void)
7346 /* We only want to do local CSE, so don't follow jumps. */
7347 save_cfj
= flag_cse_follow_jumps
;
7348 flag_cse_follow_jumps
= 0;
7350 rebuild_jump_labels (get_insns ());
7351 tem
= cse_main (get_insns (), max_reg_num ());
7352 purge_all_dead_edges ();
7353 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7355 cse_not_expected
= !flag_rerun_cse_after_loop
;
7357 /* If cse altered any jumps, rerun jump opts to clean things up. */
7360 timevar_push (TV_JUMP
);
7361 rebuild_jump_labels (get_insns ());
7363 timevar_pop (TV_JUMP
);
7368 flag_cse_follow_jumps
= save_cfj
;
7372 struct rtl_opt_pass pass_cse_after_global_opts
=
7376 "cse_local", /* name */
7377 gate_handle_cse_after_global_opts
, /* gate */
7378 rest_of_handle_cse_after_global_opts
, /* execute */
7381 0, /* static_pass_number */
7383 0, /* properties_required */
7384 0, /* properties_provided */
7385 0, /* properties_destroyed */
7386 0, /* todo_flags_start */
7387 TODO_df_finish
| TODO_verify_rtl_sharing
|
7390 TODO_verify_flow
/* todo_flags_finish */