1 # Copyright
(C
) 1999-2017 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
442 typedef void F (void);
444 void f() __attribute__((ifunc("g")));
451 # Returns true if --gc-sections is supported on the target.
453 proc check_gc_sections_available { } {
454 global gc_sections_available_saved
457 if {![info exists gc_sections_available_saved]} {
458 # Some targets don't support gc
-sections despite whatever
's
459 # advertised by ld's options.
460 if { [istarget alpha
*-*-*]
461 ||
[istarget ia64
-*-*] } {
462 set gc_sections_available_saved
0
466 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
468 if { [board_info target
exists ldflags
]
469 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
470 set gc_sections_available_saved
0
474 # VxWorks kernel modules are relocatable objects linked with
-r
,
475 #
while RTP executables are linked with
-q
(--emit
-relocs
).
476 # Both of these options are incompatible with
--gc
-sections.
477 if { [istarget
*-*-vxworks
*] } {
478 set gc_sections_available_saved
0
482 # Check
if the
ld used by gcc supports
--gc
-sections.
483 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
484 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
485 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
486 set gc_sections_available_saved
1
488 set gc_sections_available_saved
0
491 return $gc_sections_available_saved
494 #
Return 1 if according to target_info struct and explicit target list
495 # target is supposed to support trampolines.
497 proc check_effective_target_trampolines
{ } {
498 if [target_info
exists gcc
,no_trampolines
] {
501 if { [istarget avr
-*-*]
502 ||
[istarget msp430
-*-*]
503 ||
[istarget nvptx
-*-*]
504 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
505 ||
[istarget hppa64
-hp
-hpux11.23
] } {
511 #
Return 1 if target has limited stack size.
513 proc check_effective_target_stack_size
{ } {
514 if [target_info
exists gcc
,stack_size
] {
520 #
Return the value attribute of an effective target
, otherwise
return 0.
522 proc dg
-effective
-target
-value
{ effective_target
} {
523 if { "$effective_target" == "stack_size" } {
524 if [check_effective_target_stack_size
] {
525 return [target_info gcc
,stack_size
]
532 #
Return 1 if signal.h is supported.
534 proc check_effective_target_signal
{ } {
535 if [target_info
exists gcc
,signal_suppress
] {
541 #
Return 1 if according to target_info struct and explicit target list
542 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
543 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
544 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
545 # depend
on this option should
do that
).
547 proc check_effective_target_keeps_null_pointer_checks
{ } {
548 if [target_info
exists keeps_null_pointer_checks
] {
551 if { [istarget avr
-*-*] } {
557 #
Return the autofdo profile wrapper
559 # Linux by default allows
516KB of perf event buffers
560 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
561 # Each individual perf tries to grab it
562 # This causes problems with parallel test suite runs. Instead
563 #
limit us to
8 pages
(32K
), which should be good enough
564 #
for the small test programs. With the default settings
565 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
566 proc profopt
-perf
-wrapper
{ } {
568 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
571 #
Return true
if profiling is supported
on the target.
573 proc check_profiling_available
{ test_what
} {
574 global profiling_available_saved
576 verbose
"Profiling argument is <$test_what>" 1
578 # These conditions depend
on the
argument so examine them before
579 # looking at the
cache variable.
581 # Tree profiling requires TLS runtime support.
582 if { $test_what
== "-fprofile-generate" } {
583 if { ![check_effective_target_tls_runtime
] } {
588 if { $test_what
== "-fauto-profile" } {
589 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
590 verbose
"autofdo only supported on linux"
593 # not cross compiling?
595 verbose
"autofdo not supported for non native builds"
598 set event
[profopt
-perf
-wrapper
]
600 verbose
"autofdo not supported"
604 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
605 if { [lindex $
status 0] != 0 } {
606 verbose
"autofdo not supported because perf does not work"
610 # no good way to check this in advance
-- check later instead.
611 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
612 #
if { [lindex $
status 0] != 255 } {
613 # verbose
"autofdo not supported due to missing create_gcov"
618 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
619 # vendor compiler. We cannot reliably predict the directory where the
620 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
621 # necessarily find mcrt1.o even if we have it.
622 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
626 # We don't yet support profiling
for MIPS16.
627 if { [istarget mips
*-*-*]
628 && ![check_effective_target_nomips16
]
629 && ($test_what
== "-p" || $test_what == "-pg") } {
633 # MinGW does not support
-p.
634 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
638 # cygwin does not support
-p.
639 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
643 # uClibc does not have gcrt1.o.
644 if { [check_effective_target_uclibc
]
645 && ($test_what
== "-p" || $test_what == "-pg") } {
649 # Now examine the
cache variable.
650 if {![info exists profiling_available_saved
]} {
651 # Some targets don
't have any implementation of __bb_init_func or are
652 # missing other needed machinery.
653 if {[istarget aarch64*-*-elf]
654 || [istarget am3*-*-linux*]
655 || [istarget arm*-*-eabi*]
656 || [istarget arm*-*-elf]
657 || [istarget arm*-*-symbianelf*]
658 || [istarget avr-*-*]
659 || [istarget bfin-*-*]
660 || [istarget cris-*-*]
661 || [istarget crisv32-*-*]
662 || [istarget fido-*-elf]
663 || [istarget h8300-*-*]
664 || [istarget lm32-*-*]
665 || [istarget m32c-*-elf]
666 || [istarget m68k-*-elf]
667 || [istarget m68k-*-uclinux*]
668 || [istarget mips*-*-elf*]
669 || [istarget mmix-*-*]
670 || [istarget mn10300-*-elf*]
671 || [istarget moxie-*-elf*]
672 || [istarget msp430-*-*]
673 || [istarget nds32*-*-elf]
674 || [istarget nios2-*-elf]
675 || [istarget nvptx-*-*]
676 || [istarget powerpc-*-eabi*]
677 || [istarget powerpc-*-elf]
679 || [istarget tic6x-*-elf]
680 || [istarget visium-*-*]
681 || [istarget xstormy16-*]
682 || [istarget xtensa*-*-elf]
683 || [istarget *-*-rtems*]
684 || [istarget *-*-vxworks*] } {
685 set profiling_available_saved 0
687 set profiling_available_saved 1
691 # -pg link test result can't be cached since it may change between
693 set profiling_working $profiling_available_saved
694 if { $profiling_available_saved
== 1
695 && ![check_no_compiler_messages_nocache profiling executable
{
696 int main
() { return 0; } } "-pg"] } {
697 set profiling_working
0
700 return $profiling_working
703 # Check to see
if a target is
"freestanding". This is as per the definition
704 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
705 # extra headers or libraries other than what is considered essential.
706 proc check_effective_target_freestanding
{ } {
707 if { [istarget nvptx
-*-*] } {
713 #
Return 1 if target has packed layout of structure members by
714 # default
, 0 otherwise. Note that this is slightly different than
715 # whether the target has
"natural alignment": both attributes may be
718 proc check_effective_target_default_packed
{ } {
719 return [check_no_compiler_messages default_packed assembly
{
720 struct x
{ char a
; long b
; } c
;
721 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
725 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
726 # documentation
, where the test also comes from.
728 proc check_effective_target_pcc_bitfield_type_matters
{ } {
729 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
730 # bitfields, but let's stick to the example code from the docs.
731 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
732 struct foo1
{ char x
; char
:0; char y
; };
733 struct foo2
{ char x
; int :0; char y
; };
734 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
738 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
740 proc add_options_for_tls
{ flags
} {
741 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
742 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
743 # Need to duplicate native TLS check from
744 # check_effective_target_tls_native to avoid recursion.
745 if { ([istarget powerpc
-ibm
-aix
*]) &&
746 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
748 int f
(void
) { return i
; }
749 void g
(int j
) { i
= j
; }
751 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
756 #
Return 1 if indirect jumps are supported
, 0 otherwise.
758 proc check_effective_target_indirect_jumps
{} {
759 if { [istarget nvptx
-*-*] } {
765 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
767 proc check_effective_target_nonlocal_goto
{} {
768 if { [istarget nvptx
-*-*] } {
774 #
Return 1 if global constructors are supported
, 0 otherwise.
776 proc check_effective_target_global_constructor
{} {
777 if { [istarget nvptx
-*-*] } {
783 #
Return 1 if taking label
values is supported
, 0 otherwise.
785 proc check_effective_target_label_values
{} {
786 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
793 #
Return 1 if builtin_return_address and builtin_frame_address are
794 # supported
, 0 otherwise.
796 proc check_effective_target_return_address
{} {
797 if { [istarget nvptx
-*-*] } {
803 #
Return 1 if the assembler does not verify function types against
804 # calls
, 0 otherwise. Such verification will typically
show up problems
805 # with K
&R C function declarations.
807 proc check_effective_target_untyped_assembly
{} {
808 if { [istarget nvptx
-*-*] } {
814 #
Return 1 if alloca is supported
, 0 otherwise.
816 proc check_effective_target_alloca
{} {
817 if { [istarget nvptx
-*-*] } {
818 return [check_no_compiler_messages alloca assembly
{
820 void g
(int n
) { f
(__builtin_alloca
(n
)); }
826 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
828 proc check_effective_target_tls
{} {
829 return [check_no_compiler_messages tls assembly
{
831 int f
(void
) { return i
; }
832 void g
(int j
) { i
= j
; }
836 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
838 proc check_effective_target_tls_native
{} {
839 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
840 # functions
, so we fail to automatically detect it.
841 if { [istarget
*-*-vxworks
*] } {
845 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
847 int f
(void
) { return i
; }
848 void g
(int j
) { i
= j
; }
852 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
854 proc check_effective_target_tls_emulated
{} {
855 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
856 # functions
, so we fail to automatically detect it.
857 if { [istarget
*-*-vxworks
*] } {
861 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
863 int f
(void
) { return i
; }
864 void g
(int j
) { i
= j
; }
868 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
870 proc check_effective_target_tls_runtime
{} {
871 # The runtime does not have TLS support
, but just
872 # running the test below is insufficient to
show this.
873 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
876 return [check_runtime tls_runtime
{
877 __thread
int thr
= 0;
878 int main
(void
) { return thr
; }
879 } [add_options_for_tls
""]]
882 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
884 proc check_effective_target_cas_char
{} {
885 return [check_no_compiler_messages cas_char assembly
{
886 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
892 proc check_effective_target_cas_int
{} {
893 return [check_no_compiler_messages cas_int assembly
{
894 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
896 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
904 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
906 proc check_effective_target_function_sections
{} {
907 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
908 if { [istarget
*-*-darwin
*] } {
912 return [check_no_compiler_messages functionsections assembly
{
914 } "-ffunction-sections"]
917 #
Return 1 if instruction scheduling is available
, 0 otherwise.
919 proc check_effective_target_scheduling
{} {
920 return [check_no_compiler_messages scheduling object
{
922 } "-fschedule-insns"]
925 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
927 proc check_effective_target_trapping
{} {
928 return [check_no_compiler_messages trapping object
{
929 int add
(int a
, int b
) { return a
+ b
; }
933 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
936 proc check_effective_target_fgraphite
{} {
937 return [check_no_compiler_messages fgraphite object
{
942 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
945 proc check_effective_target_fopenacc
{} {
946 # nvptx can be built with the device
-side bits of openacc
, but it
947 # does not make sense to test it as an openacc host.
948 if [istarget nvptx
-*-*] { return 0 }
950 return [check_no_compiler_messages fopenacc object
{
955 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
958 proc check_effective_target_fopenmp
{} {
959 # nvptx can be built with the device
-side bits of libgomp
, but it
960 # does not make sense to test it as an openmp host.
961 if [istarget nvptx
-*-*] { return 0 }
963 return [check_no_compiler_messages fopenmp object
{
968 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
971 proc check_effective_target_fgnu_tm
{} {
972 return [check_no_compiler_messages fgnu_tm object
{
977 #
Return 1 if the target supports mmap
, 0 otherwise.
979 proc check_effective_target_mmap
{} {
980 return [check_function_available
"mmap"]
983 #
Return 1 if the target supports dlopen
, 0 otherwise.
984 proc check_effective_target_dlopen
{} {
985 return [check_no_compiler_messages dlopen executable
{
987 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
988 } [add_options_for_dlopen
""]]
991 proc add_options_for_dlopen
{ flags
} {
995 #
Return 1 if the target supports clone
, 0 otherwise.
996 proc check_effective_target_clone
{} {
997 return [check_function_available
"clone"]
1000 #
Return 1 if the target supports setrlimit
, 0 otherwise.
1001 proc check_effective_target_setrlimit
{} {
1002 # Darwin has non
-posix compliant RLIMIT_AS
1003 if { [istarget
*-*-darwin
*] } {
1006 return [check_function_available
"setrlimit"]
1009 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1010 proc check_effective_target_gettimeofday
{} {
1011 return [check_function_available
"gettimeofday"]
1014 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1015 proc check_effective_target_swapcontext
{} {
1016 return [check_no_compiler_messages swapcontext executable
{
1017 #
include <ucontext.h
>
1020 ucontext_t orig_context
,child_context
;
1021 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1026 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1027 # code
, 0 otherwise.
1029 proc check_effective_target_pthread
{} {
1030 return [check_no_compiler_messages pthread object
{
1035 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1036 # code
, 0 otherwise.
1038 proc check_effective_target_stabs
{} {
1039 return [check_no_compiler_messages stabs object
{
1044 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1045 #
for trivial code
, 0 otherwise.
1047 proc check_effective_target_pe_aligned_commons
{} {
1048 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1049 return [check_no_compiler_messages pe_aligned_commons object
{
1051 } "-mpe-aligned-commons"]
1056 #
Return 1 if the target supports
-static
1057 proc check_effective_target_static
{} {
1058 return [check_no_compiler_messages static executable
{
1059 int main
(void
) { return 0; }
1063 #
Return 1 if the target supports
-fstack
-protector
1064 proc check_effective_target_fstack_protector
{} {
1065 return [check_runtime fstack_protector
{
1066 int main
(void
) { return 0; }
1067 } "-fstack-protector"]
1070 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1071 proc check_stack_check_available
{ stack_kind
} {
1072 if [string match
"" $stack_kind] then {
1073 set stack_opt
"-fstack-check"
1074 } else { set stack_opt
"-fstack-check=$stack_kind" }
1076 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1077 int main
(void
) { return 0; }
1081 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1082 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1083 # warn when
-fprofile
-use is also supplied we test that combination too.
1085 proc check_effective_target_freorder
{} {
1086 if { [check_no_compiler_messages freorder object
{
1088 } "-freorder-blocks-and-partition"]
1089 && [check_no_compiler_messages fprofile_use_freorder object
{
1091 } "-fprofile-use -freorder-blocks-and-partition"] } {
1097 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1098 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1099 # out of scope
for this test.
1101 proc check_effective_target_fpic
{ } {
1102 # Note that M68K has a multilib that supports
-fpic but not
1103 #
-fPIC
, so we need to check both. We test with a
program that
1104 # requires GOT references.
1105 foreach
arg {fpic fPIC
} {
1106 if [check_no_compiler_messages $
arg object
{
1107 extern
int foo
(void
); extern
int bar
;
1108 int baz
(void
) { return foo
() + bar
; }
1116 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1117 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1118 # assumes compiler will give warning if -fpic not supported. Here we check
1119 # whether binutils supports those new -fpic relocation modifiers, and assume
1120 # -fpic is supported if there is binutils support. GCC configuration will
1121 # enable -fpic for AArch64 in this case.
1123 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1124 # memory model -fpic relocation types.
1126 proc check_effective_target_aarch64_small_fpic { } {
1127 if { [istarget aarch64*-*-*] } {
1128 return [check_no_compiler_messages aarch64_small_fpic object {
1129 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1136 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1137 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1138 # in binutils since
2015-03-04 as PR gas
/17843.
1140 # This test directive make sure binutils support all features needed by TLS LE
1141 # under
-mtls
-size
=32 on AArch64.
1143 proc check_effective_target_aarch64_tlsle32
{ } {
1144 if { [istarget aarch64
*-*-*] } {
1145 return [check_no_compiler_messages aarch64_tlsle32 object
{
1146 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1153 #
Return 1 if -shared is supported
, as in no warnings or errors
1154 # emitted
, 0 otherwise.
1156 proc check_effective_target_shared
{ } {
1157 # Note that M68K has a multilib that supports
-fpic but not
1158 #
-fPIC
, so we need to check both. We test with a
program that
1159 # requires GOT references.
1160 return [check_no_compiler_messages shared executable
{
1161 extern
int foo
(void
); extern
int bar
;
1162 int baz
(void
) { return foo
() + bar
; }
1166 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1168 proc check_effective_target_pie
{ } {
1169 if { [istarget
*-*-darwin\
[912\
]*]
1170 ||
[istarget
*-*-dragonfly
*]
1171 ||
[istarget
*-*-freebsd
*]
1172 ||
[istarget
*-*-linux
*]
1173 ||
[istarget
*-*-gnu
*] } {
1176 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1177 # Full PIE support was added in Solaris
11.x and Solaris
12, but gcc
1178 # errors out
if missing
, so check
for that.
1179 return [check_no_compiler_messages pie executable
{
1180 int main
(void
) { return 0; }
1186 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1188 proc check_effective_target_mpaired_single
{ } {
1189 return [check_no_compiler_messages mpaired_single object
{
1191 } "-mpaired-single"]
1194 #
Return true
if the target has access to FPU instructions.
1196 proc check_effective_target_hard_float
{ } {
1197 if { [istarget mips
*-*-*] } {
1198 return [check_no_compiler_messages hard_float assembly
{
1199 #
if (defined __mips_soft_float || defined __mips16
)
1200 #error __mips_soft_float || __mips16
1205 # This proc is actually checking the availabilty of FPU
1206 # support
for doubles
, so
on the RX we must fail
if the
1207 #
64-bit double multilib has been selected.
1208 if { [istarget rx
-*-*] } {
1210 #
return [check_no_compiler_messages hard_float assembly
{
1211 #
if defined __RX_64_BIT_DOUBLES__
1212 #error __RX_64_BIT_DOUBLES__
1217 # The generic test equates hard_float with
"no call for adding doubles".
1218 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1219 double a
(double b
, double c
) { return b
+ c
; }
1223 #
Return true
if the target is a
64-bit MIPS target.
1225 proc check_effective_target_mips64
{ } {
1226 return [check_no_compiler_messages mips64 assembly
{
1233 #
Return true
if the target is a MIPS target that does not produce
1236 proc check_effective_target_nomips16
{ } {
1237 return [check_no_compiler_messages nomips16 object
{
1241 /* A cheap way of testing
for -mflip
-mips16.
*/
1242 void foo
(void
) { asm
("addiu $20,$20,1"); }
1243 void bar
(void
) { asm
("addiu $20,$20,1"); }
1248 # Add the options needed
for MIPS16 function attributes. At the moment
,
1249 # we don
't support MIPS16 PIC.
1251 proc add_options_for_mips16_attribute { flags } {
1252 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1255 # Return true if we can force a mode that allows MIPS16 code generation.
1256 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1259 proc check_effective_target_mips16_attribute
{ } {
1260 return [check_no_compiler_messages mips16_attribute assembly
{
1264 #
if defined __mips_hard_float \
1265 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1266 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1267 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1269 } [add_options_for_mips16_attribute
""]]
1272 #
Return 1 if the target supports long double larger than double when
1273 # using the new ABI
, 0 otherwise.
1275 proc check_effective_target_mips_newabi_large_long_double
{ } {
1276 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1277 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1281 #
Return true
if the target is a MIPS target that has access
1282 # to the LL and SC instructions.
1284 proc check_effective_target_mips_llsc
{ } {
1285 if { ![istarget mips
*-*-*] } {
1288 # Assume that these instructions are always implemented
for
1289 # non
-elf
* targets
, via emulation
if necessary.
1290 if { ![istarget
*-*-elf
*] } {
1293 # Otherwise assume LL
/SC support
for everything but MIPS I.
1294 return [check_no_compiler_messages mips_llsc assembly
{
1301 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1303 proc check_effective_target_mips_rel
{ } {
1304 if { ![istarget mips
*-*-*] } {
1307 return [check_no_compiler_messages mips_rel object
{
1308 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1309 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1310 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1315 #
Return true
if the target is a MIPS target that uses the EABI.
1317 proc check_effective_target_mips_eabi
{ } {
1318 if { ![istarget mips
*-*-*] } {
1321 return [check_no_compiler_messages mips_eabi object
{
1328 #
Return 1 if the current multilib does not generate PIC by default.
1330 proc check_effective_target_nonpic
{ } {
1331 return [check_no_compiler_messages nonpic assembly
{
1338 #
Return 1 if the current multilib generates PIE by default.
1340 proc check_effective_target_pie_enabled
{ } {
1341 return [check_no_compiler_messages pie_enabled assembly
{
1348 #
Return 1 if the target generates
-fstack
-protector by default.
1350 proc check_effective_target_fstack_protector_enabled
{} {
1351 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1352 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1353 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1359 #
Return 1 if the target does not use a
status wrapper.
1361 proc check_effective_target_unwrapped
{ } {
1362 if { [target_info needs_status_wrapper
] != "" \
1363 && [target_info needs_status_wrapper
] != "0" } {
1369 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1371 proc check_iconv_available
{ test_what
} {
1374 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1375 if { ![info exists libiconv
] } {
1376 set libiconv
"-liconv"
1378 set test_what
[lindex $test_what
1]
1379 return [check_runtime_nocache $test_what
[subst
{
1385 cd
= iconv_open
("$test_what", "UTF-8");
1386 if (cd
== (iconv_t
) -1)
1393 #
Return true
if Cilk Library is supported
on the target.
1394 proc check_effective_target_cilkplus_runtime
{ } {
1395 return [ check_no_compiler_messages_nocache cilkplus_runtime executable
{
1399 int __cilkrts_set_param
(const char
*, const char
*);
1401 int x
= __cilkrts_set_param
("nworkers", "0");
1404 } "-fcilkplus -lcilkrts" ]
1407 #
Return true
if the atomic library is supported
on the target.
1408 proc check_effective_target_libatomic_available
{ } {
1409 return [check_no_compiler_messages libatomic_available executable
{
1410 int main
(void
) { return 0; }
1414 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1416 proc check_ascii_locale_available
{ } {
1420 #
Return true
if named sections are supported
on this target.
1422 proc check_named_sections_available
{ } {
1423 return [check_no_compiler_messages named_sections assembly
{
1424 int __attribute__
((section
("whatever"))) foo;
1428 #
Return true
if the
"naked" function attribute is supported on this target.
1430 proc check_effective_target_naked_functions
{ } {
1431 return [check_no_compiler_messages naked_functions assembly
{
1432 void f
() __attribute__
((naked
));
1436 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1439 # When the target
name changes
, replace the cached result.
1441 proc check_effective_target_fortran_large_real
{ } {
1442 return [check_no_compiler_messages fortran_large_real executable
{
1444 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1451 #
Return 1 if the target supports Fortran real kind real
(16),
1452 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1453 # this checks
for Real
(16) only
; the other returned real
(10) if
1454 # both real
(10) and real
(16) are available.
1456 # When the target
name changes
, replace the cached result.
1458 proc check_effective_target_fortran_real_16
{ } {
1459 return [check_no_compiler_messages fortran_real_16 executable
{
1467 #
Return 1 if the target supports Fortran real kind
10,
1468 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1469 # this checks
for real
(10) only.
1471 # When the target
name changes
, replace the cached result.
1473 proc check_effective_target_fortran_real_10
{ } {
1474 return [check_no_compiler_messages fortran_real_10 executable
{
1482 #
Return 1 if the target supports Fortran
's IEEE modules,
1485 # When the target name changes, replace the cached result.
1487 proc check_effective_target_fortran_ieee { flags } {
1488 return [check_no_compiler_messages fortran_ieee executable {
1490 use, intrinsic :: ieee_features
1496 # Return 1 if the target supports SQRT for the largest floating-point
1497 # type. (Some targets lack the libm support for this FP type.)
1498 # On most targets, this check effectively checks either whether sqrtl is
1499 # available or on __float128 systems whether libquadmath is installed,
1500 # which provides sqrtq.
1502 # When the target name changes, replace the cached result.
1504 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1505 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1507 use iso_fortran_env, only: real_kinds
1508 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1509 real(kind=maxFP), volatile :: x
1517 # Return 1 if the target supports Fortran integer kinds larger than
1518 # integer(8), 0 otherwise.
1520 # When the target name changes, replace the cached result.
1522 proc check_effective_target_fortran_large_int { } {
1523 return [check_no_compiler_messages fortran_large_int executable {
1525 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1526 integer(kind=k) :: i
1531 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1533 # When the target name changes, replace the cached result.
1535 proc check_effective_target_fortran_integer_16 { } {
1536 return [check_no_compiler_messages fortran_integer_16 executable {
1543 # Return 1 if we can statically link libgfortran, 0 otherwise.
1545 # When the target name changes, replace the cached result.
1547 proc check_effective_target_static_libgfortran { } {
1548 return [check_no_compiler_messages static_libgfortran executable {
1555 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1557 proc check_effective_target_rdynamic { } {
1558 return [check_no_compiler_messages rdynamic executable {
1559 int main() { return 0; }
1563 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1565 proc check_effective_target_cilkplus { } {
1566 # Skip cilk-plus tests on int16 and size16 targets for now.
1567 # The cilk-plus tests are not generic enough to cover these
1568 # cases and would throw hundreds of FAILs.
1569 if { [check_effective_target_int16]
1570 || ![check_effective_target_size32plus] } {
1574 # Skip AVR, its RAM is too small and too many tests would fail.
1575 if { [istarget avr-*-*] } {
1579 if { ! [check_effective_target_pthread] } {
1586 proc check_linker_plugin_available { } {
1587 return [check_no_compiler_messages_nocache linker_plugin executable {
1588 int main() { return 0; }
1589 } "-flto -fuse-linker-plugin"]
1592 # Return 1 if the target OS supports running SSE executables, 0
1593 # otherwise. Cache the result.
1595 proc check_sse_os_support_available { } {
1596 return [check_cached_effective_target sse_os_support_available {
1597 # If this is not the right target then we can skip the test.
1598 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1600 } elseif { [istarget i?86-*-solaris2*] } {
1601 # The Solaris 2 kernel doesn't save and restore SSE registers
1602 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1603 check_runtime_nocache sse_os_support_available
{
1606 asm volatile
("movaps %xmm0,%xmm0");
1616 #
Return 1 if the target OS supports running AVX executables
, 0
1617 # otherwise.
Cache the result.
1619 proc check_avx_os_support_available
{ } {
1620 return [check_cached_effective_target avx_os_support_available
{
1621 #
If this is not the right target
then we can skip the test.
1622 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1625 # Check that OS has AVX and SSE saving enabled.
1626 check_runtime_nocache avx_os_support_available
{
1629 unsigned
int eax
, edx
;
1631 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1632 return (eax
& 0x06) != 0x06;
1639 #
Return 1 if the target OS supports running AVX executables
, 0
1640 # otherwise.
Cache the result.
1642 proc check_avx512_os_support_available
{ } {
1643 return [check_cached_effective_target avx512_os_support_available
{
1644 #
If this is not the right target
then we can skip the test.
1645 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1648 # Check that OS has AVX512
, AVX and SSE saving enabled.
1649 check_runtime_nocache avx512_os_support_available
{
1652 unsigned
int eax
, edx
;
1654 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1655 return (eax
& 0xe6) != 0xe6;
1662 #
Return 1 if the target supports executing SSE instructions
, 0
1663 # otherwise.
Cache the result.
1665 proc check_sse_hw_available
{ } {
1666 return [check_cached_effective_target sse_hw_available
{
1667 #
If this is not the right target
then we can skip the test.
1668 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1671 check_runtime_nocache sse_hw_available
{
1675 unsigned
int eax
, ebx
, ecx
, edx
;
1676 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1679 return !(edx
& bit_SSE
);
1686 #
Return 1 if the target supports executing SSE2 instructions
, 0
1687 # otherwise.
Cache the result.
1689 proc check_sse2_hw_available
{ } {
1690 return [check_cached_effective_target sse2_hw_available
{
1691 #
If this is not the right target
then we can skip the test.
1692 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1695 check_runtime_nocache sse2_hw_available
{
1699 unsigned
int eax
, ebx
, ecx
, edx
;
1700 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1703 return !(edx
& bit_SSE2
);
1710 #
Return 1 if the target supports executing SSE4 instructions
, 0
1711 # otherwise.
Cache the result.
1713 proc check_sse4_hw_available
{ } {
1714 return [check_cached_effective_target sse4_hw_available
{
1715 #
If this is not the right target
then we can skip the test.
1716 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1719 check_runtime_nocache sse4_hw_available
{
1723 unsigned
int eax
, ebx
, ecx
, edx
;
1724 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1727 return !(ecx
& bit_SSE4_2
);
1734 #
Return 1 if the target supports executing AVX instructions
, 0
1735 # otherwise.
Cache the result.
1737 proc check_avx_hw_available
{ } {
1738 return [check_cached_effective_target avx_hw_available
{
1739 #
If this is not the right target
then we can skip the test.
1740 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1743 check_runtime_nocache avx_hw_available
{
1747 unsigned
int eax
, ebx
, ecx
, edx
;
1748 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1751 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1752 != (bit_AVX | bit_OSXSAVE
));
1759 #
Return 1 if the target supports executing AVX2 instructions
, 0
1760 # otherwise.
Cache the result.
1762 proc check_avx2_hw_available
{ } {
1763 return [check_cached_effective_target avx2_hw_available
{
1764 #
If this is not the right target
then we can skip the test.
1765 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1768 check_runtime_nocache avx2_hw_available
{
1773 unsigned
int eax
, ebx
, ecx
, edx
;
1775 if (__get_cpuid_max
(0, NULL
) < 7)
1778 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1780 if (!(ecx
& bit_OSXSAVE
))
1783 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1785 return !(ebx
& bit_AVX2
);
1792 #
Return 1 if the target supports executing AVX512 foundation instructions
, 0
1793 # otherwise.
Cache the result.
1795 proc check_avx512f_hw_available
{ } {
1796 return [check_cached_effective_target avx512f_hw_available
{
1797 #
If this is not the right target
then we can skip the test.
1798 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1801 check_runtime_nocache avx512f_hw_available
{
1806 unsigned
int eax
, ebx
, ecx
, edx
;
1808 if (__get_cpuid_max
(0, NULL
) < 7)
1811 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1813 if (!(ecx
& bit_OSXSAVE
))
1816 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1818 return !(ebx
& bit_AVX512F
);
1825 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1827 proc check_effective_target_sse_runtime
{ } {
1828 if { [check_effective_target_sse
]
1829 && [check_sse_hw_available
]
1830 && [check_sse_os_support_available
] } {
1836 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1838 proc check_effective_target_sse2_runtime
{ } {
1839 if { [check_effective_target_sse2
]
1840 && [check_sse2_hw_available
]
1841 && [check_sse_os_support_available
] } {
1847 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1849 proc check_effective_target_sse4_runtime
{ } {
1850 if { [check_effective_target_sse4
]
1851 && [check_sse4_hw_available
]
1852 && [check_sse_os_support_available
] } {
1858 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1860 proc check_effective_target_avx_runtime
{ } {
1861 if { [check_effective_target_avx
]
1862 && [check_avx_hw_available
]
1863 && [check_avx_os_support_available
] } {
1869 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1871 proc check_effective_target_avx2_runtime
{ } {
1872 if { [check_effective_target_avx2
]
1873 && [check_avx2_hw_available
]
1874 && [check_avx_os_support_available
] } {
1880 #
Return 1 if the target supports running AVX512f executables
, 0 otherwise.
1882 proc check_effective_target_avx512f_runtime
{ } {
1883 if { [check_effective_target_avx512f
]
1884 && [check_avx512f_hw_available
]
1885 && [check_avx512_os_support_available
] } {
1891 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1892 #
0 otherwise.
Cache the result.
1894 proc check_mpaired_single_hw_available
{ } {
1895 return [check_cached_effective_target mpaired_single_hw_available
{
1896 #
If this is not the right target
then we can skip the test.
1897 if { !([istarget mips
*-*-*]) } {
1900 check_runtime_nocache mpaired_single_hw_available
{
1903 asm volatile
("pll.ps $f2,$f4,$f6");
1911 #
Return 1 if the target supports executing Loongson vector instructions
,
1912 #
0 otherwise.
Cache the result.
1914 proc check_mips_loongson_hw_available
{ } {
1915 return [check_cached_effective_target mips_loongson_hw_available
{
1916 #
If this is not the right target
then we can skip the test.
1917 if { !([istarget mips
*-*-*]) } {
1920 check_runtime_nocache mips_loongson_hw_available
{
1921 #
include <loongson.h
>
1924 asm volatile
("paddw $f2,$f4,$f6");
1932 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1933 # otherwise.
Cache the result.
1935 proc check_mips_msa_hw_available
{ } {
1936 return [check_cached_effective_target mips_msa_hw_available
{
1937 #
If this is not the right target
then we can skip the test.
1938 if { !([istarget mips
*-*-*]) } {
1941 check_runtime_nocache mips_msa_hw_available
{
1942 #
if !defined
(__mips_msa
)
1943 #error
"MSA NOT AVAIL"
1945 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1946 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1948 #
if !defined
(__mips_hard_float
)
1949 #error
"MSA HARD_FLOAT REQUIRED"
1951 #
if __mips_fpr
!= 64
1952 #error
"MSA 64-bit FPR REQUIRED"
1958 v8i16 v
= __builtin_msa_ldi_h
(0);
1968 #
Return 1 if the target supports running MIPS Paired
-Single
1969 # executables
, 0 otherwise.
1971 proc check_effective_target_mpaired_single_runtime
{ } {
1972 if { [check_effective_target_mpaired_single
]
1973 && [check_mpaired_single_hw_available
] } {
1979 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1981 proc check_effective_target_mips_loongson_runtime
{ } {
1982 if { [check_effective_target_mips_loongson
]
1983 && [check_mips_loongson_hw_available
] } {
1989 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1991 proc check_effective_target_mips_msa_runtime
{ } {
1992 if { [check_effective_target_mips_msa
]
1993 && [check_mips_msa_hw_available
] } {
1999 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
2000 #
move instructions
for moves from GPR to FPR.
2002 proc check_effective_target_powerpc64_no_dm
{ } {
2003 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
2004 # checks
if we
do not use direct moves
, but use the old
-fashioned
2005 # slower
move-via
-the
-stack.
2006 return [check_no_messages_and_pattern powerpc64_no_dm \
2007 {\mmulld\M.
*\mlfd
} assembly
{
2008 double f
(long long x
) { return x
*x
; }
2012 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
2013 # including having a new enough library to support the test.
Cache the result.
2014 # Require at least a power7 to run
on.
2016 proc check_ppc_cpu_supports_hw_available
{ } {
2017 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
2018 # Some simulators are known to not support VSX
/power8 instructions.
2019 #
For now
, disable
on Darwin
2020 if { [istarget powerpc
-*-eabi
]
2021 ||
[istarget powerpc
*-*-eabispe
]
2022 ||
[istarget
*-*-darwin
*]} {
2026 check_runtime_nocache ppc_cpu_supports_hw_available
{
2030 asm volatile
("xxlor vs0,vs0,vs0");
2032 asm volatile
("xxlor 0,0,0");
2034 if (!__builtin_cpu_supports
("vsx"))
2043 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
2044 # otherwise.
Cache the result.
2046 proc check_750cl_hw_available
{ } {
2047 return [check_cached_effective_target
750cl_hw_available
{
2048 #
If this is not the right target
then we can skip the test.
2049 if { ![istarget powerpc
-*paired
*] } {
2052 check_runtime_nocache
750cl_hw_available
{
2056 asm volatile
("ps_mul v0,v0,v0");
2058 asm volatile
("ps_mul 0,0,0");
2067 #
Return 1 if the target supports executing power8 vector instructions
, 0
2068 # otherwise.
Cache the result.
2070 proc check_p8vector_hw_available
{ } {
2071 return [check_cached_effective_target p8vector_hw_available
{
2072 # Some simulators are known to not support VSX
/power8 instructions.
2073 #
For now
, disable
on Darwin
2074 if { [istarget powerpc
-*-eabi
]
2075 ||
[istarget powerpc
*-*-eabispe
]
2076 ||
[istarget
*-*-darwin
*]} {
2079 set options
"-mpower8-vector"
2080 check_runtime_nocache p8vector_hw_available
{
2084 asm volatile
("xxlorc vs0,vs0,vs0");
2086 asm volatile
("xxlorc 0,0,0");
2095 #
Return 1 if the target supports executing power9 vector instructions
, 0
2096 # otherwise.
Cache the result.
2098 proc check_p9vector_hw_available
{ } {
2099 return [check_cached_effective_target p9vector_hw_available
{
2100 # Some simulators are known to not support VSX
/power8
/power9
2101 # instructions.
For now
, disable
on Darwin.
2102 if { [istarget powerpc
-*-eabi
]
2103 ||
[istarget powerpc
*-*-eabispe
]
2104 ||
[istarget
*-*-darwin
*]} {
2107 set options
"-mpower9-vector"
2108 check_runtime_nocache p9vector_hw_available
{
2112 vector double v
= (vector double
) { 0.0, 0.0 };
2113 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2121 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2122 # otherwise.
Cache the result.
2124 proc check_p9modulo_hw_available
{ } {
2125 return [check_cached_effective_target p9modulo_hw_available
{
2126 # Some simulators are known to not support VSX
/power8
/power9
2127 # instructions.
For now
, disable
on Darwin.
2128 if { [istarget powerpc
-*-eabi
]
2129 ||
[istarget powerpc
*-*-eabispe
]
2130 ||
[istarget
*-*-darwin
*]} {
2133 set options
"-mmodulo"
2134 check_runtime_nocache p9modulo_hw_available
{
2137 int i
= 5, j
= 3, r
= -1;
2138 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2146 #
Return 1 if the target supports executing __float128
on PowerPC via software
2147 # emulation
, 0 otherwise.
Cache the result.
2149 proc check_ppc_float128_sw_available
{ } {
2150 return [check_cached_effective_target ppc_float128_sw_available
{
2151 # Some simulators are known to not support VSX
/power8
/power9
2152 # instructions.
For now
, disable
on Darwin.
2153 if { [istarget powerpc
-*-eabi
]
2154 ||
[istarget powerpc
*-*-eabispe
]
2155 ||
[istarget
*-*-darwin
*]} {
2158 set options
"-mfloat128 -mvsx"
2159 check_runtime_nocache ppc_float128_sw_available
{
2160 volatile __float128 x
= 1.0q
;
2161 volatile __float128 y
= 2.0q
;
2164 __float128 z
= x
+ y
;
2172 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2173 # hardware instructions
, 0 otherwise.
Cache the result.
2175 proc check_ppc_float128_hw_available
{ } {
2176 return [check_cached_effective_target ppc_float128_hw_available
{
2177 # Some simulators are known to not support VSX
/power8
/power9
2178 # instructions.
For now
, disable
on Darwin.
2179 if { [istarget powerpc
-*-eabi
]
2180 ||
[istarget powerpc
*-*-eabispe
]
2181 ||
[istarget
*-*-darwin
*]} {
2184 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2185 check_runtime_nocache ppc_float128_hw_available
{
2186 volatile __float128 x
= 1.0q
;
2187 volatile __float128 y
= 2.0q
;
2190 __float128 z
= x
+ y
;
2191 __float128 w
= -1.0q
;
2193 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2194 return ((z
!= 3.0q
) ||
(z
!= w
);
2201 #
Return 1 if the target supports executing VSX instructions
, 0
2202 # otherwise.
Cache the result.
2204 proc check_vsx_hw_available
{ } {
2205 return [check_cached_effective_target vsx_hw_available
{
2206 # Some simulators are known to not support VSX instructions.
2207 #
For now
, disable
on Darwin
2208 if { [istarget powerpc
-*-eabi
]
2209 ||
[istarget powerpc
*-*-eabispe
]
2210 ||
[istarget
*-*-darwin
*]} {
2214 check_runtime_nocache vsx_hw_available
{
2218 asm volatile
("xxlor vs0,vs0,vs0");
2220 asm volatile
("xxlor 0,0,0");
2229 #
Return 1 if the target supports executing AltiVec instructions
, 0
2230 # otherwise.
Cache the result.
2232 proc check_vmx_hw_available
{ } {
2233 return [check_cached_effective_target vmx_hw_available
{
2234 # Some simulators are known to not support VMX instructions.
2235 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2238 # Most targets don
't require special flags for this test case, but
2239 # Darwin does. Just to be sure, make sure VSX is not enabled for
2240 # the altivec tests.
2241 if { [istarget *-*-darwin*]
2242 || [istarget *-*-aix*] } {
2243 set options "-maltivec -mno-vsx"
2245 set options "-mno-vsx"
2247 check_runtime_nocache vmx_hw_available {
2251 asm volatile ("vor v0,v0,v0");
2253 asm volatile ("vor 0,0,0");
2262 proc check_ppc_recip_hw_available { } {
2263 return [check_cached_effective_target ppc_recip_hw_available {
2264 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2265 # For now, disable on Darwin
2266 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2269 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2270 check_runtime_nocache ppc_recip_hw_available {
2271 volatile double d_recip, d_rsqrt, d_four = 4.0;
2272 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2275 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2276 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2277 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2278 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2286 # Return 1 if the target supports executing AltiVec and Cell PPU
2287 # instructions, 0 otherwise. Cache the result.
2289 proc check_effective_target_cell_hw { } {
2290 return [check_cached_effective_target cell_hw_available {
2291 # Some simulators are known to not support VMX and PPU instructions.
2292 if { [istarget powerpc-*-eabi*] } {
2295 # Most targets don't require special flags
for this test
2296 # case
, but Darwin and AIX
do.
2297 if { [istarget
*-*-darwin
*]
2298 ||
[istarget
*-*-aix
*] } {
2299 set options
"-maltivec -mcpu=cell"
2301 set options
"-mcpu=cell"
2303 check_runtime_nocache cell_hw_available
{
2307 asm volatile
("vor v0,v0,v0");
2308 asm volatile
("lvlx v0,r0,r0");
2310 asm volatile
("vor 0,0,0");
2311 asm volatile
("lvlx 0,0,0");
2320 #
Return 1 if the target supports executing
64-bit instructions
, 0
2321 # otherwise.
Cache the result.
2323 proc check_effective_target_powerpc64
{ } {
2324 global powerpc64_available_saved
2327 if [info exists powerpc64_available_saved
] {
2328 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2330 set powerpc64_available_saved
0
2332 # Some simulators are known to not support powerpc64 instructions.
2333 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2334 verbose
"check_effective_target_powerpc64 returning 0" 2
2335 return $powerpc64_available_saved
2338 #
Set up
, compile, and
execute a test
program containing a
64-bit
2339 # instruction.
Include the current process ID in the file
2340 # names to prevent conflicts with invocations
for multiple
2345 set f
[open $src
"w"]
2346 puts $f
"int main() {"
2347 puts $f
"#ifdef __MACH__"
2348 puts $f
" asm volatile (\"extsw r0,r0\");"
2350 puts $f
" asm volatile (\"extsw 0,0\");"
2352 puts $f
" return 0; }"
2355 set opts
"additional_flags=-mcpu=G5"
2357 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2358 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2361 if [string match
"" $lines] then {
2362 # No error message
, compilation succeeded.
2363 set result
[$
{tool
}_load
"./$exe" "" ""]
2364 set status [lindex $result
0]
2365 remote_file build
delete $exe
2366 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2368 if { $
status == "pass" } then {
2369 set powerpc64_available_saved
1
2372 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2376 return $powerpc64_available_saved
2379 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2380 # complex float arguments. This affects gfortran tests that
call cabsf
2381 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2382 #
argument passing as the compiler under test
, 1 otherwise.
2384 proc check_effective_target_broken_cplxf_arg
{ } {
2385 # Skip the work
for targets known not to be affected.
2386 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2390 return [check_cached_effective_target broken_cplxf_arg
{
2391 check_runtime_nocache broken_cplxf_arg
{
2392 #
include <complex.h
>
2393 extern void abort
(void
);
2394 float fabsf
(float
);
2395 float cabsf
(_Complex float
);
2402 if (fabsf
(f
- 5.0) > 0.0001)
2403 /* Yes
, it
's broken. */
2405 /* All fine, not broken. */
2412 # Return 1 is this is a TI C6X target supporting C67X instructions
2413 proc check_effective_target_ti_c67x { } {
2414 return [check_no_compiler_messages ti_c67x assembly {
2415 #if !defined(_TMS320C6700)
2416 #error !_TMS320C6700
2421 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2422 proc check_effective_target_ti_c64xp { } {
2423 return [check_no_compiler_messages ti_c64xp assembly {
2424 #if !defined(_TMS320C6400_PLUS)
2425 #error !_TMS320C6400_PLUS
2431 proc check_alpha_max_hw_available { } {
2432 return [check_runtime alpha_max_hw_available {
2433 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2437 # Returns true iff the FUNCTION is available on the target system.
2438 # (This is essentially a Tcl implementation of Autoconf's
2441 proc check_function_available
{ function
} {
2442 return [check_no_compiler_messages $
{function
}_available \
2448 int main
() { $function
(); }
2452 # Returns true iff
"fork" is available on the target system.
2454 proc check_fork_available
{} {
2455 return [check_function_available
"fork"]
2458 # Returns true iff
"mkfifo" is available on the target system.
2460 proc check_mkfifo_available
{} {
2461 if { [istarget
*-*-cygwin
*] } {
2462 # Cygwin has mkfifo
, but support is incomplete.
2466 return [check_function_available
"mkfifo"]
2469 # Returns true iff
"__cxa_atexit" is used on the target system.
2471 proc check_cxa_atexit_available
{ } {
2472 return [check_cached_effective_target cxa_atexit_available
{
2473 if { [istarget hppa
*-*-hpux10
*] } {
2474 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2476 } elseif { [istarget *-*-vxworks] } {
2477 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2480 check_runtime_nocache cxa_atexit_available
{
2483 static unsigned
int count;
2500 Y
() { f
(); count = 2; }
2509 int main
() { return 0; }
2515 proc check_effective_target_objc2
{ } {
2516 return [check_no_compiler_messages objc2 object
{
2525 proc check_effective_target_next_runtime
{ } {
2526 return [check_no_compiler_messages objc2 object
{
2527 #ifdef __NEXT_RUNTIME__
2530 #error
!__NEXT_RUNTIME__
2535 #
Return 1 if we
're generating 32-bit code using default options, 0
2538 proc check_effective_target_ilp32 { } {
2539 return [check_no_compiler_messages ilp32 object {
2540 int dummy[sizeof (int) == 4
2541 && sizeof (void *) == 4
2542 && sizeof (long) == 4 ? 1 : -1];
2546 # Return 1 if we're generating ia32 code using default options
, 0
2549 proc check_effective_target_ia32
{ } {
2550 return [check_no_compiler_messages ia32 object
{
2551 int dummy
[sizeof
(int) == 4
2552 && sizeof
(void
*) == 4
2553 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2557 #
Return 1 if we
're generating x32 code using default options, 0
2560 proc check_effective_target_x32 { } {
2561 return [check_no_compiler_messages x32 object {
2562 int dummy[sizeof (int) == 4
2563 && sizeof (void *) == 4
2564 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2568 # Return 1 if we're generating
32-bit integers using default
2569 # options
, 0 otherwise.
2571 proc check_effective_target_int32
{ } {
2572 return [check_no_compiler_messages int32 object
{
2573 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2577 #
Return 1 if we
're generating 32-bit or larger integers using default
2578 # options, 0 otherwise.
2580 proc check_effective_target_int32plus { } {
2581 return [check_no_compiler_messages int32plus object {
2582 int dummy[sizeof (int) >= 4 ? 1 : -1];
2586 # Return 1 if we're generating
32-bit or larger pointers using default
2587 # options
, 0 otherwise.
2589 proc check_effective_target_ptr32plus
{ } {
2590 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2591 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2592 # cannot really hold a
32-bit address
, so we always
return false here.
2593 if { [istarget msp430
-*-*] } {
2597 return [check_no_compiler_messages ptr32plus object
{
2598 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2602 #
Return 1 if we support
32-bit or larger array and structure sizes
2603 # using default options
, 0 otherwise. Avoid false positive
on
2604 # targets with
20 or
24 bit address spaces.
2606 proc check_effective_target_size32plus
{ } {
2607 return [check_no_compiler_messages size32plus object
{
2608 char dummy
[16777217L];
2612 # Returns
1 if we
're generating 16-bit or smaller integers with the
2613 # default options, 0 otherwise.
2615 proc check_effective_target_int16 { } {
2616 return [check_no_compiler_messages int16 object {
2617 int dummy[sizeof (int) < 4 ? 1 : -1];
2621 # Return 1 if we're generating
64-bit code using default options
, 0
2624 proc check_effective_target_lp64
{ } {
2625 return [check_no_compiler_messages lp64 object
{
2626 int dummy
[sizeof
(int) == 4
2627 && sizeof
(void
*) == 8
2628 && sizeof
(long
) == 8 ?
1 : -1];
2632 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2635 proc check_effective_target_llp64 { } {
2636 return [check_no_compiler_messages llp64 object {
2637 int dummy[sizeof (int) == 4
2638 && sizeof (void *) == 8
2639 && sizeof (long long) == 8
2640 && sizeof (long) == 4 ? 1 : -1];
2644 # Return 1 if long and int have different sizes,
2647 proc check_effective_target_long_neq_int { } {
2648 return [check_no_compiler_messages long_ne_int object {
2649 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2653 # Return 1 if the target supports long double larger than double,
2656 proc check_effective_target_large_long_double { } {
2657 return [check_no_compiler_messages large_long_double object {
2658 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2662 # Return 1 if the target supports double larger than float,
2665 proc check_effective_target_large_double { } {
2666 return [check_no_compiler_messages large_double object {
2667 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2671 # Return 1 if the target supports long double of 128 bits,
2674 proc check_effective_target_longdouble128 { } {
2675 return [check_no_compiler_messages longdouble128 object {
2676 int dummy[sizeof(long double) == 16 ? 1 : -1];
2680 # Return 1 if the target supports double of 64 bits,
2683 proc check_effective_target_double64 { } {
2684 return [check_no_compiler_messages double64 object {
2685 int dummy[sizeof(double) == 8 ? 1 : -1];
2689 # Return 1 if the target supports double of at least 64 bits,
2692 proc check_effective_target_double64plus { } {
2693 return [check_no_compiler_messages double64plus object {
2694 int dummy[sizeof(double) >= 8 ? 1 : -1];
2698 # Return 1 if the target supports 'w
' suffix on floating constant
2701 proc check_effective_target_has_w_floating_suffix { } {
2703 if [check_effective_target_c++] {
2704 append opts "-std=gnu++03"
2706 return [check_no_compiler_messages w_fp_suffix object {
2711 # Return 1 if the target supports 'q
' suffix on floating constant
2714 proc check_effective_target_has_q_floating_suffix { } {
2716 if [check_effective_target_c++] {
2717 append opts "-std=gnu++03"
2719 return [check_no_compiler_messages q_fp_suffix object {
2724 # Return 1 if the target supports the _FloatN / _FloatNx type
2725 # indicated in the function name, 0 otherwise.
2727 proc check_effective_target_float16 {} {
2728 return [check_no_compiler_messages_nocache float16 object {
2730 } [add_options_for_float16 ""]]
2733 proc check_effective_target_float32 {} {
2734 return [check_no_compiler_messages_nocache float32 object {
2736 } [add_options_for_float32 ""]]
2739 proc check_effective_target_float64 {} {
2740 return [check_no_compiler_messages_nocache float64 object {
2742 } [add_options_for_float64 ""]]
2745 proc check_effective_target_float128 {} {
2746 return [check_no_compiler_messages_nocache float128 object {
2748 } [add_options_for_float128 ""]]
2751 proc check_effective_target_float32x {} {
2752 return [check_no_compiler_messages_nocache float32x object {
2754 } [add_options_for_float32x ""]]
2757 proc check_effective_target_float64x {} {
2758 return [check_no_compiler_messages_nocache float64x object {
2760 } [add_options_for_float64x ""]]
2763 proc check_effective_target_float128x {} {
2764 return [check_no_compiler_messages_nocache float128x object {
2766 } [add_options_for_float128x ""]]
2769 # Likewise, but runtime support for any special options used as well
2770 # as compile-time support is required.
2772 proc check_effective_target_float16_runtime {} {
2773 return [check_effective_target_float16]
2776 proc check_effective_target_float32_runtime {} {
2777 return [check_effective_target_float32]
2780 proc check_effective_target_float64_runtime {} {
2781 return [check_effective_target_float64]
2784 proc check_effective_target_float128_runtime {} {
2785 if { ![check_effective_target_float128] } {
2788 if { [istarget powerpc*-*-*] } {
2789 return [check_effective_target_base_quadfloat_support]
2794 proc check_effective_target_float32x_runtime {} {
2795 return [check_effective_target_float32x]
2798 proc check_effective_target_float64x_runtime {} {
2799 if { ![check_effective_target_float64x] } {
2802 if { [istarget powerpc*-*-*] } {
2803 return [check_effective_target_base_quadfloat_support]
2808 proc check_effective_target_float128x_runtime {} {
2809 return [check_effective_target_float128x]
2812 # Return 1 if the target hardware supports any options added for
2813 # _FloatN and _FloatNx types, 0 otherwise.
2815 proc check_effective_target_floatn_nx_runtime {} {
2816 if { [istarget powerpc*-*-aix*] } {
2819 if { [istarget powerpc*-*-*] } {
2820 return [check_effective_target_base_quadfloat_support]
2825 # Add options needed to use the _FloatN / _FloatNx type indicated in
2826 # the function name.
2828 proc add_options_for_float16 { flags } {
2829 if { [istarget arm*-*-*] } {
2830 return "$flags -mfp16-format=ieee"
2835 proc add_options_for_float32 { flags } {
2839 proc add_options_for_float64 { flags } {
2843 proc add_options_for_float128 { flags } {
2844 return [add_options_for___float128 "$flags"]
2847 proc add_options_for_float32x { flags } {
2851 proc add_options_for_float64x { flags } {
2852 return [add_options_for___float128 "$flags"]
2855 proc add_options_for_float128x { flags } {
2859 # Return 1 if the target supports __float128,
2862 proc check_effective_target___float128 { } {
2863 if { [istarget powerpc*-*-*] } {
2864 return [check_ppc_float128_sw_available]
2866 if { [istarget ia64-*-*]
2867 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2873 proc add_options_for___float128 { flags } {
2874 if { [istarget powerpc*-*-*] } {
2875 return "$flags -mfloat128 -mvsx"
2880 # Return 1 if the target supports any special run-time requirements
2881 # for __float128 or _Float128,
2884 proc check_effective_target_base_quadfloat_support { } {
2885 if { [istarget powerpc*-*-*] } {
2886 return [check_vsx_hw_available]
2891 # Return 1 if the target supports compiling fixed-point,
2894 proc check_effective_target_fixed_point { } {
2895 return [check_no_compiler_messages fixed_point object {
2896 _Sat _Fract x; _Sat _Accum y;
2900 # Return 1 if the target supports compiling decimal floating point,
2903 proc check_effective_target_dfp_nocache { } {
2904 verbose "check_effective_target_dfp_nocache: compiling source" 2
2905 set ret [check_no_compiler_messages_nocache dfp object {
2906 float x __attribute__((mode(DD)));
2908 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2912 proc check_effective_target_dfprt_nocache { } {
2913 return [check_runtime_nocache dfprt {
2914 typedef float d64 __attribute__((mode(DD)));
2915 d64 x = 1.2df, y = 2.3dd, z;
2916 int main () { z = x + y; return 0; }
2920 # Return 1 if the target supports compiling Decimal Floating Point,
2923 # This won't change
for different subtargets so
cache the result.
2925 proc check_effective_target_dfp
{ } {
2926 return [check_cached_effective_target dfp
{
2927 check_effective_target_dfp_nocache
2931 #
Return 1 if the target supports linking and executing Decimal Floating
2932 # Point
, 0 otherwise.
2934 # This won
't change for different subtargets so cache the result.
2936 proc check_effective_target_dfprt { } {
2937 return [check_cached_effective_target dfprt {
2938 check_effective_target_dfprt_nocache
2942 proc check_effective_target_powerpc_popcntb_ok { } {
2943 return [check_cached_effective_target powerpc_popcntb_ok {
2945 # Disable on Darwin.
2946 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2949 check_runtime_nocache powerpc_popcntb_ok {
2951 volatile int a = 0x12345678;
2954 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2962 # Return 1 if the target supports executing DFP hardware instructions,
2963 # 0 otherwise. Cache the result.
2965 proc check_dfp_hw_available { } {
2966 return [check_cached_effective_target dfp_hw_available {
2967 # For now, disable on Darwin
2968 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2971 check_runtime_nocache dfp_hw_available {
2972 volatile _Decimal64 r;
2973 volatile _Decimal64 a = 4.0DD;
2974 volatile _Decimal64 b = 2.0DD;
2977 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2978 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2979 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2980 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2983 } "-mcpu=power6 -mhard-float"
2988 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2990 proc check_effective_target_ucn_nocache { } {
2991 # -std=c99 is only valid for C
2992 if [check_effective_target_c] {
2993 set ucnopts "-std=c99"
2997 verbose "check_effective_target_ucn_nocache: compiling source" 2
2998 set ret [check_no_compiler_messages_nocache ucn object {
3001 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3005 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3007 # This won't change
for different subtargets
, so
cache the result.
3009 proc check_effective_target_ucn
{ } {
3010 return [check_cached_effective_target ucn
{
3011 check_effective_target_ucn_nocache
3015 #
Return 1 if the target needs a command line
argument to enable a SIMD
3018 proc check_effective_target_vect_cmdline_needed
{ } {
3019 global et_vect_cmdline_needed_saved
3020 global et_vect_cmdline_needed_target_name
3022 if { ![info exists et_vect_cmdline_needed_target_name
] } {
3023 set et_vect_cmdline_needed_target_name
""
3026 #
If the target has changed since we
set the cached value
, clear it.
3027 set current_target
[current_target_name
]
3028 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
3029 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3030 set et_vect_cmdline_needed_target_name $current_target
3031 if { [info exists et_vect_cmdline_needed_saved
] } {
3032 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
3033 unset et_vect_cmdline_needed_saved
3037 if [info exists et_vect_cmdline_needed_saved
] {
3038 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
3040 set et_vect_cmdline_needed_saved
1
3041 if { [istarget alpha
*-*-*]
3042 ||
[istarget ia64
-*-*]
3043 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3044 && ![is
-effective
-target ia32
])
3045 ||
([istarget powerpc
*-*-*]
3046 && ([check_effective_target_powerpc_spe
]
3047 ||
[check_effective_target_powerpc_altivec
]))
3048 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
3049 ||
[istarget spu
-*-*]
3050 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
3051 ||
[istarget aarch64
*-*-*] } {
3052 set et_vect_cmdline_needed_saved
0
3056 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3057 return $et_vect_cmdline_needed_saved
3060 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
3062 # This won
't change for different subtargets so cache the result.
3064 proc check_effective_target_vect_int { } {
3065 global et_vect_int_saved
3068 if [info exists et_vect_int_saved($et_index)] {
3069 verbose "check_effective_target_vect_int: using cached result" 2
3071 set et_vect_int_saved($et_index) 0
3072 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3073 || ([istarget powerpc*-*-*]
3074 && ![istarget powerpc-*-linux*paired*])
3075 || [istarget spu-*-*]
3076 || [istarget sparc*-*-*]
3077 || [istarget alpha*-*-*]
3078 || [istarget ia64-*-*]
3079 || [istarget aarch64*-*-*]
3080 || [is-effective-target arm_neon]
3081 || ([istarget mips*-*-*]
3082 && ([et-is-effective-target mips_loongson]
3083 || [et-is-effective-target mips_msa]))
3084 || ([istarget s390*-*-*]
3085 && [check_effective_target_s390_vx]) } {
3086 set et_vect_int_saved($et_index) 1
3090 verbose "check_effective_target_vect_int:\
3091 returning $et_vect_int_saved($et_index)" 2
3092 return $et_vect_int_saved($et_index)
3095 # Return 1 if the target supports signed int->float conversion
3098 proc check_effective_target_vect_intfloat_cvt { } {
3099 global et_vect_intfloat_cvt_saved
3102 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3103 verbose "check_effective_target_vect_intfloat_cvt:\
3104 using cached result" 2
3106 set et_vect_intfloat_cvt_saved($et_index) 0
3107 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3108 || ([istarget powerpc*-*-*]
3109 && ![istarget powerpc-*-linux*paired*])
3110 || [is-effective-target arm_neon]
3111 || ([istarget mips*-*-*]
3112 && [et-is-effective-target mips_msa]) } {
3113 set et_vect_intfloat_cvt_saved($et_index) 1
3117 verbose "check_effective_target_vect_intfloat_cvt:\
3118 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3119 return $et_vect_intfloat_cvt_saved($et_index)
3122 # Return 1 if the target supports signed double->int conversion
3125 proc check_effective_target_vect_doubleint_cvt { } {
3126 global et_vect_doubleint_cvt_saved
3129 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3130 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3132 set et_vect_doubleint_cvt_saved($et_index) 0
3133 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3134 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3135 #ifdef __tune_atom__
3136 # error No double vectorizer support.
3139 || [istarget aarch64*-*-*]
3140 || [istarget spu-*-*]
3141 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3142 || ([istarget mips*-*-*]
3143 && [et-is-effective-target mips_msa]) } {
3144 set et_vect_doubleint_cvt_saved($et_index) 1
3148 verbose "check_effective_target_vect_doubleint_cvt:\
3149 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3150 return $et_vect_doubleint_cvt_saved($et_index)
3153 # Return 1 if the target supports signed int->double conversion
3156 proc check_effective_target_vect_intdouble_cvt { } {
3157 global et_vect_intdouble_cvt_saved
3160 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3161 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3163 set et_vect_intdouble_cvt_saved($et_index) 0
3164 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3165 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3166 #ifdef __tune_atom__
3167 # error No double vectorizer support.
3170 || [istarget aarch64*-*-*]
3171 || [istarget spu-*-*]
3172 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3173 || ([istarget mips*-*-*]
3174 && [et-is-effective-target mips_msa]) } {
3175 set et_vect_intdouble_cvt_saved($et_index) 1
3179 verbose "check_effective_target_vect_intdouble_cvt:\
3180 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3181 return $et_vect_intdouble_cvt_saved($et_index)
3184 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3186 proc check_effective_target_int128
{ } {
3187 return [check_no_compiler_messages int128 object
{
3189 #ifndef __SIZEOF_INT128__
3198 #
Return 1 if the target supports unsigned
int->float conversion
3201 proc check_effective_target_vect_uintfloat_cvt
{ } {
3202 global et_vect_uintfloat_cvt_saved
3205 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
3206 verbose
"check_effective_target_vect_uintfloat_cvt:\
3207 using cached result
" 2
3209 set et_vect_uintfloat_cvt_saved
($et_index
) 0
3210 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3211 ||
([istarget powerpc
*-*-*]
3212 && ![istarget powerpc
-*-linux
*paired
*])
3213 ||
[istarget aarch64
*-*-*]
3214 ||
[is
-effective
-target arm_neon
]
3215 ||
([istarget mips
*-*-*]
3216 && [et
-is
-effective
-target mips_msa
]) } {
3217 set et_vect_uintfloat_cvt_saved
($et_index
) 1
3221 verbose
"check_effective_target_vect_uintfloat_cvt:\
3222 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
3223 return $et_vect_uintfloat_cvt_saved
($et_index
)
3227 #
Return 1 if the target supports signed float
->int conversion
3230 proc check_effective_target_vect_floatint_cvt
{ } {
3231 global et_vect_floatint_cvt_saved
3234 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3235 verbose
"check_effective_target_vect_floatint_cvt:\
3236 using cached result
" 2
3238 set et_vect_floatint_cvt_saved
($et_index
) 0
3239 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3240 ||
([istarget powerpc
*-*-*]
3241 && ![istarget powerpc
-*-linux
*paired
*])
3242 ||
[is
-effective
-target arm_neon
]
3243 ||
([istarget mips
*-*-*]
3244 && [et
-is
-effective
-target mips_msa
]) } {
3245 set et_vect_floatint_cvt_saved
($et_index
) 1
3249 verbose
"check_effective_target_vect_floatint_cvt:\
3250 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3251 return $et_vect_floatint_cvt_saved
($et_index
)
3254 #
Return 1 if the target supports unsigned float
->int conversion
3257 proc check_effective_target_vect_floatuint_cvt
{ } {
3258 global et_vect_floatuint_cvt_saved
3261 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3262 verbose
"check_effective_target_vect_floatuint_cvt:\
3263 using cached result
" 2
3265 set et_vect_floatuint_cvt_saved
($et_index
) 0
3266 if { ([istarget powerpc
*-*-*]
3267 && ![istarget powerpc
-*-linux
*paired
*])
3268 ||
[is
-effective
-target arm_neon
]
3269 ||
([istarget mips
*-*-*]
3270 && [et
-is
-effective
-target mips_msa
]) } {
3271 set et_vect_floatuint_cvt_saved
($et_index
) 1
3275 verbose
"check_effective_target_vect_floatuint_cvt:\
3276 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3277 return $et_vect_floatuint_cvt_saved
($et_index
)
3280 #
Return 1 if peeling
for alignment might be profitable
on the target
3283 proc check_effective_target_vect_peeling_profitable
{ } {
3284 global et_vect_peeling_profitable_saved
3287 if [info exists et_vect_peeling_profitable_saved
($et_index
)] {
3288 verbose
"check_effective_target_vect_peeling_profitable: using cached result" 2
3290 set et_vect_peeling_profitable_saved
($et_index
) 1
3291 if { ([istarget s390
*-*-*]
3292 && [check_effective_target_s390_vx
]) } {
3293 set et_vect_peeling_profitable_saved
($et_index
) 0
3297 verbose
"check_effective_target_vect_peeling_profitable:\
3298 returning $et_vect_peeling_profitable_saved
($et_index
)" 2
3299 return $et_vect_peeling_profitable_saved
($et_index
)
3302 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3304 # This won
't change for different subtargets so cache the result.
3306 proc check_effective_target_vect_simd_clones { } {
3307 global et_vect_simd_clones_saved
3310 if [info exists et_vect_simd_clones_saved($et_index)] {
3311 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3313 set et_vect_simd_clones_saved($et_index) 0
3314 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3315 # avx2 and avx512f clone. Only the right clone for the
3316 # specified arch will be chosen, but still we need to at least
3317 # be able to assemble avx512f.
3318 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3319 && [check_effective_target_avx512f]) } {
3320 set et_vect_simd_clones_saved($et_index) 1
3324 verbose "check_effective_target_vect_simd_clones:\
3325 returning $et_vect_simd_clones_saved($et_index)" 2
3326 return $et_vect_simd_clones_saved($et_index)
3329 # Return 1 if this is a AArch64 target supporting big endian
3330 proc check_effective_target_aarch64_big_endian { } {
3331 return [check_no_compiler_messages aarch64_big_endian assembly {
3332 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3333 #error !__aarch64__ || !__AARCH64EB__
3338 # Return 1 if this is a AArch64 target supporting little endian
3339 proc check_effective_target_aarch64_little_endian { } {
3340 if { ![istarget aarch64*-*-*] } {
3344 return [check_no_compiler_messages aarch64_little_endian assembly {
3345 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3351 # Return 1 if this is a compiler supporting ARC atomic operations
3352 proc check_effective_target_arc_atomic { } {
3353 return [check_no_compiler_messages arc_atomic assembly {
3354 #if !defined(__ARC_ATOMIC__)
3360 # Return 1 if this is an arm target using 32-bit instructions
3361 proc check_effective_target_arm32 { } {
3362 if { ![istarget arm*-*-*] } {
3366 return [check_no_compiler_messages arm32 assembly {
3367 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3368 #error !__arm || __thumb__ && !__thumb2__
3373 # Return 1 if this is an arm target not using Thumb
3374 proc check_effective_target_arm_nothumb { } {
3375 if { ![istarget arm*-*-*] } {
3379 return [check_no_compiler_messages arm_nothumb assembly {
3380 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3381 #error !__arm__ || __thumb || __thumb2__
3386 # Return 1 if this is a little-endian ARM target
3387 proc check_effective_target_arm_little_endian { } {
3388 if { ![istarget arm*-*-*] } {
3392 return [check_no_compiler_messages arm_little_endian assembly {
3393 #if !defined(__arm__) || !defined(__ARMEL__)
3394 #error !__arm__ || !__ARMEL__
3399 # Return 1 if this is an ARM target that only supports aligned vector accesses
3400 proc check_effective_target_arm_vect_no_misalign { } {
3401 if { ![istarget arm*-*-*] } {
3405 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3406 #if !defined(__arm__) \
3407 || (defined(__ARM_FEATURE_UNALIGNED) \
3408 && defined(__ARMEL__))
3409 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3415 # Return 1 if this is an ARM target supporting -mfpu=vfp
3416 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3419 proc check_effective_target_arm_vfp_ok { } {
3420 if { [check_effective_target_arm32] } {
3421 return [check_no_compiler_messages arm_vfp_ok object {
3423 } "-mfpu=vfp -mfloat-abi=softfp"]
3429 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3430 # -mfloat-abi=softfp.
3432 proc check_effective_target_arm_vfp3_ok { } {
3433 if { [check_effective_target_arm32] } {
3434 return [check_no_compiler_messages arm_vfp3_ok object {
3436 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3442 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3443 # -mfloat-abi=softfp.
3444 proc check_effective_target_arm_v8_vfp_ok {} {
3445 if { [check_effective_target_arm32] } {
3446 return [check_no_compiler_messages arm_v8_vfp_ok object {
3449 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3452 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3458 # Return 1 if this is an ARM target supporting -mfpu=vfp
3459 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3462 proc check_effective_target_arm_hard_vfp_ok { } {
3463 if { [check_effective_target_arm32]
3464 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3465 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3466 int main() { return 0;}
3467 } "-mfpu=vfp -mfloat-abi=hard"]
3473 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3474 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3475 # incompatible with these options. Also set et_arm_fp_flags to the
3476 # best options to add.
3478 proc check_effective_target_arm_fp_ok_nocache { } {
3479 global et_arm_fp_flags
3480 set et_arm_fp_flags ""
3481 if { [check_effective_target_arm32] } {
3482 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3483 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3485 #error __ARM_FP not defined
3488 set et_arm_fp_flags $flags
3497 proc check_effective_target_arm_fp_ok { } {
3498 return [check_cached_effective_target arm_fp_ok \
3499 check_effective_target_arm_fp_ok_nocache]
3502 # Add the options needed to define __ARM_FP. We need either
3503 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3504 # specified by the multilib, use it.
3506 proc add_options_for_arm_fp { flags } {
3507 if { ! [check_effective_target_arm_fp_ok] } {
3510 global et_arm_fp_flags
3511 return "$flags $et_arm_fp_flags"
3514 # Return 1 if this is an ARM target that supports DSP multiply with
3515 # current multilib flags.
3517 proc check_effective_target_arm_dsp { } {
3518 return [check_no_compiler_messages arm_dsp assembly {
3519 #ifndef __ARM_FEATURE_DSP
3526 # Return 1 if this is an ARM target that supports unaligned word/halfword
3527 # load/store instructions.
3529 proc check_effective_target_arm_unaligned { } {
3530 return [check_no_compiler_messages arm_unaligned assembly {
3531 #ifndef __ARM_FEATURE_UNALIGNED
3532 #error no unaligned support
3538 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3539 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3540 # incompatible with these options. Also set et_arm_crypto_flags to the
3541 # best options to add.
3543 proc check_effective_target_arm_crypto_ok_nocache { } {
3544 global et_arm_crypto_flags
3545 set et_arm_crypto_flags ""
3546 if { [check_effective_target_arm_v8_neon_ok] } {
3547 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3548 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3549 #include "arm_neon.h"
3551 foo (uint8x16_t a, uint8x16_t b)
3553 return vaeseq_u8 (a, b);
3556 set et_arm_crypto_flags $flags
3565 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3567 proc check_effective_target_arm_crypto_ok { } {
3568 return [check_cached_effective_target arm_crypto_ok \
3569 check_effective_target_arm_crypto_ok_nocache]
3572 # Add options for crypto extensions.
3573 proc add_options_for_arm_crypto { flags } {
3574 if { ! [check_effective_target_arm_crypto_ok] } {
3577 global et_arm_crypto_flags
3578 return "$flags $et_arm_crypto_flags"
3581 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3582 # or -mfloat-abi=hard, but if one is already specified by the
3583 # multilib, use it. Similarly, if a -mfpu option already enables
3584 # NEON, do not add -mfpu=neon.
3586 proc add_options_for_arm_neon { flags } {
3587 if { ! [check_effective_target_arm_neon_ok] } {
3590 global et_arm_neon_flags
3591 return "$flags $et_arm_neon_flags"
3594 proc add_options_for_arm_v8_vfp { flags } {
3595 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3598 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3601 proc add_options_for_arm_v8_neon { flags } {
3602 if { ! [check_effective_target_arm_v8_neon_ok] } {
3605 global et_arm_v8_neon_flags
3606 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3609 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3610 # options for AArch64 and for ARM.
3612 proc add_options_for_arm_v8_1a_neon { flags } {
3613 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3616 global et_arm_v8_1a_neon_flags
3617 return "$flags $et_arm_v8_1a_neon_flags"
3620 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3621 # Also adds the ARMv8 FP options for ARM and for AArch64.
3623 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3624 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3627 global et_arm_v8_2a_fp16_scalar_flags
3628 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3631 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3632 # the ARMv8 NEON options for ARM and for AArch64.
3634 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3635 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3638 global et_arm_v8_2a_fp16_neon_flags
3639 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3642 proc add_options_for_arm_crc { flags } {
3643 if { ! [check_effective_target_arm_crc_ok] } {
3646 global et_arm_crc_flags
3647 return "$flags $et_arm_crc_flags"
3650 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3651 # or -mfloat-abi=hard, but if one is already specified by the
3652 # multilib, use it. Similarly, if a -mfpu option already enables
3653 # NEON, do not add -mfpu=neon.
3655 proc add_options_for_arm_neonv2 { flags } {
3656 if { ! [check_effective_target_arm_neonv2_ok] } {
3659 global et_arm_neonv2_flags
3660 return "$flags $et_arm_neonv2_flags"
3663 # Add the options needed for vfp3.
3664 proc add_options_for_arm_vfp3 { flags } {
3665 if { ! [check_effective_target_arm_vfp3_ok] } {
3668 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3671 # Return 1 if this is an ARM target supporting -mfpu=neon
3672 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3673 # incompatible with these options. Also set et_arm_neon_flags to the
3674 # best options to add.
3676 proc check_effective_target_arm_neon_ok_nocache { } {
3677 global et_arm_neon_flags
3678 set et_arm_neon_flags ""
3679 if { [check_effective_target_arm32] } {
3680 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3681 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3682 #include <arm_neon.h>
3684 #ifndef __ARM_NEON__
3687 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3688 configured for -mcpu=arm926ej-s, for example. */
3689 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3690 #error Architecture does not support NEON.
3693 set et_arm_neon_flags $flags
3702 proc check_effective_target_arm_neon_ok { } {
3703 return [check_cached_effective_target arm_neon_ok \
3704 check_effective_target_arm_neon_ok_nocache]
3707 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3708 # -mfloat-abi= option. Useful in tests where add_options is not
3709 # supported (such as lto tests).
3711 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3712 if { [check_effective_target_arm32] } {
3713 foreach flags {"-mfpu=neon"} {
3714 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3715 #include <arm_neon.h>
3717 #ifndef __ARM_NEON__
3720 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3721 configured for -mcpu=arm926ej-s, for example. */
3722 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3723 #error Architecture does not support NEON.
3734 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3735 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3736 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3739 proc check_effective_target_arm_crc_ok_nocache { } {
3740 global et_arm_crc_flags
3741 set et_arm_crc_flags "-march=armv8-a+crc"
3742 return [check_no_compiler_messages_nocache arm_crc_ok object {
3743 #if !defined (__ARM_FEATURE_CRC32)
3746 } "$et_arm_crc_flags"]
3749 proc check_effective_target_arm_crc_ok { } {
3750 return [check_cached_effective_target arm_crc_ok \
3751 check_effective_target_arm_crc_ok_nocache]
3754 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3755 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3756 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3757 # the best options to add.
3759 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3760 global et_arm_neon_fp16_flags
3761 global et_arm_neon_flags
3762 set et_arm_neon_fp16_flags ""
3763 if { [check_effective_target_arm32]
3764 && [check_effective_target_arm_neon_ok] } {
3765 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3766 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3767 "-mfp16-format=ieee"
3768 "-mfloat-abi=softfp -mfp16-format=ieee"
3769 "-mfpu=neon-fp16 -mfp16-format=ieee"
3770 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3771 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3772 #include "arm_neon.h"
3774 foo (float32x4_t arg)
3776 return vcvt_f16_f32 (arg);
3778 } "$et_arm_neon_flags $flags"] } {
3779 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3788 proc check_effective_target_arm_neon_fp16_ok { } {
3789 return [check_cached_effective_target arm_neon_fp16_ok \
3790 check_effective_target_arm_neon_fp16_ok_nocache]
3793 proc check_effective_target_arm_neon_fp16_hw { } {
3794 if {! [check_effective_target_arm_neon_fp16_ok] } {
3797 global et_arm_neon_fp16_flags
3798 check_runtime_nocache arm_neon_fp16_hw {
3800 main (int argc, char **argv)
3802 asm ("vcvt.f32.f16 q1, d0");
3805 } $et_arm_neon_fp16_flags
3808 proc add_options_for_arm_neon_fp16 { flags } {
3809 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3812 global et_arm_neon_fp16_flags
3813 return "$flags $et_arm_neon_fp16_flags"
3816 # Return 1 if this is an ARM target supporting the FP16 alternative
3817 # format. Some multilibs may be incompatible with the options needed. Also
3818 # set et_arm_neon_fp16_flags to the best options to add.
3820 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3821 global et_arm_neon_fp16_flags
3822 set et_arm_neon_fp16_flags ""
3823 if { [check_effective_target_arm32] } {
3824 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3825 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3826 if { [check_no_compiler_messages_nocache \
3827 arm_fp16_alternative_ok object {
3828 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3829 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3831 } "$flags -mfp16-format=alternative"] } {
3832 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3841 proc check_effective_target_arm_fp16_alternative_ok { } {
3842 return [check_cached_effective_target arm_fp16_alternative_ok \
3843 check_effective_target_arm_fp16_alternative_ok_nocache]
3846 # Return 1 if this is an ARM target supports specifying the FP16 none
3847 # format. Some multilibs may be incompatible with the options needed.
3849 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3850 if { [check_effective_target_arm32] } {
3851 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3852 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3853 if { [check_no_compiler_messages_nocache \
3854 arm_fp16_none_ok object {
3855 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3856 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3858 #if defined (__ARM_FP16_FORMAT_IEEE)
3859 #error __ARM_FP16_FORMAT_IEEE defined
3861 } "$flags -mfp16-format=none"] } {
3870 proc check_effective_target_arm_fp16_none_ok { } {
3871 return [check_cached_effective_target arm_fp16_none_ok \
3872 check_effective_target_arm_fp16_none_ok_nocache]
3875 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3876 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3877 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3878 # best options to add.
3880 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3881 global et_arm_v8_neon_flags
3882 set et_arm_v8_neon_flags ""
3883 if { [check_effective_target_arm32] } {
3884 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3885 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3887 #error not armv8 or later
3889 #include "arm_neon.h"
3893 __asm__ volatile ("vrintn.f32 q0, q0");
3895 } "$flags -march=armv8-a"] } {
3896 set et_arm_v8_neon_flags $flags
3905 proc check_effective_target_arm_v8_neon_ok { } {
3906 return [check_cached_effective_target arm_v8_neon_ok \
3907 check_effective_target_arm_v8_neon_ok_nocache]
3910 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3911 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3912 # incompatible with these options. Also set et_arm_neonv2_flags to the
3913 # best options to add.
3915 proc check_effective_target_arm_neonv2_ok_nocache { } {
3916 global et_arm_neonv2_flags
3917 global et_arm_neon_flags
3918 set et_arm_neonv2_flags ""
3919 if { [check_effective_target_arm32]
3920 && [check_effective_target_arm_neon_ok] } {
3921 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3922 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3923 #include "arm_neon.h"
3925 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3927 return vfma_f32 (a, b, c);
3929 } "$et_arm_neon_flags $flags"] } {
3930 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3939 proc check_effective_target_arm_neonv2_ok { } {
3940 return [check_cached_effective_target arm_neonv2_ok \
3941 check_effective_target_arm_neonv2_ok_nocache]
3944 # Add the options needed for VFP FP16 support. We need either
3945 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3946 # the multilib, use it.
3948 proc add_options_for_arm_fp16 { flags } {
3949 if { ! [check_effective_target_arm_fp16_ok] } {
3952 global et_arm_fp16_flags
3953 return "$flags $et_arm_fp16_flags"
3956 # Add the options needed to enable support for IEEE format
3957 # half-precision support. This is valid for ARM targets.
3959 proc add_options_for_arm_fp16_ieee { flags } {
3960 if { ! [check_effective_target_arm_fp16_ok] } {
3963 global et_arm_fp16_flags
3964 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3967 # Add the options needed to enable support for ARM Alternative format
3968 # half-precision support. This is valid for ARM targets.
3970 proc add_options_for_arm_fp16_alternative { flags } {
3971 if { ! [check_effective_target_arm_fp16_ok] } {
3974 global et_arm_fp16_flags
3975 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3978 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3979 # Skip multilibs that are incompatible with these options and set
3980 # et_arm_fp16_flags to the best options to add. This test is valid for
3983 proc check_effective_target_arm_fp16_ok_nocache { } {
3984 global et_arm_fp16_flags
3985 set et_arm_fp16_flags ""
3986 if { ! [check_effective_target_arm32] } {
3990 [list "" { *-*-* } { "-mfpu=*" } \
3991 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3992 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3993 # Multilib flags would override -mfpu.
3996 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3997 # Must generate floating-point instructions.
4000 if [check_effective_target_arm_hf_eabi] {
4001 # Use existing float-abi and force an fpu which supports fp16
4002 set et_arm_fp16_flags "-mfpu=vfpv4"
4005 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4006 # The existing -mfpu value is OK; use it, but add softfp.
4007 set et_arm_fp16_flags "-mfloat-abi=softfp"
4010 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4011 # macro to check for this support.
4012 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4013 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4016 set et_arm_fp16_flags "$flags"
4023 proc check_effective_target_arm_fp16_ok { } {
4024 return [check_cached_effective_target arm_fp16_ok \
4025 check_effective_target_arm_fp16_ok_nocache]
4028 # Return 1 if the target supports executing VFP FP16 instructions, 0
4029 # otherwise. This test is valid for ARM only.
4031 proc check_effective_target_arm_fp16_hw { } {
4032 if {! [check_effective_target_arm_fp16_ok] } {
4035 global et_arm_fp16_flags
4036 check_runtime_nocache arm_fp16_hw {
4038 main (int argc, char **argv)
4042 asm ("vcvtb.f32.f16 %0, %1"
4043 : "=w" (r) : "w" (a)
4044 : /* No clobbers. */);
4045 return (r == 1.0) ? 0 : 1;
4047 } "$et_arm_fp16_flags -mfp16-format=ieee"
4050 # Creates a series of routines that return 1 if the given architecture
4051 # can be selected and a routine to give the flags to select that architecture
4052 # Note: Extra flags may be added to disable options from newer compilers
4053 # (Thumb in particular - but others may be added in the future).
4054 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4055 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4056 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4057 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4058 # /* { dg-add-options arm_arch_v5 } */
4059 # /* { dg-require-effective-target arm_arch_v5_multilib } */
4060 foreach { armfunc armflag armdefs } {
4061 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4062 v4t "-march=armv4t" __ARM_ARCH_4T__
4063 v5 "-march=armv5 -marm" __ARM_ARCH_5__
4064 v5t "-march=armv5t" __ARM_ARCH_5T__
4065 v5te "-march=armv5te" __ARM_ARCH_5TE__
4066 v6 "-march=armv6" __ARM_ARCH_6__
4067 v6k "-march=armv6k" __ARM_ARCH_6K__
4068 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4069 v6z "-march=armv6z" __ARM_ARCH_6Z__
4070 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4071 v7a "-march=armv7-a" __ARM_ARCH_7A__
4072 v7r "-march=armv7-r" __ARM_ARCH_7R__
4073 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4074 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4075 v7ve "-march=armv7ve -marm"
4076 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4077 v8a "-march=armv8-a" __ARM_ARCH_8A__
4078 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
4079 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
4080 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4081 __ARM_ARCH_8M_BASE__
4082 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4083 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4084 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4085 proc check_effective_target_arm_arch_FUNC_ok { } {
4086 if { [ string match "*-marm*" "FLAG" ] &&
4087 ![check_effective_target_arm_arm_ok] } {
4090 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4097 proc add_options_for_arm_arch_FUNC { flags } {
4098 return "$flags FLAG"
4101 proc check_effective_target_arm_arch_FUNC_multilib { } {
4102 return [check_runtime arm_arch_FUNC_multilib {
4108 } [add_options_for_arm_arch_FUNC ""]]
4113 # Return 1 if GCC was configured with --with-mode=
4114 proc check_effective_target_default_mode { } {
4116 return [check_configured_with "with-mode="]
4119 # Return 1 if this is an ARM target where -marm causes ARM to be
4122 proc check_effective_target_arm_arm_ok { } {
4123 return [check_no_compiler_messages arm_arm_ok assembly {
4124 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4125 #error !__arm__ || __thumb__ || __thumb2__
4131 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4134 proc check_effective_target_arm_thumb1_ok { } {
4135 return [check_no_compiler_messages arm_thumb1_ok assembly {
4136 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4137 #error !__arm__ || !__thumb__ || __thumb2__
4139 int foo (int i) { return i; }
4143 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4146 proc check_effective_target_arm_thumb2_ok { } {
4147 return [check_no_compiler_messages arm_thumb2_ok assembly {
4148 #if !defined(__thumb2__)
4151 int foo (int i) { return i; }
4155 # Return 1 if this is an ARM target where Thumb-1 is used without options
4156 # added by the test.
4158 proc check_effective_target_arm_thumb1 { } {
4159 return [check_no_compiler_messages arm_thumb1 assembly {
4160 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4161 #error !__arm__ || !__thumb__ || __thumb2__
4167 # Return 1 if this is an ARM target where Thumb-2 is used without options
4168 # added by the test.
4170 proc check_effective_target_arm_thumb2 { } {
4171 return [check_no_compiler_messages arm_thumb2 assembly {
4172 #if !defined(__thumb2__)
4179 # Return 1 if this is an ARM target where conditional execution is available.
4181 proc check_effective_target_arm_cond_exec { } {
4182 return [check_no_compiler_messages arm_cond_exec assembly {
4183 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4190 # Return 1 if this is an ARM cortex-M profile cpu
4192 proc check_effective_target_arm_cortex_m { } {
4193 if { ![istarget arm*-*-*] } {
4196 return [check_no_compiler_messages arm_cortex_m assembly {
4197 #if defined(__ARM_ARCH_ISA_ARM)
4198 #error __ARM_ARCH_ISA_ARM is defined
4204 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4205 # used and MOVT/MOVW instructions to be available.
4207 proc check_effective_target_arm_thumb1_movt_ok {} {
4208 if [check_effective_target_arm_thumb1_ok] {
4209 return [check_no_compiler_messages arm_movt object {
4213 asm ("movt r0, #42");
4221 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4222 # used and CBZ and CBNZ instructions are available.
4224 proc check_effective_target_arm_thumb1_cbz_ok {} {
4225 if [check_effective_target_arm_thumb1_ok] {
4226 return [check_no_compiler_messages arm_movt object {
4230 asm ("cbz r0, 2f\n2:");
4238 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4241 proc check_effective_target_arm_cmse_ok {} {
4242 return [check_no_compiler_messages arm_cmse object {
4251 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4253 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4254 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4255 int foo (void) { return 0; }
4256 } "-O2 -mprint-tune-info" ]
4259 # Return 1 if the target supports executing NEON instructions, 0
4260 # otherwise. Cache the result.
4262 proc check_effective_target_arm_neon_hw { } {
4263 return [check_runtime arm_neon_hw_available {
4267 long long a = 0, b = 1;
4268 asm ("vorr %P0, %P1, %P2"
4270 : "0" (a), "w" (b));
4273 } [add_options_for_arm_neon ""]]
4276 proc check_effective_target_arm_neonv2_hw { } {
4277 return [check_runtime arm_neon_hwv2_available {
4278 #include "arm_neon.h"
4282 float32x2_t a, b, c;
4283 asm ("vfma.f32 %P0, %P1, %P2"
4285 : "w" (b), "w" (c));
4288 } [add_options_for_arm_neonv2 ""]]
4291 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4292 # otherwise. The test is valid for AArch64 and ARM. Record the command
4293 # line options needed.
4295 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4296 global et_arm_v8_1a_neon_flags
4297 set et_arm_v8_1a_neon_flags ""
4299 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4303 # Iterate through sets of options to find the compiler flags that
4304 # need to be added to the -march option. Start with the empty set
4305 # since AArch64 only needs the -march setting.
4306 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4307 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4308 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4309 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4310 #if !defined (__ARM_FEATURE_QRDMX)
4311 #error "__ARM_FEATURE_QRDMX not defined"
4313 } "$flags $arches"] } {
4314 set et_arm_v8_1a_neon_flags "$flags $arches"
4323 proc check_effective_target_arm_v8_1a_neon_ok { } {
4324 return [check_cached_effective_target arm_v8_1a_neon_ok \
4325 check_effective_target_arm_v8_1a_neon_ok_nocache]
4328 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4329 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4330 # Record the command line options needed.
4332 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4333 global et_arm_v8_2a_fp16_scalar_flags
4334 set et_arm_v8_2a_fp16_scalar_flags ""
4336 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4340 # Iterate through sets of options to find the compiler flags that
4341 # need to be added to the -march option.
4342 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4343 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4344 if { [check_no_compiler_messages_nocache \
4345 arm_v8_2a_fp16_scalar_ok object {
4346 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4347 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4349 } "$flags -march=armv8.2-a+fp16"] } {
4350 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4358 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4359 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4360 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4363 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4364 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4365 # Record the command line options needed.
4367 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4368 global et_arm_v8_2a_fp16_neon_flags
4369 set et_arm_v8_2a_fp16_neon_flags ""
4371 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4375 # Iterate through sets of options to find the compiler flags that
4376 # need to be added to the -march option.
4377 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4378 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4379 if { [check_no_compiler_messages_nocache \
4380 arm_v8_2a_fp16_neon_ok object {
4381 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4382 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4384 } "$flags -march=armv8.2-a+fp16"] } {
4385 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4393 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4394 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4395 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4398 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4401 proc check_effective_target_arm_v8_neon_hw { } {
4402 return [check_runtime arm_v8_neon_hw_available {
4403 #include "arm_neon.h"
4407 float32x2_t a = { 1.0f, 2.0f };
4408 #ifdef __ARM_ARCH_ISA_A64
4409 asm ("frinta %0.2s, %1.2s"
4413 asm ("vrinta.f32 %P0, %P1"
4417 return a[0] == 2.0f;
4419 } [add_options_for_arm_v8_neon ""]]
4422 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4423 # otherwise. The test is valid for AArch64 and ARM.
4425 proc check_effective_target_arm_v8_1a_neon_hw { } {
4426 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4429 return [check_runtime arm_v8_1a_neon_hw_available {
4433 #ifdef __ARM_ARCH_ISA_A64
4434 __Int32x2_t a = {0, 1};
4435 __Int32x2_t b = {0, 2};
4438 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4441 : /* No clobbers. */);
4445 __simd64_int32_t a = {0, 1};
4446 __simd64_int32_t b = {0, 2};
4447 __simd64_int32_t result;
4449 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4452 : /* No clobbers. */);
4457 } [add_options_for_arm_v8_1a_neon ""]]
4460 # Return 1 if the target supports executing floating point instructions from
4461 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4464 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4465 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4468 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4475 #ifdef __ARM_ARCH_ISA_A64
4477 asm ("fabs %h0, %h1"
4480 : /* No clobbers. */);
4484 asm ("vabs.f16 %0, %1"
4487 : /* No clobbers. */);
4491 return (result == 1.0) ? 0 : 1;
4493 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4496 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4497 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4500 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4501 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4504 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4508 #ifdef __ARM_ARCH_ISA_A64
4510 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4511 __Float16x4_t result;
4513 asm ("fabs %0.4h, %1.4h"
4516 : /* No clobbers. */);
4520 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4521 __simd64_float16_t result;
4523 asm ("vabs.f16 %P0, %P1"
4526 : /* No clobbers. */);
4530 return (result[0] == 1.0) ? 0 : 1;
4532 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4535 # Return 1 if this is a ARM target with NEON enabled.
4537 proc check_effective_target_arm_neon { } {
4538 if { [check_effective_target_arm32] } {
4539 return [check_no_compiler_messages arm_neon object {
4540 #ifndef __ARM_NEON__
4551 proc check_effective_target_arm_neonv2 { } {
4552 if { [check_effective_target_arm32] } {
4553 return [check_no_compiler_messages arm_neon object {
4554 #ifndef __ARM_NEON__
4557 #ifndef __ARM_FEATURE_FMA
4569 # Return 1 if this is an ARM target with load acquire and store release
4570 # instructions for 8-, 16- and 32-bit types.
4572 proc check_effective_target_arm_acq_rel { } {
4573 return [check_no_compiler_messages arm_acq_rel object {
4575 load_acquire_store_release (void)
4577 asm ("lda r0, [r1]\n\t"
4583 : : : "r0", "memory");
4588 # Add the options needed for MIPS Paired-Single.
4590 proc add_options_for_mpaired_single { flags } {
4591 if { ! [check_effective_target_mpaired_single] } {
4594 return "$flags -mpaired-single"
4597 # Add the options needed for MIPS SIMD Architecture.
4599 proc add_options_for_mips_msa { flags } {
4600 if { ! [check_effective_target_mips_msa] } {
4603 return "$flags -mmsa"
4606 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4607 # the Loongson vector modes.
4609 proc check_effective_target_mips_loongson { } {
4610 return [check_no_compiler_messages loongson assembly {
4611 #if !defined(__mips_loongson_vector_rev)
4612 #error !__mips_loongson_vector_rev
4617 # Return 1 if this is a MIPS target that supports the legacy NAN.
4619 proc check_effective_target_mips_nanlegacy { } {
4620 return [check_no_compiler_messages nanlegacy assembly {
4622 int main () { return 0; }
4626 # Return 1 if an MSA program can be compiled to object
4628 proc check_effective_target_mips_msa { } {
4629 if ![check_effective_target_nomips16] {
4632 return [check_no_compiler_messages msa object {
4633 #if !defined(__mips_msa)
4634 #error "MSA NOT AVAIL"
4636 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4637 #error "MSA NOT AVAIL FOR ISA REV < 2"
4639 #if !defined(__mips_hard_float)
4640 #error "MSA HARD_FLOAT REQUIRED"
4642 #if __mips_fpr != 64
4643 #error "MSA 64-bit FPR REQUIRED"
4649 v8i16 v = __builtin_msa_ldi_h (1);
4657 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4660 proc check_effective_target_arm_eabi { } {
4661 return [check_no_compiler_messages arm_eabi object {
4662 #ifndef __ARM_EABI__
4670 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4671 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4673 proc check_effective_target_arm_hf_eabi { } {
4674 return [check_no_compiler_messages arm_hf_eabi object {
4675 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4676 #error not hard-float EABI
4683 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4684 # Some multilibs may be incompatible with this option.
4686 proc check_effective_target_arm_iwmmxt_ok { } {
4687 if { [check_effective_target_arm32] } {
4688 return [check_no_compiler_messages arm_iwmmxt_ok object {
4696 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4697 # for an ARM target.
4698 proc check_effective_target_arm_prefer_ldrd_strd { } {
4699 if { ![check_effective_target_arm32] } {
4703 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4704 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4708 # Return 1 if this is a PowerPC target supporting -meabi.
4710 proc check_effective_target_powerpc_eabi_ok { } {
4711 if { [istarget powerpc*-*-*] } {
4712 return [check_no_compiler_messages powerpc_eabi_ok object {
4720 # Return 1 if this is a PowerPC target with floating-point registers.
4722 proc check_effective_target_powerpc_fprs { } {
4723 if { [istarget powerpc*-*-*]
4724 || [istarget rs6000-*-*] } {
4725 return [check_no_compiler_messages powerpc_fprs object {
4737 # Return 1 if this is a PowerPC target with hardware double-precision
4740 proc check_effective_target_powerpc_hard_double { } {
4741 if { [istarget powerpc*-*-*]
4742 || [istarget rs6000-*-*] } {
4743 return [check_no_compiler_messages powerpc_hard_double object {
4755 # Return 1 if this is a PowerPC target supporting -maltivec.
4757 proc check_effective_target_powerpc_altivec_ok { } {
4758 if { ([istarget powerpc*-*-*]
4759 && ![istarget powerpc-*-linux*paired*])
4760 || [istarget rs6000-*-*] } {
4761 # AltiVec is not supported on AIX before 5.3.
4762 if { [istarget powerpc*-*-aix4*]
4763 || [istarget powerpc*-*-aix5.1*]
4764 || [istarget powerpc*-*-aix5.2*] } {
4767 return [check_no_compiler_messages powerpc_altivec_ok object {
4775 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4777 proc check_effective_target_powerpc_p8vector_ok { } {
4778 if { ([istarget powerpc*-*-*]
4779 && ![istarget powerpc-*-linux*paired*])
4780 || [istarget rs6000-*-*] } {
4781 # AltiVec is not supported on AIX before 5.3.
4782 if { [istarget powerpc*-*-aix4*]
4783 || [istarget powerpc*-*-aix5.1*]
4784 || [istarget powerpc*-*-aix5.2*] } {
4787 return [check_no_compiler_messages powerpc_p8vector_ok object {
4790 asm volatile ("xxlorc vs0,vs0,vs0");
4792 asm volatile ("xxlorc 0,0,0");
4796 } "-mpower8-vector"]
4802 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4804 proc check_effective_target_powerpc_p9vector_ok { } {
4805 if { ([istarget powerpc*-*-*]
4806 && ![istarget powerpc-*-linux*paired*])
4807 || [istarget rs6000-*-*] } {
4808 # AltiVec is not supported on AIX before 5.3.
4809 if { [istarget powerpc*-*-aix4*]
4810 || [istarget powerpc*-*-aix5.1*]
4811 || [istarget powerpc*-*-aix5.2*] } {
4814 return [check_no_compiler_messages powerpc_p9vector_ok object {
4817 vector double v = (vector double) { 0.0, 0.0 };
4818 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4821 } "-mpower9-vector"]
4827 # Return 1 if this is a PowerPC target supporting -mmodulo
4829 proc check_effective_target_powerpc_p9modulo_ok { } {
4830 if { ([istarget powerpc*-*-*]
4831 && ![istarget powerpc-*-linux*paired*])
4832 || [istarget rs6000-*-*] } {
4833 # AltiVec is not supported on AIX before 5.3.
4834 if { [istarget powerpc*-*-aix4*]
4835 || [istarget powerpc*-*-aix5.1*]
4836 || [istarget powerpc*-*-aix5.2*] } {
4839 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4841 int i = 5, j = 3, r = -1;
4842 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4851 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4852 # software emulation on power7/power8 systems or hardware support on power9.
4854 proc check_effective_target_powerpc_float128_sw_ok { } {
4855 if { ([istarget powerpc*-*-*]
4856 && ![istarget powerpc-*-linux*paired*])
4857 || [istarget rs6000-*-*] } {
4858 # AltiVec is not supported on AIX before 5.3.
4859 if { [istarget powerpc*-*-aix4*]
4860 || [istarget powerpc*-*-aix5.1*]
4861 || [istarget powerpc*-*-aix5.2*] } {
4864 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4865 volatile __float128 x = 1.0q;
4866 volatile __float128 y = 2.0q;
4868 __float128 z = x + y;
4871 } "-mfloat128 -mvsx"]
4877 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4878 # support on power9.
4880 proc check_effective_target_powerpc_float128_hw_ok { } {
4881 if { ([istarget powerpc*-*-*]
4882 && ![istarget powerpc-*-linux*paired*])
4883 || [istarget rs6000-*-*] } {
4884 # AltiVec is not supported on AIX before 5.3.
4885 if { [istarget powerpc*-*-aix4*]
4886 || [istarget powerpc*-*-aix5.1*]
4887 || [istarget powerpc*-*-aix5.2*] } {
4890 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4891 volatile __float128 x = 1.0q;
4892 volatile __float128 y = 2.0q;
4895 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4898 } "-mfloat128-hardware"]
4904 # Return 1 if this is a PowerPC target supporting -mvsx
4906 proc check_effective_target_powerpc_vsx_ok { } {
4907 if { ([istarget powerpc*-*-*]
4908 && ![istarget powerpc-*-linux*paired*])
4909 || [istarget rs6000-*-*] } {
4910 # VSX is not supported on AIX before 7.1.
4911 if { [istarget powerpc*-*-aix4*]
4912 || [istarget powerpc*-*-aix5*]
4913 || [istarget powerpc*-*-aix6*] } {
4916 return [check_no_compiler_messages powerpc_vsx_ok object {
4919 asm volatile ("xxlor vs0,vs0,vs0");
4921 asm volatile ("xxlor 0,0,0");
4931 # Return 1 if this is a PowerPC target supporting -mhtm
4933 proc check_effective_target_powerpc_htm_ok { } {
4934 if { ([istarget powerpc*-*-*]
4935 && ![istarget powerpc-*-linux*paired*])
4936 || [istarget rs6000-*-*] } {
4937 # HTM is not supported on AIX yet.
4938 if { [istarget powerpc*-*-aix*] } {
4941 return [check_no_compiler_messages powerpc_htm_ok object {
4943 asm volatile ("tbegin. 0");
4952 # Return 1 if the target supports executing HTM hardware instructions,
4953 # 0 otherwise. Cache the result.
4955 proc check_htm_hw_available { } {
4956 return [check_cached_effective_target htm_hw_available {
4957 # For now, disable on Darwin
4958 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4961 check_runtime_nocache htm_hw_available {
4971 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4973 proc check_effective_target_powerpc_ppu_ok { } {
4974 if [check_effective_target_powerpc_altivec_ok] {
4975 return [check_no_compiler_messages cell_asm_available object {
4978 asm volatile ("lvlx v0,v0,v0");
4980 asm volatile ("lvlx 0,0,0");
4990 # Return 1 if this is a PowerPC target that supports SPU.
4992 proc check_effective_target_powerpc_spu { } {
4993 if { [istarget powerpc*-*-linux*] } {
4994 return [check_effective_target_powerpc_altivec_ok]
5000 # Return 1 if this is a PowerPC SPE target. The check includes options
5001 # specified by dg-options for this test, so don't
cache the result.
5003 proc check_effective_target_powerpc_spe_nocache
{ } {
5004 if { [istarget powerpc
*-*-*] } {
5005 return [check_no_compiler_messages_nocache powerpc_spe object
{
5011 } [current_compiler_flags
]]
5017 #
Return 1 if this is a PowerPC target with SPE enabled.
5019 proc check_effective_target_powerpc_spe
{ } {
5020 if { [istarget powerpc
*-*-*] } {
5021 return [check_no_compiler_messages powerpc_spe object
{
5033 #
Return 1 if this is a PowerPC target with Altivec enabled.
5035 proc check_effective_target_powerpc_altivec
{ } {
5036 if { [istarget powerpc
*-*-*] } {
5037 return [check_no_compiler_messages powerpc_altivec object
{
5049 #
Return 1 if this is a PowerPC
405 target. The check includes options
5050 # specified by dg
-options
for this test
, so don
't cache the result.
5052 proc check_effective_target_powerpc_405_nocache { } {
5053 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5054 return [check_no_compiler_messages_nocache powerpc_405 object {
5060 } [current_compiler_flags]]
5066 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5068 proc check_effective_target_powerpc_elfv2 { } {
5069 if { [istarget powerpc*-*-*] } {
5070 return [check_no_compiler_messages powerpc_elfv2 object {
5072 #error not ELF v2 ABI
5082 # Return 1 if this is a SPU target with a toolchain that
5083 # supports automatic overlay generation.
5085 proc check_effective_target_spu_auto_overlay { } {
5086 if { [istarget spu*-*-elf*] } {
5087 return [check_no_compiler_messages spu_auto_overlay executable {
5089 } "-Wl,--auto-overlay" ]
5095 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5096 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5097 # test environment appears to run executables on such a simulator.
5099 proc check_effective_target_ultrasparc_hw { } {
5100 return [check_runtime ultrasparc_hw {
5101 int main() { return 0; }
5102 } "-mcpu=ultrasparc"]
5105 # Return 1 if the test environment supports executing UltraSPARC VIS2
5106 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5108 proc check_effective_target_ultrasparc_vis2_hw { } {
5109 return [check_runtime ultrasparc_vis2_hw {
5110 int main() { __asm__(".word 0x81b00320"); return 0; }
5111 } "-mcpu=ultrasparc3"]
5114 # Return 1 if the test environment supports executing UltraSPARC VIS3
5115 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5117 proc check_effective_target_ultrasparc_vis3_hw { } {
5118 return [check_runtime ultrasparc_vis3_hw {
5119 int main() { __asm__(".word 0x81b00220"); return 0; }
5123 # Return 1 if this is a SPARC-V9 target.
5125 proc check_effective_target_sparc_v9 { } {
5126 if { [istarget sparc*-*-*] } {
5127 return [check_no_compiler_messages sparc_v9 object {
5129 asm volatile ("return %i7+8");
5138 # Return 1 if this is a SPARC target with VIS enabled.
5140 proc check_effective_target_sparc_vis { } {
5141 if { [istarget sparc*-*-*] } {
5142 return [check_no_compiler_messages sparc_vis object {
5154 # Return 1 if the target supports hardware vector shift operation.
5156 proc check_effective_target_vect_shift { } {
5157 global et_vect_shift_saved
5160 if [info exists et_vect_shift_saved($et_index)] {
5161 verbose "check_effective_target_vect_shift: using cached result" 2
5163 set et_vect_shift_saved($et_index) 0
5164 if { ([istarget powerpc*-*-*]
5165 && ![istarget powerpc-*-linux*paired*])
5166 || [istarget ia64-*-*]
5167 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5168 || [istarget aarch64*-*-*]
5169 || [is-effective-target arm_neon]
5170 || ([istarget mips*-*-*]
5171 && ([et-is-effective-target mips_msa]
5172 || [et-is-effective-target mips_loongson]))
5173 || ([istarget s390*-*-*]
5174 && [check_effective_target_s390_vx]) } {
5175 set et_vect_shift_saved($et_index) 1
5179 verbose "check_effective_target_vect_shift:\
5180 returning $et_vect_shift_saved($et_index)" 2
5181 return $et_vect_shift_saved($et_index)
5184 proc check_effective_target_whole_vector_shift { } {
5185 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5186 || [istarget ia64-*-*]
5187 || [istarget aarch64*-*-*]
5188 || [istarget powerpc64*-*-*]
5189 || ([is-effective-target arm_neon]
5190 && [check_effective_target_arm_little_endian])
5191 || ([istarget mips*-*-*]
5192 && [et-is-effective-target mips_loongson])
5193 || ([istarget s390*-*-*]
5194 && [check_effective_target_s390_vx]) } {
5200 verbose "check_effective_target_vect_long: returning $answer" 2
5204 # Return 1 if the target supports vector bswap operations.
5206 proc check_effective_target_vect_bswap { } {
5207 global et_vect_bswap_saved
5210 if [info exists et_vect_bswap_saved($et_index)] {
5211 verbose "check_effective_target_vect_bswap: using cached result" 2
5213 set et_vect_bswap_saved($et_index) 0
5214 if { [istarget aarch64*-*-*]
5215 || [is-effective-target arm_neon]
5217 set et_vect_bswap_saved($et_index) 1
5221 verbose "check_effective_target_vect_bswap:\
5222 returning $et_vect_bswap_saved($et_index)" 2
5223 return $et_vect_bswap_saved($et_index)
5226 # Return 1 if the target supports hardware vector shift operation for char.
5228 proc check_effective_target_vect_shift_char { } {
5229 global et_vect_shift_char_saved
5232 if [info exists et_vect_shift_char_saved($et_index)] {
5233 verbose "check_effective_target_vect_shift_char: using cached result" 2
5235 set et_vect_shift_char_saved($et_index) 0
5236 if { ([istarget powerpc*-*-*]
5237 && ![istarget powerpc-*-linux*paired*])
5238 || [is-effective-target arm_neon]
5239 || ([istarget mips*-*-*]
5240 && [et-is-effective-target mips_msa])
5241 || ([istarget s390*-*-*]
5242 && [check_effective_target_s390_vx]) } {
5243 set et_vect_shift_char_saved($et_index) 1
5247 verbose "check_effective_target_vect_shift_char:\
5248 returning $et_vect_shift_char_saved($et_index)" 2
5249 return $et_vect_shift_char_saved($et_index)
5252 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5254 # This can change for different subtargets so do not cache the result.
5256 proc check_effective_target_vect_long { } {
5257 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5258 || (([istarget powerpc*-*-*]
5259 && ![istarget powerpc-*-linux*paired*])
5260 && [check_effective_target_ilp32])
5261 || [is-effective-target arm_neon]
5262 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5263 || [istarget aarch64*-*-*]
5264 || ([istarget mips*-*-*]
5265 && [et-is-effective-target mips_msa])
5266 || ([istarget s390*-*-*]
5267 && [check_effective_target_s390_vx]) } {
5273 verbose "check_effective_target_vect_long: returning $answer" 2
5277 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5279 # This won't change
for different subtargets so
cache the result.
5281 proc check_effective_target_vect_float
{ } {
5282 global et_vect_float_saved
5285 if [info exists et_vect_float_saved
($et_index
)] {
5286 verbose
"check_effective_target_vect_float: using cached result" 2
5288 set et_vect_float_saved
($et_index
) 0
5289 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5290 ||
[istarget powerpc
*-*-*]
5291 ||
[istarget spu
-*-*]
5292 ||
[istarget mips
-sde
-elf
]
5293 ||
[istarget mipsisa64
*-*-*]
5294 ||
[istarget ia64
-*-*]
5295 ||
[istarget aarch64
*-*-*]
5296 ||
([istarget mips
*-*-*]
5297 && [et
-is
-effective
-target mips_msa
])
5298 ||
[is
-effective
-target arm_neon
]
5299 ||
([istarget s390
*-*-*]
5300 && [check_effective_target_s390_vxe
]) } {
5301 set et_vect_float_saved
($et_index
) 1
5305 verbose
"check_effective_target_vect_float:\
5306 returning $et_vect_float_saved
($et_index
)" 2
5307 return $et_vect_float_saved
($et_index
)
5310 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5312 # This won
't change for different subtargets so cache the result.
5314 proc check_effective_target_vect_double { } {
5315 global et_vect_double_saved
5318 if [info exists et_vect_double_saved($et_index)] {
5319 verbose "check_effective_target_vect_double: using cached result" 2
5321 set et_vect_double_saved($et_index) 0
5322 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5323 && [check_no_compiler_messages vect_double assembly {
5324 #ifdef __tune_atom__
5325 # error No double vectorizer support.
5328 || [istarget aarch64*-*-*]
5329 || [istarget spu-*-*]
5330 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5331 || ([istarget mips*-*-*]
5332 && [et-is-effective-target mips_msa])
5333 || ([istarget s390*-*-*]
5334 && [check_effective_target_s390_vx]) } {
5335 set et_vect_double_saved($et_index) 1
5339 verbose "check_effective_target_vect_double:\
5340 returning $et_vect_double_saved($et_index)" 2
5341 return $et_vect_double_saved($et_index)
5344 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5346 # This won't change
for different subtargets so
cache the result.
5348 proc check_effective_target_vect_long_long
{ } {
5349 global et_vect_long_long_saved
5352 if [info exists et_vect_long_long_saved
($et_index
)] {
5353 verbose
"check_effective_target_vect_long_long: using cached result" 2
5355 set et_vect_long_long_saved
($et_index
) 0
5356 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5357 ||
([istarget mips
*-*-*]
5358 && [et
-is
-effective
-target mips_msa
])
5359 ||
([istarget s390
*-*-*]
5360 && [check_effective_target_s390_vx
]) } {
5361 set et_vect_long_long_saved
($et_index
) 1
5365 verbose
"check_effective_target_vect_long_long:\
5366 returning $et_vect_long_long_saved
($et_index
)" 2
5367 return $et_vect_long_long_saved
($et_index
)
5371 #
Return 1 if the target plus current options does not support a vector
5372 #
max instruction
on "int", 0 otherwise.
5374 # This won
't change for different subtargets so cache the result.
5376 proc check_effective_target_vect_no_int_min_max { } {
5377 global et_vect_no_int_min_max_saved
5380 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5381 verbose "check_effective_target_vect_no_int_min_max:\
5382 using cached result" 2
5384 set et_vect_no_int_min_max_saved($et_index) 0
5385 if { [istarget sparc*-*-*]
5386 || [istarget spu-*-*]
5387 || [istarget alpha*-*-*]
5388 || ([istarget mips*-*-*]
5389 && [et-is-effective-target mips_loongson]) } {
5390 set et_vect_no_int_min_max_saved($et_index) 1
5393 verbose "check_effective_target_vect_no_int_min_max:\
5394 returning $et_vect_no_int_min_max_saved($et_index)" 2
5395 return $et_vect_no_int_min_max_saved($et_index)
5398 # Return 1 if the target plus current options does not support a vector
5399 # add instruction on "int", 0 otherwise.
5401 # This won't change
for different subtargets so
cache the result.
5403 proc check_effective_target_vect_no_int_add
{ } {
5404 global et_vect_no_int_add_saved
5407 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5408 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5410 set et_vect_no_int_add_saved
($et_index
) 0
5411 # Alpha only supports vector add
on V8QI and V4HI.
5412 if { [istarget alpha
*-*-*] } {
5413 set et_vect_no_int_add_saved
($et_index
) 1
5416 verbose
"check_effective_target_vect_no_int_add:\
5417 returning $et_vect_no_int_add_saved
($et_index
)" 2
5418 return $et_vect_no_int_add_saved
($et_index
)
5421 #
Return 1 if the target plus current options does not support vector
5422 # bitwise instructions
, 0 otherwise.
5424 # This won
't change for different subtargets so cache the result.
5426 proc check_effective_target_vect_no_bitwise { } {
5427 global et_vect_no_bitwise_saved
5430 if [info exists et_vect_no_bitwise_saved($et_index)] {
5431 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5433 set et_vect_no_bitwise_saved($et_index) 0
5435 verbose "check_effective_target_vect_no_bitwise:\
5436 returning $et_vect_no_bitwise_saved($et_index)" 2
5437 return $et_vect_no_bitwise_saved($et_index)
5440 # Return 1 if the target plus current options supports vector permutation,
5443 # This won't change
for different subtargets so
cache the result.
5445 proc check_effective_target_vect_perm
{ } {
5446 global et_vect_perm_saved
5449 if [info exists et_vect_perm_saved
($et_index
)] {
5450 verbose
"check_effective_target_vect_perm: using cached result" 2
5452 set et_vect_perm_saved
($et_index
) 0
5453 if { [is
-effective
-target arm_neon
]
5454 ||
[istarget aarch64
*-*-*]
5455 ||
[istarget powerpc
*-*-*]
5456 ||
[istarget spu
-*-*]
5457 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5458 ||
([istarget mips
*-*-*]
5459 && ([et
-is
-effective
-target mpaired_single
]
5460 ||
[et
-is
-effective
-target mips_msa
]))
5461 ||
([istarget s390
*-*-*]
5462 && [check_effective_target_s390_vx
]) } {
5463 set et_vect_perm_saved
($et_index
) 1
5466 verbose
"check_effective_target_vect_perm:\
5467 returning $et_vect_perm_saved
($et_index
)" 2
5468 return $et_vect_perm_saved
($et_index
)
5471 #
Return 1 if the target plus current options supports vector permutation
5472 #
on byte
-sized elements
, 0 otherwise.
5474 # This won
't change for different subtargets so cache the result.
5476 proc check_effective_target_vect_perm_byte { } {
5477 global et_vect_perm_byte_saved
5480 if [info exists et_vect_perm_byte_saved($et_index)] {
5481 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5483 set et_vect_perm_byte_saved($et_index) 0
5484 if { ([is-effective-target arm_neon]
5485 && [is-effective-target arm_little_endian])
5486 || ([istarget aarch64*-*-*]
5487 && [is-effective-target aarch64_little_endian])
5488 || [istarget powerpc*-*-*]
5489 || [istarget spu-*-*]
5490 || ([istarget mips-*.*]
5491 && [et-is-effective-target mips_msa])
5492 || ([istarget s390*-*-*]
5493 && [check_effective_target_s390_vx]) } {
5494 set et_vect_perm_byte_saved($et_index) 1
5497 verbose "check_effective_target_vect_perm_byte:\
5498 returning $et_vect_perm_byte_saved($et_index)" 2
5499 return $et_vect_perm_byte_saved($et_index)
5502 # Return 1 if the target plus current options supports vector permutation
5503 # on short-sized elements, 0 otherwise.
5505 # This won't change
for different subtargets so
cache the result.
5507 proc check_effective_target_vect_perm_short
{ } {
5508 global et_vect_perm_short_saved
5511 if [info exists et_vect_perm_short_saved
($et_index
)] {
5512 verbose
"check_effective_target_vect_perm_short: using cached result" 2
5514 set et_vect_perm_short_saved
($et_index
) 0
5515 if { ([is
-effective
-target arm_neon
]
5516 && [is
-effective
-target arm_little_endian
])
5517 ||
([istarget aarch64
*-*-*]
5518 && [is
-effective
-target aarch64_little_endian
])
5519 ||
[istarget powerpc
*-*-*]
5520 ||
[istarget spu
-*-*]
5521 ||
([istarget mips
*-*-*]
5522 && [et
-is
-effective
-target mips_msa
])
5523 ||
([istarget s390
*-*-*]
5524 && [check_effective_target_s390_vx
]) } {
5525 set et_vect_perm_short_saved
($et_index
) 1
5528 verbose
"check_effective_target_vect_perm_short:\
5529 returning $et_vect_perm_short_saved
($et_index
)" 2
5530 return $et_vect_perm_short_saved
($et_index
)
5533 #
Return 1 if the target plus current options supports folding of
5534 # copysign into XORSIGN.
5536 # This won
't change for different subtargets so cache the result.
5538 proc check_effective_target_xorsign { } {
5539 global et_xorsign_saved
5542 if [info exists et_xorsign_saved($et_index)] {
5543 verbose "check_effective_target_xorsign: using cached result" 2
5545 set et_xorsign_saved($et_index) 0
5546 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5547 set et_xorsign_saved($et_index) 1
5550 verbose "check_effective_target_xorsign:\
5551 returning $et_xorsign_saved($et_index)" 2
5552 return $et_xorsign_saved($et_index)
5555 # Return 1 if the target plus current options supports a vector
5556 # widening summation of *short* args into *int* result, 0 otherwise.
5558 # This won't change
for different subtargets so
cache the result.
5560 proc check_effective_target_vect_widen_sum_hi_to_si_pattern
{ } {
5561 global et_vect_widen_sum_hi_to_si_pattern_saved
5564 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)] {
5565 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5566 using cached result
" 2
5568 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 0
5569 if { [istarget powerpc
*-*-*]
5570 ||
[istarget aarch64
*-*-*]
5571 ||
[is
-effective
-target arm_neon
]
5572 ||
[istarget ia64
-*-*] } {
5573 set et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
) 1
5576 verbose
"check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5577 returning $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)" 2
5578 return $et_vect_widen_sum_hi_to_si_pattern_saved
($et_index
)
5581 #
Return 1 if the target plus current options supports a vector
5582 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5583 # A target can also support this widening summation
if it can support
5584 # promotion
(unpacking
) from shorts to ints.
5586 # This won
't change for different subtargets so cache the result.
5588 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5589 global et_vect_widen_sum_hi_to_si_saved
5592 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5593 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5594 using cached result" 2
5596 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5597 [check_effective_target_vect_unpack]
5598 if { [istarget powerpc*-*-*]
5599 || [istarget ia64-*-*] } {
5600 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5603 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5604 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5605 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5608 # Return 1 if the target plus current options supports a vector
5609 # widening summation of *char* args into *short* result, 0 otherwise.
5610 # A target can also support this widening summation if it can support
5611 # promotion (unpacking) from chars to shorts.
5613 # This won't change
for different subtargets so
cache the result.
5615 proc check_effective_target_vect_widen_sum_qi_to_hi
{ } {
5616 global et_vect_widen_sum_qi_to_hi_saved
5619 if [info exists et_vect_widen_sum_qi_to_hi_saved
($et_index
)] {
5620 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
5621 using cached result
" 2
5623 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 0
5624 if { [check_effective_target_vect_unpack
]
5625 ||
[is
-effective
-target arm_neon
]
5626 ||
[istarget ia64
-*-*] } {
5627 set et_vect_widen_sum_qi_to_hi_saved
($et_index
) 1
5630 verbose
"check_effective_target_vect_widen_sum_qi_to_hi:\
5631 returning $et_vect_widen_sum_qi_to_hi_saved
($et_index
)" 2
5632 return $et_vect_widen_sum_qi_to_hi_saved
($et_index
)
5635 #
Return 1 if the target plus current options supports a vector
5636 # widening summation of
*char
* args into
*int* result
, 0 otherwise.
5638 # This won
't change for different subtargets so cache the result.
5640 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5641 global et_vect_widen_sum_qi_to_si_saved
5644 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5645 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5646 using cached result" 2
5648 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5649 if { [istarget powerpc*-*-*] } {
5650 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5653 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5654 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5655 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5658 # Return 1 if the target plus current options supports a vector
5659 # widening multiplication of *char* args into *short* result, 0 otherwise.
5660 # A target can also support this widening multplication if it can support
5661 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5662 # multiplication of shorts).
5664 # This won't change
for different subtargets so
cache the result.
5667 proc check_effective_target_vect_widen_mult_qi_to_hi
{ } {
5668 global et_vect_widen_mult_qi_to_hi_saved
5671 if [info exists et_vect_widen_mult_qi_to_hi_saved
($et_index
)] {
5672 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
5673 using cached result
" 2
5675 if { [check_effective_target_vect_unpack
]
5676 && [check_effective_target_vect_short_mult
] } {
5677 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
5679 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 0
5681 if { [istarget powerpc
*-*-*]
5682 ||
[istarget aarch64
*-*-*]
5683 ||
[is
-effective
-target arm_neon
]
5684 ||
([istarget s390
*-*-*]
5685 && [check_effective_target_s390_vx
]) } {
5686 set et_vect_widen_mult_qi_to_hi_saved
($et_index
) 1
5689 verbose
"check_effective_target_vect_widen_mult_qi_to_hi:\
5690 returning $et_vect_widen_mult_qi_to_hi_saved
($et_index
)" 2
5691 return $et_vect_widen_mult_qi_to_hi_saved
($et_index
)
5694 #
Return 1 if the target plus current options supports a vector
5695 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
5696 # A target can also support this widening multplication
if it can support
5697 # promotion
(unpacking
) from shorts to ints
, and vect_int_mult
(non
-widening
5698 # multiplication of ints
).
5700 # This won
't change for different subtargets so cache the result.
5703 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5704 global et_vect_widen_mult_hi_to_si_saved
5707 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5708 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5709 using cached result" 2
5711 if { [check_effective_target_vect_unpack]
5712 && [check_effective_target_vect_int_mult] } {
5713 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5715 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5717 if { [istarget powerpc*-*-*]
5718 || [istarget spu-*-*]
5719 || [istarget ia64-*-*]
5720 || [istarget aarch64*-*-*]
5721 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5722 || [is-effective-target arm_neon]
5723 || ([istarget s390*-*-*]
5724 && [check_effective_target_s390_vx]) } {
5725 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5728 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5729 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5730 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5733 # Return 1 if the target plus current options supports a vector
5734 # widening multiplication of *char* args into *short* result, 0 otherwise.
5736 # This won't change
for different subtargets so
cache the result.
5738 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern
{ } {
5739 global et_vect_widen_mult_qi_to_hi_pattern_saved
5742 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)] {
5743 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5744 using cached result
" 2
5746 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 0
5747 if { [istarget powerpc
*-*-*]
5748 ||
([is
-effective
-target arm_neon
]
5749 && [check_effective_target_arm_little_endian
])
5750 ||
([istarget s390
*-*-*]
5751 && [check_effective_target_s390_vx
]) } {
5752 set et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
) 1
5755 verbose
"check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5756 returning $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)" 2
5757 return $et_vect_widen_mult_qi_to_hi_pattern_saved
($et_index
)
5760 #
Return 1 if the target plus current options supports a vector
5761 # widening multiplication of
*short
* args into
*int* result
, 0 otherwise.
5763 # This won
't change for different subtargets so cache the result.
5765 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5766 global et_vect_widen_mult_hi_to_si_pattern_saved
5769 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5770 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5771 using cached result" 2
5773 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5774 if { [istarget powerpc*-*-*]
5775 || [istarget spu-*-*]
5776 || [istarget ia64-*-*]
5777 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5778 || ([is-effective-target arm_neon]
5779 && [check_effective_target_arm_little_endian])
5780 || ([istarget s390*-*-*]
5781 && [check_effective_target_s390_vx]) } {
5782 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5785 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5786 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5787 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5790 # Return 1 if the target plus current options supports a vector
5791 # widening multiplication of *int* args into *long* result, 0 otherwise.
5793 # This won't change
for different subtargets so
cache the result.
5795 proc check_effective_target_vect_widen_mult_si_to_di_pattern
{ } {
5796 global et_vect_widen_mult_si_to_di_pattern_saved
5799 if [info exists et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)] {
5800 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
5801 using cached result
" 2
5803 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 0
5804 if {[istarget ia64
-*-*]
5805 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5806 ||
([istarget s390
*-*-*]
5807 && [check_effective_target_s390_vx
]) } {
5808 set et_vect_widen_mult_si_to_di_pattern_saved
($et_index
) 1
5811 verbose
"check_effective_target_vect_widen_mult_si_to_di_pattern:\
5812 returning $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)" 2
5813 return $et_vect_widen_mult_si_to_di_pattern_saved
($et_index
)
5816 #
Return 1 if the target plus current options supports a vector
5817 # widening shift
, 0 otherwise.
5819 # This won
't change for different subtargets so cache the result.
5821 proc check_effective_target_vect_widen_shift { } {
5822 global et_vect_widen_shift_saved
5825 if [info exists et_vect_shift_saved($et_index)] {
5826 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5828 set et_vect_widen_shift_saved($et_index) 0
5829 if { [is-effective-target arm_neon] } {
5830 set et_vect_widen_shift_saved($et_index) 1
5833 verbose "check_effective_target_vect_widen_shift:\
5834 returning $et_vect_widen_shift_saved($et_index)" 2
5835 return $et_vect_widen_shift_saved($et_index)
5838 # Return 1 if the target plus current options supports a vector
5839 # dot-product of signed chars, 0 otherwise.
5841 # This won't change
for different subtargets so
cache the result.
5843 proc check_effective_target_vect_sdot_qi
{ } {
5844 global et_vect_sdot_qi_saved
5847 if [info exists et_vect_sdot_qi_saved
($et_index
)] {
5848 verbose
"check_effective_target_vect_sdot_qi: using cached result" 2
5850 set et_vect_sdot_qi_saved
($et_index
) 0
5851 if { [istarget ia64
-*-*]
5852 ||
([istarget mips
*-*-*]
5853 && [et
-is
-effective
-target mips_msa
]) } {
5854 set et_vect_udot_qi_saved
1
5857 verbose
"check_effective_target_vect_sdot_qi:\
5858 returning $et_vect_sdot_qi_saved
($et_index
)" 2
5859 return $et_vect_sdot_qi_saved
($et_index
)
5862 #
Return 1 if the target plus current options supports a vector
5863 # dot
-product of unsigned chars
, 0 otherwise.
5865 # This won
't change for different subtargets so cache the result.
5867 proc check_effective_target_vect_udot_qi { } {
5868 global et_vect_udot_qi_saved
5871 if [info exists et_vect_udot_qi_saved($et_index)] {
5872 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5874 set et_vect_udot_qi_saved($et_index) 0
5875 if { [istarget powerpc*-*-*]
5876 || [istarget ia64-*-*]
5877 || ([istarget mips*-*-*]
5878 && [et-is-effective-target mips_msa]) } {
5879 set et_vect_udot_qi_saved($et_index) 1
5882 verbose "check_effective_target_vect_udot_qi:\
5883 returning $et_vect_udot_qi_saved($et_index)" 2
5884 return $et_vect_udot_qi_saved($et_index)
5887 # Return 1 if the target plus current options supports a vector
5888 # dot-product of signed shorts, 0 otherwise.
5890 # This won't change
for different subtargets so
cache the result.
5892 proc check_effective_target_vect_sdot_hi
{ } {
5893 global et_vect_sdot_hi_saved
5896 if [info exists et_vect_sdot_hi_saved
($et_index
)] {
5897 verbose
"check_effective_target_vect_sdot_hi: using cached result" 2
5899 set et_vect_sdot_hi_saved
($et_index
) 0
5900 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
5901 ||
[istarget ia64
-*-*]
5902 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5903 ||
([istarget mips
*-*-*]
5904 && [et
-is
-effective
-target mips_msa
]) } {
5905 set et_vect_sdot_hi_saved
($et_index
) 1
5908 verbose
"check_effective_target_vect_sdot_hi:\
5909 returning $et_vect_sdot_hi_saved
($et_index
)" 2
5910 return $et_vect_sdot_hi_saved
($et_index
)
5913 #
Return 1 if the target plus current options supports a vector
5914 # dot
-product of unsigned shorts
, 0 otherwise.
5916 # This won
't change for different subtargets so cache the result.
5918 proc check_effective_target_vect_udot_hi { } {
5919 global et_vect_udot_hi_saved
5922 if [info exists et_vect_udot_hi_saved($et_index)] {
5923 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5925 set et_vect_udot_hi_saved($et_index) 0
5926 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5927 || ([istarget mips*-*-*]
5928 && [et-is-effective-target mips_msa]) } {
5929 set et_vect_udot_hi_saved($et_index) 1
5932 verbose "check_effective_target_vect_udot_hi:\
5933 returning $et_vect_udot_hi_saved($et_index)" 2
5934 return $et_vect_udot_hi_saved($et_index)
5937 # Return 1 if the target plus current options supports a vector
5938 # sad operation of unsigned chars, 0 otherwise.
5940 # This won't change
for different subtargets so
cache the result.
5942 proc check_effective_target_vect_usad_char
{ } {
5943 global et_vect_usad_char_saved
5946 if [info exists et_vect_usad_char_saved
($et_index
)] {
5947 verbose
"check_effective_target_vect_usad_char: using cached result" 2
5949 set et_vect_usad_char_saved
($et_index
) 0
5950 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*] } {
5951 set et_vect_usad_char_saved
($et_index
) 1
5954 verbose
"check_effective_target_vect_usad_char:\
5955 returning $et_vect_usad_char_saved
($et_index
)" 2
5956 return $et_vect_usad_char_saved
($et_index
)
5959 #
Return 1 if the target plus current options supports a vector
5960 # demotion
(packing
) of shorts
(to chars
) and ints
(to shorts
)
5961 # using modulo arithmetic
, 0 otherwise.
5963 # This won
't change for different subtargets so cache the result.
5965 proc check_effective_target_vect_pack_trunc { } {
5966 global et_vect_pack_trunc_saved
5969 if [info exists et_vect_pack_trunc_saved($et_index)] {
5970 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5972 set et_vect_pack_trunc_saved($et_index) 0
5973 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5974 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5975 || [istarget aarch64*-*-*]
5976 || [istarget spu-*-*]
5977 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5978 && [check_effective_target_arm_little_endian])
5979 || ([istarget mips*-*-*]
5980 && [et-is-effective-target mips_msa])
5981 || ([istarget s390*-*-*]
5982 && [check_effective_target_s390_vx]) } {
5983 set et_vect_pack_trunc_saved($et_index) 1
5986 verbose "check_effective_target_vect_pack_trunc:\
5987 returning $et_vect_pack_trunc_saved($et_index)" 2
5988 return $et_vect_pack_trunc_saved($et_index)
5991 # Return 1 if the target plus current options supports a vector
5992 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5994 # This won't change
for different subtargets so
cache the result.
5996 proc check_effective_target_vect_unpack
{ } {
5997 global et_vect_unpack_saved
6000 if [info exists et_vect_unpack_saved
($et_index
)] {
6001 verbose
"check_effective_target_vect_unpack: using cached result" 2
6003 set et_vect_unpack_saved
($et_index
) 0
6004 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*paired
*])
6005 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6006 ||
[istarget spu
-*-*]
6007 ||
[istarget ia64
-*-*]
6008 ||
[istarget aarch64
*-*-*]
6009 ||
([istarget mips
*-*-*]
6010 && [et
-is
-effective
-target mips_msa
])
6011 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
6012 && [check_effective_target_arm_little_endian
])
6013 ||
([istarget s390
*-*-*]
6014 && [check_effective_target_s390_vx
]) } {
6015 set et_vect_unpack_saved
($et_index
) 1
6018 verbose
"check_effective_target_vect_unpack:\
6019 returning $et_vect_unpack_saved
($et_index
)" 2
6020 return $et_vect_unpack_saved
($et_index
)
6023 #
Return 1 if the target plus current options does not guarantee
6024 # that its STACK_BOUNDARY is
>= the reguired vector alignment.
6026 # This won
't change for different subtargets so cache the result.
6028 proc check_effective_target_unaligned_stack { } {
6029 global et_unaligned_stack_saved
6031 if [info exists et_unaligned_stack_saved] {
6032 verbose "check_effective_target_unaligned_stack: using cached result" 2
6034 set et_unaligned_stack_saved 0
6036 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6037 return $et_unaligned_stack_saved
6040 # Return 1 if the target plus current options does not support a vector
6041 # alignment mechanism, 0 otherwise.
6043 # This won't change
for different subtargets so
cache the result.
6045 proc check_effective_target_vect_no_align
{ } {
6046 global et_vect_no_align_saved
6049 if [info exists et_vect_no_align_saved
($et_index
)] {
6050 verbose
"check_effective_target_vect_no_align: using cached result" 2
6052 set et_vect_no_align_saved
($et_index
) 0
6053 if { [istarget mipsisa64
*-*-*]
6054 ||
[istarget mips
-sde
-elf
]
6055 ||
[istarget sparc
*-*-*]
6056 ||
[istarget ia64
-*-*]
6057 ||
[check_effective_target_arm_vect_no_misalign
]
6058 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
6059 ||
([istarget mips
*-*-*]
6060 && [et
-is
-effective
-target mips_loongson
]) } {
6061 set et_vect_no_align_saved
($et_index
) 1
6064 verbose
"check_effective_target_vect_no_align:\
6065 returning $et_vect_no_align_saved
($et_index
)" 2
6066 return $et_vect_no_align_saved
($et_index
)
6069 #
Return 1 if the target supports a vector misalign access
, 0 otherwise.
6071 # This won
't change for different subtargets so cache the result.
6073 proc check_effective_target_vect_hw_misalign { } {
6074 global et_vect_hw_misalign_saved
6077 if [info exists et_vect_hw_misalign_saved($et_index)] {
6078 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6080 set et_vect_hw_misalign_saved($et_index) 0
6081 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6082 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6083 || [istarget aarch64*-*-*]
6084 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6085 || ([istarget s390*-*-*]
6086 && [check_effective_target_s390_vx]) } {
6087 set et_vect_hw_misalign_saved($et_index) 1
6089 if { [istarget arm*-*-*] } {
6090 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6093 verbose "check_effective_target_vect_hw_misalign:\
6094 returning $et_vect_hw_misalign_saved($et_index)" 2
6095 return $et_vect_hw_misalign_saved($et_index)
6099 # Return 1 if arrays are aligned to the vector alignment
6100 # boundary, 0 otherwise.
6102 proc check_effective_target_vect_aligned_arrays { } {
6103 set et_vect_aligned_arrays 0
6104 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6105 && !([is-effective-target ia32]
6106 || ([check_avx_available] && ![check_prefer_avx128])))
6107 || [istarget spu-*-*] } {
6108 set et_vect_aligned_arrays 1
6111 verbose "check_effective_target_vect_aligned_arrays:\
6112 returning $et_vect_aligned_arrays" 2
6113 return $et_vect_aligned_arrays
6116 # Return 1 if types of size 32 bit or less are naturally aligned
6117 # (aligned to their type-size), 0 otherwise.
6119 # This won't change
for different subtargets so
cache the result.
6121 proc check_effective_target_natural_alignment_32
{ } {
6122 global et_natural_alignment_32
6124 if [info exists et_natural_alignment_32_saved
] {
6125 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
6127 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
6128 set et_natural_alignment_32_saved
1
6129 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
])
6130 ||
[istarget avr
-*-*] } {
6131 set et_natural_alignment_32_saved
0
6134 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6135 return $et_natural_alignment_32_saved
6138 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
6139 # type
-size
), 0 otherwise.
6141 # This won
't change for different subtargets so cache the result.
6143 proc check_effective_target_natural_alignment_64 { } {
6144 global et_natural_alignment_64
6146 if [info exists et_natural_alignment_64_saved] {
6147 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6149 set et_natural_alignment_64_saved 0
6150 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6151 || [istarget spu-*-*] } {
6152 set et_natural_alignment_64_saved 1
6155 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6156 return $et_natural_alignment_64_saved
6159 # Return 1 if all vector types are naturally aligned (aligned to their
6160 # type-size), 0 otherwise.
6162 proc check_effective_target_vect_natural_alignment { } {
6163 set et_vect_natural_alignment 1
6164 if { [check_effective_target_arm_eabi]
6165 || [istarget nvptx-*-*]
6166 || [istarget s390*-*-*] } {
6167 set et_vect_natural_alignment 0
6169 verbose "check_effective_target_vect_natural_alignment:\
6170 returning $et_vect_natural_alignment" 2
6171 return $et_vect_natural_alignment
6174 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6176 proc check_effective_target_vector_alignment_reachable { } {
6177 set et_vector_alignment_reachable 0
6178 if { [check_effective_target_vect_aligned_arrays]
6179 || [check_effective_target_natural_alignment_32] } {
6180 set et_vector_alignment_reachable 1
6182 verbose "check_effective_target_vector_alignment_reachable:\
6183 returning $et_vector_alignment_reachable" 2
6184 return $et_vector_alignment_reachable
6187 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6189 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6190 set et_vector_alignment_reachable_for_64bit 0
6191 if { [check_effective_target_vect_aligned_arrays]
6192 || [check_effective_target_natural_alignment_64] } {
6193 set et_vector_alignment_reachable_for_64bit 1
6195 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6196 returning $et_vector_alignment_reachable_for_64bit" 2
6197 return $et_vector_alignment_reachable_for_64bit
6200 # Return 1 if the target only requires element alignment for vector accesses
6202 proc check_effective_target_vect_element_align { } {
6203 global et_vect_element_align
6206 if [info exists et_vect_element_align($et_index)] {
6207 verbose "check_effective_target_vect_element_align:\
6208 using cached result" 2
6210 set et_vect_element_align($et_index) 0
6211 if { ([istarget arm*-*-*]
6212 && ![check_effective_target_arm_vect_no_misalign])
6213 || [check_effective_target_vect_hw_misalign] } {
6214 set et_vect_element_align($et_index) 1
6218 verbose "check_effective_target_vect_element_align:\
6219 returning $et_vect_element_align($et_index)" 2
6220 return $et_vect_element_align($et_index)
6223 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6225 proc check_effective_target_vect_load_lanes { } {
6226 global et_vect_load_lanes
6228 if [info exists et_vect_load_lanes] {
6229 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6231 set et_vect_load_lanes 0
6232 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6233 || [istarget aarch64*-*-*] } {
6234 set et_vect_load_lanes 1
6238 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6239 return $et_vect_load_lanes
6242 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6244 proc check_effective_target_vect_condition { } {
6245 global et_vect_cond_saved
6248 if [info exists et_vect_cond_saved($et_index)] {
6249 verbose "check_effective_target_vect_cond: using cached result" 2
6251 set et_vect_cond_saved($et_index) 0
6252 if { [istarget aarch64*-*-*]
6253 || [istarget powerpc*-*-*]
6254 || [istarget ia64-*-*]
6255 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6256 || [istarget spu-*-*]
6257 || ([istarget mips*-*-*]
6258 && [et-is-effective-target mips_msa])
6259 || ([istarget arm*-*-*]
6260 && [check_effective_target_arm_neon_ok])
6261 || ([istarget s390*-*-*]
6262 && [check_effective_target_s390_vx]) } {
6263 set et_vect_cond_saved($et_index) 1
6267 verbose "check_effective_target_vect_cond:\
6268 returning $et_vect_cond_saved($et_index)" 2
6269 return $et_vect_cond_saved($et_index)
6272 # Return 1 if the target supports vector conditional operations where
6273 # the comparison has different type from the lhs, 0 otherwise.
6275 proc check_effective_target_vect_cond_mixed { } {
6276 global et_vect_cond_mixed_saved
6279 if [info exists et_vect_cond_mixed_saved($et_index)] {
6280 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6282 set et_vect_cond_mixed_saved($et_index) 0
6283 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6284 || [istarget aarch64*-*-*]
6285 || [istarget powerpc*-*-*]
6286 || ([istarget mips*-*-*]
6287 && [et-is-effective-target mips_msa])
6288 || ([istarget s390*-*-*]
6289 && [check_effective_target_s390_vx]) } {
6290 set et_vect_cond_mixed_saved($et_index) 1
6294 verbose "check_effective_target_vect_cond_mixed:\
6295 returning $et_vect_cond_mixed_saved($et_index)" 2
6296 return $et_vect_cond_mixed_saved($et_index)
6299 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6301 proc check_effective_target_vect_char_mult { } {
6302 global et_vect_char_mult_saved
6305 if [info exists et_vect_char_mult_saved($et_index)] {
6306 verbose "check_effective_target_vect_char_mult: using cached result" 2
6308 set et_vect_char_mult_saved($et_index) 0
6309 if { [istarget aarch64*-*-*]
6310 || [istarget ia64-*-*]
6311 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6312 || [check_effective_target_arm32]
6313 || [check_effective_target_powerpc_altivec]
6314 || ([istarget mips*-*-*]
6315 && [et-is-effective-target mips_msa])
6316 || ([istarget s390*-*-*]
6317 && [check_effective_target_s390_vx]) } {
6318 set et_vect_char_mult_saved($et_index) 1
6322 verbose "check_effective_target_vect_char_mult:\
6323 returning $et_vect_char_mult_saved($et_index)" 2
6324 return $et_vect_char_mult_saved($et_index)
6327 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6329 proc check_effective_target_vect_short_mult { } {
6330 global et_vect_short_mult_saved
6333 if [info exists et_vect_short_mult_saved($et_index)] {
6334 verbose "check_effective_target_vect_short_mult: using cached result" 2
6336 set et_vect_short_mult_saved($et_index) 0
6337 if { [istarget ia64-*-*]
6338 || [istarget spu-*-*]
6339 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6340 || [istarget powerpc*-*-*]
6341 || [istarget aarch64*-*-*]
6342 || [check_effective_target_arm32]
6343 || ([istarget mips*-*-*]
6344 && ([et-is-effective-target mips_msa]
6345 || [et-is-effective-target mips_loongson]))
6346 || ([istarget s390*-*-*]
6347 && [check_effective_target_s390_vx]) } {
6348 set et_vect_short_mult_saved($et_index) 1
6352 verbose "check_effective_target_vect_short_mult:\
6353 returning $et_vect_short_mult_saved($et_index)" 2
6354 return $et_vect_short_mult_saved($et_index)
6357 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6359 proc check_effective_target_vect_int_mult { } {
6360 global et_vect_int_mult_saved
6363 if [info exists et_vect_int_mult_saved($et_index)] {
6364 verbose "check_effective_target_vect_int_mult: using cached result" 2
6366 set et_vect_int_mult_saved($et_index) 0
6367 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6368 || [istarget spu-*-*]
6369 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6370 || [istarget ia64-*-*]
6371 || [istarget aarch64*-*-*]
6372 || ([istarget mips*-*-*]
6373 && [et-is-effective-target mips_msa])
6374 || [check_effective_target_arm32]
6375 || ([istarget s390*-*-*]
6376 && [check_effective_target_s390_vx]) } {
6377 set et_vect_int_mult_saved($et_index) 1
6381 verbose "check_effective_target_vect_int_mult:\
6382 returning $et_vect_int_mult_saved($et_index)" 2
6383 return $et_vect_int_mult_saved($et_index)
6386 # Return 1 if the target supports 64 bit hardware vector
6387 # multiplication of long operands with a long result, 0 otherwise.
6389 # This can change for different subtargets so do not cache the result.
6391 proc check_effective_target_vect_long_mult { } {
6392 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6393 || (([istarget powerpc*-*-*]
6394 && ![istarget powerpc-*-linux*paired*])
6395 && [check_effective_target_ilp32])
6396 || [is-effective-target arm_neon]
6397 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6398 || [istarget aarch64*-*-*]
6399 || ([istarget mips*-*-*]
6400 && [et-is-effective-target mips_msa]) } {
6406 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6410 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6412 proc check_effective_target_vect_extract_even_odd { } {
6413 global et_vect_extract_even_odd_saved
6416 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6417 verbose "check_effective_target_vect_extract_even_odd:\
6418 using cached result" 2
6420 set et_vect_extract_even_odd_saved($et_index) 0
6421 if { [istarget aarch64*-*-*]
6422 || [istarget powerpc*-*-*]
6423 || [is-effective-target arm_neon]
6424 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6425 || [istarget ia64-*-*]
6426 || [istarget spu-*-*]
6427 || ([istarget mips*-*-*]
6428 && ([et-is-effective-target mips_msa]
6429 || [et-is-effective-target mpaired_single]))
6430 || ([istarget s390*-*-*]
6431 && [check_effective_target_s390_vx]) } {
6432 set et_vect_extract_even_odd_saved($et_index) 1
6436 verbose "check_effective_target_vect_extract_even_odd:\
6437 returning $et_vect_extract_even_odd_saved($et_index)" 2
6438 return $et_vect_extract_even_odd_saved($et_index)
6441 # Return 1 if the target supports vector interleaving, 0 otherwise.
6443 proc check_effective_target_vect_interleave { } {
6444 global et_vect_interleave_saved
6447 if [info exists et_vect_interleave_saved($et_index)] {
6448 verbose "check_effective_target_vect_interleave: using cached result" 2
6450 set et_vect_interleave_saved($et_index) 0
6451 if { [istarget aarch64*-*-*]
6452 || [istarget powerpc*-*-*]
6453 || [is-effective-target arm_neon]
6454 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6455 || [istarget ia64-*-*]
6456 || [istarget spu-*-*]
6457 || ([istarget mips*-*-*]
6458 && ([et-is-effective-target mpaired_single]
6459 || [et-is-effective-target mips_msa]))
6460 || ([istarget s390*-*-*]
6461 && [check_effective_target_s390_vx]) } {
6462 set et_vect_interleave_saved($et_index) 1
6466 verbose "check_effective_target_vect_interleave:\
6467 returning $et_vect_interleave_saved($et_index)" 2
6468 return $et_vect_interleave_saved($et_index)
6471 foreach N {2 3 4 8} {
6472 eval [string map [list N $N] {
6473 # Return 1 if the target supports 2-vector interleaving
6474 proc check_effective_target_vect_stridedN { } {
6475 global et_vect_stridedN_saved
6478 if [info exists et_vect_stridedN_saved($et_index)] {
6479 verbose "check_effective_target_vect_stridedN:\
6480 using cached result" 2
6482 set et_vect_stridedN_saved($et_index) 0
6484 && [check_effective_target_vect_interleave]
6485 && [check_effective_target_vect_extract_even_odd] } {
6486 set et_vect_stridedN_saved($et_index) 1
6488 if { ([istarget arm*-*-*]
6489 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6490 set et_vect_stridedN_saved($et_index) 1
6494 verbose "check_effective_target_vect_stridedN:\
6495 returning $et_vect_stridedN_saved($et_index)" 2
6496 return $et_vect_stridedN_saved($et_index)
6501 # Return 1 if the target supports multiple vector sizes
6503 proc check_effective_target_vect_multiple_sizes { } {
6504 global et_vect_multiple_sizes_saved
6507 set et_vect_multiple_sizes_saved($et_index) 0
6508 if { [istarget aarch64*-*-*]
6509 || [is-effective-target arm_neon]
6510 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6511 && ([check_avx_available] && ![check_prefer_avx128])) } {
6512 set et_vect_multiple_sizes_saved($et_index) 1
6515 verbose "check_effective_target_vect_multiple_sizes:\
6516 returning $et_vect_multiple_sizes_saved($et_index)" 2
6517 return $et_vect_multiple_sizes_saved($et_index)
6520 # Return 1 if the target supports vectors of 64 bits.
6522 proc check_effective_target_vect64 { } {
6523 global et_vect64_saved
6526 if [info exists et_vect64_saved($et_index)] {
6527 verbose "check_effective_target_vect64: using cached result" 2
6529 set et_vect64_saved($et_index) 0
6530 if { ([is-effective-target arm_neon]
6531 && [check_effective_target_arm_little_endian])
6532 || [istarget aarch64*-*-*]
6533 || [istarget sparc*-*-*] } {
6534 set et_vect64_saved($et_index) 1
6538 verbose "check_effective_target_vect64:\
6539 returning $et_vect64_saved($et_index)" 2
6540 return $et_vect64_saved($et_index)
6543 # Return 1 if the target supports vector copysignf calls.
6545 proc check_effective_target_vect_call_copysignf { } {
6546 global et_vect_call_copysignf_saved
6549 if [info exists et_vect_call_copysignf_saved($et_index)] {
6550 verbose "check_effective_target_vect_call_copysignf:\
6551 using cached result" 2
6553 set et_vect_call_copysignf_saved($et_index) 0
6554 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6555 || [istarget powerpc*-*-*]
6556 || [istarget aarch64*-*-*] } {
6557 set et_vect_call_copysignf_saved($et_index) 1
6561 verbose "check_effective_target_vect_call_copysignf:\
6562 returning $et_vect_call_copysignf_saved($et_index)" 2
6563 return $et_vect_call_copysignf_saved($et_index)
6566 # Return 1 if the target supports hardware square root instructions.
6568 proc check_effective_target_sqrt_insn { } {
6569 global et_sqrt_insn_saved
6571 if [info exists et_sqrt_insn_saved] {
6572 verbose "check_effective_target_hw_sqrt: using cached result" 2
6574 set et_sqrt_insn_saved 0
6575 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6576 || [istarget powerpc*-*-*]
6577 || [istarget aarch64*-*-*]
6578 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
6579 || ([istarget s390*-*-*]
6580 && [check_effective_target_s390_vx]) } {
6581 set et_sqrt_insn_saved 1
6585 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6586 return $et_sqrt_insn_saved
6589 # Return 1 if the target supports vector sqrtf calls.
6591 proc check_effective_target_vect_call_sqrtf { } {
6592 global et_vect_call_sqrtf_saved
6595 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6596 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6598 set et_vect_call_sqrtf_saved($et_index) 0
6599 if { [istarget aarch64*-*-*]
6600 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6601 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6602 || ([istarget s390*-*-*]
6603 && [check_effective_target_s390_vx]) } {
6604 set et_vect_call_sqrtf_saved($et_index) 1
6608 verbose "check_effective_target_vect_call_sqrtf:\
6609 returning $et_vect_call_sqrtf_saved($et_index)" 2
6610 return $et_vect_call_sqrtf_saved($et_index)
6613 # Return 1 if the target supports vector lrint calls.
6615 proc check_effective_target_vect_call_lrint { } {
6616 set et_vect_call_lrint 0
6617 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6618 && [check_effective_target_ilp32]) } {
6619 set et_vect_call_lrint 1
6622 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6623 return $et_vect_call_lrint
6626 # Return 1 if the target supports vector btrunc calls.
6628 proc check_effective_target_vect_call_btrunc { } {
6629 global et_vect_call_btrunc_saved
6632 if [info exists et_vect_call_btrunc_saved($et_index)] {
6633 verbose "check_effective_target_vect_call_btrunc:\
6634 using cached result" 2
6636 set et_vect_call_btrunc_saved($et_index) 0
6637 if { [istarget aarch64*-*-*] } {
6638 set et_vect_call_btrunc_saved($et_index) 1
6642 verbose "check_effective_target_vect_call_btrunc:\
6643 returning $et_vect_call_btrunc_saved($et_index)" 2
6644 return $et_vect_call_btrunc_saved($et_index)
6647 # Return 1 if the target supports vector btruncf calls.
6649 proc check_effective_target_vect_call_btruncf { } {
6650 global et_vect_call_btruncf_saved
6653 if [info exists et_vect_call_btruncf_saved($et_index)] {
6654 verbose "check_effective_target_vect_call_btruncf:\
6655 using cached result" 2
6657 set et_vect_call_btruncf_saved($et_index) 0
6658 if { [istarget aarch64*-*-*] } {
6659 set et_vect_call_btruncf_saved($et_index) 1
6663 verbose "check_effective_target_vect_call_btruncf:\
6664 returning $et_vect_call_btruncf_saved($et_index)" 2
6665 return $et_vect_call_btruncf_saved($et_index)
6668 # Return 1 if the target supports vector ceil calls.
6670 proc check_effective_target_vect_call_ceil { } {
6671 global et_vect_call_ceil_saved
6674 if [info exists et_vect_call_ceil_saved($et_index)] {
6675 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6677 set et_vect_call_ceil_saved($et_index) 0
6678 if { [istarget aarch64*-*-*] } {
6679 set et_vect_call_ceil_saved($et_index) 1
6683 verbose "check_effective_target_vect_call_ceil:\
6684 returning $et_vect_call_ceil_saved($et_index)" 2
6685 return $et_vect_call_ceil_saved($et_index)
6688 # Return 1 if the target supports vector ceilf calls.
6690 proc check_effective_target_vect_call_ceilf { } {
6691 global et_vect_call_ceilf_saved
6694 if [info exists et_vect_call_ceilf_saved($et_index)] {
6695 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6697 set et_vect_call_ceilf_saved($et_index) 0
6698 if { [istarget aarch64*-*-*] } {
6699 set et_vect_call_ceilf_saved($et_index) 1
6703 verbose "check_effective_target_vect_call_ceilf:\
6704 returning $et_vect_call_ceilf_saved($et_index)" 2
6705 return $et_vect_call_ceilf_saved($et_index)
6708 # Return 1 if the target supports vector floor calls.
6710 proc check_effective_target_vect_call_floor { } {
6711 global et_vect_call_floor_saved
6714 if [info exists et_vect_call_floor_saved($et_index)] {
6715 verbose "check_effective_target_vect_call_floor: using cached result" 2
6717 set et_vect_call_floor_saved($et_index) 0
6718 if { [istarget aarch64*-*-*] } {
6719 set et_vect_call_floor_saved($et_index) 1
6723 verbose "check_effective_target_vect_call_floor:\
6724 returning $et_vect_call_floor_saved($et_index)" 2
6725 return $et_vect_call_floor_saved($et_index)
6728 # Return 1 if the target supports vector floorf calls.
6730 proc check_effective_target_vect_call_floorf { } {
6731 global et_vect_call_floorf_saved
6734 if [info exists et_vect_call_floorf_saved($et_index)] {
6735 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6737 set et_vect_call_floorf_saved($et_index) 0
6738 if { [istarget aarch64*-*-*] } {
6739 set et_vect_call_floorf_saved($et_index) 1
6743 verbose "check_effective_target_vect_call_floorf:\
6744 returning $et_vect_call_floorf_saved($et_index)" 2
6745 return $et_vect_call_floorf_saved($et_index)
6748 # Return 1 if the target supports vector lceil calls.
6750 proc check_effective_target_vect_call_lceil { } {
6751 global et_vect_call_lceil_saved
6754 if [info exists et_vect_call_lceil_saved($et_index)] {
6755 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6757 set et_vect_call_lceil_saved($et_index) 0
6758 if { [istarget aarch64*-*-*] } {
6759 set et_vect_call_lceil_saved($et_index) 1
6763 verbose "check_effective_target_vect_call_lceil:\
6764 returning $et_vect_call_lceil_saved($et_index)" 2
6765 return $et_vect_call_lceil_saved($et_index)
6768 # Return 1 if the target supports vector lfloor calls.
6770 proc check_effective_target_vect_call_lfloor { } {
6771 global et_vect_call_lfloor_saved
6774 if [info exists et_vect_call_lfloor_saved($et_index)] {
6775 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6777 set et_vect_call_lfloor_saved($et_index) 0
6778 if { [istarget aarch64*-*-*] } {
6779 set et_vect_call_lfloor_saved($et_index) 1
6783 verbose "check_effective_target_vect_call_lfloor:\
6784 returning $et_vect_call_lfloor_saved($et_index)" 2
6785 return $et_vect_call_lfloor_saved($et_index)
6788 # Return 1 if the target supports vector nearbyint calls.
6790 proc check_effective_target_vect_call_nearbyint { } {
6791 global et_vect_call_nearbyint_saved
6794 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6795 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6797 set et_vect_call_nearbyint_saved($et_index) 0
6798 if { [istarget aarch64*-*-*] } {
6799 set et_vect_call_nearbyint_saved($et_index) 1
6803 verbose "check_effective_target_vect_call_nearbyint:\
6804 returning $et_vect_call_nearbyint_saved($et_index)" 2
6805 return $et_vect_call_nearbyint_saved($et_index)
6808 # Return 1 if the target supports vector nearbyintf calls.
6810 proc check_effective_target_vect_call_nearbyintf { } {
6811 global et_vect_call_nearbyintf_saved
6814 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6815 verbose "check_effective_target_vect_call_nearbyintf:\
6816 using cached result" 2
6818 set et_vect_call_nearbyintf_saved($et_index) 0
6819 if { [istarget aarch64*-*-*] } {
6820 set et_vect_call_nearbyintf_saved($et_index) 1
6824 verbose "check_effective_target_vect_call_nearbyintf:\
6825 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6826 return $et_vect_call_nearbyintf_saved($et_index)
6829 # Return 1 if the target supports vector round calls.
6831 proc check_effective_target_vect_call_round { } {
6832 global et_vect_call_round_saved
6835 if [info exists et_vect_call_round_saved($et_index)] {
6836 verbose "check_effective_target_vect_call_round: using cached result" 2
6838 set et_vect_call_round_saved($et_index) 0
6839 if { [istarget aarch64*-*-*] } {
6840 set et_vect_call_round_saved($et_index) 1
6844 verbose "check_effective_target_vect_call_round:\
6845 returning $et_vect_call_round_saved($et_index)" 2
6846 return $et_vect_call_round_saved($et_index)
6849 # Return 1 if the target supports vector roundf calls.
6851 proc check_effective_target_vect_call_roundf { } {
6852 global et_vect_call_roundf_saved
6855 if [info exists et_vect_call_roundf_saved($et_index)] {
6856 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6858 set et_vect_call_roundf_saved($et_index) 0
6859 if { [istarget aarch64*-*-*] } {
6860 set et_vect_call_roundf_saved($et_index) 1
6864 verbose "check_effective_target_vect_call_roundf:\
6865 returning $et_vect_call_roundf_saved($et_index)" 2
6866 return $et_vect_call_roundf_saved($et_index)
6869 # Return 1 if the target supports section-anchors
6871 proc check_effective_target_section_anchors { } {
6872 global et_section_anchors_saved
6874 if [info exists et_section_anchors_saved] {
6875 verbose "check_effective_target_section_anchors: using cached result" 2
6877 set et_section_anchors_saved 0
6878 if { [istarget powerpc*-*-*]
6879 || [istarget arm*-*-*]
6880 || [istarget aarch64*-*-*] } {
6881 set et_section_anchors_saved 1
6885 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6886 return $et_section_anchors_saved
6889 # Return 1 if the target supports atomic operations on "int_128" values.
6891 proc check_effective_target_sync_int_128 { } {
6892 if { [istarget spu-*-*] } {
6899 # Return 1 if the target supports atomic operations on "int_128" values
6900 # and can execute them.
6901 # This requires support for both compare-and-swap and true atomic loads.
6903 proc check_effective_target_sync_int_128_runtime { } {
6904 if { [istarget spu-*-*] } {
6911 # Return 1 if the target supports atomic operations on "long long".
6913 # Note: 32bit x86 targets require -march=pentium in dg-options.
6914 # Note: 32bit s390 targets require -mzarch in dg-options.
6916 proc check_effective_target_sync_long_long { } {
6917 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6918 || [istarget aarch64*-*-*]
6919 || [istarget arm*-*-*]
6920 || [istarget alpha*-*-*]
6921 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6922 || [istarget s390*-*-*]
6923 || [istarget spu-*-*] } {
6930 # Return 1 if the target supports atomic operations on "long long"
6931 # and can execute them.
6933 # Note: 32bit x86 targets require -march=pentium in dg-options.
6935 proc check_effective_target_sync_long_long_runtime { } {
6936 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6937 && [check_cached_effective_target sync_long_long_available {
6938 check_runtime_nocache sync_long_long_available {
6942 unsigned int eax, ebx, ecx, edx;
6943 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6944 return !(edx & bit_CMPXCHG8B);
6949 || [istarget aarch64*-*-*]
6950 || ([istarget arm*-*-linux-*]
6951 && [check_runtime sync_longlong_runtime {
6957 if (sizeof (long long) != 8)
6960 /* Just check for native;
6961 checking for kernel fallback is tricky. */
6962 asm volatile ("ldrexd r0,r1, [%0]"
6963 : : "r" (&l1) : "r0", "r1");
6967 || [istarget alpha*-*-*]
6968 || ([istarget sparc*-*-*]
6969 && [check_effective_target_lp64]
6970 && [check_effective_target_ultrasparc_hw])
6971 || [istarget spu-*-*]
6972 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6979 # Return 1 if the target supports byte swap instructions.
6981 proc check_effective_target_bswap { } {
6982 global et_bswap_saved
6984 if [info exists et_bswap_saved] {
6985 verbose "check_effective_target_bswap: using cached result" 2
6987 set et_bswap_saved 0
6988 if { [istarget aarch64*-*-*]
6989 || [istarget alpha*-*-*]
6990 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6991 || [istarget m68k-*-*]
6992 || [istarget powerpc*-*-*]
6993 || [istarget rs6000-*-*]
6994 || [istarget s390*-*-*]
6995 || ([istarget arm*-*-*]
6996 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6998 #error not armv6 or later
7002 set et_bswap_saved 1
7006 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
7007 return $et_bswap_saved
7010 # Return 1 if the target supports 16-bit byte swap instructions.
7012 proc check_effective_target_bswap16 { } {
7013 global et_bswap16_saved
7015 if [info exists et_bswap16_saved] {
7016 verbose "check_effective_target_bswap16: using cached result" 2
7018 set et_bswap16_saved 0
7019 if { [is-effective-target bswap]
7020 && ![istarget alpha*-*-*]
7021 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7022 set et_bswap16_saved 1
7026 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
7027 return $et_bswap16_saved
7030 # Return 1 if the target supports 32-bit byte swap instructions.
7032 proc check_effective_target_bswap32 { } {
7033 global et_bswap32_saved
7035 if [info exists et_bswap32_saved] {
7036 verbose "check_effective_target_bswap32: using cached result" 2
7038 set et_bswap32_saved 0
7039 if { [is-effective-target bswap] } {
7040 set et_bswap32_saved 1
7044 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
7045 return $et_bswap32_saved
7048 # Return 1 if the target supports 64-bit byte swap instructions.
7050 # Note: 32bit s390 targets require -mzarch in dg-options.
7052 proc check_effective_target_bswap64 { } {
7053 global et_bswap64_saved
7055 # expand_unop can expand 64-bit byte swap on 32-bit targets
7056 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
7062 # Return 1 if the target supports atomic operations on "int" and "long".
7064 proc check_effective_target_sync_int_long { } {
7065 global et_sync_int_long_saved
7067 if [info exists et_sync_int_long_saved] {
7068 verbose "check_effective_target_sync_int_long: using cached result" 2
7070 set et_sync_int_long_saved 0
7071 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7072 #
load-reserved/store
-conditional instructions.
7073 if { [istarget ia64
-*-*]
7074 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7075 ||
[istarget aarch64
*-*-*]
7076 ||
[istarget alpha
*-*-*]
7077 ||
[istarget arm
*-*-linux
-*]
7078 ||
([istarget arm
*-*-*]
7079 && [check_effective_target_arm_acq_rel
])
7080 ||
[istarget bfin
*-*linux
*]
7081 ||
[istarget hppa
*-*linux
*]
7082 ||
[istarget s390
*-*-*]
7083 ||
[istarget powerpc
*-*-*]
7084 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
7085 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
7086 ||
[istarget spu
-*-*]
7087 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
7088 ||
[check_effective_target_mips_llsc
] } {
7089 set et_sync_int_long_saved
1
7093 verbose
"check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7094 return $et_sync_int_long_saved
7097 #
Return 1 if the target supports atomic operations
on "char" and "short".
7099 proc check_effective_target_sync_char_short
{ } {
7100 global et_sync_char_short_saved
7102 if [info exists et_sync_char_short_saved
] {
7103 verbose
"check_effective_target_sync_char_short: using cached result" 2
7105 set et_sync_char_short_saved
0
7106 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
7107 # load-reserved/store-conditional instructions.
7108 if { [istarget aarch64*-*-*]
7109 || [istarget ia64-*-*]
7110 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7111 || [istarget alpha*-*-*]
7112 || [istarget arm*-*-linux-*]
7113 || ([istarget arm*-*-*]
7114 && [check_effective_target_arm_acq_rel])
7115 || [istarget hppa*-*linux*]
7116 || [istarget s390*-*-*]
7117 || [istarget powerpc*-*-*]
7118 || [istarget crisv32-*-*] || [istarget cris-*-*]
7119 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7120 || [istarget spu-*-*]
7121 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7122 || [check_effective_target_mips_llsc] } {
7123 set et_sync_char_short_saved 1
7127 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7128 return $et_sync_char_short_saved
7131 # Return 1 if the target uses a ColdFire FPU.
7133 proc check_effective_target_coldfire_fpu { } {
7134 return [check_no_compiler_messages coldfire_fpu assembly {
7141 # Return true if this is a uClibc target.
7143 proc check_effective_target_uclibc {} {
7144 return [check_no_compiler_messages uclibc object {
7145 #include <features.h>
7146 #if !defined (__UCLIBC__)
7152 # Return true if this is a uclibc target and if the uclibc feature
7153 # described by __$feature__ is not present.
7155 proc check_missing_uclibc_feature {feature} {
7156 return [check_no_compiler_messages $feature object "
7157 #include <features.h>
7158 #if !defined (__UCLIBC) || defined (__${feature}__)
7164 # Return true if this is a Newlib target.
7166 proc check_effective_target_newlib {} {
7167 return [check_no_compiler_messages newlib object {
7172 # Some newlib versions don't provide a frexpl and instead depend
7173 #
on frexp to implement long double conversions in their printf
-like
7174 # functions. This leads to broken results. Detect such versions here.
7176 proc check_effective_target_newlib_broken_long_double_io
{} {
7177 if { [is
-effective
-target newlib
] && ![is
-effective
-target frexpl
] } {
7183 #
Return true
if this is NOT a Bionic target.
7185 proc check_effective_target_non_bionic
{} {
7186 return [check_no_compiler_messages non_bionic object
{
7188 #
if defined
(__BIONIC__
)
7194 #
Return true
if this target has error.h header.
7196 proc check_effective_target_error_h
{} {
7197 return [check_no_compiler_messages error_h object
{
7202 #
Return true
if this target has tgmath.h header.
7204 proc check_effective_target_tgmath_h
{} {
7205 return [check_no_compiler_messages tgmath_h object
{
7210 #
Return true
if target
's libc supports complex functions.
7212 proc check_effective_target_libc_has_complex_functions {} {
7213 return [check_no_compiler_messages libc_has_complex_functions object {
7214 #include <complex.h>
7219 # (a) an error of a few ULP is expected in string to floating-point
7220 # conversion functions; and
7221 # (b) overflow is not always detected correctly by those functions.
7223 proc check_effective_target_lax_strtofp {} {
7224 # By default, assume that all uClibc targets suffer from this.
7225 return [check_effective_target_uclibc]
7228 # Return 1 if this is a target for which wcsftime is a dummy
7229 # function that always returns 0.
7231 proc check_effective_target_dummy_wcsftime {} {
7232 # By default, assume that all uClibc targets suffer from this.
7233 return [check_effective_target_uclibc]
7236 # Return 1 if constructors with initialization priority arguments are
7237 # supposed on this target.
7239 proc check_effective_target_init_priority {} {
7240 return [check_no_compiler_messages init_priority assembly "
7241 void f() __attribute__((constructor (1000)));
7246 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7247 # This can be used with any check_* proc that takes no argument and
7248 # returns only 1 or 0. It could be used with check_* procs that take
7249 # arguments with keywords that pass particular arguments.
7251 proc is-effective-target { arg } {
7254 if { ![info exists et_index] } {
7255 # Initialize the effective target index that is used in some
7256 # check_effective_target_* procs.
7259 if { [info procs check_effective_target_${arg}] != [list] } {
7260 set selected [check_effective_target_${arg}]
7263 "vmx_hw" { set selected [check_vmx_hw_available] }
7264 "vsx_hw" { set selected [check_vsx_hw_available] }
7265 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7266 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7267 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7268 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7269 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7270 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7271 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7272 "dfp_hw" { set selected [check_dfp_hw_available] }
7273 "htm_hw" { set selected [check_htm_hw_available] }
7274 "named_sections" { set selected [check_named_sections_available] }
7275 "gc_sections" { set selected [check_gc_sections_available] }
7276 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7277 default { error "unknown effective target keyword `$arg'" }
7280 verbose
"is-effective-target: $arg $selected" 2
7284 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7286 proc is
-effective
-target
-keyword
{ arg } {
7287 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7290 # These have different names
for their check_
* procs.
7292 "vmx_hw" { return 1 }
7293 "vsx_hw" { return 1 }
7294 "p8vector_hw" { return 1 }
7295 "p9vector_hw" { return 1 }
7296 "p9modulo_hw" { return 1 }
7297 "ppc_float128_sw" { return 1 }
7298 "ppc_float128_hw" { return 1 }
7299 "ppc_recip_hw" { return 1 }
7300 "dfp_hw" { return 1 }
7301 "htm_hw" { return 1 }
7302 "named_sections" { return 1 }
7303 "gc_sections" { return 1 }
7304 "cxa_atexit" { return 1 }
7305 default
{ return 0 }
7310 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7311 # indicate what target is currently being processed. This is
for
7312 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7315 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7316 global dg
-do-what
-default
7317 global EFFECTIVE_TARGETS
7320 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7321 foreach target $EFFECTIVE_TARGETS
{
7322 set target_flags $flags
7323 set dg
-do-what
-default
compile
7324 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7325 if { [info procs add_options_for_$
{target
}] != [list
] } {
7326 set target_flags
[add_options_for_$
{target
} "$flags"]
7328 if { [info procs check_effective_target_$
{target
}_runtime
]
7329 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7330 set dg
-do-what
-default run
7332 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7336 $runtest $testcases $flags $
{default
-extra
-flags
}
7340 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7341 # et_index
, 0 otherwise.
7343 proc et
-is
-effective
-target
{ target
} {
7344 global EFFECTIVE_TARGETS
7347 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7348 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7354 #
Return 1 if target default to short enums
7356 proc check_effective_target_short_enums
{ } {
7357 return [check_no_compiler_messages short_enums assembly
{
7359 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7363 #
Return 1 if target supports merging string constants at link time.
7365 proc check_effective_target_string_merging
{ } {
7366 return [check_no_messages_and_pattern string_merging \
7367 "rodata\\.str" assembly {
7368 const char
*var
= "String";
7372 #
Return 1 if target has the basic signed and unsigned types in
7373 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7374 # working
<stdint.h
> for all targets.
7376 proc check_effective_target_stdint_types
{ } {
7377 return [check_no_compiler_messages stdint_types assembly
{
7379 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7380 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7384 #
Return 1 if target has the basic signed and unsigned types in
7385 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7386 # these types agree with those in the header, as some systems have
7387 # only <inttypes.h>.
7389 proc check_effective_target_inttypes_types { } {
7390 return [check_no_compiler_messages inttypes_types assembly {
7391 #include <inttypes.h>
7392 int8_t a; int16_t b; int32_t c; int64_t d;
7393 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7397 # Return 1 if programs are intended to be run on a simulator
7398 # (i.e. slowly) rather than hardware (i.e. fast).
7400 proc check_effective_target_simulator { } {
7402 # All "src/sim" simulators set this one.
7403 if [board_info target exists is_simulator] {
7404 return [board_info target is_simulator]
7407 # The "sid" simulators don't
set that one
, but at least they
set
7409 if [board_info target
exists slow_simulator
] {
7410 return [board_info target slow_simulator
]
7416 #
Return 1 if programs are intended to be run
on hardware rather than
7419 proc check_effective_target_hw
{ } {
7421 # All
"src/sim" simulators set this one.
7422 if [board_info target
exists is_simulator
] {
7423 if [board_info target is_simulator
] {
7430 # The
"sid" simulators don't set that one, but at least they set
7432 if [board_info target
exists slow_simulator
] {
7433 if [board_info target slow_simulator
] {
7443 #
Return 1 if the target is a VxWorks kernel.
7445 proc check_effective_target_vxworks_kernel
{ } {
7446 return [check_no_compiler_messages vxworks_kernel assembly
{
7447 #
if !defined __vxworks || defined __RTP__
7453 #
Return 1 if the target is a VxWorks RTP.
7455 proc check_effective_target_vxworks_rtp
{ } {
7456 return [check_no_compiler_messages vxworks_rtp assembly
{
7457 #
if !defined __vxworks ||
!defined __RTP__
7463 #
Return 1 if the target is expected to provide wide character support.
7465 proc check_effective_target_wchar
{ } {
7466 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7469 return [check_no_compiler_messages wchar assembly
{
7474 #
Return 1 if the target has
<pthread.h
>.
7476 proc check_effective_target_pthread_h
{ } {
7477 return [check_no_compiler_messages pthread_h assembly
{
7478 #
include <pthread.h
>
7482 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7483 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7484 # chsize. We test
for a trivially functional truncation
; no stubs.
7485 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7486 # different function to be used.
7488 proc check_effective_target_fd_truncate { } {
7490 #define _FILE_OFFSET_BITS 64
7497 FILE *f = fopen ("tst.tmp", "wb");
7499 const char t[] = "test writing more than ten characters";
7503 write (fd, t, sizeof (t) - 1);
7505 if (ftruncate (fd, 10) != 0)
7514 f = fopen ("tst.tmp", "rb");
7515 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7523 if { [check_runtime ftruncate $prog] } {
7527 regsub "ftruncate" $prog "chsize" prog
7528 return [check_runtime chsize $prog]
7531 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7533 proc add_options_for_c99_runtime { flags } {
7534 if { [istarget *-*-solaris2*] } {
7535 return "$flags -std=c99"
7537 if { [istarget powerpc-*-darwin*] } {
7538 return "$flags -mmacosx-version-min=10.3"
7543 # Add to FLAGS all the target-specific flags needed to enable
7544 # full IEEE compliance mode.
7546 proc add_options_for_ieee { flags } {
7547 if { [istarget alpha*-*-*]
7548 || [istarget sh*-*-*] } {
7549 return "$flags -mieee"
7551 if { [istarget rx-*-*] } {
7552 return "$flags -mnofpu"
7557 if {![info exists flags_to_postpone]} {
7558 set flags_to_postpone ""
7561 # Add to FLAGS the flags needed to enable functions to bind locally
7562 # when using pic/PIC passes in the testsuite.
7563 proc add_options_for_bind_pic_locally { flags } {
7564 global flags_to_postpone
7566 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7567 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7568 # order to make sure that the multilib_flags doesn't override this.
7570 if {[check_no_compiler_messages using_pic2 assembly
{
7575 set flags_to_postpone
"-fPIE"
7578 if {[check_no_compiler_messages using_pic1 assembly
{
7583 set flags_to_postpone
"-fpie"
7589 # Add to FLAGS the flags needed to enable
64-bit vectors.
7591 proc add_options_for_double_vectors
{ flags
} {
7592 if [is
-effective
-target arm_neon_ok
] {
7593 return "$flags -mvectorize-with-neon-double"
7599 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
7601 proc add_options_for_stack_size
{ flags
} {
7602 if [is
-effective
-target stack_size
] {
7603 set stack_size
[dg
-effective
-target
-value stack_size
]
7604 return "$flags -DSTACK_SIZE=$stack_size"
7610 #
Return 1 if the target provides a full C99 runtime.
7612 proc check_effective_target_c99_runtime
{ } {
7613 return [check_cached_effective_target c99_runtime
{
7616 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7617 set contents
[read $file
]
7620 #ifndef HAVE_C99_RUNTIME
7621 #error
!HAVE_C99_RUNTIME
7624 check_no_compiler_messages_nocache c99_runtime assembly \
7625 $contents
[add_options_for_c99_runtime
""]
7629 #
Return 1 if target wchar_t is at least
4 bytes.
7631 proc check_effective_target_4byte_wchar_t
{ } {
7632 return [check_no_compiler_messages
4byte_wchar_t object
{
7633 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
7637 #
Return 1 if the target supports automatic stack alignment.
7639 proc check_effective_target_automatic_stack_alignment
{ } {
7640 # Ordinarily x86 supports automatic stack alignment ...
7641 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
7642 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
7643 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
7644 return [check_effective_target_ilp32];
7651 # Return true if we are compiling for AVX target.
7653 proc check_avx_available { } {
7654 if { [check_no_compiler_messages avx_available assembly {
7664 # Return true if 32- and 16-bytes vectors are available.
7666 proc check_effective_target_vect_sizes_32B_16B { } {
7667 if { [check_avx_available] && ![check_prefer_avx128] } {
7674 # Return true if 16- and 8-bytes vectors are available.
7676 proc check_effective_target_vect_sizes_16B_8B { } {
7677 if { [check_avx_available]
7678 || [is-effective-target arm_neon]
7679 || [istarget aarch64*-*-*] } {
7687 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7690 proc check_prefer_avx128 { } {
7691 if ![check_avx_available] {
7694 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7695 float a[1024],b[1024],c[1024];
7696 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7697 } "-O2 -ftree-vectorize"]
7701 # Return 1 if avx512f instructions can be compiled.
7703 proc check_effective_target_avx512f { } {
7704 return [check_no_compiler_messages avx512f object {
7705 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7707 __m512d _mm512_add (__m512d a)
7709 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7714 # Return 1 if avx instructions can be compiled.
7716 proc check_effective_target_avx { } {
7717 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7720 return [check_no_compiler_messages avx object {
7721 void _mm256_zeroall (void)
7723 __builtin_ia32_vzeroall ();
7728 # Return 1 if avx2 instructions can be compiled.
7729 proc check_effective_target_avx2 { } {
7730 return [check_no_compiler_messages avx2 object {
7731 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7733 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7735 return __builtin_ia32_andnotsi256 (__X, __Y);
7740 # Return 1 if sse instructions can be compiled.
7741 proc check_effective_target_sse { } {
7742 return [check_no_compiler_messages sse object {
7745 __builtin_ia32_stmxcsr ();
7751 # Return 1 if sse2 instructions can be compiled.
7752 proc check_effective_target_sse2 { } {
7753 return [check_no_compiler_messages sse2 object {
7754 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7756 __m128i _mm_srli_si128 (__m128i __A, int __N)
7758 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7763 # Return 1 if sse4.1 instructions can be compiled.
7764 proc check_effective_target_sse4 { } {
7765 return [check_no_compiler_messages sse4.1 object {
7766 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7767 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7769 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7771 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7777 # Return 1 if F16C instructions can be compiled.
7779 proc check_effective_target_f16c { } {
7780 return [check_no_compiler_messages f16c object {
7781 #include "immintrin.h"
7783 foo (unsigned short val)
7785 return _cvtsh_ss (val);
7790 # Return 1 if C wchar_t type is compatible with char16_t.
7792 proc check_effective_target_wchar_t_char16_t_compatible { } {
7793 return [check_no_compiler_messages wchar_t_char16_t object {
7795 __CHAR16_TYPE__ *p16 = &wc;
7796 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7800 # Return 1 if C wchar_t type is compatible with char32_t.
7802 proc check_effective_target_wchar_t_char32_t_compatible { } {
7803 return [check_no_compiler_messages wchar_t_char32_t object {
7805 __CHAR32_TYPE__ *p32 = &wc;
7806 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7810 # Return 1 if pow10 function exists.
7812 proc check_effective_target_pow10 { } {
7813 return [check_runtime pow10 {
7823 # Return 1 if frexpl function exists.
7825 proc check_effective_target_frexpl { } {
7826 return [check_runtime frexpl {
7831 x = frexpl (5.0, &y);
7838 # Return 1 if issignaling function exists.
7839 proc check_effective_target_issignaling {} {
7840 return [check_runtime issignaling {
7845 return issignaling (0.0);
7850 # Return 1 if current options generate DFP instructions, 0 otherwise.
7851 proc check_effective_target_hard_dfp {} {
7852 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7853 typedef float d64 __attribute__((mode(DD)));
7855 void foo (void) { z = x + y; }
7859 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7860 # for strchr etc. functions.
7862 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7863 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7866 #if !defined(__cplusplus) \
7867 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7868 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7869 ISO C++ correct string.h and wchar.h protos not supported.
7876 # Return 1 if GNU as is used.
7878 proc check_effective_target_gas { } {
7879 global use_gas_saved
7882 if {![info exists use_gas_saved]} {
7883 # Check if the as used by gcc is GNU as.
7884 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7885 # Provide /dev/null as input, otherwise gas times out reading from
7887 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7888 set as_output [lindex $status 1]
7889 if { [ string first "GNU" $as_output ] >= 0 } {
7895 return $use_gas_saved
7898 # Return 1 if GNU ld is used.
7900 proc check_effective_target_gld { } {
7901 global use_gld_saved
7904 if {![info exists use_gld_saved]} {
7905 # Check if the ld used by gcc is GNU ld.
7906 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7907 set status [remote_exec host "$gcc_ld" "--version"]
7908 set ld_output [lindex $status 1]
7909 if { [ string first "GNU" $ld_output ] >= 0 } {
7915 return $use_gld_saved
7918 # Return 1 if the compiler has been configure with link-time optimization
7921 proc check_effective_target_lto { } {
7922 if { [istarget nvptx-*-*] } {
7925 return [check_no_compiler_messages lto object {
7930 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7932 proc check_effective_target_maybe_x32 { } {
7933 return [check_no_compiler_messages maybe_x32 object {
7935 } "-mx32 -maddress-mode=short"]
7938 # Return 1 if this target supports the -fsplit-stack option, 0
7941 proc check_effective_target_split_stack {} {
7942 return [check_no_compiler_messages split_stack object {
7947 # Return 1 if this target supports the -masm=intel option, 0
7950 proc check_effective_target_masm_intel {} {
7951 return [check_no_compiler_messages masm_intel object {
7952 extern void abort (void);
7956 # Return 1 if the language for the compiler under test is C.
7958 proc check_effective_target_c { } {
7960 if [string match $tool "gcc"] {
7966 # Return 1 if the language for the compiler under test is C++.
7968 proc check_effective_target_c++ { } {
7970 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7976 set cxx_default "c++14"
7977 # Check whether the current active language standard supports the features
7978 # of C++11/C++14 by checking for the presence of one of the -std flags.
7979 # This assumes that the default for the compiler is $cxx_default, and that
7980 # there will never be multiple -std= arguments on the command line.
7981 proc check_effective_target_c++11_only { } {
7983 if ![check_effective_target_c++] {
7986 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7989 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7994 proc check_effective_target_c++11 { } {
7995 if [check_effective_target_c++11_only] {
7998 return [check_effective_target_c++14]
8000 proc check_effective_target_c++11_down { } {
8001 if ![check_effective_target_c++] {
8004 return [expr ![check_effective_target_c++14] ]
8007 proc check_effective_target_c++14_only { } {
8009 if ![check_effective_target_c++] {
8012 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8015 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8021 proc check_effective_target_c++14 { } {
8022 if [check_effective_target_c++14_only] {
8025 return [check_effective_target_c++17]
8027 proc check_effective_target_c++14_down { } {
8028 if ![check_effective_target_c++] {
8031 return [expr ![check_effective_target_c++17] ]
8034 proc check_effective_target_c++98_only { } {
8036 if ![check_effective_target_c++] {
8039 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8042 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8048 proc check_effective_target_c++17_only { } {
8050 if ![check_effective_target_c++] {
8053 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8056 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8062 proc check_effective_target_c++17 { } {
8063 if [check_effective_target_c++17_only] {
8066 return [check_effective_target_c++2a]
8068 proc check_effective_target_c++17_down { } {
8069 if ![check_effective_target_c++] {
8072 return [expr ![check_effective_target_c++2a] ]
8075 proc check_effective_target_c++2a_only { } {
8077 if ![check_effective_target_c++] {
8080 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8083 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8088 proc check_effective_target_c++2a { } {
8089 return [check_effective_target_c++2a_only]
8092 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8093 proc check_effective_target_concepts { } {
8094 return [check-flags { "" { } { -fconcepts } }]
8097 # Return 1 if expensive testcases should be run.
8099 proc check_effective_target_run_expensive_tests { } {
8100 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8106 # Returns 1 if "mempcpy" is available on the target system.
8108 proc check_effective_target_mempcpy {} {
8109 return [check_function_available "mempcpy"]
8112 # Returns 1 if "stpcpy" is available on the target system.
8114 proc check_effective_target_stpcpy {} {
8115 return [check_function_available "stpcpy"]
8118 # Check whether the vectorizer tests are supported by the target and
8119 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8120 # If a port wants to execute the tests more than once it should append
8121 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8122 # will be added by a call to add_options_for_<target>.
8123 # Set dg-do-what-default to either compile or run, depending on target
8124 # capabilities. Do not set this if the supported target is appended to
8125 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8126 # automatically. Return the number of effective targets if vectorizer tests
8127 # are supported, 0 otherwise.
8129 proc check_vect_support_and_set_flags { } {
8130 global DEFAULT_VECTCFLAGS
8131 global dg-do-what-default
8132 global EFFECTIVE_TARGETS
8134 if [istarget powerpc-*paired*] {
8135 lappend DEFAULT_VECTCFLAGS "-mpaired"
8136 if [check_750cl_hw_available] {
8137 set dg-do-what-default run
8139 set dg-do-what-default compile
8141 } elseif [istarget powerpc*-*-*] {
8142 # Skip targets not supporting -maltivec.
8143 if ![is-effective-target powerpc_altivec_ok] {
8147 lappend DEFAULT_VECTCFLAGS "-maltivec"
8148 if [check_p9vector_hw_available] {
8149 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8150 } elseif [check_p8vector_hw_available] {
8151 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8152 } elseif [check_vsx_hw_available] {
8153 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8156 if [check_vmx_hw_available] {
8157 set dg-do-what-default run
8159 if [is-effective-target ilp32] {
8160 # Specify a cpu that supports VMX for compile-only tests.
8161 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8163 set dg-do-what-default compile
8165 } elseif { [istarget spu-*-*] } {
8166 set dg-do-what-default run
8167 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8168 lappend DEFAULT_VECTCFLAGS "-msse2"
8169 if { [check_effective_target_sse2_runtime] } {
8170 set dg-do-what-default run
8172 set dg-do-what-default compile
8174 } elseif { [istarget mips*-*-*]
8175 && [check_effective_target_nomips16] } {
8176 if { [check_effective_target_mpaired_single] } {
8177 lappend EFFECTIVE_TARGETS mpaired_single
8179 if { [check_effective_target_mips_loongson] } {
8180 lappend EFFECTIVE_TARGETS mips_loongson
8182 if { [check_effective_target_mips_msa] } {
8183 lappend EFFECTIVE_TARGETS mips_msa
8185 return [llength $EFFECTIVE_TARGETS]
8186 } elseif [istarget sparc*-*-*] {
8187 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8188 if [check_effective_target_ultrasparc_hw] {
8189 set dg-do-what-default run
8191 set dg-do-what-default compile
8193 } elseif [istarget alpha*-*-*] {
8194 # Alpha's vectorization capabilities are extremely limited.
8195 # It
's more effort than its worth disabling all of the tests
8196 # that it cannot pass. But if you actually want to see what
8197 # does work, command out the return.
8200 lappend DEFAULT_VECTCFLAGS "-mmax"
8201 if [check_alpha_max_hw_available] {
8202 set dg-do-what-default run
8204 set dg-do-what-default compile
8206 } elseif [istarget ia64-*-*] {
8207 set dg-do-what-default run
8208 } elseif [is-effective-target arm_neon_ok] {
8209 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8210 # NEON does not support denormals, so is not used for vectorization by
8211 # default to avoid loss of precision. We must pass -ffast-math to test
8212 # vectorization of float operations.
8213 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8214 if [is-effective-target arm_neon_hw] {
8215 set dg-do-what-default run
8217 set dg-do-what-default compile
8219 } elseif [istarget "aarch64*-*-*"] {
8220 set dg-do-what-default run
8221 } elseif [istarget s390*-*-*] {
8222 # The S/390 backend set a default of 2 for that value.
8223 # Override it to have the same situation as with other
8225 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8226 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8227 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8228 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8229 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8230 if [check_effective_target_s390_vxe] {
8231 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8232 set dg-do-what-default run
8233 } elseif [check_effective_target_s390_vx] {
8234 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8235 set dg-do-what-default run
8237 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8238 set dg-do-what-default compile
8247 # Return 1 if the target does *not* require strict alignment.
8249 proc check_effective_target_non_strict_align {} {
8251 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8252 # are interfaces defined for misaligned access and thus
8253 # depending on the architecture levels unaligned access is
8255 if [istarget "arm*-*-*"] {
8256 return [check_effective_target_arm_unaligned]
8259 return [check_no_compiler_messages non_strict_align assembly {
8261 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8263 void foo(void) { z = (c *) y; }
8267 # Return 1 if the target has <ucontext.h>.
8269 proc check_effective_target_ucontext_h { } {
8270 return [check_no_compiler_messages ucontext_h assembly {
8271 #include <ucontext.h>
8275 proc check_effective_target_aarch64_tiny { } {
8276 if { [istarget aarch64*-*-*] } {
8277 return [check_no_compiler_messages aarch64_tiny object {
8278 #ifdef __AARCH64_CMODEL_TINY__
8281 #error target not AArch64 tiny code model
8289 # Create functions to check that the AArch64 assembler supports the
8290 # various architecture extensions via the .arch_extension pseudo-op.
8292 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
8293 eval [string map [list FUNC $aarch64_ext] {
8294 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8295 if { [istarget aarch64*-*-*] } {
8296 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8297 __asm__ (".arch_extension FUNC");
8298 } "-march=armv8-a+FUNC"]
8306 proc check_effective_target_aarch64_small { } {
8307 if { [istarget aarch64*-*-*] } {
8308 return [check_no_compiler_messages aarch64_small object {
8309 #ifdef __AARCH64_CMODEL_SMALL__
8312 #error target not AArch64 small code model
8320 proc check_effective_target_aarch64_large { } {
8321 if { [istarget aarch64*-*-*] } {
8322 return [check_no_compiler_messages aarch64_large object {
8323 #ifdef __AARCH64_CMODEL_LARGE__
8326 #error target not AArch64 large code model
8335 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8336 # register set, instruction set, addressing capabilities and ABI.
8338 proc check_effective_target_avr_tiny { } {
8339 if { [istarget avr*-*-*] } {
8340 return [check_no_compiler_messages avr_tiny object {
8344 #error target not a reduced AVR Tiny core
8352 # Return 1 if <fenv.h> is available with all the standard IEEE
8353 # exceptions and floating-point exceptions are raised by arithmetic
8354 # operations. (If the target requires special options for "inexact"
8355 # exceptions, those need to be specified in the testcases.)
8357 proc check_effective_target_fenv_exceptions {} {
8358 return [check_runtime fenv_exceptions {
8361 #ifndef FE_DIVBYZERO
8362 # error Missing FE_DIVBYZERO
8365 # error Missing FE_INEXACT
8368 # error Missing FE_INVALID
8371 # error Missing FE_OVERFLOW
8373 #ifndef FE_UNDERFLOW
8374 # error Missing FE_UNDERFLOW
8376 volatile float a = 0.0f, r;
8381 if (fetestexcept (FE_INVALID))
8386 } [add_options_for_ieee "-std=gnu99"]]
8389 proc check_effective_target_tiny {} {
8390 global et_target_tiny_saved
8392 if [info exists et_target_tiny_saved] {
8393 verbose "check_effective_target_tiny: using cached result" 2
8395 set et_target_tiny_saved 0
8396 if { [istarget aarch64*-*-*]
8397 && [check_effective_target_aarch64_tiny] } {
8398 set et_target_tiny_saved 1
8400 if { [istarget avr-*-*]
8401 && [check_effective_target_avr_tiny] } {
8402 set et_target_tiny_saved 1
8406 return $et_target_tiny_saved
8409 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8411 proc check_effective_target_logical_op_short_circuit {} {
8412 if { [istarget mips*-*-*]
8413 || [istarget arc*-*-*]
8414 || [istarget avr*-*-*]
8415 || [istarget crisv32-*-*] || [istarget cris-*-*]
8416 || [istarget mmix-*-*]
8417 || [istarget s390*-*-*]
8418 || [istarget powerpc*-*-*]
8419 || [istarget nios2*-*-*]
8420 || [istarget riscv*-*-*]
8421 || [istarget visium-*-*]
8422 || [check_effective_target_arm_cortex_m] } {
8428 # Record that dg-final test TEST requires convential compilation.
8430 proc force_conventional_output_for { test } {
8431 if { [info proc $test] == "" } {
8432 perror "$test does not exist"
8435 proc ${test}_required_options {} {
8436 global gcc_force_conventional_output
8437 return $gcc_force_conventional_output
8441 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8442 # otherwise. Cache the result.
8444 proc check_effective_target_pie_copyreloc { } {
8445 global pie_copyreloc_available_saved
8447 global GCC_UNDER_TEST
8449 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8453 # Need auto-host.h to check linker support.
8454 if { ![file exists ../../auto-host.h ] } {
8458 if [info exists pie_copyreloc_available_saved] {
8459 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8461 # Set up and compile to see if linker supports PIE with copy
8462 # reloc. Include the current process ID in the file names to
8463 # prevent conflicts with invocations for multiple testsuites.
8468 set f [open $src "w"]
8469 puts $f "#include \"../../auto-host.h\""
8470 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8471 puts $f "# error Linker does not support PIE with copy reloc."
8475 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8476 set lines [${tool}_target_compile $src $obj object ""]
8481 if [string match "" $lines] then {
8482 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8483 set pie_copyreloc_available_saved 1
8485 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8486 set pie_copyreloc_available_saved 0
8490 return $pie_copyreloc_available_saved
8493 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8494 # otherwise. Cache the result.
8496 proc check_effective_target_got32x_reloc { } {
8497 global got32x_reloc_available_saved
8499 global GCC_UNDER_TEST
8501 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8505 # Need auto-host.h to check linker support.
8506 if { ![file exists ../../auto-host.h ] } {
8510 if [info exists got32x_reloc_available_saved] {
8511 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8513 # Include the current process ID in the file names to prevent
8514 # conflicts with invocations for multiple testsuites.
8516 set src got32x[pid].c
8517 set obj got32x[pid].o
8519 set f [open $src "w"]
8520 puts $f "#include \"../../auto-host.h\""
8521 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8522 puts $f "# error Assembler does not support R_386_GOT32X."
8526 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8527 set lines [${tool}_target_compile $src $obj object ""]
8532 if [string match "" $lines] then {
8533 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8534 set got32x_reloc_available_saved 1
8536 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8537 set got32x_reloc_available_saved 0
8541 return $got32x_reloc_available_saved
8544 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8545 # 0 otherwise. Cache the result.
8547 proc check_effective_target_tls_get_addr_via_got { } {
8548 global tls_get_addr_via_got_available_saved
8550 global GCC_UNDER_TEST
8552 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8556 # Need auto-host.h to check linker support.
8557 if { ![file exists ../../auto-host.h ] } {
8561 if [info exists tls_get_addr_via_got_available_saved] {
8562 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8564 # Include the current process ID in the file names to prevent
8565 # conflicts with invocations for multiple testsuites.
8567 set src tls_get_addr_via_got[pid].c
8568 set obj tls_get_addr_via_got[pid].o
8570 set f [open $src "w"]
8571 puts $f "#include \"../../auto-host.h\""
8572 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8573 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8577 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8578 set lines [${tool}_target_compile $src $obj object ""]
8583 if [string match "" $lines] then {
8584 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8585 set tls_get_addr_via_got_available_saved 1
8587 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8588 set tls_get_addr_via_got_available_saved 0
8592 return $tls_get_addr_via_got_available_saved
8595 # Return 1 if the target uses comdat groups.
8597 proc check_effective_target_comdat_group {} {
8598 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8600 inline int foo () { return 1; }
8605 # Return 1 if target supports __builtin_eh_return
8606 proc check_effective_target_builtin_eh_return { } {
8607 return [check_no_compiler_messages builtin_eh_return object {
8608 void test (long l, void *p)
8610 __builtin_eh_return (l, p);
8615 # Return 1 if the target supports max reduction for vectors.
8617 proc check_effective_target_vect_max_reduc { } {
8618 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8624 # Return 1 if there is an nvptx offload compiler.
8626 proc check_effective_target_offload_nvptx { } {
8627 return [check_no_compiler_messages offload_nvptx object {
8628 int main () {return 0;}
8629 } "-foffload=nvptx-none" ]
8632 # Return 1 if the compiler has been configured with hsa offloading.
8634 proc check_effective_target_offload_hsa { } {
8635 return [check_no_compiler_messages offload_hsa assembly {
8636 int main () {return 0;}
8640 # Return 1 if the target support -fprofile-update=atomic
8641 proc check_effective_target_profile_update_atomic {} {
8642 return [check_no_compiler_messages profile_update_atomic assembly {
8643 int main (void) { return 0; }
8644 } "-fprofile-update=atomic -fprofile-generate"]
8647 # Return 1 if vector (va - vector add) instructions are understood by
8648 # the assembler and can be executed. This also covers checking for
8649 # the VX kernel feature. A kernel without that feature does not
8650 # enable the vector facility and the following check will die with a
8652 proc check_effective_target_s390_vx { } {
8653 if ![istarget s390*-*-*] then {
8657 return [check_runtime s390_check_vx {
8660 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8663 } "-march=z13 -mzarch" ]
8666 # Same as above but for the z14 vector enhancement facility. Test
8667 # is performed with the vector nand instruction.
8668 proc check_effective_target_s390_vxe { } {
8669 if ![istarget s390*-*-*] then {
8673 return [check_runtime s390_check_vxe {
8676 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8679 } "-march=z14 -mzarch" ]
8682 #For versions of ARM architectures that have hardware div insn,
8683 #disable the divmod transform
8685 proc check_effective_target_arm_divmod_simode { } {
8686 return [check_no_compiler_messages arm_divmod assembly {
8687 #ifdef __ARM_ARCH_EXT_IDIV__
8694 # Return 1 if target supports divmod hardware insn or divmod libcall.
8696 proc check_effective_target_divmod { } {
8697 #TODO: Add checks for all targets that have either hardware divmod insn
8698 # or define libfunc for divmod.
8699 if { [istarget arm*-*-*]
8700 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8706 # Return 1 if target supports divmod for SImode. The reason for
8707 # separating this from check_effective_target_divmod is that
8708 # some versions of ARM architecture define div instruction
8709 # only for simode, and for these archs, we do not want to enable
8710 # divmod transform for simode.
8712 proc check_effective_target_divmod_simode { } {
8713 if { [istarget arm*-*-*] } {
8714 return [check_effective_target_arm_divmod_simode]
8717 return [check_effective_target_divmod]
8720 # Return 1 if store merging optimization is applicable for target.
8721 # Store merging is not profitable for targets like the avr which
8722 # can load/store only one byte at a time. Use int size as a proxy
8723 # for the number of bytes the target can write, and skip for targets
8724 # with a smallish (< 32) size.
8726 proc check_effective_target_store_merge { } {
8727 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8734 # Return 1 if we're able to assemble rdrand
8736 proc check_effective_target_rdrand
{ } {
8737 return [check_no_compiler_messages_nocache rdrand object
{
8742 __builtin_ia32_rdrand32_step
(&val
);
8748 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, ldcl
,
8749 # stc
, stcl
, mcr and mrc.
8750 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
8751 if { ![istarget arm
*-*-*] } {
8754 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
8755 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
8761 proc check_effective_target_arm_coproc1_ok
{ } {
8762 return [check_cached_effective_target arm_coproc1_ok \
8763 check_effective_target_arm_coproc1_ok_nocache
]
8766 #
Return 1 if the target supports all coprocessor instructions checked by
8767 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
8768 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
8769 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
8770 if { ![check_effective_target_arm_coproc1_ok
] } {
8773 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
8774 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 5
8780 proc check_effective_target_arm_coproc2_ok
{ } {
8781 return [check_cached_effective_target arm_coproc2_ok \
8782 check_effective_target_arm_coproc2_ok_nocache
]
8785 #
Return 1 if the target supports all coprocessor instructions checked by
8786 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
8788 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
8789 if { ![check_effective_target_arm_coproc2_ok
] } {
8792 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
8793 #
if (__thumb__
&& !__thumb2__
) \
8794 ||
(__ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
))
8800 proc check_effective_target_arm_coproc3_ok
{ } {
8801 return [check_cached_effective_target arm_coproc3_ok \
8802 check_effective_target_arm_coproc3_ok_nocache
]
8805 #
Return 1 if the target supports all coprocessor instructions checked by
8806 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
8808 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
8809 if { ![check_effective_target_arm_coproc3_ok
] } {
8812 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
8813 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 6
8819 proc check_effective_target_arm_coproc4_ok
{ } {
8820 return [check_cached_effective_target arm_coproc4_ok \
8821 check_effective_target_arm_coproc4_ok_nocache
]
8824 #
Return 1 if the target supports the auto_inc_dec optimization pass.
8825 proc check_effective_target_autoincdec
{ } {
8826 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
8827 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
8831 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
8832 if { [file
exists $dumpfile
] } {
8833 file
delete $dumpfile
8839 #
Return 1 if the target has support
for stack probing designed
8840 # to avoid stack
-clash style attacks.
8842 # This is used to restrict the stack
-clash mitigation tests to
8843 # just those targets that have been explicitly supported.
8845 # In addition to the prologue work
on those targets
, each target
's
8846 # properties should be described in the functions below so that
8847 # tests do not become a mess of unreadable target conditions.
8849 proc check_effective_target_supports_stack_clash_protection { } {
8851 # Temporary until the target bits are fully ACK'd.
8852 #
if { [istarget aarch
*-*-*] } {
8856 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*]
8857 ||
[istarget powerpc
*-*-*] ||
[istarget rs6000
*-*-*]
8858 ||
[istarget s390
*-*-*] } {
8864 #
Return 1 if the target creates a frame pointer
for non
-leaf functions
8865 # Note we ignore cases where we apply tail
call optimization here.
8866 proc check_effective_target_frame_pointer_for_non_leaf
{ } {
8867 if { [istarget aarch
*-*-*] } {
8871 # Solaris
/x86 defaults to
-fno
-omit
-frame
-pointer.
8872 if { [istarget i?
86-*-solaris
*] ||
[istarget x86_64
-*-solaris
*] } {
8879 #
Return 1 if the target
's calling sequence or its ABI
8880 # create implicit stack probes at or prior to function entry.
8881 proc check_effective_target_caller_implicit_probes { } {
8883 # On x86/x86_64 the call instruction itself pushes the return
8884 # address onto the stack. That is an implicit probe of *sp.
8885 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
8889 # On PPC, the ABI mandates that the address of the outer
8890 # frame be stored at *sp. Thus each allocation of stack
8891 # space is itself an implicit probe of *sp.
8892 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
8896 # s390's ABI has a register save area allocated by the
8897 # caller
for use by the callee. The mere existence does
8898 # not constitute a probe by the caller
, but when the slots
8899 # used by the callee those stores are implicit probes.
8900 if { [istarget s390
*-*-*] } {
8904 # Not strictly true
on aarch64
, but we have agreed that we will
8905 #
consider any function that pushes SP more than
3kbytes into
8906 # the guard
page as broken. This essentially means that we can
8907 #
consider the aarch64 as having a caller implicit probe at
8909 if { [istarget aarch64
*-*-*] } {
8916 # Targets that potentially realign the stack pointer often cause residual
8917 # stack allocations and make it difficult to elimination loops or residual
8918 # allocations
for dynamic stack allocations
8919 proc check_effective_target_callee_realigns_stack
{ } {
8920 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {