1 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
4 * config/pa/pa.h (MAX_FIXED_MODE_SIZE): Define.
6 2023-11-22 John David Anglin <danglin@gcc.gnu.org>
9 * config/pa/predicates.md (integer_store_memory_operand): Return
10 true for REG+D addresses when reload_in_progress is true.
12 2023-11-22 Richard Biener <rguenther@suse.de>
14 PR tree-optimization/112344
15 * tree-chrec.cc (chrec_apply): Perform the overall increment
16 calculation and increment in an unsigned type.
18 2023-11-22 Andrew Stubbs <ams@codesourcery.com>
20 * config/gcn/gcn-valu.md (*mov<mode>_4reg): Disparage AVGPR use when a
23 2023-11-22 Vladimir N. Makarov <vmakarov@redhat.com>
25 PR rtl-optimization/112610
26 * ira-costs.cc: (find_costs_and_classes): Remove arg.
27 Use ira_dump_file for printing.
28 (print_allocno_costs, print_pseudo_costs): Ditto.
29 (ira_costs): Adjust call of find_costs_and_classes.
30 (ira_set_pseudo_classes): Set up and restore ira_dump_file.
32 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix vcompress bug.
37 2023-11-22 Tamar Christina <tamar.christina@arm.com>
39 * config/aarch64/aarch64-simd.md
40 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip,
41 aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): Split into...
42 (aarch64_uaddw<mode>_lo_zip, aarch64_uaddw<mode>_hi_zip,
43 "aarch64_usubw<mode>_lo_zip, "aarch64_usubw<mode>_hi_zip): ... This.
44 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): Remove.
45 (perm_hilo): Remove UNSPEC_ZIP1, UNSPEC_ZIP2.
47 2023-11-22 Christophe Lyon <christophe.lyon@linaro.org>
49 * config/arm/arm-mve-builtins.cc
50 (function_resolver::infer_pointer_type): Remove spurious line.
52 2023-11-22 Xi Ruoyao <xry111@xry111.site>
54 * config/loongarch/lsx.md (vec_perm<mode:LSX>): Make the
56 * config/loongarch/loongarch.cc (loongarch_expand_vec_perm):
57 Use the mode of the selector (instead of the shuffled vector)
58 for truncating it. Operate on subregs in the selector mode if
59 the shuffled vector has a different mode (i. e. it's a
60 floating-point vector).
62 2023-11-22 Hongyu Wang <hongyu.wang@intel.com>
64 * config/i386/i386.md (push2_di): Adjust operand order for AT&T
67 (push2p_di): Likewise.
70 2023-11-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
73 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Adapt the priority.
74 (shuffle_generic_patterns): Fix permutation indice bug.
75 * config/riscv/vector-iterators.md: Fix VEI16 bug.
77 2023-11-22 liuhongt <hongtao.liu@intel.com>
79 * config/i386/sse.md (cbranch<mode>4): Extend to Vector
82 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
85 * config/vax/vax.cc (index_term_p): Only accept the index scaler
86 as the RHS operand to ASHIFT.
88 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
90 * config/riscv/predicates.md (order_operator): Remove predicate.
91 * config/riscv/riscv.cc (riscv_rtx_costs): Update accordingly.
92 * config/riscv/riscv.md (*branch<mode>, *mov<GPR:mode><X:mode>cc)
93 (cstore<mode>4): Likewise.
95 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
97 * config/riscv/riscv-protos.h (riscv_expand_float_scc): Add
98 `invert_ptr' parameter.
99 * config/riscv/riscv.cc (riscv_emit_float_compare): Add NE
101 (riscv_expand_float_scc): Pass `invert_ptr' through to
102 `riscv_emit_float_compare'.
103 (riscv_expand_conditional_move): Pass `&invert' to
104 `riscv_expand_float_scc'.
105 * config/riscv/riscv.md (add<mode>cc): Likewise.
107 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
109 * config/riscv/riscv.cc (riscv_emit_float_compare) <NE>: Handle
111 <EQ, LE, LT, GE, GT>: Return operands supplied as is.
112 (riscv_emit_binary): Call `riscv_emit_binary' directly rather
113 than going through a temporary register for word-mode targets.
114 (riscv_expand_conditional_branch): Canonicalize the comparison
115 if not against constant zero.
117 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
119 * config/riscv/predicates.md (ne_operator): New predicate.
120 * config/riscv/riscv.cc (riscv_insn_cost): Handle branches on a
121 floating-point condition.
122 * config/riscv/riscv.md (@cbranch<mode>4): Rename expander to...
123 (@cbranch<ANYF:mode>4): ... this. Only expand the RTX via
124 `riscv_expand_conditional_branch' for `!signed_order_operator'
125 operators, otherwise let it through.
126 (*cbranch<ANYF:mode>4, *cbranch<ANYF:mode>4): New insns and
129 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
131 * config/riscv/riscv.cc (riscv_expand_conditional_move): Don't
132 bail out in floating-point conditions.
134 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
136 * config/riscv/riscv.cc (riscv_expand_float_scc): Suppress the
137 use of SUBREG if the conditional-set target is word-mode.
139 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
141 * config/riscv/riscv.md (add<mode>cc): New expander.
143 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
145 * config/riscv/predicates.md (movcc_operand): New predicate.
146 * config/riscv/riscv.cc (riscv_expand_conditional_move): Handle
148 * config/riscv/riscv.md (mov<mode>cc): Likewise.
149 * config/riscv/riscv.opt (mmovcc): New option.
150 * doc/invoke.texi (Option Summary): Document it.
152 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
154 * config/riscv/riscv-protos.h (riscv_emit_unary): New prototype.
155 * config/riscv/riscv.cc (riscv_emit_unary): New function.
157 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
159 * config/riscv/riscv.cc (riscv_expand_conditional_move): Unify
160 conditional-move handling across all the relevant targets.
162 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
164 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
165 accept constants for T-Head data input operands.
167 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
169 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
170 accept constants for T-Head comparison operands.
172 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
174 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
175 the check for operand 1 being constant 0 in the Ventana/Zicond
176 case for equality comparisons.
178 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
180 * config/riscv/riscv.cc (riscv_expand_conditional_move): Also
181 invert the condition for GEU and LEU.
183 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
185 * config/riscv/riscv.cc (riscv_insn_cost): New function.
186 (riscv_max_noce_ifcvt_seq_cost): Likewise.
187 (riscv_noce_conversion_profitable_p): Likewise.
188 (TARGET_INSN_COST): New macro.
189 (TARGET_MAX_NOCE_IFCVT_SEQ_COST): New macro.
190 (TARGET_NOCE_CONVERSION_PROFITABLE_P): New macro.
192 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
194 * config/riscv/riscv.cc (riscv_expand_conditional_move): Remove
195 extraneous variable for EQ vs NE operation selection.
197 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
199 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
200 `nullptr' rather than 0 to initialize a pointer.
202 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
204 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
205 `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
207 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
209 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
210 `mode' for `GET_MODE (dest)' throughout.
212 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
214 * config/riscv/riscv.cc (riscv_emit_int_compare): Bail out if
215 NEED_EQ_NE_P but the comparison is neither EQ nor NE.
217 2023-11-22 Maciej W. Rozycki <macro@embecosm.com>
219 * config/riscv/riscv.md (mov<mode>cc): Move comment on SFB
221 (*mov<GPR:mode><X:mode>cc): ... here.
223 2023-11-21 Robin Dapp <rdapp@ventanamicro.com>
226 * tree-vect-loop.cc (vectorize_fold_left_reduction): Allow
227 reduction index != 1.
228 (vect_transform_reduction): Handle reduction index != 1.
230 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
232 * common.md (aligned_register_operand): New predicate.
234 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
236 * ira-int.h (ira_allocno): Add a register_filters field.
237 (ALLOCNO_REGISTER_FILTERS): New macro.
238 (ALLOCNO_SET_REGISTER_FILTERS): Likewise.
239 * ira-build.cc (ira_create_allocno): Initialize register_filters.
240 (create_cap_allocno): Propagate register_filters.
241 (propagate_allocno_info): Likewise.
242 (propagate_some_info_from_allocno): Likewise.
243 * ira-lives.cc (process_register_constraint_filters): New function.
244 (process_bb_node_lives): Use it to record register filter
246 * ira-color.cc (assign_hard_reg): Check register filters.
247 (improve_allocation, fast_allocation): Likewise.
249 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
251 * lra-constraints.cc (process_alt_operands): Check register filters.
253 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
255 * recog.h (operand_alternative): Add a register_filters field.
256 (alternative_register_filters): New function.
257 * recog.cc (preprocess_constraints): Calculate the filters field.
258 (constrain_operands): Check register filters.
260 2023-11-21 Richard Sandiford <richard.sandiford@arm.com>
262 * rtl.def (DEFINE_REGISTER_CONSTRAINT): Add an optional filter
264 * doc/md.texi (define_register_constraint): Document it.
265 * doc/tm.texi.in: Reference it in discussion about aligned registers.
266 * doc/tm.texi: Regenerate.
267 * gensupport.h (register_filters, get_register_filter_id): Declare.
268 * gensupport.cc (register_filter_map, register_filters): New variables.
269 (get_register_filter_id): New function.
270 (process_define_register_constraint): Likewise.
271 (process_rtx): Pass define_register_constraints to
272 process_define_register_constraint.
273 * genconfig.cc (main): Emit a definition of NUM_REGISTER_FILTERS.
274 * genpreds.cc (constraint_data): Add a filter field.
275 (add_constraint): Update accordingly.
276 (process_define_register_constraint): Pass the filter operand.
277 (write_init_reg_class_start_regs): New function.
278 (write_get_register_filter): Likewise.
279 (write_get_register_filter_id): Likewise.
280 (write_tm_preds_h): Write a definition of target_constraints,
281 plus helpers to test its contents. Write the get_register_filter*
283 (write_insn_preds_c): Write init_reg_class_start_regs.
284 * reginfo.cc (init_reg_class_start_regs): Declare.
285 (init_reg_sets): Call it.
286 * target-globals.h (this_target_constraints): Declare.
287 (target_globals): Add a constraints field.
288 (restore_target_globals): Update accordingly.
289 * target-globals.cc: Include tm_p.h.
290 (default_target_globals): Initialize the constraints field.
291 (save_target_globals): Handle the constraints field.
292 (target_globals::~target_globals): Likewise.
294 2023-11-21 Richard Biener <rguenther@suse.de>
296 PR tree-optimization/112623
297 * tree-ssa-forwprop.cc (simplify_vector_constructor):
298 Check the source mode of the insn for vector pack/unpacks.
300 2023-11-21 Richard Biener <rguenther@suse.de>
302 * tree-vect-loop.cc (vect_analyze_loop_2): Move check
303 of VF against max_vf until VF is final.
305 2023-11-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
308 * config/riscv/riscv.cc (riscv_const_insns): Disallow DI CONST_VECTOR on RV32.
310 2023-11-21 Tamar Christina <tamar.christina@arm.com>
312 * config/aarch64/aarch64.cc (aarch64_override_options): Rework warnings.
314 2023-11-21 Tamar Christina <tamar.christina@arm.com>
317 * config/aarch64/aarch64-arches.def (armv9-a, armv9.1-a, armv9.2-a,
318 armv9.3-a): Update to generic-armv9-a.
319 * config/aarch64/aarch64-cores.def (generic-armv9-a): New.
320 * config/aarch64/aarch64-tune.md: Regenerate.
321 * config/aarch64/aarch64.cc: Include generic_armv9_a.h.
322 * config/aarch64/tuning_models/generic_armv9_a.h: New file.
324 2023-11-21 Tamar Christina <tamar.christina@arm.com>
327 * config/aarch64/aarch64-arches.def (armv8-9, armv8-a, armv8.1-a,
328 armv8.2-a, armv8.3-a, armv8.4-a, armv8.5-a, armv8.6-a, armv8.7-a,
329 armv8.8-a): Update to generic_armv8_a.
330 * config/aarch64/aarch64-cores.def (generic-armv8-a): New.
331 * config/aarch64/aarch64-tune.md: Regenerate.
332 * config/aarch64/aarch64.cc: Include generic_armv8_a.h
333 * config/aarch64/aarch64.h (TARGET_CPU_DEFAULT): Change to
334 TARGET_CPU_generic_armv8_a.
335 * config/aarch64/tuning_models/generic_armv8_a.h: New file.
337 2023-11-21 Tamar Christina <tamar.christina@arm.com>
340 * config/aarch64/aarch64-cores.def: Add generic.
341 * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic.
342 * config/aarch64/aarch64-tune.md: Regenerate
343 * config/aarch64/aarch64.cc (all_cores): Remove generic
344 * config/aarch64/aarch64.h (enum target_cpus): Remove
347 2023-11-21 Tamar Christina <tamar.christina@arm.com>
350 * config/aarch64/aarch64.cc (generic_addrcost_table,
351 exynosm1_addrcost_table,
352 xgene1_addrcost_table,
353 thunderx2t99_addrcost_table,
354 thunderx3t110_addrcost_table,
355 tsv110_addrcost_table,
356 qdf24xx_addrcost_table,
357 a64fx_addrcost_table,
358 neoversev1_addrcost_table,
359 neoversen2_addrcost_table,
360 neoversev2_addrcost_table,
361 generic_regmove_cost,
362 cortexa57_regmove_cost,
363 cortexa53_regmove_cost,
364 exynosm1_regmove_cost,
365 thunderx_regmove_cost,
367 qdf24xx_regmove_cost,
368 thunderx2t99_regmove_cost,
369 thunderx3t110_regmove_cost,
372 neoversen2_regmove_cost,
373 neoversev1_regmove_cost,
374 neoversev2_regmove_cost,
378 thunderx_vector_cost,
380 cortexa57_vector_cost,
381 exynosm1_vector_cost,
383 thunderx2t99_vector_cost,
384 thunderx3t110_vector_cost,
401 thunderx2t99_tunings,
402 thunderx3t110_tunings,
406 neoversev1_vector_cost,
408 neoverse512tvb_vector_cost,
409 neoverse512tvb_tunings,
410 neoversen2_vector_cost,
412 neoversev2_vector_cost,
414 a64fx_tunings): Split into own files.
415 * config/aarch64/tuning_models/a64fx.h: New file.
416 * config/aarch64/tuning_models/ampere1.h: New file.
417 * config/aarch64/tuning_models/ampere1a.h: New file.
418 * config/aarch64/tuning_models/cortexa35.h: New file.
419 * config/aarch64/tuning_models/cortexa53.h: New file.
420 * config/aarch64/tuning_models/cortexa57.h: New file.
421 * config/aarch64/tuning_models/cortexa72.h: New file.
422 * config/aarch64/tuning_models/cortexa73.h: New file.
423 * config/aarch64/tuning_models/emag.h: New file.
424 * config/aarch64/tuning_models/exynosm1.h: New file.
425 * config/aarch64/tuning_models/generic.h: New file.
426 * config/aarch64/tuning_models/neoverse512tvb.h: New file.
427 * config/aarch64/tuning_models/neoversen1.h: New file.
428 * config/aarch64/tuning_models/neoversen2.h: New file.
429 * config/aarch64/tuning_models/neoversev1.h: New file.
430 * config/aarch64/tuning_models/neoversev2.h: New file.
431 * config/aarch64/tuning_models/qdf24xx.h: New file.
432 * config/aarch64/tuning_models/saphira.h: New file.
433 * config/aarch64/tuning_models/thunderx.h: New file.
434 * config/aarch64/tuning_models/thunderx2t99.h: New file.
435 * config/aarch64/tuning_models/thunderx3t110.h: New file.
436 * config/aarch64/tuning_models/thunderxt88.h: New file.
437 * config/aarch64/tuning_models/tsv110.h: New file.
438 * config/aarch64/tuning_models/xgene1.h: New file.
440 2023-11-21 Tamar Christina <tamar.christina@arm.com>
442 * config/aarch64/aarch64-simd.md (vec_unpack<su>_lo_<mode,
443 vec_unpack<su>_lo_<mode): Split into...
444 (vec_unpacku_lo_<mode, vec_unpacks_lo_<mode,
445 vec_unpacku_lo_<mode, vec_unpacks_lo_<mode): ...These.
446 (aarch64_usubw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
447 (aarch64_uaddw<mode>_<PERM_EXTEND:perm_hilo>_zip): New.
448 * config/aarch64/iterators.md (PERM_EXTEND, perm_index): New.
449 (perm_hilo): Add UNSPEC_ZIP1, UNSPEC_ZIP2.
451 2023-11-21 Tamar Christina <tamar.christina@arm.com>
453 * config/aarch64/aarch64.cc (aarch64_adjust_stmt_cost): Guard mla.
454 (aarch64_vector_costs::count_ops): Likewise.
456 2023-11-21 Sebastian Huber <sebastian.huber@embedded-brains.de>
459 * tree-profile.cc (gen_assign_counter_update): Cast the unsigned result type of
460 __atomic_add_fetch() to the signed counter type.
461 (gen_counter_update): Fix formatting.
463 2023-11-21 Jakub Jelinek <jakub@redhat.com>
465 * tree-profile.cc (gen_counter_update, tree_profiling): Formatting
468 2023-11-21 Jakub Jelinek <jakub@redhat.com>
471 * builtins.cc (fold_builtin_bit_query): If arg0 has side-effects, arg1
472 is specified but cleared, call save_expr on arg0.
474 2023-11-21 Hongyu Wang <hongyu.wang@intel.com>
476 * config/i386/i386-expand.h (gen_push): Add default bool
479 * config/i386/i386-opts.h (enum apx_features): Add apx_ppx, add
481 * config/i386/i386.cc (ix86_emit_restore_reg_using_pop): Add
482 ppx_p parameter for function declaration.
483 (gen_push2): Add ppx_p parameter, emit push2p if ppx_p is true.
484 (gen_push): Likewise.
485 (ix86_emit_restore_reg_using_pop2): Likewise for pop2p.
486 (ix86_emit_save_regs): Emit pushp/push2p under TARGET_APX_PPX.
487 (ix86_emit_restore_reg_using_pop): Add ppx_p, emit popp insn
488 and adjust cfi when ppx_p is ture.
489 (ix86_emit_restore_reg_using_pop2): Add ppx_p and parse to its
491 (ix86_emit_restore_regs_using_pop2): Likewise.
492 (ix86_expand_epilogue): Parse TARGET_APX_PPX to
493 ix86_emit_restore_reg_using_pop.
494 * config/i386/i386.h (TARGET_APX_PPX): New.
495 * config/i386/i386.md (UNSPEC_APX_PPX): New unspec.
496 (pushp_di): New define_insn.
498 (push2p_di): Likewise.
499 (pop2p_di): Likewise.
500 * config/i386/i386.opt: Add apx_ppx enum.
502 2023-11-21 Richard Biener <rguenther@suse.de>
504 PR tree-optimization/111970
505 * tree-vect-stmts.cc (vectorizable_load): Fix offset calculation
507 (vectorizable_store): Likewise for SLP scatter store.
509 2023-11-21 Xi Ruoyao <xry111@xry111.site>
511 * config/loongarch/loongarch-def.h (stdint.h): Guard with #if to
512 exclude it for target libraries.
513 (loongarch_isa_base_features): Likewise.
514 (loongarch_isa): Likewise.
515 (loongarch_abi): Likewise.
516 (loongarch_target): Likewise.
517 (loongarch_cpu_default_isa): Likewise.
519 2023-11-21 liuhongt <hongtao.liu@intel.com>
522 * config/i386/i386-expand.cc (emit_reduc_half): Hanlde
524 * config/i386/mmx.md (reduc_<code>_scal_<mode>): New expander.
525 (reduc_<code>_scal_v4qi): Ditto.
527 2023-11-20 Marc Poulhiès <dkm@kataplop.net>
529 * config/nvptx/nvptx.h (struct machine_function): Fix typo in variadic.
530 * config/nvptx/nvptx.cc (nvptx_function_arg_advance): Adjust to use fixed name.
531 (nvptx_declare_function_name): Likewise.
532 (nvptx_call_args): Likewise.
533 (nvptx_expand_call): Likewise.
535 2023-11-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
537 * tree-profile.cc (gen_counter_update): Use unshare_expr() for the
538 counter expression in the second gimple_build_assign().
540 2023-11-20 Jan Hubicka <jh@suse.cz>
542 * cgraph.cc (add_detected_attribute_1): New function.
543 (cgraph_node::add_detected_attribute): Likewise.
544 * cgraph.h (cgraph_node::add_detected_attribute): Declare.
545 * common.opt: Add -Wsuggest-attribute=returns_nonnull.
546 * doc/invoke.texi: Document new flag.
547 * gimple-range-fold.cc (fold_using_range::range_of_call):
548 Use known reutrn value ranges.
549 * ipa-prop.cc (struct ipa_return_value_summary): New type.
550 (class ipa_return_value_sum_t): New type.
551 (ipa_return_value_sum): New summary.
552 (ipa_record_return_value_range): New function.
553 (ipa_return_value_range): New function.
554 * ipa-prop.h (ipa_return_value_range): Declare.
555 (ipa_record_return_value_range): Declare.
556 * ipa-pure-const.cc (warn_function_returns_nonnull): New funcion.
557 * ipa-utils.h (warn_function_returns_nonnull): Declare.
558 * symbol-summary.h: Fix comment.
559 * tree-vrp.cc (execute_ranger_vrp): Record return values.
561 2023-11-20 Richard Biener <rguenther@suse.de>
563 PR tree-optimization/112618
564 * tree-vect-loop.cc (vect_transform_loop_stmt): For not
565 relevant and unused .MASK_CALL make sure we remove the
568 2023-11-20 Richard Biener <rguenther@suse.de>
570 PR tree-optimization/112281
571 * tree-loop-distribution.cc
572 (loop_distribution::pg_add_dependence_edges): For = in the
573 innermost common loop record a partition conflict.
575 2023-11-20 Richard Biener <rguenther@suse.de>
578 * convert.cc (convert_to_real_1): Use element_precision
579 where a vector type might appear. Provide specific
580 diagnostic for unexpected vector argument.
582 2023-11-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
585 * config/riscv/vector-iterators.md: Remove VDEMOTE and VMDEMOTE.
586 * config/riscv/vector.md: Fix slide1 intermediate mode bug.
588 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
590 * config/riscv/riscv-v.cc (gather_scatter_valid_offset_mode_p):
591 Add check for XLEN == 32.
592 * config/riscv/vector-iterators.md: Change VLS part of the
593 demote iterator to 2x elements modes
594 * config/riscv/vector.md: Adjust iterators and insn conditions.
596 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
598 * config/arm/arm-mve-builtins-base.cc (vld1_impl, vld1q)
599 (vst1_impl, vst1q): New.
600 * config/arm/arm-mve-builtins-base.def (vld1q, vst1q): New.
601 * config/arm/arm-mve-builtins-base.h (vld1q, vst1q): New.
602 * config/arm/arm_mve.h
621 (__arm_vld1q_s8): Delete.
622 (__arm_vld1q_s32): Delete.
623 (__arm_vld1q_s16): Delete.
624 (__arm_vld1q_u8): Delete.
625 (__arm_vld1q_u32): Delete.
626 (__arm_vld1q_u16): Delete.
627 (__arm_vst1q_s8): Delete.
628 (__arm_vst1q_s32): Delete.
629 (__arm_vst1q_s16): Delete.
630 (__arm_vst1q_u8): Delete.
631 (__arm_vst1q_u32): Delete.
632 (__arm_vst1q_u16): Delete.
633 (__arm_vld1q_f32): Delete.
634 (__arm_vld1q_f16): Delete.
635 (__arm_vst1q_f32): Delete.
636 (__arm_vst1q_f16): Delete.
637 (__arm_vld1q): Delete.
638 (__arm_vst1q): Delete.
639 * config/arm/mve.md (mve_vld1q_f<mode>): Rename into ...
640 (@mve_vld1q_f<mode>): ... this.
641 (mve_vld1q_<supf><mode>): Rename into ...
642 (@mve_vld1q_<supf><mode>) ... this.
643 (mve_vst1q_f<mode>): Rename into ...
644 (@mve_vst1q_f<mode>): ... this.
645 (mve_vst1q_<supf><mode>): Rename into ...
646 (@mve_vst1q_<supf><mode>) ... this.
648 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
650 * config/arm/arm-mve-builtins-shapes.cc (load, store): New.
651 * config/arm/arm-mve-builtins-shapes.h (load, store): New.
653 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
655 * config/arm/arm-mve-builtins-functions.h (multi_vector_function)
656 (full_width_access): New classes.
657 * config/arm/arm-mve-builtins.cc
658 (find_type_suffix_for_scalar_type, infer_pointer_type)
659 (require_pointer_type, get_contiguous_base, add_mem_operand)
660 (add_fixed_operand, use_contiguous_load_insn)
661 (use_contiguous_store_insn): New.
662 * config/arm/arm-mve-builtins.h (memory_vector_mode)
663 (infer_pointer_type, require_pointer_type, get_contiguous_base)
665 (add_fixed_operand, use_contiguous_load_insn)
666 (use_contiguous_store_insn): New.
668 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
670 * config/arm/arm-mve-builtins-shapes.cc (build_const_pointer):
672 (parse_type): Add support for '_', 'al' and 'as'.
673 * config/arm/arm-mve-builtins.h (function_instance): Add
675 (function_base): Likewise.
677 2023-11-20 Christophe Lyon <christophe.lyon@linaro.org>
679 * config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Fix
680 initialization of arm_simd_types[].eltype.
681 * config/arm/arm-mve-builtins.def (DEF_MVE_TYPE): Fix scalar
684 2023-11-20 Jakub Jelinek <jakub@redhat.com>
686 * typeclass.h (enum type_class): Add vector_type_class.
687 * builtins.cc (type_to_class): Return vector_type_class for
689 * doc/extend.texi (__builtin_classify_type): Mention bit-precise
690 integer types and vector types.
692 2023-11-20 Robin Dapp <rdapp@ventanamicro.com>
695 * tree-vect-patterns.cc (vect_recog_mask_conversion_pattern):
696 Convert masks for conditional operations as well.
698 2023-11-20 Jakub Jelinek <jakub@redhat.com>
700 PR tree-optimization/90693
701 * tree-ssa-math-opts.cc (match_single_bit_test): Mark POPCOUNT with
702 result only used in equality comparison against 1 with direct optab
703 support as .POPCOUNT call with 2 arguments.
704 * internal-fn.h (expand_POPCOUNT): Declare.
705 * internal-fn.def (DEF_INTERNAL_INT_EXT_FN): New macro, document it,
707 (POPCOUNT): Use it instead of DEF_INTERNAL_INT_FN.
708 * internal-fn.cc (DEF_INTERNAL_INT_EXT_FN): Define to nothing before
709 inclusion to define expanders.
710 (expand_POPCOUNT): New function.
712 2023-11-20 Jakub Jelinek <jakub@redhat.com>
714 PR tree-optimization/90693
715 * tree-ssa-math-opts.cc (match_single_bit_test): New function.
716 (math_opts_dom_walker::after_dom_children): Call it for EQ_EXPR
717 and NE_EXPR assignments and GIMPLE_CONDs.
719 2023-11-20 Jakub Jelinek <jakub@redhat.com>
721 * internal-fn.def: Document missing DEF_INTERNAL* macros and make sure
722 they are all undefined at the end.
723 * internal-fn.cc (lookup_hilo_internal_fn, lookup_evenodd_internal_fn,
724 widening_fn_p, get_len_internal_fn): Don't undef DEF_INTERNAL_*FN
725 macros after inclusion of internal-fn.def.
727 2023-11-20 Haochen Jiang <haochen.jiang@intel.com>
729 * common/config/i386/cpuinfo.h (get_available_features):
730 Add avx10_set and version and detect avx10.1.
731 (cpu_indicator_init): Handle avx10.1-512.
732 * common/config/i386/i386-common.cc
733 (OPTION_MASK_ISA2_AVX10_1_256_SET): New.
734 (OPTION_MASK_ISA2_AVX10_1_256_SET): Ditto.
735 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
736 (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Ditto.
737 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10.1.
738 (ix86_handle_option): Handle -mavx10.1-256 and -mavx10.1-512.
739 Add indicator for explicit no-avx512 and no-avx10.1 options.
740 * common/config/i386/i386-cpuinfo.h (enum processor_features):
741 Add FEATURE_AVX10_1_256 and FEATURE_AVX10_1_512.
742 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
743 AVX10_1_256 and AVX10_1_512.
744 * config/i386/cpuid.h (bit_AVX10): New.
745 (bit_AVX10_256): Ditto.
746 (bit_AVX10_512): Ditto.
747 * config/i386/driver-i386.cc (check_avx10_avx512_features): New.
748 (host_detect_local_cpu): Do not append "-mno-" options under
749 specific scenarios to avoid emitting a warning.
750 * config/i386/i386-isa.def
751 (EVEX512): Add DEF_PTA(EVEX512).
752 (AVX10_1_256): Add DEF_PTA(AVX10_1_256).
753 (AVX10_1_512): Add DEF_PTA(AVX10_1_512).
754 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1-256 and
756 (ix86_function_specific_save): Save explicit no indicator.
757 (ix86_function_specific_restore): Restore explicit no indicator.
758 (ix86_valid_target_attribute_inner_p): Handle avx10.1, avx10.1-256 and
760 (ix86_valid_target_attribute_tree): Handle avx512 function
761 attributes with avx10.1 command line option.
762 (ix86_option_override_internal): Handle AVX10.1 options.
763 * config/i386/i386.h: Add PTA_EVEX512 for AVX512 target
765 * config/i386/i386.opt: Add variable ix86_no_avx512_explicit and
766 ix86_no_avx10_1_explicit, option -mavx10.1, -mavx10.1-256 and
768 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
769 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
770 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
773 2023-11-20 liuhongt <hongtao.liu@intel.com>
776 * config/i386/sse.md (reduc_<code>_scal_<mode>): New expander.
777 (REDUC_ANY_LOGIC_MODE): New iterator.
778 (REDUC_PLUS_MODE): Extend to VxHI/SI/DImode.
779 (REDUC_SSE_PLUS_MODE): Ditto.
781 2023-11-20 xuli <xuli1@eswincomputing.com>
784 * config/riscv/riscv-opts.h (enum riscv_stringop_strategy_enum): Strategy enum.
785 * config/riscv/riscv-string.cc (riscv_expand_block_move): Disabled based on options.
786 (expand_block_move): Ditto.
787 * config/riscv/riscv.opt: Add -mmemcpy-strategy=.
789 2023-11-20 Lulu Cheng <chenglulu@loongson.cn>
791 * config/loongarch/gnu-user.h (MUSL_ABI_SPEC): Modify suffix.
793 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
795 * config/riscv/riscv-v.cc (emit_vlmax_insn_lra): Optimize constant AVL.
797 2023-11-19 Philipp Tomsich <philipp.tomsich@vrull.eu>
799 * config/riscv/riscv-protos.h (extract_base_offset_in_addr): Prototype.
800 * config/riscv/riscv.cc (riscv_fusion_pairs): New enum.
801 (riscv_tune_param): Add fusible_ops field.
802 (riscv_tune_param_rocket_tune_info): Initialize new field.
803 (riscv_tune_param_sifive_7_tune_info): Likewise.
804 (thead_c906_tune_info): Likewise.
805 (generic_oo_tune_info): Likewise.
806 (optimize_size_tune_info): Likewise.
807 (riscv_macro_fusion_p): New function.
808 (riscv_fusion_enabled_p): Likewise.
809 (riscv_macro_fusion_pair_p): Likewise.
810 (TARGET_SCHED_MACRO_FUSION_P): Define.
811 (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise.
812 (extract_base_offset_in_addr): Moved into riscv.cc from...
813 * config/riscv/thead.cc: Here.
814 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
815 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
817 2023-11-19 Jeff Law <jlaw@ventanamicro.com>
819 * config/c6x/c6x.md (mvilc): Add mode to UNSPEC source.
820 * config/mips/mips.md (rdhwr_synci_step_<mode>): Likewise.
821 * config/riscv/riscv.md (riscv_frcsr, riscv_frflags): Likewise.
822 * config/s390/s390.md (@split_stack_call<mode>): Likewise.
823 (@split_stack_cond_call<mode>): Likewise.
824 * config/sh/sh.md (sp_switch_1): Likewise.
826 2023-11-19 David Malcolm <dmalcolm@redhat.com>
828 * diagnostic.h: Include "rich-location.h".
829 * edit-context.h (class fixit_hint): New forward decl.
830 * gcc-rich-location.h: Include "rich-location.h".
831 * genmatch.cc: Likewise.
832 * pretty-print.h: Likewise.
834 2023-11-19 David Malcolm <dmalcolm@redhat.com>
836 * Makefile.in (CPPLIB_H): Add libcpp/include/rich-location.h.
837 * coretypes.h (class rich_location): New forward decl.
839 2023-11-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
841 * config/riscv/riscv-v.cc (expand_tuple_move): Fix bug.
843 2023-11-19 David Malcolm <dmalcolm@redhat.com>
846 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-strtok.
848 2023-11-18 Xi Ruoyao <xry111@xry111.site>
850 * config/loongarch/predicates.md (const_call_insn_operand):
851 Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
852 "true" to make the coding style consistent.
854 2023-11-18 Xi Ruoyao <xry111@xry111.site>
856 * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
858 * config/loongarch/loongarch-str.h: Regenerate.
859 * config/loongarch/loongarch.opt: Regenerate.
860 * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
861 * config/loongarch/loongarch-cpu.cc
862 (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
863 and OPTION_MASK_ISA_LAMCAS.
864 * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
865 TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
866 lines from assembly output.
867 (atomic_exchange<mode>_short): Likewise.
868 (atomic_exchange<mode:SHORT>): Likewise.
869 (atomic_fetch_add<mode>_short): Likewise.
870 (atomic_fetch_add<mode:SHORT>): Likewise.
871 (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
872 of ISA_BASE_IS_LA64V110.
873 (atomic_compare_and_swap<mode>): Likewise.
874 (atomic_compare_and_swap<mode:GPR>): Likewise.
875 (atomic_compare_and_swap<mode:SHORT>): Likewise.
876 * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
877 status if -mlam-bh and -mlamcas if -fverbose-asm.
879 2023-11-18 Xi Ruoyao <xry111@xry111.site>
881 * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
882 print dbar 0x700 if TARGET_LD_SEQ_SA.
883 * config/loongarch/sync.md (atomic_load<mode>): Likewise.
885 2023-11-18 Xi Ruoyao <xry111@xry111.site>
887 * config/loongarch/loongarch.md (DIV): New mode iterator.
888 (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
889 (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
890 (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
891 (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
893 2023-11-18 Xi Ruoyao <xry111@xry111.site>
895 * config/loongarch/loongarch-def.h:
896 (loongarch_isa_base_features): Declare. Define it in ...
897 * config/loongarch/loongarch-cpu.cc
898 (loongarch_isa_base_features): ... here.
899 (fill_native_cpu_config): If we know the base ISA of the CPU
900 model from PRID, use it instead of la64 (v1.0). Check if all
901 expected features of this base ISA is available, emit a warning
903 * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
904 the features implied by the base ISA if not -march=native.
906 2023-11-18 Xi Ruoyao <xry111@xry111.site>
908 * config/loongarch/genopts/isa-evolution.in: New data file.
909 * config/loongarch/genopts/genstr.sh: Translate info in
910 isa-evolution.in when generating loongarch-str.h, loongarch.opt,
911 and loongarch-cpucfg-map.h.
912 * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
914 * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
916 (loongarch-str.h): Depend on isa-evolution.in.
917 (loongarch.opt): Depend on isa-evolution.in.
918 (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
919 * config/loongarch/loongarch-str.h: Regenerate.
920 * config/loongarch/loongarch-def.h (loongarch_isa): Add field
921 for evolution features. Add helper function to enable features
923 Probe native CPU capability and save the corresponding options
925 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
926 Probe native CPU capability and save the corresponding options
928 (cache_cpucfg): Simplify with C++11-style for loop.
929 (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
930 * config/loongarch/loongarch.cc
931 (loongarch_option_override_internal): Enable the ISA evolution
932 feature options implied by -march and not explicitly disabled.
933 (loongarch_asm_code_end): New function, print ISA information as
934 comments in the assembly if -fverbose-asm. It makes easier to
935 debug things like -march=native.
936 (TARGET_ASM_CODE_END): Define.
937 * config/loongarch/loongarch.opt: Regenerate.
938 * config/loongarch/loongarch-cpucfg-map.h: Generate.
939 (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
941 2023-11-18 Xi Ruoyao <xry111@xry111.site>
943 * config/loongarch/genopts/loongarch-strings:
944 (STR_ISA_BASE_LA64V110): Add.
945 * config/loongarch/genopts/loongarch.opt.in:
946 (ISA_BASE_LA64V110): Add.
947 * config/loongarch/loongarch-def.c
948 (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
949 to STR_ISA_BASE_LA64V110.
950 * config/loongarch/loongarch.opt: Regenerate.
951 * config/loongarch/loongarch-str.h: Regenerate.
953 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
955 * doc/invoke.texi (-fprofile-update): Clarify default method. Document
956 the atomic method behaviour.
957 * tree-profile.cc (enum counter_update_method): New.
958 (counter_update): Likewise.
959 (gen_counter_update): Use counter_update_method. Split the
960 atomic counter update in two 32-bit atomic operations if
962 (tree_profiling): Select counter_update_method.
964 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
966 * tree-profile.cc (gen_assign_counter_update): New.
967 (gen_counter_update): Likewise.
968 (gimple_gen_edge_profiler): Use gen_counter_update().
969 (gimple_gen_time_profiler): Likewise.
971 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
973 * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
974 * doc/tm.texi: Regenerate.
975 * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
976 * target.def (have_libatomic): New.
978 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
981 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
983 * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
984 * config/sparc/sparc.c (sparc_gcov_type_size): New.
985 (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
986 * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
987 * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
988 * doc/tm.texi.in: Regenerate.
989 * target.def (gcov_type_size): New target hook.
990 * targhooks.c (default_gcov_type_size): New.
991 * targhooks.h (default_gcov_type_size): Declare.
992 * tree-profile.c (gimple_gen_edge_profiler): Use precision of
994 (gimple_gen_time_profiler): Likewise.
996 2023-11-18 Kito Cheng <kito.cheng@sifive.com>
998 * config/riscv/riscv-target-attr.cc
999 (riscv_target_attr_parser::parse_arch): Use char[] for
1000 std::unique_ptr to prevent mismatched new delete issue.
1001 (riscv_process_one_target_attr): Ditto.
1002 (riscv_process_target_attr): Ditto.
1004 2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1006 * config/riscv/vector-iterators.md: Refactor iterators.
1008 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1010 * config/loongarch/sync.md (atomic_load<mode>): New template.
1012 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1014 * config/loongarch/loongarch-def.h: Add comments.
1015 * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
1016 * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
1017 Remove redundant code implementations.
1018 * config/loongarch/sync.md (d): Added QI, HI support.
1019 (atomic_add<mode>): New template.
1020 (atomic_exchange<mode>_short): Likewise.
1021 (atomic_cas_value_strong<mode>_amcas): Likewise..
1022 (atomic_fetch_add<mode>_short): Likewise.
1024 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1026 * config.gcc: Support LA664.
1027 * config/loongarch/genopts/loongarch-strings: Likewise.
1028 * config/loongarch/genopts/loongarch.opt.in: Likewise.
1029 * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
1030 * config/loongarch/loongarch-def.c: Likewise.
1031 * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
1032 (ISA_BASE_LA64V110): Define macro.
1033 (N_ARCH_TYPES): Update value.
1034 (N_TUNE_TYPES): Update value.
1035 (CPU_LA664): New macro.
1036 * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
1037 (isa_base_compat_p): Likewise.
1038 * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
1039 when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
1040 (TARGET_uARCH_LA664): Define macro.
1041 * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
1042 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
1044 * config/loongarch/loongarch.opt: Regenerate.
1046 2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
1047 Xi Ruoyao <xry111@xry111.site>
1049 * config.in: Regenerate.
1050 * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
1051 * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
1052 If binutils supports call36, the function call is not split over expand.
1053 * config/loongarch/loongarch.md: Add call36 generation code.
1054 * config/loongarch/predicates.md: Likewise.
1055 * configure: Regenerate.
1056 * configure.ac: Check whether binutils supports call36.
1058 2023-11-18 David Malcolm <dmalcolm@redhat.com>
1061 * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
1062 * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
1063 -Wanalyzer-infinite-loop. Add missing CWE link for
1064 -Wanalyzer-infinite-recursion.
1065 * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
1067 2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
1069 PR middle-end/112406
1070 PR middle-end/112552
1071 * tree-vect-loop.cc (vect_transform_reduction): Pass truth
1072 vectype for mask operand.
1074 2023-11-17 Jakub Jelinek <jakub@redhat.com>
1077 * gimplify.cc (expand_FALLTHROUGH_r): Use wi->removed_stmt after
1078 gsi_remove, change the way of passing fallthrough stmt at the end
1079 of sequence to expand_FALLTHROUGH. Diagnose IFN_FALLTHROUGH
1080 with GF_CALL_NOTHROW flag.
1081 (expand_FALLTHROUGH): Change loc into array of 2 location_t elts,
1082 don't test wi.callback_result, instead check whether first
1083 elt is not UNKNOWN_LOCATION and in that case pedwarn with the
1085 * gimple-walk.cc (walk_gimple_seq_mod): Clear wi->removed_stmt
1086 after the flag has been used.
1087 * internal-fn.def (FALLTHROUGH): Mention in comment the special
1088 meaning of the TREE_NOTHROW/GF_CALL_NOTHROW flag on the calls.
1090 2023-11-17 Jakub Jelinek <jakub@redhat.com>
1092 PR tree-optimization/112566
1093 PR tree-optimization/83171
1094 * match.pd (ctz(ext(X)) -> ctz(X), popcount(zext(X)) -> popcount(X),
1095 parity(ext(X)) -> parity(X), ffs(ext(X)) -> ffs(X)): New
1097 ( __builtin_ffs (X) == 0 -> X == 0): Use FFS rather than
1098 BUILT_IN_FFS BUILT_IN_FFSL BUILT_IN_FFSLL BUILT_IN_FFSIMAX.
1100 2023-11-17 Jakub Jelinek <jakub@redhat.com>
1102 PR tree-optimization/112374
1103 * tree-vect-loop.cc (check_reduction_path): Perform the cond_fn_p
1104 special case only if op_use_stmt == use_stmt, use as_a rather than
1105 dyn_cast in that case.
1107 2023-11-17 Richard Biener <rguenther@suse.de>
1110 2023-11-14 Richard Biener <rguenther@suse.de>
1112 PR tree-optimization/112281
1113 * tree-loop-distribution.cc (pg_add_dependence_edges):
1114 Preserve stmt order when the innermost loop has exact
1117 2023-11-17 Georg-Johann Lay <avr@gjlay.de>
1120 * config/avr/avr.cc (avr_asm_named_section) [AVR_SECTION_PROGMEM]:
1121 Only return some .progmem*.data section if the user did not
1122 specify a section attribute.
1123 (avr_section_type_flags) [avr_progmem_p]: Unset SECTION_NOTYPE
1124 in returned section flags.
1126 2023-11-17 Xi Ruoyao <xry111@xry111.site>
1128 * config/loongarch/lsx.md (copysign<mode>3): Allow operand[2] to
1129 be an reg_or_vector_same_val_operand. If it's a const vector
1130 with same negative elements, expand the copysign with a bitset
1131 instruction. Otherwise, force it into an register.
1132 * config/loongarch/lasx.md (copysign<mode>3): Likewise.
1134 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
1137 * config/rs6000/vsx.md (*vsx_le_mem_to_mem_mov_ti): New.
1139 2023-11-17 Haochen Gui <guihaoc@gcc.gnu.org>
1142 * config/rs6000/altivec.md (cbranchv16qi4): New expand pattern.
1143 * config/rs6000/rs6000.cc (rs6000_generate_compare): Generate
1144 insn sequence for V16QImode equality compare.
1145 * config/rs6000/rs6000.h (MOVE_MAX_PIECES): Define.
1146 (STORE_MAX_PIECES): Define.
1148 2023-11-17 Li Wei <liwei@loongson.cn>
1150 * config/loongarch/loongarch.h (CLZ_DEFINED_VALUE_AT_ZERO):
1152 (CTZ_DEFINED_VALUE_AT_ZERO): Same.
1154 2023-11-17 Richard Biener <rguenther@suse.de>
1156 * dwarf2out.cc (add_AT_die_ref): Assert we do not add
1157 a self-ref DW_AT_abstract_origin or DW_AT_specification.
1159 2023-11-17 Jiahao Xu <xujiahao@loongson.cn>
1161 * config/loongarch/loongarch.cc
1162 (loongarch_builtin_vectorization_cost): Adjust.
1164 2023-11-16 Andrew Pinski <pinskia@gmail.com>
1166 PR rtl-optimization/112483
1167 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
1168 Call simplify_unary_operation for NEG instead of
1171 2023-11-16 Edwin Lu <ewlu@rivosinc.com>
1174 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): update macro name
1176 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
1179 * config/i386/i386.md (*addqi_ext2<mode>_0):
1180 New define_insn_and_split pattern.
1181 (*subqi_ext2<mode>_0): Ditto.
1182 (*<code>qi_ext2<mode>_0): Ditto.
1184 2023-11-16 John David Anglin <danglin@gcc.gnu.org>
1186 PR rtl-optimization/112415
1187 * config/pa/pa.cc (pa_legitimate_address_p): Allow 14-bit
1188 displacements before reload. Simplify logic flow. Revise
1190 * config/pa/pa.h (TARGET_ELF64): New define.
1191 (INT14_OK_STRICT): Update define and comment.
1192 * config/pa/pa64-linux.h (TARGET_ELF64): Define.
1193 * config/pa/predicates.md (base14_operand): Don't check
1194 alignment of short displacements.
1195 (integer_store_memory_operand): Don't return true when
1196 reload_in_progress is true. Remove INT_5_BITS check.
1197 (floating_point_store_memory_operand): Don't return true when
1198 reload_in_progress is true. Use INT14_OK_STRICT to check
1199 whether long displacements are always okay.
1201 2023-11-16 Uros Bizjak <ubizjak@gmail.com>
1204 * config/i386/i386.md (*<any_logic:code>qi_ext<mode>_1_slp):
1205 Fix generation of invalid RTX in split pattern.
1207 2023-11-16 David Malcolm <dmalcolm@redhat.com>
1209 * diagnostic.cc (diagnostic_context::set_option_hooks): Add
1211 * diagnostic.h (diagnostic_context::option_enabled_p): Update for
1212 move of m_lang_mask.
1213 (diagnostic_context::set_option_hooks): Add "lang_mask" param.
1214 (diagnostic_context::get_lang_mask): New.
1215 (diagnostic_context::m_lang_mask): Move into m_option_callbacks,
1216 thus making private.
1217 * lto-wrapper.cc (main): Update for new lang_mask param of
1219 * toplev.cc (init_asm_output): Use get_lang_mask.
1220 (general_init): Move initialization of global_dc's lang_mask to
1221 new lang_mask param of set_option_hooks.
1223 2023-11-16 Tamar Christina <tamar.christina@arm.com>
1225 PR tree-optimization/111878
1226 * tree-vect-loop-manip.cc (find_loop_location): Skip edges check if
1229 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
1231 * config.gcc (riscv): Add riscv-target-attr.o.
1232 * config/riscv/riscv-protos.h (riscv_declare_function_size) New.
1233 (riscv_option_valid_attribute_p): New.
1234 (riscv_override_options_internal): New.
1235 (struct riscv_tune_info): New.
1236 (riscv_parse_tune): New.
1237 * config/riscv/riscv-target-attr.cc
1238 (class riscv_target_attr_parser): New.
1239 (struct riscv_attribute_info): New.
1240 (riscv_attributes): New.
1241 (riscv_target_attr_parser::parse_arch): New.
1242 (riscv_target_attr_parser::handle_arch): New.
1243 (riscv_target_attr_parser::handle_cpu): New.
1244 (riscv_target_attr_parser::handle_tune): New.
1245 (riscv_target_attr_parser::update_settings): New.
1246 (riscv_process_one_target_attr): New.
1247 (num_occurences_in_str): New.
1248 (riscv_process_target_attr): New.
1249 (riscv_option_valid_attribute_p): New.
1250 * config/riscv/riscv.cc: Include target-globals.h and
1252 (struct riscv_tune_info): Move to riscv-protos.h.
1253 (get_tune_str): New.
1254 (riscv_parse_tune): New parameter null_p.
1255 (riscv_declare_function_size): New.
1256 (riscv_option_override): Build target_option_default_node and
1257 target_option_current_node.
1258 (riscv_save_restore_target_globals): New.
1259 (riscv_option_restore): New.
1260 (riscv_previous_fndecl): New.
1261 (riscv_set_current_function): Apply the target attribute.
1262 (TARGET_OPTION_RESTORE): Define.
1263 (TARGET_OPTION_VALID_ATTRIBUTE_P): Ditto.
1264 * config/riscv/riscv.h (SWITCHABLE_TARGET): Define to 1.
1265 (ASM_DECLARE_FUNCTION_SIZE) Define.
1266 * config/riscv/riscv.opt (mtune=): Add Save attribute.
1269 * config/riscv/t-riscv: Add build rule for riscv-target-attr.o
1270 * doc/extend.texi: Add doc for target attribute.
1272 2023-11-16 Kito Cheng <kito.cheng@sifive.com>
1275 * config/riscv/riscv.cc (riscv_save_return_addr_reg_p): Check ra
1278 2023-11-16 liuhongt <hongtao.liu@intel.com>
1281 * config/i386/mmx.md (*vec_dup<mode>): Extend for V4HI and
1284 2023-11-16 Jakub Jelinek <jakub@redhat.com>
1287 * config/i386/i386.md
1288 (mov imm,%rax; mov %rdi,%rdx; mulx %rax -> mov imm,%rdx; mulx %rdi):
1289 Verify in define_peephole2 that operands[2] dies or is overwritten
1290 at the end of multiplication.
1292 2023-11-16 Jakub Jelinek <jakub@redhat.com>
1294 PR tree-optimization/112536
1295 * tree-vect-slp.cc (arg0_map): New variable.
1296 (vect_get_operand_map): For IFN_CLZ or IFN_CTZ, return arg0_map.
1298 2023-11-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1300 PR middle-end/112554
1301 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
1302 Clear SELECT_VL_P for non-partial vectorization.
1304 2023-11-16 Hongyu Wang <hongyu.wang@intel.com>
1306 * config/i386/sse.md (vec_extract_hi_<mode>): Add noavx512vl
1307 alternative with attr addr gpr16 and "jm" constraint.
1308 (vec_extract_hi_<mode>): Likewise for SF vector modes.
1309 (@vec_extract_hi_<mode>): Likewise.
1310 (*vec_extractv2ti): Likewise.
1311 (vec_set_hi_<mode><mask_name>): Likewise.
1312 * config/i386/mmx.md (@sse4_1_insertps_<mode>): Correct gpr16 attr for
1315 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
1318 * config/i386/i386.md (*movstrictqi_ext<mode>_1): New insn pattern.
1319 (*addqi_ext<mode>_2_slp): New define_insn_and_split pattern.
1320 (*subqi_ext<mode>_2_slp): Ditto.
1321 (*<any_logic:code>qi_ext<mode>_2_slp): Ditto.
1323 2023-11-15 Patrick O'Neill <patrick@rivosinc.com>
1325 * common/config/riscv/riscv-common.cc
1326 (riscv_subset_list::parse_std_ext): Emit an error and skip to
1327 the next extension when a non-canonical ordering is detected.
1329 2023-11-15 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
1331 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text):
1332 Revert using the macro CAN_HAVE_LOCATION_P.
1334 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1337 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Insert
1338 local vsetvl info before LCM suggested one.
1339 Tested-by: Patrick O'Neill <patrick@rivosinc.com> # pre-commit-CI #679
1340 Co-developed-by: Vineet Gupta <vineetg@rivosinc.com>
1342 2023-11-15 Vineet Gupta <vineetg@rivosinc.com>
1344 * config/riscv/riscv.cc (riscv_sign_extend_if_not_subreg_prom): New.
1345 * (riscv_extend_comparands): Call New function on operands.
1347 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
1349 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
1350 Add "&& " before "reload_completed" in split condition.
1351 (*subqi_ext<mode>_1_slp): Ditto.
1352 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
1354 2023-11-15 Uros Bizjak <ubizjak@gmail.com>
1357 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
1358 Correct operand numbers in split pattern. Replace !Q constraint
1359 of operand 1 with !qm. Add insn constrain.
1360 (*subqi_ext<mode>_1_slp): Ditto.
1361 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
1363 2023-11-15 Thomas Schwinge <thomas@codesourcery.com>
1365 * doc/extend.texi (Nvidia PTX Built-in Functions): Fix
1366 copy'n'paste-o in '__builtin_nvptx_brev' description.
1368 2023-11-15 Roger Sayle <roger@nextmovesoftware.com>
1369 Thomas Schwinge <thomas@codesourcery.com>
1371 * config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
1372 (bitrev<mode>2): Represent using bitreverse.
1374 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
1375 Andrew Jenner <andrew@codesourcery.com>
1377 * config/gcn/constraints.md: Add "a" AVGPR constraint.
1378 * config/gcn/gcn-valu.md (*mov<mode>): Add AVGPR alternatives.
1379 (*mov<mode>_4reg): Likewise.
1380 (@mov<mode>_sgprbase): Likewise.
1381 (gather<mode>_insn_1offset<exec>): Likewise.
1382 (gather<mode>_insn_1offset_ds<exec>): Likewise.
1383 (gather<mode>_insn_2offsets<exec>): Likewise.
1384 (scatter<mode>_expr<exec_scatter>): Likewise.
1385 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
1386 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
1387 * config/gcn/gcn.cc (MAX_NORMAL_AVGPR_COUNT): Define.
1388 (gcn_class_max_nregs): Handle AVGPR_REGS and ALL_VGPR_REGS.
1389 (gcn_hard_regno_mode_ok): Likewise.
1390 (gcn_regno_reg_class): Likewise.
1391 (gcn_spill_class): Allow spilling to AVGPRs on TARGET_CDNA1_PLUS.
1392 (gcn_sgpr_move_p): Handle AVGPRs.
1393 (gcn_secondary_reload): Reload AVGPRs via VGPRs.
1394 (gcn_conditional_register_usage): Handle AVGPRs.
1395 (gcn_vgpr_equivalent_register_operand): New function.
1396 (gcn_valid_move_p): Check for validity of AVGPR moves.
1397 (gcn_compute_frame_offsets): Handle AVGPRs.
1398 (gcn_memory_move_cost): Likewise.
1399 (gcn_register_move_cost): Likewise.
1400 (gcn_vmem_insn_p): Handle TYPE_VOP3P_MAI.
1401 (gcn_md_reorg): Handle AVGPRs.
1402 (gcn_hsa_declare_function_name): Likewise.
1403 (print_reg): Likewise.
1404 (gcn_dwarf_register_number): Likewise.
1405 * config/gcn/gcn.h (FIRST_AVGPR_REG): Define.
1406 (AVGPR_REGNO): Define.
1407 (LAST_AVGPR_REG): Define.
1408 (SOFT_ARG_REG): Update.
1409 (FRAME_POINTER_REGNUM): Update.
1410 (DWARF_LINK_REGISTER): Update.
1411 (FIRST_PSEUDO_REGISTER): Update.
1412 (AVGPR_REGNO_P): Define.
1413 (enum reg_class): Add AVGPR_REGS and ALL_VGPR_REGS.
1414 (REG_CLASS_CONTENTS): Add new register classes and add entries for
1415 AVGPRs to all classes.
1416 (REGISTER_NAMES): Add AVGPRs.
1417 * config/gcn/gcn.md (FIRST_AVGPR_REG, LAST_AVGPR_REG): Define.
1418 (AP_REGNUM, FP_REGNUM): Update.
1419 (define_attr "type"): Add vop3p_mai.
1420 (define_attr "unit"): Handle vop3p_mai.
1421 (define_attr "gcn_version"): Add "cdna2".
1422 (define_attr "enabled"): Handle cdna2.
1423 (*mov<mode>_insn): Add AVGPR alternatives.
1424 (*movti_insn): Likewise.
1425 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): New.
1426 (process_asm): Process avgpr_count.
1427 * config/gcn/predicates.md (gcn_avgpr_register_operand): New.
1428 (gcn_avgpr_hard_register_operand): New.
1429 * doc/md.texi: Document the "a" constraint.
1431 2023-11-15 Andrew Stubbs <ams@codesourcery.com>
1433 * config/gcn/gcn-valu.md (mov<mode>_sgprbase): Add @ modifier.
1434 (reload_in<mode>): Delete.
1435 (reload_out<mode>): Delete.
1436 * config/gcn/gcn.cc (CODE_FOR): Delete.
1437 (get_code_for_##PREFIX##vN##SUFFIX): Delete.
1438 (CODE_FOR_OP): Delete.
1439 (get_code_for_##PREFIX): Delete.
1440 (gcn_secondary_reload): Replace "get_code_for" with "code_for".
1442 2023-11-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1444 * config/s390/t-s390: Generate s390-gen-builtins.h without
1447 2023-11-15 Richard Biener <rguenther@suse.de>
1449 PR tree-optimization/112282
1450 * tree-if-conv.cc (ifcvt_hoist_invariants): Only hoist from
1453 2023-11-15 Richard Biener <rguenther@suse.de>
1455 * tree-vect-slp.cc (vect_slp_region): Also clear visited flag when
1456 we skipped an instance due to -fdbg-cnt.
1458 2023-11-15 Xi Ruoyao <xry111@xry111.site>
1460 * config/loongarch/loongarch.cc
1461 (loongarch_memmodel_needs_release_fence): Remove.
1462 (loongarch_cas_failure_memorder_needs_acquire): New static
1464 (loongarch_print_operand): Redefine 'G' for the barrier on CAS
1466 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
1467 Remove the redundant barrier before the LL instruction, and
1468 emit an acquire barrier on failure if needed by
1470 (atomic_cas_value_cmp_and_7_<mode>): Likewise.
1471 (atomic_cas_value_add_7_<mode>): Remove the unnecessary barrier
1472 before the LL instruction.
1473 (atomic_cas_value_sub_7_<mode>): Likewise.
1474 (atomic_cas_value_and_7_<mode>): Likewise.
1475 (atomic_cas_value_xor_7_<mode>): Likewise.
1476 (atomic_cas_value_or_7_<mode>): Likewise.
1477 (atomic_cas_value_nand_7_<mode>): Likewise.
1478 (atomic_cas_value_exchange_7_<mode>): Likewise.
1480 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1482 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem): New function.
1483 (expand_vec_init): Add trailing optimization.
1485 2023-11-15 Pan Li <pan2.li@intel.com>
1487 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
1488 Add inner_mode mask arg for mask int mode.
1489 (get_repeating_sequence_dup_machine_mode): Add mask_bit_mode arg
1490 to get the good enough vector int mode on precision.
1491 (expand_vector_init_merge_repeating_sequence): Pass required args
1494 2023-11-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1497 * config/riscv/riscv.cc (riscv_legitimate_address_p): Disallow RVV modes base address.
1499 2023-11-15 David Malcolm <dmalcolm@redhat.com>
1501 * json.cc (selftest::assert_print_eq): Add "loc" param and use
1503 (ASSERT_PRINT_EQ): New macro.
1504 (selftest::test_writing_objects): Use ASSERT_PRINT_EQ to capture
1505 source location of assertion.
1506 (selftest::test_writing_arrays): Likewise.
1507 (selftest::test_writing_float_numbers): Likewise.
1508 (selftest::test_writing_integer_numbers): Likewise.
1509 (selftest::test_writing_strings): Likewise.
1510 (selftest::test_writing_literals): Likewise.
1512 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1515 * doc/invoke.texi (Static Analyzer Options): Add the six
1516 -Wanalyzer-tainted-* warnings. Update documentation of each
1517 warning to reflect removed requirement to use
1518 -fanalyzer-checker=taint. Remove discussion of
1519 -fanalyzer-checker=taint.
1521 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1523 * diagnostic-format-json.cc
1524 (json_output_format::on_end_diagnostic): Update calls to m_context
1525 callbacks to use member functions; tighten up scopes.
1526 * diagnostic-format-sarif.cc (sarif_builder::make_result_object):
1528 (sarif_builder::make_reporting_descriptor_object_for_warning):
1530 * diagnostic.cc (diagnostic_context::initialize): Update for
1531 callbacks being moved into m_option_callbacks and being renamed.
1532 (diagnostic_context::set_option_hooks): New.
1533 (diagnostic_option_classifier::classify_diagnostic): Update call
1534 to global_dc->m_option_enabled to use option_enabled_p.
1535 (diagnostic_context::print_option_information): Update calls to
1536 m_context callbacks to use member functions; tighten up scopes.
1537 (diagnostic_context::diagnostic_enabled): Likewise.
1538 * diagnostic.h (diagnostic_option_enabled_cb): New typedef.
1539 (diagnostic_make_option_name_cb): New typedef.
1540 (diagnostic_make_option_url_cb): New typedef.
1541 (diagnostic_context::option_enabled_p): New.
1542 (diagnostic_context::make_option_name): New.
1543 (diagnostic_context::make_option_url): New.
1544 (diagnostic_context::set_option_hooks): New decl.
1545 (diagnostic_context::m_option_enabled): Rename to
1546 m_option_enabled_cb and move within m_option_callbacks, using
1548 (diagnostic_context::m_option_state): Move within
1550 (diagnostic_context::m_option_name): Rename to
1551 m_make_option_name_cb and move within m_option_callbacks, using
1553 (diagnostic_context::m_get_option_url): Likewise, renaming to
1554 m_make_option_url_cb.
1555 * lto-wrapper.cc (print_lto_docs_link): Update call to m_context
1556 callback to use member function.
1557 (main): Use diagnostic_context::set_option_hooks.
1558 * opts-diagnostic.h (option_name): Make context param const.
1559 (get_option_url): Likewise.
1560 * opts.cc (option_name): Likewise.
1561 (get_option_url): Likewise.
1562 * toplev.cc (general_init): Use
1563 diagnostic_context::set_option_hooks.
1565 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1567 * selftest-diagnostic.cc
1568 (test_diagnostic_context::test_diagnostic_context): Use
1569 diagnostic_start_span.
1570 * tree-diagnostic-path.cc (struct event_range): Likewise.
1572 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1574 * diagnostic-show-locus.cc (diagnostic_context::show_locus):
1575 Update for renaming of text callbacks fields.
1576 * diagnostic.cc (diagnostic_context::initialize): Likewise.
1577 * diagnostic.h (class diagnostic_context): Add "friend" for
1578 accessors to m_text_callbacks.
1579 (diagnostic_context::m_text_callbacks): Make private, and add an
1580 "m_" prefix to field names.
1581 (diagnostic_starter): Convert from macro to inline function.
1582 (diagnostic_start_span): New.
1583 (diagnostic_finalizer): Convert from macro to inline function.
1585 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1587 * diagnostic.h (diagnostic_ready_p): Convert from macro to inline
1590 2023-11-14 Uros Bizjak <ubizjak@gmail.com>
1593 * config/i386/i386.md (*addqi_ext<mode>_1_slp):
1594 New define_insn_and_split pattern.
1595 (*subqi_ext<mode>_1_slp): Ditto.
1596 (*<any_logic:code>qi_ext<mode>_1_slp): Ditto.
1598 2023-11-14 Andrew Stubbs <ams@codesourcery.com>
1601 * expr.cc (store_constructor): Use OPTAB_WIDEN for mask adjustment.
1603 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1605 * diagnostic-format-sarif.cc (sarif_builder::get_sarif_column):
1606 Use m_context's file_cache.
1607 (sarif_builder::maybe_make_artifact_content_object): Likewise.
1608 (sarif_builder::get_source_lines): Likewise.
1609 * diagnostic-show-locus.cc
1610 (exploc_with_display_col::exploc_with_display_col): Add file_cache
1612 (layout::m_file_cache): New field.
1613 (make_range): Add file_cache param.
1614 (selftest::test_layout_range_for_single_point): Create and use a
1615 temporary file_cache.
1616 (selftest::test_layout_range_for_single_line): Likewise.
1617 (selftest::test_layout_range_for_multiple_lines): Likewise.
1618 (layout::layout): Initialize m_file_cache from the context and use it.
1619 (layout::maybe_add_location_range): Use m_file_cache.
1620 (layout::calculate_x_offset_display): Likewise.
1621 (get_affected_range): Add file_cache param.
1622 (get_printed_columns): Likewise.
1623 (line_corrections::line_corrections): Likewwise.
1624 (line_corrections::m_file_cache): New field.
1625 (source_line::source_line): Add file_cache param.
1626 (line_corrections::add_hint): Use m_file_cache.
1627 (layout::print_trailing_fixits): Likewise.
1628 (layout::print_line): Likewise.
1629 (selftest::test_layout_x_offset_display_utf8): Create and use a
1630 temporary file_cache.
1631 (selftest::test_layout_x_offset_display_tab): Likewise.
1632 (selftest::test_diagnostic_show_locus_one_liner_utf8): Likewise.
1633 (selftest::test_add_location_if_nearby): Pass global_dc's
1634 file_cache to temp_source_file ctor.
1635 (selftest::test_overlapped_fixit_printing): Create and use a
1636 temporary file_cache.
1637 (selftest::test_overlapped_fixit_printing_utf8): Likewise.
1638 (selftest::test_overlapped_fixit_printing_2): Use dc's file_cache.
1639 * diagnostic.cc (diagnostic_context::initialize): Always create a
1641 (diagnostic_context::initialize_input_context): Assume
1642 m_file_cache has already been created.
1643 (diagnostic_context::create_edit_context): Pass m_file_cache to
1645 (convert_column_unit): Add file_cache param.
1646 (diagnostic_context::converted_column): Use context's file_cache.
1647 (print_parseable_fixits): Add file_cache param.
1648 (diagnostic_context::report_diagnostic): Use context's file_cache.
1649 (selftest::test_print_parseable_fixits_none): Create and use a
1650 temporary file_cache.
1651 (selftest::test_print_parseable_fixits_insert): Likewise.
1652 (selftest::test_print_parseable_fixits_remove): Likewise.
1653 (selftest::test_print_parseable_fixits_replace): Likewise.
1654 (selftest::test_print_parseable_fixits_bytes_vs_display_columns):
1656 * diagnostic.h (diagnostic_context::file_cache_init): Delete.
1657 (diagnostic_context::get_file_cache): Convert return type from
1658 pointer to reference.
1659 * edit-context.cc (edited_file::get_file_cache): New.
1660 (edited_file::m_edit_context): New.
1661 (edit_context::edit_context): Add file_cache param.
1662 (edit_context::get_or_insert_file): Pass this to edited_file's
1664 (edited_file::edited_file): Add edit_context param.
1665 (edited_file::print_content): Use get_file_cache.
1666 (edited_file::print_diff_hunk): Likewise.
1667 (edited_file::print_run_of_changed_lines): Likewise.
1668 (edited_file::get_or_insert_line): Likewise.
1669 (edited_file::get_num_lines): Likewise.
1670 (edited_line::edited_line): Pass in file_cache and use it.
1671 (selftest::test_get_content): Create and use a
1672 temporary file_cache.
1673 (selftest::test_applying_fixits_insert_before): Likewise.
1674 (selftest::test_applying_fixits_insert_after): Likewise.
1675 (selftest::test_applying_fixits_insert_after_at_line_end):
1677 (selftest::test_applying_fixits_insert_after_failure): Likewise.
1678 (selftest::test_applying_fixits_insert_containing_newline):
1680 (selftest::test_applying_fixits_growing_replace): Likewise.
1681 (selftest::test_applying_fixits_shrinking_replace): Likewise.
1682 (selftest::test_applying_fixits_replace_containing_newline):
1684 (selftest::test_applying_fixits_remove): Likewise.
1685 (selftest::test_applying_fixits_multiple): Likewise.
1686 (selftest::test_applying_fixits_multiple_lines): Likewise.
1687 (selftest::test_applying_fixits_modernize_named_init): Likewise.
1688 (selftest::test_applying_fixits_modernize_named_init): Likewise.
1689 (selftest::test_applying_fixits_unreadable_file): Likewise.
1690 (selftest::test_applying_fixits_line_out_of_range): Likewise.
1691 (selftest::test_applying_fixits_column_validation): Likewise.
1692 (selftest::test_applying_fixits_column_validation): Likewise.
1693 (selftest::test_applying_fixits_column_validation): Likewise.
1694 (selftest::test_applying_fixits_column_validation): Likewise.
1695 * edit-context.h (edit_context::edit_context): Add file_cache
1697 (edit_context::get_file_cache): New.
1698 (edit_context::m_file_cache): New.
1699 * final.cc: Include "diagnostic.h".
1700 (asm_show_source): Use global_dc's file_cache.
1701 * gcc-rich-location.cc (blank_line_before_p): Add file_cache
1703 (use_new_line): Likewise.
1704 (gcc_rich_location::add_fixit_insert_formatted): Use global dc's
1706 * input.cc (diagnostic_file_cache_init): Delete.
1707 (diagnostic_context::file_cache_init): Delete.
1708 (diagnostics_file_cache_forcibly_evict_file): Delete.
1709 (file_cache::missing_trailing_newline_p): New.
1710 (file_cache::evicted_cache_tab_entry): Don't call
1711 diagnostic_file_cache_init.
1712 (location_get_source_line): Delete.
1713 (get_source_text_between): Add file_cache param.
1714 (get_source_file_content): Delete.
1715 (location_missing_trailing_newline): Delete.
1716 (location_compute_display_column): Add file_cache param.
1717 (dump_location_info): Create and use temporary file_cache.
1718 (get_substring_ranges_for_loc): Add file_cache param.
1719 (get_location_within_string): Likewise.
1720 (get_source_range_for_char): Likewise.
1721 (get_num_source_ranges_for_substring): Likewise.
1722 (selftest::test_reading_source_line): Create and use temporary
1724 (selftest::lexer_test::m_file_cache): New field.
1725 (selftest::assert_char_at_range): Use test.m_file_cache.
1726 (selftest::assert_num_substring_ranges): Likewise.
1727 (selftest::assert_has_no_substring_ranges): Likewise.
1728 (selftest::test_lexer_string_locations_concatenation_2): Likewise.
1729 * input.h (class file_cache): New forward decl.
1730 (location_compute_display_column): Add file_cache param.
1731 (location_get_source_line): Delete.
1732 (get_source_text_between): Add file_cache param.
1733 (get_source_file_content): Delete.
1734 (location_missing_trailing_newline): Delete.
1735 (file_cache::missing_trailing_newline_p): New decl.
1736 (diagnostics_file_cache_forcibly_evict_file): Delete.
1737 * selftest.cc (named_temp_file::named_temp_file): Add file_cache
1739 (named_temp_file::~named_temp_file): Optionally evict the file
1740 from the given file_cache.
1741 (temp_source_file::temp_source_file): Add file_cache param.
1742 * selftest.h (class file_cache): New forward decl.
1743 (named_temp_file::named_temp_file): Add file_cache param.
1744 (named_temp_file::m_file_cache): New field.
1745 (temp_source_file::temp_source_file): Add file_cache param.
1746 * substring-locations.h (get_location_within_string): Add
1749 2023-11-14 David Malcolm <dmalcolm@redhat.com>
1751 * diagnostic-format-json.cc: Use type-specific "set_*" functions
1752 of json::object to avoid naked new of json value subclasses.
1753 * diagnostic-format-sarif.cc: Likewise.
1754 * gcov.cc: Likewise.
1755 * json.cc (object::set_string): New.
1756 (object::set_integer): New.
1757 (object::set_float): New.
1758 (object::set_bool): New.
1759 (selftest::test_writing_objects): Use object::set_string.
1760 * json.h (object::set_string): New decl.
1761 (object::set_integer): New decl.
1762 (object::set_float): New decl.
1763 (object::set_bool): New decl.
1764 * optinfo-emit-json.cc: Use type-specific "set_*" functions of
1765 json::object to avoid naked new of json value subclasses.
1766 * timevar.cc: Likewise.
1767 * tree-diagnostic-path.cc: Likewise.
1769 2023-11-14 Andrew MacLeod <amacleod@redhat.com>
1771 PR tree-optimization/112509
1772 * tree-vrp.cc (find_case_label_range): Create range from case labels.
1774 2023-11-14 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1776 * config/s390/s390-builtin-types.def: Add/remove types.
1777 * config/s390/s390-builtins.def (s390_vec_scatter_element_flt):
1778 The type for the offset should be UV4SI instead of V4SF.
1780 2023-11-14 Saurabh Jha <saurabh.jha@arm.com>
1783 * config/arm/arm.cc (mve_vector_mem_operand): Add a REG_P check for INC
1786 2023-11-14 Richard Biener <rguenther@suse.de>
1788 PR tree-optimization/111233
1789 PR tree-optimization/111652
1790 PR tree-optimization/111727
1791 PR tree-optimization/111838
1792 PR tree-optimization/112113
1793 * tree-ssa-loop-split.cc (patch_loop_exit): Get the new
1794 guard code instead of the old guard stmt.
1795 (split_loop): Adjust.
1797 2023-11-14 Richard Biener <rguenther@suse.de>
1799 * tree-loop-distribution.cc (loop_distribution::data_dep_in_cycle_p):
1800 Consider all loops in the nest when looking for
1801 lambda_vector_zerop.
1803 2023-11-14 Richard Biener <rguenther@suse.de>
1805 PR tree-optimization/112281
1806 * tree-loop-distribution.cc (pg_add_dependence_edges):
1807 Preserve stmt order when the innermost loop has exact
1810 2023-11-14 Jakub Jelinek <jakub@redhat.com>
1814 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): Move
1815 operands[1] aka low part of input rather than operands[3] aka high
1816 part of input to output if not the same register.
1818 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
1820 * config.gcc: Add s390-gen-builtins.h to target_gtfiles.
1821 * config/s390/s390-builtins.h (s390_builtin_types)
1822 (s390_builtin_fn_types, s390_builtin_decls): Add GTY marker.
1823 * config/s390/t-s390 (EXTRA_GTYPE_DEPS): Add s390-gen-builtins.h.
1824 Add build rule for s390-gen-builtins.h.
1826 2023-11-14 Andreas Krebbel <krebbel@linux.ibm.com>
1828 * config/s390/s390-c.cc (s390_fn_types_compatible): Add a check
1829 for error_mark_node.
1831 2023-11-14 Jakub Jelinek <jakub@redhat.com>
1834 * builtins.def (BUILT_IN_CLZG, BUILT_IN_CTZG, BUILT_IN_CLRSBG,
1835 BUILT_IN_FFSG, BUILT_IN_PARITYG, BUILT_IN_POPCOUNTG): New
1837 * builtins.cc (fold_builtin_bit_query): New function.
1838 (fold_builtin_1): Use it for
1839 BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
1840 (fold_builtin_2): Use it for BUILT_IN_{CLZ,CTZ}G.
1841 * fold-const-call.cc: Fix comment typo on tm.h inclusion.
1842 (fold_const_call_ss): Handle
1843 CFN_BUILT_IN_{CLZ,CTZ,CLRSB,FFS,PARITY,POPCOUNT}G.
1844 (fold_const_call_sss): New function.
1845 (fold_const_call_1): Call it for 2 argument functions returning
1846 scalar when passed 2 INTEGER_CSTs.
1847 * genmatch.cc (cmp_operand): For function calls also compare
1848 number of arguments.
1849 (fns_cmp): New function.
1850 (dt_node::gen_kids): Sort fns and generic_fns.
1851 (dt_node::gen_kids_1): Handle fns with the same id but different
1852 number of arguments.
1853 * match.pd (CLZ simplifications): Drop checks for defined behavior
1854 at zero. Add variant of simplifications for IFN_CLZ with 2 arguments.
1855 (CTZ simplifications): Drop checks for defined behavior at zero,
1856 don't optimize precisions above MAX_FIXED_MODE_SIZE. Add variant of
1857 simplifications for IFN_CTZ with 2 arguments.
1858 (a != 0 ? CLZ(a) : CST -> .CLZ(a)): Use TREE_TYPE (@3) instead of
1859 type, add BITINT_TYPE handling, create 2 argument IFN_CLZ rather than
1860 one argument. Add variant for matching CLZ with 2 arguments.
1861 (a != 0 ? CTZ(a) : CST -> .CTZ(a)): Similarly.
1862 * gimple-lower-bitint.cc (bitint_large_huge::lower_bit_query): New
1864 (bitint_large_huge::lower_call): Use it for IFN_{CLZ,CTZ,CLRSB,FFS}
1865 and IFN_{PARITY,POPCOUNT} calls.
1866 * gimple-range-op.cc (cfn_clz::fold_range): Don't check
1867 CLZ_DEFINED_VALUE_AT_ZERO for m_gimple_call_internal_p, instead
1868 assume defined value at zero if the call has 2 arguments and use
1869 second argument value for that case.
1870 (cfn_ctz::fold_range): Similarly.
1871 (gimple_range_op_handler::maybe_builtin_call): Use op_cfn_clz_internal
1872 or op_cfn_ctz_internal only if internal fn call has 2 arguments and
1873 set m_op2 in that case.
1874 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern,
1875 vect_recog_popcount_clz_ctz_ffs_pattern): For value defined at zero
1876 use second argument of calls if present, otherwise assume UB at zero,
1877 create 2 argument .CLZ/.CTZ calls if needed.
1878 * tree-vect-stmts.cc (vectorizable_call): Handle 2 argument .CLZ/.CTZ
1880 * tree-ssa-loop-niter.cc (build_cltz_expr): Create 2 argument
1881 .CLZ/.CTZ calls if needed.
1882 * tree-ssa-forwprop.cc (simplify_count_trailing_zeroes): Create 2
1883 argument .CTZ calls if needed.
1884 * tree-ssa-phiopt.cc (cond_removal_in_builtin_zero_pattern): Handle
1885 2 argument .CLZ/.CTZ calls, handle BITINT_TYPE, create 2 argument
1887 * doc/extend.texi (__builtin_clzg, __builtin_ctzg, __builtin_clrsbg,
1888 __builtin_ffsg, __builtin_parityg, __builtin_popcountg): Document.
1890 2023-11-14 Xi Ruoyao <xry111@xry111.site>
1893 * config/loongarch/genopts/loongarch.opt.in: Add
1894 -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to
1895 account conditional branch relaxation support status.
1896 * config/loongarch/loongarch.opt: Regenerate.
1897 * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if
1898 the assembler supports conditional branch relaxation.
1899 * configure: Regenerate.
1900 * config.in: Regenerate. Note that there are some unrelated
1901 changes introduced by r14-5424 (which does not contain a
1902 config.in regeneration).
1903 * config/loongarch/loongarch-opts.h
1904 (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined.
1905 * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT):
1907 (ASM_MRELAX_SPEC): Define.
1908 (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}".
1909 * config/loongarch/loongarch.cc: Take the setting of
1910 -m[no-]relax into account when determining the default of
1912 * doc/invoke.texi: Document -m[no-]relax and
1913 -m[no-]pass-mrelax-to-as for LoongArch. Update the default
1914 value of -mexplicit-relocs=.
1916 2023-11-14 liuhongt <hongtao.liu@intel.com>
1918 PR tree-optimization/112496
1919 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Return
1920 false when !tree_nop_conversion_p (TREE_TYPE (vectype),
1921 TREE_TYPE (init_expr)).
1923 2023-11-14 Xi Ruoyao <xry111@xry111.site>
1925 * config/loongarch/sync.md (mem_thread_fence): Remove redundant
1927 (mem_thread_fence_1): Emit finer-grained DBAR hints for
1928 different memory models, instead of 0.
1930 2023-11-14 Jakub Jelinek <jakub@redhat.com>
1932 PR middle-end/112511
1933 * tree.cc (type_contains_placeholder_1): Handle BITINT_TYPE like
1936 2023-11-14 Jakub Jelinek <jakub@redhat.com>
1937 Hu, Lin1 <lin1.hu@intel.com>
1940 * config/i386/sse.md (avx512vl_shuf_<shuffletype>32x4_1<mask_name>,
1941 <mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>): Add
1942 alternative with just x instead of v constraints and xjm instead of
1943 vm and use vblendps as optimization only with that alternative.
1945 2023-11-14 liuhongt <hongtao.liu@intel.com>
1947 PR tree-optimization/105735
1948 PR tree-optimization/111972
1949 * tree-scalar-evolution.cc
1950 (analyze_and_compute_bitop_with_inv_effect): Handle bitop with
1953 2023-11-13 Arsen Arsenović <arsen@aarsen.me>
1955 * configure: Regenerate.
1956 * aclocal.m4: Regenerate.
1957 * Makefile.in (LIBDEPS): Remove (potential) ./ prefix from
1959 * doc/install.texi: Document new (notable) flags added by the
1960 optional gettext tree and by AM_GNU_GETTEXT. Document libintl/libc
1961 with gettext dependency.
1963 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
1965 * config/i386/i386-expand.h (gen_pushfl): New prototype.
1967 * config/i386/i386-expand.cc (ix86_expand_builtin)
1968 [case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
1969 [case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
1970 * config/i386/i386.cc (gen_pushfl): New function.
1972 * config/i386/i386.md (unspec): Add UNSPEC_PUSHFL and UNSPEC_POPFL.
1973 (@pushfl<mode>2): Rename from *pushfl<mode>2.
1974 Rewrite as unspec using UNSPEC_PUSHFL.
1975 (@popfl<mode>1): Rename from *popfl<mode>1.
1976 Rewrite as unspec using UNSPEC_POPFL.
1978 2023-11-13 Uros Bizjak <ubizjak@gmail.com>
1981 * config/i386/i386.cc (ix86_cc_mode) [default]: Return CCmode.
1983 2023-11-13 Robin Dapp <rdapp@ventanamicro.com>
1985 * config/riscv/riscv-vsetvl.cc (source_equal_p): Use pointer
1986 equality for REG_EQUAL.
1988 2023-11-13 Richard Biener <rguenther@suse.de>
1990 PR tree-optimization/112495
1991 * tree-data-ref.cc (runtime_alias_check_p): Reject checks
1992 between different address spaces.
1994 2023-11-13 Richard Biener <rguenther@suse.de>
1996 PR middle-end/112487
1997 * tree-inline.cc (setup_one_parameter): When the parameter
1998 is unused only insert a debug bind when there's not a gross
1999 mismatch in value and declared parameter type. Do not assert
2000 there effectively isn't.
2002 2023-11-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2004 * config/riscv/riscv-v.cc
2005 (rvv_builder::combine_sequence_use_merge_profitable_p): New function.
2006 (expand_vector_init_merge_combine_sequence): Ditto.
2007 (expand_vec_init): Adapt for new optimization.
2009 2023-11-13 liuhongt <hongtao.liu@intel.com>
2011 * config/i386/i386-expand.cc
2012 (ix86_expand_vector_init_duplicate): Handle V4HF/V4BF and
2014 (ix86_expand_vector_init_one_nonzero): Ditto.
2015 (ix86_expand_vector_init_one_var): Ditto.
2016 (ix86_expand_vector_init_general): Ditto.
2017 (ix86_expand_vector_set_var): Ditto.
2018 (ix86_expand_vector_set): Ditto.
2019 (ix86_expand_vector_extract): Ditto.
2020 * config/i386/mmx.md
2021 (mmxdoublevecmode): Extend to V4HF/V4BF/V2HF/V2BF.
2022 (*mmx_pinsrw): Extend to V4FI_64, add a new alternative (&x,
2023 x, x), add a new define_split after the pattern.
2024 (*mmx_pextrw<mode>): New define_insn.
2025 (mmx_pshufw_1): Rename to ..
2026 (mmx_pshufw<mode>_1): .. this, extend to V4FI_64.
2027 (*mmx_pblendw64): Extend to V4FI_64.
2028 (*vec_dup<mode>): New define_insn.
2029 (vec_setv4hi): Rename to ..
2030 (vec_set<mode>): .. this, and extend to V4FI_64
2031 (vec_extractv4hihi): Rename to ..
2032 (vec_extract<mode><mmxscalarmodelower>): .. this, and extend
2034 (vec_init<mode><mmxscalarmodelower>): New define_insn.
2035 (*pinsrw): Extend to V2FI_32, add a new alternative (&x,
2036 x, x), and add a new define_split after it.
2037 (*pextrw<mode>): New define_insn.
2038 (vec_setv2hi): Rename to ..
2039 (vec_set<mode>): .. this, extend to V2FI_32.
2040 (vec_extractv2hihi): Rename to ..
2041 (vec_extract<mode><mmxscalarmodelower>): .. this, extend to
2043 (*punpckwd): Extend to V2FI_32.
2044 (*pshufw_1): Rename to ..
2045 (*pshufw<mode>_1): .. this, extend to V2FI_32.
2046 (vec_initv2hihi): Rename to ..
2047 (vec_init<mode><mmxscalarmodelower>): .. this, and extend to
2049 (*vec_dup<mode>): New define_insn.
2050 * config/i386/sse.md (*vec_extract<mode>): Refine constraint
2053 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
2055 * config/arc/arc.md (UNSPEC_ARC_CC_NEZ): New UNSPEC that
2056 represents the carry flag being set if the operand is non-zero.
2057 (adc_f): New define_insn representing adc with updated flags.
2058 (ashrdi3): New define_expand that only handles shifts by 1.
2059 (ashrdi3_cnt1): New pre-reload define_insn_and_split.
2060 (lshrdi3): New define_expand that only handles shifts by 1.
2061 (lshrdi3_cnt1): New pre-reload define_insn_and_split.
2062 (rrcsi2): New define_insn for rrc (SImode rotate right through carry).
2063 (rrcsi2_carry): Likewise for rrc.f, as above but updating flags.
2064 (rotldi3): New define_expand that only handles rotates by 1.
2065 (rotldi3_cnt1): New pre-reload define_insn_and_split.
2066 (rotrdi3): New define_expand that only handles rotates by 1.
2067 (rotrdi3_cnt1): New pre-reload define_insn_and_split.
2068 (lshrsi3_cnt1_carry): New define_insn for lsr.f.
2069 (ashrsi3_cnt1_carry): New define_insn for asr.f.
2070 (btst_0_carry): New define_insn for asr.f without result.
2072 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
2074 * config/arc/arc.cc (TARGET_FOLD_BUILTIN): Define to
2076 (arc_fold_builtin): New function. Convert ARC_BUILTIN_SWAP
2077 into a rotate. Evaluate ARC_BUILTIN_NORM and
2078 ARC_BUILTIN_NORMW of constant arguments.
2079 * config/arc/arc.md (UNSPEC_ARC_SWAP): Delete.
2080 (normw): Make output template/assembler whitespace consistent.
2081 (swap): Remove define_insn, only use of SWAP UNSPEC.
2082 * config/arc/builtins.def: Tweak indentation.
2083 (SWAP): Expand using rotlsi2_cnt16 instead of using swap.
2085 2023-11-13 Roger Sayle <roger@nextmovesoftware.com>
2087 * config/i386/i386.md (<insn><dwi>3_doubleword_lowpart): New
2088 define_insn_and_split to optimize register usage of doubleword
2089 right shifts followed by truncation.
2091 2023-11-13 Jakub Jelinek <jakub@redhat.com>
2093 * config/i386/constraints.md: Remove j constraint letter from list of
2096 2023-11-13 Xi Ruoyao <xry111@xry111.site>
2098 PR rtl-optimization/112483
2099 * simplify-rtx.cc (simplify_binary_operation_1) <case COPYSIGN>:
2100 Fix the simplification of (fcopysign x, NEGATIVE_CONST).
2102 2023-11-13 Jakub Jelinek <jakub@redhat.com>
2104 PR tree-optimization/111967
2105 * gimple-range-cache.cc (block_range_cache::set_bb_range): Grow
2106 m_ssa_ranges to num_ssa_names rather than num_ssa_names + 1.
2107 (block_range_cache::dump): Iterate from 1 rather than 0. Don't use
2108 ssa_name (x) unless m_ssa_ranges[x] is non-NULL. Iterate to
2109 m_ssa_ranges.length () rather than num_ssa_names.
2111 2023-11-13 Xi Ruoyao <xry111@xry111.site>
2113 * config/loongarch/loongarch.md (LD_AT_LEAST_32_BIT): New mode
2115 (ST_ANY): New mode iterator.
2116 (define_peephole2): Use LD_AT_LEAST_32_BIT instead of GPR and
2117 ST_ANY instead of QHWD for applicable patterns.
2119 2023-11-13 Xi Ruoyao <xry111@xry111.site>
2122 * config/loongarch/loongarch.cc
2123 (loongarch_expand_vec_cond_mask_expr): Call simplify_gen_subreg
2124 instead of gen_rtx_SUBREG.
2126 2023-11-13 Pan Li <pan2.li@intel.com>
2128 * config/riscv/autovec.md: Add bridge mode to lrint and lround
2130 * config/riscv/riscv-protos.h (expand_vec_lrint): Add new arg
2131 bridge machine mode.
2132 (expand_vec_lround): Ditto.
2133 * config/riscv/riscv-v.cc (emit_vec_widden_cvt_f_f): New helper
2134 func impl to emit vfwcvt.f.f.
2135 (emit_vec_rounding_to_integer): Handle the HF to DI rounding
2136 with the bridge mode.
2137 (expand_vec_lrint): Reorder the args.
2138 (expand_vec_lround): Ditto.
2139 (expand_vec_lceil): Ditto.
2140 (expand_vec_lfloor): Ditto.
2141 * config/riscv/vector-iterators.md: Add vector HFmode and bridge
2142 mode for converting to DI.
2144 2023-11-12 Jeff Law <jlaw@ventanamicro.com>
2147 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
2149 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
2150 (prune_ready_list): USE or CLOBBER should delay execution
2151 if it starts a new live range.
2153 2023-11-12 Uros Bizjak <ubizjak@gmail.com>
2155 * config/i386/i386.md (*stack_protect_set_4s_<mode>_di):
2156 Remove alternative 0.
2158 2023-11-11 Eric Botcazou <ebotcazou@adacore.com>
2160 * ipa-cp.cc (print_ipcp_constant_value): Move to...
2161 (values_equal_for_ipcp_p): Deal with VAR_DECLs from the
2163 * ipa-prop.cc (ipa_print_constant_value): ...here. Likewise.
2164 (ipa_print_node_jump_functions_for_edge): Call the function
2165 ipa_print_constant_value to print IPA_JF_CONST elements.
2167 2023-11-11 Jin Ma <jinma@linux.alibaba.com>
2169 * haifa-sched.cc (use_or_clobber_starts_range_p): New.
2170 (prune_ready_list): USE or CLOBBER should delay execution
2171 if it starts a new live range.
2173 2023-11-11 Jakub Jelinek <jakub@redhat.com>
2175 PR middle-end/112430
2176 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remove temp_stmts in the
2177 order they were pushed rather than in reverse order. Call
2178 release_defs after gsi_remove.
2180 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2182 * target.def (mode_switching.backprop): New hook.
2183 * doc/tm.texi.in (TARGET_MODE_BACKPROP): New @hook.
2184 * doc/tm.texi: Regenerate.
2185 * mode-switching.cc (struct bb_info): Add single_succ.
2186 (confluence_info): Add transp field.
2187 (single_succ_confluence_n, single_succ_transfer): New functions.
2188 (backprop_confluence_n, backprop_transfer): Likewise.
2189 (optimize_mode_switching): Use them. Push mode transitions onto
2190 a block's incoming edges, if the backprop hook requires it.
2192 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2194 * target.def (mode_switching.confluence): New hook.
2195 * doc/tm.texi (TARGET_MODE_CONFLUENCE): New @hook.
2196 * doc/tm.texi.in: Regenerate.
2197 * mode-switching.cc (confluence_info): New variable.
2198 (mode_confluence, forward_confluence_n, forward_transfer): New
2200 (optimize_mode_switching): Use them to calculate mode_in when
2201 TARGET_MODE_CONFLUENCE is defined.
2203 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2205 * mode-switching.cc (commit_mode_sets): Use 1-based edge aux values.
2207 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2209 * target.def (mode_switching.after): Add a regs_live parameter.
2210 * doc/tm.texi: Regenerate.
2211 * config/epiphany/epiphany-protos.h (epiphany_mode_after): Update
2213 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
2214 (epiphany_mode_after): Likewise.
2215 * config/i386/i386.cc (ix86_mode_after): Likewise.
2216 * config/riscv/riscv.cc (riscv_mode_after): Likewise.
2217 * config/sh/sh.cc (sh_mode_after): Likewise.
2218 * mode-switching.cc (optimize_mode_switching): Likewise.
2220 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2222 * target.def (mode_switching.needed): Add a regs_live parameter.
2223 * doc/tm.texi: Regenerate.
2224 * config/epiphany/epiphany-protos.h (epiphany_mode_needed): Update
2226 * config/epiphany/epiphany.cc (epiphany_mode_needed): Likewise.
2227 * config/epiphany/mode-switch-use.cc (insert_uses): Likewise.
2228 * config/i386/i386.cc (ix86_mode_needed): Likewise.
2229 * config/riscv/riscv.cc (riscv_mode_needed): Likewise.
2230 * config/sh/sh.cc (sh_mode_needed): Likewise.
2231 * mode-switching.cc (optimize_mode_switching): Likewise.
2232 (create_pre_exit): Likewise, using the DF simulate functions
2233 to calculate the required information.
2235 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2237 * target.def (mode_switching.eh_handler): New hook.
2238 * doc/tm.texi.in (TARGET_MODE_EH_HANDLER): New @hook.
2239 * doc/tm.texi: Regenerate.
2240 * mode-switching.cc (optimize_mode_switching): Use eh_handler
2241 to get the mode on entry to an exception handler.
2243 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2245 * mode-switching.cc (optimize_mode_switching): Mark the exit
2246 block as nontransparent if it requires a specific mode.
2247 Handle the entry and exit mode as sibling rather than nested
2248 concepts. Remove outdated comment.
2250 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2252 * mode-switching.cc (optimize_mode_switching): Initially
2253 compute transparency in a bit-per-block bitmap.
2255 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2257 * mode-switching.cc (seginfo): Add a prev_mode field.
2258 (new_seginfo): Take and initialize the prev_mode.
2259 (optimize_mode_switching): Update calls accordingly.
2260 Use the recorded modes during the emit phase, rather than
2261 computing one on the fly.
2263 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2265 * mode-switching.cc (add_seginfo): Replace head pointer with
2266 a pointer to the tail pointer.
2267 (optimize_mode_switching): Update calls accordingly.
2269 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2271 * mode-switching.cc (optimize_mode_switching): Call
2272 df_note_add_problem.
2274 2023-11-11 Richard Sandiford <richard.sandiford@arm.com>
2276 * target.def: Tweak documentation of mode-switching hooks.
2277 * doc/tm.texi.in (OPTIMIZE_MODE_SWITCHING): Tweak documentation.
2278 (NUM_MODES_FOR_MODE_SWITCHING): Likewise.
2279 * doc/tm.texi: Regenerate.
2281 2023-11-11 Martin Uecker <uecker@tugraz.at>
2285 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
2286 remove warning for parameters declared with `static`.
2288 2023-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
2290 * doc/sourcebuild.texi (Scan the assembly output): Document change.
2292 2023-11-10 Mao <sray@live.com>
2294 PR middle-end/110983
2295 * doc/invoke.texi (Option Summary): Add -fpatchable-function-entry.
2297 2023-11-10 Maciej W. Rozycki <macro@embecosm.com>
2299 * config/riscv/riscv.md (length): Fix indentation for branch and
2300 jump length calculation expressions.
2302 2023-11-10 Eric Botcazou <ebotcazou@adacore.com>
2304 * fold-const.cc (operand_compare::operand_equal_p) <CONSTRUCTOR>:
2305 Deal with nonempty constant CONSTRUCTORs.
2306 (operand_compare::hash_operand) <CONSTRUCTOR>: Hash DECL_FIELD_OFFSET
2307 and DECL_FIELD_BIT_OFFSET for FIELD_DECLs.
2309 2023-11-10 Vladimir N. Makarov <vmakarov@redhat.com>
2312 * ira-costs.cc: (validate_autoinc_and_mem_addr_p): New function.
2313 (equiv_can_be_consumed_p): Use it.
2315 2023-11-10 Richard Sandiford <richard.sandiford@arm.com>
2317 * read-rtl.cc (md_reader::read_mapping): Allow iterators to
2318 include other iterators.
2319 * doc/md.texi: Document the change.
2320 * config/aarch64/iterators.md (DREG2, VQ2, TX2, DX2, SX2): Include
2321 the iterator that is being duplicated, rather than reproducing it.
2322 (VSTRUCT_D): Redefine using VSTRUCT_[234]D.
2323 (VSTRUCT_Q): Likewise VSTRUCT_[234]Q.
2324 (VSTRUCT_2QD, VSTRUCT_3QD, VSTRUCT_4QD, VSTRUCT_QD): Redefine using
2325 the individual D and Q iterators.
2327 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
2329 * config/i386/i386.md (stack_protect_set_1 peephole2):
2330 Explicitly check operand 2 for word_mode.
2331 (stack_protect_set_1 peephole2 #2): Ditto.
2332 (stack_protect_set_2 peephole2): Ditto.
2333 (stack_protect_set_3 peephole2): Ditto.
2334 (*stack_protect_set_4z_<mode>_di): New insn patter.
2335 (*stack_protect_set_4s_<mode>_di): Ditto.
2336 (stack_protect_set_4 peephole2): New peephole2 pattern to
2337 substitute stack protector scratch register clear with unrelated
2338 register initialization involving zero/sign-extend instruction.
2340 2023-11-10 Uros Bizjak <ubizjak@gmail.com>
2342 * config/i386/i386.md (shift): Use SAL insted of SLL
2343 for ashift insn mnemonic.
2345 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2347 PR tree-optimization/112438
2348 * tree-vect-loop.cc (vectorizable_induction): Bugfix when
2349 LOOP_VINFO_USING_SELECT_VL_P.
2351 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2353 * config/riscv/riscv-protos.h (enum insn_type): New enum.
2354 * config/riscv/riscv-v.cc
2355 (rvv_builder::combine_sequence_use_slideup_profitable_p): New function.
2356 (expand_vector_init_slideup_combine_sequence): Ditto.
2357 (expand_vec_init): Add slideup combine optimization.
2359 2023-11-10 Robin Dapp <rdapp@ventanamicro.com>
2361 PR tree-optimization/112464
2362 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
2363 vect_orig_stmt on scalar_dest_def_info.
2365 2023-11-10 Jin Ma <jinma@linux.alibaba.com>
2367 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Place the interrupt
2368 operation before the XTheadMemPair.
2370 2023-11-10 Richard Biener <rguenther@suse.de>
2372 PR tree-optimization/110221
2373 * tree-vect-slp.cc (vect_schedule_slp_node): When loop
2374 masking / len is applied make sure to not schedule
2375 intenal defs outside of the loop.
2377 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
2379 * expr.cc (store_constructor): Add "and" operation to uniform mask
2382 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
2385 * config/gcn/gcn-valu.md (add<mode>3<exec_clobber>): Fix B constraint
2386 and switch to the new format.
2387 (add<mode>3_dup<exec_clobber>): Likewise.
2388 (add<mode>3_vcc<exec_vcc>): Likewise.
2389 (add<mode>3_vcc_dup<exec_vcc>): Likewise.
2390 (add<mode>3_vcc_zext_dup): Likewise.
2391 (add<mode>3_vcc_zext_dup_exec): Likewise.
2392 (add<mode>3_vcc_zext_dup2): Likewise.
2393 (add<mode>3_vcc_zext_dup2_exec): Likewise.
2395 2023-11-10 Richard Biener <rguenther@suse.de>
2397 PR middle-end/112469
2398 * match.pd (cond ? op a : b -> .COND_op (cond, a, b)): Add
2399 missing view_converts.
2401 2023-11-10 Andrew Stubbs <ams@codesourcery.com>
2403 * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode
2404 min/max instructions.
2406 2023-11-10 Chenghui Pan <panchenghui@loongson.cn>
2408 * config/loongarch/lsx.md: Fix instruction name typo in
2409 lsx_vreplgr2vr_<lsxfmt_f> template.
2411 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2413 * config/riscv/autovec.md (vec_init<mode><vel>): Split patterns.
2415 2023-11-10 Pan Li <pan2.li@intel.com>
2418 2023-11-10 Pan Li <pan2.li@intel.com>
2419 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
2420 New fun impl to expand the insn when trailing same elements.
2421 (expand_vec_init): Try trailing same elements when vec_init.
2423 2023-11-10 Pan Li <pan2.li@intel.com>
2425 * config/riscv/riscv-v.cc (expand_vector_init_trailing_same_elem):
2426 New fun impl to expand the insn when trailing same elements.
2427 (expand_vec_init): Try trailing same elements when vec_init.
2429 2023-11-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2431 * config/riscv/autovec-opt.md (*cond_copysign<mode>): Remove.
2432 * config/riscv/autovec.md (cond_copysign<mode>): New pattern.
2434 2023-11-10 Pan Li <pan2.li@intel.com>
2437 * internal-fn.def (LRINT): Add FLOATN support.
2442 2023-11-10 Jeff Law <jlaw@ventanamicro.com>
2444 * config/h8300/combiner.md (single bit sign_extract): Avoid recently
2445 added patterns for H8/SX.
2446 (single bit zero_extract): New patterns.
2448 2023-11-10 liuhongt <hongtao.liu@intel.com>
2451 * config/i386/sse.md (*avx2_pcmp<mode>3_4): Fix swap condition
2452 from LT to GT since there's not in the pattern.
2453 (*avx2_pcmp<mode>3_5): Ditto.
2455 2023-11-10 Jose E. Marchesi <jose.marchesi@oracle.com>
2457 * config/bpf/bpf.cc (bpf_print_register): Accept modifier code 'W'
2458 to force emitting register names using the wN form.
2459 * config/bpf/bpf.md (*mulsidi3_zeroextend): Force operands to
2460 always use wN written form in pseudo-C assembly syntax.
2462 2023-11-09 David Malcolm <dmalcolm@redhat.com>
2464 * diagnostic-show-locus.cc (layout::m_line_table): New field.
2465 (compatible_locations_p): Convert to...
2466 (layout::compatible_locations_p): ...this, replacing uses of
2467 line_table global with m_line_table.
2468 (layout::layout): Convert "richloc" param from a pointer to a
2469 const reference. Initialize m_line_table member.
2470 (layout::maybe_add_location_range): Replace uses of line_table
2471 global with m_line_table. Pass the latter to
2472 linemap_client_expand_location_to_spelling_point.
2473 (layout::print_leading_fixits): Pass m_line_table to
2475 (layout::print_trailing_fixits): Likewise.
2476 (gcc_rich_location::add_location_if_nearby): Update for change
2477 to layout ctor params.
2478 (diagnostic_show_locus): Convert to...
2479 (diagnostic_context::maybe_show_locus): ...this, converting
2480 richloc param from a pointer to a const reference. Make "loc"
2481 const. Split out printing part of function to...
2482 (diagnostic_context::show_locus): ...this.
2483 (selftest::test_offset_impl): Update for change to layout ctor
2485 (selftest::test_layout_x_offset_display_utf8): Likewise.
2486 (selftest::test_layout_x_offset_display_tab): Likewise.
2487 (selftest::test_tab_expansion): Likewise.
2488 * diagnostic.h (diagnostic_context::maybe_show_locus): New decl.
2489 (diagnostic_context::show_locus): New decl.
2490 (diagnostic_show_locus): Convert from a decl to an inline function.
2491 * gdbinit.in (break-on-diagnostic): Update from a breakpoint
2492 on diagnostic_show_locus to one on
2493 diagnostic_context::maybe_show_locus.
2494 * genmatch.cc (linemap_client_expand_location_to_spelling_point):
2495 Add "set" param and use it in place of line_table global.
2496 * input.cc (expand_location_1): Likewise.
2497 (expand_location): Update for new param of expand_location_1.
2498 (expand_location_to_spelling_point): Likewise.
2499 (linemap_client_expand_location_to_spelling_point): Add "set"
2500 param and use it in place of line_table global.
2501 * tree-diagnostic-path.cc (event_range::print): Pass line_table
2502 for new param of linemap_client_expand_location_to_spelling_point.
2504 2023-11-09 Uros Bizjak <ubizjak@gmail.com>
2506 * config/i386/i386.md (@stack_protect_set_1_<PTR:mode>_<W:mode>):
2507 Use W mode iterator instead of SWI48. Output MOV instead of XOR
2508 for TARGET_USE_MOV0.
2509 (stack_protect_set_1 peephole2): Use integer modes with
2510 mode size <= word mode size for operand 3.
2511 (stack_protect_set_1 peephole2 #2): New peephole2 pattern to
2512 substitute stack protector scratch register clear with unrelated
2513 register initialization, originally in front of stack
2515 (*stack_protect_set_3_<PTR:mode>_<SWI48:mode>): New insn pattern.
2516 (stack_protect_set_1 peephole2): New peephole2 pattern to
2517 substitute stack protector scratch register clear with unrelated
2518 register initialization involving LEA instruction.
2520 2023-11-09 Vladimir N. Makarov <vmakarov@redhat.com>
2522 PR rtl-optimization/110215
2523 * ira-lives.cc: (add_conflict_from_region_landing_pads): New
2525 (process_bb_node_lives): Use it.
2527 2023-11-09 Alexandre Oliva <oliva@adacore.com>
2529 * config/i386/i386.cc (symbolic_base_address_p,
2530 base_address_p): New, factored out from...
2531 (extract_base_offset_in_addr): ... here and extended to
2532 recognize REG+GOTOFF, as in gcc.target/i386/sse2-load-multi.c
2533 and sse2-store-multi.c with PIE enabled by default.
2535 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2537 PR tree-optimization/109154
2538 * config/aarch64/aarch64-sve.md (cond_copysign<mode>): New.
2540 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2542 PR tree-optimization/109154
2543 * config/aarch64/aarch64.md (copysign<GPF:mode>3): Handle
2545 * config/aarch64/aarch64-simd.md (copysign<mode>3): Likewise.
2546 * config/aarch64/aarch64-sve.md (copysign<mode>3): Likewise.
2548 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2550 PR tree-optimization/109154
2551 * config/aarch64/aarch64.md (<optab><mode>3): Add SVE split case.
2552 * config/aarch64/aarch64-simd.md (ior<mode>3<vczle><vczbe>): Likewise.
2553 * config/aarch64/predicates.md(aarch64_orr_imm_sve_advsimd): New.
2555 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2557 PR tree-optimization/109154
2558 * config/aarch64/aarch64.md (*mov<mode>_aarch64, *movsi_aarch64,
2559 *movdi_aarch64): Add new w -> Z case.
2560 * config/aarch64/iterators.md (Vbtype): Add QI and HI.
2562 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2564 PR tree-optimization/109154
2565 * config/aarch64/aarch64-protos.h (aarch64_simd_special_constant_p,
2566 aarch64_maybe_generate_simd_constant): New.
2567 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VQMOV:mode>,
2568 *aarch64_simd_mov<VDMOV:mode>): Add new coden for special constants.
2569 * config/aarch64/aarch64.cc (aarch64_extract_vec_duplicate_wide_int):
2571 (aarch64_simd_special_constant_p,
2572 aarch64_maybe_generate_simd_constant): New.
2573 * config/aarch64/aarch64.md (*movdi_aarch64): Add new codegen for
2575 * config/aarch64/constraints.md (Dx): new.
2577 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2579 PR tree-optimization/109154
2580 * internal-fn.def (COPYSIGN): New.
2581 * match.pd (UNCOND_BINARY, COND_BINARY): Map IFN_COPYSIGN to
2583 * optabs.def (cond_copysign_optab, cond_len_copysign_optab): New.
2585 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2587 PR tree-optimization/109154
2588 * match.pd: Add new neg+abs rule, remove inverse copysign rule.
2590 2023-11-09 Tamar Christina <tamar.christina@arm.com>
2592 PR tree-optimization/109154
2593 * match.pd: expand existing copysign optimizations.
2595 2023-11-09 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
2598 * collect2.cc (main): Do not prepend target triple to
2601 2023-11-09 Richard Biener <rguenther@suse.de>
2603 PR tree-optimization/111133
2604 * tree-vect-stmts.cc (vect_build_scatter_store_calls):
2605 Remove and refactor to ...
2606 (vect_build_one_scatter_store_call): ... this new function.
2607 (vectorizable_store): Use vect_check_scalar_mask to record
2608 the SLP node for the mask operand. Code generate scatters
2609 with builtin decls from the main scatter vectorization
2610 path and prepare that for SLP.
2611 * tree-vect-slp.cc (vect_get_operand_map): Do not look
2612 at the VDEF to decide between scatter or gather since that
2613 doesn't work for patterns. Use the LHS being an SSA_NAME
2616 2023-11-09 Pan Li <pan2.li@intel.com>
2618 * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Only
2619 perform once emit when at least one succ edge is abnormal.
2621 2023-11-09 Richard Biener <rguenther@suse.de>
2623 * tree-vect-loop.cc (vect_verify_full_masking_avx512):
2624 Check we have integer mode masks as required by
2627 2023-11-09 Richard Biener <rguenther@suse.de>
2629 PR tree-optimization/112444
2630 * tree-ssa-sccvn.cc (visit_phi): Avoid using not visited
2631 defs as undefined vals.
2633 2023-11-09 YunQiang Su <yunqiang.su@cipunited.com>
2635 * config/mips/mips.cc(mips_option_override): Set mips_abs to
2636 2008, if mips_abs is default and mips_nan is 2008.
2638 2023-11-09 Florian Weimer <fweimer@redhat.com>
2640 * doc/invoke.texi (Warning Options): Document
2641 -Wreturn-mismatch. Update -Wreturn-type documentation.
2643 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2645 * config/s390/s390.md: Remove UNSPEC_VEC_ELTSWAP.
2646 * config/s390/vector.md (eltswapv16qi): New expander.
2647 (*eltswapv16qi): New insn and splitter.
2648 (eltswapv8hi): New insn and splitter.
2649 (eltswap<mode>): New insn and splitter for modes V_HW_4 as well
2651 * config/s390/vx-builtins.md (eltswap<mode>): Remove.
2652 (*eltswapv16qi): Remove.
2653 (*eltswap<mode>): Remove.
2654 (*eltswap<mode>_emu): Remove.
2656 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2658 * config/s390/s390.cc (expand_perm_with_rot): Remove.
2659 (expand_perm_reverse_elements): New.
2660 (expand_perm_with_vster): Remove.
2661 (expand_perm_with_vstbrq): Remove.
2662 (vectorize_vec_perm_const_1): Replace removed functions with new
2665 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2667 * config/s390/s390.cc (expand_perm_with_merge): Deal with cases
2668 where vmr{l,h} are still applicable if the operands are swapped.
2669 (expand_perm_with_vpdi): Likewise for vpdi.
2671 2023-11-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2673 * config/s390/s390.md (VX_CONV_INT): Remove iterator.
2674 (gf): Add float mappings.
2675 (TOINT, toint): New attribute.
2676 (*fixuns_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_z13):
2678 (*fixuns_trunc<mode><toint>2_z13): Add.
2679 (*fix_trunc<VX_CONV_BFP:mode><VX_CONV_INT:mode>2_bfp_z13):
2681 (*fix_trunc<mode><toint>2_bfp_z13): Add.
2682 (*floatuns<VX_CONV_INT:mode><VX_CONV_BFP:mode>2_z13): Remove.
2683 (*floatuns<toint><mode>2_z13): Add.
2684 * config/s390/vector.md (VX_VEC_CONV_INT): Remove iterator.
2685 (float<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
2686 (float<tointvec><mode>2): Add.
2687 (floatuns<VX_VEC_CONV_INT:mode><VX_VEC_CONV_BFP:mode>2): Remove.
2688 (floatuns<tointvec><mode>2): Add.
2689 (fix_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
2691 (fix_trunc<mode><tointvec>2): Add.
2692 (fixuns_trunc<VX_VEC_CONV_BFP:mode><VX_VEC_CONV_INT:mode>2):
2694 (fixuns_trunc<VX_VEC_CONV_BFP:mode><tointvec>2): Add.
2696 2023-11-09 Jakub Jelinek <jakub@redhat.com>
2699 * attribs.cc (attribute_ignored_p): Only return true for
2700 attr_namespace_ignored_p if as is NULL.
2701 (decl_attributes): Never add ignored attributes.
2703 2023-11-09 Jin Ma <jinma@linux.alibaba.com>
2705 * config/riscv/bitmanip.md: Avoid the conflict between
2706 zbb and xtheadmemidx in patterns.
2708 2023-11-09 Richard Biener <rguenther@suse.de>
2710 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Record
2711 to the correct simd_clone_info.
2713 2023-11-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2715 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Fix ICE.
2717 2023-11-09 Alexandre Oliva <oliva@adacore.com>
2719 * tree-cfg.cc (assign_discriminators): Handle debug stmts.
2721 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
2724 * config/i386/i386.md (*add<mode>_1_slp):
2725 Split insn only for unmatched operand 0.
2726 (*sub<mode>_1_slp): Ditto.
2727 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
2728 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
2729 Split insn only for unmatched operand 0.
2730 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
2731 (*one_cmpl<mode>_1_slp): Ditto.
2732 (*ashl<mode>3_1_slp): Ditto.
2733 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
2734 (*<any_rotate:insn><mode>_1_slp): Ditto.
2735 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
2736 alternative 1 and split insn after reload for unmatched operand 0.
2737 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
2738 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
2739 iterator. Redefine as define_insn_and_split. Add alternative 1
2740 and split insn after reload for unmatched operand 0.
2741 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
2742 alternative 1 and split insn after reload for unmatched operand 0.
2743 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
2744 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
2745 any_logic code iterator.
2746 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
2747 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
2748 any_logic code iterator. Redefine as define_insn_and_split. Add
2749 alternative 1 and split insn after reload for unmatched operand 0.
2750 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
2751 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
2752 code iterator. Redefine as define_insn_and_split. Add alternative 1
2753 and split insn after reload for unmatched operand 0.
2754 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
2755 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
2756 any_logic code iterator. Redefine as define_insn_and_split. Add
2757 alternative 1 and split insn after reload for unmatched operand 0.
2758 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
2759 Add alternative 1 and split insn after reload for unmatched operand 0.
2760 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
2761 alternative 1 and split insn after reload for unmatched operand 0.
2762 (*one_cmplqi_ext<mode>_1): Ditto.
2763 (*ashlqi_ext<mode>_1): Ditto.
2764 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
2766 2023-11-08 Richard Biener <rguenther@suse.de>
2768 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
2769 vector gathering for SLP of emulated gathers.
2771 2023-11-08 Richard Biener <rguenther@suse.de>
2773 * tree-vectorizer.h (vect_slp_child_index_for_operand):
2774 Add gatherscatter_p argument.
2775 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
2777 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
2778 argument into an output, also output the SLP node associated
2780 (vectorizable_simd_clone_call): Adjust.
2781 (vectorizable_store): Likewise.
2782 (vectorizable_load): Likewise.
2784 2023-11-08 Richard Biener <rguenther@suse.de>
2786 * tree-vect-stmts.cc (vectorizable_load): Use the correct
2787 vectorized mask operand.
2789 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
2791 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
2792 New combine pattern.
2794 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2796 * config/riscv/riscv-vsetvl.cc: Fix ICE.
2798 2023-11-08 xuli <xuli1@eswincomputing.com>
2800 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
2802 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
2805 * config/i386/constraints.md (jc): New constraint that prohibits
2807 * config/i386/i386.md (*movdi_internal): Change r constraint
2809 (*movti_internal): Likewise.
2811 2023-11-08 Florian Weimer <fweimer@redhat.com>
2813 * doc/invoke.texi (Warning Options): Mention C diagnostics
2816 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2819 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
2821 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
2824 * config/i386/i386.md (avx_noavx512vl): New definition for isa
2826 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
2827 avx_noavx512f to avx_noavx512vl.
2829 2023-11-07 Pan Li <pan2.li@intel.com>
2831 * config/riscv/autovec.md: Remove the size check of lfloor.
2832 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
2833 emit_vec_rounding_to_integer for floor.
2835 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
2837 PR tree-optimization/112361
2839 PR middle-end/112406
2840 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
2841 loop was versioned and only then create COND_OPs.
2842 (predicate_scalar_phi): Do not create COND_OP when not
2844 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
2846 (vectorize_fold_left_reduction): Pass mask to
2847 vect_expand_fold_left.
2849 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
2851 * config/i386/predicates.md ("flags_reg_operand"):
2852 Make predicate special to avoid automatic mode checks.
2854 2023-11-07 Martin Jambor <mjambor@suse.cz>
2856 * configure: Regenerate.
2858 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
2860 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
2862 (output_offload_tables): Write indirect functions.
2863 (input_offload_tables): read indirect functions.
2864 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
2865 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
2866 * omp-offload.cc (offload_ind_funcs): New.
2867 (omp_discover_implicit_declare_target): Add functions marked with
2868 'omp declare target indirect' to indirect functions list.
2869 (omp_finish_file): Add indirect functions to section for offload
2871 (execute_omp_device_lower): Redirect indirect calls on target by
2872 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
2873 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
2874 indirect functions are present on an accelerator device.
2875 * omp-offload.h (offload_ind_funcs): New.
2876 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
2877 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
2878 (omp_clause_code_name): Likewise.
2879 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
2880 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
2881 section. Count number of indirect functions.
2882 (process_obj): Emit number of indirect functions.
2883 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
2884 (process): Emit offload_ind_func_table in PTX code. Emit indirect
2885 function names and count in image.
2886 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
2887 indirect functions in PTX code with IND_FUNC_MAP.
2889 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
2891 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
2892 attribute syntax supported also in C.
2894 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
2896 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
2897 modifier for SVE registers.
2899 2023-11-07 Joseph Myers <joseph@codesourcery.com>
2901 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
2902 use flag_isoc23 and function_c23_misc.
2903 * config/rl78/rl78.cc (rl78_option_override): Compare
2904 lang_hooks.name with "GNU C23" not "GNU C2X".
2905 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
2906 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
2908 * doc/extend.texi: Likewise.
2909 * doc/invoke.texi: Likewise.
2910 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
2911 against and return "GNU C23" language string instead of "GNU C2X".
2912 * ginclude/float.h: Refer to C23 instead of C2X in comments.
2913 * ginclude/stdint-gcc.h: Likewise.
2914 * glimits.h: Likewise.
2917 2023-11-07 Alexandre Oliva <oliva@adacore.com>
2919 * doc/sourcebuild.texi (opt_mstrict_align): New target.
2921 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
2923 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
2924 New combine pattern.
2925 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
2926 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
2927 (*cond_len_extend<v_double_trunc><mode>): Ditto.
2928 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
2930 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2933 * config/riscv/riscv-avlprop.cc
2934 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
2935 * config/riscv/t-riscv: Add new include.
2937 2023-11-07 Pan Li <pan2.li@intel.com>
2939 * config/riscv/autovec.md: Remove the size check of lceil.l
2940 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
2941 emit_vec_rounding_to_integer for ceil.
2943 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
2945 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
2947 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
2949 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
2951 2023-11-06 David Malcolm <dmalcolm@redhat.com>
2953 * diagnostic-show-locus.cc (class colorizer): Take just a
2954 pretty_printer rather than a diagnostic_context.
2955 (layout::layout): Make context param a const reference,
2956 and pretty_printer param non-optional.
2957 (layout::m_context): Drop field.
2958 (layout::m_options): New field.
2959 (layout::m_colorize_source_p): Drop field.
2960 (layout::m_show_labels_p): Drop field.
2961 (layout::m_show_line_numbers_p): Drop field.
2962 (layout::print_gap_in_line_numbering): Use m_options.
2963 (layout::calculate_line_spans): Likewise.
2964 (layout::calculate_linenum_width): Likewise.
2965 (layout::calculate_x_offset_display): Likewise.
2966 (layout::print_source_line): Likewise.
2967 (layout::start_annotation_line): Likewise.
2968 (layout::print_annotation_line): Likewise.
2969 (layout::print_line): Likewise.
2970 (gcc_rich_location::add_location_if_nearby): Update for changes to
2972 (diagnostic_show_locus): Likewise.
2973 (selftest::test_offset_impl): Likewise.
2974 (selftest::test_layout_x_offset_display_utf8): Likewise.
2975 (selftest::test_layout_x_offset_display_tab): Likewise.
2976 (selftest::test_tab_expansion): Likewise.
2977 * diagnostic.h (diagnostic_context::m_source_printing): Move
2978 declaration of struct outside diagnostic_context as...
2979 (struct diagnostic_source_printing_options)... this.
2981 2023-11-06 David Malcolm <dmalcolm@redhat.com>
2983 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
2985 (diagnostic_option_classifier::push): ...this.
2986 (diagnostic_context::pop_diagnostics): Convert to...
2987 (diagnostic_option_classifier::pop): ...this.
2988 (diagnostic_context::initialize): Move code to...
2989 (diagnostic_option_classifier::init): ...this new function.
2990 (diagnostic_context::finish): Move code to...
2991 (diagnostic_option_classifier::fini): ...this new function.
2992 (diagnostic_context::classify_diagnostic): Convert to...
2993 (diagnostic_option_classifier::classify_diagnostic): ...this.
2994 (diagnostic_context::update_effective_level_from_pragmas): Convert
2996 (diagnostic_option_classifier::update_effective_level_from_pragmas):
2998 (diagnostic_context::diagnostic_enabled): Update for refactoring.
2999 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
3000 (class diagnostic_option_classifier): ...this new class.
3001 (diagnostic_context::option_unspecified_p): Update for move of
3002 fields into m_option_classifier.
3003 (diagnostic_context::classify_diagnostic): Likewise.
3004 (diagnostic_context::push_diagnostics): Likewise.
3005 (diagnostic_context::pop_diagnostics): Likewise.
3006 (diagnostic_context::update_effective_level_from_pragmas): Delete.
3007 (diagnostic_context::m_classify_diagnostic): Move into class
3008 diagnostic_option_classifier.
3009 (diagnostic_context::m_option_classifier): Likewise.
3010 (diagnostic_context::m_classification_history): Likewise.
3011 (diagnostic_context::m_n_classification_history): Likewise.
3012 (diagnostic_context::m_push_list): Likewise.
3013 (diagnostic_context::m_n_push): Likewise.
3014 (diagnostic_context::m_option_classifier): New.
3016 2023-11-06 David Malcolm <dmalcolm@redhat.com>
3018 * diagnostic.cc (diagnostic_context::set_urlifier): New.
3019 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
3020 (diagnostic_context::m_urlifier): Make private.
3021 * gcc.cc (driver::global_initializations): Use set_urlifier rather
3022 than directly setting field.
3023 * toplev.cc (general_init): Likewise.
3025 2023-11-06 David Malcolm <dmalcolm@redhat.com>
3027 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
3028 uses of diagnostic_kind_count with simple field acesss.
3029 (diagnostic_context::report_diagnostic): Likewise.
3030 (diagnostic_text_output_format::~diagnostic_text_output_format):
3031 Replace use of diagnostic_kind_count with
3032 diagnostic_context::diagnostic_count.
3033 * diagnostic.h (diagnostic_kind_count): Delete.
3034 (errorcount): Replace use of diagnostic_kind_count with
3035 diagnostic_context::diagnostic_count.
3036 (warningcount): Likewise.
3037 (werrorcount): Likewise.
3038 (sorrycount): Likewise.
3040 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
3042 * doc/sourcebuild.texi (Other attributes): Document thread_fence
3045 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
3047 * config/i386/constraints.md (Bc): Remove constraint.
3048 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
3049 * config/i386/i386.cc (ix86_memory_address_reg_class):
3050 Do not limit processing to TARGET_APX_EGPR. Exit early for
3051 NULL insn. Do not check recog_data.insn before calling
3052 extract_insn_cached.
3053 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
3054 (ix86_regno_ok_for_insn_base_p): Ditto.
3055 (ix86_insn_index_reg_class): Ditto.
3056 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
3057 Remove insn pattern and corresponding peephole2 pattern.
3058 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
3059 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
3060 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
3061 and corresponding peephole2 pattern.
3062 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
3063 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
3064 (*extzvqi_mem_rex64): Remove insn pattern and
3065 corresponding peephole2 pattern.
3066 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
3067 alternative to (Q,QnBn). Add "addr" attribute.
3068 (*insvqi_1_mem_rex64): Remove insn pattern and
3069 corresponding peephole2 pattern.
3070 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
3071 alternative to (Q,QnBn). Add "addr" attribute.
3072 (@insv<mode>_1): Ditto.
3073 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
3074 alternative to (QBn,0,Q). Add "addr" attribute.
3075 (*subqi_ext<mode>_0): Ditto.
3076 (*andqi_ext<mode>_0): Ditto.
3077 (*<any_or:code>qi_ext<mode>_0): Ditto.
3078 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
3079 alternative to (Q,0,QnBn). Add "addr" attribute.
3080 (*andqi_ext<mode>_1): Ditto.
3081 (*andqi_ext<mode>_1_cc): Ditto.
3082 (*<any_or:code>qi_ext<mode>_1): Ditto.
3083 (*xorqi_ext<mode>_1_cc): Ditto.
3084 * config/i386/predicates.md (nonimm_x64constmem_operand):
3086 (general_x64constmem_operand): Ditto.
3087 (norex_memory_operand): Ditto.
3089 2023-11-06 Joseph Myers <joseph@codesourcery.com>
3092 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
3093 -std=gnu23 instead of -std=c2x and -std=gnu2x.
3094 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
3095 instead of C2x and -std=c2x.
3096 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
3097 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
3098 -std=gnu2x as deprecated aliases. Update descriptions of C23.
3099 * doc/standards.texi (Standards): Describe C23 with C2X as an old
3102 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
3104 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
3106 2023-11-06 Richard Biener <rguenther@suse.de>
3108 PR tree-optimization/112405
3109 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
3110 Properly handle invariant and/or loop mask passing.
3112 2023-11-06 Pan Li <pan2.li@intel.com>
3114 * config/riscv/autovec.md: Remove the size check of lround.
3115 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
3116 emit_vec_rounding_to_integer for round.
3118 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3120 * config/riscv/predicates.md: Adapt predicate.
3121 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
3122 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
3123 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
3124 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
3126 2023-11-06 Richard Biener <rguenther@suse.de>
3128 PR tree-optimization/111950
3129 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
3131 (find_guard_arg): Likewise.
3132 (slpeel_update_phi_nodes_for_guard2): Likewise.
3133 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
3134 slpeel_duplicate_current_defs_from_edges, do not elide
3135 LC-PHIs for invariant values.
3136 (vect_do_peeling): Materialize PHI arguments for the edge
3137 around the epilog from the PHI defs of the main loop exit.
3139 2023-11-06 Richard Biener <rguenther@suse.de>
3141 PR tree-optimization/112404
3142 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
3143 overload with SLP node argument.
3144 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
3145 (vect_check_scalar_mask): Use it.
3146 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
3147 loads also for nodes with children, like .MASK_LOAD.
3148 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
3149 representative for load nodes and check whether it is a grouped
3150 access before looking for load-lanes support.
3152 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
3154 PR tree-optimization/111760
3155 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
3157 * config/riscv/riscv-protos.h (enum insn_type): Add.
3158 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
3159 * doc/md.texi: Add vcond_mask_len.
3160 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
3161 Create VCOND_MASK_LEN when length masking.
3162 * gimple-match.h (gimple_match_op::gimple_match_op): Always
3163 initialize len and bias.
3164 * internal-fn.cc (vec_cond_mask_len_direct): Add.
3165 (direct_vec_cond_mask_len_optab_supported_p): Add.
3166 (internal_fn_len_index): Add VCOND_MASK_LEN.
3167 (internal_fn_mask_index): Ditto.
3168 * internal-fn.def (VCOND_MASK_LEN): New internal function.
3169 * match.pd: Combine unconditional unary, binary and ternary
3170 operations into the respective COND_LEN operations.
3171 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
3173 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
3175 * explow.cc (align_dynamic_address): Do nothing if the required
3176 alignment is a byte.
3178 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
3180 * function.h (get_stack_dynamic_offset): Declare.
3181 * function.cc (get_stack_dynamic_offset): New function,
3183 (get_stack_dynamic_offset): ...here.
3184 * explow.cc (allocate_dynamic_stack_space): Handle calls made
3185 after virtual registers have been instantiated.
3187 2023-11-06 liuhongt <hongtao.liu@intel.com>
3190 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
3191 Avoid generating RTL code when d->testing_p.
3193 2023-11-06 Richard Biener <rguenther@suse.de>
3195 PR tree-optimization/112369
3196 * tree.cc (strip_float_extensions): Use element_precision.
3198 2023-11-06 Richard Biener <rguenther@suse.de>
3200 PR middle-end/112296
3201 * doc/extend.texi (__builtin_constant_p): Clarify that
3202 side-effects are discarded.
3204 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
3207 * config.in: Regenerate.
3208 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
3209 inline asm handling under !HAVE_AS_POWER10_HTM.
3210 * configure: Regenerate.
3211 * configure.ac: Detect assembler support for HTM insns at power10.
3213 2023-11-06 xuli <xuli1@eswincomputing.com>
3214 Pan Li <pan2.li@intel.com>
3216 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
3217 (riscv_register_pragmas): Register the hook.
3218 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
3219 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
3220 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
3221 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
3223 (function_builder::add_function): Add overloaded arg.
3224 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
3225 (function_builder::add_overloaded_function): New API impl.
3226 (registered_function::overloaded_hash): Calculate hash value.
3227 (has_vxrm_or_frm_p): New function impl.
3228 (non_overloaded_registered_function_hasher::hash): Ditto.
3229 (non_overloaded_registered_function_hasher::equal): Ditto.
3230 (handle_pragma_vector): Allocate space for hash table.
3231 (resolve_overloaded_builtin): New function impl.
3232 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
3233 (function_base::may_require_vxrm_p): Ditto.
3235 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3238 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
3239 * config/i386/avx512bf16vlintrin.h: Ditto.
3240 * config/i386/avx512bitalgvlintrin.h: Ditto.
3241 * config/i386/avx512bwintrin.h: Ditto.
3242 * config/i386/avx512dqintrin.h: Ditto.
3243 * config/i386/avx512fintrin.h: Ditto.
3244 * config/i386/avx512fp16intrin.h: Ditto.
3245 * config/i386/avx512fp16vlintrin.h: Ditto.
3246 * config/i386/avx512ifmavlintrin.h: Ditto.
3247 * config/i386/avx512vbmi2vlintrin.h: Ditto.
3248 * config/i386/avx512vbmivlintrin.h: Ditto.
3249 * config/i386/avx512vlbwintrin.h: Ditto.
3250 * config/i386/avx512vldqintrin.h: Ditto.
3251 * config/i386/avx512vlintrin.h: Ditto.
3252 * config/i386/avx512vnnivlintrin.h: Ditto.
3253 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
3254 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
3256 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3258 * config/i386/avx512bf16vlintrin.h
3259 (_mm_avx512_castsi128_ps): New.
3260 (_mm256_avx512_castsi256_ps): Ditto.
3261 (_mm_avx512_slli_epi32): Ditto.
3262 (_mm256_avx512_slli_epi32): Ditto.
3263 (_mm_avx512_cvtepi16_epi32): Ditto.
3264 (_mm256_avx512_cvtepi16_epi32): Ditto.
3265 (__attribute__): Change intrin call.
3266 * config/i386/avx512bwintrin.h
3267 (_mm_avx512_set_epi32): New.
3268 (_mm_avx512_set_epi16): Ditto.
3269 (_mm_avx512_set_epi8): Ditto.
3270 (__attribute__): Change intrin call.
3271 * config/i386/avx512fp16intrin.h: Ditto.
3272 * config/i386/avx512fp16vlintrin.h
3273 (_mm_avx512_set1_ps): New.
3274 (_mm256_avx512_set1_ps): Ditto.
3275 (_mm_avx512_and_si128): Ditto.
3276 (_mm256_avx512_and_si256): Ditto.
3277 (__attribute__): Change intrin call.
3278 * config/i386/avx512vlbwintrin.h
3279 (_mm_avx512_set1_epi32): New.
3280 (_mm_avx512_set1_epi16): Ditto.
3281 (_mm_avx512_set1_epi8): Ditto.
3282 (_mm256_avx512_set_epi16): Ditto.
3283 (_mm256_avx512_set_epi8): Ditto.
3284 (_mm256_avx512_set1_epi16): Ditto.
3285 (_mm256_avx512_set1_epi32): Ditto.
3286 (_mm256_avx512_set1_epi8): Ditto.
3287 (_mm_avx512_max_epi16): Ditto.
3288 (_mm_avx512_min_epi16): Ditto.
3289 (_mm_avx512_max_epu16): Ditto.
3290 (_mm_avx512_min_epu16): Ditto.
3291 (_mm_avx512_max_epi8): Ditto.
3292 (_mm_avx512_min_epi8): Ditto.
3293 (_mm_avx512_max_epu8): Ditto.
3294 (_mm_avx512_min_epu8): Ditto.
3295 (_mm256_avx512_max_epi16): Ditto.
3296 (_mm256_avx512_min_epi16): Ditto.
3297 (_mm256_avx512_max_epu16): Ditto.
3298 (_mm256_avx512_min_epu16): Ditto.
3299 (_mm256_avx512_insertf128_ps): Ditto.
3300 (_mm256_avx512_extractf128_pd): Ditto.
3301 (_mm256_avx512_extracti128_si256): Ditto.
3302 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
3303 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
3304 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
3305 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
3306 (__attribute__): Change intrin call.
3308 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3310 * config/i386/avx512bf16vlintrin.h: Change intrin call.
3311 * config/i386/avx512fintrin.h
3312 (_mm_avx512_undefined_ps): New.
3313 (_mm_avx512_undefined_pd): Ditto.
3314 (__attribute__): Change intrin call.
3315 * config/i386/avx512vbmivlintrin.h: Ditto.
3316 * config/i386/avx512vlbwintrin.h: Ditto.
3317 * config/i386/avx512vldqintrin.h: Ditto.
3318 * config/i386/avx512vlintrin.h
3319 (_mm_avx512_undefined_si128): New.
3320 (_mm256_avx512_undefined_ps): Ditto.
3321 (_mm256_avx512_undefined_pd): Ditto.
3322 (_mm256_avx512_undefined_si256): Ditto.
3323 (__attribute__): Change intrin call.
3325 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
3327 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
3328 * config/i386/avx512dqintrin.h: Ditto.
3329 * config/i386/avx512fintrin.h:
3330 (_mm_avx512_setzero_ps): New.
3331 (_mm_avx512_setzero_pd): Ditto.
3332 (__attribute__): Change intrin call.
3333 * config/i386/avx512fp16intrin.h: Ditto.
3334 * config/i386/avx512fp16vlintrin.h: Ditto.
3335 * config/i386/avx512vbmi2vlintrin.h: Ditto.
3336 * config/i386/avx512vbmivlintrin.h: Ditto.
3337 * config/i386/avx512vlbwintrin.h: Ditto.
3338 * config/i386/avx512vldqintrin.h: Ditto.
3339 * config/i386/avx512vlintrin.h
3340 (_mm_avx512_setzero_si128): New.
3341 (_mm256_avx512_setzero_pd): Ditto.
3342 (_mm256_avx512_setzero_ps): Ditto.
3343 (_mm256_avx512_setzero_si256): Ditto.
3344 (__attribute__): Change intrin call.
3345 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
3346 * config/i386/gfniintrin.h: Ditto.
3348 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
3350 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
3351 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
3352 (REG_CLASS_NAMES): Ditto.
3353 (REG_CLASS_CONTENTS): Ditto.
3354 * config/i386/constraints.md ("R"): Update for rename.
3356 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
3358 * mode-switching.cc: Remove unused forward references.
3359 (seginfo): Remove bbnum.
3360 (new_seginfo): Remove associated argument.
3361 (optimize_mode_switching): Update calls accordingly.
3363 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
3365 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
3366 invalid [...] operands.
3368 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
3371 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
3372 function, with the core logic extracted from...
3373 (aarch64_can_change_mode_class): ...here. Extend the previous rules
3374 to allow changes between partial SVE modes and other modes if
3375 the other mode is no bigger than an element, and if no other rule
3376 prevents it. Use the aarch64_modes_tieable_p handling of
3377 partial Advanced SIMD structure modes.
3378 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
3379 Allow all vector mode ties that it allows.
3381 2023-11-05 Pan Li <pan2.li@intel.com>
3383 * config/riscv/autovec.md: Remove the size check of lrint.
3384 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
3386 (emit_vec_widden_cvt_x_f): New help emit func impl.
3387 (emit_vec_rounding_to_integer): New func impl to emit the
3388 rounding from FP to integer.
3389 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
3390 * config/riscv/vector.md: Take V_VLSF for vfncvt.
3392 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3394 * config/riscv/vector.md: Fix bug.
3396 2023-11-04 Sergei Trofimovich <siarheit@google.com>
3399 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
3402 2023-11-04 Pan Li <pan2.li@intel.com>
3404 * config/riscv/vector-iterators.md: Remove HF modes.
3406 2023-11-04 David Malcolm <dmalcolm@redhat.com>
3408 * diagnostic.cc: Include "pretty-print-urlifier.h".
3409 (diagnostic_context::initialize): Initialize m_urlifier.
3410 (diagnostic_context::finish): Clean up m_urlifier
3411 (diagnostic_report::diagnostic): m_urlifier to pp_format.
3412 * diagnostic.h (diagnostic_context::m_urlifier): New field.
3413 * gcc-urlifier.cc: New file.
3414 * gcc-urlifier.def: New file.
3415 * gcc-urlifier.h: New file.
3416 * gcc.cc: Include "gcc-urlifier.h".
3417 (driver::global_initializations): Initialize global_dc->m_urlifier.
3418 * pretty-print-urlifier.h: New file.
3419 * pretty-print.cc: Include "pretty-print-urlifier.h".
3420 (obstack_append_string): New.
3421 (urlify_quoted_string): New.
3422 (pp_format): Add "urlifier" param and use it to implement optional
3423 urlification of quoted text strings.
3424 (pp_output_formatted_text): Make buffer a const pointer.
3425 (selftest::pp_printf_with_urlifier): New.
3426 (selftest::test_urlification): New.
3427 (selftest::pretty_print_cc_tests): Call it.
3428 * pretty-print.h (class urlifier): New forward declaration.
3429 (pp_format): Add optional urlifier param.
3430 * selftest-run-tests.cc (selftest::run_tests): Call
3431 selftest::gcc_urlifier_cc_tests .
3432 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
3433 * toplev.cc: Include "gcc-urlifier.h".
3434 (general_init): Initialize global_dc->m_urlifier.
3436 2023-11-04 David Malcolm <dmalcolm@redhat.com>
3438 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
3441 2023-11-04 David Malcolm <dmalcolm@redhat.com>
3443 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
3444 to diagnostic-text-art.h.
3445 * coretypes.h (struct diagnostic_context): Replace forward decl
3447 (class diagnostic_context): ...this.
3448 * diagnostic-format-json.cc: Update for changes to
3450 * diagnostic-format-sarif.cc: Likewise.
3451 * diagnostic-show-locus.cc: Likewise.
3452 * diagnostic-text-art.h: Deleted file, moving content...
3453 (enum diagnostic_text_art_charset): ...to diagnostic.h,
3454 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
3455 (diagnostics_text_art_charset_init): ...deleting in favor of
3456 diagnostic_context::set_text_art_charset.
3457 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
3458 (pedantic_warning_kind): Update for field renaming.
3459 (permissive_error_kind): Likewise.
3460 (permissive_error_option): Likewise.
3461 (diagnostic_initialize): Convert to...
3462 (diagnostic_context::initialize): ...this, updating for field
3464 (diagnostic_color_init): Convert to...
3465 (diagnostic_context::color_init): ...this.
3466 (diagnostic_urls_init): Convert to...
3467 (diagnostic_context::urls_init): ...this.
3468 (diagnostic_initialize_input_context): Convert to...
3469 (diagnostic_context::initialize_input_context): ...this.
3470 (diagnostic_finish): Convert to...
3471 (diagnostic_context::finish): ...this, updating for field
3473 (diagnostic_context::set_output_format): New.
3474 (diagnostic_context::set_client_data_hooks): New.
3475 (diagnostic_context::create_edit_context): New.
3476 (diagnostic_converted_column): Convert to...
3477 (diagnostic_context::converted_column): ...this.
3478 (diagnostic_get_location_text): Update for field renaming.
3479 (diagnostic_check_max_errors): Convert to...
3480 (diagnostic_context::check_max_errors): ...this, updating for
3482 (diagnostic_action_after_output): Convert to...
3483 (diagnostic_context::action_after_output): ...this, updating for
3485 (last_module_changed_p): Delete.
3486 (set_last_module): Delete.
3487 (includes_seen): Convert to...
3488 (diagnostic_context::includes_seen_p): ...this, updating for field
3490 (diagnostic_report_current_module): Convert to...
3491 (diagnostic_context::report_current_module): ...this, updating for
3492 field renamings, and replacing uses of last_module_changed_p and
3493 set_last_module to simple field accesses.
3494 (diagnostic_show_any_path): Convert to...
3495 (diagnostic_context::show_any_path): ...this.
3496 (diagnostic_classify_diagnostic): Convert to...
3497 (diagnostic_context::classify_diagnostic): ...this, updating for
3499 (diagnostic_push_diagnostics): Convert to...
3500 (diagnostic_context::push_diagnostics): ...this, updating for field
3502 (diagnostic_pop_diagnostics): Convert to...
3503 (diagnostic_context::pop_diagnostics): ...this, updating for field
3505 (get_any_inlining_info): Convert to...
3506 (diagnostic_context::get_any_inlining_info): ...this, updating for
3508 (update_effective_level_from_pragmas): Convert to...
3509 (diagnostic_context::update_effective_level_from_pragmas):
3510 ...this, updating for field renamings.
3511 (print_any_cwe): Convert to...
3512 (diagnostic_context::print_any_cwe): ...this.
3513 (print_any_rules): Convert to...
3514 (diagnostic_context::print_any_rules): ...this.
3515 (print_option_information): Convert to...
3516 (diagnostic_context::print_option_information): ...this, updating
3517 for field renamings.
3518 (diagnostic_enabled): Convert to...
3519 (diagnostic_context::diagnostic_enabled): ...this, updating for
3521 (warning_enabled_at): Convert to...
3522 (diagnostic_context::warning_enabled_at): ...this.
3523 (diagnostic_report_diagnostic): Convert to...
3524 (diagnostic_context::report_diagnostic): ...this, updating for
3525 field renamings and conversions to member functions.
3526 (diagnostic_append_note): Update for field renaming.
3527 (diagnostic_impl): Use diagnostic_context::report_diagnostic
3529 (diagnostic_n_impl): Likewise.
3530 (diagnostic_emit_diagram): Convert to...
3531 (diagnostic_context::emit_diagram): ...this, updating for field
3533 (error_recursion): Convert to...
3534 (diagnostic_context::error_recursion): ...this.
3535 (diagnostic_text_output_format::~diagnostic_text_output_format):
3537 (diagnostics_text_art_charset_init): Convert to...
3538 (diagnostic_context::set_text_art_charset): ...this.
3539 (assert_location_text): Update for field renamings.
3540 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
3541 diagnostic-text-art.h.
3542 (struct diagnostic_context): Convert to...
3543 (class diagnostic_context): ...this.
3544 (diagnostic_context::ice_handler_callback_t): New typedef.
3545 (diagnostic_context::set_locations_callback_t): New typedef.
3546 (diagnostic_context::initialize): New decl.
3547 (diagnostic_context::color_init): New decl.
3548 (diagnostic_context::urls_init): New decl.
3549 (diagnostic_context::file_cache_init): New decl.
3550 (diagnostic_context::finish): New decl.
3551 (diagnostic_context::set_set_locations_callback): New.
3552 (diagnostic_context::initialize_input_context): New decl.
3553 (diagnostic_context::warning_enabled_at): New decl.
3554 (diagnostic_context::option_unspecified_p): New.
3555 (diagnostic_context::report_diagnostic): New decl.
3556 (diagnostic_context::report_current_module): New decl.
3557 (diagnostic_context::check_max_errors): New decl.
3558 (diagnostic_context::action_after_output): New decl.
3559 (diagnostic_context::classify_diagnostic): New decl.
3560 (diagnostic_context::push_diagnostics): New decl.
3561 (diagnostic_context::pop_diagnostics): New decl.
3562 (diagnostic_context::emit_diagram): New decl.
3563 (diagnostic_context::set_output_format): New decl.
3564 (diagnostic_context::set_text_art_charset): New decl.
3565 (diagnostic_context::set_client_data_hooks): New decl.
3566 (diagnostic_context::create_edit_context): New decl.
3567 (diagnostic_context::set_warning_as_error_requested): New.
3568 (diagnostic_context::set_report_bug): New.
3569 (diagnostic_context::set_extra_output_kind): New.
3570 (diagnostic_context::set_show_cwe): New.
3571 (diagnostic_context::set_show_rules): New.
3572 (diagnostic_context::set_path_format): New.
3573 (diagnostic_context::set_show_path_depths): New.
3574 (diagnostic_context::set_show_option_requested): New.
3575 (diagnostic_context::set_max_errors): New.
3576 (diagnostic_context::set_escape_format): New.
3577 (diagnostic_context::set_ice_handler_callback): New.
3578 (diagnostic_context::warning_as_error_requested_p): New.
3579 (diagnostic_context::show_path_depths_p): New.
3580 (diagnostic_context::get_path_format): New.
3581 (diagnostic_context::get_escape_format): New.
3582 (diagnostic_context::get_file_cache): New.
3583 (diagnostic_context::get_edit_context): New.
3584 (diagnostic_context::get_client_data_hooks): New.
3585 (diagnostic_context::get_diagram_theme): New.
3586 (diagnostic_context::converted_column): New decl.
3587 (diagnostic_context::diagnostic_count): New.
3588 (diagnostic_context::includes_seen_p): New decl.
3589 (diagnostic_context::print_any_cwe): New decl.
3590 (diagnostic_context::print_any_rules): New decl.
3591 (diagnostic_context::print_option_information): New decl.
3592 (diagnostic_context::show_any_path): New decl.
3593 (diagnostic_context::error_recursion): New decl.
3594 (diagnostic_context::diagnostic_enabled): New decl.
3595 (diagnostic_context::get_any_inlining_info): New decl.
3596 (diagnostic_context::update_effective_level_from_pragmas): New
3598 (diagnostic_context::m_file_cache): Make private.
3599 (diagnostic_context::diagnostic_count): Rename to...
3600 (diagnostic_context::m_diagnostic_count): ...this and make
3602 (diagnostic_context::warning_as_error_requested): Rename to...
3603 (diagnostic_context::m_warning_as_error_requested): ...this and
3605 (diagnostic_context::n_opts): Rename to...
3606 (diagnostic_context::m_n_opts): ...this and make private.
3607 (diagnostic_context::classify_diagnostic): Rename to...
3608 (diagnostic_context::m_classify_diagnostic): ...this and make
3610 (diagnostic_context::classification_history): Rename to...
3611 (diagnostic_context::m_classification_history): ...this and make
3613 (diagnostic_context::n_classification_history): Rename to...
3614 (diagnostic_context::m_n_classification_history): ...this and make
3616 (diagnostic_context::push_list): Rename to...
3617 (diagnostic_context::m_push_list): ...this and make private.
3618 (diagnostic_context::n_push): Rename to...
3619 (diagnostic_context::m_n_push): ...this and make private.
3620 (diagnostic_context::show_cwe): Rename to...
3621 (diagnostic_context::m_show_cwe): ...this and make private.
3622 (diagnostic_context::show_rules): Rename to...
3623 (diagnostic_context::m_show_rules): ...this and make private.
3624 (diagnostic_context::path_format): Rename to...
3625 (diagnostic_context::m_path_format): ...this and make private.
3626 (diagnostic_context::show_path_depths): Rename to...
3627 (diagnostic_context::m_show_path_depths): ...this and make
3629 (diagnostic_context::show_option_requested): Rename to...
3630 (diagnostic_context::m_show_option_requested): ...this and make
3632 (diagnostic_context::abort_on_error): Rename to...
3633 (diagnostic_context::m_abort_on_error): ...this.
3634 (diagnostic_context::show_column): Rename to...
3635 (diagnostic_context::m_show_column): ...this.
3636 (diagnostic_context::pedantic_errors): Rename to...
3637 (diagnostic_context::m_pedantic_errors): ...this.
3638 (diagnostic_context::permissive): Rename to...
3639 (diagnostic_context::m_permissive): ...this.
3640 (diagnostic_context::opt_permissive): Rename to...
3641 (diagnostic_context::m_opt_permissive): ...this.
3642 (diagnostic_context::fatal_errors): Rename to...
3643 (diagnostic_context::m_fatal_errors): ...this.
3644 (diagnostic_context::dc_inhibit_warnings): Rename to...
3645 (diagnostic_context::m_inhibit_warnings): ...this.
3646 (diagnostic_context::dc_warn_system_headers): Rename to...
3647 (diagnostic_context::m_warn_system_headers): ...this.
3648 (diagnostic_context::max_errors): Rename to...
3649 (diagnostic_context::m_max_errors): ...this and make private.
3650 (diagnostic_context::internal_error): Rename to...
3651 (diagnostic_context::m_internal_error): ...this.
3652 (diagnostic_context::option_enabled): Rename to...
3653 (diagnostic_context::m_option_enabled): ...this.
3654 (diagnostic_context::option_state): Rename to...
3655 (diagnostic_context::m_option_state): ...this.
3656 (diagnostic_context::option_name): Rename to...
3657 (diagnostic_context::m_option_name): ...this.
3658 (diagnostic_context::get_option_url): Rename to...
3659 (diagnostic_context::m_get_option_url): ...this.
3660 (diagnostic_context::print_path): Rename to...
3661 (diagnostic_context::m_print_path): ...this.
3662 (diagnostic_context::make_json_for_path): Rename to...
3663 (diagnostic_context::m_make_json_for_path): ...this.
3664 (diagnostic_context::x_data): Rename to...
3665 (diagnostic_context::m_client_aux_data): ...this.
3666 (diagnostic_context::last_location): Rename to...
3667 (diagnostic_context::m_last_location): ...this.
3668 (diagnostic_context::last_module): Rename to...
3669 (diagnostic_context::m_last_module): ...this and make private.
3670 (diagnostic_context::lock): Rename to...
3671 (diagnostic_context::m_lock): ...this and make private.
3672 (diagnostic_context::lang_mask): Rename to...
3673 (diagnostic_context::m_lang_mask): ...this.
3674 (diagnostic_context::inhibit_notes_p): Rename to...
3675 (diagnostic_context::m_inhibit_notes_p): ...this.
3676 (diagnostic_context::report_bug): Rename to...
3677 (diagnostic_context::m_report_bug): ...this and make private.
3678 (diagnostic_context::extra_output_kind): Rename to...
3679 (diagnostic_context::m_extra_output_kind): ...this and make
3681 (diagnostic_context::column_unit): Rename to...
3682 (diagnostic_context::m_column_unit): ...this and make private.
3683 (diagnostic_context::column_origin): Rename to...
3684 (diagnostic_context::m_column_origin): ...this and make private.
3685 (diagnostic_context::tabstop): Rename to...
3686 (diagnostic_context::m_tabstop): ...this and make private.
3687 (diagnostic_context::escape_format): Rename to...
3688 (diagnostic_context::m_escape_format): ...this and make private.
3689 (diagnostic_context::edit_context_ptr): Rename to...
3690 (diagnostic_context::m_edit_context_ptr): ...this and make
3692 (diagnostic_context::set_locations_cb): Rename to...
3693 (diagnostic_context::m_set_locations_cb): ...this and make
3695 (diagnostic_context::ice_handler_cb): Rename to...
3696 (diagnostic_context::m_ice_handler_cb): ...this and make private.
3697 (diagnostic_context::includes_seen): Rename to...
3698 (diagnostic_context::m_includes_seen): ...this and make private.
3699 (diagnostic_inhibit_notes): Update for field renaming.
3700 (diagnostic_context_auxiliary_data): Likewise.
3701 (diagnostic_abort_on_error): Convert from macro to inline function
3702 and update for field renaming.
3703 (diagnostic_kind_count): Convert from macro to inline function and
3704 use diagnostic_count accessor.
3705 (diagnostic_report_warnings_p): Update for field renaming.
3706 (diagnostic_initialize): Convert decl to inline function calling
3707 into diagnostic_context.
3708 (diagnostic_color_init): Likewise.
3709 (diagnostic_urls_init): Likewise.
3710 (diagnostic_urls_init): Likewise.
3711 (diagnostic_finish): Likewise.
3712 (diagnostic_report_current_module): Likewise.
3713 (diagnostic_show_any_path): Delete decl.
3714 (diagnostic_initialize_input_context): Convert decl to inline
3715 function calling into diagnostic_context.
3716 (diagnostic_classify_diagnostic): Likewise.
3717 (diagnostic_push_diagnostics): Likewise.
3718 (diagnostic_pop_diagnostics): Likewise.
3719 (diagnostic_report_diagnostic): Likewise.
3720 (diagnostic_action_after_output): Likewise.
3721 (diagnostic_check_max_errors): Likewise.
3722 (diagnostic_file_cache_fini): Delete decl.
3723 (diagnostic_converted_column): Delete decl.
3724 (warning_enabled_at): Convert decl to inline function calling into
3726 (option_unspecified_p): New.
3727 (diagnostic_emit_diagram): Delete decl.
3728 * gcc.cc: Remove include of "diagnostic-text-art.h".
3729 Update for changes to diagnostic_context.
3730 * input.cc (diagnostic_file_cache_init): Move implementation
3732 (diagnostic_context::file_cache_init): ...this new member
3734 (diagnostic_file_cache_fini): Delete.
3735 (diagnostics_file_cache_forcibly_evict_file): Update for
3736 m_file_cache becoming private.
3737 (location_get_source_line): Likewise.
3738 (get_source_file_content): Likewise.
3739 (location_missing_trailing_newline): Likewise.
3740 * input.h (diagnostics_file_cache_fini): Delete.
3741 * langhooks.cc: Update for changes to diagnostic_context.
3742 * lto-wrapper.cc: Likewise.
3743 * opts.cc: Remove include of "diagnostic-text-art.h".
3744 Update for changes to diagnostic_context.
3745 * selftest-diagnostic.cc: Update for changes to
3747 * toplev.cc: Likewise.
3748 * tree-diagnostic-path.cc: Likewise.
3749 * tree-diagnostic.cc: Likewise.
3751 2023-11-03 Martin Uecker <uecker@tugraz.at>
3754 * gimple-ssa-warn-access.cc
3755 (pass_waccess::maybe_check_access_sizes): For VLA bounds
3756 in parameters, only warn about null pointers with 'static'.
3758 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
3760 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
3761 calls to use masked simdclones.
3763 2023-11-03 David Malcolm <dmalcolm@redhat.com>
3765 * diagnostic.cc (diagnostic_initialize): Update for consolidation
3766 of group-based fields.
3767 (diagnostic_report_diagnostic): Likewise.
3768 (diagnostic_context::begin_group): New, based on body of
3769 auto_diagnostic_group's ctor.
3770 (diagnostic_context::end_group): New, based on body of
3771 auto_diagnostic_group's dtor.
3772 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
3774 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
3776 * diagnostic.h (diagnostic_context::begin_group): New decl.
3777 (diagnostic_context::end_group): New decl.
3778 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
3779 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
3781 (diagnostic_context::diagnostic_group_emission_count): Rename
3783 (diagnostic_context::m_diagnostic_groups::m_emission_count):
3786 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
3788 PR tree-optimization/111766
3789 * range-op.cc (operator_equal::fold_range): Check constants
3790 against the bitmask.
3791 (operator_not_equal::fold_range): Ditto.
3792 * value-range.h (irange_bitmask::member_p): New.
3794 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
3796 * value-range.cc (irange_bitmask::adjust_range): New.
3797 (irange::intersect_bitmask): Call adjust_range.
3798 * value-range.h (irange_bitmask::adjust_range): New prototype.
3800 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
3802 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
3804 (ix86_memory_address_reg_class): ... this. Generalize address
3805 register class handling to allow multiple address register classes.
3806 Return maximal class for unrecognized instructions. Improve comments.
3807 (ix86_insn_base_reg_class): Rewrite to handle
3808 multiple address register classes.
3809 (ix86_regno_ok_for_insn_base_p): Ditto.
3810 (ix86_insn_index_reg_class): Ditto.
3811 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
3812 and substitute its values with "0" -> "gpr16", "1" -> "*".
3813 (addr): New attribute to limit allowed address register set.
3815 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
3816 and substitute its values with "0" -> "gpr16", "1" -> "*".
3817 * config/i386/sse.md: Ditto.
3819 2023-11-03 Richard Biener <rguenther@suse.de>
3821 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
3824 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
3826 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
3827 (adddi3): Change define_expand to generate a *adddi3.
3828 (*adddi3): New define_insn_and_split to lower DImode additions
3829 during the split1 pass (after combine and before reload).
3830 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
3831 for DImode left shifts by a single bit.
3832 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
3833 left shifts by one bit to an *adddi3.
3835 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
3837 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
3838 can_create_pseudo_p condition.
3840 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3842 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
3843 * tree-vect-stmts.cc (vectorizable_load): Ditto.
3845 2023-11-03 Richard Biener <rguenther@suse.de>
3847 PR tree-optimization/112366
3848 * tree-vect-loop.cc (vectorizable_live_operation): Remove
3851 2023-11-03 Richard Biener <rguenther@suse.de>
3853 PR tree-optimization/112310
3854 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
3855 of expressions, validate dependences are contained within
3856 the hoistable set before hoisting.
3858 2023-11-03 Pan Li <pan2.li@intel.com>
3860 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
3861 (lround<mode><v_i_l_ll_convert>2): Ditto.
3862 (lceil<mode><v_i_l_ll_convert>2): Ditto.
3863 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
3864 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
3866 (lround<mode><v_f2si_convert>2): Ditto.
3867 (lceil<mode><v_f2si_convert>2): Ditto.
3868 (lfloor<mode><v_f2si_convert>2): Ditto.
3869 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
3871 (lround<mode><v_f2di_convert>2): Ditto.
3872 (lceil<mode><v_f2di_convert>2): Ditto.
3873 (lfloor<mode><v_f2di_convert>2): Ditto.
3874 * config/riscv/vector-iterators.md: Renew iterators for both
3877 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3880 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
3881 (simplify_replace_vlmax_avl): Ditto.
3882 (pass_avlprop::execute): Add immediate AVL simplification.
3883 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
3884 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
3886 (emit_vlmax_insn): Adapt for new interface name.
3887 * config/riscv/vector.md (mode_idx): New attribute.
3889 2023-11-03 Pan Li <pan2.li@intel.com>
3892 2023-11-02 Pan Li <pan2.li@intel.com>
3894 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
3895 (lround<mode><v_i_l_ll_convert>2): Ditto.
3896 (lceil<mode><v_i_l_ll_convert>2): Ditto.
3897 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
3898 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
3900 (lround<mode><v_f2si_convert>2): Ditto.
3901 (lceil<mode><v_f2si_convert>2): Ditto.
3902 (lfloor<mode><v_f2si_convert>2): Ditto.
3903 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
3905 (lround<mode><v_f2di_convert>2): Ditto.
3906 (lceil<mode><v_f2di_convert>2): Ditto.
3907 (lfloor<mode><v_f2di_convert>2): Ditto.
3908 * config/riscv/vector-iterators.md: Renew iterators for both
3911 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
3913 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
3915 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
3917 * config/h8300/combiner.md: Add new patterns for single bit
3920 2023-11-02 Pan Li <pan2.li@intel.com>
3922 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
3923 (lround<mode><v_i_l_ll_convert>2): Ditto.
3924 (lceil<mode><v_i_l_ll_convert>2): Ditto.
3925 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
3926 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
3928 (lround<mode><v_f2si_convert>2): Ditto.
3929 (lceil<mode><v_f2si_convert>2): Ditto.
3930 (lfloor<mode><v_f2si_convert>2): Ditto.
3931 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
3933 (lround<mode><v_f2di_convert>2): Ditto.
3934 (lceil<mode><v_f2di_convert>2): Ditto.
3935 (lfloor<mode><v_f2di_convert>2): Ditto.
3936 * config/riscv/vector-iterators.md: Renew iterators for both
3939 2023-11-02 Sam James <sam@gentoo.org>
3941 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
3942 as this has become the standard term for what we're doing here.
3944 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3946 * config/riscv/riscv-avlprop.cc
3947 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
3948 non-real insn AVL propation.
3950 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
3952 PR middle-end/111401
3953 * internal-fn.cc (internal_fn_else_index): New function.
3954 * internal-fn.h (internal_fn_else_index): Define.
3955 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
3957 (predicate_scalar_phi): Add whitespace.
3958 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
3959 (neutral_op_for_reduction): Return -0 for PLUS.
3960 (check_reduction_path): Don't count else operand in COND_OP.
3961 (vect_is_simple_reduction): Ditto.
3962 (vect_create_epilog_for_reduction): Fix whitespace.
3963 (vectorize_fold_left_reduction): Add COND_OP handling.
3964 (vectorizable_reduction): Don't count else operand in COND_OP.
3965 (vect_transform_reduction): Add COND_OP handling.
3966 * tree-vectorizer.h (neutral_op_for_reduction): Add default
3969 2023-11-02 Richard Biener <rguenther@suse.de>
3971 PR tree-optimization/112320
3972 * gimple-fold.h (rewrite_to_defined_overflow): New overload
3973 for in-place operation.
3974 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
3975 iterator argument to worker, define separate API for
3976 in-place and not in-place operation.
3977 * tree-if-conv.cc (predicate_statements): Simplify.
3978 * tree-scalar-evolution.cc (final_value_replacement_loop):
3980 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
3981 * tree-ssa-reassoc.cc (update_range_test): Likewise.
3983 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
3985 * config/i386/i386.md: Move stack protector patterns
3986 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
3988 2023-11-02 liuhongt <hongtao.liu@intel.com>
3990 * config/i386/mmx.md (cmlav4hf4): New expander.
3991 (cmla_conjv4hf4): Ditto.
3993 (cmul_conjv4hf3): Ditto.
3995 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3997 * config/riscv/vector.md: Fix redundant codes in attributes.
3999 2023-11-02 xuli <xuli1@eswincomputing.com>
4001 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
4002 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
4003 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
4004 * config/riscv/riscv-vector-builtins.cc: Add arg types.
4006 2023-11-02 Pan Li <pan2.li@intel.com>
4008 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
4009 size check for vectype_out doesn't participating for optab query.
4010 (vectorizable_call): Remove the type size check.
4012 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4015 * config/riscv/vector.md: Add '0'.
4017 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
4020 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
4021 as operands[2] with predicate register_operand must be !MEM_P.
4022 (peephole2): Optimize a mulx followed by a register-to-register
4023 move, to place result in the correct destination if possible.
4025 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
4027 * config/riscv/sync.md: Use riscv_subword_address function to
4028 calculate the address and shift in atomic_test_and_set.
4030 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
4032 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
4033 returned for libcall case.
4035 2023-11-01 Martin Uecker <uecker@tugraz.at>
4038 * doc/invoke.texi: Document -Walloc-size option.
4040 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
4042 * genautomata.cc (write_automata): move endif
4044 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
4046 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
4047 create return array and don't return new type.
4048 (simd_clone_adjust_argument_types): Hoist out code that creates
4049 ipa_param_body_adjustments and don't return them.
4050 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
4051 argument types have been vectorized, create adjustments and return array
4053 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
4054 argument types have been vectorized.
4056 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
4059 * config/i386/i386.md (stack_protexct_set_2 peephole2):
4060 Use general_gr_operand as operand 4 predicate.
4062 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
4064 * config/i386/i386.md (stack_protect_set): Explicitly
4065 generate scratch register in word mode.
4066 (@stack_protect_set_1_<mode>): Rename to ...
4067 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
4068 Use SWI48 mode iterator to match scratch register.
4069 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
4070 iterators to match peephole sequence. Use general_operand
4071 predicate for operand 4. Allow different operand 2 and operand 3
4072 registers and use peep2_reg_dead_p to ensure new scratch
4073 register is dead before peephole seqeunce. Use peep2_reg_dead_p
4074 to ensure old scratch register is dead after peephole sequence.
4075 (*stack_protect_set_2_<mode>): Rename to ...
4076 (*stack_protect_set_2_<mode>_si): .. this.
4077 (*stack_protect_set_3): Rename to ...
4078 (*stack_protect_set_2_<mode>_di): ... this.
4079 Use PTR mode iterator to match stack protector memory move.
4080 Use earlyclobber for all alternatives of operand 1.
4081 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
4082 iterators to match peephole sequence. Use general_operand
4083 predicate for operand 4. Allow different operand 2 and operand 3
4084 registers and use peep2_reg_dead_p to ensure new scratch
4085 register is dead before peephole seqeunce. Use peep2_reg_dead_p
4086 to ensure old scratch register is dead after peephole sequence.
4088 2023-11-01 xuli <xuli1@eswincomputing.com>
4090 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
4091 intrinsics for tuple types.
4092 * config/riscv/riscv-vector-builtins.cc: Ditto.
4093 * config/riscv/vector.md (@vundefined<mode>): Ditto.
4095 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4097 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
4099 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4101 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
4103 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4105 * input.cc (dump_location_info): Update for removal of
4106 MACRO_MAP_EXPANSION_POINT_LOCATION.
4107 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
4110 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4112 * opts.cc (get_option_url): Update comment; the requirement to
4113 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
4114 r10-8065-ge33a1eae25b8a8.
4116 2023-10-31 David Malcolm <dmalcolm@redhat.com>
4118 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
4119 m_skipping_null_url.
4120 (pp_begin_url): Handle URL being null.
4121 (pp_end_url): Likewise.
4122 (selftest::test_null_urls): New.
4123 (selftest::pretty_print_cc_tests): Call it.
4124 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
4126 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4128 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
4129 (vect_build_slp_tree_1): Ditto.
4130 (vect_build_slp_tree_2): Ditto.
4132 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
4134 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
4135 * config/bpf/bpf-protos.h: Added prototype for new pass.
4136 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
4137 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
4139 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
4141 (is_attr_preserve_access): Improved check.
4142 (core_field_info): Make use of root_for_core_field_info
4144 (process_field_expr): Adapted to new functions.
4145 (pack_type): Small improvement.
4146 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
4147 (bpf_init_core_builtins): Changed to new function names.
4148 (construct_builtin_core_reloc): Improved implementation.
4149 (bpf_resolve_overloaded_core_builtin): Changed how
4150 __builtin_preserve_access_index is converted.
4151 (compute_field_expr): Corrected implementation. Added
4152 access_node argument.
4153 (bpf_core_get_index): Added valid argument.
4154 (root_for_core_field_info, pack_field_expr)
4155 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
4156 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
4157 (core_access_clean, core_is_access_index, core_mark_as_access_index)
4158 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
4159 (make_pass_lower_bpf_core): Added functions.
4160 (pass_data_lower_bpf_core): New pass struct.
4161 (pass_lower_bpf_core): New gimple_opt_pass class.
4162 (pack_field_expr_for_preserve_field)
4163 (bpf_replace_core_move_operands): Removed function.
4164 (bpf_enum_value_kind): Added GTY(()).
4165 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
4166 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
4167 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
4169 2023-10-31 Neal Frager <neal.frager@amd.com>
4171 * config/microblaze/microblaze.cc: Fix mcpu version check.
4173 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
4175 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
4176 TARGET_ATOMIC constraint
4177 (atomic_store_rvwmo<mode>): Ditto.
4178 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
4179 (atomic_store_ztso<mode>): Ditto.
4180 * config/riscv/sync.md (atomic_load<mode>): Ditto.
4181 (atomic_store<mode>): Ditto.
4183 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
4185 * config/riscv/riscv.cc (riscv_index_reg_class):
4186 Return GR_REGS for XTheadFMemIdx.
4187 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
4188 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
4189 * config/riscv/thead.cc (is_fmemidx_mode): New function.
4190 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
4191 (th_fmemidx_output_index): New function.
4192 (th_output_move): Add support for XTheadFMemIdx.
4193 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
4194 (TH_M_NOEXTF): Likewise.
4195 (*th_fmemidx_movsf_hardfloat): New INSN.
4196 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
4197 (*th_fmemidx_I_a): Likewise.
4198 (*th_fmemidx_I_c): Likewise.
4199 (*th_fmemidx_US_a): Likewise.
4200 (*th_fmemidx_US_c): Likewise.
4201 (*th_fmemidx_UZ_a): Likewise.
4202 (*th_fmemidx_UZ_c): Likewise.
4204 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
4206 * config/riscv/constraints.md (th_m_mia): New constraint.
4207 (th_m_mib): Likewise.
4208 (th_m_mir): Likewise.
4209 (th_m_miu): Likewise.
4210 * config/riscv/riscv-protos.h (enum riscv_address_type):
4211 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
4212 and ADDRESS_REG_WB and their documentation.
4213 (struct riscv_address_info): Add new field 'shift' and
4214 document the field usage for the new address types.
4215 (riscv_valid_base_register_p): New prototype.
4216 (th_memidx_legitimate_modify_p): Likewise.
4217 (th_memidx_legitimate_index_p): Likewise.
4218 (th_classify_address): Likewise.
4219 (th_output_move): Likewise.
4220 (th_print_operand_address): Likewise.
4221 * config/riscv/riscv.cc (riscv_index_reg_class):
4222 Return GR_REGS for XTheadMemIdx.
4223 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
4224 (riscv_classify_address): Call th_classify_address() on top.
4225 (riscv_output_move): Call th_output_move() on top.
4226 (riscv_print_operand_address): Call th_print_operand_address()
4228 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
4229 (HAVE_PRE_MODIFY_DISP): Likewise.
4230 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
4232 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
4233 create INSN with same name and disable it for XTheadMemIdx.
4234 (extendsidi2): Likewise.
4235 (*extendsidi2_internal): Disable for XTheadMemIdx.
4236 * config/riscv/thead.cc (valid_signed_immediate): New helper
4238 (th_memidx_classify_address_modify): New function.
4239 (th_memidx_legitimate_modify_p): Likewise.
4240 (th_memidx_output_modify): Likewise.
4241 (is_memidx_mode): Likewise.
4242 (th_memidx_classify_address_index): Likewise.
4243 (th_memidx_legitimate_index_p): Likewise.
4244 (th_memidx_output_index): Likewise.
4245 (th_classify_address): Likewise.
4246 (th_output_move): Likewise.
4247 (th_print_operand_address): Likewise.
4248 * config/riscv/thead.md (*th_memidx_operand): New splitter.
4249 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
4250 (*th_memidx_extendsidi2): Likewise.
4251 (*th_memidx_zero_extendsidi2): Likewise.
4252 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
4253 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
4254 (*th_memidx_bb_zero_extendsidi2): Likewise.
4255 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
4256 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
4257 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
4258 (TH_M_ANYI): New mode iterator.
4259 (TH_M_NOEXTI): Likewise.
4260 (*th_memidx_I_a): New combiner optimization.
4261 (*th_memidx_I_b): Likewise.
4262 (*th_memidx_I_c): Likewise.
4263 (*th_memidx_US_a): Likewise.
4264 (*th_memidx_US_b): Likewise.
4265 (*th_memidx_US_c): Likewise.
4266 (*th_memidx_UZ_a): Likewise.
4267 (*th_memidx_UZ_b): Likewise.
4268 (*th_memidx_UZ_c): Likewise.
4270 2023-10-31 Carl Love <cel@us.ibm.com>
4272 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
4273 documentation for the builti-ins.
4275 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
4277 PR rtl-optimization/111971
4278 * lra-constraints.cc: (process_alt_operands): Don't check start
4279 hard regs for regs originated from register variables.
4281 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
4283 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
4285 (cond_<ieee_fmaxmin_op><mode>): Ditto.
4286 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
4287 (reduc_fmax_scal_<mode>): Ditto.
4288 (reduc_fmin_scal_<mode>): Ditto.
4289 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
4290 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
4291 (UNSPEC_VFMIN): Ditto.
4292 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
4293 UNSPEC insn patterns.
4294 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
4296 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
4300 * Makefile.in: Handle split insn-emit.cc.
4301 * configure: Regenerate.
4302 * configure.ac: Add --with-insnemit-partitions.
4303 * genemit.cc (output_peephole2_scratches): Print to file instead
4305 (print_code): Ditto.
4306 (gen_rtx_scratch): Ditto.
4308 (gen_emit_seq): Ditto.
4309 (emit_c_code): Ditto.
4311 (gen_expand): Ditto.
4313 (output_add_clobbers): Ditto.
4314 (output_added_clobbers_hard_reg_p): Ditto.
4315 (print_overload_arguments): Ditto.
4316 (print_overload_test): Ditto.
4317 (handle_overloaded_code_for): Ditto.
4318 (handle_overloaded_gen): Ditto.
4319 (print_header): New function.
4320 (handle_arg): New function.
4321 (main): Split output into 10 files.
4322 * gensupport.cc (count_patterns): New function.
4323 * gensupport.h (count_patterns): Define.
4324 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
4325 * read-md.h (class md_reader): Change definition.
4327 2023-10-31 Alexandre Oliva <oliva@adacore.com>
4329 PR tree-optimization/111943
4330 * gimple-harden-control-flow.cc: Adjust copyright year.
4331 (rt_bb_visited): Add vfalse and vtrue data members.
4332 Zero-initialize them in the ctor.
4333 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
4334 abnormal edges, insert initializers for vfalse and vtrue on
4335 entry, and insert the check sequence guarded by a conditional
4338 2023-10-31 Richard Biener <rguenther@suse.de>
4340 PR tree-optimization/112305
4341 * tree-scalar-evolution.h (expression_expensive): Adjust.
4342 * tree-scalar-evolution.cc (expression_expensive): Record
4343 when we see a COND_EXPR.
4344 (final_value_replacement_loop): When the replacement contains
4345 a COND_EXPR, rewrite it to defined overflow.
4346 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
4348 2023-10-31 Xi Ruoyao <xry111@xry111.site>
4351 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
4354 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
4356 * gimple-match.h (gimple_match_op::gimple_match_op):
4357 Add interfaces for more arguments.
4358 (gimple_match_op::set_op): Add interfaces for more arguments.
4359 * match.pd: Add support of combining cond_len_op + vec_cond
4361 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
4363 * config/i386/avx512cdintrin.h (target): Push evex512 for
4365 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
4367 * config/i386/i386-builtin.def (BDESC): Do not check evex512
4368 for builtins not needed.
4370 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
4372 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
4373 Change to define_expand.
4375 2023-10-31 liuhongt <hongtao.liu@intel.com>
4378 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
4379 define_split to define_insn_and_split to handle
4380 immediate_operand for comparison.
4381 (*mmx_pblendvb_v8qi_2): Ditto.
4382 (*mmx_pblendvb_<mode>_1): Ditto.
4383 (*mmx_pblendvb_v4qi_2): Ditto.
4384 (<code><mode>3): Remove define_split after it.
4385 (<code>v8qi3): Ditto.
4386 (<code><mode>3): Ditto.
4387 (<ode>v2hi3): Ditto.
4389 2023-10-31 Andrew Pinski <pinskia@gmail.com>
4391 * match.pd (`a == 1 ? b : a OP b`): New pattern.
4392 (`a == -1 ? b : a & b`): New pattern.
4394 2023-10-31 Andrew Pinski <pinskia@gmail.com>
4396 * match.pd: (`a == 0 ? b : b + a`,
4397 `a == 0 ? b : b - a`): New patterns.
4399 2023-10-31 Neal Frager <neal.frager@amd.com>
4401 * config/microblaze/microblaze.cc: Fix mcpu version check.
4403 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
4405 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
4406 * common/config/i386/i386-common.cc: Add yongfeng.
4407 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
4408 Add ZHAOXIN_FAM7H_YONGFENG.
4409 * config.gcc: Add yongfeng.
4410 * config/i386/driver-i386.cc (host_detect_local_cpu):
4411 Let -march=native recognize yongfeng processors.
4412 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
4413 * config/i386/i386-options.cc (m_YONGFENG): New definition.
4415 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
4416 * config/i386/i386.md: Add yongfeng.
4417 * config/i386/lujiazui.md: Fix typo.
4418 * config/i386/x86-tune-costs.h (struct processor_costs):
4420 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
4421 (ix86_adjust_cost): Ditto.
4422 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
4423 m_LUJIAZUI with m_ZHAOXIN.
4424 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
4425 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
4426 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
4427 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
4428 (X86_TUNE_MOVX): Ditto.
4429 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
4430 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
4431 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
4432 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
4433 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
4434 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
4435 (X86_TUNE_USE_LEAVE): Ditto.
4436 (X86_TUNE_PUSH_MEMORY): Ditto.
4437 (X86_TUNE_LCP_STALL): Ditto.
4438 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
4439 (X86_TUNE_OPT_AGU): Ditto.
4440 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
4441 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
4442 (X86_TUNE_USE_SAHF): Ditto.
4443 (X86_TUNE_USE_BT): Ditto.
4444 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
4445 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
4446 (X86_TUNE_AVOID_MFENCE): Ditto.
4447 (X86_TUNE_EXPAND_ABS): Ditto.
4448 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
4449 (X86_TUNE_USE_FFREEP): Ditto.
4450 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
4451 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
4452 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
4453 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
4454 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
4455 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
4456 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
4457 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
4458 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
4459 * doc/extend.texi: Add details about yongfeng.
4460 * doc/invoke.texi: Ditto.
4461 * config/i386/yongfeng.md: New file to describe yongfeng processor.
4463 2023-10-30 Martin Jambor <mjambor@suse.cz>
4466 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
4467 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
4468 (update_signature): Mark any any IPA-CP aggregate constants at
4469 positions known to be killed as killed. Move check that there is
4470 clone_info after this pruning.
4471 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
4472 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
4473 (push_agg_values_from_plats): Likewise.
4474 (ipa_push_agg_values_from_jfunc): Likewise.
4475 (estimate_local_effects): Likewise.
4476 (push_agg_values_for_index_from_edge): Likewise.
4477 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
4479 (read_ipcp_transformation_info): Likewise.
4480 (ipcp_get_aggregate_const): Update comment, assert that encountered
4481 record does not have killed flag set.
4482 (ipcp_transform_function): Prune all aggregate constants with killed
4485 2023-10-30 Martin Jambor <mjambor@suse.cz>
4488 * ipa-prop.h (ipcp_transformation): New member function template
4490 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
4491 filter aggreagate constants.
4493 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
4495 PR middle-end/101955
4496 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
4497 to convert sign extract of the least significant bit into an
4498 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
4500 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
4502 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
4503 Provide reasonable values for SHIFTS and ROTATES by constant
4504 bit counts depending upon TARGET_BARREL_SHIFTER.
4505 (arc_insn_cost): Use insn attributes if the instruction is
4506 recognized. Avoid calling get_attr_length for type "multi",
4507 i.e. define_insn_and_split patterns without explicit type.
4508 Fall-back to set_rtx_cost for single_set and pattern_cost
4510 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
4511 (BRANCH_COST): Improve/correct definition.
4512 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
4514 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
4516 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
4517 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
4518 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
4519 (arc_split_rotl): Use swap on TARGET_SWAP.
4520 (arc_split_rotr): Likewise.
4521 * config/arc/arc.md (ANY_ROTATE): New code iterator.
4522 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
4523 swap instruction on TARGET_SWAP.
4524 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
4525 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
4526 (*ashlsi2_cnt16): See above.
4528 2023-10-30 Richard Ball <richard.ball@arm.com>
4530 * config/arm/aout.h: Change to use the Lrtx label.
4531 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
4532 from (!target_pure_code) condition.
4533 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
4534 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
4535 .Lrtx label and remove adr instructions.
4537 (arm_casesi_internal): Use force_reg to generate ldr instructions that
4538 would otherwise be out of range, and change rtl to accommodate force reg.
4539 Additionally remove unnecessary register temp.
4540 (casesi): Remove pure code check for Arm.
4541 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
4542 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
4544 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
4547 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
4548 xor to an equality and fix comment indentation.
4550 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4552 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
4553 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
4554 * config/riscv/vector.md: Ditto.
4556 2023-10-30 liuhongt <hongtao.liu@intel.com>
4559 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
4560 512-bit vector with vpcmpeq + kortest.
4561 * config/i386/i386.md (cbranchxi4): New expander.
4562 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
4565 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
4568 * expr.cc (qi_vector_mode_supported_p): Rename to...
4569 (by_pieces_mode_supported_p): ...this, and extends it to do
4570 the checking for both scalar and vector mode.
4571 (widest_fixed_size_mode_for_size): Call
4572 by_pieces_mode_supported_p to examine the mode.
4573 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
4575 2023-10-29 Martin Uecker <uecker@tugraz.at>
4577 PR tree-optimization/109334
4578 * tree-object-size.cc (parm_object_size): Allow size
4579 computation for implicit access attributes.
4581 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
4583 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
4584 260000 (which corresponds to RF-2014.0) to 270000 (which
4585 corresponds to RG-2015.0, the release where salt/saltu opcodes
4588 2023-10-29 Pan Li <pan2.li@intel.com>
4590 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
4591 reference type to prevent copying.
4593 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
4595 PR rtl-optimization/112107
4596 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
4599 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
4602 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
4605 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
4607 * config/gcn/gcn-valu.md
4608 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
4609 condition to silence the warnings.
4610 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
4611 * config/gcn/gcn.md (*movti_insn): Likewise.
4613 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
4615 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
4618 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
4620 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
4621 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
4623 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
4625 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
4626 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
4628 (expand_rawmemchr): Define.
4629 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
4631 (expand_block_move): Move from here...
4632 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
4633 (expand_rawmemchr): Add vectorized expander.
4634 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
4636 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
4638 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
4639 Process reg equivalence invariants.
4641 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
4643 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
4644 i386: Fiy typo in "partial_memory_read_stall" tune option.
4646 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
4648 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
4649 support for CONST_STRING.
4651 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
4654 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
4655 2 take "regiser_operand" and "nonimmediate_operand" respectively.
4656 (<u>mulqihi3): Likewise.
4657 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
4658 matching the %d constraint. Use umul_highpart RTX to represent
4659 the highpart multiplication.
4660 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
4661 predicate, and "a" rather than "0" as operands 0 and 2 have
4663 (define_split): For mul to mulx conversion, use the new
4664 umul_highpart RTX representation.
4665 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
4666 and the constraint %a as operands 0 and 1 have different modes.
4667 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
4669 (define_peephole2): Providing widening multiplication variants
4670 of the peephole2s that tweak highpart multiplication register
4673 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
4675 PR preprocessor/87299
4676 * toplev.cc (no_backend): New static global.
4677 (finalize): Remove argument no_backend, which is now a
4679 (process_options): Likewise.
4680 (do_compile): Likewise.
4681 (target_reinit): Don't do anything in preprocess-only mode.
4682 (toplev::main): Adapt to no_backend change.
4683 (toplev::finalize): Likewise.
4685 2023-10-27 Andrew Pinski <apinski@marvell.com>
4687 PR tree-optimization/101590
4688 PR tree-optimization/94884
4689 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
4691 2023-10-27 liuhongt <hongtao.liu@intel.com>
4694 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
4695 V2HF/V2BF/V4HF/V4BFmode.
4696 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
4697 data_mode is V4HF/V2HFmode.
4698 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
4699 (vcond_mask_<mode>v4hi): Ditto.
4700 (vcond_mask_<mode>qi): Ditto.
4701 (vec_cmpv2hfqi): Ditto.
4702 (vcond_mask_<mode>v2hi): Ditto.
4703 (mmx_plendvb_<mode>): Add 2 combine splitters after the
4705 (mmx_pblendvb_v8qi): Ditto.
4706 (<code>v2hi3): Add a combine splitter after the pattern.
4707 (<code><mode>3): Ditto.
4708 (<code>v8qi3): Ditto.
4709 (<code><mode>3): Ditto.
4710 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
4711 (vcond<sseintvecmodelower><mode>): .. this into ..
4712 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
4713 and extend to V8BF/V16BF/V32BFmode.
4715 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4717 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
4718 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
4719 (autovectorize_vector_modes): Ditto.
4720 (can_find_related_mode_p): Ditto.
4722 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4726 * config.gcc: Add AVL propagation pass.
4727 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
4728 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
4729 * config/riscv/t-riscv: Ditto.
4730 * config/riscv/riscv-avlprop.cc: New file.
4732 2023-10-26 David Malcolm <dmalcolm@redhat.com>
4734 * doc/extend.texi (Common Function Attributes): Add
4735 null_terminated_string_arg.
4737 2023-10-26 Andrew Pinski <pinskia@gmail.com>
4739 PR tree-optimization/111957
4740 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
4742 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
4744 * range-op-float.cc (range_operator::fold_range): Delete unused
4747 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
4749 * range-op-float.cc (range_operator::fold_range): Remove
4751 (range_operator::rv_fold): Remove unneeded arguments.
4752 (operator_plus::rv_fold): Same.
4753 (operator_minus::rv_fold): Same.
4754 (operator_mult::rv_fold): Same.
4755 (operator_div::rv_fold): Same.
4756 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
4760 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
4762 * range-op-float.cc (range_operator::fold_range): Pass frange
4763 argument to rv_fold.
4764 (range_operator::rv_fold): Add frange argument.
4765 (operator_plus::rv_fold): Same.
4766 (operator_minus::rv_fold): Same.
4767 (operator_mult::rv_fold): Same.
4768 (operator_div::rv_fold): Same.
4769 * range-op-mixed.h: Add frange argument to rv_fold methods.
4772 2023-10-26 Richard Ball <richard.ball@arm.com>
4774 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
4775 for different machine modes for arm.
4776 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
4777 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
4778 ASM_OUTPUT_ADDR_DIFF_ELT.
4779 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
4781 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
4783 * config/arm/arm.cc (arm_output_casesi): New function.
4784 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
4786 for arm to use new function arm_output_casesi.
4788 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
4791 (darwin_label_is_anonymous_local_objc_name): Make metadata names
4792 linker-visibile for GNU objective C.
4794 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
4796 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
4798 * ira-costs.cc: Include regset.h.
4799 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
4801 (find_costs_and_classes): Call calculate_equiv_gains and redefine
4802 mem_cost of pseudos with equivs when LRA is used.
4803 * var-tracking.cc: Include ira.h and lra.h.
4804 (vt_initialize): Use lra_eliminate_regs when LRA is used.
4806 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4808 * doc/md.texi: Adapt COND_LEN pseudo code.
4810 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
4811 Richard Biener <rguenther@suse.de>
4813 PR rtl-optimization/91865
4814 * combine.cc (make_compound_operation): Avoid creating a
4815 ZERO_EXTEND of a ZERO_EXTEND.
4817 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
4819 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
4820 (vcond_mask_<mode><mode256_i>): this.
4821 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
4822 (vcond_mask_<mode><mode_i>): this.
4824 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
4826 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
4827 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
4829 * ipa-visibility.cc (function_and_variable_visibility): Change
4830 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
4831 * varasm.cc (output_constant_pool_contents)
4832 [#ifdef ASM_OUTPUT_DEF]:
4833 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
4834 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
4835 'if (!TARGET_SUPPORTS_ALIASES)',
4836 'gcc_checking_assert (seen_error ());'.
4837 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
4838 'if (!TARGET_SUPPORTS_ALIASES)'.
4839 (default_asm_output_anchor):
4840 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
4842 2023-10-26 Alexandre Oliva <oliva@adacore.com>
4844 PR tree-optimization/111520
4845 * gimple-harden-conditionals.cc
4846 (pass_harden_compares::execute): Set EH edge probability and
4847 EH block execution count.
4849 2023-10-26 Alexandre Oliva <oliva@adacore.com>
4851 * tree-eh.h (make_eh_edges): Rename to...
4852 (make_eh_edge): ... this.
4853 * tree-eh.cc: Likewise. Adjust all callers...
4854 * gimple-harden-conditionals.cc: ... here, ...
4855 * gimple-harden-control-flow.cc: ... here, ...
4856 * tree-cfg.cc: ... here, ...
4857 * tree-inline.cc: ... and here.
4859 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
4861 * config/darwin.cc (darwin_override_options): Handle fPIE.
4863 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
4865 * config.gcc: Use -E to to sed to indicate that we are using
4868 2023-10-25 Jason Merrill <jason@redhat.com>
4870 * tree-core.h (struct tree_base): Update address_space comment.
4872 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
4874 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
4875 Add support for immediates using MOV/EOR bitmask.
4877 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
4880 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
4882 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
4883 * config/i386/i386.md: New peephole pattern to narrow test
4884 instructions with immediate operands that test memory locations
4887 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
4889 * value-range.cc (irange::union_append): New.
4890 (irange::union_): Call union_append when appropriate.
4891 * value-range.h (irange::union_append): New prototype.
4893 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
4895 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
4896 (__lasx_xvfrintrne_s): Ditto.
4897 (__lasx_xvfrintrne_d): Ditto.
4898 (__lasx_xvfrintrz_s): Ditto.
4899 (__lasx_xvfrintrz_d): Ditto.
4900 (__lasx_xvfrintrp_s): Ditto.
4901 (__lasx_xvfrintrp_d): Ditto.
4902 (__lasx_xvfrintrm_s): Ditto.
4903 (__lasx_xvfrintrm_d): Ditto.
4904 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
4905 (__lsx_vfrintrne_s): Ditto.
4906 (__lsx_vfrintrne_d): Ditto.
4907 (__lsx_vfrintrz_s): Ditto.
4908 (__lsx_vfrintrz_d): Ditto.
4909 (__lsx_vfrintrp_s): Ditto.
4910 (__lsx_vfrintrp_d): Ditto.
4911 (__lsx_vfrintrm_s): Ditto.
4912 (__lsx_vfrintrm_d): Ditto.
4914 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
4916 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
4917 instruction template corresponding to the __builtin_thread_pointer
4919 * doc/extend.texi:Add the __builtin_thread_pointer function support
4920 description to the documentation.
4922 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4924 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
4925 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
4926 (single_set_info): New functions.
4927 (remove_uses_of_def, accesses_reference_same_resource): Declare.
4928 (insn_clobbers_resources): Likewise.
4929 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
4930 (rtl_ssa::accesses_reference_same_resource): Likewise.
4931 (rtl_ssa::insn_clobbers_resources): Likewise.
4932 * rtl-ssa/movement.h (can_move_insn_p): Declare.
4933 * rtl-ssa/movement.cc: New file.
4935 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4937 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
4938 New member function.
4939 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
4941 (function_info::make_use_available): Avoid false negatives for
4942 queries within an EBB.
4944 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4946 * rtl-ssa/changes.cc: Include sreal.h.
4947 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
4948 scale the cost of each instruction by its execution frequency.
4950 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4952 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
4953 (is_single_dominating_def, remains_available_on_exit): Replace with...
4954 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
4955 (function_info::remains_available_on_exit): ...these new member
4957 (function_info::m_clobbered_by_calls): New member variable.
4958 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
4959 initialize m_clobbered_by_calls.
4960 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
4961 m_clobbered_by_calls for each call-clobber note.
4962 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
4963 New function. Check for call clobbers.
4964 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
4967 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4969 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
4971 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
4972 (bb_walker::bb_walker): Use it, moving the computation of the
4974 (function_info::process_all_blocks): ...here.
4975 (function_info::place_phis): Add dominance frontiers for the
4978 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4980 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
4981 New member function.
4982 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
4984 (function_info::change_insns): Use it.
4986 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4988 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
4989 If a change describes a set of memory, ensure that that set
4990 is kept, regardless of the insn pattern.
4992 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
4994 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
4995 call to add_reg_unused_notes and instead...
4996 (function_info::change_insns): ...use a separate loop here.
4998 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
5000 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
5001 global registers to be live on exit. Handle any block with zero
5002 successors like an exit block.
5004 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
5006 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
5007 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
5008 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
5009 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
5011 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
5013 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
5015 * tree-pretty-print.cc (dump_omp_clause): Adjust.
5016 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
5019 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5021 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
5022 (tail_agnostic_p): Ditto.
5023 (validate_change_or_fail): Ditto.
5024 (nonvlmax_avl_type_p): Ditto.
5025 (vlmax_avl_p): Ditto.
5027 (enum vlmul_type): Ditto.
5028 (count_regno_occurrences): Ditto.
5029 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
5030 (get_default_ta): Ditto.
5031 (tail_agnostic_p): Ditto.
5032 (validate_change_or_fail): Ditto.
5033 (nonvlmax_avl_type_p): Ditto.
5034 (vlmax_avl_p): Ditto.
5036 (enum vlmul_type): Ditto.
5038 (count_regno_occurrences): Ditto.
5039 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
5043 (get_default_ta): Ditto.
5044 (tail_agnostic_p): Ditto.
5045 (count_regno_occurrences): Ditto.
5046 (validate_change_or_fail): Ditto.
5048 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
5050 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
5051 (gimplify_adjust_omp_clauses): Likewise.
5052 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
5053 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
5054 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
5055 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
5057 (convert_local_omp_clauses): Likewise.
5058 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
5059 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
5060 (omp_clause_code_name): Likewise.
5061 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
5063 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5065 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
5066 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
5067 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
5068 * config/riscv/vector.md: Change avl_type into avl_type_idx.
5070 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5072 * recog.cc (constrain_operands): Remove UNARY_P handling.
5073 * reload.cc (find_reloads): Likewise.
5075 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
5077 * gcov-io.h: Fix record length encoding in comment.
5079 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
5081 * config/i386/i386-features.cc (compute_convert_gain): Provide
5082 more accurate values (sizes) for inter-unit moves with -Os.
5084 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
5085 Claudiu Zissulescu <claziss@gmail.com>
5087 * config/arc/arc-protos.h (output_shift): Rename to...
5088 (output_shift_loop): Tweak API to take an explicit rtx_code.
5089 (arc_split_ashl): Prototype new function here.
5090 (arc_split_ashr): Likewise.
5091 (arc_split_lshr): Likewise.
5092 (arc_split_rotl): Likewise.
5093 (arc_split_rotr): Likewise.
5094 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
5095 (output_shift_loop): New function replacing output_shift to output
5096 a zero overheap loop for SImode shifts and rotates on ARC targets
5097 without barrel shifter (i.e. no hardware support for these insns).
5098 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
5099 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
5100 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
5101 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
5102 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
5103 (arc_print_operand): Correct whitespace.
5104 (arc_rtx_costs): Likewise.
5105 (hwloop_optimize): Likewise.
5106 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
5107 (define_code_attr insn): New code attribute to map to pattern name.
5108 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
5109 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
5110 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
5111 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
5112 We now call arc_split_<insn> in arc.cc to implement each split.
5113 (shift_si3): Delete define_insn, all shifts/rotates are now split.
5114 (shift_si3_loop): Rename to...
5115 (<insn>si3_loop): define_insn to handle loop implementations of
5116 SImode shifts and rotates, calling ouput_shift_loop for template.
5117 (rotrsi3): Rename to...
5118 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
5119 (*rotlsi3): New define_insn_and_split to transform left rotates
5120 into right rotates before reload.
5121 (rotlsi3_cnt1): New define_insn_and_split to implement a left
5122 rotate by one bit using an add.f followed by an adc.
5123 * config/arc/predicates.md (shiftr4_operator): Delete.
5125 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
5127 * config/arc/arc.md (mulsi3_700): Update pattern.
5128 (mulsi3_v2): Likewise.
5129 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
5131 2023-10-24 Andrew Pinski <pinskia@gmail.com>
5133 PR tree-optimization/104376
5134 PR tree-optimization/101541
5135 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
5136 Allow nop conversions even if it is defined by a statement
5137 inside the conditional.
5139 2023-10-24 Andrew Pinski <pinskia@gmail.com>
5141 PR tree-optimization/111913
5142 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
5145 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5147 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
5148 whether the requested phi already exists.
5150 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5152 * rtl-ssa.h: Include cfgbuild.h.
5153 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
5154 more comprehensive control_flow_insn_p.
5156 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5158 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
5159 whether an insn has been replaced by a note.
5161 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5163 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
5166 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5168 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
5169 destination to be wider than the sources. Take the mode from the
5171 (ix86_expand_sse_extend): Pass the destination directly to
5172 ix86_split_mmx_punpck, rather than using a fresh register that
5175 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5177 * config/i386/predicates.md (aeswidekl_operation): Protect
5178 REGNO check with REG_P.
5180 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5182 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
5183 (TARGET_INSN_COST): Define.
5185 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
5187 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
5190 2023-10-24 xuli <xuli1@eswincomputing.com>
5193 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
5195 2023-10-24 Mark Harmstone <mark@harmstone.com>
5197 * opts.cc (debug_type_names): Remove stabs and xcoff.
5198 (df_set_names): Adjust.
5200 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5203 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
5205 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
5207 PR preprocessor/36887
5208 * toplev.h (ident_hash_extra): Declare...
5209 * stringpool.cc (ident_hash_extra): ...this new global variable.
5210 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
5211 (ggc_mark_stringpool): Likewise.
5212 (ggc_purge_stringpool): Likewise.
5213 (struct string_pool_data_extra): New struct.
5214 (spd2): New GC root variable.
5215 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
5216 analogous to how spd is used to handle ident_hash.
5217 (gt_pch_restore_stringpool): Likewise.
5219 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
5221 PR tree-optimization/111794
5222 * tree-vect-stmts.cc (vectorizable_assignment): Add
5223 same-precision exception for dest and source.
5225 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
5227 * config/riscv/autovec.md (popcount<mode>2): New expander.
5228 * config/riscv/riscv-protos.h (expand_popcount): Define.
5229 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
5230 with the WWG algorithm.
5232 2023-10-23 Richard Biener <rguenther@suse.de>
5234 PR tree-optimization/111916
5235 * tree-sra.cc (sra_modify_assign): Do not lower all
5236 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
5238 2023-10-23 Richard Biener <rguenther@suse.de>
5240 PR tree-optimization/111915
5241 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
5242 accesses are either grouped or not.
5244 2023-10-23 Richard Biener <rguenther@suse.de>
5247 * tree-inline.cc (setup_one_parameter): Move code emitting
5248 a dummy load when not optimizing ...
5249 (initialize_inlined_parameters): ... here to after when
5250 we remapped the parameter type.
5252 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
5255 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
5256 Skip over nop move insns.
5258 2023-10-23 Tamar Christina <tamar.christina@arm.com>
5260 PR tree-optimization/111860
5261 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
5262 Drop .MEM nodes only.
5264 2023-10-23 Andrew Pinski <apinski@marvell.com>
5266 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
5269 2023-10-23 Andrew Pinski <pinskia@gmail.com>
5271 * convert.cc (convert_to_pointer_1): Return error_mark_node
5273 (convert_to_real_1): Likewise.
5274 (convert_to_integer_1): Likewise.
5275 (convert_to_complex_1): Likewise.
5277 2023-10-23 Andrew Pinski <pinskia@gmail.com>
5280 * convert.cc (convert_to_complex_1): Return
5281 error_mark_node if either convert was an error
5282 when converting from a scalar.
5284 2023-10-23 Richard Biener <rguenther@suse.de>
5286 PR tree-optimization/111917
5287 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
5288 new conditional after last stmt.
5290 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5293 * config/riscv/riscv-vsetvl.cc: Fix bug.
5295 2023-10-23 Pan Li <pan2.li@intel.com>
5297 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
5299 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
5301 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5303 * doc/invoke.texi (-mexplicit-relocs=style): Document.
5304 (-mexplicit-relocs): Document as an alias of
5305 -mexplicit-relocs=always.
5306 (-mno-explicit-relocs): Document as an alias of
5307 -mexplicit-relocs=none.
5308 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
5311 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5313 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
5315 * config/loongarch/loongarch.md (define_peephole2): Optimize
5316 la.local + ld/st to pcalau12i + ld/st if the address is only used
5317 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
5319 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5321 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
5322 Return true for TLS symbol types if -mexplicit-relocs=auto.
5323 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
5324 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
5325 (loongarch_legitimize_tls_address): Likewise.
5326 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
5327 TARGET_EXPLICIT_RELOCS from insn condition.
5329 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5331 * config/loongarch/loongarch-protos.h
5332 (loongarch_explicit_relocs_p): Declare new function.
5333 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
5335 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
5336 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
5337 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
5338 deciding if return early, instead of using
5339 TARGET_EXPLICIT_RELOCS.
5340 (loongarch_output_move): CAll loongarch_explicit_relocs_p
5341 instead of using TARGET_EXPLICIT_RELOCS.
5342 * config/loongarch/loongarch.md (*low<mode>): Remove
5343 TARGET_EXPLICIT_RELOCS from insn condition.
5344 (@ld_from_got<mode>): Likewise.
5345 * config/loongarch/predicates.md (move_operand): Call
5346 loongarch_explicit_relocs_p instead of using
5347 TARGET_EXPLICIT_RELOCS.
5349 2023-10-23 Xi Ruoyao <xry111@xry111.site>
5351 * config/loongarch/genopts/loongarch-strings: Add strings for
5352 -mexplicit-relocs={auto,none,always}.
5353 * config/loongarch/genopts/loongarch.opt.in: Add options for
5354 -mexplicit-relocs={auto,none,always}.
5355 * config/loongarch/loongarch-str.h: Regenerate.
5356 * config/loongarch/loongarch.opt: Regenerate.
5357 * config/loongarch/loongarch-def.h
5358 (EXPLICIT_RELOCS_AUTO): Define.
5359 (EXPLICIT_RELOCS_NONE): Define.
5360 (EXPLICIT_RELOCS_ALWAYS): Define.
5361 (N_EXPLICIT_RELOCS_TYPES): Define.
5362 * config/loongarch/loongarch.cc
5363 (loongarch_option_override_internal): Error out if the old-style
5364 -m[no-]explicit-relocs option is used with
5365 -mexplicit-relocs={auto,none,always} together. Map
5366 -mno-explicit-relocs to -mexplicit-relocs=none and
5367 -mexplicit-relocs to -mexplicit-relocs=always for backward
5368 compatibility. Set a proper default for -mexplicit-relocs=
5369 based on configure-time probed linker capability. Update a
5370 diagnostic message to mention -mexplicit-relocs=always instead
5371 of the old-style -mexplicit-relocs.
5372 (loongarch_handle_model_attribute): Update a diagnostic message
5373 to mention -mexplicit-relocs=always instead of the old-style
5375 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
5377 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5379 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
5380 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
5382 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5384 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
5386 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
5388 PR tree-optimization/111784
5389 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
5390 adjacent vector stores, by costing them with the total number
5391 rather than costing them one by one.
5392 (vectorizable_load): Adjust costing way for adjacent vector
5393 loads, by costing them with the total number rather than costing
5396 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
5399 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
5400 Do not split to xmm16+ when !TARGET_AVX512VL.
5402 2023-10-23 Pan Li <pan2.li@intel.com>
5404 * config/riscv/riscv-protos.h (enum insn_type): Add new type
5406 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
5408 (expand_vec_ceil): Take MA instead of MU for tmp register.
5409 (expand_vec_floor): Ditto.
5410 (expand_vec_nearbyint): Ditto.
5411 (expand_vec_rint): Ditto.
5412 (expand_vec_round): Ditto.
5413 (expand_vec_roundeven): Ditto.
5415 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
5417 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
5419 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
5422 * expr.cc (can_use_qi_vectors): New function to return true if
5423 we know how to implement OP using vectors of bytes.
5424 (qi_vector_mode_supported_p): New function to check if optabs
5425 exists for the mode and certain by pieces operations.
5426 (widest_fixed_size_mode_for_size): Replace the second argument
5427 with the type of by pieces operations. Call can_use_qi_vectors
5428 and qi_vector_mode_supported_p to do the check. Call
5429 scalar_mode_supported_p to check if the scalar mode is supported.
5430 (by_pieces_ninsns): Pass the type of by pieces operation to
5431 widest_fixed_size_mode_for_size.
5432 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
5433 record the type of by pieces operations.
5434 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
5435 type of by pieces operations, initialize m_op with it. Pass
5436 m_op to function widest_fixed_size_mode_for_size.
5437 (op_by_pieces_d::get_usable_mode): Pass m_op to function
5438 widest_fixed_size_mode_for_size.
5439 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
5440 can_use_qi_vectors and qi_vector_mode_supported_p to do the
5442 (op_by_pieces_d::run): Pass m_op to function
5443 widest_fixed_size_mode_for_size.
5444 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
5445 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
5446 (can_store_by_pieces): Pass the type of by pieces operations to
5447 widest_fixed_size_mode_for_size.
5448 (clear_by_pieces): Initialize class store_by_pieces_d with
5450 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
5453 2023-10-23 liuhongt <hongtao.liu@intel.com>
5455 PR tree-optimization/111820
5456 PR tree-optimization/111833
5457 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
5458 up vectorization for nonlinear iv vect_step_op_mul when
5459 step_expr is not exact_log2 and niters is greater than
5460 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
5461 for nagative niters_skip which will be used by fully masked
5463 (vect_can_advance_ivs_p): Pass whole phi_info to
5464 vect_can_peel_nonlinear_iv_p.
5465 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
5466 init_expr * pow (step_expr, skipn) to init_expr
5467 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
5469 2023-10-23 liuhongt <hongtao.liu@intel.com>
5471 * config/i386/mmx.md (mmx_pinsrw): Remove.
5473 2023-10-22 Andrew Pinski <pinskia@gmail.com>
5476 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
5477 (*cmov_uxtw_insn_insv): Likewise.
5479 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5481 * doc/invoke.texi: Document the new -nodefaultrpaths option.
5482 * doc/install.texi: Document the new --with-darwin-extra-rpath
5485 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5487 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
5489 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5491 * configure.ac: Add --with-darwin-extra-rpath option.
5492 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
5493 * config.in: Regenerate.
5494 * configure: Regenerate.
5496 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5498 * aclocal.m4: Regenerate.
5499 * configure: Regenerate.
5500 * configure.ac: Handle Darwin rpaths.
5501 * config/darwin.h: Handle Darwin rpaths.
5502 * config/darwin.opt: Handle Darwin rpaths.
5503 * Makefile.in: Handle Darwin rpaths.
5505 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
5507 * gcc.cc (RUNPATH_OPTION): New.
5508 (do_spec_1): Provide '%P' as a spec to insert rpaths for
5509 each compiler startfile path.
5511 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
5512 Maxim Blinov <maxim.blinov@embecosm.com>
5513 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5514 Iain Sandoe <iain@sandoe.co.uk>
5516 * config.gcc: Default to heap trampolines on macOS 11 and above.
5517 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
5518 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
5519 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
5521 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
5522 Maxim Blinov <maxim.blinov@embecosm.com>
5523 Iain Sandoe <iain@sandoe.co.uk>
5524 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5526 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
5527 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
5528 * common.opt (ftrampoline-impl): Add option to control
5529 generation of trampoline instantiation (heap or stack).
5530 * coretypes.h: Define enum trampoline_impl.
5531 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
5532 __builtin_adjust_trampoline for heap trampolines.
5533 (finalize_nesting_tree_1): Emit calls to
5534 __builtin_nested_...{created,deleted} if we're generating with
5535 -ftrampoline-impl=heap.
5536 * tree.cc (build_common_builtin_nodes): Build
5537 __builtin_nested_...{created,deleted}.
5538 * doc/invoke.texi (-ftrampoline-impl): Document.
5540 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
5542 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
5543 Prohibit 'E' and 'H' combinations.
5545 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
5547 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
5548 Change version number of the 'Zfa' extension to 1.0.
5550 2023-10-21 Pan Li <pan2.li@intel.com>
5553 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
5554 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
5555 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
5556 macro reference to func.
5557 (vls_mode_valid_p): New func impl for vls mode valid or not.
5558 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
5559 macro reference to func.
5560 * config/riscv/vector-iterators.md: Ditto.
5562 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
5563 Uros Bizjak <ubizjak@gmail.com>
5565 PR middle-end/101955
5566 PR tree-optimization/106245
5567 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
5569 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
5571 * gimple-harden-control-flow.cc: Include memmodel.h.
5573 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
5575 * gimple-harden-control-flow.cc: Include tm_p.h.
5577 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
5579 PR tree-optimization/111882
5580 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
5581 with non-constant offsets.
5583 2023-10-20 Tamar Christina <tamar.christina@arm.com>
5585 PR tree-optimization/111866
5586 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
5587 vect_set_loop_condition during prolog peeling.
5589 2023-10-20 Richard Biener <rguenther@suse.de>
5591 PR tree-optimization/111445
5592 * tree-scalar-evolution.cc (simple_iv_with_niters):
5593 Add missing check for a sign-conversion.
5595 2023-10-20 Richard Biener <rguenther@suse.de>
5597 PR tree-optimization/110243
5598 PR tree-optimization/111336
5599 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
5600 operations with undefined behavior on overflow to
5601 unsigned arithmetic.
5603 2023-10-20 Richard Biener <rguenther@suse.de>
5605 PR tree-optimization/111891
5606 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
5609 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
5611 * config.gcc: Allow --with-arch=gfx1030.
5612 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
5613 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
5614 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
5615 (TARGET_GFX1030): New.
5616 (TARGET_RDNA2): New.
5617 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
5618 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
5619 (subc<mode>3<exec_vcc>): Likewise.
5620 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
5621 (vec_cmp<mode>di): Likewise.
5622 (vec_cmp<u><mode>di): Likewise.
5623 (vec_cmp<mode>di_exec): Likewise.
5624 (vec_cmp<u><mode>di_exec): Likewise.
5625 (vec_cmp<mode>di_dup): Likewise.
5626 (vec_cmp<mode>di_dup_exec): Likewise.
5627 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
5628 (*<reduc_op>_dpp_shr_<mode>): Likewise.
5629 (*plus_carry_dpp_shr_<mode>): Likewise.
5630 (*plus_carry_in_dpp_shr_<mode>): Likewise.
5631 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
5632 (gcn_global_address_p): RDNA2 only allows smaller offsets.
5633 (gcn_addr_space_legitimate_address_p): Likewise.
5634 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
5635 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
5636 (output_file_start): Configure gfx1030.
5637 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
5638 (ASSEMBLER_DIALECT): New.
5639 * config/gcn/gcn.md (rdna): New define_attr.
5640 (enabled): Use "rdna" attribute.
5641 (gcn_return): Remove s_dcache_wb.
5642 (addcsi3_scalar): Add RDNA2 syntax variant.
5643 (addcsi3_scalar_zero): Likewise.
5644 (addptrdi3): Likewise.
5645 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
5646 (*memory_barrier): Add RDNA2 syntax variant.
5647 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
5648 scalar atomics for RDNA2.
5649 (atomic_store<mode>): Likewise.
5650 (atomic_exchange<mode>): Likewise.
5651 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
5652 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
5653 (main): Recognise -march=gfx1030.
5654 * config/gcn/t-omp-device: Add gfx1030 isa.
5656 2023-10-20 Richard Biener <rguenther@suse.de>
5658 PR tree-optimization/111000
5659 * stor-layout.h (element_precision): Move ..
5660 * tree.h (element_precision): .. here.
5661 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
5662 motion of shifts and rotates.
5664 2023-10-20 Alexandre Oliva <oliva@adacore.com>
5666 * tree-core.h (ECF_XTHROW): New macro.
5667 * tree.cc (set_call_expr): Add expected_throw attribute when
5669 (build_common_builtin_node): Add ECF_XTHROW to
5670 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
5671 * calls.cc (flags_from_decl_or_type): Check for expected_throw
5672 attribute to set ECF_XTHROW.
5673 * gimple.cc (gimple_build_call_from_tree): Propagate
5674 ECF_XTHROW from decl flags to gimple call...
5675 (gimple_call_flags): ... and back.
5676 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
5677 (gimple_call_set_expected_throw): New.
5678 (gimple_call_expected_throw_p): New.
5679 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
5680 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
5681 * common.opt (fharden-control-flow-redundancy): New.
5682 (-fhardcfr-check-returning-calls): New.
5683 (-fhardcfr-check-exceptions): New.
5684 (-fhardcfr-check-noreturn-calls=*): New.
5685 (Enum hardcfr_check_noreturn_calls): New.
5686 (fhardcfr-skip-leaf): New.
5687 * doc/invoke.texi: Document them.
5688 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
5689 * flag-types.h (enum hardcfr_noret): New.
5690 * gimple-harden-control-flow.cc: New.
5691 * params.opt (-param=hardcfr-max-blocks=): New.
5692 (-param=hradcfr-max-inline-blocks=): New.
5693 * passes.def (pass_harden_control_flow_redundancy): Add.
5694 * tree-pass.h (make_pass_harden_control_flow_redundancy):
5696 * doc/extend.texi: Document expected_throw attribute.
5698 2023-10-20 Alex Coplan <alex.coplan@arm.com>
5700 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
5701 ::remove_insn on deleted insns.
5703 2023-10-20 Richard Biener <rguenther@suse.de>
5705 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
5707 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
5710 * config/sh/sh.md (unnamed split pattern): Fix comparison of
5711 find_regno_note result.
5713 2023-10-20 Richard Biener <rguenther@suse.de>
5715 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
5716 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
5719 2023-10-20 Richard Biener <rguenther@suse.de>
5721 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
5722 off_arg3_arg2_map): New.
5723 (vect_get_operand_map): Get flag whether the stmt was
5724 recognized as gather or scatter and use the above
5726 (vect_get_and_check_slp_defs): Adjust.
5727 (vect_build_slp_tree_2): Likewise.
5729 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5731 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
5732 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
5733 (pre_vsetvl::emit_vsetvl): Ditto.
5735 2023-10-20 Tamar Christina <tamar.christina@arm.com>
5736 Andre Vieira <andre.simoesdiasvieira@arm.com>
5738 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
5739 (get_loop_body_if_conv_order): ... to here.
5740 (if_convertible_loop_p): Remove single_exit check.
5741 (tree_if_conversion): Move single_exit check to if-conversion part and
5742 support multiple exits.
5744 2023-10-20 Tamar Christina <tamar.christina@arm.com>
5745 Andre Vieira <andre.simoesdiasvieira@arm.com>
5747 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
5748 from original statement.
5749 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
5751 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5754 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
5755 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
5757 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
5762 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
5764 (compute_reaching_defintion): New.
5765 (enum vsetvl_type): Moved.
5766 (vlmax_avl_p): Moved.
5767 (enum emit_type): Moved.
5768 (vlmul_to_str): Moved.
5769 (vlmax_avl_insn_p): Removed.
5770 (policy_to_str): Moved.
5771 (loop_basic_block_p): Removed.
5772 (valid_sew_p): Removed.
5773 (vsetvl_insn_p): Moved.
5774 (vsetvl_vtype_change_only_p): Removed.
5775 (after_or_same_p): Removed.
5776 (before_p): Removed.
5777 (anticipatable_occurrence_p): Removed.
5778 (available_occurrence_p): Removed.
5779 (insn_should_be_added_p): Removed.
5780 (get_all_sets): Moved.
5781 (get_same_bb_set): Moved.
5782 (gen_vsetvl_pat): Removed.
5783 (calculate_vlmul): Moved.
5784 (get_max_int_sew): New.
5785 (emit_vsetvl_insn): Removed.
5786 (get_max_float_sew): New.
5787 (eliminate_insn): Removed.
5788 (insert_vsetvl): Removed.
5789 (count_regno_occurrences): Moved.
5790 (get_vl_vtype_info): Removed.
5791 (enum def_type): Moved.
5792 (validate_change_or_fail): Moved.
5793 (change_insn): Removed.
5794 (get_all_real_uses): Moved.
5795 (get_forward_read_vl_insn): Removed.
5796 (get_backward_fault_first_load_insn): Removed.
5797 (change_vsetvl_insn): Removed.
5798 (avl_source_has_vsetvl_p): Removed.
5799 (source_equal_p): Moved.
5800 (calculate_sew): Removed.
5801 (same_equiv_note_p): Moved.
5803 (incompatible_avl_p): Removed.
5805 (different_sew_p): Removed.
5806 (get_bb_index): New.
5807 (different_lmul_p): Removed.
5808 (has_no_uses): Moved.
5809 (different_ratio_p): Removed.
5810 (different_tail_policy_p): Removed.
5811 (different_mask_policy_p): Removed.
5812 (possible_zero_avl_p): Removed.
5813 (enum demand_flags): New.
5814 (second_ratio_invalid_for_first_sew_p): Removed.
5815 (second_ratio_invalid_for_first_lmul_p): Removed.
5817 (float_insn_valid_sew_p): Removed.
5818 (second_sew_less_than_first_sew_p): Removed.
5819 (first_sew_less_than_second_sew_p): Removed.
5820 (class vsetvl_info): New.
5821 (compare_lmul): Removed.
5822 (second_lmul_less_than_first_lmul_p): Removed.
5823 (second_ratio_less_than_first_ratio_p): Removed.
5824 (DEF_INCOMPATIBLE_COND): Removed.
5825 (greatest_sew): Removed.
5826 (first_sew): Removed.
5827 (second_sew): Removed.
5828 (first_vlmul): Removed.
5829 (second_vlmul): Removed.
5830 (first_ratio): Removed.
5831 (second_ratio): Removed.
5832 (vlmul_for_first_sew_second_ratio): Removed.
5833 (vlmul_for_greatest_sew_second_ratio): Removed.
5834 (ratio_for_second_sew_first_vlmul): Removed.
5835 (class vsetvl_block_info): New.
5836 (DEF_SEW_LMUL_FUSE_RULE): New.
5837 (always_unavailable): Removed.
5838 (avl_unavailable_p): Removed.
5839 (class demand_system): New.
5840 (sew_unavailable_p): Removed.
5841 (lmul_unavailable_p): Removed.
5842 (ge_sew_unavailable_p): Removed.
5843 (ge_sew_lmul_unavailable_p): Removed.
5844 (ge_sew_ratio_unavailable_p): Removed.
5845 (DEF_UNAVAILABLE_COND): Removed.
5846 (same_sew_lmul_demand_p): Removed.
5847 (propagate_avl_across_demands_p): Removed.
5848 (reg_available_p): Removed.
5849 (support_relaxed_compatible_p): Removed.
5850 (demands_can_be_fused_p): Removed.
5851 (earliest_pred_can_be_fused_p): Removed.
5852 (vsetvl_dominated_by_p): Removed.
5853 (avl_info::avl_info): Removed.
5854 (avl_info::single_source_equal_p): Removed.
5855 (avl_info::multiple_source_equal_p): Removed.
5856 (DEF_SEW_LMUL_RULE): New.
5857 (avl_info::operator=): Removed.
5858 (avl_info::operator==): Removed.
5859 (DEF_POLICY_RULE): New.
5860 (avl_info::operator!=): Removed.
5861 (avl_info::has_non_zero_avl): Removed.
5862 (vl_vtype_info::vl_vtype_info): Removed.
5863 (vl_vtype_info::operator==): Removed.
5864 (DEF_AVL_RULE): New.
5865 (vl_vtype_info::operator!=): Removed.
5866 (vl_vtype_info::same_avl_p): Removed.
5867 (vl_vtype_info::same_vtype_p): Removed.
5868 (vl_vtype_info::same_vlmax_p): Removed.
5869 (vector_insn_info::operator>=): Removed.
5870 (vector_insn_info::operator==): Removed.
5871 (class pre_vsetvl): New.
5872 (vector_insn_info::parse_insn): Removed.
5873 (vector_insn_info::compatible_p): Removed.
5874 (vector_insn_info::skip_avl_compatible_p): Removed.
5875 (vector_insn_info::compatible_avl_p): Removed.
5876 (vector_insn_info::compatible_vtype_p): Removed.
5877 (vector_insn_info::available_p): Removed.
5878 (vector_insn_info::fuse_avl): Removed.
5879 (vector_insn_info::fuse_sew_lmul): Removed.
5880 (vector_insn_info::fuse_tail_policy): Removed.
5881 (vector_insn_info::fuse_mask_policy): Removed.
5882 (vector_insn_info::local_merge): Removed.
5883 (vector_insn_info::global_merge): Removed.
5884 (vector_insn_info::get_avl_or_vl_reg): Removed.
5885 (vector_insn_info::update_fault_first_load_avl): Removed.
5886 (vector_insn_info::dump): Removed.
5887 (vector_infos_manager::vector_infos_manager): Removed.
5888 (vector_infos_manager::create_expr): Removed.
5889 (vector_infos_manager::get_expr_id): Removed.
5890 (vector_infos_manager::all_same_ratio_p): Removed.
5891 (vector_infos_manager::all_avail_in_compatible_p): Removed.
5892 (vector_infos_manager::all_same_avl_p): Removed.
5893 (vector_infos_manager::expr_set_num): Removed.
5894 (vector_infos_manager::release): Removed.
5895 (vector_infos_manager::create_bitmap_vectors): Removed.
5896 (vector_infos_manager::free_bitmap_vectors): Removed.
5897 (vector_infos_manager::dump): Removed.
5898 (class pass_vsetvl): Adjust.
5899 (pass_vsetvl::get_vector_info): Removed.
5900 (pass_vsetvl::get_block_info): Removed.
5901 (pass_vsetvl::update_vector_info): Removed.
5902 (pass_vsetvl::update_block_info): Removed.
5903 (pre_vsetvl::compute_avl_def_data): New.
5904 (pass_vsetvl::simple_vsetvl): Removed.
5905 (pass_vsetvl::compute_local_backward_infos): Removed.
5906 (pass_vsetvl::need_vsetvl): Removed.
5907 (pass_vsetvl::transfer_before): Removed.
5908 (pass_vsetvl::transfer_after): Removed.
5909 (pre_vsetvl::compute_vsetvl_def_data): New.
5910 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
5911 (pass_vsetvl::prune_expressions): Removed.
5912 (pass_vsetvl::compute_local_properties): Removed.
5913 (pre_vsetvl::compute_lcm_local_properties): New.
5914 (pass_vsetvl::earliest_fusion): Removed.
5915 (pre_vsetvl::fuse_local_vsetvl_info): New.
5916 (pass_vsetvl::vsetvl_fusion): Removed.
5917 (pass_vsetvl::can_refine_vsetvl_p): Removed.
5918 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
5919 (pass_vsetvl::refine_vsetvls): Removed.
5920 (pass_vsetvl::cleanup_vsetvls): Removed.
5921 (pass_vsetvl::commit_vsetvls): Removed.
5922 (pass_vsetvl::pre_vsetvl): Removed.
5923 (pass_vsetvl::get_vsetvl_at_end): Removed.
5924 (local_avl_compatible_p): Removed.
5925 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
5926 (pre_vsetvl::pre_global_vsetvl_info): New.
5927 (get_first_vsetvl_before_rvv_insns): Removed.
5928 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
5929 (pre_vsetvl::emit_vsetvl): New.
5930 (pass_vsetvl::ssa_post_optimization): Removed.
5931 (pre_vsetvl::cleaup): New.
5932 (pre_vsetvl::remove_avl_operand): New.
5933 (pass_vsetvl::df_post_optimization): Removed.
5934 (pre_vsetvl::remove_unused_dest_operand): New.
5935 (pass_vsetvl::init): Removed.
5936 (pass_vsetvl::done): Removed.
5937 (pass_vsetvl::compute_probabilities): Removed.
5938 (pass_vsetvl::lazy_vsetvl): Adjust.
5939 (pass_vsetvl::execute): Adjust.
5940 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
5941 (DEF_SEW_LMUL_RULE): New.
5942 (DEF_SEW_LMUL_FUSE_RULE): Removed.
5943 (DEF_POLICY_RULE): New.
5944 (DEF_UNAVAILABLE_COND): Removed
5945 (DEF_AVL_RULE): New demand type.
5946 (sew_lmul): New demand type.
5947 (ratio_only): New demand type.
5948 (sew_only): New demand type.
5949 (ge_sew): New demand type.
5950 (ratio_and_ge_sew): New demand type.
5951 (tail_mask_policy): New demand type.
5952 (tail_policy_only): New demand type.
5953 (mask_policy_only): New demand type.
5954 (ignore_policy): New demand type.
5955 (avl): New demand type.
5956 (non_zero_avl): New demand type.
5957 (ignore_avl): New demand type.
5958 * config/riscv/t-riscv: Removed riscv-vsetvl.h
5959 * config/riscv/riscv-vsetvl.h: Removed.
5961 2023-10-20 Alexandre Oliva <oliva@adacore.com>
5963 * tree-eh.cc (make_eh_edges): Return the new edge.
5964 * tree-eh.h (make_eh_edges): Likewise.
5966 2023-10-19 Marek Polacek <polacek@redhat.com>
5968 * doc/contrib.texi: Add entry for Patrick Palka.
5970 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
5972 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
5973 compatible with mask parameters in clone.
5974 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
5976 (vectorizable_simd_clone_call): Enable the use of masked clones in
5979 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
5981 PR tree-optimization/110485
5982 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
5983 vectors usage if a notinbranch simdclone has been selected.
5985 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
5987 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
5988 simd clone calls and only use types that are mapped to vectors.
5989 (simd_clone_call_p): New helper function.
5991 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
5993 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
5994 poly NIT and ALT_BOUND.
5996 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
5998 * tree-parloops.cc (create_loop_fn): Copy specific target and
5999 optimization options to clone.
6001 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
6003 * omp-simd-clone.cc (simd_clone_subparts): Remove.
6004 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
6005 TYPE_VECTOR_SUBPARTS.
6006 (ipa_simd_modify_function_body): Likewise.
6007 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
6008 (simd_clone_subparts): Remove.
6010 2023-10-19 Jason Merrill <jason@redhat.com>
6012 * ABOUT-GCC-NLS: Add usage guidance.
6014 2023-10-19 Jason Merrill <jason@redhat.com>
6016 * diagnostic-core.h (permerror): Rename new overloads...
6017 (permerror_opt): To this.
6018 * diagnostic.cc: Likewise.
6020 2023-10-19 Tamar Christina <tamar.christina@arm.com>
6022 PR tree-optimization/111860
6023 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
6024 Remove PHI nodes that dominate loop.
6026 2023-10-19 Richard Biener <rguenther@suse.de>
6028 PR tree-optimization/111131
6029 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
6030 sure to update all gather/scatter stmt DRs, not only those
6031 that eventually got VMAT_GATHER_SCATTER set.
6032 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
6033 (vect_get_and_check_slp_defs): Handle gathers/scatters,
6034 adding the offset as SLP operand and comparing base and scale.
6035 (vect_build_slp_tree_1): Handle gathers.
6036 (vect_build_slp_tree_2): Likewise.
6038 2023-10-19 Richard Biener <rguenther@suse.de>
6040 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
6042 (vect_build_one_gather_load_call): ... this. Refactor,
6043 inline widening/narrowing support ...
6044 (vectorizable_load): ... here, do gather vectorization
6045 with builtin decls along other gather vectorization.
6047 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6049 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
6050 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
6051 (store_pair_dw_tftf): Rename to ...
6052 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
6053 * config/aarch64/iterators.md (TX2): New.
6055 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6057 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
6058 parameter to give final insn position, infer use of mem if it isn't
6059 specified explicitly.
6060 (function_info::change_insns): Pass down final insn position to
6061 finalize_new_accesses.
6062 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
6064 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6066 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
6067 * rtl-ssa/functions.h (function_info): Declare new member
6068 function reparent_use.
6070 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6072 * rtl-ssa/access-utils.h (drop_memory_access): New.
6074 2023-10-19 Alex Coplan <alex.coplan@arm.com>
6076 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
6077 update the prev pointer on the following nondebug insn in the
6078 case that !insn->is_debug_insn () && next->is_debug_insn ().
6080 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
6082 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
6083 Also make Clearwater Forest depends on Sierra Forest.
6084 * config/i386/i386-options.cc: Revise the order of the macro
6085 definition to avoid confusion.
6086 * doc/extend.texi: Revise documentation.
6087 * doc/invoke.texi: Correct documentation.
6089 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
6091 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
6092 Implement support for --with-multilib-list.
6093 * config/gcn/t-gcn-hsa: Likewise.
6094 * doc/install.texi: Likewise.
6095 * doc/invoke.texi: Mark Fiji deprecated.
6097 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
6099 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
6100 vector_costs. Add a constructor.
6101 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
6102 adjust the cost for inner loops.
6103 (loongarch_vector_costs::count_operations): New function.
6104 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
6105 (loongarch_vector_costs::finish_cost): Ditto.
6106 (loongarch_builtin_vectorization_cost): Adjust.
6107 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
6108 (loongarcg-vect-issue-info): Ditto.
6109 (mmemvec-cost): Delete.
6110 * config/loongarch/genopts/loongarch.opt.in
6111 (loongarch-vect-unroll-limit): Ditto.
6112 (loongarcg-vect-issue-info): Ditto.
6113 (mmemvec-cost): Delete.
6114 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
6116 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
6118 * config/loongarch/lasx.md
6119 (vec_widen_<su>mult_even_v8si): New patterns.
6120 (vec_widen_<su>add_hi_<mode>): Ditto.
6121 (vec_widen_<su>add_lo_<mode>): Ditto.
6122 (vec_widen_<su>sub_hi_<mode>): Ditto.
6123 (vec_widen_<su>sub_lo_<mode>): Ditto.
6124 (vec_widen_<su>mult_hi_<mode>): Ditto.
6125 (vec_widen_<su>mult_lo_<mode>): Ditto.
6126 * config/loongarch/loongarch.md (u_bool): New iterator.
6127 * config/loongarch/loongarch-protos.h
6128 (loongarch_expand_vec_widen_hilo): New prototype.
6129 * config/loongarch/loongarch.cc
6130 (loongarch_expand_vec_interleave): New function.
6131 (loongarch_expand_vec_widen_hilo): New function.
6133 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
6135 * config/loongarch/lasx.md
6136 (avg<mode>3_ceil): New patterns.
6137 (uavg<mode>3_ceil): Ditto.
6138 (avg<mode>3_floor): Ditto.
6139 (uavg<mode>3_floor): Ditto.
6142 * config/loongarch/lsx.md
6143 (avg<mode>3_ceil): New patterns.
6144 (uavg<mode>3_ceil): Ditto.
6145 (avg<mode>3_floor): Ditto.
6146 (uavg<mode>3_floor): Ditto.
6150 2023-10-18 Andrew Pinski <pinskia@gmail.com>
6152 PR middle-end/111863
6153 * expr.cc (do_store_flag): Don't over write arg0
6154 when stripping off `& POW2`.
6156 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
6158 PR tree-optimization/111648
6159 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
6160 chooses base element from arg, ensure that it's a natural stepped
6162 (build_vec_cst_rand): New param natural_stepped and use it to
6163 construct a naturally stepped sequence.
6164 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
6166 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
6168 * config/pru/pru.cc (pru_insn_cost): New function.
6169 (TARGET_INSN_COST): Define for PRU.
6171 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
6173 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
6174 Test <= instead of testing < twice.
6176 2023-10-18 Jakub Jelinek <jakub@redhat.com>
6179 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
6180 using rtx_def type for memory_extend_buf, use unsigned char
6181 arrayy with size of rtx_def and its alignment.
6183 2023-10-18 Jason Merrill <jason@redhat.com>
6185 * doc/invoke.texi: Move -fpermissive to Warning Options.
6186 * diagnostic.cc (update_effective_level_from_pragmas): Remove
6187 redundant system header check.
6188 (diagnostic_report_diagnostic): Move down syshdr/-w check.
6189 (diagnostic_impl): Handle DK_PERMERROR with an option number.
6190 (permerror): Add new overloads.
6191 * diagnostic-core.h (permerror): Declare them.
6193 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
6195 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
6196 to avoid that auxillary statement list reaches LTO.
6198 2023-10-18 Jakub Jelinek <jakub@redhat.com>
6200 PR tree-optimization/111845
6201 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
6202 statements for the 4 operand addition or subtraction of 3 operands
6203 from 1 operand cases and remove them when successful. Look for
6204 nested additions even from rhs[2], not just rhs[1].
6206 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
6209 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
6210 instead of an assert ICE when no -march= has been specified.
6212 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
6214 * config.in: Regenerate.
6215 * config/darwin.cc (darwin_file_start): Add assembler directives
6216 for the target OS version, where these are supported by the
6218 (darwin_override_options): Check for building >= macOS 10.14.
6219 * configure: Regenerate.
6220 * configure.ac: Check for assembler support of .build_version
6223 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6225 PR tree-optimization/109154
6226 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
6227 (typedef struct ifcvt_arg_entry): New.
6228 (cmp_arg_entry): New.
6229 (gen_phi_arg_condition, gen_phi_nest_statement,
6230 predicate_scalar_phi): Use them.
6232 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6234 PR tree-optimization/109154
6235 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
6236 Rewrite to new syntax.
6237 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
6240 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6242 PR tree-optimization/109154
6243 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
6245 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6247 PR tree-optimization/109154
6248 * match.pd: Add new cond_op rule.
6250 2023-10-18 Xi Ruoyao <xry111@xry111.site>
6252 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
6255 2023-10-18 Richard Biener <rguenther@suse.de>
6257 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
6258 Relax check to again allow passing integer mode masks
6259 as traditional vectors.
6261 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6263 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
6264 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
6266 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
6267 (find_guard_arg): Look value up through explicit edge and original defs.
6268 (vect_do_peeling): Use it.
6269 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
6270 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
6272 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
6273 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
6274 optional param to turn off LCSSA mode.
6276 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6278 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
6279 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
6281 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
6282 (vec_init_loop_exit_info): Extend analysis when multiple exits.
6283 (vect_analyze_loop_form): Record conds and determine main cond.
6284 (vect_create_loop_vinfo): Extend bookkeeping of conds.
6285 (vect_analyze_loop): Release conds.
6286 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
6287 LOOP_VINFO_LOOP_IV_COND): New.
6288 (struct vect_loop_form_info): Add conds, alt_loop_conds;
6289 (struct loop_vec_info): Add conds, loop_iv_cond.
6291 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6293 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
6294 (loop_distribution::distribute_loop): Bail out of not single exit.
6295 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
6296 * tree-scalar-evolution.h (get_loop_exit_condition): New.
6297 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
6299 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
6300 vect_set_loop_condition_partial_vectors_avx512,
6301 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
6303 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
6304 return new peeled corresponding peeled exit.
6305 (slpeel_can_duplicate_loop_p): Explicitly take exit.
6306 (find_loop_location): Handle not knowing an explicit exit.
6307 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
6308 find_guard_arg, slpeel_update_phi_nodes_for_loops,
6309 slpeel_update_phi_nodes_for_guard2): Use new exits.
6310 (vect_do_peeling): Update bookkeeping to keep track of exits.
6311 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
6313 (vec_init_loop_exit_info): New.
6314 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
6315 vec_epilogue_loop_iv, scalar_loop_iv.
6316 (vect_analyze_loop_form): Initialize exits.
6317 (vect_create_loop_vinfo): Set main exit.
6318 (vect_create_epilog_for_reduction, vectorizable_live_operation,
6319 vect_transform_loop): Use it.
6320 (scale_profile_for_vect_loop): Explicitly take exit to scale.
6321 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
6322 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
6323 LOOP_VINFO_SCALAR_IV_EXIT): New.
6324 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
6326 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
6327 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
6328 (vec_init_loop_exit_info): New.
6329 (struct vect_loop_form_info): Add loop_exit.
6331 2023-10-18 Tamar Christina <tamar.christina@arm.com>
6333 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
6335 (vectorizable_comparison_1): ...This.
6337 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6339 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
6340 (expand_vec_perm_const_1): Add consecutive pattern recognition.
6342 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
6344 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
6346 * common/config/i386/i386-common.cc (processor_name):
6348 (processor_alias_table): Ditto.
6349 * common/config/i386/i386-cpuinfo.h (enum processor_types):
6350 Add INTEL_PANTHERLAKE.
6351 * config.gcc: Add -march=pantherlake.
6352 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
6353 the if clause. Handle pantherlake.
6354 * config/i386/i386-c.cc (ix86_target_macros_internal):
6356 * config/i386/i386-options.cc (processor_cost_table): Ditto.
6357 (m_PANTHERLAKE): New.
6358 (m_CORE_HYBRID): Add pantherlake.
6359 * config/i386/i386.h (enum processor_type): Ditto.
6360 * doc/extend.texi: Ditto.
6361 * doc/invoke.texi: Ditto.
6363 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
6365 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
6366 * config/i386/x86-tune.def: Replace hybrid client tune to
6369 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
6371 * common/config/i386/cpuinfo.h
6372 (get_intel_cpu): Handle Clearwater Forest.
6373 * common/config/i386/i386-common.cc (processor_name):
6374 Add Clearwater Forest.
6375 (processor_alias_table): Ditto.
6376 * common/config/i386/i386-cpuinfo.h (enum processor_types):
6377 Add INTEL_CLEARWATERFOREST.
6378 * config.gcc: Add -march=clearwaterforest.
6379 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
6381 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
6382 * config/i386/i386-options.cc (processor_cost_table): Ditto.
6383 (m_CLEARWATERFOREST): New.
6384 (m_CORE_ATOM): Add clearwaterforest.
6385 * config/i386/i386.h (enum processor_type): Ditto.
6386 * doc/extend.texi: Ditto.
6387 * doc/invoke.texi: Ditto.
6389 2023-10-18 liuhongt <hongtao.liu@intel.com>
6391 * config/i386/mmx.md (fma<mode>4): New expander.
6392 (fms<mode>4): Ditto.
6393 (fnma<mode>4): Ditto.
6394 (fnms<mode>4): Ditto.
6395 (vec_fmaddsubv4hf4): Ditto.
6396 (vec_fmsubaddv4hf4): Ditto.
6398 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6401 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
6403 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
6405 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
6406 the position of the LR save slot dependent on stack clash
6407 protection unless shadow call stacks are enabled.
6409 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
6411 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
6412 store the list saved GPRs, FPRs and predicate registers.
6413 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
6414 the lists of saved registers. Use them to choose push candidates.
6415 Invalidate pop candidates if we're not going to do a pop.
6416 (aarch64_next_callee_save): Delete.
6417 (aarch64_save_callee_saves): Take a list of registers,
6418 rather than a range. Make !skip_wb select only write-back
6420 (aarch64_expand_prologue): Update calls accordingly.
6421 (aarch64_restore_callee_saves): Take a list of registers,
6422 rather than a range. Always skip pop candidates. Also skip
6423 LR if shadow call stacks are enabled.
6424 (aarch64_expand_epilogue): Update calls accordingly.
6426 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
6428 * cfgbuild.h (find_sub_basic_blocks): Declare.
6429 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
6431 (find_many_sub_basic_blocks): ...here.
6432 (find_sub_basic_blocks): New function.
6433 * function.cc (thread_prologue_and_epilogue_insns): Handle
6434 epilogues that contain jumps.
6436 2023-10-17 Andrew Pinski <apinski@marvell.com>
6438 PR tree-optimization/110817
6439 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
6440 check for boolean type as they don't have "[0,1]" range.
6442 2023-10-17 Andrew Pinski <pinskia@gmail.com>
6444 PR tree-optimization/111432
6445 * match.pd (`a & (x | CST)`): New pattern.
6447 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
6449 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
6452 2023-10-17 Richard Biener <rguenther@suse.de>
6454 PR tree-optimization/111846
6455 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
6456 (SLP_TREE_SIMD_CLONE_INFO): New.
6457 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
6458 SLP_TREE_SIMD_CLONE_INFO.
6459 (_slp_tree::~_slp_tree): Release it.
6460 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
6461 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
6462 dependent on if we're doing SLP.
6464 2023-10-17 Jakub Jelinek <jakub@redhat.com>
6466 * wide-int-print.h (print_dec_buf_size): For length, divide number
6467 of bits by 3 and add 3 instead of division by 4 and adding 4.
6468 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
6469 print_hex, instead call print_decu on either negated value after
6470 printing - or on wi itself.
6471 (print_decu): Don't call print_hex, instead print even large numbers
6473 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
6474 even if it returns false.
6475 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
6476 pp_wide_int_large should be used.
6477 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
6478 to compute needed buffer size.
6480 2023-10-17 Richard Biener <rguenther@suse.de>
6482 PR middle-end/111818
6483 * tree-ssa.cc (maybe_optimize_var): When clearing
6484 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
6486 2023-10-17 Richard Biener <rguenther@suse.de>
6488 PR tree-optimization/111807
6489 * tree-sra.cc (build_ref_for_model): Only call
6490 build_reconstructed_reference when the offsets are the same.
6492 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
6495 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
6497 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
6499 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
6500 fix impl related to vec_initv32qiv16qi template to avoid ICE.
6502 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
6503 Chenghua Xu <xuchenghua@loongson.cn>
6505 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
6508 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6510 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
6511 (get_store_value): New function.
6513 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
6515 * explow.cc (probe_stack_range): Handle case when expand_binop
6516 does not construct its result in the expected location.
6518 2023-10-16 David Malcolm <dmalcolm@redhat.com>
6520 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
6521 default for -fdiagnostics-text-art-charset from emoji to ascii.
6522 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
6524 2023-10-16 David Malcolm <dmalcolm@redhat.com>
6526 * diagnostic.cc (diagnostic_initialize): Ensure
6527 context->extra_output_kind is initialized.
6529 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
6531 * config/i386/i386.cc (ix86_can_inline_p):
6532 Handle CM_LARGE and CM_LARGE_PIC.
6533 (x86_elf_aligned_decl_common): Ditto.
6534 (x86_output_aligned_bss): Ditto.
6535 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
6536 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
6538 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
6540 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
6541 prototype. Improve comment.
6542 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
6543 into riscv-string.cc.
6544 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
6545 (riscv_expand_block_move): Likewise.
6546 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
6548 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
6549 (riscv_expand_block_move): Likewise.
6551 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
6553 * Makefile.in: Add fold-mem-offsets.o.
6554 * passes.def: Schedule a new pass.
6555 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
6556 * common.opt: New options.
6557 * doc/invoke.texi: Document new option.
6558 * fold-mem-offsets.cc: New file.
6560 2023-10-16 Andrew Pinski <pinskia@gmail.com>
6562 PR tree-optimization/101541
6563 * match.pd (A CMP 0 ? A : -A): Improve
6564 using bitwise_equal_p.
6566 2023-10-16 Andrew Pinski <pinskia@gmail.com>
6568 PR tree-optimization/31531
6569 * match.pd (~X op ~Y): Allow for an optional nop convert.
6570 (~X op C): Likewise.
6572 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
6574 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
6575 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
6577 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6579 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
6580 unsigned vector element.
6582 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6584 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
6586 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
6588 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
6590 * gimple-fold.cc (size_must_be_zero_p): Likewise.
6591 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
6592 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
6593 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
6595 2023-10-16 liuhongt <hongtao.liu@intel.com>
6597 * config/i386/mmx.md (V2FI_32): New mode iterator
6598 (movd_v2hf_to_sse): Rename to ..
6599 (movd_<mode>_to_sse): .. this.
6600 (movd_v2hf_to_sse_reg): Rename to ..
6601 (movd_<mode>_to_sse_reg): .. this.
6602 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
6604 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
6605 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
6606 (float<floatunssuffix>v2siv2hf2): Ditto.
6607 (extendv2hfv2sf2): Ditto.
6608 (truncv2sfv2hf2): Ditto.
6609 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
6610 (*vec_concat<mode>_movss): .. this.
6612 2023-10-16 liuhongt <hongtao.liu@intel.com>
6614 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
6616 (ix86_expand_round_sse4): Ditto.
6617 * config/i386/i386.md (roundhf2): New expander.
6618 (lroundhf<mode>2): Ditto.
6619 (lrinthf<mode>2): Ditto.
6620 (l<rounding_insn>hf<mode>2): Ditto.
6621 * config/i386/mmx.md (sqrt<mode>2): Ditto.
6622 (btrunc<mode>2): Ditto.
6623 (nearbyint<mode>2): Ditto.
6624 (rint<mode>2): Ditto.
6625 (lrint<mode><mmxintvecmodelower>2): Ditto.
6626 (floor<mode>2): Ditto.
6627 (lfloor<mode><mmxintvecmodelower>2): Ditto.
6628 (ceil<mode>2): Ditto.
6629 (lceil<mode><mmxintvecmodelower>2): Ditto.
6630 (round<mode>2): Ditto.
6631 (lround<mode><mmxintvecmodelower>2): Ditto.
6632 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
6633 (lfloor<mode><sseintvecmodelower>2): Ditto.
6634 (lceil<mode><sseintvecmodelower>2): Ditto.
6635 (lround<mode><sseintvecmodelower>2): Ditto.
6636 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
6637 (round<mode>2): Extend to V8HF/V16HF/V32HF.
6639 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
6641 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
6642 @code; document more completely the supported Fortran sentinels.
6644 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
6646 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
6647 instead of expand_binop. Optimize cases (i.e. avoid generating
6648 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
6649 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
6651 2023-10-15 Jakub Jelinek <jakub@redhat.com>
6653 PR tree-optimization/111800
6654 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
6655 print_decu_buf_size, print_hex_buf_size): New inline functions.
6656 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
6657 (assert_hexeq): Use print_hex_buf_size.
6658 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
6659 (print_decu): Use print_decu_buf_size.
6660 (print_hex): Use print_hex_buf_size.
6661 (pp_wide_int_large): Use print_dec_buf_size.
6662 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
6663 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
6665 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
6666 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
6668 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6670 * combine.cc (simplify_compare_const): Fix handling of unsigned
6673 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6675 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
6677 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
6679 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
6680 'omp allocate' for stack variables.
6682 2023-10-14 Jakub Jelinek <jakub@redhat.com>
6685 * tree-core.h (struct tree_base): Remove int_length.offset
6686 member, change type of int_length.unextended and int_length.extended
6687 from unsigned char to unsigned short.
6688 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
6689 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
6690 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
6691 TREE_INT_CST_NUNITS.
6692 * tree.cc (wide_int_to_tree_1): Don't assert
6693 TREE_INT_CST_OFFSET_NUNITS value.
6694 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
6695 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
6696 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
6697 (trailing_wide_int_storage): Change m_len type from unsigned char *
6698 to unsigned short *.
6699 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
6700 argument from unsigned char * to unsigned short *.
6701 (trailing_wide_ints): Change m_max_len type from unsigned char to
6702 unsigned short. Change m_len element type from
6703 struct{unsigned char len;} to unsigned short.
6704 (trailing_wide_ints <N>::operator []): Remove .len from m_len
6706 * value-range-storage.h (irange_storage::lengths_address): Change
6707 return type from const unsigned char * to const unsigned short *.
6708 (irange_storage::write_lengths_address): Change return type from
6709 unsigned char * to unsigned short *.
6710 * value-range-storage.cc (irange_storage::write_lengths_address):
6712 (irange_storage::lengths_address): Change return type from
6713 const unsigned char * to const unsigned short *.
6714 (write_wide_int): Change len argument type from unsigned char *&
6715 to unsigned short *&.
6716 (irange_storage::set_irange): Change len variable type from
6717 unsigned char * to unsigned short *.
6718 (read_wide_int): Change len argument type from unsigned char to
6719 unsigned short. Use trailing_wide_int_storage <unsigned short>
6720 instead of trailing_wide_int_storage and
6721 trailing_wide_int <unsigned short> instead of trailing_wide_int.
6722 (irange_storage::get_irange): Change len variable type from
6723 unsigned char * to unsigned short *.
6724 (irange_storage::size): Multiply n by sizeof (unsigned short)
6725 in len_size variable initialization.
6726 (irange_storage::dump): Change len variable type from
6727 unsigned char * to unsigned short *.
6729 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6731 * config/riscv/vector-iterators.md: Remove redundant iterators.
6733 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
6735 PR tree-optimization/111622
6736 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
6737 register a partial equivalence if an operand has no uses.
6739 2023-10-13 Richard Biener <rguenther@suse.de>
6741 PR tree-optimization/111795
6742 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
6743 integer mode mask arguments.
6745 2023-10-13 Richard Biener <rguenther@suse.de>
6747 * tree-vect-slp.cc (mask_call_maps): New.
6748 (vect_get_operand_map): Handle IFN_MASK_CALL.
6749 (vect_build_slp_tree_1): Likewise.
6750 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
6753 2023-10-13 Richard Biener <rguenther@suse.de>
6755 PR tree-optimization/111779
6756 * tree-sra.cc (sra_handled_bf_read_p): New function.
6757 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
6758 (sra_modify_expr): Likewise.
6759 (make_fancy_name_1): Skip over BIT_FIELD_REF.
6761 2023-10-13 Richard Biener <rguenther@suse.de>
6763 PR tree-optimization/111773
6764 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
6765 not elide noreturn calls that are reflected to the IL.
6767 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
6769 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
6771 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
6773 2023-10-13 Pan Li <pan2.li@intel.com>
6775 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
6776 pattern for lfloor/lfloorf.
6777 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
6778 (expand_vec_lfloor): New func decl for expanding lfloor.
6779 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
6780 for expanding lfloor.
6782 2023-10-13 Pan Li <pan2.li@intel.com>
6784 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
6785 pattern] for lceil/lceilf.
6786 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
6787 (expand_vec_lceil): New func decl for expanding lceil.
6788 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
6789 for expanding lceil.
6791 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
6794 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
6795 code from shifts that are undefined.
6796 (can_be_built_by_li_lis_and_rldicr): Likewise.
6797 (can_be_built_by_li_and_rldic): Protect code from shifts that
6798 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
6800 2023-10-12 Alex Coplan <alex.coplan@arm.com>
6802 * reg-notes.def (NOALIAS): Correct comment.
6804 2023-10-12 Jakub Jelinek <jakub@redhat.com>
6807 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
6809 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
6810 (wi::ints_for): Provide separate partial specializations for
6811 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
6812 and CONST_PRECISION, rather than using
6813 int_traits <extended_tree <N> >::precision_type as the second template
6815 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
6817 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
6820 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
6822 PR middle-end/111777
6823 * doc/extend.texi: Change subsubsection to subsection for
6826 2023-10-12 Tamar Christina <tamar.christina@arm.com>
6828 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
6830 2023-10-12 Jakub Jelinek <jakub@redhat.com>
6832 * wide-int.h (widest_int_storage <N>::write_val): If l is small
6833 and there is space in u.val array, store a canary value at the
6835 (widest_int_storage <N>::set_len): Check the canary hasn't been
6838 2023-10-12 Jakub Jelinek <jakub@redhat.com>
6841 * wide-int.h: Adjust file comment.
6842 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
6843 (WIDE_INT_MAX_INL_PRECISION): Define.
6844 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
6845 is smaller than WIDE_INT_MAX_ELTS.
6846 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
6847 WIDEST_INT_MAX_PRECISION): Define.
6848 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
6849 to pass 0 as a new argument.
6850 (class widest_int_storage): Likewise.
6851 (widest_int, widest2_int): Change typedefs to use widest_int_storage
6852 rather than fixed_wide_int_storage.
6853 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
6854 (struct binary_traits): Add partial specializations for
6855 INL_CONST_PRECISION.
6856 (generic_wide_int): Add needs_write_val_arg static data member.
6857 (int_traits): Likewise.
6858 (wide_int_storage): Replace val non-static data member with a union
6859 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
6860 assignment operator and destructor. Add unsigned int argument to
6862 (wide_int_storage::wide_int_storage): Initialize precision to 0
6863 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
6864 Assert in non-default ctor T's precision_type is not
6865 INL_CONST_PRECISION and allocate u.valp for large precision. Add
6867 (wide_int_storage::~wide_int_storage): New.
6868 (wide_int_storage::operator=): Add copy assignment operator. In
6869 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
6870 assert ctor T's precision_type is not INL_CONST_PRECISION and
6871 if precision changes, deallocate and/or allocate u.valp.
6872 (wide_int_storage::get_val): Return u.valp rather than u.val for
6874 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
6876 (wide_int_storage::set_len): Use write_val instead of writing val
6878 (wide_int_storage::from, wide_int_storage::from_array): Adjust
6880 (wide_int_storage::create): Allocate u.valp for large precisions.
6881 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
6882 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
6884 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
6885 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
6886 Adjust write_val callers.
6887 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
6888 (WIDEST_INT): Define.
6889 (widest_int_storage): New template class.
6890 (wi::int_traits <widest_int_storage>): New.
6891 (trailing_wide_int_storage::write_val): Add unused unsigned int
6893 (wi::get_binary_precision): Use
6894 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
6895 rather than get_precision on get_binary_result.
6896 (wi::copy): Adjust write_val callers. Don't call set_len if
6897 needs_write_val_arg.
6898 (wi::bit_not): If result.needs_write_val_arg, call write_val
6899 again with upper bound estimate of len.
6900 (wi::sext, wi::zext, wi::set_bit): Likewise.
6901 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
6902 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
6903 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
6904 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
6905 wi::lshift, wi::lrshift, wi::arshift): Likewise.
6906 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
6908 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
6909 generic_wide_int, instead add functions and templates for each
6910 storage of generic_wide_int. Make functions for
6911 generic_wide_int <wide_int_storage> and templates for
6912 generic_wide_int <widest_int_storage <N>> deleted.
6913 (wi::mask, wi::shifted_mask): Adjust write_val calls.
6914 * wide-int.cc (zeros): Decrease array size to 1.
6915 (BLOCKS_NEEDED): Use CEIL.
6916 (canonize): Use HOST_WIDE_INT_M1.
6917 (wi::from_buffer): Pass 0 to write_val.
6918 (wi::to_mpz): Use CEIL.
6919 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
6920 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
6921 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
6922 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
6923 above WIDE_INT_MAX_INL_PRECISION estimate precision from
6924 lengths of operands. Use XALLOCAVEC allocated buffers for
6925 prec above WIDE_INT_MAX_INL_PRECISION.
6926 (wi::divmod_internal): Likewise.
6927 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
6928 it from xlen and skip.
6929 (rshift_large_common): Remove xprecision argument, add len
6930 argument with len computed in caller. Don't return anything.
6931 (wi::lrshift_large, wi::arshift_large): Compute len here
6932 and pass it to rshift_large_common, for lengths above
6933 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
6934 (assert_deceq, assert_hexeq): For lengths above
6935 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
6936 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
6937 WIDE_INT_MAX_PRECISION.
6938 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
6939 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
6940 * wide-int-print.cc (print_decs, print_decu, print_hex): For
6941 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
6942 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
6943 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
6944 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
6945 WIDE_INT_MAX_PRECISION.
6946 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
6947 instead of hard coded CONST_PRECISION.
6948 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
6949 WIDE_INT_MAX_PRECISION.
6950 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
6951 than WIDE_INT_MAX_PRECISION.
6952 (wi::ints_for::zero): Use
6953 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
6954 wi::CONST_PRECISION.
6955 * tree.cc (build_replicated_int_cst): Formatting fix. Use
6956 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
6957 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
6958 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
6959 * double-int.h (wi::int_traits <double_int>::precision_type): Change
6960 to INL_CONST_PRECISION from CONST_PRECISION.
6961 * poly-int.h (struct poly_coeff_traits): Add partial specialization
6962 for wi::INL_CONST_PRECISION.
6963 * cfgloop.h (bound_wide_int): New typedef.
6964 (struct nb_iter_bound): Change bound type from widest_int to
6966 (struct loop): Change nb_iterations_upper_bound,
6967 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
6968 widest_int to bound_wide_int.
6969 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
6970 of i_bound is too large for bound_wide_int. Adjustments for the
6971 widest_int to bound_wide_int type change in non-static data members.
6972 (get_estimated_loop_iterations, get_max_loop_iterations,
6973 get_likely_max_loop_iterations): Adjustments for the widest_int to
6974 bound_wide_int type change in non-static data members.
6975 * tree-vect-loop.cc (vect_transform_loop): Likewise.
6976 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
6977 XALLOCAVEC allocated buffer for i_bound len above
6978 WIDE_INT_MAX_INL_ELTS.
6979 (record_estimate): Return early if wi::min_precision of i_bound is too
6980 large for bound_wide_int. Adjustments for the widest_int to
6981 bound_wide_int type change in non-static data members.
6982 (wide_int_cmp): Use bound_wide_int instead of widest_int.
6983 (bound_index): Use bound_wide_int instead of widest_int.
6984 (discover_iteration_bound_by_body_walk): Likewise. Use
6985 widest_int::from to convert it to widest_int when passed to
6987 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
6988 widest_int when passed to record_niter_bound.
6989 (estimate_numbers_of_iteration): Don't record upper bound if
6990 loop->nb_iterations has too large precision for bound_wide_int.
6991 (n_of_executions_at_most): Use widest_int::from.
6992 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
6993 the widest_int to bound_wide_int changes.
6994 * match.pd (fold_sign_changed_comparison simplification): Use
6995 wide_int::from on wi::to_wide instead of wi::to_widest.
6996 * value-range.h (irange::maybe_resize): Avoid using memcpy on
6997 non-trivially copyable elements.
6998 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
6999 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
7000 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
7001 Use wide_int::from on wi::to_wide instead of wi::to_widest.
7002 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
7003 before calling wi::udiv_trunc.
7004 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
7005 bound_wide_int type change in non-static data members.
7006 * lto-streamer-in.cc (input_cfg): Likewise.
7007 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
7008 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
7009 XALLOCAVEC allocated buffer. Formatting fix.
7010 * data-streamer-in.cc (streamer_read_wide_int,
7011 streamer_read_widest_int): Likewise.
7012 * tree-affine.cc (aff_combination_expand): Use placement new to
7013 construct name_expansion.
7014 (free_name_expansion): Destruct name_expansion.
7015 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
7016 index type from widest_int to offset_int.
7017 (class incr_info_d): Change incr type from widest_int to offset_int.
7018 (alloc_cand_and_find_basis, backtrace_base_for_ref,
7019 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
7020 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
7021 slsr_process_add, cand_abs_increment, replace_mult_candidate,
7022 replace_unconditional_candidate, incr_vec_index,
7023 create_add_on_incoming_edge, create_phi_basis_1,
7024 replace_conditional_candidate, record_increment,
7025 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
7026 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
7027 nearest_common_dominator_for_cands, insert_initializers,
7028 all_phi_incrs_profitable_1, replace_one_candidate,
7029 replace_profitable_candidates): Use offset_int rather than widest_int
7030 and wi::to_offset rather than wi::to_widest.
7031 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
7032 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
7034 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
7035 to construct tree_niter_desc and destruct it on failure.
7036 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
7037 * gengtype.cc (main): Remove widest_int handling.
7038 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
7039 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
7040 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
7041 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
7042 assert get_len () fits into it.
7043 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
7044 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
7046 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
7047 wide_int::from on wi::to_wide instead of wi::to_widest.
7048 * omp-general.cc (score_wide_int): New typedef.
7049 (omp_context_compute_score): Use score_wide_int instead of widest_int
7050 and adjust for those changes.
7051 (struct omp_declare_variant_entry): Change score and
7052 score_in_declare_simd_clone non-static data member type from widest_int
7054 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
7055 score_wide_int instead of widest_int and adjust for those changes.
7056 (omp_lto_output_declare_variant_alt): Likewise.
7057 (omp_lto_input_declare_variant_alt): Likewise.
7058 * godump.cc (go_output_typedef): Assert get_len () is smaller than
7059 WIDE_INT_MAX_INL_ELTS.
7061 2023-10-12 Pan Li <pan2.li@intel.com>
7063 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
7064 pattern for lround/lroundf.
7065 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
7066 (expand_vec_lround): New func decl for expanding lround.
7067 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
7068 for expanding lround.
7070 2023-10-12 Jakub Jelinek <jakub@redhat.com>
7072 * dwarf2out.h (wide_int_ptr): Remove.
7073 (dw_wide_int_ptr): New typedef.
7074 (struct dw_val_node): Change type of val_wide from wide_int_ptr
7076 (struct dw_wide_int): New type.
7077 (dw_wide_int::elt): New method.
7078 (dw_wide_int::operator ==): Likewise.
7079 * dwarf2out.cc (get_full_len): Change argument type to
7080 const dw_wide_int & from const wide_int &. Use CEIL. Call
7081 get_precision method instead of calling wi::get_precision.
7082 (alloc_dw_wide_int): New function.
7083 (add_AT_wide): Change w argument type to const wide_int_ref &
7084 from const wide_int &. Use alloc_dw_wide_int.
7085 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
7086 (insert_wide_int): Change val argument type to const wide_int_ref &
7087 from const wide_int &.
7088 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
7089 add_AT_wide instead of using a temporary variable.
7091 2023-10-12 Richard Biener <rguenther@suse.de>
7093 PR tree-optimization/111764
7094 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
7095 to allow x + x via special-casing of assigns.
7097 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
7099 * common/config/i386/cpuinfo.h (get_available_features):
7101 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
7102 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
7103 (ix86_handle_option): Handle -musermsr.
7104 * common/config/i386/i386-cpuinfo.h (enum processor_features):
7105 Add FEATURE_USER_MSR.
7106 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
7107 * config.gcc: Add usermsrintrin.h
7108 * config/i386/cpuid.h (bit_USER_MSR): New.
7109 * config/i386/i386-builtin-types.def:
7110 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
7111 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
7112 Add __builtin_urdmsr and __builtin_uwrmsr.
7113 * config/i386/i386-builtins.h (ix86_builtins):
7114 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
7115 * config/i386/i386-c.cc (ix86_target_macros_internal):
7116 Define __USER_MSR__.
7117 * config/i386/i386-expand.cc (ix86_expand_builtin):
7118 Handle new builtins.
7119 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
7120 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
7122 * config/i386/i386.md (urdmsr): New define_insn.
7124 * config/i386/i386.opt: Add option -musermsr.
7125 * config/i386/x86gprintrin.h: Include usermsrintrin.h
7126 * doc/extend.texi: Document usermsr.
7127 * doc/invoke.texi: Document -musermsr.
7128 * doc/sourcebuild.texi: Document target usermsr.
7129 * config/i386/usermsrintrin.h: New file.
7131 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
7133 * config.gcc: Add loongarch-driver.h to tm_files.
7134 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
7135 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
7136 instead of $(TM_H) for building generator programs.
7138 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7141 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
7142 instruction emission and incorporate to stack_protect_set<mode>.
7143 (stack_protect_setdi): Rename to ...
7144 (stack_protect_set<mode>): ... this, adjust constraint.
7145 (stack_protect_testsi): Support prefixed instruction emission and
7146 incorporate to stack_protect_test<mode>.
7147 (stack_protect_testdi): Rename to ...
7148 (stack_protect_test<mode>): ... this, adjust constraint.
7150 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7152 * tree-vect-stmts.cc (vectorizable_store): Consider generated
7153 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
7156 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7158 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
7159 (vectorizable_store): Adjust the costing for the remaining memory
7160 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
7162 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7164 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
7165 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
7167 (vectorizable_store): Adjust the cost handling on
7168 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
7170 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7172 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
7173 get VMAT_LOAD_STORE_LANES.
7174 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
7175 without calling vect_model_store_cost. Factor out new lambda function
7176 update_prologue_cost.
7178 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7180 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
7181 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
7183 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
7184 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
7186 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7188 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
7189 vectorizable_scan_store without calling vect_model_store_cost
7192 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7194 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
7195 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
7196 handlings and the related parameter gs_info.
7197 (vect_build_scatter_store_calls): Add the handlings on costing with
7198 one more argument cost_vec.
7199 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
7200 without calling vect_model_store_cost any more.
7202 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7204 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
7205 to vect_model_store_cost down to some different transform paths
7206 according to the handlings of different vect_memory_access_types
7207 or some special handling need.
7209 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
7211 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
7212 vector store for some case of VMAT_ELEMENTWISE is supported.
7214 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
7215 Hu Lin1 <lin1.hu@intel.com>
7216 Hongyu Wang <hongyu.wang@intel.com>
7218 * config/i386/i386.cc (gen_push2): New function to emit push2
7219 and adjust cfa offset.
7220 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
7221 determine whether push2/pop2 can be used.
7222 (ix86_compute_frame_layout): Adjust preferred stack boundary
7223 and stack alignment needed for push2/pop2.
7224 (ix86_emit_save_regs): Emit push2 when available.
7225 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
7226 and adjust cfa info.
7227 (ix86_emit_restore_regs_using_pop2): New function to loop
7228 through the saved regs and call above.
7229 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
7230 when push2pop2 available.
7231 * config/i386/i386.md (push2_di): New pattern for push2.
7232 (pop2_di): Likewise for pop2.
7234 2023-10-12 Pan Li <pan2.li@intel.com>
7236 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
7237 (lrint<mode><v_i_l_ll_convert>2): Rename to.
7238 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
7240 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7242 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
7244 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
7246 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
7247 pseudo op instead of a "call" pseudo op.
7249 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7251 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
7253 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
7254 (riscv_subset_list::clone): Ditto.
7255 (riscv_subset_list::parse_single_ext): Ditto.
7256 (riscv_subset_list::set_loc): Ditto.
7257 (riscv_set_arch_by_subset_list): Ditto.
7258 * common/config/riscv/riscv-common.cc
7259 (riscv_subset_list::parse_single_std_ext): New.
7260 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
7261 (riscv_subset_list::clone): Ditto.
7262 (riscv_subset_list::parse_single_ext): Ditto.
7263 (riscv_subset_list::set_loc): Ditto.
7264 (riscv_set_arch_by_subset_list): Ditto.
7266 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7268 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
7269 from argument rather than get setting from global setting.
7270 (riscv_override_options_internal): New, splited from
7271 riscv_override_options, also take a gcc_options argument.
7272 (riscv_option_override): Splited most part to
7273 riscv_override_options_internal.
7275 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
7277 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
7278 TARGET_<NAME>_OPTS_P.
7279 (InverseMask): Ditto.
7280 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
7281 TARGET_<NAME>_OPTS_P macro.
7282 (InverseMask): Ditto.
7284 2023-10-11 Andrew Pinski <pinskia@gmail.com>
7286 PR tree-optimization/111282
7287 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
7288 `a & ((~a) ^ b)`): New patterns.
7290 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
7292 * common/config/riscv/riscv-common.cc: Add the XCValu
7294 * config/riscv/constraints.md: Add builtins for the XCValu
7296 * config/riscv/predicates.md (immediate_register_operand):
7298 * config/riscv/corev.def: Likewise.
7299 * config/riscv/corev.md: Likewise.
7300 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
7301 (RISCV_ATYPE_UHI): Likewise.
7302 * config/riscv/riscv-ftypes.def: Likewise.
7303 * config/riscv/riscv.opt: Likewise.
7304 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
7305 * doc/extend.texi: Add XCValu documentation.
7306 * doc/sourcebuild.texi: Likewise.
7308 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
7310 * common/config/riscv/riscv-common.cc: Add XCVmac.
7311 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
7312 * config/riscv/riscv-builtins.cc: Likewise.
7313 * config/riscv/riscv.md: Likewise.
7314 * config/riscv/riscv.opt: Likewise.
7315 * doc/extend.texi: Add XCVmac builtin documentation.
7316 * doc/sourcebuild.texi: Likewise.
7317 * config/riscv/corev.def: New file.
7318 * config/riscv/corev.md: New file.
7320 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7322 * config/riscv/autovec.md: Fix index bug.
7323 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
7324 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
7325 (gather_scatter_valid_offset_mode_p): New function.
7327 2023-10-11 Pan Li <pan2.li@intel.com>
7329 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
7331 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
7333 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
7335 (expand_vec_lrint): New function impl for expanding lint.
7336 * config/riscv/vector-iterators.md: New mode attr and iterator.
7338 2023-10-11 Richard Biener <rguenther@suse.de>
7339 Jakub Jelinek <jakub@redhat.com>
7341 PR tree-optimization/111519
7342 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
7343 argument and pass it through to recursive calls and
7344 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
7345 change stmt for gimple_assign_single_p statements for which we don't
7347 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
7348 it through to recursive calls and count_nonzero_bytes calls. Don't
7349 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
7350 shadow the stmt argument.
7352 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
7354 PR middle-end/101955
7355 PR tree-optimization/106245
7356 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
7357 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
7359 2023-10-11 liuhongt <hongtao.liu@intel.com>
7362 * config/i386/mmx.md (divv4hf3): Refine predicate of
7363 operands[2] with register_operand.
7365 2023-10-10 Andrew Waterman <andrew@sifive.com>
7366 Philipp Tomsich <philipp.tomsich@vrull.eu>
7367 Jeff Law <jlaw@ventanamicro.com>
7369 * config/riscv/riscv.cc (struct machine_function): Track if a
7370 far-branch/jump is used within a function (and $ra needs to be
7372 (riscv_print_operand): Implement 'N' (inverse integer branch).
7373 (riscv_far_jump_used_p): Implement.
7374 (riscv_save_return_addr_reg_p): New function.
7375 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
7376 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
7377 (CALL_USED_REGISTERS): Update $ra.
7378 * config/riscv/riscv.md: Add new types "ret" and "jalr".
7379 (length attribute): Handle long conditional and unconditional
7381 (conditional branch pattern): Handle case where jump can not
7382 reach the intended target.
7383 (indirect_jump, tablejump): Use new "jalr" type.
7384 (simple_return): Use new "ret" type.
7385 (simple_return_internal, eh_return_internal): Likewise.
7386 (gpr_restore_return, riscv_mret): Likewise.
7387 (riscv_uret, riscv_sret): Likewise.
7388 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
7390 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
7392 2023-10-10 Andrew Pinski <pinskia@gmail.com>
7394 PR tree-optimization/111679
7395 * match.pd (`a | ((~a) ^ b)`): New pattern.
7397 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7400 * config/riscv/autovec.md: Add VLS BOOL modes.
7402 2023-10-10 Richard Biener <rguenther@suse.de>
7404 PR tree-optimization/111751
7405 * fold-const.cc (fold_view_convert_expr): Up the buffer size
7407 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
7408 constants, giving up when re-interpretation to the target type
7411 2023-10-10 Richard Biener <rguenther@suse.de>
7413 PR tree-optimization/111751
7414 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
7415 BLKmode result from the padding bits check.
7417 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
7419 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
7421 * config/arc/arc.md (addsi_compare): Make pattern canonical.
7422 (addsi_compare_2): Fix identation, constraint letters.
7423 (addsi_compare_3): Likewise.
7425 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
7427 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
7428 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
7429 when scaling loop profile
7431 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
7433 PR tree-optimization/111694
7434 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
7436 * value-relation.cc (adjust_equivalence_range): New.
7437 * value-relation.h (adjust_equivalence_range): New prototype.
7439 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
7441 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
7442 not call get_identity_relation.
7443 (gori_compute::compute_operand2_range): Ditto.
7444 * value-relation.cc (get_identity_relation): Remove.
7445 * value-relation.h (get_identity_relation): Remove protyotype.
7447 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
7449 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
7450 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
7452 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
7454 (TARGET_SCHED_ADJUST_COST): Define.
7455 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
7456 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
7457 * config/riscv/generic-ooo.md: New file.
7458 * config/riscv/vector.md: Add vsetvl_pre.
7460 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7462 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
7463 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
7464 * config/riscv/vector.md (movmisalign<mode>): New pattern.
7466 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
7468 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
7469 directives for store-pair instruction.
7471 2023-10-09 Richard Biener <rguenther@suse.de>
7473 PR tree-optimization/111715
7474 * alias.cc (reference_alias_ptr_type_1): When we have
7475 a type-punning ref at the base search for the access
7476 path part that's still semantically valid.
7478 2023-10-09 Pan Li <pan2.li@intel.com>
7480 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
7482 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
7484 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
7486 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
7487 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
7489 (ix86_split_lshr): Likewise, split shifts by one bit into
7490 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
7491 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
7492 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
7493 (rcrdi2): New define_insn for rcrq.
7494 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
7495 set the carry flag from the least significant bit, modelled using
7497 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
7498 controlling use of rcr 1 vs. shrd, which is significantly faster on
7501 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7503 * config/i386/i386.opt: Allow -mno-evex512.
7505 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7506 Hu, Lin1 <lin1.hu@intel.com>
7508 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
7511 (VFH_AVX512VL): Ditto.
7513 (VHF_AVX512VL): Ditto.
7514 (VI2H_AVX512VL): Ditto.
7515 (VI2F_256_512): Ditto.
7516 (VF48_I1248): Remove unused iterator.
7517 (VF48H_AVX512VL): Add TARGET_EVEX512.
7518 (VF_AVX512): Remove unused iterator.
7519 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
7520 (REDUC_SMINMAX_MODE): Ditto.
7522 (VFH_SF_AVX512VL): Ditto.
7523 (VEC_PERM_AVX2): Ditto.
7525 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7526 Hu, Lin1 <lin1.hu@intel.com>
7528 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
7530 (VI1_AVX512F): Ditto.
7531 (VI1_AVX512VNNI): Ditto.
7532 (VI1_AVX512VL_F): Ditto.
7533 (VI12_VI48F_AVX512VL): Ditto.
7534 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
7535 (sdot_prod<mode>): Ditto.
7536 (VEC_PERM_AVX2): Ditto.
7539 (vpmadd52<vpmadd52type>v8di): Ditto.
7540 (usdot_prod<mode>): Ditto.
7541 (vpdpbusd_v16si): Ditto.
7542 (vpdpbusds_v16si): Ditto.
7543 (vpdpwssd_v16si): Ditto.
7544 (vpdpwssds_v16si): Ditto.
7545 (VI48_AVX512VP2VL): Ditto.
7546 (avx512vp2intersect_2intersectv16si): Ditto.
7547 (VF_AVX512BF16VL): Ditto.
7548 (VF1_AVX512_256): Ditto.
7550 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7552 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
7553 Make sure there is EVEX512 enabled.
7554 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
7555 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
7556 when !TARGET_EVEX512.
7557 * config/i386/i386.md (avx512bw_512): New.
7558 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
7559 (*zero_extendsidi2): Change isa to avx512bw_512.
7562 (*andn<mode>_1): Change isa to kmov_isa.
7563 (*<code><mode>_1): Ditto.
7564 (*notxor<mode>_1): Ditto.
7565 (*one_cmpl<mode>2_1): Ditto.
7566 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
7567 (*ashl<mode>3_1): Change isa to kmov_isa.
7568 (*lshr<mode>3_1): Ditto.
7569 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
7570 (VI1248_AVX512VLBW): Ditto.
7571 (VHFBF_AVX512VL): Ditto.
7575 (VI1_AVX512): Ditto.
7576 (VI12_256_512_AVX512VL): Ditto.
7577 (VI2_AVX2_AVX512BW): Ditto.
7578 (VI2_AVX512VNNIBW): Ditto.
7579 (VI2_AVX512VL): Ditto.
7580 (VI2HFBF_AVX512VL): Ditto.
7581 (VI8_AVX2_AVX512BW): Ditto.
7582 (VIMAX_AVX2_AVX512BW): Ditto.
7583 (VIMAX_AVX512VL): Ditto.
7584 (VI12_AVX2_AVX512BW): Ditto.
7585 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
7586 (VI248_AVX512VL): Ditto.
7587 (VI248_AVX512VLBW): Ditto.
7588 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
7589 (VI248_AVX512BW): Ditto.
7590 (VI248_AVX512BW_AVX512VL): Ditto.
7592 (VI124_256_AVX512F_AVX512BW): Ditto.
7593 (VI_AVX512BW): Ditto.
7594 (VIHFBF_AVX512BW): Ditto.
7595 (SWI1248_AVX512BWDQ): Ditto.
7596 (SWI1248_AVX512BW): Ditto.
7597 (SWI1248_AVX512BWDQ2): Ditto.
7598 (*knotsi_1_zext): Ditto.
7599 (define_split for zero_extend + not): Ditto.
7601 (REDUC_SMINMAX_MODE): Ditto.
7602 (VEC_EXTRACT_MODE): Ditto.
7603 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
7604 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
7605 (truncv32hiv32qi2): Ditto.
7606 (avx512bw_<code>v32hiv32qi2): Ditto.
7607 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
7608 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
7610 (VEC_PERM_AVX2): Ditto.
7611 (AVX512ZEXTMASK): Ditto.
7613 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
7614 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
7615 (avx512bw_packssdw<mask_name>): Ditto.
7616 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
7617 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
7618 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
7619 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
7620 (vec_unpacks_lo_di): Ditto.
7622 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
7623 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
7624 (VI1248_AVX512VL_AVX512BW): Ditto.
7625 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
7626 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
7627 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
7628 (<insn>v32qiv32hi2): Ditto.
7629 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
7630 (VPERMI2): Add TARGET_EVEX512.
7633 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7635 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
7636 Add TARGET_EVEX512 for 512 bit usage.
7637 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
7638 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
7639 (VF1_128_256VL): Ditto.
7640 (VF2_AVX512VL): Ditto.
7641 (VI8_256_512): Ditto.
7642 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
7644 (AVX512_VEC): Ditto.
7645 (AVX512_VEC_2): Ditto.
7646 (VI4F_BRCST32x2): Ditto.
7647 (VI8F_BRCST64x2): Ditto.
7649 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7651 * config/i386/i386-builtins.cc
7652 (ix86_vectorize_builtin_gather): Disable 512 bit gather
7653 when !TARGET_EVEX512.
7654 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
7656 (ix86_expand_int_sse_cmp): Ditto.
7657 (ix86_expand_vector_init_one_nonzero): Disable subroutine
7658 when !TARGET_EVEX512.
7659 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
7660 (ix86_vectorize_vec_perm_const): Disable subroutine when
7662 * config/i386/i386.cc
7663 (standard_sse_constant_p): Add TARGET_EVEX512.
7664 (standard_sse_constant_opcode): Ditto.
7665 (ix86_get_ssemov): Ditto.
7666 (ix86_legitimate_constant_p): Ditto.
7667 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
7668 when !TARGET_EVEX512.
7669 * config/i386/i386.md (avx512f_512): New.
7670 (movxi): Add TARGET_EVEX512.
7671 (*movxi_internal_avx512f): Ditto.
7672 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
7674 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
7676 (*movhi_internal): Change alternative 11 to *Yv.
7677 (*movdf_internal): Change alternative 12 to Yv.
7678 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
7679 alternative 5 and 6.
7680 (*mov<mode>_internal): Change alternative 4 to Yv.
7681 (define_split for convert SF to DF): Add TARGET_EVEX512.
7682 (extendbfsf2_1): Ditto.
7683 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
7684 for 512 bit when !TARGET_EVEX512.
7685 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
7686 (V48_AVX512VL): Ditto.
7687 (V48_256_512_AVX512VL): Ditto.
7688 (V48H_AVX512VL): Ditto.
7689 (VI12_AVX512VL): Ditto.
7694 (VF1_VF2_AVX512DQ): Ditto.
7701 (VF2_512_256): Ditto.
7702 (VF2_512_256VL): Ditto.
7705 (VI48_AVX512VL): Ditto.
7706 (VI1248_AVX512VLBW): Ditto.
7707 (VF_AVX512VL): Ditto.
7708 (VFH_AVX512VL): Ditto.
7709 (VF1_AVX512VL): Ditto.
7714 (VI8_AVX512VL): Ditto.
7715 (VI2_AVX512F): Ditto.
7716 (VI4_AVX512F): Ditto.
7717 (VI4_AVX512VL): Ditto.
7718 (VI48_AVX512F_AVX512VL): Ditto.
7719 (VI8_AVX2_AVX512F): Ditto.
7720 (VI8_AVX_AVX512F): Ditto.
7723 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
7724 (VI248_AVX512VLBW): Ditto.
7725 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
7726 (VI248_AVX512BW): Ditto.
7727 (VI248_AVX512BW_AVX512VL): Ditto.
7728 (VI48_AVX512F): Ditto.
7729 (VI48_AVX_AVX512F): Ditto.
7730 (VI12_AVX_AVX512F): Ditto.
7732 (VI124_256_AVX512F_AVX512BW): Ditto.
7734 (VI_AVX512BW): Ditto.
7735 (VIHFBF_AVX512BW): Ditto.
7736 (VI4F_256_512): Ditto.
7737 (VI48F_256_512): Ditto.
7739 (VI12_VI48F_AVX512VL): Ditto.
7741 (AVX512MODE2P): Ditto.
7742 (STORENT_MODE): Ditto.
7743 (REDUC_PLUS_MODE): Ditto.
7744 (REDUC_SMINMAX_MODE): Ditto.
7745 (*andnot<mode>3): Change isa attribute to avx512f_512.
7746 (*andnot<mode>3): Ditto.
7747 (<code><mode>3): Ditto.
7749 (FMAMODEM): Add TARGET_EVEX512.
7750 (FMAMODE_AVX512): Ditto.
7751 (VFH_SF_AVX512VL): Ditto.
7752 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
7753 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
7755 (avx512f_cvtdq2pd512_2): Ditto.
7756 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
7757 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
7759 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
7760 (vec_unpacks_lo_v16sf): Ditto.
7761 (vec_unpacks_hi_v16sf): Ditto.
7762 (vec_unpacks_float_hi_v16si): Ditto.
7763 (vec_unpacks_float_lo_v16si): Ditto.
7764 (vec_unpacku_float_hi_v16si): Ditto.
7765 (vec_unpacku_float_lo_v16si): Ditto.
7766 (vec_pack_sfix_trunc_v8df): Ditto.
7767 (avx512f_vec_pack_sfix_v8df): Ditto.
7768 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
7769 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
7770 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
7771 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
7772 (AVX512_VEC): Ditto.
7773 (AVX512_VEC_2): Ditto.
7774 (vec_extract_lo_v64qi): Ditto.
7775 (vec_extract_hi_v64qi): Ditto.
7776 (VEC_EXTRACT_MODE): Ditto.
7777 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
7778 (avx512f_movddup512<mask_name>): Ditto.
7779 (avx512f_unpcklpd512<mask_name>): Ditto.
7780 (*<avx512>_vternlog<mode>_all): Ditto.
7781 (*<avx512>_vpternlog<mode>_1): Ditto.
7782 (*<avx512>_vpternlog<mode>_2): Ditto.
7783 (*<avx512>_vpternlog<mode>_3): Ditto.
7784 (avx512f_shufps512_mask): Ditto.
7785 (avx512f_shufps512_1<mask_name>): Ditto.
7786 (avx512f_shufpd512_mask): Ditto.
7787 (avx512f_shufpd512_1<mask_name>): Ditto.
7788 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
7789 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
7790 (vec_dupv2df<mask_name>): Ditto.
7791 (trunc<pmov_src_lower><mode>2): Ditto.
7792 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
7793 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
7794 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
7795 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
7796 (truncv8div8qi2): Ditto.
7797 (avx512f_<code>v8div16qi2): Ditto.
7798 (*avx512f_<code>v8div16qi2_store_1): Ditto.
7799 (*avx512f_<code>v8div16qi2_store_2): Ditto.
7800 (avx512f_<code>v8div16qi2_mask): Ditto.
7801 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
7802 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
7803 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
7804 (vec_widen_umult_even_v16si<mask_name>): Ditto.
7805 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
7806 (vec_widen_smult_even_v16si<mask_name>): Ditto.
7807 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
7808 (VEC_PERM_AVX2): Ditto.
7809 (one_cmpl<mode>2): Ditto.
7810 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
7811 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
7812 (define_split to xor): Ditto.
7813 (*andnot<mode>3): Ditto.
7814 (define_split for ior): Ditto.
7815 (*iornot<mode>3): Ditto.
7816 (*xnor<mode>3): Ditto.
7817 (*<nlogic><mode>3): Ditto.
7818 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
7819 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
7820 (avx512f_pshufdv3_mask): Ditto.
7821 (avx512f_pshufd_1<mask_name>): Ditto.
7822 (*vec_extractv4ti): Ditto.
7823 (VEXTRACTI128_MODE): Ditto.
7824 (define_split to vec_extract): Ditto.
7825 (VI1248_AVX512VL_AVX512BW): Ditto.
7826 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
7827 (<insn>v16qiv16si2): Ditto.
7828 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
7829 (<insn>v16hiv16si2): Ditto.
7830 (avx512f_zero_extendv16hiv16si2_1): Ditto.
7831 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
7832 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
7833 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
7834 (<insn>v8qiv8di2): Ditto.
7835 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
7836 (<insn>v8hiv8di2): Ditto.
7837 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
7838 (*avx512f_zero_extendv8siv8di2_1): Ditto.
7839 (*avx512f_zero_extendv8siv8di2_2): Ditto.
7840 (<insn>v8siv8di2): Ditto.
7841 (avx512f_roundps512_sfix): Ditto.
7842 (vashrv8di3): Ditto.
7843 (vashrv16si3): Ditto.
7844 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
7845 (vec_dupv4sf): Add TARGET_EVEX512.
7846 (*vec_dupv4si): Ditto.
7847 (*vec_dupv2di): Ditto.
7848 (vec_dup<mode>): Change isa attribute to avx512f_512.
7849 (VPERMI2): Add TARGET_EVEX512.
7851 (VEC_INIT_MODE): Ditto.
7852 (VEC_INIT_HALF_MODE): Ditto.
7853 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
7855 (avx512f_vcvtps2ph512_mask_sae): Ditto.
7856 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
7858 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
7859 (INT_BROADCAST_MODE): Ditto.
7861 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7863 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
7864 Disable zmm broadcast for !TARGET_EVEX512.
7865 * config/i386/i386-options.cc (ix86_option_override_internal):
7866 Do not use PVW_512 when no-evex512.
7867 (ix86_simd_clone_adjust): Add evex512 target into string.
7868 * config/i386/i386.cc (type_natural_mode): Report ABI warning
7869 when using zmm register w/o evex512.
7870 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
7871 (ix86_hard_regno_mode_ok): Ditto.
7872 (ix86_set_reg_reg_cost): Ditto.
7873 (ix86_rtx_costs): Ditto.
7874 (ix86_vector_mode_supported_p): Ditto.
7875 (ix86_preferred_simd_mode): Ditto.
7876 (ix86_get_mask_mode): Ditto.
7877 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
7878 libmvec call when !TARGET_EVEX512.
7879 (ix86_simd_clone_usable): Ditto.
7880 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
7881 when !TARGET_EVEX512
7882 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
7883 (STORE_MAX_PIECES): Ditto.
7885 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7887 * config/i386/i386-builtin.def (BDESC): Add
7888 OPTION_MASK_ISA2_EVEX512.
7890 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7892 * config/i386/i386-builtin.def (BDESC): Add
7893 OPTION_MASK_ISA2_EVEX512.
7895 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7897 * config/i386/i386-builtin.def (BDESC): Add
7898 OPTION_MASK_ISA2_EVEX512.
7900 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7902 * config/i386/i386-builtin.def (BDESC): Add
7903 OPTION_MASK_ISA2_EVEX512.
7905 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7907 * config/i386/i386-builtin.def (BDESC): Add
7908 OPTION_MASK_ISA2_EVEX512.
7909 * config/i386/i386-builtins.cc
7910 (ix86_init_mmx_sse_builtins): Ditto.
7912 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7913 Hu, Lin1 <lin1.hu@intel.com>
7915 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
7918 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7920 * config.gcc: Add avx512bitalgvlintrin.h.
7921 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
7923 * config/i386/avx5124vnniwintrin.h: Ditto.
7924 * config/i386/avx512bf16intrin.h: Ditto.
7925 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
7926 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
7927 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
7929 * config/i386/avx512ifmaintrin.h: Ditto
7930 * config/i386/avx512pfintrin.h: Ditto
7931 * config/i386/avx512vbmi2intrin.h: Ditto.
7932 * config/i386/avx512vbmiintrin.h: Ditto.
7933 * config/i386/avx512vnniintrin.h: Ditto.
7934 * config/i386/avx512vp2intersectintrin.h: Ditto.
7935 * config/i386/avx512vpopcntdqintrin.h: Ditto.
7936 * config/i386/gfniintrin.h: Ditto.
7937 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
7938 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
7939 * config/i386/vpclmulqdqintrin.h: Ditto.
7940 * config/i386/avx512bitalgvlintrin.h: New.
7942 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7944 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
7947 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7949 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
7952 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7954 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
7956 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
7958 * common/config/i386/i386-common.cc
7959 (OPTION_MASK_ISA2_EVEX512_SET): New.
7960 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
7961 (ix86_handle_option): Handle EVEX512.
7962 * config/i386/i386-c.cc
7963 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
7964 when AVX512VL is set.
7965 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
7966 (ix86_valid_target_attribute_inner_p): Ditto.
7967 (ix86_option_override_internal): Set EVEX512 target if it is not
7968 explicitly set when AVX512 is enabled. Disable
7969 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
7970 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
7972 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
7975 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
7976 from insn condition.
7977 (lrint<mode>si2): New insn pattern for 32bit lrint.
7979 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
7982 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
7983 Enable SImode on FP registers for P7.
7984 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
7985 move between FP registers. Set attribute isa of stfiwx to "*"
7986 and attribute of stxsiwx to "p7".
7988 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7990 * config/s390/s390.md: Make use of new copysign RTL.
7992 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
7994 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
7995 with "jm" for alternative 0 and 1 of operand 2.
7996 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
7997 "ja" for alternative 0 and 1 of operand2.
7999 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8002 * text-art/table.cc (table::maybe_set_cell_span): New.
8003 (table::add_other_table): New.
8004 * text-art/table.h (class table::cell_placement): Add class table
8006 (table::add_rows): New.
8007 (table::add_row): Reimplement in terms of add_rows.
8008 (table::maybe_set_cell_span): New decl.
8009 (table::add_other_table): New decl.
8010 * text-art/types.h (operator+): New operator for rect + coord.
8012 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8014 * genmatch.cc (main): Update for "m_" prefix of some fields of
8016 * input.cc (make_location): Update for removal of
8017 COMBINE_LOCATION_DATA.
8018 (dump_line_table_statistics): Update for "m_" prefix of some
8019 fields of line_maps.
8020 (location_with_discriminator): Update for removal of
8021 COMBINE_LOCATION_DATA.
8022 (line_table_test::line_table_test): Update for "m_" prefix of some
8023 fields of line_maps.
8024 * toplev.cc (general_init): Likewise.
8025 * tree.cc (set_block): Update for removal of
8026 COMBINE_LOCATION_DATA.
8027 (set_source_range): Likewise.
8029 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8031 * input.cc (make_location): Move implementation to
8032 line_maps::make_location.
8034 2023-10-08 David Malcolm <dmalcolm@redhat.com>
8037 * input.cc (file_cache::add_file): Update leading comment to
8038 clarify that it can fail.
8039 (file_cache::lookup_or_add_file): Likewise.
8040 (file_cache::get_source_file_content): Gracefully handle
8041 lookup_or_add_file failing.
8043 2023-10-08 liuhongt <hongtao.liu@intel.com>
8045 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
8047 (ix86_build_signbit_mask): Ditto.
8048 * config/i386/mmx.md (mmxintvecmode): Ditto.
8049 (<code><mode>2): New define_expand.
8050 (*mmx_<code><mode>): New define_insn_and_split.
8051 (*mmx_nabs<mode>2): Ditto.
8052 (*mmx_andnot<mode>3): New define_insn.
8053 (<code><mode>3): Ditto.
8054 (copysign<mode>3): New define_expand.
8055 (xorsign<mode>3): Ditto.
8056 (signbit<mode>2): Ditto.
8058 2023-10-08 liuhongt <hongtao.liu@intel.com>
8060 * config/i386/mmx.md (VHF_32_64): New mode iterator.
8061 (<insn><mode>3): New define_expand, merged from ..
8062 (<insn>v4hf3): .. this and
8063 (<insn>v2hf3): .. this.
8064 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
8065 (movd_v2hf_to_sse): .. this.
8066 (<code><mode>3): New define_expand.
8068 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8070 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
8071 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
8073 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8075 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
8077 (can_be_built_by_li_lis_and_rldicr): New function.
8078 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
8079 can_be_built_by_li_lis_and_rldicl.
8081 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8083 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
8085 (can_be_built_by_li_and_rotldi): Rename to ...
8086 (can_be_built_by_li_lis_and_rotldi): ... this function.
8087 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
8089 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
8091 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
8092 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
8094 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
8096 * config/riscv/linux.h: Pass the static-pie specific options to
8099 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
8101 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
8103 * config/aarch64/aarch64-tune.md: Regenerated.
8104 * doc/invoke.texi: Add command-line option for cortex-x4 core.
8106 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8107 Hongyu Wang <hongyu.wang@intel.com>
8108 Hongtao Liu <hongtao.liu@intel.com>
8110 * config/i386/constraints.md (jb): New constraint for vsib memory
8111 that does not allow gpr32.
8112 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
8113 alternative and set attr_gpr32 to 0.
8114 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
8116 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
8117 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
8118 (*rsqrtsf2_sse): Likewise.
8119 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
8120 avx/noavx and assign jr/r constraint to dest.
8121 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
8122 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
8123 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
8124 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
8125 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
8126 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
8127 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
8128 (<sse2_avx2>_pmovmskb): Likewise.
8129 (*<sse2_avx2>_pmovmskb_zext): Likewise.
8130 (*sse2_pmovmskb_ext): Likewise.
8131 (*<sse2_avx2>_pmovmskb_lt): Likewise.
8132 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
8133 (*sse2_pmovmskb_ext_lt): Likewise.
8134 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
8135 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
8136 (sse_vmrcpv4sf2): Likewise.
8137 (*sse_vmrcpv4sf2): Likewise.
8138 (rsqrt<mode>2): Likewise.
8139 (sse_vmrsqrtv4sf2): Likewise.
8140 (*sse_vmrsqrtv4sf2): Likewise.
8141 (avx_h<insn>v4df3): Likewise.
8142 (sse3_hsubv2df3): Likewise.
8143 (avx_h<insn>v8sf3): Likewise.
8144 (sse3_h<insn>v4sf3): Likewise.
8145 (<sse3>_lddqu<avxsizesuffix>): Likewise.
8146 (avx_cmp<mode>3): Likewise.
8147 (avx_vmcmp<mode>3): Likewise.
8148 (*sse2_gt<mode>3): Likewise.
8149 (sse_ldmxcsr): Likewise.
8150 (sse_stmxcsr): Likewise.
8151 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
8152 avx alternative and set attr_gpr32 to 0.
8153 (avx2_permv2ti): Likewise.
8154 (*avx_vperm2f128<mode>_full): Likewise.
8155 (*avx_vperm2f128<mode>_nozero): Likewise.
8156 (vec_set_lo_v32qi): Likewise.
8157 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
8158 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
8159 (avx_cmp<mode>3): Likewise.
8160 (avx_vmcmp<mode>3): Likewise.
8161 (*<sse>_maskcmp<mode>3_comm): Likewise.
8162 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
8164 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
8165 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
8166 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
8167 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
8168 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
8169 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
8170 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
8171 (vec_set_lo_<mode><mask_name>): Likewise.
8172 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
8173 (vec_set_hi_<mode><mask_name>): Likewise.
8174 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
8175 (vec_set_hi_<mode>): Likewise.
8176 (vec_set_lo_<mode>): Likewise.
8177 (avx2_set_hi_v32qi): Likewise.
8179 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8180 Hongyu Wang <hongyu.wang@intel.com>
8181 Hongtao Liu <hongtao.liu@intel.com>
8183 * config/i386/i386.md (*movhi_internal): Split out non-gpr
8184 supported pextrw with mem constraint to avx/noavx alternatives,
8185 set jm and attr gpr32 0 to the noavx alternative.
8186 (*mov<mode>_internal): Likewise.
8187 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
8188 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
8189 (mmx_pshufbv4qi3): Likewise.
8190 (*mmx_pinsrd): Likewise.
8191 (*mmx_pinsrb): Likewise.
8192 (*pinsrb): Likewise.
8193 (mmx_pshufbv8qi3): Likewise.
8194 (mmx_pshufbv4qi3): Likewise.
8195 (@sse4_1_insertps_<mode>): Likewise.
8196 (*mmx_pextrw): Split altrenatives and map non-EGPR
8197 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
8198 (*movv2qi_internal): Likewise.
8199 (*pextrw): Likewise.
8200 (*mmx_pextrb): Likewise.
8201 (*mmx_pextrb_zext): Likewise.
8202 (*pextrb): Likewise.
8203 (*pextrb_zext): Likewise.
8204 (vec_extractv2si_1): Likewise.
8205 (vec_extractv2si_1_zext): Likewise.
8206 * config/i386/sse.md: (vi128_h_r): New mode attr for
8207 pinsr{bw}/pextr{bw} with reg operand.
8208 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
8209 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
8210 (*vec_extract<mode>): Likewise.
8211 (*vec_extract<mode>): Likewise for HFBF pattern.
8212 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
8213 (*vec_extractv4si_1): Likewise.
8214 (*vec_extractv4si_zext): Likewise.
8215 (*vec_extractv2di_1): Likewise.
8216 (*vec_concatv2si_sse4_1): Likewise.
8217 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
8218 (vec_concatv2di): Likewise.
8219 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
8220 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
8221 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
8222 %v for avx/noavx alternatives if necessary.
8223 (*vec_concatv2sf_sse4_1): Likewise.
8224 (*sse4_1_extractps): Likewise.
8225 (vec_set<mode>_0): Likewise for VI4F_128.
8226 (*vec_setv4sf_sse4_1): Likewise.
8227 (@sse4_1_insertps<mode>): Likewise.
8228 (ssse3_pmaddubsw128): Likewise.
8229 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
8230 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
8231 (<ssse3_avx2>_palignr<mode>): Likewise.
8232 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
8233 (<sse4_1_avx2>_mpsadbw): Likewise.
8234 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
8235 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
8236 (*sse4_1_<code><mode>3<mask_name>): Likewise.
8237 (*<code>v8hi3): Likewise.
8238 (*<code>v16qi3): Likewise.
8239 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
8240 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
8241 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
8242 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
8243 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
8244 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
8245 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
8246 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
8247 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
8248 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
8249 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
8251 (aesdeclast): Likewise.
8253 (aesenclast): Likewise.
8254 (pclmulqdq): Likewise.
8255 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
8256 (vgf2p8affineqb_<mode><mask_name>): Likewise.
8257 (vgf2p8mulb_<mode><mask_name>): Likewise.
8259 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8260 Hongyu Wang <hongyu.wang@intel.com>
8261 Hongtao Liu <hongtao.liu@intel.com>
8263 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
8265 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
8267 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
8268 and constraint jm to all non-evex alternatives, adjust
8269 alternative outputs if evex reg is mentioned.
8270 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
8271 and constraint jm/ja to all non-evex alternatives.
8272 (ptesttf2): Likewise.
8273 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
8274 (sse4_1_round<ssescalarmodesuffix>): Likewise.
8275 (sse4_2_pcmpestri): Likewise.
8276 (sse4_2_pcmpestrm): Likewise.
8277 (sse4_2_pcmpestr_cconly): Likewise.
8278 (sse4_2_pcmpistr): Likewise.
8279 (sse4_2_pcmpistri): Likewise.
8280 (sse4_2_pcmpistrm): Likewise.
8281 (sse4_2_pcmpistr_cconly): Likewise.
8283 (aeskeygenassist): Likewise.
8285 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8286 Hongyu Wang <hongyu.wang@intel.com>
8287 Hongtao Liu <hongtao.liu@intel.com>
8289 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
8290 attr gpr32 0 and constraint jm/ja to all mem alternatives.
8291 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
8292 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
8293 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
8294 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
8295 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
8296 (<ssse3_avx2>_psign<mode>3): Likewise.
8297 (ssse3_psign<mode>3): Likewise.
8298 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
8299 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
8300 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
8301 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
8302 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
8303 (<sse4_1_avx2>_mpsadbw): Likewise.
8304 (<sse4_1_avx2>_pblendvb): Likewise.
8305 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
8306 (sse4_1_pblend<ssemodesuffix>): Likewise.
8307 (*avx2_pblend<ssemodesuffix>): Likewise.
8308 (avx2_permv2ti): Likewise.
8309 (*avx_vperm2f128<mode>_nozero): Likewise.
8310 (*avx2_eq<mode>3): Likewise.
8311 (*sse4_1_eqv2di3): Likewise.
8312 (sse4_2_gtv2di3): Likewise.
8313 (avx2_gt<mode>3): Likewise.
8315 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8316 Hongyu Wang <hongyu.wang@intel.com>
8317 Hongtao Liu <hongtao.liu@intel.com>
8319 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
8321 (<xsave>_rex64): Likewise.
8322 (<xrstor>_rex64): Likewise.
8323 (<xrstor>64): Likewise.
8324 (fxsave64): Likewise.
8325 (fxstore64): Likewise.
8327 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
8328 Kong Lingling <lingling.kong@intel.com>
8329 Hongtao Liu <hongtao.liu@intel.com>
8331 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
8332 adjust mnemonic for vmovduq/vmovdqa.
8333 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
8334 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
8335 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
8338 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8339 Hongyu Wang <hongyu.wang@intel.com>
8340 Hongtao Liu <hongtao.liu@intel.com>
8342 * config/i386/i386.cc (map_egpr_constraints): New funciton to
8343 map common constraints to EGPR prohibited constraints.
8344 (ix86_md_asm_adjust): Calls map_egpr_constraints.
8345 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
8347 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8348 Hongyu Wang <hongyu.wang@intel.com>
8349 Hongtao Liu <hongtao.liu@intel.com>
8351 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
8353 (ix86_regno_ok_for_insn_base_p): Likewise.
8354 (ix86_insn_index_reg_class): Likewise.
8355 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
8356 New helper function to scan the insn.
8357 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
8358 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
8359 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
8360 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
8361 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
8362 (INSN_INDEX_REG_CLASS): Likewise.
8363 (enum reg_class): Add INDEX_GPR16.
8364 (GENERAL_GPR16_REGNO_P): Define.
8365 * config/i386/i386.md (gpr32): New attribute.
8367 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8368 Hongyu Wang <hongyu.wang@intel.com>
8369 Hongtao Liu <hongtao.liu@intel.com>
8371 * config/i386/constraints.md (jr): New register constraint
8372 that prohibits EGPR.
8373 (jR): Constraint that force usage of EGPR.
8374 (jm): New memory constraint that prohibits EGPR.
8375 (ja): Likewise for Bm constraint.
8376 (jb): Likewise for Tv constraint.
8377 (j<): New auto-dec memory constraint that prohibits EGPR.
8378 (j>): Likewise for ">" constraint.
8379 (jo): Likewise for "o" constraint.
8380 (jv): Likewise for "V" constraint.
8381 (jp): Likewise for "p" constraint.
8382 * config/i386/i386.h (enum reg_class): Add new reg class
8385 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8386 Hongyu Wang <hongyu.wang@intel.com>
8387 Hongtao Liu <hongtao.liu@intel.com>
8389 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
8390 New function prototype.
8391 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
8393 (debugger64_register_map): Likewise.
8394 (ix86_conditional_register_usage): Clear REX2 register when APX
8396 (ix86_code_end): Add handling for REX2 reg.
8397 (print_reg): Likewise.
8398 (ix86_output_jmp_thunk_or_indirect): Likewise.
8399 (ix86_output_indirect_branch_via_reg): Likewise.
8400 (ix86_attr_length_vex_default): Likewise.
8401 (ix86_emit_save_regs): Adjust to allow saving r31.
8402 (ix86_register_priority): Set REX2 reg priority same as REX.
8403 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
8404 (x86_extended_rex2reg_mentioned_p): New function.
8405 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
8407 (REG_ALLOC_ORDER): Likewise.
8408 (FIRST_REX2_INT_REG): Define.
8409 (LAST_REX2_INT_REG): Ditto.
8410 (GENERAL_REGS): Add 16 new registers.
8411 (INT_SSE_REGS): Likewise.
8412 (FLOAT_INT_REGS): Likewise.
8413 (FLOAT_INT_SSE_REGS): Likewise.
8414 (INT_MASK_REGS): Likewise.
8415 (ALL_REGS):Likewise.
8416 (REX2_INT_REG_P): Define.
8417 (REX2_INT_REGNO_P): Ditto.
8418 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
8419 (REGNO_OK_FOR_INDEX_P): Ditto.
8420 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
8421 * config/i386/i386.md: Add 16 new integer general
8424 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8425 Hongyu Wang <hongyu.wang@intel.com>
8426 Hongtao Liu <hongtao.liu@intel.com>
8428 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
8429 (XCR_APX_F_ENABLED_MASK): Likewise.
8430 (get_available_features): Detect APX_F under
8431 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
8432 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
8433 (ix86_handle_option): Handle -mapxf.
8434 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
8435 * common/config/i386/i386-isas.h: Add entry for APX_F.
8436 * config/i386/cpuid.h (bit_APX_F): New.
8437 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
8438 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
8439 * config/i386/i386-opts.h (enum apx_features): New enum.
8440 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
8441 * config/i386/i386-options.cc (ix86_function_specific_save):
8442 Save ix86_apx_features.
8443 (ix86_function_specific_restore): Restore it.
8444 (ix86_valid_target_attribute_inner_p): Add mapxf.
8445 (ix86_option_override_internal): Set ix86_apx_features for PTA
8446 and TARGET_APX_F. Also reports error when APX_F is set but not
8447 having TARGET_64BIT.
8448 * config/i386/i386.opt: (-mapxf): New ISA flag option.
8449 (-mapx=): New enumeration option.
8450 (apx_features): New enum type.
8451 (apx_none): New enum value.
8452 (apx_egpr): Likewise.
8453 (apx_push2pop2): Likewise.
8454 (apx_ndd): Likewise.
8455 (apx_all): Likewise.
8456 * doc/invoke.texi: Document mapxf.
8458 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
8459 Kong Lingling <lingling.kong@intel.com>
8460 Hongtao Liu <hongtao.liu@intel.com>
8462 * addresses.h (index_reg_class): New wrapper function like
8464 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
8465 * doc/tm.texi.in: Ditto.
8466 * lra-constraints.cc (index_part_to_reg): Pass index_class.
8467 (process_address_1): Calls index_reg_class with curr_insn and
8468 replace INDEX_REG_CLASS with its return value index_cl.
8469 * reload.cc (find_reloads_address): Likewise.
8470 (find_reloads_address_1): Likewise.
8472 2023-10-07 Kong Lingling <lingling.kong@intel.com>
8473 Hongyu Wang <hongyu.wang@intel.com>
8474 Hongtao Liu <hongtao.liu@intel.com>
8476 * addresses.h (base_reg_class): Add insn argument and new macro
8477 INSN_BASE_REG_CLASS.
8478 (regno_ok_for_base_p_1): Add insn argument and new macro
8479 REGNO_OK_FOR_INSN_BASE_P.
8480 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
8481 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
8482 REGNO_OK_FOR_INSN_BASE_P.
8483 * doc/tm.texi.in: Ditto.
8484 * lra-constraints.cc (process_address_1): Pass insn to
8486 (curr_insn_transform): Ditto.
8487 * reload.cc (find_reloads): Ditto.
8488 (find_reloads_address): Ditto.
8489 (find_reloads_address_1): Ditto.
8490 (find_reloads_subreg_address): Ditto.
8491 * reload1.cc (maybe_fix_stack_asms): Ditto.
8493 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
8496 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
8499 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
8502 * config/rs6000/predicates.md (lowpart_subreg_operator): New
8504 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
8505 (movsf_from_si2): Rename to ...
8506 (movsf_from_si2_<code>): ... this.
8508 2023-10-07 Pan Li <pan2.li@intel.com>
8511 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
8512 object is a REG before extracting its' REGNO.
8514 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
8516 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
8517 one into add3_cc_overflow_1 followed by add3_carry.
8518 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
8519 "*add<mode>3_cc_overflow_1" to provide generator function.
8521 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
8522 Uros Bizjak <ubizjak@gmail.com>
8524 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
8525 to perform left shifts into shorter instructions with -Oz.
8527 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
8529 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
8531 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
8533 * doc/extend.texi (Function Attributes): Mention standard attribute
8535 (Variable Attributes): Likewise.
8536 (Type Attributes): Likewise.
8537 (Attribute Syntax): Likewise.
8539 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
8541 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
8542 (mov<mode>_exec): Likewise.
8543 (mov<mode>_sgprbase): Likewise.
8544 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
8545 (*movti_insn): Likewise.
8547 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
8549 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
8551 2023-10-06 Andrew Pinski <pinskia@gmail.com>
8553 PR middle-end/111699
8554 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
8555 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
8557 2023-10-06 Jakub Jelinek <jakub@redhat.com>
8559 * ipa-prop.h (ipa_bits): Remove.
8560 (struct ipa_jump_func): Remove bits member.
8561 (struct ipcp_transformation): Remove bits member, adjust
8563 (ipa_get_ipa_bits_for_value): Remove.
8564 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
8565 (ipa_bits_hash_table): Remove.
8566 (ipa_print_node_jump_functions_for_edge): Don't print bits.
8567 (ipa_get_ipa_bits_for_value): Remove.
8568 (ipa_set_jfunc_bits): Remove.
8569 (ipa_compute_jump_functions_for_edge): For pointers query
8570 pointer alignment before ipa_set_jfunc_vr and update_bitmask
8571 in there. For integral types, just rely on bitmask already
8572 being handled in value ranges.
8573 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
8574 (ipcp_transformation_initialize): Neither here.
8575 (ipcp_transformation_t::duplicate): Don't copy bits vector.
8576 (ipa_write_jump_function): Don't stream bits here.
8577 (ipa_read_jump_function): Neither here.
8578 (useful_ipcp_transformation_info_p): Don't test bits vec.
8579 (write_ipcp_transformation_info): Don't stream bits here.
8580 (read_ipcp_transformation_info): Neither here.
8581 (ipcp_get_parm_bits): Get mask and value from m_vr rather
8583 (ipcp_update_bits): Remove.
8584 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
8585 bitmask stored in value range.
8586 (ipcp_transform_function): Don't test bits vector, don't call
8588 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
8589 jfunc->bits, instead get mask and value from jfunc->m_vr.
8590 (ipcp_store_bits_results): Remove.
8591 (ipcp_store_vr_results): Incorporate parts of
8592 ipcp_store_bits_results here, merge the bitmasks with value
8593 range if both are supplied.
8594 (ipcp_driver): Don't call ipcp_store_bits_results.
8595 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
8598 2023-10-06 Pan Li <pan2.li@intel.com>
8600 * config/riscv/autovec.md: Update comments.
8602 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
8604 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
8606 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
8608 * timevar.def (TV_TREE_FAST_VRP): New.
8609 * tree-pass.h (make_pass_fast_vrp): New prototype.
8610 * tree-vrp.cc (class fvrp_folder): New.
8611 (fvrp_folder::fvrp_folder): New.
8612 (fvrp_folder::~fvrp_folder): New.
8613 (fvrp_folder::value_of_expr): New.
8614 (fvrp_folder::value_on_edge): New.
8615 (fvrp_folder::value_of_stmt): New.
8616 (fvrp_folder::pre_fold_bb): New.
8617 (fvrp_folder::post_fold_bb): New.
8618 (fvrp_folder::pre_fold_stmt): New.
8619 (fvrp_folder::fold_stmt): New.
8620 (execute_fast_vrp): New.
8621 (pass_data_fast_vrp): New.
8622 (pass_vrp:execute): Check for fast VRP pass.
8623 (make_pass_fast_vrp): New.
8625 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
8627 * gimple-range.cc (dom_ranger::dom_ranger): New.
8628 (dom_ranger::~dom_ranger): New.
8629 (dom_ranger::range_of_expr): New.
8630 (dom_ranger::edge_range): New.
8631 (dom_ranger::range_on_edge): New.
8632 (dom_ranger::range_in_bb): New.
8633 (dom_ranger::range_of_stmt): New.
8634 (dom_ranger::maybe_push_edge): New.
8635 (dom_ranger::pre_bb): New.
8636 (dom_ranger::post_bb): New.
8637 * gimple-range.h (class dom_ranger): New.
8639 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
8641 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
8642 (gori_calc_operands): New.
8643 (gori_on_edge): New.
8644 (gori_name_helper): New.
8645 (gori_name_on_edge): New.
8646 * gimple-range-gori.h (gori_on_edge): New prototype.
8647 (gori_name_on_edge): New prototype.
8649 2023-10-05 Sergei Trofimovich <siarheit@google.com>
8652 PR gcov-profile/111559
8653 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
8654 uninitialized probabilities when merging counters with zero
8657 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
8660 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
8661 strategy for non-default address spaces.
8662 (decide_alg): Use loop strategy as a fallback strategy for
8663 non-default address spaces.
8665 2023-10-05 Jakub Jelinek <jakub@redhat.com>
8667 * sreal.cc (verify_aritmetics): Rename to ...
8668 (verify_arithmetics): ... this.
8669 (sreal_verify_arithmetics): Adjust caller.
8671 2023-10-05 Martin Jambor <mjambor@suse.cz>
8674 2023-10-03 Martin Jambor <mjambor@suse.cz>
8677 * cgraph.h (cgraph_edge): Add a parameter to
8678 redirect_call_stmt_to_callee.
8679 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
8680 parameter to modify_call.
8681 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
8682 parameter killed_ssas, pass it to padjs->modify_call.
8683 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
8684 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
8685 Instead of substituting uses, invoke purge_transitive_uses. If
8686 hash of killed SSAs has not been provided, create a temporary one
8687 and release SSAs that have been added to it.
8688 * tree-inline.cc (redirect_all_calls): Create
8689 id->killed_new_ssa_names earlier, pass it to edge redirection,
8691 (copy_body): Release SSAs in id->killed_new_ssa_names.
8693 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8695 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
8696 (vec_series<mode>): Ditto.
8697 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
8698 (shuffle_decompress_patterns): Ditto.
8700 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
8702 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
8703 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
8704 (arc_ccfsm_record_branch_deleted): Likewise.
8705 (arc_ccfsm_cond_exec_p): Likewise.
8706 (arc_ccfsm): Likewise.
8707 (arc_ccfsm_record_condition): Likewise.
8708 (make_pass_arc_ifcvt): Likewise.
8709 * config/arc/arc.cc (arc_ccfsm): Remove.
8710 (arc_ccfsm_current): Likewise.
8711 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
8712 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
8713 (ARC_CCFSM_COND_EXEC_P): Likewise.
8714 (CCFSM_ISCOMPACT): Likewise.
8715 (CCFSM_DBR_ISCOMPACT): Likewise.
8716 (machine_function): Remove ccfsm related fields.
8717 (arc_ifcvt): Remove pass.
8718 (arc_print_operand): Remove `#` punct operand and other ccfsm
8720 (arc_ccfsm_advance): Remove.
8721 (arc_ccfsm_at_label): Likewise.
8722 (arc_ccfsm_record_condition): Likewise.
8723 (arc_ccfsm_post_advance): Likewise.
8724 (arc_ccfsm_branch_deleted_p): Likewise.
8725 (arc_ccfsm_record_branch_deleted): Likewise.
8726 (arc_ccfsm_cond_exec_p): Likewise.
8727 (arc_get_ccfsm_cond): Likewise.
8728 (arc_final_prescan_insn): Remove ccfsm references.
8729 (arc_internal_label): Likewise.
8730 (arc_reorg): Likewise.
8731 (arc_output_libcall): Likewise.
8732 * config/arc/arc.md: Remove ccfsm references and update related
8733 instruction patterns.
8735 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
8737 * config/arc/arc.cc (arc_init): Remove '^' punct char.
8738 (arc_print_operand): Remove related code.
8739 * config/arc/arc.md: Update patterns which uses '%&'.
8741 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
8743 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
8744 (arc_toggle_unalign): Likewise.
8745 * config/arc/arc.cc (machine_function) Remove unalign.
8746 (arc_init): Remove `&` punct character.
8747 (arc_print_operand): Remove `&` related functions.
8748 (arc_verify_short): Update function's number of parameters.
8749 (output_short_suffix): Update function.
8750 (arc_short_long): Likewise.
8751 (arc_clear_unalign): Remove.
8752 (arc_toggle_unalign): Likewise.
8753 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
8754 (ASM_OUTPUT_ALIGN): Update.
8755 * config/arc/arc.md: Remove all `%&` references.
8756 * config/arc/arc.opt (mannotate-align): Ignore option.
8757 * doc/invoke.texi (mannotate-align): Update description.
8759 2023-10-05 Richard Biener <rguenther@suse.de>
8761 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
8762 ask for internal_fn_p (CFN_LAST).
8764 2023-10-05 Richard Biener <rguenther@suse.de>
8766 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
8767 visited value numbers are available itself.
8769 2023-10-05 Richard Biener <rguenther@suse.de>
8772 * doc/extend.texi (attribute flatten): Clarify.
8774 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
8776 * config/arc/arc-protos.h (emit_shift): Delete prototype.
8777 (arc_pre_reload_split): New function prototype.
8778 * config/arc/arc.cc (emit_shift): Delete function.
8779 (arc_pre_reload_split): New predicate function, copied from i386,
8780 to schedule define_insn_and_split splitters to the split1 pass.
8781 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
8782 (ashrsi3): Likewise.
8783 (lshrsi3): Likewise.
8784 (shift_si3): Move after other shift patterns, and disable when
8785 operands[2] is one (which is handled by its own define_insn).
8786 Use shiftr4_operator, instead of shift4_operator, as this is no
8787 longer used for left shifts.
8788 (shift_si3_loop): Likewise. Additionally remove match_scratch.
8789 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
8790 (*ashrsi3_nobs): Likewise.
8791 (*lshrsi3_nobs): Likewise.
8792 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
8793 (add_shift): Rename define_insn from *add_shift.
8794 * config/arc/predicates.md (shiftl4_operator): Delete.
8795 (shift4_operator): Delete.
8797 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
8799 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
8800 Change type attribute to "unary", as this doesn't have operands[2].
8801 Change length attribute to "*,4" to allow compact representation.
8802 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
8803 insn type attribute to "unary", as this doesn't have operands[2].
8804 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
8805 insn type attribute to "unary", as this doesn't have operands[2].
8807 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
8809 PR rtl-optimization/110701
8810 * combine.cc (record_dead_and_set_regs_1): Split comment into
8811 pieces placed before the relevant clauses. When the SET_DEST
8812 is a partial_subreg_p, mark the bits outside of the updated
8813 portion of the destination as undefined.
8815 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
8818 * opt-read.awk: Drop multidimensional arrays.
8819 * opth-gen.awk: Ditto.
8821 2023-10-04 Xi Ruoyao <xry111@xry111.site>
8823 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
8824 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
8826 2023-10-04 Jakub Jelinek <jakub@redhat.com>
8828 PR middle-end/111369
8829 * match.pd (x == cstN ? cst4 : cst3): Use
8830 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
8831 Fix comment typo. Formatting fix.
8832 (a?~t:t -> (-(a))^t): Always convert to type rather
8833 than using build_nonstandard_integer_type. Perform negation
8834 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
8836 2023-10-04 Jakub Jelinek <jakub@redhat.com>
8838 PR tree-optimization/111668
8839 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
8840 a ? 0 : -1 cases before the powerof2cst cases and differentiate
8841 between 1-bit precision types, larger precision boolean types
8842 and other integral types. Fix comment pastos and formatting.
8844 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
8846 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
8847 pointers rather than range_info_get_range.
8849 2023-10-03 Martin Jambor <mjambor@suse.cz>
8851 * ipa-modref.h (modref_summary::dump): Make const.
8852 * ipa-modref.cc (modref_summary::dump): Likewise.
8853 (dump_lto_records): Dump to out instead of dump_file.
8855 2023-10-03 Martin Jambor <mjambor@suse.cz>
8858 * ipa-param-manipulation.cc
8859 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
8860 return uses of PARAM will be removed.
8861 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
8862 * ipa-sra.cc (isra_param_desc): New fields
8863 remove_only_when_retval_removed and split_only_when_retval_removed.
8864 (struct gensum_param_desc): Likewise. Fix comment long line.
8865 (ipa_sra_function_summaries::duplicate): Copy the new flags.
8866 (dump_gensum_param_descriptor): Dump the new flags.
8867 (dump_isra_param_descriptor): Likewise.
8868 (isra_track_scalar_value_uses): New parameter desc. Set its flag
8869 remove_only_when_retval_removed when encountering a simple return.
8870 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
8871 with desc. Pass it to isra_track_scalar_value_uses and set its
8873 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
8874 parameter. If there is a direct return use, mark any..
8875 (create_parameter_descriptors): Pass the whole parameter descriptor to
8876 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
8877 (process_scan_results): Copy the new flags.
8878 (isra_write_node_summary): Stream the new flags.
8879 (isra_read_node_info): Likewise.
8880 (adjust_parameter_descriptions): Check that transformations
8881 requring return removal only happen when return value is removed.
8882 Restructure main loop. Adjust dump message.
8884 2023-10-03 Martin Jambor <mjambor@suse.cz>
8887 * cgraph.h (cgraph_edge): Add a parameter to
8888 redirect_call_stmt_to_callee.
8889 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
8890 parameter to modify_call.
8891 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
8892 parameter killed_ssas, pass it to padjs->modify_call.
8893 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
8894 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
8895 Instead of substituting uses, invoke purge_transitive_uses. If
8896 hash of killed SSAs has not been provided, create a temporary one
8897 and release SSAs that have been added to it.
8898 * tree-inline.cc (redirect_all_calls): Create
8899 id->killed_new_ssa_names earlier, pass it to edge redirection,
8901 (copy_body): Release SSAs in id->killed_new_ssa_names.
8903 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
8905 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
8906 * tree-vrp.cc (vrp_pass_num): Remove.
8907 (pass_vrp::my_pass): Remove.
8908 (pass_vrp::pass_vrp): Add warn_p as a parameter.
8909 (pass_vrp::final_p): New.
8910 (pass_vrp::set_pass_param): Set final_p param.
8911 (pass_vrp::execute): Call execute_range_vrp with no conditions.
8912 (make_pass_vrp): Pass additional parameter.
8913 (make_pass_early_vrp): Ditto.
8915 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
8917 * tree-ssanames.cc (set_range_info): Return true only if the
8918 current value changes.
8920 2023-10-03 David Malcolm <dmalcolm@redhat.com>
8922 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
8923 prefixes to text_info fields.
8924 (diagnostic_report_diagnostic): Likewise.
8925 (verbatim): Use text_info ctor.
8926 (simple_diagnostic_path::add_event): Likewise.
8927 (simple_diagnostic_path::add_thread_event): Likewise.
8928 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
8929 "m_" prefixes to text_info fields.
8930 (dump_context::dump_printf_va): Use text_info ctor.
8931 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
8932 (graphviz_out::print): Likewise.
8933 * opt-problem.cc (opt_problem::opt_problem): Likewise.
8934 * pretty-print.cc (pp_format): Update for "m_" prefixes to
8936 (pp_printf): Use text_info ctor.
8937 (pp_verbatim): Likewise.
8938 (assert_pp_format_va): Likewise.
8939 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
8941 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
8943 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
8944 prefixes to text_info fields.
8945 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
8947 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
8949 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
8950 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
8951 (*scc_insn): Don't split to a conditional move sequence for LTU.
8953 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
8955 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
8956 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
8957 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
8958 (load_pair_dw_<DX:mode><DX2:mode>)
8959 (store_pair_sw_<SX:mode><SX2:mode>)
8960 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
8961 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
8962 (*extend<SHORT:mode><GPI:mode>2_aarch64)
8963 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
8964 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
8965 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
8966 (add<mode>3_compare0, *addsi3_compare0_uxtw)
8967 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
8968 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
8969 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
8970 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
8971 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
8972 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
8973 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
8974 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
8975 (*aarch64_ashl_sisd_or_int_<mode>3)
8976 (*aarch64_lshr_sisd_or_int_<mode>3)
8977 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
8978 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
8979 (<optab><fcvt_target><GPF:mode>2)
8980 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
8981 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
8982 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
8984 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
8985 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
8986 (*aarch64_mul_unpredicated_<mode>)
8987 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
8988 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
8989 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
8990 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
8991 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
8992 (@aarch64_sve_<sve_int_op>_lane_<mode>)
8993 (@aarch64_sve_add_mul_lane_<mode>)
8994 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
8995 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
8996 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
8997 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
8998 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
8999 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
9000 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
9001 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
9002 (@aarch64_sve_qadd_<sve_int_op><mode>)
9003 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
9004 (@aarch64_sve_sub_<sve_int_op><mode>)
9005 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
9006 (@aarch64_sve_qsub_<sve_int_op><mode>)
9007 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
9008 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
9009 (@aarch64_pred_<sve_int_op><mode>)
9010 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
9011 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
9012 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
9013 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
9014 (*cond_<sve_fp_op><mode>_any_relaxed)
9015 (*cond_<sve_fp_op><mode>_any_strict)
9016 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
9017 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
9018 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
9019 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
9020 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
9021 (*aarch64_sve_mov<mode>, aarch64_wrffr)
9022 (mask_scatter_store<mode><v_int_container>)
9023 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
9024 (*mask_scatter_store<mode><v_int_container>_sxtw)
9025 (*mask_scatter_store<mode><v_int_container>_uxtw)
9026 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
9027 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
9028 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
9029 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
9030 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
9031 (vec_series<mode>, @extract_<last_op>_<mode>)
9032 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
9033 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
9034 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
9035 (@cond_<optab><mode>)
9036 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
9037 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
9038 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
9039 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
9040 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
9041 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
9042 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
9043 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
9044 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
9045 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
9046 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
9047 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
9048 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
9049 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
9050 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
9051 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
9052 (*cond_bic<mode>_2, *cond_bic<mode>_any)
9053 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
9054 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
9055 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
9056 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
9057 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
9058 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
9059 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
9060 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
9061 (*cond_<optab><mode>_2_const_relaxed)
9062 (*cond_<optab><mode>_2_const_strict)
9063 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
9064 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9065 (*cond_<optab><mode>_any_const_relaxed)
9066 (*cond_<optab><mode>_any_const_strict)
9067 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
9068 (*cond_add<mode>_2_const_strict)
9069 (*cond_add<mode>_any_const_relaxed)
9070 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
9071 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
9072 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9073 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
9074 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
9075 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
9076 (*aarch64_pred_abd<mode>_strict)
9077 (*aarch64_cond_abd<mode>_2_relaxed)
9078 (*aarch64_cond_abd<mode>_2_strict)
9079 (*aarch64_cond_abd<mode>_3_relaxed)
9080 (*aarch64_cond_abd<mode>_3_strict)
9081 (*aarch64_cond_abd<mode>_any_relaxed)
9082 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
9083 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
9084 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
9085 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
9086 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
9087 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
9088 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
9089 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
9090 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
9091 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9092 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
9093 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
9094 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
9095 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
9096 (@aarch64_sve_<sve_fp_op>vnx4sf)
9097 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
9098 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
9099 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
9100 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
9101 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
9102 (@aarch64_fold_extract_vector_<last_op>_<mode>)
9103 (@aarch64_sve_splice<mode>)
9104 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
9105 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
9106 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
9107 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
9108 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
9109 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
9110 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
9111 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
9112 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
9113 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
9114 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
9115 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
9116 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
9117 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
9118 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
9119 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
9120 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
9122 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
9123 (load_pair<DREG:mode><DREG2:mode>)
9124 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
9125 (aarch64_simd_mov_from_<mode>low)
9126 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
9127 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
9128 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
9129 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
9130 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
9131 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
9132 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
9133 (*aarch64_combinez_be<mode>)
9134 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
9135 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
9136 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
9138 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
9140 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
9141 in new compact pattern syntax.
9143 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
9145 * gensupport.cc (convert_syntax): Updated to support unordered
9146 constraints in compact syntax.
9148 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
9150 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
9151 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
9152 (copysign<mode>3_hard): Likewise.
9153 (copysign<mode>3_soft): Likewise.
9154 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
9156 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
9159 2023-10-02 David Malcolm <dmalcolm@redhat.com>
9161 * diagnostic-format-json.cc (toplevel_array): Remove global in
9162 favor of json_output_format::m_top_level_array.
9163 (cur_group): Likewise, for json_output_format::m_cur_group.
9164 (cur_children_array): Likewise, for
9165 json_output_format::m_cur_children_array.
9166 (class json_output_format): New.
9167 (json_begin_diagnostic): Remove, in favor of
9168 json_output_format::on_begin_diagnostic.
9169 (json_end_diagnostic): Convert to...
9170 (json_output_format::on_end_diagnostic): ...this.
9171 (json_begin_group): Remove, in favor of
9172 json_output_format::on_begin_group.
9173 (json_end_group): Remove, in favor of
9174 json_output_format::on_end_group.
9175 (json_flush_to_file): Remove, in favor of
9176 json_output_format::flush_to_file.
9177 (json_stderr_final_cb): Remove, in favor of json_output_format
9179 (json_output_base_file_name): Remove global.
9180 (class json_stderr_output_format): New.
9181 (json_file_final_cb): Remove.
9182 (class json_file_output_format): New.
9183 (json_emit_diagram): Remove.
9184 (diagnostic_output_format_init_json): Update.
9185 (diagnostic_output_format_init_json_file): Update.
9186 * diagnostic-format-sarif.cc (the_builder): Remove this global,
9187 moving to a field of the sarif_output_format.
9188 (sarif_builder::maybe_make_artifact_content_object): Use the
9189 context's m_file_cache.
9190 (get_source_lines): Convert to...
9191 (sarif_builder::get_source_lines): ...this, using context's
9193 (sarif_begin_diagnostic): Remove, in favor of
9194 sarif_output_format::on_begin_diagnostic.
9195 (sarif_end_diagnostic): Remove, in favor of
9196 sarif_output_format::on_end_diagnostic.
9197 (sarif_begin_group): Remove, in favor of
9198 sarif_output_format::on_begin_group.
9199 (sarif_end_group): Remove, in favor of
9200 sarif_output_format::on_end_group.
9201 (sarif_flush_to_file): Delete.
9202 (sarif_stderr_final_cb): Delete.
9203 (sarif_output_base_file_name): Delete.
9204 (sarif_file_final_cb): Delete.
9205 (class sarif_output_format): New.
9206 (sarif_emit_diagram): Delete.
9207 (class sarif_stream_output_format): New.
9208 (class sarif_file_output_format): New.
9209 (diagnostic_output_format_init_sarif): Update.
9210 (diagnostic_output_format_init_sarif_stderr): Update.
9211 (diagnostic_output_format_init_sarif_file): Update.
9212 (diagnostic_output_format_init_sarif_stream): Update.
9213 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
9214 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
9215 diagnostic_text_output_format's dtor.
9216 (diagnostic_initialize): Update, making a new instance of
9217 diagnostic_text_output_format.
9218 (diagnostic_finish): Delete m_output_format, rather than calling
9220 (diagnostic_report_diagnostic): Assert that m_output_format is
9221 non-NULL. Replace call to begin_group_cb with call to
9222 m_output_format->on_begin_group. Replace call to
9223 diagnostic_starter with call to
9224 m_output_format->on_begin_diagnostic. Replace call to
9225 diagnostic_finalizer with call to
9226 m_output_format->on_end_diagnostic.
9227 (diagnostic_emit_diagram): Replace both optional call to
9228 m_diagrams.m_emission_cb and default implementation with call to
9229 m_output_format->on_diagram. Move default implementation to
9230 diagnostic_text_output_format::on_diagram.
9231 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
9232 end_group_cb with call to m_output_format->on_end_group.
9233 (diagnostic_text_output_format::~diagnostic_text_output_format):
9234 New, based on default_diagnostic_final_cb.
9235 (diagnostic_text_output_format::on_begin_diagnostic): New, based
9236 on code from diagnostic_report_diagnostic.
9237 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
9238 (diagnostic_text_output_format::on_diagram): New, based on code
9239 from diagnostic_emit_diagram.
9240 * diagnostic.h (class diagnostic_output_format): New.
9241 (class diagnostic_text_output_format): New.
9242 (diagnostic_context::begin_diagnostic): Move to...
9243 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
9244 (diagnostic_context::start_span): Move to...
9245 (diagnostic_context::m_text_callbacks::start_span): ...here.
9246 (diagnostic_context::end_diagnostic): Move to...
9247 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
9248 (diagnostic_context::begin_group_cb): Remove, in favor of
9249 m_output_format->on_begin_group.
9250 (diagnostic_context::end_group_cb): Remove, in favor of
9251 m_output_format->on_end_group.
9252 (diagnostic_context::final_cb): Remove, in favor of
9253 m_output_format's dtor.
9254 (diagnostic_context::m_output_format): New field.
9255 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
9256 of m_output_format->on_diagram.
9257 (diagnostic_starter): Update.
9258 (diagnostic_finalizer): Update.
9259 (diagnostic_output_format_init_sarif_stream): New.
9260 * input.cc (location_get_source_line): Move implementation apart from
9261 call to diagnostic_file_cache_init to...
9262 (file_cache::get_source_line): ...this new function...
9263 (location_get_source_line): ...and reintroduce, rewritten in terms of
9264 file_cache::get_source_line.
9265 (get_source_file_content): Likewise, refactor into...
9266 (file_cache::get_source_file_content): ...this new function.
9267 * input.h (file_cache::get_source_line): New decl.
9268 (file_cache::get_source_file_content): New decl.
9269 * selftest-diagnostic.cc
9270 (test_diagnostic_context::test_diagnostic_context): Update.
9271 * tree-diagnostic-path.cc (event_range::print): Update for
9272 change to diagnostic_context's start_span callback.
9274 2023-10-02 David Malcolm <dmalcolm@redhat.com>
9276 * diagnostic-show-locus.cc: Update for reorganization of
9277 source-printing fields of diagnostic_context.
9278 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
9279 (diagnostic_initialize): Likewise.
9280 * diagnostic.h (diagnostic_context::show_caret): Move to...
9281 (diagnostic_context::m_source_printing::enabled): ...here.
9282 (diagnostic_context::caret_max_width): Move to...
9283 (diagnostic_context::m_source_printing::max_width): ...here.
9284 (diagnostic_context::caret_chars): Move to...
9285 (diagnostic_context::m_source_printing::caret_chars): ...here.
9286 (diagnostic_context::colorize_source_p): Move to...
9287 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
9288 (diagnostic_context::show_labels_p): Move to...
9289 (diagnostic_context::m_source_printing::show_labels_p): ...here.
9290 (diagnostic_context::show_line_numbers_p): Move to...
9291 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
9292 (diagnostic_context::min_margin_width): Move to...
9293 (diagnostic_context::m_source_printing::min_margin_width): ...here.
9294 (diagnostic_context::show_ruler_p): Move to...
9295 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
9296 (diagnostic_same_line): Update for above changes.
9297 * opts.cc (common_handle_option): Update for reorganization of
9298 source-printing fields of diagnostic_context.
9299 * selftest-diagnostic.cc
9300 (test_diagnostic_context::test_diagnostic_context): Likewise.
9301 * toplev.cc (general_init): Likewise.
9302 * tree-diagnostic-path.cc (struct event_range): Likewise.
9304 2023-10-02 David Malcolm <dmalcolm@redhat.com>
9306 * diagnostic.cc (diagnostic_initialize): Initialize
9307 set_locations_cb to nullptr.
9309 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
9312 * config/arm/constraints.md: Remove Pf constraint.
9313 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
9314 (arm_atomic_load_acquire<mode>): Likewise.
9315 (arm_atomic_store<mode>): Likewise.
9316 (arm_atomic_store_release<mode>): Likewise.
9317 (atomic_load<mode>): Switch patterns to define_expand.
9318 (atomic_store<mode>): Likewise.
9319 (arm_atomic_loaddi2_ldrd): Remove predication.
9320 (arm_load_exclusive<mode>): Likewise.
9321 (arm_load_acquire_exclusive<mode>): Likewise.
9322 (arm_load_exclusivesi): Likewise.
9323 (arm_load_acquire_exclusivesi): Likewise.
9324 (arm_load_exclusivedi): Likewise.
9325 (arm_load_acquire_exclusivedi): Likewise.
9326 (arm_store_exclusive<mode>): Likewise.
9327 (arm_store_release_exclusivedi): Likewise.
9328 (arm_store_release_exclusive<mode>): Likewise.
9329 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
9331 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9334 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9336 PR tree-optimization/109154
9337 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
9338 (cmp_arg_entry): New.
9339 (predicate_scalar_phi): Use it.
9341 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9343 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
9344 (@xorsign<mode>3): ...This.
9345 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
9346 (@xorsign<mode>3): ..This and emit vectors directly
9347 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
9349 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9351 * emit-rtl.cc (validate_subreg): Relax subreg rule.
9353 2023-10-02 Tamar Christina <tamar.christina@arm.com>
9355 PR tree-optimization/109154
9356 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
9357 (cmp_arg_entry): New.
9358 (predicate_scalar_phi): Use it.
9360 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
9363 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
9365 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
9367 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
9368 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9370 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
9372 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
9374 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
9376 (cpymem<P:mode>) .. this.
9378 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9380 * combine.cc (simplify_compare_const): Properly handle unsigned
9381 constants while narrowing comparison of memory and constants.
9383 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
9385 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
9386 (MASK_ZIFENCEI): Delete;
9387 (MASK_ZIHINTNTL): Ditto.
9388 (MASK_ZIHINTPAUSE): Ditto.
9389 (TARGET_ZICSR): Ditto.
9390 (TARGET_ZIFENCEI): Ditto.
9391 (TARGET_ZIHINTNTL): Ditto.
9392 (TARGET_ZIHINTPAUSE): Ditto.
9393 (MASK_ZAWRS): Ditto.
9394 (TARGET_ZAWRS): Ditto.
9399 (TARGET_ZBA): Ditto.
9400 (TARGET_ZBB): Ditto.
9401 (TARGET_ZBC): Ditto.
9402 (TARGET_ZBS): Ditto.
9403 (MASK_ZFINX): Ditto.
9404 (MASK_ZDINX): Ditto.
9405 (MASK_ZHINX): Ditto.
9406 (MASK_ZHINXMIN): Ditto.
9407 (TARGET_ZFINX): Ditto.
9408 (TARGET_ZDINX): Ditto.
9409 (TARGET_ZHINX): Ditto.
9410 (TARGET_ZHINXMIN): Ditto.
9418 (MASK_ZKSED): Ditto.
9421 (TARGET_ZBKB): Ditto.
9422 (TARGET_ZBKC): Ditto.
9423 (TARGET_ZBKX): Ditto.
9424 (TARGET_ZKNE): Ditto.
9425 (TARGET_ZKND): Ditto.
9426 (TARGET_ZKNH): Ditto.
9427 (TARGET_ZKR): Ditto.
9428 (TARGET_ZKSED): Ditto.
9429 (TARGET_ZKSH): Ditto.
9430 (TARGET_ZKT): Ditto.
9432 (TARGET_ZTSO): Ditto.
9433 (MASK_VECTOR_ELEN_32): Ditto.
9434 (MASK_VECTOR_ELEN_64): Ditto.
9435 (MASK_VECTOR_ELEN_FP_32): Ditto.
9436 (MASK_VECTOR_ELEN_FP_64): Ditto.
9437 (MASK_VECTOR_ELEN_FP_16): Ditto.
9438 (TARGET_VECTOR_ELEN_32): Ditto.
9439 (TARGET_VECTOR_ELEN_64): Ditto.
9440 (TARGET_VECTOR_ELEN_FP_32): Ditto.
9441 (TARGET_VECTOR_ELEN_FP_64): Ditto.
9442 (TARGET_VECTOR_ELEN_FP_16): Ditto.
9445 (TARGET_ZVBB): Ditto.
9446 (TARGET_ZVBC): Ditto.
9448 (MASK_ZVKNED): Ditto.
9449 (MASK_ZVKNHA): Ditto.
9450 (MASK_ZVKNHB): Ditto.
9451 (MASK_ZVKSED): Ditto.
9452 (MASK_ZVKSH): Ditto.
9454 (MASK_ZVKNC): Ditto.
9455 (MASK_ZVKNG): Ditto.
9457 (MASK_ZVKSC): Ditto.
9458 (MASK_ZVKSG): Ditto.
9460 (TARGET_ZVKG): Ditto.
9461 (TARGET_ZVKNED): Ditto.
9462 (TARGET_ZVKNHA): Ditto.
9463 (TARGET_ZVKNHB): Ditto.
9464 (TARGET_ZVKSED): Ditto.
9465 (TARGET_ZVKSH): Ditto.
9466 (TARGET_ZVKN): Ditto.
9467 (TARGET_ZVKNC): Ditto.
9468 (TARGET_ZVKNG): Ditto.
9469 (TARGET_ZVKS): Ditto.
9470 (TARGET_ZVKSC): Ditto.
9471 (TARGET_ZVKSG): Ditto.
9472 (TARGET_ZVKT): Ditto.
9473 (MASK_ZVL32B): Ditto.
9474 (MASK_ZVL64B): Ditto.
9475 (MASK_ZVL128B): Ditto.
9476 (MASK_ZVL256B): Ditto.
9477 (MASK_ZVL512B): Ditto.
9478 (MASK_ZVL1024B): Ditto.
9479 (MASK_ZVL2048B): Ditto.
9480 (MASK_ZVL4096B): Ditto.
9481 (MASK_ZVL8192B): Ditto.
9482 (MASK_ZVL16384B): Ditto.
9483 (MASK_ZVL32768B): Ditto.
9484 (MASK_ZVL65536B): Ditto.
9485 (TARGET_ZVL32B): Ditto.
9486 (TARGET_ZVL64B): Ditto.
9487 (TARGET_ZVL128B): Ditto.
9488 (TARGET_ZVL256B): Ditto.
9489 (TARGET_ZVL512B): Ditto.
9490 (TARGET_ZVL1024B): Ditto.
9491 (TARGET_ZVL2048B): Ditto.
9492 (TARGET_ZVL4096B): Ditto.
9493 (TARGET_ZVL8192B): Ditto.
9494 (TARGET_ZVL16384B): Ditto.
9495 (TARGET_ZVL32768B): Ditto.
9496 (TARGET_ZVL65536B): Ditto.
9497 (MASK_ZICBOZ): Ditto.
9498 (MASK_ZICBOM): Ditto.
9499 (MASK_ZICBOP): Ditto.
9500 (TARGET_ZICBOZ): Ditto.
9501 (TARGET_ZICBOM): Ditto.
9502 (TARGET_ZICBOP): Ditto.
9503 (MASK_ZICOND): Ditto.
9504 (TARGET_ZICOND): Ditto.
9506 (TARGET_ZFA): Ditto.
9507 (MASK_ZFHMIN): Ditto.
9509 (MASK_ZVFHMIN): Ditto.
9511 (TARGET_ZFHMIN): Ditto.
9512 (TARGET_ZFH): Ditto.
9513 (TARGET_ZVFHMIN): Ditto.
9514 (TARGET_ZVFH): Ditto.
9515 (MASK_ZMMUL): Ditto.
9516 (TARGET_ZMMUL): Ditto.
9524 (TARGET_ZCA): Ditto.
9525 (TARGET_ZCB): Ditto.
9526 (TARGET_ZCE): Ditto.
9527 (TARGET_ZCF): Ditto.
9528 (TARGET_ZCD): Ditto.
9529 (TARGET_ZCMP): Ditto.
9530 (TARGET_ZCMT): Ditto.
9531 (MASK_SVINVAL): Ditto.
9532 (MASK_SVNAPOT): Ditto.
9533 (TARGET_SVINVAL): Ditto.
9534 (TARGET_SVNAPOT): Ditto.
9535 (MASK_XTHEADBA): Ditto.
9536 (MASK_XTHEADBB): Ditto.
9537 (MASK_XTHEADBS): Ditto.
9538 (MASK_XTHEADCMO): Ditto.
9539 (MASK_XTHEADCONDMOV): Ditto.
9540 (MASK_XTHEADFMEMIDX): Ditto.
9541 (MASK_XTHEADFMV): Ditto.
9542 (MASK_XTHEADINT): Ditto.
9543 (MASK_XTHEADMAC): Ditto.
9544 (MASK_XTHEADMEMIDX): Ditto.
9545 (MASK_XTHEADMEMPAIR): Ditto.
9546 (MASK_XTHEADSYNC): Ditto.
9547 (TARGET_XTHEADBA): Ditto.
9548 (TARGET_XTHEADBB): Ditto.
9549 (TARGET_XTHEADBS): Ditto.
9550 (TARGET_XTHEADCMO): Ditto.
9551 (TARGET_XTHEADCONDMOV): Ditto.
9552 (TARGET_XTHEADFMEMIDX): Ditto.
9553 (TARGET_XTHEADFMV): Ditto.
9554 (TARGET_XTHEADINT): Ditto.
9555 (TARGET_XTHEADMAC): Ditto.
9556 (TARGET_XTHEADMEMIDX): Ditto.
9557 (TARGET_XTHEADMEMPAIR): Ditto.
9558 (TARGET_XTHEADSYNC): Ditto.
9559 (MASK_XVENTANACONDOPS): Ditto.
9560 (TARGET_XVENTANACONDOPS): Ditto.
9561 * config/riscv/riscv.opt: Add new Mask defination.
9562 * doc/options.texi: Add explanation for this new usage.
9563 * opt-functions.awk: Add new function to find the index
9564 of target variable from extra_target_vars.
9565 * opt-read.awk: Add new function to store the Mask flags.
9566 * opth-gen.awk: Add new function to output the defination of
9567 Mask Macro and Target Macro.
9569 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
9570 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9571 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9574 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
9575 Change second parameter to rtx *.
9576 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
9577 * config/riscv/vector.md: Changed callers of
9578 riscv_vector::legitimize_move.
9579 (*mov<mode>_mem_to_mem): Remove.
9581 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9584 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
9585 Replace safe_grow with safe_grow_cleared.
9587 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9589 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
9590 in function comment.
9592 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9594 PR middle-end/111625
9595 PR middle-end/111637
9596 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
9598 (bitint_large_huge::handle_operand_addr): For uninitialized operands
9599 use limb_prec or -limb_prec precision.
9601 2023-09-30 Jakub Jelinek <jakub@redhat.com>
9603 * vec.h (quick_grow): Uncomment static_assert.
9605 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
9607 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
9609 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
9611 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
9612 SETs when the outer code is INSN.
9614 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
9616 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
9619 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
9621 * poly-int.h (poly_int_pod): Delete.
9622 (poly_coeff_traits::init_cast): New type.
9623 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
9624 (poly_int): Replace constructors that take 1 and 2 coefficients with
9625 a general one that takes an arbitrary number of coefficients.
9626 Delegate initialization to two new private constructors, one of
9627 which uses the coefficients as-is and one of which adds an extra
9628 zero of the appropriate type (and precision, where applicable).
9629 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
9630 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
9631 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
9632 * gengtype.cc (main): Don't register poly_int64_pod.
9633 * calls.cc (initialize_argument_information): Use poly_int rather
9635 (combine_pending_stack_adjustment_and_call): Likewise.
9636 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
9637 * data-streamer.h (bp_unpack_poly_value): Likewise.
9638 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
9639 (struct queued_reg_save): Likewise.
9640 * dwarf2out.h (struct dw_cfa_location): Likewise.
9641 * emit-rtl.h (struct incoming_args): Likewise.
9642 (struct rtl_data): Likewise.
9643 * expr.cc (get_bit_range): Likewise.
9644 (get_inner_reference): Likewise.
9645 * expr.h (get_bit_range): Likewise.
9646 * fold-const.cc (split_address_to_core_and_offset): Likewise.
9647 (ptr_difference_const): Likewise.
9648 * fold-const.h (ptr_difference_const): Likewise.
9649 * function.cc (try_fit_stack_local): Likewise.
9650 (instantiate_new_reg): Likewise.
9651 * function.h (struct expr_status): Likewise.
9652 (struct args_size): Likewise.
9653 * genmodes.cc (ZERO_COEFFS): Likewise.
9654 (mode_size_inline): Likewise.
9655 (mode_nunits_inline): Likewise.
9656 (emit_mode_precision): Likewise.
9657 (emit_mode_size): Likewise.
9658 (emit_mode_nunits): Likewise.
9659 * gimple-fold.cc (get_base_constructor): Likewise.
9660 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
9661 * inchash.h (class hash): Likewise.
9662 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
9663 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
9665 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
9666 * lra-eliminations.cc (self_elim_offsets): Likewise.
9667 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
9668 * omp-low.cc (omplow_simd_context): Likewise.
9669 * pretty-print.cc (pp_wide_integer): Likewise.
9670 * pretty-print.h (pp_wide_integer): Likewise.
9671 * reload.cc (struct decomposition): Likewise.
9672 * reload.h (struct reload): Likewise.
9673 * reload1.cc (spill_stack_slot_width): Likewise.
9674 (struct elim_table): Likewise.
9675 (offsets_at): Likewise.
9676 (init_eliminable_invariants): Likewise.
9677 * rtl.h (union rtunion): Likewise.
9678 (poly_int_rtx_p): Likewise.
9679 (strip_offset): Likewise.
9680 (strip_offset_and_add): Likewise.
9681 * rtlanal.cc (strip_offset): Likewise.
9682 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
9683 (get_addr_base_and_unit_offset_1): Likewise.
9684 (get_addr_base_and_unit_offset): Likewise.
9685 * tree-dfa.h (get_ref_base_and_extent): Likewise.
9686 (get_addr_base_and_unit_offset_1): Likewise.
9687 (get_addr_base_and_unit_offset): Likewise.
9688 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
9689 (strip_offset): Likewise.
9690 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
9691 * tree.cc (ptrdiff_tree_p): Likewise.
9692 * tree.h (poly_int_tree_p): Likewise.
9693 (ptrdiff_tree_p): Likewise.
9694 (get_inner_reference): Likewise.
9696 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
9698 * config/pa/pa.md (memory_barrier): Revise comment.
9699 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
9700 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
9702 2023-09-29 Jakub Jelinek <jakub@redhat.com>
9704 * vec.h (quick_insert, ordered_remove, unordered_remove,
9705 block_remove, qsort, sort, stablesort, quick_grow): Guard
9706 std::is_trivially_{copyable,default_constructible} and
9707 vec_detail::is_trivially_copyable_or_pair static assertions
9708 with GCC_VERSION >= 5000.
9709 (vec_detail::is_trivially_copyable_or_pair): Guard definition
9710 with GCC_VERSION >= 5000.
9712 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
9714 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
9715 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
9716 and aarch64_stp_policy to aarch64_ldp_stp_policy.
9717 (enum aarch64_stp_policy): Removed.
9718 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
9719 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
9720 and left only the definitions to the aarch64-opts one.
9721 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
9722 (aarch64_parse_stp_policy): Removed.
9723 (aarch64_override_options_internal): Removed calls to parsing
9724 functions and added obvious direct assignments.
9725 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
9726 code quality based on the new changes.
9727 * config/aarch64/aarch64.opt: Use single enum type
9728 aarch64_ldp_stp_policy for both ldp and stp options.
9730 2023-09-29 Richard Biener <rguenther@suse.de>
9732 PR tree-optimization/111583
9733 * tree-loop-distribution.cc (find_single_drs): Ensure the
9734 load/store are always executed.
9736 2023-09-29 Jakub Jelinek <jakub@redhat.com>
9738 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
9739 quick_grow_cleared method on unprom rather than quick_grow.
9741 2023-09-29 Sergei Trofimovich <siarheit@google.com>
9743 PR middle-end/111505
9744 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
9745 Add new helper. Use helper instead of memset() to wipe out pointers.
9747 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
9749 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
9751 * builtins.cc (c_readstr): Likewise. Build a local array of
9752 bytes and use native_decode_rtx to get the rtx image.
9753 (builtin_memcpy_read_str): Simplify accordingly.
9754 (builtin_strncpy_read_str): Likewise.
9755 (builtin_memset_read_str): Likewise.
9756 (builtin_memset_gen_str): Likewise.
9757 * expr.cc (string_cst_read_str): Likewise.
9759 2023-09-29 Jakub Jelinek <jakub@redhat.com>
9761 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
9762 instead of quick_grow on vec<bitmap_head> members.
9763 * cfganal.cc (control_dependences::control_dependences): Likewise.
9764 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
9765 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
9766 on auto_vec<bitmap_head> vars.
9767 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
9768 of quick_grow on vec<bitmap_head> var.
9770 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
9773 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
9775 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
9778 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
9781 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
9782 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
9783 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
9785 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
9788 2023-09-28 Pan Li <pan2.li@intel.com>
9791 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
9793 * config/riscv/vector-iterators.md: New iterator.
9795 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
9797 * rtl.h (lra_in_progress): Change type to bool.
9798 (ira_in_progress): Add new extern.
9799 * ira.cc (ira_in_progress): New global.
9800 (pass_ira::execute): Set up ira_in_progress.
9801 * lra.cc: (lra_in_progress): Change type to bool and initialize.
9802 (lra): Use bool values for lra_in_progress.
9803 * lra-eliminations.cc (init_elim_table): Ditto.
9805 2023-09-28 Richard Biener <rguenther@suse.de>
9808 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
9809 Use a heap allocated worklist for CFG traversal instead of
9812 2023-09-28 Jakub Jelinek <jakub@redhat.com>
9813 Jonathan Wakely <jwakely@redhat.com>
9815 * vec.h: Mention in file comment limited support for non-POD types
9817 (vec_destruct): New function template.
9818 (release): Use it for non-trivially destructible T.
9819 (truncate): Likewise.
9820 (quick_push): Perform a placement new into slot
9821 instead of assignment.
9822 (pop): For non-trivially destructible T return void
9823 rather than T & and destruct the popped element.
9824 (quick_insert, ordered_remove): Note that they aren't suitable
9825 for non-trivially copyable types. Add static_asserts for that.
9826 (block_remove): Assert T is trivially copyable.
9827 (vec_detail::is_trivially_copyable_or_pair): New trait.
9828 (qsort, sort, stablesort): Assert T is trivially copyable or
9829 std::pair with both trivally copyable types.
9830 (quick_grow): Add assert T is trivially default constructible,
9831 for now commented out.
9832 (quick_grow_cleared): Don't call quick_grow, instead inline it
9833 by hand except for the new static_assert.
9834 (gt_ggc_mx): Assert T is trivially destructable.
9835 (auto_vec::operator=): Formatting fixes.
9836 (auto_vec::auto_vec): Likewise.
9837 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
9838 it manually and call quick_grow_cleared method rather than quick_grow.
9839 (safe_grow_cleared): Likewise.
9840 * edit-context.cc (class line_event): Move definition earlier.
9841 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
9843 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
9844 safe_grow_cleared instead of safe_grow followed by placement new
9845 constructing the elements.
9847 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
9849 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
9850 * tree-affine.cc (expr_to_aff_combination): Likewise.
9852 2023-09-28 Richard Biener <rguenther@suse.de>
9854 PR tree-optimization/111614
9855 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
9856 convert the first vector when required.
9858 2023-09-28 xuli <xuli1@eswincomputing.com>
9861 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
9862 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
9864 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
9866 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
9868 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
9871 * configure: Regenerate.
9872 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
9874 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
9875 Philipp Tomsich <philipp.tomsich@vrull.eu>
9876 Manolis Tsamis <manolis.tsamis@vrull.eu>
9878 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
9880 (enum aarch64_stp_policy): New enum type.
9881 * config/aarch64/aarch64-protos.h (struct tune_params): Add
9882 appropriate enums for the policies.
9883 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
9884 * config/aarch64/aarch64-tuning-flags.def
9885 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
9887 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
9888 function to parse ldp-policy parameter.
9889 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
9890 (aarch64_override_options_internal): Call parsing functions.
9891 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
9892 (aarch64_operands_ok_for_ldpstp): Add call to
9893 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
9894 check and alignment check and remove superseded ones.
9895 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
9896 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
9897 check and alignment check and remove superseded ones.
9898 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
9899 (aarch64-stp-policy): New param.
9900 * doc/invoke.texi: Document the parameters accordingly.
9902 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
9904 * tree-data-ref.cc (include calls.h): Add new include.
9905 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
9907 2023-09-27 Richard Biener <rguenther@suse.de>
9909 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
9911 2023-09-27 Jakub Jelinek <jakub@redhat.com>
9914 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
9915 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
9917 * function.cc (assign_parm_find_data_types): Likewise.
9919 2023-09-27 Pan Li <pan2.li@intel.com>
9921 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
9922 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
9923 (enum insn_type): Ditto.
9924 (expand_vec_roundeven): New func decl.
9925 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
9927 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9930 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
9932 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9934 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
9936 2023-09-27 Pan Li <pan2.li@intel.com>
9938 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
9939 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
9940 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
9941 (expand_vec_trunc): Ditto.
9943 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
9947 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
9948 Handle failure from expand_builtin_atomic_test_and_set.
9949 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
9950 generate atomic code through target support, return NULL
9951 instead of emitting non-atomic code. Also, for code handling
9952 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
9953 from calling emit_store_flag_force instead of returning NULL.
9955 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
9957 PR tree-optimization/111599
9958 * value-relation.cc (relation_oracle::valid_equivs): Ensure
9961 2023-09-26 Andrew Pinski <apinski@marvell.com>
9963 PR tree-optimization/106164
9964 PR tree-optimization/111456
9965 * match.pd (`(A ==/!= B) & (A CMP C)`):
9966 Support an optional cast on the second A.
9967 (`(A ==/!= B) | (A CMP C)`): Likewise.
9969 2023-09-26 Andrew Pinski <apinski@marvell.com>
9971 PR tree-optimization/111469
9972 * tree-ssa-phiopt.cc (minmax_replacement): Fix
9973 the assumption for the `non-diamond` handling cases
9976 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9978 * match.pd: Optimize COND_ADD reduction pattern.
9980 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9982 PR tree-optimization/111594
9983 PR tree-optimization/110660
9984 * match.pd: Optimize COND_LEN_ADD reduction.
9986 2023-09-26 Pan Li <pan2.li@intel.com>
9988 * config/riscv/autovec.md (round<mode>2): New pattern.
9989 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
9990 (enum insn_type): Ditto.
9991 (expand_vec_round): New function decl.
9992 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
9994 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
9996 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
9998 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
10000 PR middle-end/111547
10001 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
10002 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
10004 2023-09-26 Pan Li <pan2.li@intel.com>
10006 * config/riscv/autovec.md (rint<mode>2): New pattern.
10007 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
10008 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
10010 2023-09-26 Pan Li <pan2.li@intel.com>
10012 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
10013 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10014 (expand_vec_nearbyint): New function decl.
10015 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
10017 2023-09-26 Pan Li <pan2.li@intel.com>
10019 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
10020 (get_fp_rounding_coefficient): Rename.
10021 (gen_floor_const_fp): Remove.
10022 (expand_vec_ceil): Take renamed func.
10023 (expand_vec_floor): Ditto.
10025 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
10027 PR middle-end/111497
10028 * lra-constraints.cc (lra_constraints): Copy substituted
10030 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
10032 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
10034 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
10035 return statement in the varying case.
10037 2023-09-25 Xi Ruoyao <xry111@xry111.site>
10039 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
10041 2023-09-25 Andrew Pinski <apinski@marvell.com>
10043 PR tree-optimization/110386
10044 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
10046 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10049 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
10051 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
10054 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
10057 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
10060 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
10061 target_option_default_node when the callee has no option
10062 attributes, also simplify the existing code accordingly.
10064 2023-09-25 Guo Jie <guojie@loongson.cn>
10066 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
10067 pattern for vector construction.
10068 (vec_set<mode>_internal): Ditto.
10069 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
10070 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
10071 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
10072 Optimized the implementation of vector construction.
10073 (loongarch_expand_vector_init_same): New function.
10074 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
10075 pattern for vector construction.
10076 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
10078 (vec_concatv2df): Ditto.
10079 (vec_concatv4sf): Ditto.
10081 2023-09-24 Pan Li <pan2.li@intel.com>
10084 * config/riscv/riscv-v.cc
10085 (expand_vector_init_merge_repeating_sequence): Bugfix
10087 2023-09-24 Andrew Pinski <apinski@marvell.com>
10089 PR tree-optimization/111543
10090 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
10092 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10094 * config/riscv/autovec-opt.md: Extend VLS modes
10095 * config/riscv/vector-iterators.md: Ditto.
10097 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10099 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
10101 2023-09-23 Pan Li <pan2.li@intel.com>
10103 * config/riscv/autovec.md (floor<mode>2): New pattern.
10104 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
10105 (enum insn_type): Ditto.
10106 (expand_vec_floor): New function decl.
10107 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
10108 (expand_vec_floor): Ditto.
10110 2023-09-22 Pan Li <pan2.li@intel.com>
10112 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
10113 (emit_vec_float_cmp_mask): Rename.
10114 (expand_vec_copysign): Ditto.
10115 (emit_vec_copysign): Ditto.
10116 (emit_vec_abs): New function impl.
10117 (emit_vec_cvt_x_f): Ditto.
10118 (emit_vec_cvt_f_x): Ditto.
10119 (expand_vec_ceil): Ditto.
10121 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10123 * config/riscv/vector-iterators.md: Extend VLS modes.
10125 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10127 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
10128 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
10129 (vec_duplicate<mode>): Ditto.
10131 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10133 * config/riscv/autovec.md: Add VLS conditional patterns.
10134 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
10135 (expand_cond_binop): Ditto.
10136 (expand_cond_ternop): Ditto.
10137 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
10138 (expand_cond_binop): Ditto.
10139 (expand_cond_ternop): Ditto.
10141 2023-09-22 xuli <xuli1@eswincomputing.com>
10144 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
10145 into vrgatherei16.vv.
10147 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
10149 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
10150 New combine patterns.
10151 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
10153 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
10155 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
10156 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
10158 2023-09-22 Pan Li <pan2.li@intel.com>
10160 * config/riscv/autovec.md (ceil<mode>2): New pattern.
10161 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
10162 (enum insn_type): Ditto.
10163 (expand_vec_ceil): New function decl.
10164 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
10165 (expand_vec_float_cmp_mask): Ditto.
10166 (expand_vec_copysign): Ditto.
10167 (expand_vec_ceil): Ditto.
10168 * config/riscv/vector.md: Add VLS mode support.
10170 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10172 * config/riscv/autovec.md: Extend VLS modes.
10174 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10176 * config/riscv/vector-iterators.md: Extend VLS modes.
10178 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
10179 Robin Dapp <rdapp.gcc@gmail.com>
10181 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
10182 (emit_nonvlmax_insn): Adjust comments.
10183 (emit_vlmax_insn_lra): Adjust comments.
10185 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10187 * config.gcc (*linux*): Set rust target_objs, and
10188 target_has_targetrustm,
10189 * config/t-linux (linux-rust.o): New rule.
10190 * config/linux-rust.cc: New file.
10192 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10194 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
10195 rust_target_objs and target_has_targetrustm.
10196 * config/t-winnt (winnt-rust.o): New rule.
10197 * config/winnt-rust.cc: New file.
10199 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10201 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
10202 and target_has_targetrustm.
10203 * config/fuchsia-rust.cc: New file.
10204 * config/t-fuchsia: New file.
10206 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10208 * config.gcc (*-*-vxworks*): Set rust_target_objs and
10209 target_has_targetrustm.
10210 * config/t-vxworks (vxworks-rust.o): New rule.
10211 * config/vxworks-rust.cc: New file.
10213 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10215 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
10216 target_has_targetrustm.
10217 * config/t-dragonfly (dragonfly-rust.o): New rule.
10218 * config/dragonfly-rust.cc: New file.
10220 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10222 * config.gcc (*-*-solaris2*): Set rust_target_objs and
10223 target_has_targetrustm.
10224 * config/t-sol2 (sol2-rust.o): New rule.
10225 * config/sol2-rust.cc: New file.
10227 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10229 * config.gcc (*-*-openbsd*): Set rust_target_objs and
10230 target_has_targetrustm.
10231 * config/t-openbsd (openbsd-rust.o): New rule.
10232 * config/openbsd-rust.cc: New file.
10234 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10236 * config.gcc (*-*-netbsd*): Set rust_target_objs and
10237 target_has_targetrustm.
10238 * config/t-netbsd (netbsd-rust.o): New rule.
10239 * config/netbsd-rust.cc: New file.
10241 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10243 * config.gcc (*-*-freebsd*): Set rust_target_objs and
10244 target_has_targetrustm.
10245 * config/t-freebsd (freebsd-rust.o): New rule.
10246 * config/freebsd-rust.cc: New file.
10248 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10250 * config.gcc (*-*-darwin*): Set rust_target_objs and
10251 target_has_targetrustm.
10252 * config/t-darwin (darwin-rust.o): New rule.
10253 * config/darwin-rust.cc: New file.
10255 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10257 * config/i386/t-i386 (i386-rust.o): New rule.
10258 * config/i386/i386-rust.cc: New file.
10259 * config/i386/i386-rust.h: New file.
10261 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10263 * doc/tm.texi: Regenerate.
10264 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
10266 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10268 * doc/tm.texi: Regenerate.
10269 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
10270 TARGET_RUST_CPU_INFO.
10272 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
10274 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
10275 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
10276 (tm_rust.h, cs-tm_rust.h, default-rust.o,
10277 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
10278 (s-tm-texi): Also check timestamp on rust-target.def.
10279 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
10280 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
10281 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
10283 * configure: Regenerate.
10284 * configure.ac (tm_rust_file_list, tm_rust_include_list,
10285 rust_target_objs): Add substitutes.
10286 * doc/tm.texi: Regenerate.
10287 * doc/tm.texi.in (targetrustm): Document.
10288 (target_has_targetrustm): Document.
10289 * genhooks.cc: Include rust/rust-target.def.
10290 * config/default-rust.cc: New file.
10292 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10295 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
10296 * config/riscv/predicates.md (autovec_else_operand): New predicate.
10297 * config/riscv/riscv-v.cc (get_else_operand): New function.
10298 (expand_cond_len_unop): Adapt ELSE value.
10299 (expand_cond_len_binop): Ditto.
10300 (expand_cond_len_ternop): Ditto.
10301 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
10302 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
10304 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10307 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
10309 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
10311 PR tree-optimization/111355
10312 * match.pd ((X + C) / N): Update pattern.
10314 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
10316 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
10318 2023-09-21 xuli <xuli1@eswincomputing.com>
10321 * config/riscv/constraints.md (c01): const_int 1.
10322 (c02): const_int 2.
10323 (c04): const_int 4.
10324 (c08): const_int 8.
10325 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
10326 (vector_eew16_stride_operand): Ditto.
10327 (vector_eew32_stride_operand): Ditto.
10328 (vector_eew64_stride_operand): Ditto.
10329 * config/riscv/vector-iterators.md: New iterator for stride operand.
10330 * config/riscv/vector.md: Add stride = element width constraint.
10332 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
10334 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
10335 (const_1_or_4_operand): Ditto.
10336 (vector_gs_scale_operand_16): Ditto.
10337 (vector_gs_scale_operand_32): Ditto.
10338 * config/riscv/vector-iterators.md: Adjust.
10340 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10342 * config/riscv/autovec.md: Extend VLS modes.
10343 * config/riscv/vector-iterators.md: Ditto.
10344 * config/riscv/vector.md: Ditto.
10346 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
10348 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
10349 of the return value.
10350 (ssa_cache::dump): Don't print GLOBAL RANGE header.
10351 (ssa_lazy_cache::merge_range): Adjust return value meaning.
10352 (ranger_cache::dump): Print GLOBAL RANGE header.
10354 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
10356 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
10358 (foperator_unordered_gt::fold_range): Same.
10359 (foperator_unordered_lt::fold_range): Same.
10360 (foperator_unordered_le::fold_range): Same.
10362 2023-09-20 Jakub Jelinek <jakub@redhat.com>
10364 * builtins.h (type_to_class): Declare.
10365 * builtins.cc (type_to_class): No longer static. Return
10366 int rather than enum.
10367 * doc/extend.texi (__builtin_classify_type): Document.
10369 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10372 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
10373 * optabs.cc (maybe_legitimize_operand): Ditto.
10374 (can_reuse_operands_p): Ditto.
10375 * optabs.h (enum expand_operand_type): Ditto.
10376 (create_undefined_input_operand): Ditto.
10378 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
10380 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
10381 'omp allocate' variables; move stack cleanup after other
10383 (omp_notice_variable): Process original decl when decl
10384 of the value-expression for a 'omp allocate' variable is passed.
10385 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
10387 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
10389 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
10390 support simplifying vector int not only scalar int.
10392 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10394 * config/riscv/vector-iterators.md: Extend VLS floating-point.
10396 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10398 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
10400 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
10403 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
10404 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
10406 2023-09-20 Richard Biener <rguenther@suse.de>
10408 PR tree-optimization/111489
10409 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
10411 2023-09-20 Richard Biener <rguenther@suse.de>
10413 PR tree-optimization/111489
10414 * doc/invoke.texi (--param uninit-max-chain-len): Document.
10415 (--param uninit-max-num-chains): Likewise.
10416 * params.opt (-param=uninit-max-chain-len=): New.
10417 (-param=uninit-max-num-chains=): Likewise.
10418 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
10419 param_uninit_max_num_chains.
10420 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
10421 (uninit_analysis::init_use_preds): Avoid VLA.
10422 (uninit_analysis::init_from_phi_def): Likewise.
10423 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
10424 template parameter.
10426 2023-09-20 Jakub Jelinek <jakub@redhat.com>
10428 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
10429 GET_MODE_PRECISION of TImode or DImode depending on whether
10430 TImode is supported scalar mode.
10431 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
10432 * expr.cc (expand_expr_real_1): Likewise.
10433 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
10434 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
10436 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
10438 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
10439 (*n<optab><mode>): Ditto.
10440 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
10441 (*<any_shiftrt:optab>trunc<mode>): Ditto.
10442 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
10443 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
10444 (*single_widen_mult<any_extend:su><mode>): Ditto.
10445 (*single_widen_mul<any_extend:su><mode>): Ditto.
10446 (*single_widen_mult<mode>): Ditto.
10447 (*single_widen_mul<mode>): Ditto.
10448 (*dual_widen_fma<mode>): Ditto.
10449 (*dual_widen_fma<su><mode>): Ditto.
10450 (*single_widen_fma<mode>): Ditto.
10451 (*single_widen_fma<su><mode>): Ditto.
10452 (*dual_fma<mode>): Ditto.
10453 (*single_fma<mode>): Ditto.
10454 (*dual_fnma<mode>): Ditto.
10455 (*dual_widen_fnma<mode>): Ditto.
10456 (*single_fnma<mode>): Ditto.
10457 (*single_widen_fnma<mode>): Ditto.
10458 (*dual_fms<mode>): Ditto.
10459 (*dual_widen_fms<mode>): Ditto.
10460 (*single_fms<mode>): Ditto.
10461 (*single_widen_fms<mode>): Ditto.
10462 (*dual_fnms<mode>): Ditto.
10463 (*dual_widen_fnms<mode>): Ditto.
10464 (*single_fnms<mode>): Ditto.
10465 (*single_widen_fnms<mode>): Ditto.
10467 2023-09-20 Jakub Jelinek <jakub@redhat.com>
10470 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
10471 on vars or function decls if -fopenmp or -fopenmp-simd.
10473 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
10476 * config/riscv/autovec-opt.md: Add missed operand.
10478 2023-09-20 Omar Sandoval <osandov@osandov.com>
10481 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
10482 dwarf_split_debug_info.
10484 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10486 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
10487 (vectorize_related_mode): Add VLS related modes.
10488 * config/riscv/vector-iterators.md: Extend VLS modes.
10490 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
10492 PR rtl-optimization/110071
10493 * ira-color.cc (improve_allocation): Consider cost of callee
10496 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
10497 Xi Ruoyao <xry111@xry111.site>
10499 * configure: Regenerate.
10500 * configure.ac: Checking assembler for -mno-relax support.
10501 Disable relaxation when probing leb128 support.
10503 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
10505 * config.in: Regenerate.
10506 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
10507 mrelax. And set the initial value of explicit-relocs according to the
10509 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
10510 --no-relax option to the linker.
10511 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
10512 -mno-relax, pass the -mno-relax option to the assembler.
10513 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
10514 * config/loongarch/loongarch.opt: Regenerate.
10515 * configure: Regenerate.
10516 * configure.ac: Add detection of support for binutils relax function.
10518 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
10520 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
10521 -fdeps-target= flags.
10522 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
10523 only -fdeps-format= is specified.
10524 * json.h: Add a TODO item to refactor out to share with
10525 `libcpp/mkdeps.cc`.
10527 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
10528 Jason Merrill <jason@redhat.com>
10530 * gcc.cc (join_spec_func): Add a spec function to join all
10533 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
10535 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
10536 src_op_0 var to avoid rtl check error.
10538 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10540 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
10542 (operator_not_equal::fold_range): Handle VREL_EQ.
10543 (operator_lt::fold_range): Remove special casing for VREL_EQ.
10544 (operator_gt::fold_range): Same.
10545 (foperator_unordered_equal::fold_range): Same.
10547 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
10549 * doc/extend.texi: Document attributes hot, cold on C++ types.
10551 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
10553 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
10554 modulo instruction is disabled.
10555 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
10556 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
10557 (define_expand umod<mode>3): New.
10558 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
10559 instruction is disabled.
10560 (umodti3, modti3): Check if the modulo instruction is disabled.
10562 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
10564 * doc/gm2.texi (fdebug-builtins): Correct description.
10566 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
10568 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
10569 * config/iq2000/iq2000.md (rotrsi3): Use it.
10571 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10573 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
10574 (operator_lt::op2_range): Same.
10575 (operator_le::op1_range): Same.
10576 (operator_le::op2_range): Same.
10577 (operator_gt::op1_range): Same.
10578 (operator_gt::op2_range): Same.
10579 (operator_ge::op1_range): Same.
10580 (operator_ge::op2_range): Same.
10581 (foperator_unordered_lt::op1_range): Same.
10582 (foperator_unordered_lt::op2_range): Same.
10583 (foperator_unordered_le::op1_range): Same.
10584 (foperator_unordered_le::op2_range): Same.
10585 (foperator_unordered_gt::op1_range): Same.
10586 (foperator_unordered_gt::op2_range): Same.
10587 (foperator_unordered_ge::op1_range): Same.
10588 (foperator_unordered_ge::op2_range): Same.
10590 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10592 * value-range.h (frange::update_nan): New.
10594 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
10596 * range-op-float.cc (operator_not_equal::op2_range): New.
10597 * range-op-mixed.h: Add operator_not_equal::op2_range.
10599 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
10601 PR tree-optimization/110080
10602 PR tree-optimization/110249
10603 * tree-vrp.cc (remove_unreachable::final_p): New.
10604 (remove_unreachable::maybe_register): Rename from
10605 maybe_register_block and call early or final routine.
10606 (fully_replaceable): New.
10607 (remove_unreachable::handle_early): New.
10608 (remove_unreachable::remove_and_update_globals): Remove
10609 non-final processing.
10610 (rvrp_folder::rvrp_folder): Add final flag to constructor.
10611 (rvrp_folder::post_fold_bb): Remove unreachable registration.
10612 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
10613 (execute_ranger_vrp): Adjust some call parameters.
10615 2023-09-19 Richard Biener <rguenther@suse.de>
10618 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
10620 * tree-pretty-print.cc (op_symbol): Likewise.
10621 (op_symbol_code): Print TDF_GIMPLE variant if requested.
10622 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
10624 (dump_gimple_cond): Likewise.
10626 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
10627 Pan Li <pan2.li@intel.com>
10629 * tree-streamer.h (bp_unpack_machine_mode): If
10630 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
10632 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10634 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
10636 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10638 * config/riscv/autovec.md: Extend VLS modes.
10639 * config/riscv/vector.md: Ditto.
10641 2023-09-19 Richard Biener <rguenther@suse.de>
10643 PR tree-optimization/111465
10644 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
10645 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
10647 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10649 * config/riscv/autovec.md: Extend VLS floating-point modes.
10650 * config/riscv/vector.md: Ditto.
10652 2023-09-19 Jakub Jelinek <jakub@redhat.com>
10654 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
10655 nor check type_has_mode_precision_p for width larger than [TD]Imode
10657 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
10658 to type. Use boolean_true_node instead of
10659 constant_boolean_node (true, boolean_type_node). Formatting fixes.
10661 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10663 * config/riscv/autovec.md: Add VLS modes.
10664 * config/riscv/vector.md: Ditto.
10666 2023-09-19 Jakub Jelinek <jakub@redhat.com>
10668 * tree.cc (build_bitint_type): Assert precision is not 0, or
10669 for signed types 1.
10670 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
10671 of unsigned _BitInt(1).
10673 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
10675 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
10676 Removed old combine patterns.
10677 (*single_<optab>mult_plus<mode>): Ditto.
10678 (*double_<optab>mult_plus<mode>): Ditto.
10679 (*sign_zero_extend_fma): Ditto.
10680 (*zero_sign_extend_fma): Ditto.
10681 (*double_widen_fma<mode>): Ditto.
10682 (*single_widen_fma<mode>): Ditto.
10683 (*double_widen_fnma<mode>): Ditto.
10684 (*single_widen_fnma<mode>): Ditto.
10685 (*double_widen_fms<mode>): Ditto.
10686 (*single_widen_fms<mode>): Ditto.
10687 (*double_widen_fnms<mode>): Ditto.
10688 (*single_widen_fnms<mode>): Ditto.
10689 (*reduc_plus_scal_<mode>): Adjust name.
10690 (*widen_reduc_plus_scal_<mode>): Adjust name.
10691 (*dual_widen_fma<mode>): New combine pattern.
10692 (*dual_widen_fmasu<mode>): Ditto.
10693 (*dual_widen_fmaus<mode>): Ditto.
10694 (*dual_fma<mode>): Ditto.
10695 (*single_fma<mode>): Ditto.
10696 (*dual_fnma<mode>): Ditto.
10697 (*single_fnma<mode>): Ditto.
10698 (*dual_fms<mode>): Ditto.
10699 (*single_fms<mode>): Ditto.
10700 (*dual_fnms<mode>): Ditto.
10701 (*single_fnms<mode>): Ditto.
10702 * config/riscv/autovec.md (fma<mode>4):
10703 Reafctor fma pattern.
10704 (*fma<VI:mode><P:mode>): Removed.
10705 (fnma<mode>4): Reafctor.
10706 (*fnma<VI:mode><P:mode>): Removed.
10707 (*fma<VF:mode><P:mode>): Removed.
10708 (*fnma<VF:mode><P:mode>): Removed.
10709 (fms<mode>4): Reafctor.
10710 (*fms<VF:mode><P:mode>): Removed.
10711 (fnms<mode>4): Reafctor.
10712 (*fnms<VF:mode><P:mode>): Removed.
10713 * config/riscv/riscv-protos.h (prepare_ternary_operands):
10715 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
10716 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
10717 (*pred_mul_plus<mode>): Removed.
10718 (*pred_mul_plus<mode>_scalar): Removed.
10719 (*pred_mul_plus<mode>_extended_scalar): Removed.
10720 (*pred_minus_mul<mode>_undef): New pattern.
10721 (*pred_minus_mul<mode>): Removed.
10722 (*pred_minus_mul<mode>_scalar): Removed.
10723 (*pred_minus_mul<mode>_extended_scalar): Removed.
10724 (*pred_mul_<optab><mode>_undef): New pattern.
10725 (*pred_mul_<optab><mode>): Removed.
10726 (*pred_mul_<optab><mode>_scalar): Removed.
10727 (*pred_mul_neg_<optab><mode>_undef): New pattern.
10728 (*pred_mul_neg_<optab><mode>): Removed.
10729 (*pred_mul_neg_<optab><mode>_scalar): Removed.
10731 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
10733 * config/riscv/riscv-vector-builtins.cc
10734 (builtin_decl, expand_builtin): Replace SVE with RVV.
10736 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
10738 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
10739 riscv-cmo.def and riscv-scalar-crypto.def.
10741 2023-09-18 Pan Li <pan2.li@intel.com>
10743 * config/riscv/autovec.md: Extend to vls mode.
10745 2023-09-18 Pan Li <pan2.li@intel.com>
10747 * config/riscv/autovec.md: Bugfix.
10748 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
10750 2023-09-18 Andrew Pinski <apinski@marvell.com>
10752 PR tree-optimization/111442
10753 * match.pd (zero_one_valued_p): Have the bit_and match not be
10756 2023-09-18 Andrew Pinski <apinski@marvell.com>
10758 PR tree-optimization/111435
10759 * match.pd (zero_one_valued_p): Don't do recursion
10762 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
10764 * config/darwin-protos.h (enum darwin_external_toolchain): New.
10765 * config/darwin.cc (DSYMUTIL_VERSION): New.
10766 (darwin_override_options): Choose the default debug DWARF version
10767 depending on the configured dsymutil version.
10769 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
10771 * configure: Regenerate.
10772 * configure.ac: Handle explict disable of stdlib option, set
10773 defaults for Darwin.
10775 2023-09-18 Andrew Pinski <apinski@marvell.com>
10777 PR tree-optimization/111431
10778 * match.pd (`(a == CST) & a`): New pattern.
10780 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10782 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
10783 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
10785 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
10788 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
10789 Add support for immediates using shifted ORR/BIC.
10790 (aarch64_split_dimode_const_store): Apply if we save one instruction.
10791 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
10792 Make pattern global.
10794 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
10796 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
10797 (neoverse-v1): Place before zeus.
10798 (neoverse-v2): Place before demeter.
10799 * config/aarch64/aarch64-tune.md: Regenerate.
10801 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10803 * config/riscv/autovec.md: Add VLS modes.
10804 * config/riscv/vector-iterators.md: Ditto.
10805 * config/riscv/vector.md: Ditto.
10807 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10809 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
10810 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
10812 2023-09-18 Richard Biener <rguenther@suse.de>
10814 PR tree-optimization/111294
10815 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
10817 (back_threader::find_paths_to_names): Adjust.
10818 (back_threader::maybe_thread_block): Likewise.
10819 (back_threader_profitability::possibly_profitable_path_p): Remove
10820 code applying extra costs to copies PHIs.
10822 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10824 * config/riscv/autovec.md: Extend VLS modes.
10825 * config/riscv/vector.md: Ditto.
10827 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10829 * config/riscv/vector.md (mov<mode>): New pattern.
10830 (*mov<mode>_mem_to_mem): Ditto.
10831 (*mov<mode>): Ditto.
10832 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
10833 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
10834 (*mov<mode>_vls): Ditto.
10835 (movmisalign<mode>): Ditto.
10836 (@vec_duplicate<mode>): Ditto.
10837 * config/riscv/autovec-vls.md: Removed.
10839 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10842 * config/riscv/autovec.md: Add VLS modes.
10844 2023-09-18 Jason Merrill <jason@redhat.com>
10846 * doc/gty.texi: Add discussion of cache vs. deletable.
10848 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10850 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
10851 (copysign<mode>3): Ditto.
10852 (xorsign<mode>3): Ditto.
10853 (<optab><mode>2): Ditto.
10854 * config/riscv/autovec.md: Extend VLS modes.
10856 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
10858 PR middle-end/111303
10859 * match.pd ((t * 2) / 2): Update pattern.
10861 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
10863 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
10865 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10868 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
10869 (vec_extract<mode><vel>): Ditto.
10870 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
10871 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
10872 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
10874 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
10876 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
10877 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
10878 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
10879 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
10880 new insn/expansions.
10881 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
10882 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
10883 (*riscv_<sha256_op>_si): New raw instruction for RV32.
10884 (*riscv_<sm3_op>_si): Ditto.
10885 (*riscv_<sm4_op>_si): Ditto.
10886 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
10887 (riscv_<sm3_op>_di_extended): Ditto.
10888 (riscv_<sm4_op>_di_extended): Ditto.
10889 (riscv_<sha256_op>_si): New common instruction expansion.
10890 (riscv_<sm3_op>_si): Ditto.
10891 (riscv_<sm4_op>_si): Ditto.
10892 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
10893 "crypto_zksh" and "crypto_zksed". Remove availability
10894 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
10895 * config/riscv/riscv-ftypes.def: Remove unused function type.
10896 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
10897 intrinsics to operate on uint32_t.
10899 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
10901 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
10902 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
10903 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
10904 Removed as no longer used.
10905 (RISCV_ATYPE_UDI): New for uint64_t.
10906 * config/riscv/riscv-cmo.def: Make types unsigned for not working
10907 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
10908 argument/return types.
10909 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
10910 number and shift amount types unsigned.
10911 * config/riscv/riscv-scalar-crypto.def: Ditto.
10913 2023-09-16 Pan Li <pan2.li@intel.com>
10915 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
10917 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
10919 * config/riscv/predicates.md: Restrict predicate
10920 to allow 'reg' only.
10922 2023-09-15 Andrew Pinski <apinski@marvell.com>
10924 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
10925 Also match `a & zero_one_valued_p` too.
10927 2023-09-15 Andrew Pinski <apinski@marvell.com>
10929 PR tree-optimization/111414
10930 * match.pd (`(1 >> X) != 0`): Check to see if
10931 the integer_onep was an integral type (not a vector type).
10933 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
10935 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
10936 run phi analysis, and do it before loop analysis.
10938 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
10940 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
10943 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
10945 PR tree-optimization/111407
10946 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
10947 when one of the operands is subject to abnormal coalescing.
10949 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
10951 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
10952 (enum insn_type): Ditto.
10953 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
10954 (emit_vlmax_insn): Adjust.
10955 (emit_nonvlmax_insn): Adjust.
10956 (emit_vlmax_insn_lra): Adjust.
10958 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
10960 * config/riscv/autovec-opt.md: Adjust.
10961 * config/riscv/autovec.md: Ditto.
10962 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
10963 (expand_reduction): Adjust expand_reduction prototype.
10964 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
10965 (expand_reduction): Refactor expand_reduction.
10967 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
10970 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
10971 the lower memory access to a mem-pair operand.
10973 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
10975 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
10976 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
10977 before the driver canonicalization routines.
10978 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
10979 to loongarch-driver.h
10980 * config/loongarch/t-linux: Move multilib-related definitions to
10982 * config/loongarch/t-multilib: New file. Inject library build
10983 options obtained from --with-multilib-list.
10984 * config/loongarch/t-loongarch: Same.
10986 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
10989 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
10990 New combine pattern.
10991 (*fold_left_widen_plus_<mode>): Ditto.
10992 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
10993 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
10994 Change from define_expand to define_insn_and_split.
10995 (fold_left_plus_<mode>): Ditto.
10996 (mask_len_fold_left_plus_<mode>): Ditto.
10997 * config/riscv/riscv-v.cc (expand_reduction):
10998 Support widen reduction.
10999 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
11000 Add new iterators and attrs.
11002 2023-09-14 David Malcolm <dmalcolm@redhat.com>
11004 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
11005 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
11006 (sarif_thread_flow::sarif_thread_flow): New.
11007 (sarif_builder::make_code_flow_object): Reimplement, creating
11008 per-thread threadFlow objects, populating them with the relevant
11010 (sarif_builder::make_thread_flow_object): Delete, moving the
11011 code into sarif_builder::make_code_flow_object.
11012 (sarif_builder::make_thread_flow_location_object): Add
11013 "path_event_idx" param. Use it to set "executionOrder"
11015 * diagnostic-path.h (diagnostic_event::get_thread_id): New
11016 pure-virtual vfunc.
11017 (class diagnostic_thread): New.
11018 (diagnostic_path::num_threads): New pure-virtual vfunc.
11019 (diagnostic_path::get_thread): New pure-virtual vfunc.
11020 (diagnostic_path::multithreaded_p): New decl.
11021 (simple_diagnostic_event::simple_diagnostic_event): Add optional
11023 (simple_diagnostic_event::get_thread_id): New accessor.
11024 (simple_diagnostic_event::m_thread_id): New.
11025 (class simple_diagnostic_thread): New.
11026 (simple_diagnostic_path::simple_diagnostic_path): Move definition
11028 (simple_diagnostic_path::num_threads): New.
11029 (simple_diagnostic_path::get_thread): New.
11030 (simple_diagnostic_path::add_thread): New.
11031 (simple_diagnostic_path::add_thread_event): New.
11032 (simple_diagnostic_path::m_threads): New.
11033 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
11034 param for overriding the context's printer.
11035 (diagnostic_show_locus): Likwise.
11036 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
11037 Move here from diagnostic-path.h. Add main thread.
11038 (simple_diagnostic_path::num_threads): New.
11039 (simple_diagnostic_path::get_thread): New.
11040 (simple_diagnostic_path::add_thread): New.
11041 (simple_diagnostic_path::add_thread_event): New.
11042 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
11043 param and use it to initialize m_thread_id. Reformat.
11044 * diagnostic.h: Add pretty_printer param for overriding the
11046 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
11047 (can_consolidate_events): Compare thread ids.
11048 (class per_thread_summary): New.
11049 (event_range::event_range): Add per_thread_summary arg.
11050 (event_range::print): Add "pp" param and use it rather than dc's
11052 (event_range::m_thread_id): New field.
11053 (event_range::m_per_thread_summary): New field.
11054 (path_summary::multithreaded_p): New.
11055 (path_summary::get_events_for_thread_id): New.
11056 (path_summary::m_per_thread_summary): New field.
11057 (path_summary::m_thread_id_to_events): New field.
11058 (path_summary::get_or_create_events_for_thread_id): New.
11059 (path_summary::path_summary): Create per_thread_summary instances
11060 as needed and associate the event_range instances with them.
11061 (base_indent): Move here from print_path_summary_as_text.
11062 (per_frame_indent): Likewise.
11063 (class thread_event_printer): New, adapted from parts of
11064 print_path_summary_as_text.
11065 (print_path_summary_as_text): Make static. Reimplement to
11066 moving most of existing code to class thread_event_printer,
11067 capturing state as per-thread as appropriate.
11068 (default_tree_diagnostic_path_printer): Add missing 'break' on
11071 2023-09-14 David Malcolm <dmalcolm@redhat.com>
11073 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
11074 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
11075 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
11076 clearing the deletable gcc_root_tab_t.
11077 (ggc_common_finalize): New.
11078 * ggc.h (ggc_common_finalize): New decl.
11079 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
11080 ggc_common_finalize.
11082 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
11084 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
11085 unsigned comparisons.
11086 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
11087 generation of salt/saltu instructions.
11088 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
11089 * config/xtensa/xtensa.md (salt, saltu): New instruction
11092 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
11094 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
11097 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
11099 * config/riscv/autovec.md: Change rtx code to unspec.
11100 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
11101 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
11102 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
11104 (class widen_freducop): Removed.
11105 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
11106 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
11107 (@pred_<reduc_op><mode>): New name.
11108 (@pred_widen_reduc_plus<v_su><mode>): Change name.
11109 (@pred_reduc_plus<order><mode>): Change name.
11110 (@pred_widen_reduc_plus<order><mode>): Change name.
11112 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
11114 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
11115 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
11116 * config/riscv/vector-iterators.md: New iterators and attrs.
11117 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
11119 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
11120 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
11121 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
11122 (@pred_reduc_<reduc><mode>): Added.
11123 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
11124 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
11125 (@pred_widen_reduc_plus<v_su><mode>): Added.
11126 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
11127 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
11128 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
11129 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
11130 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
11131 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
11132 (@pred_reduc_plus<order><mode>): Added.
11133 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
11134 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
11135 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
11136 (@pred_widen_reduc_plus<order><mode>): Added.
11138 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
11140 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
11141 Move WHILELO handling to...
11142 (aarch64_vector_costs::finish_cost): ...here. Check whether the
11143 vectorizer has decided to use a predicated loop.
11145 2023-09-14 Andrew Pinski <apinski@marvell.com>
11147 PR tree-optimization/106164
11148 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
11149 Expand to support constants that are off by one.
11151 2023-09-14 Andrew Pinski <apinski@marvell.com>
11153 * genmatch.cc (parser::parse_result): For an else clause
11154 of an if statement inside a switch, error out explictly.
11156 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11158 * config/riscv/autovec-opt.md: Add VLS mask modes.
11159 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
11160 (vcond_mask_<mode><vm>): Add VLS mask modes.
11161 * config/riscv/vector.md: Ditto.
11163 2023-09-14 Richard Biener <rguenther@suse.de>
11165 PR tree-optimization/111294
11166 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
11167 operands that eventually become dead and use simple_dce_from_worklist
11168 to remove their definitions if they did so.
11170 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
11172 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
11173 Accept all nonimmediate_operands, but keep the existing constraints.
11174 If the instruction is split before RA, load invalid addresses into
11175 a temporary register.
11176 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
11178 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11181 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
11182 (vector_insn_info::global_merge): Ditto.
11183 (vector_insn_info::get_avl_or_vl_reg): Ditto.
11185 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11187 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
11189 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
11191 * config/loongarch/loongarch-def.c: Modify the default value of
11194 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11196 * config/xtensa/xtensa.cc (xtensa_expand_scc):
11197 Revert the changes from the last patch, as the work in the RTL
11198 expansion pass is too far to determine the physical registers.
11199 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
11200 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
11202 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
11205 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
11207 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11209 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
11210 (@vec_extract<mode><vel>): Ditto.
11211 * config/riscv/vector.md: Ditto
11213 2023-09-13 Andrew Pinski <apinski@marvell.com>
11215 * match.pd (`X <= MAX(X, Y)`):
11216 Move before `MIN (X, C1) < C2` pattern.
11218 2023-09-13 Andrew Pinski <apinski@marvell.com>
11220 PR tree-optimization/111364
11221 * match.pd (`MIN (X, Y) == X`): Extend
11222 to min/lt, min/ge, max/gt, max/le.
11224 2023-09-13 Andrew Pinski <apinski@marvell.com>
11226 PR tree-optimization/111345
11227 * match.pd (`Y > (X % Y)`): Merge
11229 (`(X % Y) < Y`): Pattern by adding `:c`
11232 2023-09-13 Richard Biener <rguenther@suse.de>
11234 PR tree-optimization/111387
11235 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
11236 EDGE_DFS_BACK when doing BB vectorization.
11237 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
11238 to compute RPO and mark backedges.
11240 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
11242 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
11243 New combine pattern.
11244 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
11245 (<mulh_table><mode>3_highpart): Merged pattern.
11246 (umul<mode>3_highpart): Mrege smul and umul.
11247 * config/riscv/vector-iterators.md (umul): New iterators.
11248 (UNSPEC_VMULHU): New iterators.
11250 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
11252 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
11253 New combine pattern.
11254 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
11256 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
11258 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
11259 (*cond_copysign<mode>): New combine pattern.
11260 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
11262 2023-09-13 Richard Biener <rguenther@suse.de>
11264 PR tree-optimization/111397
11265 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
11266 argument to specify whether the PHI destination doesn't flow in
11267 from an abnormal PHI.
11268 (propagate_value): Adjust.
11269 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
11271 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
11273 (process_bb): Likewise.
11275 2023-09-13 Pan Li <pan2.li@intel.com>
11278 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
11280 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
11282 PR tree-optimization/111303
11283 * match.pd ((X - N * M) / N): Add undefined_p checking.
11284 ((X + N * M) / N): Likewise.
11285 ((X + C) div_rshift N): Likewise.
11287 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11290 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
11292 2023-09-12 Martin Jambor <mjambor@suse.cz>
11294 * dbgcnt.def (form_fma): New.
11295 * tree-ssa-math-opts.cc: Include dbgcnt.h.
11296 (convert_mult_to_fma): Bail out if the debug counter say so.
11298 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
11300 * config/riscv/autovec-opt.md: Update type
11301 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
11303 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11305 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
11307 (aarch64_layout_frame): Use it to decide whether locals should
11308 go above or below the saved registers.
11309 (aarch64_expand_prologue): Update stack layout comment.
11310 Emit a stack tie after the final adjustment.
11312 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11314 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
11315 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
11316 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
11318 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11320 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
11321 (aarch64_frame::hard_fp_save_and_probe): New fields.
11322 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
11323 Rather than asserting that a leaf function saves LR, instead assert
11324 that a leaf function saves something.
11325 (aarch64_get_separate_components): Prevent the chosen probe
11326 registers from being individually shrink-wrapped.
11327 (aarch64_allocate_and_probe_stack_space): Remove workaround for
11328 probe registers that aren't at the bottom of the previous allocation.
11330 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11332 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
11333 Always probe the residual allocation at offset 1024, asserting
11334 that that is in range.
11336 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11338 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
11339 the LR save slot is in the first 16 bytes of the register save area.
11340 Only form STP/LDP push/pop candidates if both registers are valid.
11341 (aarch64_allocate_and_probe_stack_space): Remove workaround for
11342 when LR was not in the first 16 bytes.
11344 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11346 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
11347 Don't probe final allocations that are exactly 1KiB in size (after
11348 unprobed space above the final allocation has been deducted).
11350 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11352 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
11353 calculation of initial_adjust for frames in which all saves
11356 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11358 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
11359 the allocation of the top of the frame.
11361 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11363 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
11365 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
11366 from the bottom of the frame, rather than the bottom of the saved
11367 register area. Measure reg_offset from the bottom of the frame
11368 rather than the bottom of the saved register area.
11369 (aarch64_save_callee_saves): Update accordingly.
11370 (aarch64_restore_callee_saves): Likewise.
11371 (aarch64_get_separate_components): Likewise.
11372 (aarch64_process_components): Likewise.
11374 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11376 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
11378 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11380 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
11382 (aarch64_frame::bytes_above_hard_fp): ...this.
11383 * config/aarch64/aarch64.cc (aarch64_layout_frame)
11384 (aarch64_expand_prologue): Update accordingly.
11385 (aarch64_initial_elimination_offset): Likewise.
11387 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11389 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
11390 (aarch64_frame::bytes_above_locals): ...this.
11391 * config/aarch64/aarch64.cc (aarch64_layout_frame)
11392 (aarch64_initial_elimination_offset): Update accordingly.
11394 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11396 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
11397 calculation of chain_offset into the emit_frame_chain block.
11399 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11401 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
11402 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
11403 callee_offset handling.
11404 (aarch64_save_callee_saves): Replace the start_offset parameter
11405 with a bytes_below_sp parameter.
11406 (aarch64_restore_callee_saves): Likewise.
11407 (aarch64_expand_prologue): Update accordingly.
11408 (aarch64_expand_epilogue): Likewise.
11410 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11412 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
11414 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
11415 (aarch64_expand_epilogue): Use it instead of
11416 below_hard_fp_saved_regs_size.
11418 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11420 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
11422 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
11423 and use it instead of crtl->outgoing_args_size.
11424 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
11425 of outgoing_args_size.
11426 (aarch64_process_components): Likewise.
11428 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11430 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
11431 allocate the frame in one go if there are no saved registers.
11433 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11435 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
11436 chain_offset rather than callee_offset.
11438 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
11440 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
11441 a local shorthand for cfun->machine->frame.
11442 (aarch64_restore_callee_saves, aarch64_get_separate_components):
11443 (aarch64_process_components): Likewise.
11444 (aarch64_allocate_and_probe_stack_space): Likewise.
11445 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
11446 (aarch64_layout_frame): Use existing shorthand for one more case.
11448 2023-09-12 Andrew Pinski <apinski@marvell.com>
11450 PR tree-optimization/107881
11451 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
11452 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
11454 2023-09-12 Pan Li <pan2.li@intel.com>
11456 * config/riscv/riscv-vector-costs.h (struct range): Removed.
11458 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11460 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
11461 (compute_nregs_for_mode): Ditto.
11462 (live_range_conflict_p): Ditto.
11463 (max_number_of_live_regs): Ditto.
11464 (compute_lmul): Ditto.
11465 (costs::prefer_new_lmul_p): Ditto.
11466 (costs::better_main_loop_than_p): Ditto.
11467 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
11468 (struct var_live_range): Ditto.
11469 (struct autovec_info): Ditto.
11470 * config/riscv/t-riscv: Update makefile for COST model.
11472 2023-09-12 Jakub Jelinek <jakub@redhat.com>
11474 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
11477 2023-09-12 Jakub Jelinek <jakub@redhat.com>
11479 PR middle-end/111338
11480 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
11482 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
11483 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
11484 optimization if type's precision is too large for
11485 vn_walk_cb_data::bufsize.
11487 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
11489 * doc/gm2.texi (Compiler options): Document new option
11492 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
11494 * doc/sourcebuild.texi (stack_size): Update.
11496 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
11498 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
11499 (<optab>_not<mode>3): Likewise.
11500 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
11502 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
11504 (GEN_EMIT_HELPER2): Likewise.
11505 (emit_strcmp_scalar_compare_byte): New function.
11506 (emit_strcmp_scalar_compare_subword): Likewise.
11507 (emit_strcmp_scalar_compare_word): Likewise.
11508 (emit_strcmp_scalar_load_and_compare): Likewise.
11509 (emit_strcmp_scalar_call_to_libc): Likewise.
11510 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
11511 (emit_strcmp_scalar_result_calculation): Likewise.
11512 (riscv_expand_strcmp_scalar): Likewise.
11513 (riscv_expand_strcmp): Likewise.
11514 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
11516 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
11517 (cmpstrnsi): Invoke expansion function for str(n)cmp.
11518 (cmpstrsi): Likewise.
11519 * config/riscv/riscv.opt: Add new parameter
11520 '-mstring-compare-inline-limit'.
11521 * doc/invoke.texi: Document new parameter
11522 '-mstring-compare-inline-limit'.
11524 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
11526 * config.gcc: Add new object riscv-string.o.
11528 * config/riscv/riscv-protos.h (riscv_expand_strlen):
11530 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
11531 * config/riscv/riscv.opt: New flag 'minline-strlen'.
11532 * config/riscv/t-riscv: Add new object riscv-string.o.
11533 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
11534 (th_rev<mode>2): Likewise.
11535 (th_tstnbz<mode>2): New INSN.
11536 * doc/invoke.texi: Document '-minline-strlen'.
11537 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
11538 (emit_unlikely_jump_insn): Likewise.
11539 * rtl.h (emit_likely_jump_insn): New prototype.
11540 (emit_unlikely_jump_insn): Likewise.
11541 * config/riscv/riscv-string.cc: New file.
11543 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
11545 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
11546 (TARGET_SUPPORTS_ALIASES): Define.
11548 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
11550 * doc/sourcebuild.texi (check-function-bodies): Update.
11552 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
11554 * gimplify.cc (gimplify_bind_expr): Check for
11555 insertion after variable cleanup. Convert 'omp allocate'
11556 var-decl attribute to GOMP_alloc/GOMP_free calls.
11558 2023-09-12 xuli <xuli1@eswincomputing.com>
11560 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
11561 parameter e and replace NULL_RTX with gcc_unreachable.
11563 2023-09-12 xuli <xuli1@eswincomputing.com>
11565 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
11567 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11568 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
11569 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
11571 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
11572 * config/riscv/riscv-vector-builtins.cc: Add args type.
11574 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
11576 * config/riscv/riscv.cc
11577 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
11578 riscv_avoid_shrink_wrapping_separate.
11579 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
11581 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
11583 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
11585 * shrink-wrap.cc (try_shrink_wrapping_separate):call
11586 use_shrink_wrapping_separate.
11587 (use_shrink_wrapping_separate): wrap the condition
11588 check in use_shrink_wrapping_separate.
11589 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
11591 2023-09-11 Andrew Pinski <apinski@marvell.com>
11593 PR tree-optimization/111348
11594 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
11595 the cmp part of the pattern.
11597 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
11600 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
11601 Call output_addr_const for CASE_CONST_SCALAR_INT.
11603 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11605 * config/riscv/thead.md: Update types
11607 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11609 * config/riscv/riscv.md: Update types
11611 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11613 * config/riscv/riscv.md: Add "zicond" type
11614 * config/riscv/zicond.md: Update types
11616 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11618 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
11619 * config/riscv/zc.md: Update types
11621 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
11623 * config/riscv/autovec-opt.md: Update types
11624 * config/riscv/autovec.md: likewise
11626 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11628 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
11630 (s390_vec_unsigned_flt): Ditto.
11631 (s390_vec_revb_flt): Ditto.
11632 (s390_vec_reve_flt): Ditto.
11633 (s390_vclfnhs): Fix operand flags.
11634 (s390_vclfnls): Ditto.
11635 (s390_vcrnfs): Ditto.
11636 (s390_vcfn): Ditto.
11637 (s390_vcnf): Ditto.
11639 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11641 * config/s390/s390-builtins.def (O_U64): New.
11646 (O_M12): Change bit position.
11657 (OB_DEF_VAR): Add operand constraints.
11659 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
11662 2023-09-11 Andrew Pinski <apinski@marvell.com>
11664 PR tree-optimization/111349
11665 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
11666 the cmp part of the pattern.
11668 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11671 * config/riscv/riscv.opt: Set default as scalable vectorization.
11673 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11675 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
11676 (get_all_successors): Ditto.
11677 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
11678 (get_all_successors): Ditto.
11680 2023-09-11 Jakub Jelinek <jakub@redhat.com>
11682 PR middle-end/111329
11683 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
11684 function. For printing values which don't fit into digit_buffer
11685 use out-of-line function.
11686 * wide-int-print.h (pp_wide_int_large): Declare.
11687 * wide-int-print.cc: Include pretty-print.h.
11688 (pp_wide_int_large): Define.
11690 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11692 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
11693 Use dominance analysis.
11694 (pass_vsetvl::init): Ditto.
11695 (pass_vsetvl::done): Ditto.
11697 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11700 * config/riscv/autovec.md: Add VLS modes.
11701 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
11702 (cmp_lmul_gt_one): Ditto.
11703 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
11704 (cmp_lmul_gt_one): Ditto.
11705 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
11706 (riscv_vectorize_vec_perm_const): Ditto.
11707 * config/riscv/vector-iterators.md: Ditto.
11708 * config/riscv/vector.md: Ditto.
11710 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11712 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
11713 * config/riscv/vector-iterators.md: New iterator
11715 2023-09-11 Andrew Pinski <apinski@marvell.com>
11717 PR tree-optimization/111346
11718 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
11721 2023-09-11 liuhongt <hongtao.liu@intel.com>
11725 * config/i386/sse.md (int_comm): New int_attr.
11726 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
11727 Remove % for Complex conjugate operations since they're not
11729 (fma_<complexpairopname>_<mode>_pair): Ditto.
11730 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
11731 (cmul<conj_op><mode>3): Ditto.
11733 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11735 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
11736 fixed-vlmax/vls vector permutation.
11738 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11740 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
11742 2023-09-10 Andrew Pinski <apinski@marvell.com>
11744 PR tree-optimization/111331
11745 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
11746 Fix the LE/GE comparison to the correct value.
11747 * tree-ssa-phiopt.cc (minmax_replacement):
11748 Fix the LE/GE comparison for the
11749 `(a CMP CST1) ? max<a,CST2> : a` optimization.
11751 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
11753 * config/darwin.cc (darwin_function_section): Place unlikely
11754 executed global init code into the standard cold section.
11756 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11759 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
11760 (pass_vsetvl::pre_vsetvl): Ditto.
11761 (pass_vsetvl::init): Ditto.
11762 (pass_vsetvl::lazy_vsetvl): Ditto.
11764 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
11766 * config/loongarch/loongarch.md (mulsidi3_64bit):
11767 Field unsigned extension support.
11768 (<u>muldi3_highpart): Modify template name.
11769 (<u>mulsi3_highpart): Likewise.
11770 (<u>mulsidi3_64bit): Field unsigned extension support.
11771 (<su>muldi3_highpart): Modify muldi3_highpart to
11773 (<su>mulsi3_highpart): Modify mulsi3_highpart to
11776 2023-09-09 Xi Ruoyao <xry111@xry111.site>
11778 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
11779 Check precondition (delta must be a power of 2) and use
11780 popcount_hwi instead of a homebrew loop.
11782 2023-09-09 Xi Ruoyao <xry111@xry111.site>
11784 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
11785 Define to the maximum amount of bytes able to be loaded or
11786 stored with one machine instruction.
11787 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
11788 New static function.
11789 (loongarch_block_move_straight): Call
11790 loongarch_mode_for_move_size for machine_mode to be moved.
11791 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
11792 instead of UNITS_PER_WORD.
11794 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11796 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
11798 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
11800 * fold-const.cc (can_min_p): New function.
11801 (poly_int_binop): Try fold MIN_EXPR.
11803 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
11805 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
11806 case VREL_EQ nor call frelop_early_resolve.
11808 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
11810 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
11811 Remove broken INSN.
11812 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
11813 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
11815 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
11817 * config/riscv/thead.md: Use more appropriate mode attributes
11820 2023-09-08 Guo Jie <guojie@loongson.cn>
11822 * common/config/loongarch/loongarch-common.cc:
11823 (default_options loongarch_option_optimization_table):
11824 Default to -fsched-pressure.
11826 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
11828 * config.gcc: remove non-POSIX syntax "<<<".
11830 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
11832 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
11833 Rename postfix to _bitmanip.
11834 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
11835 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
11837 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11839 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
11841 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11843 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
11845 2023-09-07 liuhongt <hongtao.liu@intel.com>
11847 * config/i386/sse.md
11848 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
11849 (VHFBF_AVX512VL): New mode iterator.
11850 (VI2HFBF_AVX512VL): New mode iterator.
11852 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
11854 * value-range.h (contains_zero_p): Return false for undefined ranges.
11855 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
11856 contains_zero_p change above.
11857 (operator_ge::op1_op2_relation): Same.
11858 (operator_equal::op1_op2_relation): Same.
11859 (operator_not_equal::op1_op2_relation): Same.
11860 (operator_lt::op1_op2_relation): Same.
11861 (operator_le::op1_op2_relation): Same.
11862 (operator_ge::op1_op2_relation): Same.
11863 * range-op.cc (operator_equal::op1_op2_relation): Same.
11864 (operator_not_equal::op1_op2_relation): Same.
11865 (operator_lt::op1_op2_relation): Same.
11866 (operator_le::op1_op2_relation): Same.
11867 (operator_cast::op1_range): Same.
11868 (set_nonzero_range_from_mask): Same.
11869 (operator_bitwise_xor::op1_range): Same.
11870 (operator_addr_expr::fold_range): Same.
11871 (operator_addr_expr::op1_range): Same.
11873 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
11875 PR tree-optimization/110875
11876 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
11877 cache-prefilling routine when the ssa-name has no global value.
11879 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
11882 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
11883 (process_alt_operands): Set up the flag. Clear flag for chosen
11884 alternative with special memory constraints.
11885 (process_alt_operands): Set up used insn alternative depending on the flag.
11887 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11889 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
11890 * config/riscv/riscv.md: Ditto.
11891 * config/riscv/vector-iterators.md: Ditto.
11892 * config/riscv/vector.md: Ditto.
11894 2023-09-07 David Malcolm <dmalcolm@redhat.com>
11896 * diagnostic-core.h (error_meta): New decl.
11897 * diagnostic.cc (error_meta): New.
11899 2023-09-07 Jakub Jelinek <jakub@redhat.com>
11902 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
11903 inside gcc_assert, as later code relies on it filling info variable.
11904 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
11905 clear_padding_type): Likewise.
11906 * varasm.cc (output_constant): Likewise.
11907 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
11908 * stor-layout.cc (finish_bitfield_representative, layout_type):
11910 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
11912 2023-09-07 Xi Ruoyao <xry111@xry111.site>
11915 * config/loongarch/loongarch-protos.h
11916 (loongarch_pre_reload_split): Declare new function.
11917 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
11918 * config/loongarch/loongarch.cc
11919 (loongarch_pre_reload_split): Implement.
11920 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
11921 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
11923 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
11924 New define_insn_and_split.
11925 (bstrins_<mode>_for_ior_mask): Likewise.
11926 (define_peephole2): Further optimize code sequence produced by
11927 bstrins_<mode>_for_ior_mask if possible.
11929 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
11931 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
11932 rather than gen_rtx_PLUS.
11934 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11937 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
11938 (pass_vsetvl::df_post_optimization): Remove incorrect function.
11940 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
11942 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
11943 Parse 'XVentanaCondOps' extension.
11944 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
11945 (TARGET_XVENTANACONDOPS): Ditto.
11946 (TARGET_ZICOND_LIKE): New to represent targets with conditional
11947 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
11948 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
11949 with TARGET_ZICOND_LIKE.
11950 (riscv_expand_conditional_move): Ditto.
11951 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
11952 TARGET_ZICOND_LIKE.
11953 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
11954 * config/riscv/zicond.md: Modify description.
11955 (eqz_ventana): New to match corresponding czero instructions.
11956 (nez_ventana): Ditto.
11957 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
11958 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
11959 (*czero.<eqz>.<GPR><X>): Ditto.
11960 (*czero.eqz.<GPR><X>.opt1): Ditto.
11961 (*czero.nez.<GPR><X>.opt2): Ditto.
11963 2023-09-06 Ian Lance Taylor <iant@golang.org>
11966 * godump.cc (go_format_type): Handle BITINT_TYPE.
11968 2023-09-06 Jakub Jelinek <jakub@redhat.com>
11971 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
11974 2023-09-06 Jakub Jelinek <jakub@redhat.com>
11977 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
11978 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
11979 rather than make_edge, initialize bb->count.
11981 2023-09-06 Jakub Jelinek <jakub@redhat.com>
11984 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
11985 Document general rules for _BitInt support library functions
11986 and document __mulbitint3 and __divmodbitint4.
11987 (Conversion functions): Document __fix{s,d,x,t}fbitint,
11988 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
11989 __bid_floatbitint{s,d,t}d.
11991 2023-09-06 Jakub Jelinek <jakub@redhat.com>
11994 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
11997 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12000 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
12001 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
12002 check if all padding bits up to mode precision are zeros or sign
12003 bit copies and if not, jump to DO_ERROR.
12004 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
12005 Adjust expand_ubsan_result_store callers.
12006 * ubsan.cc: Include target.h and langhooks.h.
12007 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
12008 size converted to pointer sized integer, pass BITINT_TYPE values
12009 which fit into TImode (if supported) or DImode as those integer types
12010 or otherwise for now punt (pass 0).
12011 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
12012 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
12013 TImode/DImode precision rather than TK_Unknown used otherwise for
12014 large/huge BITINT_TYPEs.
12015 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
12016 they don't have mode precision.
12017 * ubsan.h (enum ubsan_print_style): New enumerator.
12019 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12022 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
12023 (ix86_bitint_type_info): New function.
12024 (TARGET_C_BITINT_TYPE_INFO): Redefine.
12026 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12029 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
12030 * passes.def: Add pass_lower_bitint after pass_lower_complex and
12031 pass_lower_bitint_O0 after pass_lower_complex_O0.
12032 * tree-pass.h (PROP_gimple_lbitint): Define.
12033 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
12034 * gimple-lower-bitint.h: New file.
12035 * tree-ssa-live.h (struct _var_map): Add bitint member.
12036 (init_var_map): Adjust declaration.
12037 (region_contains_p): Handle map->bitint like map->outofssa_p.
12038 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
12039 map->bitint and set map->outofssa_p to false if it is non-NULL.
12040 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
12041 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
12043 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
12044 not in that bitmap, and allow res without default def.
12045 (compute_optimized_partition_bases): In map->bitint mode try hard to
12046 coalesce any SSA_NAMEs with the same size.
12047 (coalesce_bitint): New function.
12048 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
12049 used_in_copies and call coalesce_bitint.
12050 * gimple-lower-bitint.cc: New file.
12052 2023-09-06 Jakub Jelinek <jakub@redhat.com>
12055 * tree.def (BITINT_TYPE): New type.
12056 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
12057 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
12059 (BITINT_TYPE_P): Define.
12060 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
12061 they have BITINT_TYPE type.
12062 (tree_check6, tree_not_check6): New inline functions.
12063 (any_integral_type_check): Include BITINT_TYPE.
12064 (build_bitint_type): Declare.
12065 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
12066 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
12067 type_hash_canon): Handle BITINT_TYPE.
12068 (bitint_type_cache): New variable.
12069 (build_bitint_type): New function.
12070 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
12071 Handle BITINT_TYPE.
12072 (tree_cc_finalize): Free bitint_type_cache.
12073 * builtins.cc (type_to_class): Handle BITINT_TYPE.
12074 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
12075 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
12077 * convert.cc (convert_to_pointer_1, convert_to_real_1,
12078 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
12079 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
12080 GET_MODE_PRECISION (TYPE_MODE (type)).
12081 * doc/generic.texi (BITINT_TYPE): Document.
12082 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
12083 * doc/tm.texi: Regenerated.
12084 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
12085 gen_type_die_with_usage): Handle BITINT_TYPE.
12086 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
12087 handle those which fit into shwi.
12088 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
12089 to bitfield precision reads from BITINT_TYPE vars, parameters or
12090 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
12092 * fold-const.cc (fold_convert_loc, make_range_step): Handle
12094 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
12095 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
12096 (native_encode_int, native_interpret_int, native_interpret_expr):
12097 Handle BITINT_TYPE.
12098 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
12099 to some other integral type or vice versa conversions non-useless.
12100 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
12101 (clear_padding_unit): Mention in comment that _BitInt types don't need
12103 (clear_padding_bitint_needs_padding_p): New function.
12104 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
12105 (clear_padding_type): Likewise.
12106 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
12107 precision operands force pos_neg? to 1.
12108 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
12109 expand_BITINTTOFLOAT): New functions.
12110 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
12111 BITINTTOFLOAT): New internal functions.
12112 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
12113 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
12114 * match.pd (non-equality compare simplifications from fold_binary):
12115 Punt if TYPE_MODE (arg1_type) is BLKmode.
12116 * pretty-print.h (pp_wide_int): Handle printing of large precision
12117 wide_ints which would buffer overflow digit_buffer.
12118 * stor-layout.cc (finish_bitfield_representative): For bit-fields
12119 with BITINT_TYPE, prefer representatives with precisions in
12120 multiple of limb precision.
12121 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
12122 element type and assert it is BITINT_TYPE.
12123 * target.def (bitint_type_info): New C target hook.
12124 * target.h (struct bitint_info): New type.
12125 * targhooks.cc (default_bitint_type_info): New function.
12126 * targhooks.h (default_bitint_type_info): Declare.
12127 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
12128 Handle printing large wide_ints which would buffer overflow
12130 * tree-ssa-sccvn.cc: Include target.h.
12131 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
12133 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
12134 64-bit BITINT_TYPE subtract low bound from expression and cast to
12135 64-bit integer type both the controlling expression and case labels.
12136 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
12137 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
12138 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
12140 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
12141 unsigned_type_for rather than build_nonstandard_integer_type.
12143 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12146 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
12147 tieable for RVV modes.
12149 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12152 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
12154 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12156 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
12158 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12160 * config/xtensa/xtensa.cc (xtensa_expand_scc):
12161 Add code for particular constants (only 0 and INT_MIN for now)
12162 for EQ/NE boolean evaluation in SImode.
12163 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
12164 implementation has been integrated into the above.
12166 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12169 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
12171 (*pred_widen_mulsu<mode>): Delete.
12172 (*pred_single_widen_mul<mode>): Delete.
12173 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
12174 Add new combine patterns.
12175 (*single_widen_sub<any_extend:su><mode>): Ditto.
12176 (*single_widen_add<any_extend:su><mode>): Ditto.
12177 (*single_widen_mult<any_extend:su><mode>): Ditto.
12178 (*dual_widen_mulsu<mode>): Ditto.
12179 (*dual_widen_mulus<mode>): Ditto.
12180 (*dual_widen_<optab><mode>): Ditto.
12181 (*single_widen_add<mode>): Ditto.
12182 (*single_widen_sub<mode>): Ditto.
12183 (*single_widen_mult<mode>): Ditto.
12184 * config/riscv/autovec.md (<optab><mode>3):
12185 Change define_expand to define_insn_and_split.
12186 (<optab><mode>2): Ditto.
12187 (abs<mode>2): Ditto.
12188 (smul<mode>3_highpart): Ditto.
12189 (umul<mode>3_highpart): Ditto.
12191 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12193 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
12194 (riscv_asm_output_alias): Ditto.
12195 (riscv_asm_output_external): Ditto.
12196 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
12197 Output .variant_cc directive for vector function.
12198 (riscv_declare_function_name): Ditto.
12199 (riscv_asm_output_alias): Ditto.
12200 (riscv_asm_output_external): Ditto.
12201 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
12202 Implement ASM_DECLARE_FUNCTION_NAME.
12203 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
12204 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
12206 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12208 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
12209 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
12210 (riscv_frame_info::reset): Reset new fileds.
12211 (riscv_call_tls_get_addr): Pass riscv_cc.
12212 (riscv_function_arg): Return riscv_cc for call patterm.
12213 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
12214 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
12215 (riscv_save_reg_p): Add vector callee-saved check.
12216 (riscv_stack_align): Add vector save area comment.
12217 (riscv_compute_frame_info): Ditto.
12218 (riscv_restore_reg): Update for type change.
12219 (riscv_for_each_saved_v_reg): New function save vector registers.
12220 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
12221 (riscv_expand_prologue): Ditto.
12222 (riscv_expand_epilogue): Ditto.
12223 (riscv_output_mi_thunk): Pass riscv_cc.
12224 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
12225 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
12226 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
12228 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12230 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
12231 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
12232 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
12233 (riscv_init_cumulative_args): Setup variant_cc field.
12234 (riscv_vector_type_p): New function for checking vector type.
12235 (riscv_hard_regno_nregs): Hoist declare.
12236 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
12237 (riscv_get_arg_info): Support vector cc.
12238 (riscv_function_arg_advance): Update cum.
12239 (riscv_pass_by_reference): Handle vector args.
12240 (riscv_v_abi): New function return vector abi.
12241 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
12242 (riscv_arguments_is_vector_type_p): New function for check vector returns.
12243 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
12244 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
12245 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
12246 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
12247 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
12248 (V_ARG_FIRST): Ditto.
12249 (V_ARG_LAST): Ditto.
12250 (enum riscv_cc): Define all RISCV_CC variants.
12251 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
12253 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
12255 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
12256 Add sqrt + vcond_mask combine pattern.
12257 * config/riscv/autovec.md (<optab><mode>2):
12258 Change define_expand to define_insn_and_split.
12260 2023-09-06 Jason Merrill <jason@redhat.com>
12262 * common.opt: Update -fabi-version=19.
12264 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
12266 * config/riscv/zicond.md: Add closing parent to a comment.
12268 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
12270 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
12271 large constant cons/alt into a register.
12273 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
12275 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
12276 require one zero bit in the upper 32 bits for LI+RORI synthesis.
12278 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
12280 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
12282 2023-09-05 Andrew Pinski <apinski@marvell.com>
12284 PR tree-optimization/98710
12285 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
12286 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
12288 2023-09-05 Andrew Pinski <apinski@marvell.com>
12290 PR tree-optimization/103536
12291 * match.pd (`(x | y) & (x & z)`,
12292 `(x & y) | (x | z)`): New patterns.
12294 2023-09-05 Andrew Pinski <apinski@marvell.com>
12296 PR tree-optimization/107137
12297 * match.pd (`(nop_convert)-(convert)a`): New pattern.
12299 2023-09-05 Andrew Pinski <apinski@marvell.com>
12301 PR tree-optimization/96694
12302 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
12304 2023-09-05 Andrew Pinski <apinski@marvell.com>
12306 PR tree-optimization/105832
12307 * match.pd (`(1 >> X) != 0`): New pattern
12309 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
12311 * config/riscv/riscv.md: Update/Add types
12313 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
12315 * config/riscv/pic.md: Update types
12317 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
12319 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
12320 synthesis with rotate-right for XTheadBb.
12322 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
12324 * config/riscv/zicond.md: Fix op2 pattern.
12326 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
12328 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
12330 2023-09-05 Xi Ruoyao <xry111@xry111.site>
12332 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
12333 Define to 0 if not defined yet.
12335 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
12337 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
12338 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
12340 2023-09-05 Pan Li <pan2.li@intel.com>
12342 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
12343 * config/riscv/vector.md: Extend iterator for VLS.
12345 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
12347 * config.gcc: Export the header file lasxintrin.h.
12348 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
12349 Add Loongson ASX builtin functions support.
12350 (AVAIL_ALL): Ditto.
12351 (LASX_BUILTIN): Ditto.
12352 (LASX_NO_TARGET_BUILTIN): Ditto.
12353 (LASX_BUILTIN_TEST_BRANCH): Ditto.
12354 (CODE_FOR_lasx_xvsadd_b): Ditto.
12355 (CODE_FOR_lasx_xvsadd_h): Ditto.
12356 (CODE_FOR_lasx_xvsadd_w): Ditto.
12357 (CODE_FOR_lasx_xvsadd_d): Ditto.
12358 (CODE_FOR_lasx_xvsadd_bu): Ditto.
12359 (CODE_FOR_lasx_xvsadd_hu): Ditto.
12360 (CODE_FOR_lasx_xvsadd_wu): Ditto.
12361 (CODE_FOR_lasx_xvsadd_du): Ditto.
12362 (CODE_FOR_lasx_xvadd_b): Ditto.
12363 (CODE_FOR_lasx_xvadd_h): Ditto.
12364 (CODE_FOR_lasx_xvadd_w): Ditto.
12365 (CODE_FOR_lasx_xvadd_d): Ditto.
12366 (CODE_FOR_lasx_xvaddi_bu): Ditto.
12367 (CODE_FOR_lasx_xvaddi_hu): Ditto.
12368 (CODE_FOR_lasx_xvaddi_wu): Ditto.
12369 (CODE_FOR_lasx_xvaddi_du): Ditto.
12370 (CODE_FOR_lasx_xvand_v): Ditto.
12371 (CODE_FOR_lasx_xvandi_b): Ditto.
12372 (CODE_FOR_lasx_xvbitsel_v): Ditto.
12373 (CODE_FOR_lasx_xvseqi_b): Ditto.
12374 (CODE_FOR_lasx_xvseqi_h): Ditto.
12375 (CODE_FOR_lasx_xvseqi_w): Ditto.
12376 (CODE_FOR_lasx_xvseqi_d): Ditto.
12377 (CODE_FOR_lasx_xvslti_b): Ditto.
12378 (CODE_FOR_lasx_xvslti_h): Ditto.
12379 (CODE_FOR_lasx_xvslti_w): Ditto.
12380 (CODE_FOR_lasx_xvslti_d): Ditto.
12381 (CODE_FOR_lasx_xvslti_bu): Ditto.
12382 (CODE_FOR_lasx_xvslti_hu): Ditto.
12383 (CODE_FOR_lasx_xvslti_wu): Ditto.
12384 (CODE_FOR_lasx_xvslti_du): Ditto.
12385 (CODE_FOR_lasx_xvslei_b): Ditto.
12386 (CODE_FOR_lasx_xvslei_h): Ditto.
12387 (CODE_FOR_lasx_xvslei_w): Ditto.
12388 (CODE_FOR_lasx_xvslei_d): Ditto.
12389 (CODE_FOR_lasx_xvslei_bu): Ditto.
12390 (CODE_FOR_lasx_xvslei_hu): Ditto.
12391 (CODE_FOR_lasx_xvslei_wu): Ditto.
12392 (CODE_FOR_lasx_xvslei_du): Ditto.
12393 (CODE_FOR_lasx_xvdiv_b): Ditto.
12394 (CODE_FOR_lasx_xvdiv_h): Ditto.
12395 (CODE_FOR_lasx_xvdiv_w): Ditto.
12396 (CODE_FOR_lasx_xvdiv_d): Ditto.
12397 (CODE_FOR_lasx_xvdiv_bu): Ditto.
12398 (CODE_FOR_lasx_xvdiv_hu): Ditto.
12399 (CODE_FOR_lasx_xvdiv_wu): Ditto.
12400 (CODE_FOR_lasx_xvdiv_du): Ditto.
12401 (CODE_FOR_lasx_xvfadd_s): Ditto.
12402 (CODE_FOR_lasx_xvfadd_d): Ditto.
12403 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
12404 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
12405 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
12406 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
12407 (CODE_FOR_lasx_xvffint_s_w): Ditto.
12408 (CODE_FOR_lasx_xvffint_d_l): Ditto.
12409 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
12410 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
12411 (CODE_FOR_lasx_xvfsub_s): Ditto.
12412 (CODE_FOR_lasx_xvfsub_d): Ditto.
12413 (CODE_FOR_lasx_xvfmul_s): Ditto.
12414 (CODE_FOR_lasx_xvfmul_d): Ditto.
12415 (CODE_FOR_lasx_xvfdiv_s): Ditto.
12416 (CODE_FOR_lasx_xvfdiv_d): Ditto.
12417 (CODE_FOR_lasx_xvfmax_s): Ditto.
12418 (CODE_FOR_lasx_xvfmax_d): Ditto.
12419 (CODE_FOR_lasx_xvfmin_s): Ditto.
12420 (CODE_FOR_lasx_xvfmin_d): Ditto.
12421 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
12422 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
12423 (CODE_FOR_lasx_xvflogb_s): Ditto.
12424 (CODE_FOR_lasx_xvflogb_d): Ditto.
12425 (CODE_FOR_lasx_xvmax_b): Ditto.
12426 (CODE_FOR_lasx_xvmax_h): Ditto.
12427 (CODE_FOR_lasx_xvmax_w): Ditto.
12428 (CODE_FOR_lasx_xvmax_d): Ditto.
12429 (CODE_FOR_lasx_xvmaxi_b): Ditto.
12430 (CODE_FOR_lasx_xvmaxi_h): Ditto.
12431 (CODE_FOR_lasx_xvmaxi_w): Ditto.
12432 (CODE_FOR_lasx_xvmaxi_d): Ditto.
12433 (CODE_FOR_lasx_xvmax_bu): Ditto.
12434 (CODE_FOR_lasx_xvmax_hu): Ditto.
12435 (CODE_FOR_lasx_xvmax_wu): Ditto.
12436 (CODE_FOR_lasx_xvmax_du): Ditto.
12437 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
12438 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
12439 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
12440 (CODE_FOR_lasx_xvmaxi_du): Ditto.
12441 (CODE_FOR_lasx_xvmin_b): Ditto.
12442 (CODE_FOR_lasx_xvmin_h): Ditto.
12443 (CODE_FOR_lasx_xvmin_w): Ditto.
12444 (CODE_FOR_lasx_xvmin_d): Ditto.
12445 (CODE_FOR_lasx_xvmini_b): Ditto.
12446 (CODE_FOR_lasx_xvmini_h): Ditto.
12447 (CODE_FOR_lasx_xvmini_w): Ditto.
12448 (CODE_FOR_lasx_xvmini_d): Ditto.
12449 (CODE_FOR_lasx_xvmin_bu): Ditto.
12450 (CODE_FOR_lasx_xvmin_hu): Ditto.
12451 (CODE_FOR_lasx_xvmin_wu): Ditto.
12452 (CODE_FOR_lasx_xvmin_du): Ditto.
12453 (CODE_FOR_lasx_xvmini_bu): Ditto.
12454 (CODE_FOR_lasx_xvmini_hu): Ditto.
12455 (CODE_FOR_lasx_xvmini_wu): Ditto.
12456 (CODE_FOR_lasx_xvmini_du): Ditto.
12457 (CODE_FOR_lasx_xvmod_b): Ditto.
12458 (CODE_FOR_lasx_xvmod_h): Ditto.
12459 (CODE_FOR_lasx_xvmod_w): Ditto.
12460 (CODE_FOR_lasx_xvmod_d): Ditto.
12461 (CODE_FOR_lasx_xvmod_bu): Ditto.
12462 (CODE_FOR_lasx_xvmod_hu): Ditto.
12463 (CODE_FOR_lasx_xvmod_wu): Ditto.
12464 (CODE_FOR_lasx_xvmod_du): Ditto.
12465 (CODE_FOR_lasx_xvmul_b): Ditto.
12466 (CODE_FOR_lasx_xvmul_h): Ditto.
12467 (CODE_FOR_lasx_xvmul_w): Ditto.
12468 (CODE_FOR_lasx_xvmul_d): Ditto.
12469 (CODE_FOR_lasx_xvclz_b): Ditto.
12470 (CODE_FOR_lasx_xvclz_h): Ditto.
12471 (CODE_FOR_lasx_xvclz_w): Ditto.
12472 (CODE_FOR_lasx_xvclz_d): Ditto.
12473 (CODE_FOR_lasx_xvnor_v): Ditto.
12474 (CODE_FOR_lasx_xvor_v): Ditto.
12475 (CODE_FOR_lasx_xvori_b): Ditto.
12476 (CODE_FOR_lasx_xvnori_b): Ditto.
12477 (CODE_FOR_lasx_xvpcnt_b): Ditto.
12478 (CODE_FOR_lasx_xvpcnt_h): Ditto.
12479 (CODE_FOR_lasx_xvpcnt_w): Ditto.
12480 (CODE_FOR_lasx_xvpcnt_d): Ditto.
12481 (CODE_FOR_lasx_xvxor_v): Ditto.
12482 (CODE_FOR_lasx_xvxori_b): Ditto.
12483 (CODE_FOR_lasx_xvsll_b): Ditto.
12484 (CODE_FOR_lasx_xvsll_h): Ditto.
12485 (CODE_FOR_lasx_xvsll_w): Ditto.
12486 (CODE_FOR_lasx_xvsll_d): Ditto.
12487 (CODE_FOR_lasx_xvslli_b): Ditto.
12488 (CODE_FOR_lasx_xvslli_h): Ditto.
12489 (CODE_FOR_lasx_xvslli_w): Ditto.
12490 (CODE_FOR_lasx_xvslli_d): Ditto.
12491 (CODE_FOR_lasx_xvsra_b): Ditto.
12492 (CODE_FOR_lasx_xvsra_h): Ditto.
12493 (CODE_FOR_lasx_xvsra_w): Ditto.
12494 (CODE_FOR_lasx_xvsra_d): Ditto.
12495 (CODE_FOR_lasx_xvsrai_b): Ditto.
12496 (CODE_FOR_lasx_xvsrai_h): Ditto.
12497 (CODE_FOR_lasx_xvsrai_w): Ditto.
12498 (CODE_FOR_lasx_xvsrai_d): Ditto.
12499 (CODE_FOR_lasx_xvsrl_b): Ditto.
12500 (CODE_FOR_lasx_xvsrl_h): Ditto.
12501 (CODE_FOR_lasx_xvsrl_w): Ditto.
12502 (CODE_FOR_lasx_xvsrl_d): Ditto.
12503 (CODE_FOR_lasx_xvsrli_b): Ditto.
12504 (CODE_FOR_lasx_xvsrli_h): Ditto.
12505 (CODE_FOR_lasx_xvsrli_w): Ditto.
12506 (CODE_FOR_lasx_xvsrli_d): Ditto.
12507 (CODE_FOR_lasx_xvsub_b): Ditto.
12508 (CODE_FOR_lasx_xvsub_h): Ditto.
12509 (CODE_FOR_lasx_xvsub_w): Ditto.
12510 (CODE_FOR_lasx_xvsub_d): Ditto.
12511 (CODE_FOR_lasx_xvsubi_bu): Ditto.
12512 (CODE_FOR_lasx_xvsubi_hu): Ditto.
12513 (CODE_FOR_lasx_xvsubi_wu): Ditto.
12514 (CODE_FOR_lasx_xvsubi_du): Ditto.
12515 (CODE_FOR_lasx_xvpackod_d): Ditto.
12516 (CODE_FOR_lasx_xvpackev_d): Ditto.
12517 (CODE_FOR_lasx_xvpickod_d): Ditto.
12518 (CODE_FOR_lasx_xvpickev_d): Ditto.
12519 (CODE_FOR_lasx_xvrepli_b): Ditto.
12520 (CODE_FOR_lasx_xvrepli_h): Ditto.
12521 (CODE_FOR_lasx_xvrepli_w): Ditto.
12522 (CODE_FOR_lasx_xvrepli_d): Ditto.
12523 (CODE_FOR_lasx_xvandn_v): Ditto.
12524 (CODE_FOR_lasx_xvorn_v): Ditto.
12525 (CODE_FOR_lasx_xvneg_b): Ditto.
12526 (CODE_FOR_lasx_xvneg_h): Ditto.
12527 (CODE_FOR_lasx_xvneg_w): Ditto.
12528 (CODE_FOR_lasx_xvneg_d): Ditto.
12529 (CODE_FOR_lasx_xvbsrl_v): Ditto.
12530 (CODE_FOR_lasx_xvbsll_v): Ditto.
12531 (CODE_FOR_lasx_xvfmadd_s): Ditto.
12532 (CODE_FOR_lasx_xvfmadd_d): Ditto.
12533 (CODE_FOR_lasx_xvfmsub_s): Ditto.
12534 (CODE_FOR_lasx_xvfmsub_d): Ditto.
12535 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
12536 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
12537 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
12538 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
12539 (CODE_FOR_lasx_xvpermi_q): Ditto.
12540 (CODE_FOR_lasx_xvpermi_d): Ditto.
12541 (CODE_FOR_lasx_xbnz_v): Ditto.
12542 (CODE_FOR_lasx_xbz_v): Ditto.
12543 (CODE_FOR_lasx_xvssub_b): Ditto.
12544 (CODE_FOR_lasx_xvssub_h): Ditto.
12545 (CODE_FOR_lasx_xvssub_w): Ditto.
12546 (CODE_FOR_lasx_xvssub_d): Ditto.
12547 (CODE_FOR_lasx_xvssub_bu): Ditto.
12548 (CODE_FOR_lasx_xvssub_hu): Ditto.
12549 (CODE_FOR_lasx_xvssub_wu): Ditto.
12550 (CODE_FOR_lasx_xvssub_du): Ditto.
12551 (CODE_FOR_lasx_xvabsd_b): Ditto.
12552 (CODE_FOR_lasx_xvabsd_h): Ditto.
12553 (CODE_FOR_lasx_xvabsd_w): Ditto.
12554 (CODE_FOR_lasx_xvabsd_d): Ditto.
12555 (CODE_FOR_lasx_xvabsd_bu): Ditto.
12556 (CODE_FOR_lasx_xvabsd_hu): Ditto.
12557 (CODE_FOR_lasx_xvabsd_wu): Ditto.
12558 (CODE_FOR_lasx_xvabsd_du): Ditto.
12559 (CODE_FOR_lasx_xvavg_b): Ditto.
12560 (CODE_FOR_lasx_xvavg_h): Ditto.
12561 (CODE_FOR_lasx_xvavg_w): Ditto.
12562 (CODE_FOR_lasx_xvavg_d): Ditto.
12563 (CODE_FOR_lasx_xvavg_bu): Ditto.
12564 (CODE_FOR_lasx_xvavg_hu): Ditto.
12565 (CODE_FOR_lasx_xvavg_wu): Ditto.
12566 (CODE_FOR_lasx_xvavg_du): Ditto.
12567 (CODE_FOR_lasx_xvavgr_b): Ditto.
12568 (CODE_FOR_lasx_xvavgr_h): Ditto.
12569 (CODE_FOR_lasx_xvavgr_w): Ditto.
12570 (CODE_FOR_lasx_xvavgr_d): Ditto.
12571 (CODE_FOR_lasx_xvavgr_bu): Ditto.
12572 (CODE_FOR_lasx_xvavgr_hu): Ditto.
12573 (CODE_FOR_lasx_xvavgr_wu): Ditto.
12574 (CODE_FOR_lasx_xvavgr_du): Ditto.
12575 (CODE_FOR_lasx_xvmuh_b): Ditto.
12576 (CODE_FOR_lasx_xvmuh_h): Ditto.
12577 (CODE_FOR_lasx_xvmuh_w): Ditto.
12578 (CODE_FOR_lasx_xvmuh_d): Ditto.
12579 (CODE_FOR_lasx_xvmuh_bu): Ditto.
12580 (CODE_FOR_lasx_xvmuh_hu): Ditto.
12581 (CODE_FOR_lasx_xvmuh_wu): Ditto.
12582 (CODE_FOR_lasx_xvmuh_du): Ditto.
12583 (CODE_FOR_lasx_xvssran_b_h): Ditto.
12584 (CODE_FOR_lasx_xvssran_h_w): Ditto.
12585 (CODE_FOR_lasx_xvssran_w_d): Ditto.
12586 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
12587 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
12588 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
12589 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
12590 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
12591 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
12592 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
12593 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
12594 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
12595 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
12596 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
12597 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
12598 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
12599 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
12600 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
12601 (CODE_FOR_lasx_xvftint_w_s): Ditto.
12602 (CODE_FOR_lasx_xvftint_l_d): Ditto.
12603 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
12604 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
12605 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
12606 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
12607 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
12608 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
12609 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
12610 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
12611 (CODE_FOR_lasx_xvsat_b): Ditto.
12612 (CODE_FOR_lasx_xvsat_h): Ditto.
12613 (CODE_FOR_lasx_xvsat_w): Ditto.
12614 (CODE_FOR_lasx_xvsat_d): Ditto.
12615 (CODE_FOR_lasx_xvsat_bu): Ditto.
12616 (CODE_FOR_lasx_xvsat_hu): Ditto.
12617 (CODE_FOR_lasx_xvsat_wu): Ditto.
12618 (CODE_FOR_lasx_xvsat_du): Ditto.
12619 (loongarch_builtin_vectorized_function): Ditto.
12620 (loongarch_expand_builtin_insn): Ditto.
12621 (loongarch_expand_builtin): Ditto.
12622 * config/loongarch/loongarch-ftypes.def (1): Ditto.
12626 * config/loongarch/lasxintrin.h: New file.
12628 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
12630 * config/loongarch/loongarch-modes.def
12631 (VECTOR_MODES): Add Loongson ASX instruction support.
12632 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
12633 (loongarch_split_256bit_move_p): Ditto.
12634 (loongarch_expand_vector_group_init): Ditto.
12635 (loongarch_expand_vec_perm_1): Ditto.
12636 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
12637 (loongarch_valid_offset_p): Ditto.
12638 (loongarch_address_insns): Ditto.
12639 (loongarch_const_insns): Ditto.
12640 (loongarch_legitimize_move): Ditto.
12641 (loongarch_builtin_vectorization_cost): Ditto.
12642 (loongarch_split_move_p): Ditto.
12643 (loongarch_split_move): Ditto.
12644 (loongarch_output_move_index_float): Ditto.
12645 (loongarch_split_256bit_move_p): Ditto.
12646 (loongarch_split_256bit_move): Ditto.
12647 (loongarch_output_move): Ditto.
12648 (loongarch_print_operand_reloc): Ditto.
12649 (loongarch_print_operand): Ditto.
12650 (loongarch_hard_regno_mode_ok_uncached): Ditto.
12651 (loongarch_hard_regno_nregs): Ditto.
12652 (loongarch_class_max_nregs): Ditto.
12653 (loongarch_can_change_mode_class): Ditto.
12654 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
12655 (loongarch_vector_mode_supported_p): Ditto.
12656 (loongarch_preferred_simd_mode): Ditto.
12657 (loongarch_autovectorize_vector_modes): Ditto.
12658 (loongarch_lsx_output_division): Ditto.
12659 (loongarch_expand_lsx_shuffle): Ditto.
12660 (loongarch_expand_vec_perm): Ditto.
12661 (loongarch_expand_vec_perm_interleave): Ditto.
12662 (loongarch_try_expand_lsx_vshuf_const): Ditto.
12663 (loongarch_expand_vec_perm_even_odd_1): Ditto.
12664 (loongarch_expand_vec_perm_even_odd): Ditto.
12665 (loongarch_expand_vec_perm_1): Ditto.
12666 (loongarch_expand_vec_perm_const_2): Ditto.
12667 (loongarch_is_quad_duplicate): Ditto.
12668 (loongarch_is_double_duplicate): Ditto.
12669 (loongarch_is_odd_extraction): Ditto.
12670 (loongarch_is_even_extraction): Ditto.
12671 (loongarch_is_extraction_permutation): Ditto.
12672 (loongarch_is_center_extraction): Ditto.
12673 (loongarch_is_reversing_permutation): Ditto.
12674 (loongarch_is_di_misalign_extract): Ditto.
12675 (loongarch_is_si_misalign_extract): Ditto.
12676 (loongarch_is_lasx_lowpart_interleave): Ditto.
12677 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
12678 (COMPARE_SELECTOR): Ditto.
12679 (loongarch_is_lasx_lowpart_extract): Ditto.
12680 (loongarch_is_lasx_highpart_interleave): Ditto.
12681 (loongarch_is_lasx_highpart_interleave_2): Ditto.
12682 (loongarch_is_elem_duplicate): Ditto.
12683 (loongarch_is_op_reverse_perm): Ditto.
12684 (loongarch_is_single_op_perm): Ditto.
12685 (loongarch_is_divisible_perm): Ditto.
12686 (loongarch_is_triple_stride_extract): Ditto.
12687 (loongarch_vectorize_vec_perm_const): Ditto.
12688 (loongarch_cpu_sched_reassociation_width): Ditto.
12689 (loongarch_expand_vector_extract): Ditto.
12690 (emit_reduc_half): Ditto.
12691 (loongarch_expand_vec_unpack): Ditto.
12692 (loongarch_expand_vector_group_init): Ditto.
12693 (loongarch_expand_vector_init): Ditto.
12694 (loongarch_expand_lsx_cmp): Ditto.
12695 (loongarch_builtin_support_vector_misalignment): Ditto.
12696 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
12697 (BITS_PER_LASX_REG): Ditto.
12698 (STRUCTURE_SIZE_BOUNDARY): Ditto.
12699 (LASX_REG_FIRST): Ditto.
12700 (LASX_REG_LAST): Ditto.
12701 (LASX_REG_NUM): Ditto.
12702 (LASX_REG_P): Ditto.
12703 (LASX_REG_RTX_P): Ditto.
12704 (LASX_SUPPORTED_MODE_P): Ditto.
12705 * config/loongarch/loongarch.md: Ditto.
12706 * config/loongarch/lasx.md: New file.
12708 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
12710 * config.gcc: Export the header file lsxintrin.h.
12711 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
12712 (enum loongarch_builtin_type): Ditto.
12713 (AVAIL_ALL): Ditto.
12714 (LARCH_BUILTIN): Ditto.
12715 (LSX_BUILTIN): Ditto.
12716 (LSX_BUILTIN_TEST_BRANCH): Ditto.
12717 (LSX_NO_TARGET_BUILTIN): Ditto.
12718 (CODE_FOR_lsx_vsadd_b): Ditto.
12719 (CODE_FOR_lsx_vsadd_h): Ditto.
12720 (CODE_FOR_lsx_vsadd_w): Ditto.
12721 (CODE_FOR_lsx_vsadd_d): Ditto.
12722 (CODE_FOR_lsx_vsadd_bu): Ditto.
12723 (CODE_FOR_lsx_vsadd_hu): Ditto.
12724 (CODE_FOR_lsx_vsadd_wu): Ditto.
12725 (CODE_FOR_lsx_vsadd_du): Ditto.
12726 (CODE_FOR_lsx_vadd_b): Ditto.
12727 (CODE_FOR_lsx_vadd_h): Ditto.
12728 (CODE_FOR_lsx_vadd_w): Ditto.
12729 (CODE_FOR_lsx_vadd_d): Ditto.
12730 (CODE_FOR_lsx_vaddi_bu): Ditto.
12731 (CODE_FOR_lsx_vaddi_hu): Ditto.
12732 (CODE_FOR_lsx_vaddi_wu): Ditto.
12733 (CODE_FOR_lsx_vaddi_du): Ditto.
12734 (CODE_FOR_lsx_vand_v): Ditto.
12735 (CODE_FOR_lsx_vandi_b): Ditto.
12736 (CODE_FOR_lsx_bnz_v): Ditto.
12737 (CODE_FOR_lsx_bz_v): Ditto.
12738 (CODE_FOR_lsx_vbitsel_v): Ditto.
12739 (CODE_FOR_lsx_vseqi_b): Ditto.
12740 (CODE_FOR_lsx_vseqi_h): Ditto.
12741 (CODE_FOR_lsx_vseqi_w): Ditto.
12742 (CODE_FOR_lsx_vseqi_d): Ditto.
12743 (CODE_FOR_lsx_vslti_b): Ditto.
12744 (CODE_FOR_lsx_vslti_h): Ditto.
12745 (CODE_FOR_lsx_vslti_w): Ditto.
12746 (CODE_FOR_lsx_vslti_d): Ditto.
12747 (CODE_FOR_lsx_vslti_bu): Ditto.
12748 (CODE_FOR_lsx_vslti_hu): Ditto.
12749 (CODE_FOR_lsx_vslti_wu): Ditto.
12750 (CODE_FOR_lsx_vslti_du): Ditto.
12751 (CODE_FOR_lsx_vslei_b): Ditto.
12752 (CODE_FOR_lsx_vslei_h): Ditto.
12753 (CODE_FOR_lsx_vslei_w): Ditto.
12754 (CODE_FOR_lsx_vslei_d): Ditto.
12755 (CODE_FOR_lsx_vslei_bu): Ditto.
12756 (CODE_FOR_lsx_vslei_hu): Ditto.
12757 (CODE_FOR_lsx_vslei_wu): Ditto.
12758 (CODE_FOR_lsx_vslei_du): Ditto.
12759 (CODE_FOR_lsx_vdiv_b): Ditto.
12760 (CODE_FOR_lsx_vdiv_h): Ditto.
12761 (CODE_FOR_lsx_vdiv_w): Ditto.
12762 (CODE_FOR_lsx_vdiv_d): Ditto.
12763 (CODE_FOR_lsx_vdiv_bu): Ditto.
12764 (CODE_FOR_lsx_vdiv_hu): Ditto.
12765 (CODE_FOR_lsx_vdiv_wu): Ditto.
12766 (CODE_FOR_lsx_vdiv_du): Ditto.
12767 (CODE_FOR_lsx_vfadd_s): Ditto.
12768 (CODE_FOR_lsx_vfadd_d): Ditto.
12769 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
12770 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
12771 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
12772 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
12773 (CODE_FOR_lsx_vffint_s_w): Ditto.
12774 (CODE_FOR_lsx_vffint_d_l): Ditto.
12775 (CODE_FOR_lsx_vffint_s_wu): Ditto.
12776 (CODE_FOR_lsx_vffint_d_lu): Ditto.
12777 (CODE_FOR_lsx_vfsub_s): Ditto.
12778 (CODE_FOR_lsx_vfsub_d): Ditto.
12779 (CODE_FOR_lsx_vfmul_s): Ditto.
12780 (CODE_FOR_lsx_vfmul_d): Ditto.
12781 (CODE_FOR_lsx_vfdiv_s): Ditto.
12782 (CODE_FOR_lsx_vfdiv_d): Ditto.
12783 (CODE_FOR_lsx_vfmax_s): Ditto.
12784 (CODE_FOR_lsx_vfmax_d): Ditto.
12785 (CODE_FOR_lsx_vfmin_s): Ditto.
12786 (CODE_FOR_lsx_vfmin_d): Ditto.
12787 (CODE_FOR_lsx_vfsqrt_s): Ditto.
12788 (CODE_FOR_lsx_vfsqrt_d): Ditto.
12789 (CODE_FOR_lsx_vflogb_s): Ditto.
12790 (CODE_FOR_lsx_vflogb_d): Ditto.
12791 (CODE_FOR_lsx_vmax_b): Ditto.
12792 (CODE_FOR_lsx_vmax_h): Ditto.
12793 (CODE_FOR_lsx_vmax_w): Ditto.
12794 (CODE_FOR_lsx_vmax_d): Ditto.
12795 (CODE_FOR_lsx_vmaxi_b): Ditto.
12796 (CODE_FOR_lsx_vmaxi_h): Ditto.
12797 (CODE_FOR_lsx_vmaxi_w): Ditto.
12798 (CODE_FOR_lsx_vmaxi_d): Ditto.
12799 (CODE_FOR_lsx_vmax_bu): Ditto.
12800 (CODE_FOR_lsx_vmax_hu): Ditto.
12801 (CODE_FOR_lsx_vmax_wu): Ditto.
12802 (CODE_FOR_lsx_vmax_du): Ditto.
12803 (CODE_FOR_lsx_vmaxi_bu): Ditto.
12804 (CODE_FOR_lsx_vmaxi_hu): Ditto.
12805 (CODE_FOR_lsx_vmaxi_wu): Ditto.
12806 (CODE_FOR_lsx_vmaxi_du): Ditto.
12807 (CODE_FOR_lsx_vmin_b): Ditto.
12808 (CODE_FOR_lsx_vmin_h): Ditto.
12809 (CODE_FOR_lsx_vmin_w): Ditto.
12810 (CODE_FOR_lsx_vmin_d): Ditto.
12811 (CODE_FOR_lsx_vmini_b): Ditto.
12812 (CODE_FOR_lsx_vmini_h): Ditto.
12813 (CODE_FOR_lsx_vmini_w): Ditto.
12814 (CODE_FOR_lsx_vmini_d): Ditto.
12815 (CODE_FOR_lsx_vmin_bu): Ditto.
12816 (CODE_FOR_lsx_vmin_hu): Ditto.
12817 (CODE_FOR_lsx_vmin_wu): Ditto.
12818 (CODE_FOR_lsx_vmin_du): Ditto.
12819 (CODE_FOR_lsx_vmini_bu): Ditto.
12820 (CODE_FOR_lsx_vmini_hu): Ditto.
12821 (CODE_FOR_lsx_vmini_wu): Ditto.
12822 (CODE_FOR_lsx_vmini_du): Ditto.
12823 (CODE_FOR_lsx_vmod_b): Ditto.
12824 (CODE_FOR_lsx_vmod_h): Ditto.
12825 (CODE_FOR_lsx_vmod_w): Ditto.
12826 (CODE_FOR_lsx_vmod_d): Ditto.
12827 (CODE_FOR_lsx_vmod_bu): Ditto.
12828 (CODE_FOR_lsx_vmod_hu): Ditto.
12829 (CODE_FOR_lsx_vmod_wu): Ditto.
12830 (CODE_FOR_lsx_vmod_du): Ditto.
12831 (CODE_FOR_lsx_vmul_b): Ditto.
12832 (CODE_FOR_lsx_vmul_h): Ditto.
12833 (CODE_FOR_lsx_vmul_w): Ditto.
12834 (CODE_FOR_lsx_vmul_d): Ditto.
12835 (CODE_FOR_lsx_vclz_b): Ditto.
12836 (CODE_FOR_lsx_vclz_h): Ditto.
12837 (CODE_FOR_lsx_vclz_w): Ditto.
12838 (CODE_FOR_lsx_vclz_d): Ditto.
12839 (CODE_FOR_lsx_vnor_v): Ditto.
12840 (CODE_FOR_lsx_vor_v): Ditto.
12841 (CODE_FOR_lsx_vori_b): Ditto.
12842 (CODE_FOR_lsx_vnori_b): Ditto.
12843 (CODE_FOR_lsx_vpcnt_b): Ditto.
12844 (CODE_FOR_lsx_vpcnt_h): Ditto.
12845 (CODE_FOR_lsx_vpcnt_w): Ditto.
12846 (CODE_FOR_lsx_vpcnt_d): Ditto.
12847 (CODE_FOR_lsx_vxor_v): Ditto.
12848 (CODE_FOR_lsx_vxori_b): Ditto.
12849 (CODE_FOR_lsx_vsll_b): Ditto.
12850 (CODE_FOR_lsx_vsll_h): Ditto.
12851 (CODE_FOR_lsx_vsll_w): Ditto.
12852 (CODE_FOR_lsx_vsll_d): Ditto.
12853 (CODE_FOR_lsx_vslli_b): Ditto.
12854 (CODE_FOR_lsx_vslli_h): Ditto.
12855 (CODE_FOR_lsx_vslli_w): Ditto.
12856 (CODE_FOR_lsx_vslli_d): Ditto.
12857 (CODE_FOR_lsx_vsra_b): Ditto.
12858 (CODE_FOR_lsx_vsra_h): Ditto.
12859 (CODE_FOR_lsx_vsra_w): Ditto.
12860 (CODE_FOR_lsx_vsra_d): Ditto.
12861 (CODE_FOR_lsx_vsrai_b): Ditto.
12862 (CODE_FOR_lsx_vsrai_h): Ditto.
12863 (CODE_FOR_lsx_vsrai_w): Ditto.
12864 (CODE_FOR_lsx_vsrai_d): Ditto.
12865 (CODE_FOR_lsx_vsrl_b): Ditto.
12866 (CODE_FOR_lsx_vsrl_h): Ditto.
12867 (CODE_FOR_lsx_vsrl_w): Ditto.
12868 (CODE_FOR_lsx_vsrl_d): Ditto.
12869 (CODE_FOR_lsx_vsrli_b): Ditto.
12870 (CODE_FOR_lsx_vsrli_h): Ditto.
12871 (CODE_FOR_lsx_vsrli_w): Ditto.
12872 (CODE_FOR_lsx_vsrli_d): Ditto.
12873 (CODE_FOR_lsx_vsub_b): Ditto.
12874 (CODE_FOR_lsx_vsub_h): Ditto.
12875 (CODE_FOR_lsx_vsub_w): Ditto.
12876 (CODE_FOR_lsx_vsub_d): Ditto.
12877 (CODE_FOR_lsx_vsubi_bu): Ditto.
12878 (CODE_FOR_lsx_vsubi_hu): Ditto.
12879 (CODE_FOR_lsx_vsubi_wu): Ditto.
12880 (CODE_FOR_lsx_vsubi_du): Ditto.
12881 (CODE_FOR_lsx_vpackod_d): Ditto.
12882 (CODE_FOR_lsx_vpackev_d): Ditto.
12883 (CODE_FOR_lsx_vpickod_d): Ditto.
12884 (CODE_FOR_lsx_vpickev_d): Ditto.
12885 (CODE_FOR_lsx_vrepli_b): Ditto.
12886 (CODE_FOR_lsx_vrepli_h): Ditto.
12887 (CODE_FOR_lsx_vrepli_w): Ditto.
12888 (CODE_FOR_lsx_vrepli_d): Ditto.
12889 (CODE_FOR_lsx_vsat_b): Ditto.
12890 (CODE_FOR_lsx_vsat_h): Ditto.
12891 (CODE_FOR_lsx_vsat_w): Ditto.
12892 (CODE_FOR_lsx_vsat_d): Ditto.
12893 (CODE_FOR_lsx_vsat_bu): Ditto.
12894 (CODE_FOR_lsx_vsat_hu): Ditto.
12895 (CODE_FOR_lsx_vsat_wu): Ditto.
12896 (CODE_FOR_lsx_vsat_du): Ditto.
12897 (CODE_FOR_lsx_vavg_b): Ditto.
12898 (CODE_FOR_lsx_vavg_h): Ditto.
12899 (CODE_FOR_lsx_vavg_w): Ditto.
12900 (CODE_FOR_lsx_vavg_d): Ditto.
12901 (CODE_FOR_lsx_vavg_bu): Ditto.
12902 (CODE_FOR_lsx_vavg_hu): Ditto.
12903 (CODE_FOR_lsx_vavg_wu): Ditto.
12904 (CODE_FOR_lsx_vavg_du): Ditto.
12905 (CODE_FOR_lsx_vavgr_b): Ditto.
12906 (CODE_FOR_lsx_vavgr_h): Ditto.
12907 (CODE_FOR_lsx_vavgr_w): Ditto.
12908 (CODE_FOR_lsx_vavgr_d): Ditto.
12909 (CODE_FOR_lsx_vavgr_bu): Ditto.
12910 (CODE_FOR_lsx_vavgr_hu): Ditto.
12911 (CODE_FOR_lsx_vavgr_wu): Ditto.
12912 (CODE_FOR_lsx_vavgr_du): Ditto.
12913 (CODE_FOR_lsx_vssub_b): Ditto.
12914 (CODE_FOR_lsx_vssub_h): Ditto.
12915 (CODE_FOR_lsx_vssub_w): Ditto.
12916 (CODE_FOR_lsx_vssub_d): Ditto.
12917 (CODE_FOR_lsx_vssub_bu): Ditto.
12918 (CODE_FOR_lsx_vssub_hu): Ditto.
12919 (CODE_FOR_lsx_vssub_wu): Ditto.
12920 (CODE_FOR_lsx_vssub_du): Ditto.
12921 (CODE_FOR_lsx_vabsd_b): Ditto.
12922 (CODE_FOR_lsx_vabsd_h): Ditto.
12923 (CODE_FOR_lsx_vabsd_w): Ditto.
12924 (CODE_FOR_lsx_vabsd_d): Ditto.
12925 (CODE_FOR_lsx_vabsd_bu): Ditto.
12926 (CODE_FOR_lsx_vabsd_hu): Ditto.
12927 (CODE_FOR_lsx_vabsd_wu): Ditto.
12928 (CODE_FOR_lsx_vabsd_du): Ditto.
12929 (CODE_FOR_lsx_vftint_w_s): Ditto.
12930 (CODE_FOR_lsx_vftint_l_d): Ditto.
12931 (CODE_FOR_lsx_vftint_wu_s): Ditto.
12932 (CODE_FOR_lsx_vftint_lu_d): Ditto.
12933 (CODE_FOR_lsx_vandn_v): Ditto.
12934 (CODE_FOR_lsx_vorn_v): Ditto.
12935 (CODE_FOR_lsx_vneg_b): Ditto.
12936 (CODE_FOR_lsx_vneg_h): Ditto.
12937 (CODE_FOR_lsx_vneg_w): Ditto.
12938 (CODE_FOR_lsx_vneg_d): Ditto.
12939 (CODE_FOR_lsx_vshuf4i_d): Ditto.
12940 (CODE_FOR_lsx_vbsrl_v): Ditto.
12941 (CODE_FOR_lsx_vbsll_v): Ditto.
12942 (CODE_FOR_lsx_vfmadd_s): Ditto.
12943 (CODE_FOR_lsx_vfmadd_d): Ditto.
12944 (CODE_FOR_lsx_vfmsub_s): Ditto.
12945 (CODE_FOR_lsx_vfmsub_d): Ditto.
12946 (CODE_FOR_lsx_vfnmadd_s): Ditto.
12947 (CODE_FOR_lsx_vfnmadd_d): Ditto.
12948 (CODE_FOR_lsx_vfnmsub_s): Ditto.
12949 (CODE_FOR_lsx_vfnmsub_d): Ditto.
12950 (CODE_FOR_lsx_vmuh_b): Ditto.
12951 (CODE_FOR_lsx_vmuh_h): Ditto.
12952 (CODE_FOR_lsx_vmuh_w): Ditto.
12953 (CODE_FOR_lsx_vmuh_d): Ditto.
12954 (CODE_FOR_lsx_vmuh_bu): Ditto.
12955 (CODE_FOR_lsx_vmuh_hu): Ditto.
12956 (CODE_FOR_lsx_vmuh_wu): Ditto.
12957 (CODE_FOR_lsx_vmuh_du): Ditto.
12958 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
12959 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
12960 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
12961 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
12962 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
12963 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
12964 (CODE_FOR_lsx_vssran_b_h): Ditto.
12965 (CODE_FOR_lsx_vssran_h_w): Ditto.
12966 (CODE_FOR_lsx_vssran_w_d): Ditto.
12967 (CODE_FOR_lsx_vssran_bu_h): Ditto.
12968 (CODE_FOR_lsx_vssran_hu_w): Ditto.
12969 (CODE_FOR_lsx_vssran_wu_d): Ditto.
12970 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
12971 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
12972 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
12973 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
12974 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
12975 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
12976 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
12977 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
12978 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
12979 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
12980 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
12981 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
12982 (loongarch_builtin_vector_type): Ditto.
12983 (loongarch_build_cvpointer_type): Ditto.
12984 (LARCH_ATYPE_CVPOINTER): Ditto.
12985 (LARCH_ATYPE_BOOLEAN): Ditto.
12986 (LARCH_ATYPE_V2SF): Ditto.
12987 (LARCH_ATYPE_V2HI): Ditto.
12988 (LARCH_ATYPE_V2SI): Ditto.
12989 (LARCH_ATYPE_V4QI): Ditto.
12990 (LARCH_ATYPE_V4HI): Ditto.
12991 (LARCH_ATYPE_V8QI): Ditto.
12992 (LARCH_ATYPE_V2DI): Ditto.
12993 (LARCH_ATYPE_V4SI): Ditto.
12994 (LARCH_ATYPE_V8HI): Ditto.
12995 (LARCH_ATYPE_V16QI): Ditto.
12996 (LARCH_ATYPE_V2DF): Ditto.
12997 (LARCH_ATYPE_V4SF): Ditto.
12998 (LARCH_ATYPE_V4DI): Ditto.
12999 (LARCH_ATYPE_V8SI): Ditto.
13000 (LARCH_ATYPE_V16HI): Ditto.
13001 (LARCH_ATYPE_V32QI): Ditto.
13002 (LARCH_ATYPE_V4DF): Ditto.
13003 (LARCH_ATYPE_V8SF): Ditto.
13004 (LARCH_ATYPE_UV2DI): Ditto.
13005 (LARCH_ATYPE_UV4SI): Ditto.
13006 (LARCH_ATYPE_UV8HI): Ditto.
13007 (LARCH_ATYPE_UV16QI): Ditto.
13008 (LARCH_ATYPE_UV4DI): Ditto.
13009 (LARCH_ATYPE_UV8SI): Ditto.
13010 (LARCH_ATYPE_UV16HI): Ditto.
13011 (LARCH_ATYPE_UV32QI): Ditto.
13012 (LARCH_ATYPE_UV2SI): Ditto.
13013 (LARCH_ATYPE_UV4HI): Ditto.
13014 (LARCH_ATYPE_UV8QI): Ditto.
13015 (loongarch_builtin_vectorized_function): Ditto.
13016 (LARCH_GET_BUILTIN): Ditto.
13017 (loongarch_expand_builtin_insn): Ditto.
13018 (loongarch_expand_builtin_lsx_test_branch): Ditto.
13019 (loongarch_expand_builtin): Ditto.
13020 * config/loongarch/loongarch-ftypes.def (1): Ditto.
13024 * config/loongarch/lsxintrin.h: New file.
13026 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
13028 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
13048 * config/loongarch/genopts/loongarch.opt.in: Ditto.
13049 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
13050 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
13051 (VECTOR_MODE): Ditto.
13053 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
13054 (loongarch_split_move_insn): Ditto.
13055 (loongarch_split_128bit_move): Ditto.
13056 (loongarch_split_128bit_move_p): Ditto.
13057 (loongarch_split_lsx_copy_d): Ditto.
13058 (loongarch_split_lsx_insert_d): Ditto.
13059 (loongarch_split_lsx_fill_d): Ditto.
13060 (loongarch_expand_vec_cmp): Ditto.
13061 (loongarch_const_vector_same_val_p): Ditto.
13062 (loongarch_const_vector_same_bytes_p): Ditto.
13063 (loongarch_const_vector_same_int_p): Ditto.
13064 (loongarch_const_vector_shuffle_set_p): Ditto.
13065 (loongarch_const_vector_bitimm_set_p): Ditto.
13066 (loongarch_const_vector_bitimm_clr_p): Ditto.
13067 (loongarch_lsx_vec_parallel_const_half): Ditto.
13068 (loongarch_gen_const_int_vector): Ditto.
13069 (loongarch_lsx_output_division): Ditto.
13070 (loongarch_expand_vector_init): Ditto.
13071 (loongarch_expand_vec_unpack): Ditto.
13072 (loongarch_expand_vec_perm): Ditto.
13073 (loongarch_expand_vector_extract): Ditto.
13074 (loongarch_expand_vector_reduc): Ditto.
13075 (loongarch_ldst_scaled_shift): Ditto.
13076 (loongarch_expand_vec_cond_expr): Ditto.
13077 (loongarch_expand_vec_cond_mask_expr): Ditto.
13078 (loongarch_builtin_vectorized_function): Ditto.
13079 (loongarch_gen_const_int_vector_shuffle): Ditto.
13080 (loongarch_build_signbit_mask): Ditto.
13081 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
13082 (loongarch_setup_incoming_varargs): Ditto.
13083 (loongarch_emit_move): Ditto.
13084 (loongarch_const_vector_bitimm_set_p): Ditto.
13085 (loongarch_const_vector_bitimm_clr_p): Ditto.
13086 (loongarch_const_vector_same_val_p): Ditto.
13087 (loongarch_const_vector_same_bytes_p): Ditto.
13088 (loongarch_const_vector_same_int_p): Ditto.
13089 (loongarch_const_vector_shuffle_set_p): Ditto.
13090 (loongarch_symbol_insns): Ditto.
13091 (loongarch_cannot_force_const_mem): Ditto.
13092 (loongarch_valid_offset_p): Ditto.
13093 (loongarch_valid_index_p): Ditto.
13094 (loongarch_classify_address): Ditto.
13095 (loongarch_address_insns): Ditto.
13096 (loongarch_ldst_scaled_shift): Ditto.
13097 (loongarch_const_insns): Ditto.
13098 (loongarch_split_move_insn_p): Ditto.
13099 (loongarch_subword_at_byte): Ditto.
13100 (loongarch_legitimize_move): Ditto.
13101 (loongarch_builtin_vectorization_cost): Ditto.
13102 (loongarch_split_move_p): Ditto.
13103 (loongarch_split_move): Ditto.
13104 (loongarch_split_move_insn): Ditto.
13105 (loongarch_output_move_index_float): Ditto.
13106 (loongarch_split_128bit_move_p): Ditto.
13107 (loongarch_split_128bit_move): Ditto.
13108 (loongarch_split_lsx_copy_d): Ditto.
13109 (loongarch_split_lsx_insert_d): Ditto.
13110 (loongarch_split_lsx_fill_d): Ditto.
13111 (loongarch_output_move): Ditto.
13112 (loongarch_extend_comparands): Ditto.
13113 (loongarch_print_operand_reloc): Ditto.
13114 (loongarch_print_operand): Ditto.
13115 (loongarch_hard_regno_mode_ok_uncached): Ditto.
13116 (loongarch_hard_regno_call_part_clobbered): Ditto.
13117 (loongarch_hard_regno_nregs): Ditto.
13118 (loongarch_class_max_nregs): Ditto.
13119 (loongarch_can_change_mode_class): Ditto.
13120 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
13121 (loongarch_secondary_reload): Ditto.
13122 (loongarch_vector_mode_supported_p): Ditto.
13123 (loongarch_preferred_simd_mode): Ditto.
13124 (loongarch_autovectorize_vector_modes): Ditto.
13125 (loongarch_lsx_output_division): Ditto.
13126 (loongarch_option_override_internal): Ditto.
13127 (loongarch_hard_regno_caller_save_mode): Ditto.
13128 (MAX_VECT_LEN): Ditto.
13129 (loongarch_spill_class): Ditto.
13130 (struct expand_vec_perm_d): Ditto.
13131 (loongarch_promote_function_mode): Ditto.
13132 (loongarch_expand_vselect): Ditto.
13133 (loongarch_starting_frame_offset): Ditto.
13134 (loongarch_expand_vselect_vconcat): Ditto.
13135 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
13136 (TARGET_OPTION_OVERRIDE): Ditto.
13137 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
13138 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
13139 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
13140 (loongarch_expand_lsx_shuffle): Ditto.
13141 (TARGET_SCHED_INIT): Ditto.
13142 (TARGET_SCHED_REORDER): Ditto.
13143 (TARGET_SCHED_REORDER2): Ditto.
13144 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
13145 (TARGET_SCHED_ADJUST_COST): Ditto.
13146 (TARGET_SCHED_ISSUE_RATE): Ditto.
13147 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
13148 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
13149 (TARGET_VALID_POINTER_MODE): Ditto.
13150 (TARGET_REGISTER_MOVE_COST): Ditto.
13151 (TARGET_MEMORY_MOVE_COST): Ditto.
13152 (TARGET_RTX_COSTS): Ditto.
13153 (TARGET_ADDRESS_COST): Ditto.
13154 (TARGET_IN_SMALL_DATA_P): Ditto.
13155 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
13156 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
13157 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
13158 (loongarch_expand_vec_perm): Ditto.
13159 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
13160 (TARGET_RETURN_IN_MEMORY): Ditto.
13161 (TARGET_FUNCTION_VALUE): Ditto.
13162 (TARGET_LIBCALL_VALUE): Ditto.
13163 (loongarch_try_expand_lsx_vshuf_const): Ditto.
13164 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
13165 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
13166 (TARGET_PRINT_OPERAND): Ditto.
13167 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
13168 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
13169 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
13170 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
13171 (TARGET_MUST_PASS_IN_STACK): Ditto.
13172 (TARGET_PASS_BY_REFERENCE): Ditto.
13173 (TARGET_ARG_PARTIAL_BYTES): Ditto.
13174 (TARGET_FUNCTION_ARG): Ditto.
13175 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
13176 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
13177 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
13178 (TARGET_INIT_BUILTINS): Ditto.
13179 (loongarch_expand_vec_perm_const_1): Ditto.
13180 (loongarch_expand_vec_perm_const_2): Ditto.
13181 (loongarch_vectorize_vec_perm_const): Ditto.
13182 (loongarch_cpu_sched_reassociation_width): Ditto.
13183 (loongarch_sched_reassociation_width): Ditto.
13184 (loongarch_expand_vector_extract): Ditto.
13185 (emit_reduc_half): Ditto.
13186 (loongarch_expand_vector_reduc): Ditto.
13187 (loongarch_expand_vec_unpack): Ditto.
13188 (loongarch_lsx_vec_parallel_const_half): Ditto.
13189 (loongarch_constant_elt_p): Ditto.
13190 (loongarch_gen_const_int_vector_shuffle): Ditto.
13191 (loongarch_expand_vector_init): Ditto.
13192 (loongarch_expand_lsx_cmp): Ditto.
13193 (loongarch_expand_vec_cond_expr): Ditto.
13194 (loongarch_expand_vec_cond_mask_expr): Ditto.
13195 (loongarch_expand_vec_cmp): Ditto.
13196 (loongarch_case_values_threshold): Ditto.
13197 (loongarch_build_const_vector): Ditto.
13198 (loongarch_build_signbit_mask): Ditto.
13199 (loongarch_builtin_support_vector_misalignment): Ditto.
13200 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
13201 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
13202 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
13203 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
13204 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
13205 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
13206 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
13207 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
13208 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
13209 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
13210 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
13211 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
13212 (UNITS_PER_LSX_REG): Ditto.
13213 (BITS_PER_LSX_REG): Ditto.
13214 (BIGGEST_ALIGNMENT): Ditto.
13215 (LSX_REG_FIRST): Ditto.
13216 (LSX_REG_LAST): Ditto.
13217 (LSX_REG_NUM): Ditto.
13218 (LSX_REG_P): Ditto.
13219 (LSX_REG_RTX_P): Ditto.
13220 (IMM13_OPERAND): Ditto.
13221 (LSX_SUPPORTED_MODE_P): Ditto.
13222 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
13223 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
13224 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
13231 * config/loongarch/loongarch.opt: Ditto.
13232 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
13233 (const_uimm3_operand): Ditto.
13234 (const_8_to_11_operand): Ditto.
13235 (const_12_to_15_operand): Ditto.
13236 (const_uimm4_operand): Ditto.
13237 (const_uimm6_operand): Ditto.
13238 (const_uimm7_operand): Ditto.
13239 (const_uimm8_operand): Ditto.
13240 (const_imm5_operand): Ditto.
13241 (const_imm10_operand): Ditto.
13242 (const_imm13_operand): Ditto.
13243 (reg_imm10_operand): Ditto.
13244 (aq8b_operand): Ditto.
13245 (aq8h_operand): Ditto.
13246 (aq8w_operand): Ditto.
13247 (aq8d_operand): Ditto.
13248 (aq10b_operand): Ditto.
13249 (aq10h_operand): Ditto.
13250 (aq10w_operand): Ditto.
13251 (aq10d_operand): Ditto.
13252 (aq12b_operand): Ditto.
13253 (aq12h_operand): Ditto.
13254 (aq12w_operand): Ditto.
13255 (aq12d_operand): Ditto.
13256 (const_m1_operand): Ditto.
13257 (reg_or_m1_operand): Ditto.
13258 (const_exp_2_operand): Ditto.
13259 (const_exp_4_operand): Ditto.
13260 (const_exp_8_operand): Ditto.
13261 (const_exp_16_operand): Ditto.
13262 (const_exp_32_operand): Ditto.
13263 (const_0_or_1_operand): Ditto.
13264 (const_0_to_3_operand): Ditto.
13265 (const_0_to_7_operand): Ditto.
13266 (const_2_or_3_operand): Ditto.
13267 (const_4_to_7_operand): Ditto.
13268 (const_8_to_15_operand): Ditto.
13269 (const_16_to_31_operand): Ditto.
13270 (qi_mask_operand): Ditto.
13271 (hi_mask_operand): Ditto.
13272 (si_mask_operand): Ditto.
13273 (d_operand): Ditto.
13274 (db4_operand): Ditto.
13275 (db7_operand): Ditto.
13276 (db8_operand): Ditto.
13277 (ib3_operand): Ditto.
13278 (sb4_operand): Ditto.
13279 (sb5_operand): Ditto.
13280 (sb8_operand): Ditto.
13281 (sd8_operand): Ditto.
13282 (ub4_operand): Ditto.
13283 (ub8_operand): Ditto.
13284 (uh4_operand): Ditto.
13285 (uw4_operand): Ditto.
13286 (uw5_operand): Ditto.
13287 (uw6_operand): Ditto.
13288 (uw8_operand): Ditto.
13289 (addiur2_operand): Ditto.
13290 (addiusp_operand): Ditto.
13291 (andi16_operand): Ditto.
13292 (movep_src_register): Ditto.
13293 (movep_src_operand): Ditto.
13294 (fcc_reload_operand): Ditto.
13295 (muldiv_target_operand): Ditto.
13296 (const_vector_same_val_operand): Ditto.
13297 (const_vector_same_simm5_operand): Ditto.
13298 (const_vector_same_uimm5_operand): Ditto.
13299 (const_vector_same_ximm5_operand): Ditto.
13300 (const_vector_same_uimm6_operand): Ditto.
13301 (par_const_vector_shf_set_operand): Ditto.
13302 (reg_or_vector_same_val_operand): Ditto.
13303 (reg_or_vector_same_simm5_operand): Ditto.
13304 (reg_or_vector_same_uimm5_operand): Ditto.
13305 (reg_or_vector_same_ximm5_operand): Ditto.
13306 (reg_or_vector_same_uimm6_operand): Ditto.
13307 * doc/md.texi: Ditto.
13308 * config/loongarch/lsx.md: New file.
13310 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13312 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
13313 (get_all_predecessors): New function.
13314 (get_all_successors): Ditto.
13315 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
13316 (get_all_successors): Ditto.
13317 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
13318 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
13320 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
13322 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
13323 (split_addsi): Likewise.
13324 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
13325 'N', 'x', and 'J' code letters.
13326 (arc_output_addsi): Make it static.
13327 (split_addsi): Remove it.
13328 * config/arc/arc.h (UNSIGNED_INT*): New defines.
13329 (SINNED_INT*): Likewise.
13330 * config/arc/arc.md (type): Add add, sub, bxor types.
13331 (tst_movb): Change code letter from 's' to 'x'.
13332 (andsi3_i): Likewise.
13333 (addsi3_mixed): Refurbish the pattern.
13334 (call_i): Change code letter from 'S' to 'J'.
13335 * config/arc/arc700.md: Add newly introduced types.
13336 * config/arc/arcHS.md: Likewsie.
13337 * config/arc/arcHS4x.md: Likewise.
13338 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
13339 (CM4): Update description.
13340 (CP4, C6u, C6n, CIs, C4p): New constraint.
13342 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
13344 * common/config/arc/arc-common.cc (arc_option_optimization_table):
13345 Remove mbbit_peephole.
13346 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
13347 (store_direct): Likewise.
13348 (BBIT peephole2): Likewise.
13349 * config/arc/arc.opt (mbbit-peephole): Ignore option.
13350 * doc/invoke.texi (mbbit-peephole): Update document.
13352 2023-09-05 Jakub Jelinek <jakub@redhat.com>
13354 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
13355 avreage -> average.
13357 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13359 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
13360 options passed from driver to gnat1 as explicit for multilib.
13362 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13364 * config.gcc: add loongarch*-elf target.
13365 * config/loongarch/elf.h: New file.
13366 Link against newlib by default.
13368 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13370 * config.gcc: use -mstrict-align for building libraries
13371 if --with-strict-align-lib is given.
13372 * doc/install.texi: likewise.
13374 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13376 * config/loongarch/loongarch-c.cc: Export macros
13377 "__loongarch_{arch,tune}" in the preprocessor.
13379 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
13381 * config.gcc: Make --with-abi= obsolete, decide the default ABI
13382 with target triplet. Allow specifying multilib library build
13383 options with --with-multilib-list and --with-multilib-default.
13384 * config/loongarch/t-linux: Likewise.
13385 * config/loongarch/genopts/loongarch-strings: Likewise.
13386 * config/loongarch/loongarch-str.h: Likewise.
13387 * doc/install.texi: Likewise.
13388 * config/loongarch/genopts/loongarch.opt.in: Introduce
13389 -m[no-]l[a]sx options. Only process -m*-float and
13390 -m[no-]l[a]sx in the GCC driver.
13391 * config/loongarch/loongarch.opt: Likewise.
13392 * config/loongarch/la464.md: Likewise.
13393 * config/loongarch/loongarch-c.cc: Likewise.
13394 * config/loongarch/loongarch-cpu.cc: Likewise.
13395 * config/loongarch/loongarch-cpu.h: Likewise.
13396 * config/loongarch/loongarch-def.c: Likewise.
13397 * config/loongarch/loongarch-def.h: Likewise.
13398 * config/loongarch/loongarch-driver.cc: Likewise.
13399 * config/loongarch/loongarch-driver.h: Likewise.
13400 * config/loongarch/loongarch-opts.cc: Likewise.
13401 * config/loongarch/loongarch-opts.h: Likewise.
13402 * config/loongarch/loongarch.cc: Likewise.
13403 * doc/invoke.texi: Likewise.
13405 2023-09-05 liuhongt <hongtao.liu@intel.com>
13407 * config/i386/sse.md: (V8BFH_128): Renamed to ..
13408 (VHFBF_128): .. this.
13409 (V16BFH_256): Renamed to ..
13410 (VHFBF_256): .. this.
13411 (avx512f_mov<mode>): Extend to V_128.
13412 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
13413 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
13414 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
13415 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
13416 * config/i386/i386-expand.cc (expand_vec_perm_blend):
13417 Canonicalize vec_merge.
13419 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13421 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
13422 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
13423 (autovectorize_vector_modes): Ditto.
13424 (vectorize_related_mode): Ditto.
13426 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13428 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
13429 all 32b Darwin PowerPC cases.
13431 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13433 * config/darwin-sections.def (static_init_section): Add the
13434 __TEXT,__StaticInit section.
13435 * config/darwin.cc (darwin_function_section): Use the static init
13436 section for global initializers, to match other platform toolchains.
13438 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13440 * config/darwin-sections.def (darwin_exception_section): Move to
13441 the __TEXT segment.
13442 * config/darwin.cc (darwin_emit_except_table_label): Align before
13443 the exception table label.
13444 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
13445 relative 4byte relocs.
13447 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
13449 * config/darwin.cc (dump_machopic_symref_flags): New.
13450 (debug_machopic_symref_flags): New.
13452 2023-09-04 Pan Li <pan2.li@intel.com>
13454 * config/riscv/riscv-vector-builtins-types.def
13455 (vfloat16mf4_t): Add FP16 intrinsic def.
13456 (vfloat16mf2_t): Ditto.
13457 (vfloat16m1_t): Ditto.
13458 (vfloat16m2_t): Ditto.
13459 (vfloat16m4_t): Ditto.
13460 (vfloat16m8_t): Ditto.
13462 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
13464 PR tree-optimization/108757
13465 * match.pd ((X - N * M) / N): New pattern.
13466 ((X + N * M) / N): New pattern.
13467 ((X + C) div_rshift N): New pattern.
13469 2023-09-04 Guo Jie <guojie@loongson.cn>
13471 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
13472 movsf_hardfloat and movdf_hardfloat.
13474 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
13476 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
13477 In unsigned QImode test, check for sign extended subreg and/or
13478 constant operands, and do a sign extension in that case.
13479 * config/loongarch/loongarch.md (TARGET_64BIT): Define
13480 template cbranchqi4.
13482 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
13484 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
13485 from memory into floating-point registers.
13487 2023-09-03 Pan Li <pan2.li@intel.com>
13489 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
13491 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
13493 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
13495 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
13496 pointer before overwriting it.
13498 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
13500 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
13501 Associate the __float128 type to float128_type_node so that it can
13502 be recognized by the compiler.
13503 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
13504 Add the flag "FLOAT128_TYPE" to gcc and associate a function
13505 with the suffix "q" to "f128".
13506 * doc/extend.texi:Added support for 128-bit floating-point functions on
13507 the LoongArch architecture.
13509 2023-09-01 Jakub Jelinek <jakub@redhat.com>
13512 * common.opt (fabi-version=): Document version 19.
13513 * doc/invoke.texi (-fabi-version=): Likewise.
13515 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13517 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
13518 New combine pattern.
13519 (*cond_<float_cvt><vconvert><mode>): Ditto.
13520 (*cond_<optab><vnconvert><mode>): Ditto.
13521 (*cond_<float_cvt><vnconvert><mode>): Ditto.
13522 (*cond_<optab><mode><vnconvert>): Ditto.
13523 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
13524 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
13525 (<float_cvt><vconvert><mode>2): Adjust.
13526 (<optab><vnconvert><mode>2): Adjust.
13527 (<float_cvt><vnconvert><mode>2): Adjust.
13528 (<optab><mode><vnconvert>2): Adjust.
13529 (<float_cvt><mode><vnconvert>2): Adjust.
13530 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
13532 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13534 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
13535 New combine pattern.
13536 (*cond_trunc<mode><v_double_trunc>): Ditto.
13537 * config/riscv/autovec.md: Adjust.
13538 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
13540 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13542 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
13543 New combine pattern.
13544 (*cond_<optab><v_quad_trunc><mode>): Ditto.
13545 (*cond_<optab><v_oct_trunc><mode>): Ditto.
13546 (*cond_trunc<mode><v_double_trunc>): Ditto.
13547 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
13548 (<optab><v_oct_trunc><mode>2): Ditto.
13550 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
13552 * config/riscv/autovec.md: Adjust.
13553 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
13554 (expand_cond_len_binop): Ditto.
13555 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
13556 (expand_cond_len_op): Ditto.
13557 (expand_cond_len_unop): Ditto.
13558 (expand_cond_len_binop): Ditto.
13559 (expand_cond_len_ternop): Ditto.
13561 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13563 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
13564 VECT_COMPARE_COSTS by default.
13566 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
13568 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
13570 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13572 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
13574 * config/riscv/riscv.opt: Add dynamic compile option.
13576 2023-09-01 Pan Li <pan2.li@intel.com>
13578 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
13579 vls floating-point autovec.
13580 * config/riscv/vector-iterators.md: New iterator for
13581 floating-point V and VLS.
13582 * config/riscv/vector.md: Add VLS to floating-point binop.
13584 2023-09-01 Andrew Pinski <apinski@marvell.com>
13586 PR tree-optimization/19832
13587 * match.pd: Add pattern to optimize
13588 `(a != b) ? a OP b : c`.
13590 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
13591 Guo Jie <guojie@loongson.cn>
13594 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
13595 frame_pointer_needed to determine whether to use the $fp register.
13597 2023-08-31 Andrew Pinski <apinski@marvell.com>
13599 PR tree-optimization/110915
13600 * match.pd (min_value, max_value): Extend to vector constants.
13602 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
13604 * config.in: Regenerate.
13605 * config/darwin-c.cc: Change spelling to macOS.
13606 * config/darwin-driver.cc: Likewise.
13607 * config/darwin.h: Likewise.
13608 * configure.ac: Likewise.
13609 * doc/contrib.texi: Likewise.
13610 * doc/extend.texi: Likewise.
13611 * doc/invoke.texi: Likewise.
13612 * doc/plugins.texi: Likewise.
13613 * doc/tm.texi: Regenerate.
13614 * doc/tm.texi.in: Change spelling to macOS.
13615 * plugin.cc: Likewise.
13617 2023-08-31 Pan Li <pan2.li@intel.com>
13619 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
13620 * config/riscv/autovec.md: Ditto.
13622 2023-08-31 Pan Li <pan2.li@intel.com>
13624 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
13625 * config/riscv/autovec.md: Ditto.
13627 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
13629 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
13630 rather than a call. List each possible destination register
13631 in the call pattern.
13633 2023-08-31 Pan Li <pan2.li@intel.com>
13635 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
13636 * config/riscv/autovec.md: Ditto.
13638 2023-08-31 Pan Li <pan2.li@intel.com>
13639 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13641 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
13642 * config/riscv/autovec.md: Ditto.
13643 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
13645 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
13647 * config/riscv/autovec.md (shifts): Use
13648 vector_scalar_shift_operand.
13649 * config/riscv/predicates.md (vector_scalar_shift_operand): New
13652 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13654 * config.gcc: Add vector cost model framework for RVV.
13655 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
13656 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
13657 * config/riscv/t-riscv: Ditto.
13658 * config/riscv/riscv-vector-costs.cc: New file.
13659 * config/riscv/riscv-vector-costs.h: New file.
13661 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
13664 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
13665 AltiVec address operands.
13666 (define_insn_and_split movxo): Likewise.
13667 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
13668 redundant mode size check.
13670 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
13672 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
13673 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
13674 Change to default policy.
13675 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
13676 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
13677 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
13679 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
13681 * config/riscv/autovec-opt.md: Adjust.
13682 * config/riscv/autovec-vls.md: Ditto.
13683 * config/riscv/autovec.md: Ditto.
13684 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
13685 (enum insn_flags): Add insn flags.
13686 (emit_vlmax_insn): Adjust.
13687 (emit_vlmax_fp_insn): Delete.
13688 (emit_vlmax_ternary_insn): Delete.
13689 (emit_vlmax_fp_ternary_insn): Delete.
13690 (emit_nonvlmax_insn): Adjust.
13691 (emit_vlmax_slide_insn): Delete.
13692 (emit_nonvlmax_slide_tu_insn): Delete.
13693 (emit_vlmax_merge_insn): Delete.
13694 (emit_vlmax_cmp_insn): Delete.
13695 (emit_vlmax_cmp_mu_insn): Delete.
13696 (emit_vlmax_masked_mu_insn): Delete.
13697 (emit_scalar_move_insn): Delete.
13698 (emit_nonvlmax_integer_move_insn): Delete.
13699 (emit_vlmax_insn_lra): Add.
13700 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
13701 (emit_vlmax_insn): Adjust.
13702 (emit_nonvlmax_insn): Adjust.
13703 (emit_vlmax_insn_lra): Add.
13704 (emit_vlmax_fp_insn): Delete.
13705 (emit_vlmax_ternary_insn): Delete.
13706 (emit_vlmax_fp_ternary_insn): Delete.
13707 (emit_vlmax_slide_insn): Delete.
13708 (emit_nonvlmax_slide_tu_insn): Delete.
13709 (emit_nonvlmax_slide_insn): Delete.
13710 (emit_vlmax_merge_insn): Delete.
13711 (emit_vlmax_cmp_insn): Delete.
13712 (emit_vlmax_cmp_mu_insn): Delete.
13713 (emit_vlmax_masked_insn): Delete.
13714 (emit_nonvlmax_masked_insn): Delete.
13715 (emit_vlmax_masked_store_insn): Delete.
13716 (emit_nonvlmax_masked_store_insn): Delete.
13717 (emit_vlmax_masked_mu_insn): Delete.
13718 (emit_vlmax_masked_fp_mu_insn): Delete.
13719 (emit_nonvlmax_tu_insn): Delete.
13720 (emit_nonvlmax_fp_tu_insn): Delete.
13721 (emit_nonvlmax_tumu_insn): Delete.
13722 (emit_nonvlmax_fp_tumu_insn): Delete.
13723 (emit_scalar_move_insn): Delete.
13724 (emit_cpop_insn): Delete.
13725 (emit_vlmax_integer_move_insn): Delete.
13726 (emit_nonvlmax_integer_move_insn): Delete.
13727 (emit_vlmax_gather_insn): Delete.
13728 (emit_vlmax_masked_gather_mu_insn): Delete.
13729 (emit_vlmax_compress_insn): Delete.
13730 (emit_nonvlmax_compress_insn): Delete.
13731 (emit_vlmax_reduction_insn): Delete.
13732 (emit_vlmax_fp_reduction_insn): Delete.
13733 (emit_nonvlmax_fp_reduction_insn): Delete.
13734 (expand_vec_series): Adjust.
13735 (expand_const_vector): Adjust.
13736 (legitimize_move): Adjust.
13737 (sew64_scalar_helper): Adjust.
13738 (expand_tuple_move): Adjust.
13739 (expand_vector_init_insert_elems): Adjust.
13740 (expand_vector_init_merge_repeating_sequence): Adjust.
13741 (expand_vec_cmp): Adjust.
13742 (expand_vec_cmp_float): Adjust.
13743 (expand_vec_perm): Adjust.
13744 (shuffle_merge_patterns): Adjust.
13745 (shuffle_compress_patterns): Adjust.
13746 (shuffle_decompress_patterns): Adjust.
13747 (expand_load_store): Adjust.
13748 (expand_cond_len_op): Adjust.
13749 (expand_cond_len_unop): Adjust.
13750 (expand_cond_len_binop): Adjust.
13751 (expand_gather_scatter): Adjust.
13752 (expand_cond_len_ternop): Adjust.
13753 (expand_reduction): Adjust.
13754 (expand_lanes_load_store): Adjust.
13755 (expand_fold_extract_last): Adjust.
13756 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
13757 * config/riscv/vector.md: Adjust.
13759 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
13762 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
13763 load/store with length only on 64-bit Power10.
13765 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
13767 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
13768 SWAP option is enabled.
13769 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
13771 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
13773 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
13774 Use common insn for signed and unsigned front-end definitions.
13775 * config/arm/arm_mve_builtins.def
13776 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
13777 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
13778 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
13781 (mve_rot): Likewise.
13783 (VxCADDQ_M): Likewise.
13784 * config/arm/unspecs.md (unspec): Likewise.
13785 * config/arm/mve.md: Fix minor typo.
13787 2023-08-31 liuhongt <hongtao.liu@intel.com>
13789 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
13790 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
13791 (VF_AVX512HFBF16): Renamed to VHFBF.
13792 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
13793 (VF_AVX512FP16): Removed.
13794 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
13795 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
13796 (rsqrt<mode>2): Ditto.
13797 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
13798 (vcond<mode><code>): Ditto.
13799 (vcond<sseintvecmodelower><mode>): Ditto.
13800 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
13801 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
13802 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
13803 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
13804 (cmla<conj_op><mode>4): Ditto.
13805 (fma_<mode>_fadd_fmul): Ditto.
13806 (fma_<mode>_fadd_fcmul): Ditto.
13807 (fma_<complexopname>_<mode>_fma_zero): Ditto.
13808 (fma_<mode>_fmaddc_bcst): Ditto.
13809 (fma_<mode>_fcmaddc_bcst): Ditto.
13810 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
13811 (cmul<conj_op><mode>3): Ditto.
13812 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
13814 (vec_unpacks_lo_<mode>): Ditto.
13815 (vec_unpacks_hi_<mode>): Ditto.
13816 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
13817 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
13818 (*vec_extract<mode>_0): Ditto.
13819 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
13821 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
13824 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
13826 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
13828 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
13829 (operator_minus::overflow_free_p): New declare.
13830 (operator_mult::overflow_free_p): New declare.
13831 * range-op.cc (range_op_handler::overflow_free_p): New function.
13832 (range_operator::overflow_free_p): New default function.
13833 (operator_plus::overflow_free_p): New function.
13834 (operator_minus::overflow_free_p): New function.
13835 (operator_mult::overflow_free_p): New function.
13836 * range-op.h (range_op_handler::overflow_free_p): New declare.
13837 (range_operator::overflow_free_p): New declare.
13838 * value-range.cc (irange::nonnegative_p): New function.
13839 (irange::nonpositive_p): New function.
13840 * value-range.h (irange::nonnegative_p): New declare.
13841 (irange::nonpositive_p): New declare.
13843 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
13846 * config/pru/predicates.md (const_0_operand): New predicate.
13847 (pru_cstore_comparison_operator): Ditto.
13848 * config/pru/pru.md (cstore<mode>4): New pattern.
13849 (cstoredi4): Ditto.
13851 2023-08-30 Richard Biener <rguenther@suse.de>
13853 PR tree-optimization/111228
13854 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
13855 New simplifications.
13857 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13859 * config/riscv/autovec.md (movmisalign<mode>): Delete.
13861 2023-08-30 Die Li <lidie@eswincomputing.com>
13862 Fei Gao <gaofei@eswincomputing.com>
13864 * config/riscv/peephole.md: New pattern.
13865 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
13866 (zcmp_mv_sreg_operand): New predicate.
13867 * config/riscv/riscv.md: New predicate.
13868 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
13869 (*mvsa01<X:mode>): New pattern.
13871 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
13873 * config/riscv/riscv.cc
13874 (riscv_zcmp_can_use_popretz): true if popretz can be used
13875 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
13876 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
13877 * config/riscv/riscv.md: define A0_REGNUM
13878 * config/riscv/zc.md
13879 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
13880 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
13881 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
13882 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
13883 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
13884 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
13885 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
13886 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
13887 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
13888 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
13889 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
13890 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
13892 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
13894 * config/riscv/iterators.md
13895 (slot0_offset): slot 0 offset in stack GPRs area in bytes
13896 (slot1_offset): slot 1 offset in stack GPRs area in bytes
13897 (slot2_offset): likewise
13898 (slot3_offset): likewise
13899 (slot4_offset): likewise
13900 (slot5_offset): likewise
13901 (slot6_offset): likewise
13902 (slot7_offset): likewise
13903 (slot8_offset): likewise
13904 (slot9_offset): likewise
13905 (slot10_offset): likewise
13906 (slot11_offset): likewise
13907 (slot12_offset): likewise
13908 * config/riscv/predicates.md
13909 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
13910 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
13911 (stack_push_up_to_s1_operand): likewise
13912 (stack_push_up_to_s2_operand): likewise
13913 (stack_push_up_to_s3_operand): likewise
13914 (stack_push_up_to_s4_operand): likewise
13915 (stack_push_up_to_s5_operand): likewise
13916 (stack_push_up_to_s6_operand): likewise
13917 (stack_push_up_to_s7_operand): likewise
13918 (stack_push_up_to_s8_operand): likewise
13919 (stack_push_up_to_s9_operand): likewise
13920 (stack_push_up_to_s11_operand): likewise
13921 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
13922 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
13923 (stack_pop_up_to_s1_operand): likewise
13924 (stack_pop_up_to_s2_operand): likewise
13925 (stack_pop_up_to_s3_operand): likewise
13926 (stack_pop_up_to_s4_operand): likewise
13927 (stack_pop_up_to_s5_operand): likewise
13928 (stack_pop_up_to_s6_operand): likewise
13929 (stack_pop_up_to_s7_operand): likewise
13930 (stack_pop_up_to_s8_operand): likewise
13931 (stack_pop_up_to_s9_operand): likewise
13932 (stack_pop_up_to_s11_operand): likewise
13933 * config/riscv/riscv-protos.h
13934 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
13935 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
13936 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
13937 (riscv_use_multi_push): true if multi push is used
13938 (riscv_multi_push_sregs_count): num of sregs in multi-push
13939 (riscv_multi_push_regs_count): num of regs in multi-push
13940 (riscv_16bytes_align): align to 16 bytes
13941 (riscv_stack_align): moved to a better place
13942 (riscv_save_libcall_count): no functional change
13943 (riscv_compute_frame_info): add zcmp frame info
13944 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
13945 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
13946 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
13947 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
13948 (riscv_expand_prologue): allocate stack by cm.push
13949 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
13950 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
13951 (zcmp_base_adj): calculate stack adjustment base size
13952 (zcmp_additional_adj): calculate stack adjustment additional size
13953 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
13954 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
13955 (S0_MASK): likewise
13956 (S1_MASK): likewise
13957 (S2_MASK): likewise
13958 (S3_MASK): likewise
13959 (S4_MASK): likewise
13960 (S5_MASK): likewise
13961 (S6_MASK): likewise
13962 (S7_MASK): likewise
13963 (S8_MASK): likewise
13964 (S9_MASK): likewise
13965 (S10_MASK): likewise
13966 (S11_MASK): likewise
13967 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
13968 (ZCMP_MAX_SPIMM): max spimm value
13969 (ZCMP_SP_INC_STEP): zcmp sp increment step
13970 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
13971 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
13972 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
13973 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
13974 * config/riscv/riscv.md: include zc.md
13975 * config/riscv/zc.md: New file. machine description for zcmp
13977 2023-08-30 Jakub Jelinek <jakub@redhat.com>
13979 PR tree-optimization/110914
13980 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
13981 adjust_last_stmt unless len is known constant.
13983 2023-08-30 Jakub Jelinek <jakub@redhat.com>
13985 PR tree-optimization/111015
13986 * gimple-ssa-store-merging.cc
13987 (imm_store_chain_info::output_merged_store): Use wi::mask and
13988 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
13989 build_int_cst to build BIT_AND_EXPR mask.
13991 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13993 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
13994 (call_may_clobber_ref_p_1): Ditto.
13995 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
13996 (get_alias_ptr_type_for_ptr_address): Ditto.
13998 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14000 * config/riscv/riscv-vsetvl.cc
14001 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
14003 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14005 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
14006 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
14009 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
14011 * config/riscv/zicond.md: New splitters to rewrite single bit
14012 sign extension as the condition to a czero in the desired form.
14014 2023-08-29 David Malcolm <dmalcolm@redhat.com>
14017 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
14019 2023-08-29 David Malcolm <dmalcolm@redhat.com>
14022 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
14024 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
14026 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
14027 zvfh can generate zfa extended instruction fli.h, just like zfh.
14029 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
14030 Vineet Gupta <vineetg@rivosinc.com>
14032 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
14033 __riscv_unaligned_avoid with value 1 or
14034 __riscv_unaligned_slow with value 1 or
14035 __riscv_unaligned_fast with value 1
14036 * config/riscv/riscv.cc (riscv_option_override): Define
14037 riscv_user_wants_strict_align. Set
14038 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
14039 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
14041 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
14043 * config/riscv/autovec-vls.md: Update types
14044 * config/riscv/riscv.md: Add vector placeholder type
14045 * config/riscv/vector.md: Update types
14047 2023-08-29 Carl Love <cel@us.ibm.com>
14049 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
14050 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
14051 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
14052 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
14053 New buit-in definitions.
14054 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
14055 overloaded definition.
14056 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
14058 2023-08-29 Pan Li <pan2.li@intel.com>
14059 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14061 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
14062 (riscv_legitimize_const_move): Handle ref plus const poly.
14064 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
14066 * common/config/riscv/riscv-common.cc
14067 (riscv_implied_info): Add implications from unprivileged extensions.
14068 (riscv_ext_version_table): Add stub support for all unprivileged
14069 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
14071 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
14073 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
14074 Add stub support for all vendor extensions supported by Binutils.
14076 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
14078 * common/config/riscv/riscv-common.cc
14079 (riscv_implied_info): Add implications from privileged extensions.
14080 (riscv_ext_version_table): Add stub support for all privileged
14081 extensions supported by Binutils.
14083 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
14085 * config/riscv/autovec.md: Adjust
14086 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
14087 (get_vlmax_rtx): Exported.
14088 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
14089 (emit_vlmax_masked_gather_mu_insn): Adjust.
14090 (get_vlmax_rtx): New func.
14091 (expand_load_store): Adjust.
14092 (expand_cond_len_unop): Call expand_cond_len_op.
14093 (expand_cond_len_op): New subroutine.
14094 (expand_cond_len_binop): Call expand_cond_len_op.
14095 (expand_cond_len_ternop): Call expand_cond_len_op.
14096 (expand_lanes_load_store): Adjust.
14098 2023-08-29 Jakub Jelinek <jakub@redhat.com>
14100 PR middle-end/79173
14101 PR middle-end/111209
14102 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
14103 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
14104 carry-out on higher limb. Don't match it though if it could be
14105 matched later on 4 argument addition/subtraction.
14107 2023-08-29 Andrew Pinski <apinski@marvell.com>
14109 PR tree-optimization/111147
14110 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
14111 instead of matching bit_not.
14113 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
14115 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
14118 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14120 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
14121 (pass_vsetvl::compute_local_properties): Fix bug.
14122 (pass_vsetvl::commit_vsetvls): Ditto.
14123 * config/riscv/riscv-vsetvl.h: New function.
14125 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
14128 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
14130 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
14131 force_reg mem target operand.
14132 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
14133 (*pred_mov<mode>): Remove imm -> reg pattern.
14134 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
14136 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
14138 * common/config/loongarch/loongarch-common.cc:
14139 Enable '-free' on O2 and above.
14140 * doc/invoke.texi: Modify the description information
14141 of the '-free' compilation option and add the LoongArch
14144 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
14146 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
14148 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
14150 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
14151 Implement the 'Zihintpause' extension, version 2.0.
14152 (riscv_ext_flag_table) Add 'Zihintpause' handling.
14153 * config/riscv/riscv-builtins.cc: Remove availability predicate
14154 "always" and add "hint_pause".
14155 (riscv_builtins) : Add "pause" extension.
14156 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
14157 * config/riscv/riscv.md (riscv_pause): Adjust output based on
14158 TARGET_ZIHINTPAUSE.
14160 2023-08-28 Andrew Pinski <apinski@marvell.com>
14162 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
14163 instead of specifically checking for ~X.
14165 2023-08-28 Andrew Pinski <apinski@marvell.com>
14167 PR tree-optimization/111146
14168 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
14171 2023-08-28 Andrew Pinski <apinski@marvell.com>
14173 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
14174 when resimplify returns true.
14175 (match_simplify_replacement): Print only if accepted the match-and-simplify
14176 result rather than the full sequence.
14178 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14180 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
14182 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
14184 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14186 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
14188 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14190 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
14191 (vmulltq_poly): New.
14192 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
14193 (vmulltq_poly): New.
14194 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
14195 (vmulltq_poly): New.
14196 * config/arm/arm_mve.h (vmulltq_poly): Remove.
14197 (vmullbq_poly): Remove.
14198 (vmullbq_poly_m): Remove.
14199 (vmulltq_poly_m): Remove.
14200 (vmullbq_poly_x): Remove.
14201 (vmulltq_poly_x): Remove.
14202 (vmulltq_poly_p8): Remove.
14203 (vmullbq_poly_p8): Remove.
14204 (vmulltq_poly_p16): Remove.
14205 (vmullbq_poly_p16): Remove.
14206 (vmullbq_poly_m_p8): Remove.
14207 (vmullbq_poly_m_p16): Remove.
14208 (vmulltq_poly_m_p8): Remove.
14209 (vmulltq_poly_m_p16): Remove.
14210 (vmullbq_poly_x_p8): Remove.
14211 (vmullbq_poly_x_p16): Remove.
14212 (vmulltq_poly_x_p8): Remove.
14213 (vmulltq_poly_x_p16): Remove.
14214 (__arm_vmulltq_poly_p8): Remove.
14215 (__arm_vmullbq_poly_p8): Remove.
14216 (__arm_vmulltq_poly_p16): Remove.
14217 (__arm_vmullbq_poly_p16): Remove.
14218 (__arm_vmullbq_poly_m_p8): Remove.
14219 (__arm_vmullbq_poly_m_p16): Remove.
14220 (__arm_vmulltq_poly_m_p8): Remove.
14221 (__arm_vmulltq_poly_m_p16): Remove.
14222 (__arm_vmullbq_poly_x_p8): Remove.
14223 (__arm_vmullbq_poly_x_p16): Remove.
14224 (__arm_vmulltq_poly_x_p8): Remove.
14225 (__arm_vmulltq_poly_x_p16): Remove.
14226 (__arm_vmulltq_poly): Remove.
14227 (__arm_vmullbq_poly): Remove.
14228 (__arm_vmullbq_poly_m): Remove.
14229 (__arm_vmulltq_poly_m): Remove.
14230 (__arm_vmullbq_poly_x): Remove.
14231 (__arm_vmulltq_poly_x): Remove.
14233 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14235 * config/arm/arm-mve-builtins-functions.h (class
14236 unspec_mve_function_exact_insn_vmull_poly): New.
14238 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14240 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
14241 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
14243 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14245 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
14246 support for 'U' and 'p' format specifiers.
14248 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14250 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
14252 (TYPES_poly_8_16): New.
14254 * config/arm/arm-mve-builtins.def (p8): New type suffix.
14256 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
14258 (struct type_suffix_info): Add poly_p field.
14260 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14262 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
14264 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
14266 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
14268 * config/arm/arm_mve.h (vmulltq_int): Remove.
14269 (vmullbq_int): Remove.
14270 (vmullbq_int_m): Remove.
14271 (vmulltq_int_m): Remove.
14272 (vmullbq_int_x): Remove.
14273 (vmulltq_int_x): Remove.
14274 (vmulltq_int_u8): Remove.
14275 (vmullbq_int_u8): Remove.
14276 (vmulltq_int_s8): Remove.
14277 (vmullbq_int_s8): Remove.
14278 (vmulltq_int_u16): Remove.
14279 (vmullbq_int_u16): Remove.
14280 (vmulltq_int_s16): Remove.
14281 (vmullbq_int_s16): Remove.
14282 (vmulltq_int_u32): Remove.
14283 (vmullbq_int_u32): Remove.
14284 (vmulltq_int_s32): Remove.
14285 (vmullbq_int_s32): Remove.
14286 (vmullbq_int_m_s8): Remove.
14287 (vmullbq_int_m_s32): Remove.
14288 (vmullbq_int_m_s16): Remove.
14289 (vmullbq_int_m_u8): Remove.
14290 (vmullbq_int_m_u32): Remove.
14291 (vmullbq_int_m_u16): Remove.
14292 (vmulltq_int_m_s8): Remove.
14293 (vmulltq_int_m_s32): Remove.
14294 (vmulltq_int_m_s16): Remove.
14295 (vmulltq_int_m_u8): Remove.
14296 (vmulltq_int_m_u32): Remove.
14297 (vmulltq_int_m_u16): Remove.
14298 (vmullbq_int_x_s8): Remove.
14299 (vmullbq_int_x_s16): Remove.
14300 (vmullbq_int_x_s32): Remove.
14301 (vmullbq_int_x_u8): Remove.
14302 (vmullbq_int_x_u16): Remove.
14303 (vmullbq_int_x_u32): Remove.
14304 (vmulltq_int_x_s8): Remove.
14305 (vmulltq_int_x_s16): Remove.
14306 (vmulltq_int_x_s32): Remove.
14307 (vmulltq_int_x_u8): Remove.
14308 (vmulltq_int_x_u16): Remove.
14309 (vmulltq_int_x_u32): Remove.
14310 (__arm_vmulltq_int_u8): Remove.
14311 (__arm_vmullbq_int_u8): Remove.
14312 (__arm_vmulltq_int_s8): Remove.
14313 (__arm_vmullbq_int_s8): Remove.
14314 (__arm_vmulltq_int_u16): Remove.
14315 (__arm_vmullbq_int_u16): Remove.
14316 (__arm_vmulltq_int_s16): Remove.
14317 (__arm_vmullbq_int_s16): Remove.
14318 (__arm_vmulltq_int_u32): Remove.
14319 (__arm_vmullbq_int_u32): Remove.
14320 (__arm_vmulltq_int_s32): Remove.
14321 (__arm_vmullbq_int_s32): Remove.
14322 (__arm_vmullbq_int_m_s8): Remove.
14323 (__arm_vmullbq_int_m_s32): Remove.
14324 (__arm_vmullbq_int_m_s16): Remove.
14325 (__arm_vmullbq_int_m_u8): Remove.
14326 (__arm_vmullbq_int_m_u32): Remove.
14327 (__arm_vmullbq_int_m_u16): Remove.
14328 (__arm_vmulltq_int_m_s8): Remove.
14329 (__arm_vmulltq_int_m_s32): Remove.
14330 (__arm_vmulltq_int_m_s16): Remove.
14331 (__arm_vmulltq_int_m_u8): Remove.
14332 (__arm_vmulltq_int_m_u32): Remove.
14333 (__arm_vmulltq_int_m_u16): Remove.
14334 (__arm_vmullbq_int_x_s8): Remove.
14335 (__arm_vmullbq_int_x_s16): Remove.
14336 (__arm_vmullbq_int_x_s32): Remove.
14337 (__arm_vmullbq_int_x_u8): Remove.
14338 (__arm_vmullbq_int_x_u16): Remove.
14339 (__arm_vmullbq_int_x_u32): Remove.
14340 (__arm_vmulltq_int_x_s8): Remove.
14341 (__arm_vmulltq_int_x_s16): Remove.
14342 (__arm_vmulltq_int_x_s32): Remove.
14343 (__arm_vmulltq_int_x_u8): Remove.
14344 (__arm_vmulltq_int_x_u16): Remove.
14345 (__arm_vmulltq_int_x_u32): Remove.
14346 (__arm_vmulltq_int): Remove.
14347 (__arm_vmullbq_int): Remove.
14348 (__arm_vmullbq_int_m): Remove.
14349 (__arm_vmulltq_int_m): Remove.
14350 (__arm_vmullbq_int_x): Remove.
14351 (__arm_vmulltq_int_x): Remove.
14353 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14355 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
14356 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
14358 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14360 * config/arm/arm-mve-builtins-functions.h (class
14361 unspec_mve_function_exact_insn_vmull): New.
14363 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14365 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
14366 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
14368 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
14370 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
14371 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
14372 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
14373 (mve_vmulltq_int_<supf><mode>): Merge into ...
14374 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
14375 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
14376 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
14377 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
14378 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
14379 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
14380 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
14382 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14384 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
14387 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
14389 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
14390 (binary_acca_int64): Likewise.
14392 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
14394 * range-op-float.cc (fold_range): Handle relations.
14396 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
14398 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
14399 Optimize the function implementation.
14401 2023-08-28 liuhongt <hongtao.liu@intel.com>
14404 * config/i386/sse.md (V48_AVX2): Rename to ..
14405 (V48_128_256): .. this.
14406 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
14407 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
14408 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
14409 integral modes when TARGET_AVX2 is not available.
14410 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
14411 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
14413 (maskstore<mode><sseintvecmodelower>): Ditto.
14415 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14417 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
14419 (after_or_same_p): Ditto.
14420 (find_reg_killed_by): Delete.
14421 (has_vsetvl_killed_avl_p): Ditto.
14422 (anticipatable_occurrence_p): Refactor.
14423 (any_set_in_bb_p): Delete.
14424 (count_regno_occurrences): Ditto.
14425 (backward_propagate_worthwhile_p): Ditto.
14426 (demands_can_be_fused_p): Ditto.
14427 (earliest_pred_can_be_fused_p): New function.
14428 (vsetvl_dominated_by_p): Ditto.
14429 (vector_insn_info::parse_insn): Refactor.
14430 (vector_insn_info::merge): Refactor.
14431 (vector_insn_info::dump): Refactor.
14432 (vector_infos_manager::vector_infos_manager): Refactor.
14433 (vector_infos_manager::all_empty_predecessor_p): Delete.
14434 (vector_infos_manager::all_same_avl_p): Ditto.
14435 (vector_infos_manager::create_bitmap_vectors): Refactor.
14436 (vector_infos_manager::free_bitmap_vectors): Refactor.
14437 (vector_infos_manager::dump): Refactor.
14438 (pass_vsetvl::update_block_info): New function.
14439 (enum fusion_type): Ditto.
14440 (pass_vsetvl::get_backward_fusion_type): Delete.
14441 (pass_vsetvl::hard_empty_block_p): Ditto.
14442 (pass_vsetvl::backward_demand_fusion): Ditto.
14443 (pass_vsetvl::forward_demand_fusion): Ditto.
14444 (pass_vsetvl::demand_fusion): Ditto.
14445 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
14446 (pass_vsetvl::compute_local_properties): Ditto.
14447 (pass_vsetvl::earliest_fusion): New function.
14448 (pass_vsetvl::vsetvl_fusion): Ditto.
14449 (pass_vsetvl::commit_vsetvls): Refactor.
14450 (get_first_vsetvl_before_rvv_insns): Ditto.
14451 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
14452 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
14453 (pass_vsetvl::df_post_optimization): Refactor.
14454 (pass_vsetvl::lazy_vsetvl): Ditto.
14455 * config/riscv/riscv-vsetvl.h: Ditto.
14457 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14459 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
14460 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14461 (expand_fold_extract_last): New function.
14462 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
14463 (emit_cpop_insn): Ditto.
14464 (emit_nonvlmax_compress_insn): Ditto.
14465 (expand_fold_extract_last): Ditto.
14466 * config/riscv/vector.md: Fix vcpop.m ratio demand.
14468 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
14470 * config/riscv/sync-rvwmo.md: updated types to "multi" or
14471 "atomic" based on number of assembly lines generated
14472 * config/riscv/sync-ztso.md: likewise
14473 * config/riscv/sync.md: likewise
14475 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
14477 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
14479 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
14480 instructions FLI.H/S/D can load.
14481 * config/riscv/iterators.md (ceil): New.
14482 * config/riscv/riscv-opts.h (MASK_ZFA): New.
14484 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
14485 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
14486 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
14488 (riscv_const_insns): Likewise.
14489 (riscv_legitimize_const_move): Likewise.
14490 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
14492 (riscv_split_doubleword_move): Likewise.
14493 (riscv_output_move): Output the mov instructions in zfa extension.
14494 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
14496 (riscv_secondary_memory_needed): Likewise.
14497 * config/riscv/riscv.md (fminm<mode>3): New.
14498 (fmaxm<mode>3): New.
14499 (movsidf2_low_rv32): New.
14500 (movsidf2_high_rv32): New.
14501 (movdfsisi3_rv32): New.
14502 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
14503 * config/riscv/riscv.opt: New.
14505 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
14508 * omp-general.cc (omp_runtime_api_procname): New.
14509 (omp_runtime_api_call): Moved here from omp-low.cc, and make
14511 * omp-general.h: Include omp-api.h.
14512 * omp-low.cc (omp_runtime_api_call): Delete this copy.
14514 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
14516 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
14517 * doc/gimple.texi (GIMPLE instruction set): Add
14518 GIMPLE_OMP_STRUCTURED_BLOCK.
14519 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
14520 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
14521 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
14522 GIMPLE_OMP_STRUCTURED_BLOCK.
14523 (pp_gimple_stmt_1): Likewise.
14524 * gimple-walk.cc (walk_gimple_stmt): Likewise.
14525 * gimple.cc (gimple_build_omp_structured_block): New.
14526 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
14527 * gimple.h (gimple_build_omp_structured_block): Declare.
14528 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
14529 (CASE_GIMPLE_OMP): Likewise.
14530 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
14531 (gimplify_expr): Likewise.
14532 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
14533 GIMPLE_OMP_STRUCTURED_BLOCK.
14534 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
14535 (lower_omp_1): Likewise.
14536 (diagnose_sb_1): Likewise.
14537 (diagnose_sb_2): Likewise.
14538 * tree-inline.cc (remap_gimple_stmt): Handle
14539 GIMPLE_OMP_STRUCTURED_BLOCK.
14540 (estimate_num_insns): Likewise.
14541 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
14542 (convert_local_reference_stmt): Likewise.
14543 (convert_gimple_call): Likewise.
14544 * tree-pretty-print.cc (dump_generic_node): Handle
14545 OMP_STRUCTURED_BLOCK.
14546 * tree.def (OMP_STRUCTURED_BLOCK): New.
14547 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
14549 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
14551 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
14552 cost. Add some comments about different constants handling.
14554 2023-08-25 Andrew Pinski <apinski@marvell.com>
14556 * match.pd (`a ? one_zero : one_zero`): Move
14557 below detection of minmax.
14559 2023-08-25 Andrew Pinski <apinski@marvell.com>
14561 * match.pd (`a | C -> C`): New pattern.
14563 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
14565 * caller-save.cc (new_saved_hard_reg):
14566 Rename TRUE/FALSE to true/false.
14567 (setup_save_areas): Ditto.
14568 * gcc.cc (set_collect_gcc_options): Ditto.
14569 (driver::build_multilib_strings): Ditto.
14570 (print_multilib_info): Ditto.
14571 * genautomata.cc (gen_cpu_unit): Ditto.
14572 (gen_query_cpu_unit): Ditto.
14573 (gen_bypass): Ditto.
14574 (gen_excl_set): Ditto.
14575 (gen_presence_absence_set): Ditto.
14576 (gen_presence_set): Ditto.
14577 (gen_final_presence_set): Ditto.
14578 (gen_absence_set): Ditto.
14579 (gen_final_absence_set): Ditto.
14580 (gen_automaton): Ditto.
14581 (gen_regexp_repeat): Ditto.
14582 (gen_regexp_allof): Ditto.
14583 (gen_regexp_oneof): Ditto.
14584 (gen_regexp_sequence): Ditto.
14585 (process_decls): Ditto.
14586 (reserv_sets_are_intersected): Ditto.
14587 (initiate_excl_sets): Ditto.
14588 (form_reserv_sets_list): Ditto.
14589 (check_presence_pattern_sets): Ditto.
14590 (check_absence_pattern_sets): Ditto.
14591 (check_regexp_units_distribution): Ditto.
14592 (check_unit_distributions_to_automata): Ditto.
14593 (create_ainsns): Ditto.
14594 (output_insn_code_cases): Ditto.
14595 (output_internal_dead_lock_func): Ditto.
14596 (form_important_insn_automata_lists): Ditto.
14597 * gengtype-state.cc (read_state_files_list): Ditto.
14598 * gengtype.cc (main): Ditto.
14599 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
14601 * gimple.cc (gimple_build_call_from_tree): Ditto.
14602 (preprocess_case_label_vec_for_gimple): Ditto.
14603 * gimplify.cc (gimplify_call_expr): Ditto.
14604 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
14606 2023-08-25 Richard Biener <rguenther@suse.de>
14608 PR tree-optimization/111137
14609 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
14610 Properly handle grouped stores from other SLP instances.
14612 2023-08-25 Richard Biener <rguenther@suse.de>
14614 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
14615 Split out from vect_slp_analyze_node_dependences, remove
14617 (vect_slp_analyze_load_dependences): Split out from
14618 vect_slp_analyze_node_dependences, adjust comments. Process
14619 queued stores before any disambiguation.
14620 (vect_slp_analyze_node_dependences): Remove.
14621 (vect_slp_analyze_instance_dependence): Adjust.
14623 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
14625 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
14627 (operator_not_equal::fold_range): Adjust for relations.
14628 (operator_lt::fold_range): Same.
14629 (operator_gt::fold_range): Same.
14630 (foperator_unordered_equal::fold_range): Same.
14631 (foperator_unordered_lt::fold_range): Same.
14632 (foperator_unordered_le::fold_range): Same.
14633 (foperator_unordered_gt::fold_range): Same.
14634 (foperator_unordered_ge::fold_range): Same.
14636 2023-08-25 Richard Biener <rguenther@suse.de>
14638 PR tree-optimization/111136
14639 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
14640 stores force STMT_VINFO_STRIDED_P and also duplicate that
14643 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14645 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
14646 Add early continue.
14648 2023-08-25 liuhongt <hongtao.liu@intel.com>
14650 * config/i386/sse.md (vec_set<mode>): Removed.
14651 (V_128H): Merge into ..
14653 (V_256H): Merge into ..
14655 (V_512): Add V32HF, V32BF.
14656 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
14658 (vcond<mode><sseintvecmodelower>): Removed
14659 (vcondu<mode><sseintvecmodelower>): Removed.
14660 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
14662 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
14665 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
14666 Adjust paramter order.
14668 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
14671 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
14673 2023-08-24 David Malcolm <dmalcolm@redhat.com>
14676 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
14677 list of functions known to the analyzer.
14679 2023-08-24 Richard Biener <rguenther@suse.de>
14681 PR tree-optimization/111123
14682 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
14683 remove indirect clobbers here ...
14684 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
14685 (remove_indirect_clobbers): New function.
14687 2023-08-24 Jan Hubicka <jh@suse.cz>
14689 * cfg.h (struct control_flow_graph): New field full_profile.
14690 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
14691 * cfg.cc (init_flow): Set full_profile to false.
14692 * graphite.cc (graphite_transform_loops): Set full_profile to false.
14693 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
14694 * predict.cc (pass_profile::execute): Set full_profile to true.
14695 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
14696 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
14697 if full_profile is set.
14698 * tree-inline.cc (initialize_cfun): Initialize full_profile.
14699 (expand_call_inline): Combine full_profile.
14701 2023-08-24 Richard Biener <rguenther@suse.de>
14703 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
14704 load_p to ldst_p, fix mistakes and rely on
14705 STMT_VINFO_DATA_REF.
14707 2023-08-24 Jan Hubicka <jh@suse.cz>
14709 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
14710 of newly build trap bb.
14712 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14714 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
14715 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
14716 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
14718 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
14720 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
14721 * config/riscv/riscv.cc (riscv_option_override): Set sched
14722 pressure algorithm.
14724 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
14726 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
14728 2023-08-24 Richard Biener <rguenther@suse.de>
14730 PR tree-optimization/111125
14731 * tree-vect-slp.cc (vect_slp_function): Split at novector
14732 loop entry, do not push blocks in novector loops.
14734 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
14736 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
14738 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14740 * genmatch.cc (decision_tree::gen): Support
14741 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
14742 * gimple-match-exports.cc (gimple_simplify): Ditto.
14743 (gimple_resimplify6): New function.
14744 (gimple_resimplify7): New function.
14745 (gimple_match_op::resimplify): Support
14746 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
14747 (convert_conditional_op): Ditto.
14748 (build_call_internal): Ditto.
14749 (try_conditional_simplification): Ditto.
14750 (gimple_extract): Ditto.
14751 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
14752 * internal-fn.cc (CASE): Ditto.
14754 2023-08-24 Richard Biener <rguenther@suse.de>
14756 PR tree-optimization/111115
14757 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
14758 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
14760 * tree-vect-slp.cc (arg3_arg2_map): New.
14761 (vect_get_operand_map): Handle IFN_MASK_STORE.
14762 (vect_slp_child_index_for_operand): New function.
14763 (vect_build_slp_tree_1): Handle statements with no LHS,
14765 (vect_remove_slp_scalar_calls): Likewise.
14766 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
14767 SLP child corresponding to the ifn value index.
14768 (vectorizable_store): Likewise for the mask index. Support
14770 (vectorizable_load): Lookup the SLP child corresponding to the
14773 2023-08-24 Richard Biener <rguenther@suse.de>
14775 PR tree-optimization/111125
14776 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
14777 for the remain_defs processing.
14779 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
14781 * config/aarch64/aarch64.cc: Include ssa.h.
14782 (aarch64_multiply_add_p): Require the second operand of an
14783 Advanced SIMD subtraction to be a multiplication. Assume that
14784 such an operation won't be fused if the second operand is used
14785 multiple times and if the first operand is also a multiplication.
14787 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14789 * tree-vect-loop.cc (vectorizable_reduction): Apply
14790 LEN_FOLD_EXTRACT_LAST.
14791 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
14793 2023-08-24 Richard Biener <rguenther@suse.de>
14795 PR tree-optimization/111128
14796 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
14797 Emit external shift operand inline if we promoted it with
14798 another pattern stmt.
14800 2023-08-24 Pan Li <pan2.li@intel.com>
14802 * config/riscv/autovec.md: Fix typo.
14804 2023-08-24 Pan Li <pan2.li@intel.com>
14806 * config/riscv/riscv-vector-builtins-bases.cc
14807 (class binop_frm): Removed.
14808 (class reverse_binop_frm): Ditto.
14809 (class widen_binop_frm): Ditto.
14810 (class vfmacc_frm): Ditto.
14811 (class vfnmacc_frm): Ditto.
14812 (class vfmsac_frm): Ditto.
14813 (class vfnmsac_frm): Ditto.
14814 (class vfmadd_frm): Ditto.
14815 (class vfnmadd_frm): Ditto.
14816 (class vfmsub_frm): Ditto.
14817 (class vfnmsub_frm): Ditto.
14818 (class vfwmacc_frm): Ditto.
14819 (class vfwnmacc_frm): Ditto.
14820 (class vfwmsac_frm): Ditto.
14821 (class vfwnmsac_frm): Ditto.
14822 (class unop_frm): Ditto.
14823 (class vfrec7_frm): Ditto.
14824 (class binop): Add frm_op_type template arg.
14825 (class unop): Ditto.
14826 (class widen_binop): Ditto.
14827 (class widen_binop_fp): Ditto.
14828 (class reverse_binop): Ditto.
14829 (class vfmacc): Ditto.
14830 (class vfnmsac): Ditto.
14831 (class vfmadd): Ditto.
14832 (class vfnmsub): Ditto.
14833 (class vfnmacc): Ditto.
14834 (class vfmsac): Ditto.
14835 (class vfnmadd): Ditto.
14836 (class vfmsub): Ditto.
14837 (class vfwmacc): Ditto.
14838 (class vfwnmacc): Ditto.
14839 (class vfwmsac): Ditto.
14840 (class vfwnmsac): Ditto.
14841 (class float_misc): Ditto.
14843 2023-08-24 Andrew Pinski <apinski@marvell.com>
14845 PR tree-optimization/111109
14846 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
14847 Add check to make sure cmp and icmp are inverse.
14849 2023-08-24 Andrew Pinski <apinski@marvell.com>
14851 PR tree-optimization/95929
14852 * match.pd (convert?(-a)): New pattern
14853 for 1bit integer types.
14855 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
14858 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14860 * common/config/i386/cpuinfo.h (get_available_features):
14861 Add avx10_set and version and detect avx10.1.
14862 (cpu_indicator_init): Handle avx10.1-512.
14863 * common/config/i386/i386-common.cc
14864 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
14865 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
14866 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
14867 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
14868 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
14869 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
14871 * common/config/i386/i386-cpuinfo.h (enum processor_features):
14872 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
14873 FEATURE_AVX10_512BIT.
14874 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
14875 AVX10_512BIT, AVX10_1 and AVX10_1_512.
14876 * config/i386/constraints.md (Yk): Add AVX10_1.
14879 * config/i386/cpuid.h (bit_AVX10): New.
14880 (bit_AVX10_256): Ditto.
14881 (bit_AVX10_512): Ditto.
14882 * config/i386/i386-c.cc (ix86_target_macros_internal):
14883 Define AVX10_512BIT and AVX10_1.
14884 * config/i386/i386-isa.def
14885 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
14886 (AVX10_1): Add DEF_PTA(AVX10_1).
14887 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
14888 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
14890 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
14891 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
14892 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
14893 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
14894 (ix86_conditional_register_usage): Ditto.
14895 (ix86_hard_regno_mode_ok): Ditto.
14896 (ix86_rtx_costs): Ditto.
14897 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
14898 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
14900 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
14901 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
14902 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
14905 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
14908 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14910 * common/config/i386/i386-common.cc
14911 (ix86_check_avx10): New function to check isa_flags and
14912 isa_flags_explicit to emit warning when AVX10 is enabled
14914 (ix86_check_avx512): New function to check isa_flags and
14915 isa_flags_explicit to emit warning when AVX512 is enabled
14917 (ix86_handle_option): Do not change the flags when warning
14919 * config/i386/driver-i386.cc (host_detect_local_cpu):
14920 Do not append -mno-avx10.1 for -march=native.
14922 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
14925 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14927 * common/config/i386/i386-common.cc
14928 (ix86_check_avx10_vector_width): New function to check isa_flags
14929 to emit a warning when there is a conflict in AVX10 options for
14931 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
14932 * config/i386/driver-i386.cc (host_detect_local_cpu):
14933 Do not append -mno-avx10-max-512bit for -march=native.
14935 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
14938 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14940 * config/i386/avx512vldqintrin.h: Remove target attribute.
14941 * config/i386/i386-builtin.def (BDESC):
14942 Add OPTION_MASK_ISA2_AVX10_1.
14943 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
14944 * config/i386/i386-expand.cc
14945 (ix86_check_builtin_isa_match): Ditto.
14946 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
14947 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
14948 and avx10_1_or_avx512vl.
14949 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
14950 (VF1_128_256VLDQ_AVX10_1): Ditto.
14951 (VI8_AVX512VLDQ_AVX10_1): Ditto.
14952 (<sse>_andnot<mode>3<mask_name>):
14953 Add TARGET_AVX10_1 and change isa attr from avx512dq to
14954 avx10_1_or_avx512dq.
14955 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
14956 avx512vl to avx10_1_or_avx512vl.
14957 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
14958 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
14959 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
14961 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
14963 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
14964 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
14965 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
14966 Add TARGET_AVX10_1.
14967 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
14968 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
14969 Remove target check.
14970 (avx512dq_mul<mode>3<mask_name>): Ditto.
14971 (*avx512dq_mul<mode>3<mask_name>): Ditto.
14972 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
14973 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
14974 Remove target check.
14975 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
14976 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
14977 Remove target check.
14978 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
14979 (mask_avx512vl_condition): Ditto.
14982 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
14985 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
14987 * config/i386/avx512vldqintrin.h: Remove target attribute.
14988 * config/i386/i386-builtin.def (BDESC):
14989 Add OPTION_MASK_ISA2_AVX10_1.
14990 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
14991 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
14992 (VI48_AVX512VLDQ_AVX10_1): Ditto.
14993 (VF2_AVX512VL): Remove.
14994 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
14995 Add TARGET_AVX10_1.
14996 (*<code><mode>3<mask_name>): Change isa attribute to
14997 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
14998 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
14999 to avx10_1_or_avx512vl.
15000 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
15001 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
15002 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
15003 Add TARGET_AVX10_1.
15004 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
15005 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
15006 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
15007 Add TARGET_AVX10_1.
15008 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
15009 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
15010 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
15011 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
15012 (float<floatunssuffix>v4div4sf2<mask_name>):
15013 Add TARGET_AVX10_1.
15014 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
15015 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
15016 (float<floatunssuffix>v2div2sf2): Ditto.
15017 (float<floatunssuffix>v2div2sf2_mask): Ditto.
15018 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
15019 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
15020 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
15021 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
15022 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
15023 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
15024 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
15025 Change when constraint is enabled.
15027 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15030 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15032 * config/i386/avx512vldqintrin.h: Remove target attribute.
15033 * config/i386/i386-builtin.def (BDESC):
15034 Add OPTION_MASK_ISA2_AVX10_1.
15035 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
15036 (VFH_AVX512VLDQ_AVX10_1): Ditto.
15037 (VF1_AVX512VLDQ_AVX10_1): Ditto.
15038 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
15039 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
15040 (vec_pack<floatprefix>_float_<mode>): Change iterator to
15041 VI8_AVX512VLDQ_AVX10_1. Remove target check.
15042 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
15043 VF1_AVX512VLDQ_AVX10_1. Remove target check.
15044 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
15045 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
15046 (avx512vl_vextractf128<mode>): Change iterator to
15047 VI48F_256_DQVL_AVX10_1. Remove target check.
15048 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
15049 (vec_extract_hi_<mode>): Ditto.
15050 (avx512vl_vinsert<mode>): Ditto.
15051 (vec_set_lo_<mode><mask_name>): Ditto.
15052 (vec_set_hi_<mode><mask_name>): Ditto.
15053 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
15054 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
15055 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
15056 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
15057 * config/i386/subst.md (mask_avx512dq_condition): Add
15059 (mask_scalar_merge): Ditto.
15061 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
15064 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
15067 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
15070 2023-08-24 Richard Biener <rguenther@suse.de>
15073 * dwarf2out.cc (prune_unused_types_walk): Handle
15074 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
15075 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
15076 and DW_TAG_dynamic_type as to only output them when referenced.
15078 2023-08-24 liuhongt <hongtao.liu@intel.com>
15080 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
15083 2023-08-24 liuhongt <hongtao.liu@intel.com>
15085 * common/config/i386/i386-common.cc (processor_names): Add new
15086 member graniterapids-s and arrowlake-s.
15087 * config/i386/i386-options.cc (processor_alias_table): Update
15088 table with PROCESSOR_ARROWLAKE_S and
15089 PROCESSOR_GRANITERAPIDS_D.
15090 (m_GRANITERAPID_D): New macro.
15091 (m_ARROWLAKE_S): Ditto.
15092 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
15093 (processor_cost_table): Add icelake_cost for
15094 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
15095 PROCESSOR_ARROWLAKE_S.
15096 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
15098 * config/i386/i386.h (enum processor_type): Add new member
15099 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
15100 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
15101 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
15103 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
15105 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
15106 to help simplify code further.
15108 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
15110 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
15111 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
15112 Initialize using a range instead of value and edge.
15113 (phi_group::calculate_using_modifier): Use initializer value and
15114 process for relations after trying for iteration convergence.
15115 (phi_group::refine_using_relation): Use initializer range.
15116 (phi_group::dump): Rework the dump output.
15117 (phi_analyzer::process_phi): Allow multiple constant initilizers.
15118 Dump groups immediately as created.
15119 (phi_analyzer::dump): Tweak output.
15120 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
15121 (phi_group::initial_value): Delete.
15122 (phi_group::refine_using_relation): Adjust prototype.
15123 (phi_group::m_initial_value): Delete.
15124 (phi_group::m_initial_edge): Delete.
15125 (phi_group::m_vr): Use int_range_max.
15126 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
15128 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
15130 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
15131 no group was created.
15132 (phi_analyzer::process_phi): Do not create groups of one phi node.
15134 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
15136 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
15137 CODE, CMP_CODE and BIT_CODE arguments.
15138 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
15139 (aarch64_gen_ccmp_next): Likewise.
15140 * doc/tm.texi: Regenerated.
15142 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
15144 * coretypes.h (rtx_code): Add forward declaration.
15145 * rtl.h (rtx_code): Make compatible with forward declaration.
15147 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
15150 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
15151 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
15152 DWIH mode iterator. Disable (=&r,m,m) alternative for
15154 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
15155 alternative for 32-bit targets.
15157 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
15159 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
15160 appropriate type attribute.
15162 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
15164 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
15165 (*copysign<mode>_neg): Ditto.
15166 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
15167 (<optab><mode>2): Ditto.
15168 (cond_<optab><mode>): New.
15169 (cond_len_<optab><mode>): Ditto.
15170 * config/riscv/riscv-protos.h (enum insn_type): New.
15171 (expand_cond_len_unop): New helper func.
15172 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
15173 (expand_cond_len_unop): New helper func.
15175 2023-08-23 Jan Hubicka <jh@suse.cz>
15177 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
15178 (should_duplicate_loop_header_p): Fix return value for static exits.
15179 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
15181 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
15183 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
15184 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
15185 and update the final nest accordingly.
15187 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
15189 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
15190 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
15191 and update the final nest accordingly.
15193 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
15195 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
15196 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
15197 gvec_oprnds with auto_delete_vec.
15199 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15201 * config/riscv/riscv-vsetvl.cc
15202 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
15204 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15206 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
15208 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
15210 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15212 * config/riscv/vector.md: Add attribute.
15214 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15216 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
15217 (vector_infos_manager::all_same_ratio_p): Ditto.
15218 (vector_infos_manager::all_same_avl_p): Ditto.
15219 (pass_vsetvl::refine_vsetvls): Ditto.
15220 (pass_vsetvl::cleanup_vsetvls): Ditto.
15221 (pass_vsetvl::commit_vsetvls): Ditto.
15222 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
15223 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
15224 (pass_vsetvl::compute_probabilities): Ditto.
15226 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15228 * config/riscv/t-riscv: Add riscv-vsetvl.def
15230 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
15232 * config/riscv/riscv.opt: Add --param names
15233 riscv-autovec-preference and riscv-autovec-lmul
15235 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
15237 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
15239 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
15241 * tree-core.h (enum omp_clause_defaultmap_kind): Add
15242 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
15243 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
15244 * tree-pretty-print.cc (dump_omp_clause): Likewise.
15246 2023-08-22 Jakub Jelinek <jakub@redhat.com>
15249 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
15250 types aren't supported in C++.
15252 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15254 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
15255 * internal-fn.cc (fold_len_extract_direct): Ditto.
15256 (expand_fold_len_extract_optab_fn): Ditto.
15257 (direct_fold_len_extract_optab_supported_p): Ditto.
15258 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
15259 * optabs.def (OPTAB_D): Ditto.
15261 2023-08-22 Richard Biener <rguenther@suse.de>
15263 * tree-vect-stmts.cc (vectorizable_store): Do not bump
15264 DR_GROUP_STORE_COUNT here. Remove early out.
15265 (vect_transform_stmt): Only call vectorizable_store on
15266 the last element of an interleaving chain.
15268 2023-08-22 Richard Biener <rguenther@suse.de>
15270 PR tree-optimization/94864
15271 PR tree-optimization/94865
15272 PR tree-optimization/93080
15273 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
15274 for vector insertion from vector extraction.
15276 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15277 Kewen.Lin <linkw@linux.ibm.com>
15279 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
15280 (vectorizable_live_operation): Add live vectorization for length loop
15283 2023-08-22 David Malcolm <dmalcolm@redhat.com>
15286 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
15288 2023-08-22 Pan Li <pan2.li@intel.com>
15290 * config/riscv/riscv-vector-builtins-bases.cc
15291 (vfwredusum_frm_obj): New declaration.
15293 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15294 * config/riscv/riscv-vector-builtins-functions.def
15295 (vfwredusum_frm): New intrinsic function def.
15297 2023-08-21 David Faust <david.faust@oracle.com>
15299 * config/bpf/bpf.md (neg): Second operand must be a register.
15301 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
15303 * config/riscv/bitmanip.md: Added bitmanip type to insns
15304 that are missing types.
15306 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
15308 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
15311 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
15313 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
15314 Fix format specifier.
15316 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
15318 * value-range.cc (frange::union_nans): Return false if nothing
15320 (range_tests_floats): New test.
15322 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15324 PR tree-optimization/111048
15325 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
15327 (fold_vec_perm_cst): Remove workaround and again call
15328 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
15329 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
15331 2023-08-21 Richard Biener <rguenther@suse.de>
15333 PR tree-optimization/111082
15334 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
15335 pun operations that can overflow.
15337 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15339 * lcm.cc (compute_antinout_edge): Export as global use.
15340 (compute_earliest): Ditto.
15341 (compute_rev_insert_delete): Ditto.
15342 * lcm.h (compute_antinout_edge): Ditto.
15343 (compute_earliest): Ditto.
15345 2023-08-21 Richard Biener <rguenther@suse.de>
15347 PR tree-optimization/111070
15348 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
15349 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
15351 2023-08-21 Andrew Pinski <apinski@marvell.com>
15353 PR tree-optimization/111002
15354 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
15356 2023-08-21 liuhongt <hongtao.liu@intel.com>
15358 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
15360 * common/config/i386/i386-common.cc (alias_table): Support
15361 -march=gracemont as an alias of -march=alderlake.
15363 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
15365 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
15366 instead of src in the call to ix86_expand_sse_cmp.
15367 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
15368 force operands[1] to a register.
15369 (<any_extend:insn>v4hiv4si2): Ditto.
15370 (<any_extend:insn>v2siv2di2): Ditto.
15372 2023-08-20 Andrew Pinski <apinski@marvell.com>
15374 PR tree-optimization/111006
15375 PR tree-optimization/110986
15376 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
15378 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
15381 * Makefile.in: improve error message when /usr/include is
15384 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
15386 PR middle-end/111017
15387 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
15388 to expand_omp_build_cond for 'factor != 0' condition, resulting
15389 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
15391 2023-08-19 Guo Jie <guojie@loongson.cn>
15392 Lulu Cheng <chenglulu@loongson.cn>
15394 * config/loongarch/t-loongarch: Add loongarch-driver.h into
15395 TM_H. Add loongarch-def.h and loongarch-tune.h into
15398 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
15401 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
15402 Also handle V2QImode.
15403 (ix86_expand_sse_extend): New function.
15404 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
15405 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
15406 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
15407 (<any_extend:insn>v2hiv2si2): Ditto.
15408 (<any_extend:insn>v2qiv2hi2): Ditto.
15409 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
15410 (<any_extend:insn>v4hiv4si2): Ditto.
15411 (<any_extend:insn>v2siv2di2): Ditto.
15413 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
15416 * value-range.cc (irange::union_bitmask): Return FALSE if updated
15417 bitmask is semantically equivalent to the original mask.
15418 (irange::intersect_bitmask): Same.
15419 (irange::get_bitmask): Add comment.
15421 2023-08-18 Richard Biener <rguenther@suse.de>
15423 PR tree-optimization/111019
15424 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
15425 also scrap base and offset in case the ref is indirect.
15427 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
15429 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
15431 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
15433 PR bootstrap/111021
15434 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
15436 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
15438 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
15440 (vectorizable_store): ... here.
15442 2023-08-18 Richard Biener <rguenther@suse.de>
15444 PR tree-optimization/111048
15445 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
15448 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
15451 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
15454 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
15456 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
15457 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
15458 and update the final nest accordingly.
15460 2023-08-18 Andrew Pinski <apinski@marvell.com>
15462 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
15463 cond_len_neg and cond_len_one_cmpl.
15465 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
15467 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
15468 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
15469 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
15470 (*local_pic_load_32d<ANYF:mode>): Ditto.
15471 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
15472 (*local_pic_store<ANYF:mode>): Ditto.
15473 (*local_pic_store<ANYLSF:mode>): Ditto.
15474 (*local_pic_store_32d<ANYF:mode>): Ditto.
15475 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
15477 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
15478 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15480 * config/riscv/predicates.md (vector_const_0_operand): New.
15481 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
15483 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
15485 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
15488 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
15490 PR tree-optimization/111009
15491 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
15493 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
15495 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
15496 slots_num initialization from here ...
15497 (lra_spill): ... to here before the 1st call of
15498 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
15499 fp->sp elimination.
15501 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
15504 * doc/invoke.texi (Option Summary): Mention
15505 -Wcompare-distinct-pointer-types under `Warning Options'.
15506 (Warning Options): Document -Wcompare-distinct-pointer-types.
15508 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
15510 * recog.cc (memory_address_addr_space_p): Mark possibly unused
15511 argument as unused.
15513 2023-08-17 Richard Biener <rguenther@suse.de>
15515 PR tree-optimization/111039
15516 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
15517 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
15519 2023-08-17 Alex Coplan <alex.coplan@arm.com>
15521 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
15523 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
15526 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
15527 `naked' function attribute.
15528 (bpf_warn_func_return): New function.
15529 (TARGET_WARN_FUNC_RETURN): Define.
15530 (bpf_expand_prologue): Add preventive comment.
15531 (bpf_expand_epilogue): Likewise.
15532 * doc/extend.texi (BPF Function Attributes): Document the `naked'
15533 function attribute.
15535 2023-08-17 Richard Biener <rguenther@suse.de>
15537 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
15538 !needs_fold_left_reduction_p to decide whether we can
15539 handle the reduction with association.
15540 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
15541 reductions perform all arithmetic in an unsigned type.
15543 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
15545 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
15547 * configure: Regenerate.
15549 2023-08-17 Pan Li <pan2.li@intel.com>
15551 * config/riscv/riscv-vector-builtins-bases.cc
15552 (widen_freducop): Add frm_opt_type template arg.
15553 (vfwredosum_frm_obj): New declaration.
15555 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15556 * config/riscv/riscv-vector-builtins-functions.def
15557 (vfwredosum_frm): New intrinsic function def.
15559 2023-08-17 Pan Li <pan2.li@intel.com>
15561 * config/riscv/riscv-vector-builtins-bases.cc
15562 (vfredosum_frm_obj): New declaration.
15564 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15565 * config/riscv/riscv-vector-builtins-functions.def
15566 (vfredosum_frm): New intrinsic function def.
15568 2023-08-17 Pan Li <pan2.li@intel.com>
15570 * config/riscv/riscv-vector-builtins-bases.cc
15571 (class freducop): Add frm_op_type template arg.
15572 (vfredusum_frm_obj): New declaration.
15574 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15575 * config/riscv/riscv-vector-builtins-functions.def
15576 (vfredusum_frm): New intrinsic function def.
15577 * config/riscv/riscv-vector-builtins-shapes.cc
15578 (struct reduc_alu_frm_def): New class for frm shape.
15579 (SHAPE): New declaration.
15580 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
15582 2023-08-17 Pan Li <pan2.li@intel.com>
15584 * config/riscv/riscv-vector-builtins-bases.cc
15585 (class vfncvt_f): Add frm_op_type template arg.
15586 (vfncvt_f_frm_obj): New declaration.
15588 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15589 * config/riscv/riscv-vector-builtins-functions.def
15590 (vfncvt_f_frm): New intrinsic function def.
15592 2023-08-17 Pan Li <pan2.li@intel.com>
15594 * config/riscv/riscv-vector-builtins-bases.cc
15595 (vfncvt_xu_frm_obj): New declaration.
15597 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15598 * config/riscv/riscv-vector-builtins-functions.def
15599 (vfncvt_xu_frm): New intrinsic function def.
15601 2023-08-17 Pan Li <pan2.li@intel.com>
15603 * config/riscv/riscv-vector-builtins-bases.cc
15604 (class vfncvt_x): Add frm_op_type template arg.
15605 (BASE): New declaration.
15606 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15607 * config/riscv/riscv-vector-builtins-functions.def
15608 (vfncvt_x_frm): New intrinsic function def.
15609 * config/riscv/riscv-vector-builtins-shapes.cc
15610 (struct narrow_alu_frm_def): New shape function for frm.
15611 (SHAPE): New declaration.
15612 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
15614 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15616 * config/i386/avx512vldqintrin.h: Remove target attribute.
15617 * config/i386/i386-builtin.def (BDESC):
15618 Add OPTION_MASK_ISA2_AVX10_1.
15619 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
15620 (VFH_AVX512VLDQ_AVX10_1): Ditto.
15621 (VF1_AVX512VLDQ_AVX10_1): Ditto.
15622 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
15623 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
15624 (vec_pack<floatprefix>_float_<mode>): Change iterator to
15625 VI8_AVX512VLDQ_AVX10_1. Remove target check.
15626 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
15627 VF1_AVX512VLDQ_AVX10_1. Remove target check.
15628 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
15629 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
15630 (avx512vl_vextractf128<mode>): Change iterator to
15631 VI48F_256_DQVL_AVX10_1. Remove target check.
15632 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
15633 (vec_extract_hi_<mode>): Ditto.
15634 (avx512vl_vinsert<mode>): Ditto.
15635 (vec_set_lo_<mode><mask_name>): Ditto.
15636 (vec_set_hi_<mode><mask_name>): Ditto.
15637 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
15638 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
15639 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
15640 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
15641 * config/i386/subst.md (mask_avx512dq_condition): Add
15643 (mask_scalar_merge): Ditto.
15645 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15647 * config/i386/avx512vldqintrin.h: Remove target attribute.
15648 * config/i386/i386-builtin.def (BDESC):
15649 Add OPTION_MASK_ISA2_AVX10_1.
15650 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
15651 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
15652 (VI48_AVX512VLDQ_AVX10_1): Ditto.
15653 (VF2_AVX512VL): Remove.
15654 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
15655 Add TARGET_AVX10_1.
15656 (*<code><mode>3<mask_name>): Change isa attribute to
15657 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
15658 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
15659 to avx10_1_or_avx512vl.
15660 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
15661 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
15662 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
15663 Add TARGET_AVX10_1.
15664 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
15665 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
15666 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
15667 Add TARGET_AVX10_1.
15668 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
15669 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
15670 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
15671 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
15672 (float<floatunssuffix>v4div4sf2<mask_name>):
15673 Add TARGET_AVX10_1.
15674 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
15675 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
15676 (float<floatunssuffix>v2div2sf2): Ditto.
15677 (float<floatunssuffix>v2div2sf2_mask): Ditto.
15678 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
15679 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
15680 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
15681 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
15682 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
15683 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
15684 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
15685 Change when constraint is enabled.
15687 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15690 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
15691 (second_sew_less_than_first_sew_p): Fix bug.
15692 (first_sew_less_than_second_sew_p): Ditto.
15694 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15696 * config/i386/avx512vldqintrin.h: Remove target attribute.
15697 * config/i386/i386-builtin.def (BDESC):
15698 Add OPTION_MASK_ISA2_AVX10_1.
15699 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
15700 * config/i386/i386-expand.cc
15701 (ix86_check_builtin_isa_match): Ditto.
15702 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
15703 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
15704 and avx10_1_or_avx512vl.
15705 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
15706 (VF1_128_256VLDQ_AVX10_1): Ditto.
15707 (VI8_AVX512VLDQ_AVX10_1): Ditto.
15708 (<sse>_andnot<mode>3<mask_name>):
15709 Add TARGET_AVX10_1 and change isa attr from avx512dq to
15710 avx10_1_or_avx512dq.
15711 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
15712 avx512vl to avx10_1_or_avx512vl.
15713 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
15714 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
15715 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
15717 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
15719 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
15720 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
15721 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
15722 Add TARGET_AVX10_1.
15723 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
15724 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
15725 Remove target check.
15726 (avx512dq_mul<mode>3<mask_name>): Ditto.
15727 (*avx512dq_mul<mode>3<mask_name>): Ditto.
15728 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
15729 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
15730 Remove target check.
15731 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
15732 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
15733 Remove target check.
15734 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
15735 (mask_avx512vl_condition): Ditto.
15738 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15740 * common/config/i386/i386-common.cc
15741 (ix86_check_avx10_vector_width): New function to check isa_flags
15742 to emit a warning when there is a conflict in AVX10 options for
15744 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
15745 * config/i386/driver-i386.cc (host_detect_local_cpu):
15746 Do not append -mno-avx10-max-512bit for -march=native.
15748 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15750 * common/config/i386/i386-common.cc
15751 (ix86_check_avx10): New function to check isa_flags and
15752 isa_flags_explicit to emit warning when AVX10 is enabled
15754 (ix86_check_avx512): New function to check isa_flags and
15755 isa_flags_explicit to emit warning when AVX512 is enabled
15757 (ix86_handle_option): Do not change the flags when warning
15759 * config/i386/driver-i386.cc (host_detect_local_cpu):
15760 Do not append -mno-avx10.1 for -march=native.
15762 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
15764 * common/config/i386/cpuinfo.h (get_available_features):
15765 Add avx10_set and version and detect avx10.1.
15766 (cpu_indicator_init): Handle avx10.1-512.
15767 * common/config/i386/i386-common.cc
15768 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
15769 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
15770 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
15771 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
15772 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
15773 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
15775 * common/config/i386/i386-cpuinfo.h (enum processor_features):
15776 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
15777 FEATURE_AVX10_512BIT.
15778 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
15779 AVX10_512BIT, AVX10_1 and AVX10_1_512.
15780 * config/i386/constraints.md (Yk): Add AVX10_1.
15783 * config/i386/cpuid.h (bit_AVX10): New.
15784 (bit_AVX10_256): Ditto.
15785 (bit_AVX10_512): Ditto.
15786 * config/i386/i386-c.cc (ix86_target_macros_internal):
15787 Define AVX10_512BIT and AVX10_1.
15788 * config/i386/i386-isa.def
15789 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
15790 (AVX10_1): Add DEF_PTA(AVX10_1).
15791 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
15792 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
15794 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
15795 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
15796 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
15797 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
15798 (ix86_conditional_register_usage): Ditto.
15799 (ix86_hard_regno_mode_ok): Ditto.
15800 (ix86_rtx_costs): Ditto.
15801 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
15802 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
15804 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
15805 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
15806 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
15809 2023-08-17 Sergei Trofimovich <siarheit@google.com>
15811 * flag-types.h (vrp_mode): Remove unused.
15813 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
15815 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
15818 2023-08-17 Andrew Pinski <apinski@marvell.com>
15820 * internal-fn.def (COND_NOT): New internal function.
15821 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
15823 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
15824 into conditional not.
15825 * optabs.def (cond_one_cmpl): New optab.
15826 (cond_len_one_cmpl): Likewise.
15828 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
15830 PR rtl-optimization/110254
15831 * ira-color.cc (improve_allocation): Update array
15832 allocated_hard_reg_p.
15834 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
15836 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
15837 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
15838 (lra_update_fp2sp_elimination): Ditto.
15839 (update_reg_eliminate): Adjust spill_pseudos call.
15840 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
15841 in lra_update_fp2sp_elimination.
15843 2023-08-16 Richard Ball <richard.ball@arm.com>
15845 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
15846 * config/aarch64/aarch64-tune.md: Regenerate.
15847 * doc/invoke.texi: Document Cortex-A720 CPU.
15849 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
15851 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
15852 Implement expander.
15853 (<u>avg<v_double_trunc>3_ceil): Ditto.
15854 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
15857 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
15859 * internal-fn.cc (vec_extract_direct): Change type argument
15861 (expand_vec_extract_optab_fn): Call convert_optab_fn.
15862 (direct_vec_extract_optab_supported_p): Use
15863 convert_optab_supported_p.
15865 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15866 Richard Sandiford <richard.sandiford@arm.com>
15868 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
15869 (valid_mask_for_fold_vec_perm_cst_p): New function.
15870 (fold_vec_perm_cst): Likewise.
15871 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
15872 (test_fold_vec_perm_cst): New namespace.
15873 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
15874 (test_fold_vec_perm_cst::validate_res): Likewise.
15875 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
15876 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
15877 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
15878 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
15879 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
15880 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
15881 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
15882 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
15883 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
15884 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
15885 (test_fold_vec_perm_cst::test): Likewise.
15886 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
15888 2023-08-16 Pan Li <pan2.li@intel.com>
15890 * config/riscv/riscv-vector-builtins-bases.cc
15891 (BASE): New declaration.
15892 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15893 * config/riscv/riscv-vector-builtins-functions.def
15894 (vfwcvt_xu_frm): New intrinsic function def.
15896 2023-08-16 Pan Li <pan2.li@intel.com>
15898 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
15900 2023-08-16 Pan Li <pan2.li@intel.com>
15902 * config/riscv/riscv-vector-builtins-bases.cc
15903 (BASE): New declaration.
15904 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15905 * config/riscv/riscv-vector-builtins-functions.def
15906 (vfwcvt_x_frm): New intrinsic function def.
15908 2023-08-16 Pan Li <pan2.li@intel.com>
15910 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
15911 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15912 * config/riscv/riscv-vector-builtins-functions.def
15913 (vfcvt_f_frm): New intrinsic function def.
15915 2023-08-16 Pan Li <pan2.li@intel.com>
15917 * config/riscv/riscv-vector-builtins-bases.cc
15918 (BASE): New declaration.
15919 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15920 * config/riscv/riscv-vector-builtins-functions.def
15921 (vfcvt_xu_frm): New intrinsic function def..
15923 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
15926 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
15927 extract when the element is 7 on BE while 8 on LE for byte or 3 on
15928 BE while 4 on LE for halfword.
15930 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
15933 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
15934 for V8HI and V16QI.
15935 (vsx_extract_v4si): New expand for V4SI extraction.
15936 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
15937 word 1 from BE order.
15938 (*mfvsrwz): New insn pattern for mfvsrwz.
15939 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
15940 word 1 from BE order.
15941 (*vsx_extract_si): Remove.
15942 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
15945 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15947 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
15949 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
15950 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
15951 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
15952 (expand_lanes_load_store): New function.
15953 * config/riscv/vector-iterators.md: New iterator.
15955 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15957 * internal-fn.cc (internal_load_fn_p): Apply
15958 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
15959 (internal_store_fn_p): Ditto.
15960 (internal_fn_len_index): Ditto.
15961 (internal_fn_mask_index): Ditto.
15962 (internal_fn_stored_value_index): Ditto.
15963 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
15964 (vect_load_lanes_supported): Ditto.
15965 * tree-vect-loop.cc: Ditto.
15966 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
15967 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
15968 (get_group_load_store_type): Ditto.
15969 (vectorizable_store): Ditto.
15970 (vectorizable_load): Ditto.
15971 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
15972 (vect_load_lanes_supported): Ditto.
15974 2023-08-16 Pan Li <pan2.li@intel.com>
15976 * config/riscv/riscv-vector-builtins-bases.cc
15977 (enum frm_op_type): New type for frm.
15978 (BASE): New declaration.
15979 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
15980 * config/riscv/riscv-vector-builtins-functions.def
15981 (vfcvt_x_frm): New intrinsic function def.
15983 2023-08-16 liuhongt <hongtao.liu@intel.com>
15985 * config/i386/i386-builtins.cc
15986 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
15987 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
15988 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
15989 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
15990 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
15991 for use_scatter_8parts
15992 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
15993 (TARGET_USE_GATHER_8PARTS): .. this.
15994 (TARGET_USE_SCATTER): Rename to ..
15995 (TARGET_USE_SCATTER_8PARTS): .. this.
15996 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
15997 (X86_TUNE_USE_GATHER_8PARTS): .. this.
15998 (X86_TUNE_USE_SCATTER): Rename to
15999 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
16000 * config/i386/i386.opt: Add new options mgather, mscatter.
16002 2023-08-16 liuhongt <hongtao.liu@intel.com>
16004 * config/i386/i386-options.cc (m_GDS): New macro.
16005 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
16007 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
16008 (X86_TUNE_USE_GATHER): Ditto.
16010 2023-08-16 liuhongt <hongtao.liu@intel.com>
16012 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
16013 vmovsd when moving DFmode between SSE_REGS.
16014 (movhi_internal): Generate vmovdqa instead of vmovsh when
16015 moving HImode between SSE_REGS.
16016 (mov<mode>_internal): Use vmovaps instead of vmovsh when
16017 moving HF/BFmode between SSE_REGS.
16019 2023-08-15 David Faust <david.faust@oracle.com>
16021 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
16023 2023-08-15 David Faust <david.faust@oracle.com>
16026 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
16027 for any mode 32-bits or smaller, not just SImode.
16029 2023-08-15 Martin Jambor <mjambor@suse.cz>
16033 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
16034 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
16035 (ipcp_transform_function): Do not deallocate transformation info.
16036 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
16038 (vn_reference_lookup_2): When hitting default-def vuse, query
16039 IPA-CP transformation info for any known constants.
16041 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
16042 Thomas Schwinge <thomas@codesourcery.com>
16044 * gimplify.cc (oacc_region_type_name): New function.
16045 (oacc_default_clause): If no 'default' clause appears on this
16046 compute construct, see if one appears on a lexically containing
16048 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
16049 ctx->oacc_default_clause_ctx to current context.
16051 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16054 * config/riscv/predicates.md: Fix predicate.
16056 2023-08-15 Richard Biener <rguenther@suse.de>
16058 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
16059 slp_inst_kind_ctor handling.
16060 (vect_analyze_slp): Simplify.
16061 (vect_build_slp_instance): Dump when we analyze a CTOR.
16062 (vect_slp_check_for_constructors): Rename to ...
16063 (vect_slp_check_for_roots): ... this. Register a
16064 slp_root for CONSTRUCTORs instead of shoving them to
16065 the set of grouped stores.
16066 (vect_slp_analyze_bb_1): Adjust.
16068 2023-08-15 Richard Biener <rguenther@suse.de>
16070 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
16072 (_slp_instance::remain_defs): ... this.
16073 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
16074 (SLP_INSTANCE_REMAIN_DEFS): ... this.
16075 (slp_root::remain): New.
16076 (slp_root::slp_root): Adjust.
16077 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
16078 (vect_build_slp_instance): Get extra remain parameter,
16079 adjust former handling of a cut off stmt.
16080 (vect_analyze_slp_instance): Adjust.
16081 (vect_analyze_slp): Likewise.
16082 (_bb_vec_info::~_bb_vec_info): Likewise.
16083 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
16084 (vect_slp_check_for_constructors): Handle non-internal
16085 defs as remain defs of a reduction.
16086 (vectorize_slp_instance_root_stmt): Adjust.
16088 2023-08-15 Richard Biener <rguenther@suse.de>
16090 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
16091 (canonicalize_loop_induction_variables): Use find_loop_location.
16093 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
16095 PR bootstrap/111021
16096 * config/cris/cris-protos.h: Revert recent change.
16097 * config/cris/cris.cc (cris_legitimate_address_p): Remove
16098 code_helper unused parameter.
16099 (cris_legitimate_address_p_hook): New wrapper function.
16100 (TARGET_LEGITIMATE_ADDRESS_P): Change to
16101 cris_legitimate_address_p_hook.
16103 2023-08-15 Richard Biener <rguenther@suse.de>
16105 PR tree-optimization/110963
16106 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
16107 a PHI node when the expression is available on all edges
16108 and we insert at most one copy from a constant.
16110 2023-08-15 Richard Biener <rguenther@suse.de>
16112 PR tree-optimization/110991
16113 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
16114 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
16115 that will end up constant.
16117 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
16119 PR bootstrap/111021
16120 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
16122 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
16124 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
16125 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
16126 and update the final nest accordingly.
16128 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
16130 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
16133 2023-08-15 Pan Li <pan2.li@intel.com>
16135 * mode-switching.cc (create_pre_exit): Add SET insn check.
16137 2023-08-15 Pan Li <pan2.li@intel.com>
16139 * config/riscv/riscv-vector-builtins-bases.cc
16140 (class vfrec7_frm): New class for frm.
16141 (vfrec7_frm_obj): New declaration.
16143 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16144 * config/riscv/riscv-vector-builtins-functions.def
16145 (vfrec7_frm): New intrinsic function definition.
16146 * config/riscv/vector-iterators.md
16147 (VFMISC): Remove VFREC7.
16149 (float_insn_type): Ditto.
16150 (VFMISC_FRM): New int iterator.
16151 (misc_frm_op): New op for frm.
16152 (float_frm_insn_type): New type for frm.
16153 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
16154 New pattern for misc frm.
16156 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
16158 * lra-constraints.cc (curr_insn_transform): Process output stack
16159 pointer reloads before emitting reload insns.
16161 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
16164 * doc/invoke.texi: Add documentation of
16165 fanalyzer-show-events-in-system-headers
16167 2023-08-14 Jan Hubicka <jh@suse.cz>
16169 PR gcov-profile/110988
16170 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
16172 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
16174 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
16175 Enable compressed builtins when ZC* extensions enabled.
16176 * config/riscv/riscv-shorten-memrefs.cc:
16177 Enable shorten_memrefs pass when ZC* extensions enabled.
16178 * config/riscv/riscv.cc (riscv_compressed_reg_p):
16179 Enable compressible registers when ZC* extensions enabled.
16180 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
16181 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
16182 (riscv_first_stack_step): Allow compression of the register saves
16183 without adding extra instructions.
16184 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
16185 to 16 bits when ZC* extensions enabled.
16187 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
16189 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
16190 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
16195 (MASK_ZCMP): Ditto.
16196 (MASK_ZCMT): Ditto.
16197 (TARGET_ZCA): New target.
16198 (TARGET_ZCB): Ditto.
16199 (TARGET_ZCE): Ditto.
16200 (TARGET_ZCF): Ditto.
16201 (TARGET_ZCD): Ditto.
16202 (TARGET_ZCMP): Ditto.
16203 (TARGET_ZCMT): Ditto.
16204 * config/riscv/riscv.opt: New target variable.
16206 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16209 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
16211 * genrecog.cc (print_nonbool_test): Fix type error of
16212 switch (SUBREG_BYTE (op))'.
16214 2023-08-14 Richard Biener <rguenther@suse.de>
16216 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
16218 2023-08-14 Pan Li <pan2.li@intel.com>
16220 * config/riscv/riscv-vector-builtins-bases.cc
16221 (class unop_frm): New class for frm.
16222 (vfsqrt_frm_obj): New declaration.
16224 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16225 * config/riscv/riscv-vector-builtins-functions.def
16226 (vfsqrt_frm): New intrinsic function definition.
16228 2023-08-14 Pan Li <pan2.li@intel.com>
16230 * config/riscv/riscv-vector-builtins-bases.cc
16231 (class vfwnmsac_frm): New class for frm.
16232 (vfwnmsac_frm_obj): New declaration.
16234 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16235 * config/riscv/riscv-vector-builtins-functions.def
16236 (vfwnmsac_frm): New intrinsic function definition.
16238 2023-08-14 Pan Li <pan2.li@intel.com>
16240 * config/riscv/riscv-vector-builtins-bases.cc
16241 (class vfwmsac_frm): New class for frm.
16242 (vfwmsac_frm_obj): New declaration.
16244 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16245 * config/riscv/riscv-vector-builtins-functions.def
16246 (vfwmsac_frm): New intrinsic function definition.
16248 2023-08-14 Pan Li <pan2.li@intel.com>
16250 * config/riscv/riscv-vector-builtins-bases.cc
16251 (class vfwnmacc_frm): New class for frm.
16252 (vfwnmacc_frm_obj): New declaration.
16254 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16255 * config/riscv/riscv-vector-builtins-functions.def
16256 (vfwnmacc_frm): New intrinsic function definition.
16258 2023-08-14 Cui, Lili <lili.cui@intel.com>
16260 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
16263 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16265 * config/mmix/predicates.md (mmix_address_operand): Use
16266 lra_in_progress, not reload_in_progress.
16268 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16270 * config/mmix/mmix.cc: Re-enable LRA.
16272 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16274 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
16275 when lra_in_progress.
16277 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
16279 * config/mmix/mmix.cc: Disable LRA for MMIX.
16281 2023-08-14 Pan Li <pan2.li@intel.com>
16283 * config/riscv/riscv-vector-builtins-bases.cc
16284 (class vfwmacc_frm): New class for vfwmacc frm.
16285 (vfwmacc_frm_obj): New declaration.
16287 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16288 * config/riscv/riscv-vector-builtins-functions.def
16289 (vfwmacc_frm): Function definition for vfwmacc.
16290 * config/riscv/riscv-vector-builtins.cc
16291 (function_expander::use_widen_ternop_insn): Add frm support.
16293 2023-08-14 Pan Li <pan2.li@intel.com>
16295 * config/riscv/riscv-vector-builtins-bases.cc
16296 (class vfnmsub_frm): New class for vfnmsub frm.
16297 (vfnmsub_frm): New declaration.
16299 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16300 * config/riscv/riscv-vector-builtins-functions.def
16301 (vfnmsub_frm): New function declaration.
16303 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
16305 * lra-constraints.cc (curr_insn_transform): Set done_p up and
16306 check it on true after processing output stack pointer reload.
16308 2023-08-12 Jakub Jelinek <jakub@redhat.com>
16310 * Makefile.in (USER_H): Add stdckdint.h.
16311 * ginclude/stdckdint.h: New file.
16313 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16316 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
16318 2023-08-12 Patrick Palka <ppalka@redhat.com>
16320 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
16321 Delimit output with braces.
16323 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16326 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
16328 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16330 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
16331 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
16332 * config/riscv/vector.md: Ditto.
16334 2023-08-11 David Malcolm <dmalcolm@redhat.com>
16337 * doc/analyzer.texi (__analyzer_get_strlen): New.
16338 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
16340 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
16342 * config/rx/rx.md (subdi3): Fix test for borrow.
16344 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16346 PR middle-end/110989
16347 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
16348 (vectorizable_load): Ditto.
16350 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
16352 * config/bpf/bpf.md (allocate_stack): Define.
16353 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
16354 stack pointer register.
16355 (FIXED_REGISTERS): Adjust accordingly.
16356 (CALL_USED_REGISTERS): Likewise.
16357 (REG_CLASS_CONTENTS): Likewise.
16358 (REGISTER_NAMES): Likewise.
16359 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
16360 space for callee-saved registers.
16361 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
16362 (bpf_expand_epilogue): Do not restore callee-saved registers in
16365 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
16367 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
16368 about too many arguments if function is always inlined.
16370 2023-08-11 Patrick Palka <ppalka@redhat.com>
16372 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
16373 Don't call component_ref_field_offset if the RHS isn't a decl.
16375 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
16377 PR bootstrap/110646
16378 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
16380 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
16382 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
16383 (process_alt_operands): Set the flag.
16384 (curr_insn_transform): Modify stack pointer offsets if output
16385 stack pointer reload is generated.
16387 2023-08-11 Joseph Myers <joseph@codesourcery.com>
16389 * configure: Regenerate.
16391 2023-08-11 Richard Biener <rguenther@suse.de>
16393 PR tree-optimization/110979
16394 * tree-vect-loop.cc (vectorizable_reduction): For
16395 FOLD_LEFT_REDUCTION without target support make sure
16396 we don't need to honor signed zeros and sign dependent rounding.
16398 2023-08-11 Richard Biener <rguenther@suse.de>
16400 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
16401 subgraph entries. Dump the used vector size based on the
16402 SLP subgraph entry root vector type.
16404 2023-08-11 Pan Li <pan2.li@intel.com>
16406 * config/riscv/riscv-vector-builtins-bases.cc
16407 (class vfmsub_frm): New class for vfmsub frm.
16408 (vfmsub_frm): New declaration.
16410 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16411 * config/riscv/riscv-vector-builtins-functions.def
16412 (vfmsub_frm): New function declaration.
16414 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16416 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
16417 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
16418 (expand_partial_store_optab_fn): Ditto.
16419 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
16420 (MASK_LEN_STORE_LANES): Ditto.
16421 * optabs.def (OPTAB_CD): Ditto.
16423 2023-08-11 Pan Li <pan2.li@intel.com>
16425 * config/riscv/riscv-vector-builtins-bases.cc
16426 (class vfnmadd_frm): New class for vfnmadd frm.
16427 (vfnmadd_frm): New declaration.
16429 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16430 * config/riscv/riscv-vector-builtins-functions.def
16431 (vfnmadd_frm): New function declaration.
16433 2023-08-11 Drew Ross <drross@redhat.com>
16434 Jakub Jelinek <jakub@redhat.com>
16436 PR tree-optimization/109938
16437 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
16439 2023-08-11 Pan Li <pan2.li@intel.com>
16441 * config/riscv/riscv-vector-builtins-bases.cc
16442 (class vfmadd_frm): New class for vfmadd frm.
16443 (vfmadd_frm_obj): New declaration.
16445 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16446 * config/riscv/riscv-vector-builtins-functions.def
16447 (vfmadd_frm): New function definition.
16449 2023-08-11 Pan Li <pan2.li@intel.com>
16451 * config/riscv/riscv-vector-builtins-bases.cc
16452 (class vfnmsac_frm): New class for vfnmsac frm.
16453 (vfnmsac_frm_obj): New declaration.
16455 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16456 * config/riscv/riscv-vector-builtins-functions.def
16457 (vfnmsac_frm): New function definition.
16459 2023-08-11 Jakub Jelinek <jakub@redhat.com>
16461 * doc/extend.texi (Typeof): Document typeof_unqual
16462 and __typeof_unqual__.
16464 2023-08-11 Andrew Pinski <apinski@marvell.com>
16466 PR tree-optimization/110954
16467 * generic-match-head.cc (bitwise_inverted_equal_p): Add
16468 wascmp argument and set it accordingly.
16469 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
16470 wascmp argument to the macro.
16471 (gimple_bitwise_inverted_equal_p): Add
16472 wascmp argument and set it accordingly.
16473 * match.pd (`a & ~a`, `a ^| ~a`): Update call
16474 to bitwise_inverted_equal_p and handle wascmp case.
16475 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
16476 call to bitwise_inverted_equal_p and check to see
16477 if was !wascmp or if precision was 1.
16479 2023-08-11 Martin Uecker <uecker@tugraz.at>
16482 * doc/invoke.texi: Update.
16484 2023-08-11 Pan Li <pan2.li@intel.com>
16486 * config/riscv/riscv-vector-builtins-bases.cc
16487 (class vfmsac_frm): New class for vfmsac frm.
16488 (vfmsac_frm_obj): New declaration.
16490 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16491 * config/riscv/riscv-vector-builtins-functions.def
16492 (vfmsac_frm): New function definition
16494 2023-08-10 Jan Hubicka <jh@suse.cz>
16496 PR middle-end/110923
16497 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
16499 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
16501 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
16502 dependent on 'a' extension.
16503 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
16504 (TARGET_ZTSO): New target.
16505 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
16507 (riscv_memmodel_needs_amo_release): Add Ztso case.
16508 (riscv_print_operand): Add Ztso case for LR/SC annotations.
16509 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
16510 * config/riscv/riscv.opt: Add Ztso target variable.
16511 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
16512 Ztso specific insn.
16513 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
16514 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
16515 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
16516 specific load/store/fence mappings.
16517 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
16518 specific load/store/fence mappings.
16520 2023-08-10 Jan Hubicka <jh@suse.cz>
16522 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
16525 2023-08-10 Jan Hubicka <jh@suse.cz>
16527 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
16529 2023-08-10 Jan Hubicka <jh@suse.cz>
16531 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
16532 handling of undefined values.
16534 2023-08-10 Jakub Jelinek <jakub@redhat.com>
16537 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
16538 return virtual phis and return NULL if there is a virtual phi
16539 where the arguments from E0 and E1 edges aren't equal.
16541 2023-08-10 Richard Biener <rguenther@suse.de>
16543 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
16544 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
16546 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16549 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
16551 2023-08-10 Pan Li <pan2.li@intel.com>
16553 * config/riscv/riscv-vector-builtins-bases.cc
16554 (class vfnmacc_frm): New class for vfnmacc.
16555 (vfnmacc_frm_obj): New declaration.
16557 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16558 * config/riscv/riscv-vector-builtins-functions.def
16559 (vfnmacc_frm): New function definition.
16561 2023-08-10 Pan Li <pan2.li@intel.com>
16563 * config/riscv/riscv-vector-builtins-bases.cc
16564 (class vfmacc_frm): New class for vfmacc frm.
16565 (vfmacc_frm_obj): New declaration.
16567 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
16568 * config/riscv/riscv-vector-builtins-functions.def
16569 (vfmacc_frm): New function definition.
16571 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16574 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
16576 2023-08-10 Richard Biener <rguenther@suse.de>
16578 * tree-vectorizer.h (vectorizable_live_operation): Remove
16579 gimple_stmt_iterator * argument.
16580 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
16581 Adjust plumbing around vect_get_loop_mask.
16582 (vect_analyze_loop_operations): Adjust.
16583 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
16584 (vect_bb_slp_mark_live_stmts): Likewise.
16585 (vect_schedule_slp_node): Likewise.
16586 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
16587 Remove gimple_stmt_iterator * argument.
16588 (vect_transform_stmt): Adjust.
16590 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16592 * config/riscv/vector-iterators.md: Add missing modes.
16594 2023-08-10 Jakub Jelinek <jakub@redhat.com>
16597 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
16598 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
16600 2023-08-10 Jakub Jelinek <jakub@redhat.com>
16603 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
16604 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
16607 2023-08-10 liuhongt <hongtao.liu@intel.com>
16610 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
16611 sanitize upper part of V4HFmode register with
16612 -fno-trapping-math.
16613 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
16614 (<divv4hf3): Ditto.
16615 (<insn>v2hf3): Ditto.
16617 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
16618 register with -fno-trapping-math.
16620 2023-08-10 Pan Li <pan2.li@intel.com>
16621 Kito Cheng <kito.cheng@sifive.com>
16623 * config/riscv/riscv-protos.h
16624 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
16625 (get_frm_mode): New declaration.
16626 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
16627 * config/riscv/riscv-vector-builtins.cc
16628 (function_expander::use_ternop_insn): Take care of frm reg.
16629 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
16630 (riscv_emit_frm_mode_set): Ditto.
16631 (riscv_emit_mode_set): Ditto.
16632 (riscv_frm_adjust_mode_after_call): Ditto.
16633 (riscv_frm_mode_needed): Ditto.
16634 (riscv_frm_mode_after): Ditto.
16635 (riscv_mode_entry): Ditto.
16636 (riscv_mode_exit): Ditto.
16637 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
16638 * config/riscv/vector.md
16639 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
16640 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
16642 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16644 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
16645 incorrect anticipate info.
16647 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
16649 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
16650 Remove 'Zve32d' from the version list.
16652 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
16654 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
16655 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
16656 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
16657 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
16659 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
16661 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
16662 (mem_shadd_or_shadd_rtx_p): New function.
16664 2023-08-09 Andrew Pinski <apinski@marvell.com>
16666 PR tree-optimization/110937
16667 PR tree-optimization/100798
16668 * match.pd (`a ? ~b : b`): Handle this
16671 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
16673 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
16675 2023-08-09 Richard Ball <richard.ball@arm.com>
16677 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
16678 * config/aarch64/aarch64-tune.md: Regenerate.
16679 * doc/invoke.texi: Document Cortex-A520 CPU.
16681 2023-08-09 Carl Love <cel@us.ibm.com>
16683 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
16684 Move definitions to Altivec stanza.
16685 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
16688 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16691 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
16692 stepped vector support.
16694 2023-08-09 liuhongt <hongtao.liu@intel.com>
16696 * common/config/i386/cpuinfo.h (get_available_features):
16697 Rename local variable subleaf_level to max_subleaf_level.
16699 2023-08-09 Richard Biener <rguenther@suse.de>
16701 PR rtl-optimization/110587
16702 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
16704 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
16706 PR tree-optimization/110248
16707 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
16708 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
16709 legitimate when outer code is PLUS.
16711 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
16713 PR tree-optimization/110248
16714 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
16715 type code_helper and pass it to targetm.addr_space.legitimate_address_p
16716 instead of ERROR_MARK.
16717 (offsettable_address_addr_space_p): Update one function pointer with
16718 one more argument of type code_helper as its assignees
16719 memory_address_addr_space_p and strict_memory_address_addr_space_p
16720 have been adjusted, and adjust some call sites with ERROR_MARK.
16721 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
16722 (memory_address_addr_space_p): Adjust with one more unnamed argument
16723 of type code_helper with default ERROR_MARK.
16724 (strict_memory_address_addr_space_p): Likewise.
16725 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
16726 argument of type code_helper.
16727 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
16728 type code_helper and pass it to memory_address_addr_space_p.
16729 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
16730 one more unnamed argument of type code_helper with default value
16732 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
16733 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
16734 pass it to all valid_mem_ref_p calls.
16736 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
16738 PR tree-optimization/110248
16739 * coretypes.h (class code_helper): Add forward declaration.
16740 * doc/tm.texi: Regenerate.
16741 * lra-constraints.cc (valid_address_p): Call target hook
16742 targetm.addr_space.legitimate_address_p with an extra parameter
16743 ERROR_MARK as its prototype changes.
16744 * recog.cc (memory_address_addr_space_p): Likewise.
16745 * reload.cc (strict_memory_address_addr_space_p): Likewise.
16746 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
16747 Extend with one more argument of type code_helper, update the
16748 documentation accordingly.
16749 * targhooks.cc (default_legitimate_address_p): Adjust for the
16750 new code_helper argument.
16751 (default_addr_space_legitimate_address_p): Likewise.
16752 * targhooks.h (default_legitimate_address_p): Likewise.
16753 (default_addr_space_legitimate_address_p): Likewise.
16754 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
16755 with extra unnamed code_helper argument with default ERROR_MARK.
16756 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
16757 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
16758 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
16759 (tree.h): New include for tree_code ERROR_MARK.
16760 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
16761 unnamed code_helper argument with default ERROR_MARK.
16762 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
16763 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
16764 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
16765 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
16766 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
16767 (tree.h): New include for tree_code ERROR_MARK.
16768 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
16769 unnamed code_helper argument with default ERROR_MARK.
16770 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
16771 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
16773 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
16774 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
16775 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
16776 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
16777 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
16778 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
16779 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
16780 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
16781 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
16783 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
16784 (m32c_addr_space_legitimate_address_p): Likewise.
16785 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
16786 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
16787 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
16788 * config/microblaze/microblaze-protos.h (tree.h): New include for
16789 tree_code ERROR_MARK.
16790 (microblaze_legitimate_address_p): Adjust with extra unnamed
16791 code_helper argument with default ERROR_MARK.
16792 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
16794 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
16795 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
16796 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
16797 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
16798 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
16799 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
16800 argument with default ERROR_MARK and adjust the call to function
16801 msp430_legitimate_address_p.
16802 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
16803 unnamed code_helper argument with default ERROR_MARK.
16804 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
16805 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
16806 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
16807 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
16808 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
16809 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
16810 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
16811 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
16812 (tree.h): New include for tree_code ERROR_MARK.
16813 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
16814 extra unnamed code_helper argument with default ERROR_MARK.
16815 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
16816 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
16817 argument and adjust the call to function rs6000_legitimate_address_p.
16818 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
16819 unnamed code_helper argument with default ERROR_MARK.
16820 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
16821 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
16822 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
16823 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
16824 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
16825 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
16826 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
16827 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
16829 (tree.h): New include for tree_code ERROR_MARK.
16830 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
16831 Adjust with extra unnamed code_helper argument with default
16834 2023-08-09 liuhongt <hongtao.liu@intel.com>
16836 * common/config/i386/cpuinfo.h (get_available_features): Check
16837 EAX for valid subleaf before use CPUID.
16839 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
16841 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
16842 for the temporary when canonicalizing the condition.
16844 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
16846 * config/bpf/core-builtins.cc: Cleaned include headers.
16847 (struct cr_builtins): Added GTY.
16848 (cr_builtins_ref): Created.
16849 (builtins_data) Changed to GC root.
16850 (allocate_builtin_data): Changed.
16851 Included gt-core-builtins.h.
16852 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
16853 (bpf_core_extra_ref): Created.
16854 (bpf_comment_info): Changed to GC root.
16855 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
16857 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
16860 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
16861 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
16862 upper part of V2SFmode register with -fno-trapping-math.
16863 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
16865 (<smaxmin:code>v2sf3): Ditto.
16866 (sqrtv2sf2): Ditto.
16867 (*mmx_haddv2sf3_low): Ditto.
16868 (*mmx_hsubv2sf3_low): Ditto.
16869 (vec_addsubv2sf3): Ditto.
16870 (vec_cmpv2sfv2si): Ditto.
16871 (vcond<V2FI:mode>v2sf): Ditto.
16874 (fnmav2sf4): Ditto.
16875 (fnmsv2sf4): Ditto.
16876 (fix_truncv2sfv2si2): Ditto.
16877 (fixuns_truncv2sfv2si2): Ditto.
16878 (floatv2siv2sf2): Ditto.
16879 (floatunsv2siv2sf2): Ditto.
16880 (nearbyintv2sf2): Ditto.
16881 (rintv2sf2): Ditto.
16882 (lrintv2sfv2si2): Ditto.
16883 (ceilv2sf2): Ditto.
16884 (lceilv2sfv2si2): Ditto.
16885 (floorv2sf2): Ditto.
16886 (lfloorv2sfv2si2): Ditto.
16887 (btruncv2sf2): Ditto.
16888 (roundv2sf2): Ditto.
16889 (lroundv2sfv2si2): Ditto.
16890 * doc/invoke.texi (x86 Options): Document
16891 -mpartial-vector-fp-math option.
16893 2023-08-08 Andrew Pinski <apinski@marvell.com>
16895 PR tree-optimization/103281
16896 PR tree-optimization/28794
16897 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
16899 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
16900 (simplify_using_ranges::simplify_casted_cond): Rename to ...
16901 (simplify_using_ranges::simplify_casted_compare): This
16902 and change arguments to take op0 and op1.
16903 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
16904 (simplify_using_ranges::simplify): For tcc_comparison assignments call
16905 simplify_compare_assign_using_ranges_1.
16906 * vr-values.h (simplify_using_ranges): Add
16907 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
16908 Rename simplify_casted_cond and simplify_casted_compare and
16909 update argument types.
16911 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
16913 * genmatch.cc: Log line numbers indirectly.
16915 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
16917 * genmatch.cc: Make sinfo map ordered.
16918 * Makefile.in: Require the ordered map header for genmatch.o.
16920 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
16922 * ordered-hash-map.h: Add get_or_insert.
16923 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
16925 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16927 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
16928 (cond_len_<optab><mode>): Ditto.
16929 (cond_fma<mode>): Ditto.
16930 (cond_len_fma<mode>): Ditto.
16931 (cond_fnma<mode>): Ditto.
16932 (cond_len_fnma<mode>): Ditto.
16933 (cond_fms<mode>): Ditto.
16934 (cond_len_fms<mode>): Ditto.
16935 (cond_fnms<mode>): Ditto.
16936 (cond_len_fnms<mode>): Ditto.
16937 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
16939 (enum insn_type): Add new enum type.
16940 (prepare_ternary_operands): New function.
16941 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
16942 (emit_nonvlmax_tumu_insn): Ditto.
16943 (emit_nonvlmax_fp_tumu_insn): Ditto.
16944 (expand_cond_len_binop): Add condtional operations.
16945 (expand_cond_len_ternop): Ditto.
16946 (prepare_ternary_operands): New function.
16947 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
16948 riscv_get_v_regno_alignment as global scope.
16949 * config/riscv/vector.md: Fix ternary bugs.
16951 2023-08-08 Richard Biener <rguenther@suse.de>
16953 PR tree-optimization/49955
16954 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
16955 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
16956 * tree-vect-slp.cc (vect_free_slp_instance): Release
16957 SLP_INSTANCE_REMAIN_STMTS.
16958 (vect_build_slp_instance): Make the number of lanes of
16959 a BB reduction even.
16960 (vectorize_slp_instance_root_stmt): Handle unvectorized
16961 defs of a BB reduction.
16963 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16965 * internal-fn.cc (get_len_internal_fn): New function.
16966 (DEF_INTERNAL_COND_FN): Ditto.
16967 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
16968 * internal-fn.h (get_len_internal_fn): Ditto.
16969 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
16971 2023-08-08 Richard Biener <rguenther@suse.de>
16973 PR tree-optimization/110924
16974 * tree-ssa-live.h (virtual_operand_live): Update comment.
16975 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
16976 optimization, look at each predecessor.
16977 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
16979 2023-08-08 yulong <shiyulong@iscas.ac.cn>
16981 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
16983 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16985 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
16986 * config/riscv/vector.md: Ditto.
16988 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16990 * config/riscv/autovec.md: Add VLS shift.
16992 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16994 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
16995 * config/riscv/vector-iterators.md: Ditto.
16996 * config/riscv/vector.md: Ditto.
16998 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
17000 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
17002 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
17004 * configure: Regenerate.
17006 2023-08-07 John Ericson <git@JohnEricson.me>
17008 * configure: Regenerate.
17010 2023-08-07 Alan Modra <amodra@gmail.com>
17012 * configure: Regenerate.
17014 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
17016 * configure: Regenerate.
17018 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
17020 * configure: Regenerate.
17022 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
17024 * configure: Regenerate.
17026 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
17028 * configure: Regenerate.
17030 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
17032 * configure: Regenerate.
17034 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
17036 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
17037 VOIDmode operands to conditional before canonicalization.
17039 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
17041 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
17042 (find_oldest_value_reg): Inline stack_pointer_rtx check.
17043 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
17045 2023-08-07 Martin Jambor <mjambor@suse.cz>
17048 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
17049 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
17050 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
17051 (ptr_parm_has_nonarg_uses): Likewise.
17052 * ipa-param-manipulation.cc
17053 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
17054 (ipa_param_body_adjustments::mark_dead_statements): Move initial
17055 checks to get_ddef_if_exists_and_is_used.
17056 (ipa_param_body_adjustments::mark_clobbers_dead): New.
17057 (ipa_param_body_adjustments::common_initialization): Call
17058 mark_clobbers_dead when splitting.
17060 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
17062 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
17063 as an argument and pass it to riscv_emit_int_order_test.
17064 (riscv_expand_conditional_move): Handle cases where the condition
17065 is not EQ/NE or the second argument to the conditional is not
17067 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
17068 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17070 2023-08-07 Andrew Pinski <apinski@marvell.com>
17072 PR tree-optimization/109959
17073 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
17076 2023-08-07 Richard Biener <rguenther@suse.de>
17078 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
17079 calculate post-dominators. Calculate RPO on the inverted
17080 graph and process blocks in that order.
17082 2023-08-07 liuhongt <hongtao.liu@intel.com>
17085 * config/i386/i386-protos.h
17086 (vpternlog_redundant_operand_mask): Adjust parameter type.
17087 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
17088 INTVAL instead of XINT, also adjust parameter type from rtx*
17089 to rtx since the function only needs operands[4] in vpternlog
17091 (substitute_vpternlog_operands): Pass operands[4] instead of
17092 operands to vpternlog_redundant_operand_mask.
17093 * config/i386/sse.md: Ditto.
17095 2023-08-07 Richard Biener <rguenther@suse.de>
17097 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
17098 around dumping code.
17100 2023-08-07 liuhongt <hongtao.liu@intel.com>
17103 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
17104 to define_expand and break into ..
17105 (<insn>v4hf3): .. this.
17106 (divv4hf3): .. this.
17107 (<insn>v2hf3): .. this.
17108 (divv2hf3): .. this.
17109 (movd_v2hf_to_sse): New define_expand.
17110 (movq_<mode>_to_sse): Extend to V4HFmode.
17111 (mmxdoublevecmode): Ditto.
17112 (V2FI_V4HF): New mode iterator.
17113 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
17114 by using mode iterator V4SF_V8HF, renamed to ..
17115 (*vec_concat<mode>): .. this.
17116 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
17117 iterator V4SF_V8HF, renamed to ..
17118 (*vec_concat<mode>_0): .. this.
17119 (*vec_concatv8hf_movss): New define_insn.
17120 (V4SF_V8HF): New mode iterator.
17122 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17124 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
17126 2023-08-07 Jan Beulich <jbeulich@suse.com>
17128 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
17129 (*mmx_pinsrb): Likewise.
17130 (*mmx_pextrb): Likewise.
17131 (*mmx_pextrb_zext): Likewise.
17132 (mmx_pshufbv8qi3): Likewise.
17133 (mmx_pshufbv4qi3): Likewise.
17134 (mmx_pswapdv2si2): Likewise.
17135 (*pinsrb): Likewise.
17136 (*pextrb): Likewise.
17137 (*pextrb_zext): Likewise.
17138 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
17139 (*sse2_eq<mode>3): Likewise.
17140 (*sse2_gt<mode>3): Likewise.
17141 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
17142 (*vec_extract<mode>): Likewise.
17143 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
17144 (*vec_extractv16qi_zext): Likewise.
17145 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
17146 (ssse3_pmaddubsw128): Likewise.
17147 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
17148 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
17149 (<ssse3_avx2>_psign<mode>3): Likewise.
17150 (<ssse3_avx2>_palignr<mode>): Likewise.
17151 (*abs<mode>2): Likewise.
17152 (sse4_2_pcmpestr): Likewise.
17153 (sse4_2_pcmpestri): Likewise.
17154 (sse4_2_pcmpestrm): Likewise.
17155 (sse4_2_pcmpestr_cconly): Likewise.
17156 (sse4_2_pcmpistr): Likewise.
17157 (sse4_2_pcmpistri): Likewise.
17158 (sse4_2_pcmpistrm): Likewise.
17159 (sse4_2_pcmpistr_cconly): Likewise.
17160 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
17161 (vgf2p8affineqb_<mode><mask_name>): Likewise.
17162 (vgf2p8mulb_<mode><mask_name>): Likewise.
17163 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
17165 (*<code>v16qi3 [umaxmin]): Likewise.
17167 2023-08-07 Jan Beulich <jbeulich@suse.com>
17169 * config/i386/i386.md (sse4_1_round<mode>2): Make
17170 "length_immediate" uniformly 1.
17171 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
17172 (mmx_pblendvb_<mode>): Likewise.
17174 2023-08-07 Jan Beulich <jbeulich@suse.com>
17176 * config/i386/sse.md
17177 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
17178 "prefix" attribute.
17179 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
17182 2023-08-07 Jan Beulich <jbeulich@suse.com>
17184 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
17185 "prefix_extra", and "mode" attributes.
17186 (xop_phadd<u>bd): Likewise.
17187 (xop_phadd<u>bq): Likewise.
17188 (xop_phadd<u>wd): Likewise.
17189 (xop_phadd<u>wq): Likewise.
17190 (xop_phadd<u>dq): Likewise.
17191 (xop_phsubbw): Likewise.
17192 (xop_phsubwd): Likewise.
17193 (xop_phsubdq): Likewise.
17194 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
17195 (xop_rotr<mode>3): Likewise.
17196 (xop_frcz<mode>2): Likewise.
17197 (*xop_vmfrcz<mode>2): Likewise.
17198 (xop_vrotl<mode>3): Add "prefix" attribute. Change
17199 "prefix_extra" to 1.
17200 (xop_sha<mode>3): Likewise.
17201 (xop_shl<mode>3): Likewise.
17203 2023-08-07 Jan Beulich <jbeulich@suse.com>
17205 * config/i386/sse.md
17206 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
17208 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
17209 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
17210 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
17211 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
17212 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
17213 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
17214 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
17215 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
17216 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
17217 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
17218 (vec_extract_lo_v64qi): Likewise.
17219 (vec_extract_hi_v64qi): Likewise.
17220 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
17221 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
17222 (*avx512f_<code><mode>3<mask_name>): Likewise.
17223 (*vec_extractv4ti): Likewise.
17224 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
17225 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
17226 Add "length_immediate".
17228 2023-08-07 Jan Beulich <jbeulich@suse.com>
17230 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
17232 (@rdseed<mode>): Likewise.
17233 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
17234 Adjust "prefix_extra".
17235 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
17236 (*sse4_1_<code><mode>3<mask_name>): Likewise.
17237 (*avx2_eq<mode>3): Likewise.
17238 (avx2_gt<mode>3): Likewise.
17239 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
17240 (*vec_extract<mode>): Likewise.
17241 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
17243 2023-08-07 Jan Beulich <jbeulich@suse.com>
17245 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
17246 "prefix_rep". Drop "prefix_extra".
17247 (wr<fsgs>base<mode>): Likewise.
17248 (ptwrite<mode>): Likewise.
17250 2023-08-07 Jan Beulich <jbeulich@suse.com>
17252 * config/i386/i386.md (isa): Move up.
17253 (length_immediate): Handle "fma4".
17254 (prefix): Handle "ssemuladd".
17255 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
17256 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
17258 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
17259 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
17260 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
17262 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
17263 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
17264 (*fma_fnmadd_<mode>): Likewise.
17265 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
17267 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
17268 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
17269 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
17271 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
17272 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
17273 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
17275 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
17276 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
17277 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
17279 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
17280 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
17281 (*fmai_fmadd_<mode>): Likewise.
17282 (*fmai_fmsub_<mode>): Likewise.
17283 (*fmai_fnmadd_<mode><round_name>): Likewise.
17284 (*fmai_fnmsub_<mode><round_name>): Likewise.
17285 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
17286 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
17287 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
17288 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
17289 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
17290 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
17291 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
17292 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
17293 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
17294 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
17295 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
17296 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
17297 (*fma4i_vmfmadd_<mode>): Likewise.
17298 (*fma4i_vmfmsub_<mode>): Likewise.
17299 (*fma4i_vmfnmadd_<mode>): Likewise.
17300 (*fma4i_vmfnmsub_<mode>): Likewise.
17301 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
17302 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
17303 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
17305 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
17306 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
17307 (xop_p<macs>dql): Likewise.
17308 (xop_p<macs>dqh): Likewise.
17309 (xop_p<macs>wd): Likewise.
17310 (xop_p<madcs>wd): Likewise.
17311 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
17313 2023-08-07 Jan Beulich <jbeulich@suse.com>
17315 * config/i386/i386.md (length_immediate): Handle "sse4arg".
17316 (prefix): Likewise.
17317 (*xop_pcmov_<mode>): Add "mode" attribute.
17318 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
17319 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
17320 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
17321 (*xop_pcmov_<mode>): Add "mode" attribute.
17322 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
17324 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
17325 "prefix_extra", and "length_immediate" attributes.
17326 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
17327 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
17328 and "length_immediate" attributes. Switch "type" to "sse4arg".
17329 (xop_pcom_tf<mode>3): Likewise.
17330 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
17332 2023-08-07 Jan Beulich <jbeulich@suse.com>
17334 * config/i386/i386.md (prefix_extra): Correct comment. Fold
17335 cases yielding 2 into ones yielding 1.
17337 2023-08-07 Jan Hubicka <jh@suse.cz>
17339 PR tree-optimization/106293
17340 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
17341 * tree-vect-loop.cc (vect_transform_loop): Likewise.
17343 2023-08-07 Andrew Pinski <apinski@marvell.com>
17345 PR tree-optimization/96695
17346 * match.pd (min_value, max_value): Extend to
17349 2023-08-06 Jan Hubicka <jh@suse.cz>
17351 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
17352 __builtin_expect that CPU likely supports cpuid.
17354 2023-08-06 Jan Hubicka <jh@suse.cz>
17356 * tree-loop-distribution.cc (loop_distribution::execute): Disable
17357 distribution for loops with estimated iterations 0.
17359 2023-08-06 Jan Hubicka <jh@suse.cz>
17361 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
17363 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
17365 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
17366 more Zicond patterns. Fix whitespace typo.
17367 (riscv_rtx_costs): Remove accidental code duplication.
17368 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17370 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
17373 * config/i386/i386-protos.h
17374 (vpternlog_redundant_operand_mask): Declare.
17375 (substitute_vpternlog_operands): Declare.
17376 * config/i386/i386.cc
17377 (vpternlog_redundant_operand_mask): New helper.
17378 (substitute_vpternlog_operands): New function. Use them...
17379 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
17381 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
17383 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
17384 value of -1 is equivalent to don't care.
17385 (extract_integral_bit_field): Indicate that we don't require
17386 the most significant word to be zero extended, if we're about
17388 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
17389 of -1 is equivalent to don't care. Don't clear the most
17390 significant bits with AND mask when UNSIGNEDP is -1.
17392 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
17394 * config/i386/sse.md (define_split): Convert highpart:DF extract
17395 from V2DFmode register into a sse2_storehpd instruction.
17396 (define_split): Likewise, convert lowpart:DF extract from V2DF
17397 register into a sse2_storelpd instruction.
17399 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
17401 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
17404 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
17406 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
17407 against early clobber hard regs.
17409 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17411 * doc/extend.texi: Document it.
17413 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17416 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
17417 vec_widen_<sur>shiftl_hi_<mode>): Remove.
17418 (aarch64_<sur>shll<mode>_internal): Renamed to...
17419 (aarch64_<su>shll<mode>): .. This.
17420 (aarch64_<sur>shll2<mode>_internal): Renamed to...
17421 (aarch64_<su>shll2<mode>): .. This.
17422 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
17424 * config/aarch64/constraints.md (D2, DL): New.
17425 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
17427 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17429 * gensupport.cc (conlist): Support length 0 attribute.
17431 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17433 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
17434 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
17436 2023-08-04 Tamar Christina <tamar.christina@arm.com>
17438 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
17440 (aarch64_adjust_stmt_cost): Use it.
17441 (aarch64_vector_costs::count_ops): Likewise.
17442 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
17443 aarch64_adjust_stmt_cost.
17445 2023-08-04 Richard Biener <rguenther@suse.de>
17447 PR tree-optimization/110838
17448 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
17449 Fix right-shift value sanitizing. Properly emit external
17450 def mangling in the preheader rather than in the pattern
17451 def sequence where it will fail vectorizing.
17453 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
17455 PR middle-end/110316
17457 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
17458 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
17459 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
17460 (timer::validate_phases): Use integral arithmetic to check
17462 (timer::print_row, timer::print): Convert from integral
17463 nanoseconds to floating point seconds before printing.
17464 (timer::all_zero): Change limit to nanosec count instead of
17465 fractional count of seconds.
17466 (make_json_for_timevar_time_def): Convert from integral
17467 nanoseconds to floating point seconds before recording.
17468 * timevar.h (struct timevar_time_def): Update all measurements
17469 to use uint64_t nanoseconds rather than seconds stored in a
17472 2023-08-04 Richard Biener <rguenther@suse.de>
17474 PR tree-optimization/110838
17475 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
17476 the arithmetic right-shift case to non-negative operands.
17478 2023-08-04 Pan Li <pan2.li@intel.com>
17481 2023-08-04 Pan Li <pan2.li@intel.com>
17483 * config/riscv/riscv-vector-builtins-bases.cc
17484 (class vfmacc_frm): New class for vfmacc frm.
17485 (vfmacc_frm_obj): New declaration.
17487 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17488 * config/riscv/riscv-vector-builtins-functions.def
17489 (vfmacc_frm): New function definition.
17490 * config/riscv/riscv-vector-builtins.cc
17491 (function_expander::use_ternop_insn): Add frm operand support.
17492 * config/riscv/vector.md: Add vfmuladd to frm_mode.
17494 2023-08-04 Pan Li <pan2.li@intel.com>
17497 2023-08-04 Pan Li <pan2.li@intel.com>
17499 * config/riscv/riscv-vector-builtins-bases.cc
17500 (class vfnmacc_frm): New class for vfnmacc.
17501 (vfnmacc_frm_obj): New declaration.
17503 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17504 * config/riscv/riscv-vector-builtins-functions.def
17505 (vfnmacc_frm): New function definition.
17507 2023-08-04 Pan Li <pan2.li@intel.com>
17510 2023-08-04 Pan Li <pan2.li@intel.com>
17512 * config/riscv/riscv-vector-builtins-bases.cc
17513 (class vfmsac_frm): New class for vfmsac frm.
17514 (vfmsac_frm_obj): New declaration.
17516 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17517 * config/riscv/riscv-vector-builtins-functions.def
17518 (vfmsac_frm): New function definition.
17520 2023-08-04 Pan Li <pan2.li@intel.com>
17523 2023-08-04 Pan Li <pan2.li@intel.com>
17525 * config/riscv/riscv-vector-builtins-bases.cc
17526 (class vfnmsac_frm): New class for vfnmsac frm.
17527 (vfnmsac_frm_obj): New declaration.
17529 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17530 * config/riscv/riscv-vector-builtins-functions.def
17531 (vfnmsac_frm): New function definition.
17533 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
17535 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
17536 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
17537 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
17538 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
17539 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
17540 (attiny102, attiny104): New devices.
17541 * doc/avr-mmcu.texi: Regenerate.
17543 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
17545 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
17546 and PM_OFFSET entries.
17548 2023-08-04 Andrew Pinski <apinski@marvell.com>
17550 PR tree-optimization/110874
17551 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
17552 (gimple_maybe_cmp): Likewise.
17553 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
17554 and gimple_maybe_cmp instead of being recursive.
17555 * match.pd (bit_not_with_nop): New match pattern.
17556 (maybe_cmp): Likewise.
17558 2023-08-04 Drew Ross <drross@redhat.com>
17560 PR middle-end/101955
17561 * match.pd ((signed x << c) >> c): New canonicalization.
17563 2023-08-04 Pan Li <pan2.li@intel.com>
17565 * config/riscv/riscv-vector-builtins-bases.cc
17566 (class vfnmsac_frm): New class for vfnmsac frm.
17567 (vfnmsac_frm_obj): New declaration.
17569 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17570 * config/riscv/riscv-vector-builtins-functions.def
17571 (vfnmsac_frm): New function definition.
17573 2023-08-04 Pan Li <pan2.li@intel.com>
17575 * config/riscv/riscv-vector-builtins-bases.cc
17576 (class vfmsac_frm): New class for vfmsac frm.
17577 (vfmsac_frm_obj): New declaration.
17579 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17580 * config/riscv/riscv-vector-builtins-functions.def
17581 (vfmsac_frm): New function definition.
17583 2023-08-04 Pan Li <pan2.li@intel.com>
17585 * config/riscv/riscv-vector-builtins-bases.cc
17586 (class vfnmacc_frm): New class for vfnmacc.
17587 (vfnmacc_frm_obj): New declaration.
17589 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17590 * config/riscv/riscv-vector-builtins-functions.def
17591 (vfnmacc_frm): New function definition.
17593 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
17596 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
17597 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
17599 2023-08-04 Pan Li <pan2.li@intel.com>
17601 * config/riscv/riscv-vector-builtins-bases.cc
17602 (class vfmacc_frm): New class for vfmacc frm.
17603 (vfmacc_frm_obj): New declaration.
17605 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
17606 * config/riscv/riscv-vector-builtins-functions.def
17607 (vfmacc_frm): New function definition.
17608 * config/riscv/riscv-vector-builtins.cc
17609 (function_expander::use_ternop_insn): Add frm operand support.
17610 * config/riscv/vector.md: Add vfmuladd to frm_mode.
17612 2023-08-04 Pan Li <pan2.li@intel.com>
17614 * config/riscv/riscv-vector-builtins-bases.cc
17615 (vfwmul_frm_obj): New declaration.
17616 (vfwmul_frm): Ditto.
17617 * config/riscv/riscv-vector-builtins-bases.h:
17618 (vfwmul_frm): Ditto.
17619 * config/riscv/riscv-vector-builtins-functions.def
17620 (vfwmul_frm): New function definition.
17621 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
17623 2023-08-04 Pan Li <pan2.li@intel.com>
17625 * config/riscv/riscv-vector-builtins-bases.cc
17626 (binop_frm): New declaration.
17627 (reverse_binop_frm): Likewise.
17629 * config/riscv/riscv-vector-builtins-bases.h:
17630 (vfdiv_frm): New extern declaration.
17631 (vfrdiv_frm): Likewise.
17632 * config/riscv/riscv-vector-builtins-functions.def
17633 (vfdiv_frm): New function definition.
17634 (vfrdiv_frm): Likewise.
17635 * config/riscv/vector.md: Add vfdiv to frm_mode.
17637 2023-08-03 Jan Hubicka <jh@suse.cz>
17639 * tree-cfg.cc (print_loop_info): Print entry count.
17641 2023-08-03 Jan Hubicka <jh@suse.cz>
17643 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
17645 2023-08-03 Jan Hubicka <jh@suse.cz>
17647 PR bootstrap/110857
17648 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
17649 unadjusted_exit_count.
17651 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
17653 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
17656 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
17658 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
17659 various Zicond patterns.
17660 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
17661 sfb_alu_operand for both arms of the conditional move.
17662 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17664 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
17670 * config.gcc: Added core-builtins.cc and .o files.
17671 * config/bpf/bpf-passes.def: Removed file.
17672 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
17673 bpf_replace_core_move_operands): New prototypes.
17674 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
17675 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
17676 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
17677 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
17678 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
17680 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
17681 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
17682 (mov_reloc_core<mode>): Added.
17683 * config/bpf/core-builtins.cc (struct cr_builtin, enum
17684 cr_decision struct cr_local, struct cr_final, struct
17685 core_builtin_helpers, enum bpf_plugin_states): Added types.
17686 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
17688 (allocate_builtin_data, get_builtin-data, search_builtin_data,
17689 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
17690 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
17691 bpf_core_get_index, compute_field_expr,
17692 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
17693 process_field_expr, pack_enum_value, process_enum_value, pack_type,
17694 process_type, bpf_require_core_support, make_core_relo, read_kind,
17695 kind_access_index, kind_preserve_field_info, kind_enum_value,
17696 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
17697 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
17698 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
17699 bpf_expand_core_builtin, bpf_add_core_reloc,
17700 bpf_replace_core_move_operands): Added functions.
17701 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
17702 (bpf_init_core_builtins, bpf_expand_core_builtin,
17703 bpf_resolve_overloaded_core_builtin): Added functions.
17704 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
17705 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
17706 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
17707 * config/bpf/t-bpf: Added core-builtins.o.
17708 * doc/extend.texi: Added documentation for new BPF builtins.
17710 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
17712 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
17713 ranges to the call to relation_fold_and_or.
17714 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
17715 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
17716 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
17717 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
17718 a varying op1 and op2 to call.
17719 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
17720 (operator_equal::op1_op2_relation): New float version.
17721 (operator_not_equal::op1_op2_relation): Ditto.
17722 (operator_lt::op1_op2_relation): Ditto.
17723 (operator_le::op1_op2_relation): Ditto.
17724 (operator_gt::op1_op2_relation): Ditto.
17725 (operator_ge::op1_op2_relation) Ditto.
17726 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
17728 (operator_not_equal::op1_op2_relation): Ditto.
17729 (operator_lt::op1_op2_relation): Ditto.
17730 (operator_le::op1_op2_relation): Ditto.
17731 (operator_gt::op1_op2_relation): Ditto.
17732 (operator_ge::op1_op2_relation): Ditto.
17733 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
17735 (range_operator::op1_op2_relation): Add extra params.
17736 (operator_equal::op1_op2_relation): Ditto.
17737 (operator_not_equal::op1_op2_relation): Ditto.
17738 (operator_lt::op1_op2_relation): Ditto.
17739 (operator_le::op1_op2_relation): Ditto.
17740 (operator_gt::op1_op2_relation): Ditto.
17741 (operator_ge::op1_op2_relation): Ditto.
17742 * range-op.h (range_operator): New prototypes.
17743 (range_op_handler): Ditto.
17745 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
17747 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
17748 Use identity relation.
17749 (gori_compute::compute_operand2_range): Ditto.
17750 * value-relation.cc (get_identity_relation): New.
17751 * value-relation.h (get_identity_relation): New prototype.
17753 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
17755 * value-range.h (Value_Range::set_varying): Set the type.
17756 (Value_Range::set_zero): Ditto.
17757 (Value_Range::set_nonzero): Ditto.
17759 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
17761 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
17764 2023-08-03 Pan Li <pan2.li@intel.com>
17766 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
17768 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
17770 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
17772 2023-08-03 Richard Biener <rguenther@suse.de>
17774 PR tree-optimization/110838
17775 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
17776 Adjust the shift operand of RSHIFT_EXPRs.
17778 2023-08-03 Richard Biener <rguenther@suse.de>
17780 PR tree-optimization/110702
17781 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
17782 we created a NULL pointer based access rewrite that to
17785 2023-08-03 Richard Biener <rguenther@suse.de>
17787 * tree-ssa-sink.cc: Include tree-ssa-live.h.
17788 (pass_sink_code::execute): Instantiate virtual_operand_live
17790 (sink_code_in_bb): Pass down virtual_operand_live.
17791 (statement_sink_location): Get virtual_operand_live and
17792 verify we are not sinking loads across stores by looking up
17793 the live virtual operand at the sink location.
17795 2023-08-03 Richard Biener <rguenther@suse.de>
17797 * tree-ssa-live.h (class virtual_operand_live): New.
17798 * tree-ssa-live.cc (virtual_operand_live::init): New.
17799 (virtual_operand_live::get_live_in): Likewise.
17800 (virtual_operand_live::get_live_out): Likewise.
17802 2023-08-03 Richard Biener <rguenther@suse.de>
17804 * passes.def: Exchange loop splitting and final value
17805 replacement passes.
17807 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
17809 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
17810 New function which handles bswap patterns for vec_perm_const.
17811 (vectorize_vec_perm_const_1): Call new function.
17812 * config/s390/vector.md (*bswap<mode>): Fix operands in output
17814 (*vstbr<mode>): New insn.
17816 2023-08-03 Alexandre Oliva <oliva@adacore.com>
17818 * config/vxworks-smp.opt: New. Introduce -msmp.
17819 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
17820 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
17821 lib_smp when -msmp is present in the command line.
17822 * doc/invoke.texi: Document it.
17824 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
17826 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
17827 when enabling -mno-omit-leaf-frame-pointer
17828 (riscv_option_override): Override omit-frame-pointer.
17829 (riscv_frame_pointer_required): Save s0 for non-leaf function
17830 (TARGET_FRAME_POINTER_REQUIRED): Override defination
17831 * config/riscv/riscv.opt: Add option support.
17833 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
17836 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
17837 place operand in a register before gen_<insn>64ti2_doubleword.
17838 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
17839 operand in a register before gen_<insn>32di2_doubleword.
17840 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
17841 (<any_rotate>64ti2_doubleword): Likewise.
17843 2023-08-03 Pan Li <pan2.li@intel.com>
17845 * config/riscv/riscv-vector-builtins-bases.cc
17846 (vfmul_frm_obj): New declaration.
17848 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
17849 * config/riscv/riscv-vector-builtins-functions.def
17850 (vfmul_frm): New function definition.
17851 * config/riscv/vector.md: Add vfmul to frm_mode.
17853 2023-08-03 Andrew Pinski <apinski@marvell.com>
17855 * match.pd (`~X & X`): Check that the types match.
17856 (`~x | x`, `~x ^ x`): Likewise.
17858 2023-08-03 Pan Li <pan2.li@intel.com>
17860 * config/riscv/riscv-vector-builtins-bases.h: Remove
17861 redudant declaration.
17863 2023-08-03 Pan Li <pan2.li@intel.com>
17865 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
17867 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
17868 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
17869 Add vfwsub function definitions.
17871 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
17873 PR rtl-optimization/110867
17874 * combine.cc (simplify_compare_const): Try the optimization only
17875 in case the constant fits into the comparison mode.
17877 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
17879 * config/riscv/zicond.md: Remove incorrect zicond patterns and
17880 renumber/rename them.
17881 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
17883 2023-08-02 Richard Biener <rguenther@suse.de>
17885 * tree-phinodes.h (add_phi_node_to_bb): Remove.
17886 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
17888 2023-08-02 Jan Beulich <jbeulich@suse.com>
17890 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
17891 two of the alternatives.
17893 2023-08-02 Richard Biener <rguenther@suse.de>
17895 PR tree-optimization/92335
17896 * tree-ssa-sink.cc (select_best_block): Before loop
17897 optimizations avoid sinking unconditional loads/stores
17898 in innermost loops to conditional executed places.
17900 2023-08-02 Andrew Pinski <apinski@marvell.com>
17902 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
17903 the comparison operands before comparing them.
17905 2023-08-02 Andrew Pinski <apinski@marvell.com>
17907 * match.pd (`~X & X`, `~X | X`): Move over to
17908 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
17909 handles that already.
17910 Remove range test simplifications to true/false as they
17911 are now handled by these patterns.
17913 2023-08-02 Andrew Pinski <apinski@marvell.com>
17915 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
17916 statement's lhs and rhs to check if trivial dead.
17917 Rename inserted_exprs to exprs_maybe_dce; also move it so
17918 bitmap is not allocated if not needed.
17920 2023-08-02 Pan Li <pan2.li@intel.com>
17922 * config/riscv/riscv-vector-builtins-bases.cc
17923 (class widen_binop_frm): New class for binop frm.
17924 (BASE): Add vfwadd_frm.
17925 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
17926 * config/riscv/riscv-vector-builtins-functions.def
17927 (vfwadd_frm): New function definition.
17928 * config/riscv/riscv-vector-builtins-shapes.cc
17929 (BASE_NAME_MAX_LEN): New macro.
17930 (struct alu_frm_def): Leverage new base class.
17931 (struct build_frm_base): New build base for frm.
17932 (struct widen_alu_frm_def): New struct for widen alu frm.
17933 (SHAPE): Add widen_alu_frm shape.
17934 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
17935 * config/riscv/vector.md (frm_mode): Add vfwalu type.
17937 2023-08-02 Jan Hubicka <jh@suse.cz>
17939 * cfgloop.h (loop_count_in): Declare.
17940 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
17941 (loop_count_in): Move here from ...
17942 * cfgloopmanip.cc (loop_count_in): ... here.
17943 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
17945 2023-08-02 Jan Hubicka <jh@suse.cz>
17947 * cfg.cc (scale_strictly_dominated_blocks): New function.
17948 * cfg.h (scale_strictly_dominated_blocks): Declare.
17949 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
17951 2023-08-02 Richard Biener <rguenther@suse.de>
17953 PR rtl-optimization/110587
17954 * lra-spills.cc (return_regno_p): Remove.
17955 (regno_in_use_p): Likewise.
17956 (lra_final_code_change): Do not remove noop moves
17957 between hard registers.
17959 2023-08-02 liuhongt <hongtao.liu@intel.com>
17962 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
17963 HFmode, use mode iterator VFH instead.
17964 (vec_fmsubadd<mode>4): Ditto.
17965 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
17966 Remove scalar mode from iterator, use VFH_AVX512VL instead.
17967 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
17970 2023-08-02 liuhongt <hongtao.liu@intel.com>
17972 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
17973 pre_reload define_insn_and_split.
17975 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
17977 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
17978 using Zicond to implement some conditional moves.
17980 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
17982 * config/riscv/zicond.md: Use the X iterator instead of ANYI
17983 on the comparison input operands.
17985 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
17987 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
17989 (case SET): For INSNs that just set a REG, take the cost from the
17991 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
17993 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
17995 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
17996 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
17997 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
17998 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
17999 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
18000 (OPTION_MASK_ISA_ABM_SET):
18001 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
18003 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
18005 * config/s390/s390.cc (s390_encode_section_info): Assume external
18006 symbols without explicit alignment to be unaligned if
18007 -munaligned-symbols has been specified.
18008 * config/s390/s390.opt (-munaligned-symbols): New option.
18010 2023-08-01 Richard Ball <richard.ball@arm.com>
18012 * gimple-fold.cc (fold_ctor_reference):
18013 Add support for poly_int.
18015 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
18018 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
18019 LABEL_NUSES of new conditional branch instruction.
18021 2023-08-01 Jan Hubicka <jh@suse.cz>
18023 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
18024 constant prologue peeling.
18026 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
18028 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
18030 2023-08-01 Pan Li <pan2.li@intel.com>
18031 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18033 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
18034 (STATIC_FRM_P): Ditto.
18035 (struct mode_switching_info): New struct for mode switching.
18036 (struct machine_function): Add new field mode switching.
18037 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
18038 (riscv_frm_adjust_mode_after_call): New function for call mode.
18039 (riscv_frm_emit_after_call_in_bb_end): New function for emit
18040 insn when call as the end of bb.
18041 (riscv_frm_mode_needed): New function for frm mode needed.
18042 (frm_unknown_dynamic_p): Remove call check.
18043 (riscv_mode_needed): Extrac function for frm.
18044 (riscv_frm_mode_after): Add DYN_CALL after.
18045 (riscv_mode_entry): Remove backup rtl initialization.
18046 * config/riscv/vector.md (frm_mode): Add dyn_call.
18047 (fsrmsi_restore_exit): Rename to _volatile.
18048 (fsrmsi_restore_volatile): Likewise.
18050 2023-08-01 Pan Li <pan2.li@intel.com>
18052 * config/riscv/riscv-vector-builtins-bases.cc
18053 (class reverse_binop_frm): Add new template for reversed frm.
18054 (vfsub_frm_obj): New obj.
18055 (vfrsub_frm_obj): Likewise.
18056 * config/riscv/riscv-vector-builtins-bases.h:
18057 (vfsub_frm): New declaration.
18058 (vfrsub_frm): Likewise.
18059 * config/riscv/riscv-vector-builtins-functions.def
18060 (vfsub_frm): New function define.
18061 (vfrsub_frm): Likewise.
18063 2023-08-01 Andrew Pinski <apinski@marvell.com>
18065 PR tree-optimization/93044
18066 * match.pd (nested int casts): A truncation (to the same size or smaller)
18067 can always remove the inner cast.
18069 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
18072 * doc/invoke.texi (-Wmissing-variable-declarations): Document
18075 2023-07-31 Andrew Pinski <apinski@marvell.com>
18077 PR tree-optimization/106164
18078 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
18079 `a == b | a < b`, `a == b | a > b`): Handle these cases
18082 2023-07-31 Andrew Pinski <apinski@marvell.com>
18084 PR tree-optimization/106164
18085 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
18086 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
18088 2023-07-31 Andrew Pinski <apinski@marvell.com>
18090 PR tree-optimization/100864
18091 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
18092 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
18093 (gimple_bitwise_inverted_equal_p): New function.
18094 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
18095 instead of direct matching bit_not.
18097 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
18100 * gcc-ar.cc (main): Expand argv and use
18101 temporary response file to call ar if any
18102 expansions were made.
18104 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
18106 PR tree-optimization/110582
18107 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
18108 range vector for non-ssa names.
18110 2023-07-31 David Malcolm <dmalcolm@redhat.com>
18113 * diagnostic-client-data-hooks.h (class sarif_object): New forward
18115 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
18117 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
18118 (class sarif_invocation): Inherit from sarif_object rather than
18120 (class sarif_result): Likewise.
18121 (class sarif_ice_notification): Likewise.
18122 (sarif_object::get_or_create_properties): New.
18123 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
18124 to call the context's add_sarif_invocation_properties hook.
18125 (sarif_builder::flush_to_file): Pass m_context to
18126 sarif_invocation::prepare_to_flush.
18127 * diagnostic-format-sarif.h: New header.
18128 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
18129 writes to stderr. Document that if SARIF diagnostic output is
18130 requested then any timing information is written in JSON form as
18131 part of the SARIF output, rather than to stderr.
18132 * timevar.cc: Include "json.h".
18133 (timer::named_items::m_hash_map): Split out type into...
18134 (timer::named_items::hash_map_t): ...this new typedef.
18135 (timer::named_items::make_json): New function.
18136 (timevar_diff): New function.
18137 (make_json_for_timevar_time_def): New function.
18138 (timer::timevar_def::make_json): New function.
18139 (timer::make_json): New function.
18140 * timevar.h (class json::value): New forward decl.
18141 (timer::make_json): New decl.
18142 (timer::timevar_def::make_json): New decl.
18143 * tree-diagnostic-client-data-hooks.cc: Include
18144 "diagnostic-format-sarif.h" and "timevar.h".
18145 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
18148 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
18150 * combine.cc (simplify_compare_const): Narrow comparison of
18151 memory and constant.
18152 (try_combine): Adapt new function signature.
18153 (simplify_comparison): Adapt new function signature.
18155 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
18157 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
18159 (expand_vector_init_insert_elems): Ditto.
18161 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
18164 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
18165 single_defuse_cycle while counting reduction_latency.
18167 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18169 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
18170 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
18171 (COND_ADD): Remove.
18176 (COND_RDIV): Ditto.
18179 (COND_FMIN): Ditto.
18180 (COND_FMAX): Ditto.
18188 (COND_FNMA): Ditto.
18189 (COND_FNMS): Ditto.
18191 (COND_LEN_ADD): Ditto.
18192 (COND_LEN_SUB): Ditto.
18193 (COND_LEN_MUL): Ditto.
18194 (COND_LEN_DIV): Ditto.
18195 (COND_LEN_MOD): Ditto.
18196 (COND_LEN_RDIV): Ditto.
18197 (COND_LEN_MIN): Ditto.
18198 (COND_LEN_MAX): Ditto.
18199 (COND_LEN_FMIN): Ditto.
18200 (COND_LEN_FMAX): Ditto.
18201 (COND_LEN_AND): Ditto.
18202 (COND_LEN_IOR): Ditto.
18203 (COND_LEN_XOR): Ditto.
18204 (COND_LEN_SHL): Ditto.
18205 (COND_LEN_SHR): Ditto.
18206 (COND_LEN_FMA): Ditto.
18207 (COND_LEN_FMS): Ditto.
18208 (COND_LEN_FNMA): Ditto.
18209 (COND_LEN_FNMS): Ditto.
18210 (COND_LEN_NEG): Ditto.
18211 (ADD): New macro define.
18232 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
18235 * config/i386/i386-features.cc (compute_convert_gain): Check
18236 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
18237 and V4SImode rotates in STV.
18238 (general_scalar_chain::convert_rotate): Likewise.
18240 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
18242 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
18243 * config/riscv/riscv-protos.h (get_mask_mode): Update return
18245 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
18247 (emit_vlmax_insn): Ditto.
18248 (emit_vlmax_fp_insn): Ditto.
18249 (emit_vlmax_ternary_insn): Ditto.
18250 (emit_vlmax_fp_ternary_insn): Ditto.
18251 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
18252 (emit_nonvlmax_insn): Ditto.
18253 (emit_vlmax_slide_insn): Ditto.
18254 (emit_nonvlmax_slide_tu_insn): Ditto.
18255 (emit_vlmax_merge_insn): Ditto.
18256 (emit_vlmax_masked_insn): Ditto.
18257 (emit_nonvlmax_masked_insn): Ditto.
18258 (emit_vlmax_masked_store_insn): Ditto.
18259 (emit_nonvlmax_masked_store_insn): Ditto.
18260 (emit_vlmax_masked_mu_insn): Ditto.
18261 (emit_nonvlmax_tu_insn): Ditto.
18262 (emit_nonvlmax_fp_tu_insn): Ditto.
18263 (emit_scalar_move_insn): Ditto.
18264 (emit_vlmax_compress_insn): Ditto.
18265 (emit_vlmax_reduction_insn): Ditto.
18266 (emit_vlmax_fp_reduction_insn): Ditto.
18267 (emit_nonvlmax_fp_reduction_insn): Ditto.
18268 (expand_vec_series): Ditto.
18269 (expand_vector_init_merge_repeating_sequence): Ditto.
18270 (expand_vec_perm): Ditto.
18271 (shuffle_merge_patterns): Ditto.
18272 (shuffle_compress_patterns): Ditto.
18273 (shuffle_decompress_patterns): Ditto.
18274 (expand_reduction): Ditto.
18275 (get_mask_mode): Update return type.
18276 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
18277 is valid, and use new get_mask_mode interface.
18279 2023-07-31 Pan Li <pan2.li@intel.com>
18281 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
18282 Move rm suffix before mask.
18284 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18286 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
18287 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
18290 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
18293 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
18294 (extzv<mode>): Likewise.
18295 (insv<mode>): Likewise.
18296 (*testqi_ext_3): Likewise.
18297 (*btr<mode>_2): Likewise.
18298 (define_split): Likewise.
18299 (*btsq_imm): Likewise.
18300 (*btrq_imm): Likewise.
18301 (*btcq_imm): Likewise.
18302 (define_peephole2 x3): Likewise.
18303 (*bt<mode>): Likewise
18304 (*bt<mode>_mask): New define_insn_and_split.
18305 (*jcc_bt<mode>): Use QImode for offsets.
18306 (*jcc_bt<mode>_1): Delete obsolete pattern.
18307 (*jcc_bt<mode>_mask): Use QImode offsets.
18308 (*jcc_bt<mode>_mask_1): Likewise.
18309 (define_split): Likewise.
18310 (*bt<mode>_setcqi): Likewise.
18311 (*bt<mode>_setncqi): Likewise.
18312 (*bt<mode>_setnc<mode>): Likewise.
18313 (*bt<mode>_setncqi_2): Likewise.
18314 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
18315 (bmi2_bzhi_<mode>3): Use QImode offsets.
18316 (*bmi2_bzhi_<mode>3): Likewise.
18317 (*bmi2_bzhi_<mode>3_1): Likewise.
18318 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
18319 (@tbm_bextri_<mode>): Likewise.
18321 2023-07-29 Jan Hubicka <jh@suse.cz>
18323 * profile-count.cc (profile_probability::sqrt): New member function.
18324 (profile_probability::pow): Likewise.
18325 * profile-count.h: (profile_probability::sqrt): Declare
18326 (profile_probability::pow): Likewise.
18327 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
18329 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
18331 * gimple-range-cache.cc (ssa_cache::merge_range): New.
18332 (ssa_lazy_cache::merge_range): New.
18333 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
18334 (class ssa_lazy_cache): Ditto.
18335 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
18337 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
18339 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
18340 Move from value-query.cc.
18341 (substitute_and_fold_engine::value_of_stmt): Ditto.
18342 (substitute_and_fold_engine::range_of_expr): New.
18343 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
18344 range_query. New prototypes.
18345 * value-query.cc (value_query::value_on_edge): Relocate.
18346 (value_query::value_of_stmt): Ditto.
18347 * value-query.h (class value_query): Remove.
18348 (class range_query): Remove base class. Adjust prototypes.
18350 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
18352 PR tree-optimization/110205
18353 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
18354 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
18355 Add final override.
18356 * range-op.cc (operator_lshift): Add missing final overrides.
18357 (operator_rshift): Ditto.
18359 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
18361 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
18362 optimizations in BPF target.
18364 2023-07-28 Honza <jh@ryzen4.suse.cz>
18366 * cfgloopmanip.cc (loop_count_in): Break out from ...
18367 (loop_exit_for_scaling): Break out from ...
18368 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
18369 add more sanity check and debug info.
18370 (scale_loop_profile): ... here.
18371 (create_empty_loop_on_edge): Fix whitespac.
18372 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
18373 * loop-unroll.cc (unroll_loop_constant_iterations): Use
18374 update_loop_exit_probability_scale_dom_bbs.
18375 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
18376 (tree_transform_and_unroll_loop): Use
18377 update_loop_exit_probability_scale_dom_bbs.
18378 * tree-ssa-loop-split.cc (split_loop): Use
18379 update_loop_exit_probability_scale_dom_bbs.
18381 2023-07-28 Jan Hubicka <jh@suse.cz>
18383 PR middle-end/77689
18384 * tree-ssa-loop-split.cc: Include value-query.h.
18385 (split_at_bb_p): Analyze cases where EQ/NE can be turned
18386 into LT/LE/GT/GE; return updated guard code.
18387 (split_loop): Use guard code.
18389 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
18390 Richard Biener <rguenther@suse.de>
18392 PR middle-end/28071
18393 PR rtl-optimization/110587
18394 * expr.cc (emit_group_load_1): Simplify logic for calling
18395 force_reg on ORIG_SRC, to avoid making a copy if the source
18396 is already in a pseudo register.
18398 2023-07-28 Jan Hubicka <jh@suse.cz>
18400 PR middle-end/106923
18401 * tree-ssa-loop-split.cc (connect_loops): Change probability
18402 of the test preconditioning second loop to very_likely.
18403 (fix_loop_bb_probability): Handle correctly case where
18404 on of the arms of the conditional is empty.
18405 (split_loop): Fold the test guarding first condition to
18406 see if it is constant true; Set correct entry block
18407 probabilities of the split loops; determine correct loop
18408 eixt probabilities.
18410 2023-07-28 xuli <xuli1@eswincomputing.com>
18412 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
18413 vsadd[u] and vssub[u].
18414 * config/riscv/vector.md: Ditto.
18416 2023-07-28 Jan Hubicka <jh@suse.cz>
18418 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
18419 loops when IV test is not overflowing.
18421 2023-07-28 liuhongt <hongtao.liu@intel.com>
18424 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
18426 (avx512cd_maskw_vec_dup<mode>): Ditto.
18428 2023-07-27 David Faust <david.faust@oracle.com>
18432 * config/bpf/bpf.opt (msmov): New option.
18433 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
18434 * config/bpf/bpf.md (*extendsidi2): New.
18435 (extendhidi2): New.
18436 (extendqidi2): New.
18437 (extendsisi2): New.
18438 (extendhisi2): New.
18439 (extendqisi2): New.
18440 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
18441 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
18442 also enables -msmov.
18444 2023-07-27 David Faust <david.faust@oracle.com>
18446 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
18447 Add -mbswap and -msdiv eBPF options.
18448 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
18449 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
18452 2023-07-27 David Faust <david.faust@oracle.com>
18454 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
18455 in pseudo-C dialect output template.
18456 (sub<AM:mode>3): Likewise.
18458 2023-07-27 Jan Hubicka <jh@suse.cz>
18460 * tree-vect-loop.cc (optimize_mask_stores): Make store
18463 2023-07-27 Jan Hubicka <jh@suse.cz>
18465 * cfgloop.h (single_dom_exit): Declare.
18466 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
18467 * cfgrtl.cc (struct cfg_hooks): Fix comment.
18468 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
18469 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
18470 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
18472 (tree_transform_and_unroll_loop): ... here;
18474 2023-07-27 Jan Hubicka <jh@suse.cz>
18476 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
18477 tree-ssa-loop-manip.cc and avoid recursion.
18478 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
18479 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
18481 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
18482 (scale_dominated_blocks_in_loop): Declare.
18483 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
18484 (change_edge_frequency): Remove.
18485 * predict.h (change_edge_frequency): Remove.
18486 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
18488 (niter_for_unrolled_loop): Remove.
18489 (tree_transform_and_unroll_loop): Fix profile update.
18491 2023-07-27 Jan Hubicka <jh@suse.cz>
18493 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
18494 to guessed; fix count of new_bb.
18496 2023-07-27 Jan Hubicka <jh@suse.cz>
18498 * profile-count.h (profile_count::apply_probability): Fix
18499 handling of uninitialized probabilities, optimize scaling
18502 2023-07-27 Richard Biener <rguenther@suse.de>
18504 PR tree-optimization/91838
18505 * gimple-match-head.cc: Include attribs.h and asan.h.
18506 * generic-match-head.cc: Likewise.
18507 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
18509 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18511 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
18512 (ADJUST_ALIGNMENT): Ditto.
18513 (ADJUST_PRECISION): Ditto.
18514 (VLS_MODES): Ditto.
18515 (VECTOR_MODE_WITH_PREFIX): Ditto.
18516 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
18517 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
18518 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
18519 (legitimize_move): Enable basic VLS modes support.
18520 (get_vlmul): Ditto.
18521 (get_ratio): Ditto.
18522 (get_vector_mode): Ditto.
18523 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
18524 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
18525 (VLS_ENTRY): New macro.
18526 (riscv_v_ext_mode_p): Add vls modes.
18527 (riscv_get_v_regno_alignment): New function.
18528 (riscv_print_operand): Add vls modes.
18529 (riscv_hard_regno_nregs): Ditto.
18530 (riscv_hard_regno_mode_ok): Ditto.
18531 (riscv_regmode_natural_size): Ditto.
18532 (riscv_vectorize_preferred_vector_alignment): Ditto.
18533 * config/riscv/riscv.md: Ditto.
18534 * config/riscv/vector-iterators.md: Ditto.
18535 * config/riscv/vector.md: Ditto.
18536 * config/riscv/autovec-vls.md: New file.
18538 2023-07-27 Pan Li <pan2.li@intel.com>
18540 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
18541 (vread_csr): Ditto.
18542 (vwrite_csr): Ditto.
18544 2023-07-27 demin.han <demin.han@starfivetech.com>
18546 * config/riscv/autovec.md: Delete which_alternative use in split
18548 2023-07-27 Richard Biener <rguenther@suse.de>
18550 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
18552 (pass_sink_code::execute): ... in the caller.
18554 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
18555 Richard Biener <rguenther@suse.de>
18557 PR tree-optimization/110776
18558 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
18561 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
18563 * config/riscv/riscv.md: Include zicond.md
18564 * config/riscv/zicond.md: New file.
18566 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
18568 * common/config/riscv/riscv-common.cc: New extension.
18569 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
18570 (TARGET_ZICOND): New target.
18572 2023-07-26 Carl Love <cel@us.ibm.com>
18574 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
18575 specifies the number of built-in arguments to check.
18576 (altivec_resolve_overloaded_builtin): Update calls to find_instance
18577 to pass the number of built-in arguments to be checked.
18579 2023-07-26 David Faust <david.faust@oracle.com>
18581 * config/bpf/bpf.opt (mv3-atomics): New option.
18582 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
18583 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
18584 (REG_CLASS_NAMES): Likewise.
18585 (REG_CLASS_CONTENTS): Likewise.
18586 (REGNO_REG_CLASS): Handle R0.
18587 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
18588 (UNSPEC_AAND): New unspec.
18589 (UNSPEC_AOR): Likewise.
18590 (UNSPEC_AXOR): Likewise.
18591 (UNSPEC_AFADD): Likewise.
18592 (UNSPEC_AFAND): Likewise.
18593 (UNSPEC_AFOR): Likewise.
18594 (UNSPEC_AFXOR): Likewise.
18595 (UNSPEC_AXCHG): Likewise.
18596 (UNSPEC_ACMPX): Likewise.
18597 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
18599 * config/bpf/atomic.md: ...Here. New file.
18600 * config/bpf/constraints.md (t): New constraint for R0.
18601 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
18603 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
18605 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
18608 2023-07-26 Carl Love <cel@us.ibm.com>
18610 * config/rs6000/rs6000-builtins.def: Rename
18611 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
18612 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
18613 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
18614 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
18615 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
18616 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
18617 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
18618 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
18619 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
18620 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
18621 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
18622 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
18623 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
18624 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
18625 * config/rs6000/rs6000-c.cc (find_instance): Add case
18626 RS6000_OVLD_VEC_REPLACE_UN.
18627 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
18628 Fix first argument type. Rename VREPLACE_UN_UV4SI as
18629 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
18630 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
18631 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
18632 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
18633 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
18634 REPLACE_ELT_V for vector modes.
18635 (REPLACE_ELT): New scalar mode iterator.
18636 (REPLACE_ELT_char): Add scalar attributes.
18637 (vreplace_un_<mode>): Change iterator and mode attribute.
18639 2023-07-26 David Malcolm <dmalcolm@redhat.com>
18642 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
18644 2023-07-26 Richard Biener <rguenther@suse.de>
18646 PR tree-optimization/106081
18647 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
18648 Assign layout -1 to splats.
18650 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
18652 * range-op-mixed.h (class operator_cast): Add update_bitmask.
18653 * range-op.cc (operator_cast::update_bitmask): New.
18654 (operator_cast::fold_range): Call update_bitmask.
18656 2023-07-26 Li Xu <xuli1@eswincomputing.com>
18658 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
18659 scalar type to float16, eliminate warning.
18660 (vfloat16mf4x3_t): Ditto.
18661 (vfloat16mf4x4_t): Ditto.
18662 (vfloat16mf4x5_t): Ditto.
18663 (vfloat16mf4x6_t): Ditto.
18664 (vfloat16mf4x7_t): Ditto.
18665 (vfloat16mf4x8_t): Ditto.
18666 (vfloat16mf2x2_t): Ditto.
18667 (vfloat16mf2x3_t): Ditto.
18668 (vfloat16mf2x4_t): Ditto.
18669 (vfloat16mf2x5_t): Ditto.
18670 (vfloat16mf2x6_t): Ditto.
18671 (vfloat16mf2x7_t): Ditto.
18672 (vfloat16mf2x8_t): Ditto.
18673 (vfloat16m1x2_t): Ditto.
18674 (vfloat16m1x3_t): Ditto.
18675 (vfloat16m1x4_t): Ditto.
18676 (vfloat16m1x5_t): Ditto.
18677 (vfloat16m1x6_t): Ditto.
18678 (vfloat16m1x7_t): Ditto.
18679 (vfloat16m1x8_t): Ditto.
18680 (vfloat16m2x2_t): Ditto.
18681 (vfloat16m2x3_t): Ditto.
18682 (vfloat16m2x4_t): Ditto.
18683 (vfloat16m4x2_t): Ditto.
18684 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
18685 * config/riscv/vector.md: add tuple mode in attr sew.
18687 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
18690 * config/i386/i386.md (plusminusmult): New code iterator.
18691 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
18692 (movq_<mode>_to_sse): New expander.
18693 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
18694 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
18695 as a wrapper around V4SFmode operation.
18696 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
18697 nonimmediate_operand.
18698 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
18699 operand 2 predicates to nonimmediate_operand.
18700 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
18701 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
18702 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
18703 operand 2 predicates to nonimmediate_operand.
18704 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
18705 nonimmediate_operand.
18706 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
18707 operand 2 predicates to nonimmediate_operand.
18708 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
18709 (<smaxmin:code>v2sf3): Ditto.
18710 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
18711 predicates to nonimmediate_operand.
18712 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
18713 operand 1 and operand 2 predicates to nonimmediate_operand.
18714 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
18715 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
18716 (*mmx_haddv2sf3_low): Ditto.
18717 (*mmx_hsubv2sf3_low): Ditto.
18718 (vec_addsubv2sf3): Ditto.
18719 (*mmx_maskcmpv2sf3_comm): Remove.
18720 (*mmx_maskcmpv2sf3): Remove.
18721 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
18722 (vcond<V2FI:mode>v2sf): Ditto.
18725 (fnmav2sf4): Ditto.
18726 (fnmsv2sf4): Ditto.
18727 (fix_truncv2sfv2si2): Ditto.
18728 (fixuns_truncv2sfv2si2): Ditto.
18729 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
18730 Change operand 1 predicate to nonimmediate_operand.
18731 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
18732 (floatunsv2siv2sf2): Ditto.
18733 (mmx_floatv2siv2sf2): Remove SSE alternatives.
18734 Change operand 1 predicate to nonimmediate_operand.
18735 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
18736 (rintv2sf2): Ditto.
18737 (lrintv2sfv2si2): Ditto.
18738 (ceilv2sf2): Ditto.
18739 (lceilv2sfv2si2): Ditto.
18740 (floorv2sf2): Ditto.
18741 (lfloorv2sfv2si2): Ditto.
18742 (btruncv2sf2): Ditto.
18743 (roundv2sf2): Ditto.
18744 (lroundv2sfv2si2): Ditto.
18745 (*mmx_roundv2sf2): Remove.
18747 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
18749 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
18751 2023-07-26 Richard Biener <rguenther@suse.de>
18753 PR tree-optimization/110799
18754 * tree-ssa-pre.cc (compute_avail): More thoroughly match
18755 up TBAA behavior of redundant loads.
18757 2023-07-26 Jakub Jelinek <jakub@redhat.com>
18759 PR tree-optimization/110755
18760 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
18761 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
18762 it is exact op1 + (-op1) or op1 - op1.
18764 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
18767 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
18768 operands output with "x".
18770 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
18772 * range-op.cc (class operator_absu): Add update_bitmask.
18773 (operator_absu::update_bitmask): New.
18775 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
18777 * range-op-mixed.h (class operator_abs): Add update_bitmask.
18778 * range-op.cc (operator_abs::update_bitmask): New.
18780 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
18782 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
18783 * range-op.cc (operator_bitwise_not::update_bitmask): New.
18785 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
18787 * range-op.cc (update_known_bitmask): Handle unary operators.
18789 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
18791 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
18793 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
18795 * config/riscv/riscv.md: Likewise.
18797 2023-07-26 Jan Hubicka <jh@suse.cz>
18799 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
18800 if we divide by zero.
18802 2023-07-25 David Faust <david.faust@oracle.com>
18804 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
18805 enclosing parentheses for pseudo-C dialect.
18806 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
18807 operands of pseudo-C dialect output templates where needed.
18808 (zero_extendqidi2): Likewise.
18809 (zero_extendsidi2): Likewise.
18810 (*mov<MM:mode>): Likewise.
18812 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
18814 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
18815 (bit_value_mult_const): Same.
18816 (get_individual_bits): Same.
18818 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
18821 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
18822 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
18823 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
18824 (minmax_op): New int attribute.
18825 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
18826 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
18827 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
18828 pattern to fmaxdf3.
18829 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
18831 2023-07-24 David Faust <david.faust@oracle.com>
18833 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
18835 2023-07-24 Drew Ross <drross@redhat.com>
18836 Jakub Jelinek <jakub@redhat.com>
18838 PR middle-end/109986
18839 * generic-match-head.cc (bitwise_equal_p): New macro.
18840 * gimple-match-head.cc (bitwise_equal_p): New macro.
18841 (gimple_nop_convert): Declare.
18842 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
18843 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
18845 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
18847 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
18848 single quote rather than backquote in diagnostic.
18850 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
18853 * config/bpf/bpf.opt: New command-line option -msdiv.
18854 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
18855 * config/bpf/bpf.cc (bpf_option_override): Initialize
18857 * doc/invoke.texi (eBPF Options): Document -msdiv.
18859 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
18861 * config/riscv/riscv.cc (riscv_option_override): Spell out
18862 greater than and use cannot in diagnostic string.
18864 2023-07-24 Richard Biener <rguenther@suse.de>
18866 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
18867 (_slp_tree::vec_stmts): Remove.
18868 (SLP_TREE_VEC_STMTS): Remove.
18869 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
18870 (_slp_tree::_slp_tree): Adjust.
18871 (_slp_tree::~_slp_tree): Likewise.
18872 (vect_get_slp_vect_def): Simplify.
18873 (vect_get_slp_defs): Likewise.
18874 (vect_transform_slp_perm_load_1): Adjust.
18875 (vect_add_slp_permutation): Likewise.
18876 (vect_schedule_slp_node): Likewise.
18877 (vectorize_slp_instance_root_stmt): Likewise.
18878 (vect_schedule_scc): Likewise.
18879 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
18880 (vectorizable_call): Likewise.
18881 (vectorizable_call): Likewise.
18882 (vect_create_vectorized_demotion_stmts): Likewise.
18883 (vectorizable_conversion): Likewise.
18884 (vectorizable_assignment): Likewise.
18885 (vectorizable_shift): Likewise.
18886 (vectorizable_operation): Likewise.
18887 (vectorizable_load): Likewise.
18888 (vectorizable_condition): Likewise.
18889 (vectorizable_comparison): Likewise.
18890 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
18891 (vectorize_fold_left_reduction): Use push_vec_def.
18892 (vect_transform_reduction): Likewise.
18893 (vect_transform_cycle_phi): Likewise.
18894 (vectorizable_lc_phi): Likewise.
18895 (vectorizable_phi): Likewise.
18896 (vectorizable_recurr): Likewise.
18897 (vectorizable_induction): Likewise.
18898 (vectorizable_live_operation): Likewise.
18900 2023-07-24 Richard Biener <rguenther@suse.de>
18902 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
18904 2023-07-24 Richard Biener <rguenther@suse.de>
18906 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
18907 * config/i386/i386-expand.cc: Likewise.
18908 * config/i386/i386-features.cc: Likewise.
18909 * config/i386/i386-options.cc: Likewise.
18911 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
18913 * tree-vect-stmts.cc (vectorizable_conversion): Handle
18914 more demotion/promotion for modifier == NONE.
18916 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
18921 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
18922 (extzv<mode>): Likewise.
18923 (insv<mode>): Likewise.
18924 (*testqi_ext_3): Likewise.
18925 (*btr<mode>_2): Likewise.
18926 (define_split): Likewise.
18927 (*btsq_imm): Likewise.
18928 (*btrq_imm): Likewise.
18929 (*btcq_imm): Likewise.
18930 (define_peephole2 x3): Likewise.
18931 (*bt<mode>): Likewise
18932 (*bt<mode>_mask): New define_insn_and_split.
18933 (*jcc_bt<mode>): Use QImode for offsets.
18934 (*jcc_bt<mode>_1): Delete obsolete pattern.
18935 (*jcc_bt<mode>_mask): Use QImode offsets.
18936 (*jcc_bt<mode>_mask_1): Likewise.
18937 (define_split): Likewise.
18938 (*bt<mode>_setcqi): Likewise.
18939 (*bt<mode>_setncqi): Likewise.
18940 (*bt<mode>_setnc<mode>): Likewise.
18941 (*bt<mode>_setncqi_2): Likewise.
18942 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
18943 (bmi2_bzhi_<mode>3): Use QImode offsets.
18944 (*bmi2_bzhi_<mode>3): Likewise.
18945 (*bmi2_bzhi_<mode>3_1): Likewise.
18946 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
18947 (@tbm_bextri_<mode>): Likewise.
18949 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
18951 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
18952 * config/bpf/bpf.opt (mkernel): Remove option.
18953 * config/bpf/bpf.cc (bpf_target_macros): Do not define
18954 BPF_KERNEL_VERSION_CODE.
18956 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
18959 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
18960 (mbswap): New option.
18961 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
18962 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
18963 * config/bpf/bpf.md: Use bswap instructions if available for
18964 bswap* insn, and fix constraint.
18965 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
18967 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18969 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
18970 (mask_len_fold_left_plus_<mode>): Ditto.
18971 * config/riscv/riscv-protos.h (enum insn_type): New enum.
18972 (enum reduction_type): Ditto.
18973 (expand_reduction): Add in-order reduction.
18974 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
18975 (expand_reduction): Add in-order reduction.
18977 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18979 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
18980 (vectorize_fold_left_reduction): Ditto.
18981 (vectorizable_reduction): Ditto.
18982 (vect_transform_reduction): Ditto.
18984 2023-07-24 Richard Biener <rguenther@suse.de>
18986 PR tree-optimization/110777
18987 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
18988 Avoid propagating abnormals.
18990 2023-07-24 Richard Biener <rguenther@suse.de>
18992 PR tree-optimization/110766
18993 * tree-scalar-evolution.cc
18994 (analyze_and_compute_bitwise_induction_effect): Check the PHI
18995 is defined in the loop header.
18997 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
18999 PR tree-optimization/110740
19000 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
19001 loop with a single scalar iteration.
19003 2023-07-24 Pan Li <pan2.li@intel.com>
19005 * config/riscv/riscv-vector-builtins-shapes.cc
19006 (struct alu_frm_def): Take range check.
19008 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
19011 * config/riscv/predicates.md (const_0_operand): Add back
19014 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
19016 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
19017 64-bit insertions into TImode optimizations with -O0, unless
19018 the function has the "naked" attribute (for PR target/110533).
19020 2023-07-22 Andrew Pinski <apinski@marvell.com>
19023 * rtl.h (extended_count): Change last argument type
19026 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
19028 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
19029 (extzv<mode>): Likewise.
19030 (insv<mode>): Likewise.
19031 (*testqi_ext_3): Likewise.
19032 (*btr<mode>_2): Likewise.
19033 (define_split): Likewise.
19034 (*btsq_imm): Likewise.
19035 (*btrq_imm): Likewise.
19036 (*btcq_imm): Likewise.
19037 (define_peephole2 x3): Likewise.
19038 (*bt<mode>): Likewise
19039 (*bt<mode>_mask): New define_insn_and_split.
19040 (*jcc_bt<mode>): Use QImode for offsets.
19041 (*jcc_bt<mode>_1): Delete obsolete pattern.
19042 (*jcc_bt<mode>_mask): Use QImode offsets.
19043 (*jcc_bt<mode>_mask_1): Likewise.
19044 (define_split): Likewise.
19045 (*bt<mode>_setcqi): Likewise.
19046 (*bt<mode>_setncqi): Likewise.
19047 (*bt<mode>_setnc<mode>): Likewise.
19048 (*bt<mode>_setncqi_2): Likewise.
19049 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
19050 (bmi2_bzhi_<mode>3): Use QImode offsets.
19051 (*bmi2_bzhi_<mode>3): Likewise.
19052 (*bmi2_bzhi_<mode>3_1): Likewise.
19053 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
19054 (@tbm_bextri_<mode>): Likewise.
19056 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
19058 * config/bfin/bfin.md (ones): Fix length computation.
19060 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
19062 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
19063 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
19064 instead of FRAME_POINTER_REGNUM to spill pseudos.
19066 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
19067 Richard Biener <rguenther@suse.de>
19070 * gimplify.cc (gimplify_compound_lval): If the array's type
19071 is error_mark_node then return GS_ERROR.
19073 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
19076 * config/bpf/bpf.opt: Added option -masm=<dialect>.
19077 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
19078 * config/bpf/bpf.cc (bpf_print_register): New function.
19079 (bpf_print_register): Support pseudo-c syntax for registers.
19080 (bpf_print_operand_address): Likewise.
19081 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
19082 (ASSEMBLER_DIALECT): Define.
19083 * config/bpf/bpf.md: Added pseudo-c templates.
19084 * doc/invoke.texi (-masm=): New eBPF option item.
19086 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
19088 * config/bpf/bpf.md: fixed template for neg instruction.
19090 2023-07-21 Jan Hubicka <jh@suse.cz>
19093 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
19094 profiles by vectorization factor.
19095 (vect_transform_loop): Check for flat profiles.
19097 2023-07-21 Jan Hubicka <jh@suse.cz>
19099 * cfgloop.h (maybe_flat_loop_profile): Declare
19100 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
19101 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
19103 2023-07-21 Jan Hubicka <jh@suse.cz>
19105 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
19106 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
19107 * predict.cc (estimate_bb_frequencies): Likewise.
19108 * profile.cc (branch_prob): Likewise.
19109 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
19111 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
19113 * config.in: Regenerate.
19114 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
19115 (LINK_COMMAND_SPEC_A): Add demangle handling.
19116 * configure: Regenerate.
19117 * configure.ac: Detect linker support for '-demangle'.
19119 2023-07-21 Jan Hubicka <jh@suse.cz>
19121 * sreal.cc (sreal::to_nearest_int): New.
19122 (sreal_verify_basics): Verify also to_nearest_int.
19123 (verify_aritmetics): Likewise.
19124 (sreal_verify_conversions): New.
19125 (sreal_cc_tests): Call sreal_verify_conversions.
19126 * sreal.h: (sreal::to_nearest_int): Declare
19128 2023-07-21 Jan Hubicka <jh@suse.cz>
19130 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
19131 (should_duplicate_loop_header_p): Return info on profitability.
19132 (do_while_loop_p): Watch for constant conditionals.
19133 (update_profile_after_ch): Do not sanity check that all
19134 static exits are taken.
19135 (ch_base::copy_headers): Run on all loops.
19136 (pass_ch::process_loop_p): Improve heuristics by handling also
19137 do_while loop and duplicating shortest sequence containing all
19140 2023-07-21 Jan Hubicka <jh@suse.cz>
19142 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
19143 tests first; update finite_p flag.
19145 2023-07-21 Jan Hubicka <jh@suse.cz>
19147 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
19148 * cfgloop.h (print_loop_info): Declare.
19149 * tree-cfg.cc (print_loop_info): Break out from ...; add
19150 printing of missing fields and profile
19151 (print_loop): ... here.
19153 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19155 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
19157 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19159 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
19160 (vectorizable_operation): Ditto.
19162 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19164 * config/riscv/autovec.md: Align order of mask and len.
19165 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
19166 (expand_gather_scatter): Ditto.
19167 * doc/md.texi: Ditto.
19168 * internal-fn.cc (add_len_and_mask_args): Ditto.
19169 (add_mask_and_len_args): Ditto.
19170 (expand_partial_load_optab_fn): Ditto.
19171 (expand_partial_store_optab_fn): Ditto.
19172 (expand_scatter_store_optab_fn): Ditto.
19173 (expand_gather_load_optab_fn): Ditto.
19174 (internal_fn_len_index): Ditto.
19175 (internal_fn_mask_index): Ditto.
19176 (internal_len_load_store_bias): Ditto.
19177 * tree-vect-stmts.cc (vectorizable_store): Ditto.
19178 (vectorizable_load): Ditto.
19180 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19182 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
19183 (mask_len_load<mode><vm>): Ditto.
19184 (len_maskstore<mode><vm>): Ditto.
19185 (mask_len_store<mode><vm>): Ditto.
19186 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
19187 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
19188 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
19189 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
19190 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
19191 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
19192 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
19193 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
19194 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
19195 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
19196 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
19197 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
19198 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
19199 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
19200 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
19201 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
19202 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
19203 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
19204 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
19205 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
19206 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
19207 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
19208 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
19209 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
19210 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
19211 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
19212 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
19213 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
19214 * doc/md.texi: Ditto.
19215 * genopinit.cc (main): Ditto.
19216 (CMP_NAME): Ditto. Ditto.
19217 * gimple-fold.cc (arith_overflowed_p): Ditto.
19218 (gimple_fold_partial_load_store_mem_ref): Ditto.
19219 (gimple_fold_call): Ditto.
19220 * internal-fn.cc (len_maskload_direct): Ditto.
19221 (mask_len_load_direct): Ditto.
19222 (len_maskstore_direct): Ditto.
19223 (mask_len_store_direct): Ditto.
19224 (expand_call_mem_ref): Ditto.
19225 (expand_len_maskload_optab_fn): Ditto.
19226 (expand_mask_len_load_optab_fn): Ditto.
19227 (expand_len_maskstore_optab_fn): Ditto.
19228 (expand_mask_len_store_optab_fn): Ditto.
19229 (direct_len_maskload_optab_supported_p): Ditto.
19230 (direct_mask_len_load_optab_supported_p): Ditto.
19231 (direct_len_maskstore_optab_supported_p): Ditto.
19232 (direct_mask_len_store_optab_supported_p): Ditto.
19233 (internal_load_fn_p): Ditto.
19234 (internal_store_fn_p): Ditto.
19235 (internal_gather_scatter_fn_p): Ditto.
19236 (internal_fn_len_index): Ditto.
19237 (internal_fn_mask_index): Ditto.
19238 (internal_fn_stored_value_index): Ditto.
19239 (internal_len_load_store_bias): Ditto.
19240 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
19241 (MASK_LEN_GATHER_LOAD): Ditto.
19242 (LEN_MASK_LOAD): Ditto.
19243 (MASK_LEN_LOAD): Ditto.
19244 (LEN_MASK_SCATTER_STORE): Ditto.
19245 (MASK_LEN_SCATTER_STORE): Ditto.
19246 (LEN_MASK_STORE): Ditto.
19247 (MASK_LEN_STORE): Ditto.
19248 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
19249 (supports_vec_scatter_store_p): Ditto.
19250 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
19251 (target_supports_len_load_store_p): Ditto.
19252 * optabs.def (OPTAB_CD): Ditto.
19253 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
19254 (call_may_clobber_ref_p_1): Ditto.
19255 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
19256 (dse_optimize_stmt): Ditto.
19257 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
19258 (get_alias_ptr_type_for_ptr_address): Ditto.
19259 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
19260 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
19261 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
19262 (vect_get_strided_load_store_ops): Ditto.
19263 (vectorizable_store): Ditto.
19264 (vectorizable_load): Ditto.
19266 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
19268 * config/i386/i386.opt: Fix a typo.
19270 2023-07-21 Richard Biener <rguenther@suse.de>
19272 PR tree-optimization/88540
19273 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
19274 with NaNs but handle the simple case by if-converting to a
19277 2023-07-21 Andrew Pinski <apinski@marvell.com>
19279 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
19282 2023-07-21 Richard Biener <rguenther@suse.de>
19284 PR tree-optimization/110742
19285 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
19286 Do not materialize an edge permutation in an external node with
19288 (vect_slp_analyze_node_operations_1): Guard purely internal
19291 2023-07-21 Jan Hubicka <jh@suse.cz>
19293 * cfgloop.cc: Include sreal.h.
19294 (flow_loop_dump): Dump sreal iteration exsitmate.
19295 (get_estimated_loop_iterations): Update.
19296 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
19297 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
19298 (expected_loop_iterations_unbounded): Use new API.
19299 * cfgloopmanip.cc (scale_loop_profile): Use
19300 expected_loop_iterations_by_profile
19301 * predict.cc (pass_profile::execute): Likewise.
19302 * profile.cc (branch_prob): Likewise.
19303 * tree-ssa-loop-niter.cc: Include sreal.h.
19304 (estimate_numbers_of_iterations): Likewise
19306 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
19308 PR tree-optimization/110744
19309 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
19310 operand for ifn IFN_LEN_STORE.
19312 2023-07-21 liuhongt <hongtao.liu@intel.com>
19315 * common.opt: (fcf-protection=): Add EnumSet attribute to
19316 support combination of params.
19318 2023-07-21 David Malcolm <dmalcolm@redhat.com>
19320 PR middle-end/110612
19321 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
19323 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
19324 (table_geometry::table_y_to_canvas_y): Likewise.
19325 * text-art/table.h (table_geometry::m_table): Drop unused field.
19326 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
19329 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
19332 * config/i386/i386-features.cc
19333 (general_scalar_chain::compute_convert_gain): Calculate gain
19334 for extend higpart case.
19335 (general_scalar_chain::convert_op): Handle
19336 ASHIFTRT/ASHIFT combined RTX.
19337 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
19338 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
19339 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
19340 New define_insn_and_split pattern.
19341 (*extendv2di2_highpart_stv): Ditto.
19343 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
19345 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
19348 2023-07-20 Andrew Pinski <apinski@marvell.com>
19350 * combine.cc (dump_combine_stats): Remove.
19351 (dump_combine_total_stats): Remove.
19352 (total_attempts, total_merges, total_extras,
19353 total_successes): Remove.
19354 (combine_instructions): Don't increment total stats
19355 instead use statistics_counter_event.
19356 * dumpfile.cc (print_combine_total_stats): Remove.
19357 * dumpfile.h (print_combine_total_stats): Remove.
19358 (dump_combine_total_stats): Remove.
19359 * passes.cc (finish_optimization_passes):
19360 Don't call print_combine_total_stats.
19361 * rtl.h (dump_combine_total_stats): Remove.
19362 (dump_combine_stats): Remove.
19364 2023-07-20 Jan Hubicka <jh@suse.cz>
19366 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
19369 2023-07-20 Martin Jambor <mjambor@suse.cz>
19371 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
19372 (analyzer-text-art-ideal-canvas-width): Likewise.
19373 (analyzer-text-art-string-ellipsis-head-len): Likewise.
19374 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
19376 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19378 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
19379 Refine code structure.
19381 2023-07-20 Jan Hubicka <jh@suse.cz>
19383 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
19384 (get_range_query): ... this one; do
19385 (static_loop_exit): Add query parametr, turn ranger to reference.
19386 (loop_static_stmt_p): New function.
19387 (loop_static_op_p): New function.
19388 (loop_iv_derived_p): Remove.
19389 (loop_combined_static_and_iv_p): New function.
19390 (should_duplicate_loop_header_p): Discover combined onditionals;
19391 do not track iv derived; improve dumps.
19392 (pass_ch::execute): Fix whitespace.
19394 2023-07-20 Richard Biener <rguenther@suse.de>
19396 PR tree-optimization/110204
19397 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
19398 Look through copies generated by PRE.
19400 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
19402 * tree-vect-stmts.cc (get_group_load_store_type): Account for
19403 `gap` when checking if need to peel twice.
19405 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
19407 PR middle-end/77928
19408 * doc/extend.texi: Document iseqsig builtin.
19409 * builtins.cc (fold_builtin_iseqsig): New function.
19410 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
19411 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
19412 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
19414 2023-07-20 Pan Li <pan2.li@intel.com>
19416 * config/riscv/vector.md: Fix incorrect match_operand.
19418 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
19420 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
19421 force_reg, to use SUBREG rather than create a new pseudo when
19422 inserting DFmode fields into TImode with insvti_{high,low}part.
19423 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
19424 define_insn_and_split...
19425 (*concatditi3_3): 64-bit implementation. Provide alternative
19426 that allows register allocation to use SSE registers that is
19427 split into vec_concatv2di after reload.
19428 (*concatsidi3_3): 32-bit implementation.
19430 2023-07-20 Richard Biener <rguenther@suse.de>
19432 PR middle-end/61747
19433 * internal-fn.cc (expand_vec_cond_optab_fn): When the
19434 value operands are equal to the original comparison operands
19435 preserve that equality by re-using the comparison expansion.
19436 * optabs.cc (emit_conditional_move): When the value operands
19437 are equal to the comparison operands and would be forced to
19438 a register by prepare_cmp_insn do so earlier, preserving the
19441 2023-07-20 Pan Li <pan2.li@intel.com>
19443 * config/riscv/vector.md: Align pattern format.
19445 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
19447 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
19448 Granite Rapids{, D} from documentation.
19450 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19452 * config/riscv/autovec.md
19453 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
19454 Refactor RVV machine modes.
19455 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
19456 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19457 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
19458 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19459 (len_mask_gather_load<mode><mode>): Ditto.
19460 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
19461 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19462 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19463 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
19464 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19465 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
19466 (len_mask_scatter_store<mode><mode>): Ditto.
19467 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
19468 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
19469 (ADJUST_NUNITS): Ditto.
19470 (ADJUST_ALIGNMENT): Ditto.
19471 (ADJUST_BYTESIZE): Ditto.
19472 (ADJUST_PRECISION): Ditto.
19473 (RVV_MODES): Ditto.
19474 (RVV_WHOLE_MODES): Ditto.
19475 (RVV_FRACT_MODE): Ditto.
19476 (RVV_NF8_MODES): Ditto.
19477 (RVV_NF4_MODES): Ditto.
19478 (VECTOR_MODES_WITH_PREFIX): Ditto.
19479 (VECTOR_MODE_WITH_PREFIX): Ditto.
19480 (RVV_TUPLE_MODES): Ditto.
19481 (RVV_NF2_MODES): Ditto.
19482 (RVV_TUPLE_PARTIAL_MODES): Ditto.
19483 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
19485 (TUPLE_ENTRY): Ditto.
19486 (get_vlmul): Ditto.
19488 (get_ratio): Ditto.
19489 (preferred_simd_mode): Ditto.
19490 (autovectorize_vector_modes): Ditto.
19491 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
19492 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
19493 (vbool64_t): Ditto.
19494 (vbool32_t): Ditto.
19495 (vbool16_t): Ditto.
19500 (vint8mf8_t): Ditto.
19501 (vuint8mf8_t): Ditto.
19502 (vint8mf4_t): Ditto.
19503 (vuint8mf4_t): Ditto.
19504 (vint8mf2_t): Ditto.
19505 (vuint8mf2_t): Ditto.
19506 (vint8m1_t): Ditto.
19507 (vuint8m1_t): Ditto.
19508 (vint8m2_t): Ditto.
19509 (vuint8m2_t): Ditto.
19510 (vint8m4_t): Ditto.
19511 (vuint8m4_t): Ditto.
19512 (vint8m8_t): Ditto.
19513 (vuint8m8_t): Ditto.
19514 (vint16mf4_t): Ditto.
19515 (vuint16mf4_t): Ditto.
19516 (vint16mf2_t): Ditto.
19517 (vuint16mf2_t): Ditto.
19518 (vint16m1_t): Ditto.
19519 (vuint16m1_t): Ditto.
19520 (vint16m2_t): Ditto.
19521 (vuint16m2_t): Ditto.
19522 (vint16m4_t): Ditto.
19523 (vuint16m4_t): Ditto.
19524 (vint16m8_t): Ditto.
19525 (vuint16m8_t): Ditto.
19526 (vint32mf2_t): Ditto.
19527 (vuint32mf2_t): Ditto.
19528 (vint32m1_t): Ditto.
19529 (vuint32m1_t): Ditto.
19530 (vint32m2_t): Ditto.
19531 (vuint32m2_t): Ditto.
19532 (vint32m4_t): Ditto.
19533 (vuint32m4_t): Ditto.
19534 (vint32m8_t): Ditto.
19535 (vuint32m8_t): Ditto.
19536 (vint64m1_t): Ditto.
19537 (vuint64m1_t): Ditto.
19538 (vint64m2_t): Ditto.
19539 (vuint64m2_t): Ditto.
19540 (vint64m4_t): Ditto.
19541 (vuint64m4_t): Ditto.
19542 (vint64m8_t): Ditto.
19543 (vuint64m8_t): Ditto.
19544 (vfloat16mf4_t): Ditto.
19545 (vfloat16mf2_t): Ditto.
19546 (vfloat16m1_t): Ditto.
19547 (vfloat16m2_t): Ditto.
19548 (vfloat16m4_t): Ditto.
19549 (vfloat16m8_t): Ditto.
19550 (vfloat32mf2_t): Ditto.
19551 (vfloat32m1_t): Ditto.
19552 (vfloat32m2_t): Ditto.
19553 (vfloat32m4_t): Ditto.
19554 (vfloat32m8_t): Ditto.
19555 (vfloat64m1_t): Ditto.
19556 (vfloat64m2_t): Ditto.
19557 (vfloat64m4_t): Ditto.
19558 (vfloat64m8_t): Ditto.
19559 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
19560 (TUPLE_ENTRY): Ditto.
19561 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
19562 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
19563 (riscv_v_adjust_nunits): Ditto.
19564 (riscv_v_adjust_bytesize): Ditto.
19565 (riscv_v_adjust_precision): Ditto.
19566 (riscv_convert_vector_bits): Ditto.
19567 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
19568 * config/riscv/riscv.md: Ditto.
19569 * config/riscv/vector-iterators.md: Ditto.
19570 * config/riscv/vector.md
19571 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
19572 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
19573 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
19574 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
19575 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
19576 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
19577 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
19578 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
19579 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
19580 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
19581 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
19582 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
19583 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
19584 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
19585 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
19586 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
19587 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
19588 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
19589 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
19590 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
19591 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
19592 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
19593 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
19594 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
19595 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
19596 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
19597 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
19598 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
19599 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
19600 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
19601 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
19602 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
19603 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
19605 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
19607 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
19608 (lra_asm_insn_error): New prototype.
19609 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
19611 (lra_spill): Call lra_update_fp2sp_elimination.
19612 * lra-eliminations.cc: Remove trailing spaces.
19613 (elimination_fp2sp_occured_p): New static flag.
19614 (lra_eliminate_regs_1): Set the flag up.
19615 (update_reg_eliminate): Modify the assert for stack to frame
19616 pointer elimination.
19617 (lra_update_fp2sp_elimination): New function.
19618 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
19620 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
19622 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
19624 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
19625 dependencies from target pragmas.
19626 * config/aarch64/arm_fp16.h (target): Likewise.
19627 * config/aarch64/arm_neon.h (target): Likewise.
19629 2023-07-19 Andrew Pinski <apinski@marvell.com>
19631 PR tree-optimization/110252
19632 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
19633 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
19634 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
19635 (match_simplify_replacement): Temporarily
19636 remove the flow sensitive info on the two statements that might
19639 2023-07-19 Andrew Pinski <apinski@marvell.com>
19641 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
19642 with flow_sensitive_info_storage.
19643 (follow_outer_ssa_edges): Update how to save off the flow
19645 (maybe_fold_comparisons_from_match_pd): Update restoring
19646 of flow sensitive info.
19647 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
19648 (flow_sensitive_info_storage::restore): New method.
19649 (flow_sensitive_info_storage::save_and_clear): New method.
19650 (flow_sensitive_info_storage::clear_storage): New method.
19651 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
19653 2023-07-19 Andrew Pinski <apinski@marvell.com>
19655 PR tree-optimization/110726
19656 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
19657 Add checks to make sure the type was one bit precision
19660 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19662 * doc/md.texi: Add mask_len_fold_left_plus.
19663 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
19664 (expand_mask_len_fold_left_optab_fn): Ditto.
19665 (direct_mask_len_fold_left_optab_supported_p): Ditto.
19666 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
19667 * optabs.def (OPTAB_D): Ditto.
19669 2023-07-19 Jakub Jelinek <jakub@redhat.com>
19671 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
19673 2023-07-19 Jakub Jelinek <jakub@redhat.com>
19675 PR tree-optimization/110731
19676 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
19677 divisor as UNSIGNED regardless of sgn.
19679 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
19681 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
19682 (standard_extensions_p): Add check.
19683 (riscv_subset_list::add): Just return NULL if it failed before.
19684 (riscv_subset_list::parse_std_ext): Continue parse when find a error
19685 (riscv_subset_list::parse): Just return NULL if it failed before.
19686 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
19688 2023-07-19 Jan Beulich <jbeulich@suse.com>
19690 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
19692 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
19693 gen_vec_extract_hi.
19694 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
19695 gen_vec_interleave_low. Rename local variable.
19697 2023-07-19 Jan Beulich <jbeulich@suse.com>
19699 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
19700 alternative. Move AVX512VL part of condition to new "enabled"
19703 2023-07-19 liuhongt <hongtao.liu@intel.com>
19706 * config/i386/i386-builtins.cc
19707 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
19708 (ix86_register_bf16_builtin_type): Ditto.
19709 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
19710 isn't available, undef the macros which are used to check the
19711 backend support of the _Float16/__bf16 types when building
19712 libstdc++ and libgcc.
19713 * config/i386/i386.cc (construct_container): Issue errors for
19714 HFmode/BFmode when TARGET_SSE2 is not available.
19715 (function_value_32): Ditto.
19716 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
19717 (ix86_libgcc_floating_mode_supported_p): Ditto.
19718 (ix86_emit_support_tinfos): Adjust codes.
19719 (ix86_invalid_conversion): Return diagnostic message string
19720 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
19721 (ix86_invalid_unary_op): New function.
19722 (ix86_invalid_binary_op): Ditto.
19723 (TARGET_INVALID_UNARY_OP): Define.
19724 (TARGET_INVALID_BINARY_OP): Define.
19725 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
19726 related instrinsics header files.
19727 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
19729 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
19731 * dwarf2asm.cc: Change FALSE to false.
19732 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
19733 * dwarf2out.cc (matches_main_base): Change return type from
19734 int to bool. Change "last_match" variable to bool.
19735 (dump_struct_debug): Change return type from int to bool.
19736 Change "matches" and "result" function arguments to bool.
19737 (is_pseudo_reg): Change return type from int to bool.
19738 (is_tagged_type): Ditto.
19739 (same_loc_p): Ditto.
19740 (same_dw_val_p): Change return type from int to bool and adjust
19741 function body accordingly.
19742 (same_attr_p): Ditto.
19743 (same_die_p): Ditto.
19744 (is_type_die): Ditto.
19745 (is_declaration_die): Ditto.
19746 (should_move_die_to_comdat): Ditto.
19747 (is_base_type): Ditto.
19748 (is_based_loc): Ditto.
19749 (local_scope_p): Ditto.
19750 (class_scope_p): Ditto.
19751 (class_or_namespace_scope_p): Ditto.
19752 (is_tagged_type): Ditto.
19753 (is_rust): Use void argument.
19754 (is_nested_in_subprogram): Change return type from int to bool.
19755 (contains_subprogram_definition): Ditto.
19756 (gen_struct_or_union_type_die): Change "nested", "complete"
19757 and "ns_decl" variables to bool.
19758 (is_naming_typedef_decl): Change FALSE to false.
19760 2023-07-18 Jan Hubicka <jh@suse.cz>
19762 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
19763 for queries not in headers.
19764 (static_loop_exit): Add basic blck parameter; update use of
19766 (should_duplicate_loop_header_p): Add ranger and static_exits
19767 parameter. Do not account statements that will be optimized
19768 out after duplicaiton in overall size. Add ranger query to
19770 (update_profile_after_ch): Take static_exits has set instead of
19771 single eliminated_edge.
19772 (ch_base::copy_headers): Do all analysis in the first pass;
19773 remember invariant_exits and static_exits.
19775 2023-07-18 Jason Merrill <jason@redhat.com>
19777 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
19779 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
19781 * doc/gm2.texi (Semantic checking): Change example testwithptr
19784 2023-07-18 Richard Biener <rguenther@suse.de>
19786 PR middle-end/105715
19787 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
19788 (pass_gimple_isel::execute): ... this. Duplicate
19789 comparison defs of COND_EXPRs.
19791 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19793 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
19794 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
19795 (riscv_convert_vector_bits): Ditto.
19797 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19799 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
19800 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
19802 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
19804 * config/s390/vx-builtins.md: New vsel pattern.
19806 2023-07-18 liuhongt <hongtao.liu@intel.com>
19809 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
19810 Remove # from assemble output.
19812 2023-07-18 liuhongt <hongtao.liu@intel.com>
19815 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
19816 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
19817 3 define_peephole2 after the pattern.
19819 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19821 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
19823 2023-07-18 Pan Li <pan2.li@intel.com>
19824 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19826 * config/riscv/riscv.cc (struct machine_function): Add new field.
19827 (riscv_static_frm_mode_p): New function.
19828 (riscv_emit_frm_mode_set): New function for emit FRM.
19829 (riscv_emit_mode_set): Extract function for FRM.
19830 (riscv_mode_needed): Fix the TODO.
19831 (riscv_mode_entry): Initial dynamic frm RTL.
19832 (riscv_mode_exit): Return DYN_EXIT.
19833 * config/riscv/riscv.md: Add rdfrm.
19834 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
19835 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
19837 (fsrmsi_backup): New pattern for swap.
19838 (fsrmsi_restore): New pattern for restore.
19839 (fsrmsi_restore_exit): New pattern for restore exit.
19840 (frrmsi): New pattern for backup.
19842 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
19844 * doc/extend.texi: Add @cindex on __auto_type.
19846 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
19848 * combine-stack-adj.cc (stack_memref_p): Change return type from
19849 int to bool and adjust function body accordingly.
19850 (rest_of_handle_stack_adjustments): Change return type to void.
19852 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
19854 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
19855 (cant_combine_insn_p): Change return type from int to bool and adjust
19856 function body accordingly.
19857 (can_combine_p): Ditto.
19858 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
19859 function arguments from int to bool.
19860 (contains_muldiv): Change return type from int to bool and adjust
19861 function body accordingly.
19862 (try_combine): Ditto. Change "new_direct_jump" pointer function
19863 argument from int to bool. Change "substed_i2", "substed_i1",
19864 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
19865 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
19866 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
19867 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
19868 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
19869 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
19871 (subst): Change "in_dest", "in_cond" and "unique_copy" function
19872 arguments from int to bool.
19873 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
19874 arguments from int to bool.
19875 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
19876 function argument from int to bool.
19877 (force_int_to_mode): Change "just_select" function argument
19878 from int to bool. Change "next_select" variable to bool.
19879 (rtx_equal_for_field_assignment_p): Change return type from
19880 int to bool and adjust function body accordingly.
19881 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
19882 argument from int to bool.
19883 (get_last_value_validate): Change return type from int to bool
19884 and adjust function body accordingly.
19885 (reg_dead_at_p): Ditto.
19886 (reg_bitfield_target_p): Ditto.
19887 (combine_instructions): Ditto. Change "new_direct_jump"
19889 (can_combine_p): Change return type from int to bool
19890 and adjust function body accordingly.
19891 (likely_spilled_retval_p): Ditto.
19892 (can_change_dest_mode): Change "added_sets" function argument
19894 (find_split_point): Change "unsignedp" variable to bool.
19895 (simplify_if_then_else): Change "comparison_p" and "swapped"
19897 (simplify_set): Change "other_changed" variable to bool.
19898 (expand_compound_operation): Change "unsignedp" variable to bool.
19899 (force_to_mode): Change "just_select" function argument
19900 from int to bool. Change "next_select" variable to bool.
19901 (extended_count): Change "unsignedp" function argument to bool.
19902 (simplify_shift_const_1): Change "complement_p" variable to bool.
19903 (simplify_comparison): Change "changed" variable to bool.
19904 (rest_of_handle_combine): Change return type to void.
19906 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
19909 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
19911 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
19913 * ira.cc (setup_reg_class_relations): Continue
19914 if regclass cl3 is hard_reg_set_empty_p.
19916 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19918 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
19920 2023-07-17 Martin Jambor <mjambor@suse.cz>
19922 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
19925 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
19927 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
19929 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
19932 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
19933 recur add all implied extensions.
19934 (riscv_subset_list::check_implied_ext): Add new method.
19935 (riscv_subset_list::parse): Call checker check_implied_ext.
19936 * config/riscv/riscv-subset.h: Add new method.
19938 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19940 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
19941 (reduc_smax_scal_<mode>): Ditto.
19942 (reduc_umax_scal_<mode>): Ditto.
19943 (reduc_smin_scal_<mode>): Ditto.
19944 (reduc_umin_scal_<mode>): Ditto.
19945 (reduc_and_scal_<mode>): Ditto.
19946 (reduc_ior_scal_<mode>): Ditto.
19947 (reduc_xor_scal_<mode>): Ditto.
19948 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
19949 (expand_reduction): New function.
19950 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
19951 (emit_vlmax_fp_reduction_insn): Ditto.
19952 (get_m1_mode): Ditto.
19953 (expand_cond_len_binop): Fix name.
19954 (expand_reduction): New function
19955 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
19956 (validate_change_or_fail): New function.
19957 (change_insn): Fix VSETVL BUG.
19958 (change_vsetvl_insn): Ditto.
19959 (pass_vsetvl::backward_demand_fusion): Ditto.
19960 (pass_vsetvl::df_post_optimization): Ditto.
19962 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
19964 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
19966 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
19968 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
19969 Remove parameter name from declaration of unused parameter.
19971 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
19973 PR tree-optimization/110652
19974 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
19977 2023-07-17 Richard Biener <rguenther@suse.de>
19979 PR tree-optimization/110669
19980 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
19981 Check we matched a header PHI.
19983 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
19985 * tree-ssanames.cc (set_bitmask): New.
19986 * tree-ssanames.h (set_bitmask): New.
19988 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
19990 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
19992 * value-range.h (irange_bitmask::union_): Normalize beforehand.
19993 (irange_bitmask::intersect): Same.
19995 2023-07-17 Andrew Pinski <apinski@marvell.com>
19997 PR tree-optimization/95923
19998 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
20000 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
20002 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
20003 to the std::sort comparison lambda function const.
20005 2023-07-17 Andrew Pinski <apinski@marvell.com>
20007 PR tree-optimization/110666
20008 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
20010 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
20012 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
20013 Arrow Lake and Arrow Lake S.
20014 * common/config/i386/i386-common.cc:
20015 (processor_name): Add arrowlake.
20016 (processor_alias_table): Add arrow lake, arrow lake s and lunar
20018 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
20019 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
20020 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
20021 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
20023 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
20025 * config/i386/i386-options.cc (m_ARROWLAKE): New.
20026 (processor_cost_table): Add arrowlake.
20027 * config/i386/i386.h (enum processor_type):
20028 Add PROCESSOR_ARROWLAKE.
20029 * config/i386/x86-tune.def: Add m_ARROWLAKE.
20030 * doc/extend.texi: Add arrowlake and arrowlake-s.
20031 * doc/invoke.texi: Ditto.
20033 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20035 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
20036 have the same iterator. Also renaming all the occurence to
20038 (usdot_prod<mode>): New define_expand.
20039 (udot_prod<mode>): Ditto.
20041 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20043 * common/config/i386/cpuinfo.h (get_available_features):
20045 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
20046 OPTION_MASK_ISA2_SM4_UNSET): New.
20047 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
20048 (ix86_handle_option): Handle -msm4.
20049 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20051 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20053 * config.gcc: Add sm4intrin.h.
20054 * config/i386/cpuid.h (bit_SM4): New.
20055 * config/i386/i386-builtin.def (BDESC): Add new builtins.
20056 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20058 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
20059 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
20060 (ix86_valid_target_attribute_inner_p): Handle sm4.
20061 * config/i386/i386.opt: Add option -msm4.
20062 * config/i386/immintrin.h: Include sm4intrin.h
20063 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
20064 (vsm4rnds4_<mode>): Ditto.
20065 * doc/extend.texi: Document sm4.
20066 * doc/invoke.texi: Document -msm4.
20067 * doc/sourcebuild.texi: Document target sm4.
20068 * config/i386/sm4intrin.h: New file.
20070 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20072 * common/config/i386/cpuinfo.h (get_available_features):
20074 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
20075 OPTION_MASK_ISA2_SHA512_UNSET): New.
20076 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
20077 (ix86_handle_option): Handle -msha512.
20078 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20079 Add FEATURE_SHA512.
20080 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20082 * config.gcc: Add sha512intrin.h.
20083 * config/i386/cpuid.h (bit_SHA512): New.
20084 * config/i386/i386-builtin-types.def:
20085 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
20086 * config/i386/i386-builtin.def (BDESC): Add new builtins.
20087 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20089 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
20090 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
20091 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
20092 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
20093 (ix86_valid_target_attribute_inner_p): Handle sha512.
20094 * config/i386/i386.opt: Add option -msha512.
20095 * config/i386/immintrin.h: Include sha512intrin.h.
20096 * config/i386/sse.md (vsha512msg1): New define insn.
20097 (vsha512msg2): Ditto.
20098 (vsha512rnds2): Ditto.
20099 * doc/extend.texi: Document sha512.
20100 * doc/invoke.texi: Document -msha512.
20101 * doc/sourcebuild.texi: Document target sha512.
20102 * config/i386/sha512intrin.h: New file.
20104 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
20106 * common/config/i386/cpuinfo.h (get_available_features):
20108 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
20109 OPTION_MASK_ISA2_SM3_UNSET): New.
20110 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
20111 (ix86_handle_option): Handle -msm3.
20112 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20114 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20116 * config.gcc: Add sm3intrin.h
20117 * config/i386/cpuid.h (bit_SM3): New.
20118 * config/i386/i386-builtin-types.def:
20119 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
20120 * config/i386/i386-builtin.def (BDESC): Add new builtins.
20121 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20123 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
20124 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
20125 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
20126 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
20127 (ix86_valid_target_attribute_inner_p): Handle sm3.
20128 * config/i386/i386.opt: Add option -msm3.
20129 * config/i386/immintrin.h: Include sm3intrin.h.
20130 * config/i386/sse.md (vsm3msg1): New define insn.
20132 (vsm3rnds2): Ditto.
20133 * doc/extend.texi: Document sm3.
20134 * doc/invoke.texi: Document -msm3.
20135 * doc/sourcebuild.texi: Document target sm3.
20136 * config/i386/sm3intrin.h: New file.
20138 2023-07-17 Kong Lingling <lingling.kong@intel.com>
20139 Haochen Jiang <haochen.jiang@intel.com>
20141 * common/config/i386/cpuinfo.h (get_available_features): Detect
20143 * common/config/i386/i386-common.cc
20144 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
20145 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
20146 (ix86_handle_option): Handle -mavxvnniint16.
20147 * common/config/i386/i386-cpuinfo.h (enum processor_features):
20148 Add FEATURE_AVXVNNIINT16.
20149 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
20151 * config.gcc: Add avxvnniint16.h.
20152 * config/i386/avxvnniint16intrin.h: New file.
20153 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
20154 * config/i386/i386-builtin.def: Add new builtins.
20155 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
20157 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
20158 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
20159 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
20160 * config/i386/i386.opt: Add option -mavxvnniint16.
20161 * config/i386/immintrin.h: Include avxvnniint16.h.
20162 * config/i386/sse.md
20163 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
20164 * doc/extend.texi: Document avxvnniint16.
20165 * doc/invoke.texi: Document -mavxvnniint16.
20166 * doc/sourcebuild.texi: Document target avxvnniint16.
20168 2023-07-16 Jan Hubicka <jh@suse.cz>
20170 PR middle-end/110649
20171 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
20172 (vect_transform_loop): Move scale_profile_for_vect_loop after
20173 upper bound updates.
20175 2023-07-16 Jan Hubicka <jh@suse.cz>
20177 PR tree-optimization/110649
20178 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
20179 probability of the if-then-else construct.
20181 2023-07-16 Jan Hubicka <jh@suse.cz>
20183 PR middle-end/110649
20184 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
20186 2023-07-15 Andrew Pinski <apinski@marvell.com>
20188 * doc/contrib.texi: Update my entry.
20190 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
20192 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
20194 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
20195 (tld_load): Likewise.
20196 (tgd_load_pic): Change to expander.
20197 (tld_load_pic, tld_offset_load, tp_load): Likewise.
20198 (tie_load_pic, tle_load): Likewise.
20199 (tgd_load_picsi, tgd_load_picdi): New.
20200 (tld_load_picsi, tld_load_picdi): New.
20201 (tld_offset_load<P:mode>): New.
20202 (tp_load<P:mode>): New.
20203 (tie_load_picsi, tie_load_picdi): New.
20204 (tle_load<P:mode>): New.
20206 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20208 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
20209 (vcmlaq_rot180, vcmlaq_rot270): New.
20210 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
20211 (vcmlaq_rot180, vcmlaq_rot270): New.
20212 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
20213 (vcmlaq_rot180, vcmlaq_rot270): New.
20214 * config/arm/arm-mve-builtins.cc
20215 (function_instance::has_inactive_argument): Handle vcmlaq,
20216 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
20217 * config/arm/arm_mve.h (vcmlaq): Delete.
20218 (vcmlaq_rot180): Delete.
20219 (vcmlaq_rot270): Delete.
20220 (vcmlaq_rot90): Delete.
20221 (vcmlaq_m): Delete.
20222 (vcmlaq_rot180_m): Delete.
20223 (vcmlaq_rot270_m): Delete.
20224 (vcmlaq_rot90_m): Delete.
20225 (vcmlaq_f16): Delete.
20226 (vcmlaq_rot180_f16): Delete.
20227 (vcmlaq_rot270_f16): Delete.
20228 (vcmlaq_rot90_f16): Delete.
20229 (vcmlaq_f32): Delete.
20230 (vcmlaq_rot180_f32): Delete.
20231 (vcmlaq_rot270_f32): Delete.
20232 (vcmlaq_rot90_f32): Delete.
20233 (vcmlaq_m_f32): Delete.
20234 (vcmlaq_m_f16): Delete.
20235 (vcmlaq_rot180_m_f32): Delete.
20236 (vcmlaq_rot180_m_f16): Delete.
20237 (vcmlaq_rot270_m_f32): Delete.
20238 (vcmlaq_rot270_m_f16): Delete.
20239 (vcmlaq_rot90_m_f32): Delete.
20240 (vcmlaq_rot90_m_f16): Delete.
20241 (__arm_vcmlaq_f16): Delete.
20242 (__arm_vcmlaq_rot180_f16): Delete.
20243 (__arm_vcmlaq_rot270_f16): Delete.
20244 (__arm_vcmlaq_rot90_f16): Delete.
20245 (__arm_vcmlaq_f32): Delete.
20246 (__arm_vcmlaq_rot180_f32): Delete.
20247 (__arm_vcmlaq_rot270_f32): Delete.
20248 (__arm_vcmlaq_rot90_f32): Delete.
20249 (__arm_vcmlaq_m_f32): Delete.
20250 (__arm_vcmlaq_m_f16): Delete.
20251 (__arm_vcmlaq_rot180_m_f32): Delete.
20252 (__arm_vcmlaq_rot180_m_f16): Delete.
20253 (__arm_vcmlaq_rot270_m_f32): Delete.
20254 (__arm_vcmlaq_rot270_m_f16): Delete.
20255 (__arm_vcmlaq_rot90_m_f32): Delete.
20256 (__arm_vcmlaq_rot90_m_f16): Delete.
20257 (__arm_vcmlaq): Delete.
20258 (__arm_vcmlaq_rot180): Delete.
20259 (__arm_vcmlaq_rot270): Delete.
20260 (__arm_vcmlaq_rot90): Delete.
20261 (__arm_vcmlaq_m): Delete.
20262 (__arm_vcmlaq_rot180_m): Delete.
20263 (__arm_vcmlaq_rot270_m): Delete.
20264 (__arm_vcmlaq_rot90_m): Delete.
20266 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20268 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
20269 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
20270 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
20271 (mve_insn): Add vcmla.
20272 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
20274 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
20276 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
20277 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
20278 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
20279 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
20281 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
20283 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20285 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
20286 (vcmulq_rot180, vcmulq_rot270): New.
20287 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
20288 (vcmulq_rot180, vcmulq_rot270): New.
20289 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
20290 (vcmulq_rot180, vcmulq_rot270): New.
20291 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
20292 (vcmulq_rot270): Delete.
20293 (vcmulq_rot180): Delete.
20295 (vcmulq_m): Delete.
20296 (vcmulq_rot180_m): Delete.
20297 (vcmulq_rot270_m): Delete.
20298 (vcmulq_rot90_m): Delete.
20299 (vcmulq_x): Delete.
20300 (vcmulq_rot90_x): Delete.
20301 (vcmulq_rot180_x): Delete.
20302 (vcmulq_rot270_x): Delete.
20303 (vcmulq_rot90_f16): Delete.
20304 (vcmulq_rot270_f16): Delete.
20305 (vcmulq_rot180_f16): Delete.
20306 (vcmulq_f16): Delete.
20307 (vcmulq_rot90_f32): Delete.
20308 (vcmulq_rot270_f32): Delete.
20309 (vcmulq_rot180_f32): Delete.
20310 (vcmulq_f32): Delete.
20311 (vcmulq_m_f32): Delete.
20312 (vcmulq_m_f16): Delete.
20313 (vcmulq_rot180_m_f32): Delete.
20314 (vcmulq_rot180_m_f16): Delete.
20315 (vcmulq_rot270_m_f32): Delete.
20316 (vcmulq_rot270_m_f16): Delete.
20317 (vcmulq_rot90_m_f32): Delete.
20318 (vcmulq_rot90_m_f16): Delete.
20319 (vcmulq_x_f16): Delete.
20320 (vcmulq_x_f32): Delete.
20321 (vcmulq_rot90_x_f16): Delete.
20322 (vcmulq_rot90_x_f32): Delete.
20323 (vcmulq_rot180_x_f16): Delete.
20324 (vcmulq_rot180_x_f32): Delete.
20325 (vcmulq_rot270_x_f16): Delete.
20326 (vcmulq_rot270_x_f32): Delete.
20327 (__arm_vcmulq_rot90_f16): Delete.
20328 (__arm_vcmulq_rot270_f16): Delete.
20329 (__arm_vcmulq_rot180_f16): Delete.
20330 (__arm_vcmulq_f16): Delete.
20331 (__arm_vcmulq_rot90_f32): Delete.
20332 (__arm_vcmulq_rot270_f32): Delete.
20333 (__arm_vcmulq_rot180_f32): Delete.
20334 (__arm_vcmulq_f32): Delete.
20335 (__arm_vcmulq_m_f32): Delete.
20336 (__arm_vcmulq_m_f16): Delete.
20337 (__arm_vcmulq_rot180_m_f32): Delete.
20338 (__arm_vcmulq_rot180_m_f16): Delete.
20339 (__arm_vcmulq_rot270_m_f32): Delete.
20340 (__arm_vcmulq_rot270_m_f16): Delete.
20341 (__arm_vcmulq_rot90_m_f32): Delete.
20342 (__arm_vcmulq_rot90_m_f16): Delete.
20343 (__arm_vcmulq_x_f16): Delete.
20344 (__arm_vcmulq_x_f32): Delete.
20345 (__arm_vcmulq_rot90_x_f16): Delete.
20346 (__arm_vcmulq_rot90_x_f32): Delete.
20347 (__arm_vcmulq_rot180_x_f16): Delete.
20348 (__arm_vcmulq_rot180_x_f32): Delete.
20349 (__arm_vcmulq_rot270_x_f16): Delete.
20350 (__arm_vcmulq_rot270_x_f32): Delete.
20351 (__arm_vcmulq_rot90): Delete.
20352 (__arm_vcmulq_rot270): Delete.
20353 (__arm_vcmulq_rot180): Delete.
20354 (__arm_vcmulq): Delete.
20355 (__arm_vcmulq_m): Delete.
20356 (__arm_vcmulq_rot180_m): Delete.
20357 (__arm_vcmulq_rot270_m): Delete.
20358 (__arm_vcmulq_rot90_m): Delete.
20359 (__arm_vcmulq_x): Delete.
20360 (__arm_vcmulq_rot90_x): Delete.
20361 (__arm_vcmulq_rot180_x): Delete.
20362 (__arm_vcmulq_rot270_x): Delete.
20364 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20366 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
20367 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
20368 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
20369 (MVE_VCADDQ_VCMULQ_M): New.
20370 (mve_insn): Add vcmul.
20371 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
20374 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
20376 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
20377 @mve_<mve_insn>q<mve_rot>_f<mode>.
20378 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
20379 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
20380 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
20382 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20384 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
20385 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
20386 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
20387 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
20388 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
20389 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
20390 * config/arm/arm-mve-builtins-functions.h (class
20391 unspec_mve_function_exact_insn_rot): New.
20392 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
20393 (vcaddq_rot270): Delete.
20394 (vhcaddq_rot90): Delete.
20395 (vhcaddq_rot270): Delete.
20396 (vcaddq_rot270_m): Delete.
20397 (vcaddq_rot90_m): Delete.
20398 (vhcaddq_rot270_m): Delete.
20399 (vhcaddq_rot90_m): Delete.
20400 (vcaddq_rot90_x): Delete.
20401 (vcaddq_rot270_x): Delete.
20402 (vhcaddq_rot90_x): Delete.
20403 (vhcaddq_rot270_x): Delete.
20404 (vcaddq_rot90_u8): Delete.
20405 (vcaddq_rot270_u8): Delete.
20406 (vhcaddq_rot90_s8): Delete.
20407 (vhcaddq_rot270_s8): Delete.
20408 (vcaddq_rot90_s8): Delete.
20409 (vcaddq_rot270_s8): Delete.
20410 (vcaddq_rot90_u16): Delete.
20411 (vcaddq_rot270_u16): Delete.
20412 (vhcaddq_rot90_s16): Delete.
20413 (vhcaddq_rot270_s16): Delete.
20414 (vcaddq_rot90_s16): Delete.
20415 (vcaddq_rot270_s16): Delete.
20416 (vcaddq_rot90_u32): Delete.
20417 (vcaddq_rot270_u32): Delete.
20418 (vhcaddq_rot90_s32): Delete.
20419 (vhcaddq_rot270_s32): Delete.
20420 (vcaddq_rot90_s32): Delete.
20421 (vcaddq_rot270_s32): Delete.
20422 (vcaddq_rot90_f16): Delete.
20423 (vcaddq_rot270_f16): Delete.
20424 (vcaddq_rot90_f32): Delete.
20425 (vcaddq_rot270_f32): Delete.
20426 (vcaddq_rot270_m_s8): Delete.
20427 (vcaddq_rot270_m_s32): Delete.
20428 (vcaddq_rot270_m_s16): Delete.
20429 (vcaddq_rot270_m_u8): Delete.
20430 (vcaddq_rot270_m_u32): Delete.
20431 (vcaddq_rot270_m_u16): Delete.
20432 (vcaddq_rot90_m_s8): Delete.
20433 (vcaddq_rot90_m_s32): Delete.
20434 (vcaddq_rot90_m_s16): Delete.
20435 (vcaddq_rot90_m_u8): Delete.
20436 (vcaddq_rot90_m_u32): Delete.
20437 (vcaddq_rot90_m_u16): Delete.
20438 (vhcaddq_rot270_m_s8): Delete.
20439 (vhcaddq_rot270_m_s32): Delete.
20440 (vhcaddq_rot270_m_s16): Delete.
20441 (vhcaddq_rot90_m_s8): Delete.
20442 (vhcaddq_rot90_m_s32): Delete.
20443 (vhcaddq_rot90_m_s16): Delete.
20444 (vcaddq_rot270_m_f32): Delete.
20445 (vcaddq_rot270_m_f16): Delete.
20446 (vcaddq_rot90_m_f32): Delete.
20447 (vcaddq_rot90_m_f16): Delete.
20448 (vcaddq_rot90_x_s8): Delete.
20449 (vcaddq_rot90_x_s16): Delete.
20450 (vcaddq_rot90_x_s32): Delete.
20451 (vcaddq_rot90_x_u8): Delete.
20452 (vcaddq_rot90_x_u16): Delete.
20453 (vcaddq_rot90_x_u32): Delete.
20454 (vcaddq_rot270_x_s8): Delete.
20455 (vcaddq_rot270_x_s16): Delete.
20456 (vcaddq_rot270_x_s32): Delete.
20457 (vcaddq_rot270_x_u8): Delete.
20458 (vcaddq_rot270_x_u16): Delete.
20459 (vcaddq_rot270_x_u32): Delete.
20460 (vhcaddq_rot90_x_s8): Delete.
20461 (vhcaddq_rot90_x_s16): Delete.
20462 (vhcaddq_rot90_x_s32): Delete.
20463 (vhcaddq_rot270_x_s8): Delete.
20464 (vhcaddq_rot270_x_s16): Delete.
20465 (vhcaddq_rot270_x_s32): Delete.
20466 (vcaddq_rot90_x_f16): Delete.
20467 (vcaddq_rot90_x_f32): Delete.
20468 (vcaddq_rot270_x_f16): Delete.
20469 (vcaddq_rot270_x_f32): Delete.
20470 (__arm_vcaddq_rot90_u8): Delete.
20471 (__arm_vcaddq_rot270_u8): Delete.
20472 (__arm_vhcaddq_rot90_s8): Delete.
20473 (__arm_vhcaddq_rot270_s8): Delete.
20474 (__arm_vcaddq_rot90_s8): Delete.
20475 (__arm_vcaddq_rot270_s8): Delete.
20476 (__arm_vcaddq_rot90_u16): Delete.
20477 (__arm_vcaddq_rot270_u16): Delete.
20478 (__arm_vhcaddq_rot90_s16): Delete.
20479 (__arm_vhcaddq_rot270_s16): Delete.
20480 (__arm_vcaddq_rot90_s16): Delete.
20481 (__arm_vcaddq_rot270_s16): Delete.
20482 (__arm_vcaddq_rot90_u32): Delete.
20483 (__arm_vcaddq_rot270_u32): Delete.
20484 (__arm_vhcaddq_rot90_s32): Delete.
20485 (__arm_vhcaddq_rot270_s32): Delete.
20486 (__arm_vcaddq_rot90_s32): Delete.
20487 (__arm_vcaddq_rot270_s32): Delete.
20488 (__arm_vcaddq_rot270_m_s8): Delete.
20489 (__arm_vcaddq_rot270_m_s32): Delete.
20490 (__arm_vcaddq_rot270_m_s16): Delete.
20491 (__arm_vcaddq_rot270_m_u8): Delete.
20492 (__arm_vcaddq_rot270_m_u32): Delete.
20493 (__arm_vcaddq_rot270_m_u16): Delete.
20494 (__arm_vcaddq_rot90_m_s8): Delete.
20495 (__arm_vcaddq_rot90_m_s32): Delete.
20496 (__arm_vcaddq_rot90_m_s16): Delete.
20497 (__arm_vcaddq_rot90_m_u8): Delete.
20498 (__arm_vcaddq_rot90_m_u32): Delete.
20499 (__arm_vcaddq_rot90_m_u16): Delete.
20500 (__arm_vhcaddq_rot270_m_s8): Delete.
20501 (__arm_vhcaddq_rot270_m_s32): Delete.
20502 (__arm_vhcaddq_rot270_m_s16): Delete.
20503 (__arm_vhcaddq_rot90_m_s8): Delete.
20504 (__arm_vhcaddq_rot90_m_s32): Delete.
20505 (__arm_vhcaddq_rot90_m_s16): Delete.
20506 (__arm_vcaddq_rot90_x_s8): Delete.
20507 (__arm_vcaddq_rot90_x_s16): Delete.
20508 (__arm_vcaddq_rot90_x_s32): Delete.
20509 (__arm_vcaddq_rot90_x_u8): Delete.
20510 (__arm_vcaddq_rot90_x_u16): Delete.
20511 (__arm_vcaddq_rot90_x_u32): Delete.
20512 (__arm_vcaddq_rot270_x_s8): Delete.
20513 (__arm_vcaddq_rot270_x_s16): Delete.
20514 (__arm_vcaddq_rot270_x_s32): Delete.
20515 (__arm_vcaddq_rot270_x_u8): Delete.
20516 (__arm_vcaddq_rot270_x_u16): Delete.
20517 (__arm_vcaddq_rot270_x_u32): Delete.
20518 (__arm_vhcaddq_rot90_x_s8): Delete.
20519 (__arm_vhcaddq_rot90_x_s16): Delete.
20520 (__arm_vhcaddq_rot90_x_s32): Delete.
20521 (__arm_vhcaddq_rot270_x_s8): Delete.
20522 (__arm_vhcaddq_rot270_x_s16): Delete.
20523 (__arm_vhcaddq_rot270_x_s32): Delete.
20524 (__arm_vcaddq_rot90_f16): Delete.
20525 (__arm_vcaddq_rot270_f16): Delete.
20526 (__arm_vcaddq_rot90_f32): Delete.
20527 (__arm_vcaddq_rot270_f32): Delete.
20528 (__arm_vcaddq_rot270_m_f32): Delete.
20529 (__arm_vcaddq_rot270_m_f16): Delete.
20530 (__arm_vcaddq_rot90_m_f32): Delete.
20531 (__arm_vcaddq_rot90_m_f16): Delete.
20532 (__arm_vcaddq_rot90_x_f16): Delete.
20533 (__arm_vcaddq_rot90_x_f32): Delete.
20534 (__arm_vcaddq_rot270_x_f16): Delete.
20535 (__arm_vcaddq_rot270_x_f32): Delete.
20536 (__arm_vcaddq_rot90): Delete.
20537 (__arm_vcaddq_rot270): Delete.
20538 (__arm_vhcaddq_rot90): Delete.
20539 (__arm_vhcaddq_rot270): Delete.
20540 (__arm_vcaddq_rot270_m): Delete.
20541 (__arm_vcaddq_rot90_m): Delete.
20542 (__arm_vhcaddq_rot270_m): Delete.
20543 (__arm_vhcaddq_rot90_m): Delete.
20544 (__arm_vcaddq_rot90_x): Delete.
20545 (__arm_vcaddq_rot270_x): Delete.
20546 (__arm_vhcaddq_rot90_x): Delete.
20547 (__arm_vhcaddq_rot270_x): Delete.
20549 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
20551 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
20552 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
20553 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
20554 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
20555 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
20556 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
20558 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
20559 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
20560 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
20561 VHCADDQ_ROT270_M_S.
20562 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
20563 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
20564 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
20565 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
20566 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
20567 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
20569 (VCADDQ_ROT270_M): Delete.
20570 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
20571 (VCADDQ_ROT90_M): Delete.
20572 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
20573 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
20575 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
20576 (mve_vcaddq<mve_rot><mode>): Rename into ...
20577 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
20578 (mve_vcaddq_rot270_m_<supf><mode>)
20579 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
20580 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
20581 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
20582 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
20584 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
20586 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
20589 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
20590 preparation statement over braces for a single statement.
20591 (*bt<mode>_setncqi): Likewise.
20592 (*bt<mode>_setncqi_2): New define_insn_and_split.
20594 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
20596 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
20597 case inserting of 64-bit values into a TImode register, to handle
20598 both DImode and DFmode using either *insvti_lowpart_1
20599 or *isnvti_highpart_1.
20601 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
20604 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
20605 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
20606 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
20607 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
20608 when the original source contains a paradoxical subreg.
20610 2023-07-14 Jan Hubicka <jh@suse.cz>
20612 * passes.cc (execute_function_todo): Remove
20613 TODO_rebuild_frequencies
20614 * passes.def: Add rebuild_frequencies pass.
20615 * predict.cc (estimate_bb_frequencies): Drop
20617 (tree_estimate_probability): Update call of
20618 estimate_bb_frequencies.
20619 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
20620 first and do not rebuild if not necessary.
20621 (class pass_rebuild_frequencies): New.
20622 (make_pass_rebuild_frequencies): New.
20623 * profile-count.h: Add profile_count::very_large_p.
20624 * tree-inline.cc (optimize_inline_calls): Do not return
20625 TODO_rebuild_frequencies
20626 * tree-pass.h (TODO_rebuild_frequencies): Remove.
20627 (make_pass_rebuild_frequencies): Declare.
20629 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20631 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
20632 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20633 (expand_cond_len_ternop): New function.
20634 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
20635 (expand_cond_len_ternop): Ditto.
20637 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
20640 * config/bpf/bpf.md: Enable instruction scheduling.
20642 2023-07-14 Tamar Christina <tamar.christina@arm.com>
20644 PR tree-optimization/109154
20645 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
20646 (struct bb_predicate): Add no_predicate_stmts.
20647 (set_bb_predicate): Increase predicate count.
20648 (set_bb_predicate_gimplified_stmts): Conditionally initialize
20649 no_predicate_stmts.
20650 (get_bb_num_predicate_stmts): New.
20651 (init_bb_predicate): Initialzie no_predicate_stmts.
20652 (release_bb_predicate): Cleanup no_predicate_stmts.
20653 (insert_gimplified_predicates): Preserve no_predicate_stmts.
20655 2023-07-14 Tamar Christina <tamar.christina@arm.com>
20657 PR tree-optimization/109154
20658 * tree-if-conv.cc (gen_simplified_condition,
20659 gen_phi_nest_statement): New.
20660 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
20662 2023-07-14 Richard Biener <rguenther@suse.de>
20664 * gimple.h (gimple_phi_arg): New const overload.
20665 (gimple_phi_arg_def): Make gimple arg const.
20666 (gimple_phi_arg_def_from_edge): New inline function.
20667 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
20669 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
20670 new inline function.
20671 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
20673 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
20675 * common/config/riscv/riscv-common.cc:
20676 (riscv_implied_info): Add zihintntl item.
20677 (riscv_ext_version_table): Ditto.
20678 (riscv_ext_flag_table): Ditto.
20679 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
20680 (TARGET_ZIHINTNTL): Ditto.
20682 2023-07-14 Die Li <lidie@eswincomputing.com>
20684 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
20686 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
20689 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
20690 used by the address of the following memory operand.
20692 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
20695 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
20696 deallocate alloca-only frame.
20698 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
20701 * config/darwin.h (DARWIN_PLATFORM_ID): New.
20702 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
20703 and SDK data to the static linker.
20705 2023-07-13 Carl Love <cel@us.ibm.com>
20707 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
20708 built-in definition return type.
20709 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
20710 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
20711 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
20712 argument to return FPSCR fields.
20713 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
20714 the return value. Add description for
20715 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
20717 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
20720 * config/alpha/alpha.cc (alpha_emit_set_long_const):
20721 Always use DImode when constructing long const.
20723 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
20725 * haifa-sched.cc: Change TRUE/FALSE to true/false.
20727 * lra-assigns.cc: Ditto.
20728 * lra-constraints.cc: Ditto.
20729 * sel-sched.cc: Ditto.
20731 2023-07-13 Andrew Pinski <apinski@marvell.com>
20733 PR tree-optimization/110293
20734 PR tree-optimization/110539
20735 * match.pd: Expand the `x != (typeof x)(x == 0)`
20736 pattern to handle where the inner and outer comparsions
20737 are either `!=` or `==` and handle other constants
20740 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
20742 PR middle-end/109520
20743 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
20744 (lra_asm_insn_error): New prototype.
20745 * lra.cc: Include rtl_error.h.
20746 (lra_set_insn_recog_data): Initialize asm_reloads_num.
20747 (lra_asm_insn_error): New func whose code is taken from ...
20748 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
20749 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
20751 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20753 * genmatch.cc (commutative_op): Add COND_LEN_*
20754 * internal-fn.cc (first_commutative_argument): Ditto.
20756 (get_unconditional_internal_fn): Ditto.
20757 (can_interpret_as_conditional_op_p): Ditto.
20758 (internal_fn_len_index): Ditto.
20759 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
20760 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
20761 (convert_mult_to_fma): Ditto.
20762 (math_opts_dom_walker::after_dom_children): Ditto.
20764 2023-07-13 Pan Li <pan2.li@intel.com>
20766 * config/riscv/riscv.cc (vxrm_rtx): New static var.
20768 (global_state_unknown_p): Removed.
20769 (riscv_entity_mode_after): Removed.
20770 (asm_insn_p): New function.
20771 (vxrm_unknown_p): New function for fixed-point.
20772 (riscv_vxrm_mode_after): Ditto.
20773 (frm_unknown_dynamic_p): New function for floating-point.
20774 (riscv_frm_mode_after): Ditto.
20775 (riscv_mode_after): Leverage new functions.
20777 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20779 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
20780 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
20781 calling vect_model_load_cost.
20783 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20785 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
20786 handle memory_access_type VMAT_CONTIGUOUS, remove some
20787 VMAT_CONTIGUOUS_PERMUTE related handlings.
20788 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
20789 without calling vect_model_load_cost.
20791 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20793 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
20794 VMAT_CONTIGUOUS_REVERSE any more.
20795 (vectorizable_load): Adjust the costing handling on
20796 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
20798 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20800 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
20801 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
20802 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
20803 assert it will never get VMAT_LOAD_STORE_LANES.
20805 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20807 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
20808 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
20809 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
20810 remove VMAT_GATHER_SCATTER related handlings and the related parameter
20813 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20815 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
20816 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
20817 vect_model_load_cost.
20818 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
20819 VMAT_STRIDED_SLP any more, and remove their related handlings.
20821 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20823 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
20824 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
20825 hoisting decision and without calling vect_model_load_cost.
20826 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
20827 and remove VMAT_INVARIANT related handlings.
20829 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20831 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
20832 on costing with one extra argument cost_vec.
20833 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
20834 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
20835 gs_info.decl set any more.
20837 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20839 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
20840 to vect_model_load_cost down to some different transform paths
20841 according to the handlings of different vect_memory_access_types.
20843 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
20845 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
20847 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20849 * config/riscv/autovec.md
20850 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
20851 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
20852 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
20853 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
20854 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
20855 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
20856 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
20857 (len_mask_gather_load<mode><mode>): Ditto.
20858 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
20859 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
20860 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
20861 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
20862 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
20863 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
20864 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
20865 (len_mask_scatter_store<mode><mode>): Ditto.
20866 * config/riscv/predicates.md (const_1_operand): New predicate.
20867 (vector_gs_scale_operand_16): Ditto.
20868 (vector_gs_scale_operand_32): Ditto.
20869 (vector_gs_scale_operand_64): Ditto.
20870 (vector_gs_extension_operand): Ditto.
20871 (vector_gs_scale_operand_16_rv32): Ditto.
20872 (vector_gs_scale_operand_32_rv32): Ditto.
20873 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
20874 (expand_gather_scatter): New function.
20875 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
20876 (emit_vlmax_masked_store_insn): New function.
20877 (emit_nonvlmax_masked_store_insn): Ditto.
20878 (modulo_sel_indices): Ditto.
20879 (expand_vec_perm): Fix SLP for gather/scatter.
20880 (prepare_gather_scatter): New function.
20881 (expand_gather_scatter): Ditto.
20882 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
20883 (subreg:SI (DI CONST_POLY_INT)).
20884 * config/riscv/vector-iterators.md: Add gather/scatter.
20885 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
20886 (@vec_duplicate<mode>): Ditto.
20887 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
20889 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
20891 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20893 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
20894 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20895 (expand_cond_len_binop): New function.
20896 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
20897 (emit_nonvlmax_fp_tu_insn): Ditto.
20898 (need_fp_rounding_p): Ditto.
20899 (expand_cond_len_binop): Ditto.
20900 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
20901 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
20903 2023-07-12 Jan Hubicka <jh@suse.cz>
20905 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
20906 (gimple_duplicate_seme_region): ... this; break out profile updating
20908 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
20909 (ch_base::copy_headers): Update.
20910 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
20911 (gimple_duplicate_seme_region): ... this.
20913 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
20915 PR tree-optimization/107043
20916 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
20918 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
20920 PR tree-optimization/107053
20921 * gimple-range-op.cc (cfn_popcount): Use known set bits.
20923 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
20925 * ira.cc (equiv_init_varies_p): Change return type from int to bool
20926 and adjust function body accordingly.
20927 (equiv_init_movable_p): Ditto.
20928 (memref_used_between_p): Ditto.
20929 * lra-constraints.cc (valid_address_p): Ditto.
20931 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
20933 * range-op.cc (irange_to_masked_value): Remove.
20934 (update_known_bitmask): Update irange value/mask pair instead of
20935 only updating nonzero bits.
20937 2023-07-12 Jan Hubicka <jh@suse.cz>
20939 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
20940 parameter and rewrite profile updating code to handle edges elimination.
20941 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
20942 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
20943 (loop_iv_derived_p): New function.
20944 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
20945 of PHIs and propagation of IV derived variables.
20946 (ch_base::copy_headers): Pass around the invariant edges hash set.
20948 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
20950 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
20951 (last_active_insn): Change "skip_use_p" function argument to bool.
20952 (noce_operand_ok): Change return type from int to bool.
20953 (find_cond_trap): Ditto.
20954 (block_jumps_and_fallthru_p): Change "fallthru_p" and
20955 "jump_p" variables to bool.
20956 (noce_find_if_block): Change return type from int to bool.
20957 (cond_exec_find_if_block): Ditto.
20958 (find_if_case_1): Ditto.
20959 (find_if_case_2): Ditto.
20960 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
20961 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
20962 (cond_exec_process_insns): Change return type from int to bool.
20963 Change "mod_ok" function arg to bool.
20964 (cond_exec_process_if_block): Change return type from int to bool.
20965 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
20967 (noce_emit_store_flag): Change return type from int to bool.
20968 Change "reversep" function arg to bool. Change "cond_complex"
20970 (noce_try_move): Change return type from int to bool.
20971 (noce_try_ifelse_collapse): Ditto.
20972 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
20973 (noce_try_addcc): Change return type from int to bool. Change
20974 "subtract" variable to bool.
20975 (noce_try_store_flag_constants): Change return type from int to bool.
20976 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
20977 (noce_try_cmove): Change return type from int to bool.
20978 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
20979 (noce_try_minmax): Change return type from int to bool. Change
20980 "unsignedp" variable to bool.
20981 (noce_try_abs): Change return type from int to bool. Change
20982 "negate" variable to bool.
20983 (noce_try_sign_mask): Change return type from int to bool.
20984 (noce_try_move): Ditto.
20985 (noce_try_store_flag_constants): Ditto.
20986 (noce_try_cmove): Ditto.
20987 (noce_try_cmove_arith): Ditto.
20988 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
20989 (noce_try_bitop): Change return type from int to bool.
20990 (noce_operand_ok): Ditto.
20991 (noce_convert_multiple_sets): Ditto.
20992 (noce_convert_multiple_sets_1): Ditto.
20993 (noce_process_if_block): Ditto.
20994 (check_cond_move_block): Ditto.
20995 (cond_move_process_if_block): Ditto. Change "success_p"
20997 (rest_of_handle_if_conversion): Change return type to void.
20999 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21001 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
21003 (get_conditional_len_internal_fn): New function.
21004 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
21005 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
21008 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21011 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
21013 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21016 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
21017 define_insn_and_split derived from *add<dwi>3_doubleword_concat
21018 and *add<dwi>3_doubleword_zext.
21020 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21023 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
21024 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
21025 (peephole2): Simplify rega = 0; rega op= rega cases.
21027 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
21029 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
21030 testing a TImode SUBREG of a 128-bit vector register against
21031 zero, use a PTEST instruction instead of first moving it to
21032 a pair of scalar registers.
21034 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
21036 * genopinit.cc (main): Adjust maximal number of optabs and
21038 * gensupport.cc (find_optab): Shift optab by 20 and mode by
21040 * optabs-query.h (optab_handler): Ditto.
21041 (convert_optab_handler): Ditto.
21043 2023-07-12 Richard Biener <rguenther@suse.de>
21045 PR tree-optimization/110630
21046 * tree-vect-slp.cc (vect_add_slp_permutation): New
21047 offset parameter, honor that for the extract code generation.
21048 (vectorizable_slp_permutation_1): Handle offsetted identities.
21050 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21052 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
21053 (umul<mode>3_highpart): Ditto.
21055 2023-07-12 Jan Beulich <jbeulich@suse.com>
21057 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
21058 alternative. Adjust original last alternative's "prefix"
21059 attribute to maybe_evex.
21061 2023-07-12 Jan Beulich <jbeulich@suse.com>
21063 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
21064 vbroadcastss for AVX2. New AVX512F alternative.
21065 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
21066 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
21068 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21070 * config/riscv/peephole.md: Remove XThead* peephole passes.
21071 * config/riscv/thead.md: Include thead-peephole.md.
21072 * config/riscv/thead-peephole.md: New file.
21074 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21076 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
21078 (riscv_index_reg_class): Likewise.
21079 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
21080 (riscv_index_reg_class): New function.
21081 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
21082 riscv_index_reg_class().
21083 (REGNO_OK_FOR_INDEX_P): Call new function
21084 riscv_regno_ok_for_index_p().
21086 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21088 * config/riscv/riscv-protos.h (enum riscv_address_type):
21089 New location of type definition.
21090 (struct riscv_address_info): Likewise.
21091 * config/riscv/riscv.cc (enum riscv_address_type):
21092 Old location of type definition.
21093 (struct riscv_address_info): Likewise.
21095 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21097 * config/riscv/riscv.h (Xmode): New macro.
21099 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21101 * config/riscv/riscv.cc (riscv_print_operand_address): Use
21102 output_addr_const rather than riscv_print_operand.
21104 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21106 * config/riscv/thead.md: Adjust constraints of th_addsl.
21108 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21110 * config/riscv/thead.cc (th_mempair_operands_p):
21111 Fix documentation of th_mempair_order_operands().
21113 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21115 * config/riscv/thead.cc (th_mempair_save_regs):
21116 Emit REG_FRAME_RELATED_EXPR notes in prologue.
21118 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
21120 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
21121 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
21122 New XThead extension INSN.
21123 (*zero_extendsidi2_th_extu): New XThead extension INSN.
21124 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
21126 2023-07-12 liuhongt <hongtao.liu@intel.com>
21130 * config/i386/predicates.md
21131 (int_float_vector_all_ones_operand): New predicate.
21132 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
21134 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
21136 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
21138 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
21139 define_insn_and_split to avoid false dependence.
21140 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
21141 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
21142 of operands 1 to '0' to avoid false dependence.
21143 (*andnot<mode>3): Ditto.
21144 (iornot<mode>3): Ditto.
21145 (*<nlogic><mode>3): Ditto.
21147 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
21149 * common/config/i386/cpuinfo.h
21150 (get_intel_cpu): Handle Granite Rapids D.
21151 * common/config/i386/i386-common.cc:
21152 (processor_alias_table): Add graniterapids-d.
21153 * common/config/i386/i386-cpuinfo.h
21154 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
21155 * config.gcc: Add -march=graniterapids-d.
21156 * config/i386/driver-i386.cc (host_detect_local_cpu):
21157 Handle graniterapids-d.
21158 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
21159 * doc/extend.texi: Add graniterapids-d.
21160 * doc/invoke.texi: Ditto.
21162 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
21164 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
21165 Add OPTION_MASK_ISA_AVX512VL.
21166 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
21169 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21171 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
21172 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
21173 (shuffle_compress_patterns): Ditto.
21174 (expand_vec_perm_const_1): Ditto.
21176 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
21178 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
21179 * cfghooks.h (struct cfg_hooks): Change return type of
21180 verify_flow_info from integer to bool.
21181 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
21182 (can_delete_label_p): Ditto.
21183 (rtl_verify_flow_info): Change return type from int to bool
21184 and adjust function body accordingly. Change "err" variable to bool.
21185 (rtl_verify_flow_info_1): Ditto.
21186 (free_bb_for_insn): Change return type to void.
21187 (rtl_merge_blocks): Change "b_empty" variable to bool.
21188 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
21189 (verify_hot_cold_block_grouping): Change return type from int to bool.
21190 Change "err" variable to bool.
21191 (rtl_verify_edges): Ditto.
21192 (rtl_verify_bb_insns): Ditto.
21193 (rtl_verify_bb_pointers): Ditto.
21194 (rtl_verify_bb_insn_chain): Ditto.
21195 (rtl_verify_fallthru): Ditto.
21196 (rtl_verify_bb_layout): Ditto.
21197 (purge_all_dead_edges): Change "purged" variable to bool.
21198 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
21199 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
21200 (load_killed_in_block_p): Change return type from int to bool
21201 and adjust function body accordingly.
21202 (oprs_unchanged_p): Return true/false.
21203 (rest_of_handle_gcse2): Change return type to void.
21204 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
21205 int to bool. Change "err" variable to bool.
21207 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
21209 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
21211 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21213 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
21214 * internal-fn.cc (cond_len_unary_direct): Ditto.
21215 (cond_len_binary_direct): Ditto.
21216 (cond_len_ternary_direct): Ditto.
21217 (expand_cond_len_unary_optab_fn): Ditto.
21218 (expand_cond_len_binary_optab_fn): Ditto.
21219 (expand_cond_len_ternary_optab_fn): Ditto.
21220 (direct_cond_len_unary_optab_supported_p): Ditto.
21221 (direct_cond_len_binary_optab_supported_p): Ditto.
21222 (direct_cond_len_ternary_optab_supported_p): Ditto.
21223 * internal-fn.def (COND_LEN_ADD): Ditto.
21224 (COND_LEN_SUB): Ditto.
21225 (COND_LEN_MUL): Ditto.
21226 (COND_LEN_DIV): Ditto.
21227 (COND_LEN_MOD): Ditto.
21228 (COND_LEN_RDIV): Ditto.
21229 (COND_LEN_MIN): Ditto.
21230 (COND_LEN_MAX): Ditto.
21231 (COND_LEN_FMIN): Ditto.
21232 (COND_LEN_FMAX): Ditto.
21233 (COND_LEN_AND): Ditto.
21234 (COND_LEN_IOR): Ditto.
21235 (COND_LEN_XOR): Ditto.
21236 (COND_LEN_SHL): Ditto.
21237 (COND_LEN_SHR): Ditto.
21238 (COND_LEN_FMA): Ditto.
21239 (COND_LEN_FMS): Ditto.
21240 (COND_LEN_FNMA): Ditto.
21241 (COND_LEN_FNMS): Ditto.
21242 (COND_LEN_NEG): Ditto.
21243 * optabs.def (OPTAB_D): Ditto.
21245 2023-07-11 Richard Biener <rguenther@suse.de>
21247 PR tree-optimization/110614
21248 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
21249 SLP splats are not suitable for re-align ops.
21251 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
21253 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
21255 (vsx_quad_dform_memory_operand): Likewise.
21257 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
21259 * reorg.cc (stop_search_p): Change return type from int to bool
21260 and adjust function body accordingly.
21261 (resource_conflicts_p): Ditto.
21262 (insn_references_resource_p): Change return type from int to bool.
21263 (insn_sets_resource_p): Ditto.
21264 (redirect_with_delay_slots_safe_p): Ditto.
21265 (condition_dominates_p): Change return type from int to bool
21266 and adjust function body accordingly.
21267 (redirect_with_delay_list_safe_p): Ditto.
21268 (check_annul_list_true_false): Ditto. Change "annul_true_p"
21269 function argument to bool.
21270 (steal_delay_list_from_target): Change "pannul_p" function
21271 argument to bool pointer. Change "must_annul" and "used_annul"
21272 variables from int to bool.
21273 (steal_delay_list_from_fallthrough): Ditto.
21274 (own_thread_p): Change return type from int to bool and adjust
21275 function body accordingly. Change "allow_fallthrough" function
21277 (reorg_redirect_jump): Change return type from int to bool.
21278 (fill_simple_delay_slots): Change "non_jumps_p" function
21279 argument from int to bool. Change "maybe_never" varible to bool.
21280 (fill_slots_from_thread): Change "likely", "thread_if_true" and
21281 "own_thread" function arguments to bool. Change "lose" and
21282 "must_annul" variables to bool.
21283 (delete_from_delay_slot): Change "had_barrier" variable to bool.
21284 (try_merge_delay_insns): Change "annul_p" variable to bool.
21285 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
21287 (rest_of_handle_delay_slots): Change return type from int to void
21288 and adjust function body accordingly.
21290 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
21292 * doc/extend.texi (RISC-V Operand Modifiers): New.
21294 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21296 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
21297 (insert_insn_end_basic_block): Ditto.
21298 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
21299 * gcse.cc (insert_insn_end_basic_block): Export as global function.
21300 * gcse.h (insert_insn_end_basic_block): Ditto.
21302 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
21305 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
21306 (arm_builtin_decl): Hahndle MVE builtins.
21307 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
21308 (add_unique_function): Fix handling of
21309 __ARM_MVE_PRESERVE_USER_NAMESPACE.
21310 (add_overloaded_function): Likewise.
21311 * config/arm/arm-protos.h (builtin_decl): New declaration.
21313 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
21315 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
21317 2023-07-10 Xi Ruoyao <xry111@xry111.site>
21319 PR tree-optimization/110557
21320 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
21321 Ensure the output sign-extended if necessary.
21323 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
21325 * config/i386/i386.md (peephole2): Transform xchg insn with a
21326 REG_UNUSED note to a (simple) move.
21327 (*insvti_lowpart_1): New define_insn_and_split.
21328 (*insvdi_lowpart_1): Likewise.
21330 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
21332 * config/i386/i386-features.cc (compute_convert_gain): Tweak
21333 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
21334 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
21335 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
21337 2023-07-10 liuhongt <hongtao.liu@intel.com>
21340 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
21341 splitter to detect fp max pattern.
21342 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
21344 2023-07-09 Jan Hubicka <jh@suse.cz>
21346 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
21347 (dump_edge_info): Likewise.
21348 (dump_bb_info): Likewise.
21349 * profile-count.cc (profile_count::dump): Add comma between quality and
21352 2023-07-08 Jan Hubicka <jh@suse.cz>
21354 PR tree-optimization/110600
21355 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
21357 2023-07-08 Jan Hubicka <jh@suse.cz>
21359 PR middle-end/110590
21360 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
21361 inner loops and be more careful about inconsistent profiles.
21362 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
21363 exit is followed by other exit.
21365 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
21367 * cprop.cc (reg_available_p): Change return type from int to bool.
21368 (reg_not_set_p): Ditto.
21369 (try_replace_reg): Ditto. Change "success" variable to bool.
21370 (cprop_jump): Change return type from int to void
21371 and adjust function body accordingly.
21372 (constprop_register): Ditto.
21373 (cprop_insn): Ditto. Change "changed" variable to bool.
21374 (local_cprop_pass): Change return type from int to void
21375 and adjust function body accordingly.
21376 (bypass_block): Ditto. Change "change", "may_be_loop_header"
21377 and "removed_p" variables to bool.
21378 (bypass_conditional_jumps): Change return type from int to void
21379 and adjust function body accordingly. Change "changed"
21381 (one_cprop_pass): Ditto.
21383 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
21385 * gcse.cc (expr_equiv_p): Change return type from int to bool.
21386 (oprs_unchanged_p): Change return type from int to void
21387 and adjust function body accordingly.
21388 (oprs_anticipatable_p): Ditto.
21389 (oprs_available_p): Ditto.
21390 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
21391 arguments to bool. Change "found" variable to bool.
21392 (load_killed_in_block_p): Change return type from int to void and
21393 adjust function body accordingly. Change "avail_p" argument to bool.
21394 (pre_expr_reaches_here_p): Change return type from int to void
21395 and adjust function body accordingly.
21396 (pre_delete): Ditto. Change "changed" variable to bool.
21397 (pre_gcse): Change return type from int to void
21398 and adjust function body accordingly. Change "did_insert" and
21399 "changed" variables to bool.
21400 (one_pre_gcse_pass): Change return type from int to void
21401 and adjust function body accordingly. Change "changed" variable
21403 (should_hoist_expr_to_dom): Change return type from int to void
21404 and adjust function body accordingly. Change
21405 "visited_allocated_locally" variable to bool.
21406 (hoist_code): Change return type from int to void and adjust
21407 function body accordingly. Change "changed" variable to bool.
21408 (one_code_hoisting_pass): Ditto.
21409 (pre_edge_insert): Change return type from int to void and adjust
21410 function body accordingly. Change "did_insert" variable to bool.
21411 (pre_expr_reaches_here_p_work): Change return type from int to void
21412 and adjust function body accordingly.
21413 (simple_mem): Ditto.
21414 (want_to_gcse_p): Change return type from int to void
21415 and adjust function body accordingly.
21416 (can_assign_to_reg_without_clobbers_p): Update function body
21417 for bool return type.
21418 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
21419 (pre_insert_copies): Change "added_copy" variable to bool.
21421 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
21425 * doc/invoke.texi (Warning Options): Fix typos.
21427 2023-07-07 Jan Hubicka <jh@suse.cz>
21429 * profile-count.cc (profile_count::dump): Add FUN
21430 parameter; print relative frequency.
21431 (profile_count::debug): Update.
21432 * profile-count.h (profile_count::dump): Update
21435 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
21439 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
21440 TImode destinations from paradoxical SUBREGs (setting the lowpart)
21441 into explicit zero extensions. Use *insvti_highpart_1 instruction
21442 to set the highpart of a TImode destination.
21444 2023-07-07 Jan Hubicka <jh@suse.cz>
21446 * predict.cc (force_edge_cold): Use
21447 set_edge_probability_and_rescale_others; improve dumps.
21449 2023-07-07 Jan Hubicka <jh@suse.cz>
21451 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
21453 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
21456 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
21458 * config/s390/s390.cc (vec_init): Fix default case
21460 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
21462 * lra-assigns.cc (assign_by_spills): Add reload insns involving
21463 reload pseudos with non-refined class to be processed on the next
21465 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
21466 (in_class_p): Use it.
21467 (print_curr_insn_alt): New func.
21468 (process_alt_operands): Use it. Improve debug info.
21469 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
21470 pseudo class if it is not refined yet.
21472 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
21474 * value-range.cc (irange::get_bitmask_from_range): Return all the
21475 known bits for a singleton.
21476 (irange::set_range_from_bitmask): Set a range of a singleton when
21477 all bits are known.
21479 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
21481 * value-range.cc (irange::intersect): Leave normalization to
21484 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
21486 * data-streamer-in.cc (streamer_read_value_range): Adjust for
21488 * data-streamer-out.cc (streamer_write_vrange): Same.
21489 * range-op.cc (operator_cast::fold_range): Same.
21490 * value-range-pretty-print.cc
21491 (vrange_printer::print_irange_bitmasks): Same.
21492 * value-range-storage.cc (irange_storage::write_lengths_address):
21494 (irange_storage::set_irange): Same.
21495 (irange_storage::get_irange): Same.
21496 (irange_storage::size): Same.
21497 (irange_storage::dump): Same.
21498 * value-range-storage.h: Same.
21499 * value-range.cc (debug): New.
21500 (irange_bitmask::dump): New.
21501 (add_vrange): Adjust for value/mask.
21502 (irange::operator=): Same.
21503 (irange::set): Same.
21504 (irange::verify_range): Same.
21505 (irange::operator==): Same.
21506 (irange::contains_p): Same.
21507 (irange::irange_single_pair_union): Same.
21508 (irange::union_): Same.
21509 (irange::intersect): Same.
21510 (irange::invert): Same.
21511 (irange::get_nonzero_bits_from_range): Rename to...
21512 (irange::get_bitmask_from_range): ...this.
21513 (irange::set_range_from_nonzero_bits): Rename to...
21514 (irange::set_range_from_bitmask): ...this.
21515 (irange::set_nonzero_bits): Rename to...
21516 (irange::update_bitmask): ...this.
21517 (irange::get_nonzero_bits): Rename to...
21518 (irange::get_bitmask): ...this.
21519 (irange::intersect_nonzero_bits): Rename to...
21520 (irange::intersect_bitmask): ...this.
21521 (irange::union_nonzero_bits): Rename to...
21522 (irange::union_bitmask): ...this.
21523 (irange_bitmask::verify_mask): New.
21524 * value-range.h (class irange_bitmask): New.
21525 (irange_bitmask::set_unknown): New.
21526 (irange_bitmask::unknown_p): New.
21527 (irange_bitmask::irange_bitmask): New.
21528 (irange_bitmask::get_precision): New.
21529 (irange_bitmask::get_nonzero_bits): New.
21530 (irange_bitmask::set_nonzero_bits): New.
21531 (irange_bitmask::operator==): New.
21532 (irange_bitmask::union_): New.
21533 (irange_bitmask::intersect): New.
21534 (class irange): Friend vrange_printer.
21535 (irange::varying_compatible_p): Adjust for bitmask.
21536 (irange::set_varying): Same.
21537 (irange::set_nonzero): Same.
21539 2023-07-07 Jan Beulich <jbeulich@suse.com>
21541 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
21543 2023-07-07 Jan Beulich <jbeulich@suse.com>
21545 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
21546 alternative. Switch new last alternative's "isa" attribute to
21548 (vec_extract_hi_v32qi): Likewise.
21550 2023-07-07 Pan Li <pan2.li@intel.com>
21551 Robin Dapp <rdapp@ventanamicro.com>
21553 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
21555 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
21556 (riscv_mode_exit): Likewise for exit mode.
21557 (riscv_mode_needed): Likewise for needed mode.
21558 (riscv_mode_after): Likewise for after mode.
21560 2023-07-07 Pan Li <pan2.li@intel.com>
21562 * config/riscv/vector.md: Fix typo.
21564 2023-07-06 Jan Hubicka <jh@suse.cz>
21566 PR middle-end/25623
21567 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
21568 of iterations determined.
21569 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
21571 2023-07-06 Jan Hubicka <jh@suse.cz>
21573 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
21574 probability update to be safe on loops with subloops.
21575 Make bound parameter to be iteration bound.
21576 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
21577 of scale_loop_profile.
21578 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
21580 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
21582 PR tree-optimization/110449
21583 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
21584 vec_loop for the unrolled loop.
21586 2023-07-06 Jan Hubicka <jh@suse.cz>
21588 * cfg.cc (set_edge_probability_and_rescale_others): New function.
21589 (update_bb_profile_for_threading): Use it; simplify the rest.
21590 * cfg.h (set_edge_probability_and_rescale_others): Declare.
21591 * profile-count.h (profile_probability::apply_scale): New.
21593 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
21595 * doc/extend.texi (ARC Built-in Functions): Update documentation
21596 with missing builtins.
21598 2023-07-06 Richard Biener <rguenther@suse.de>
21600 PR tree-optimization/110556
21601 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
21602 assign code and all operands of non-stores.
21604 2023-07-06 Richard Biener <rguenther@suse.de>
21606 PR tree-optimization/110563
21607 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
21608 Remove second argument.
21609 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
21610 Remove for_epilogue_p argument. Merge assert ...
21611 (vect_analyze_loop_2): ... with check done before determining
21612 partial vectors by moving it after.
21613 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
21615 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21617 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
21618 few things re 'reorder' option and strings.
21619 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
21621 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21623 * gengtype-parse.cc: Clean up obsolete parametrized structs
21625 * gengtype.cc: Likewise.
21626 * gengtype.h: Likewise.
21628 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21630 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
21633 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21635 * gengtype-parse.cc (token_names): Add '"user"'.
21636 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
21637 'FIRST_TOKEN_WITH_VALUE'.
21639 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21641 * doc/gty.texi (GTY Options) <string_length>: Enhance.
21643 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21645 * gengtype.cc (write_root, write_roots): Explicitly reject
21646 'string_length' option.
21647 * doc/gty.texi (GTY Options) <string_length>: Document.
21649 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
21651 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
21652 (ggc_pch_write_object): Remove 'bool is_string' argument.
21653 * ggc-common.cc: Adjust.
21654 * ggc-page.cc: Likewise.
21656 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
21658 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
21660 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
21662 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
21663 and add description for inling of function with arch and tune
21666 2023-07-06 Richard Biener <rguenther@suse.de>
21668 PR tree-optimization/110515
21669 * tree-ssa-pre.cc (compute_avail): Make code dealing
21670 with hoisting loads with different alias-sets more
21673 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21675 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
21677 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
21679 * config/i386/i386.cc (ix86_can_inline_p): If callee has
21680 default arch=x86-64 and tune=generic, do not block the
21681 inlining to its caller. Also allow callee with different
21682 arch= to be inlined if it has always_inline attribute and
21683 it's ISA is subset of caller's.
21685 2023-07-06 liuhongt <hongtao.liu@intel.com>
21687 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
21688 DF/SFmode AND/IOR/XOR/ANDN operations.
21690 2023-07-06 Andrew Pinski <apinski@marvell.com>
21692 PR middle-end/110554
21693 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
21694 just build using boolean_type_node instead of the cond_type.
21695 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
21696 that will feed into the COND_EXPR.
21698 2023-07-06 liuhongt <hongtao.liu@intel.com>
21701 * config/i386/i386.md (movdf_internal): Disparage slightly for
21702 2 alternatives (r,v) and (v,r) by adding constraint modifier
21705 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
21708 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
21709 initialization of new_addr.
21711 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
21713 PR tree-optimization/110474
21714 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
21715 unroll factor while selecting the epilog vect loop VF.
21717 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
21719 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
21722 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
21724 * gimple-range-gori.cc (compute_operand_range): After calling
21725 compute_operand2_range, recursively call self if needed.
21726 (compute_operand2_range): Turn into a leaf function.
21727 (gori_compute::compute_operand1_and_operand2_range): Finish
21728 operand2 calculation.
21729 * gimple-range-gori.h (compute_operand2_range): Remove name param.
21731 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
21733 * gimple-range-gori.cc (compute_operand_range): After calling
21734 compute_operand1_range, recursively call self if needed.
21735 (compute_operand1_range): Turn into a leaf function.
21736 (gori_compute::compute_operand1_and_operand2_range): Finish
21737 operand1 calculation.
21738 * gimple-range-gori.h (compute_operand1_range): Remove name param.
21740 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
21742 * gimple-range-gori.cc (compute_operand_range): Check for
21743 operand interdependence when both op1 and op2 are computed.
21744 (compute_operand1_and_operand2_range): No checks required now.
21746 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
21748 * gimple-range-gori.cc (compute_operand_range): Check for
21749 a relation between op1 and op2 and use that instead.
21750 (compute_operand1_range): Don't look for a relation override.
21751 (compute_operand2_range): Ditto.
21753 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
21755 * doc/contrib.texi (Contributors): Update my entry.
21757 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
21759 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
21762 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
21764 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
21765 scehdule_more_p and contributes_to_priority indirect frunction
21766 type from int to bool.
21767 (no_real_insns_p): Change return type from int to bool.
21768 (contributes_to_priority): Ditto.
21769 * haifa-sched.cc (no_real_insns_p): Change return type from
21770 int to bool and adjust function body accordingly.
21771 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
21772 variable type from int to bool.
21773 (ps_insn_advance_column): Change return type from int to bool.
21774 (ps_has_conflicts): Ditto. Change "has_conflicts"
21775 variable type from int to bool.
21776 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
21777 (conditions_mutex_p): Ditto.
21778 * sched-ebb.cc (schedule_more_p): Ditto.
21779 (ebb_contributes_to_priority): Change return type from
21780 int to bool and adjust function body accordingly.
21781 * sched-rgn.cc (is_cfg_nonregular): Ditto.
21782 (check_live_1): Ditto.
21784 (find_conditional_protection): Ditto.
21785 (is_conditionally_protected): Ditto.
21786 (is_prisky): Ditto.
21787 (is_exception_free): Ditto.
21788 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
21789 variables from int to bool.
21790 (extend_rgns): Change "rescan" variable from int to bool.
21791 (check_live): Change return type from
21792 int to bool and adjust function body accordingly.
21793 (can_schedule_ready_p): Ditto.
21794 (schedule_more_p): Ditto.
21795 (contributes_to_priority): Ditto.
21797 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
21799 * doc/md.texi: Document that vec_set and vec_extract must not
21801 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
21802 (gimple_expand_vec_set_extract_expr): ...to this.
21803 (gimple_expand_vec_exprs): Call renamed function.
21804 * internal-fn.cc (vec_extract_direct): Add.
21805 (expand_vec_extract_optab_fn): New function to expand
21807 (direct_vec_extract_optab_supported_p): Add.
21808 * internal-fn.def (VEC_EXTRACT): Add.
21809 * optabs.cc (can_vec_extract_var_idx_p): New function.
21810 * optabs.h (can_vec_extract_var_idx_p): Declare.
21812 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
21814 * config/riscv/autovec.md: Add gen_lowpart.
21816 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
21818 * config/riscv/autovec.md: Allow register index operand.
21820 2023-07-05 Pan Li <pan2.li@intel.com>
21822 * config/riscv/riscv-vector-builtins.cc
21823 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
21825 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
21827 * config/riscv/autovec.md: Use float_truncate.
21829 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21831 * internal-fn.cc (internal_fn_len_index): Apply
21832 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
21833 (internal_fn_mask_index): Ditto.
21834 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
21835 (supports_vec_scatter_store_p): Ditto.
21836 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
21837 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
21838 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
21839 (vect_get_strided_load_store_ops): Ditto.
21840 (vectorizable_store): Ditto.
21841 (vectorizable_load): Ditto.
21843 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
21844 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21846 * simplify-rtx.cc (native_encode_rtx): Ditto.
21847 (native_decode_vector_rtx): Ditto.
21848 (simplify_const_vector_byte_offset): Ditto.
21849 (simplify_const_vector_subreg): Ditto.
21850 * tree.cc (build_truth_vector_type_for_mode): Ditto.
21851 * varasm.cc (output_constant_pool_2): Ditto.
21853 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
21855 * config/mips/mips.cc (mips_expand_block_move): don't expand for
21856 r6 with -mno-unaligned-access option if one or both of src and
21857 dest are unaligned. restruct: return directly if length is not const.
21858 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
21860 2023-07-05 Jan Beulich <jbeulich@suse.com>
21863 * config/i386/sse.md: New splitters to simplify
21864 not;vec_duplicate as a singular vpternlog.
21865 (one_cmpl<mode>2): Allow broadcast for operand 1.
21866 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
21868 2023-07-05 Jan Beulich <jbeulich@suse.com>
21871 * config/i386/sse.md: New splitters to simplify
21872 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
21874 2023-07-05 Jan Beulich <jbeulich@suse.com>
21877 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
21878 form of splitter for PR target/100711.
21880 2023-07-05 Richard Biener <rguenther@suse.de>
21882 PR middle-end/110541
21883 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
21886 2023-07-05 Jan Beulich <jbeulich@suse.com>
21889 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
21890 for memory form operand 1.
21892 2023-07-05 Jan Beulich <jbeulich@suse.com>
21895 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
21896 bitwise vector operations.
21897 * config/i386/sse.md (*iornot<mode>3): New insn.
21898 (*xnor<mode>3): Likewise.
21899 (*<nlogic><mode>3): Likewise.
21900 (andor): New code iterator.
21901 (nlogic): New code attribute.
21902 (ternlog_nlogic): Likewise.
21904 2023-07-05 Richard Biener <rguenther@suse.de>
21906 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
21908 2023-07-05 yulong <shiyulong@iscas.ac.cn>
21910 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
21912 2023-07-05 yulong <shiyulong@iscas.ac.cn>
21914 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
21915 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
21916 (ADJUST_ALIGNMENT): Ditto.
21917 (RVV_TUPLE_PARTIAL_MODES): Ditto.
21918 (ADJUST_NUNITS): Ditto.
21919 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
21921 (vfloat16mf4x3_t): Ditto.
21922 (vfloat16mf4x4_t): Ditto.
21923 (vfloat16mf4x5_t): Ditto.
21924 (vfloat16mf4x6_t): Ditto.
21925 (vfloat16mf4x7_t): Ditto.
21926 (vfloat16mf4x8_t): Ditto.
21927 (vfloat16mf2x2_t): Ditto.
21928 (vfloat16mf2x3_t): Ditto.
21929 (vfloat16mf2x4_t): Ditto.
21930 (vfloat16mf2x5_t): Ditto.
21931 (vfloat16mf2x6_t): Ditto.
21932 (vfloat16mf2x7_t): Ditto.
21933 (vfloat16mf2x8_t): Ditto.
21934 (vfloat16m1x2_t): Ditto.
21935 (vfloat16m1x3_t): Ditto.
21936 (vfloat16m1x4_t): Ditto.
21937 (vfloat16m1x5_t): Ditto.
21938 (vfloat16m1x6_t): Ditto.
21939 (vfloat16m1x7_t): Ditto.
21940 (vfloat16m1x8_t): Ditto.
21941 (vfloat16m2x2_t): Ditto.
21942 (vfloat16m2x3_t): Ditto.
21943 (vfloat16m2x4_t): Ditto.
21944 (vfloat16m4x2_t): Ditto.
21945 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
21946 (vfloat16mf4x3_t): Ditto.
21947 (vfloat16mf4x4_t): Ditto.
21948 (vfloat16mf4x5_t): Ditto.
21949 (vfloat16mf4x6_t): Ditto.
21950 (vfloat16mf4x7_t): Ditto.
21951 (vfloat16mf4x8_t): Ditto.
21952 (vfloat16mf2x2_t): Ditto.
21953 (vfloat16mf2x3_t): Ditto.
21954 (vfloat16mf2x4_t): Ditto.
21955 (vfloat16mf2x5_t): Ditto.
21956 (vfloat16mf2x6_t): Ditto.
21957 (vfloat16mf2x7_t): Ditto.
21958 (vfloat16mf2x8_t): Ditto.
21959 (vfloat16m1x2_t): Ditto.
21960 (vfloat16m1x3_t): Ditto.
21961 (vfloat16m1x4_t): Ditto.
21962 (vfloat16m1x5_t): Ditto.
21963 (vfloat16m1x6_t): Ditto.
21964 (vfloat16m1x7_t): Ditto.
21965 (vfloat16m1x8_t): Ditto.
21966 (vfloat16m2x2_t): Ditto.
21967 (vfloat16m2x3_t): Ditto.
21968 (vfloat16m2x4_t): Ditto.
21969 (vfloat16m4x2_t): Ditto.
21970 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
21971 * config/riscv/riscv.md: New.
21972 * config/riscv/vector-iterators.md: New.
21974 2023-07-04 Andrew Pinski <apinski@marvell.com>
21976 PR tree-optimization/110487
21977 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
21978 build a nonstandard integer and use that.
21980 2023-07-04 Andrew Pinski <apinski@marvell.com>
21982 * match.pd (a?-1:0): Cast type an integer type
21983 rather the type before the negative.
21984 (a?0:-1): Likewise.
21986 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21988 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
21989 Change to use HARD_REG_BIT and its macros.
21990 * config/xtensa/xtensa.md
21991 (peephole2: regmove elimination during DFmode input reload):
21994 2023-07-04 Richard Biener <rguenther@suse.de>
21996 PR tree-optimization/110491
21997 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
21998 whether the PHI args are possibly undefined before folding
22001 2023-07-04 Pan Li <pan2.li@intel.com>
22002 Thomas Schwinge <thomas@codesourcery.com>
22004 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
22005 bits for machine mode table.
22006 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
22007 HOST machine mode bits.
22008 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
22009 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
22011 * tree-streamer.h (streamer_mode_table): Ditto.
22012 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
22013 as the packing limit.
22014 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
22016 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
22018 * lto-streamer.h (class lto_input_block): Capture
22019 'lto_file_decl_data *file_data' instead of just
22020 'unsigned char *mode_table'.
22021 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
22022 * ipa-fnsummary.cc (inline_read_section): Likewise.
22023 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
22024 * ipa-modref.cc (read_section): Likewise.
22025 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
22027 * ipa-sra.cc (isra_read_summary_section): Likewise.
22028 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
22029 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
22030 * lto-streamer-in.cc (lto_read_body_or_constructor)
22031 (lto_input_toplevel_asms): Likewise.
22032 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
22034 2023-07-04 Richard Biener <rguenther@suse.de>
22036 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
22037 (empty_bb_or_one_feeding_into_p): Check for them.
22038 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
22039 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
22041 2023-07-04 Richard Biener <rguenther@suse.de>
22043 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
22044 check guarding scalar_niter underflow.
22046 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
22048 PR tree-optimization/110531
22049 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
22050 slp_done_for_suggested_uf to false.
22052 2023-07-04 Richard Biener <rguenther@suse.de>
22054 PR tree-optimization/110228
22055 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
22056 Mark SSA may-undefs.
22057 (bb_no_side_effects_p): Check stmt uses for undefs.
22059 2023-07-04 Richard Biener <rguenther@suse.de>
22061 PR tree-optimization/110436
22062 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
22063 force live but not relevant pattern stmts relevant.
22065 2023-07-04 Lili Cui <lili.cui@intel.com>
22067 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
22068 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
22070 2023-07-04 Richard Biener <rguenther@suse.de>
22072 PR middle-end/110495
22073 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
22074 since we do not set TREE_OVERFLOW on those since the
22075 introduction of VL vectors.
22076 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
22077 at TREE_OVERFLOW to determine validity of association.
22079 2023-07-04 Richard Biener <rguenther@suse.de>
22081 PR tree-optimization/110310
22082 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
22083 Move costing part ...
22084 (vect_analyze_loop_costing): ... here. Integrate better
22085 estimate for epilogues from ...
22086 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
22087 with actual epilogue status.
22088 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
22089 avoid cancelling epilogue vectorization.
22090 (vect_update_epilogue_niters): Remove. No longer update
22091 epilogue LOOP_VINFO_NITERS.
22093 2023-07-04 Pan Li <pan2.li@intel.com>
22096 2023-07-03 Pan Li <pan2.li@intel.com>
22098 * config/riscv/vector.md: Fix typo.
22100 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22102 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
22103 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
22104 (expand_gather_load_optab_fn): Ditto.
22105 (internal_load_fn_p): Ditto.
22106 (internal_store_fn_p): Ditto.
22107 (internal_gather_scatter_fn_p): Ditto.
22108 (internal_fn_len_index): Ditto.
22109 (internal_fn_mask_index): Ditto.
22110 (internal_fn_stored_value_index): Ditto.
22111 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
22112 (LEN_MASK_SCATTER_STORE): Ditto.
22113 * optabs.def (OPTAB_CD): Ditto.
22115 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22117 * config/riscv/riscv-vsetvl.cc
22118 (vector_insn_info::parse_insn): Add early break.
22120 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
22122 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
22123 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
22125 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
22127 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
22129 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
22131 * common/config/riscv/riscv-common.cc: Add support for zvbb,
22132 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
22133 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
22134 * config/riscv/arch-canonicalize: Add canonicalization info for
22135 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
22136 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
22137 (MASK_ZVBC): Likewise.
22138 (TARGET_ZVBB): Likewise.
22139 (TARGET_ZVBC): Likewise.
22140 (MASK_ZVKG): Likewise.
22141 (MASK_ZVKNED): Likewise.
22142 (MASK_ZVKNHA): Likewise.
22143 (MASK_ZVKNHB): Likewise.
22144 (MASK_ZVKSED): Likewise.
22145 (MASK_ZVKSH): Likewise.
22146 (MASK_ZVKN): Likewise.
22147 (MASK_ZVKNC): Likewise.
22148 (MASK_ZVKNG): Likewise.
22149 (MASK_ZVKS): Likewise.
22150 (MASK_ZVKSC): Likewise.
22151 (MASK_ZVKSG): Likewise.
22152 (MASK_ZVKT): Likewise.
22153 (TARGET_ZVKG): Likewise.
22154 (TARGET_ZVKNED): Likewise.
22155 (TARGET_ZVKNHA): Likewise.
22156 (TARGET_ZVKNHB): Likewise.
22157 (TARGET_ZVKSED): Likewise.
22158 (TARGET_ZVKSH): Likewise.
22159 (TARGET_ZVKN): Likewise.
22160 (TARGET_ZVKNC): Likewise.
22161 (TARGET_ZVKNG): Likewise.
22162 (TARGET_ZVKS): Likewise.
22163 (TARGET_ZVKSC): Likewise.
22164 (TARGET_ZVKSG): Likewise.
22165 (TARGET_ZVKT): Likewise.
22166 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
22168 2023-07-03 Andrew Pinski <apinski@marvell.com>
22170 PR middle-end/110510
22171 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
22173 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
22175 * config/darwin.h: Avoid duplicate multiply_defined specs on
22176 earlier Darwin versions with shared libgcc.
22178 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
22180 * tree.h (tree_int_cst_equal): Change return type from int to bool.
22181 (operand_equal_for_phi_arg_p): Ditto.
22182 (tree_map_base_marked_p): Ditto.
22183 * tree.cc (contains_placeholder_p): Update function body
22184 for bool return type.
22185 (type_cache_hasher::equal): Ditto.
22186 (tree_map_base_hash): Change return type
22187 from int to void and adjust function body accordingly.
22188 (tree_int_cst_equal): Ditto.
22189 (operand_equal_for_phi_arg_p): Ditto.
22190 (get_narrower): Change "first" variable to bool.
22191 (cl_option_hasher::equal): Update function body for bool return type.
22192 * ggc.h (ggc_set_mark): Change return type from int to bool.
22193 (ggc_marked_p): Ditto.
22194 * ggc-page.cc (gt_ggc_mx): Change return type
22195 from int to void and adjust function body accordingly.
22196 (ggc_set_mark): Ditto.
22198 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22200 * config/riscv/autovec.md: Change order of
22201 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22202 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
22203 * doc/md.texi: Ditto.
22204 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
22205 * internal-fn.cc (len_maskload_direct): Ditto.
22206 (len_maskstore_direct): Ditto.
22207 (add_len_and_mask_args): New function.
22208 (expand_partial_load_optab_fn): Change order of
22209 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22210 (expand_partial_store_optab_fn): Ditto.
22211 (internal_fn_len_index): New function.
22212 (internal_fn_mask_index): Change order of
22213 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22214 (internal_fn_stored_value_index): Ditto.
22215 (internal_len_load_store_bias): Ditto.
22216 * internal-fn.h (internal_fn_len_index): New function.
22217 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
22218 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
22219 * tree-vect-stmts.cc (vectorizable_store): Ditto.
22220 (vectorizable_load): Ditto.
22222 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
22225 * doc/gm2.texi (Semantic checking): Include examples using
22226 -Wuninit-variable-checking.
22228 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22230 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
22231 (*single_widen_fnma<mode>): Ditto.
22232 (*double_widen_fms<mode>): Ditto.
22233 (*single_widen_fms<mode>): Ditto.
22234 (*double_widen_fnms<mode>): Ditto.
22235 (*single_widen_fnms<mode>): Ditto.
22237 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22239 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
22240 into "*" in pattern name which simplifies build files.
22241 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
22242 (*pred_single_widen_mul<mode>): New pattern.
22244 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
22246 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
22247 the index to be 0 or 1.
22249 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
22252 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22254 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
22255 (*single_widen_fnma<mode>): Ditto.
22256 (*double_widen_fms<mode>): Ditto.
22257 (*single_widen_fms<mode>): Ditto.
22258 (*double_widen_fnms<mode>): Ditto.
22259 (*single_widen_fnms<mode>): Ditto.
22261 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22263 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
22264 (*single_widen_fnma<mode>): Ditto.
22265 (*double_widen_fms<mode>): Ditto.
22266 (*single_widen_fms<mode>): Ditto.
22267 (*double_widen_fnms<mode>): Ditto.
22268 (*single_widen_fnms<mode>): Ditto.
22270 2023-07-03 Pan Li <pan2.li@intel.com>
22272 * config/riscv/vector.md: Fix typo.
22274 2023-07-03 Richard Biener <rguenther@suse.de>
22276 PR tree-optimization/110506
22277 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
22278 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
22280 2023-07-03 Richard Biener <rguenther@suse.de>
22282 PR tree-optimization/110506
22283 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
22284 type before relying on TYPE_PRECISION to produce a nonzero mask.
22286 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22288 * config/mips/mips.md(*and<mode>3_mips16): Generates
22289 ZEB/ZEH instructions.
22291 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22293 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
22294 address register to M16_REGS for MIPS16.
22295 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
22296 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
22297 (AVAIL_NON_MIPS16 (cache..)): Update to
22298 AVAIL_MIPS16E2_OR_NON_MIPS16.
22299 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
22300 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
22302 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22304 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
22305 for ISA_HAS_MIPS16E2.
22306 (ISA_HAS_SYNC): Same as above.
22307 (ISA_HAS_LL_SC): Same as above.
22309 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22311 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
22312 Add logics for generating instruction.
22313 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
22314 * config/mips/mips.md(mov_<load>l): Generates instructions.
22315 (mov_<load>r): Same as above.
22316 (mov_<store>l): Adjusted for the conditions above.
22317 (mov_<store>r): Same as above.
22318 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
22319 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
22321 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22323 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
22324 (mips_const_insns): Same as above.
22325 (mips_output_move): Same as above.
22326 (mips_output_function_prologue): Same as above.
22327 * config/mips/mips.md: Same as above
22329 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22331 * config/mips/constraints.md(Yz): New constraints for mips16e2.
22332 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
22333 (mips_bit_clear_info): Same as above.
22334 * config/mips/mips.cc(mips_bit_clear_info): New function for
22335 generating instructions.
22336 (mips_bit_clear_p): Same as above.
22337 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
22338 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
22339 (*and<mode>3): Generates INS instruction.
22340 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
22341 (ior<mode>3): Add logics for ORI instruction.
22342 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
22343 (*ior<mode>3_mips16): Add logics for XORI instruction.
22344 (*xor<mode>3_mips16): Generates XORI instrucion.
22345 (*extzv<mode>): Add logics for EXT instruction.
22346 (*insv<mode>): Add logics for INS instruction.
22347 * config/mips/predicates.md(bit_clear_operand): New predicate for
22348 generating bitwise instructions.
22349 (and_reg_operand): Add logics for generating bitwise instructions.
22351 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22353 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
22354 that uses global pointer register.
22355 (mips16_unextended_reference_p): Same as above.
22356 (mips_pic_base_register): Same as above.
22357 (mips_init_relocs): Same as above.
22358 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
22359 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
22360 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
22361 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
22363 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22365 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
22366 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
22367 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
22368 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
22369 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
22370 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
22372 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
22374 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
22376 * config/mips/mips.h(__mips_mips16e2): Defined a new
22378 (ISA_HAS_MIPS16E2): Defined a new macro.
22379 (ASM_SPEC): Pass mmips16e2 to the assembler.
22380 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
22381 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
22382 * doc/invoke.texi: Add -m(no-)mips16e2 option..
22384 2023-07-02 Jakub Jelinek <jakub@redhat.com>
22386 PR tree-optimization/110508
22387 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
22388 REALPART_EXPR opf nlhs if re2 is non-NULL.
22390 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22392 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
22394 * config/xtensa/xtensa.md (*xtensa_clamps):
22395 Add TARGET_MINMAX to the condition.
22397 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22399 * config/xtensa/xtensa.md (*eqne_INT_MIN):
22400 Add missing ":SI" to the match_operator.
22402 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
22405 * config/darwin.opt: Add fconstant-cfstrings alias to
22406 mconstant-cfstrings.
22407 * doc/invoke.texi: Amend invocation descriptions to reflect
22408 that the fconstant-cfstrings is a target-option alias and to
22409 add the missing mconstant-cfstrings option description to the
22412 2023-07-01 Jan Hubicka <jh@suse.cz>
22414 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
22415 parmaeter; update profile.
22416 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
22417 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
22418 (static_loop_exit): ... this; return the edge to be elliminated.
22419 (ch_base::copy_headers): Handle profile updating for eliminated exits.
22421 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
22423 * config/i386/i386-features.cc (compute_convert_gain): Provide
22424 gains/costs for ROTATE and ROTATERT (by an integer constant).
22425 (general_scalar_chain::convert_rotate): New helper function to
22426 convert a DImode or SImode rotation by an integer constant into
22428 (general_scalar_chain::convert_insn): Call the new convert_rotate
22429 for ROTATE and ROTATERT.
22430 (general_scalar_to_vector_candidate_p): Consider ROTATE and
22431 ROTATERT to be candidates if the second operand is an integer
22432 constant, valid for a rotation (or shift) in the given mode.
22433 * config/i386/i386-features.h (general_scalar_chain): Add new
22434 helper method convert_rotate.
22436 2023-07-01 Jan Hubicka <jh@suse.cz>
22438 PR tree-optimization/103680
22439 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
22440 make message clearer.
22442 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
22444 PR tree-optimization/101832
22445 * tree-object-size.cc (addr_object_size): Handle structure/union type
22446 when it has flexible size.
22448 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
22450 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
22451 (fold_nonarray_ctor_reference): Likewise. Specifically deal
22452 with integral bit-fields.
22453 (fold_ctor_reference): Make sure that the constructor uses the
22454 native storage order.
22456 2023-06-30 Jan Hubicka <jh@suse.cz>
22458 PR middle-end/109849
22459 * predict.cc (estimate_bb_frequencies): Turn to static function.
22460 (expr_expected_value_1): Fix handling of binary expressions with
22462 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
22463 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
22465 * predict.h (estimate_bb_frequencies): No longer declare it.
22467 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
22469 * fold-const.h (multiple_of_p): Change return type from int to bool.
22470 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
22471 neg_conp_p and neg_var_p variables to bool.
22472 (const_binop): Change sat_p variable to bool.
22473 (merge_ranges): Change no_overlap variable to bool.
22474 (extract_muldiv_1): Change same_p variable to bool.
22475 (tree_swap_operands_p): Update function body for bool return type.
22476 (fold_truth_andor): Change commutative variable to bool.
22477 (multiple_of_p): Change return type
22478 from int to void and adjust function body accordingly.
22479 * optabs.h (expand_twoval_unop): Change return type from int to bool.
22480 (expand_twoval_binop): Ditto.
22481 (can_compare_p): Ditto.
22482 (have_add2_insn): Ditto.
22483 (have_addptr3_insn): Ditto.
22484 (have_sub2_insn): Ditto.
22485 (have_insn_for): Ditto.
22486 * optabs.cc (add_equal_note): Ditto.
22487 (widen_operand): Change no_extend argument from int to bool.
22488 (expand_binop): Ditto.
22489 (expand_twoval_unop): Change return type
22490 from int to void and adjust function body accordingly.
22491 (expand_twoval_binop): Ditto.
22492 (can_compare_p): Ditto.
22493 (have_add2_insn): Ditto.
22494 (have_addptr3_insn): Ditto.
22495 (have_sub2_insn): Ditto.
22496 (have_insn_for): Ditto.
22498 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
22500 * config/aarch64/aarch64-simd.md
22501 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
22502 Expansions for abd vec widen optabs.
22503 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
22504 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
22505 that give the appropriate extend RTL for the max RTL.
22507 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
22509 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
22510 * optabs.def (vec_widen_sabd_optab,
22511 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
22512 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
22513 vec_widen_uabd_optab,
22514 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
22515 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
22517 * doc/md.texi: Document them.
22518 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
22519 to build a VEC_WIDEN_ABD call if the input precision is smaller
22520 than the precision of the output.
22521 (vect_recog_widen_abd_pattern): Should an ABD expression be
22522 found preceeding an extension, replace the two with a
22525 2023-06-30 Pan Li <pan2.li@intel.com>
22527 * config/riscv/vector.md: Refactor the common condition.
22529 2023-06-30 Richard Biener <rguenther@suse.de>
22531 PR tree-optimization/110496
22532 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
22533 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
22535 2023-06-30 Richard Biener <rguenther@suse.de>
22537 PR middle-end/110489
22538 * statistics.cc (curr_statistics_hash): Add argument
22539 indicating whether we should allocate the hash.
22540 (statistics_fini_pass): If the hash isn't allocated
22541 only print the summary header.
22543 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
22544 Thomas Schwinge <thomas@codesourcery.com>
22546 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
22548 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
22551 * config/mips/mips.cc (mips_function_arg_alignment): Returns
22552 the alignment of function argument. In case of typedef type,
22553 it returns the aligment of the aliased type.
22554 (mips_function_arg_boundary): Relocated calculation of the
22555 aligment of function arguments.
22557 2023-06-29 Jan Hubicka <jh@suse.cz>
22559 PR tree-optimization/109849
22560 * ipa-fnsummary.cc (decompose_param_expr): Skip
22561 functions returning its parameter.
22562 (set_cond_stmt_execution_predicate): Return early
22563 if predicate was constructed.
22565 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
22568 * doc/extend.texi: Document GCC extension on a structure containing
22569 a flexible array member to be a member of another structure.
22571 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
22573 * print-tree.cc (print_node): Print new bit type_include_flexarray.
22574 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
22575 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
22576 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
22577 in bit no_named_args_stdarg_p properly for its corresponding type.
22578 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
22579 out bit no_named_args_stdarg_p properly for its corresponding type.
22580 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
22582 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
22584 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
22585 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
22586 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
22588 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
22590 * value-range.cc (frange::set): Do not call verify_range.
22591 (frange::normalize_kind): Verify range.
22592 (frange::union_nans): Do not call verify_range.
22593 (frange::union_): Same.
22594 (frange::intersect): Same.
22595 (irange::irange_single_pair_union): Call normalize_kind if
22597 (irange::union_): Same.
22598 (irange::intersect): Same.
22599 (irange::set_range_from_nonzero_bits): Verify range.
22600 (irange::set_nonzero_bits): Call normalize_kind if necessary.
22601 (irange::get_nonzero_bits): Tweak comment.
22602 (irange::intersect_nonzero_bits): Call normalize_kind if
22604 (irange::union_nonzero_bits): Same.
22605 * value-range.h (irange::normalize_kind): Verify range.
22607 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
22609 * cselib.h (rtx_equal_for_cselib_1):
22610 Change return type from int to bool.
22611 (references_value_p): Ditto.
22612 (rtx_equal_for_cselib_p): Ditto.
22613 * expr.h (can_store_by_pieces): Ditto.
22614 (try_casesi): Ditto.
22615 (try_tablejump): Ditto.
22616 (safe_from_p): Ditto.
22617 * sbitmap.h (bitmap_equal_p): Ditto.
22618 * cselib.cc (references_value_p): Change return type
22619 from int to void and adjust function body accordingly.
22620 (rtx_equal_for_cselib_1): Ditto.
22621 * expr.cc (is_aligning_offset): Ditto.
22622 (can_store_by_pieces): Ditto.
22623 (mostly_zeros_p): Ditto.
22624 (all_zeros_p): Ditto.
22625 (safe_from_p): Ditto.
22626 (is_aligning_offset): Ditto.
22627 (try_casesi): Ditto.
22628 (try_tablejump): Ditto.
22629 (store_constructor): Change "need_to_clear" and
22630 "const_bounds_p" variables to bool.
22631 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
22633 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
22635 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
22638 2023-06-29 Richard Biener <rguenther@suse.de>
22640 PR tree-optimization/110460
22641 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
22642 Only allow integral, pointer and scalar float type scalar_type.
22644 2023-06-29 Lili Cui <lili.cui@intel.com>
22646 PR tree-optimization/110148
22647 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
22648 ops in this function.
22650 2023-06-29 Richard Biener <rguenther@suse.de>
22652 PR middle-end/110452
22653 * expr.cc (store_constructor): Handle uniform boolean
22654 vectors with integer mode specially.
22656 2023-06-29 Richard Biener <rguenther@suse.de>
22658 PR middle-end/110461
22659 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
22662 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
22664 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
22665 (array_slice): Relax va_gc constructor to handle all vectors
22666 with a vl_embed layout.
22668 2023-06-29 Pan Li <pan2.li@intel.com>
22670 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
22671 (riscv_mode_needed): Likewise.
22672 (riscv_entity_mode_after): Likewise.
22673 (riscv_mode_after): Likewise.
22674 (riscv_mode_entry): Likewise.
22675 (riscv_mode_exit): Likewise.
22676 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
22678 * config/riscv/riscv.md: Add FRM register.
22679 * config/riscv/vector-iterators.md: Add FRM type.
22680 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
22681 (fsrm): Define new insn for fsrm instruction.
22683 2023-06-29 Pan Li <pan2.li@intel.com>
22685 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
22686 Add macro for static frm min and max.
22687 * config/riscv/riscv-vector-builtins-bases.cc
22688 (class binop_frm): New class for floating-point with frm.
22689 (BASE): Add vfadd for frm.
22690 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
22691 * config/riscv/riscv-vector-builtins-functions.def
22692 (vfadd_frm): Likewise.
22693 * config/riscv/riscv-vector-builtins-shapes.cc
22694 (struct alu_frm_def): New struct for alu with frm.
22695 (SHAPE): Add alu with frm.
22696 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
22697 * config/riscv/riscv-vector-builtins.cc
22698 (function_checker::report_out_of_range_and_not): New function
22699 for report out of range and not val.
22700 (function_checker::require_immediate_range_or): New function
22701 for checking in range or one val.
22702 * config/riscv/riscv-vector-builtins.h: Add function decl.
22704 2023-06-29 Cui, Lili <lili.cui@intel.com>
22706 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
22707 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
22709 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
22712 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
22713 to insn before validating it.
22715 2023-06-28 Jan Hubicka <jh@suse.cz>
22717 PR middle-end/110334
22718 * ipa-fnsummary.h (ipa_fn_summary): Add
22719 safe_to_inline_to_always_inline.
22720 * ipa-inline.cc (can_early_inline_edge_p): ICE
22721 if SSA is not built; do cycle checking for
22722 always_inline functions.
22723 (inline_always_inline_functions): Be recrusive;
22724 watch for cycles; do not updat overall summary.
22725 (early_inliner): Do not give up on always_inlines.
22726 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
22729 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
22731 * output.h (leaf_function_p): Change return type from int to bool.
22732 (final_forward_branch_p): Ditto.
22733 (only_leaf_regs_used): Ditto.
22734 (maybe_assemble_visibility): Ditto.
22735 * varasm.h (supports_one_only): Ditto.
22736 * rtl.h (compute_alignments): Change return type from int to void.
22737 * final.cc (app_on): Change return type from int to bool.
22738 (compute_alignments): Change return type from int to void
22739 and adjust function body accordingly.
22740 (shorten_branches): Change "something_changed" variable
22741 type from int to bool.
22742 (leaf_function_p): Change return type from int to bool
22743 and adjust function body accordingly.
22744 (final_forward_branch_p): Ditto.
22745 (only_leaf_regs_used): Ditto.
22746 * varasm.cc (contains_pointers_p): Change return type from
22747 int to bool and adjust function body accordingly.
22748 (compare_constant): Ditto.
22749 (maybe_assemble_visibility): Ditto.
22750 (supports_one_only): Ditto.
22752 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
22755 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
22756 (maybe_copy_reg_attrs): New function.
22757 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
22758 (copyprop_hardreg_forward_1): Ditto.
22760 2023-06-28 Richard Biener <rguenther@suse.de>
22762 PR tree-optimization/110434
22763 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
22764 VAR we replace with <retval>.
22766 2023-06-28 Richard Biener <rguenther@suse.de>
22768 PR tree-optimization/110451
22769 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
22770 tcc_comparison are expensive.
22772 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
22774 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
22775 for TImode comparisons on 32-bit architectures.
22776 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
22777 SWIM1248x to exclude/avoid TImode being conditional on -m64.
22778 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
22779 and/or with TARGET_SSE4_1.
22780 * config/i386/predicates.md (ix86_timode_comparison_operator):
22781 New predicate that depends upon TARGET_64BIT.
22782 (ix86_timode_comparison_operand): Likewise.
22784 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
22787 * config/i386/i386-features.cc (compute_convert_gain): Provide
22788 more accurate gains for conversion of scalar comparisons to
22791 2023-06-28 Richard Biener <rguenther@suse.de>
22793 PR tree-optimization/110443
22794 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
22797 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
22799 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
22800 (peephole2 for move_and_compare): New.
22801 (mode_iterator WORD): New. Set the mode to SI/DImode by
22803 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
22804 (split pattern for compare_and_move): Likewise.
22806 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22808 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
22809 (*single_widen_fma<mode>): Ditto.
22811 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
22814 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
22816 (altivec_vupkhs<VU_char>_direct): ...this.
22817 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
22818 predicate to test if a constant can be loaded with vspltisw and
22820 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
22821 a vector constant can be synthesized with a vspltisw and a vupkhsw.
22822 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
22824 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
22825 function to return true if OP mode is V2DI and can be synthesized
22826 with vupkhsw and vspltisw.
22827 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
22828 constants with vspltisw and vupkhsw.
22830 2023-06-28 Jan Hubicka <jh@suse.cz>
22832 PR tree-optimization/110377
22833 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
22835 (ipa_analyze_node): Enable ranger.
22837 2023-06-28 Richard Biener <rguenther@suse.de>
22839 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
22840 (TYPE_PRECISION_RAW): Provide raw access to the precision
22842 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
22843 (gimple_canonical_types_compatible_p): Likewise.
22844 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
22845 Stream TYPE_PRECISION_RAW.
22846 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
22848 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
22850 2023-06-28 Alexandre Oliva <oliva@adacore.com>
22852 * doc/extend.texi (zero-call-used-regs): Document leafy and
22854 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
22855 LEAFY and variants.
22856 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
22857 functions in leafy mode.
22858 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
22860 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22862 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
22863 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
22865 (@pred_single_widen_add<mode>): New pattern.
22866 (@pred_single_widen_sub<mode>): New pattern.
22868 2023-06-28 liuhongt <hongtao.liu@intel.com>
22870 * config/i386/i386.cc (ix86_invalid_conversion): New function.
22871 (TARGET_INVALID_CONVERSION): Define as
22872 ix86_invalid_conversion.
22874 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
22876 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
22878 (<float_cvt><vnconvert><mode>2): Ditto.
22879 (<optab><mode><vnconvert>2): Ditto.
22880 (<float_cvt><mode><vnconvert>2): Ditto.
22881 * config/riscv/vector-iterators.md: Add vnconvert.
22883 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
22885 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
22887 (extend<v_quad_trunc><mode>2): Ditto.
22888 (trunc<mode><v_double_trunc>2): Ditto.
22889 (trunc<mode><v_quad_trunc>2): Ditto.
22890 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
22891 V_QUAD_TRUNC and v_quad_trunc.
22893 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
22895 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
22898 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
22900 * config/riscv/autovec.md (copysign<mode>3): Add expander.
22901 (xorsign<mode>3): Ditto.
22902 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
22904 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
22908 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
22909 (@pred_ncopysign<mode>_scalar): Ditto.
22911 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
22913 * config/riscv/autovec.md: VF_AUTO -> VF.
22914 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
22915 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
22917 * config/riscv/vector.md: Use new iterators.
22919 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
22921 * match.pd: Use element_mode and check if target supports
22922 operation with new type.
22924 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22926 * config/aarch64/aarch64-sve-builtins-base.cc
22927 (svdupq_impl::fold_nonconst_dupq): New method.
22928 (svdupq_impl::fold): Call fold_nonconst_dupq.
22930 2023-06-27 Andrew Pinski <apinski@marvell.com>
22932 PR middle-end/110420
22933 PR middle-end/103979
22934 PR middle-end/98619
22935 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
22937 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
22939 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
22940 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
22942 (set_switch_stmt_execution_predicate): Same.
22943 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
22945 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
22947 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
22948 ipa_vr instead of value_range.
22951 (ipa_get_value_range): Same.
22952 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
22956 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
22958 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
22959 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
22960 (ipa_set_jfunc_vr): Take a range.
22961 (ipa_compute_jump_functions_for_edge): Pass range to
22963 (ipa_write_jump_function): Call streamer write helper.
22964 (ipa_read_jump_function): Call streamer read helper.
22965 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
22967 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
22969 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
22970 as a probable initializer rather than a probable complete statement.
22972 2023-06-27 Richard Biener <rguenther@suse.de>
22974 PR tree-optimization/96208
22975 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
22976 a non-grouped load if it is the same for all lanes.
22977 (vect_build_slp_tree_2): Handle not grouped loads.
22978 (vect_optimize_slp_pass::remove_redundant_permutations):
22980 (vect_transform_slp_perm_load_1): Likewise.
22981 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
22982 (get_group_load_store_type): Likewise. Handle
22983 invariant accesses.
22984 (vectorizable_load): Likewise.
22986 2023-06-27 liuhongt <hongtao.liu@intel.com>
22988 PR rtl-optimization/110237
22989 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
22991 (maskstore<mode><avx512fmaskmodelower): Ditto.
22992 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
22993 from original <avx512>_store<mode>_mask.
22995 2023-06-27 liuhongt <hongtao.liu@intel.com>
22997 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
22998 Move flag_expensive_optimizations && !optimize_size to ..
22999 * config/i386/i386-options.cc (ix86_option_override_internal):
23000 .. this, it makes -mvzeroupper independent of optimization
23001 level, but still keeps the behavior of architecture
23002 tuning(emit_vzeroupper) unchanged.
23004 2023-06-27 liuhongt <hongtao.liu@intel.com>
23007 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
23008 vzeroupper for vzeroupper call_insn.
23010 2023-06-27 Andrew Pinski <apinski@marvell.com>
23012 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
23015 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23017 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
23020 2023-06-26 Andrew Pinski <apinski@marvell.com>
23022 * doc/extend.texi (access attribute): Add
23024 (interrupt/interrupt_handler attribute):
23027 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23029 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
23030 Use <DWI> instead of <V2XWIDE>.
23031 (aarch64_sqrshrun_n<mode>): Likewise.
23033 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23035 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
23037 (aarch64_rnd_imm_p): ... This.
23038 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
23040 (aarch64_int_rnd_operand): ... This.
23041 (aarch64_simd_rshrn_imm_vec): Delete.
23042 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
23043 Adjust for the above.
23044 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
23045 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
23046 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
23047 (aarch64_sqrshrun_n<mode>_insn): Likewise.
23048 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
23049 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
23050 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
23051 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
23052 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
23054 (aarch64_rnd_imm_p): ... This.
23056 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
23058 * config/s390/s390.cc (s390_encode_section_info): Set
23059 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
23062 2023-06-26 Jan Hubicka <jh@suse.cz>
23064 PR tree-optimization/109849
23065 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
23066 count of newly constructed forwarder block.
23068 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
23070 * doc/optinfo.texi: Fix "steam" -> "stream".
23072 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23074 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
23076 (dse_optimize_stmt): Add LEN_MASK_STORE.
23078 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23080 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
23081 fold of LOAD/STORE with length.
23083 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
23085 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
23086 Check for interdependence between operands 1 and 2.
23088 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
23090 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
23091 into account when costing non-widening/truncating conversions.
23093 2023-06-26 Richard Biener <rguenther@suse.de>
23095 PR tree-optimization/110381
23096 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
23097 Materialize permutes before fold-left reductions.
23099 2023-06-26 Pan Li <pan2.li@intel.com>
23101 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
23103 2023-06-26 Richard Biener <rguenther@suse.de>
23105 * varasm.cc (initializer_constant_valid_p_1): Also
23106 constrain the type of value to be scalar integral
23107 before dispatching to narrowing_initializer_constant_valid_p.
23109 2023-06-26 Richard Biener <rguenther@suse.de>
23111 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
23112 Use element_precision.
23114 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23116 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
23118 (vcondu<V:mode><VI:mode>): Ditto.
23119 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
23120 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
23122 2023-06-26 Richard Biener <rguenther@suse.de>
23124 PR tree-optimization/110392
23125 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
23126 Do early exits on true/false predicate only after normalization.
23128 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23130 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
23133 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
23135 * config/i386/i386.md (peephole2): Simplify zeroing a register
23136 followed by an IOR, XOR or PLUS operation on it, into a move.
23137 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
23138 eliminate (and hide from reload) unnecessary word to doubleword
23139 extensions that are followed by left shifts by sufficiently large,
23140 but valid, bit counts.
23142 2023-06-26 liuhongt <hongtao.liu@intel.com>
23144 PR tree-optimization/110371
23145 PR tree-optimization/110018
23146 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
23147 save intermediate type operand instead of "subtle" vec_dest
23150 2023-06-26 liuhongt <hongtao.liu@intel.com>
23152 PR tree-optimization/110371
23153 PR tree-optimization/110018
23154 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
23155 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
23157 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
23159 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
23160 Override tune_string with arch_string if tune_string is not
23161 explicitly specified.
23163 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23165 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
23167 * config/riscv/riscv-vsetvl.h: New function.
23169 2023-06-25 Li Xu <xuli1@eswincomputing.com>
23171 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
23174 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23176 * config/riscv/autovec.md (len_load_<mode>): Remove.
23177 (len_maskload<mode><vm>): Remove.
23178 (len_store_<mode>): New pattern.
23179 (len_maskstore<mode><vm>): New pattern.
23180 * config/riscv/predicates.md (autovec_length_operand): New predicate.
23181 * config/riscv/riscv-protos.h (enum insn_type): New enum.
23182 (expand_load_store): New function.
23183 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
23184 (emit_nonvlmax_masked_insn): Ditto.
23185 (expand_load_store): Ditto.
23186 * config/riscv/riscv-vector-builtins.cc
23187 (function_expander::use_contiguous_store_insn): Add avl_type operand
23189 * config/riscv/vector.md: Ditto.
23191 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23193 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
23196 2023-06-25 Pan Li <pan2.li@intel.com>
23198 * config/riscv/vector.md: Revert.
23200 2023-06-25 Pan Li <pan2.li@intel.com>
23202 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
23203 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
23204 (ADJUST_ALIGNMENT): Ditto.
23205 (RVV_TUPLE_PARTIAL_MODES): Ditto.
23206 (ADJUST_NUNITS): Ditto.
23207 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
23208 (vfloat16mf4x3_t): Ditto.
23209 (vfloat16mf4x4_t): Ditto.
23210 (vfloat16mf4x5_t): Ditto.
23211 (vfloat16mf4x6_t): Ditto.
23212 (vfloat16mf4x7_t): Ditto.
23213 (vfloat16mf4x8_t): Ditto.
23214 (vfloat16mf2x2_t): Ditto.
23215 (vfloat16mf2x3_t): Ditto.
23216 (vfloat16mf2x4_t): Ditto.
23217 (vfloat16mf2x5_t): Ditto.
23218 (vfloat16mf2x6_t): Ditto.
23219 (vfloat16mf2x7_t): Ditto.
23220 (vfloat16mf2x8_t): Ditto.
23221 (vfloat16m1x2_t): Ditto.
23222 (vfloat16m1x3_t): Ditto.
23223 (vfloat16m1x4_t): Ditto.
23224 (vfloat16m1x5_t): Ditto.
23225 (vfloat16m1x6_t): Ditto.
23226 (vfloat16m1x7_t): Ditto.
23227 (vfloat16m1x8_t): Ditto.
23228 (vfloat16m2x2_t): Ditto.
23229 (vfloat16m2x3_t): Diito.
23230 (vfloat16m2x4_t): Diito.
23231 (vfloat16m4x2_t): Diito.
23232 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
23233 (vfloat16mf4x3_t): Ditto.
23234 (vfloat16mf4x4_t): Ditto.
23235 (vfloat16mf4x5_t): Ditto.
23236 (vfloat16mf4x6_t): Ditto.
23237 (vfloat16mf4x7_t): Ditto.
23238 (vfloat16mf4x8_t): Ditto.
23239 (vfloat16mf2x2_t): Ditto.
23240 (vfloat16mf2x3_t): Ditto.
23241 (vfloat16mf2x4_t): Ditto.
23242 (vfloat16mf2x5_t): Ditto.
23243 (vfloat16mf2x6_t): Ditto.
23244 (vfloat16mf2x7_t): Ditto.
23245 (vfloat16mf2x8_t): Ditto.
23246 (vfloat16m1x2_t): Ditto.
23247 (vfloat16m1x3_t): Ditto.
23248 (vfloat16m1x4_t): Ditto.
23249 (vfloat16m1x5_t): Ditto.
23250 (vfloat16m1x6_t): Ditto.
23251 (vfloat16m1x7_t): Ditto.
23252 (vfloat16m1x8_t): Ditto.
23253 (vfloat16m2x2_t): Ditto.
23254 (vfloat16m2x3_t): Ditto.
23255 (vfloat16m2x4_t): Ditto.
23256 (vfloat16m4x2_t): Ditto.
23257 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
23258 * config/riscv/riscv.md: Ditto.
23259 * config/riscv/vector-iterators.md: Ditto.
23261 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23263 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
23264 (gimple_fold_partial_load_store_mem_ref): Ditto.
23265 (gimple_fold_partial_store): Ditto.
23266 (gimple_fold_call): Ditto.
23268 2023-06-25 liuhongt <hongtao.liu@intel.com>
23271 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
23272 Refine pattern with UNSPEC_MASKLOAD.
23273 (maskload<mode><avx512fmaskmodelower>): Ditto.
23274 (*<avx512>_load<mode>_mask): Extend mode iterator to
23276 (*<avx512>_load<mode>): Ditto.
23278 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23280 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
23282 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23284 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
23285 LEN_MASK_{LOAD,STORE}
23287 2023-06-25 yulong <shiyulong@iscas.ac.cn>
23289 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
23291 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
23293 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
23295 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23297 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
23298 (*fma<VI:mode><P:mode>): Ditto.
23299 (*fnma<mode>): Ditto.
23300 (*fnma<VI:mode><P:mode>): Ditto.
23302 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23304 * config/riscv/autovec.md (fma<mode>4): New pattern.
23305 (*fma<mode>): Ditto.
23306 (fnma<mode>4): Ditto.
23307 (*fnma<mode>): Ditto.
23308 (fms<mode>4): Ditto.
23309 (*fms<mode>): Ditto.
23310 (fnms<mode>4): Ditto.
23311 (*fnms<mode>): Ditto.
23312 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
23314 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
23315 * config/riscv/vector.md: Fix attribute bug.
23317 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23319 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
23320 Apply LEN_MASK_{LOAD,STORE}.
23322 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23324 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
23325 Add LEN_MASK_{LOAD,STORE}.
23327 2023-06-24 David Malcolm <dmalcolm@redhat.com>
23329 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
23330 * diagnostic.cc: Likewise.
23331 * text-art/box-drawing.cc: Likewise.
23332 * text-art/canvas.cc: Likewise.
23333 * text-art/ruler.cc: Likewise.
23334 * text-art/selftests.cc: Likewise.
23335 * text-art/selftests.h (text_art::canvas): New forward decl.
23336 * text-art/style.cc: Add #define INCLUDE_VECTOR.
23337 * text-art/styled-string.cc: Likewise.
23338 * text-art/table.cc: Likewise.
23339 * text-art/table.h: Remove #include <vector>.
23340 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
23341 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
23342 Remove #include of <vector> and <string>.
23343 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
23344 * text-art/widget.h: Remove #include <vector>.
23346 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23348 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
23349 (internal_load_fn_p): Add LEN_MASK_LOAD.
23350 (internal_store_fn_p): Add LEN_MASK_STORE.
23351 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
23352 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
23353 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
23354 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
23355 (get_len_load_store_mode): Ditto.
23356 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
23357 (get_len_load_store_mode): Ditto.
23358 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
23359 (get_all_ones_mask): New function.
23360 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
23361 (vectorizable_load): Ditto.
23363 2023-06-23 Marek Polacek <polacek@redhat.com>
23365 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
23366 -std=gnu++26. Document that for C++23, its value is 202302L.
23367 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
23368 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
23369 (gen_compile_unit_die): Likewise.
23371 2023-06-23 Jan Hubicka <jh@suse.cz>
23373 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
23375 (pass_phiprop::execute): Do not compute it here; return
23376 update_ssa_only_virtuals if something changed.
23377 (pass_data_phiprop): Remove TODO_update_ssa from todos.
23379 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
23380 Aaron Sawdey <acsawdey@linux.ibm.com>
23383 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
23384 allowed prefixed lwa to be generated.
23385 * config/rs6000/fusion.md: Regenerate.
23386 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
23387 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
23388 plus compare immediate fused insns.
23389 (maybe_prefixed): Likewise.
23391 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
23393 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
23394 of ASHIFT to const0_rtx with sufficiently large shift count.
23395 Optimize highpart SUBREGs of ASHIFT as the shift operand when
23396 the shift count is the correct offset. Optimize SUBREGs of
23397 multi-word logic operations if the SUBREGs of both operands
23400 2023-06-23 Richard Biener <rguenther@suse.de>
23402 * varasm.cc (initializer_constant_valid_p_1): Only
23403 allow conversions between scalar floating point types.
23405 2023-06-23 Richard Biener <rguenther@suse.de>
23407 * tree-vect-stmts.cc (vectorizable_assignment):
23408 Properly handle non-integral operands when analyzing
23411 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23413 PR tree-optimization/110280
23414 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
23415 using build_vector_from_val with the element of input operand, and
23416 mask's type if operand and mask's types don't match.
23418 2023-06-23 Richard Biener <rguenther@suse.de>
23420 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
23421 the truth_value_p case with !VECTOR_TYPE_P.
23423 2023-06-23 Richard Biener <rguenther@suse.de>
23425 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
23426 Exit early when the type isn't scalar integral.
23428 2023-06-23 Richard Biener <rguenther@suse.de>
23430 * match.pd ((outertype)((innertype0)a+(innertype1)b)
23431 -> ((newtype)a+(newtype)b)): Use element_precision
23434 2023-06-23 Richard Biener <rguenther@suse.de>
23436 * fold-const.cc (fold_binary_loc): Use element_precision
23437 when trying (double)float1 CMP (double)float2 to
23438 float1 CMP float2 simplification.
23439 * match.pd: Likewise.
23441 2023-06-23 Richard Biener <rguenther@suse.de>
23443 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
23444 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
23446 2023-06-23 Richard Biener <rguenther@suse.de>
23448 * tree-vect-stmts.cc (vector_vector_composition_type):
23449 Handle composition of a vector from a number of elements that
23450 happens to match its number of lanes.
23452 2023-06-22 Marek Polacek <polacek@redhat.com>
23454 * configure.ac (--enable-host-bind-now): New check. Add
23455 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
23456 * configure: Regenerate.
23457 * doc/install.texi: Document --enable-host-bind-now.
23459 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
23461 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
23463 2023-06-22 Richard Biener <rguenther@suse.de>
23465 PR tree-optimization/110332
23466 * tree-ssa-phiprop.cc (propagate_with_phi): Always
23467 check aliasing with edge inserted loads.
23469 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
23470 Uros Bizjak <ubizjak@gmail.com>
23472 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
23473 expansion of ptestc with equal operands as producing const1_rtx.
23474 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
23475 estimates of UNSPEC_PTEST, where the ptest performs the PAND
23476 or PAND of its operands.
23477 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
23478 of reg_equal_p operands into an x86_stc instruction.
23479 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
23480 (define_split): Similar to above for strict_low_part destinations.
23481 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
23483 2023-06-22 David Malcolm <dmalcolm@redhat.com>
23486 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
23487 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
23489 (fanalyzer-debug-text-art): New.
23491 2023-06-22 David Malcolm <dmalcolm@redhat.com>
23493 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
23494 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
23495 text-art/style.o, text-art/styled-string.o, text-art/table.o,
23496 text-art/theme.o, and text-art/widget.o.
23497 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
23498 (COLOR_FG_BRIGHT_RED): New.
23499 (COLOR_FG_BRIGHT_GREEN): New.
23500 (COLOR_FG_BRIGHT_YELLOW): New.
23501 (COLOR_FG_BRIGHT_BLUE): New.
23502 (COLOR_FG_BRIGHT_MAGENTA): New.
23503 (COLOR_FG_BRIGHT_CYAN): New.
23504 (COLOR_FG_BRIGHT_WHITE): New.
23505 (COLOR_BG_BRIGHT_BLACK): New.
23506 (COLOR_BG_BRIGHT_RED): New.
23507 (COLOR_BG_BRIGHT_GREEN): New.
23508 (COLOR_BG_BRIGHT_YELLOW): New.
23509 (COLOR_BG_BRIGHT_BLUE): New.
23510 (COLOR_BG_BRIGHT_MAGENTA): New.
23511 (COLOR_BG_BRIGHT_CYAN): New.
23512 (COLOR_BG_BRIGHT_WHITE): New.
23513 * common.opt (fdiagnostics-text-art-charset=): New option.
23514 (diagnostic-text-art.h): New SourceInclude.
23515 (diagnostic_text_art_charset) New Enum and EnumValues.
23516 * configure: Regenerate.
23517 * configure.ac (gccdepdir): Add text-art to loop.
23518 * diagnostic-diagram.h: New file.
23519 * diagnostic-format-json.cc (json_emit_diagram): New.
23520 (diagnostic_output_format_init_json): Wire it up to
23521 context->m_diagrams.m_emission_cb.
23522 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
23523 "text-art/canvas.h".
23524 (sarif_result::on_nested_diagnostic): Move code to...
23525 (sarif_result::add_related_location): ...this new function.
23526 (sarif_result::on_diagram): New.
23527 (sarif_builder::emit_diagram): New.
23528 (sarif_builder::make_message_object_for_diagram): New.
23529 (sarif_emit_diagram): New.
23530 (diagnostic_output_format_init_sarif): Set
23531 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
23532 * diagnostic-text-art.h: New file.
23533 * diagnostic.cc: Include "diagnostic-text-art.h",
23534 "diagnostic-diagram.h", and "text-art/theme.h".
23535 (diagnostic_initialize): Initialize context->m_diagrams and
23536 call diagnostics_text_art_charset_init.
23537 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
23538 (diagnostic_emit_diagram): New.
23539 (diagnostics_text_art_charset_init): New.
23540 * diagnostic.h (text_art::theme): New forward decl.
23541 (class diagnostic_diagram): Likewise.
23542 (diagnostic_context::m_diagrams): New field.
23543 (diagnostic_emit_diagram): New decl.
23544 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
23545 -fdiagnostics-text-art-charset=.
23546 (-fdiagnostics-plain-output): Add
23547 -fdiagnostics-text-art-charset=none.
23548 * gcc.cc: Include "diagnostic-text-art.h".
23549 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
23550 * opts-common.cc (decode_cmdline_options_to_array): Add
23551 "-fdiagnostics-text-art-charset=none" to expanded_args for
23552 -fdiagnostics-plain-output.
23553 * opts.cc: Include "diagnostic-text-art.h".
23554 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
23555 * pretty-print.cc (pp_unicode_character): New.
23556 * pretty-print.h (pp_unicode_character): New decl.
23557 * selftest-run-tests.cc: Include "text-art/selftests.h".
23558 (selftest::run_tests): Call text_art_tests.
23559 * text-art/box-drawing-chars.inc: New file, generated by
23560 contrib/unicode/gen-box-drawing-chars.py.
23561 * text-art/box-drawing.cc: New file.
23562 * text-art/box-drawing.h: New file.
23563 * text-art/canvas.cc: New file.
23564 * text-art/canvas.h: New file.
23565 * text-art/ruler.cc: New file.
23566 * text-art/ruler.h: New file.
23567 * text-art/selftests.cc: New file.
23568 * text-art/selftests.h: New file.
23569 * text-art/style.cc: New file.
23570 * text-art/styled-string.cc: New file.
23571 * text-art/table.cc: New file.
23572 * text-art/table.h: New file.
23573 * text-art/theme.cc: New file.
23574 * text-art/theme.h: New file.
23575 * text-art/types.h: New file.
23576 * text-art/widget.cc: New file.
23577 * text-art/widget.h: New file.
23579 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
23581 * function.h (emit_initial_value_sets):
23582 Change return type from int to void.
23583 (aggregate_value_p): Change return type from int to bool.
23584 (prologue_contains): Ditto.
23585 (epilogue_contains): Ditto.
23586 (prologue_epilogue_contains): Ditto.
23587 * function.cc (temp_slot): Make "in_use" variable bool.
23588 (make_slot_available): Update for changed "in_use" variable.
23589 (assign_stack_temp_for_type): Ditto.
23590 (emit_initial_value_sets): Change return type from int to void
23591 and update function body accordingly.
23592 (instantiate_virtual_regs): Ditto.
23593 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
23594 (safe_insn_predicate): Change return type from int to bool.
23595 (aggregate_value_p): Change return type from int to bool
23596 and update function body accordingly.
23597 (prologue_contains): Change return type from int to bool.
23598 (prologue_epilogue_contains): Ditto.
23600 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
23602 * common.opt (fp_contract_mode) [on]: Remove fallback.
23603 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
23604 * doc/invoke.texi (-ffp-contract): Update.
23605 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
23607 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23609 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
23610 Add alternatives to prefer to avoid same input and output Z register.
23611 (mask_gather_load<mode><v_int_container>): Likewise.
23612 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
23613 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
23614 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
23615 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
23617 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
23619 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23620 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
23621 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23622 <SVE_2BHSI:mode>_sxtw): Likewise.
23623 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23624 <SVE_2BHSI:mode>_uxtw): Likewise.
23625 (@aarch64_ldff1_gather<mode>): Likewise.
23626 (@aarch64_ldff1_gather<mode>): Likewise.
23627 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
23628 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
23629 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
23630 <VNx4_NARROW:mode>): Likewise.
23631 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23632 <VNx2_NARROW:mode>): Likewise.
23633 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23634 <VNx2_NARROW:mode>_sxtw): Likewise.
23635 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23636 <VNx2_NARROW:mode>_uxtw): Likewise.
23637 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
23638 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
23639 <SVE_PARTIAL_I:mode>): Likewise.
23641 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23643 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
23644 Convert to compact alternatives syntax.
23645 (mask_gather_load<mode><v_int_container>): Likewise.
23646 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
23647 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
23648 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
23649 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
23651 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
23653 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23654 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
23655 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23656 <SVE_2BHSI:mode>_sxtw): Likewise.
23657 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23658 <SVE_2BHSI:mode>_uxtw): Likewise.
23659 (@aarch64_ldff1_gather<mode>): Likewise.
23660 (@aarch64_ldff1_gather<mode>): Likewise.
23661 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
23662 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
23663 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
23664 <VNx4_NARROW:mode>): Likewise.
23665 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23666 <VNx2_NARROW:mode>): Likewise.
23667 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23668 <VNx2_NARROW:mode>_sxtw): Likewise.
23669 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23670 <VNx2_NARROW:mode>_uxtw): Likewise.
23671 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
23672 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
23673 <SVE_PARTIAL_I:mode>): Likewise.
23675 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23678 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23680 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
23681 Convert to compact alternatives syntax.
23682 (mask_gather_load<mode><v_int_container>): Likewise.
23683 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
23684 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
23685 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
23686 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
23688 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
23690 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23691 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
23692 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23693 <SVE_2BHSI:mode>_sxtw): Likewise.
23694 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23695 <SVE_2BHSI:mode>_uxtw): Likewise.
23696 (@aarch64_ldff1_gather<mode>): Likewise.
23697 (@aarch64_ldff1_gather<mode>): Likewise.
23698 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
23699 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
23700 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
23701 <VNx4_NARROW:mode>): Likewise.
23702 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23703 <VNx2_NARROW:mode>): Likewise.
23704 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23705 <VNx2_NARROW:mode>_sxtw): Likewise.
23706 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23707 <VNx2_NARROW:mode>_uxtw): Likewise.
23708 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
23709 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
23710 <SVE_PARTIAL_I:mode>): Likewise.
23712 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23714 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
23715 (get_len_load_store_mode): Ditto.
23716 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
23717 (get_len_load_store_mode): Ditto.
23718 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
23719 (get_len_load_store_mode): Ditto.
23720 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
23721 (get_len_load_store_mode): Ditto.
23722 * tree-if-conv.cc: include optabs-tree instead of optabs-query
23724 2023-06-21 Richard Biener <rguenther@suse.de>
23726 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
23727 split_constant_offset for the POINTER_PLUS_EXPR case.
23729 2023-06-21 Richard Biener <rguenther@suse.de>
23731 * tree-ssa-loop-ivopts.cc (record_group_use): Use
23732 split_constant_offset.
23734 2023-06-21 Richard Biener <rguenther@suse.de>
23736 * tree-loop-distribution.cc (classify_builtin_st): Use
23737 split_constant_offset.
23738 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
23739 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
23741 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23743 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
23744 Convert to compact alternatives syntax.
23745 (mask_gather_load<mode><v_int_container>): Likewise.
23746 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
23747 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
23748 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
23749 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
23751 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
23753 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23754 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
23755 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23756 <SVE_2BHSI:mode>_sxtw): Likewise.
23757 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
23758 <SVE_2BHSI:mode>_uxtw): Likewise.
23759 (@aarch64_ldff1_gather<mode>): Likewise.
23760 (@aarch64_ldff1_gather<mode>): Likewise.
23761 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
23762 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
23763 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
23764 <VNx4_NARROW:mode>): Likewise.
23765 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23766 <VNx2_NARROW:mode>): Likewise.
23767 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23768 <VNx2_NARROW:mode>_sxtw): Likewise.
23769 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
23770 <VNx2_NARROW:mode>_uxtw): Likewise.
23771 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
23772 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
23773 <SVE_PARTIAL_I:mode>): Likewise.
23775 2023-06-21 Tamar Christina <tamar.christina@arm.com>
23778 * doc/md.texi: Replace backslashchar.
23780 2023-06-21 Richard Biener <rguenther@suse.de>
23782 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
23783 Overload. For masked main loops make sure the vectorization
23784 factor isn't more than double the number of iterations.
23786 2023-06-21 Jan Beulich <jbeulich@suse.com>
23788 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
23789 value duplication by ix86_build_signbit_mask() when AVX512F and
23791 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
23792 2-alternative form. Adjust "mode" attribute. Add "enabled"
23794 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
23795 && !TARGET_PREFER_AVX256.
23796 (*<avx512>_vpternlog<mode>_2): Likewise.
23797 (*<avx512>_vpternlog<mode>_3): Likewise.
23799 2023-06-21 liuhongt <hongtao.liu@intel.com>
23802 * tree-vect-stmts.cc (vectorizable_conversion): Use
23803 intermiediate integer type for float_expr/fix_trunc_expr when
23804 direct optab is not existed.
23806 2023-06-20 Tamar Christina <tamar.christina@arm.com>
23808 PR bootstrap/110324
23809 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
23811 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
23813 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
23814 register operand to the stack pointer. Require the second register
23815 operand to have the number specified in a separate const_int operand.
23816 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
23817 (aarch64_allocate_and_probe_stack_space): Use it.
23818 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
23819 (aarch64_expand_epilogue): Likewise.
23821 2023-06-20 Jakub Jelinek <jakub@redhat.com>
23823 PR middle-end/79173
23824 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
23825 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
23828 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
23830 * calls.h (setjmp_call_p): Change return type from int to bool.
23831 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
23832 (store_one_arg): Change return type from int to bool
23833 and adjust function body accordingly. Change "sibcall_failure"
23835 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
23836 argument to bool. Change "partial_seen" variable to bool.
23837 (load_register_parameters): Change *sibcall_failure
23838 pointer argument to bool.
23839 (check_sibcall_argument_overlap_1): Change return type from int to bool
23840 and adjust function body accordingly.
23841 (check_sibcall_argument_overlap): Ditto. Change
23842 "mark_stored_args_map" argument to bool.
23843 (emit_call_1): Change "already_popped" variable to bool.
23844 (setjmp_call_p): Change return type from int to bool
23845 and adjust function body accordingly.
23846 (initialize_argument_information): Change *must_preallocate
23847 pointer argument to bool.
23848 (expand_call): Change "pcc_struct_value", "must_preallocate"
23849 and "sibcall_failure" variables to bool.
23850 (emit_library_call_value_1): Change "pcc_struct_value"
23853 2023-06-20 Martin Jambor <mjambor@suse.cz>
23856 * ipa-sra.cc (struct caller_issues): New field there_is_one.
23857 (check_for_caller_issues): Set it.
23858 (check_all_callers_for_issues): Check it.
23860 2023-06-20 Martin Jambor <mjambor@suse.cz>
23862 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
23863 (struct ipcp_transformation): Rearrange members according to
23864 C++ class coding convention, add m_uid_to_idx,
23865 get_param_index and maybe_create_parm_idx_map.
23866 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
23867 (compare_uids): Likewise.
23868 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
23869 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
23870 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
23871 (ipcp_update_vr): Likewise.
23872 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
23873 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
23875 2023-06-20 Carl Love <cel@us.ibm.com>
23877 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
23878 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
23879 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
23880 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
23881 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
23882 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
23883 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
23884 * config/rs6000/rs6000-builtins.def
23885 (__builtin_vsx_scalar_extract_exp_to_vec,
23886 __builtin_vsx_scalar_extract_sig_to_vec,
23887 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
23888 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
23889 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
23890 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
23891 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
23892 overloaded instance. Update comments.
23893 * config/rs6000/rs6000-overload.def
23894 (__builtin_vec_scalar_insert_exp): Add new overload definition with
23896 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
23897 overloaded definitions.
23898 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
23899 (DI_to_TI): New mode attribute.
23900 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
23901 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
23902 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
23903 * doc/extend.texi (scalar_extract_exp_to_vec,
23904 scalar_extract_sig_to_vec): Add documentation for new builtins.
23905 (scalar_insert_exp): Add new overloaded builtin definition.
23907 2023-06-20 Li Xu <xuli1@eswincomputing.com>
23909 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
23910 size of vector mask mode to one rvv register.
23912 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23914 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
23916 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
23918 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
23921 2023-06-20 Richard Biener <rguenther@suse.de>
23923 * tree-ssa-dse.cc (dse_classify_store): When we found
23924 no defs and the basic-block with the original definition
23925 ends in __builtin_unreachable[_trap] the store is dead.
23927 2023-06-20 Richard Biener <rguenther@suse.de>
23929 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
23930 keep the virtual SSA form up-to-date.
23932 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23934 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
23935 New define_insn_and_split.
23937 2023-06-20 Tamar Christina <tamar.christina@arm.com>
23939 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
23941 2023-06-20 Jan Beulich <jbeulich@suse.com>
23943 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
23944 constraint. Add new AVX512F alternative.
23946 2023-06-20 Richard Biener <rguenther@suse.de>
23949 * dwarf2out.cc (process_scope_var): Continue processing
23950 the decl after setting a parent in case the existing DIE
23953 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
23955 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
23956 (riscv_arg_has_vector): Simplify.
23957 (riscv_pass_in_vector_p): Adjust warning message.
23959 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
23961 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
23962 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
23963 * config/riscv/riscv.md (riscv_frcsr): New patterns.
23964 (riscv_fscsr): Likewise.
23966 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
23968 PR rtl-optimization/110305
23969 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
23970 Handle HONOR_SNANS for x + 0.0.
23972 2023-06-19 Jan Hubicka <jh@suse.cz>
23974 PR tree-optimization/109811
23975 PR tree-optimization/109849
23976 * passes.def: Add phiprop to early optimization passes.
23977 * tree-ssa-phiprop.cc: Allow clonning.
23979 2023-06-19 Tamar Christina <tamar.christina@arm.com>
23981 * config/aarch64/aarch64.md (arches): Add nosimd.
23982 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
23985 2023-06-19 Tamar Christina <tamar.christina@arm.com>
23986 Omar Tahir <Omar.Tahir2@arm.com>
23988 * gensupport.cc (class conlist, add_constraints, add_attributes,
23989 skip_spaces, expect_char, preprocess_compact_syntax,
23990 parse_section_layout, parse_section, convert_syntax): New.
23991 (process_rtx): Check for conversion.
23992 * genoutput.cc (process_template): Check for unresolved iterators.
23993 (class data): Add compact_syntax_p.
23994 (gen_insn): Use it.
23995 * gensupport.h (compact_syntax): New.
23996 (hash-set.h): Include.
23997 * doc/md.texi: Document it.
23999 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
24001 * recog.h (check_asm_operands): Change return type from int to bool.
24002 (insn_invalid_p): Ditto.
24003 (verify_changes): Ditto.
24004 (apply_change_group): Ditto.
24005 (constrain_operands): Ditto.
24006 (constrain_operands_cached): Ditto.
24007 (validate_replace_rtx_subexp): Ditto.
24008 (validate_replace_rtx): Ditto.
24009 (validate_replace_rtx_part): Ditto.
24010 (validate_replace_rtx_part_nosimplify): Ditto.
24011 (added_clobbers_hard_reg_p): Ditto.
24012 (peep2_regno_dead_p): Ditto.
24013 (peep2_reg_dead_p): Ditto.
24014 (store_data_bypass_p): Ditto.
24015 (if_test_bypass_p): Ditto.
24016 * rtl.h (split_all_insns_noflow): Change
24017 return type from unsigned int to void.
24018 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
24019 of generated added_clobbers_hard_reg_p from int to bool and adjust
24020 function body accordingly. Change "used" variable type from
24022 * recog.cc (check_asm_operands): Change return type
24023 from int to bool and adjust function body accordingly.
24024 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
24025 (verify_changes): Change return type from int to bool.
24026 (apply_change_group): Change return type from int to bool
24027 and adjust function body accordingly.
24028 (validate_replace_rtx_subexp): Change return type from int to bool.
24029 (validate_replace_rtx): Ditto.
24030 (validate_replace_rtx_part): Ditto.
24031 (validate_replace_rtx_part_nosimplify): Ditto.
24032 (constrain_operands_cached): Ditto.
24033 (constrain_operands): Ditto. Change "lose" and "win"
24034 variables type from int to bool.
24035 (split_all_insns_noflow): Change return type from unsigned int
24036 to void and adjust function body accordingly.
24037 (peep2_regno_dead_p): Change return type from int to bool.
24038 (peep2_reg_dead_p): Ditto.
24039 (peep2_find_free_register): Change "success"
24040 variable type from int to bool
24041 (store_data_bypass_p_1): Change return type from int to bool.
24042 (store_data_bypass_p): Ditto.
24044 2023-06-19 Li Xu <xuli1@eswincomputing.com>
24046 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
24049 2023-06-19 Pan Li <pan2.li@intel.com>
24052 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
24054 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
24055 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
24056 VF_ZVE63 and VF_ZVE32.
24057 * config/riscv/vector.md
24058 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
24059 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
24060 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
24061 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
24062 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
24063 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
24064 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
24065 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
24066 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
24067 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
24069 2023-06-19 Pan Li <pan2.li@intel.com>
24072 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
24074 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
24075 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
24076 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
24077 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
24078 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
24079 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
24080 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
24081 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
24082 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
24083 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
24084 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
24085 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
24086 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
24087 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
24089 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
24091 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
24092 (gcn_init_libfuncs): Add div and mod functions for all modes.
24093 Add placeholders for divmod functions.
24094 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
24096 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
24098 * tree-vect-generic.cc: Include optabs-libfuncs.h.
24099 (get_compute_type): Check optab_libfunc.
24100 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
24101 (vectorizable_operation): Check optab_libfunc.
24103 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
24105 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
24106 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
24107 (V_MOV, V_MOV_ALT): Likewise.
24108 (scalar_mode, SCALAR_MODE): Add TImode.
24109 (vnsi, VnSI, vndi, VnDI): Likewise.
24110 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
24111 (mov<mode>, mov<mode>_unspec): Use V_MOV.
24112 (*mov<mode>_4reg): New insn.
24113 (mov<mode>_exec): New 4reg variant.
24114 (mov<mode>_sgprbase): Likewise.
24115 (reload_in<mode>, reload_out<mode>): Use V_MOV.
24116 (vec_set<mode>): Likewise.
24117 (vec_duplicate<mode><exec>): New 4reg variant.
24118 (vec_extract<mode><scalar_mode>): Likewise.
24119 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
24120 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
24121 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
24122 (fold_extract_last_<mode>): Use V_MOV.
24123 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
24124 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
24125 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
24126 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
24127 gather<mode>_insn_2offsets<exec>): Use V_MOV.
24128 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
24129 scatter<mode>_insn_1offset<exec_scatter>,
24130 scatter<mode>_insn_1offset_ds<exec_scatter>,
24131 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
24132 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
24133 mask_scatter_store<mode><vnsi>): Likewise.
24134 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
24135 (gcn_hard_regno_mode_ok): Likewise.
24136 (GEN_VNM): Add TImode support.
24137 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
24138 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
24139 V8TImode, and V2TImode.
24140 (print_operand): Add 'J' and 'K' print codes.
24142 2023-06-19 Richard Biener <rguenther@suse.de>
24144 PR tree-optimization/110298
24145 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
24146 Clear number of iterations info before cleaning up the CFG.
24148 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24150 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
24151 Simplify vec_concat of lowpart subreg and high part vec_select.
24153 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
24155 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
24157 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
24159 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
24160 Handle null niters_skip.
24162 2023-06-19 Richard Biener <rguenther@suse.de>
24164 * config/aarch64/aarch64.cc
24165 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
24166 to LOOP_VINFO_MASKS.
24168 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
24171 * common/config/avr/avr-common.cc: Remove setting
24172 of OPT_fdelete_null_pointer_checks.
24173 * config/avr/avr.cc (avr_option_override): Clear
24174 flag_delete_null_pointer_checks if zero_address_valid.
24175 (avr_addr_space_zero_address_valid): New function.
24176 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
24179 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24180 Robin Dapp <rdapp.gcc@gmail.com>
24182 * doc/md.texi: Add len_mask{load,store}.
24183 * genopinit.cc (main): Ditto.
24185 * internal-fn.cc (len_maskload_direct): Ditto.
24186 (len_maskstore_direct): Ditto.
24187 (expand_call_mem_ref): Ditto.
24188 (expand_partial_load_optab_fn): Ditto.
24189 (expand_len_maskload_optab_fn): Ditto.
24190 (expand_partial_store_optab_fn): Ditto.
24191 (expand_len_maskstore_optab_fn): Ditto.
24192 (direct_len_maskload_optab_supported_p): Ditto.
24193 (direct_len_maskstore_optab_supported_p): Ditto.
24194 * internal-fn.def (LEN_MASK_LOAD): Ditto.
24195 (LEN_MASK_STORE): Ditto.
24196 * optabs.def (OPTAB_CD): Ditto.
24198 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24200 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
24202 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24204 * config/riscv/autovec.md (<optab><mode>3): Implement binop
24206 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
24207 (enum vxrm_field_enum): Rename this...
24208 (enum fixed_point_rounding_mode): ...to this.
24209 (enum frm_field_enum): Rename this...
24210 (enum floating_point_rounding_mode): ...to this.
24211 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
24212 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
24214 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
24215 (riscv_excess_precision): Do not convert to float for ZVFH.
24216 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
24218 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24220 * config/riscv/vector-iterators.md: Add VI_QH iterator.
24221 * config/riscv/autovec-opt.md
24222 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
24223 that includes sign extension.
24224 (@pred_extract_first_sextsi<mode>): Dito for SImode.
24226 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
24228 * config/riscv/autovec.md (vec_set<mode>): Implement.
24229 (vec_extract<mode><vel>): Implement.
24230 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
24231 (emit_vlmax_slide_insn): Declare.
24232 (emit_nonvlmax_slide_tu_insn): Declare.
24233 (emit_scalar_move_insn): Export.
24234 (emit_nonvlmax_integer_move_insn): Export.
24235 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
24236 (emit_nonvlmax_slide_tu_insn): New function.
24237 (emit_vlmax_masked_mu_insn): No change.
24238 (emit_vlmax_integer_move_insn): Export.
24240 2023-06-19 Richard Biener <rguenther@suse.de>
24242 * tree-vectorizer.h (enum vect_partial_vector_style): New.
24243 (_loop_vec_info::partial_vector_style): Likewise.
24244 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
24245 (rgroup_controls::compare_type): Add.
24246 (vec_loop_masks): Change from a typedef to auto_vec<>
24248 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
24249 Adjust. Convert niters_skip to compare_type.
24250 (vect_set_loop_condition_partial_vectors_avx512): New function
24251 implementing the AVX512 partial vector codegen.
24252 (vect_set_loop_condition): Dispatch to the correct
24253 vect_set_loop_condition_partial_vectors_* function based on
24254 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
24255 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
24256 in the original niter type.
24257 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
24258 partial_vector_style.
24259 (can_produce_all_loop_masks_p): Adjust.
24260 (vect_verify_full_masking): Produce the rgroup_controls vector
24261 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
24262 (vect_verify_full_masking_avx512): New function implementing
24263 verification of AVX512 style masking.
24264 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
24265 (vect_analyze_loop_2): Also try AVX512 style masking.
24267 (vect_estimate_min_profitable_iters): Implement AVX512 style
24268 mask producing cost.
24269 (vect_record_loop_mask): Do not build the rgroup_controls
24270 vector here but record masks in a hash-set.
24271 (vect_get_loop_mask): Implement AVX512 style mask query,
24272 complementing the existing while_ult style.
24274 2023-06-19 Richard Biener <rguenther@suse.de>
24276 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
24278 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
24279 (vectorize_fold_left_reduction): Adjust.
24280 (vect_transform_reduction): Likewise.
24281 (vectorizable_live_operation): Likewise.
24282 * tree-vect-stmts.cc (vectorizable_call): Likewise.
24283 (vectorizable_operation): Likewise.
24284 (vectorizable_store): Likewise.
24285 (vectorizable_load): Likewise.
24286 (vectorizable_condition): Likewise.
24288 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
24291 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
24292 Add Optimization option property.
24294 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24296 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
24297 Add new pattern for the abovementioned case.
24299 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24301 * config/xtensa/xtensa.cc
24302 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
24304 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
24306 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
24308 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
24310 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
24312 2023-06-19 liuhongt <hongtao.liu@intel.com>
24315 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
24317 (sse2_packsswb<mask_name>): .. this, ..
24318 (avx2_packsswb<mask_name>): .. this and ..
24319 (avx512bw_packsswb<mask_name>): .. this.
24320 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
24321 (sse2_packssdw<mask_name>): .. this, ..
24322 (avx2_packssdw<mask_name>): .. this and ..
24323 (avx512bw_packssdw<mask_name>): .. this.
24325 2023-06-19 liuhongt <hongtao.liu@intel.com>
24328 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
24329 UNSPEC_US_TRUNCATE instead of original us_truncate for
24331 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
24333 (mmx_packsswb): .. this and ..
24334 (mmx_packuswb): .. this.
24335 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
24337 (s_trunsuffix): Removed code iterator.
24338 (any_s_truncate): Ditto.
24339 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
24340 UNSPEC_US_TRUNCATE instead of original us_truncate.
24341 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
24342 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
24344 2023-06-18 Pan Li <pan2.li@intel.com>
24346 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
24348 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
24350 * rtl.h (*rtx_equal_p_callback_function):
24351 Change return type from int to bool.
24352 (rtx_equal_p): Ditto.
24353 (*hash_rtx_callback_function): Ditto.
24354 * rtl.cc (rtx_equal_p): Change return type from int to bool
24355 and adjust function body accordingly.
24356 * early-remat.cc (scratch_equal): Ditto.
24357 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
24358 (hash_with_unspec_callback): Ditto.
24360 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
24362 * config/arc/arc.md (movqi_insn): Allow certain constants to
24363 be stored into memory in the pattern's condition.
24364 (movsf_insn): Similarly.
24366 2023-06-18 Honza <jh@ryzen3.suse.cz>
24368 PR tree-optimization/109849
24369 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
24370 ES; handle ipa_predicate::not_sra_candidate.
24371 (evaluate_properties_for_edge): Pass es to
24372 evaluate_conditions_for_known_args.
24373 (ipa_fn_summary_t::duplicate): Handle sra candidates.
24374 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
24375 (load_or_store_of_ptr_parameter): New function.
24376 (points_to_possible_sra_candidate_p): New function.
24377 (analyze_function_body): Initialize points_to_possible_sra_candidate;
24378 determine sra predicates.
24379 (estimate_ipcp_clone_size_and_time): Update call of
24380 evaluate_conditions_for_known_args.
24381 (remap_edge_params): Update points_to_possible_sra_candidate.
24382 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
24383 (write_ipa_call_summary): Likewise.
24384 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
24385 (dump_condition): Dump it.
24386 * ipa-predicate.h (struct inline_param_summary): Add
24387 points_to_possible_sra_candidate.
24389 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
24391 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
24392 function for setting the carry flag.
24393 (ix86_expand_builtin) <handlecarry>: Use it here.
24394 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
24395 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
24396 (usubc<mode>5): Likewise.
24398 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
24400 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
24401 for the immediate constant shift count.
24402 (*concat<mode><dwi>3_2): Likewise.
24403 (*concat<mode><dwi>3_3): Likewise.
24404 (*concat<mode><dwi>3_4): Likewise.
24405 (*concat<mode><dwi>3_5): Likewise.
24406 (*concat<mode><dwi>3_6): Likewise.
24408 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
24410 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
24411 (hash_rtx): Remove.
24412 * early-remat.cc (remat_candidate_hasher::equal): Update
24413 to call rtx_equal_p with rtx_equal_p_callback_function argument.
24414 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
24415 (rtx_equal_p): Remove.
24416 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
24417 argument with NULL default value.
24418 (rtx_equal_p_cb): Remove function declaration.
24419 (hash_rtx_cb): Ditto.
24420 (hash_rtx): Add hash_rtx_callback_function argument
24421 with NULL default value.
24422 * sel-sched-ir.cc (free_nop_pool): Update function comment.
24423 (skip_unspecs_callback): Ditto.
24424 (vinsn_init): Update to call hash_rtx with
24425 hash_rtx_callback_function argument.
24426 (vinsn_equal_p): Ditto.
24428 2023-06-18 yulong <shiyulong@iscas.ac.cn>
24430 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
24431 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
24432 (ADJUST_ALIGNMENT): Ditto.
24433 (RVV_TUPLE_PARTIAL_MODES): Ditto.
24434 (ADJUST_NUNITS): Ditto.
24435 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
24437 (vfloat16mf4x3_t): Ditto.
24438 (vfloat16mf4x4_t): Ditto.
24439 (vfloat16mf4x5_t): Ditto.
24440 (vfloat16mf4x6_t): Ditto.
24441 (vfloat16mf4x7_t): Ditto.
24442 (vfloat16mf4x8_t): Ditto.
24443 (vfloat16mf2x2_t): Ditto.
24444 (vfloat16mf2x3_t): Ditto.
24445 (vfloat16mf2x4_t): Ditto.
24446 (vfloat16mf2x5_t): Ditto.
24447 (vfloat16mf2x6_t): Ditto.
24448 (vfloat16mf2x7_t): Ditto.
24449 (vfloat16mf2x8_t): Ditto.
24450 (vfloat16m1x2_t): Ditto.
24451 (vfloat16m1x3_t): Ditto.
24452 (vfloat16m1x4_t): Ditto.
24453 (vfloat16m1x5_t): Ditto.
24454 (vfloat16m1x6_t): Ditto.
24455 (vfloat16m1x7_t): Ditto.
24456 (vfloat16m1x8_t): Ditto.
24457 (vfloat16m2x2_t): Ditto.
24458 (vfloat16m2x3_t): Ditto.
24459 (vfloat16m2x4_t): Ditto.
24460 (vfloat16m4x2_t): Ditto.
24461 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
24462 (vfloat16mf4x3_t): Ditto.
24463 (vfloat16mf4x4_t): Ditto.
24464 (vfloat16mf4x5_t): Ditto.
24465 (vfloat16mf4x6_t): Ditto.
24466 (vfloat16mf4x7_t): Ditto.
24467 (vfloat16mf4x8_t): Ditto.
24468 (vfloat16mf2x2_t): Ditto.
24469 (vfloat16mf2x3_t): Ditto.
24470 (vfloat16mf2x4_t): Ditto.
24471 (vfloat16mf2x5_t): Ditto.
24472 (vfloat16mf2x6_t): Ditto.
24473 (vfloat16mf2x7_t): Ditto.
24474 (vfloat16mf2x8_t): Ditto.
24475 (vfloat16m1x2_t): Ditto.
24476 (vfloat16m1x3_t): Ditto.
24477 (vfloat16m1x4_t): Ditto.
24478 (vfloat16m1x5_t): Ditto.
24479 (vfloat16m1x6_t): Ditto.
24480 (vfloat16m1x7_t): Ditto.
24481 (vfloat16m1x8_t): Ditto.
24482 (vfloat16m2x2_t): Ditto.
24483 (vfloat16m2x3_t): Ditto.
24484 (vfloat16m2x4_t): Ditto.
24485 (vfloat16m4x2_t): Ditto.
24486 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
24487 * config/riscv/riscv.md: New.
24488 * config/riscv/vector-iterators.md: New.
24490 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
24492 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
24493 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
24494 Generalize special case for converting TImode to V1TImode to handle
24495 all 128-bit vector conversions.
24497 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
24499 * gcc-ar.cc (main): Refactor to slightly reduce code
24500 duplication. Avoid unnecessary elements in nargv.
24502 2023-06-16 Pan Li <pan2.li@intel.com>
24505 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
24506 integer reduction expand.
24507 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
24508 and the LMUL1 attr respectively.
24509 * config/riscv/vector.md
24510 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
24511 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
24512 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
24513 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
24514 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
24515 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
24516 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
24518 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24521 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
24523 2023-06-16 Jakub Jelinek <jakub@redhat.com>
24525 PR middle-end/79173
24526 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
24527 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
24528 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
24530 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
24531 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
24532 * builtins.cc (fold_builtin_addc_subc): New function.
24533 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
24534 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
24536 2023-06-16 Jakub Jelinek <jakub@redhat.com>
24538 PR tree-optimization/110271
24539 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
24540 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
24541 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
24543 2023-06-16 Martin Jambor <mjambor@suse.cz>
24545 * configure: Regenerate.
24547 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
24548 Uros Bizjak <ubizjak@gmail.com>
24551 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
24552 define_insn_and_split combine *add<dwi>3_doubleword with
24553 a *concat<mode><dwi>3 for more efficient lowering after reload.
24555 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
24557 * ira-lives.cc: Include except.h.
24558 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
24559 when the pseudo does not live at the exception landing pad.
24561 2023-06-16 Alex Coplan <alex.coplan@arm.com>
24563 * doc/invoke.texi: Document -Welaborated-enum-base.
24565 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24567 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
24568 (ushrn2_n): ... This.
24569 (sqshrn2_n): Rename builtins to...
24570 (ssqshrn2_n): ... This.
24571 (uqshrn2_n): Rename builtins to...
24572 (uqushrn2_n): ... This.
24573 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
24574 (vqshrn_high_n_s32): Likewise.
24575 (vqshrn_high_n_s64): Likewise.
24576 (vqshrn_high_n_u16): Likewise.
24577 (vqshrn_high_n_u32): Likewise.
24578 (vqshrn_high_n_u64): Likewise.
24579 (vshrn_high_n_s16): Likewise.
24580 (vshrn_high_n_s32): Likewise.
24581 (vshrn_high_n_s64): Likewise.
24582 (vshrn_high_n_u16): Likewise.
24583 (vshrn_high_n_u32): Likewise.
24584 (vshrn_high_n_u64): Likewise.
24585 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
24587 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
24588 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
24589 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
24590 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
24591 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
24592 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
24593 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
24594 Update expander for the above.
24596 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24598 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
24599 (shrn2_n): ... This.
24600 (rshrn2): Rename builtins to...
24601 (rshrn2_n): ... This.
24602 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
24603 (vrshrn_high_n_s32): Likewise.
24604 (vrshrn_high_n_s64): Likewise.
24605 (vrshrn_high_n_u16): Likewise.
24606 (vrshrn_high_n_u32): Likewise.
24607 (vrshrn_high_n_u64): Likewise.
24608 (vshrn_high_n_s16): Likewise.
24609 (vshrn_high_n_s32): Likewise.
24610 (vshrn_high_n_s64): Likewise.
24611 (vshrn_high_n_u16): Likewise.
24612 (vshrn_high_n_u32): Likewise.
24613 (vshrn_high_n_u64): Likewise.
24614 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
24616 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
24617 (aarch64_shrn2<mode>_insn_le): Likewise.
24618 (aarch64_shrn2<mode>_insn_be): Likewise.
24619 (aarch64_shrn2<mode>): Likewise.
24620 (aarch64_rshrn2<mode>_insn_le): Likewise.
24621 (aarch64_rshrn2<mode>_insn_be): Likewise.
24622 (aarch64_rshrn2<mode>): Likewise.
24623 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
24624 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
24625 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
24626 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
24627 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
24628 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
24629 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
24630 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
24631 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
24632 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
24633 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
24634 (aarch64_sqshrun2_n<mode>): New define_expand.
24635 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
24636 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
24637 (aarch64_sqrshrun2_n<mode>): New define_expand.
24638 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
24639 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
24640 Delete unspec values.
24641 (VQSHRN_N): Delete int iterator.
24643 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24645 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
24646 * config/aarch64/aarch64-simd.md
24647 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
24648 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
24649 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
24650 * config/aarch64/iterators.md (shrn_s): New code attribute.
24652 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24654 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
24656 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
24657 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
24658 (aarch64_sqrshrun_n<mode>_insn): Likewise.
24659 (aarch64_sqshrun_n<mode>_insn): Likewise.
24660 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
24661 (aarch64_sqshrun_n<mode>): Likewise.
24662 (aarch64_sqrshrun_n<mode>): Likewise.
24663 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
24665 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24667 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
24668 (shrn_n): ... This.
24669 (rshrn): Rename builtins to...
24670 (rshrn_n): ... This.
24671 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
24672 (vshrn_n_s32): Likewise.
24673 (vshrn_n_s64): Likewise.
24674 (vshrn_n_u16): Likewise.
24675 (vshrn_n_u32): Likewise.
24676 (vshrn_n_u64): Likewise.
24677 (vrshrn_n_s16): Likewise.
24678 (vrshrn_n_s32): Likewise.
24679 (vrshrn_n_s64): Likewise.
24680 (vrshrn_n_u16): Likewise.
24681 (vrshrn_n_u32): Likewise.
24682 (vrshrn_n_u64): Likewise.
24683 * config/aarch64/aarch64-simd.md
24684 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
24685 (aarch64_shrn<mode>): Likewise.
24686 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
24687 (aarch64_rshrn<mode>): Likewise.
24688 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
24689 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
24690 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
24691 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
24692 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
24693 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
24694 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
24695 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
24696 (aarch64_sqshrun_n<mode>): Likewise.
24697 (aarch64_sqrshrun_n<mode>): Likewise.
24698 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
24699 (TRUNCEXTEND): New code attribute.
24700 (TRUNC_SHIFT): Likewise.
24701 (shrn_op): Likewise.
24702 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
24705 2023-06-16 Pan Li <pan2.li@intel.com>
24707 * config/riscv/riscv-vsetvl.cc
24708 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
24710 2023-06-16 Richard Biener <rguenther@suse.de>
24712 PR tree-optimization/110278
24713 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
24714 (x != (typeof x)(x == 0) -> true): Likewise.
24716 2023-06-16 Pali Rohár <pali@kernel.org>
24718 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
24719 (REAL_LIBGCC_SPEC): New define.
24720 * config/i386/mingw.opt: Add mcrtdll=
24721 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
24722 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
24723 (STARTFILE_SPEC): Adjust for -mcrtdll=.
24724 * doc/invoke.texi: Add mcrtdll= documentation.
24726 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
24728 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
24729 (mips_handle_code_readable_attr):New static function.
24730 (mips_get_code_readable_attr):New static enum function.
24731 (mips_set_current_function):Set the code_readable mode.
24732 (mips_option_override):Same as above.
24733 * doc/extend.texi:Document code_readable.
24735 2023-06-16 Richard Biener <rguenther@suse.de>
24737 PR tree-optimization/110269
24738 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
24739 with tree_expr_nonzero_p ...
24740 * match.pd (cmp (convert? addr@0) integer_zerop): With this
24743 2023-06-15 Marek Polacek <polacek@redhat.com>
24745 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
24746 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
24747 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
24748 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
24749 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
24751 * configure: Regenerate.
24752 * doc/install.texi: Document --enable-host-pie.
24754 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
24756 * regcprop.cc (maybe_mode_change): Enable stack pointer
24759 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
24761 PR tree-optimization/110266
24762 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
24764 (adjust_realpart_expr): Ditto.
24766 2023-06-15 Jan Beulich <jbeulich@suse.com>
24768 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
24771 2023-06-15 Jan Beulich <jbeulich@suse.com>
24773 * config/i386/constraints.md: Mention k and r for B.
24775 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
24776 Andrew Pinski <apinski@marvell.com>
24779 * config/loongarch/loongarch.md: Modify the register constraints for template
24780 "jumptable" and "indirect_jump" from "r" to "e".
24782 2023-06-15 Xi Ruoyao <xry111@xry111.site>
24784 * config/loongarch/loongarch-tune.h (loongarch_align): New
24786 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
24788 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
24790 * config/loongarch/loongarch.cc
24791 (loongarch_option_override_internal): Set the value of
24792 -falign-functions= if -falign-functions is enabled but no value
24793 is given. Likewise for -falign-labels=.
24795 2023-06-15 Jakub Jelinek <jakub@redhat.com>
24797 PR middle-end/79173
24798 * internal-fn.def (UADDC, USUBC): New internal functions.
24799 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
24800 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
24801 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
24802 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
24803 match_uaddc_usubc): New functions.
24804 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
24805 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
24806 other optimizations have been successful for those.
24807 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
24808 * fold-const-call.cc (fold_const_call): Likewise.
24809 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
24810 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
24811 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
24813 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
24814 define_expand patterns.
24815 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
24816 into NOTE_INSN_DELETED note rather than nop instruction.
24817 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
24820 2023-06-15 Jakub Jelinek <jakub@redhat.com>
24822 PR middle-end/79173
24823 * config/i386/i386.md (subborrow<mode>): Add alternative with
24824 memory destination and add for it define_peephole2
24825 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
24826 destination in these patterns.
24828 2023-06-15 Jakub Jelinek <jakub@redhat.com>
24830 PR middle-end/79173
24831 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
24832 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
24833 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
24834 using memory destination in these patterns.
24836 2023-06-15 Jakub Jelinek <jakub@redhat.com>
24838 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
24839 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
24840 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
24841 * fold-const-call.cc (fold_const_call): ... here.
24843 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
24845 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
24846 Rename to <su>abd<mode>3.
24847 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
24850 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
24852 * doc/md.texi (sabd, uabd): Document them.
24853 * internal-fn.def (ABD): Use new optab.
24854 * optabs.def (sabd_optab, uabd_optab): New optabs,
24855 * tree-vect-patterns.cc (vect_recog_absolute_difference):
24856 Recognize the following idiom abs (a - b).
24857 (vect_recog_sad_pattern): Refactor to use
24858 vect_recog_absolute_difference.
24859 (vect_recog_abd_pattern): Use patterns found by
24860 vect_recog_absolute_difference to build a new ABD
24863 2023-06-15 chenxiaolong <chenxl04200420@163.com>
24865 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
24866 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
24868 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24870 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
24871 (expand_vec_perm_const_1): Add merge optmization.
24873 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
24876 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
24877 (riscv_pass_by_reference): Return true for vector mode
24879 2023-06-15 Pan Li <pan2.li@intel.com>
24881 * config/riscv/autovec-opt.md: Align the predictor sytle.
24882 * config/riscv/autovec.md: Ditto.
24884 2023-06-15 Pan Li <pan2.li@intel.com>
24886 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
24887 Take elen instead of scalar BITS_PER_WORD.
24888 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
24889 instead of scaler BITS_PER_WORD.
24891 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
24893 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
24895 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24897 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
24898 Fix signed comparison warning in loop from npats to enelts.
24900 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
24902 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
24903 to offloading compilation.
24904 * config/gcn/mkoffload.cc (main): Adjust.
24905 * config/nvptx/mkoffload.cc (main): Likewise.
24906 * doc/invoke.texi (foffload-options): Update example.
24908 2023-06-14 liuhongt <hongtao.liu@intel.com>
24911 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
24912 for alternative 2 since there's no evex version for vpcmpeqd
24915 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
24917 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
24919 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
24921 * config/sh/divtab.cc: Remove.
24923 2023-06-13 Jakub Jelinek <jakub@redhat.com>
24925 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
24926 superfluous spaces around \t for vpcmpeqd.
24928 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
24930 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
24931 clearing vectors with only a single element. Set CLEARED if the
24932 vector was initialized to zero.
24934 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
24936 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
24939 (TUPLE_ENTRY): Undef.
24941 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24943 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
24944 (shuffle_generic_patterns): Ditto.
24945 (expand_vec_perm_const_1): Ditto.
24947 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24949 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
24950 (shuffle_decompress_patterns): Ditto.
24952 2023-06-13 Richard Biener <rguenther@suse.de>
24954 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
24956 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
24957 Kito Cheng <kito.cheng@sifive.com>
24959 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
24960 warning flag if func is not builtin
24961 * config/riscv/riscv.cc
24962 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
24963 (riscv_arg_has_vector): Determine whether the arg is vector type.
24964 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
24965 (riscv_init_cumulative_args): The same as header.
24966 (riscv_get_arg_info): Add the checking.
24967 (riscv_function_value): Check the func return and set warning flag
24968 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
24969 determine whether warning psabi or not.
24971 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24973 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
24974 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
24975 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
24976 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
24978 (arm_output_load_tpidr): Define.
24979 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
24980 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
24982 (reload_tp_hard): Likewise.
24983 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
24985 * doc/invoke.texi (Arm Options, mtp): Document new values.
24987 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24990 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
24991 AARCH64_TPIDRRO_EL0 value.
24992 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
24993 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
24994 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
24995 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
24997 2023-06-13 Alexandre Oliva <oliva@adacore.com>
24999 * range-op-float.cc (frange_nextafter): Drop inline.
25000 (frelop_early_resolve): Add static.
25001 (frange_float): Likewise.
25003 2023-06-13 Richard Biener <rguenther@suse.de>
25005 PR middle-end/110232
25006 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
25007 to check whether the buffer covers the whole vector.
25009 2023-06-13 Richard Biener <rguenther@suse.de>
25011 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
25012 .MASK_LOAD and friends set the size of the access to unknown.
25014 2023-06-13 Tejas Belagod <tbelagod@arm.com>
25017 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
25018 calls that have a constant input predicate vector.
25019 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
25020 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
25021 (svlast_impl::vect_all_same): Check if all vector elements are equal.
25023 2023-06-13 Andi Kleen <ak@linux.intel.com>
25025 * config/i386/gcc-auto-profile: Regenerate.
25027 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25029 * config/riscv/vector-iterators.md: Fix requirement.
25031 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25033 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
25034 (shuffle_decompress_patterns): New function.
25035 (expand_vec_perm_const_1): Add decompress optimization.
25037 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
25039 PR rtl-optimization/101188
25040 * postreload.cc (reload_cse_move2add_invalidate): New function,
25042 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
25044 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
25046 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
25047 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
25048 and if maxv == 1, use constant element for duplicating into register.
25050 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
25052 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
25053 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
25054 (gimplify_adjust_omp_clauses): Change
25055 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
25056 GOMP_MAP_FORCE_PRESENT.
25057 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
25058 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
25059 to/from clauses with present modifier.
25061 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25063 PR tree-optimization/110205
25064 * range-op-float.cc (range_operator::fold_range): Add default FII
25066 * range-op-mixed.h (class operator_gt): Add missing final overrides.
25067 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
25068 (operator_lshift ::update_bitmask): Add final override.
25069 (operator_rshift ::update_bitmask): Add final override.
25070 * range-op.h (range_operator::fold_range): Add FII prototype.
25072 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25074 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
25075 Use range_op_handler directly.
25076 * range-op.cc (range_op_handler::range_op_handler): Unsigned
25077 param instead of tree-code.
25078 (ptr_op_widen_plus_signed): Delete.
25079 (ptr_op_widen_plus_unsigned): Delete.
25080 (ptr_op_widen_mult_signed): Delete.
25081 (ptr_op_widen_mult_unsigned): Delete.
25082 (range_op_table::initialize_integral_ops): Add new opcodes.
25083 * range-op.h (range_op_handler): Use unsigned.
25084 (OP_WIDEN_MULT_SIGNED): New.
25085 (OP_WIDEN_MULT_UNSIGNED): New.
25086 (OP_WIDEN_PLUS_SIGNED): New.
25087 (OP_WIDEN_PLUS_UNSIGNED): New.
25088 (RANGE_OP_TABLE_SIZE): New.
25089 (range_op_table::operator []): Use unsigned.
25090 (range_op_table::set): Use unsigned.
25091 (m_range_tree): Make unsigned.
25092 (ptr_op_widen_mult_signed): Remove.
25093 (ptr_op_widen_mult_unsigned): Remove.
25094 (ptr_op_widen_plus_signed): Remove.
25095 (ptr_op_widen_plus_unsigned): Remove.
25097 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25099 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
25100 manually as there is no access to the default operator.
25101 (cfn_copysign::fold_range): Don't check for validity.
25102 (cfn_ubsan::fold_range): Ditto.
25103 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
25104 * range-op.cc (default_operator): New.
25105 (range_op_handler::range_op_handler): Use default_operator
25107 (range_op_handler::operator bool): Move from header, compare
25108 against default operator.
25109 (range_op_handler::range_op): New.
25110 * range-op.h (range_op_handler::operator bool): Move.
25112 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25114 * range-op.cc (unified_table): Delete.
25115 (range_op_table operator_table): Instantiate.
25116 (range_op_table::range_op_table): Rename from unified_table.
25117 (range_op_handler::range_op_handler): Use range_op_table.
25118 * range-op.h (range_op_table::operator []): Inline.
25119 (range_op_table::set): Inline.
25121 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25123 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
25125 * gimple-range-op.cc (get_code): Rename from get_code_and_type
25127 (gimple_range_op_handler::supported_p): No need for type.
25128 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
25129 (cfn_copysign::fold_range): Ditto.
25130 (cfn_ubsan::fold_range): Ditto.
25131 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
25132 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
25133 * range-op-float.cc (operator_plus::op1_range): Ditto.
25134 (operator_mult::op1_range): Ditto.
25135 (range_op_float_tests): Ditto.
25136 * range-op.cc (get_op_handler): Remove.
25137 (range_op_handler::set_op_handler): Remove.
25138 (operator_plus::op1_range): No need for type.
25139 (operator_minus::op1_range): Ditto.
25140 (operator_mult::op1_range): Ditto.
25141 (operator_exact_divide::op1_range): Ditto.
25142 (operator_cast::op1_range): Ditto.
25143 (perator_bitwise_not::fold_range): Ditto.
25144 (operator_negate::fold_range): Ditto.
25145 * range-op.h (range_op_handler::range_op_handler): Remove type param.
25146 (range_cast): No need for type.
25147 (range_op_table::operator[]): Check for enum_code >= 0.
25148 * tree-data-ref.cc (compute_distributive_range): No need for type.
25149 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
25150 * value-query.cc (range_query::get_tree_range): Ditto.
25151 * value-relation.cc (relation_oracle::validate_relation): Ditto.
25152 * vr-values.cc (range_of_var_in_loop): Ditto.
25153 (simplify_using_ranges::fold_cond_with_ops): Ditto.
25155 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25157 * range-op-mixed.h (operator_max): Remove final.
25158 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
25159 (pointer_table::pointer_table): Remove.
25160 (class hybrid_max_operator): New.
25161 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
25162 * range-op.cc (pointer_tree_table): Remove.
25163 (unified_table::unified_table): Comment out MAX_EXPR.
25164 (get_op_handler): Remove check of pointer table.
25165 * range-op.h (class pointer_table): Remove.
25167 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25169 * range-op-mixed.h (operator_min): Remove final.
25170 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
25171 (class hybrid_min_operator): New.
25172 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
25173 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
25175 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25177 * range-op-mixed.h (operator_bitwise_or): Remove final.
25178 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
25179 (class hybrid_or_operator): New.
25180 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
25181 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
25183 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25185 * range-op-mixed.h (operator_bitwise_and): Remove final.
25186 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
25187 (class hybrid_and_operator): New.
25188 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
25189 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
25191 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25193 * Makefile.in (OBJS): Add range-op-ptr.o.
25194 * range-op-mixed.h (update_known_bitmask): Move prototype here.
25195 (minus_op1_op2_relation_effect): Move prototype here.
25196 (wi_includes_zero_p): Move function to here.
25197 (wi_zero_p): Ditto.
25198 * range-op.cc (update_known_bitmask): Remove static.
25199 (wi_includes_zero_p): Move to header.
25200 (wi_zero_p): Move to header.
25201 (minus_op1_op2_relation_effect): Remove static.
25202 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
25203 (pointer_plus_operator): Ditto.
25204 (pointer_min_max_operator): Ditto.
25205 (pointer_and_operator): Ditto.
25206 (pointer_or_operator): Ditto.
25207 (pointer_table): Ditto.
25208 (range_op_table::initialize_pointer_ops): Ditto.
25209 * range-op-ptr.cc: New.
25211 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25213 * range-op-mixed.h (class operator_max): Move from...
25214 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
25215 (get_op_handler): Remove the integral table.
25216 (class operator_max): Move from here.
25217 (integral_table::integral_table): Delete.
25218 * range-op.h (class integral_table): Delete.
25220 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25222 * range-op-mixed.h (class operator_min): Move from...
25223 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
25224 (class operator_min): Move from here.
25225 (integral_table::integral_table): Remove MIN_EXPR.
25227 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25229 * range-op-mixed.h (class operator_bitwise_or): Move from...
25230 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
25231 (class operator_bitwise_or): Move from here.
25232 (integral_table::integral_table): Remove BIT_IOR_EXPR.
25234 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25236 * range-op-mixed.h (class operator_bitwise_and): Move from...
25237 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
25238 (get_op_handler): Check for a pointer table entry first.
25239 (class operator_bitwise_and): Move from here.
25240 (integral_table::integral_table): Remove BIT_AND_EXPR.
25242 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25244 * range-op-mixed.h (class operator_bitwise_xor): Move from...
25245 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
25246 (class operator_bitwise_xor): Move from here.
25247 (integral_table::integral_table): Remove BIT_XOR_EXPR.
25248 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
25250 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25252 * range-op-mixed.h (class operator_bitwise_not): Move from...
25253 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
25254 (class operator_bitwise_not): Move from here.
25255 (integral_table::integral_table): Remove BIT_NOT_EXPR.
25256 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
25258 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
25260 * range-op-mixed.h (class operator_addr_expr): Move from...
25261 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
25262 (class operator_addr_expr): Move from here.
25263 (integral_table::integral_table): Remove ADDR_EXPR.
25264 (pointer_table::pointer_table): Remove ADDR_EXPR.
25266 2023-06-12 Pan Li <pan2.li@intel.com>
25268 * config/riscv/riscv-vector-builtins-types.def
25269 (vfloat16m1_t): Add type to lmul1 ops.
25270 (vfloat16m2_t): Likewise.
25271 (vfloat16m4_t): Likewise.
25273 2023-06-12 Richard Biener <rguenther@suse.de>
25275 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
25276 .MASK_STORE and friend set the size of the access to
25279 2023-06-12 Tamar Christina <tamar.christina@arm.com>
25281 * config.in: Regenerate.
25282 * configure: Regenerate.
25283 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
25285 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25287 * config/riscv/autovec-opt.md
25288 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
25289 (*<any_shiftrt:optab>trunc<mode>): Ditto.
25290 * config/riscv/autovec.md (<optab><mode>3): Change to
25291 define_insn_and_split.
25292 (v<optab><mode>3): Ditto.
25293 (trunc<mode><v_double_trunc>2): Ditto.
25295 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25297 * simplify-rtx.cc (simplify_const_unary_operation):
25298 Handle US_TRUNCATE, SS_TRUNCATE.
25300 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
25303 * doc/gm2.texi (Standard procedures): Fix Next link.
25305 2023-06-12 Tamar Christina <tamar.christina@arm.com>
25307 * config.in: Regenerate.
25309 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
25311 PR middle-end/110142
25312 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
25313 subtype to vect_widened_op_tree and remove subtype parameter, also
25314 remove superfluous overloaded function definition.
25315 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
25316 to call to vect_recog_widen_op_pattern.
25317 (vect_recog_widen_minus_pattern): Likewise.
25319 2023-06-12 liuhongt <hongtao.liu@intel.com>
25321 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
25322 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
25323 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
25324 (vec_unpacks_lo_<mode>): Ditto.
25325 (vec_unpacks_hi_<mode>): Ditto.
25326 (sse_movlhps_<mode>): New define_insn.
25327 (ssse3_palignr<mode>_perm): Extend to V_128H.
25328 (V_128H): New mode iterator.
25329 (ssepackPHmode): New mode attribute.
25330 (vunpck_extract_mode): Ditto.
25331 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
25332 (vpckfloat_temp_mode): Ditto.
25333 (vpckfloat_op_mode): Ditto.
25334 (vunpckfixt_mode): Extend to VxHF.
25335 (vunpckfixt_model): Ditto.
25336 (vunpckfixt_extract_mode): Ditto.
25338 2023-06-12 Richard Biener <rguenther@suse.de>
25340 PR middle-end/110200
25341 * genmatch.cc (expr::gen_transform): Put braces around
25342 the if arm for the (convert ...) short-cut.
25344 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
25347 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
25348 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
25350 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
25353 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
25354 floating constant itself for real_to_target call.
25356 2023-06-12 Pan Li <pan2.li@intel.com>
25358 * config/riscv/riscv-vector-builtins-types.def
25359 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
25360 (vfloat16mf2_t): Ditto.
25361 (vfloat16m1_t): Ditto.
25362 (vfloat16m2_t): Ditto.
25363 (vfloat16m4_t): Ditto.
25365 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
25367 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
25368 Do not require a stack frame when debugging is enabled for AIX.
25370 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
25372 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
25373 Remove attribute values.
25374 (insv_notbit): New post-reload insn.
25375 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
25376 (*insv.not-bit.0_split, *insv.not-bit.7_split)
25377 (*insv.xor-extract_split): Split to insv_notbit.
25378 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
25379 (*insv.xor-extract): Remove post-reload insns.
25380 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
25381 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
25382 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
25383 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
25385 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
25388 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
25389 (MSB, SIZE): New mode attributes.
25390 (any_shift): New code iterator.
25391 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
25392 (*lshr<mode>3_const_split): Add constraint alternative for
25393 the case of shift-offset = MSB. Ditch "length" attribute.
25394 (extzv<mode): New. replaces extzv. Adjust following patterns.
25395 Use avr_out_extr, avr_out_extr_not to print asm.
25396 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
25397 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
25398 * config/avr/constraints.md (C15, C23, C31, Yil): New
25399 * config/avr/predicates.md (reg_or_low_io_operand)
25400 (const7_operand, reg_or_low_io_operand)
25401 (const15_operand, const_0_to_15_operand)
25402 (const23_operand, const_0_to_23_operand)
25403 (const31_operand, const_0_to_31_operand): New.
25404 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
25405 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
25406 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
25407 MSB case to new insn constraint "r" for operands[1].
25408 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
25409 Handle these cases.
25410 (avr_rtx_costs_1): Adjust cost for a new pattern.
25412 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25414 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
25415 (vector_insn_info::parse_insn): Add rtx_insn parse.
25416 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
25417 (get_first_vsetvl): New function.
25418 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
25419 (pass_vsetvl::cleanup_insns): Remove it.
25420 (pass_vsetvl::ssa_post_optimization): New function.
25421 (has_no_uses): Ditto.
25422 (pass_vsetvl::propagate_avl): Remove it.
25423 (pass_vsetvl::df_post_optimization): New function.
25424 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
25425 * config/riscv/riscv-vsetvl.h: Adapt declaration.
25427 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
25429 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
25430 (ipcp_vr_lattice::print): Call dump method.
25431 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
25433 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
25434 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
25436 (initialize_node_lattices): Pass type when appropriate.
25437 (ipa_vr_operation_and_type_effects): Make type agnostic.
25438 (ipa_value_range_from_jfunc): Same.
25439 (propagate_vr_across_jump_function): Same.
25440 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
25441 (evaluate_properties_for_edge): Same.
25442 * ipa-prop.cc (ipa_vr::get_vrange): Same.
25443 (ipcp_update_vr): Same.
25444 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
25445 (ipa_range_set_and_normalize): Same.
25447 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
25451 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
25452 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
25453 (avr_pass_data_ifelse): New pass_data for it.
25454 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
25455 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
25456 (avr_out_cmp_ext): New functions.
25457 (compare_condtition): Make sure REG_CC dies in the branch insn.
25458 (avr_rtx_costs_1): Add computation of cbranch costs.
25459 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
25460 [ADJUST_LEN_CMP_SEXT]Handle them.
25461 (TARGET_CANONICALIZE_COMPARISON): New define.
25462 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
25463 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
25464 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
25465 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
25466 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
25467 (avr_out_cmp_zext): New Protos
25468 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
25469 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
25470 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
25471 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
25472 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
25473 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
25474 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
25475 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
25476 (adjust_len) [add_set_ZN, cmp_zext]: New.
25477 (QIPSI): New mode iterator.
25478 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
25479 (gelt): New code iterator.
25480 (gelt_eqne): New code attribute.
25481 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
25482 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
25483 (*cmpqi_sign_extend): Remove insns.
25484 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
25485 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
25486 * config/avr/predicates.md (scratch_or_d_register_operand): New.
25487 * config/avr/constraints.md (Yxx): New constraint.
25489 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25491 * config/riscv/autovec.md (select_vl<mode>): New pattern.
25492 * config/riscv/riscv-protos.h (expand_select_vl): New function.
25493 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
25495 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25497 * range-op-float.cc (foperator_mult_div_base): Delete.
25498 (foperator_mult_div_base::find_range): Make static local function.
25499 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
25500 (operator_mult::op1_range): Rename from foperator_mult.
25501 (operator_mult::op2_range): Ditto.
25502 (operator_mult::rv_fold): Ditto.
25503 (float_table::float_table): Remove MULT_EXPR.
25504 (class foperator_div): Inherit from range_operator.
25505 (float_table::float_table): Delete.
25506 * range-op-mixed.h (class operator_mult): Combined from integer
25508 * range-op.cc (float_tree_table): Delete.
25509 (op_mult): New object.
25510 (unified_table::unified_table): Add MULT_EXPR.
25511 (get_op_handler): Do not check float table any longer.
25512 (class cross_product_operator): Move to range-op-mixed.h.
25513 (class operator_mult): Move to range-op-mixed.h.
25514 (integral_table::integral_table): Remove MULT_EXPR.
25515 (pointer_table::pointer_table): Remove MULT_EXPR.
25516 * range-op.h (float_table): Remove.
25518 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25520 * range-op-float.cc (foperator_negate): Remove. Move prototypes
25521 to range-op-mixed.h
25522 (operator_negate::fold_range): Rename from foperator_negate.
25523 (operator_negate::op1_range): Ditto.
25524 (float_table::float_table): Remove NEGATE_EXPR.
25525 * range-op-mixed.h (class operator_negate): Combined from integer
25527 * range-op.cc (op_negate): New object.
25528 (unified_table::unified_table): Add NEGATE_EXPR.
25529 (class operator_negate): Move to range-op-mixed.h.
25530 (integral_table::integral_table): Remove NEGATE_EXPR.
25531 (pointer_table::pointer_table): Remove NEGATE_EXPR.
25533 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25535 * range-op-float.cc (foperator_minus): Remove. Move prototypes
25536 to range-op-mixed.h
25537 (operator_minus::fold_range): Rename from foperator_minus.
25538 (operator_minus::op1_range): Ditto.
25539 (operator_minus::op2_range): Ditto.
25540 (operator_minus::rv_fold): Ditto.
25541 (float_table::float_table): Remove MINUS_EXPR.
25542 * range-op-mixed.h (class operator_minus): Combined from integer
25544 * range-op.cc (op_minus): New object.
25545 (unified_table::unified_table): Add MINUS_EXPR.
25546 (class operator_minus): Move to range-op-mixed.h.
25547 (integral_table::integral_table): Remove MINUS_EXPR.
25548 (pointer_table::pointer_table): Remove MINUS_EXPR.
25550 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25552 * range-op-float.cc (foperator_abs): Remove. Move prototypes
25553 to range-op-mixed.h
25554 (operator_abs::fold_range): Rename from foperator_abs.
25555 (operator_abs::op1_range): Ditto.
25556 (float_table::float_table): Remove ABS_EXPR.
25557 * range-op-mixed.h (class operator_abs): Combined from integer
25559 * range-op.cc (op_abs): New object.
25560 (unified_table::unified_table): Add ABS_EXPR.
25561 (class operator_abs): Move to range-op-mixed.h.
25562 (integral_table::integral_table): Remove ABS_EXPR.
25563 (pointer_table::pointer_table): Remove ABS_EXPR.
25565 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25567 * range-op-float.cc (foperator_plus): Remove. Move prototypes
25568 to range-op-mixed.h
25569 (operator_plus::fold_range): Rename from foperator_plus.
25570 (operator_plus::op1_range): Ditto.
25571 (operator_plus::op2_range): Ditto.
25572 (operator_plus::rv_fold): Ditto.
25573 (float_table::float_table): Remove PLUS_EXPR.
25574 * range-op-mixed.h (class operator_plus): Combined from integer
25576 * range-op.cc (op_plus): New object.
25577 (unified_table::unified_table): Add PLUS_EXPR.
25578 (class operator_plus): Move to range-op-mixed.h.
25579 (integral_table::integral_table): Remove PLUS_EXPR.
25580 (pointer_table::pointer_table): Remove PLUS_EXPR.
25582 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25584 * range-op-mixed.h (class operator_cast): Combined from integer
25586 * range-op.cc (op_cast): New object.
25587 (unified_table::unified_table): Add op_cast
25588 (class operator_cast): Move to range-op-mixed.h.
25589 (integral_table::integral_table): Remove op_cast
25590 (pointer_table::pointer_table): Remove op_cast.
25592 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25594 * range-op-float.cc (operator_cst::fold_range): New.
25595 * range-op-mixed.h (class operator_cst): Move from integer file.
25596 * range-op.cc (op_cst): New object.
25597 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
25598 (class operator_cst): Move to range-op-mixed.h.
25599 (integral_table::integral_table): Remove op_cst.
25600 (pointer_table::pointer_table): Remove op_cst.
25602 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25604 * range-op-float.cc (foperator_identity): Remove. Move prototypes
25605 to range-op-mixed.h
25606 (operator_identity::fold_range): Rename from foperator_identity.
25607 (operator_identity::op1_range): Ditto.
25608 (float_table::float_table): Remove fop_identity.
25609 * range-op-mixed.h (class operator_identity): Combined from integer
25611 * range-op.cc (op_identity): New object.
25612 (unified_table::unified_table): Add op_identity.
25613 (class operator_identity): Move to range-op-mixed.h.
25614 (integral_table::integral_table): Remove identity.
25615 (pointer_table::pointer_table): Remove identity.
25617 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25619 * range-op-float.cc (foperator_ge): Remove. Move prototypes
25620 to range-op-mixed.h
25621 (operator_ge::fold_range): Rename from foperator_ge.
25622 (operator_ge::op1_range): Ditto.
25623 (float_table::float_table): Remove GE_EXPR.
25624 * range-op-mixed.h (class operator_ge): Combined from integer
25626 * range-op.cc (op_ge): New object.
25627 (unified_table::unified_table): Add GE_EXPR.
25628 (class operator_ge): Move to range-op-mixed.h.
25629 (ge_op1_op2_relation): Fold into
25630 operator_ge::op1_op2_relation.
25631 (integral_table::integral_table): Remove GE_EXPR.
25632 (pointer_table::pointer_table): Remove GE_EXPR.
25633 * range-op.h (ge_op1_op2_relation): Delete.
25635 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25637 * range-op-float.cc (foperator_gt): Remove. Move prototypes
25638 to range-op-mixed.h
25639 (operator_gt::fold_range): Rename from foperator_gt.
25640 (operator_gt::op1_range): Ditto.
25641 (float_table::float_table): Remove GT_EXPR.
25642 * range-op-mixed.h (class operator_gt): Combined from integer
25644 * range-op.cc (op_gt): New object.
25645 (unified_table::unified_table): Add GT_EXPR.
25646 (class operator_gt): Move to range-op-mixed.h.
25647 (gt_op1_op2_relation): Fold into
25648 operator_gt::op1_op2_relation.
25649 (integral_table::integral_table): Remove GT_EXPR.
25650 (pointer_table::pointer_table): Remove GT_EXPR.
25651 * range-op.h (gt_op1_op2_relation): Delete.
25653 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25655 * range-op-float.cc (foperator_le): Remove. Move prototypes
25656 to range-op-mixed.h
25657 (operator_le::fold_range): Rename from foperator_le.
25658 (operator_le::op1_range): Ditto.
25659 (float_table::float_table): Remove LE_EXPR.
25660 * range-op-mixed.h (class operator_le): Combined from integer
25662 * range-op.cc (op_le): New object.
25663 (unified_table::unified_table): Add LE_EXPR.
25664 (class operator_le): Move to range-op-mixed.h.
25665 (le_op1_op2_relation): Fold into
25666 operator_le::op1_op2_relation.
25667 (integral_table::integral_table): Remove LE_EXPR.
25668 (pointer_table::pointer_table): Remove LE_EXPR.
25669 * range-op.h (le_op1_op2_relation): Delete.
25671 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25673 * range-op-float.cc (foperator_lt): Remove. Move prototypes
25674 to range-op-mixed.h
25675 (operator_lt::fold_range): Rename from foperator_lt.
25676 (operator_lt::op1_range): Ditto.
25677 (float_table::float_table): Remove LT_EXPR.
25678 * range-op-mixed.h (class operator_lt): Combined from integer
25680 * range-op.cc (op_lt): New object.
25681 (unified_table::unified_table): Add LT_EXPR.
25682 (class operator_lt): Move to range-op-mixed.h.
25683 (lt_op1_op2_relation): Fold into
25684 operator_lt::op1_op2_relation.
25685 (integral_table::integral_table): Remove LT_EXPR.
25686 (pointer_table::pointer_table): Remove LT_EXPR.
25687 * range-op.h (lt_op1_op2_relation): Delete.
25689 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25691 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
25692 to range-op-mixed.h
25693 (operator_equal::fold_range): Rename from foperator_not_equal.
25694 (operator_equal::op1_range): Ditto.
25695 (float_table::float_table): Remove NE_EXPR.
25696 * range-op-mixed.h (class operator_not_equal): Combined from integer
25698 * range-op.cc (op_equal): New object.
25699 (unified_table::unified_table): Add NE_EXPR.
25700 (class operator_not_equal): Move to range-op-mixed.h.
25701 (not_equal_op1_op2_relation): Fold into
25702 operator_not_equal::op1_op2_relation.
25703 (integral_table::integral_table): Remove NE_EXPR.
25704 (pointer_table::pointer_table): Remove NE_EXPR.
25705 * range-op.h (not_equal_op1_op2_relation): Delete.
25707 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25709 * range-op-float.cc (foperator_equal): Remove. Move prototypes
25710 to range-op-mixed.h
25711 (operator_equal::fold_range): Rename from foperator_equal.
25712 (operator_equal::op1_range): Ditto.
25713 (float_table::float_table): Remove EQ_EXPR.
25714 * range-op-mixed.h (class operator_equal): Combined from integer
25716 * range-op.cc (op_equal): New object.
25717 (unified_table::unified_table): Add EQ_EXPR.
25718 (class operator_equal): Move to range-op-mixed.h.
25719 (equal_op1_op2_relation): Fold into
25720 operator_equal::op1_op2_relation.
25721 (integral_table::integral_table): Remove EQ_EXPR.
25722 (pointer_table::pointer_table): Remove EQ_EXPR.
25723 * range-op.h (equal_op1_op2_relation): Delete.
25725 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
25727 * range-op-float.cc (class float_table): Move to header.
25728 (float_table::float_table): Move float only operators to...
25729 (range_op_table::initialize_float_ops): Here.
25730 * range-op-mixed.h: New.
25731 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
25733 (float_tree_table): Moved from range-op-float.cc.
25734 (unified_tree_table): New.
25735 (unified_table::unified_table): New. Call initialize routines.
25736 (get_op_handler): Check unified table first.
25737 (range_op_handler::range_op_handler): Handle no type constructor.
25738 (integral_table::integral_table): Move integral only operators to...
25739 (range_op_table::initialize_integral_ops): Here.
25740 (pointer_table::pointer_table): Move pointer only operators to...
25741 (range_op_table::initialize_pointer_ops): Here.
25742 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
25743 (get_bool_state): Ditto.
25744 (empty_range_varying): Ditto.
25745 (relop_early_resolve): Ditto.
25746 (class range_op_table): Add new init methods for range types.
25747 (class integral_table): Move declaration to here.
25748 (class pointer_table): Move declaration to here.
25749 (class float_table): Move declaration to here.
25751 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25752 Richard Sandiford <richard.sandiford@arm.com>
25753 Richard Biener <rguenther@suse.de>
25755 * doc/md.texi: Add SELECT_VL support.
25756 * internal-fn.def (SELECT_VL): Ditto.
25757 * optabs.def (OPTAB_D): Ditto.
25758 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
25759 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
25760 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
25761 (vectorizable_store): Ditto.
25762 (vectorizable_load): Ditto.
25763 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
25765 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
25768 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
25771 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
25773 * range-op.cc (range_cast): Move to...
25774 * range-op.h (range_cast): Here and add generic a version.
25776 2023-06-09 Marek Polacek <polacek@redhat.com>
25780 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
25781 warn about designated initializers in C only.
25783 2023-06-09 Andrew Pinski <apinski@marvell.com>
25785 PR tree-optimization/97711
25786 PR tree-optimization/110155
25787 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
25788 ((zero_one != 0) ? z <op> y : y): Likewise.
25790 2023-06-09 Andrew Pinski <apinski@marvell.com>
25792 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
25793 multiply rather than negation/bit_and.
25795 2023-06-09 Andrew Pinski <apinski@marvell.com>
25797 * match.pd (`X & -Y -> X * Y`): Allow for truncation
25798 and the same type for unsigned types.
25800 2023-06-09 Andrew Pinski <apinski@marvell.com>
25802 PR tree-optimization/110165
25803 PR tree-optimization/110166
25804 * match.pd (zero_one_valued_p): Don't accept
25805 signed 1-bit integers.
25807 2023-06-09 Richard Biener <rguenther@suse.de>
25809 * match.pd (two conversions in a row): Use element_precision
25810 to DTRT for VECTOR_TYPE.
25812 2023-06-09 Pan Li <pan2.li@intel.com>
25814 * config/riscv/riscv.md (enabled): Move to another place, and
25815 add fp_vector_disabled to the cond.
25816 (fp_vector_disabled): New attr defined for disabling fp.
25817 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
25819 2023-06-09 Pan Li <pan2.li@intel.com>
25821 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
25824 2023-06-09 liuhongt <hongtao.liu@intel.com>
25827 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
25828 view_convert_expr mask to signed type when folding pblendvb
25831 2023-06-09 liuhongt <hongtao.liu@intel.com>
25834 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
25835 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
25836 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
25838 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
25839 real codename for __builtin_ia32_pabs{b,w,d}.
25841 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
25843 * gimple-range-op.cc
25844 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
25845 (gimple_range_op_handler::maybe_builtin_call): Adjust.
25846 * gimple-range-op.h (operand1, operand2): Use m_operator.
25847 * range-op.cc (integral_table, pointer_table): Relocate.
25848 (get_op_handler): Rename from get_handler and handle all types.
25849 (range_op_handler::range_op_handler): Relocate.
25850 (range_op_handler::set_op_handler): Relocate and adjust.
25851 (range_op_handler::range_op_handler): Relocate.
25852 (dispatch_trio): New.
25853 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
25854 (range_op_handler::dispatch_kind): New.
25855 (range_op_handler::fold_range): Relocate and Use new dispatch value.
25856 (range_op_handler::op1_range): Ditto.
25857 (range_op_handler::op2_range): Ditto.
25858 (range_op_handler::lhs_op1_relation): Ditto.
25859 (range_op_handler::lhs_op2_relation): Ditto.
25860 (range_op_handler::op1_op2_relation): Ditto.
25861 (range_op_handler::set_op_handler): Use m_operator member.
25862 * range-op.h (range_op_handler::operator bool): Use m_operator.
25863 (range_op_handler::dispatch_kind): New.
25864 (range_op_handler::m_valid): Delete.
25865 (range_op_handler::m_int): Delete
25866 (range_op_handler::m_float): Delete
25867 (range_op_handler::m_operator): New.
25868 (range_op_table::operator[]): Relocate from .cc file.
25869 (range_op_table::set): Ditto.
25870 * value-range.h (class vrange): Make range_op_handler a friend.
25872 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
25874 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
25875 (cfn_pass_through_arg1): Adjust using statemenmt.
25876 (cfn_signbit): Change base class, adjust using statement.
25877 (cfn_copysign): Ditto.
25879 (cfn_sincos): Ditto.
25880 * range-op-float.cc (fold_range): Change class to range_operator.
25884 (lhs_op1_relation): Ditto.
25885 (lhs_op2_relation): Ditto.
25886 (op1_op2_relation): Ditto.
25887 (foperator_*): Ditto.
25888 (class float_table): New. Inherit from range_op_table.
25889 (floating_tree_table) Change to range_op_table pointer.
25890 (class floating_op_table): Delete.
25891 * range-op.cc (operator_equal): Adjust using statement.
25892 (operator_not_equal): Ditto.
25893 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
25894 (operator_minus, operator_cast): Ditto.
25895 (operator_bitwise_and, pointer_plus_operator): Ditto.
25896 (get_float_handle): Change return type.
25897 * range-op.h (range_operator_float): Delete. Relocate all methods
25898 into class range_operator.
25899 (range_op_handler::m_float): Change type to range_operator.
25900 (floating_op_table): Delete.
25901 (floating_tree_table): Change type.
25903 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
25905 * range-op.cc (range_operator::fold_range): Call virtual routine.
25906 (range_operator::update_bitmask): New.
25907 (operator_equal::update_bitmask): New.
25908 (operator_not_equal::update_bitmask): New.
25909 (operator_lt::update_bitmask): New.
25910 (operator_le::update_bitmask): New.
25911 (operator_gt::update_bitmask): New.
25912 (operator_ge::update_bitmask): New.
25913 (operator_ge::update_bitmask): New.
25914 (operator_plus::update_bitmask): New.
25915 (operator_minus::update_bitmask): New.
25916 (operator_pointer_diff::update_bitmask): New.
25917 (operator_min::update_bitmask): New.
25918 (operator_max::update_bitmask): New.
25919 (operator_mult::update_bitmask): New.
25920 (operator_div:operator_div):New.
25921 (operator_div::update_bitmask): New.
25922 (operator_div::m_code): New member.
25923 (operator_exact_divide::operator_exact_divide): New constructor.
25924 (operator_lshift::update_bitmask): New.
25925 (operator_rshift::update_bitmask): New.
25926 (operator_bitwise_and::update_bitmask): New.
25927 (operator_bitwise_or::update_bitmask): New.
25928 (operator_bitwise_xor::update_bitmask): New.
25929 (operator_trunc_mod::update_bitmask): New.
25930 (op_ident, op_unknown, op_ptr_min_max): New.
25931 (op_nop, op_convert): Delete.
25932 (op_ssa, op_paren, op_obj_type): Delete.
25933 (op_realpart, op_imagpart): Delete.
25934 (op_ptr_min, op_ptr_max): Delete.
25935 (pointer_plus_operator:update_bitmask): New.
25936 (range_op_table::set): Do not use m_code.
25937 (integral_table::integral_table): Adjust to single instances.
25938 * range-op.h (range_operator::range_operator): Delete.
25939 (range_operator::m_code): Delete.
25940 (range_operator::update_bitmask): New.
25942 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
25944 * range-op-float.cc (range_operator_float::fold_range): Return
25945 NAN of the result type.
25947 2023-06-08 Jakub Jelinek <jakub@redhat.com>
25949 * optabs.cc (expand_ffs): Add forward declaration.
25950 (expand_doubleword_clz): Rename to ...
25951 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
25952 handle also doubleword CTZ and FFS in addition to CLZ.
25953 (expand_unop): Adjust caller. Also call it for doubleword
25954 ctz_optab and ffs_optab.
25956 2023-06-08 Jakub Jelinek <jakub@redhat.com>
25959 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
25960 n_words == 2 recurse with mmx_ok as first argument rather than false.
25962 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
25964 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
25965 avoid sign extension/undefined behaviour when setting each bit.
25967 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
25968 Uros Bizjak <ubizjak@gmail.com>
25970 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
25971 Use new x86_stc instruction when the carry flag must be set.
25972 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
25973 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
25974 * config/i386/i386.h (TARGET_SLOW_STC): New define.
25975 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
25976 (x86_stc): New define_insn.
25977 (define_peephole2): Convert x86_stc into alternate implementation
25978 on pentium4 without -Os when a QImode register is available.
25979 (*x86_cmc): New define_insn.
25980 (define_peephole2): Convert *x86_cmc into alternate implementation
25981 on pentium4 without -Os when a QImode register is available.
25982 (*setccc): New define_insn_and_split for a no-op CCCmode move.
25983 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
25984 recognize (and eliminate) the carry flag being copied to itself.
25985 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
25986 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
25988 2023-06-07 Andrew Pinski <apinski@marvell.com>
25990 * match.pd: Fix comment for the
25991 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
25993 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
25994 Jeff Law <jlaw@ventanamicro.com>
25996 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
25997 (rotrsi3_sext): Expose generator.
25998 (rotlsi3 pattern): Hide generator.
25999 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
26001 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
26002 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
26003 (mulsi3, <optab>si3): Likewise.
26004 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
26005 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
26006 (<u>mulsidi3): Likewise.
26007 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
26008 (mulsi3_extended, <optab>si3_extended): Likewise.
26009 (splitter for shadd feeding divison): Update RTL pattern to account
26010 for changes in how 32 bit ops are expanded for TARGET_64BIT.
26011 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
26013 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
26016 * config/riscv/riscv.cc (riscv_print_operand): Calculate
26017 memmodel only when it is valid.
26019 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
26021 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
26022 for constant element of a vector.
26024 2023-06-07 Jakub Jelinek <jakub@redhat.com>
26026 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
26027 instead compare tree_nonzero_bits <= 1U rather than just == 1.
26029 2023-06-07 Alex Coplan <alex.coplan@arm.com>
26032 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
26034 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
26035 names for builtins.
26036 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
26037 setup if in_lto_p, just like we do for SVE.
26038 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
26039 (__arm_st64b): Delete.
26040 (__arm_st64bv): Delete.
26041 (__arm_st64bv0): Delete.
26043 2023-06-07 Alex Coplan <alex.coplan@arm.com>
26046 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
26047 Use input operand for the destination address.
26048 * config/aarch64/aarch64.md (st64b): Fix constraint on address
26051 2023-06-07 Alex Coplan <alex.coplan@arm.com>
26054 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
26055 Replace eight consecutive spaces with tabs.
26056 (aarch64_init_ls64_builtins): Likewise.
26057 (aarch64_expand_builtin_ls64): Likewise.
26058 * config/aarch64/aarch64.md (ld64b): Likewise.
26061 (st64bv0): Likewise.
26063 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
26065 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
26066 offset table pseudo to a general reg subset.
26068 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26070 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
26072 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
26074 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
26075 (aarch64_sqxtun2<mode>_le): Likewise.
26076 (aarch64_sqxtun2<mode>_be): Likewise.
26077 (aarch64_sqxtun2<mode>): Adjust for the above.
26078 (aarch64_sqmovun<mode>): New define_expand.
26079 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
26080 (half_mask): New mode attribute.
26081 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
26084 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26086 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
26088 (aarch64_addp<mode>_insn): ... This...
26089 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
26090 (aarch64_addp<mode>): New define_expand.
26092 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26094 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
26095 * config/riscv/riscv-v.cc
26096 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
26098 (rvv_builder::single_step_npatterns_p): New function.
26099 (rvv_builder::npatterns_all_equal_p): Ditto.
26100 (const_vec_all_in_range_p): Support POLY handling.
26101 (gen_const_vector_dup): Ditto.
26102 (emit_vlmax_gather_insn): Add vrgatherei16.
26103 (emit_vlmax_masked_gather_mu_insn): Ditto.
26104 (expand_const_vector): Add VLA SLP const vector support.
26105 (expand_vec_perm): Support POLY.
26106 (struct expand_vec_perm_d): New struct.
26107 (shuffle_generic_patterns): New function.
26108 (expand_vec_perm_const_1): Ditto.
26109 (expand_vec_perm_const): Ditto.
26110 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
26111 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
26113 2023-06-07 Andrew Pinski <apinski@marvell.com>
26115 PR middle-end/110117
26116 * expr.cc (expand_single_bit_test): Handle
26117 const_int from expand_expr.
26119 2023-06-07 Andrew Pinski <apinski@marvell.com>
26121 * expr.cc (do_store_flag): Rearrange the
26122 TER code so that it overrides the nonzero bits
26123 info if we had `a & POW2`.
26125 2023-06-07 Andrew Pinski <apinski@marvell.com>
26127 PR tree-optimization/110134
26128 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
26130 (-A CMP CST -> B CMP (-CST)): Likewise.
26132 2023-06-07 Andrew Pinski <apinski@marvell.com>
26134 PR tree-optimization/89263
26135 PR tree-optimization/99069
26136 PR tree-optimization/20083
26137 PR tree-optimization/94898
26138 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
26139 one of the operands are constant.
26141 2023-06-07 Andrew Pinski <apinski@marvell.com>
26143 * match.pd (zero_one_valued_p): Match 0 integer constant
26146 2023-06-07 Pan Li <pan2.li@intel.com>
26148 * config/riscv/riscv-vector-builtins-types.def
26149 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
26150 (vfloat32m1_t): Ditto.
26151 (vfloat32m2_t): Ditto.
26152 (vfloat32m4_t): Ditto.
26153 (vfloat32m8_t): Ditto.
26154 (vint16mf4_t): Ditto.
26155 (vint16mf2_t): Ditto.
26156 (vint16m1_t): Ditto.
26157 (vint16m2_t): Ditto.
26158 (vint16m4_t): Ditto.
26159 (vint16m8_t): Ditto.
26160 (vuint16mf4_t): Ditto.
26161 (vuint16mf2_t): Ditto.
26162 (vuint16m1_t): Ditto.
26163 (vuint16m2_t): Ditto.
26164 (vuint16m4_t): Ditto.
26165 (vuint16m8_t): Ditto.
26166 (vint32mf2_t): Ditto.
26167 (vint32m1_t): Ditto.
26168 (vint32m2_t): Ditto.
26169 (vint32m4_t): Ditto.
26170 (vint32m8_t): Ditto.
26171 (vuint32mf2_t): Ditto.
26172 (vuint32m1_t): Ditto.
26173 (vuint32m2_t): Ditto.
26174 (vuint32m4_t): Ditto.
26175 (vuint32m8_t): Ditto.
26177 2023-06-07 Jason Merrill <jason@redhat.com>
26180 * doc/invoke.texi: Document it.
26182 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
26184 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
26185 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
26186 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
26187 NOT (BITREVERSE x) as BITREVERSE (NOT x).
26188 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
26189 Optimize PARITY (BITREVERSE x) as PARITY x.
26190 Optimize BITREVERSE (BITREVERSE x) as x.
26191 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
26192 BITREVERSE of a constant integer at compile-time.
26193 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
26194 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
26195 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
26196 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
26197 Optimize COPYSIGN (x, ABS y) as ABS x.
26198 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
26199 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
26200 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
26201 arguments at compile-time.
26203 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
26205 * rtl.h (function_invariant_p): Change return type from int to bool.
26206 * reload1.cc (function_invariant_p): Change return type from
26207 int to bool and adjust function body accordingly.
26209 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26211 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
26212 (*single_<optab>mult_plus<mode>): Ditto.
26213 (*double_<optab>mult_plus<mode>): Ditto.
26214 (*sign_zero_extend_fma): Ditto.
26215 (*zero_sign_extend_fma): Ditto.
26216 * config/riscv/riscv-protos.h (enum insn_type): New enum.
26218 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
26219 Tobias Burnus <tobias@codesourcery.com>
26221 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
26222 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
26224 (omp_get_attachment): Handle map clauses with 'present' modifier.
26225 (omp_group_base): Likewise.
26226 (gimplify_scan_omp_clauses): Reorder present maps to come first.
26227 Set GOVD flags for present defaultmaps.
26228 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
26229 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
26231 (lower_omp_target): Handle map clauses with 'present' modifier.
26232 Handle 'to' and 'from' clauses with 'present'.
26233 * tree-core.h (enum omp_clause_defaultmap_kind): Add
26234 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
26235 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
26236 'from' clauses with 'present' modifier. Handle present defaultmap.
26237 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
26239 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
26241 * config/rs6000/genfusion.pl: Delete some dead code.
26243 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
26245 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
26247 (gen_ld_cmpi_p10): ... this.
26249 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
26252 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
26253 duplicate expression.
26255 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26257 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
26258 Handle unsigned reduc_plus_scal_ builtins.
26259 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
26260 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
26261 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
26262 __builtin_aarch64_reduc_plus_scal_v2di.
26263 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
26265 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26267 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
26268 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
26269 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
26271 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26273 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
26274 (aarch64_shrn<mode>_insn_be): Delete.
26275 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
26276 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
26277 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
26278 (aarch64_rshrn<mode>_insn_le): Delete.
26279 (aarch64_rshrn<mode>_insn_be): Delete.
26280 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
26281 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
26283 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26285 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
26287 (aarch64_pars_overlap_p): Likewise.
26288 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
26289 Express in terms of UNSPEC_ADDV.
26290 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
26291 (*aarch64_<su>addlv<mode>_reduction): Define.
26292 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
26293 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
26294 (aarch64_pars_overlap_p): Likewise.
26295 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
26296 (VQUADW): New mode attribute.
26297 (VWIDE2X_S): Likewise.
26299 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
26300 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
26302 2023-06-06 Richard Biener <rguenther@suse.de>
26304 PR middle-end/110055
26305 * gimplify.cc (gimplify_target_expr): Do not emit
26306 CLOBBERs for variables which have static storage duration
26307 after gimplifying their initializers.
26309 2023-06-06 Richard Biener <rguenther@suse.de>
26311 PR tree-optimization/109143
26312 * tree-ssa-structalias.cc (solution_set_expand): Avoid
26313 one bitmap iteration and optimize bit range setting.
26315 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
26317 PR bootstrap/110120
26318 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
26319 XVECEXP, not XEXP, to access first item of a PARALLEL.
26321 2023-06-06 Pan Li <pan2.li@intel.com>
26323 * config/riscv/riscv-vector-builtins-types.def
26324 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
26325 (vfloat16mf2_t): Likewise.
26326 (vfloat16m1_t): Likewise.
26327 (vfloat16m2_t): Likewise.
26328 (vfloat16m4_t): Likewise.
26329 (vfloat16m8_t): Likewise.
26330 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
26331 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
26333 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
26335 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
26336 for cfi reg/mem machmode
26337 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
26339 2023-06-06 Li Xu <xuli1@eswincomputing.com>
26341 * config/riscv/vector-iterators.md:
26342 Fix 'REQUIREMENT' for machine_mode 'MODE'.
26343 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
26344 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
26345 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
26347 2023-06-06 Pan Li <pan2.li@intel.com>
26349 * config/riscv/vector-iterators.md: Fix typo in mode attr.
26351 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
26352 Joel Hutton <joel.hutton@arm.com>
26354 * doc/generic.texi: Remove old tree codes.
26355 * expr.cc (expand_expr_real_2): Remove old tree code cases.
26356 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
26357 * optabs-tree.cc (optab_for_tree_code): Likewise.
26358 (supportable_half_widening_operation): Likewise.
26359 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
26360 * tree-inline.cc (estimate_operator_cost): Likewise.
26361 (op_symbol_code): Likewise.
26362 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
26363 (vect_analyze_data_ref_accesses): Likewise.
26364 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
26365 * cfgexpand.cc (expand_debug_expr): Likewise.
26366 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
26367 (supportable_widening_operation): Likewise.
26368 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
26370 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
26371 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
26372 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
26373 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
26374 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
26375 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
26376 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
26377 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
26379 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
26380 Joel Hutton <joel.hutton@arm.com>
26381 Tamar Christina <tamar.christina@arm.com>
26383 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
26385 (vec_widen_<su>add_lo_<mode>): ... to this.
26386 (vec_widen_<su>addl_hi_<mode>): Rename this ...
26387 (vec_widen_<su>add_hi_<mode>): ... to this.
26388 (vec_widen_<su>subl_lo_<mode>): Rename this ...
26389 (vec_widen_<su>sub_lo_<mode>): ... to this.
26390 (vec_widen_<su>subl_hi_<mode>): Rename this ...
26391 (vec_widen_<su>sub_hi_<mode>): ...to this.
26392 * doc/generic.texi: Document new IFN codes.
26393 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
26394 (commutative_binary_fn_p): Add widen_plus fn's.
26395 (widening_fn_p): New function.
26396 (narrowing_fn_p): New function.
26397 (direct_internal_fn_optab): Change visibility.
26398 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
26399 internal_fn that expands into multiple internal_fns for widening.
26400 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
26401 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
26402 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
26403 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
26404 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
26405 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
26406 (lookup_hilo_internal_fn): Likewise.
26407 (widening_fn_p): Likewise.
26408 (Narrowing_fn_p): Likewise.
26409 * optabs.cc (commutative_optab_p): Add widening plus optabs.
26410 * optabs.def (OPTAB_D): Define widen add, sub optabs.
26411 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
26412 patterns with a hi/lo or even/odd split.
26413 (vect_recog_sad_pattern): Refactor to use new IFN codes.
26414 (vect_recog_widen_plus_pattern): Likewise.
26415 (vect_recog_widen_minus_pattern): Likewise.
26416 (vect_recog_average_pattern): Likewise.
26417 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
26419 (supportable_widening_operation): Likewise.
26420 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
26422 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
26423 Joel Hutton <joel.hutton@arm.com>
26425 * tree-vect-patterns.cc: Add include for gimple-iterator.
26426 (vect_recog_widen_op_pattern): Refactor to use code_helper.
26427 (vect_gimple_build): New function.
26428 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
26430 (vectorizable_call): Likewise.
26431 (vect_gen_widened_results_half): Likewise.
26432 (vect_create_vectorized_demotion_stmts): Likewise.
26433 (vect_create_vectorized_promotion_stmts): Likewise.
26434 (vect_create_half_widening_stmts): Likewise.
26435 (vectorizable_conversion): Likewise.
26436 (supportable_widening_operation): Likewise.
26437 (supportable_narrowing_operation): Likewise.
26438 * tree-vectorizer.h (supportable_widening_operation): Change
26439 prototype to use code_helper.
26440 (supportable_narrowing_operation): Likewise.
26441 (vect_gimple_build): New function prototype.
26442 * tree.h (code_helper::safe_as_tree_code): New function.
26443 (code_helper::safe_as_fn_code): New function.
26445 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
26447 * wide-int.cc (wi::bitreverse_large): New function implementing
26448 bit reversal of an integer.
26449 * wide-int.h (wi::bitreverse): New (template) function prototype.
26450 (bitreverse_large): Prototype helper function/implementation.
26451 (wi::bitreverse): New template wrapper around bitreverse_large.
26453 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
26455 * rtl.h (print_rtl_single): Change return type from int to void.
26456 (print_rtl_single_with_indent): Ditto.
26457 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
26458 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
26459 (rtx_writer::print_rtx_operand_code_0): Ditto.
26460 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
26461 (rtx_writer::print_rtx_operand_code_i): Ditto.
26462 (rtx_writer::print_rtx_operand_code_u): Ditto.
26463 (rtx_writer::print_rtx_operand): Ditto.
26464 (rtx_writer::print_rtx): Ditto.
26465 (rtx_writer::finish_directive): Ditto.
26466 (print_rtl_single): Change return type from int to void
26467 and adjust function body accordingly.
26468 (rtx_writer::print_rtl_single_with_indent): Ditto.
26470 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
26472 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
26473 (reg_class_subset_p): Ditto.
26474 * reginfo.cc (reg_classes_intersect_p): Ditto.
26475 (reg_class_subset_p): Ditto.
26477 2023-06-05 Pan Li <pan2.li@intel.com>
26479 * config/riscv/riscv-vector-builtins-types.def
26480 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
26481 (vfloat32m1_t): Ditto.
26482 (vfloat32m2_t): Ditto.
26483 (vfloat32m4_t): Ditto.
26484 (vfloat32m8_t): Ditto.
26485 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
26486 (vint16mf2_t): Ditto.
26487 (vint16m1_t): Ditto.
26488 (vint16m2_t): Ditto.
26489 (vint16m4_t): Ditto.
26490 (vint16m8_t): Ditto.
26491 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
26492 (vuint16mf2_t): Ditto.
26493 (vuint16m1_t): Ditto.
26494 (vuint16m2_t): Ditto.
26495 (vuint16m4_t): Ditto.
26496 (vuint16m8_t): Ditto.
26497 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
26498 (vint32m1_t): Ditto.
26499 (vint32m2_t): Ditto.
26500 (vint32m4_t): Ditto.
26501 (vint32m8_t): Ditto.
26502 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
26503 (vuint32m1_t): Ditto.
26504 (vuint32m2_t): Ditto.
26505 (vuint32m4_t): Ditto.
26506 (vuint32m8_t): Ditto.
26507 * config/riscv/vector-iterators.md: Add FP=16 support for V,
26508 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
26510 2023-06-05 Andrew Pinski <apinski@marvell.com>
26512 PR bootstrap/110085
26513 * Makefile.in (clean): Remove the removing of
26514 MULTILIB_DIR/MULTILIB_OPTIONS directories.
26516 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
26518 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
26520 * config/mips/mips.cc (speculation_barrier_libfunc): New static
26522 (mips_init_libfuncs): Initialize it.
26523 (mips_emit_speculation_barrier): New function.
26524 * config/mips/mips.md (speculation_barrier): Call
26525 mips_emit_speculation_barrier.
26527 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26529 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
26530 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
26531 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
26532 (rvv_builder::get_merged_repeating_sequence): Ditto.
26533 (rvv_builder::get_merge_scalar_mask): Ditto.
26534 (emit_scalar_move_insn): Ditto.
26535 (emit_vlmax_integer_move_insn): Ditto.
26536 (emit_nonvlmax_integer_move_insn): Ditto.
26537 (emit_vlmax_gather_insn): Ditto.
26538 (emit_vlmax_masked_gather_mu_insn): Ditto.
26539 (get_repeating_sequence_dup_machine_mode): Ditto.
26541 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26543 * config/riscv/autovec.md: Split arguments.
26544 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
26545 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
26547 2023-06-04 Andrew Pinski <apinski@marvell.com>
26549 * expr.cc (do_store_flag): Improve for single bit testing
26550 not against zero but against that single bit.
26552 2023-06-04 Andrew Pinski <apinski@marvell.com>
26554 * expr.cc (do_store_flag): Extend the one bit checking case
26555 to handle the case where we don't have an and but rather still
26556 one bit is known to be non-zero.
26558 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
26560 * config/h8300/constraints.md (Zz): Make this a normal
26562 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
26563 * config/h8300/logical.md (H8/SX bit patterns): Remove.
26565 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26567 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
26568 New insn_and_split patterns.
26570 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26573 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
26574 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
26575 (@vlmul_extx4<mode>): Ditto.
26576 (@vlmul_extx8<mode>): Ditto.
26577 (@vlmul_extx16<mode>): Ditto.
26578 (@vlmul_extx32<mode>): Ditto.
26579 (@vlmul_extx64<mode>): Ditto.
26580 (*vlmul_extx2<mode>): Ditto.
26581 (*vlmul_extx4<mode>): Ditto.
26582 (*vlmul_extx8<mode>): Ditto.
26583 (*vlmul_extx16<mode>): Ditto.
26584 (*vlmul_extx32<mode>): Ditto.
26585 (*vlmul_extx64<mode>): Ditto.
26587 2023-06-04 Pan Li <pan2.li@intel.com>
26589 * config/riscv/riscv-vector-builtins-types.def
26590 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
26591 (vfloat32m1_t): Likewise.
26592 (vfloat32m2_t): Likewise.
26593 (vfloat32m4_t): Likewise.
26594 (vfloat32m8_t): Likewise.
26595 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
26596 * config/riscv/vector-iterators.md: Add single to half machine
26599 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26601 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
26602 (*n<optab><mode>): Ditto.
26603 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
26604 (*n<optab><mode>): Ditto.
26605 * config/riscv/vector.md: Ditto.
26607 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
26610 * config/i386/i386-features.cc (scalar_chain::convert_compare):
26611 Update or delete REG_EQUAL notes, converting CONST_INT and
26612 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
26614 2023-06-04 Jason Merrill <jason@redhat.com>
26617 * tree-eh.cc (lower_resx): Pass the exception pointer to the
26619 * except.h: Tweak comment.
26621 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
26623 * postreload.cc (move2add_use_add2_insn): Handle
26624 trivial single_sets. Rename variable PAT to SET.
26625 (move2add_use_add3_insn, reload_cse_move2add): Similar.
26627 2023-06-04 Pan Li <pan2.li@intel.com>
26629 * config/riscv/riscv-vector-builtins-types.def
26630 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
26631 (vfloat16mf2_t): Likewise.
26632 (vfloat16m1_t): Likewise.
26633 (vfloat16m2_t): Likewise.
26634 (vfloat16m4_t): Likewise.
26635 (vfloat16m8_t): Likewise.
26636 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
26637 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
26638 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
26639 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
26642 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
26644 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
26647 2023-06-03 Die Li <lidie@eswincomputing.com>
26649 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
26651 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26653 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
26655 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26657 * config/riscv/vector.md: Add vector-opt.md.
26658 * config/riscv/autovec-opt.md: New file.
26660 2023-06-03 liuhongt <hongtao.liu@intel.com>
26662 PR tree-optimization/110067
26663 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
26664 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
26666 2023-06-03 liuhongt <hongtao.liu@intel.com>
26669 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
26670 (truncv2si<mode>2): Ditto.
26672 2023-06-02 Andrew Pinski <apinski@marvell.com>
26674 PR rtl-optimization/102733
26675 * dse.cc (store_info): Add addrspace field.
26676 (record_store): Record the address space
26677 and check to make sure they are the same.
26679 2023-06-02 Andrew Pinski <apinski@marvell.com>
26681 PR rtl-optimization/110042
26682 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
26683 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
26685 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
26688 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
26689 Make sure that we do not have a cap on field alignment before altering
26690 the struct layout based on the type alignment of the first entry.
26692 2023-06-02 David Faust <david.faust@oracle.com>
26695 * btfout.cc (btf_absolute_func_id): New function.
26696 (btf_asm_func_type): Call it here. Change index parameter from
26697 size_t to ctf_id_t. Use PRIu64 formatter.
26699 2023-06-02 Alex Coplan <alex.coplan@arm.com>
26701 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
26702 (btf_asm_datasec_type): Likewise.
26704 2023-06-02 Carl Love <cel@us.ibm.com>
26706 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
26707 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
26709 2023-06-02 Jason Merrill <jason@redhat.com>
26713 * tree.h (DECL_MERGEABLE): New.
26714 * tree-core.h (struct tree_decl_common): Mention it.
26715 * gimplify.cc (gimplify_init_constructor): Check it.
26716 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
26717 * varasm.cc (categorize_decl_for_section): Likewise.
26719 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
26721 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
26722 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
26723 (stack_regs_mentioned_p): Change return type from int to bool
26724 and adjust function body accordingly.
26725 (stack_regs_mentioned): Ditto.
26726 (check_asm_stack_operands): Ditto. Change "malformed_asm"
26728 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
26729 (swap_rtx_condition_1): Change return type from int to bool
26730 and adjust function body accordingly. Change "r" variable to bool.
26731 (swap_rtx_condition): Change return type from int to bool
26732 and adjust function body accordingly.
26733 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
26734 (subst_stack_regs): Ditto.
26735 (convert_regs_entry): Change return type from int to bool and adjust
26736 function body accordingly. Change "inserted" variable to bool.
26737 (convert_regs_1): Recode handling of control_flow_insn_deleted.
26738 (convert_regs_2): Recode handling of cfg_altered.
26739 (convert_regs): Ditto. Change "inserted" variable to bool.
26741 2023-06-02 Jason Merrill <jason@redhat.com>
26744 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
26745 (initializer_constant_valid_p_1): Compare float precision.
26747 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
26749 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
26752 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26754 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
26755 (vect_set_loop_condition_partial_vectors): Ditto.
26757 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
26760 * config/avr/avr.md: Add an RTL peephole to optimize operations on
26761 non-LD_REGS after a move from LD_REGS.
26762 (piaop): New code iterator.
26764 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
26767 * doc/install.texi: Document (optional) Perl usage for parallel
26768 testing of libgomp.
26770 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
26773 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
26776 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26777 KuanLin Chen <best124612@gmail.com>
26779 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
26780 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
26782 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26784 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
26786 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26788 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
26790 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26792 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
26794 (DEF_RVV_FRM_ENUM): Ditto.
26796 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26798 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
26799 intrinsic API expander
26800 * config/riscv/vector.md
26801 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
26802 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
26803 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
26805 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26807 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
26808 * config/riscv/predicates.md (vector_perm_operand): New predicate.
26809 * config/riscv/riscv-protos.h (enum insn_type): New enum.
26810 (expand_vec_perm): New function.
26811 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
26812 (gen_const_vector_dup): Ditto.
26813 (emit_vlmax_gather_insn): Ditto.
26814 (emit_vlmax_masked_gather_mu_insn): Ditto.
26815 (expand_vec_perm): Ditto.
26817 2023-06-01 Jason Merrill <jason@redhat.com>
26819 * doc/invoke.texi (-Wpedantic): Improve clarity.
26821 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
26823 * rtl.h (exp_equiv_p): Change return type from int to bool.
26824 * cse.cc (mention_regs): Change return type from int to bool
26825 and adjust function body accordingly.
26826 (exp_equiv_p): Ditto.
26827 (insert_regs): Ditto. Change "modified" function argument to bool
26828 and update usage accordingly.
26829 (record_jump_cond): Remove always zero "reversed_nonequality"
26830 function argument and update usage accordingly.
26831 (fold_rtx): Change "changed" variable to bool.
26832 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
26833 (is_dead_reg): Change return type from int to bool.
26835 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
26837 * config/xtensa/xtensa.md (adddi3, subdi3):
26838 New RTL generation patterns implemented according to the instruc-
26839 tion idioms described in the Xtensa ISA reference manual (p. 600).
26841 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
26842 Uros Bizjak <ubizjak@gmail.com>
26845 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
26846 CODE_for_sse4_1_ptestzv2di.
26847 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
26848 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
26849 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
26850 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
26851 when expanding UNSPEC_PTEST to compare against zero.
26852 * config/i386/i386-features.cc (scalar_chain::convert_compare):
26853 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
26854 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
26855 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
26856 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
26857 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
26858 check for suitable matching modes for the UNSPEC_PTEST pattern.
26859 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
26860 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
26861 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
26862 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
26863 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
26864 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
26865 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
26867 (*ptest<mode>_and): Specify CCZ to only perform this optimization
26868 when only the Z flag is required.
26870 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
26873 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
26875 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26877 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
26878 Add =r,m and =r,m alternatives.
26879 (load_pair<DREG:mode><DREG2:mode>): Likewise.
26880 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
26882 2023-06-01 Pan Li <pan2.li@intel.com>
26884 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
26886 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
26887 (main): Disable FP16 tuple.
26888 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
26889 (TARGET_VECTOR_ELEN_FP_16): Ditto.
26890 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
26892 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
26893 (vfloat16mf2_t): Ditto.
26894 (vfloat16m1_t): Ditto.
26895 (vfloat16m2_t): Ditto.
26896 (vfloat16m4_t): Ditto.
26897 (vfloat16m8_t): Ditto.
26898 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
26900 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
26901 machine mode based on TARGET_VECTOR_ELEN_FP_16.
26903 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26905 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
26906 (DEF_RVV_FRM_ENUM): New macro.
26907 (handle_pragma_vector): Add FRM enum
26908 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
26915 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
26916 Richard Sandiford <richard.sandiford@arm.com>
26918 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
26919 Update call to wi::bswap.
26920 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
26921 Update call to wi::bswap.
26922 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
26923 Update calls to wi::bswap.
26924 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
26925 (wi::bswap_large): New function, with revised API.
26926 * wide-int.h (wi::bswap): New (template) function prototype.
26927 (wide_int_storage::bswap): Remove method.
26928 (sext_large, zext_large): Consistent indentation/line wrapping.
26929 (bswap_large): Prototype helper function containing implementation.
26930 (wi::bswap): New template wrapper around bswap_large.
26932 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26935 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
26936 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
26937 (usdot_prod<vsi2qi>): Rename to...
26938 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
26939 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
26940 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
26941 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
26942 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
26943 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
26944 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
26947 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26950 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
26951 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
26952 (aarch64_sq<r>dmulh_n<mode>): Rename to...
26953 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
26954 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
26955 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
26956 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
26957 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
26958 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
26959 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
26960 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
26961 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
26962 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
26963 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
26965 2023-05-31 David Faust <david.faust@oracle.com>
26967 * btfout.cc (btf_kind_names): New.
26968 (btf_kind_name): New.
26969 (btf_absolute_var_id): New utility function.
26970 (btf_relative_var_id): Likewise.
26971 (btf_relative_func_id): Likewise.
26972 (btf_absolute_datasec_id): Likewise.
26973 (btf_asm_type_ref): New.
26974 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
26975 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
26976 (btf_asm_varent): Likewise.
26977 (btf_asm_func_arg): Likewise.
26978 (btf_asm_datasec_entry): Likewise.
26979 (btf_asm_datasec_type): Likewise.
26980 (btf_asm_func_type): Likewise. Add index parameter.
26981 (btf_asm_enum_const): Likewise.
26982 (btf_asm_sou_member): Likewise.
26983 (output_btf_vars): Update btf_asm_* call accordingly.
26984 (output_asm_btf_sou_fields): Likewise.
26985 (output_asm_btf_enum_list): Likewise.
26986 (output_asm_btf_func_args_list): Likewise.
26987 (output_asm_btf_vlen_bytes): Likewise.
26988 (output_btf_func_types): Add ctf_container_ref parameter.
26989 Pass it to btf_asm_func_type.
26990 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
26991 (btf_output): Update output_btf_func_types call similarly.
26993 2023-05-31 David Faust <david.faust@oracle.com>
26995 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
26996 and BTF_KIND_FWD which do not use the size/type field at all.
26998 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
27000 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
27001 (active_insn_p): Ditto.
27002 (in_sequence_p): Ditto.
27003 (unshare_all_rtl): Change return type from int to void.
27004 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
27005 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
27006 and adjust function body accordingly.
27007 (mem_expr_equal_p): Ditto.
27008 (unshare_all_rtl): Change return type from int to void
27009 and adjust function body accordingly.
27010 (verify_rtx_sharing): Remove unneeded return.
27011 (active_insn_p): Change return type from int to bool
27012 and adjust function body accordingly.
27013 (in_sequence_p): Ditto.
27015 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
27017 * rtl.h (true_dependence): Change return type from int to bool.
27018 (canon_true_dependence): Ditto.
27019 (read_dependence): Ditto.
27020 (anti_dependence): Ditto.
27021 (canon_anti_dependence): Ditto.
27022 (output_dependence): Ditto.
27023 (canon_output_dependence): Ditto.
27024 (may_alias_p): Ditto.
27025 * alias.h (alias_sets_conflict_p): Ditto.
27026 (alias_sets_must_conflict_p): Ditto.
27027 (objects_must_conflict_p): Ditto.
27028 (nonoverlapping_memrefs_p): Ditto.
27029 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
27030 (record_set): Ditto.
27031 (base_alias_check): Ditto.
27032 (find_base_value): Ditto.
27033 (mems_in_disjoint_alias_sets_p): Ditto.
27034 (get_alias_set_entry): Ditto.
27035 (decl_for_component_ref): Ditto.
27036 (write_dependence_p): Ditto.
27037 (memory_modified_1): Ditto.
27038 (mems_in_disjoint_alias_set_p): Change return type from int to bool
27039 and adjust function body accordingly.
27040 (alias_sets_conflict_p): Ditto.
27041 (alias_sets_must_conflict_p): Ditto.
27042 (objects_must_conflict_p): Ditto.
27043 (rtx_equal_for_memref_p): Ditto.
27044 (base_alias_check): Ditto.
27045 (read_dependence): Ditto.
27046 (nonoverlapping_memrefs_p): Ditto.
27047 (true_dependence_1): Ditto.
27048 (true_dependence): Ditto.
27049 (canon_true_dependence): Ditto.
27050 (write_dependence_p): Ditto.
27051 (anti_dependence): Ditto.
27052 (canon_anti_dependence): Ditto.
27053 (output_dependence): Ditto.
27054 (canon_output_dependence): Ditto.
27055 (may_alias_p): Ditto.
27056 (init_alias_analysis): Change "changed" variable to bool.
27058 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27060 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
27061 expand into define_insn_and_split.
27063 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27065 * config/riscv/vector.md: Remove FRM.
27067 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27069 * config/riscv/vector.md: Remove FRM.
27071 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27073 * config/riscv/vector.md: Remove FRM.
27075 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
27078 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
27081 2023-05-31 Richard Biener <rguenther@suse.de>
27084 PR tree-optimization/109143
27085 * tree-ssa-structalias.cc (struct topo_info): Remove.
27086 (init_topo_info): Likewise.
27087 (free_topo_info): Likewise.
27088 (compute_topo_order): Simplify API, put the component
27089 with ESCAPED last so it's processed first.
27090 (topo_visit): Adjust.
27091 (solve_graph): Likewise.
27093 2023-05-31 Richard Biener <rguenther@suse.de>
27095 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
27097 (add_graph_edge): Count redundant edges we avoid to create.
27098 (dump_sa_stats): Dump them.
27099 (ipa_pta_execute): Do not dump generating constraints when
27100 we are not dumping them.
27102 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27104 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
27105 output template to avoid explicit switch on which_alternative.
27106 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
27107 (and<mode>3): Likewise.
27108 (ior<mode>3): Likewise.
27109 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
27111 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27113 * config/xtensa/predicates.md (xtensa_bit_join_operator):
27115 * config/xtensa/xtensa.md (ior_op): Remove.
27116 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
27117 insn_and_split pattern of the same name to express and capture
27118 the bit-combining operation with both sides swapped.
27119 In addition, replace use of code iterator with new operator
27121 (*shlrd_const, *shlrd_per_byte):
27122 Likewise regarding the code iterator.
27124 2023-05-31 Cui, Lili <lili.cui@intel.com>
27126 PR tree-optimization/110038
27127 * params.opt: Add a limit on tree-reassoc-width.
27128 * tree-ssa-reassoc.cc
27129 (rewrite_expr_tree_parallel): Add width limit.
27131 2023-05-31 Pan Li <pan2.li@intel.com>
27133 * common/config/riscv/riscv-common.cc:
27134 (riscv_implied_info): Add zvfh item.
27135 (riscv_ext_version_table): Ditto.
27136 (riscv_ext_flag_table): Ditto.
27137 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
27138 (TARGET_ZVFH): Ditto.
27140 2023-05-30 liuhongt <hongtao.liu@intel.com>
27142 PR tree-optimization/108804
27143 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
27144 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
27145 Add new parameter narrow_src_p.
27146 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
27147 vectorization by truncating to lower precision.
27148 * tree-vectorizer.h (vect_get_range_info): New declare.
27150 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
27152 * lra-int.h (lra_update_sp_offset): Add the prototype.
27153 * lra.cc (setup_sp_offset): Change the return type. Use
27154 lra_update_sp_offset.
27155 * lra-eliminations.cc (lra_update_sp_offset): New function.
27156 (lra_process_new_insns): Push the current insn to reprocess if the
27157 input reload changes sp offset.
27159 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
27162 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
27163 Fix misleading identation.
27165 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
27167 * rtl.h (comparison_dominates_p): Change return type from int to bool.
27168 (condjump_p): Ditto.
27169 (any_condjump_p): Ditto.
27170 (any_uncondjump_p): Ditto.
27171 (simplejump_p): Ditto.
27172 (returnjump_p): Ditto.
27173 (eh_returnjump_p): Ditto.
27174 (onlyjump_p): Ditto.
27175 (invert_jump_1): Ditto.
27176 (invert_jump): Ditto.
27177 (rtx_renumbered_equal_p): Ditto.
27178 (redirect_jump_1): Ditto.
27179 (redirect_jump): Ditto.
27180 (condjump_in_parallel_p): Ditto.
27181 * jump.cc (invert_exp_1): Adjust forward declaration.
27182 (comparison_dominates_p): Change return type from int to bool
27183 and adjust function body accordingly.
27184 (simplejump_p): Ditto.
27185 (condjump_p): Ditto.
27186 (condjump_in_parallel_p): Ditto.
27187 (any_uncondjump_p): Ditto.
27188 (any_condjump_p): Ditto.
27189 (returnjump_p): Ditto.
27190 (eh_returnjump_p): Ditto.
27191 (onlyjump_p): Ditto.
27192 (redirect_jump_1): Ditto.
27193 (redirect_jump): Ditto.
27194 (invert_exp_1): Ditto.
27195 (invert_jump_1): Ditto.
27196 (invert_jump): Ditto.
27197 (rtx_renumbered_equal_p): Ditto.
27199 2023-05-30 Andrew Pinski <apinski@marvell.com>
27201 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
27202 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
27203 Add ne as a possible cmp.
27204 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
27206 2023-05-30 Andrew Pinski <apinski@marvell.com>
27208 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
27211 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
27213 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
27214 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
27215 (and (extend X) C) as (zero_extend (and X C)), to also optimize
27216 modes wider than HOST_WIDE_INT.
27218 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
27221 * simplify-rtx.cc (simplify_const_relational_operation): Return
27222 early if we have a MODE_CC comparison that isn't a COMPARE against
27225 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
27227 * config/riscv/riscv.cc (riscv_const_insns): Allow
27228 const_vec_duplicates.
27230 2023-05-30 liuhongt <hongtao.liu@intel.com>
27232 PR middle-end/108938
27233 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
27234 function, cut from original find_bswap_or_nop function.
27235 (find_bswap_or_nop): Add a new parameter, detect bswap +
27236 rotate and save rotate result in the new parameter.
27237 (bswap_replace): Add a new parameter to indicate rotate and
27238 generate rotate stmt if needed.
27239 (maybe_optimize_vector_constructor): Adjust for new rotate
27240 parameter in the upper 2 functions.
27241 (pass_optimize_bswap::execute): Ditto.
27242 (imm_store_chain_info::output_merged_store): Ditto.
27244 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27246 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
27247 (aarch64_<su>adalp<mode>): New define_expand.
27248 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
27249 (aarch64_<su>addlp<mode>): Convert to define_expand.
27250 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
27251 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
27253 (USADDLP): Likewise.
27254 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
27256 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27258 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
27259 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
27260 srhadd, urhadd builtin codes for standard optab ones.
27261 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
27262 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
27264 (<u>avg<mode>3_ceil): Rename to...
27265 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
27267 (aarch64_<su>hsub<mode>): New define_expand.
27268 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
27269 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
27270 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
27272 2023-05-30 Andreas Schwab <schwab@suse.de>
27275 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
27276 match libsanitizer.
27278 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27280 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
27281 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
27283 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
27284 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
27285 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
27286 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
27287 (aarch64_<sra_op>sra_n<mode>): New define_expand.
27288 (aarch64_<sra_op>rsra_n<mode>): Likewise.
27289 (aarch64_<sur>sra_n<mode>): Rename to...
27290 (aarch64_<sur>sra_ndi): ... This.
27291 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
27292 any_target_p argument.
27293 (aarch64_extract_vec_duplicate_wide_int): Define.
27294 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
27295 (aarch64_const_vec_rnd_cst_p): Likewise.
27296 (aarch64_vector_mode_supported_any_target_p): Likewise.
27297 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
27298 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
27299 (VSRA): Adjust for the above.
27301 (V2XWIDE): New mode_attr.
27302 (vec_or_offset): Likewise.
27303 (SHIFTEXTEND): Likewise.
27304 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
27306 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
27307 clarify that it applies to current target options.
27308 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
27309 * doc/tm.texi.in: Regenerate.
27310 * stor-layout.cc (mode_for_vector): Check
27311 vector_mode_supported_any_target_p when iterating through vector modes.
27312 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
27313 clarify that it applies to current target options.
27314 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
27316 2023-05-30 Lili Cui <lili.cui@intel.com>
27318 PR tree-optimization/98350
27319 * tree-ssa-reassoc.cc
27320 (rewrite_expr_tree_parallel): Rewrite this function.
27321 (rank_ops_for_fma): New.
27322 (reassociate_bb): Handle new function.
27324 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
27326 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
27327 (rtx_unstable_p): Ditto.
27328 (reg_mentioned_p): Ditto.
27329 (reg_referenced_p): Ditto.
27330 (reg_used_between_p): Ditto.
27331 (reg_set_between_p): Ditto.
27332 (modified_between_p): Ditto.
27333 (no_labels_between_p): Ditto.
27334 (modified_in_p): Ditto.
27335 (reg_set_p): Ditto.
27336 (multiple_sets): Ditto.
27337 (set_noop_p): Ditto.
27338 (noop_move_p): Ditto.
27339 (reg_overlap_mentioned_p): Ditto.
27340 (dead_or_set_p): Ditto.
27341 (dead_or_set_regno_p): Ditto.
27342 (find_reg_fusage): Ditto.
27343 (find_regno_fusage): Ditto.
27344 (side_effects_p): Ditto.
27345 (volatile_refs_p): Ditto.
27346 (volatile_insn_p): Ditto.
27347 (may_trap_p_1): Ditto.
27348 (may_trap_p): Ditto.
27349 (may_trap_or_fault_p): Ditto.
27350 (computed_jump_p): Ditto.
27351 (auto_inc_p): Ditto.
27352 (loc_mentioned_in_p): Ditto.
27353 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
27354 (rtx_unstable_p): Change return type from int to bool
27355 and adjust function body accordingly.
27356 (rtx_addr_can_trap_p): Ditto.
27357 (reg_mentioned_p): Ditto.
27358 (no_labels_between_p): Ditto.
27359 (reg_used_between_p): Ditto.
27360 (reg_referenced_p): Ditto.
27361 (reg_set_between_p): Ditto.
27362 (reg_set_p): Ditto.
27363 (modified_between_p): Ditto.
27364 (modified_in_p): Ditto.
27365 (multiple_sets): Ditto.
27366 (set_noop_p): Ditto.
27367 (noop_move_p): Ditto.
27368 (reg_overlap_mentioned_p): Ditto.
27369 (dead_or_set_p): Ditto.
27370 (dead_or_set_regno_p): Ditto.
27371 (find_reg_fusage): Ditto.
27372 (find_regno_fusage): Ditto.
27373 (remove_node_from_insn_list): Ditto.
27374 (volatile_insn_p): Ditto.
27375 (volatile_refs_p): Ditto.
27376 (side_effects_p): Ditto.
27377 (may_trap_p_1): Ditto.
27378 (may_trap_p): Ditto.
27379 (may_trap_or_fault_p): Ditto.
27380 (computed_jump_p): Ditto.
27381 (auto_inc_p): Ditto.
27382 (loc_mentioned_in_p): Ditto.
27383 * combine.cc (can_combine_p): Update indirect function.
27385 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27387 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
27388 * config/riscv/iterators.md: New attribute.
27389 * config/riscv/vector-iterators.md: New attribute.
27391 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
27393 * config/riscv/riscv.md: Fix signed and unsigned comparison
27396 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27398 * config/riscv/autovec.md (fnma<mode>4): New pattern.
27399 (*fnma<mode>): Ditto.
27401 2023-05-29 Die Li <lidie@eswincomputing.com>
27403 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
27405 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
27406 process for TARGET_XTHEADCONDMOV
27408 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
27411 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
27412 TARGET_AVX512BW to generate truncv16hiv16qi2.
27414 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27416 * config/riscv/riscv.md (and<mode>3): New expander.
27417 (*and<mode>3) New pattern.
27418 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
27421 2023-05-29 Pan Li <pan2.li@intel.com>
27423 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
27424 comments and rename local variables.
27425 (emit_nonvlmax_insn): Diito.
27426 (emit_vlmax_merge_insn): Ditto.
27427 (emit_vlmax_cmp_insn): Ditto.
27428 (emit_vlmax_cmp_mu_insn): Ditto.
27429 (emit_scalar_move_insn): Ditto.
27431 2023-05-29 Pan Li <pan2.li@intel.com>
27433 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
27435 (emit_nonvlmax_insn): Ditto.
27436 (emit_vlmax_merge_insn): Ditto.
27437 (emit_vlmax_cmp_insn): Ditto.
27438 (emit_vlmax_cmp_mu_insn): Ditto.
27439 (expand_vec_series): Ditto.
27441 2023-05-29 Pan Li <pan2.li@intel.com>
27443 * config/riscv/riscv-protos.h (enum insn_type): New type.
27444 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
27445 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
27447 (rvv_builder::get_merged_repeating_sequence): Ditto.
27448 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
27449 to evaluate the optimization cost.
27450 (rvv_builder::get_merge_scalar_mask): New function to get the merge
27452 (emit_scalar_move_insn): New function to emit vmv.s.x.
27453 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
27454 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
27456 (get_repeating_sequence_dup_machine_mode): New function to get the dup
27458 (expand_vector_init_merge_repeating_sequence): New function to perform
27460 (expand_vec_init): Add this vector init optimization.
27461 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
27463 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
27465 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
27466 put onto the increment when it is inserted after the position.
27468 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
27470 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
27473 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27475 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
27477 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27479 * config/riscv/autovec.md (fma<mode>4): New pattern.
27480 (*fma<mode>): Ditto.
27481 * config/riscv/riscv-protos.h (enum insn_type): New enum.
27482 (emit_vlmax_ternary_insn): New function.
27483 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
27485 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27487 * config/riscv/vector.md: Fix vimuladd instruction bug.
27489 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27491 * config/riscv/riscv.cc (global_state_unknown_p): New function.
27492 (riscv_mode_after): Fix incorrect VXM.
27494 2023-05-29 Pan Li <pan2.li@intel.com>
27496 * common/config/riscv/riscv-common.cc:
27497 (riscv_implied_info): Add zvfhmin item.
27498 (riscv_ext_version_table): Ditto.
27499 (riscv_ext_flag_table): Ditto.
27500 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
27501 (TARGET_ZFHMIN): Align indent.
27502 (TARGET_ZFH): Ditto.
27503 (TARGET_ZVFHMIN): New macro.
27505 2023-05-27 liuhongt <hongtao.liu@intel.com>
27508 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
27509 to VI_AVX2 to cover more modes.
27511 2023-05-27 liuhongt <hongtao.liu@intel.com>
27513 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
27514 Remove ATOM and ICELAKE(and later) core processors.
27516 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
27518 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
27520 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
27522 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
27525 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
27526 Juzhe Zhong <juzhe.zhong@rivai.ai>
27528 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
27530 (<optab><v_quad_trunc><mode>2): Dito.
27531 (<optab><v_oct_trunc><mode>2): Dito.
27532 (trunc<mode><v_double_trunc>2): Dito.
27533 (trunc<mode><v_quad_trunc>2): Dito.
27534 (trunc<mode><v_oct_trunc>2): Dito.
27535 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
27536 (autovectorize_vector_modes): Define.
27537 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
27539 (autovectorize_vector_modes): Implement hook.
27540 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
27541 Implement target hook.
27542 (riscv_vectorize_related_mode): Implement target hook.
27543 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
27544 (TARGET_VECTORIZE_RELATED_MODE): Define.
27545 * config/riscv/vector-iterators.md: Add lowercase versions of
27546 mode_attr iterators.
27548 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
27549 Tobias Burnus <tobias@codesourcery.com>
27551 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
27552 (ASM_SPEC): Use XNACKOPT.
27553 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
27554 (enum hsaco_attr_type): ... this, and generalize the names.
27555 (TARGET_XNACK): New macro.
27556 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
27558 (output_file_start): Update xnack handling.
27559 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
27560 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
27561 (sram_ecc_type): Rename to ...
27562 (hsaco_attr_type: ... this.)
27563 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
27564 (TEST_XNACK): Delete.
27565 (TEST_XNACK_ANY): New macro.
27566 (TEST_XNACK_ON): New macro.
27567 (main): Support the new -mxnack=on/off/any syntax.
27568 * doc/invoke.texi (-mxnack): Update for new syntax.
27570 2023-05-26 Andrew Pinski <apinski@marvell.com>
27572 * genmatch.cc (emit_debug_printf): New function.
27573 (dt_simplify::gen_1): Emit printf into the code
27574 before the `return true` or returning the folded result
27575 instead of emitting it always.
27577 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27579 * config/xtensa/xtensa-protos.h
27580 (xtensa_expand_block_set_unrolled_loop,
27581 xtensa_expand_block_set_small_loop): Remove.
27582 (xtensa_expand_block_set): New prototype.
27583 * config/xtensa/xtensa.cc
27584 (xtensa_expand_block_set_libcall): New subfunction.
27585 (xtensa_expand_block_set_unrolled_loop,
27586 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
27587 (xtensa_expand_block_set): New function that calls the above
27589 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
27590 xtensa_expand_block_set().
27592 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27594 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
27596 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
27598 * config/xtensa/constraints.md (O):
27599 Change to use the above function.
27600 * config/xtensa/xtensa.md (*subsi3_from_const):
27601 New insn_and_split pattern.
27603 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
27605 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
27606 Retract excessive line folding, and correct the value of
27607 the "length" insn attribute related to TARGET_DENSITY.
27608 (*extzvsi-1bit_addsubx): Ditto.
27610 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
27612 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
27613 Do not disable call to ix86_expand_vecop_qihi2.
27615 2023-05-26 liuhongt <hongtao.liu@intel.com>
27619 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
27620 calculation when !hard_regno_mode_ok for GENERAL_REGS and
27621 mode, otherwise still use GENERAL_REGS.
27623 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27625 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
27626 explict VL and drop VL in ops.
27628 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
27630 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
27631 in different BB blocks.
27633 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
27635 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
27636 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
27637 instructions when available. Emulate truncation via
27638 ix86_expand_vec_perm_const_1 when native truncate insn
27640 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
27641 when available. Trivially rename some variables.
27642 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
27643 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
27644 calculation of V*QImode emulations to account for generation of
27645 2x-wider mode instructions.
27646 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
27647 emulations to account for generation of 2x-wider mode instructions.
27649 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
27652 * config/avr/avr.cc (avr_can_inline_p): New static function.
27653 (TARGET_CAN_INLINE_P): Define to that function.
27655 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
27658 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
27659 Handle any bit position and use mode QISI.
27660 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
27661 of 2 insns for bit-transfer of respective style.
27663 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
27665 * config/arm/iterators.md (MVE_6): Remove.
27666 * config/arm/mve.md: Replace MVE_6 with MVE_5.
27668 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27669 Richard Sandiford <richard.sandiford@arm.com>
27671 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
27673 (vect_set_loop_controls_directly): Add decrement IV support.
27674 (vect_set_loop_condition_partial_vectors): Ditto.
27675 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
27677 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
27680 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27683 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
27684 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
27685 Fix canonicalization of PLUS operands.
27686 (aarch64_fcmla<rot><mode>): Rename to...
27687 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
27688 Fix canonicalization of PLUS operands.
27689 (aarch64_fcmla_lane<rot><mode>): Rename to...
27690 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
27691 Fix canonicalization of PLUS operands.
27692 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
27693 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
27694 Fix canonicalization of PLUS operands.
27695 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
27697 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
27699 * config/arm/arm.md (rbitsi2): Rename to...
27700 (arm_rbit): ... This.
27701 (ctzsi2): Adjust for the above.
27702 (arm_rev16si2): Convert to define_expand.
27703 (arm_rev16si2_alt1): New pattern.
27704 (arm_rev16si2_alt): Rename to...
27705 (*arm_rev16si2_alt2): ... This.
27706 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
27707 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
27708 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
27709 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
27711 2023-05-25 Alex Coplan <alex.coplan@arm.com>
27714 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
27716 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
27717 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
27718 DFmode as an rvalue.
27720 2023-05-25 Richard Biener <rguenther@suse.de>
27723 * tree-vect-stmts.cc (vectorizable_condition): For
27724 embedded comparisons also handle the case when the target
27725 only provides vec_cmp and vcond_mask.
27727 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
27729 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
27732 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
27734 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
27735 (seq_cost_ignoring_scalar_moves): Likewise.
27736 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
27738 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27740 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
27741 (vcage_f32): Likewise.
27742 (vcages_f32): Likewise.
27743 (vcageq_f32): Likewise.
27744 (vcaged_f64): Likewise.
27745 (vcageq_f64): Likewise.
27746 (vcagts_f32): Likewise.
27747 (vcagt_f32): Likewise.
27748 (vcagt_f64): Likewise.
27749 (vcagtq_f32): Likewise.
27750 (vcagtd_f64): Likewise.
27751 (vcagtq_f64): Likewise.
27752 (vcale_f32): Likewise.
27753 (vcale_f64): Likewise.
27754 (vcaled_f64): Likewise.
27755 (vcales_f32): Likewise.
27756 (vcaleq_f32): Likewise.
27757 (vcaleq_f64): Likewise.
27758 (vcalt_f32): Likewise.
27759 (vcalt_f64): Likewise.
27760 (vcaltd_f64): Likewise.
27761 (vcaltq_f32): Likewise.
27762 (vcaltq_f64): Likewise.
27763 (vcalts_f32): Likewise.
27765 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
27769 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
27770 int to const int or const int to const unsigned int.
27771 (_mm512_mask_srli_epi16): Ditto.
27772 (_mm512_slli_epi16): Ditto.
27773 (_mm512_mask_slli_epi16): Ditto.
27774 (_mm512_maskz_slli_epi16): Ditto.
27775 (_mm512_srai_epi16): Ditto.
27776 (_mm512_mask_srai_epi16): Ditto.
27777 (_mm512_maskz_srai_epi16): Ditto.
27778 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
27779 (_mm512_mask_slli_epi64): Ditto.
27780 (_mm512_maskz_slli_epi64): Ditto.
27781 (_mm512_srli_epi64): Ditto.
27782 (_mm512_mask_srli_epi64): Ditto.
27783 (_mm512_maskz_srli_epi64): Ditto.
27784 (_mm512_srai_epi64): Ditto.
27785 (_mm512_mask_srai_epi64): Ditto.
27786 (_mm512_maskz_srai_epi64): Ditto.
27787 (_mm512_slli_epi32): Ditto.
27788 (_mm512_mask_slli_epi32): Ditto.
27789 (_mm512_maskz_slli_epi32): Ditto.
27790 (_mm512_srli_epi32): Ditto.
27791 (_mm512_mask_srli_epi32): Ditto.
27792 (_mm512_maskz_srli_epi32): Ditto.
27793 (_mm512_srai_epi32): Ditto.
27794 (_mm512_mask_srai_epi32): Ditto.
27795 (_mm512_maskz_srai_epi32): Ditto.
27796 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
27797 (_mm256_maskz_srai_epi16): Ditto.
27798 (_mm_mask_srai_epi16): Ditto.
27799 (_mm_maskz_srai_epi16): Ditto.
27800 (_mm256_mask_slli_epi16): Ditto.
27801 (_mm256_maskz_slli_epi16): Ditto.
27802 (_mm_mask_slli_epi16): Ditto.
27803 (_mm_maskz_slli_epi16): Ditto.
27804 (_mm_maskz_srli_epi16): Ditto.
27805 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
27806 (_mm256_maskz_srli_epi32): Ditto.
27807 (_mm_mask_srli_epi32): Ditto.
27808 (_mm_maskz_srli_epi32): Ditto.
27809 (_mm256_mask_srli_epi64): Ditto.
27810 (_mm256_maskz_srli_epi64): Ditto.
27811 (_mm_mask_srli_epi64): Ditto.
27812 (_mm_maskz_srli_epi64): Ditto.
27813 (_mm256_mask_srai_epi32): Ditto.
27814 (_mm256_maskz_srai_epi32): Ditto.
27815 (_mm_mask_srai_epi32): Ditto.
27816 (_mm_maskz_srai_epi32): Ditto.
27817 (_mm256_srai_epi64): Ditto.
27818 (_mm256_mask_srai_epi64): Ditto.
27819 (_mm256_maskz_srai_epi64): Ditto.
27820 (_mm_srai_epi64): Ditto.
27821 (_mm_mask_srai_epi64): Ditto.
27822 (_mm_maskz_srai_epi64): Ditto.
27823 (_mm_mask_slli_epi32): Ditto.
27824 (_mm_maskz_slli_epi32): Ditto.
27825 (_mm_mask_slli_epi64): Ditto.
27826 (_mm_maskz_slli_epi64): Ditto.
27827 (_mm256_mask_slli_epi32): Ditto.
27828 (_mm256_maskz_slli_epi32): Ditto.
27829 (_mm256_mask_slli_epi64): Ditto.
27830 (_mm256_maskz_slli_epi64): Ditto.
27832 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27834 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
27837 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
27839 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
27840 * data-streamer-out.cc (streamer_write_vrange): Same.
27841 * value-range.h (class vrange): Make streamer_write_vrange a friend.
27843 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
27845 * value-query.cc (range_query::get_tree_range): Set NAN directly
27847 * value-range.cc (frange::set): Assert that bounds are not NAN.
27849 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
27851 * value-range.cc (add_vrange): Handle known NANs.
27853 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
27855 * value-range.h (frange::set_nan): New.
27857 2023-05-25 Alexandre Oliva <oliva@adacore.com>
27860 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
27861 requires stricter alignment than MEM's.
27863 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
27865 PR tree-optimization/107822
27866 PR tree-optimization/107986
27867 * Makefile.in (OBJS): Add gimple-range-phi.o.
27868 * gimple-range-cache.h (ranger_cache::m_estimate): New
27869 phi_analyzer pointer member.
27870 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
27871 phi_analyzer if no loop info is available.
27872 * gimple-range-phi.cc: New file.
27873 * gimple-range-phi.h: New file.
27874 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
27876 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
27878 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
27880 (fold_range): Add range_query parameter.
27881 (fur_relation::fur_relation): New.
27882 (fur_relation::trio): New.
27883 (fur_relation::register_relation): New.
27884 (fold_relations): New.
27885 * gimple-range-fold.h (fold_range): Adjust prototypes.
27886 (fold_relations): New.
27888 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
27890 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
27891 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
27892 (ranger_cache::const_query): New.
27893 * gimple-range.cc (gimple_ranger::const_query): New.
27894 * gimple-range.h (gimple_ranger::const_query): New prototype.
27896 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
27898 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
27899 (ssa_cache::dump_range_query): Delete.
27900 (ssa_lazy_cache::dump_range_query): Delete.
27901 (ssa_lazy_cache::get_range): Move from header file.
27902 (ssa_lazy_cache::clear_range): ditto.
27903 (ssa_lazy_cache::clear): Ditto.
27904 * gimple-range-cache.h (class ssa_cache): Virtualize.
27905 (class ssa_lazy_cache): Inherit and virtualize.
27907 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
27909 * value-range.h (vrange::kind): Remove.
27911 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
27913 PR middle-end/109840
27914 * match.pd <popcount optimizations>: Preserve zero-extension when
27915 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
27916 popcount((T)x), so the popcount's argument keeps the same type.
27917 <parity optimizations>: Likewise preserve extensions when
27918 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
27919 parity((T)x), so that the parity's argument type is the same.
27921 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
27923 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
27924 (ipcp_store_vr_results): Same.
27925 * ipa-prop.cc (ipa_vr::ipa_vr): New.
27926 (ipa_vr::get_vrange): New.
27927 (ipa_vr::set_unknown): New.
27928 (ipa_vr::streamer_read): New.
27929 (ipa_vr::streamer_write): New.
27930 (write_ipcp_transformation_info): Use new ipa_vr API.
27931 (read_ipcp_transformation_info): Same.
27932 (ipa_vr::nonzero_p): Delete.
27933 (ipcp_update_vr): Use new ipa_vr API.
27934 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
27935 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
27937 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
27939 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
27940 silence overflow warnings later on.
27942 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
27944 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
27945 Remove handling of V8QImode.
27946 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
27947 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
27948 (v<insn>v4qi3): Ditto.
27949 * config/i386/sse.md (v<insn>v8qi3): Remove.
27951 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27954 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
27955 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
27956 (aarch64_simd_ashr<mode>): Rename to...
27957 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
27958 (aarch64_simd_imm_shl<mode>): Rename to...
27959 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
27960 (aarch64_simd_reg_sshl<mode>): Rename to...
27961 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
27962 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
27963 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
27964 (aarch64_simd_reg_shl<mode>_signed): Rename to...
27965 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
27966 (vec_shr_<mode>): Rename to...
27967 (vec_shr_<mode><vczle><vczbe>): ... This.
27968 (aarch64_<sur>shl<mode>): Rename to...
27969 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
27970 (aarch64_<sur>q<r>shl<mode>): Rename to...
27971 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
27973 2023-05-24 Richard Biener <rguenther@suse.de>
27976 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
27977 Perform final vector composition using
27978 ix86_expand_vector_init_general instead of setting
27979 the highpart and lowpart which causes spilling.
27981 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
27983 PR tree-optimization/109695
27984 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
27986 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
27987 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
27988 flag to set_global_range.
27989 (gimple_ranger::prefill_stmt_dependencies): Ditto.
27991 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
27993 PR tree-optimization/109695
27994 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
27996 (temporal_cache::current_p): Check always_current method.
27997 (temporal_cache::set_always_current): Add param and set value
27999 (temporal_cache::always_current_p): New.
28000 (ranger_cache::get_global_range): Adjust.
28001 (ranger_cache::set_global_range): set always current first.
28003 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
28005 PR tree-optimization/109695
28006 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
28007 fold_range with global query to choose an initial value.
28009 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28011 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
28014 2023-05-24 Richard Biener <rguenther@suse.de>
28016 PR tree-optimization/109849
28017 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
28018 expressions but take the first sets.
28020 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
28023 * doc/gm2.texi (High procedure function): New node.
28024 (Using): New menu entry for High procedure function.
28026 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
28028 PR rtl-optimization/109940
28029 * early-remat.cc (postorder_index): Rename to...
28030 (rpo_index): ...this.
28031 (compare_candidates): Sort by decreasing rpo_index rather than
28032 increasing postorder_index.
28033 (early_remat::sort_candidates): Calculate the forward RPO from
28035 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
28036 rather than DF_BACKWARD in reverse.
28038 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28041 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
28042 qualifier_none for the return operand.
28044 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28046 * config/riscv/autovec.md (<optab><mode>3): New pattern.
28047 (one_cmpl<mode>2): Ditto.
28048 (*<optab>not<mode>): Ditto.
28049 (*n<optab><mode>): Ditto.
28050 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
28053 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
28055 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
28056 calculation on n_perms by considering nvectors_per_build.
28058 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28059 Richard Sandiford <richard.sandiford@arm.com>
28061 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
28062 (vec_cmp<mode><vm>): New pattern.
28063 (vec_cmpu<mode><vm>): New pattern.
28064 (vcond<V:mode><VI:mode>): New pattern.
28065 (vcondu<V:mode><VI:mode>): New pattern.
28066 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
28067 (emit_vlmax_merge_insn): New function.
28068 (emit_vlmax_cmp_insn): Ditto.
28069 (emit_vlmax_cmp_mu_insn): Ditto.
28070 (expand_vec_cmp): Ditto.
28071 (expand_vec_cmp_float): Ditto.
28072 (expand_vcond): Ditto.
28073 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
28074 (emit_vlmax_cmp_insn): Ditto.
28075 (emit_vlmax_cmp_mu_insn): Ditto.
28076 (get_cmp_insn_code): Ditto.
28077 (expand_vec_cmp): Ditto.
28078 (expand_vec_cmp_float): Ditto.
28079 (expand_vcond): Ditto.
28081 2023-05-24 Pan Li <pan2.li@intel.com>
28083 * config/riscv/genrvv-type-indexer.cc (main): Add
28084 unsigned_eew*_lmul1_interpret for indexer.
28085 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
28086 Register vuint*m1_t interpret function.
28087 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
28088 New macro for vuint8m1_t.
28089 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28090 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28091 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28092 (vbool1_t): Add to unsigned_eew*_interpret_ops.
28093 (vbool2_t): Likewise.
28094 (vbool4_t): Likewise.
28095 (vbool8_t): Likewise.
28096 (vbool16_t): Likewise.
28097 (vbool32_t): Likewise.
28098 (vbool64_t): Likewise.
28099 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
28100 New macro for vuint*m1_t.
28101 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28102 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28103 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28104 (required_extensions_p): Add vuint*m1_t interpret case.
28105 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
28106 Add vuint*m1_t interpret to base type.
28107 (unsigned_eew16_lmul1_interpret): Likewise.
28108 (unsigned_eew32_lmul1_interpret): Likewise.
28109 (unsigned_eew64_lmul1_interpret): Likewise.
28111 2023-05-24 Pan Li <pan2.li@intel.com>
28113 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
28114 for the eew size list.
28115 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
28116 (main): Add signed_eew*_lmul1_interpret for indexer.
28117 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
28118 Register vint*m1_t interpret function.
28119 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
28120 New macro for vint8m1_t.
28121 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28122 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28123 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28124 (vbool1_t): Add to signed_eew*_interpret_ops.
28125 (vbool2_t): Likewise.
28126 (vbool4_t): Likewise.
28127 (vbool8_t): Likewise.
28128 (vbool16_t): Likewise.
28129 (vbool32_t): Likewise.
28130 (vbool64_t): Likewise.
28131 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
28132 New macro for vint*m1_t.
28133 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
28134 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
28135 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
28136 (required_extensions_p): Add vint8m1_t interpret case.
28137 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
28138 Add vint*m1_t interpret to base type.
28139 (signed_eew16_lmul1_interpret): Likewise.
28140 (signed_eew32_lmul1_interpret): Likewise.
28141 (signed_eew64_lmul1_interpret): Likewise.
28143 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28145 * config/riscv/autovec.md: Adjust for new interface.
28146 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
28147 (emit_nonvlmax_insn): Add AVL operand.
28148 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
28149 (emit_nonvlmax_insn): Add AVL operand.
28150 (sew64_scalar_helper): Adjust for new interface.
28151 (expand_tuple_move): Ditto.
28152 * config/riscv/vector.md: Ditto.
28154 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28156 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
28157 (expand_const_vector): Ditto.
28158 (legitimize_move): Ditto.
28159 (sew64_scalar_helper): Ditto.
28160 (expand_tuple_move): Ditto.
28161 (expand_vector_init_insert_elems): Ditto.
28162 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
28164 2023-05-24 liuhongt <hongtao.liu@intel.com>
28167 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
28168 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
28169 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
28170 (ix86_masked_all_ones): Handle 64-bit mask.
28171 * config/i386/i386-builtin.def: Replace icode of related
28172 non-mask simd abs builtins with CODE_FOR_nothing.
28174 2023-05-23 Martin Uecker <uecker@tugraz.at>
28177 * function.cc (gimplify_parm_type): Remove function.
28178 (gimplify_parameters): Call gimplify_type_sizes.
28180 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28182 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
28183 and change to also accept '*subx' pattern.
28186 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
28188 * config/xtensa/predicates.md (addsub_operator): New.
28189 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
28190 *extzvsi-1bit_addsubx): New insn_and_split patterns.
28191 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
28192 Add a special case about ifcvt 'noce_try_cmove()' to handle
28193 constant loads that do not fit into signed 12 bits in the
28194 patterns added above.
28196 2023-05-23 Richard Biener <rguenther@suse.de>
28198 PR tree-optimization/109747
28199 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
28200 the SLP node only once to the cost hook.
28202 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
28204 * config/avr/avr.cc (avr_insn_cost): New static function.
28205 (TARGET_INSN_COST): Define to that function.
28207 2023-05-23 Richard Biener <rguenther@suse.de>
28210 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
28211 For vector construction or splats apply GPR->XMM move
28212 costing. QImode memory can be handled directly only
28213 with SSE4.1 pinsrb.
28215 2023-05-23 Richard Biener <rguenther@suse.de>
28217 PR tree-optimization/108752
28218 * tree-vect-stmts.cc (vectorizable_operation): For bit
28219 operations with generic word_mode vectors do not cost
28220 an extra stmt. For plus, minus and negate also cost the
28221 constant materialization.
28223 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
28225 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
28226 Call ix86_expand_vec_shift_qihi_constant for shifts
28227 with constant count operand.
28228 * config/i386/i386.cc (ix86_shift_rotate_cost):
28229 Handle V4QImode and V8QImode.
28230 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
28231 (<insn>v4qi3): Ditto.
28233 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28235 * config/riscv/vector.md: Add mode.
28237 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
28239 PR tree-optimization/109934
28240 * value-range.cc (irange::invert): Remove buggy special case.
28242 2023-05-23 Richard Biener <rguenther@suse.de>
28244 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
28247 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
28250 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
28251 subregs between any scalars that are 64 bits or smaller.
28252 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
28253 (bits_etype): New int attribute.
28254 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
28255 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
28256 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
28258 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
28260 * doc/md.texi: Document that <FOO> can be used to refer to the
28261 numerical value of an int iterator FOO. Tweak other parts of
28262 the int iterator documentation.
28263 * read-rtl.cc (iterator_group::has_self_attr): New field.
28264 (map_attr_string): When has_self_attr is true, make <FOO>
28265 expand to the current value of iterator FOO.
28266 (initialize_iterators): Set has_self_attr for int iterators.
28268 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28270 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
28271 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
28272 (RVV_UNOP_NUM): New macro.
28273 (RVV_BINOP_NUM): Ditto.
28274 (legitimize_move): Refactor the framework of RVV auto-vectorization.
28275 (emit_vlmax_op): Ditto.
28276 (emit_vlmax_reg_op): Ditto.
28277 (emit_len_op): Ditto.
28278 (emit_len_binop): Ditto.
28279 (emit_vlmax_tany_many): Ditto.
28280 (emit_nonvlmax_tany_many): Ditto.
28281 (sew64_scalar_helper): Ditto.
28282 (expand_tuple_move): Ditto.
28283 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
28284 (emit_pred_binop): Ditto.
28285 (emit_vlmax_op): Ditto.
28286 (emit_vlmax_tany_many): New function.
28287 (emit_len_op): Remove.
28288 (emit_nonvlmax_tany_many): New function.
28289 (emit_vlmax_reg_op): Remove.
28290 (emit_len_binop): Ditto.
28291 (emit_index_op): Ditto.
28292 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
28293 (expand_const_vector): Ditto.
28294 (legitimize_move): Ditto.
28295 (sew64_scalar_helper): Ditto.
28296 (expand_tuple_move): Ditto.
28297 (expand_vector_init_insert_elems): Ditto.
28298 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
28299 * config/riscv/vector.md: Ditto.
28301 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28304 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
28305 and constraint for operand 0.
28306 (add_vec_concat_subst_be): Likewise.
28308 2023-05-23 Richard Biener <rguenther@suse.de>
28310 PR tree-optimization/109849
28311 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
28312 and use that to determine what to hoist.
28314 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
28316 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
28317 specific treatment for bit-fields only if they have an integral type
28318 and filter out non-integral bit-fields that do not start and end on
28321 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
28323 PR tree-optimization/109920
28324 * value-range.h (RESIZABLE>::~int_range): Use delete[].
28326 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
28328 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
28329 calcuation of integer vector mode costs to reflect generated
28330 instruction sequences of different integer vector modes and
28331 different target ABIs. Remove "speed" function argument.
28332 (ix86_rtx_costs): Update call for removed function argument.
28333 (ix86_vector_costs::add_stmt_cost): Ditto.
28335 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
28337 * value-range.h (class Value_Range): Implement set_zero,
28338 set_nonzero, and nonzero_p.
28340 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
28342 * config/i386/i386.cc (ix86_multiplication_cost): Add
28343 the cost of a memory read to the cost of V?QImode sequences.
28345 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28347 * config/riscv/riscv-v.cc: Add "m_" prefix.
28349 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28351 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
28352 multiple-rgroup of length.
28353 * tree-vect-stmts.cc (vectorizable_store): Ditto.
28354 (vectorizable_load): Ditto.
28355 * tree-vectorizer.h (vect_get_loop_len): Ditto.
28357 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28359 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
28362 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
28364 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
28365 handling for the case index == count.
28367 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
28370 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
28371 Don't fold to XOR / AND / XOR if just one bit is copied to the
28374 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
28376 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
28377 builtin for bit reversal using brev instruction.
28378 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
28379 NVPTX_BUILTIN_BREVLL.
28380 (nvptx_init_builtins): Define "brev" and "brevll".
28381 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
28382 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
28383 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
28384 section, document __builtin_nvptx_brev{,ll}.
28386 2023-05-21 Jakub Jelinek <jakub@redhat.com>
28388 PR tree-optimization/109505
28389 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
28390 Combine successive equal operations with constants,
28391 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
28392 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
28395 2023-05-21 Andrew Pinski <apinski@marvell.com>
28397 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
28399 2023-05-21 Pan Li <pan2.li@intel.com>
28401 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
28402 rest bool size, aka 2, 4, 8, 16, 32, 64.
28403 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
28404 Register vbool[2|4|8|16|32|64] interpret function.
28405 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
28406 New macro for vbool2_t.
28407 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
28408 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
28409 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
28410 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
28411 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
28412 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
28413 (vint16m1_t): Likewise.
28414 (vint32m1_t): Likewise.
28415 (vint64m1_t): Likewise.
28416 (vuint8m1_t): Likewise.
28417 (vuint16m1_t): Likewise.
28418 (vuint32m1_t): Likewise.
28419 (vuint64m1_t): Likewise.
28420 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
28421 New macro for vbool2_t.
28422 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
28423 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
28424 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
28425 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
28426 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
28427 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
28428 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
28429 vbool2_t interprect to base type.
28430 (bool4_interpret): Likewise.
28431 (bool8_interpret): Likewise.
28432 (bool16_interpret): Likewise.
28433 (bool32_interpret): Likewise.
28434 (bool64_interpret): Likewise.
28436 2023-05-21 Andrew Pinski <apinski@marvell.com>
28438 PR middle-end/109919
28439 * expr.cc (expand_single_bit_test): Don't use the
28440 target for expand_expr.
28442 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
28444 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
28447 2023-05-20 Pan Li <pan2.li@intel.com>
28449 * mode-switching.cc (entity_map): Initialize the array to zero.
28452 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
28455 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
28456 Remove superfluous "parallel" in insn pattern.
28457 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
28458 printing error text to assembly.
28460 2023-05-20 Andrew Pinski <apinski@marvell.com>
28462 * expr.cc (fold_single_bit_test): Rename to ...
28463 (expand_single_bit_test): This and expand directly.
28464 (do_store_flag): Update for the rename function.
28466 2023-05-20 Andrew Pinski <apinski@marvell.com>
28468 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
28469 instead of shift/and.
28471 2023-05-20 Andrew Pinski <apinski@marvell.com>
28473 * expr.cc (fold_single_bit_test): Add an assert
28474 and simplify based on code being NE_EXPR or EQ_EXPR.
28476 2023-05-20 Andrew Pinski <apinski@marvell.com>
28478 * expr.cc (fold_single_bit_test): Take inner and bitnum
28479 instead of arg0 and arg1. Update the code.
28480 (do_store_flag): Don't create a tree when calling
28481 fold_single_bit_test instead just call it with the bitnum
28482 and the inner tree.
28484 2023-05-20 Andrew Pinski <apinski@marvell.com>
28486 * expr.cc (fold_single_bit_test): Use get_def_for_expr
28487 instead of checking the inner's code.
28489 2023-05-20 Andrew Pinski <apinski@marvell.com>
28491 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
28492 (fold_single_bit_test): This and simplify.
28494 2023-05-20 Andrew Pinski <apinski@marvell.com>
28496 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
28498 (fold_single_bit_test): Likewise.
28499 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
28500 (fold_single_bit_test): Likewise and make static.
28501 * fold-const.h (fold_single_bit_test): Remove declaration.
28503 2023-05-20 Die Li <lidie@eswincomputing.com>
28505 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
28508 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
28510 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
28512 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
28515 * config/riscv/bitmanip.md
28516 (<bitmanip_optab>disi2): Match with any_extend.
28517 (<bitmanip_optab>disi2_sext): New pattern to match
28518 with sign extend using an ANDI instruction.
28520 2023-05-19 Nathan Sidwell <nathan@acm.org>
28523 * opts.h (handle_deferred_dump_options): Declare.
28524 * opts-global.cc (handle_common_deferred_options): Do not handle
28526 (handle_deferred_dump_options): New.
28527 * toplev.cc (toplev::main): Call it after plugin init.
28529 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
28531 * config/riscv/constraints.md (DsS, DsD): Restore agreement
28532 with shiftm1 mode attribute.
28534 2023-05-19 Andrew Pinski <apinski@marvell.com>
28537 * gcc.cc (default_compilers["@c-header"]): Add %w
28538 after the --output-pch.
28540 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
28542 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
28543 to hival, ASHIFT the corresponding regs.
28545 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
28547 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
28549 2023-05-19 Jakub Jelinek <jakub@redhat.com>
28551 PR tree-optimization/105776
28552 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
28553 non-NULL, allow division statement to have a cast as single imm use
28554 rather than comparison/condition.
28555 (match_arith_overflow): In that case remove the cast stmt in addition
28556 to the division statement.
28558 2023-05-19 Jakub Jelinek <jakub@redhat.com>
28560 PR tree-optimization/101856
28561 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
28562 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
28563 support it but umul_highpart_optab does.
28565 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
28567 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
28568 of tree_to_shwi on array indices. Minor tweaks.
28570 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
28572 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
28573 * attribs.cc (diag_attr_exclusions): Ditto.
28574 (decl_attributes): Ditto.
28575 (build_type_attribute_qual_variant): Ditto.
28576 * builtins.cc (fold_builtin_carg): Ditto.
28577 (fold_builtin_next_arg): Ditto.
28578 (do_mpc_arg2): Ditto.
28579 * cfgexpand.cc (expand_return): Ditto.
28580 * cgraph.h (decl_in_symtab_p): Ditto.
28581 (symtab_node::get_create): Ditto.
28582 * dwarf2out.cc (base_type_die): Ditto.
28583 (implicit_ptr_descriptor): Ditto.
28584 (gen_array_type_die): Ditto.
28585 (gen_type_die_with_usage): Ditto.
28586 (optimize_location_into_implicit_ptr): Ditto.
28587 * expr.cc (do_store_flag): Ditto.
28588 * fold-const.cc (negate_expr_p): Ditto.
28589 (fold_negate_expr_1): Ditto.
28590 (fold_convert_const): Ditto.
28591 (fold_convert_loc): Ditto.
28592 (constant_boolean_node): Ditto.
28593 (fold_binary_op_with_conditional_arg): Ditto.
28594 (build_fold_addr_expr_with_type_loc): Ditto.
28595 (fold_comparison): Ditto.
28596 (fold_checksum_tree): Ditto.
28597 (tree_unary_nonnegative_warnv_p): Ditto.
28598 (integer_valued_real_unary_p): Ditto.
28599 (fold_read_from_constant_string): Ditto.
28600 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
28601 * gimple-expr.cc (useless_type_conversion_p): Ditto.
28602 (is_gimple_reg): Ditto.
28603 (is_gimple_asm_val): Ditto.
28604 (mark_addressable): Ditto.
28605 * gimple-expr.h (is_gimple_variable): Ditto.
28606 (virtual_operand_p): Ditto.
28607 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
28608 * gimplify.cc (gimplify_bind_expr): Ditto.
28609 (gimplify_return_expr): Ditto.
28610 (gimple_add_padding_init_for_auto_var): Ditto.
28611 (gimplify_addr_expr): Ditto.
28612 (omp_add_variable): Ditto.
28613 (omp_notice_variable): Ditto.
28614 (omp_get_base_pointer): Ditto.
28615 (omp_strip_components_and_deref): Ditto.
28616 (omp_strip_indirections): Ditto.
28617 (omp_accumulate_sibling_list): Ditto.
28618 (omp_build_struct_sibling_lists): Ditto.
28619 (gimplify_adjust_omp_clauses_1): Ditto.
28620 (gimplify_adjust_omp_clauses): Ditto.
28621 (gimplify_omp_for): Ditto.
28622 (goa_lhs_expr_p): Ditto.
28623 (gimplify_one_sizepos): Ditto.
28624 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
28625 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
28626 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
28627 (propagate_controlled_uses): Ditto.
28628 * ipa-sra.cc (type_prevails_p): Ditto.
28629 (scan_expr_access): Ditto.
28630 * optabs-tree.cc (optab_for_tree_code): Ditto.
28631 * toplev.cc (wrapup_global_declaration_1): Ditto.
28632 * trans-mem.cc (transaction_invariant_address_p): Ditto.
28633 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
28634 (verify_gimple_comparison): Ditto.
28635 (verify_gimple_assign_binary): Ditto.
28636 (verify_gimple_assign_single): Ditto.
28637 * tree-complex.cc (get_component_ssa_name): Ditto.
28638 * tree-emutls.cc (lower_emutls_2): Ditto.
28639 * tree-inline.cc (copy_tree_body_r): Ditto.
28640 (estimate_move_cost): Ditto.
28641 (copy_decl_for_dup_finish): Ditto.
28642 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
28643 (note_nonlocal_vla_type): Ditto.
28644 (convert_local_omp_clauses): Ditto.
28645 (remap_vla_decls): Ditto.
28646 (fixup_vla_decls): Ditto.
28647 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
28648 * tree-pretty-print.cc (print_declaration): Ditto.
28649 (print_call_name): Ditto.
28650 * tree-sra.cc (compare_access_positions): Ditto.
28651 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
28652 * tree-ssa-ccp.cc (get_default_value): Ditto.
28653 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
28654 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
28655 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
28656 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
28657 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
28658 * tree-ssa-sink.cc (statement_sink_location): Ditto.
28659 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
28660 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
28661 * tree-ssa-uninit.cc (warn_uninit): Ditto.
28662 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
28663 (non_rewritable_mem_ref_base): Ditto.
28664 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
28665 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
28666 * tree-vect-generic.cc (do_binop): Ditto.
28668 * tree-vect-stmts.cc (vect_init_vector): Ditto.
28669 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
28670 * tree.cc (sign_mask_for): Ditto.
28671 (verify_type_variant): Ditto.
28672 (gimple_canonical_types_compatible_p): Ditto.
28673 (verify_type): Ditto.
28674 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
28675 * var-tracking.cc (prepare_call_arguments): Ditto.
28676 (vt_add_function_parameters): Ditto.
28677 * varasm.cc (decode_addr_const): Ditto.
28679 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
28681 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
28682 (lower_reduction_clauses): Ditto.
28683 (lower_send_clauses): Ditto.
28684 (lower_omp_task_reductions): Ditto.
28685 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
28686 (worker_single_copy): Ditto.
28687 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
28688 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
28690 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
28692 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
28694 (lto_read_body_or_constructor): Ditto.
28695 * lto-streamer-out.cc (tree_is_indexable): Ditto.
28696 (lto_output_var_decl_ref): Ditto.
28697 (DFS::DFS_write_tree_body): Ditto.
28698 (wrap_refs): Ditto.
28699 (write_symbol_extension_info): Ditto.
28701 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
28703 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
28704 defines from tree.h.
28705 (aarch64_mangle_type): Ditto.
28706 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
28707 (alpha_gimplify_va_arg_1): Ditto.
28708 * config/arc/arc.cc (arc_encode_section_info): Ditto.
28709 (arc_is_aux_reg_p): Ditto.
28710 (arc_is_uncached_mem_p): Ditto.
28711 (arc_handle_aux_attribute): Ditto.
28712 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
28713 (arm_handle_cmse_nonsecure_call): Ditto.
28714 (arm_set_default_type_attributes): Ditto.
28715 (arm_is_segment_info_known): Ditto.
28716 (arm_mangle_type): Ditto.
28717 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
28718 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
28719 (avr_decl_absdata_p): Ditto.
28720 (avr_insert_attributes): Ditto.
28721 (avr_section_type_flags): Ditto.
28722 (avr_encode_section_info): Ditto.
28723 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
28724 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
28725 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
28726 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
28727 (csky_mangle_type): Ditto.
28728 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
28729 * config/darwin.cc (is_objc_metadata): Ditto.
28730 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
28731 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
28732 * config/frv/frv.cc (frv_emit_movsi): Ditto.
28733 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
28734 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
28735 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
28736 * config/i386/i386-expand.cc: Ditto.
28737 * config/i386/i386.cc (type_natural_mode): Ditto.
28738 (ix86_function_arg): Ditto.
28739 (ix86_data_alignment): Ditto.
28740 (ix86_local_alignment): Ditto.
28741 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
28742 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
28743 (i386_pe_type_dllexport_p): Ditto.
28744 (i386_pe_adjust_class_at_definition): Ditto.
28745 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
28746 (i386_pe_binds_local_p): Ditto.
28747 (i386_pe_section_type_flags): Ditto.
28748 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
28749 (ia64_gimplify_va_arg): Ditto.
28750 (ia64_in_small_data_p): Ditto.
28751 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
28752 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
28753 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
28754 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
28755 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
28756 (mcore_encode_section_info): Ditto.
28757 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
28758 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
28759 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
28760 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
28761 (pass_in_memory): Ditto.
28762 (nvptx_generate_vector_shuffle): Ditto.
28763 (nvptx_lockless_update): Ditto.
28764 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
28765 (pa_function_value): Ditto.
28766 (pa_function_arg): Ditto.
28767 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
28768 (TEXT_SPACE_P): Ditto.
28769 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
28770 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
28771 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
28772 (riscv_mangle_type): Ditto.
28773 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
28774 (rl78_addsi3_internal): Ditto.
28775 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
28776 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
28777 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
28778 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
28779 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
28780 (rs6000_function_arg_advance_1): Ditto.
28781 (rs6000_function_arg): Ditto.
28782 (rs6000_pass_by_reference): Ditto.
28783 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
28784 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
28785 (rs6000_set_default_type_attributes): Ditto.
28786 (rs6000_elf_in_small_data_p): Ditto.
28787 (IN_NAMED_SECTION): Ditto.
28788 (rs6000_xcoff_encode_section_info): Ditto.
28789 (rs6000_function_value): Ditto.
28790 (invalid_arg_for_unprototyped_fn): Ditto.
28791 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
28792 (s390_vec_n_elem): Ditto.
28793 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
28794 (s390_function_arg_integer): Ditto.
28795 (s390_return_in_memory): Ditto.
28796 (s390_encode_section_info): Ditto.
28797 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
28798 (sh_function_value): Ditto.
28799 * config/sol2.cc (solaris_insert_attributes): Ditto.
28800 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
28801 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
28802 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
28803 (xstormy16_handle_below100_attribute): Ditto.
28804 * config/v850/v850.cc (v850_encode_section_info): Ditto.
28805 (v850_insert_attributes): Ditto.
28806 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
28807 (visium_return_in_memory): Ditto.
28808 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
28810 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
28812 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
28813 (ix86_expand_vecop_qihi): Add op2vec bool variable.
28814 Do not set REG_EQUAL note.
28815 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
28817 * config/i386/i386.cc (ix86_multiplication_cost): Handle
28818 V4QImode and V8QImode.
28819 * config/i386/mmx.md (mulv8qi3): New expander.
28821 * config/i386/sse.md (mulv8qi3): Remove.
28823 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
28825 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
28827 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
28829 PR bootstrap/105831
28830 * config.gcc: Use = operator instead of ==.
28832 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
28834 PR bootstrap/105831
28835 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
28836 * configure.ac: Likewise.
28837 * configure: Regenerate.
28839 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
28841 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
28842 (__ARM_mve_coerce1): Remove.
28843 (__ARM_mve_coerce2): Remove.
28844 (__ARM_mve_coerce3): Remove.
28845 (__ARM_mve_coerce_i_scalar): New.
28846 (__ARM_mve_coerce_s8_ptr): New.
28847 (__ARM_mve_coerce_u8_ptr): New.
28848 (__ARM_mve_coerce_s16_ptr): New.
28849 (__ARM_mve_coerce_u16_ptr): New.
28850 (__ARM_mve_coerce_s32_ptr): New.
28851 (__ARM_mve_coerce_u32_ptr): New.
28852 (__ARM_mve_coerce_s64_ptr): New.
28853 (__ARM_mve_coerce_u64_ptr): New.
28854 (__ARM_mve_coerce_f_scalar): New.
28855 (__ARM_mve_coerce_f16_ptr): New.
28856 (__ARM_mve_coerce_f32_ptr): New.
28857 (__arm_vst4q): Change _coerce_ overloads.
28858 (__arm_vbicq): Change _coerce_ overloads.
28859 (__arm_vld1q): Change _coerce_ overloads.
28860 (__arm_vld1q_z): Change _coerce_ overloads.
28861 (__arm_vld2q): Change _coerce_ overloads.
28862 (__arm_vld4q): Change _coerce_ overloads.
28863 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
28864 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
28865 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
28866 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
28867 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
28868 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
28869 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
28870 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
28871 (__arm_vst1q_p): Change _coerce_ overloads.
28872 (__arm_vst2q): Change _coerce_ overloads.
28873 (__arm_vst1q): Change _coerce_ overloads.
28874 (__arm_vstrhq): Change _coerce_ overloads.
28875 (__arm_vstrhq_p): Change _coerce_ overloads.
28876 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
28877 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
28878 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
28879 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
28880 (__arm_vstrwq_p): Change _coerce_ overloads.
28881 (__arm_vstrwq): Change _coerce_ overloads.
28882 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
28883 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
28884 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
28885 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
28886 (__arm_vsetq_lane): Change _coerce_ overloads.
28887 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
28888 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
28889 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
28890 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
28891 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
28892 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
28893 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
28894 (__arm_vidupq_x_u8): Change _coerce_ overloads.
28895 (__arm_vddupq_x_u8): Change _coerce_ overloads.
28896 (__arm_vidupq_x_u16): Change _coerce_ overloads.
28897 (__arm_vddupq_x_u16): Change _coerce_ overloads.
28898 (__arm_vidupq_x_u32): Change _coerce_ overloads.
28899 (__arm_vddupq_x_u32): Change _coerce_ overloads.
28900 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
28901 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
28902 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
28903 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
28904 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
28905 (__arm_vidupq_u16): Change _coerce_ overloads.
28906 (__arm_vidupq_u32): Change _coerce_ overloads.
28907 (__arm_vidupq_u8): Change _coerce_ overloads.
28908 (__arm_vddupq_u16): Change _coerce_ overloads.
28909 (__arm_vddupq_u32): Change _coerce_ overloads.
28910 (__arm_vddupq_u8): Change _coerce_ overloads.
28911 (__arm_viwdupq_m): Change _coerce_ overloads.
28912 (__arm_viwdupq_u16): Change _coerce_ overloads.
28913 (__arm_viwdupq_u32): Change _coerce_ overloads.
28914 (__arm_viwdupq_u8): Change _coerce_ overloads.
28915 (__arm_vdwdupq_m): Change _coerce_ overloads.
28916 (__arm_vdwdupq_u16): Change _coerce_ overloads.
28917 (__arm_vdwdupq_u32): Change _coerce_ overloads.
28918 (__arm_vdwdupq_u8): Change _coerce_ overloads.
28919 (__arm_vstrbq): Change _coerce_ overloads.
28920 (__arm_vstrbq_p): Change _coerce_ overloads.
28921 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
28922 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
28923 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
28924 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
28925 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
28927 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
28929 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
28932 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
28934 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
28935 (__arm_vadcq_u32): Likewise.
28936 (__arm_vadcq_m_s32): Likewise.
28937 (__arm_vadcq_m_u32): Likewise.
28938 (__arm_vsbcq_s32): Likewise.
28939 (__arm_vsbcq_u32): Likewise.
28940 (__arm_vsbcq_m_s32): Likewise.
28941 (__arm_vsbcq_m_u32): Likewise.
28942 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
28944 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
28946 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
28947 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
28948 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
28949 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
28950 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
28951 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
28952 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
28953 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
28954 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
28955 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
28956 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
28957 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
28958 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
28959 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
28960 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
28961 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
28962 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
28963 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
28964 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
28965 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
28966 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
28967 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
28968 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
28969 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
28970 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
28971 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
28972 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
28973 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
28974 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
28975 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
28976 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
28977 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
28978 (mve_vorrq_m_f<mode>)
28979 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
28980 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
28981 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
28982 capitalization in the emitted asm.
28984 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
28986 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
28988 (Ri): Move constraint definition from predicates.md.
28989 (Rl): Define new constraint.
28990 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
28991 missing constraint.
28992 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
28993 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
28994 op 2. Fix asm output spacing.
28995 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
28996 * config/arm/predicates.md (Ri) Move constraint to constraints.md
28997 (mve_vldrd_immediate): Move it from
28999 (mve_vstrw_immediate): New predicate.
29001 2023-05-18 Pan Li <pan2.li@intel.com>
29002 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29003 Kito Cheng <kito.cheng@sifive.com>
29004 Richard Biener <rguenther@suse.de>
29005 Richard Sandiford <richard.sandiford@arm.com>
29007 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
29008 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
29009 (struct table_elt): Extend machine_mode to 16 bits.
29010 (struct set): Ditto.
29011 * genmodes.cc (emit_mode_wider): Extend type from char to short.
29012 (emit_mode_complex): Ditto.
29013 (emit_mode_inner): Ditto.
29014 (emit_class_narrowest_mode): Ditto.
29015 * genopinit.cc (main): Extend the machine_mode limit.
29016 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
29017 re-ordered the struct fields for padding.
29018 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
29019 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
29020 (get_mode_alignment): Extend type from char to short.
29021 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
29022 removed the ATTRIBUTE_PACKED.
29023 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
29024 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
29025 m_kind to 2 bits and remove m_spare.
29026 * rtl.h (RTX_CODE_BITSIZE): New macro.
29027 (struct rtx_def): Swap both the bit size and location between the
29028 rtx_code and the machine_mode.
29029 (subreg_shape::unique_id): Extend the machine_mode limit.
29030 * rtlanal.h: Extend machine_mode to 16 bits.
29031 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
29032 bits and re-ordered the struct fields for padding.
29033 (struct tree_decl_common): Extend machine_mode to 16 bits.
29035 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
29037 * genrecog.cc (print_nonbool_test): Fix type error of
29038 switch (SUBREG_BYTE (op))'.
29040 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
29042 * common/config/riscv/riscv-common.cc: Remove
29043 trailing spaces on lines.
29044 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
29045 * config/riscv/riscv.h (enum reg_class): Likewise.
29046 * config/riscv/riscv.md: Likewise.
29048 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
29050 * config/pa/pa.md (clear_cache): New.
29052 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
29054 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
29055 parenthesis. Fix misnamed index entry.
29056 <concept>: Fix misnamed index entry.
29058 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
29060 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
29062 (*<optab>si3_mask, *<optab>di3_mask): Here.
29063 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
29064 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
29066 (*<bitmanip_optab>si3_sext_mask): Likewise.
29067 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
29068 and const_di_mask_operand.
29069 (bitmanip_rotate): New iterator.
29070 (bitmanip_optab): Add rotates.
29071 * config/riscv/predicates.md (const_si_mask_operand): Renamed
29072 from const31_operand. Generalize to handle more mask constants.
29073 (const_di_mask_operand): Similarly.
29075 2023-05-17 Jakub Jelinek <jakub@redhat.com>
29078 * config/i386/i386-builtin-types.def (FLOAT128): Use
29079 float128t_type_node rather than float128_type_node.
29081 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
29083 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
29084 FP_CONTRACT_FAST (no functional change).
29086 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
29088 * config/i386/i386.cc (ix86_multiplication_cost): Correct
29089 calcuation of integer vector mode costs to reflect generated
29090 instruction sequences of different integer vector modes and
29091 different target ABIs.
29093 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29095 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
29096 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
29097 (riscv_mode_needed): Ditto.
29098 (riscv_mode_after): Ditto.
29099 (riscv_mode_entry): Ditto.
29100 (riscv_mode_exit): Ditto.
29101 (riscv_mode_priority): Ditto.
29102 (TARGET_MODE_EMIT): New target hook.
29103 (TARGET_MODE_NEEDED): Ditto.
29104 (TARGET_MODE_AFTER): Ditto.
29105 (TARGET_MODE_ENTRY): Ditto.
29106 (TARGET_MODE_EXIT): Ditto.
29107 (TARGET_MODE_PRIORITY): Ditto.
29108 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
29109 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
29110 * config/riscv/riscv.md: Add csrwvxrm.
29111 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
29112 (vxrmsi): New pattern.
29114 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29116 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
29117 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
29118 (struct narrow_alu_def): Ditto.
29119 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
29120 (function_expander::use_exact_insn): Ditto.
29121 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
29122 (function_base::has_rounding_mode_operand_p): New function.
29124 2023-05-17 Andrew Pinski <apinski@marvell.com>
29126 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
29127 against 0 instead of calling integer_zerop.
29129 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29131 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
29132 (DEF_RVV_VXRM_ENUM): New macro.
29133 (handle_pragma_vector): Add vxrm enum register.
29134 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
29140 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
29142 * value-range.h (Value_Range::operator=): New.
29144 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
29146 * value-range.cc (vrange::operator=): Add a stub to copy
29147 unsupported ranges.
29148 * value-range.h (is_a <unsupported_range>): New.
29149 (Value_Range::operator=): Support copying unsupported ranges.
29151 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
29153 * data-streamer-in.cc (streamer_read_real_value): New.
29154 (streamer_read_value_range): New.
29155 * data-streamer-out.cc (streamer_write_real_value): New.
29156 (streamer_write_vrange): New.
29157 * data-streamer.h (streamer_write_vrange): New.
29158 (streamer_read_value_range): New.
29160 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
29163 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
29164 is ignored for a fixed underlying type.
29165 (C++ Dialect Options): Likewise for -fstrict-enums.
29167 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
29169 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
29172 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29174 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
29176 (s390_atomic_align_for_mode): New.
29178 2023-05-17 Jakub Jelinek <jakub@redhat.com>
29180 * wide-int.cc (wi::from_array): Add missing closing paren in function
29183 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
29185 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
29186 suggested unroll factor once the previous analysis fails.
29188 2023-05-17 Pan Li <pan2.li@intel.com>
29190 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
29192 (main): Add bool1 to the type indexer.
29193 * config/riscv/riscv-vector-builtins-functions.def
29194 (vreinterpret): Register vbool1 interpret function.
29195 * config/riscv/riscv-vector-builtins-types.def
29196 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
29197 (vint8m1_t): Add the type to bool1_interpret_ops.
29198 (vint16m1_t): Ditto.
29199 (vint32m1_t): Ditto.
29200 (vint64m1_t): Ditto.
29201 (vuint8m1_t): Ditto.
29202 (vuint16m1_t): Ditto.
29203 (vuint32m1_t): Ditto.
29204 (vuint64m1_t): Ditto.
29205 * config/riscv/riscv-vector-builtins.cc
29206 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
29207 (required_extensions_p): Add bool1 interpret case.
29208 * config/riscv/riscv-vector-builtins.def
29209 (bool1_interpret): Add bool1 interpret to base type.
29210 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
29211 with VB dest for vreinterpret.
29213 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
29216 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
29217 constants through "lis; xoris".
29219 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
29221 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
29222 default rs6000 target pass for O2 and above.
29223 * doc/invoke.texi: Document -free
29225 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
29227 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
29228 Fix wrong select_kind...
29230 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29232 * config/s390/s390-protos.h (s390_expand_setmem): Change
29233 function signature.
29234 * config/s390/s390.cc (s390_expand_setmem): For memset's less
29235 than or equal to 256 byte do not perform a libc call.
29236 * config/s390/s390.md: Change expander into a version which
29239 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29241 * config/s390/s390-protos.h (s390_expand_movmem): New.
29242 * config/s390/s390.cc (s390_expand_movmem): New.
29243 * config/s390/s390.md (movmem<mode>): New.
29247 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
29249 * config/s390/s390-protos.h (s390_expand_cpymem): Change
29250 function signature.
29251 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
29252 than or equal to 256 byte do not perform a libc call.
29253 (s390_expand_insv): Adapt new function signature of
29254 s390_expand_cpymem.
29255 * config/s390/s390.md: Change expander into a version which
29258 2023-05-16 Andrew Pinski <apinski@marvell.com>
29260 PR tree-optimization/109424
29261 * match.pd: Add patterns for min/max of zero_one_valued
29264 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29266 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
29267 * config/riscv/riscv-vector-builtins.cc
29268 (function_expander::use_ternop_insn): Add default rounding mode.
29269 (function_expander::use_widen_ternop_insn): Ditto.
29270 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
29271 (riscv_hard_regno_mode_ok): Ditto.
29272 (riscv_conditional_register_usage): Ditto.
29273 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
29274 (FRM_REG_P): Ditto.
29275 (RISCV_DWARF_FRM): Ditto.
29276 * config/riscv/riscv.md: Ditto.
29277 * config/riscv/vector-iterators.md: split no frm and has frm operations.
29278 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
29279 (@pred_<optab><mode>): Ditto.
29281 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
29283 PR tree-optimization/109695
29284 * value-range.cc (irange::operator=): Resize range.
29285 (irange::union_): Same.
29286 (irange::intersect): Same.
29287 (irange::invert): Same.
29288 (int_range_max): Default to 3 sub-ranges and resize as needed.
29289 * value-range.h (irange::maybe_resize): New.
29291 (int_range::int_range): Adjust for resizing.
29292 (int_range::operator=): Same.
29294 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
29296 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
29298 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
29299 when range changed.
29301 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29303 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
29304 * config/riscv/riscv-vector-builtins.cc
29305 (function_expander::use_exact_insn): Add default rounding mode operand.
29306 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
29307 (riscv_hard_regno_mode_ok): Ditto.
29308 (riscv_conditional_register_usage): Ditto.
29309 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
29310 (VXRM_REG_P): Ditto.
29311 (RISCV_DWARF_VXRM): Ditto.
29312 * config/riscv/riscv.md: Ditto.
29313 * config/riscv/vector.md: Ditto
29315 2023-05-15 Pan Li <pan2.li@intel.com>
29317 * optabs.cc (maybe_gen_insn): Add case to generate instruction
29318 that has 11 operands.
29320 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29322 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
29323 logic for vector modes.
29325 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29328 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
29329 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
29330 (aarch64_cmtst<mode>): Rename to...
29331 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
29332 (*aarch64_cmtst_same_<mode>): Rename to...
29333 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
29334 (*aarch64_cmtstdi): Rename to...
29335 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
29336 (aarch64_fac<optab><mode>): Rename to...
29337 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
29339 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29342 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
29343 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
29345 2023-05-15 Pan Li <pan2.li@intel.com>
29346 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29347 kito-cheng <kito.cheng@sifive.com>
29349 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
29350 deciding the mode is constant or not.
29351 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
29353 2023-05-15 Richard Biener <rguenther@suse.de>
29355 PR tree-optimization/109848
29356 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
29357 TARGET_MEM_REF address preparation before the store, not
29360 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29362 * config/riscv/riscv.cc
29363 (riscv_vectorize_preferred_vector_alignment): New function.
29364 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
29366 2023-05-14 Andrew Pinski <apinski@marvell.com>
29368 PR tree-optimization/109829
29369 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
29371 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
29374 * config/i386/i386.cc: Revert the 2023-05-11 change.
29375 (ix86_widen_mult_cost): Return high value instead of
29376 ICEing for unsupported modes.
29378 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
29380 * config/i386/i386.cc (x86_function_profiler): Take
29381 ix86_direct_extern_access into account when generating calls
29384 2023-05-14 Pan Li <pan2.li@intel.com>
29386 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
29387 Refactor the or pattern to switch cases.
29389 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29391 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
29392 aarch64_expand_vector_init to this, and remove interleaving case.
29393 Recursively call aarch64_expand_vector_init_fallback, instead of
29394 aarch64_expand_vector_init.
29395 (aarch64_unzip_vector_init): New function.
29396 (aarch64_expand_vector_init): Likewise.
29398 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
29400 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
29401 Pull out function call from the gcc_assert.
29403 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
29405 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
29406 (policy_to_str): New.
29407 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
29409 2023-05-13 Andrew Pinski <apinski@marvell.com>
29411 PR tree-optimization/109834
29412 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
29413 (popcount(rotate(x,y))->popcount(x)): Likewise.
29415 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
29417 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
29418 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
29419 gen_extend_insn to generate zero/sign extension instructions.
29421 (ix86_expand_vecop_qihi): Initialize interleave functions
29422 for MULT code only. Fix comments.
29424 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
29427 * config/i386/mmx.md (mulv2si3): Remove expander.
29428 (mulv2si3): Rename insn pattern from *mulv2si.
29430 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
29432 PR libstdc++/109816
29433 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
29434 '!lto_stream_offload_p'.
29436 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
29437 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29440 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
29441 (local_avl_compatible_p): New.
29442 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
29443 for LCM, rewrite as a backward algorithm.
29444 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
29445 interface, handle a BB at once.
29447 2023-05-12 Richard Biener <rguenther@suse.de>
29449 PR tree-optimization/64731
29450 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
29451 handle TARGET_MEM_REF destinations of stores from vector
29454 2023-05-12 Richard Biener <rguenther@suse.de>
29456 PR tree-optimization/109791
29457 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
29459 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
29462 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29464 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
29465 * config/arm/arm-mve-builtins-base.def (vsriq): New.
29466 * config/arm/arm-mve-builtins-base.h (vsriq): New.
29467 * config/arm/arm-mve-builtins.cc
29468 (function_instance::has_inactive_argument): Handle vsriq.
29469 * config/arm/arm_mve.h (vsriq): Remove.
29471 (vsriq_n_u8): Remove.
29472 (vsriq_n_s8): Remove.
29473 (vsriq_n_u16): Remove.
29474 (vsriq_n_s16): Remove.
29475 (vsriq_n_u32): Remove.
29476 (vsriq_n_s32): Remove.
29477 (vsriq_m_n_s8): Remove.
29478 (vsriq_m_n_u8): Remove.
29479 (vsriq_m_n_s16): Remove.
29480 (vsriq_m_n_u16): Remove.
29481 (vsriq_m_n_s32): Remove.
29482 (vsriq_m_n_u32): Remove.
29483 (__arm_vsriq_n_u8): Remove.
29484 (__arm_vsriq_n_s8): Remove.
29485 (__arm_vsriq_n_u16): Remove.
29486 (__arm_vsriq_n_s16): Remove.
29487 (__arm_vsriq_n_u32): Remove.
29488 (__arm_vsriq_n_s32): Remove.
29489 (__arm_vsriq_m_n_s8): Remove.
29490 (__arm_vsriq_m_n_u8): Remove.
29491 (__arm_vsriq_m_n_s16): Remove.
29492 (__arm_vsriq_m_n_u16): Remove.
29493 (__arm_vsriq_m_n_s32): Remove.
29494 (__arm_vsriq_m_n_u32): Remove.
29495 (__arm_vsriq): Remove.
29496 (__arm_vsriq_m): Remove.
29498 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29500 * config/arm/iterators.md (mve_insn): Add vsri.
29501 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
29502 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
29503 (mve_vsriq_m_n_<supf><mode>): Rename into ...
29504 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29506 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29508 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
29509 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
29511 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29513 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
29514 * config/arm/arm-mve-builtins-base.def (vsliq): New.
29515 * config/arm/arm-mve-builtins-base.h (vsliq): New.
29516 * config/arm/arm-mve-builtins.cc
29517 (function_instance::has_inactive_argument): Handle vsliq.
29518 * config/arm/arm_mve.h (vsliq): Remove.
29520 (vsliq_n_u8): Remove.
29521 (vsliq_n_s8): Remove.
29522 (vsliq_n_u16): Remove.
29523 (vsliq_n_s16): Remove.
29524 (vsliq_n_u32): Remove.
29525 (vsliq_n_s32): Remove.
29526 (vsliq_m_n_s8): Remove.
29527 (vsliq_m_n_s32): Remove.
29528 (vsliq_m_n_s16): Remove.
29529 (vsliq_m_n_u8): Remove.
29530 (vsliq_m_n_u32): Remove.
29531 (vsliq_m_n_u16): Remove.
29532 (__arm_vsliq_n_u8): Remove.
29533 (__arm_vsliq_n_s8): Remove.
29534 (__arm_vsliq_n_u16): Remove.
29535 (__arm_vsliq_n_s16): Remove.
29536 (__arm_vsliq_n_u32): Remove.
29537 (__arm_vsliq_n_s32): Remove.
29538 (__arm_vsliq_m_n_s8): Remove.
29539 (__arm_vsliq_m_n_s32): Remove.
29540 (__arm_vsliq_m_n_s16): Remove.
29541 (__arm_vsliq_m_n_u8): Remove.
29542 (__arm_vsliq_m_n_u32): Remove.
29543 (__arm_vsliq_m_n_u16): Remove.
29544 (__arm_vsliq): Remove.
29545 (__arm_vsliq_m): Remove.
29547 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29549 * config/arm/iterators.md (mve_insn>): Add vsli.
29550 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
29551 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29552 (mve_vsliq_m_n_<supf><mode>): Rename into ...
29553 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29555 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29557 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
29558 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
29560 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29562 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
29563 * config/arm/arm-mve-builtins-base.def (vpselq): New.
29564 * config/arm/arm-mve-builtins-base.h (vpselq): New.
29565 * config/arm/arm_mve.h (vpselq): Remove.
29566 (vpselq_u8): Remove.
29567 (vpselq_s8): Remove.
29568 (vpselq_u16): Remove.
29569 (vpselq_s16): Remove.
29570 (vpselq_u32): Remove.
29571 (vpselq_s32): Remove.
29572 (vpselq_u64): Remove.
29573 (vpselq_s64): Remove.
29574 (vpselq_f16): Remove.
29575 (vpselq_f32): Remove.
29576 (__arm_vpselq_u8): Remove.
29577 (__arm_vpselq_s8): Remove.
29578 (__arm_vpselq_u16): Remove.
29579 (__arm_vpselq_s16): Remove.
29580 (__arm_vpselq_u32): Remove.
29581 (__arm_vpselq_s32): Remove.
29582 (__arm_vpselq_u64): Remove.
29583 (__arm_vpselq_s64): Remove.
29584 (__arm_vpselq_f16): Remove.
29585 (__arm_vpselq_f32): Remove.
29586 (__arm_vpselq): Remove.
29588 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29590 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
29591 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
29593 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29595 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
29597 * config/arm/iterators.md (MVE_VPSELQ_F): New.
29598 (mve_insn): Add vpsel.
29599 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
29600 (@mve_<mve_insn>q_<supf><mode>): ... this.
29601 (@mve_vpselq_f<mode>): Rename into ...
29602 (@mve_<mve_insn>q_f<mode>): ... this.
29604 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29606 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
29607 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
29608 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
29609 * config/arm/arm-mve-builtins.cc
29610 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
29612 * config/arm/arm_mve.h (vfmaq): Remove.
29616 (vfmasq_m): Remove.
29618 (vfmaq_f16): Remove.
29619 (vfmaq_n_f16): Remove.
29620 (vfmasq_n_f16): Remove.
29621 (vfmsq_f16): Remove.
29622 (vfmaq_f32): Remove.
29623 (vfmaq_n_f32): Remove.
29624 (vfmasq_n_f32): Remove.
29625 (vfmsq_f32): Remove.
29626 (vfmaq_m_f32): Remove.
29627 (vfmaq_m_f16): Remove.
29628 (vfmaq_m_n_f32): Remove.
29629 (vfmaq_m_n_f16): Remove.
29630 (vfmasq_m_n_f32): Remove.
29631 (vfmasq_m_n_f16): Remove.
29632 (vfmsq_m_f32): Remove.
29633 (vfmsq_m_f16): Remove.
29634 (__arm_vfmaq_f16): Remove.
29635 (__arm_vfmaq_n_f16): Remove.
29636 (__arm_vfmasq_n_f16): Remove.
29637 (__arm_vfmsq_f16): Remove.
29638 (__arm_vfmaq_f32): Remove.
29639 (__arm_vfmaq_n_f32): Remove.
29640 (__arm_vfmasq_n_f32): Remove.
29641 (__arm_vfmsq_f32): Remove.
29642 (__arm_vfmaq_m_f32): Remove.
29643 (__arm_vfmaq_m_f16): Remove.
29644 (__arm_vfmaq_m_n_f32): Remove.
29645 (__arm_vfmaq_m_n_f16): Remove.
29646 (__arm_vfmasq_m_n_f32): Remove.
29647 (__arm_vfmasq_m_n_f16): Remove.
29648 (__arm_vfmsq_m_f32): Remove.
29649 (__arm_vfmsq_m_f16): Remove.
29650 (__arm_vfmaq): Remove.
29651 (__arm_vfmasq): Remove.
29652 (__arm_vfmsq): Remove.
29653 (__arm_vfmaq_m): Remove.
29654 (__arm_vfmasq_m): Remove.
29655 (__arm_vfmsq_m): Remove.
29657 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29659 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
29661 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
29662 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
29663 (mve_insn): Add vfma, vfmas, vfms.
29664 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
29666 (@mve_<mve_insn>q_f<mode>): ... this.
29667 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
29668 (@mve_<mve_insn>q_n_f<mode>): ... this.
29669 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
29670 @mve_<mve_insn>q_m_f<mode>.
29671 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
29672 @mve_<mve_insn>q_m_n_f<mode>.
29674 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29676 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
29677 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
29679 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29681 * config/arm/arm-mve-builtins-base.cc
29682 (FUNCTION_WITH_RTX_M_N_NO_F): New.
29684 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
29685 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
29686 * config/arm/arm_mve.h (vmvnq): Remove.
29689 (vmvnq_s8): Remove.
29690 (vmvnq_s16): Remove.
29691 (vmvnq_s32): Remove.
29692 (vmvnq_n_s16): Remove.
29693 (vmvnq_n_s32): Remove.
29694 (vmvnq_u8): Remove.
29695 (vmvnq_u16): Remove.
29696 (vmvnq_u32): Remove.
29697 (vmvnq_n_u16): Remove.
29698 (vmvnq_n_u32): Remove.
29699 (vmvnq_m_u8): Remove.
29700 (vmvnq_m_s8): Remove.
29701 (vmvnq_m_u16): Remove.
29702 (vmvnq_m_s16): Remove.
29703 (vmvnq_m_u32): Remove.
29704 (vmvnq_m_s32): Remove.
29705 (vmvnq_m_n_s16): Remove.
29706 (vmvnq_m_n_u16): Remove.
29707 (vmvnq_m_n_s32): Remove.
29708 (vmvnq_m_n_u32): Remove.
29709 (vmvnq_x_s8): Remove.
29710 (vmvnq_x_s16): Remove.
29711 (vmvnq_x_s32): Remove.
29712 (vmvnq_x_u8): Remove.
29713 (vmvnq_x_u16): Remove.
29714 (vmvnq_x_u32): Remove.
29715 (vmvnq_x_n_s16): Remove.
29716 (vmvnq_x_n_s32): Remove.
29717 (vmvnq_x_n_u16): Remove.
29718 (vmvnq_x_n_u32): Remove.
29719 (__arm_vmvnq_s8): Remove.
29720 (__arm_vmvnq_s16): Remove.
29721 (__arm_vmvnq_s32): Remove.
29722 (__arm_vmvnq_n_s16): Remove.
29723 (__arm_vmvnq_n_s32): Remove.
29724 (__arm_vmvnq_u8): Remove.
29725 (__arm_vmvnq_u16): Remove.
29726 (__arm_vmvnq_u32): Remove.
29727 (__arm_vmvnq_n_u16): Remove.
29728 (__arm_vmvnq_n_u32): Remove.
29729 (__arm_vmvnq_m_u8): Remove.
29730 (__arm_vmvnq_m_s8): Remove.
29731 (__arm_vmvnq_m_u16): Remove.
29732 (__arm_vmvnq_m_s16): Remove.
29733 (__arm_vmvnq_m_u32): Remove.
29734 (__arm_vmvnq_m_s32): Remove.
29735 (__arm_vmvnq_m_n_s16): Remove.
29736 (__arm_vmvnq_m_n_u16): Remove.
29737 (__arm_vmvnq_m_n_s32): Remove.
29738 (__arm_vmvnq_m_n_u32): Remove.
29739 (__arm_vmvnq_x_s8): Remove.
29740 (__arm_vmvnq_x_s16): Remove.
29741 (__arm_vmvnq_x_s32): Remove.
29742 (__arm_vmvnq_x_u8): Remove.
29743 (__arm_vmvnq_x_u16): Remove.
29744 (__arm_vmvnq_x_u32): Remove.
29745 (__arm_vmvnq_x_n_s16): Remove.
29746 (__arm_vmvnq_x_n_s32): Remove.
29747 (__arm_vmvnq_x_n_u16): Remove.
29748 (__arm_vmvnq_x_n_u32): Remove.
29749 (__arm_vmvnq): Remove.
29750 (__arm_vmvnq_m): Remove.
29751 (__arm_vmvnq_x): Remove.
29753 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29755 * config/arm/iterators.md (mve_insn): Add vmvn.
29756 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
29757 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29758 (mve_vmvnq_m_<supf><mode>): Rename into ...
29759 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
29760 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
29761 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29763 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29765 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
29766 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
29768 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29770 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
29771 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
29772 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
29773 * config/arm/arm_mve.h (vbrsrq): Remove.
29774 (vbrsrq_m): Remove.
29775 (vbrsrq_x): Remove.
29776 (vbrsrq_n_f16): Remove.
29777 (vbrsrq_n_f32): Remove.
29778 (vbrsrq_n_u8): Remove.
29779 (vbrsrq_n_s8): Remove.
29780 (vbrsrq_n_u16): Remove.
29781 (vbrsrq_n_s16): Remove.
29782 (vbrsrq_n_u32): Remove.
29783 (vbrsrq_n_s32): Remove.
29784 (vbrsrq_m_n_s8): Remove.
29785 (vbrsrq_m_n_s32): Remove.
29786 (vbrsrq_m_n_s16): Remove.
29787 (vbrsrq_m_n_u8): Remove.
29788 (vbrsrq_m_n_u32): Remove.
29789 (vbrsrq_m_n_u16): Remove.
29790 (vbrsrq_m_n_f32): Remove.
29791 (vbrsrq_m_n_f16): Remove.
29792 (vbrsrq_x_n_s8): Remove.
29793 (vbrsrq_x_n_s16): Remove.
29794 (vbrsrq_x_n_s32): Remove.
29795 (vbrsrq_x_n_u8): Remove.
29796 (vbrsrq_x_n_u16): Remove.
29797 (vbrsrq_x_n_u32): Remove.
29798 (vbrsrq_x_n_f16): Remove.
29799 (vbrsrq_x_n_f32): Remove.
29800 (__arm_vbrsrq_n_u8): Remove.
29801 (__arm_vbrsrq_n_s8): Remove.
29802 (__arm_vbrsrq_n_u16): Remove.
29803 (__arm_vbrsrq_n_s16): Remove.
29804 (__arm_vbrsrq_n_u32): Remove.
29805 (__arm_vbrsrq_n_s32): Remove.
29806 (__arm_vbrsrq_m_n_s8): Remove.
29807 (__arm_vbrsrq_m_n_s32): Remove.
29808 (__arm_vbrsrq_m_n_s16): Remove.
29809 (__arm_vbrsrq_m_n_u8): Remove.
29810 (__arm_vbrsrq_m_n_u32): Remove.
29811 (__arm_vbrsrq_m_n_u16): Remove.
29812 (__arm_vbrsrq_x_n_s8): Remove.
29813 (__arm_vbrsrq_x_n_s16): Remove.
29814 (__arm_vbrsrq_x_n_s32): Remove.
29815 (__arm_vbrsrq_x_n_u8): Remove.
29816 (__arm_vbrsrq_x_n_u16): Remove.
29817 (__arm_vbrsrq_x_n_u32): Remove.
29818 (__arm_vbrsrq_n_f16): Remove.
29819 (__arm_vbrsrq_n_f32): Remove.
29820 (__arm_vbrsrq_m_n_f32): Remove.
29821 (__arm_vbrsrq_m_n_f16): Remove.
29822 (__arm_vbrsrq_x_n_f16): Remove.
29823 (__arm_vbrsrq_x_n_f32): Remove.
29824 (__arm_vbrsrq): Remove.
29825 (__arm_vbrsrq_m): Remove.
29826 (__arm_vbrsrq_x): Remove.
29828 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29830 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
29831 (mve_insn): Add vbrsr.
29832 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
29833 (@mve_<mve_insn>q_n_f<mode>): ... this.
29834 (mve_vbrsrq_n_<supf><mode>): Rename into ...
29835 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29836 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
29837 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29838 (mve_vbrsrq_m_n_f<mode>): Rename into ...
29839 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
29841 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29843 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
29844 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
29846 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29848 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
29849 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
29850 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
29851 * config/arm/arm_mve.h (vqshluq): Remove.
29852 (vqshluq_m): Remove.
29853 (vqshluq_n_s8): Remove.
29854 (vqshluq_n_s16): Remove.
29855 (vqshluq_n_s32): Remove.
29856 (vqshluq_m_n_s8): Remove.
29857 (vqshluq_m_n_s16): Remove.
29858 (vqshluq_m_n_s32): Remove.
29859 (__arm_vqshluq_n_s8): Remove.
29860 (__arm_vqshluq_n_s16): Remove.
29861 (__arm_vqshluq_n_s32): Remove.
29862 (__arm_vqshluq_m_n_s8): Remove.
29863 (__arm_vqshluq_m_n_s16): Remove.
29864 (__arm_vqshluq_m_n_s32): Remove.
29865 (__arm_vqshluq): Remove.
29866 (__arm_vqshluq_m): Remove.
29868 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29870 * config/arm/iterators.md (mve_insn): Add vqshlu.
29871 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
29872 (VQSHLUQ_M_N, VQSHLUQ_N): New.
29873 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
29874 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29875 (mve_vqshluq_m_n_s<mode>): Change name into ...
29876 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29878 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29880 * config/arm/arm-mve-builtins-shapes.cc
29881 (binary_lshift_unsigned): New.
29882 * config/arm/arm-mve-builtins-shapes.h
29883 (binary_lshift_unsigned): New.
29885 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29887 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
29888 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
29889 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
29890 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
29891 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
29892 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
29893 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
29894 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
29895 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
29896 (vrmlaldavhaxq): Remove.
29897 (vrmlsldavhaq): Remove.
29898 (vrmlsldavhaxq): Remove.
29899 (vrmlaldavhaq_p): Remove.
29900 (vrmlaldavhaxq_p): Remove.
29901 (vrmlsldavhaq_p): Remove.
29902 (vrmlsldavhaxq_p): Remove.
29903 (vrmlaldavhaq_s32): Remove.
29904 (vrmlaldavhaq_u32): Remove.
29905 (vrmlaldavhaxq_s32): Remove.
29906 (vrmlsldavhaq_s32): Remove.
29907 (vrmlsldavhaxq_s32): Remove.
29908 (vrmlaldavhaq_p_s32): Remove.
29909 (vrmlaldavhaq_p_u32): Remove.
29910 (vrmlaldavhaxq_p_s32): Remove.
29911 (vrmlsldavhaq_p_s32): Remove.
29912 (vrmlsldavhaxq_p_s32): Remove.
29913 (__arm_vrmlaldavhaq_s32): Remove.
29914 (__arm_vrmlaldavhaq_u32): Remove.
29915 (__arm_vrmlaldavhaxq_s32): Remove.
29916 (__arm_vrmlsldavhaq_s32): Remove.
29917 (__arm_vrmlsldavhaxq_s32): Remove.
29918 (__arm_vrmlaldavhaq_p_s32): Remove.
29919 (__arm_vrmlaldavhaq_p_u32): Remove.
29920 (__arm_vrmlaldavhaxq_p_s32): Remove.
29921 (__arm_vrmlsldavhaq_p_s32): Remove.
29922 (__arm_vrmlsldavhaxq_p_s32): Remove.
29923 (__arm_vrmlaldavhaq): Remove.
29924 (__arm_vrmlaldavhaxq): Remove.
29925 (__arm_vrmlsldavhaq): Remove.
29926 (__arm_vrmlsldavhaxq): Remove.
29927 (__arm_vrmlaldavhaq_p): Remove.
29928 (__arm_vrmlaldavhaxq_p): Remove.
29929 (__arm_vrmlsldavhaq_p): Remove.
29930 (__arm_vrmlsldavhaxq_p): Remove.
29932 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29934 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
29935 (MVE_VRMLxLDAVHAxQ_P): New.
29936 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
29938 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
29939 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
29941 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
29942 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
29943 (mve_vrmlsldavhaq_sv4si): Merge into ...
29944 (@mve_<mve_insn>q_<supf>v4si): ... this.
29945 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
29946 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
29947 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
29948 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
29950 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29952 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
29953 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
29955 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
29956 * config/arm/arm_mve.h (vqdmulltq): Remove.
29957 (vqdmullbq): Remove.
29958 (vqdmullbq_m): Remove.
29959 (vqdmulltq_m): Remove.
29960 (vqdmulltq_s16): Remove.
29961 (vqdmulltq_n_s16): Remove.
29962 (vqdmullbq_s16): Remove.
29963 (vqdmullbq_n_s16): Remove.
29964 (vqdmulltq_s32): Remove.
29965 (vqdmulltq_n_s32): Remove.
29966 (vqdmullbq_s32): Remove.
29967 (vqdmullbq_n_s32): Remove.
29968 (vqdmullbq_m_n_s32): Remove.
29969 (vqdmullbq_m_n_s16): Remove.
29970 (vqdmullbq_m_s32): Remove.
29971 (vqdmullbq_m_s16): Remove.
29972 (vqdmulltq_m_n_s32): Remove.
29973 (vqdmulltq_m_n_s16): Remove.
29974 (vqdmulltq_m_s32): Remove.
29975 (vqdmulltq_m_s16): Remove.
29976 (__arm_vqdmulltq_s16): Remove.
29977 (__arm_vqdmulltq_n_s16): Remove.
29978 (__arm_vqdmullbq_s16): Remove.
29979 (__arm_vqdmullbq_n_s16): Remove.
29980 (__arm_vqdmulltq_s32): Remove.
29981 (__arm_vqdmulltq_n_s32): Remove.
29982 (__arm_vqdmullbq_s32): Remove.
29983 (__arm_vqdmullbq_n_s32): Remove.
29984 (__arm_vqdmullbq_m_n_s32): Remove.
29985 (__arm_vqdmullbq_m_n_s16): Remove.
29986 (__arm_vqdmullbq_m_s32): Remove.
29987 (__arm_vqdmullbq_m_s16): Remove.
29988 (__arm_vqdmulltq_m_n_s32): Remove.
29989 (__arm_vqdmulltq_m_n_s16): Remove.
29990 (__arm_vqdmulltq_m_s32): Remove.
29991 (__arm_vqdmulltq_m_s16): Remove.
29992 (__arm_vqdmulltq): Remove.
29993 (__arm_vqdmullbq): Remove.
29994 (__arm_vqdmullbq_m): Remove.
29995 (__arm_vqdmulltq_m): Remove.
29997 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
29999 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
30000 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
30001 (mve_insn): Add vqdmullb, vqdmullt.
30002 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
30003 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
30005 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
30006 (mve_vqdmulltq_n_s<mode>): Merge into ...
30007 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30008 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
30009 (@mve_<mve_insn>q_<supf><mode>): ... this.
30010 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
30012 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30013 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
30014 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
30016 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
30018 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
30019 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
30021 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
30023 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
30024 Drop unused parameter.
30025 (riscv_select_multilib): Ditto.
30026 (riscv_compute_multilib): Update call site of
30027 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
30029 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
30031 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
30032 * config/riscv/riscv-protos.h (expand_vec_init): New function.
30033 * config/riscv/riscv-v.cc (class rvv_builder): New class.
30034 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
30035 (rvv_builder::get_merged_repeating_sequence): Ditto.
30036 (expand_vector_init_insert_elems): Ditto.
30037 (expand_vec_init): Ditto.
30038 * config/riscv/vector-iterators.md: New attribute.
30040 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
30042 * config/rs6000/rs6000-builtins.def
30043 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
30045 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
30046 xsiexpdpf to xsiexpdpf_di.
30047 * config/rs6000/vsx.md (xsiexpdp): Rename to...
30048 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
30049 replace TARGET_64BIT with TARGET_POWERPC64.
30050 (xsiexpdpf): Rename to...
30051 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
30052 replace TARGET_64BIT with TARGET_POWERPC64.
30054 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
30056 * config/rs6000/rs6000-builtins.def
30057 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
30059 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
30062 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
30064 * config/rs6000/rs6000-builtins.def
30065 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
30066 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
30068 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
30069 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
30070 TARGET_64BIT check.
30071 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
30072 requirement when it has a 64-bit argument.
30074 2023-05-12 Pan Li <pan2.li@intel.com>
30075 Richard Sandiford <richard.sandiford@arm.com>
30076 Richard Biener <rguenther@suse.de>
30077 Jakub Jelinek <jakub@redhat.com>
30079 * mux-utils.h: Add overload operator == and != for pointer_mux.
30080 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
30081 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
30082 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
30083 (dv_as_decl): Ditto.
30084 (dv_as_opaque): Removed due to unnecessary.
30085 (struct variable_hasher): Take decl_or_value as compare_type.
30086 (variable_hasher::equal): Diito.
30087 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
30088 (dv_from_value): Ditto.
30089 (attrs_list_member): Ditto.
30090 (vars_copy): Ditto.
30091 (var_reg_decl_set): Ditto.
30092 (var_reg_delete_and_set): Ditto.
30093 (find_loc_in_1pdv): Ditto.
30094 (canonicalize_values_star): Ditto.
30095 (variable_post_merge_new_vals): Ditto.
30096 (dump_onepart_variable_differences): Ditto.
30097 (variable_different_p): Ditto.
30098 (set_slot_part): Ditto.
30099 (clobber_slot_part): Ditto.
30100 (clobber_variable_part): Ditto.
30102 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
30104 * match.pd: simplify vector shift + bit_and + multiply.
30106 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30108 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
30109 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
30110 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
30111 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
30112 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
30113 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
30114 * config/arm/arm-mve-builtins.cc
30115 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
30116 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
30117 * config/arm/arm_mve.h (vqrdmlashq): Remove.
30118 (vqrdmlahq): Remove.
30119 (vqdmlashq): Remove.
30120 (vqdmlahq): Remove.
30124 (vmlasq_m): Remove.
30125 (vqdmlashq_m): Remove.
30126 (vqdmlahq_m): Remove.
30127 (vqrdmlahq_m): Remove.
30128 (vqrdmlashq_m): Remove.
30129 (vmlasq_n_u8): Remove.
30130 (vmlaq_n_u8): Remove.
30131 (vqrdmlashq_n_s8): Remove.
30132 (vqrdmlahq_n_s8): Remove.
30133 (vqdmlahq_n_s8): Remove.
30134 (vqdmlashq_n_s8): Remove.
30135 (vmlasq_n_s8): Remove.
30136 (vmlaq_n_s8): Remove.
30137 (vmlasq_n_u16): Remove.
30138 (vmlaq_n_u16): Remove.
30139 (vqrdmlashq_n_s16): Remove.
30140 (vqrdmlahq_n_s16): Remove.
30141 (vqdmlashq_n_s16): Remove.
30142 (vqdmlahq_n_s16): Remove.
30143 (vmlasq_n_s16): Remove.
30144 (vmlaq_n_s16): Remove.
30145 (vmlasq_n_u32): Remove.
30146 (vmlaq_n_u32): Remove.
30147 (vqrdmlashq_n_s32): Remove.
30148 (vqrdmlahq_n_s32): Remove.
30149 (vqdmlashq_n_s32): Remove.
30150 (vqdmlahq_n_s32): Remove.
30151 (vmlasq_n_s32): Remove.
30152 (vmlaq_n_s32): Remove.
30153 (vmlaq_m_n_s8): Remove.
30154 (vmlaq_m_n_s32): Remove.
30155 (vmlaq_m_n_s16): Remove.
30156 (vmlaq_m_n_u8): Remove.
30157 (vmlaq_m_n_u32): Remove.
30158 (vmlaq_m_n_u16): Remove.
30159 (vmlasq_m_n_s8): Remove.
30160 (vmlasq_m_n_s32): Remove.
30161 (vmlasq_m_n_s16): Remove.
30162 (vmlasq_m_n_u8): Remove.
30163 (vmlasq_m_n_u32): Remove.
30164 (vmlasq_m_n_u16): Remove.
30165 (vqdmlashq_m_n_s8): Remove.
30166 (vqdmlashq_m_n_s32): Remove.
30167 (vqdmlashq_m_n_s16): Remove.
30168 (vqdmlahq_m_n_s8): Remove.
30169 (vqdmlahq_m_n_s32): Remove.
30170 (vqdmlahq_m_n_s16): Remove.
30171 (vqrdmlahq_m_n_s8): Remove.
30172 (vqrdmlahq_m_n_s32): Remove.
30173 (vqrdmlahq_m_n_s16): Remove.
30174 (vqrdmlashq_m_n_s8): Remove.
30175 (vqrdmlashq_m_n_s32): Remove.
30176 (vqrdmlashq_m_n_s16): Remove.
30177 (__arm_vmlasq_n_u8): Remove.
30178 (__arm_vmlaq_n_u8): Remove.
30179 (__arm_vqrdmlashq_n_s8): Remove.
30180 (__arm_vqdmlashq_n_s8): Remove.
30181 (__arm_vqrdmlahq_n_s8): Remove.
30182 (__arm_vqdmlahq_n_s8): Remove.
30183 (__arm_vmlasq_n_s8): Remove.
30184 (__arm_vmlaq_n_s8): Remove.
30185 (__arm_vmlasq_n_u16): Remove.
30186 (__arm_vmlaq_n_u16): Remove.
30187 (__arm_vqrdmlashq_n_s16): Remove.
30188 (__arm_vqdmlashq_n_s16): Remove.
30189 (__arm_vqrdmlahq_n_s16): Remove.
30190 (__arm_vqdmlahq_n_s16): Remove.
30191 (__arm_vmlasq_n_s16): Remove.
30192 (__arm_vmlaq_n_s16): Remove.
30193 (__arm_vmlasq_n_u32): Remove.
30194 (__arm_vmlaq_n_u32): Remove.
30195 (__arm_vqrdmlashq_n_s32): Remove.
30196 (__arm_vqdmlashq_n_s32): Remove.
30197 (__arm_vqrdmlahq_n_s32): Remove.
30198 (__arm_vqdmlahq_n_s32): Remove.
30199 (__arm_vmlasq_n_s32): Remove.
30200 (__arm_vmlaq_n_s32): Remove.
30201 (__arm_vmlaq_m_n_s8): Remove.
30202 (__arm_vmlaq_m_n_s32): Remove.
30203 (__arm_vmlaq_m_n_s16): Remove.
30204 (__arm_vmlaq_m_n_u8): Remove.
30205 (__arm_vmlaq_m_n_u32): Remove.
30206 (__arm_vmlaq_m_n_u16): Remove.
30207 (__arm_vmlasq_m_n_s8): Remove.
30208 (__arm_vmlasq_m_n_s32): Remove.
30209 (__arm_vmlasq_m_n_s16): Remove.
30210 (__arm_vmlasq_m_n_u8): Remove.
30211 (__arm_vmlasq_m_n_u32): Remove.
30212 (__arm_vmlasq_m_n_u16): Remove.
30213 (__arm_vqdmlahq_m_n_s8): Remove.
30214 (__arm_vqdmlahq_m_n_s32): Remove.
30215 (__arm_vqdmlahq_m_n_s16): Remove.
30216 (__arm_vqrdmlahq_m_n_s8): Remove.
30217 (__arm_vqrdmlahq_m_n_s32): Remove.
30218 (__arm_vqrdmlahq_m_n_s16): Remove.
30219 (__arm_vqrdmlashq_m_n_s8): Remove.
30220 (__arm_vqrdmlashq_m_n_s32): Remove.
30221 (__arm_vqrdmlashq_m_n_s16): Remove.
30222 (__arm_vqdmlashq_m_n_s8): Remove.
30223 (__arm_vqdmlashq_m_n_s16): Remove.
30224 (__arm_vqdmlashq_m_n_s32): Remove.
30225 (__arm_vmlasq): Remove.
30226 (__arm_vmlaq): Remove.
30227 (__arm_vqrdmlashq): Remove.
30228 (__arm_vqdmlashq): Remove.
30229 (__arm_vqrdmlahq): Remove.
30230 (__arm_vqdmlahq): Remove.
30231 (__arm_vmlaq_m): Remove.
30232 (__arm_vmlasq_m): Remove.
30233 (__arm_vqdmlahq_m): Remove.
30234 (__arm_vqrdmlahq_m): Remove.
30235 (__arm_vqrdmlashq_m): Remove.
30236 (__arm_vqdmlashq_m): Remove.
30238 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30240 * config/arm/iterators.md (MVE_VMLxQ_N): New.
30241 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
30243 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
30245 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
30246 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
30247 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
30248 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
30249 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30251 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30253 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
30254 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
30256 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30258 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
30259 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
30260 (vqrdmlsdhxq): New.
30261 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
30262 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
30263 (vqrdmlsdhxq): New.
30264 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
30265 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
30266 (vqrdmlsdhxq): New.
30267 * config/arm/arm-mve-builtins.cc
30268 (function_instance::has_inactive_argument): Handle vqrdmladhq,
30269 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
30270 vqdmlsdhq, vqdmlsdhxq.
30271 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
30272 (vqrdmlsdhq): Remove.
30273 (vqrdmladhxq): Remove.
30274 (vqrdmladhq): Remove.
30275 (vqdmlsdhxq): Remove.
30276 (vqdmlsdhq): Remove.
30277 (vqdmladhxq): Remove.
30278 (vqdmladhq): Remove.
30279 (vqdmladhq_m): Remove.
30280 (vqdmladhxq_m): Remove.
30281 (vqdmlsdhq_m): Remove.
30282 (vqdmlsdhxq_m): Remove.
30283 (vqrdmladhq_m): Remove.
30284 (vqrdmladhxq_m): Remove.
30285 (vqrdmlsdhq_m): Remove.
30286 (vqrdmlsdhxq_m): Remove.
30287 (vqrdmlsdhxq_s8): Remove.
30288 (vqrdmlsdhq_s8): Remove.
30289 (vqrdmladhxq_s8): Remove.
30290 (vqrdmladhq_s8): Remove.
30291 (vqdmlsdhxq_s8): Remove.
30292 (vqdmlsdhq_s8): Remove.
30293 (vqdmladhxq_s8): Remove.
30294 (vqdmladhq_s8): Remove.
30295 (vqrdmlsdhxq_s16): Remove.
30296 (vqrdmlsdhq_s16): Remove.
30297 (vqrdmladhxq_s16): Remove.
30298 (vqrdmladhq_s16): Remove.
30299 (vqdmlsdhxq_s16): Remove.
30300 (vqdmlsdhq_s16): Remove.
30301 (vqdmladhxq_s16): Remove.
30302 (vqdmladhq_s16): Remove.
30303 (vqrdmlsdhxq_s32): Remove.
30304 (vqrdmlsdhq_s32): Remove.
30305 (vqrdmladhxq_s32): Remove.
30306 (vqrdmladhq_s32): Remove.
30307 (vqdmlsdhxq_s32): Remove.
30308 (vqdmlsdhq_s32): Remove.
30309 (vqdmladhxq_s32): Remove.
30310 (vqdmladhq_s32): Remove.
30311 (vqdmladhq_m_s8): Remove.
30312 (vqdmladhq_m_s32): Remove.
30313 (vqdmladhq_m_s16): Remove.
30314 (vqdmladhxq_m_s8): Remove.
30315 (vqdmladhxq_m_s32): Remove.
30316 (vqdmladhxq_m_s16): Remove.
30317 (vqdmlsdhq_m_s8): Remove.
30318 (vqdmlsdhq_m_s32): Remove.
30319 (vqdmlsdhq_m_s16): Remove.
30320 (vqdmlsdhxq_m_s8): Remove.
30321 (vqdmlsdhxq_m_s32): Remove.
30322 (vqdmlsdhxq_m_s16): Remove.
30323 (vqrdmladhq_m_s8): Remove.
30324 (vqrdmladhq_m_s32): Remove.
30325 (vqrdmladhq_m_s16): Remove.
30326 (vqrdmladhxq_m_s8): Remove.
30327 (vqrdmladhxq_m_s32): Remove.
30328 (vqrdmladhxq_m_s16): Remove.
30329 (vqrdmlsdhq_m_s8): Remove.
30330 (vqrdmlsdhq_m_s32): Remove.
30331 (vqrdmlsdhq_m_s16): Remove.
30332 (vqrdmlsdhxq_m_s8): Remove.
30333 (vqrdmlsdhxq_m_s32): Remove.
30334 (vqrdmlsdhxq_m_s16): Remove.
30335 (__arm_vqrdmlsdhxq_s8): Remove.
30336 (__arm_vqrdmlsdhq_s8): Remove.
30337 (__arm_vqrdmladhxq_s8): Remove.
30338 (__arm_vqrdmladhq_s8): Remove.
30339 (__arm_vqdmlsdhxq_s8): Remove.
30340 (__arm_vqdmlsdhq_s8): Remove.
30341 (__arm_vqdmladhxq_s8): Remove.
30342 (__arm_vqdmladhq_s8): Remove.
30343 (__arm_vqrdmlsdhxq_s16): Remove.
30344 (__arm_vqrdmlsdhq_s16): Remove.
30345 (__arm_vqrdmladhxq_s16): Remove.
30346 (__arm_vqrdmladhq_s16): Remove.
30347 (__arm_vqdmlsdhxq_s16): Remove.
30348 (__arm_vqdmlsdhq_s16): Remove.
30349 (__arm_vqdmladhxq_s16): Remove.
30350 (__arm_vqdmladhq_s16): Remove.
30351 (__arm_vqrdmlsdhxq_s32): Remove.
30352 (__arm_vqrdmlsdhq_s32): Remove.
30353 (__arm_vqrdmladhxq_s32): Remove.
30354 (__arm_vqrdmladhq_s32): Remove.
30355 (__arm_vqdmlsdhxq_s32): Remove.
30356 (__arm_vqdmlsdhq_s32): Remove.
30357 (__arm_vqdmladhxq_s32): Remove.
30358 (__arm_vqdmladhq_s32): Remove.
30359 (__arm_vqdmladhq_m_s8): Remove.
30360 (__arm_vqdmladhq_m_s32): Remove.
30361 (__arm_vqdmladhq_m_s16): Remove.
30362 (__arm_vqdmladhxq_m_s8): Remove.
30363 (__arm_vqdmladhxq_m_s32): Remove.
30364 (__arm_vqdmladhxq_m_s16): Remove.
30365 (__arm_vqdmlsdhq_m_s8): Remove.
30366 (__arm_vqdmlsdhq_m_s32): Remove.
30367 (__arm_vqdmlsdhq_m_s16): Remove.
30368 (__arm_vqdmlsdhxq_m_s8): Remove.
30369 (__arm_vqdmlsdhxq_m_s32): Remove.
30370 (__arm_vqdmlsdhxq_m_s16): Remove.
30371 (__arm_vqrdmladhq_m_s8): Remove.
30372 (__arm_vqrdmladhq_m_s32): Remove.
30373 (__arm_vqrdmladhq_m_s16): Remove.
30374 (__arm_vqrdmladhxq_m_s8): Remove.
30375 (__arm_vqrdmladhxq_m_s32): Remove.
30376 (__arm_vqrdmladhxq_m_s16): Remove.
30377 (__arm_vqrdmlsdhq_m_s8): Remove.
30378 (__arm_vqrdmlsdhq_m_s32): Remove.
30379 (__arm_vqrdmlsdhq_m_s16): Remove.
30380 (__arm_vqrdmlsdhxq_m_s8): Remove.
30381 (__arm_vqrdmlsdhxq_m_s32): Remove.
30382 (__arm_vqrdmlsdhxq_m_s16): Remove.
30383 (__arm_vqrdmlsdhxq): Remove.
30384 (__arm_vqrdmlsdhq): Remove.
30385 (__arm_vqrdmladhxq): Remove.
30386 (__arm_vqrdmladhq): Remove.
30387 (__arm_vqdmlsdhxq): Remove.
30388 (__arm_vqdmlsdhq): Remove.
30389 (__arm_vqdmladhxq): Remove.
30390 (__arm_vqdmladhq): Remove.
30391 (__arm_vqdmladhq_m): Remove.
30392 (__arm_vqdmladhxq_m): Remove.
30393 (__arm_vqdmlsdhq_m): Remove.
30394 (__arm_vqdmlsdhxq_m): Remove.
30395 (__arm_vqrdmladhq_m): Remove.
30396 (__arm_vqrdmladhxq_m): Remove.
30397 (__arm_vqrdmlsdhq_m): Remove.
30398 (__arm_vqrdmlsdhxq_m): Remove.
30400 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30402 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
30403 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
30404 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
30405 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
30406 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
30407 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
30408 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
30409 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
30410 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
30411 (mve_vqdmladhq_s<mode>): Merge into ...
30412 (@mve_<mve_insn>q_<supf><mode>): ... this.
30414 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30416 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
30417 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
30419 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30421 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
30422 (vmlsldavaq, vmlsldavaxq): New.
30423 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
30424 (vmlsldavaq, vmlsldavaxq): New.
30425 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
30426 (vmlsldavaq, vmlsldavaxq): New.
30427 * config/arm/arm_mve.h (vmlaldavaq): Remove.
30428 (vmlaldavaxq): Remove.
30429 (vmlsldavaq): Remove.
30430 (vmlsldavaxq): Remove.
30431 (vmlaldavaq_p): Remove.
30432 (vmlaldavaxq_p): Remove.
30433 (vmlsldavaq_p): Remove.
30434 (vmlsldavaxq_p): Remove.
30435 (vmlaldavaq_s16): Remove.
30436 (vmlaldavaxq_s16): Remove.
30437 (vmlsldavaq_s16): Remove.
30438 (vmlsldavaxq_s16): Remove.
30439 (vmlaldavaq_u16): Remove.
30440 (vmlaldavaq_s32): Remove.
30441 (vmlaldavaxq_s32): Remove.
30442 (vmlsldavaq_s32): Remove.
30443 (vmlsldavaxq_s32): Remove.
30444 (vmlaldavaq_u32): Remove.
30445 (vmlaldavaq_p_s32): Remove.
30446 (vmlaldavaq_p_s16): Remove.
30447 (vmlaldavaq_p_u32): Remove.
30448 (vmlaldavaq_p_u16): Remove.
30449 (vmlaldavaxq_p_s32): Remove.
30450 (vmlaldavaxq_p_s16): Remove.
30451 (vmlsldavaq_p_s32): Remove.
30452 (vmlsldavaq_p_s16): Remove.
30453 (vmlsldavaxq_p_s32): Remove.
30454 (vmlsldavaxq_p_s16): Remove.
30455 (__arm_vmlaldavaq_s16): Remove.
30456 (__arm_vmlaldavaxq_s16): Remove.
30457 (__arm_vmlsldavaq_s16): Remove.
30458 (__arm_vmlsldavaxq_s16): Remove.
30459 (__arm_vmlaldavaq_u16): Remove.
30460 (__arm_vmlaldavaq_s32): Remove.
30461 (__arm_vmlaldavaxq_s32): Remove.
30462 (__arm_vmlsldavaq_s32): Remove.
30463 (__arm_vmlsldavaxq_s32): Remove.
30464 (__arm_vmlaldavaq_u32): Remove.
30465 (__arm_vmlaldavaq_p_s32): Remove.
30466 (__arm_vmlaldavaq_p_s16): Remove.
30467 (__arm_vmlaldavaq_p_u32): Remove.
30468 (__arm_vmlaldavaq_p_u16): Remove.
30469 (__arm_vmlaldavaxq_p_s32): Remove.
30470 (__arm_vmlaldavaxq_p_s16): Remove.
30471 (__arm_vmlsldavaq_p_s32): Remove.
30472 (__arm_vmlsldavaq_p_s16): Remove.
30473 (__arm_vmlsldavaxq_p_s32): Remove.
30474 (__arm_vmlsldavaxq_p_s16): Remove.
30475 (__arm_vmlaldavaq): Remove.
30476 (__arm_vmlaldavaxq): Remove.
30477 (__arm_vmlsldavaq): Remove.
30478 (__arm_vmlsldavaxq): Remove.
30479 (__arm_vmlaldavaq_p): Remove.
30480 (__arm_vmlaldavaxq_p): Remove.
30481 (__arm_vmlsldavaq_p): Remove.
30482 (__arm_vmlsldavaxq_p): Remove.
30484 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30486 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
30488 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
30489 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
30490 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
30491 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
30492 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
30493 (mve_vmlaldavaxq_s<mode>): Merge into ...
30494 (@mve_<mve_insn>q_<supf><mode>): ... this.
30495 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
30496 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
30498 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
30500 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30502 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
30503 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
30505 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30507 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
30508 (vrmlsldavhq, vrmlsldavhxq): New.
30509 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
30510 (vrmlsldavhq, vrmlsldavhxq): New.
30511 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
30512 (vrmlsldavhq, vrmlsldavhxq): New.
30513 * config/arm/arm-mve-builtins-functions.h
30514 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
30515 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
30516 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
30517 (vrmlsldavhxq): Remove.
30518 (vrmlsldavhq): Remove.
30519 (vrmlaldavhxq): Remove.
30520 (vrmlaldavhq_p): Remove.
30521 (vrmlaldavhxq_p): Remove.
30522 (vrmlsldavhq_p): Remove.
30523 (vrmlsldavhxq_p): Remove.
30524 (vrmlaldavhq_u32): Remove.
30525 (vrmlsldavhxq_s32): Remove.
30526 (vrmlsldavhq_s32): Remove.
30527 (vrmlaldavhxq_s32): Remove.
30528 (vrmlaldavhq_s32): Remove.
30529 (vrmlaldavhq_p_s32): Remove.
30530 (vrmlaldavhxq_p_s32): Remove.
30531 (vrmlsldavhq_p_s32): Remove.
30532 (vrmlsldavhxq_p_s32): Remove.
30533 (vrmlaldavhq_p_u32): Remove.
30534 (__arm_vrmlaldavhq_u32): Remove.
30535 (__arm_vrmlsldavhxq_s32): Remove.
30536 (__arm_vrmlsldavhq_s32): Remove.
30537 (__arm_vrmlaldavhxq_s32): Remove.
30538 (__arm_vrmlaldavhq_s32): Remove.
30539 (__arm_vrmlaldavhq_p_s32): Remove.
30540 (__arm_vrmlaldavhxq_p_s32): Remove.
30541 (__arm_vrmlsldavhq_p_s32): Remove.
30542 (__arm_vrmlsldavhxq_p_s32): Remove.
30543 (__arm_vrmlaldavhq_p_u32): Remove.
30544 (__arm_vrmlaldavhq): Remove.
30545 (__arm_vrmlsldavhxq): Remove.
30546 (__arm_vrmlsldavhq): Remove.
30547 (__arm_vrmlaldavhxq): Remove.
30548 (__arm_vrmlaldavhq_p): Remove.
30549 (__arm_vrmlaldavhxq_p): Remove.
30550 (__arm_vrmlsldavhq_p): Remove.
30551 (__arm_vrmlsldavhxq_p): Remove.
30553 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30555 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
30557 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
30558 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
30559 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
30560 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
30561 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
30562 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
30563 (@mve_<mve_insn>q_<supf>v4si): ... this.
30564 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
30565 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
30567 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
30569 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30571 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
30572 (vmlsldavq, vmlsldavxq): New.
30573 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
30574 (vmlsldavq, vmlsldavxq): New.
30575 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
30576 (vmlsldavq, vmlsldavxq): New.
30577 * config/arm/arm_mve.h (vmlaldavq): Remove.
30578 (vmlsldavxq): Remove.
30579 (vmlsldavq): Remove.
30580 (vmlaldavxq): Remove.
30581 (vmlaldavq_p): Remove.
30582 (vmlaldavxq_p): Remove.
30583 (vmlsldavq_p): Remove.
30584 (vmlsldavxq_p): Remove.
30585 (vmlaldavq_u16): Remove.
30586 (vmlsldavxq_s16): Remove.
30587 (vmlsldavq_s16): Remove.
30588 (vmlaldavxq_s16): Remove.
30589 (vmlaldavq_s16): Remove.
30590 (vmlaldavq_u32): Remove.
30591 (vmlsldavxq_s32): Remove.
30592 (vmlsldavq_s32): Remove.
30593 (vmlaldavxq_s32): Remove.
30594 (vmlaldavq_s32): Remove.
30595 (vmlaldavq_p_s16): Remove.
30596 (vmlaldavxq_p_s16): Remove.
30597 (vmlsldavq_p_s16): Remove.
30598 (vmlsldavxq_p_s16): Remove.
30599 (vmlaldavq_p_u16): Remove.
30600 (vmlaldavq_p_s32): Remove.
30601 (vmlaldavxq_p_s32): Remove.
30602 (vmlsldavq_p_s32): Remove.
30603 (vmlsldavxq_p_s32): Remove.
30604 (vmlaldavq_p_u32): Remove.
30605 (__arm_vmlaldavq_u16): Remove.
30606 (__arm_vmlsldavxq_s16): Remove.
30607 (__arm_vmlsldavq_s16): Remove.
30608 (__arm_vmlaldavxq_s16): Remove.
30609 (__arm_vmlaldavq_s16): Remove.
30610 (__arm_vmlaldavq_u32): Remove.
30611 (__arm_vmlsldavxq_s32): Remove.
30612 (__arm_vmlsldavq_s32): Remove.
30613 (__arm_vmlaldavxq_s32): Remove.
30614 (__arm_vmlaldavq_s32): Remove.
30615 (__arm_vmlaldavq_p_s16): Remove.
30616 (__arm_vmlaldavxq_p_s16): Remove.
30617 (__arm_vmlsldavq_p_s16): Remove.
30618 (__arm_vmlsldavxq_p_s16): Remove.
30619 (__arm_vmlaldavq_p_u16): Remove.
30620 (__arm_vmlaldavq_p_s32): Remove.
30621 (__arm_vmlaldavxq_p_s32): Remove.
30622 (__arm_vmlsldavq_p_s32): Remove.
30623 (__arm_vmlsldavxq_p_s32): Remove.
30624 (__arm_vmlaldavq_p_u32): Remove.
30625 (__arm_vmlaldavq): Remove.
30626 (__arm_vmlsldavxq): Remove.
30627 (__arm_vmlsldavq): Remove.
30628 (__arm_vmlaldavxq): Remove.
30629 (__arm_vmlaldavq_p): Remove.
30630 (__arm_vmlaldavxq_p): Remove.
30631 (__arm_vmlsldavq_p): Remove.
30632 (__arm_vmlsldavxq_p): Remove.
30634 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30636 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
30637 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
30638 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
30639 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
30640 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
30641 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
30642 (mve_vmlsldavxq_s<mode>): Merge into ...
30643 (@mve_<mve_insn>q_<supf><mode>): ... this.
30644 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
30645 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
30647 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
30649 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30651 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
30652 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
30654 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30656 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
30657 * config/arm/arm-mve-builtins-base.def (vabavq): New.
30658 * config/arm/arm-mve-builtins-base.h (vabavq): New.
30659 * config/arm/arm_mve.h (vabavq): Remove.
30660 (vabavq_p): Remove.
30661 (vabavq_s8): Remove.
30662 (vabavq_s16): Remove.
30663 (vabavq_s32): Remove.
30664 (vabavq_u8): Remove.
30665 (vabavq_u16): Remove.
30666 (vabavq_u32): Remove.
30667 (vabavq_p_s8): Remove.
30668 (vabavq_p_u8): Remove.
30669 (vabavq_p_s16): Remove.
30670 (vabavq_p_u16): Remove.
30671 (vabavq_p_s32): Remove.
30672 (vabavq_p_u32): Remove.
30673 (__arm_vabavq_s8): Remove.
30674 (__arm_vabavq_s16): Remove.
30675 (__arm_vabavq_s32): Remove.
30676 (__arm_vabavq_u8): Remove.
30677 (__arm_vabavq_u16): Remove.
30678 (__arm_vabavq_u32): Remove.
30679 (__arm_vabavq_p_s8): Remove.
30680 (__arm_vabavq_p_u8): Remove.
30681 (__arm_vabavq_p_s16): Remove.
30682 (__arm_vabavq_p_u16): Remove.
30683 (__arm_vabavq_p_s32): Remove.
30684 (__arm_vabavq_p_u32): Remove.
30685 (__arm_vabavq): Remove.
30686 (__arm_vabavq_p): Remove.
30688 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30690 * config/arm/iterators.md (mve_insn): Add vabav.
30691 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
30692 (@mve_<mve_insn>q_<supf><mode>): ... this,.
30693 (mve_vabavq_p_<supf><mode>): Rename into ...
30694 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
30696 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30698 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
30699 (vmlsdavaq, vmlsdavaxq): New.
30700 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
30701 (vmlsdavaq, vmlsdavaxq): New.
30702 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
30703 (vmlsdavaq, vmlsdavaxq): New.
30704 * config/arm/arm_mve.h (vmladavaq): Remove.
30705 (vmlsdavaxq): Remove.
30706 (vmlsdavaq): Remove.
30707 (vmladavaxq): Remove.
30708 (vmladavaq_p): Remove.
30709 (vmladavaxq_p): Remove.
30710 (vmlsdavaq_p): Remove.
30711 (vmlsdavaxq_p): Remove.
30712 (vmladavaq_u8): Remove.
30713 (vmlsdavaxq_s8): Remove.
30714 (vmlsdavaq_s8): Remove.
30715 (vmladavaxq_s8): Remove.
30716 (vmladavaq_s8): Remove.
30717 (vmladavaq_u16): Remove.
30718 (vmlsdavaxq_s16): Remove.
30719 (vmlsdavaq_s16): Remove.
30720 (vmladavaxq_s16): Remove.
30721 (vmladavaq_s16): Remove.
30722 (vmladavaq_u32): Remove.
30723 (vmlsdavaxq_s32): Remove.
30724 (vmlsdavaq_s32): Remove.
30725 (vmladavaxq_s32): Remove.
30726 (vmladavaq_s32): Remove.
30727 (vmladavaq_p_s8): Remove.
30728 (vmladavaq_p_s32): Remove.
30729 (vmladavaq_p_s16): Remove.
30730 (vmladavaq_p_u8): Remove.
30731 (vmladavaq_p_u32): Remove.
30732 (vmladavaq_p_u16): Remove.
30733 (vmladavaxq_p_s8): Remove.
30734 (vmladavaxq_p_s32): Remove.
30735 (vmladavaxq_p_s16): Remove.
30736 (vmlsdavaq_p_s8): Remove.
30737 (vmlsdavaq_p_s32): Remove.
30738 (vmlsdavaq_p_s16): Remove.
30739 (vmlsdavaxq_p_s8): Remove.
30740 (vmlsdavaxq_p_s32): Remove.
30741 (vmlsdavaxq_p_s16): Remove.
30742 (__arm_vmladavaq_u8): Remove.
30743 (__arm_vmlsdavaxq_s8): Remove.
30744 (__arm_vmlsdavaq_s8): Remove.
30745 (__arm_vmladavaxq_s8): Remove.
30746 (__arm_vmladavaq_s8): Remove.
30747 (__arm_vmladavaq_u16): Remove.
30748 (__arm_vmlsdavaxq_s16): Remove.
30749 (__arm_vmlsdavaq_s16): Remove.
30750 (__arm_vmladavaxq_s16): Remove.
30751 (__arm_vmladavaq_s16): Remove.
30752 (__arm_vmladavaq_u32): Remove.
30753 (__arm_vmlsdavaxq_s32): Remove.
30754 (__arm_vmlsdavaq_s32): Remove.
30755 (__arm_vmladavaxq_s32): Remove.
30756 (__arm_vmladavaq_s32): Remove.
30757 (__arm_vmladavaq_p_s8): Remove.
30758 (__arm_vmladavaq_p_s32): Remove.
30759 (__arm_vmladavaq_p_s16): Remove.
30760 (__arm_vmladavaq_p_u8): Remove.
30761 (__arm_vmladavaq_p_u32): Remove.
30762 (__arm_vmladavaq_p_u16): Remove.
30763 (__arm_vmladavaxq_p_s8): Remove.
30764 (__arm_vmladavaxq_p_s32): Remove.
30765 (__arm_vmladavaxq_p_s16): Remove.
30766 (__arm_vmlsdavaq_p_s8): Remove.
30767 (__arm_vmlsdavaq_p_s32): Remove.
30768 (__arm_vmlsdavaq_p_s16): Remove.
30769 (__arm_vmlsdavaxq_p_s8): Remove.
30770 (__arm_vmlsdavaxq_p_s32): Remove.
30771 (__arm_vmlsdavaxq_p_s16): Remove.
30772 (__arm_vmladavaq): Remove.
30773 (__arm_vmlsdavaxq): Remove.
30774 (__arm_vmlsdavaq): Remove.
30775 (__arm_vmladavaxq): Remove.
30776 (__arm_vmladavaq_p): Remove.
30777 (__arm_vmladavaxq_p): Remove.
30778 (__arm_vmlsdavaq_p): Remove.
30779 (__arm_vmlsdavaxq_p): Remove.
30781 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30783 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
30784 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
30786 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30788 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
30789 (vmlsdavq, vmlsdavxq): New.
30790 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
30791 (vmlsdavq, vmlsdavxq): New.
30792 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
30793 (vmlsdavq, vmlsdavxq): New.
30794 * config/arm/arm_mve.h (vmladavq): Remove.
30795 (vmlsdavxq): Remove.
30796 (vmlsdavq): Remove.
30797 (vmladavxq): Remove.
30798 (vmladavq_p): Remove.
30799 (vmlsdavxq_p): Remove.
30800 (vmlsdavq_p): Remove.
30801 (vmladavxq_p): Remove.
30802 (vmladavq_u8): Remove.
30803 (vmlsdavxq_s8): Remove.
30804 (vmlsdavq_s8): Remove.
30805 (vmladavxq_s8): Remove.
30806 (vmladavq_s8): Remove.
30807 (vmladavq_u16): Remove.
30808 (vmlsdavxq_s16): Remove.
30809 (vmlsdavq_s16): Remove.
30810 (vmladavxq_s16): Remove.
30811 (vmladavq_s16): Remove.
30812 (vmladavq_u32): Remove.
30813 (vmlsdavxq_s32): Remove.
30814 (vmlsdavq_s32): Remove.
30815 (vmladavxq_s32): Remove.
30816 (vmladavq_s32): Remove.
30817 (vmladavq_p_u8): Remove.
30818 (vmlsdavxq_p_s8): Remove.
30819 (vmlsdavq_p_s8): Remove.
30820 (vmladavxq_p_s8): Remove.
30821 (vmladavq_p_s8): Remove.
30822 (vmladavq_p_u16): Remove.
30823 (vmlsdavxq_p_s16): Remove.
30824 (vmlsdavq_p_s16): Remove.
30825 (vmladavxq_p_s16): Remove.
30826 (vmladavq_p_s16): Remove.
30827 (vmladavq_p_u32): Remove.
30828 (vmlsdavxq_p_s32): Remove.
30829 (vmlsdavq_p_s32): Remove.
30830 (vmladavxq_p_s32): Remove.
30831 (vmladavq_p_s32): Remove.
30832 (__arm_vmladavq_u8): Remove.
30833 (__arm_vmlsdavxq_s8): Remove.
30834 (__arm_vmlsdavq_s8): Remove.
30835 (__arm_vmladavxq_s8): Remove.
30836 (__arm_vmladavq_s8): Remove.
30837 (__arm_vmladavq_u16): Remove.
30838 (__arm_vmlsdavxq_s16): Remove.
30839 (__arm_vmlsdavq_s16): Remove.
30840 (__arm_vmladavxq_s16): Remove.
30841 (__arm_vmladavq_s16): Remove.
30842 (__arm_vmladavq_u32): Remove.
30843 (__arm_vmlsdavxq_s32): Remove.
30844 (__arm_vmlsdavq_s32): Remove.
30845 (__arm_vmladavxq_s32): Remove.
30846 (__arm_vmladavq_s32): Remove.
30847 (__arm_vmladavq_p_u8): Remove.
30848 (__arm_vmlsdavxq_p_s8): Remove.
30849 (__arm_vmlsdavq_p_s8): Remove.
30850 (__arm_vmladavxq_p_s8): Remove.
30851 (__arm_vmladavq_p_s8): Remove.
30852 (__arm_vmladavq_p_u16): Remove.
30853 (__arm_vmlsdavxq_p_s16): Remove.
30854 (__arm_vmlsdavq_p_s16): Remove.
30855 (__arm_vmladavxq_p_s16): Remove.
30856 (__arm_vmladavq_p_s16): Remove.
30857 (__arm_vmladavq_p_u32): Remove.
30858 (__arm_vmlsdavxq_p_s32): Remove.
30859 (__arm_vmlsdavq_p_s32): Remove.
30860 (__arm_vmladavxq_p_s32): Remove.
30861 (__arm_vmladavq_p_s32): Remove.
30862 (__arm_vmladavq): Remove.
30863 (__arm_vmlsdavxq): Remove.
30864 (__arm_vmlsdavq): Remove.
30865 (__arm_vmladavxq): Remove.
30866 (__arm_vmladavq_p): Remove.
30867 (__arm_vmlsdavxq_p): Remove.
30868 (__arm_vmlsdavq_p): Remove.
30869 (__arm_vmladavxq_p): Remove.
30871 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30873 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
30874 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
30875 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
30876 vmlsdavax, vmlsdav, vmlsdavx.
30877 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
30878 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
30879 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
30881 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
30882 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
30883 (mve_vmlsdavxq_s<mode>): Merge into ...
30884 (@mve_<mve_insn>q_<supf><mode>): ... this.
30885 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
30886 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
30888 (@mve_<mve_insn>q_<supf><mode>): ... this.
30889 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
30890 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
30891 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
30892 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
30893 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
30895 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
30897 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30899 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
30900 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
30902 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30904 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
30905 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
30906 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
30907 * config/arm/arm_mve.h (vaddlvaq): Remove.
30908 (vaddlvaq_p): Remove.
30909 (vaddlvaq_u32): Remove.
30910 (vaddlvaq_s32): Remove.
30911 (vaddlvaq_p_s32): Remove.
30912 (vaddlvaq_p_u32): Remove.
30913 (__arm_vaddlvaq_u32): Remove.
30914 (__arm_vaddlvaq_s32): Remove.
30915 (__arm_vaddlvaq_p_s32): Remove.
30916 (__arm_vaddlvaq_p_u32): Remove.
30917 (__arm_vaddlvaq): Remove.
30918 (__arm_vaddlvaq_p): Remove.
30920 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30922 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
30923 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
30925 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
30927 * config/arm/iterators.md (mve_insn): Add vaddlva.
30928 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
30929 (@mve_<mve_insn>q_<supf>v4si): ... this.
30930 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
30931 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
30933 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
30936 * config/i386/i386.cc (ix86_widen_mult_cost):
30937 Handle V4HImode and V2SImode.
30939 2023-05-11 Andrew Pinski <apinski@marvell.com>
30941 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
30942 defined by a phi node with more than one uses, allow for the
30943 only uses are in that same defining statement.
30945 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
30947 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
30950 2023-05-11 Pan Li <pan2.li@intel.com>
30952 * config/riscv/vector.md: Add comments for simplifying to vmset.
30954 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
30956 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
30958 (v<optab><mode>3): Add vector shift pattern.
30959 * config/riscv/vector-iterators.md: New iterator.
30961 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
30963 * config/riscv/autovec.md: Use renamed functions.
30964 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
30965 (emit_vlmax_reg_op): To this.
30966 (emit_nonvlmax_op): Rename.
30967 (emit_len_op): To this.
30968 (emit_nonvlmax_binop): Rename.
30969 (emit_len_binop): To this.
30970 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
30971 (emit_pred_binop): Remove vlmax_p.
30972 (emit_vlmax_op): Rename.
30973 (emit_vlmax_reg_op): To this.
30974 (emit_nonvlmax_op): Rename.
30975 (emit_len_op): To this.
30976 (emit_nonvlmax_binop): Rename.
30977 (emit_len_binop): To this.
30978 (sew64_scalar_helper): Use renamed functions.
30979 (expand_tuple_move): Use renamed functions.
30980 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
30982 * config/riscv/vector.md: Use renamed functions.
30984 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
30985 Michael Collison <collison@rivosinc.com>
30987 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
30988 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
30989 * config/riscv/riscv-v.cc (emit_pred_op): New function.
30990 (set_expander_dest_and_mask): New function.
30991 (emit_pred_binop): New function.
30992 (emit_nonvlmax_binop): New function.
30994 2023-05-11 Pan Li <pan2.li@intel.com>
30996 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
30997 * gimple-loop-interchange.cc
30998 (tree_loop_interchange::map_inductions_to_loop): Ditto.
30999 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
31000 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
31001 * tree-ssa-loop-manip.cc (create_iv): Ditto.
31002 (tree_transform_and_unroll_loop): Ditto.
31003 (canonicalize_loop_ivs): Ditto.
31004 * tree-ssa-loop-manip.h (create_iv): Ditto.
31005 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
31006 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
31008 (vect_set_loop_condition_normal): Ditto.
31009 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
31010 * tree-vect-stmts.cc (vectorizable_store): Ditto.
31011 (vectorizable_load): Ditto.
31013 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31015 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
31016 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
31017 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
31018 * config/arm/arm_mve.h (vmovlbq): Remove.
31020 (vmovlbq_m): Remove.
31021 (vmovltq_m): Remove.
31022 (vmovlbq_x): Remove.
31023 (vmovltq_x): Remove.
31024 (vmovlbq_s8): Remove.
31025 (vmovlbq_s16): Remove.
31026 (vmovltq_s8): Remove.
31027 (vmovltq_s16): Remove.
31028 (vmovltq_u8): Remove.
31029 (vmovltq_u16): Remove.
31030 (vmovlbq_u8): Remove.
31031 (vmovlbq_u16): Remove.
31032 (vmovlbq_m_s8): Remove.
31033 (vmovltq_m_s8): Remove.
31034 (vmovlbq_m_u8): Remove.
31035 (vmovltq_m_u8): Remove.
31036 (vmovlbq_m_s16): Remove.
31037 (vmovltq_m_s16): Remove.
31038 (vmovlbq_m_u16): Remove.
31039 (vmovltq_m_u16): Remove.
31040 (vmovlbq_x_s8): Remove.
31041 (vmovlbq_x_s16): Remove.
31042 (vmovlbq_x_u8): Remove.
31043 (vmovlbq_x_u16): Remove.
31044 (vmovltq_x_s8): Remove.
31045 (vmovltq_x_s16): Remove.
31046 (vmovltq_x_u8): Remove.
31047 (vmovltq_x_u16): Remove.
31048 (__arm_vmovlbq_s8): Remove.
31049 (__arm_vmovlbq_s16): Remove.
31050 (__arm_vmovltq_s8): Remove.
31051 (__arm_vmovltq_s16): Remove.
31052 (__arm_vmovltq_u8): Remove.
31053 (__arm_vmovltq_u16): Remove.
31054 (__arm_vmovlbq_u8): Remove.
31055 (__arm_vmovlbq_u16): Remove.
31056 (__arm_vmovlbq_m_s8): Remove.
31057 (__arm_vmovltq_m_s8): Remove.
31058 (__arm_vmovlbq_m_u8): Remove.
31059 (__arm_vmovltq_m_u8): Remove.
31060 (__arm_vmovlbq_m_s16): Remove.
31061 (__arm_vmovltq_m_s16): Remove.
31062 (__arm_vmovlbq_m_u16): Remove.
31063 (__arm_vmovltq_m_u16): Remove.
31064 (__arm_vmovlbq_x_s8): Remove.
31065 (__arm_vmovlbq_x_s16): Remove.
31066 (__arm_vmovlbq_x_u8): Remove.
31067 (__arm_vmovlbq_x_u16): Remove.
31068 (__arm_vmovltq_x_s8): Remove.
31069 (__arm_vmovltq_x_s16): Remove.
31070 (__arm_vmovltq_x_u8): Remove.
31071 (__arm_vmovltq_x_u16): Remove.
31072 (__arm_vmovlbq): Remove.
31073 (__arm_vmovltq): Remove.
31074 (__arm_vmovlbq_m): Remove.
31075 (__arm_vmovltq_m): Remove.
31076 (__arm_vmovlbq_x): Remove.
31077 (__arm_vmovltq_x): Remove.
31079 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31081 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
31082 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
31084 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31086 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
31087 (VMOVLBQ, VMOVLTQ): Merge into ...
31088 (VMOVLxQ): ... this.
31089 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
31090 (VMOVLxQ_M): ... this.
31091 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
31092 (mve_vmovlbq_<supf><mode>): Merge into ...
31093 (@mve_<mve_insn>q_<supf><mode>): ... this.
31094 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
31096 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
31098 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31100 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
31101 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
31102 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
31103 * config/arm/arm-mve-builtins-functions.h
31104 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
31105 * config/arm/arm_mve.h (vaddlvq): Remove.
31106 (vaddlvq_p): Remove.
31107 (vaddlvq_s32): Remove.
31108 (vaddlvq_u32): Remove.
31109 (vaddlvq_p_s32): Remove.
31110 (vaddlvq_p_u32): Remove.
31111 (__arm_vaddlvq_s32): Remove.
31112 (__arm_vaddlvq_u32): Remove.
31113 (__arm_vaddlvq_p_s32): Remove.
31114 (__arm_vaddlvq_p_u32): Remove.
31115 (__arm_vaddlvq): Remove.
31116 (__arm_vaddlvq_p): Remove.
31118 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31120 * config/arm/iterators.md (mve_insn): Add vaddlv.
31121 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
31122 (@mve_<mve_insn>q_<supf>v4si): ... this.
31123 (mve_vaddlvq_p_<supf>v4si): Rename into ...
31124 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
31126 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31128 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
31129 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
31131 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31133 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
31134 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
31135 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
31136 * config/arm/arm_mve.h (vaddvaq): Remove.
31137 (vaddvaq_p): Remove.
31138 (vaddvaq_u8): Remove.
31139 (vaddvaq_s8): Remove.
31140 (vaddvaq_u16): Remove.
31141 (vaddvaq_s16): Remove.
31142 (vaddvaq_u32): Remove.
31143 (vaddvaq_s32): Remove.
31144 (vaddvaq_p_u8): Remove.
31145 (vaddvaq_p_s8): Remove.
31146 (vaddvaq_p_u16): Remove.
31147 (vaddvaq_p_s16): Remove.
31148 (vaddvaq_p_u32): Remove.
31149 (vaddvaq_p_s32): Remove.
31150 (__arm_vaddvaq_u8): Remove.
31151 (__arm_vaddvaq_s8): Remove.
31152 (__arm_vaddvaq_u16): Remove.
31153 (__arm_vaddvaq_s16): Remove.
31154 (__arm_vaddvaq_u32): Remove.
31155 (__arm_vaddvaq_s32): Remove.
31156 (__arm_vaddvaq_p_u8): Remove.
31157 (__arm_vaddvaq_p_s8): Remove.
31158 (__arm_vaddvaq_p_u16): Remove.
31159 (__arm_vaddvaq_p_s16): Remove.
31160 (__arm_vaddvaq_p_u32): Remove.
31161 (__arm_vaddvaq_p_s32): Remove.
31162 (__arm_vaddvaq): Remove.
31163 (__arm_vaddvaq_p): Remove.
31165 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31167 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
31168 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
31170 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31172 * config/arm/iterators.md (mve_insn): Add vaddva.
31173 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
31174 (@mve_<mve_insn>q_<supf><mode>): ... this.
31175 (mve_vaddvaq_p_<supf><mode>): Rename into ...
31176 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31178 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31180 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
31181 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
31182 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
31183 * config/arm/arm_mve.h (vaddvq): Remove.
31184 (vaddvq_p): Remove.
31185 (vaddvq_s8): Remove.
31186 (vaddvq_s16): Remove.
31187 (vaddvq_s32): Remove.
31188 (vaddvq_u8): Remove.
31189 (vaddvq_u16): Remove.
31190 (vaddvq_u32): Remove.
31191 (vaddvq_p_u8): Remove.
31192 (vaddvq_p_s8): Remove.
31193 (vaddvq_p_u16): Remove.
31194 (vaddvq_p_s16): Remove.
31195 (vaddvq_p_u32): Remove.
31196 (vaddvq_p_s32): Remove.
31197 (__arm_vaddvq_s8): Remove.
31198 (__arm_vaddvq_s16): Remove.
31199 (__arm_vaddvq_s32): Remove.
31200 (__arm_vaddvq_u8): Remove.
31201 (__arm_vaddvq_u16): Remove.
31202 (__arm_vaddvq_u32): Remove.
31203 (__arm_vaddvq_p_u8): Remove.
31204 (__arm_vaddvq_p_s8): Remove.
31205 (__arm_vaddvq_p_u16): Remove.
31206 (__arm_vaddvq_p_s16): Remove.
31207 (__arm_vaddvq_p_u32): Remove.
31208 (__arm_vaddvq_p_s32): Remove.
31209 (__arm_vaddvq): Remove.
31210 (__arm_vaddvq_p): Remove.
31212 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31214 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
31215 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
31217 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31219 * config/arm/iterators.md (mve_insn): Add vaddv.
31220 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
31221 (@mve_<mve_insn>q_<supf><mode>): ... this.
31222 (mve_vaddvq_p_<supf><mode>): Rename into ...
31223 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
31224 * config/arm/vec-common.md: Use gen_mve_q instead of
31227 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31229 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
31231 * config/arm/arm-mve-builtins-base.def (vdupq): New.
31232 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
31233 * config/arm/arm_mve.h (vdupq_n): Remove.
31235 (vdupq_n_f16): Remove.
31236 (vdupq_n_f32): Remove.
31237 (vdupq_n_s8): Remove.
31238 (vdupq_n_s16): Remove.
31239 (vdupq_n_s32): Remove.
31240 (vdupq_n_u8): Remove.
31241 (vdupq_n_u16): Remove.
31242 (vdupq_n_u32): Remove.
31243 (vdupq_m_n_u8): Remove.
31244 (vdupq_m_n_s8): Remove.
31245 (vdupq_m_n_u16): Remove.
31246 (vdupq_m_n_s16): Remove.
31247 (vdupq_m_n_u32): Remove.
31248 (vdupq_m_n_s32): Remove.
31249 (vdupq_m_n_f16): Remove.
31250 (vdupq_m_n_f32): Remove.
31251 (vdupq_x_n_s8): Remove.
31252 (vdupq_x_n_s16): Remove.
31253 (vdupq_x_n_s32): Remove.
31254 (vdupq_x_n_u8): Remove.
31255 (vdupq_x_n_u16): Remove.
31256 (vdupq_x_n_u32): Remove.
31257 (vdupq_x_n_f16): Remove.
31258 (vdupq_x_n_f32): Remove.
31259 (__arm_vdupq_n_s8): Remove.
31260 (__arm_vdupq_n_s16): Remove.
31261 (__arm_vdupq_n_s32): Remove.
31262 (__arm_vdupq_n_u8): Remove.
31263 (__arm_vdupq_n_u16): Remove.
31264 (__arm_vdupq_n_u32): Remove.
31265 (__arm_vdupq_m_n_u8): Remove.
31266 (__arm_vdupq_m_n_s8): Remove.
31267 (__arm_vdupq_m_n_u16): Remove.
31268 (__arm_vdupq_m_n_s16): Remove.
31269 (__arm_vdupq_m_n_u32): Remove.
31270 (__arm_vdupq_m_n_s32): Remove.
31271 (__arm_vdupq_x_n_s8): Remove.
31272 (__arm_vdupq_x_n_s16): Remove.
31273 (__arm_vdupq_x_n_s32): Remove.
31274 (__arm_vdupq_x_n_u8): Remove.
31275 (__arm_vdupq_x_n_u16): Remove.
31276 (__arm_vdupq_x_n_u32): Remove.
31277 (__arm_vdupq_n_f16): Remove.
31278 (__arm_vdupq_n_f32): Remove.
31279 (__arm_vdupq_m_n_f16): Remove.
31280 (__arm_vdupq_m_n_f32): Remove.
31281 (__arm_vdupq_x_n_f16): Remove.
31282 (__arm_vdupq_x_n_f32): Remove.
31283 (__arm_vdupq_n): Remove.
31284 (__arm_vdupq_m): Remove.
31286 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31288 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
31289 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
31291 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31293 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
31294 (MVE_FP_N_VDUPQ_ONLY): New.
31295 (mve_insn): Add vdupq.
31296 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
31297 (@mve_<mve_insn>q_n_f<mode>): ... this.
31298 (mve_vdupq_n_<supf><mode>): Rename into ...
31299 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31300 (mve_vdupq_m_n_<supf><mode>): Rename into ...
31301 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31302 (mve_vdupq_m_n_f<mode>): Rename into ...
31303 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
31305 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31307 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
31309 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
31311 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
31313 * config/arm/arm_mve.h (vrev16q): Remove.
31316 (vrev64q_m): Remove.
31317 (vrev16q_m): Remove.
31318 (vrev32q_m): Remove.
31319 (vrev16q_x): Remove.
31320 (vrev32q_x): Remove.
31321 (vrev64q_x): Remove.
31322 (vrev64q_f16): Remove.
31323 (vrev64q_f32): Remove.
31324 (vrev32q_f16): Remove.
31325 (vrev16q_s8): Remove.
31326 (vrev32q_s8): Remove.
31327 (vrev32q_s16): Remove.
31328 (vrev64q_s8): Remove.
31329 (vrev64q_s16): Remove.
31330 (vrev64q_s32): Remove.
31331 (vrev64q_u8): Remove.
31332 (vrev64q_u16): Remove.
31333 (vrev64q_u32): Remove.
31334 (vrev32q_u8): Remove.
31335 (vrev32q_u16): Remove.
31336 (vrev16q_u8): Remove.
31337 (vrev64q_m_u8): Remove.
31338 (vrev64q_m_s8): Remove.
31339 (vrev64q_m_u16): Remove.
31340 (vrev64q_m_s16): Remove.
31341 (vrev64q_m_u32): Remove.
31342 (vrev64q_m_s32): Remove.
31343 (vrev16q_m_s8): Remove.
31344 (vrev32q_m_f16): Remove.
31345 (vrev16q_m_u8): Remove.
31346 (vrev32q_m_s8): Remove.
31347 (vrev64q_m_f16): Remove.
31348 (vrev32q_m_u8): Remove.
31349 (vrev32q_m_s16): Remove.
31350 (vrev64q_m_f32): Remove.
31351 (vrev32q_m_u16): Remove.
31352 (vrev16q_x_s8): Remove.
31353 (vrev16q_x_u8): Remove.
31354 (vrev32q_x_s8): Remove.
31355 (vrev32q_x_s16): Remove.
31356 (vrev32q_x_u8): Remove.
31357 (vrev32q_x_u16): Remove.
31358 (vrev64q_x_s8): Remove.
31359 (vrev64q_x_s16): Remove.
31360 (vrev64q_x_s32): Remove.
31361 (vrev64q_x_u8): Remove.
31362 (vrev64q_x_u16): Remove.
31363 (vrev64q_x_u32): Remove.
31364 (vrev32q_x_f16): Remove.
31365 (vrev64q_x_f16): Remove.
31366 (vrev64q_x_f32): Remove.
31367 (__arm_vrev16q_s8): Remove.
31368 (__arm_vrev32q_s8): Remove.
31369 (__arm_vrev32q_s16): Remove.
31370 (__arm_vrev64q_s8): Remove.
31371 (__arm_vrev64q_s16): Remove.
31372 (__arm_vrev64q_s32): Remove.
31373 (__arm_vrev64q_u8): Remove.
31374 (__arm_vrev64q_u16): Remove.
31375 (__arm_vrev64q_u32): Remove.
31376 (__arm_vrev32q_u8): Remove.
31377 (__arm_vrev32q_u16): Remove.
31378 (__arm_vrev16q_u8): Remove.
31379 (__arm_vrev64q_m_u8): Remove.
31380 (__arm_vrev64q_m_s8): Remove.
31381 (__arm_vrev64q_m_u16): Remove.
31382 (__arm_vrev64q_m_s16): Remove.
31383 (__arm_vrev64q_m_u32): Remove.
31384 (__arm_vrev64q_m_s32): Remove.
31385 (__arm_vrev16q_m_s8): Remove.
31386 (__arm_vrev16q_m_u8): Remove.
31387 (__arm_vrev32q_m_s8): Remove.
31388 (__arm_vrev32q_m_u8): Remove.
31389 (__arm_vrev32q_m_s16): Remove.
31390 (__arm_vrev32q_m_u16): Remove.
31391 (__arm_vrev16q_x_s8): Remove.
31392 (__arm_vrev16q_x_u8): Remove.
31393 (__arm_vrev32q_x_s8): Remove.
31394 (__arm_vrev32q_x_s16): Remove.
31395 (__arm_vrev32q_x_u8): Remove.
31396 (__arm_vrev32q_x_u16): Remove.
31397 (__arm_vrev64q_x_s8): Remove.
31398 (__arm_vrev64q_x_s16): Remove.
31399 (__arm_vrev64q_x_s32): Remove.
31400 (__arm_vrev64q_x_u8): Remove.
31401 (__arm_vrev64q_x_u16): Remove.
31402 (__arm_vrev64q_x_u32): Remove.
31403 (__arm_vrev64q_f16): Remove.
31404 (__arm_vrev64q_f32): Remove.
31405 (__arm_vrev32q_f16): Remove.
31406 (__arm_vrev32q_m_f16): Remove.
31407 (__arm_vrev64q_m_f16): Remove.
31408 (__arm_vrev64q_m_f32): Remove.
31409 (__arm_vrev32q_x_f16): Remove.
31410 (__arm_vrev64q_x_f16): Remove.
31411 (__arm_vrev64q_x_f32): Remove.
31412 (__arm_vrev16q): Remove.
31413 (__arm_vrev32q): Remove.
31414 (__arm_vrev64q): Remove.
31415 (__arm_vrev64q_m): Remove.
31416 (__arm_vrev16q_m): Remove.
31417 (__arm_vrev32q_m): Remove.
31418 (__arm_vrev16q_x): Remove.
31419 (__arm_vrev32q_x): Remove.
31420 (__arm_vrev64q_x): Remove.
31422 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31424 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
31425 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
31426 (MVE_FP_M_VREV32Q_ONLY): New iterators.
31427 (mve_insn): Add vrev16q, vrev32q, vrev64q.
31428 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
31429 (@mve_<mve_insn>q_f<mode>): ... this
31430 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
31431 (mve_vrev64q_<supf><mode>): Rename into ...
31432 (@mve_<mve_insn>q_<supf><mode>): ... this.
31433 (mve_vrev32q_<supf><mode>): Rename into
31434 @mve_<mve_insn>q_<supf><mode>.
31435 (mve_vrev16q_<supf>v16qi): Rename into
31436 @mve_<mve_insn>q_<supf><mode>.
31437 (mve_vrev64q_m_<supf><mode>): Rename into
31438 @mve_<mve_insn>q_m_<supf><mode>.
31439 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
31440 (mve_vrev32q_m_<supf><mode>): Rename into
31441 @mve_<mve_insn>q_m_<supf><mode>.
31442 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
31443 (mve_vrev16q_m_<supf>v16qi): Rename into
31444 @mve_<mve_insn>q_m_<supf><mode>.
31446 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31448 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
31449 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
31450 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
31451 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
31452 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
31453 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
31454 * config/arm/arm-mve-builtins-functions.h (class
31455 unspec_based_mve_function_exact_insn_vcmp): New.
31456 * config/arm/arm-mve-builtins.cc
31457 (function_instance::has_inactive_argument): Handle vcmp.
31458 * config/arm/arm_mve.h (vcmpneq): Remove.
31466 (vcmpneq_m): Remove.
31467 (vcmphiq_m): Remove.
31468 (vcmpeqq_m): Remove.
31469 (vcmpcsq_m): Remove.
31470 (vcmpcsq_m_n): Remove.
31471 (vcmpltq_m): Remove.
31472 (vcmpleq_m): Remove.
31473 (vcmpgtq_m): Remove.
31474 (vcmpgeq_m): Remove.
31475 (vcmpneq_s8): Remove.
31476 (vcmpneq_s16): Remove.
31477 (vcmpneq_s32): Remove.
31478 (vcmpneq_u8): Remove.
31479 (vcmpneq_u16): Remove.
31480 (vcmpneq_u32): Remove.
31481 (vcmpneq_n_u8): Remove.
31482 (vcmphiq_u8): Remove.
31483 (vcmphiq_n_u8): Remove.
31484 (vcmpeqq_u8): Remove.
31485 (vcmpeqq_n_u8): Remove.
31486 (vcmpcsq_u8): Remove.
31487 (vcmpcsq_n_u8): Remove.
31488 (vcmpneq_n_s8): Remove.
31489 (vcmpltq_s8): Remove.
31490 (vcmpltq_n_s8): Remove.
31491 (vcmpleq_s8): Remove.
31492 (vcmpleq_n_s8): Remove.
31493 (vcmpgtq_s8): Remove.
31494 (vcmpgtq_n_s8): Remove.
31495 (vcmpgeq_s8): Remove.
31496 (vcmpgeq_n_s8): Remove.
31497 (vcmpeqq_s8): Remove.
31498 (vcmpeqq_n_s8): Remove.
31499 (vcmpneq_n_u16): Remove.
31500 (vcmphiq_u16): Remove.
31501 (vcmphiq_n_u16): Remove.
31502 (vcmpeqq_u16): Remove.
31503 (vcmpeqq_n_u16): Remove.
31504 (vcmpcsq_u16): Remove.
31505 (vcmpcsq_n_u16): Remove.
31506 (vcmpneq_n_s16): Remove.
31507 (vcmpltq_s16): Remove.
31508 (vcmpltq_n_s16): Remove.
31509 (vcmpleq_s16): Remove.
31510 (vcmpleq_n_s16): Remove.
31511 (vcmpgtq_s16): Remove.
31512 (vcmpgtq_n_s16): Remove.
31513 (vcmpgeq_s16): Remove.
31514 (vcmpgeq_n_s16): Remove.
31515 (vcmpeqq_s16): Remove.
31516 (vcmpeqq_n_s16): Remove.
31517 (vcmpneq_n_u32): Remove.
31518 (vcmphiq_u32): Remove.
31519 (vcmphiq_n_u32): Remove.
31520 (vcmpeqq_u32): Remove.
31521 (vcmpeqq_n_u32): Remove.
31522 (vcmpcsq_u32): Remove.
31523 (vcmpcsq_n_u32): Remove.
31524 (vcmpneq_n_s32): Remove.
31525 (vcmpltq_s32): Remove.
31526 (vcmpltq_n_s32): Remove.
31527 (vcmpleq_s32): Remove.
31528 (vcmpleq_n_s32): Remove.
31529 (vcmpgtq_s32): Remove.
31530 (vcmpgtq_n_s32): Remove.
31531 (vcmpgeq_s32): Remove.
31532 (vcmpgeq_n_s32): Remove.
31533 (vcmpeqq_s32): Remove.
31534 (vcmpeqq_n_s32): Remove.
31535 (vcmpneq_n_f16): Remove.
31536 (vcmpneq_f16): Remove.
31537 (vcmpltq_n_f16): Remove.
31538 (vcmpltq_f16): Remove.
31539 (vcmpleq_n_f16): Remove.
31540 (vcmpleq_f16): Remove.
31541 (vcmpgtq_n_f16): Remove.
31542 (vcmpgtq_f16): Remove.
31543 (vcmpgeq_n_f16): Remove.
31544 (vcmpgeq_f16): Remove.
31545 (vcmpeqq_n_f16): Remove.
31546 (vcmpeqq_f16): Remove.
31547 (vcmpneq_n_f32): Remove.
31548 (vcmpneq_f32): Remove.
31549 (vcmpltq_n_f32): Remove.
31550 (vcmpltq_f32): Remove.
31551 (vcmpleq_n_f32): Remove.
31552 (vcmpleq_f32): Remove.
31553 (vcmpgtq_n_f32): Remove.
31554 (vcmpgtq_f32): Remove.
31555 (vcmpgeq_n_f32): Remove.
31556 (vcmpgeq_f32): Remove.
31557 (vcmpeqq_n_f32): Remove.
31558 (vcmpeqq_f32): Remove.
31559 (vcmpeqq_m_f16): Remove.
31560 (vcmpeqq_m_f32): Remove.
31561 (vcmpneq_m_u8): Remove.
31562 (vcmpneq_m_n_u8): Remove.
31563 (vcmphiq_m_u8): Remove.
31564 (vcmphiq_m_n_u8): Remove.
31565 (vcmpeqq_m_u8): Remove.
31566 (vcmpeqq_m_n_u8): Remove.
31567 (vcmpcsq_m_u8): Remove.
31568 (vcmpcsq_m_n_u8): Remove.
31569 (vcmpneq_m_s8): Remove.
31570 (vcmpneq_m_n_s8): Remove.
31571 (vcmpltq_m_s8): Remove.
31572 (vcmpltq_m_n_s8): Remove.
31573 (vcmpleq_m_s8): Remove.
31574 (vcmpleq_m_n_s8): Remove.
31575 (vcmpgtq_m_s8): Remove.
31576 (vcmpgtq_m_n_s8): Remove.
31577 (vcmpgeq_m_s8): Remove.
31578 (vcmpgeq_m_n_s8): Remove.
31579 (vcmpeqq_m_s8): Remove.
31580 (vcmpeqq_m_n_s8): Remove.
31581 (vcmpneq_m_u16): Remove.
31582 (vcmpneq_m_n_u16): Remove.
31583 (vcmphiq_m_u16): Remove.
31584 (vcmphiq_m_n_u16): Remove.
31585 (vcmpeqq_m_u16): Remove.
31586 (vcmpeqq_m_n_u16): Remove.
31587 (vcmpcsq_m_u16): Remove.
31588 (vcmpcsq_m_n_u16): Remove.
31589 (vcmpneq_m_s16): Remove.
31590 (vcmpneq_m_n_s16): Remove.
31591 (vcmpltq_m_s16): Remove.
31592 (vcmpltq_m_n_s16): Remove.
31593 (vcmpleq_m_s16): Remove.
31594 (vcmpleq_m_n_s16): Remove.
31595 (vcmpgtq_m_s16): Remove.
31596 (vcmpgtq_m_n_s16): Remove.
31597 (vcmpgeq_m_s16): Remove.
31598 (vcmpgeq_m_n_s16): Remove.
31599 (vcmpeqq_m_s16): Remove.
31600 (vcmpeqq_m_n_s16): Remove.
31601 (vcmpneq_m_u32): Remove.
31602 (vcmpneq_m_n_u32): Remove.
31603 (vcmphiq_m_u32): Remove.
31604 (vcmphiq_m_n_u32): Remove.
31605 (vcmpeqq_m_u32): Remove.
31606 (vcmpeqq_m_n_u32): Remove.
31607 (vcmpcsq_m_u32): Remove.
31608 (vcmpcsq_m_n_u32): Remove.
31609 (vcmpneq_m_s32): Remove.
31610 (vcmpneq_m_n_s32): Remove.
31611 (vcmpltq_m_s32): Remove.
31612 (vcmpltq_m_n_s32): Remove.
31613 (vcmpleq_m_s32): Remove.
31614 (vcmpleq_m_n_s32): Remove.
31615 (vcmpgtq_m_s32): Remove.
31616 (vcmpgtq_m_n_s32): Remove.
31617 (vcmpgeq_m_s32): Remove.
31618 (vcmpgeq_m_n_s32): Remove.
31619 (vcmpeqq_m_s32): Remove.
31620 (vcmpeqq_m_n_s32): Remove.
31621 (vcmpeqq_m_n_f16): Remove.
31622 (vcmpgeq_m_f16): Remove.
31623 (vcmpgeq_m_n_f16): Remove.
31624 (vcmpgtq_m_f16): Remove.
31625 (vcmpgtq_m_n_f16): Remove.
31626 (vcmpleq_m_f16): Remove.
31627 (vcmpleq_m_n_f16): Remove.
31628 (vcmpltq_m_f16): Remove.
31629 (vcmpltq_m_n_f16): Remove.
31630 (vcmpneq_m_f16): Remove.
31631 (vcmpneq_m_n_f16): Remove.
31632 (vcmpeqq_m_n_f32): Remove.
31633 (vcmpgeq_m_f32): Remove.
31634 (vcmpgeq_m_n_f32): Remove.
31635 (vcmpgtq_m_f32): Remove.
31636 (vcmpgtq_m_n_f32): Remove.
31637 (vcmpleq_m_f32): Remove.
31638 (vcmpleq_m_n_f32): Remove.
31639 (vcmpltq_m_f32): Remove.
31640 (vcmpltq_m_n_f32): Remove.
31641 (vcmpneq_m_f32): Remove.
31642 (vcmpneq_m_n_f32): Remove.
31643 (__arm_vcmpneq_s8): Remove.
31644 (__arm_vcmpneq_s16): Remove.
31645 (__arm_vcmpneq_s32): Remove.
31646 (__arm_vcmpneq_u8): Remove.
31647 (__arm_vcmpneq_u16): Remove.
31648 (__arm_vcmpneq_u32): Remove.
31649 (__arm_vcmpneq_n_u8): Remove.
31650 (__arm_vcmphiq_u8): Remove.
31651 (__arm_vcmphiq_n_u8): Remove.
31652 (__arm_vcmpeqq_u8): Remove.
31653 (__arm_vcmpeqq_n_u8): Remove.
31654 (__arm_vcmpcsq_u8): Remove.
31655 (__arm_vcmpcsq_n_u8): Remove.
31656 (__arm_vcmpneq_n_s8): Remove.
31657 (__arm_vcmpltq_s8): Remove.
31658 (__arm_vcmpltq_n_s8): Remove.
31659 (__arm_vcmpleq_s8): Remove.
31660 (__arm_vcmpleq_n_s8): Remove.
31661 (__arm_vcmpgtq_s8): Remove.
31662 (__arm_vcmpgtq_n_s8): Remove.
31663 (__arm_vcmpgeq_s8): Remove.
31664 (__arm_vcmpgeq_n_s8): Remove.
31665 (__arm_vcmpeqq_s8): Remove.
31666 (__arm_vcmpeqq_n_s8): Remove.
31667 (__arm_vcmpneq_n_u16): Remove.
31668 (__arm_vcmphiq_u16): Remove.
31669 (__arm_vcmphiq_n_u16): Remove.
31670 (__arm_vcmpeqq_u16): Remove.
31671 (__arm_vcmpeqq_n_u16): Remove.
31672 (__arm_vcmpcsq_u16): Remove.
31673 (__arm_vcmpcsq_n_u16): Remove.
31674 (__arm_vcmpneq_n_s16): Remove.
31675 (__arm_vcmpltq_s16): Remove.
31676 (__arm_vcmpltq_n_s16): Remove.
31677 (__arm_vcmpleq_s16): Remove.
31678 (__arm_vcmpleq_n_s16): Remove.
31679 (__arm_vcmpgtq_s16): Remove.
31680 (__arm_vcmpgtq_n_s16): Remove.
31681 (__arm_vcmpgeq_s16): Remove.
31682 (__arm_vcmpgeq_n_s16): Remove.
31683 (__arm_vcmpeqq_s16): Remove.
31684 (__arm_vcmpeqq_n_s16): Remove.
31685 (__arm_vcmpneq_n_u32): Remove.
31686 (__arm_vcmphiq_u32): Remove.
31687 (__arm_vcmphiq_n_u32): Remove.
31688 (__arm_vcmpeqq_u32): Remove.
31689 (__arm_vcmpeqq_n_u32): Remove.
31690 (__arm_vcmpcsq_u32): Remove.
31691 (__arm_vcmpcsq_n_u32): Remove.
31692 (__arm_vcmpneq_n_s32): Remove.
31693 (__arm_vcmpltq_s32): Remove.
31694 (__arm_vcmpltq_n_s32): Remove.
31695 (__arm_vcmpleq_s32): Remove.
31696 (__arm_vcmpleq_n_s32): Remove.
31697 (__arm_vcmpgtq_s32): Remove.
31698 (__arm_vcmpgtq_n_s32): Remove.
31699 (__arm_vcmpgeq_s32): Remove.
31700 (__arm_vcmpgeq_n_s32): Remove.
31701 (__arm_vcmpeqq_s32): Remove.
31702 (__arm_vcmpeqq_n_s32): Remove.
31703 (__arm_vcmpneq_m_u8): Remove.
31704 (__arm_vcmpneq_m_n_u8): Remove.
31705 (__arm_vcmphiq_m_u8): Remove.
31706 (__arm_vcmphiq_m_n_u8): Remove.
31707 (__arm_vcmpeqq_m_u8): Remove.
31708 (__arm_vcmpeqq_m_n_u8): Remove.
31709 (__arm_vcmpcsq_m_u8): Remove.
31710 (__arm_vcmpcsq_m_n_u8): Remove.
31711 (__arm_vcmpneq_m_s8): Remove.
31712 (__arm_vcmpneq_m_n_s8): Remove.
31713 (__arm_vcmpltq_m_s8): Remove.
31714 (__arm_vcmpltq_m_n_s8): Remove.
31715 (__arm_vcmpleq_m_s8): Remove.
31716 (__arm_vcmpleq_m_n_s8): Remove.
31717 (__arm_vcmpgtq_m_s8): Remove.
31718 (__arm_vcmpgtq_m_n_s8): Remove.
31719 (__arm_vcmpgeq_m_s8): Remove.
31720 (__arm_vcmpgeq_m_n_s8): Remove.
31721 (__arm_vcmpeqq_m_s8): Remove.
31722 (__arm_vcmpeqq_m_n_s8): Remove.
31723 (__arm_vcmpneq_m_u16): Remove.
31724 (__arm_vcmpneq_m_n_u16): Remove.
31725 (__arm_vcmphiq_m_u16): Remove.
31726 (__arm_vcmphiq_m_n_u16): Remove.
31727 (__arm_vcmpeqq_m_u16): Remove.
31728 (__arm_vcmpeqq_m_n_u16): Remove.
31729 (__arm_vcmpcsq_m_u16): Remove.
31730 (__arm_vcmpcsq_m_n_u16): Remove.
31731 (__arm_vcmpneq_m_s16): Remove.
31732 (__arm_vcmpneq_m_n_s16): Remove.
31733 (__arm_vcmpltq_m_s16): Remove.
31734 (__arm_vcmpltq_m_n_s16): Remove.
31735 (__arm_vcmpleq_m_s16): Remove.
31736 (__arm_vcmpleq_m_n_s16): Remove.
31737 (__arm_vcmpgtq_m_s16): Remove.
31738 (__arm_vcmpgtq_m_n_s16): Remove.
31739 (__arm_vcmpgeq_m_s16): Remove.
31740 (__arm_vcmpgeq_m_n_s16): Remove.
31741 (__arm_vcmpeqq_m_s16): Remove.
31742 (__arm_vcmpeqq_m_n_s16): Remove.
31743 (__arm_vcmpneq_m_u32): Remove.
31744 (__arm_vcmpneq_m_n_u32): Remove.
31745 (__arm_vcmphiq_m_u32): Remove.
31746 (__arm_vcmphiq_m_n_u32): Remove.
31747 (__arm_vcmpeqq_m_u32): Remove.
31748 (__arm_vcmpeqq_m_n_u32): Remove.
31749 (__arm_vcmpcsq_m_u32): Remove.
31750 (__arm_vcmpcsq_m_n_u32): Remove.
31751 (__arm_vcmpneq_m_s32): Remove.
31752 (__arm_vcmpneq_m_n_s32): Remove.
31753 (__arm_vcmpltq_m_s32): Remove.
31754 (__arm_vcmpltq_m_n_s32): Remove.
31755 (__arm_vcmpleq_m_s32): Remove.
31756 (__arm_vcmpleq_m_n_s32): Remove.
31757 (__arm_vcmpgtq_m_s32): Remove.
31758 (__arm_vcmpgtq_m_n_s32): Remove.
31759 (__arm_vcmpgeq_m_s32): Remove.
31760 (__arm_vcmpgeq_m_n_s32): Remove.
31761 (__arm_vcmpeqq_m_s32): Remove.
31762 (__arm_vcmpeqq_m_n_s32): Remove.
31763 (__arm_vcmpneq_n_f16): Remove.
31764 (__arm_vcmpneq_f16): Remove.
31765 (__arm_vcmpltq_n_f16): Remove.
31766 (__arm_vcmpltq_f16): Remove.
31767 (__arm_vcmpleq_n_f16): Remove.
31768 (__arm_vcmpleq_f16): Remove.
31769 (__arm_vcmpgtq_n_f16): Remove.
31770 (__arm_vcmpgtq_f16): Remove.
31771 (__arm_vcmpgeq_n_f16): Remove.
31772 (__arm_vcmpgeq_f16): Remove.
31773 (__arm_vcmpeqq_n_f16): Remove.
31774 (__arm_vcmpeqq_f16): Remove.
31775 (__arm_vcmpneq_n_f32): Remove.
31776 (__arm_vcmpneq_f32): Remove.
31777 (__arm_vcmpltq_n_f32): Remove.
31778 (__arm_vcmpltq_f32): Remove.
31779 (__arm_vcmpleq_n_f32): Remove.
31780 (__arm_vcmpleq_f32): Remove.
31781 (__arm_vcmpgtq_n_f32): Remove.
31782 (__arm_vcmpgtq_f32): Remove.
31783 (__arm_vcmpgeq_n_f32): Remove.
31784 (__arm_vcmpgeq_f32): Remove.
31785 (__arm_vcmpeqq_n_f32): Remove.
31786 (__arm_vcmpeqq_f32): Remove.
31787 (__arm_vcmpeqq_m_f16): Remove.
31788 (__arm_vcmpeqq_m_f32): Remove.
31789 (__arm_vcmpeqq_m_n_f16): Remove.
31790 (__arm_vcmpgeq_m_f16): Remove.
31791 (__arm_vcmpgeq_m_n_f16): Remove.
31792 (__arm_vcmpgtq_m_f16): Remove.
31793 (__arm_vcmpgtq_m_n_f16): Remove.
31794 (__arm_vcmpleq_m_f16): Remove.
31795 (__arm_vcmpleq_m_n_f16): Remove.
31796 (__arm_vcmpltq_m_f16): Remove.
31797 (__arm_vcmpltq_m_n_f16): Remove.
31798 (__arm_vcmpneq_m_f16): Remove.
31799 (__arm_vcmpneq_m_n_f16): Remove.
31800 (__arm_vcmpeqq_m_n_f32): Remove.
31801 (__arm_vcmpgeq_m_f32): Remove.
31802 (__arm_vcmpgeq_m_n_f32): Remove.
31803 (__arm_vcmpgtq_m_f32): Remove.
31804 (__arm_vcmpgtq_m_n_f32): Remove.
31805 (__arm_vcmpleq_m_f32): Remove.
31806 (__arm_vcmpleq_m_n_f32): Remove.
31807 (__arm_vcmpltq_m_f32): Remove.
31808 (__arm_vcmpltq_m_n_f32): Remove.
31809 (__arm_vcmpneq_m_f32): Remove.
31810 (__arm_vcmpneq_m_n_f32): Remove.
31811 (__arm_vcmpneq): Remove.
31812 (__arm_vcmphiq): Remove.
31813 (__arm_vcmpeqq): Remove.
31814 (__arm_vcmpcsq): Remove.
31815 (__arm_vcmpltq): Remove.
31816 (__arm_vcmpleq): Remove.
31817 (__arm_vcmpgtq): Remove.
31818 (__arm_vcmpgeq): Remove.
31819 (__arm_vcmpneq_m): Remove.
31820 (__arm_vcmphiq_m): Remove.
31821 (__arm_vcmpeqq_m): Remove.
31822 (__arm_vcmpcsq_m): Remove.
31823 (__arm_vcmpltq_m): Remove.
31824 (__arm_vcmpleq_m): Remove.
31825 (__arm_vcmpgtq_m): Remove.
31826 (__arm_vcmpgeq_m): Remove.
31828 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31830 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
31831 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
31833 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
31835 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
31836 (MVE_CMP_M_N_F, mve_cmp_op1): New.
31839 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
31840 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
31841 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
31842 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
31843 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
31844 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
31845 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
31846 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
31847 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
31848 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
31850 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
31851 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
31852 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
31853 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
31854 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
31856 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
31857 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
31858 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
31859 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
31860 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
31862 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
31864 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
31865 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
31866 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
31869 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
31871 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
31872 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
31873 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
31874 Simplify parity(rotate(x,y)) as parity(x).
31876 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31878 * config/riscv/autovec.md (@vec_series<mode>): New pattern
31879 * config/riscv/riscv-protos.h (expand_vec_series): New function.
31880 * config/riscv/riscv-v.cc (emit_binop): Ditto.
31881 (emit_index_op): Ditto.
31882 (expand_vec_series): Ditto.
31883 (expand_const_vector): Add series vector handling.
31884 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
31886 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
31888 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
31889 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
31890 (*concat<mode><dwi>3_2): Likewise.
31891 (*concat<mode><dwi>3_3): Likewise.
31892 (*concat<mode><dwi>3_4): Likewise.
31893 (*concat<mode><dwi>3_5): Likewise.
31894 (*concat<mode><dwi>3_6): Likewise.
31895 (*concat<mode><dwi>3_7): Likewise.
31897 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
31900 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
31901 (<insn>v4qiv4hi2): New expander.
31902 (<insn>v2hiv2si2): Ditto.
31903 (<insn>v2qiv2si2): Ditto.
31904 (<insn>v2qiv2hi2): Ditto.
31906 2023-05-10 Jeff Law <jlaw@ventanamicro>
31908 * config/h8300/constraints.md (Q): Make this a special memory
31912 2023-05-10 Jakub Jelinek <jakub@redhat.com>
31915 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
31916 if t is void_list_node.
31918 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31920 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
31921 (aarch64_sqmovun<mode>_insn_be): Delete.
31922 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
31923 (aarch64_sqmovun<mode>): Delete expander.
31925 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31928 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
31930 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
31931 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
31932 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
31934 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31937 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
31939 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
31940 (aarch64_<sur>qadd<mode>): Rename to...
31941 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
31943 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31945 * config/aarch64/aarch64-simd.md
31946 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
31947 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
31948 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
31949 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
31951 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31954 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
31955 (aarch64_xtn<mode>_insn_be): Likewise.
31956 (trunc<mode><Vnarrowq>2): Rename to...
31957 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
31958 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
31959 (aarch64_<su>qmovn<mode>): Likewise.
31960 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
31961 (aarch64_<su>qmovn<mode>_insn_le): Delete.
31962 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
31964 2023-05-10 Li Xu <xuli1@eswincomputing.com>
31966 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
31967 intruction replace null avl with (const_int 0).
31969 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31971 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
31974 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31977 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
31978 (source_equal_p): Fix dead loop in vsetvl avl checking.
31980 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
31982 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
31983 of modeadjusted_dccr.
31985 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
31987 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
31988 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
31989 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
31990 * config/arm/arm-mve-builtins.cc
31991 (function_instance::has_inactive_argument): Handle vmaxaq and
31993 * config/arm/arm_mve.h (vminaq): Remove.
31995 (vminaq_m): Remove.
31996 (vmaxaq_m): Remove.
31997 (vminaq_s8): Remove.
31998 (vmaxaq_s8): Remove.
31999 (vminaq_s16): Remove.
32000 (vmaxaq_s16): Remove.
32001 (vminaq_s32): Remove.
32002 (vmaxaq_s32): Remove.
32003 (vminaq_m_s8): Remove.
32004 (vmaxaq_m_s8): Remove.
32005 (vminaq_m_s16): Remove.
32006 (vmaxaq_m_s16): Remove.
32007 (vminaq_m_s32): Remove.
32008 (vmaxaq_m_s32): Remove.
32009 (__arm_vminaq_s8): Remove.
32010 (__arm_vmaxaq_s8): Remove.
32011 (__arm_vminaq_s16): Remove.
32012 (__arm_vmaxaq_s16): Remove.
32013 (__arm_vminaq_s32): Remove.
32014 (__arm_vmaxaq_s32): Remove.
32015 (__arm_vminaq_m_s8): Remove.
32016 (__arm_vmaxaq_m_s8): Remove.
32017 (__arm_vminaq_m_s16): Remove.
32018 (__arm_vmaxaq_m_s16): Remove.
32019 (__arm_vminaq_m_s32): Remove.
32020 (__arm_vmaxaq_m_s32): Remove.
32021 (__arm_vminaq): Remove.
32022 (__arm_vmaxaq): Remove.
32023 (__arm_vminaq_m): Remove.
32024 (__arm_vmaxaq_m): Remove.
32026 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32028 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
32030 (mve_insn): Add vmaxa, vmina.
32031 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
32032 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
32034 (@mve_<mve_insn>q_<supf><mode>): ... this.
32035 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
32036 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32038 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32040 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
32041 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
32043 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32045 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
32046 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
32047 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
32048 * config/arm/arm-mve-builtins.cc
32049 (function_instance::has_inactive_argument): Handle vmaxnmaq and
32051 * config/arm/arm_mve.h (vminnmaq): Remove.
32052 (vmaxnmaq): Remove.
32053 (vmaxnmaq_m): Remove.
32054 (vminnmaq_m): Remove.
32055 (vminnmaq_f16): Remove.
32056 (vmaxnmaq_f16): Remove.
32057 (vminnmaq_f32): Remove.
32058 (vmaxnmaq_f32): Remove.
32059 (vmaxnmaq_m_f16): Remove.
32060 (vminnmaq_m_f16): Remove.
32061 (vmaxnmaq_m_f32): Remove.
32062 (vminnmaq_m_f32): Remove.
32063 (__arm_vminnmaq_f16): Remove.
32064 (__arm_vmaxnmaq_f16): Remove.
32065 (__arm_vminnmaq_f32): Remove.
32066 (__arm_vmaxnmaq_f32): Remove.
32067 (__arm_vmaxnmaq_m_f16): Remove.
32068 (__arm_vminnmaq_m_f16): Remove.
32069 (__arm_vmaxnmaq_m_f32): Remove.
32070 (__arm_vminnmaq_m_f32): Remove.
32071 (__arm_vminnmaq): Remove.
32072 (__arm_vmaxnmaq): Remove.
32073 (__arm_vmaxnmaq_m): Remove.
32074 (__arm_vminnmaq_m): Remove.
32076 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32078 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
32079 (MVE_VMAXNMA_VMINNMAQ_M): New.
32080 (mve_insn): Add vmaxnma, vminnma.
32081 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
32083 (@mve_<mve_insn>q_f<mode>): ... this.
32084 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
32085 (@mve_<mve_insn>q_m_f<mode>): ... this.
32087 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32089 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
32090 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
32091 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
32092 (vminnmavq, vminnmvq): New.
32093 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
32094 (vminnmavq, vminnmvq): New.
32095 * config/arm/arm_mve.h (vminnmvq): Remove.
32096 (vminnmavq): Remove.
32097 (vmaxnmvq): Remove.
32098 (vmaxnmavq): Remove.
32099 (vmaxnmavq_p): Remove.
32100 (vmaxnmvq_p): Remove.
32101 (vminnmavq_p): Remove.
32102 (vminnmvq_p): Remove.
32103 (vminnmvq_f16): Remove.
32104 (vminnmavq_f16): Remove.
32105 (vmaxnmvq_f16): Remove.
32106 (vmaxnmavq_f16): Remove.
32107 (vminnmvq_f32): Remove.
32108 (vminnmavq_f32): Remove.
32109 (vmaxnmvq_f32): Remove.
32110 (vmaxnmavq_f32): Remove.
32111 (vmaxnmavq_p_f16): Remove.
32112 (vmaxnmvq_p_f16): Remove.
32113 (vminnmavq_p_f16): Remove.
32114 (vminnmvq_p_f16): Remove.
32115 (vmaxnmavq_p_f32): Remove.
32116 (vmaxnmvq_p_f32): Remove.
32117 (vminnmavq_p_f32): Remove.
32118 (vminnmvq_p_f32): Remove.
32119 (__arm_vminnmvq_f16): Remove.
32120 (__arm_vminnmavq_f16): Remove.
32121 (__arm_vmaxnmvq_f16): Remove.
32122 (__arm_vmaxnmavq_f16): Remove.
32123 (__arm_vminnmvq_f32): Remove.
32124 (__arm_vminnmavq_f32): Remove.
32125 (__arm_vmaxnmvq_f32): Remove.
32126 (__arm_vmaxnmavq_f32): Remove.
32127 (__arm_vmaxnmavq_p_f16): Remove.
32128 (__arm_vmaxnmvq_p_f16): Remove.
32129 (__arm_vminnmavq_p_f16): Remove.
32130 (__arm_vminnmvq_p_f16): Remove.
32131 (__arm_vmaxnmavq_p_f32): Remove.
32132 (__arm_vmaxnmvq_p_f32): Remove.
32133 (__arm_vminnmavq_p_f32): Remove.
32134 (__arm_vminnmvq_p_f32): Remove.
32135 (__arm_vminnmvq): Remove.
32136 (__arm_vminnmavq): Remove.
32137 (__arm_vmaxnmvq): Remove.
32138 (__arm_vmaxnmavq): Remove.
32139 (__arm_vmaxnmavq_p): Remove.
32140 (__arm_vmaxnmvq_p): Remove.
32141 (__arm_vminnmavq_p): Remove.
32142 (__arm_vminnmvq_p): Remove.
32143 (__arm_vmaxnmavq_m): Remove.
32144 (__arm_vmaxnmvq_m): Remove.
32146 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32148 * config/arm/arm-mve-builtins-functions.h
32149 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
32151 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32153 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
32154 (MVE_VMAXNMxV_MINNMxVQ_P): New.
32155 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
32156 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
32157 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
32158 (@mve_<mve_insn>q_f<mode>): ... this.
32159 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
32160 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
32161 (@mve_<mve_insn>q_p_f<mode>): ... this.
32163 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32165 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
32166 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
32167 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
32168 * config/arm/arm_mve.h (vminnmq): Remove.
32170 (vmaxnmq_m): Remove.
32171 (vminnmq_m): Remove.
32172 (vminnmq_x): Remove.
32173 (vmaxnmq_x): Remove.
32174 (vminnmq_f16): Remove.
32175 (vmaxnmq_f16): Remove.
32176 (vminnmq_f32): Remove.
32177 (vmaxnmq_f32): Remove.
32178 (vmaxnmq_m_f32): Remove.
32179 (vmaxnmq_m_f16): Remove.
32180 (vminnmq_m_f32): Remove.
32181 (vminnmq_m_f16): Remove.
32182 (vminnmq_x_f16): Remove.
32183 (vminnmq_x_f32): Remove.
32184 (vmaxnmq_x_f16): Remove.
32185 (vmaxnmq_x_f32): Remove.
32186 (__arm_vminnmq_f16): Remove.
32187 (__arm_vmaxnmq_f16): Remove.
32188 (__arm_vminnmq_f32): Remove.
32189 (__arm_vmaxnmq_f32): Remove.
32190 (__arm_vmaxnmq_m_f32): Remove.
32191 (__arm_vmaxnmq_m_f16): Remove.
32192 (__arm_vminnmq_m_f32): Remove.
32193 (__arm_vminnmq_m_f16): Remove.
32194 (__arm_vminnmq_x_f16): Remove.
32195 (__arm_vminnmq_x_f32): Remove.
32196 (__arm_vmaxnmq_x_f16): Remove.
32197 (__arm_vmaxnmq_x_f32): Remove.
32198 (__arm_vminnmq): Remove.
32199 (__arm_vmaxnmq): Remove.
32200 (__arm_vmaxnmq_m): Remove.
32201 (__arm_vminnmq_m): Remove.
32202 (__arm_vminnmq_x): Remove.
32203 (__arm_vmaxnmq_x): Remove.
32205 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32207 * config/arm/iterators.md (MAX_MIN_F): New.
32208 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
32209 (mve_insn): Add vmaxnm, vminnm.
32210 (max_min_f_str): New.
32211 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
32213 (@mve_<max_min_f_str>q_f<mode>): ... this.
32214 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
32215 (@mve_<mve_insn>q_m_f<mode>): ... this.
32217 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32219 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
32220 (smax<mode>3): Likewise.
32222 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32224 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
32225 (FUNCTION_PRED_P_S): New.
32226 (vmaxavq, vminavq, vmaxvq, vminvq): New.
32227 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
32229 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
32231 * config/arm/arm_mve.h (vminvq): Remove.
32233 (vminvq_p): Remove.
32234 (vmaxvq_p): Remove.
32235 (vminvq_u8): Remove.
32236 (vmaxvq_u8): Remove.
32237 (vminvq_s8): Remove.
32238 (vmaxvq_s8): Remove.
32239 (vminvq_u16): Remove.
32240 (vmaxvq_u16): Remove.
32241 (vminvq_s16): Remove.
32242 (vmaxvq_s16): Remove.
32243 (vminvq_u32): Remove.
32244 (vmaxvq_u32): Remove.
32245 (vminvq_s32): Remove.
32246 (vmaxvq_s32): Remove.
32247 (vminvq_p_u8): Remove.
32248 (vmaxvq_p_u8): Remove.
32249 (vminvq_p_s8): Remove.
32250 (vmaxvq_p_s8): Remove.
32251 (vminvq_p_u16): Remove.
32252 (vmaxvq_p_u16): Remove.
32253 (vminvq_p_s16): Remove.
32254 (vmaxvq_p_s16): Remove.
32255 (vminvq_p_u32): Remove.
32256 (vmaxvq_p_u32): Remove.
32257 (vminvq_p_s32): Remove.
32258 (vmaxvq_p_s32): Remove.
32259 (__arm_vminvq_u8): Remove.
32260 (__arm_vmaxvq_u8): Remove.
32261 (__arm_vminvq_s8): Remove.
32262 (__arm_vmaxvq_s8): Remove.
32263 (__arm_vminvq_u16): Remove.
32264 (__arm_vmaxvq_u16): Remove.
32265 (__arm_vminvq_s16): Remove.
32266 (__arm_vmaxvq_s16): Remove.
32267 (__arm_vminvq_u32): Remove.
32268 (__arm_vmaxvq_u32): Remove.
32269 (__arm_vminvq_s32): Remove.
32270 (__arm_vmaxvq_s32): Remove.
32271 (__arm_vminvq_p_u8): Remove.
32272 (__arm_vmaxvq_p_u8): Remove.
32273 (__arm_vminvq_p_s8): Remove.
32274 (__arm_vmaxvq_p_s8): Remove.
32275 (__arm_vminvq_p_u16): Remove.
32276 (__arm_vmaxvq_p_u16): Remove.
32277 (__arm_vminvq_p_s16): Remove.
32278 (__arm_vmaxvq_p_s16): Remove.
32279 (__arm_vminvq_p_u32): Remove.
32280 (__arm_vmaxvq_p_u32): Remove.
32281 (__arm_vminvq_p_s32): Remove.
32282 (__arm_vmaxvq_p_s32): Remove.
32283 (__arm_vminvq): Remove.
32284 (__arm_vmaxvq): Remove.
32285 (__arm_vminvq_p): Remove.
32286 (__arm_vmaxvq_p): Remove.
32289 (vminavq_p): Remove.
32290 (vmaxavq_p): Remove.
32291 (vminavq_s8): Remove.
32292 (vmaxavq_s8): Remove.
32293 (vminavq_s16): Remove.
32294 (vmaxavq_s16): Remove.
32295 (vminavq_s32): Remove.
32296 (vmaxavq_s32): Remove.
32297 (vminavq_p_s8): Remove.
32298 (vmaxavq_p_s8): Remove.
32299 (vminavq_p_s16): Remove.
32300 (vmaxavq_p_s16): Remove.
32301 (vminavq_p_s32): Remove.
32302 (vmaxavq_p_s32): Remove.
32303 (__arm_vminavq_s8): Remove.
32304 (__arm_vmaxavq_s8): Remove.
32305 (__arm_vminavq_s16): Remove.
32306 (__arm_vmaxavq_s16): Remove.
32307 (__arm_vminavq_s32): Remove.
32308 (__arm_vmaxavq_s32): Remove.
32309 (__arm_vminavq_p_s8): Remove.
32310 (__arm_vmaxavq_p_s8): Remove.
32311 (__arm_vminavq_p_s16): Remove.
32312 (__arm_vmaxavq_p_s16): Remove.
32313 (__arm_vminavq_p_s32): Remove.
32314 (__arm_vmaxavq_p_s32): Remove.
32315 (__arm_vminavq): Remove.
32316 (__arm_vmaxavq): Remove.
32317 (__arm_vminavq_p): Remove.
32318 (__arm_vmaxavq_p): Remove.
32320 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32322 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
32323 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
32324 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
32325 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
32326 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
32327 (@mve_<mve_insn>q_<supf><mode>): ... this.
32328 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
32329 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
32330 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
32332 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32334 * config/arm/arm-mve-builtins-functions.h (class
32335 unspec_mve_function_exact_insn_pred_p): New.
32337 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32339 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
32340 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
32342 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32344 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
32345 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
32347 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
32349 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
32351 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
32352 (ADJUST_REG_ALLOC_ORDER): Likewise.
32353 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
32355 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
32356 Upa rather than Upl for unpredicated movprfx alternatives.
32358 2023-05-09 Jeff Law <jlaw@ventanamicro>
32360 * config/h8300/testcompare.md: Add peephole2 which uses a memory
32361 load to set flags, thus eliminating a compare against zero.
32363 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32365 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
32366 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
32367 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
32368 * config/arm/arm_mve.h (vshlltq): Remove.
32370 (vshllbq_m): Remove.
32371 (vshlltq_m): Remove.
32372 (vshllbq_x): Remove.
32373 (vshlltq_x): Remove.
32374 (vshlltq_n_u8): Remove.
32375 (vshllbq_n_u8): Remove.
32376 (vshlltq_n_s8): Remove.
32377 (vshllbq_n_s8): Remove.
32378 (vshlltq_n_u16): Remove.
32379 (vshllbq_n_u16): Remove.
32380 (vshlltq_n_s16): Remove.
32381 (vshllbq_n_s16): Remove.
32382 (vshllbq_m_n_s8): Remove.
32383 (vshllbq_m_n_s16): Remove.
32384 (vshllbq_m_n_u8): Remove.
32385 (vshllbq_m_n_u16): Remove.
32386 (vshlltq_m_n_s8): Remove.
32387 (vshlltq_m_n_s16): Remove.
32388 (vshlltq_m_n_u8): Remove.
32389 (vshlltq_m_n_u16): Remove.
32390 (vshllbq_x_n_s8): Remove.
32391 (vshllbq_x_n_s16): Remove.
32392 (vshllbq_x_n_u8): Remove.
32393 (vshllbq_x_n_u16): Remove.
32394 (vshlltq_x_n_s8): Remove.
32395 (vshlltq_x_n_s16): Remove.
32396 (vshlltq_x_n_u8): Remove.
32397 (vshlltq_x_n_u16): Remove.
32398 (__arm_vshlltq_n_u8): Remove.
32399 (__arm_vshllbq_n_u8): Remove.
32400 (__arm_vshlltq_n_s8): Remove.
32401 (__arm_vshllbq_n_s8): Remove.
32402 (__arm_vshlltq_n_u16): Remove.
32403 (__arm_vshllbq_n_u16): Remove.
32404 (__arm_vshlltq_n_s16): Remove.
32405 (__arm_vshllbq_n_s16): Remove.
32406 (__arm_vshllbq_m_n_s8): Remove.
32407 (__arm_vshllbq_m_n_s16): Remove.
32408 (__arm_vshllbq_m_n_u8): Remove.
32409 (__arm_vshllbq_m_n_u16): Remove.
32410 (__arm_vshlltq_m_n_s8): Remove.
32411 (__arm_vshlltq_m_n_s16): Remove.
32412 (__arm_vshlltq_m_n_u8): Remove.
32413 (__arm_vshlltq_m_n_u16): Remove.
32414 (__arm_vshllbq_x_n_s8): Remove.
32415 (__arm_vshllbq_x_n_s16): Remove.
32416 (__arm_vshllbq_x_n_u8): Remove.
32417 (__arm_vshllbq_x_n_u16): Remove.
32418 (__arm_vshlltq_x_n_s8): Remove.
32419 (__arm_vshlltq_x_n_s16): Remove.
32420 (__arm_vshlltq_x_n_u8): Remove.
32421 (__arm_vshlltq_x_n_u16): Remove.
32422 (__arm_vshlltq): Remove.
32423 (__arm_vshllbq): Remove.
32424 (__arm_vshllbq_m): Remove.
32425 (__arm_vshlltq_m): Remove.
32426 (__arm_vshllbq_x): Remove.
32427 (__arm_vshlltq_x): Remove.
32429 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32431 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
32432 (VSHLLBQ_N, VSHLLTQ_N): Remove.
32434 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
32435 (VSHLLxQ_M_N): New.
32436 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
32437 (mve_vshlltq_n_<supf><mode>): Merge into ...
32438 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32439 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
32441 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32443 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32445 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
32446 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
32448 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32450 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
32451 (vqmovntq, vqmovunbq, vqmovuntq): New.
32452 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
32453 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
32454 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
32455 (vqmovntq, vqmovunbq, vqmovuntq): New.
32456 * config/arm/arm-mve-builtins.cc
32457 (function_instance::has_inactive_argument): Handle vmovnbq,
32458 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
32459 * config/arm/arm_mve.h (vqmovntq): Remove.
32460 (vqmovnbq): Remove.
32461 (vqmovnbq_m): Remove.
32462 (vqmovntq_m): Remove.
32463 (vqmovntq_u16): Remove.
32464 (vqmovnbq_u16): Remove.
32465 (vqmovntq_s16): Remove.
32466 (vqmovnbq_s16): Remove.
32467 (vqmovntq_u32): Remove.
32468 (vqmovnbq_u32): Remove.
32469 (vqmovntq_s32): Remove.
32470 (vqmovnbq_s32): Remove.
32471 (vqmovnbq_m_s16): Remove.
32472 (vqmovntq_m_s16): Remove.
32473 (vqmovnbq_m_u16): Remove.
32474 (vqmovntq_m_u16): Remove.
32475 (vqmovnbq_m_s32): Remove.
32476 (vqmovntq_m_s32): Remove.
32477 (vqmovnbq_m_u32): Remove.
32478 (vqmovntq_m_u32): Remove.
32479 (__arm_vqmovntq_u16): Remove.
32480 (__arm_vqmovnbq_u16): Remove.
32481 (__arm_vqmovntq_s16): Remove.
32482 (__arm_vqmovnbq_s16): Remove.
32483 (__arm_vqmovntq_u32): Remove.
32484 (__arm_vqmovnbq_u32): Remove.
32485 (__arm_vqmovntq_s32): Remove.
32486 (__arm_vqmovnbq_s32): Remove.
32487 (__arm_vqmovnbq_m_s16): Remove.
32488 (__arm_vqmovntq_m_s16): Remove.
32489 (__arm_vqmovnbq_m_u16): Remove.
32490 (__arm_vqmovntq_m_u16): Remove.
32491 (__arm_vqmovnbq_m_s32): Remove.
32492 (__arm_vqmovntq_m_s32): Remove.
32493 (__arm_vqmovnbq_m_u32): Remove.
32494 (__arm_vqmovntq_m_u32): Remove.
32495 (__arm_vqmovntq): Remove.
32496 (__arm_vqmovnbq): Remove.
32497 (__arm_vqmovnbq_m): Remove.
32498 (__arm_vqmovntq_m): Remove.
32501 (vmovnbq_m): Remove.
32502 (vmovntq_m): Remove.
32503 (vmovntq_u16): Remove.
32504 (vmovnbq_u16): Remove.
32505 (vmovntq_s16): Remove.
32506 (vmovnbq_s16): Remove.
32507 (vmovntq_u32): Remove.
32508 (vmovnbq_u32): Remove.
32509 (vmovntq_s32): Remove.
32510 (vmovnbq_s32): Remove.
32511 (vmovnbq_m_s16): Remove.
32512 (vmovntq_m_s16): Remove.
32513 (vmovnbq_m_u16): Remove.
32514 (vmovntq_m_u16): Remove.
32515 (vmovnbq_m_s32): Remove.
32516 (vmovntq_m_s32): Remove.
32517 (vmovnbq_m_u32): Remove.
32518 (vmovntq_m_u32): Remove.
32519 (__arm_vmovntq_u16): Remove.
32520 (__arm_vmovnbq_u16): Remove.
32521 (__arm_vmovntq_s16): Remove.
32522 (__arm_vmovnbq_s16): Remove.
32523 (__arm_vmovntq_u32): Remove.
32524 (__arm_vmovnbq_u32): Remove.
32525 (__arm_vmovntq_s32): Remove.
32526 (__arm_vmovnbq_s32): Remove.
32527 (__arm_vmovnbq_m_s16): Remove.
32528 (__arm_vmovntq_m_s16): Remove.
32529 (__arm_vmovnbq_m_u16): Remove.
32530 (__arm_vmovntq_m_u16): Remove.
32531 (__arm_vmovnbq_m_s32): Remove.
32532 (__arm_vmovntq_m_s32): Remove.
32533 (__arm_vmovnbq_m_u32): Remove.
32534 (__arm_vmovntq_m_u32): Remove.
32535 (__arm_vmovntq): Remove.
32536 (__arm_vmovnbq): Remove.
32537 (__arm_vmovnbq_m): Remove.
32538 (__arm_vmovntq_m): Remove.
32539 (vqmovuntq): Remove.
32540 (vqmovunbq): Remove.
32541 (vqmovunbq_m): Remove.
32542 (vqmovuntq_m): Remove.
32543 (vqmovuntq_s16): Remove.
32544 (vqmovunbq_s16): Remove.
32545 (vqmovuntq_s32): Remove.
32546 (vqmovunbq_s32): Remove.
32547 (vqmovunbq_m_s16): Remove.
32548 (vqmovuntq_m_s16): Remove.
32549 (vqmovunbq_m_s32): Remove.
32550 (vqmovuntq_m_s32): Remove.
32551 (__arm_vqmovuntq_s16): Remove.
32552 (__arm_vqmovunbq_s16): Remove.
32553 (__arm_vqmovuntq_s32): Remove.
32554 (__arm_vqmovunbq_s32): Remove.
32555 (__arm_vqmovunbq_m_s16): Remove.
32556 (__arm_vqmovuntq_m_s16): Remove.
32557 (__arm_vqmovunbq_m_s32): Remove.
32558 (__arm_vqmovuntq_m_s32): Remove.
32559 (__arm_vqmovuntq): Remove.
32560 (__arm_vqmovunbq): Remove.
32561 (__arm_vqmovunbq_m): Remove.
32562 (__arm_vqmovuntq_m): Remove.
32564 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32566 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
32567 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
32570 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
32572 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
32573 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
32574 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
32575 (mve_vqmovuntq_s<mode>): Merge into ...
32576 (@mve_<mve_insn>q_<supf><mode>): ... this.
32577 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
32578 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
32579 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
32580 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32582 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32584 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
32585 (binary_move_narrow_unsigned): New.
32586 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
32587 (binary_move_narrow_unsigned): New.
32589 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32591 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
32592 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
32593 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
32594 (vrndpq, vrndq, vrndxq): New.
32595 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
32596 (vrndpq, vrndq, vrndxq): New.
32597 * config/arm/arm_mve.h (vrndxq): Remove.
32603 (vrndaq_m): Remove.
32604 (vrndmq_m): Remove.
32605 (vrndnq_m): Remove.
32606 (vrndpq_m): Remove.
32608 (vrndxq_m): Remove.
32610 (vrndnq_x): Remove.
32611 (vrndmq_x): Remove.
32612 (vrndpq_x): Remove.
32613 (vrndaq_x): Remove.
32614 (vrndxq_x): Remove.
32615 (vrndxq_f16): Remove.
32616 (vrndxq_f32): Remove.
32617 (vrndq_f16): Remove.
32618 (vrndq_f32): Remove.
32619 (vrndpq_f16): Remove.
32620 (vrndpq_f32): Remove.
32621 (vrndnq_f16): Remove.
32622 (vrndnq_f32): Remove.
32623 (vrndmq_f16): Remove.
32624 (vrndmq_f32): Remove.
32625 (vrndaq_f16): Remove.
32626 (vrndaq_f32): Remove.
32627 (vrndaq_m_f16): Remove.
32628 (vrndmq_m_f16): Remove.
32629 (vrndnq_m_f16): Remove.
32630 (vrndpq_m_f16): Remove.
32631 (vrndq_m_f16): Remove.
32632 (vrndxq_m_f16): Remove.
32633 (vrndaq_m_f32): Remove.
32634 (vrndmq_m_f32): Remove.
32635 (vrndnq_m_f32): Remove.
32636 (vrndpq_m_f32): Remove.
32637 (vrndq_m_f32): Remove.
32638 (vrndxq_m_f32): Remove.
32639 (vrndq_x_f16): Remove.
32640 (vrndq_x_f32): Remove.
32641 (vrndnq_x_f16): Remove.
32642 (vrndnq_x_f32): Remove.
32643 (vrndmq_x_f16): Remove.
32644 (vrndmq_x_f32): Remove.
32645 (vrndpq_x_f16): Remove.
32646 (vrndpq_x_f32): Remove.
32647 (vrndaq_x_f16): Remove.
32648 (vrndaq_x_f32): Remove.
32649 (vrndxq_x_f16): Remove.
32650 (vrndxq_x_f32): Remove.
32651 (__arm_vrndxq_f16): Remove.
32652 (__arm_vrndxq_f32): Remove.
32653 (__arm_vrndq_f16): Remove.
32654 (__arm_vrndq_f32): Remove.
32655 (__arm_vrndpq_f16): Remove.
32656 (__arm_vrndpq_f32): Remove.
32657 (__arm_vrndnq_f16): Remove.
32658 (__arm_vrndnq_f32): Remove.
32659 (__arm_vrndmq_f16): Remove.
32660 (__arm_vrndmq_f32): Remove.
32661 (__arm_vrndaq_f16): Remove.
32662 (__arm_vrndaq_f32): Remove.
32663 (__arm_vrndaq_m_f16): Remove.
32664 (__arm_vrndmq_m_f16): Remove.
32665 (__arm_vrndnq_m_f16): Remove.
32666 (__arm_vrndpq_m_f16): Remove.
32667 (__arm_vrndq_m_f16): Remove.
32668 (__arm_vrndxq_m_f16): Remove.
32669 (__arm_vrndaq_m_f32): Remove.
32670 (__arm_vrndmq_m_f32): Remove.
32671 (__arm_vrndnq_m_f32): Remove.
32672 (__arm_vrndpq_m_f32): Remove.
32673 (__arm_vrndq_m_f32): Remove.
32674 (__arm_vrndxq_m_f32): Remove.
32675 (__arm_vrndq_x_f16): Remove.
32676 (__arm_vrndq_x_f32): Remove.
32677 (__arm_vrndnq_x_f16): Remove.
32678 (__arm_vrndnq_x_f32): Remove.
32679 (__arm_vrndmq_x_f16): Remove.
32680 (__arm_vrndmq_x_f32): Remove.
32681 (__arm_vrndpq_x_f16): Remove.
32682 (__arm_vrndpq_x_f32): Remove.
32683 (__arm_vrndaq_x_f16): Remove.
32684 (__arm_vrndaq_x_f32): Remove.
32685 (__arm_vrndxq_x_f16): Remove.
32686 (__arm_vrndxq_x_f32): Remove.
32687 (__arm_vrndxq): Remove.
32688 (__arm_vrndq): Remove.
32689 (__arm_vrndpq): Remove.
32690 (__arm_vrndnq): Remove.
32691 (__arm_vrndmq): Remove.
32692 (__arm_vrndaq): Remove.
32693 (__arm_vrndaq_m): Remove.
32694 (__arm_vrndmq_m): Remove.
32695 (__arm_vrndnq_m): Remove.
32696 (__arm_vrndpq_m): Remove.
32697 (__arm_vrndq_m): Remove.
32698 (__arm_vrndxq_m): Remove.
32699 (__arm_vrndq_x): Remove.
32700 (__arm_vrndnq_x): Remove.
32701 (__arm_vrndmq_x): Remove.
32702 (__arm_vrndpq_x): Remove.
32703 (__arm_vrndaq_x): Remove.
32704 (__arm_vrndxq_x): Remove.
32706 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32708 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
32709 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
32710 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
32711 (vclzq, vqabsq, vqnegq): New.
32712 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
32713 (vqabsq, vqnegq): New.
32714 * config/arm/arm_mve.h (vabsq): Remove.
32717 (vabsq_f16): Remove.
32718 (vabsq_f32): Remove.
32719 (vabsq_s8): Remove.
32720 (vabsq_s16): Remove.
32721 (vabsq_s32): Remove.
32722 (vabsq_m_s8): Remove.
32723 (vabsq_m_s16): Remove.
32724 (vabsq_m_s32): Remove.
32725 (vabsq_m_f16): Remove.
32726 (vabsq_m_f32): Remove.
32727 (vabsq_x_s8): Remove.
32728 (vabsq_x_s16): Remove.
32729 (vabsq_x_s32): Remove.
32730 (vabsq_x_f16): Remove.
32731 (vabsq_x_f32): Remove.
32732 (__arm_vabsq_s8): Remove.
32733 (__arm_vabsq_s16): Remove.
32734 (__arm_vabsq_s32): Remove.
32735 (__arm_vabsq_m_s8): Remove.
32736 (__arm_vabsq_m_s16): Remove.
32737 (__arm_vabsq_m_s32): Remove.
32738 (__arm_vabsq_x_s8): Remove.
32739 (__arm_vabsq_x_s16): Remove.
32740 (__arm_vabsq_x_s32): Remove.
32741 (__arm_vabsq_f16): Remove.
32742 (__arm_vabsq_f32): Remove.
32743 (__arm_vabsq_m_f16): Remove.
32744 (__arm_vabsq_m_f32): Remove.
32745 (__arm_vabsq_x_f16): Remove.
32746 (__arm_vabsq_x_f32): Remove.
32747 (__arm_vabsq): Remove.
32748 (__arm_vabsq_m): Remove.
32749 (__arm_vabsq_x): Remove.
32753 (vnegq_f16): Remove.
32754 (vnegq_f32): Remove.
32755 (vnegq_s8): Remove.
32756 (vnegq_s16): Remove.
32757 (vnegq_s32): Remove.
32758 (vnegq_m_s8): Remove.
32759 (vnegq_m_s16): Remove.
32760 (vnegq_m_s32): Remove.
32761 (vnegq_m_f16): Remove.
32762 (vnegq_m_f32): Remove.
32763 (vnegq_x_s8): Remove.
32764 (vnegq_x_s16): Remove.
32765 (vnegq_x_s32): Remove.
32766 (vnegq_x_f16): Remove.
32767 (vnegq_x_f32): Remove.
32768 (__arm_vnegq_s8): Remove.
32769 (__arm_vnegq_s16): Remove.
32770 (__arm_vnegq_s32): Remove.
32771 (__arm_vnegq_m_s8): Remove.
32772 (__arm_vnegq_m_s16): Remove.
32773 (__arm_vnegq_m_s32): Remove.
32774 (__arm_vnegq_x_s8): Remove.
32775 (__arm_vnegq_x_s16): Remove.
32776 (__arm_vnegq_x_s32): Remove.
32777 (__arm_vnegq_f16): Remove.
32778 (__arm_vnegq_f32): Remove.
32779 (__arm_vnegq_m_f16): Remove.
32780 (__arm_vnegq_m_f32): Remove.
32781 (__arm_vnegq_x_f16): Remove.
32782 (__arm_vnegq_x_f32): Remove.
32783 (__arm_vnegq): Remove.
32784 (__arm_vnegq_m): Remove.
32785 (__arm_vnegq_x): Remove.
32789 (vclsq_s8): Remove.
32790 (vclsq_s16): Remove.
32791 (vclsq_s32): Remove.
32792 (vclsq_m_s8): Remove.
32793 (vclsq_m_s16): Remove.
32794 (vclsq_m_s32): Remove.
32795 (vclsq_x_s8): Remove.
32796 (vclsq_x_s16): Remove.
32797 (vclsq_x_s32): Remove.
32798 (__arm_vclsq_s8): Remove.
32799 (__arm_vclsq_s16): Remove.
32800 (__arm_vclsq_s32): Remove.
32801 (__arm_vclsq_m_s8): Remove.
32802 (__arm_vclsq_m_s16): Remove.
32803 (__arm_vclsq_m_s32): Remove.
32804 (__arm_vclsq_x_s8): Remove.
32805 (__arm_vclsq_x_s16): Remove.
32806 (__arm_vclsq_x_s32): Remove.
32807 (__arm_vclsq): Remove.
32808 (__arm_vclsq_m): Remove.
32809 (__arm_vclsq_x): Remove.
32813 (vclzq_s8): Remove.
32814 (vclzq_s16): Remove.
32815 (vclzq_s32): Remove.
32816 (vclzq_u8): Remove.
32817 (vclzq_u16): Remove.
32818 (vclzq_u32): Remove.
32819 (vclzq_m_u8): Remove.
32820 (vclzq_m_s8): Remove.
32821 (vclzq_m_u16): Remove.
32822 (vclzq_m_s16): Remove.
32823 (vclzq_m_u32): Remove.
32824 (vclzq_m_s32): Remove.
32825 (vclzq_x_s8): Remove.
32826 (vclzq_x_s16): Remove.
32827 (vclzq_x_s32): Remove.
32828 (vclzq_x_u8): Remove.
32829 (vclzq_x_u16): Remove.
32830 (vclzq_x_u32): Remove.
32831 (__arm_vclzq_s8): Remove.
32832 (__arm_vclzq_s16): Remove.
32833 (__arm_vclzq_s32): Remove.
32834 (__arm_vclzq_u8): Remove.
32835 (__arm_vclzq_u16): Remove.
32836 (__arm_vclzq_u32): Remove.
32837 (__arm_vclzq_m_u8): Remove.
32838 (__arm_vclzq_m_s8): Remove.
32839 (__arm_vclzq_m_u16): Remove.
32840 (__arm_vclzq_m_s16): Remove.
32841 (__arm_vclzq_m_u32): Remove.
32842 (__arm_vclzq_m_s32): Remove.
32843 (__arm_vclzq_x_s8): Remove.
32844 (__arm_vclzq_x_s16): Remove.
32845 (__arm_vclzq_x_s32): Remove.
32846 (__arm_vclzq_x_u8): Remove.
32847 (__arm_vclzq_x_u16): Remove.
32848 (__arm_vclzq_x_u32): Remove.
32849 (__arm_vclzq): Remove.
32850 (__arm_vclzq_m): Remove.
32851 (__arm_vclzq_x): Remove.
32854 (vqnegq_m): Remove.
32855 (vqabsq_m): Remove.
32856 (vqabsq_s8): Remove.
32857 (vqabsq_s16): Remove.
32858 (vqabsq_s32): Remove.
32859 (vqnegq_s8): Remove.
32860 (vqnegq_s16): Remove.
32861 (vqnegq_s32): Remove.
32862 (vqnegq_m_s8): Remove.
32863 (vqabsq_m_s8): Remove.
32864 (vqnegq_m_s16): Remove.
32865 (vqabsq_m_s16): Remove.
32866 (vqnegq_m_s32): Remove.
32867 (vqabsq_m_s32): Remove.
32868 (__arm_vqabsq_s8): Remove.
32869 (__arm_vqabsq_s16): Remove.
32870 (__arm_vqabsq_s32): Remove.
32871 (__arm_vqnegq_s8): Remove.
32872 (__arm_vqnegq_s16): Remove.
32873 (__arm_vqnegq_s32): Remove.
32874 (__arm_vqnegq_m_s8): Remove.
32875 (__arm_vqabsq_m_s8): Remove.
32876 (__arm_vqnegq_m_s16): Remove.
32877 (__arm_vqabsq_m_s16): Remove.
32878 (__arm_vqnegq_m_s32): Remove.
32879 (__arm_vqabsq_m_s32): Remove.
32880 (__arm_vqabsq): Remove.
32881 (__arm_vqnegq): Remove.
32882 (__arm_vqnegq_m): Remove.
32883 (__arm_vqabsq_m): Remove.
32885 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32887 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
32888 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
32889 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
32890 vrndm, vrndn, vrndp, vrnd, vrndx.
32891 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
32892 VQABSQ_M_S, VQNEGQ_M_S.
32894 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
32895 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
32896 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
32897 (@mve_<mve_insn>q_f<mode>): ... this.
32898 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
32899 (mve_v<absneg_str>q_f<mode>): ... this.
32900 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
32901 (mve_v<absneg_str>q_s<mode>): ... this.
32902 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
32903 (@mve_<mve_insn>q_<supf><mode>): ... this.
32904 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
32905 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
32906 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
32907 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32908 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
32909 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
32910 (mve_vrndxq_m_f<mode>): Merge into ...
32911 (@mve_<mve_insn>q_m_f<mode>): ... this.
32913 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
32915 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
32916 * config/arm/arm-mve-builtins-shapes.h (unary): New.
32918 2023-05-09 Jakub Jelinek <jakub@redhat.com>
32920 * mux-utils.h: Fix comment typo, avoides -> avoids.
32922 2023-05-09 Jakub Jelinek <jakub@redhat.com>
32924 PR tree-optimization/109778
32925 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
32926 wi::zext (x, width) rather than x if width != precision, rather
32927 than using wi::zext (right, width) after the shift.
32928 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
32929 of wi::lrotate or wi::rrotate.
32931 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
32933 * genmatch.cc (get_out_file): Make static and rename to ...
32934 (choose_output): ... this. Reimplement. Update all uses ...
32935 (decision_tree::gen): ... here and ...
32938 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
32940 * genmatch.cc (showUsage): Reimplement as ...
32941 (usage): ...this. Adjust all uses.
32942 (main): Print usage when no arguments. Add missing 'return 1'.
32944 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
32946 * genmatch.cc (header_file): Make static.
32947 (emit_func): Rename to...
32948 (fp_decl): ... this. Adjust all uses.
32949 (fp_decl_done): New function. Use it...
32950 (decision_tree::gen): ... here and...
32951 (write_predicate): ... here.
32954 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
32956 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
32959 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
32960 Uros Bizjak <ubizjak@gmail.com>
32962 * config/i386/i386.md (any_or_plus): Move definition earlier.
32963 (*insvti_highpart_1): New define_insn_and_split to overwrite
32964 (insv) the highpart of a TImode register/memory.
32966 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
32968 * auto-profile.cc (auto_profile): Check todo from early_inline
32969 to see if cleanup_tree_vfg needs to be called.
32970 (early_inline): Return todo from early_inliner.
32972 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
32974 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
32976 (pass_vsetvl::get_block_info): New.
32977 (pass_vsetvl::update_vector_info): New.
32978 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
32979 (pass_vsetvl::compute_local_backward_infos): Ditto.
32980 (pass_vsetvl::transfer_before): Ditto.
32981 (pass_vsetvl::transfer_after): Ditto.
32982 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
32983 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
32984 (pass_vsetvl::cleanup_insns): Ditto.
32985 (pass_vsetvl::compute_local_backward_infos): Use
32986 update_vector_info.
32988 2023-05-08 Jeff Law <jlaw@ventanamicro>
32990 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
32992 2023-05-08 Richard Biener <rguenther@suse.de>
32993 Michael Meissner <meissner@linux.ibm.com>
32995 PR middle-end/108623
32996 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
32997 Align bit fields > 1 bit to at least an 8-bit boundary.
32999 2023-05-08 Andrew Pinski <apinski@marvell.com>
33001 PR tree-optimization/109424
33002 PR tree-optimization/59424
33003 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
33004 (factor_out_conditional_operation): This and add support for all unary
33006 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
33007 to call factor_out_conditional_operation instead.
33009 2023-05-08 Andrew Pinski <apinski@marvell.com>
33011 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
33012 over factor_out_conditional_conversion.
33014 2023-05-08 Andrew Pinski <apinski@marvell.com>
33016 PR tree-optimization/49959
33017 PR tree-optimization/103771
33018 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
33019 Diamond shapped bb form for factor_out_conditional_conversion.
33021 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33023 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
33024 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
33025 (riscv_vector_get_mask_mode): Ditto.
33026 (get_mask_policy_no_pred): Ditto.
33027 (get_tail_policy_no_pred): Ditto.
33028 (get_mask_mode): New function.
33029 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
33030 (get_tail_policy_no_pred): Ditto.
33031 (riscv_vector_mask_mode_p): Ditto.
33032 (riscv_vector_get_mask_mode): Ditto.
33033 (get_mask_mode): New function.
33034 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
33036 (get_tail_policy_for_pred): Ditto.
33037 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
33038 (get_mask_policy_for_pred): Ditto
33039 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
33041 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
33043 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
33044 (riscv_select_multilib): New.
33045 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
33046 also handle select_by_abi.
33047 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
33048 to select_by_abi_arch_cmodel from 1.
33049 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
33050 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
33052 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
33054 * Makefile.in: (gimple-match-head.o-warn): Remove.
33055 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
33056 gimple-match-exports.cc.
33057 (gimple-match-auto.h): Only depend on s-gimple-match.
33058 (generic-match-auto.h): Likewise.
33060 2023-05-08 Andrew Pinski <apinski@marvell.com>
33062 PR tree-optimization/109691
33063 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
33065 If the removed statement can throw, have need_eh_cleanup
33066 include the bb of that statement.
33067 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
33068 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
33070 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
33071 Initialize dceworklist instead of stmts_to_remove.
33072 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
33073 Destore dceworklist instead of stmts_to_remove.
33074 (substitute_and_fold_dom_walker::before_dom_children):
33075 Set dceworklist instead of adding to stmts_to_remove.
33076 (substitute_and_fold_engine::substitute_and_fold):
33077 Call simple_dce_from_worklist instead of poping
33079 Don't update the stat on removal statements.
33081 2023-05-07 Andrew Pinski <apinski@marvell.com>
33084 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
33085 Change argument type to aarch64_feature_flags.
33086 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
33087 constructor argument type to aarch64_feature_flags.
33088 Change m_old_asm_isa_flags to be aarch64_feature_flags.
33090 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
33092 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
33093 more parallel code if can_create_pseudo_p.
33095 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
33098 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
33099 immediately before moving a multi-word register by parts.
33101 2023-05-06 Jeff Law <jlaw@ventanamicro>
33103 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
33105 2023-05-06 Michael Collison <collison@rivosinc.com>
33107 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
33108 Check that GET_MODE_NUNITS is a multiple of 2.
33110 2023-05-06 Michael Collison <collison@rivosinc.com>
33112 * config/riscv/riscv.cc
33113 (riscv_estimated_poly_value): Implement
33114 TARGET_ESTIMATED_POLY_VALUE.
33115 (riscv_preferred_simd_mode): Implement
33116 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
33117 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
33118 (riscv_empty_mask_is_expensive): Implement
33119 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
33120 (riscv_vectorize_create_costs): Implement
33121 TARGET_VECTORIZE_CREATE_COSTS.
33122 (riscv_support_vector_misalignment): Implement
33123 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
33124 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
33125 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
33126 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
33127 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
33129 2023-05-06 Jeff Law <jlaw@ventanamicro>
33131 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
33132 duplicate definition.
33134 2023-05-06 Michael Collison <collison@rivosinc.com>
33136 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
33137 (riscv_vector_preferred_simd_mode): Ditto.
33138 (get_mask_policy_no_pred): Ditto.
33139 (get_tail_policy_no_pred): Ditto.
33140 (riscv_vector_mask_mode_p): Ditto.
33141 (riscv_vector_get_mask_mode): Ditto.
33143 2023-05-06 Michael Collison <collison@rivosinc.com>
33145 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
33146 Remove static declaration to to make externally visible.
33147 (get_mask_policy_for_pred): Ditto.
33148 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
33149 New external declaration.
33150 (get_mask_policy_for_pred): Ditto.
33152 2023-05-06 Michael Collison <collison@rivosinc.com>
33154 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
33155 (riscv_vector_get_mask_mode): Ditto.
33156 (get_mask_policy_no_pred): Ditto.
33157 (get_tail_policy_no_pred): Ditto.
33159 2023-05-06 Xi Ruoyao <xry111@xry111.site>
33161 * config/loongarch/loongarch.h (struct machine_function): Add
33162 reg_is_wrapped_separately array for register wrapping
33164 * config/loongarch/loongarch.cc
33165 (loongarch_get_separate_components): New function.
33166 (loongarch_components_for_bb): Likewise.
33167 (loongarch_disqualify_components): Likewise.
33168 (loongarch_process_components): Likewise.
33169 (loongarch_emit_prologue_components): Likewise.
33170 (loongarch_emit_epilogue_components): Likewise.
33171 (loongarch_set_handled_components): Likewise.
33172 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
33173 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
33174 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
33175 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
33176 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
33177 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
33178 (loongarch_for_each_saved_reg): Skip registers that are wrapped
33181 2023-05-06 Xi Ruoyao <xry111@xry111.site>
33184 * Makefile.in (s-macro_list): Pass -nostdinc to
33187 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33189 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
33190 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
33191 (preferred_simd_mode): Ditto.
33192 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
33193 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
33194 (riscv_preferred_simd_mode): New function.
33195 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
33196 * config/riscv/vector.md: Add autovec.md.
33197 * config/riscv/autovec.md: New file.
33199 2023-05-06 Jakub Jelinek <jakub@redhat.com>
33201 * real.h (dconst_pi): Define.
33202 (dconst_e_ptr): Formatting fix.
33203 (dconst_pi_ptr): Declare.
33204 * real.cc (dconst_pi_ptr): New function.
33205 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
33206 boundaries range with range computed from sin/cos of the particular
33207 bounds if the argument range is shorter than 2*pi.
33208 (cfn_sincos::op1_range): Take bulps into account when determining
33209 which result ranges are always invalid or behave like known NAN.
33211 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
33213 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
33214 pass type to vrange_storage::equal_p.
33215 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
33216 (irange_storage::equal_p): Same.
33217 (frange_storage::equal_p): Same.
33218 * value-range-storage.h (class frange_storage): Same.
33220 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33223 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
33224 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
33226 2023-05-06 liuhongt <hongtao.liu@intel.com>
33228 * combine.cc (maybe_swap_commutative_operands): Canonicalize
33229 vec_merge when mask is constant.
33230 * doc/md.texi: Document vec_merge canonicalization.
33232 2023-05-06 Jakub Jelinek <jakub@redhat.com>
33234 * value-range.h (frange_arithmetic): Declare.
33235 * range-op-float.cc (frange_arithmetic): No longer static.
33236 * gimple-range-op.cc (frange_mpfr_arg1): New function.
33237 (cfn_sqrt::fold_range): Intersect the generic boundaries range
33238 with range computed from sqrt of the particular bounds.
33239 (cfn_sqrt::op1_range): Intersect the generic boundaries range
33240 with range computed from squared particular bounds.
33242 2023-05-06 Jakub Jelinek <jakub@redhat.com>
33244 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
33245 earlier with helper variables also renamed.
33246 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
33247 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
33248 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
33250 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
33252 * config/cris/cris.md (splitop): Add PLUS.
33253 * config/cris/cris.cc (cris_split_constant): Also handle
33254 PLUS when a split into two insns may be useful.
33256 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
33258 * config/cris/cris.md (movandsplit1): New define_peephole2.
33260 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
33262 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
33264 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
33266 * doc/md.texi (define_peephole2): Document order of scanning.
33268 2023-05-05 Pan Li <pan2.li@intel.com>
33269 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33271 * config/riscv/vector.md: Allow const as the operand of RVV
33272 indexed load/store.
33274 2023-05-05 Pan Li <pan2.li@intel.com>
33276 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
33277 consumed by simplify_rtx.
33279 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33281 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
33282 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
33283 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
33284 * config/arm/arm_mve.h (vshrq): Remove.
33286 (vrshrq_m): Remove.
33288 (vrshrq_x): Remove.
33290 (vshrq_n_s8): Remove.
33291 (vshrq_n_s16): Remove.
33292 (vshrq_n_s32): Remove.
33293 (vshrq_n_u8): Remove.
33294 (vshrq_n_u16): Remove.
33295 (vshrq_n_u32): Remove.
33296 (vrshrq_n_u8): Remove.
33297 (vrshrq_n_s8): Remove.
33298 (vrshrq_n_u16): Remove.
33299 (vrshrq_n_s16): Remove.
33300 (vrshrq_n_u32): Remove.
33301 (vrshrq_n_s32): Remove.
33302 (vrshrq_m_n_s8): Remove.
33303 (vrshrq_m_n_s32): Remove.
33304 (vrshrq_m_n_s16): Remove.
33305 (vrshrq_m_n_u8): Remove.
33306 (vrshrq_m_n_u32): Remove.
33307 (vrshrq_m_n_u16): Remove.
33308 (vshrq_m_n_s8): Remove.
33309 (vshrq_m_n_s32): Remove.
33310 (vshrq_m_n_s16): Remove.
33311 (vshrq_m_n_u8): Remove.
33312 (vshrq_m_n_u32): Remove.
33313 (vshrq_m_n_u16): Remove.
33314 (vrshrq_x_n_s8): Remove.
33315 (vrshrq_x_n_s16): Remove.
33316 (vrshrq_x_n_s32): Remove.
33317 (vrshrq_x_n_u8): Remove.
33318 (vrshrq_x_n_u16): Remove.
33319 (vrshrq_x_n_u32): Remove.
33320 (vshrq_x_n_s8): Remove.
33321 (vshrq_x_n_s16): Remove.
33322 (vshrq_x_n_s32): Remove.
33323 (vshrq_x_n_u8): Remove.
33324 (vshrq_x_n_u16): Remove.
33325 (vshrq_x_n_u32): Remove.
33326 (__arm_vshrq_n_s8): Remove.
33327 (__arm_vshrq_n_s16): Remove.
33328 (__arm_vshrq_n_s32): Remove.
33329 (__arm_vshrq_n_u8): Remove.
33330 (__arm_vshrq_n_u16): Remove.
33331 (__arm_vshrq_n_u32): Remove.
33332 (__arm_vrshrq_n_u8): Remove.
33333 (__arm_vrshrq_n_s8): Remove.
33334 (__arm_vrshrq_n_u16): Remove.
33335 (__arm_vrshrq_n_s16): Remove.
33336 (__arm_vrshrq_n_u32): Remove.
33337 (__arm_vrshrq_n_s32): Remove.
33338 (__arm_vrshrq_m_n_s8): Remove.
33339 (__arm_vrshrq_m_n_s32): Remove.
33340 (__arm_vrshrq_m_n_s16): Remove.
33341 (__arm_vrshrq_m_n_u8): Remove.
33342 (__arm_vrshrq_m_n_u32): Remove.
33343 (__arm_vrshrq_m_n_u16): Remove.
33344 (__arm_vshrq_m_n_s8): Remove.
33345 (__arm_vshrq_m_n_s32): Remove.
33346 (__arm_vshrq_m_n_s16): Remove.
33347 (__arm_vshrq_m_n_u8): Remove.
33348 (__arm_vshrq_m_n_u32): Remove.
33349 (__arm_vshrq_m_n_u16): Remove.
33350 (__arm_vrshrq_x_n_s8): Remove.
33351 (__arm_vrshrq_x_n_s16): Remove.
33352 (__arm_vrshrq_x_n_s32): Remove.
33353 (__arm_vrshrq_x_n_u8): Remove.
33354 (__arm_vrshrq_x_n_u16): Remove.
33355 (__arm_vrshrq_x_n_u32): Remove.
33356 (__arm_vshrq_x_n_s8): Remove.
33357 (__arm_vshrq_x_n_s16): Remove.
33358 (__arm_vshrq_x_n_s32): Remove.
33359 (__arm_vshrq_x_n_u8): Remove.
33360 (__arm_vshrq_x_n_u16): Remove.
33361 (__arm_vshrq_x_n_u32): Remove.
33362 (__arm_vshrq): Remove.
33363 (__arm_vrshrq): Remove.
33364 (__arm_vrshrq_m): Remove.
33365 (__arm_vshrq_m): Remove.
33366 (__arm_vrshrq_x): Remove.
33367 (__arm_vshrq_x): Remove.
33369 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33371 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
33372 (mve_insn): Add vrshr, vshr.
33373 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
33374 (mve_vrshrq_n_<supf><mode>): Merge into ...
33375 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
33376 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
33378 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
33380 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33382 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
33383 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
33385 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33387 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
33388 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
33389 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
33390 (vqrshrunbq, vqrshruntq): New.
33391 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
33392 (vqrshrunbq, vqrshruntq): New.
33393 * config/arm/arm-mve-builtins.cc
33394 (function_instance::has_inactive_argument): Handle vqshrunbq,
33395 vqshruntq, vqrshrunbq, vqrshruntq.
33396 * config/arm/arm_mve.h (vqrshrunbq): Remove.
33397 (vqrshruntq): Remove.
33398 (vqrshrunbq_m): Remove.
33399 (vqrshruntq_m): Remove.
33400 (vqrshrunbq_n_s16): Remove.
33401 (vqrshrunbq_n_s32): Remove.
33402 (vqrshruntq_n_s16): Remove.
33403 (vqrshruntq_n_s32): Remove.
33404 (vqrshrunbq_m_n_s32): Remove.
33405 (vqrshrunbq_m_n_s16): Remove.
33406 (vqrshruntq_m_n_s32): Remove.
33407 (vqrshruntq_m_n_s16): Remove.
33408 (__arm_vqrshrunbq_n_s16): Remove.
33409 (__arm_vqrshrunbq_n_s32): Remove.
33410 (__arm_vqrshruntq_n_s16): Remove.
33411 (__arm_vqrshruntq_n_s32): Remove.
33412 (__arm_vqrshrunbq_m_n_s32): Remove.
33413 (__arm_vqrshrunbq_m_n_s16): Remove.
33414 (__arm_vqrshruntq_m_n_s32): Remove.
33415 (__arm_vqrshruntq_m_n_s16): Remove.
33416 (__arm_vqrshrunbq): Remove.
33417 (__arm_vqrshruntq): Remove.
33418 (__arm_vqrshrunbq_m): Remove.
33419 (__arm_vqrshruntq_m): Remove.
33420 (vqshrunbq): Remove.
33421 (vqshruntq): Remove.
33422 (vqshrunbq_m): Remove.
33423 (vqshruntq_m): Remove.
33424 (vqshrunbq_n_s16): Remove.
33425 (vqshruntq_n_s16): Remove.
33426 (vqshrunbq_n_s32): Remove.
33427 (vqshruntq_n_s32): Remove.
33428 (vqshrunbq_m_n_s32): Remove.
33429 (vqshrunbq_m_n_s16): Remove.
33430 (vqshruntq_m_n_s32): Remove.
33431 (vqshruntq_m_n_s16): Remove.
33432 (__arm_vqshrunbq_n_s16): Remove.
33433 (__arm_vqshruntq_n_s16): Remove.
33434 (__arm_vqshrunbq_n_s32): Remove.
33435 (__arm_vqshruntq_n_s32): Remove.
33436 (__arm_vqshrunbq_m_n_s32): Remove.
33437 (__arm_vqshrunbq_m_n_s16): Remove.
33438 (__arm_vqshruntq_m_n_s32): Remove.
33439 (__arm_vqshruntq_m_n_s16): Remove.
33440 (__arm_vqshrunbq): Remove.
33441 (__arm_vqshruntq): Remove.
33442 (__arm_vqshrunbq_m): Remove.
33443 (__arm_vqshruntq_m): Remove.
33445 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33447 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
33448 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
33449 (MVE_SHRN_M_N): Likewise.
33450 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
33451 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
33453 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
33454 (mve_vqrshruntq_n_s<mode>): Remove.
33455 (mve_vqshrunbq_n_s<mode>): Remove.
33456 (mve_vqshruntq_n_s<mode>): Remove.
33457 (mve_vqrshrunbq_m_n_s<mode>): Remove.
33458 (mve_vqrshruntq_m_n_s<mode>): Remove.
33459 (mve_vqshrunbq_m_n_s<mode>): Remove.
33460 (mve_vqshruntq_m_n_s<mode>): Remove.
33462 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33464 * config/arm/arm-mve-builtins-shapes.cc
33465 (binary_rshift_narrow_unsigned): New.
33466 * config/arm/arm-mve-builtins-shapes.h
33467 (binary_rshift_narrow_unsigned): New.
33469 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33471 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
33472 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
33473 (vqrshrnbq, vqrshrntq): New.
33474 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
33475 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
33477 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
33478 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
33479 * config/arm/arm-mve-builtins.cc
33480 (function_instance::has_inactive_argument): Handle vshrnbq,
33481 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
33483 * config/arm/arm_mve.h (vshrnbq): Remove.
33485 (vshrnbq_m): Remove.
33486 (vshrntq_m): Remove.
33487 (vshrnbq_n_s16): Remove.
33488 (vshrntq_n_s16): Remove.
33489 (vshrnbq_n_u16): Remove.
33490 (vshrntq_n_u16): Remove.
33491 (vshrnbq_n_s32): Remove.
33492 (vshrntq_n_s32): Remove.
33493 (vshrnbq_n_u32): Remove.
33494 (vshrntq_n_u32): Remove.
33495 (vshrnbq_m_n_s32): Remove.
33496 (vshrnbq_m_n_s16): Remove.
33497 (vshrnbq_m_n_u32): Remove.
33498 (vshrnbq_m_n_u16): Remove.
33499 (vshrntq_m_n_s32): Remove.
33500 (vshrntq_m_n_s16): Remove.
33501 (vshrntq_m_n_u32): Remove.
33502 (vshrntq_m_n_u16): Remove.
33503 (__arm_vshrnbq_n_s16): Remove.
33504 (__arm_vshrntq_n_s16): Remove.
33505 (__arm_vshrnbq_n_u16): Remove.
33506 (__arm_vshrntq_n_u16): Remove.
33507 (__arm_vshrnbq_n_s32): Remove.
33508 (__arm_vshrntq_n_s32): Remove.
33509 (__arm_vshrnbq_n_u32): Remove.
33510 (__arm_vshrntq_n_u32): Remove.
33511 (__arm_vshrnbq_m_n_s32): Remove.
33512 (__arm_vshrnbq_m_n_s16): Remove.
33513 (__arm_vshrnbq_m_n_u32): Remove.
33514 (__arm_vshrnbq_m_n_u16): Remove.
33515 (__arm_vshrntq_m_n_s32): Remove.
33516 (__arm_vshrntq_m_n_s16): Remove.
33517 (__arm_vshrntq_m_n_u32): Remove.
33518 (__arm_vshrntq_m_n_u16): Remove.
33519 (__arm_vshrnbq): Remove.
33520 (__arm_vshrntq): Remove.
33521 (__arm_vshrnbq_m): Remove.
33522 (__arm_vshrntq_m): Remove.
33523 (vrshrnbq): Remove.
33524 (vrshrntq): Remove.
33525 (vrshrnbq_m): Remove.
33526 (vrshrntq_m): Remove.
33527 (vrshrnbq_n_s16): Remove.
33528 (vrshrntq_n_s16): Remove.
33529 (vrshrnbq_n_u16): Remove.
33530 (vrshrntq_n_u16): Remove.
33531 (vrshrnbq_n_s32): Remove.
33532 (vrshrntq_n_s32): Remove.
33533 (vrshrnbq_n_u32): Remove.
33534 (vrshrntq_n_u32): Remove.
33535 (vrshrnbq_m_n_s32): Remove.
33536 (vrshrnbq_m_n_s16): Remove.
33537 (vrshrnbq_m_n_u32): Remove.
33538 (vrshrnbq_m_n_u16): Remove.
33539 (vrshrntq_m_n_s32): Remove.
33540 (vrshrntq_m_n_s16): Remove.
33541 (vrshrntq_m_n_u32): Remove.
33542 (vrshrntq_m_n_u16): Remove.
33543 (__arm_vrshrnbq_n_s16): Remove.
33544 (__arm_vrshrntq_n_s16): Remove.
33545 (__arm_vrshrnbq_n_u16): Remove.
33546 (__arm_vrshrntq_n_u16): Remove.
33547 (__arm_vrshrnbq_n_s32): Remove.
33548 (__arm_vrshrntq_n_s32): Remove.
33549 (__arm_vrshrnbq_n_u32): Remove.
33550 (__arm_vrshrntq_n_u32): Remove.
33551 (__arm_vrshrnbq_m_n_s32): Remove.
33552 (__arm_vrshrnbq_m_n_s16): Remove.
33553 (__arm_vrshrnbq_m_n_u32): Remove.
33554 (__arm_vrshrnbq_m_n_u16): Remove.
33555 (__arm_vrshrntq_m_n_s32): Remove.
33556 (__arm_vrshrntq_m_n_s16): Remove.
33557 (__arm_vrshrntq_m_n_u32): Remove.
33558 (__arm_vrshrntq_m_n_u16): Remove.
33559 (__arm_vrshrnbq): Remove.
33560 (__arm_vrshrntq): Remove.
33561 (__arm_vrshrnbq_m): Remove.
33562 (__arm_vrshrntq_m): Remove.
33563 (vqshrnbq): Remove.
33564 (vqshrntq): Remove.
33565 (vqshrnbq_m): Remove.
33566 (vqshrntq_m): Remove.
33567 (vqshrnbq_n_s16): Remove.
33568 (vqshrntq_n_s16): Remove.
33569 (vqshrnbq_n_u16): Remove.
33570 (vqshrntq_n_u16): Remove.
33571 (vqshrnbq_n_s32): Remove.
33572 (vqshrntq_n_s32): Remove.
33573 (vqshrnbq_n_u32): Remove.
33574 (vqshrntq_n_u32): Remove.
33575 (vqshrnbq_m_n_s32): Remove.
33576 (vqshrnbq_m_n_s16): Remove.
33577 (vqshrnbq_m_n_u32): Remove.
33578 (vqshrnbq_m_n_u16): Remove.
33579 (vqshrntq_m_n_s32): Remove.
33580 (vqshrntq_m_n_s16): Remove.
33581 (vqshrntq_m_n_u32): Remove.
33582 (vqshrntq_m_n_u16): Remove.
33583 (__arm_vqshrnbq_n_s16): Remove.
33584 (__arm_vqshrntq_n_s16): Remove.
33585 (__arm_vqshrnbq_n_u16): Remove.
33586 (__arm_vqshrntq_n_u16): Remove.
33587 (__arm_vqshrnbq_n_s32): Remove.
33588 (__arm_vqshrntq_n_s32): Remove.
33589 (__arm_vqshrnbq_n_u32): Remove.
33590 (__arm_vqshrntq_n_u32): Remove.
33591 (__arm_vqshrnbq_m_n_s32): Remove.
33592 (__arm_vqshrnbq_m_n_s16): Remove.
33593 (__arm_vqshrnbq_m_n_u32): Remove.
33594 (__arm_vqshrnbq_m_n_u16): Remove.
33595 (__arm_vqshrntq_m_n_s32): Remove.
33596 (__arm_vqshrntq_m_n_s16): Remove.
33597 (__arm_vqshrntq_m_n_u32): Remove.
33598 (__arm_vqshrntq_m_n_u16): Remove.
33599 (__arm_vqshrnbq): Remove.
33600 (__arm_vqshrntq): Remove.
33601 (__arm_vqshrnbq_m): Remove.
33602 (__arm_vqshrntq_m): Remove.
33603 (vqrshrnbq): Remove.
33604 (vqrshrntq): Remove.
33605 (vqrshrnbq_m): Remove.
33606 (vqrshrntq_m): Remove.
33607 (vqrshrnbq_n_s16): Remove.
33608 (vqrshrnbq_n_u16): Remove.
33609 (vqrshrnbq_n_s32): Remove.
33610 (vqrshrnbq_n_u32): Remove.
33611 (vqrshrntq_n_s16): Remove.
33612 (vqrshrntq_n_u16): Remove.
33613 (vqrshrntq_n_s32): Remove.
33614 (vqrshrntq_n_u32): Remove.
33615 (vqrshrnbq_m_n_s32): Remove.
33616 (vqrshrnbq_m_n_s16): Remove.
33617 (vqrshrnbq_m_n_u32): Remove.
33618 (vqrshrnbq_m_n_u16): Remove.
33619 (vqrshrntq_m_n_s32): Remove.
33620 (vqrshrntq_m_n_s16): Remove.
33621 (vqrshrntq_m_n_u32): Remove.
33622 (vqrshrntq_m_n_u16): Remove.
33623 (__arm_vqrshrnbq_n_s16): Remove.
33624 (__arm_vqrshrnbq_n_u16): Remove.
33625 (__arm_vqrshrnbq_n_s32): Remove.
33626 (__arm_vqrshrnbq_n_u32): Remove.
33627 (__arm_vqrshrntq_n_s16): Remove.
33628 (__arm_vqrshrntq_n_u16): Remove.
33629 (__arm_vqrshrntq_n_s32): Remove.
33630 (__arm_vqrshrntq_n_u32): Remove.
33631 (__arm_vqrshrnbq_m_n_s32): Remove.
33632 (__arm_vqrshrnbq_m_n_s16): Remove.
33633 (__arm_vqrshrnbq_m_n_u32): Remove.
33634 (__arm_vqrshrnbq_m_n_u16): Remove.
33635 (__arm_vqrshrntq_m_n_s32): Remove.
33636 (__arm_vqrshrntq_m_n_s16): Remove.
33637 (__arm_vqrshrntq_m_n_u32): Remove.
33638 (__arm_vqrshrntq_m_n_u16): Remove.
33639 (__arm_vqrshrnbq): Remove.
33640 (__arm_vqrshrntq): Remove.
33641 (__arm_vqrshrnbq_m): Remove.
33642 (__arm_vqrshrntq_m): Remove.
33644 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33646 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
33647 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
33648 vrshrnt, vshrnb, vshrnt.
33650 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
33651 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
33652 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
33653 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
33654 (mve_vshrntq_n_<supf><mode>): Merge into ...
33655 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
33656 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
33657 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
33658 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
33659 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
33661 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
33663 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33665 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
33667 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
33669 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33671 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
33672 (vmaxq, vminq): New.
33673 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
33674 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
33675 * config/arm/arm_mve.h (vminq): Remove.
33681 (vminq_u8): Remove.
33682 (vmaxq_u8): Remove.
33683 (vminq_s8): Remove.
33684 (vmaxq_s8): Remove.
33685 (vminq_u16): Remove.
33686 (vmaxq_u16): Remove.
33687 (vminq_s16): Remove.
33688 (vmaxq_s16): Remove.
33689 (vminq_u32): Remove.
33690 (vmaxq_u32): Remove.
33691 (vminq_s32): Remove.
33692 (vmaxq_s32): Remove.
33693 (vmaxq_m_s8): Remove.
33694 (vmaxq_m_s32): Remove.
33695 (vmaxq_m_s16): Remove.
33696 (vmaxq_m_u8): Remove.
33697 (vmaxq_m_u32): Remove.
33698 (vmaxq_m_u16): Remove.
33699 (vminq_m_s8): Remove.
33700 (vminq_m_s32): Remove.
33701 (vminq_m_s16): Remove.
33702 (vminq_m_u8): Remove.
33703 (vminq_m_u32): Remove.
33704 (vminq_m_u16): Remove.
33705 (vminq_x_s8): Remove.
33706 (vminq_x_s16): Remove.
33707 (vminq_x_s32): Remove.
33708 (vminq_x_u8): Remove.
33709 (vminq_x_u16): Remove.
33710 (vminq_x_u32): Remove.
33711 (vmaxq_x_s8): Remove.
33712 (vmaxq_x_s16): Remove.
33713 (vmaxq_x_s32): Remove.
33714 (vmaxq_x_u8): Remove.
33715 (vmaxq_x_u16): Remove.
33716 (vmaxq_x_u32): Remove.
33717 (__arm_vminq_u8): Remove.
33718 (__arm_vmaxq_u8): Remove.
33719 (__arm_vminq_s8): Remove.
33720 (__arm_vmaxq_s8): Remove.
33721 (__arm_vminq_u16): Remove.
33722 (__arm_vmaxq_u16): Remove.
33723 (__arm_vminq_s16): Remove.
33724 (__arm_vmaxq_s16): Remove.
33725 (__arm_vminq_u32): Remove.
33726 (__arm_vmaxq_u32): Remove.
33727 (__arm_vminq_s32): Remove.
33728 (__arm_vmaxq_s32): Remove.
33729 (__arm_vmaxq_m_s8): Remove.
33730 (__arm_vmaxq_m_s32): Remove.
33731 (__arm_vmaxq_m_s16): Remove.
33732 (__arm_vmaxq_m_u8): Remove.
33733 (__arm_vmaxq_m_u32): Remove.
33734 (__arm_vmaxq_m_u16): Remove.
33735 (__arm_vminq_m_s8): Remove.
33736 (__arm_vminq_m_s32): Remove.
33737 (__arm_vminq_m_s16): Remove.
33738 (__arm_vminq_m_u8): Remove.
33739 (__arm_vminq_m_u32): Remove.
33740 (__arm_vminq_m_u16): Remove.
33741 (__arm_vminq_x_s8): Remove.
33742 (__arm_vminq_x_s16): Remove.
33743 (__arm_vminq_x_s32): Remove.
33744 (__arm_vminq_x_u8): Remove.
33745 (__arm_vminq_x_u16): Remove.
33746 (__arm_vminq_x_u32): Remove.
33747 (__arm_vmaxq_x_s8): Remove.
33748 (__arm_vmaxq_x_s16): Remove.
33749 (__arm_vmaxq_x_s32): Remove.
33750 (__arm_vmaxq_x_u8): Remove.
33751 (__arm_vmaxq_x_u16): Remove.
33752 (__arm_vmaxq_x_u32): Remove.
33753 (__arm_vminq): Remove.
33754 (__arm_vmaxq): Remove.
33755 (__arm_vmaxq_m): Remove.
33756 (__arm_vminq_m): Remove.
33757 (__arm_vminq_x): Remove.
33758 (__arm_vmaxq_x): Remove.
33760 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33762 * config/arm/iterators.md (MAX_MIN_SU): New.
33763 (max_min_su_str): New.
33764 (max_min_supf): New.
33765 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
33766 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
33767 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
33769 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33771 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
33772 (vqshlq, vshlq): New.
33773 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
33774 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
33775 * config/arm/arm_mve.h (vshlq): Remove.
33778 (vshlq_m_r): Remove.
33780 (vshlq_m_n): Remove.
33782 (vshlq_x_n): Remove.
33783 (vshlq_s8): Remove.
33784 (vshlq_s16): Remove.
33785 (vshlq_s32): Remove.
33786 (vshlq_u8): Remove.
33787 (vshlq_u16): Remove.
33788 (vshlq_u32): Remove.
33789 (vshlq_r_u8): Remove.
33790 (vshlq_n_u8): Remove.
33791 (vshlq_r_s8): Remove.
33792 (vshlq_n_s8): Remove.
33793 (vshlq_r_u16): Remove.
33794 (vshlq_n_u16): Remove.
33795 (vshlq_r_s16): Remove.
33796 (vshlq_n_s16): Remove.
33797 (vshlq_r_u32): Remove.
33798 (vshlq_n_u32): Remove.
33799 (vshlq_r_s32): Remove.
33800 (vshlq_n_s32): Remove.
33801 (vshlq_m_r_u8): Remove.
33802 (vshlq_m_r_s8): Remove.
33803 (vshlq_m_r_u16): Remove.
33804 (vshlq_m_r_s16): Remove.
33805 (vshlq_m_r_u32): Remove.
33806 (vshlq_m_r_s32): Remove.
33807 (vshlq_m_u8): Remove.
33808 (vshlq_m_s8): Remove.
33809 (vshlq_m_u16): Remove.
33810 (vshlq_m_s16): Remove.
33811 (vshlq_m_u32): Remove.
33812 (vshlq_m_s32): Remove.
33813 (vshlq_m_n_s8): Remove.
33814 (vshlq_m_n_s32): Remove.
33815 (vshlq_m_n_s16): Remove.
33816 (vshlq_m_n_u8): Remove.
33817 (vshlq_m_n_u32): Remove.
33818 (vshlq_m_n_u16): Remove.
33819 (vshlq_x_s8): Remove.
33820 (vshlq_x_s16): Remove.
33821 (vshlq_x_s32): Remove.
33822 (vshlq_x_u8): Remove.
33823 (vshlq_x_u16): Remove.
33824 (vshlq_x_u32): Remove.
33825 (vshlq_x_n_s8): Remove.
33826 (vshlq_x_n_s16): Remove.
33827 (vshlq_x_n_s32): Remove.
33828 (vshlq_x_n_u8): Remove.
33829 (vshlq_x_n_u16): Remove.
33830 (vshlq_x_n_u32): Remove.
33831 (__arm_vshlq_s8): Remove.
33832 (__arm_vshlq_s16): Remove.
33833 (__arm_vshlq_s32): Remove.
33834 (__arm_vshlq_u8): Remove.
33835 (__arm_vshlq_u16): Remove.
33836 (__arm_vshlq_u32): Remove.
33837 (__arm_vshlq_r_u8): Remove.
33838 (__arm_vshlq_n_u8): Remove.
33839 (__arm_vshlq_r_s8): Remove.
33840 (__arm_vshlq_n_s8): Remove.
33841 (__arm_vshlq_r_u16): Remove.
33842 (__arm_vshlq_n_u16): Remove.
33843 (__arm_vshlq_r_s16): Remove.
33844 (__arm_vshlq_n_s16): Remove.
33845 (__arm_vshlq_r_u32): Remove.
33846 (__arm_vshlq_n_u32): Remove.
33847 (__arm_vshlq_r_s32): Remove.
33848 (__arm_vshlq_n_s32): Remove.
33849 (__arm_vshlq_m_r_u8): Remove.
33850 (__arm_vshlq_m_r_s8): Remove.
33851 (__arm_vshlq_m_r_u16): Remove.
33852 (__arm_vshlq_m_r_s16): Remove.
33853 (__arm_vshlq_m_r_u32): Remove.
33854 (__arm_vshlq_m_r_s32): Remove.
33855 (__arm_vshlq_m_u8): Remove.
33856 (__arm_vshlq_m_s8): Remove.
33857 (__arm_vshlq_m_u16): Remove.
33858 (__arm_vshlq_m_s16): Remove.
33859 (__arm_vshlq_m_u32): Remove.
33860 (__arm_vshlq_m_s32): Remove.
33861 (__arm_vshlq_m_n_s8): Remove.
33862 (__arm_vshlq_m_n_s32): Remove.
33863 (__arm_vshlq_m_n_s16): Remove.
33864 (__arm_vshlq_m_n_u8): Remove.
33865 (__arm_vshlq_m_n_u32): Remove.
33866 (__arm_vshlq_m_n_u16): Remove.
33867 (__arm_vshlq_x_s8): Remove.
33868 (__arm_vshlq_x_s16): Remove.
33869 (__arm_vshlq_x_s32): Remove.
33870 (__arm_vshlq_x_u8): Remove.
33871 (__arm_vshlq_x_u16): Remove.
33872 (__arm_vshlq_x_u32): Remove.
33873 (__arm_vshlq_x_n_s8): Remove.
33874 (__arm_vshlq_x_n_s16): Remove.
33875 (__arm_vshlq_x_n_s32): Remove.
33876 (__arm_vshlq_x_n_u8): Remove.
33877 (__arm_vshlq_x_n_u16): Remove.
33878 (__arm_vshlq_x_n_u32): Remove.
33879 (__arm_vshlq): Remove.
33880 (__arm_vshlq_r): Remove.
33881 (__arm_vshlq_n): Remove.
33882 (__arm_vshlq_m_r): Remove.
33883 (__arm_vshlq_m): Remove.
33884 (__arm_vshlq_m_n): Remove.
33885 (__arm_vshlq_x): Remove.
33886 (__arm_vshlq_x_n): Remove.
33888 (vqshlq_r): Remove.
33889 (vqshlq_n): Remove.
33890 (vqshlq_m_r): Remove.
33891 (vqshlq_m_n): Remove.
33892 (vqshlq_m): Remove.
33893 (vqshlq_u8): Remove.
33894 (vqshlq_r_u8): Remove.
33895 (vqshlq_n_u8): Remove.
33896 (vqshlq_s8): Remove.
33897 (vqshlq_r_s8): Remove.
33898 (vqshlq_n_s8): Remove.
33899 (vqshlq_u16): Remove.
33900 (vqshlq_r_u16): Remove.
33901 (vqshlq_n_u16): Remove.
33902 (vqshlq_s16): Remove.
33903 (vqshlq_r_s16): Remove.
33904 (vqshlq_n_s16): Remove.
33905 (vqshlq_u32): Remove.
33906 (vqshlq_r_u32): Remove.
33907 (vqshlq_n_u32): Remove.
33908 (vqshlq_s32): Remove.
33909 (vqshlq_r_s32): Remove.
33910 (vqshlq_n_s32): Remove.
33911 (vqshlq_m_r_u8): Remove.
33912 (vqshlq_m_r_s8): Remove.
33913 (vqshlq_m_r_u16): Remove.
33914 (vqshlq_m_r_s16): Remove.
33915 (vqshlq_m_r_u32): Remove.
33916 (vqshlq_m_r_s32): Remove.
33917 (vqshlq_m_n_s8): Remove.
33918 (vqshlq_m_n_s32): Remove.
33919 (vqshlq_m_n_s16): Remove.
33920 (vqshlq_m_n_u8): Remove.
33921 (vqshlq_m_n_u32): Remove.
33922 (vqshlq_m_n_u16): Remove.
33923 (vqshlq_m_s8): Remove.
33924 (vqshlq_m_s32): Remove.
33925 (vqshlq_m_s16): Remove.
33926 (vqshlq_m_u8): Remove.
33927 (vqshlq_m_u32): Remove.
33928 (vqshlq_m_u16): Remove.
33929 (__arm_vqshlq_u8): Remove.
33930 (__arm_vqshlq_r_u8): Remove.
33931 (__arm_vqshlq_n_u8): Remove.
33932 (__arm_vqshlq_s8): Remove.
33933 (__arm_vqshlq_r_s8): Remove.
33934 (__arm_vqshlq_n_s8): Remove.
33935 (__arm_vqshlq_u16): Remove.
33936 (__arm_vqshlq_r_u16): Remove.
33937 (__arm_vqshlq_n_u16): Remove.
33938 (__arm_vqshlq_s16): Remove.
33939 (__arm_vqshlq_r_s16): Remove.
33940 (__arm_vqshlq_n_s16): Remove.
33941 (__arm_vqshlq_u32): Remove.
33942 (__arm_vqshlq_r_u32): Remove.
33943 (__arm_vqshlq_n_u32): Remove.
33944 (__arm_vqshlq_s32): Remove.
33945 (__arm_vqshlq_r_s32): Remove.
33946 (__arm_vqshlq_n_s32): Remove.
33947 (__arm_vqshlq_m_r_u8): Remove.
33948 (__arm_vqshlq_m_r_s8): Remove.
33949 (__arm_vqshlq_m_r_u16): Remove.
33950 (__arm_vqshlq_m_r_s16): Remove.
33951 (__arm_vqshlq_m_r_u32): Remove.
33952 (__arm_vqshlq_m_r_s32): Remove.
33953 (__arm_vqshlq_m_n_s8): Remove.
33954 (__arm_vqshlq_m_n_s32): Remove.
33955 (__arm_vqshlq_m_n_s16): Remove.
33956 (__arm_vqshlq_m_n_u8): Remove.
33957 (__arm_vqshlq_m_n_u32): Remove.
33958 (__arm_vqshlq_m_n_u16): Remove.
33959 (__arm_vqshlq_m_s8): Remove.
33960 (__arm_vqshlq_m_s32): Remove.
33961 (__arm_vqshlq_m_s16): Remove.
33962 (__arm_vqshlq_m_u8): Remove.
33963 (__arm_vqshlq_m_u32): Remove.
33964 (__arm_vqshlq_m_u16): Remove.
33965 (__arm_vqshlq): Remove.
33966 (__arm_vqshlq_r): Remove.
33967 (__arm_vqshlq_n): Remove.
33968 (__arm_vqshlq_m_r): Remove.
33969 (__arm_vqshlq_m_n): Remove.
33970 (__arm_vqshlq_m): Remove.
33972 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33974 * config/arm/arm-mve-builtins-functions.h (class
33975 unspec_mve_function_exact_insn_vshl): New.
33977 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33979 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
33980 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
33982 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33984 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
33985 (finish_opt_n_resolution): Handle MODE_r.
33986 * config/arm/arm-mve-builtins.def (r): New mode.
33988 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33990 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
33991 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
33993 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
33995 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
33997 * config/arm/arm-mve-builtins-base.def (vabdq): New.
33998 * config/arm/arm-mve-builtins-base.h (vabdq): New.
33999 * config/arm/arm_mve.h (vabdq): Remove.
34002 (vabdq_u8): Remove.
34003 (vabdq_s8): Remove.
34004 (vabdq_u16): Remove.
34005 (vabdq_s16): Remove.
34006 (vabdq_u32): Remove.
34007 (vabdq_s32): Remove.
34008 (vabdq_f16): Remove.
34009 (vabdq_f32): Remove.
34010 (vabdq_m_s8): Remove.
34011 (vabdq_m_s32): Remove.
34012 (vabdq_m_s16): Remove.
34013 (vabdq_m_u8): Remove.
34014 (vabdq_m_u32): Remove.
34015 (vabdq_m_u16): Remove.
34016 (vabdq_m_f32): Remove.
34017 (vabdq_m_f16): Remove.
34018 (vabdq_x_s8): Remove.
34019 (vabdq_x_s16): Remove.
34020 (vabdq_x_s32): Remove.
34021 (vabdq_x_u8): Remove.
34022 (vabdq_x_u16): Remove.
34023 (vabdq_x_u32): Remove.
34024 (vabdq_x_f16): Remove.
34025 (vabdq_x_f32): Remove.
34026 (__arm_vabdq_u8): Remove.
34027 (__arm_vabdq_s8): Remove.
34028 (__arm_vabdq_u16): Remove.
34029 (__arm_vabdq_s16): Remove.
34030 (__arm_vabdq_u32): Remove.
34031 (__arm_vabdq_s32): Remove.
34032 (__arm_vabdq_m_s8): Remove.
34033 (__arm_vabdq_m_s32): Remove.
34034 (__arm_vabdq_m_s16): Remove.
34035 (__arm_vabdq_m_u8): Remove.
34036 (__arm_vabdq_m_u32): Remove.
34037 (__arm_vabdq_m_u16): Remove.
34038 (__arm_vabdq_x_s8): Remove.
34039 (__arm_vabdq_x_s16): Remove.
34040 (__arm_vabdq_x_s32): Remove.
34041 (__arm_vabdq_x_u8): Remove.
34042 (__arm_vabdq_x_u16): Remove.
34043 (__arm_vabdq_x_u32): Remove.
34044 (__arm_vabdq_f16): Remove.
34045 (__arm_vabdq_f32): Remove.
34046 (__arm_vabdq_m_f32): Remove.
34047 (__arm_vabdq_m_f16): Remove.
34048 (__arm_vabdq_x_f16): Remove.
34049 (__arm_vabdq_x_f32): Remove.
34050 (__arm_vabdq): Remove.
34051 (__arm_vabdq_m): Remove.
34052 (__arm_vabdq_x): Remove.
34054 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34056 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
34057 (MVE_FP_VABDQ_ONLY): New.
34058 (mve_insn): Add vabd.
34059 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
34060 (@mve_<mve_insn>q_f<mode>): ... this.
34061 (mve_vabdq_m_f<mode>): Remove.
34063 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34065 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
34066 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
34067 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
34068 * config/arm/arm_mve.h (vqrdmulhq): Remove.
34069 (vqrdmulhq_m): Remove.
34070 (vqrdmulhq_s8): Remove.
34071 (vqrdmulhq_n_s8): Remove.
34072 (vqrdmulhq_s16): Remove.
34073 (vqrdmulhq_n_s16): Remove.
34074 (vqrdmulhq_s32): Remove.
34075 (vqrdmulhq_n_s32): Remove.
34076 (vqrdmulhq_m_n_s8): Remove.
34077 (vqrdmulhq_m_n_s32): Remove.
34078 (vqrdmulhq_m_n_s16): Remove.
34079 (vqrdmulhq_m_s8): Remove.
34080 (vqrdmulhq_m_s32): Remove.
34081 (vqrdmulhq_m_s16): Remove.
34082 (__arm_vqrdmulhq_s8): Remove.
34083 (__arm_vqrdmulhq_n_s8): Remove.
34084 (__arm_vqrdmulhq_s16): Remove.
34085 (__arm_vqrdmulhq_n_s16): Remove.
34086 (__arm_vqrdmulhq_s32): Remove.
34087 (__arm_vqrdmulhq_n_s32): Remove.
34088 (__arm_vqrdmulhq_m_n_s8): Remove.
34089 (__arm_vqrdmulhq_m_n_s32): Remove.
34090 (__arm_vqrdmulhq_m_n_s16): Remove.
34091 (__arm_vqrdmulhq_m_s8): Remove.
34092 (__arm_vqrdmulhq_m_s32): Remove.
34093 (__arm_vqrdmulhq_m_s16): Remove.
34094 (__arm_vqrdmulhq): Remove.
34095 (__arm_vqrdmulhq_m): Remove.
34097 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34099 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
34100 (MVE_SHIFT_N, MVE_SHIFT_R): New.
34101 (mve_insn): Add vqshl, vshl.
34102 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
34103 (mve_vshlq_n_<supf><mode>): Merge into ...
34104 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34105 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
34107 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
34108 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
34110 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
34111 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
34113 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34114 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
34116 (@mve_<mve_insn>q_<supf><mode>): ... this.
34118 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34120 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
34121 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
34122 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
34123 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
34125 * config/arm/arm_mve.h (vrshlq): Remove.
34126 (vrshlq_m_n): Remove.
34127 (vrshlq_m): Remove.
34128 (vrshlq_x): Remove.
34129 (vrshlq_u8): Remove.
34130 (vrshlq_n_u8): Remove.
34131 (vrshlq_s8): Remove.
34132 (vrshlq_n_s8): Remove.
34133 (vrshlq_u16): Remove.
34134 (vrshlq_n_u16): Remove.
34135 (vrshlq_s16): Remove.
34136 (vrshlq_n_s16): Remove.
34137 (vrshlq_u32): Remove.
34138 (vrshlq_n_u32): Remove.
34139 (vrshlq_s32): Remove.
34140 (vrshlq_n_s32): Remove.
34141 (vrshlq_m_n_u8): Remove.
34142 (vrshlq_m_n_s8): Remove.
34143 (vrshlq_m_n_u16): Remove.
34144 (vrshlq_m_n_s16): Remove.
34145 (vrshlq_m_n_u32): Remove.
34146 (vrshlq_m_n_s32): Remove.
34147 (vrshlq_m_s8): Remove.
34148 (vrshlq_m_s32): Remove.
34149 (vrshlq_m_s16): Remove.
34150 (vrshlq_m_u8): Remove.
34151 (vrshlq_m_u32): Remove.
34152 (vrshlq_m_u16): Remove.
34153 (vrshlq_x_s8): Remove.
34154 (vrshlq_x_s16): Remove.
34155 (vrshlq_x_s32): Remove.
34156 (vrshlq_x_u8): Remove.
34157 (vrshlq_x_u16): Remove.
34158 (vrshlq_x_u32): Remove.
34159 (__arm_vrshlq_u8): Remove.
34160 (__arm_vrshlq_n_u8): Remove.
34161 (__arm_vrshlq_s8): Remove.
34162 (__arm_vrshlq_n_s8): Remove.
34163 (__arm_vrshlq_u16): Remove.
34164 (__arm_vrshlq_n_u16): Remove.
34165 (__arm_vrshlq_s16): Remove.
34166 (__arm_vrshlq_n_s16): Remove.
34167 (__arm_vrshlq_u32): Remove.
34168 (__arm_vrshlq_n_u32): Remove.
34169 (__arm_vrshlq_s32): Remove.
34170 (__arm_vrshlq_n_s32): Remove.
34171 (__arm_vrshlq_m_n_u8): Remove.
34172 (__arm_vrshlq_m_n_s8): Remove.
34173 (__arm_vrshlq_m_n_u16): Remove.
34174 (__arm_vrshlq_m_n_s16): Remove.
34175 (__arm_vrshlq_m_n_u32): Remove.
34176 (__arm_vrshlq_m_n_s32): Remove.
34177 (__arm_vrshlq_m_s8): Remove.
34178 (__arm_vrshlq_m_s32): Remove.
34179 (__arm_vrshlq_m_s16): Remove.
34180 (__arm_vrshlq_m_u8): Remove.
34181 (__arm_vrshlq_m_u32): Remove.
34182 (__arm_vrshlq_m_u16): Remove.
34183 (__arm_vrshlq_x_s8): Remove.
34184 (__arm_vrshlq_x_s16): Remove.
34185 (__arm_vrshlq_x_s32): Remove.
34186 (__arm_vrshlq_x_u8): Remove.
34187 (__arm_vrshlq_x_u16): Remove.
34188 (__arm_vrshlq_x_u32): Remove.
34189 (__arm_vrshlq): Remove.
34190 (__arm_vrshlq_m_n): Remove.
34191 (__arm_vrshlq_m): Remove.
34192 (__arm_vrshlq_x): Remove.
34194 (vqrshlq_m_n): Remove.
34195 (vqrshlq_m): Remove.
34196 (vqrshlq_u8): Remove.
34197 (vqrshlq_n_u8): Remove.
34198 (vqrshlq_s8): Remove.
34199 (vqrshlq_n_s8): Remove.
34200 (vqrshlq_u16): Remove.
34201 (vqrshlq_n_u16): Remove.
34202 (vqrshlq_s16): Remove.
34203 (vqrshlq_n_s16): Remove.
34204 (vqrshlq_u32): Remove.
34205 (vqrshlq_n_u32): Remove.
34206 (vqrshlq_s32): Remove.
34207 (vqrshlq_n_s32): Remove.
34208 (vqrshlq_m_n_u8): Remove.
34209 (vqrshlq_m_n_s8): Remove.
34210 (vqrshlq_m_n_u16): Remove.
34211 (vqrshlq_m_n_s16): Remove.
34212 (vqrshlq_m_n_u32): Remove.
34213 (vqrshlq_m_n_s32): Remove.
34214 (vqrshlq_m_s8): Remove.
34215 (vqrshlq_m_s32): Remove.
34216 (vqrshlq_m_s16): Remove.
34217 (vqrshlq_m_u8): Remove.
34218 (vqrshlq_m_u32): Remove.
34219 (vqrshlq_m_u16): Remove.
34220 (__arm_vqrshlq_u8): Remove.
34221 (__arm_vqrshlq_n_u8): Remove.
34222 (__arm_vqrshlq_s8): Remove.
34223 (__arm_vqrshlq_n_s8): Remove.
34224 (__arm_vqrshlq_u16): Remove.
34225 (__arm_vqrshlq_n_u16): Remove.
34226 (__arm_vqrshlq_s16): Remove.
34227 (__arm_vqrshlq_n_s16): Remove.
34228 (__arm_vqrshlq_u32): Remove.
34229 (__arm_vqrshlq_n_u32): Remove.
34230 (__arm_vqrshlq_s32): Remove.
34231 (__arm_vqrshlq_n_s32): Remove.
34232 (__arm_vqrshlq_m_n_u8): Remove.
34233 (__arm_vqrshlq_m_n_s8): Remove.
34234 (__arm_vqrshlq_m_n_u16): Remove.
34235 (__arm_vqrshlq_m_n_s16): Remove.
34236 (__arm_vqrshlq_m_n_u32): Remove.
34237 (__arm_vqrshlq_m_n_s32): Remove.
34238 (__arm_vqrshlq_m_s8): Remove.
34239 (__arm_vqrshlq_m_s32): Remove.
34240 (__arm_vqrshlq_m_s16): Remove.
34241 (__arm_vqrshlq_m_u8): Remove.
34242 (__arm_vqrshlq_m_u32): Remove.
34243 (__arm_vqrshlq_m_u16): Remove.
34244 (__arm_vqrshlq): Remove.
34245 (__arm_vqrshlq_m_n): Remove.
34246 (__arm_vqrshlq_m): Remove.
34248 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34250 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
34251 (mve_insn): Add vqrshl, vrshl.
34252 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
34253 (mve_vrshlq_n_<supf><mode>): Merge into ...
34254 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
34255 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
34257 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
34259 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
34261 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
34262 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
34264 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34267 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
34268 denegrate PHI optmization.
34270 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
34272 * config/i386/predicates.md (register_no_SP_operand):
34273 Rename from index_register_operand.
34274 (call_register_operand): Update for rename.
34275 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
34277 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34280 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
34281 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
34282 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
34283 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
34284 (s-match): Split into s-generic-match and s-gimple-match.
34285 * configure.ac (with-matchpd-partitions,
34286 DEFAULT_MATCHPD_PARTITIONS): New.
34287 * configure: Regenerate.
34289 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34292 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
34293 (decision_tree::gen): Accept list of files instead of single and update
34294 to write function definition to header and main file.
34295 (write_predicate): Likewise.
34296 (write_header): Emit pragmas and new includes.
34297 (main): Create file buffers and cleanup.
34298 (showUsage, write_header_includes): New.
34300 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34303 * Makefile.in (OBJS): Add gimple-match-exports.o.
34304 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
34305 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
34306 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
34307 gimple_resimplify5, constant_for_folding, convert_conditional_op,
34308 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
34309 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
34310 do_valueize, try_conditional_simplification, gimple_extract,
34311 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
34312 commutative_ternary_op_p, first_commutative_argument,
34313 associative_binary_op_p, directly_supported_p,
34314 get_conditional_internal_fn): Moved to gimple-match-exports.cc
34315 * gimple-match-exports.cc: New file.
34317 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34320 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
34322 (dt_simplify::gen_1): Use it.
34324 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34327 * genmatch.cc (output_line_directive): Only emit commented directive
34330 2023-05-05 Tamar Christina <tamar.christina@arm.com>
34333 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
34335 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
34337 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
34338 unused in_mode/in_n variables.
34340 2023-05-05 Richard Biener <rguenther@suse.de>
34342 PR tree-optimization/109735
34343 * tree-vect-stmts.cc (vectorizable_operation): Perform
34344 conversion for POINTER_DIFF_EXPR unconditionally.
34346 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
34348 * config/i386/mmx.md (mulv2si3): New expander.
34349 (*mulv2si3): New insn pattern.
34351 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
34352 Thomas Schwinge <thomas@codesourcery.com>
34355 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
34356 alongside reverse-offload function table to prevent NULL values
34357 of the function addresses.
34359 2023-05-05 Jakub Jelinek <jakub@redhat.com>
34361 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
34363 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
34365 2023-05-05 Andrew Pinski <apinski@marvell.com>
34367 PR tree-optimization/109732
34368 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
34369 of the argtrue/argfalse.
34371 2023-05-05 Andrew Pinski <apinski@marvell.com>
34373 PR tree-optimization/109722
34374 * match.pd: Extend the `ABS<a> == 0` pattern
34375 to cover `ABSU<a> == 0` too.
34377 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
34380 * config/i386/predicates.md (index_reg_operand): New predicate.
34381 * config/i386/i386.md (ashift to lea spliter): Use
34382 general_reg_operand and index_reg_operand predicates.
34384 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34386 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
34387 Rename and reimplement with RTL codes to...
34388 (aarch64_<optab>hn2<mode>_insn_le): .. This.
34389 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
34390 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
34392 (aarch64_<optab>hn2<mode>_insn_be): ... This.
34393 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
34394 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
34395 (aarch64_<optab>hn2<mode>): ... This.
34396 (aarch64_r<optab>hn2<mode>): New expander.
34397 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
34398 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
34399 (ADDSUBHN): Delete.
34400 (sur): Remove handling of the above.
34401 (addsub): Likewise.
34403 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34405 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
34407 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
34408 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
34409 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
34410 (aarch64_<sur><addsub>hn<mode>): Delete.
34411 (aarch64_<optab>hn<mode>): New define_expand.
34412 (aarch64_r<optab>hn<mode>): Likewise.
34413 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
34416 2023-05-04 Andrew Pinski <apinski@marvell.com>
34418 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
34419 diamond form bb with forwarder only empty blocks better.
34421 2023-05-04 Andrew Pinski <apinski@marvell.com>
34423 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
34424 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
34425 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
34426 of an inline version of it.
34427 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
34428 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
34430 2023-05-04 Andrew Pinski <apinski@marvell.com>
34432 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
34433 the default argument value for dce_ssa_names to nullptr.
34434 Check to make sure dce_ssa_names is a non-nullptr before
34435 calling simple_dce_from_worklist.
34437 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
34439 * config/i386/predicates.md (index_register_operand): Reject
34440 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
34441 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
34442 (call_register_no_elim_operand): Rewrite as ...
34443 (call_register_operand): ... this.
34444 (call_insn_operand): Use call_register_operand predicate.
34446 2023-05-04 Richard Biener <rguenther@suse.de>
34448 PR tree-optimization/109721
34449 * tree-vect-stmts.cc (vectorizable_operation): Make sure
34450 to test word_mode for all !target_support_p operations.
34452 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34455 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
34456 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
34457 (aarch64_mla<mode>): Rename to...
34458 (aarch64_mla<mode><vczle><vczbe>): ... This.
34459 (*aarch64_mla_elt<mode>): Rename to...
34460 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
34461 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
34462 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34463 (aarch64_mla_n<mode>): Rename to...
34464 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
34465 (aarch64_mls<mode>): Rename to...
34466 (aarch64_mls<mode><vczle><vczbe>): ... This.
34467 (*aarch64_mls_elt<mode>): Rename to...
34468 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
34469 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
34470 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34471 (aarch64_mls_n<mode>): Rename to...
34472 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
34473 (fma<mode>4): Rename to...
34474 (fma<mode>4<vczle><vczbe>): ... This.
34475 (*aarch64_fma4_elt<mode>): Rename to...
34476 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
34477 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
34478 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34479 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
34480 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
34481 (fnma<mode>4): Rename to...
34482 (fnma<mode>4<vczle><vczbe>): ... This.
34483 (*aarch64_fnma4_elt<mode>): Rename to...
34484 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
34485 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
34486 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
34487 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
34488 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
34489 (aarch64_simd_bsl<mode>_internal): Rename to...
34490 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
34491 (*aarch64_simd_bsl<mode>_alt): Rename to...
34492 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
34494 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34497 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
34498 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
34499 (fabd<mode>3): Rename to...
34500 (fabd<mode>3<vczle><vczbe>): ... This.
34501 (aarch64_<optab>p<mode>): Rename to...
34502 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
34503 (aarch64_faddp<mode>): Rename to...
34504 (aarch64_faddp<mode><vczle><vczbe>): ... This.
34506 2023-05-04 Martin Liska <mliska@suse.cz>
34508 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
34509 (print_version): Use it.
34510 (generate_results): Likewise.
34512 2023-05-04 Richard Biener <rguenther@suse.de>
34514 * tree-cfg.h (last_stmt): Rename to ...
34515 (last_nondebug_stmt): ... this.
34516 * tree-cfg.cc (last_stmt): Rename to ...
34517 (last_nondebug_stmt): ... this.
34518 (assign_discriminators): Adjust.
34519 (group_case_labels_stmt): Likewise.
34520 (gimple_can_duplicate_bb_p): Likewise.
34521 (execute_fixup_cfg): Likewise.
34522 * auto-profile.cc (afdo_propagate_circuit): Likewise.
34523 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
34524 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
34525 (determine_parallel_type): Likewise.
34526 (adjust_context_and_scope): Likewise.
34527 (expand_task_call): Likewise.
34528 (remove_exit_barrier): Likewise.
34529 (expand_omp_taskreg): Likewise.
34530 (expand_omp_for_init_counts): Likewise.
34531 (expand_omp_for_init_vars): Likewise.
34532 (expand_omp_for_static_chunk): Likewise.
34533 (expand_omp_simd): Likewise.
34534 (expand_oacc_for): Likewise.
34535 (expand_omp_for): Likewise.
34536 (expand_omp_sections): Likewise.
34537 (expand_omp_atomic_fetch_op): Likewise.
34538 (expand_omp_atomic_cas): Likewise.
34539 (expand_omp_atomic): Likewise.
34540 (expand_omp_target): Likewise.
34541 (expand_omp): Likewise.
34542 (omp_make_gimple_edges): Likewise.
34543 * trans-mem.cc (tm_region_init): Likewise.
34544 * tree-inline.cc (redirect_all_calls): Likewise.
34545 * tree-parloops.cc (gen_parallel_loop): Likewise.
34546 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
34547 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
34549 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
34550 (may_eliminate_iv): Likewise.
34551 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
34552 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
34554 (estimate_numbers_of_iterations): Likewise.
34555 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
34556 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
34557 (set_predicates_for_bb): Likewise.
34558 (init_loop_unswitch_info): Likewise.
34559 (hoist_guard): Likewise.
34560 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
34561 (minmax_replacement): Likewise.
34562 * tree-ssa-reassoc.cc (update_range_test): Likewise.
34563 (optimize_range_tests_to_bit_test): Likewise.
34564 (optimize_range_tests_var_bound): Likewise.
34565 (optimize_range_tests): Likewise.
34566 (no_side_effect_bb): Likewise.
34567 (suitable_cond_bb): Likewise.
34568 (maybe_optimize_range_tests): Likewise.
34569 (reassociate_bb): Likewise.
34570 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
34572 2023-05-04 Jakub Jelinek <jakub@redhat.com>
34575 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
34576 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
34577 for it only if it still has TImode. Don't decide whether to call
34578 fix_debug_reg_uses based on whether SRC is ever set or not.
34580 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
34582 * config/cris/cris.cc (cris_split_constant): New function.
34583 * config/cris/cris.md (splitop): New iterator.
34584 (opsplit1): New define_peephole2.
34585 * config/cris/cris-protos.h (cris_split_constant): Declare.
34586 (cris_splittable_constant_p): New macro.
34588 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
34590 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
34593 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
34595 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
34596 lra_in_progress, not reload_in_progress.
34597 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
34598 * config/cris/constraints.md ("Q"): Ditto.
34600 2023-05-03 Andrew Pinski <apinski@marvell.com>
34602 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
34603 stats on removed number of statements and phis.
34605 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
34607 PR tree-optimization/109711
34608 * value-range.cc (irange::verify_range): Allow types of
34611 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
34614 * calls.cc (can_implement_as_sibling_call_p): Reject calls
34615 to __sanitizer_cov_trace_pc.
34617 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
34620 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
34621 a new ABI break parameter for GCC 14. Set it to the alignment
34622 of enums that have an underlying type. Take the true alignment
34623 of such enums from the TYPE_ALIGN of the underlying type's
34625 (aarch64_function_arg_boundary): Update accordingly.
34626 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
34627 Warn about ABI differences.
34629 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
34632 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
34633 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
34634 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
34635 (aarch64_gimplify_va_arg_expr): Likewise.
34637 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
34639 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
34640 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
34641 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
34643 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
34644 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
34645 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
34646 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
34647 * config/arm/arm_mve.h (vhsubq): Remove.
34649 (vhaddq_m): Remove.
34650 (vhsubq_m): Remove.
34651 (vhaddq_x): Remove.
34652 (vhsubq_x): Remove.
34653 (vhsubq_u8): Remove.
34654 (vhsubq_n_u8): Remove.
34655 (vhaddq_u8): Remove.
34656 (vhaddq_n_u8): Remove.
34657 (vhsubq_s8): Remove.
34658 (vhsubq_n_s8): Remove.
34659 (vhaddq_s8): Remove.
34660 (vhaddq_n_s8): Remove.
34661 (vhsubq_u16): Remove.
34662 (vhsubq_n_u16): Remove.
34663 (vhaddq_u16): Remove.
34664 (vhaddq_n_u16): Remove.
34665 (vhsubq_s16): Remove.
34666 (vhsubq_n_s16): Remove.
34667 (vhaddq_s16): Remove.
34668 (vhaddq_n_s16): Remove.
34669 (vhsubq_u32): Remove.
34670 (vhsubq_n_u32): Remove.
34671 (vhaddq_u32): Remove.
34672 (vhaddq_n_u32): Remove.
34673 (vhsubq_s32): Remove.
34674 (vhsubq_n_s32): Remove.
34675 (vhaddq_s32): Remove.
34676 (vhaddq_n_s32): Remove.
34677 (vhaddq_m_n_s8): Remove.
34678 (vhaddq_m_n_s32): Remove.
34679 (vhaddq_m_n_s16): Remove.
34680 (vhaddq_m_n_u8): Remove.
34681 (vhaddq_m_n_u32): Remove.
34682 (vhaddq_m_n_u16): Remove.
34683 (vhaddq_m_s8): Remove.
34684 (vhaddq_m_s32): Remove.
34685 (vhaddq_m_s16): Remove.
34686 (vhaddq_m_u8): Remove.
34687 (vhaddq_m_u32): Remove.
34688 (vhaddq_m_u16): Remove.
34689 (vhsubq_m_n_s8): Remove.
34690 (vhsubq_m_n_s32): Remove.
34691 (vhsubq_m_n_s16): Remove.
34692 (vhsubq_m_n_u8): Remove.
34693 (vhsubq_m_n_u32): Remove.
34694 (vhsubq_m_n_u16): Remove.
34695 (vhsubq_m_s8): Remove.
34696 (vhsubq_m_s32): Remove.
34697 (vhsubq_m_s16): Remove.
34698 (vhsubq_m_u8): Remove.
34699 (vhsubq_m_u32): Remove.
34700 (vhsubq_m_u16): Remove.
34701 (vhaddq_x_n_s8): Remove.
34702 (vhaddq_x_n_s16): Remove.
34703 (vhaddq_x_n_s32): Remove.
34704 (vhaddq_x_n_u8): Remove.
34705 (vhaddq_x_n_u16): Remove.
34706 (vhaddq_x_n_u32): Remove.
34707 (vhaddq_x_s8): Remove.
34708 (vhaddq_x_s16): Remove.
34709 (vhaddq_x_s32): Remove.
34710 (vhaddq_x_u8): Remove.
34711 (vhaddq_x_u16): Remove.
34712 (vhaddq_x_u32): Remove.
34713 (vhsubq_x_n_s8): Remove.
34714 (vhsubq_x_n_s16): Remove.
34715 (vhsubq_x_n_s32): Remove.
34716 (vhsubq_x_n_u8): Remove.
34717 (vhsubq_x_n_u16): Remove.
34718 (vhsubq_x_n_u32): Remove.
34719 (vhsubq_x_s8): Remove.
34720 (vhsubq_x_s16): Remove.
34721 (vhsubq_x_s32): Remove.
34722 (vhsubq_x_u8): Remove.
34723 (vhsubq_x_u16): Remove.
34724 (vhsubq_x_u32): Remove.
34725 (__arm_vhsubq_u8): Remove.
34726 (__arm_vhsubq_n_u8): Remove.
34727 (__arm_vhaddq_u8): Remove.
34728 (__arm_vhaddq_n_u8): Remove.
34729 (__arm_vhsubq_s8): Remove.
34730 (__arm_vhsubq_n_s8): Remove.
34731 (__arm_vhaddq_s8): Remove.
34732 (__arm_vhaddq_n_s8): Remove.
34733 (__arm_vhsubq_u16): Remove.
34734 (__arm_vhsubq_n_u16): Remove.
34735 (__arm_vhaddq_u16): Remove.
34736 (__arm_vhaddq_n_u16): Remove.
34737 (__arm_vhsubq_s16): Remove.
34738 (__arm_vhsubq_n_s16): Remove.
34739 (__arm_vhaddq_s16): Remove.
34740 (__arm_vhaddq_n_s16): Remove.
34741 (__arm_vhsubq_u32): Remove.
34742 (__arm_vhsubq_n_u32): Remove.
34743 (__arm_vhaddq_u32): Remove.
34744 (__arm_vhaddq_n_u32): Remove.
34745 (__arm_vhsubq_s32): Remove.
34746 (__arm_vhsubq_n_s32): Remove.
34747 (__arm_vhaddq_s32): Remove.
34748 (__arm_vhaddq_n_s32): Remove.
34749 (__arm_vhaddq_m_n_s8): Remove.
34750 (__arm_vhaddq_m_n_s32): Remove.
34751 (__arm_vhaddq_m_n_s16): Remove.
34752 (__arm_vhaddq_m_n_u8): Remove.
34753 (__arm_vhaddq_m_n_u32): Remove.
34754 (__arm_vhaddq_m_n_u16): Remove.
34755 (__arm_vhaddq_m_s8): Remove.
34756 (__arm_vhaddq_m_s32): Remove.
34757 (__arm_vhaddq_m_s16): Remove.
34758 (__arm_vhaddq_m_u8): Remove.
34759 (__arm_vhaddq_m_u32): Remove.
34760 (__arm_vhaddq_m_u16): Remove.
34761 (__arm_vhsubq_m_n_s8): Remove.
34762 (__arm_vhsubq_m_n_s32): Remove.
34763 (__arm_vhsubq_m_n_s16): Remove.
34764 (__arm_vhsubq_m_n_u8): Remove.
34765 (__arm_vhsubq_m_n_u32): Remove.
34766 (__arm_vhsubq_m_n_u16): Remove.
34767 (__arm_vhsubq_m_s8): Remove.
34768 (__arm_vhsubq_m_s32): Remove.
34769 (__arm_vhsubq_m_s16): Remove.
34770 (__arm_vhsubq_m_u8): Remove.
34771 (__arm_vhsubq_m_u32): Remove.
34772 (__arm_vhsubq_m_u16): Remove.
34773 (__arm_vhaddq_x_n_s8): Remove.
34774 (__arm_vhaddq_x_n_s16): Remove.
34775 (__arm_vhaddq_x_n_s32): Remove.
34776 (__arm_vhaddq_x_n_u8): Remove.
34777 (__arm_vhaddq_x_n_u16): Remove.
34778 (__arm_vhaddq_x_n_u32): Remove.
34779 (__arm_vhaddq_x_s8): Remove.
34780 (__arm_vhaddq_x_s16): Remove.
34781 (__arm_vhaddq_x_s32): Remove.
34782 (__arm_vhaddq_x_u8): Remove.
34783 (__arm_vhaddq_x_u16): Remove.
34784 (__arm_vhaddq_x_u32): Remove.
34785 (__arm_vhsubq_x_n_s8): Remove.
34786 (__arm_vhsubq_x_n_s16): Remove.
34787 (__arm_vhsubq_x_n_s32): Remove.
34788 (__arm_vhsubq_x_n_u8): Remove.
34789 (__arm_vhsubq_x_n_u16): Remove.
34790 (__arm_vhsubq_x_n_u32): Remove.
34791 (__arm_vhsubq_x_s8): Remove.
34792 (__arm_vhsubq_x_s16): Remove.
34793 (__arm_vhsubq_x_s32): Remove.
34794 (__arm_vhsubq_x_u8): Remove.
34795 (__arm_vhsubq_x_u16): Remove.
34796 (__arm_vhsubq_x_u32): Remove.
34797 (__arm_vhsubq): Remove.
34798 (__arm_vhaddq): Remove.
34799 (__arm_vhaddq_m): Remove.
34800 (__arm_vhsubq_m): Remove.
34801 (__arm_vhaddq_x): Remove.
34802 (__arm_vhsubq_x): Remove.
34804 (vmulhq_m): Remove.
34805 (vmulhq_x): Remove.
34806 (vmulhq_u8): Remove.
34807 (vmulhq_s8): Remove.
34808 (vmulhq_u16): Remove.
34809 (vmulhq_s16): Remove.
34810 (vmulhq_u32): Remove.
34811 (vmulhq_s32): Remove.
34812 (vmulhq_m_s8): Remove.
34813 (vmulhq_m_s32): Remove.
34814 (vmulhq_m_s16): Remove.
34815 (vmulhq_m_u8): Remove.
34816 (vmulhq_m_u32): Remove.
34817 (vmulhq_m_u16): Remove.
34818 (vmulhq_x_s8): Remove.
34819 (vmulhq_x_s16): Remove.
34820 (vmulhq_x_s32): Remove.
34821 (vmulhq_x_u8): Remove.
34822 (vmulhq_x_u16): Remove.
34823 (vmulhq_x_u32): Remove.
34824 (__arm_vmulhq_u8): Remove.
34825 (__arm_vmulhq_s8): Remove.
34826 (__arm_vmulhq_u16): Remove.
34827 (__arm_vmulhq_s16): Remove.
34828 (__arm_vmulhq_u32): Remove.
34829 (__arm_vmulhq_s32): Remove.
34830 (__arm_vmulhq_m_s8): Remove.
34831 (__arm_vmulhq_m_s32): Remove.
34832 (__arm_vmulhq_m_s16): Remove.
34833 (__arm_vmulhq_m_u8): Remove.
34834 (__arm_vmulhq_m_u32): Remove.
34835 (__arm_vmulhq_m_u16): Remove.
34836 (__arm_vmulhq_x_s8): Remove.
34837 (__arm_vmulhq_x_s16): Remove.
34838 (__arm_vmulhq_x_s32): Remove.
34839 (__arm_vmulhq_x_u8): Remove.
34840 (__arm_vmulhq_x_u16): Remove.
34841 (__arm_vmulhq_x_u32): Remove.
34842 (__arm_vmulhq): Remove.
34843 (__arm_vmulhq_m): Remove.
34844 (__arm_vmulhq_x): Remove.
34847 (vqaddq_m): Remove.
34848 (vqsubq_m): Remove.
34849 (vqsubq_u8): Remove.
34850 (vqsubq_n_u8): Remove.
34851 (vqaddq_u8): Remove.
34852 (vqaddq_n_u8): Remove.
34853 (vqsubq_s8): Remove.
34854 (vqsubq_n_s8): Remove.
34855 (vqaddq_s8): Remove.
34856 (vqaddq_n_s8): Remove.
34857 (vqsubq_u16): Remove.
34858 (vqsubq_n_u16): Remove.
34859 (vqaddq_u16): Remove.
34860 (vqaddq_n_u16): Remove.
34861 (vqsubq_s16): Remove.
34862 (vqsubq_n_s16): Remove.
34863 (vqaddq_s16): Remove.
34864 (vqaddq_n_s16): Remove.
34865 (vqsubq_u32): Remove.
34866 (vqsubq_n_u32): Remove.
34867 (vqaddq_u32): Remove.
34868 (vqaddq_n_u32): Remove.
34869 (vqsubq_s32): Remove.
34870 (vqsubq_n_s32): Remove.
34871 (vqaddq_s32): Remove.
34872 (vqaddq_n_s32): Remove.
34873 (vqaddq_m_n_s8): Remove.
34874 (vqaddq_m_n_s32): Remove.
34875 (vqaddq_m_n_s16): Remove.
34876 (vqaddq_m_n_u8): Remove.
34877 (vqaddq_m_n_u32): Remove.
34878 (vqaddq_m_n_u16): Remove.
34879 (vqaddq_m_s8): Remove.
34880 (vqaddq_m_s32): Remove.
34881 (vqaddq_m_s16): Remove.
34882 (vqaddq_m_u8): Remove.
34883 (vqaddq_m_u32): Remove.
34884 (vqaddq_m_u16): Remove.
34885 (vqsubq_m_n_s8): Remove.
34886 (vqsubq_m_n_s32): Remove.
34887 (vqsubq_m_n_s16): Remove.
34888 (vqsubq_m_n_u8): Remove.
34889 (vqsubq_m_n_u32): Remove.
34890 (vqsubq_m_n_u16): Remove.
34891 (vqsubq_m_s8): Remove.
34892 (vqsubq_m_s32): Remove.
34893 (vqsubq_m_s16): Remove.
34894 (vqsubq_m_u8): Remove.
34895 (vqsubq_m_u32): Remove.
34896 (vqsubq_m_u16): Remove.
34897 (__arm_vqsubq_u8): Remove.
34898 (__arm_vqsubq_n_u8): Remove.
34899 (__arm_vqaddq_u8): Remove.
34900 (__arm_vqaddq_n_u8): Remove.
34901 (__arm_vqsubq_s8): Remove.
34902 (__arm_vqsubq_n_s8): Remove.
34903 (__arm_vqaddq_s8): Remove.
34904 (__arm_vqaddq_n_s8): Remove.
34905 (__arm_vqsubq_u16): Remove.
34906 (__arm_vqsubq_n_u16): Remove.
34907 (__arm_vqaddq_u16): Remove.
34908 (__arm_vqaddq_n_u16): Remove.
34909 (__arm_vqsubq_s16): Remove.
34910 (__arm_vqsubq_n_s16): Remove.
34911 (__arm_vqaddq_s16): Remove.
34912 (__arm_vqaddq_n_s16): Remove.
34913 (__arm_vqsubq_u32): Remove.
34914 (__arm_vqsubq_n_u32): Remove.
34915 (__arm_vqaddq_u32): Remove.
34916 (__arm_vqaddq_n_u32): Remove.
34917 (__arm_vqsubq_s32): Remove.
34918 (__arm_vqsubq_n_s32): Remove.
34919 (__arm_vqaddq_s32): Remove.
34920 (__arm_vqaddq_n_s32): Remove.
34921 (__arm_vqaddq_m_n_s8): Remove.
34922 (__arm_vqaddq_m_n_s32): Remove.
34923 (__arm_vqaddq_m_n_s16): Remove.
34924 (__arm_vqaddq_m_n_u8): Remove.
34925 (__arm_vqaddq_m_n_u32): Remove.
34926 (__arm_vqaddq_m_n_u16): Remove.
34927 (__arm_vqaddq_m_s8): Remove.
34928 (__arm_vqaddq_m_s32): Remove.
34929 (__arm_vqaddq_m_s16): Remove.
34930 (__arm_vqaddq_m_u8): Remove.
34931 (__arm_vqaddq_m_u32): Remove.
34932 (__arm_vqaddq_m_u16): Remove.
34933 (__arm_vqsubq_m_n_s8): Remove.
34934 (__arm_vqsubq_m_n_s32): Remove.
34935 (__arm_vqsubq_m_n_s16): Remove.
34936 (__arm_vqsubq_m_n_u8): Remove.
34937 (__arm_vqsubq_m_n_u32): Remove.
34938 (__arm_vqsubq_m_n_u16): Remove.
34939 (__arm_vqsubq_m_s8): Remove.
34940 (__arm_vqsubq_m_s32): Remove.
34941 (__arm_vqsubq_m_s16): Remove.
34942 (__arm_vqsubq_m_u8): Remove.
34943 (__arm_vqsubq_m_u32): Remove.
34944 (__arm_vqsubq_m_u16): Remove.
34945 (__arm_vqsubq): Remove.
34946 (__arm_vqaddq): Remove.
34947 (__arm_vqaddq_m): Remove.
34948 (__arm_vqsubq_m): Remove.
34949 (vqdmulhq): Remove.
34950 (vqdmulhq_m): Remove.
34951 (vqdmulhq_s8): Remove.
34952 (vqdmulhq_n_s8): Remove.
34953 (vqdmulhq_s16): Remove.
34954 (vqdmulhq_n_s16): Remove.
34955 (vqdmulhq_s32): Remove.
34956 (vqdmulhq_n_s32): Remove.
34957 (vqdmulhq_m_n_s8): Remove.
34958 (vqdmulhq_m_n_s32): Remove.
34959 (vqdmulhq_m_n_s16): Remove.
34960 (vqdmulhq_m_s8): Remove.
34961 (vqdmulhq_m_s32): Remove.
34962 (vqdmulhq_m_s16): Remove.
34963 (__arm_vqdmulhq_s8): Remove.
34964 (__arm_vqdmulhq_n_s8): Remove.
34965 (__arm_vqdmulhq_s16): Remove.
34966 (__arm_vqdmulhq_n_s16): Remove.
34967 (__arm_vqdmulhq_s32): Remove.
34968 (__arm_vqdmulhq_n_s32): Remove.
34969 (__arm_vqdmulhq_m_n_s8): Remove.
34970 (__arm_vqdmulhq_m_n_s32): Remove.
34971 (__arm_vqdmulhq_m_n_s16): Remove.
34972 (__arm_vqdmulhq_m_s8): Remove.
34973 (__arm_vqdmulhq_m_s32): Remove.
34974 (__arm_vqdmulhq_m_s16): Remove.
34975 (__arm_vqdmulhq): Remove.
34976 (__arm_vqdmulhq_m): Remove.
34978 (vrhaddq_m): Remove.
34979 (vrhaddq_x): Remove.
34980 (vrhaddq_u8): Remove.
34981 (vrhaddq_s8): Remove.
34982 (vrhaddq_u16): Remove.
34983 (vrhaddq_s16): Remove.
34984 (vrhaddq_u32): Remove.
34985 (vrhaddq_s32): Remove.
34986 (vrhaddq_m_s8): Remove.
34987 (vrhaddq_m_s32): Remove.
34988 (vrhaddq_m_s16): Remove.
34989 (vrhaddq_m_u8): Remove.
34990 (vrhaddq_m_u32): Remove.
34991 (vrhaddq_m_u16): Remove.
34992 (vrhaddq_x_s8): Remove.
34993 (vrhaddq_x_s16): Remove.
34994 (vrhaddq_x_s32): Remove.
34995 (vrhaddq_x_u8): Remove.
34996 (vrhaddq_x_u16): Remove.
34997 (vrhaddq_x_u32): Remove.
34998 (__arm_vrhaddq_u8): Remove.
34999 (__arm_vrhaddq_s8): Remove.
35000 (__arm_vrhaddq_u16): Remove.
35001 (__arm_vrhaddq_s16): Remove.
35002 (__arm_vrhaddq_u32): Remove.
35003 (__arm_vrhaddq_s32): Remove.
35004 (__arm_vrhaddq_m_s8): Remove.
35005 (__arm_vrhaddq_m_s32): Remove.
35006 (__arm_vrhaddq_m_s16): Remove.
35007 (__arm_vrhaddq_m_u8): Remove.
35008 (__arm_vrhaddq_m_u32): Remove.
35009 (__arm_vrhaddq_m_u16): Remove.
35010 (__arm_vrhaddq_x_s8): Remove.
35011 (__arm_vrhaddq_x_s16): Remove.
35012 (__arm_vrhaddq_x_s32): Remove.
35013 (__arm_vrhaddq_x_u8): Remove.
35014 (__arm_vrhaddq_x_u16): Remove.
35015 (__arm_vrhaddq_x_u32): Remove.
35016 (__arm_vrhaddq): Remove.
35017 (__arm_vrhaddq_m): Remove.
35018 (__arm_vrhaddq_x): Remove.
35020 (vrmulhq_m): Remove.
35021 (vrmulhq_x): Remove.
35022 (vrmulhq_u8): Remove.
35023 (vrmulhq_s8): Remove.
35024 (vrmulhq_u16): Remove.
35025 (vrmulhq_s16): Remove.
35026 (vrmulhq_u32): Remove.
35027 (vrmulhq_s32): Remove.
35028 (vrmulhq_m_s8): Remove.
35029 (vrmulhq_m_s32): Remove.
35030 (vrmulhq_m_s16): Remove.
35031 (vrmulhq_m_u8): Remove.
35032 (vrmulhq_m_u32): Remove.
35033 (vrmulhq_m_u16): Remove.
35034 (vrmulhq_x_s8): Remove.
35035 (vrmulhq_x_s16): Remove.
35036 (vrmulhq_x_s32): Remove.
35037 (vrmulhq_x_u8): Remove.
35038 (vrmulhq_x_u16): Remove.
35039 (vrmulhq_x_u32): Remove.
35040 (__arm_vrmulhq_u8): Remove.
35041 (__arm_vrmulhq_s8): Remove.
35042 (__arm_vrmulhq_u16): Remove.
35043 (__arm_vrmulhq_s16): Remove.
35044 (__arm_vrmulhq_u32): Remove.
35045 (__arm_vrmulhq_s32): Remove.
35046 (__arm_vrmulhq_m_s8): Remove.
35047 (__arm_vrmulhq_m_s32): Remove.
35048 (__arm_vrmulhq_m_s16): Remove.
35049 (__arm_vrmulhq_m_u8): Remove.
35050 (__arm_vrmulhq_m_u32): Remove.
35051 (__arm_vrmulhq_m_u16): Remove.
35052 (__arm_vrmulhq_x_s8): Remove.
35053 (__arm_vrmulhq_x_s16): Remove.
35054 (__arm_vrmulhq_x_s32): Remove.
35055 (__arm_vrmulhq_x_u8): Remove.
35056 (__arm_vrmulhq_x_u16): Remove.
35057 (__arm_vrmulhq_x_u32): Remove.
35058 (__arm_vrmulhq): Remove.
35059 (__arm_vrmulhq_m): Remove.
35060 (__arm_vrmulhq_x): Remove.
35062 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35064 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
35065 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
35066 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
35067 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
35068 * config/arm/mve.md (mve_vabdq_<supf><mode>)
35069 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
35070 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
35071 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
35072 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
35073 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
35074 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
35076 (@mve_<mve_insn>q_<supf><mode>): ... this.
35077 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
35078 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
35079 gen_mve_vhaddq / gen_mve_vrhaddq.
35081 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35083 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
35084 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
35085 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
35086 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
35087 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
35088 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
35089 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
35090 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
35091 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
35092 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
35093 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
35094 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
35095 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35097 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35099 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
35100 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
35102 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
35103 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
35104 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
35105 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
35106 (mve_vqsubq_n_<supf><mode>): Merge into ...
35107 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35109 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35111 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
35112 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
35113 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
35114 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
35115 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
35116 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
35117 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
35118 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
35119 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
35120 (mve_vshlq_m_<supf><mode>): Merged into
35121 @mve_<mve_insn>q_m_<supf><mode>.
35122 (mve_vabdq_m_<supf><mode>): Likewise.
35123 (mve_vhaddq_m_<supf><mode>): Likewise.
35124 (mve_vhsubq_m_<supf><mode>): Likewise.
35125 (mve_vmaxq_m_<supf><mode>): Likewise.
35126 (mve_vminq_m_<supf><mode>): Likewise.
35127 (mve_vmulhq_m_<supf><mode>): Likewise.
35128 (mve_vqaddq_m_<supf><mode>): Likewise.
35129 (mve_vqrshlq_m_<supf><mode>): Likewise.
35130 (mve_vqshlq_m_<supf><mode>): Likewise.
35131 (mve_vqsubq_m_<supf><mode>): Likewise.
35132 (mve_vrhaddq_m_<supf><mode>): Likewise.
35133 (mve_vrmulhq_m_<supf><mode>): Likewise.
35134 (mve_vrshlq_m_<supf><mode>): Likewise.
35135 (mve_vqdmladhq_m_s<mode>): Likewise.
35136 (mve_vqdmladhxq_m_s<mode>): Likewise.
35137 (mve_vqdmlsdhq_m_s<mode>): Likewise.
35138 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
35139 (mve_vqdmulhq_m_s<mode>): Likewise.
35140 (mve_vqrdmladhq_m_s<mode>): Likewise.
35141 (mve_vqrdmladhxq_m_s<mode>): Likewise.
35142 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
35143 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
35144 (mve_vqrdmulhq_m_s<mode>): Likewise.
35146 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35148 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
35149 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
35150 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
35151 * config/arm/arm_mve.h (vcreateq_f16): Remove.
35152 (vcreateq_f32): Remove.
35153 (vcreateq_u8): Remove.
35154 (vcreateq_u16): Remove.
35155 (vcreateq_u32): Remove.
35156 (vcreateq_u64): Remove.
35157 (vcreateq_s8): Remove.
35158 (vcreateq_s16): Remove.
35159 (vcreateq_s32): Remove.
35160 (vcreateq_s64): Remove.
35161 (__arm_vcreateq_u8): Remove.
35162 (__arm_vcreateq_u16): Remove.
35163 (__arm_vcreateq_u32): Remove.
35164 (__arm_vcreateq_u64): Remove.
35165 (__arm_vcreateq_s8): Remove.
35166 (__arm_vcreateq_s16): Remove.
35167 (__arm_vcreateq_s32): Remove.
35168 (__arm_vcreateq_s64): Remove.
35169 (__arm_vcreateq_f16): Remove.
35170 (__arm_vcreateq_f32): Remove.
35172 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35174 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
35175 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
35176 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
35177 (@mve_<mve_insn>q_f<mode>): ... this.
35178 (mve_vcreateq_<supf><mode>): Rename into ...
35179 (@mve_<mve_insn>q_<supf><mode>): ... this.
35181 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35183 * config/arm/arm-mve-builtins-shapes.cc (create): New.
35184 * config/arm/arm-mve-builtins-shapes.h: (create): New.
35186 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35188 * config/arm/arm-mve-builtins-functions.h (class
35189 unspec_mve_function_exact_insn): New.
35191 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35193 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
35195 * config/arm/arm-mve-builtins-base.def (vorrq): New.
35196 * config/arm/arm-mve-builtins-base.h (vorrq): New.
35197 * config/arm/arm-mve-builtins.cc
35198 (function_instance::has_inactive_argument): Handle vorrq.
35199 * config/arm/arm_mve.h (vorrq): Remove.
35200 (vorrq_m_n): Remove.
35203 (vorrq_u8): Remove.
35204 (vorrq_s8): Remove.
35205 (vorrq_u16): Remove.
35206 (vorrq_s16): Remove.
35207 (vorrq_u32): Remove.
35208 (vorrq_s32): Remove.
35209 (vorrq_n_u16): Remove.
35210 (vorrq_f16): Remove.
35211 (vorrq_n_s16): Remove.
35212 (vorrq_n_u32): Remove.
35213 (vorrq_f32): Remove.
35214 (vorrq_n_s32): Remove.
35215 (vorrq_m_n_s16): Remove.
35216 (vorrq_m_n_u16): Remove.
35217 (vorrq_m_n_s32): Remove.
35218 (vorrq_m_n_u32): Remove.
35219 (vorrq_m_s8): Remove.
35220 (vorrq_m_s32): Remove.
35221 (vorrq_m_s16): Remove.
35222 (vorrq_m_u8): Remove.
35223 (vorrq_m_u32): Remove.
35224 (vorrq_m_u16): Remove.
35225 (vorrq_m_f32): Remove.
35226 (vorrq_m_f16): Remove.
35227 (vorrq_x_s8): Remove.
35228 (vorrq_x_s16): Remove.
35229 (vorrq_x_s32): Remove.
35230 (vorrq_x_u8): Remove.
35231 (vorrq_x_u16): Remove.
35232 (vorrq_x_u32): Remove.
35233 (vorrq_x_f16): Remove.
35234 (vorrq_x_f32): Remove.
35235 (__arm_vorrq_u8): Remove.
35236 (__arm_vorrq_s8): Remove.
35237 (__arm_vorrq_u16): Remove.
35238 (__arm_vorrq_s16): Remove.
35239 (__arm_vorrq_u32): Remove.
35240 (__arm_vorrq_s32): Remove.
35241 (__arm_vorrq_n_u16): Remove.
35242 (__arm_vorrq_n_s16): Remove.
35243 (__arm_vorrq_n_u32): Remove.
35244 (__arm_vorrq_n_s32): Remove.
35245 (__arm_vorrq_m_n_s16): Remove.
35246 (__arm_vorrq_m_n_u16): Remove.
35247 (__arm_vorrq_m_n_s32): Remove.
35248 (__arm_vorrq_m_n_u32): Remove.
35249 (__arm_vorrq_m_s8): Remove.
35250 (__arm_vorrq_m_s32): Remove.
35251 (__arm_vorrq_m_s16): Remove.
35252 (__arm_vorrq_m_u8): Remove.
35253 (__arm_vorrq_m_u32): Remove.
35254 (__arm_vorrq_m_u16): Remove.
35255 (__arm_vorrq_x_s8): Remove.
35256 (__arm_vorrq_x_s16): Remove.
35257 (__arm_vorrq_x_s32): Remove.
35258 (__arm_vorrq_x_u8): Remove.
35259 (__arm_vorrq_x_u16): Remove.
35260 (__arm_vorrq_x_u32): Remove.
35261 (__arm_vorrq_f16): Remove.
35262 (__arm_vorrq_f32): Remove.
35263 (__arm_vorrq_m_f32): Remove.
35264 (__arm_vorrq_m_f16): Remove.
35265 (__arm_vorrq_x_f16): Remove.
35266 (__arm_vorrq_x_f32): Remove.
35267 (__arm_vorrq): Remove.
35268 (__arm_vorrq_m_n): Remove.
35269 (__arm_vorrq_m): Remove.
35270 (__arm_vorrq_x): Remove.
35272 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35274 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
35275 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
35276 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
35277 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
35279 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35281 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
35282 (vandq,veorq): New.
35283 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
35284 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
35285 * config/arm/arm_mve.h (vandq): Remove.
35288 (vandq_u8): Remove.
35289 (vandq_s8): Remove.
35290 (vandq_u16): Remove.
35291 (vandq_s16): Remove.
35292 (vandq_u32): Remove.
35293 (vandq_s32): Remove.
35294 (vandq_f16): Remove.
35295 (vandq_f32): Remove.
35296 (vandq_m_s8): Remove.
35297 (vandq_m_s32): Remove.
35298 (vandq_m_s16): Remove.
35299 (vandq_m_u8): Remove.
35300 (vandq_m_u32): Remove.
35301 (vandq_m_u16): Remove.
35302 (vandq_m_f32): Remove.
35303 (vandq_m_f16): Remove.
35304 (vandq_x_s8): Remove.
35305 (vandq_x_s16): Remove.
35306 (vandq_x_s32): Remove.
35307 (vandq_x_u8): Remove.
35308 (vandq_x_u16): Remove.
35309 (vandq_x_u32): Remove.
35310 (vandq_x_f16): Remove.
35311 (vandq_x_f32): Remove.
35312 (__arm_vandq_u8): Remove.
35313 (__arm_vandq_s8): Remove.
35314 (__arm_vandq_u16): Remove.
35315 (__arm_vandq_s16): Remove.
35316 (__arm_vandq_u32): Remove.
35317 (__arm_vandq_s32): Remove.
35318 (__arm_vandq_m_s8): Remove.
35319 (__arm_vandq_m_s32): Remove.
35320 (__arm_vandq_m_s16): Remove.
35321 (__arm_vandq_m_u8): Remove.
35322 (__arm_vandq_m_u32): Remove.
35323 (__arm_vandq_m_u16): Remove.
35324 (__arm_vandq_x_s8): Remove.
35325 (__arm_vandq_x_s16): Remove.
35326 (__arm_vandq_x_s32): Remove.
35327 (__arm_vandq_x_u8): Remove.
35328 (__arm_vandq_x_u16): Remove.
35329 (__arm_vandq_x_u32): Remove.
35330 (__arm_vandq_f16): Remove.
35331 (__arm_vandq_f32): Remove.
35332 (__arm_vandq_m_f32): Remove.
35333 (__arm_vandq_m_f16): Remove.
35334 (__arm_vandq_x_f16): Remove.
35335 (__arm_vandq_x_f32): Remove.
35336 (__arm_vandq): Remove.
35337 (__arm_vandq_m): Remove.
35338 (__arm_vandq_x): Remove.
35341 (veorq_u8): Remove.
35342 (veorq_s8): Remove.
35343 (veorq_u16): Remove.
35344 (veorq_s16): Remove.
35345 (veorq_u32): Remove.
35346 (veorq_s32): Remove.
35347 (veorq_f16): Remove.
35348 (veorq_f32): Remove.
35349 (veorq_m_s8): Remove.
35350 (veorq_m_s32): Remove.
35351 (veorq_m_s16): Remove.
35352 (veorq_m_u8): Remove.
35353 (veorq_m_u32): Remove.
35354 (veorq_m_u16): Remove.
35355 (veorq_m_f32): Remove.
35356 (veorq_m_f16): Remove.
35357 (veorq_x_s8): Remove.
35358 (veorq_x_s16): Remove.
35359 (veorq_x_s32): Remove.
35360 (veorq_x_u8): Remove.
35361 (veorq_x_u16): Remove.
35362 (veorq_x_u32): Remove.
35363 (veorq_x_f16): Remove.
35364 (veorq_x_f32): Remove.
35365 (__arm_veorq_u8): Remove.
35366 (__arm_veorq_s8): Remove.
35367 (__arm_veorq_u16): Remove.
35368 (__arm_veorq_s16): Remove.
35369 (__arm_veorq_u32): Remove.
35370 (__arm_veorq_s32): Remove.
35371 (__arm_veorq_m_s8): Remove.
35372 (__arm_veorq_m_s32): Remove.
35373 (__arm_veorq_m_s16): Remove.
35374 (__arm_veorq_m_u8): Remove.
35375 (__arm_veorq_m_u32): Remove.
35376 (__arm_veorq_m_u16): Remove.
35377 (__arm_veorq_x_s8): Remove.
35378 (__arm_veorq_x_s16): Remove.
35379 (__arm_veorq_x_s32): Remove.
35380 (__arm_veorq_x_u8): Remove.
35381 (__arm_veorq_x_u16): Remove.
35382 (__arm_veorq_x_u32): Remove.
35383 (__arm_veorq_f16): Remove.
35384 (__arm_veorq_f32): Remove.
35385 (__arm_veorq_m_f32): Remove.
35386 (__arm_veorq_m_f16): Remove.
35387 (__arm_veorq_x_f16): Remove.
35388 (__arm_veorq_x_f32): Remove.
35389 (__arm_veorq): Remove.
35390 (__arm_veorq_m): Remove.
35391 (__arm_veorq_x): Remove.
35393 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35395 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
35396 (MVE_FP_M_BINARY_LOGIC): New.
35397 (MVE_INT_M_N_BINARY_LOGIC): New.
35398 (MVE_INT_N_BINARY_LOGIC): New.
35399 (mve_insn): Add vand, veor, vorr, vbic.
35400 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
35401 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
35402 (mve_vbicq_m_<supf><mode>): Merge into ...
35403 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
35404 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
35405 (mve_vbicq_m_f<mode>): Merge into ...
35406 (@mve_<mve_insn>q_m_f<mode>): ... this.
35407 (mve_vorrq_n_<supf><mode>)
35408 (mve_vbicq_n_<supf><mode>): Merge into ...
35409 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35410 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
35412 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35414 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35416 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
35417 * config/arm/arm-mve-builtins-shapes.h (binary): New.
35419 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35421 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
35423 (vaddq, vmulq, vsubq): New.
35424 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
35425 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
35426 * config/arm/arm_mve.h (vaddq): Remove.
35429 (vaddq_n_u8): Remove.
35430 (vaddq_n_s8): Remove.
35431 (vaddq_n_u16): Remove.
35432 (vaddq_n_s16): Remove.
35433 (vaddq_n_u32): Remove.
35434 (vaddq_n_s32): Remove.
35435 (vaddq_n_f16): Remove.
35436 (vaddq_n_f32): Remove.
35437 (vaddq_m_n_s8): Remove.
35438 (vaddq_m_n_s32): Remove.
35439 (vaddq_m_n_s16): Remove.
35440 (vaddq_m_n_u8): Remove.
35441 (vaddq_m_n_u32): Remove.
35442 (vaddq_m_n_u16): Remove.
35443 (vaddq_m_s8): Remove.
35444 (vaddq_m_s32): Remove.
35445 (vaddq_m_s16): Remove.
35446 (vaddq_m_u8): Remove.
35447 (vaddq_m_u32): Remove.
35448 (vaddq_m_u16): Remove.
35449 (vaddq_m_f32): Remove.
35450 (vaddq_m_f16): Remove.
35451 (vaddq_m_n_f32): Remove.
35452 (vaddq_m_n_f16): Remove.
35453 (vaddq_s8): Remove.
35454 (vaddq_s16): Remove.
35455 (vaddq_s32): Remove.
35456 (vaddq_u8): Remove.
35457 (vaddq_u16): Remove.
35458 (vaddq_u32): Remove.
35459 (vaddq_f16): Remove.
35460 (vaddq_f32): Remove.
35461 (vaddq_x_s8): Remove.
35462 (vaddq_x_s16): Remove.
35463 (vaddq_x_s32): Remove.
35464 (vaddq_x_n_s8): Remove.
35465 (vaddq_x_n_s16): Remove.
35466 (vaddq_x_n_s32): Remove.
35467 (vaddq_x_u8): Remove.
35468 (vaddq_x_u16): Remove.
35469 (vaddq_x_u32): Remove.
35470 (vaddq_x_n_u8): Remove.
35471 (vaddq_x_n_u16): Remove.
35472 (vaddq_x_n_u32): Remove.
35473 (vaddq_x_f16): Remove.
35474 (vaddq_x_f32): Remove.
35475 (vaddq_x_n_f16): Remove.
35476 (vaddq_x_n_f32): Remove.
35477 (__arm_vaddq_n_u8): Remove.
35478 (__arm_vaddq_n_s8): Remove.
35479 (__arm_vaddq_n_u16): Remove.
35480 (__arm_vaddq_n_s16): Remove.
35481 (__arm_vaddq_n_u32): Remove.
35482 (__arm_vaddq_n_s32): Remove.
35483 (__arm_vaddq_m_n_s8): Remove.
35484 (__arm_vaddq_m_n_s32): Remove.
35485 (__arm_vaddq_m_n_s16): Remove.
35486 (__arm_vaddq_m_n_u8): Remove.
35487 (__arm_vaddq_m_n_u32): Remove.
35488 (__arm_vaddq_m_n_u16): Remove.
35489 (__arm_vaddq_m_s8): Remove.
35490 (__arm_vaddq_m_s32): Remove.
35491 (__arm_vaddq_m_s16): Remove.
35492 (__arm_vaddq_m_u8): Remove.
35493 (__arm_vaddq_m_u32): Remove.
35494 (__arm_vaddq_m_u16): Remove.
35495 (__arm_vaddq_s8): Remove.
35496 (__arm_vaddq_s16): Remove.
35497 (__arm_vaddq_s32): Remove.
35498 (__arm_vaddq_u8): Remove.
35499 (__arm_vaddq_u16): Remove.
35500 (__arm_vaddq_u32): Remove.
35501 (__arm_vaddq_x_s8): Remove.
35502 (__arm_vaddq_x_s16): Remove.
35503 (__arm_vaddq_x_s32): Remove.
35504 (__arm_vaddq_x_n_s8): Remove.
35505 (__arm_vaddq_x_n_s16): Remove.
35506 (__arm_vaddq_x_n_s32): Remove.
35507 (__arm_vaddq_x_u8): Remove.
35508 (__arm_vaddq_x_u16): Remove.
35509 (__arm_vaddq_x_u32): Remove.
35510 (__arm_vaddq_x_n_u8): Remove.
35511 (__arm_vaddq_x_n_u16): Remove.
35512 (__arm_vaddq_x_n_u32): Remove.
35513 (__arm_vaddq_n_f16): Remove.
35514 (__arm_vaddq_n_f32): Remove.
35515 (__arm_vaddq_m_f32): Remove.
35516 (__arm_vaddq_m_f16): Remove.
35517 (__arm_vaddq_m_n_f32): Remove.
35518 (__arm_vaddq_m_n_f16): Remove.
35519 (__arm_vaddq_f16): Remove.
35520 (__arm_vaddq_f32): Remove.
35521 (__arm_vaddq_x_f16): Remove.
35522 (__arm_vaddq_x_f32): Remove.
35523 (__arm_vaddq_x_n_f16): Remove.
35524 (__arm_vaddq_x_n_f32): Remove.
35525 (__arm_vaddq): Remove.
35526 (__arm_vaddq_m): Remove.
35527 (__arm_vaddq_x): Remove.
35531 (vmulq_u8): Remove.
35532 (vmulq_n_u8): Remove.
35533 (vmulq_s8): Remove.
35534 (vmulq_n_s8): Remove.
35535 (vmulq_u16): Remove.
35536 (vmulq_n_u16): Remove.
35537 (vmulq_s16): Remove.
35538 (vmulq_n_s16): Remove.
35539 (vmulq_u32): Remove.
35540 (vmulq_n_u32): Remove.
35541 (vmulq_s32): Remove.
35542 (vmulq_n_s32): Remove.
35543 (vmulq_n_f16): Remove.
35544 (vmulq_f16): Remove.
35545 (vmulq_n_f32): Remove.
35546 (vmulq_f32): Remove.
35547 (vmulq_m_n_s8): Remove.
35548 (vmulq_m_n_s32): Remove.
35549 (vmulq_m_n_s16): Remove.
35550 (vmulq_m_n_u8): Remove.
35551 (vmulq_m_n_u32): Remove.
35552 (vmulq_m_n_u16): Remove.
35553 (vmulq_m_s8): Remove.
35554 (vmulq_m_s32): Remove.
35555 (vmulq_m_s16): Remove.
35556 (vmulq_m_u8): Remove.
35557 (vmulq_m_u32): Remove.
35558 (vmulq_m_u16): Remove.
35559 (vmulq_m_f32): Remove.
35560 (vmulq_m_f16): Remove.
35561 (vmulq_m_n_f32): Remove.
35562 (vmulq_m_n_f16): Remove.
35563 (vmulq_x_s8): Remove.
35564 (vmulq_x_s16): Remove.
35565 (vmulq_x_s32): Remove.
35566 (vmulq_x_n_s8): Remove.
35567 (vmulq_x_n_s16): Remove.
35568 (vmulq_x_n_s32): Remove.
35569 (vmulq_x_u8): Remove.
35570 (vmulq_x_u16): Remove.
35571 (vmulq_x_u32): Remove.
35572 (vmulq_x_n_u8): Remove.
35573 (vmulq_x_n_u16): Remove.
35574 (vmulq_x_n_u32): Remove.
35575 (vmulq_x_f16): Remove.
35576 (vmulq_x_f32): Remove.
35577 (vmulq_x_n_f16): Remove.
35578 (vmulq_x_n_f32): Remove.
35579 (__arm_vmulq_u8): Remove.
35580 (__arm_vmulq_n_u8): Remove.
35581 (__arm_vmulq_s8): Remove.
35582 (__arm_vmulq_n_s8): Remove.
35583 (__arm_vmulq_u16): Remove.
35584 (__arm_vmulq_n_u16): Remove.
35585 (__arm_vmulq_s16): Remove.
35586 (__arm_vmulq_n_s16): Remove.
35587 (__arm_vmulq_u32): Remove.
35588 (__arm_vmulq_n_u32): Remove.
35589 (__arm_vmulq_s32): Remove.
35590 (__arm_vmulq_n_s32): Remove.
35591 (__arm_vmulq_m_n_s8): Remove.
35592 (__arm_vmulq_m_n_s32): Remove.
35593 (__arm_vmulq_m_n_s16): Remove.
35594 (__arm_vmulq_m_n_u8): Remove.
35595 (__arm_vmulq_m_n_u32): Remove.
35596 (__arm_vmulq_m_n_u16): Remove.
35597 (__arm_vmulq_m_s8): Remove.
35598 (__arm_vmulq_m_s32): Remove.
35599 (__arm_vmulq_m_s16): Remove.
35600 (__arm_vmulq_m_u8): Remove.
35601 (__arm_vmulq_m_u32): Remove.
35602 (__arm_vmulq_m_u16): Remove.
35603 (__arm_vmulq_x_s8): Remove.
35604 (__arm_vmulq_x_s16): Remove.
35605 (__arm_vmulq_x_s32): Remove.
35606 (__arm_vmulq_x_n_s8): Remove.
35607 (__arm_vmulq_x_n_s16): Remove.
35608 (__arm_vmulq_x_n_s32): Remove.
35609 (__arm_vmulq_x_u8): Remove.
35610 (__arm_vmulq_x_u16): Remove.
35611 (__arm_vmulq_x_u32): Remove.
35612 (__arm_vmulq_x_n_u8): Remove.
35613 (__arm_vmulq_x_n_u16): Remove.
35614 (__arm_vmulq_x_n_u32): Remove.
35615 (__arm_vmulq_n_f16): Remove.
35616 (__arm_vmulq_f16): Remove.
35617 (__arm_vmulq_n_f32): Remove.
35618 (__arm_vmulq_f32): Remove.
35619 (__arm_vmulq_m_f32): Remove.
35620 (__arm_vmulq_m_f16): Remove.
35621 (__arm_vmulq_m_n_f32): Remove.
35622 (__arm_vmulq_m_n_f16): Remove.
35623 (__arm_vmulq_x_f16): Remove.
35624 (__arm_vmulq_x_f32): Remove.
35625 (__arm_vmulq_x_n_f16): Remove.
35626 (__arm_vmulq_x_n_f32): Remove.
35627 (__arm_vmulq): Remove.
35628 (__arm_vmulq_m): Remove.
35629 (__arm_vmulq_x): Remove.
35633 (vsubq_n_f16): Remove.
35634 (vsubq_n_f32): Remove.
35635 (vsubq_u8): Remove.
35636 (vsubq_n_u8): Remove.
35637 (vsubq_s8): Remove.
35638 (vsubq_n_s8): Remove.
35639 (vsubq_u16): Remove.
35640 (vsubq_n_u16): Remove.
35641 (vsubq_s16): Remove.
35642 (vsubq_n_s16): Remove.
35643 (vsubq_u32): Remove.
35644 (vsubq_n_u32): Remove.
35645 (vsubq_s32): Remove.
35646 (vsubq_n_s32): Remove.
35647 (vsubq_f16): Remove.
35648 (vsubq_f32): Remove.
35649 (vsubq_m_s8): Remove.
35650 (vsubq_m_u8): Remove.
35651 (vsubq_m_s16): Remove.
35652 (vsubq_m_u16): Remove.
35653 (vsubq_m_s32): Remove.
35654 (vsubq_m_u32): Remove.
35655 (vsubq_m_n_s8): Remove.
35656 (vsubq_m_n_s32): Remove.
35657 (vsubq_m_n_s16): Remove.
35658 (vsubq_m_n_u8): Remove.
35659 (vsubq_m_n_u32): Remove.
35660 (vsubq_m_n_u16): Remove.
35661 (vsubq_m_f32): Remove.
35662 (vsubq_m_f16): Remove.
35663 (vsubq_m_n_f32): Remove.
35664 (vsubq_m_n_f16): Remove.
35665 (vsubq_x_s8): Remove.
35666 (vsubq_x_s16): Remove.
35667 (vsubq_x_s32): Remove.
35668 (vsubq_x_n_s8): Remove.
35669 (vsubq_x_n_s16): Remove.
35670 (vsubq_x_n_s32): Remove.
35671 (vsubq_x_u8): Remove.
35672 (vsubq_x_u16): Remove.
35673 (vsubq_x_u32): Remove.
35674 (vsubq_x_n_u8): Remove.
35675 (vsubq_x_n_u16): Remove.
35676 (vsubq_x_n_u32): Remove.
35677 (vsubq_x_f16): Remove.
35678 (vsubq_x_f32): Remove.
35679 (vsubq_x_n_f16): Remove.
35680 (vsubq_x_n_f32): Remove.
35681 (__arm_vsubq_u8): Remove.
35682 (__arm_vsubq_n_u8): Remove.
35683 (__arm_vsubq_s8): Remove.
35684 (__arm_vsubq_n_s8): Remove.
35685 (__arm_vsubq_u16): Remove.
35686 (__arm_vsubq_n_u16): Remove.
35687 (__arm_vsubq_s16): Remove.
35688 (__arm_vsubq_n_s16): Remove.
35689 (__arm_vsubq_u32): Remove.
35690 (__arm_vsubq_n_u32): Remove.
35691 (__arm_vsubq_s32): Remove.
35692 (__arm_vsubq_n_s32): Remove.
35693 (__arm_vsubq_m_s8): Remove.
35694 (__arm_vsubq_m_u8): Remove.
35695 (__arm_vsubq_m_s16): Remove.
35696 (__arm_vsubq_m_u16): Remove.
35697 (__arm_vsubq_m_s32): Remove.
35698 (__arm_vsubq_m_u32): Remove.
35699 (__arm_vsubq_m_n_s8): Remove.
35700 (__arm_vsubq_m_n_s32): Remove.
35701 (__arm_vsubq_m_n_s16): Remove.
35702 (__arm_vsubq_m_n_u8): Remove.
35703 (__arm_vsubq_m_n_u32): Remove.
35704 (__arm_vsubq_m_n_u16): Remove.
35705 (__arm_vsubq_x_s8): Remove.
35706 (__arm_vsubq_x_s16): Remove.
35707 (__arm_vsubq_x_s32): Remove.
35708 (__arm_vsubq_x_n_s8): Remove.
35709 (__arm_vsubq_x_n_s16): Remove.
35710 (__arm_vsubq_x_n_s32): Remove.
35711 (__arm_vsubq_x_u8): Remove.
35712 (__arm_vsubq_x_u16): Remove.
35713 (__arm_vsubq_x_u32): Remove.
35714 (__arm_vsubq_x_n_u8): Remove.
35715 (__arm_vsubq_x_n_u16): Remove.
35716 (__arm_vsubq_x_n_u32): Remove.
35717 (__arm_vsubq_n_f16): Remove.
35718 (__arm_vsubq_n_f32): Remove.
35719 (__arm_vsubq_f16): Remove.
35720 (__arm_vsubq_f32): Remove.
35721 (__arm_vsubq_m_f32): Remove.
35722 (__arm_vsubq_m_f16): Remove.
35723 (__arm_vsubq_m_n_f32): Remove.
35724 (__arm_vsubq_m_n_f16): Remove.
35725 (__arm_vsubq_x_f16): Remove.
35726 (__arm_vsubq_x_f32): Remove.
35727 (__arm_vsubq_x_n_f16): Remove.
35728 (__arm_vsubq_x_n_f32): Remove.
35729 (__arm_vsubq): Remove.
35730 (__arm_vsubq_m): Remove.
35731 (__arm_vsubq_x): Remove.
35732 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
35734 (vmulq_u, vmulq_s, vmulq_f): Remove.
35735 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
35736 (mve_vmulq_<supf><mode>): Remove.
35738 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35740 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
35741 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
35742 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
35744 * config/arm/mve.md
35745 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
35747 (@mve_<mve_insn>q_n_f<mode>): ... this.
35748 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
35749 (mve_vsubq_n_<supf><mode>): Factorize into ...
35750 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
35751 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
35753 (mve_<mve_addsubmul>q<mode>): ... this.
35754 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
35756 (mve_<mve_addsubmul>q_f<mode>): ... this.
35757 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
35758 (mve_vsubq_m_<supf><mode>): Factorize into ...
35759 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
35760 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
35761 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
35762 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
35763 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
35765 (@mve_<mve_insn>q_m_f<mode>): ... this.
35766 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
35767 (mve_vsubq_m_n_f<mode>): Factorize into ...
35768 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
35770 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35772 * config/arm/arm-mve-builtins-functions.h (class
35773 unspec_based_mve_function_base): New.
35774 (class unspec_based_mve_function_exact_insn): New.
35776 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
35778 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
35779 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
35781 2023-05-03 Murray Steele <murray.steele@arm.com>
35782 Christophe Lyon <christophe.lyon@arm.com>
35784 * config/arm/arm-mve-builtins-base.cc (class
35785 vuninitializedq_impl): New.
35786 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
35787 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
35789 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
35790 * config/arm/arm-mve-builtins-shapes.h (inherent): New
35792 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
35793 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
35794 (__arm_vuninitializedq_u8): Remove.
35795 (__arm_vuninitializedq_u16): Remove.
35796 (__arm_vuninitializedq_u32): Remove.
35797 (__arm_vuninitializedq_u64): Remove.
35798 (__arm_vuninitializedq_s8): Remove.
35799 (__arm_vuninitializedq_s16): Remove.
35800 (__arm_vuninitializedq_s32): Remove.
35801 (__arm_vuninitializedq_s64): Remove.
35802 (__arm_vuninitializedq_f16): Remove.
35803 (__arm_vuninitializedq_f32): Remove.
35805 2023-05-03 Murray Steele <murray.steele@arm.com>
35806 Christophe Lyon <christophe.lyon@arm.com>
35808 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
35809 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
35810 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
35811 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
35812 (parse_type): Likewise.
35813 (parse_signature): Likewise.
35814 (build_one): Likewise.
35815 (build_all): Likewise.
35816 (overloaded_base): New struct.
35817 (unary_convert_def): Likewise.
35818 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
35819 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
35821 (TYPES_reinterpret_unsigned1): Likewise.
35822 (TYPES_reinterpret_integer): Likewise.
35823 (TYPES_reinterpret_integer1): Likewise.
35824 (TYPES_reinterpret_float1): Likewise.
35825 (TYPES_reinterpret_float): Likewise.
35826 (reinterpret_integer): New.
35827 (reinterpret_float): New.
35828 (handle_arm_mve_h): Register builtins.
35829 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
35830 (vreinterpretq_s32): Likewise.
35831 (vreinterpretq_s64): Likewise.
35832 (vreinterpretq_s8): Likewise.
35833 (vreinterpretq_u16): Likewise.
35834 (vreinterpretq_u32): Likewise.
35835 (vreinterpretq_u64): Likewise.
35836 (vreinterpretq_u8): Likewise.
35837 (vreinterpretq_f16): Likewise.
35838 (vreinterpretq_f32): Likewise.
35839 (vreinterpretq_s16_s32): Likewise.
35840 (vreinterpretq_s16_s64): Likewise.
35841 (vreinterpretq_s16_s8): Likewise.
35842 (vreinterpretq_s16_u16): Likewise.
35843 (vreinterpretq_s16_u32): Likewise.
35844 (vreinterpretq_s16_u64): Likewise.
35845 (vreinterpretq_s16_u8): Likewise.
35846 (vreinterpretq_s32_s16): Likewise.
35847 (vreinterpretq_s32_s64): Likewise.
35848 (vreinterpretq_s32_s8): Likewise.
35849 (vreinterpretq_s32_u16): Likewise.
35850 (vreinterpretq_s32_u32): Likewise.
35851 (vreinterpretq_s32_u64): Likewise.
35852 (vreinterpretq_s32_u8): Likewise.
35853 (vreinterpretq_s64_s16): Likewise.
35854 (vreinterpretq_s64_s32): Likewise.
35855 (vreinterpretq_s64_s8): Likewise.
35856 (vreinterpretq_s64_u16): Likewise.
35857 (vreinterpretq_s64_u32): Likewise.
35858 (vreinterpretq_s64_u64): Likewise.
35859 (vreinterpretq_s64_u8): Likewise.
35860 (vreinterpretq_s8_s16): Likewise.
35861 (vreinterpretq_s8_s32): Likewise.
35862 (vreinterpretq_s8_s64): Likewise.
35863 (vreinterpretq_s8_u16): Likewise.
35864 (vreinterpretq_s8_u32): Likewise.
35865 (vreinterpretq_s8_u64): Likewise.
35866 (vreinterpretq_s8_u8): Likewise.
35867 (vreinterpretq_u16_s16): Likewise.
35868 (vreinterpretq_u16_s32): Likewise.
35869 (vreinterpretq_u16_s64): Likewise.
35870 (vreinterpretq_u16_s8): Likewise.
35871 (vreinterpretq_u16_u32): Likewise.
35872 (vreinterpretq_u16_u64): Likewise.
35873 (vreinterpretq_u16_u8): Likewise.
35874 (vreinterpretq_u32_s16): Likewise.
35875 (vreinterpretq_u32_s32): Likewise.
35876 (vreinterpretq_u32_s64): Likewise.
35877 (vreinterpretq_u32_s8): Likewise.
35878 (vreinterpretq_u32_u16): Likewise.
35879 (vreinterpretq_u32_u64): Likewise.
35880 (vreinterpretq_u32_u8): Likewise.
35881 (vreinterpretq_u64_s16): Likewise.
35882 (vreinterpretq_u64_s32): Likewise.
35883 (vreinterpretq_u64_s64): Likewise.
35884 (vreinterpretq_u64_s8): Likewise.
35885 (vreinterpretq_u64_u16): Likewise.
35886 (vreinterpretq_u64_u32): Likewise.
35887 (vreinterpretq_u64_u8): Likewise.
35888 (vreinterpretq_u8_s16): Likewise.
35889 (vreinterpretq_u8_s32): Likewise.
35890 (vreinterpretq_u8_s64): Likewise.
35891 (vreinterpretq_u8_s8): Likewise.
35892 (vreinterpretq_u8_u16): Likewise.
35893 (vreinterpretq_u8_u32): Likewise.
35894 (vreinterpretq_u8_u64): Likewise.
35895 (vreinterpretq_s32_f16): Likewise.
35896 (vreinterpretq_s32_f32): Likewise.
35897 (vreinterpretq_u16_f16): Likewise.
35898 (vreinterpretq_u16_f32): Likewise.
35899 (vreinterpretq_u32_f16): Likewise.
35900 (vreinterpretq_u32_f32): Likewise.
35901 (vreinterpretq_u64_f16): Likewise.
35902 (vreinterpretq_u64_f32): Likewise.
35903 (vreinterpretq_u8_f16): Likewise.
35904 (vreinterpretq_u8_f32): Likewise.
35905 (vreinterpretq_f16_f32): Likewise.
35906 (vreinterpretq_f16_s16): Likewise.
35907 (vreinterpretq_f16_s32): Likewise.
35908 (vreinterpretq_f16_s64): Likewise.
35909 (vreinterpretq_f16_s8): Likewise.
35910 (vreinterpretq_f16_u16): Likewise.
35911 (vreinterpretq_f16_u32): Likewise.
35912 (vreinterpretq_f16_u64): Likewise.
35913 (vreinterpretq_f16_u8): Likewise.
35914 (vreinterpretq_f32_f16): Likewise.
35915 (vreinterpretq_f32_s16): Likewise.
35916 (vreinterpretq_f32_s32): Likewise.
35917 (vreinterpretq_f32_s64): Likewise.
35918 (vreinterpretq_f32_s8): Likewise.
35919 (vreinterpretq_f32_u16): Likewise.
35920 (vreinterpretq_f32_u32): Likewise.
35921 (vreinterpretq_f32_u64): Likewise.
35922 (vreinterpretq_f32_u8): Likewise.
35923 (vreinterpretq_s16_f16): Likewise.
35924 (vreinterpretq_s16_f32): Likewise.
35925 (vreinterpretq_s64_f16): Likewise.
35926 (vreinterpretq_s64_f32): Likewise.
35927 (vreinterpretq_s8_f16): Likewise.
35928 (vreinterpretq_s8_f32): Likewise.
35929 (__arm_vreinterpretq_f16): Likewise.
35930 (__arm_vreinterpretq_f32): Likewise.
35931 (__arm_vreinterpretq_s16): Likewise.
35932 (__arm_vreinterpretq_s32): Likewise.
35933 (__arm_vreinterpretq_s64): Likewise.
35934 (__arm_vreinterpretq_s8): Likewise.
35935 (__arm_vreinterpretq_u16): Likewise.
35936 (__arm_vreinterpretq_u32): Likewise.
35937 (__arm_vreinterpretq_u64): Likewise.
35938 (__arm_vreinterpretq_u8): Likewise.
35939 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
35940 (__arm_vreinterpretq_s16_s64): Likewise.
35941 (__arm_vreinterpretq_s16_s8): Likewise.
35942 (__arm_vreinterpretq_s16_u16): Likewise.
35943 (__arm_vreinterpretq_s16_u32): Likewise.
35944 (__arm_vreinterpretq_s16_u64): Likewise.
35945 (__arm_vreinterpretq_s16_u8): Likewise.
35946 (__arm_vreinterpretq_s32_s16): Likewise.
35947 (__arm_vreinterpretq_s32_s64): Likewise.
35948 (__arm_vreinterpretq_s32_s8): Likewise.
35949 (__arm_vreinterpretq_s32_u16): Likewise.
35950 (__arm_vreinterpretq_s32_u32): Likewise.
35951 (__arm_vreinterpretq_s32_u64): Likewise.
35952 (__arm_vreinterpretq_s32_u8): Likewise.
35953 (__arm_vreinterpretq_s64_s16): Likewise.
35954 (__arm_vreinterpretq_s64_s32): Likewise.
35955 (__arm_vreinterpretq_s64_s8): Likewise.
35956 (__arm_vreinterpretq_s64_u16): Likewise.
35957 (__arm_vreinterpretq_s64_u32): Likewise.
35958 (__arm_vreinterpretq_s64_u64): Likewise.
35959 (__arm_vreinterpretq_s64_u8): Likewise.
35960 (__arm_vreinterpretq_s8_s16): Likewise.
35961 (__arm_vreinterpretq_s8_s32): Likewise.
35962 (__arm_vreinterpretq_s8_s64): Likewise.
35963 (__arm_vreinterpretq_s8_u16): Likewise.
35964 (__arm_vreinterpretq_s8_u32): Likewise.
35965 (__arm_vreinterpretq_s8_u64): Likewise.
35966 (__arm_vreinterpretq_s8_u8): Likewise.
35967 (__arm_vreinterpretq_u16_s16): Likewise.
35968 (__arm_vreinterpretq_u16_s32): Likewise.
35969 (__arm_vreinterpretq_u16_s64): Likewise.
35970 (__arm_vreinterpretq_u16_s8): Likewise.
35971 (__arm_vreinterpretq_u16_u32): Likewise.
35972 (__arm_vreinterpretq_u16_u64): Likewise.
35973 (__arm_vreinterpretq_u16_u8): Likewise.
35974 (__arm_vreinterpretq_u32_s16): Likewise.
35975 (__arm_vreinterpretq_u32_s32): Likewise.
35976 (__arm_vreinterpretq_u32_s64): Likewise.
35977 (__arm_vreinterpretq_u32_s8): Likewise.
35978 (__arm_vreinterpretq_u32_u16): Likewise.
35979 (__arm_vreinterpretq_u32_u64): Likewise.
35980 (__arm_vreinterpretq_u32_u8): Likewise.
35981 (__arm_vreinterpretq_u64_s16): Likewise.
35982 (__arm_vreinterpretq_u64_s32): Likewise.
35983 (__arm_vreinterpretq_u64_s64): Likewise.
35984 (__arm_vreinterpretq_u64_s8): Likewise.
35985 (__arm_vreinterpretq_u64_u16): Likewise.
35986 (__arm_vreinterpretq_u64_u32): Likewise.
35987 (__arm_vreinterpretq_u64_u8): Likewise.
35988 (__arm_vreinterpretq_u8_s16): Likewise.
35989 (__arm_vreinterpretq_u8_s32): Likewise.
35990 (__arm_vreinterpretq_u8_s64): Likewise.
35991 (__arm_vreinterpretq_u8_s8): Likewise.
35992 (__arm_vreinterpretq_u8_u16): Likewise.
35993 (__arm_vreinterpretq_u8_u32): Likewise.
35994 (__arm_vreinterpretq_u8_u64): Likewise.
35995 (__arm_vreinterpretq_s32_f16): Likewise.
35996 (__arm_vreinterpretq_s32_f32): Likewise.
35997 (__arm_vreinterpretq_s16_f16): Likewise.
35998 (__arm_vreinterpretq_s16_f32): Likewise.
35999 (__arm_vreinterpretq_s64_f16): Likewise.
36000 (__arm_vreinterpretq_s64_f32): Likewise.
36001 (__arm_vreinterpretq_s8_f16): Likewise.
36002 (__arm_vreinterpretq_s8_f32): Likewise.
36003 (__arm_vreinterpretq_u16_f16): Likewise.
36004 (__arm_vreinterpretq_u16_f32): Likewise.
36005 (__arm_vreinterpretq_u32_f16): Likewise.
36006 (__arm_vreinterpretq_u32_f32): Likewise.
36007 (__arm_vreinterpretq_u64_f16): Likewise.
36008 (__arm_vreinterpretq_u64_f32): Likewise.
36009 (__arm_vreinterpretq_u8_f16): Likewise.
36010 (__arm_vreinterpretq_u8_f32): Likewise.
36011 (__arm_vreinterpretq_f16_f32): Likewise.
36012 (__arm_vreinterpretq_f16_s16): Likewise.
36013 (__arm_vreinterpretq_f16_s32): Likewise.
36014 (__arm_vreinterpretq_f16_s64): Likewise.
36015 (__arm_vreinterpretq_f16_s8): Likewise.
36016 (__arm_vreinterpretq_f16_u16): Likewise.
36017 (__arm_vreinterpretq_f16_u32): Likewise.
36018 (__arm_vreinterpretq_f16_u64): Likewise.
36019 (__arm_vreinterpretq_f16_u8): Likewise.
36020 (__arm_vreinterpretq_f32_f16): Likewise.
36021 (__arm_vreinterpretq_f32_s16): Likewise.
36022 (__arm_vreinterpretq_f32_s32): Likewise.
36023 (__arm_vreinterpretq_f32_s64): Likewise.
36024 (__arm_vreinterpretq_f32_s8): Likewise.
36025 (__arm_vreinterpretq_f32_u16): Likewise.
36026 (__arm_vreinterpretq_f32_u32): Likewise.
36027 (__arm_vreinterpretq_f32_u64): Likewise.
36028 (__arm_vreinterpretq_f32_u8): Likewise.
36029 (__arm_vreinterpretq_s16): Likewise.
36030 (__arm_vreinterpretq_s32): Likewise.
36031 (__arm_vreinterpretq_s64): Likewise.
36032 (__arm_vreinterpretq_s8): Likewise.
36033 (__arm_vreinterpretq_u16): Likewise.
36034 (__arm_vreinterpretq_u32): Likewise.
36035 (__arm_vreinterpretq_u64): Likewise.
36036 (__arm_vreinterpretq_u8): Likewise.
36037 (__arm_vreinterpretq_f16): Likewise.
36038 (__arm_vreinterpretq_f32): Likewise.
36039 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
36040 * config/arm/unspecs.md: (REINTERPRET): New unspec.
36042 2023-05-03 Murray Steele <murray.steele@arm.com>
36043 Christophe Lyon <christophe.lyon@arm.com>
36044 Christophe Lyon <christophe.lyon@arm.com
36046 * config.gcc: Add arm-mve-builtins-base.o and
36047 arm-mve-builtins-shapes.o to extra_objs.
36048 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
36050 (arm_expand_builtin): Likewise
36051 (arm_check_builtin_call): Likewise
36052 (arm_describe_resolver): Likewise.
36053 * config/arm/arm-builtins.h (enum resolver_ident): Add
36055 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
36056 (arm_resolve_overloaded_builtin): Handle MVE builtins.
36057 (arm_register_target_pragmas): Register arm_check_builtin_call.
36058 * config/arm/arm-mve-builtins.cc (class registered_function): New
36060 (struct registered_function_hasher): New struct.
36061 (pred_suffixes): New table.
36062 (mode_suffixes): New table.
36063 (type_suffix_info): New table.
36064 (TYPES_float16): New.
36065 (TYPES_all_float): New.
36066 (TYPES_integer_8): New.
36067 (TYPES_integer_8_16): New.
36068 (TYPES_integer_16_32): New.
36069 (TYPES_integer_32): New.
36070 (TYPES_signed_16_32): New.
36071 (TYPES_signed_32): New.
36072 (TYPES_all_signed): New.
36073 (TYPES_all_unsigned): New.
36074 (TYPES_all_integer): New.
36075 (TYPES_all_integer_with_64): New.
36076 (DEF_VECTOR_TYPE): New.
36077 (DEF_DOUBLE_TYPE): New.
36078 (DEF_MVE_TYPES_ARRAY): New.
36079 (all_integer): New.
36080 (all_integer_with_64): New.
36084 (all_unsigned): New.
36086 (integer_8_16): New.
36087 (integer_16_32): New.
36089 (signed_16_32): New.
36091 (register_vector_type): Use void_type_node for mve.fp-only types when
36092 mve.fp is not enabled.
36093 (register_builtin_tuple_types): Likewise.
36094 (handle_arm_mve_h): New function..
36095 (matches_type_p): Likewise..
36096 (report_out_of_range): Likewise.
36097 (report_not_enum): Likewise.
36098 (report_missing_float): Likewise.
36099 (report_non_ice): Likewise.
36100 (check_requires_float): Likewise.
36101 (function_instance::hash): Likewise
36102 (function_instance::call_properties): Likewise.
36103 (function_instance::reads_global_state_p): Likewise.
36104 (function_instance::modifies_global_state_p): Likewise.
36105 (function_instance::could_trap_p): Likewise.
36106 (function_instance::has_inactive_argument): Likewise.
36107 (registered_function_hasher::hash): Likewise.
36108 (registered_function_hasher::equal): Likewise.
36109 (function_builder::function_builder): Likewise.
36110 (function_builder::~function_builder): Likewise.
36111 (function_builder::append_name): Likewise.
36112 (function_builder::finish_name): Likewise.
36113 (function_builder::get_name): Likewise.
36114 (add_attribute): Likewise.
36115 (function_builder::get_attributes): Likewise.
36116 (function_builder::add_function): Likewise.
36117 (function_builder::add_unique_function): Likewise.
36118 (function_builder::add_overloaded_function): Likewise.
36119 (function_builder::add_overloaded_functions): Likewise.
36120 (function_builder::register_function_group): Likewise.
36121 (function_call_info::function_call_info): Likewise.
36122 (function_resolver::function_resolver): Likewise.
36123 (function_resolver::get_vector_type): Likewise.
36124 (function_resolver::get_scalar_type_name): Likewise.
36125 (function_resolver::get_argument_type): Likewise.
36126 (function_resolver::scalar_argument_p): Likewise.
36127 (function_resolver::report_no_such_form): Likewise.
36128 (function_resolver::lookup_form): Likewise.
36129 (function_resolver::resolve_to): Likewise.
36130 (function_resolver::infer_vector_or_tuple_type): Likewise.
36131 (function_resolver::infer_vector_type): Likewise.
36132 (function_resolver::require_vector_or_scalar_type): Likewise.
36133 (function_resolver::require_vector_type): Likewise.
36134 (function_resolver::require_matching_vector_type): Likewise.
36135 (function_resolver::require_derived_vector_type): Likewise.
36136 (function_resolver::require_derived_scalar_type): Likewise.
36137 (function_resolver::require_integer_immediate): Likewise.
36138 (function_resolver::require_scalar_type): Likewise.
36139 (function_resolver::check_num_arguments): Likewise.
36140 (function_resolver::check_gp_argument): Likewise.
36141 (function_resolver::finish_opt_n_resolution): Likewise.
36142 (function_resolver::resolve_unary): Likewise.
36143 (function_resolver::resolve_unary_n): Likewise.
36144 (function_resolver::resolve_uniform): Likewise.
36145 (function_resolver::resolve_uniform_opt_n): Likewise.
36146 (function_resolver::resolve): Likewise.
36147 (function_checker::function_checker): Likewise.
36148 (function_checker::argument_exists_p): Likewise.
36149 (function_checker::require_immediate): Likewise.
36150 (function_checker::require_immediate_enum): Likewise.
36151 (function_checker::require_immediate_range): Likewise.
36152 (function_checker::check): Likewise.
36153 (gimple_folder::gimple_folder): Likewise.
36154 (gimple_folder::fold): Likewise.
36155 (function_expander::function_expander): Likewise.
36156 (function_expander::direct_optab_handler): Likewise.
36157 (function_expander::get_fallback_value): Likewise.
36158 (function_expander::get_reg_target): Likewise.
36159 (function_expander::add_output_operand): Likewise.
36160 (function_expander::add_input_operand): Likewise.
36161 (function_expander::add_integer_operand): Likewise.
36162 (function_expander::generate_insn): Likewise.
36163 (function_expander::use_exact_insn): Likewise.
36164 (function_expander::use_unpred_insn): Likewise.
36165 (function_expander::use_pred_x_insn): Likewise.
36166 (function_expander::use_cond_insn): Likewise.
36167 (function_expander::map_to_rtx_codes): Likewise.
36168 (function_expander::expand): Likewise.
36169 (resolve_overloaded_builtin): Likewise.
36170 (check_builtin_call): Likewise.
36171 (gimple_fold_builtin): Likewise.
36172 (expand_builtin): Likewise.
36173 (gt_ggc_mx): Likewise.
36174 (gt_pch_nx): Likewise.
36175 (gt_pch_nx): Likewise.
36176 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
36187 (offset): New mode.
36188 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
36189 (CP_READ_FPCR): Likewise.
36190 (CP_RAISE_FP_EXCEPTIONS): Likewise.
36191 (CP_READ_MEMORY): Likewise.
36192 (CP_WRITE_MEMORY): Likewise.
36193 (enum units_index): New enum.
36194 (enum predication_index): New.
36195 (enum type_class_index): New.
36196 (enum mode_suffix_index): New enum.
36197 (enum type_suffix_index): New.
36198 (struct mode_suffix_info): New struct.
36199 (struct type_suffix_info): New.
36200 (struct function_group_info): Likewise.
36201 (class function_instance): Likewise.
36202 (class registered_function): Likewise.
36203 (class function_builder): Likewise.
36204 (class function_call_info): Likewise.
36205 (class function_resolver): Likewise.
36206 (class function_checker): Likewise.
36207 (class gimple_folder): Likewise.
36208 (class function_expander): Likewise.
36209 (get_mve_pred16_t): Likewise.
36210 (find_mode_suffix): New function.
36211 (class function_base): Likewise.
36212 (class function_shape): Likewise.
36213 (function_instance::operator==): New function.
36214 (function_instance::operator!=): Likewise.
36215 (function_instance::vectors_per_tuple): Likewise.
36216 (function_instance::mode_suffix): Likewise.
36217 (function_instance::type_suffix): Likewise.
36218 (function_instance::scalar_type): Likewise.
36219 (function_instance::vector_type): Likewise.
36220 (function_instance::tuple_type): Likewise.
36221 (function_instance::vector_mode): Likewise.
36222 (function_call_info::function_returns_void_p): Likewise.
36223 (function_base::call_properties): Likewise.
36224 * config/arm/arm-protos.h (enum arm_builtin_class): Add
36226 (handle_arm_mve_h): New.
36227 (resolve_overloaded_builtin): New.
36228 (check_builtin_call): New.
36229 (gimple_fold_builtin): New.
36230 (expand_builtin): New.
36231 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
36232 arm_gimple_fold_builtin.
36233 (arm_gimple_fold_builtin): New function.
36234 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
36235 * config/arm/predicates.md (arm_any_register_operand): New predicate.
36236 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
36237 (arm-mve-builtins-shapes.o): New target.
36238 (arm-mve-builtins-base.o): New target.
36239 * config/arm/arm-mve-builtins-base.cc: New file.
36240 * config/arm/arm-mve-builtins-base.def: New file.
36241 * config/arm/arm-mve-builtins-base.h: New file.
36242 * config/arm/arm-mve-builtins-functions.h: New file.
36243 * config/arm/arm-mve-builtins-shapes.cc: New file.
36244 * config/arm/arm-mve-builtins-shapes.h: New file.
36246 2023-05-03 Murray Steele <murray.steele@arm.com>
36247 Christophe Lyon <christophe.lyon@arm.com>
36248 Christophe Lyon <christophe.lyon@arm.com>
36250 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
36252 (arm_init_builtin): Use arm_general_add_builtin_function instead
36253 of arm_add_builtin_function.
36254 (arm_init_acle_builtins): Likewise.
36255 (arm_init_mve_builtins): Likewise.
36256 (arm_init_crypto_builtins): Likewise.
36257 (arm_init_builtins): Likewise.
36258 (arm_general_builtin_decl): New function.
36259 (arm_builtin_decl): Defer to numberspace-specialized functions.
36260 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
36261 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
36262 (arm_general_expand_builtin_1): ... specialize for general builtins.
36263 (arm_expand_acle_builtin): Use arm_general_expand_builtin
36264 instead of arm_expand_builtin.
36265 (arm_expand_mve_builtin): Likewise.
36266 (arm_expand_neon_builtin): Likewise.
36267 (arm_expand_vfp_builtin): Likewise.
36268 (arm_general_expand_builtin): New function.
36269 (arm_expand_builtin): Specialize for general builtins.
36270 (arm_general_check_builtin_call): New function.
36271 (arm_check_builtin_call): Specialize for general builtins.
36272 (arm_describe_resolver): Validate numberspace.
36273 (arm_cde_end_args): Likewise.
36274 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
36275 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
36277 2023-05-03 Martin Liska <mliska@suse.cz>
36280 * config/riscv/sync.md: Add gcc_unreachable to a switch.
36282 2023-05-03 Richard Biener <rguenther@suse.de>
36284 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
36285 (patch_loop_exit): Likewise.
36286 (connect_loops): Likewise.
36287 (split_loop): Likewise.
36288 (control_dep_semi_invariant_p): Likewise.
36289 (do_split_loop_on_cond): Likewise.
36290 (split_loop_on_cond): Likewise.
36291 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
36293 (simplify_loop_version): Likewise.
36294 (evaluate_bbs): Likewise.
36295 (find_loop_guard): Likewise.
36296 (clean_up_after_unswitching): Likewise.
36297 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
36299 (optimize_spaceship): Take a gcond * argument, avoid
36301 (math_opts_dom_walker::after_dom_children): Adjust call to
36302 optimize_spaceship.
36303 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
36304 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
36307 2023-05-03 Andreas Schwab <schwab@suse.de>
36309 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
36311 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36313 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
36315 (class vlseg): New class.
36316 (class vsseg): Ditto.
36317 (class vlsseg): Ditto.
36318 (class vssseg): Ditto.
36319 (class seg_indexed_load): Ditto.
36320 (class seg_indexed_store): Ditto.
36321 (class vlsegff): Ditto.
36323 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36324 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
36334 * config/riscv/riscv-vector-builtins-shapes.cc (struct
36335 seg_loadstore_def): Ditto.
36336 (struct seg_indexed_loadstore_def): Ditto.
36337 (struct seg_fault_load_def): Ditto.
36339 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36340 * config/riscv/riscv-vector-builtins.cc
36341 (function_builder::append_nf): New function.
36342 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
36343 Change ptr from double into float.
36344 (vfloat32m1x3_t): Ditto.
36345 (vfloat32m1x4_t): Ditto.
36346 (vfloat32m1x5_t): Ditto.
36347 (vfloat32m1x6_t): Ditto.
36348 (vfloat32m1x7_t): Ditto.
36349 (vfloat32m1x8_t): Ditto.
36350 (vfloat32m2x2_t): Ditto.
36351 (vfloat32m2x3_t): Ditto.
36352 (vfloat32m2x4_t): Ditto.
36353 (vfloat32m4x2_t): Ditto.
36354 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
36355 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
36357 * config/riscv/riscv.md: Add segment instructions.
36358 * config/riscv/vector-iterators.md: Support segment intrinsics.
36359 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
36361 (@pred_unit_strided_store<mode>): Ditto.
36362 (@pred_strided_load<mode>): Ditto.
36363 (@pred_strided_store<mode>): Ditto.
36364 (@pred_fault_load<mode>): Ditto.
36365 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
36366 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
36367 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
36368 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
36369 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
36370 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
36371 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
36372 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
36373 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
36374 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
36375 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
36376 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
36377 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
36378 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
36380 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36382 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
36383 tuple type support.
36385 (floattype): Ditto.
36387 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
36388 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
36390 (vget): Add tuple type vget.
36391 * config/riscv/riscv-vector-builtins-types.def
36392 (DEF_RVV_TUPLE_OPS): New macro.
36393 (vint8mf8x2_t): Ditto.
36394 (vuint8mf8x2_t): Ditto.
36395 (vint8mf8x3_t): Ditto.
36396 (vuint8mf8x3_t): Ditto.
36397 (vint8mf8x4_t): Ditto.
36398 (vuint8mf8x4_t): Ditto.
36399 (vint8mf8x5_t): Ditto.
36400 (vuint8mf8x5_t): Ditto.
36401 (vint8mf8x6_t): Ditto.
36402 (vuint8mf8x6_t): Ditto.
36403 (vint8mf8x7_t): Ditto.
36404 (vuint8mf8x7_t): Ditto.
36405 (vint8mf8x8_t): Ditto.
36406 (vuint8mf8x8_t): Ditto.
36407 (vint8mf4x2_t): Ditto.
36408 (vuint8mf4x2_t): Ditto.
36409 (vint8mf4x3_t): Ditto.
36410 (vuint8mf4x3_t): Ditto.
36411 (vint8mf4x4_t): Ditto.
36412 (vuint8mf4x4_t): Ditto.
36413 (vint8mf4x5_t): Ditto.
36414 (vuint8mf4x5_t): Ditto.
36415 (vint8mf4x6_t): Ditto.
36416 (vuint8mf4x6_t): Ditto.
36417 (vint8mf4x7_t): Ditto.
36418 (vuint8mf4x7_t): Ditto.
36419 (vint8mf4x8_t): Ditto.
36420 (vuint8mf4x8_t): Ditto.
36421 (vint8mf2x2_t): Ditto.
36422 (vuint8mf2x2_t): Ditto.
36423 (vint8mf2x3_t): Ditto.
36424 (vuint8mf2x3_t): Ditto.
36425 (vint8mf2x4_t): Ditto.
36426 (vuint8mf2x4_t): Ditto.
36427 (vint8mf2x5_t): Ditto.
36428 (vuint8mf2x5_t): Ditto.
36429 (vint8mf2x6_t): Ditto.
36430 (vuint8mf2x6_t): Ditto.
36431 (vint8mf2x7_t): Ditto.
36432 (vuint8mf2x7_t): Ditto.
36433 (vint8mf2x8_t): Ditto.
36434 (vuint8mf2x8_t): Ditto.
36435 (vint8m1x2_t): Ditto.
36436 (vuint8m1x2_t): Ditto.
36437 (vint8m1x3_t): Ditto.
36438 (vuint8m1x3_t): Ditto.
36439 (vint8m1x4_t): Ditto.
36440 (vuint8m1x4_t): Ditto.
36441 (vint8m1x5_t): Ditto.
36442 (vuint8m1x5_t): Ditto.
36443 (vint8m1x6_t): Ditto.
36444 (vuint8m1x6_t): Ditto.
36445 (vint8m1x7_t): Ditto.
36446 (vuint8m1x7_t): Ditto.
36447 (vint8m1x8_t): Ditto.
36448 (vuint8m1x8_t): Ditto.
36449 (vint8m2x2_t): Ditto.
36450 (vuint8m2x2_t): Ditto.
36451 (vint8m2x3_t): Ditto.
36452 (vuint8m2x3_t): Ditto.
36453 (vint8m2x4_t): Ditto.
36454 (vuint8m2x4_t): Ditto.
36455 (vint8m4x2_t): Ditto.
36456 (vuint8m4x2_t): Ditto.
36457 (vint16mf4x2_t): Ditto.
36458 (vuint16mf4x2_t): Ditto.
36459 (vint16mf4x3_t): Ditto.
36460 (vuint16mf4x3_t): Ditto.
36461 (vint16mf4x4_t): Ditto.
36462 (vuint16mf4x4_t): Ditto.
36463 (vint16mf4x5_t): Ditto.
36464 (vuint16mf4x5_t): Ditto.
36465 (vint16mf4x6_t): Ditto.
36466 (vuint16mf4x6_t): Ditto.
36467 (vint16mf4x7_t): Ditto.
36468 (vuint16mf4x7_t): Ditto.
36469 (vint16mf4x8_t): Ditto.
36470 (vuint16mf4x8_t): Ditto.
36471 (vint16mf2x2_t): Ditto.
36472 (vuint16mf2x2_t): Ditto.
36473 (vint16mf2x3_t): Ditto.
36474 (vuint16mf2x3_t): Ditto.
36475 (vint16mf2x4_t): Ditto.
36476 (vuint16mf2x4_t): Ditto.
36477 (vint16mf2x5_t): Ditto.
36478 (vuint16mf2x5_t): Ditto.
36479 (vint16mf2x6_t): Ditto.
36480 (vuint16mf2x6_t): Ditto.
36481 (vint16mf2x7_t): Ditto.
36482 (vuint16mf2x7_t): Ditto.
36483 (vint16mf2x8_t): Ditto.
36484 (vuint16mf2x8_t): Ditto.
36485 (vint16m1x2_t): Ditto.
36486 (vuint16m1x2_t): Ditto.
36487 (vint16m1x3_t): Ditto.
36488 (vuint16m1x3_t): Ditto.
36489 (vint16m1x4_t): Ditto.
36490 (vuint16m1x4_t): Ditto.
36491 (vint16m1x5_t): Ditto.
36492 (vuint16m1x5_t): Ditto.
36493 (vint16m1x6_t): Ditto.
36494 (vuint16m1x6_t): Ditto.
36495 (vint16m1x7_t): Ditto.
36496 (vuint16m1x7_t): Ditto.
36497 (vint16m1x8_t): Ditto.
36498 (vuint16m1x8_t): Ditto.
36499 (vint16m2x2_t): Ditto.
36500 (vuint16m2x2_t): Ditto.
36501 (vint16m2x3_t): Ditto.
36502 (vuint16m2x3_t): Ditto.
36503 (vint16m2x4_t): Ditto.
36504 (vuint16m2x4_t): Ditto.
36505 (vint16m4x2_t): Ditto.
36506 (vuint16m4x2_t): Ditto.
36507 (vint32mf2x2_t): Ditto.
36508 (vuint32mf2x2_t): Ditto.
36509 (vint32mf2x3_t): Ditto.
36510 (vuint32mf2x3_t): Ditto.
36511 (vint32mf2x4_t): Ditto.
36512 (vuint32mf2x4_t): Ditto.
36513 (vint32mf2x5_t): Ditto.
36514 (vuint32mf2x5_t): Ditto.
36515 (vint32mf2x6_t): Ditto.
36516 (vuint32mf2x6_t): Ditto.
36517 (vint32mf2x7_t): Ditto.
36518 (vuint32mf2x7_t): Ditto.
36519 (vint32mf2x8_t): Ditto.
36520 (vuint32mf2x8_t): Ditto.
36521 (vint32m1x2_t): Ditto.
36522 (vuint32m1x2_t): Ditto.
36523 (vint32m1x3_t): Ditto.
36524 (vuint32m1x3_t): Ditto.
36525 (vint32m1x4_t): Ditto.
36526 (vuint32m1x4_t): Ditto.
36527 (vint32m1x5_t): Ditto.
36528 (vuint32m1x5_t): Ditto.
36529 (vint32m1x6_t): Ditto.
36530 (vuint32m1x6_t): Ditto.
36531 (vint32m1x7_t): Ditto.
36532 (vuint32m1x7_t): Ditto.
36533 (vint32m1x8_t): Ditto.
36534 (vuint32m1x8_t): Ditto.
36535 (vint32m2x2_t): Ditto.
36536 (vuint32m2x2_t): Ditto.
36537 (vint32m2x3_t): Ditto.
36538 (vuint32m2x3_t): Ditto.
36539 (vint32m2x4_t): Ditto.
36540 (vuint32m2x4_t): Ditto.
36541 (vint32m4x2_t): Ditto.
36542 (vuint32m4x2_t): Ditto.
36543 (vint64m1x2_t): Ditto.
36544 (vuint64m1x2_t): Ditto.
36545 (vint64m1x3_t): Ditto.
36546 (vuint64m1x3_t): Ditto.
36547 (vint64m1x4_t): Ditto.
36548 (vuint64m1x4_t): Ditto.
36549 (vint64m1x5_t): Ditto.
36550 (vuint64m1x5_t): Ditto.
36551 (vint64m1x6_t): Ditto.
36552 (vuint64m1x6_t): Ditto.
36553 (vint64m1x7_t): Ditto.
36554 (vuint64m1x7_t): Ditto.
36555 (vint64m1x8_t): Ditto.
36556 (vuint64m1x8_t): Ditto.
36557 (vint64m2x2_t): Ditto.
36558 (vuint64m2x2_t): Ditto.
36559 (vint64m2x3_t): Ditto.
36560 (vuint64m2x3_t): Ditto.
36561 (vint64m2x4_t): Ditto.
36562 (vuint64m2x4_t): Ditto.
36563 (vint64m4x2_t): Ditto.
36564 (vuint64m4x2_t): Ditto.
36565 (vfloat32mf2x2_t): Ditto.
36566 (vfloat32mf2x3_t): Ditto.
36567 (vfloat32mf2x4_t): Ditto.
36568 (vfloat32mf2x5_t): Ditto.
36569 (vfloat32mf2x6_t): Ditto.
36570 (vfloat32mf2x7_t): Ditto.
36571 (vfloat32mf2x8_t): Ditto.
36572 (vfloat32m1x2_t): Ditto.
36573 (vfloat32m1x3_t): Ditto.
36574 (vfloat32m1x4_t): Ditto.
36575 (vfloat32m1x5_t): Ditto.
36576 (vfloat32m1x6_t): Ditto.
36577 (vfloat32m1x7_t): Ditto.
36578 (vfloat32m1x8_t): Ditto.
36579 (vfloat32m2x2_t): Ditto.
36580 (vfloat32m2x3_t): Ditto.
36581 (vfloat32m2x4_t): Ditto.
36582 (vfloat32m4x2_t): Ditto.
36583 (vfloat64m1x2_t): Ditto.
36584 (vfloat64m1x3_t): Ditto.
36585 (vfloat64m1x4_t): Ditto.
36586 (vfloat64m1x5_t): Ditto.
36587 (vfloat64m1x6_t): Ditto.
36588 (vfloat64m1x7_t): Ditto.
36589 (vfloat64m1x8_t): Ditto.
36590 (vfloat64m2x2_t): Ditto.
36591 (vfloat64m2x3_t): Ditto.
36592 (vfloat64m2x4_t): Ditto.
36593 (vfloat64m4x2_t): Ditto.
36594 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
36596 (DEF_RVV_TYPE_INDEX): Ditto.
36597 (rvv_arg_type_info::get_tuple_subpart_type): New function.
36598 (DEF_RVV_TUPLE_TYPE): New macro.
36599 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
36600 Adapt for tuple vget/vset support.
36601 (vint8mf4_t): Ditto.
36602 (vuint8mf4_t): Ditto.
36603 (vint8mf2_t): Ditto.
36604 (vuint8mf2_t): Ditto.
36605 (vint8m1_t): Ditto.
36606 (vuint8m1_t): Ditto.
36607 (vint8m2_t): Ditto.
36608 (vuint8m2_t): Ditto.
36609 (vint8m4_t): Ditto.
36610 (vuint8m4_t): Ditto.
36611 (vint8m8_t): Ditto.
36612 (vuint8m8_t): Ditto.
36613 (vint16mf4_t): Ditto.
36614 (vuint16mf4_t): Ditto.
36615 (vint16mf2_t): Ditto.
36616 (vuint16mf2_t): Ditto.
36617 (vint16m1_t): Ditto.
36618 (vuint16m1_t): Ditto.
36619 (vint16m2_t): Ditto.
36620 (vuint16m2_t): Ditto.
36621 (vint16m4_t): Ditto.
36622 (vuint16m4_t): Ditto.
36623 (vint16m8_t): Ditto.
36624 (vuint16m8_t): Ditto.
36625 (vint32mf2_t): Ditto.
36626 (vuint32mf2_t): Ditto.
36627 (vint32m1_t): Ditto.
36628 (vuint32m1_t): Ditto.
36629 (vint32m2_t): Ditto.
36630 (vuint32m2_t): Ditto.
36631 (vint32m4_t): Ditto.
36632 (vuint32m4_t): Ditto.
36633 (vint32m8_t): Ditto.
36634 (vuint32m8_t): Ditto.
36635 (vint64m1_t): Ditto.
36636 (vuint64m1_t): Ditto.
36637 (vint64m2_t): Ditto.
36638 (vuint64m2_t): Ditto.
36639 (vint64m4_t): Ditto.
36640 (vuint64m4_t): Ditto.
36641 (vint64m8_t): Ditto.
36642 (vuint64m8_t): Ditto.
36643 (vfloat32mf2_t): Ditto.
36644 (vfloat32m1_t): Ditto.
36645 (vfloat32m2_t): Ditto.
36646 (vfloat32m4_t): Ditto.
36647 (vfloat32m8_t): Ditto.
36648 (vfloat64m1_t): Ditto.
36649 (vfloat64m2_t): Ditto.
36650 (vfloat64m4_t): Ditto.
36651 (vfloat64m8_t): Ditto.
36652 (tuple_subpart): Add tuple subpart base type.
36653 * config/riscv/riscv-vector-builtins.h (struct
36654 rvv_arg_type_info): Ditto.
36655 (tuple_type_field): New function.
36657 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36659 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
36660 (RVV_TUPLE_PARTIAL_MODES): Ditto.
36661 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
36664 (get_subpart_mode): Ditto.
36665 (get_tuple_mode): Ditto.
36666 (expand_tuple_move): Ditto.
36667 * config/riscv/riscv-v.cc (ENTRY): New macro.
36668 (TUPLE_ENTRY): Ditto.
36669 (get_nf): New function.
36670 (get_subpart_mode): Ditto.
36671 (get_tuple_mode): Ditto.
36672 (expand_tuple_move): Ditto.
36673 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
36675 (register_tuple_type): New function
36676 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
36678 (vint8mf8x2_t): New macro.
36679 (vuint8mf8x2_t): Ditto.
36680 (vint8mf8x3_t): Ditto.
36681 (vuint8mf8x3_t): Ditto.
36682 (vint8mf8x4_t): Ditto.
36683 (vuint8mf8x4_t): Ditto.
36684 (vint8mf8x5_t): Ditto.
36685 (vuint8mf8x5_t): Ditto.
36686 (vint8mf8x6_t): Ditto.
36687 (vuint8mf8x6_t): Ditto.
36688 (vint8mf8x7_t): Ditto.
36689 (vuint8mf8x7_t): Ditto.
36690 (vint8mf8x8_t): Ditto.
36691 (vuint8mf8x8_t): Ditto.
36692 (vint8mf4x2_t): Ditto.
36693 (vuint8mf4x2_t): Ditto.
36694 (vint8mf4x3_t): Ditto.
36695 (vuint8mf4x3_t): Ditto.
36696 (vint8mf4x4_t): Ditto.
36697 (vuint8mf4x4_t): Ditto.
36698 (vint8mf4x5_t): Ditto.
36699 (vuint8mf4x5_t): Ditto.
36700 (vint8mf4x6_t): Ditto.
36701 (vuint8mf4x6_t): Ditto.
36702 (vint8mf4x7_t): Ditto.
36703 (vuint8mf4x7_t): Ditto.
36704 (vint8mf4x8_t): Ditto.
36705 (vuint8mf4x8_t): Ditto.
36706 (vint8mf2x2_t): Ditto.
36707 (vuint8mf2x2_t): Ditto.
36708 (vint8mf2x3_t): Ditto.
36709 (vuint8mf2x3_t): Ditto.
36710 (vint8mf2x4_t): Ditto.
36711 (vuint8mf2x4_t): Ditto.
36712 (vint8mf2x5_t): Ditto.
36713 (vuint8mf2x5_t): Ditto.
36714 (vint8mf2x6_t): Ditto.
36715 (vuint8mf2x6_t): Ditto.
36716 (vint8mf2x7_t): Ditto.
36717 (vuint8mf2x7_t): Ditto.
36718 (vint8mf2x8_t): Ditto.
36719 (vuint8mf2x8_t): Ditto.
36720 (vint8m1x2_t): Ditto.
36721 (vuint8m1x2_t): Ditto.
36722 (vint8m1x3_t): Ditto.
36723 (vuint8m1x3_t): Ditto.
36724 (vint8m1x4_t): Ditto.
36725 (vuint8m1x4_t): Ditto.
36726 (vint8m1x5_t): Ditto.
36727 (vuint8m1x5_t): Ditto.
36728 (vint8m1x6_t): Ditto.
36729 (vuint8m1x6_t): Ditto.
36730 (vint8m1x7_t): Ditto.
36731 (vuint8m1x7_t): Ditto.
36732 (vint8m1x8_t): Ditto.
36733 (vuint8m1x8_t): Ditto.
36734 (vint8m2x2_t): Ditto.
36735 (vuint8m2x2_t): Ditto.
36736 (vint8m2x3_t): Ditto.
36737 (vuint8m2x3_t): Ditto.
36738 (vint8m2x4_t): Ditto.
36739 (vuint8m2x4_t): Ditto.
36740 (vint8m4x2_t): Ditto.
36741 (vuint8m4x2_t): Ditto.
36742 (vint16mf4x2_t): Ditto.
36743 (vuint16mf4x2_t): Ditto.
36744 (vint16mf4x3_t): Ditto.
36745 (vuint16mf4x3_t): Ditto.
36746 (vint16mf4x4_t): Ditto.
36747 (vuint16mf4x4_t): Ditto.
36748 (vint16mf4x5_t): Ditto.
36749 (vuint16mf4x5_t): Ditto.
36750 (vint16mf4x6_t): Ditto.
36751 (vuint16mf4x6_t): Ditto.
36752 (vint16mf4x7_t): Ditto.
36753 (vuint16mf4x7_t): Ditto.
36754 (vint16mf4x8_t): Ditto.
36755 (vuint16mf4x8_t): Ditto.
36756 (vint16mf2x2_t): Ditto.
36757 (vuint16mf2x2_t): Ditto.
36758 (vint16mf2x3_t): Ditto.
36759 (vuint16mf2x3_t): Ditto.
36760 (vint16mf2x4_t): Ditto.
36761 (vuint16mf2x4_t): Ditto.
36762 (vint16mf2x5_t): Ditto.
36763 (vuint16mf2x5_t): Ditto.
36764 (vint16mf2x6_t): Ditto.
36765 (vuint16mf2x6_t): Ditto.
36766 (vint16mf2x7_t): Ditto.
36767 (vuint16mf2x7_t): Ditto.
36768 (vint16mf2x8_t): Ditto.
36769 (vuint16mf2x8_t): Ditto.
36770 (vint16m1x2_t): Ditto.
36771 (vuint16m1x2_t): Ditto.
36772 (vint16m1x3_t): Ditto.
36773 (vuint16m1x3_t): Ditto.
36774 (vint16m1x4_t): Ditto.
36775 (vuint16m1x4_t): Ditto.
36776 (vint16m1x5_t): Ditto.
36777 (vuint16m1x5_t): Ditto.
36778 (vint16m1x6_t): Ditto.
36779 (vuint16m1x6_t): Ditto.
36780 (vint16m1x7_t): Ditto.
36781 (vuint16m1x7_t): Ditto.
36782 (vint16m1x8_t): Ditto.
36783 (vuint16m1x8_t): Ditto.
36784 (vint16m2x2_t): Ditto.
36785 (vuint16m2x2_t): Ditto.
36786 (vint16m2x3_t): Ditto.
36787 (vuint16m2x3_t): Ditto.
36788 (vint16m2x4_t): Ditto.
36789 (vuint16m2x4_t): Ditto.
36790 (vint16m4x2_t): Ditto.
36791 (vuint16m4x2_t): Ditto.
36792 (vint32mf2x2_t): Ditto.
36793 (vuint32mf2x2_t): Ditto.
36794 (vint32mf2x3_t): Ditto.
36795 (vuint32mf2x3_t): Ditto.
36796 (vint32mf2x4_t): Ditto.
36797 (vuint32mf2x4_t): Ditto.
36798 (vint32mf2x5_t): Ditto.
36799 (vuint32mf2x5_t): Ditto.
36800 (vint32mf2x6_t): Ditto.
36801 (vuint32mf2x6_t): Ditto.
36802 (vint32mf2x7_t): Ditto.
36803 (vuint32mf2x7_t): Ditto.
36804 (vint32mf2x8_t): Ditto.
36805 (vuint32mf2x8_t): Ditto.
36806 (vint32m1x2_t): Ditto.
36807 (vuint32m1x2_t): Ditto.
36808 (vint32m1x3_t): Ditto.
36809 (vuint32m1x3_t): Ditto.
36810 (vint32m1x4_t): Ditto.
36811 (vuint32m1x4_t): Ditto.
36812 (vint32m1x5_t): Ditto.
36813 (vuint32m1x5_t): Ditto.
36814 (vint32m1x6_t): Ditto.
36815 (vuint32m1x6_t): Ditto.
36816 (vint32m1x7_t): Ditto.
36817 (vuint32m1x7_t): Ditto.
36818 (vint32m1x8_t): Ditto.
36819 (vuint32m1x8_t): Ditto.
36820 (vint32m2x2_t): Ditto.
36821 (vuint32m2x2_t): Ditto.
36822 (vint32m2x3_t): Ditto.
36823 (vuint32m2x3_t): Ditto.
36824 (vint32m2x4_t): Ditto.
36825 (vuint32m2x4_t): Ditto.
36826 (vint32m4x2_t): Ditto.
36827 (vuint32m4x2_t): Ditto.
36828 (vint64m1x2_t): Ditto.
36829 (vuint64m1x2_t): Ditto.
36830 (vint64m1x3_t): Ditto.
36831 (vuint64m1x3_t): Ditto.
36832 (vint64m1x4_t): Ditto.
36833 (vuint64m1x4_t): Ditto.
36834 (vint64m1x5_t): Ditto.
36835 (vuint64m1x5_t): Ditto.
36836 (vint64m1x6_t): Ditto.
36837 (vuint64m1x6_t): Ditto.
36838 (vint64m1x7_t): Ditto.
36839 (vuint64m1x7_t): Ditto.
36840 (vint64m1x8_t): Ditto.
36841 (vuint64m1x8_t): Ditto.
36842 (vint64m2x2_t): Ditto.
36843 (vuint64m2x2_t): Ditto.
36844 (vint64m2x3_t): Ditto.
36845 (vuint64m2x3_t): Ditto.
36846 (vint64m2x4_t): Ditto.
36847 (vuint64m2x4_t): Ditto.
36848 (vint64m4x2_t): Ditto.
36849 (vuint64m4x2_t): Ditto.
36850 (vfloat32mf2x2_t): Ditto.
36851 (vfloat32mf2x3_t): Ditto.
36852 (vfloat32mf2x4_t): Ditto.
36853 (vfloat32mf2x5_t): Ditto.
36854 (vfloat32mf2x6_t): Ditto.
36855 (vfloat32mf2x7_t): Ditto.
36856 (vfloat32mf2x8_t): Ditto.
36857 (vfloat32m1x2_t): Ditto.
36858 (vfloat32m1x3_t): Ditto.
36859 (vfloat32m1x4_t): Ditto.
36860 (vfloat32m1x5_t): Ditto.
36861 (vfloat32m1x6_t): Ditto.
36862 (vfloat32m1x7_t): Ditto.
36863 (vfloat32m1x8_t): Ditto.
36864 (vfloat32m2x2_t): Ditto.
36865 (vfloat32m2x3_t): Ditto.
36866 (vfloat32m2x4_t): Ditto.
36867 (vfloat32m4x2_t): Ditto.
36868 (vfloat64m1x2_t): Ditto.
36869 (vfloat64m1x3_t): Ditto.
36870 (vfloat64m1x4_t): Ditto.
36871 (vfloat64m1x5_t): Ditto.
36872 (vfloat64m1x6_t): Ditto.
36873 (vfloat64m1x7_t): Ditto.
36874 (vfloat64m1x8_t): Ditto.
36875 (vfloat64m2x2_t): Ditto.
36876 (vfloat64m2x3_t): Ditto.
36877 (vfloat64m2x4_t): Ditto.
36878 (vfloat64m4x2_t): Ditto.
36879 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
36881 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
36882 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
36884 (TUPLE_ENTRY): Ditto.
36885 (riscv_v_ext_mode_p): New function.
36886 (riscv_v_adjust_nunits): Add tuple mode adjustment.
36887 (riscv_classify_address): Ditto.
36888 (riscv_binary_cost): Ditto.
36889 (riscv_rtx_costs): Ditto.
36890 (riscv_secondary_memory_needed): Ditto.
36891 (riscv_hard_regno_nregs): Ditto.
36892 (riscv_hard_regno_mode_ok): Ditto.
36893 (riscv_vector_mode_supported_p): Ditto.
36894 (riscv_regmode_natural_size): Ditto.
36895 (riscv_array_mode): New function.
36896 (TARGET_ARRAY_MODE): New target hook.
36897 * config/riscv/riscv.md: Add tuple modes.
36898 * config/riscv/vector-iterators.md: Ditto.
36899 * config/riscv/vector.md (mov<mode>): Add tuple modes data
36901 (*mov<VT:mode>_<P:mode>): Ditto.
36903 2023-05-03 Richard Biener <rguenther@suse.de>
36905 * cse.cc (cse_insn): Track an equivalence to the destination
36906 separately and delay using src_related for it.
36908 2023-05-03 Richard Biener <rguenther@suse.de>
36910 * cse.cc (HASH): Turn into inline function and mix
36911 in another HASH_SHIFT bits.
36912 (SAFE_HASH): Likewise.
36914 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36917 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
36918 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
36920 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36923 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
36924 (add<mode>3<vczle><vczbe>): ... This.
36925 (sub<mode>3): Rename to...
36926 (sub<mode>3<vczle><vczbe>): ... This.
36927 (mul<mode>3): Rename to...
36928 (mul<mode>3<vczle><vczbe>): ... This.
36929 (*div<mode>3): Rename to...
36930 (*div<mode>3<vczle><vczbe>): ... This.
36931 (neg<mode>2): Rename to...
36932 (neg<mode>2<vczle><vczbe>): ... This.
36933 (abs<mode>2): Rename to...
36934 (abs<mode>2<vczle><vczbe>): ... This.
36935 (<frint_pattern><mode>2): Rename to...
36936 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
36937 (<fmaxmin><mode>3): Rename to...
36938 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
36939 (*sqrt<mode>2): Rename to...
36940 (*sqrt<mode>2<vczle><vczbe>): ... This.
36942 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
36944 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
36946 2023-05-03 Martin Liska <mliska@suse.cz>
36948 PR tree-optimization/109693
36949 * value-range-storage.cc (vrange_allocator::vrange_allocator):
36950 Remove unused field.
36951 * value-range-storage.h: Likewise.
36953 2023-05-02 Andrew Pinski <apinski@marvell.com>
36955 * tree-ssa-phiopt.cc (move_stmt): New function.
36956 (match_simplify_replacement): Use move_stmt instead
36957 of the inlined version.
36959 2023-05-02 Andrew Pinski <apinski@marvell.com>
36961 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
36964 2023-05-02 Andrew Pinski <apinski@marvell.com>
36966 PR tree-optimization/109702
36967 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
36968 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
36970 2023-05-02 Andrew Pinski <apinski@marvell.com>
36973 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
36974 insn_and_split pattern.
36976 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
36978 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
36981 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
36983 * config/riscv/sync.md (mem_thread_fence_1): Change fence
36984 depending on the given memory model.
36986 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
36988 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
36989 riscv_union_memmodels function to sync.md.
36990 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
36991 get the union of two memmodels in sync.md.
36992 (riscv_print_operand): Add %I and %J flags that output the
36993 optimal LR/SC flag bits for a given memory model.
36994 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
36995 bits on SC op and replace with optimized %I, %J flags.
36997 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
36999 * config/riscv/riscv.cc
37000 (riscv_memmodel_needs_amo_release): Change function name.
37001 (riscv_print_operand): Remove unneeded %F case.
37002 * config/riscv/sync.md: Remove unneeded fences.
37004 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37007 * config/riscv/sync.md (atomic_store<mode>): Use simple store
37008 instruction in combination with fence(s).
37010 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37012 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
37013 of %A to include release bits.
37015 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37017 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
37018 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
37021 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37023 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
37024 sequentially consistent LR.aqrl/SC.rl pairs.
37026 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
37028 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
37029 sanitize memmodel input with memmodel_base.
37031 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
37032 Pan Li <pan2.li@intel.com>
37035 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
37037 2023-05-02 Romain Naour <romain.naour@gmail.com>
37039 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
37042 2023-05-02 Martin Liska <mliska@suse.cz>
37044 * doc/invoke.texi: Update documentation based on param.opt file.
37046 2023-05-02 Richard Biener <rguenther@suse.de>
37048 PR tree-optimization/109672
37049 * tree-vect-stmts.cc (vectorizable_operation): For plus,
37050 minus and negate always check the vector mode is word mode.
37052 2023-05-01 Andrew Pinski <apinski@marvell.com>
37054 * tree-ssa-phiopt.cc: Update comment about
37055 how the transformation are implemented.
37057 2023-05-01 Jeff Law <jlaw@ventanamicro>
37059 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
37061 2023-05-01 Jeff Law <jlaw@ventanamicro>
37063 * config/cris/cris.cc (TARGET_LRA_P): Remove.
37064 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
37065 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
37066 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
37067 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
37068 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
37070 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
37072 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
37073 * print-tree.cc (print_decl_identifier): Implement it.
37074 * toplev.cc (output_stack_usage_1): Use it.
37076 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37078 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
37081 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37083 * value-range.h (irange::set_nonzero): Inline.
37085 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37087 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
37089 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
37090 invalid_range, as it is an inverse range.
37091 * tree-vrp.cc (find_case_label_range): Avoid trees.
37092 * value-range.cc (irange::irange_set): Delete.
37093 (irange::irange_set_1bit_anti_range): Delete.
37094 (irange::irange_set_anti_range): Delete.
37095 (irange::set): Cleanup.
37096 * value-range.h (class irange): Remove irange_set,
37097 irange_set_anti_range, irange_set_1bit_anti_range.
37098 (irange::set_undefined): Remove set to m_type.
37100 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37102 * range-op.cc (update_known_bitmask): Adjust for irange containing
37103 wide_ints internally.
37104 * tree-ssanames.cc (set_nonzero_bits): Same.
37105 * tree-ssanames.h (set_nonzero_bits): Same.
37106 * value-range-storage.cc (irange_storage::set_irange): Same.
37107 (irange_storage::get_irange): Same.
37108 * value-range.cc (irange::operator=): Same.
37109 (irange::irange_set): Same.
37110 (irange::irange_set_1bit_anti_range): Same.
37111 (irange::irange_set_anti_range): Same.
37112 (irange::set): Same.
37113 (irange::verify_range): Same.
37114 (irange::contains_p): Same.
37115 (irange::irange_single_pair_union): Same.
37116 (irange::union_): Same.
37117 (irange::irange_contains_p): Same.
37118 (irange::intersect): Same.
37119 (irange::invert): Same.
37120 (irange::set_range_from_nonzero_bits): Same.
37121 (irange::set_nonzero_bits): Same.
37122 (mask_to_wi): Same.
37123 (irange::intersect_nonzero_bits): Same.
37124 (irange::union_nonzero_bits): Same.
37127 (tree_range): Same.
37128 (range_tests_strict_enum): Same.
37129 (range_tests_misc): Same.
37130 (range_tests_nonzero_bits): Same.
37131 * value-range.h (irange::type): Same.
37132 (irange::varying_compatible_p): Same.
37133 (irange::irange): Same.
37134 (int_range::int_range): Same.
37135 (irange::set_undefined): Same.
37136 (irange::set_varying): Same.
37137 (irange::lower_bound): Same.
37138 (irange::upper_bound): Same.
37140 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37142 * gimple-range-fold.cc (tree_lower_bound): Delete.
37143 (tree_upper_bound): Delete.
37144 (vrp_val_max): Delete.
37145 (vrp_val_min): Delete.
37146 (fold_using_range::range_of_ssa_name_with_loop_info): Call
37147 range_of_var_in_loop.
37148 * vr-values.cc (valid_value_p): Delete.
37149 (fix_overflow): Delete.
37150 (get_scev_info): New.
37151 (bounds_of_var_in_loop): Refactor into...
37152 (induction_variable_may_overflow_p): ...this,
37153 (range_from_loop_direction): ...and this,
37154 (range_of_var_in_loop): ...and this.
37155 * vr-values.h (bounds_of_var_in_loop): Delete.
37156 (range_of_var_in_loop): New.
37158 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37160 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
37162 (vrp_val_max): New.
37163 (vrp_val_min): New.
37164 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
37165 * range-op.cc (max_limit): Same.
37167 (plus_minus_ranges): Same.
37168 (operator_rshift::op1_range): Same.
37169 (operator_cast::inside_domain_p): Same.
37170 * value-range.cc (vrp_val_is_max): Delete.
37171 (vrp_val_is_min): Delete.
37172 (range_tests_misc): Use irange_val_*.
37173 * value-range.h (vrp_val_is_min): Delete.
37174 (vrp_val_is_max): Delete.
37175 (vrp_val_max): Delete.
37176 (irange_val_min): New.
37177 (vrp_val_min): Delete.
37178 (irange_val_max): New.
37179 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
37181 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37183 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
37184 * gimple-fold.cc (size_must_be_zero_p): Same.
37185 * gimple-loop-versioning.cc
37186 (loop_versioning::prune_loop_conditions): Same.
37187 * gimple-range-edge.cc (gcond_edge_range): Same.
37188 (gimple_outgoing_range::calc_switch_ranges): Same.
37189 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
37190 (adjust_realpart_expr): Same.
37191 (fold_using_range::range_of_address): Same.
37192 (fold_using_range::relation_fold_and_or): Same.
37193 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
37194 (range_is_either_true_or_false): Same.
37195 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
37196 (cfn_clz::fold_range): Same.
37197 (cfn_ctz::fold_range): Same.
37198 * gimple-range-tests.cc (class test_expr_eval): Same.
37199 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
37200 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
37201 (propagate_vr_across_jump_function): Same.
37202 (decide_whether_version_node): Same.
37203 * ipa-prop.cc (ipa_get_value_range): Same.
37204 * ipa-prop.h (ipa_range_set_and_normalize): Same.
37205 * range-op.cc (get_shift_range): Same.
37206 (value_range_from_overflowed_bounds): Same.
37207 (value_range_with_overflow): Same.
37208 (create_possibly_reversed_range): Same.
37209 (equal_op1_op2_relation): Same.
37210 (not_equal_op1_op2_relation): Same.
37211 (lt_op1_op2_relation): Same.
37212 (le_op1_op2_relation): Same.
37213 (gt_op1_op2_relation): Same.
37214 (ge_op1_op2_relation): Same.
37215 (operator_mult::op1_range): Same.
37216 (operator_exact_divide::op1_range): Same.
37217 (operator_lshift::op1_range): Same.
37218 (operator_rshift::op1_range): Same.
37219 (operator_cast::op1_range): Same.
37220 (operator_logical_and::fold_range): Same.
37221 (set_nonzero_range_from_mask): Same.
37222 (operator_bitwise_or::op1_range): Same.
37223 (operator_bitwise_xor::op1_range): Same.
37224 (operator_addr_expr::fold_range): Same.
37225 (pointer_plus_operator::wi_fold): Same.
37226 (pointer_or_operator::op1_range): Same.
37233 (range_op_cast_tests): Same.
37234 (range_op_lshift_tests): Same.
37235 (range_op_rshift_tests): Same.
37236 (range_op_bitwise_and_tests): Same.
37237 (range_relational_tests): Same.
37238 * range.cc (range_zero): Same.
37239 (range_nonzero): Same.
37240 * range.h (range_true): Same.
37241 (range_false): Same.
37242 (range_true_and_false): Same.
37243 * tree-data-ref.cc (split_constant_offset_1): Same.
37244 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
37245 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
37246 (find_unswitching_predicates_for_bb): Same.
37247 * tree-ssa-phiopt.cc (value_replacement): Same.
37248 * tree-ssa-threadbackward.cc
37249 (back_threader::find_taken_edge_cond): Same.
37250 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
37251 * tree-vrp.cc (find_case_label_range): Same.
37252 * value-query.cc (range_query::get_tree_range): Same.
37253 * value-range.cc (irange::set_nonnegative): Same.
37254 (frange::contains_p): Same.
37255 (frange::singleton_p): Same.
37256 (frange::internal_singleton_p): Same.
37257 (irange::irange_set): Same.
37258 (irange::irange_set_1bit_anti_range): Same.
37259 (irange::irange_set_anti_range): Same.
37260 (irange::set): Same.
37261 (irange::operator==): Same.
37262 (irange::singleton_p): Same.
37263 (irange::contains_p): Same.
37264 (irange::set_range_from_nonzero_bits): Same.
37265 (DEFINE_INT_RANGE_INSTANCE): Same.
37275 (range_uint128): New.
37276 (range_uchar): New.
37278 (build_range3): Convert to irange wide_int API.
37279 (range_tests_irange3): Same.
37280 (range_tests_int_range_max): Same.
37281 (range_tests_strict_enum): Same.
37282 (range_tests_misc): Same.
37283 (range_tests_nonzero_bits): Same.
37284 (range_tests_nan): Same.
37285 (range_tests_signed_zeros): Same.
37286 * value-range.h (Value_Range::Value_Range): Same.
37287 (irange::set): Same.
37288 (irange::nonzero_p): Same.
37289 (irange::contains_p): Same.
37290 (range_includes_zero_p): Same.
37291 (irange::set_nonzero): Same.
37292 (irange::set_zero): Same.
37293 (contains_zero_p): Same.
37294 (frange::contains_p): Same.
37296 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
37297 (bounds_of_var_in_loop): Same.
37298 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
37300 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37302 * value-range.cc (irange::irange_union): Rename to...
37303 (irange::union_): ...this.
37304 (irange::irange_intersect): Rename to...
37305 (irange::intersect): ...this.
37306 * value-range.h (irange::union_): Delete.
37307 (irange::intersect): Delete.
37309 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37311 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
37313 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37315 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
37317 (compare_ranges): Delete.
37318 (compare_range_with_value): Delete.
37319 (bounds_of_var_in_loop): Tidy up by using ranger API.
37320 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
37321 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
37322 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
37323 strict_overflow_p and only_ranges.
37324 (simplify_using_ranges::legacy_fold_cond): Adjust call to
37325 legacy_fold_cond_overflow.
37326 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
37328 (range_fits_type_p): Rename value_range to irange.
37329 * vr-values.h (range_fits_type_p): Adjust prototype.
37331 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37333 * value-range.cc (irange::irange_set_anti_range): Remove uses of
37334 tree_lower_bound and tree_upper_bound.
37335 (irange::verify_range): Same.
37336 (irange::operator==): Same.
37337 (irange::singleton_p): Same.
37338 * value-range.h (irange::tree_lower_bound): Delete.
37339 (irange::tree_upper_bound): Delete.
37340 (irange::lower_bound): Delete.
37341 (irange::upper_bound): Delete.
37342 (irange::zero_p): Remove uses of tree_lower_bound and
37345 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37347 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
37349 (determine_value_range): Same.
37350 (record_nonwrapping_iv): Same.
37351 (infer_loop_bounds_from_signedness): Same.
37352 (scev_var_range_cant_overflow): Same.
37353 * tree-vrp.cc (operand_less_p): Delete.
37354 * tree-vrp.h (operand_less_p): Delete.
37355 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
37356 (irange::value_inside_range): Delete.
37357 * value-range.h (vrange::kind): Delete.
37358 (irange::num_pairs): Remove check of m_kind.
37359 (irange::min): Delete.
37360 (irange::max): Delete.
37362 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
37364 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
37365 for vrange_storage.
37366 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
37367 (sbr_vector::grow): Same.
37368 (sbr_vector::set_bb_range): Same.
37369 (sbr_vector::get_bb_range): Same.
37370 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
37371 (sbr_sparse_bitmap::set_bb_range): Same.
37372 (sbr_sparse_bitmap::get_bb_range): Same.
37373 (block_range_cache::block_range_cache): Same.
37374 (ssa_global_cache::ssa_global_cache): Same.
37375 (ssa_global_cache::get_global_range): Same.
37376 (ssa_global_cache::set_global_range): Same.
37377 * gimple-range-cache.h: Same.
37378 * gimple-range-edge.cc
37379 (gimple_outgoing_range::gimple_outgoing_range): Same.
37380 (gimple_outgoing_range::switch_edge_range): Same.
37381 (gimple_outgoing_range::calc_switch_ranges): Same.
37382 * gimple-range-edge.h: Same.
37383 * gimple-range-infer.cc
37384 (infer_range_manager::infer_range_manager): Same.
37385 (infer_range_manager::get_nonzero): Same.
37386 (infer_range_manager::maybe_adjust_range): Same.
37387 (infer_range_manager::add_range): Same.
37388 * gimple-range-infer.h: Rename obstack_vrange_allocator to
37390 * tree-core.h (struct irange_storage_slot): Remove.
37391 (struct tree_ssa_name): Remove irange_info and frange_info. Make
37392 range_info a pointer to vrange_storage.
37393 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
37394 (range_info_alloc): Same.
37395 (range_info_free): Same.
37396 (range_info_get_range): Same.
37397 (range_info_set_range): Same.
37398 (get_nonzero_bits): Same.
37399 * value-query.cc (get_ssa_name_range_info): Same.
37400 * value-range-storage.cc (class vrange_internal_alloc): New.
37401 (class vrange_obstack_alloc): New.
37402 (class vrange_ggc_alloc): New.
37403 (vrange_allocator::vrange_allocator): New.
37404 (vrange_allocator::~vrange_allocator): New.
37405 (vrange_storage::alloc_slot): New.
37406 (vrange_allocator::alloc): New.
37407 (vrange_allocator::free): New.
37408 (vrange_allocator::clone): New.
37409 (vrange_allocator::clone_varying): New.
37410 (vrange_allocator::clone_undefined): New.
37411 (vrange_storage::alloc): New.
37412 (vrange_storage::set_vrange): Remove slot argument.
37413 (vrange_storage::get_vrange): Same.
37414 (vrange_storage::fits_p): Same.
37415 (vrange_storage::equal_p): New.
37416 (irange_storage::write_lengths_address): New.
37417 (irange_storage::lengths_address): New.
37418 (irange_storage_slot::alloc_slot): Remove.
37419 (irange_storage::alloc): New.
37420 (irange_storage_slot::irange_storage_slot): Remove.
37421 (irange_storage::irange_storage): New.
37422 (write_wide_int): New.
37423 (irange_storage_slot::set_irange): Remove.
37424 (irange_storage::set_irange): New.
37425 (read_wide_int): New.
37426 (irange_storage_slot::get_irange): Remove.
37427 (irange_storage::get_irange): New.
37428 (irange_storage_slot::size): Remove.
37429 (irange_storage::equal_p): New.
37430 (irange_storage_slot::num_wide_ints_needed): Remove.
37431 (irange_storage::size): New.
37432 (irange_storage_slot::fits_p): Remove.
37433 (irange_storage::fits_p): New.
37434 (irange_storage_slot::dump): Remove.
37435 (irange_storage::dump): New.
37436 (frange_storage_slot::alloc_slot): Remove.
37437 (frange_storage::alloc): New.
37438 (frange_storage_slot::set_frange): Remove.
37439 (frange_storage::set_frange): New.
37440 (frange_storage_slot::get_frange): Remove.
37441 (frange_storage::get_frange): New.
37442 (frange_storage_slot::fits_p): Remove.
37443 (frange_storage::equal_p): New.
37444 (frange_storage::fits_p): New.
37445 (ggc_vrange_allocator): New.
37446 (ggc_alloc_vrange_storage): New.
37447 * value-range-storage.h (class vrange_storage): Rewrite.
37448 (class irange_storage): Rewrite.
37449 (class frange_storage): Rewrite.
37450 (class obstack_vrange_allocator): Remove.
37451 (class ggc_vrange_allocator): Remove.
37452 (vrange_allocator::alloc_vrange): Remove.
37453 (vrange_allocator::alloc_irange): Remove.
37454 (vrange_allocator::alloc_frange): Remove.
37455 (ggc_alloc_vrange_storage): New.
37456 * value-range.h (class irange): Rename vrange_allocator to
37458 (class frange): Same.
37460 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
37462 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
37463 inc to avoid clobbering the carry flag.
37465 2023-04-30 Andrew Pinski <apinski@marvell.com>
37467 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
37468 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
37470 2023-04-30 Andrew Pinski <apinski@marvell.com>
37472 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
37473 Allow some builtin/internal function calls which
37474 are known not to trap/throw.
37475 (phiopt_worker::match_simplify_replacement):
37476 Use name instead of getting the lhs again.
37478 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
37480 * configure: Regenerate.
37481 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
37483 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
37485 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
37486 emit_insn_if_valid_for_reload.
37487 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
37488 to be recognized, also try emitting a parallel that clobbers
37489 TARGET_FLAGS_REGNUM, as applicable.
37491 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
37493 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
37495 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
37496 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
37498 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
37500 * config/stormy16/stormy16.md (any_lshift): New code iterator.
37501 (any_or_plus): Likewise.
37502 (any_rotate): Likewise.
37503 (*<any_lshift>_and_internal): New define_insn_and_split to
37504 recognize a logical shift followed by an AND, and split it
37505 again after reload.
37506 (*swpn): New define_insn matching xstormy16's swpn.
37507 (*swpn_zext): New define_insn recognizing swpn followed by
37508 zero_extendqihi2, i.e. with the high byte set to zero.
37509 (*swpn_sext): Likewise, for swpn followed by cbw.
37510 (*swpn_sext_2): Likewise, for an alternate RTL form.
37511 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
37512 sequence is split in the correct place to recognize the *swpn_zext
37513 followed by any_or_plus (ior, xor or plus) instruction.
37515 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
37518 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
37519 (lm32-*-uclinux*): Likewise.
37521 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
37523 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
37524 for riscv_use_save_libcall.
37525 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
37526 (riscv_compute_frame_info): restructure to decouple stack allocation
37527 for rv32e w/o save-restore.
37529 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
37531 * doc/install.texi: Fix documentation typo
37533 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
37535 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
37536 (u): Add div/udiv cases.
37537 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
37538 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
37540 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
37541 (thead_c906_tune_info): Likewise.
37542 (optimize_size_tune_info): Likewise.
37543 (riscv_use_divmod_expander): New function.
37544 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
37546 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
37548 * config/riscv/bitmanip.md: Added clmulr instruction.
37549 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
37550 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
37552 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
37553 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
37554 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
37555 functions to riscv-cmo.def.
37556 * config/riscv/generic.md: Add clmul to list of instructions
37557 using the generic_imul reservation.
37559 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
37561 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
37563 2023-04-28 Andrew Pinski <apinski@marvell.com>
37565 PR tree-optimization/100958
37566 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
37567 (pass_phiopt::execute): Don't call two_value_replacement.
37568 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
37569 handle what two_value_replacement did.
37571 2023-04-28 Andrew Pinski <apinski@marvell.com>
37573 * match.pd: Add patterns for
37574 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
37576 2023-04-28 Andrew Pinski <apinski@marvell.com>
37578 * match.pd: Factor out the deciding the min/max from
37579 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
37581 * fold-const.cc (minmax_from_comparison): this new function.
37582 * fold-const.h (minmax_from_comparison): New prototype.
37584 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
37586 PR rtl-optimization/109476
37587 * lower-subreg.cc: Include explow.h for force_reg.
37588 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
37589 If decomposing a suitable LSHIFTRT and we're not splitting
37590 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
37591 instead of setting a high part SUBREG to zero, which helps combine.
37592 (decompose_multiword_subregs): Update call to resolve_shift_zext.
37594 2023-04-28 Richard Biener <rguenther@suse.de>
37596 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
37598 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
37599 gather-scatter info and cost emulated scatters accordingly.
37600 (get_load_store_type): Support emulated scatters.
37601 (vectorizable_store): Likewise. Emulate them by extracting
37602 scalar offsets and data, doing scalar stores.
37604 2023-04-28 Richard Biener <rguenther@suse.de>
37606 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
37607 Tame down element extracts and scalar loads for gather/scatter
37608 similar to elementwise strided accesses.
37610 2023-04-28 Pan Li <pan2.li@intel.com>
37611 kito-cheng <kito.cheng@sifive.com>
37613 * config/riscv/vector.md: Add new define split to perform
37614 the simplification.
37616 2023-04-28 Richard Biener <rguenther@suse.de>
37619 * ipa-param-manipulation.cc
37620 (ipa_param_body_adjustments::modify_expression): Allow
37621 conversion of a register to a non-register type. Elide
37622 conversions inside BIT_FIELD_REFs.
37624 2023-04-28 Richard Biener <rguenther@suse.de>
37626 PR tree-optimization/109644
37627 * tree-cfg.cc (verify_types_in_gimple_reference): Check
37628 register constraints on the outermost VIEW_CONVERT_EXPR
37629 only. Do not allow register or invariant bases on
37630 multi-level or possibly variable index handled components.
37632 2023-04-28 Richard Biener <rguenther@suse.de>
37634 * gimplify.cc (gimplify_compound_lval): When there's a
37635 non-register type produced by one of the handled component
37636 operations make sure we get a non-register base.
37638 2023-04-28 Richard Biener <rguenther@suse.de>
37640 PR tree-optimization/108752
37641 * tree-vect-generic.cc (build_replicated_const): Rename
37642 to build_replicated_int_cst and move to tree.{h,cc}.
37643 (do_plus_minus): Adjust.
37644 (do_negate): Likewise.
37645 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
37646 arithmetic vector operations in lowered form.
37647 * tree.h (build_replicated_int_cst): Declare.
37648 * tree.cc (build_replicated_int_cst): Moved from
37649 tree-vect-generic.cc build_replicated_const.
37651 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37654 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
37655 (aarch64_rbit<mode><vczle><vczbe>): ... This.
37656 (neg<mode>2): Rename to...
37657 (neg<mode>2<vczle><vczbe>): ... This.
37658 (abs<mode>2): Rename to...
37659 (abs<mode>2<vczle><vczbe>): ... This.
37660 (aarch64_abs<mode>): Rename to...
37661 (aarch64_abs<mode><vczle><vczbe>): ... This.
37662 (one_cmpl<mode>2): Rename to...
37663 (one_cmpl<mode>2<vczle><vczbe>): ... This.
37664 (clrsb<mode>2): Rename to...
37665 (clrsb<mode>2<vczle><vczbe>): ... This.
37666 (clz<mode>2): Rename to...
37667 (clz<mode>2<vczle><vczbe>): ... This.
37668 (popcount<mode>2): Rename to...
37669 (popcount<mode>2<vczle><vczbe>): ... This.
37671 2023-04-28 Jakub Jelinek <jakub@redhat.com>
37673 * gimple-range-op.cc (class cfn_sqrt): New type.
37674 (op_cfn_sqrt): New variable.
37675 (gimple_range_op_handler::maybe_builtin_call): Handle
37676 CASE_CFN_SQRT{,_FN}.
37678 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
37679 Jakub Jelinek <jakub@redhat.com>
37681 * value-range.h (frange_nextafter): Declare.
37682 * gimple-range-op.cc (class cfn_sincos): New.
37683 (op_cfn_sin, op_cfn_cos): New variables.
37684 (gimple_range_op_handler::maybe_builtin_call): Handle
37685 CASE_CFN_{SIN,COS}{,_FN}.
37687 2023-04-28 Jakub Jelinek <jakub@redhat.com>
37689 * target.def (libm_function_max_error): New target hook.
37690 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
37691 * doc/tm.texi: Regenerated.
37692 * targhooks.h (default_libm_function_max_error,
37693 glibc_linux_libm_function_max_error): Declare.
37694 * targhooks.cc: Include case-cfn-macros.h.
37695 (default_libm_function_max_error,
37696 glibc_linux_libm_function_max_error): New functions.
37697 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
37698 * config/linux-protos.h (linux_libm_function_max_error): Declare.
37699 * config/linux.cc: Include target.h and targhooks.h.
37700 (linux_libm_function_max_error): New function.
37701 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
37702 (arc_libm_function_max_error): New function.
37703 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
37704 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
37705 (ix86_libm_function_max_error): New function.
37706 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
37707 * config/rs6000/rs6000-protos.h
37708 (rs6000_linux_libm_function_max_error): Declare.
37709 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
37710 and case-cfn-macros.h.
37711 (rs6000_linux_libm_function_max_error): New function.
37712 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
37713 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
37714 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
37715 (or1k_libm_function_max_error): New function.
37716 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
37718 2023-04-28 Alexandre Oliva <oliva@adacore.com>
37720 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
37721 Move detach value calls...
37722 (pass_harden_conditional_branches::execute): ... here.
37723 (pass_harden_compares::execute): Detach values before
37726 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
37728 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
37729 (cml<addsub_as><mode>4): Likewise.
37730 (vec_addsub<mode>3): Likewise.
37731 (cadd<rot><mode>3): Likewise.
37732 (vec_fmaddsub<mode>4): Likewise.
37733 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
37735 2023-04-27 Andrew Pinski <apinski@marvell.com>
37737 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
37738 up to 2 min/max expressions in the sequence/match code.
37740 2023-04-27 Andrew Pinski <apinski@marvell.com>
37742 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
37744 * tree-eh.cc (operation_could_trap_helper_p): Treate
37745 MIN_EXPR/MAX_EXPR similar as other comparisons.
37747 2023-04-27 Andrew Pinski <apinski@marvell.com>
37749 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
37751 (cond_if_else_store_replacement): Likewise.
37752 (get_non_trapping): Likewise.
37753 (store_elim_worker): Move into ...
37754 (pass_cselim::execute): This.
37756 2023-04-27 Andrew Pinski <apinski@marvell.com>
37758 * tree-ssa-phiopt.cc (two_value_replacement): Remove
37760 (match_simplify_replacement): Likewise.
37761 (factor_out_conditional_conversion): Likewise.
37762 (value_replacement): Likewise.
37763 (minmax_replacement): Likewise.
37764 (spaceship_replacement): Likewise.
37765 (cond_removal_in_builtin_zero_pattern): Likewise.
37766 (hoist_adjacent_loads): Likewise.
37767 (tree_ssa_phiopt_worker): Move into ...
37768 (pass_phiopt::execute): this.
37770 2023-04-27 Andrew Pinski <apinski@marvell.com>
37772 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
37773 do_store_elim argument and split that part out to ...
37774 (store_elim_worker): This new function.
37775 (pass_cselim::execute): Call store_elim_worker.
37776 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
37778 2023-04-27 Jan Hubicka <jh@suse.cz>
37780 * cfgloopmanip.h (unloop_loops): Export.
37781 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
37782 that no longer loop.
37783 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
37784 vectors of loops to unloop.
37785 (canonicalize_induction_variables): Free vectors here.
37786 (tree_unroll_loops_completely): Free vectors here.
37788 2023-04-27 Richard Biener <rguenther@suse.de>
37790 PR tree-optimization/109170
37791 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
37792 Handle __builtin_expect and similar via cfn_pass_through_arg1
37793 and inspecting the calls fnspec.
37794 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
37795 and BUILT_IN_EXPECT_WITH_PROBABILITY.
37797 2023-04-27 Alexandre Oliva <oliva@adacore.com>
37799 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
37801 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
37803 PR tree-optimization/109639
37804 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
37805 (propagate_vr_across_jump_function): Same.
37806 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
37807 * ipa-prop.h (ipa_range_set_and_normalize): New.
37808 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
37810 2023-04-27 Richard Biener <rguenther@suse.de>
37812 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
37813 create a CTOR operand in the result when simplifying GIMPLE.
37815 2023-04-27 Richard Biener <rguenther@suse.de>
37817 * gimplify.cc (gimplify_compound_lval): When the base
37818 gimplified to a register make sure to split up chains
37821 2023-04-27 Richard Biener <rguenther@suse.de>
37824 * ipa-param-manipulation.h
37825 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
37827 * ipa-param-manipulation.cc
37828 (ipa_param_body_adjustments::modify_expression): Likewise.
37829 When we need a conversion and the replacement is a register
37830 split the conversion out.
37831 (ipa_param_body_adjustments::modify_assignment): Pass
37832 extra_stmts to RHS modify_expression.
37834 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
37836 * doc/extend.texi (Zero Length): Describe example.
37838 2023-04-27 Richard Biener <rguenther@suse.de>
37840 PR tree-optimization/109594
37841 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
37842 what we rewrite to a register based on the above.
37844 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
37846 * config/riscv/riscv.cc: Fix whitespace.
37847 * config/riscv/sync.md: Fix whitespace.
37849 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
37851 PR tree-optimization/108697
37852 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
37853 not clear the vector on an out of range query.
37854 (ssa_cache::dump): Use dump_range_query instead of get_range.
37855 (ssa_cache::dump_range_query): New.
37856 (ssa_lazy_cache::dump_range_query): New.
37857 (ssa_lazy_cache::set_range): New.
37858 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
37859 (class ssa_lazy_cache): New.
37860 (ssa_lazy_cache::ssa_lazy_cache): New.
37861 (ssa_lazy_cache::~ssa_lazy_cache): New.
37862 (ssa_lazy_cache::get_range): New.
37863 (ssa_lazy_cache::clear_range): New.
37864 (ssa_lazy_cache::clear): New.
37865 (ssa_lazy_cache::dump): New.
37866 * gimple-range-path.cc (path_range_query::path_range_query): Do
37867 not allocate a ssa_cache object nor has_cache bitmap.
37868 (path_range_query::~path_range_query): Do not free objects.
37869 (path_range_query::clear_cache): Remove.
37870 (path_range_query::get_cache): Adjust.
37871 (path_range_query::set_cache): Remove.
37872 (path_range_query::dump): Don't call through a pointer.
37873 (path_range_query::internal_range_of_expr): Set cache directly.
37874 (path_range_query::reset_path): Clear cache directly.
37875 (path_range_query::ssa_range_in_phi): Fold with globals only.
37876 (path_range_query::compute_ranges_in_phis): Simply set range.
37877 (path_range_query::compute_ranges_in_block): Call cache directly.
37878 * gimple-range-path.h (class path_range_query): Replace bitmap
37879 and cache pointer with lazy cache object.
37880 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
37882 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
37884 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
37885 (ssa_cache::~ssa_cache): Rename.
37886 (ssa_cache::has_range): New.
37887 (ssa_cache::get_range): Rename.
37888 (ssa_cache::set_range): Rename.
37889 (ssa_cache::clear_range): Rename.
37890 (ssa_cache::clear): Rename.
37891 (ssa_cache::dump): Rename and use get_range.
37892 (ranger_cache::get_global_range): Use get_range and set_range.
37893 (ranger_cache::range_of_def): Use get_range.
37894 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
37895 (class ranger_cache): Use ssa_cache.
37896 * gimple-range-path.cc (path_range_query::path_range_query): Use
37898 (path_range_query::get_cache): Use get_range.
37899 (path_range_query::set_cache): Use set_range.
37900 * gimple-range-path.h (class path_range_query): Use ssa_cache.
37901 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
37902 (assume_query::range_of_expr): Use get_range.
37903 (assume_query::assume_query): Use set_range.
37904 (assume_query::calculate_op): Use get_range and set_range.
37905 * gimple-range.h (class assume_query): Use ssa_cache.
37907 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
37909 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
37910 and local to optionally zero memory.
37911 (br_vector::grow): Only zero memory if flag is set.
37912 (class sbr_lazy_vector): New.
37913 (sbr_lazy_vector::sbr_lazy_vector): New.
37914 (sbr_lazy_vector::set_bb_range): New.
37915 (sbr_lazy_vector::get_bb_range): New.
37916 (sbr_lazy_vector::bb_range_p): New.
37917 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
37918 * gimple-range-gori.cc (gori_map::calculate_gori): Use
37919 param_vrp_switch_limit.
37920 (gori_compute::gori_compute): Use param_vrp_switch_limit.
37921 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
37922 (vrp_switch_limit): Rename from evrp_switch_limit.
37923 (vrp_vector_threshold): New.
37925 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
37927 * value-relation.cc (dom_oracle::query_relation): Check early for lack
37929 * value-relation.h (equiv_oracle::has_equiv_p): New.
37931 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
37933 PR tree-optimization/109417
37934 * gimple-range-gori.cc (range_def_chain::register_dependency):
37935 Save the ssa version number, not the pointer.
37936 (gori_compute::may_recompute_p): No need to check if a dependency
37937 is in the free list.
37938 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
37939 fields to be unsigned int instead of trees.
37940 (ange_def_chain::depend1): Adjust.
37941 (ange_def_chain::depend2): Adjust.
37942 * gimple-range.h: Include "ssa.h" to inline ssa_name().
37944 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
37946 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
37947 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
37948 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
37950 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
37953 * config/riscv/riscv-protos.h: Add helper function stubs.
37954 * config/riscv/riscv.cc: Add helper functions for subword masking.
37955 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
37956 -mno-inline-atomics.
37957 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
37958 fetch_and_nand, CAS, and exchange ops.
37959 * doc/invoke.texi: Add blurb regarding new command-line flags
37960 -minline-atomics and -mno-inline-atomics.
37962 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37964 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
37965 Reimplement using standard RTL codes instead of unspec.
37966 (aarch64_rshrn2<mode>_insn_be): Likewise.
37967 (aarch64_rshrn2<mode>): Adjust for the above.
37968 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
37970 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37972 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
37973 with standard RTL codes instead of an UNSPEC.
37974 (aarch64_rshrn<mode>_insn_be): Likewise.
37975 (aarch64_rshrn<mode>): Adjust for the above.
37976 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
37978 2023-04-26 Pan Li <pan2.li@intel.com>
37979 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37981 * config/riscv/riscv.cc (riscv_classify_address): Allow
37982 const0_rtx for the RVV load/store.
37984 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
37986 * range-op.cc (range_op_cast_tests): Remove legacy support.
37987 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
37988 * value-range.cc (irange::operator=): Same.
37989 (get_legacy_range): Same.
37990 (irange::copy_legacy_to_multi_range): Delete.
37991 (irange::copy_to_legacy): Delete.
37992 (irange::irange_set_anti_range): Delete.
37993 (irange::set): Remove legacy support.
37994 (irange::verify_range): Same.
37995 (irange::legacy_lower_bound): Delete.
37996 (irange::legacy_upper_bound): Delete.
37997 (irange::legacy_equal_p): Delete.
37998 (irange::operator==): Remove legacy support.
37999 (irange::singleton_p): Same.
38000 (irange::value_inside_range): Same.
38001 (irange::contains_p): Same.
38002 (intersect_ranges): Delete.
38003 (irange::legacy_intersect): Delete.
38004 (union_ranges): Delete.
38005 (irange::legacy_union): Delete.
38006 (irange::legacy_verbose_union_): Delete.
38007 (irange::legacy_verbose_intersect): Delete.
38008 (irange::irange_union): Remove legacy support.
38009 (irange::irange_intersect): Same.
38010 (irange::intersect): Same.
38011 (irange::invert): Same.
38012 (ranges_from_anti_range): Delete.
38013 (gt_pch_nx): Adjust for legacy removal.
38015 (range_tests_legacy): Delete.
38016 (range_tests_misc): Adjust for legacy removal.
38017 (range_tests): Same.
38018 * value-range.h (class irange): Same.
38019 (irange::legacy_mode_p): Delete.
38020 (ranges_from_anti_range): Delete.
38021 (irange::nonzero_p): Adjust for legacy removal.
38022 (irange::lower_bound): Same.
38023 (irange::upper_bound): Same.
38024 (irange::union_): Same.
38025 (irange::intersect): Same.
38026 (irange::set_nonzero): Same.
38027 (irange::set_zero): Same.
38028 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
38030 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38032 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
38033 of range_has_numeric_bounds_p with irange API.
38034 (range_has_numeric_bounds_p): Delete.
38035 * value-range.h (range_has_numeric_bounds_p): Delete.
38037 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38039 * tree-data-ref.cc (compute_distributive_range): Replace uses of
38040 range_int_cst_p with irange API.
38041 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
38042 * tree-vrp.h (range_int_cst_p): Delete.
38043 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
38044 range_int_cst_p with irange API.
38045 (vr_set_zero_nonzero_bits): Same.
38046 (range_fits_type_p): Same.
38047 (simplify_using_ranges::simplify_casted_cond): Same.
38048 * tree-vrp.cc (range_int_cst_p): Remove.
38050 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38052 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
38054 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38056 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
38057 API uses to new API.
38058 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
38059 * internal-fn.cc (get_min_precision): Same.
38061 * tree-affine.cc (expr_to_aff_combination): Same.
38062 * tree-data-ref.cc (dr_step_indicator): Same.
38063 * tree-dfa.cc (get_ref_base_and_extent): Same.
38064 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
38065 * tree-ssa-phiopt.cc (two_value_replacement): Same.
38066 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
38067 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
38068 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
38069 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
38070 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
38071 * tree.cc (get_range_pos_neg): Same.
38073 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38075 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
38076 vrange::dump instead of ad-hoc dumper.
38077 * tree-ssa-strlen.cc (dump_strlen_info): Same.
38078 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
38081 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38083 * range-op.cc (operator_cast::op1_range): Use
38084 create_possibly_reversed_range.
38085 (operator_bitwise_and::simple_op1_range_solver): Same.
38086 * value-range.cc (swap_out_of_order_endpoints): Delete.
38087 (irange::set): Remove call to swap_out_of_order_endpoints.
38089 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38091 * builtins.cc (determine_block_size): Convert use of legacy API to
38093 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
38094 (array_bounds_checker::check_array_ref): Same.
38095 * gimple-ssa-warn-restrict.cc
38096 (builtin_memref::extend_offset_range): Same.
38097 * ipa-cp.cc (ipcp_store_vr_results): Same.
38098 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
38099 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
38100 (ipa_write_jump_function): Same.
38101 * pointer-query.cc (get_size_range): Same.
38102 * tree-data-ref.cc (split_constant_offset): Same.
38103 * tree-ssa-strlen.cc (get_range): Same.
38104 (maybe_diag_stxncpy_trunc): Same.
38105 (strlen_pass::get_len_or_size): Same.
38106 (strlen_pass::count_nonzero_bytes_addr): Same.
38107 * tree-vect-patterns.cc (vect_get_range_info): Same.
38108 * value-range.cc (irange::maybe_anti_range): Remove.
38109 (get_legacy_range): New.
38110 (irange::copy_to_legacy): Use get_legacy_range.
38111 (ranges_from_anti_range): Same.
38112 * value-range.h (class irange): Remove maybe_anti_range.
38113 (get_legacy_range): New.
38114 * vr-values.cc (check_for_binary_op_overflow): Convert use of
38115 legacy API to get_legacy_range.
38116 (compare_ranges): Same.
38117 (compare_range_with_value): Same.
38118 (bounds_of_var_in_loop): Same.
38119 (find_case_label_ranges): Same.
38120 (simplify_using_ranges::simplify_switch_using_ranges): Same.
38122 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38124 * value-range-pretty-print.cc (vrange_printer::visit): Remove
38126 * value-range.cc (irange::constant_p): Remove.
38127 (irange::get_nonzero_bits_from_range): Remove constant_p use.
38128 * value-range.h (class irange): Remove constant_p.
38129 (irange::num_pairs): Remove constant_p use.
38131 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38133 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
38135 (irange::set): Same.
38136 (irange::legacy_lower_bound): Same.
38137 (irange::legacy_upper_bound): Same.
38138 (irange::contains_p): Same.
38139 (range_tests_legacy): Same.
38140 (irange::normalize_addresses): Remove.
38141 (irange::normalize_symbolics): Remove.
38142 (irange::symbolic_p): Remove.
38143 * value-range.h (class irange): Remove symbolic_p,
38144 normalize_symbolics, and normalize_addresses.
38145 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
38146 Remove symbolics support.
38148 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38150 * value-range.cc (irange::may_contain_p): Remove.
38151 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
38152 usage with contains_p.
38153 * vr-values.cc (compare_range_with_value): Same.
38155 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38157 * tree-vrp.cc (supported_types_p): Remove.
38158 (defined_ranges_p): Remove.
38159 (range_fold_binary_expr): Remove.
38160 (range_fold_unary_expr): Remove.
38161 * tree-vrp.h (range_fold_unary_expr): Remove.
38162 (range_fold_binary_expr): Remove.
38164 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38166 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
38167 (ipa_value_range_from_jfunc): Same.
38168 (propagate_vr_across_jump_function): Same.
38169 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
38170 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
38171 * vr-values.cc (bounds_of_var_in_loop): Same.
38173 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38175 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
38176 Add irange argument.
38177 (check_out_of_bounds_and_warn): Remove check for vr.
38178 (array_bounds_checker::check_array_ref): Remove pointer qualifier
38179 for vr and adjust accordingly.
38180 * gimple-array-bounds.h (get_value_range): Add irange argument.
38181 * value-query.cc (class equiv_allocator): Delete.
38182 (range_query::get_value_range): Delete.
38183 (range_query::range_query): Remove allocator access.
38184 (range_query::~range_query): Same.
38185 * value-query.h (get_value_range): Delete.
38187 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
38188 call to get_value_range.
38189 (check_for_binary_op_overflow): Same.
38190 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
38191 (simplify_using_ranges::simplify_abs_using_ranges): Same.
38192 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
38193 (simplify_using_ranges::simplify_casted_cond): Same.
38194 (simplify_using_ranges::simplify_switch_using_ranges): Same.
38195 (simplify_using_ranges::two_valued_val_range_p): Same.
38197 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38200 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
38202 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
38203 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
38204 (simplify_using_ranges::legacy_fold_cond): ...this.
38205 (simplify_using_ranges::fold_cond): Rename
38206 vrp_evaluate_conditional_warnv_with_ops to
38207 legacy_fold_cond_overflow.
38208 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
38209 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
38210 legacy_fold_cond_overflow respectively.
38212 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
38214 * vr-values.cc (get_vr_for_comparison): Remove.
38215 (compare_name_with_value): Same.
38216 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
38217 compare_name_with_value.
38218 * vr-values.h: Remove compare_name_with_value.
38219 Remove get_vr_for_comparison.
38221 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
38223 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
38224 (bswapsi2): New define_insn.
38225 (swaphi): New define_insn to exchange two registers (swpw).
38226 (define_peephole2): Recognize exchange of registers as swaphi.
38228 2023-04-26 Richard Biener <rguenther@suse.de>
38230 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
38232 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
38233 * predict.cc (apply_return_prediction): Likewise.
38234 * sese.cc (set_ifsese_condition): Likewise. Simplify.
38235 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
38236 (make_edges_bb): Likewise.
38237 (make_cond_expr_edges): Likewise.
38238 (end_recording_case_labels): Likewise.
38239 (make_gimple_asm_edges): Likewise.
38240 (cleanup_dead_labels): Likewise.
38241 (group_case_labels): Likewise.
38242 (gimple_can_merge_blocks_p): Likewise.
38243 (gimple_merge_blocks): Likewise.
38244 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
38245 (gimple_duplicate_sese_tail): Avoid last_stmt.
38246 (find_loop_dist_alias): Likewise.
38247 (gimple_block_ends_with_condjump_p): Likewise.
38248 (gimple_purge_dead_eh_edges): Likewise.
38249 (gimple_purge_dead_abnormal_call_edges): Likewise.
38250 (pass_warn_function_return::execute): Likewise.
38251 (execute_fixup_cfg): Likewise.
38252 * tree-eh.cc (redirect_eh_edge_1): Likewise.
38253 (pass_lower_resx::execute): Likewise.
38254 (pass_lower_eh_dispatch::execute): Likewise.
38255 (cleanup_empty_eh): Likewise.
38256 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
38257 (predicate_bbs): Likewise.
38258 (ifcvt_split_critical_edges): Likewise.
38259 * tree-loop-distribution.cc (create_edge_for_control_dependence):
38261 (loop_distribution::transform_reduction_loop): Likewise.
38262 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
38263 (try_transform_to_exit_first_loop_alt): Likewise.
38264 (transform_to_exit_first_loop): Likewise.
38265 (create_parallel_loop): Likewise.
38266 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
38267 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
38268 (eliminate_unnecessary_stmts): Likewise.
38270 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
38272 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
38273 (pass_tree_ifcombine::execute): Likewise.
38274 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
38275 (should_duplicate_loop_header_p): Likewise.
38276 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
38277 (tree_estimate_loop_size): Likewise.
38278 (try_unroll_loop_completely): Likewise.
38279 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
38280 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
38281 (canonicalize_loop_ivs): Likewise.
38282 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
38283 (bound_difference): Likewise.
38284 (number_of_iterations_popcount): Likewise.
38285 (number_of_iterations_cltz): Likewise.
38286 (number_of_iterations_cltz_complement): Likewise.
38287 (simplify_using_initial_conditions): Likewise.
38288 (number_of_iterations_exit_assumptions): Likewise.
38289 (loop_niter_by_eval): Likewise.
38290 (estimate_numbers_of_iterations): Likewise.
38292 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38294 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
38296 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
38299 * config/rs6000/rs6000-builtins.def
38300 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
38301 __builtin_vsx_scalar_cmp_exp_qp_lt,
38302 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
38305 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
38308 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
38309 easy_vector_constant with const_vector_each_byte_same, add
38310 handlings in preparation for !easy_vector_constant, and update
38311 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
38312 * config/rs6000/predicates.md (const_vector_each_byte_same): New
38315 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38317 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
38318 (*pred_ltge<mode>_merge_tie_mask): Ditto.
38319 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
38320 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
38321 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
38322 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
38323 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
38325 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38327 * config/riscv/vector.md: Fix redundant vmv1r.v.
38329 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38331 * config/riscv/vector.md: Fix RA constraint.
38333 2023-04-26 Pan Li <pan2.li@intel.com>
38336 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
38337 check for vn_reference equal.
38339 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38341 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
38342 auto-vectorization preference.
38343 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
38344 auto-vectorization.
38345 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
38347 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
38349 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
38350 and bclridisi_nottwobits patterns.
38351 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
38352 predicate to avoid splitting arith constants.
38353 (const_nottwobits_not_arith_operand): New predicate.
38355 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
38357 * recog.cc (peep2_attempt, peep2_update_life): Correct
38358 head-comment description of parameter match_len.
38360 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
38362 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
38363 riscv_split_symbol() drop in_splitter arg.
38364 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
38365 riscv_split_symbol() drop in_splitter arg.
38366 riscv_force_temporary() drop in_splitter arg.
38367 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
38368 riscv_split_symbol() drop in_splitter arg.
38370 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
38372 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
38373 superfluous debug temporaries for single GIMPLE assignments.
38375 2023-04-25 Richard Biener <rguenther@suse.de>
38377 PR tree-optimization/109609
38378 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
38380 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
38381 the size given by arg_max_access_size_given_by_arg_p as
38382 maximum, not exact, size.
38384 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38387 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
38388 (orn<mode>3<vczle><vczbe>): ... This.
38389 (bic<mode>3): Rename to...
38390 (bic<mode>3<vczle><vczbe>): ... This.
38391 (<su><maxmin><mode>3): Rename to...
38392 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
38394 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38396 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
38397 * config/aarch64/iterators.md (VQDIV): New mode iterator.
38398 (vnx2di): New mode attribute.
38400 2023-04-25 Richard Biener <rguenther@suse.de>
38402 PR rtl-optimization/109585
38403 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
38405 2023-04-25 Jakub Jelinek <jakub@redhat.com>
38408 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
38409 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
38410 is larger than signed int maximum.
38412 2023-04-25 Martin Liska <mliska@suse.cz>
38414 * doc/gcov.texi: Document the new "calls" field and document
38415 the API bump. Mention also "block_ids" for lines.
38416 * gcov.cc (output_intermediate_json_line): Output info about
38417 calls and extend branches as well.
38418 (generate_results): Bump version to 2.
38419 (output_line_details): Use block ID instead of a non-sensual
38422 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
38424 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
38425 length attribute for the first (memory operand) alternative.
38427 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
38429 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
38430 * config/aarch64/constraints.md: Make "Umn" relaxed memory
38432 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
38434 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
38436 * value-range.cc (frange::set): Adjust constructor.
38437 * value-range.h (nan_state::nan_state): Replace default
38438 constructor with one taking an argument.
38440 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
38442 * ipa-cp.cc (ipa_range_contains_p): New.
38443 (decide_whether_version_node): Use it.
38445 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
38447 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
38448 simplify two successive VEC_PERM_EXPRs with same VLA mask,
38449 where mask chooses elements in reverse order.
38451 2023-04-24 Andrew Pinski <apinski@marvell.com>
38453 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
38454 and support diamond shaped basic block form.
38455 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
38457 2023-04-24 Andrew Pinski <apinski@marvell.com>
38459 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
38460 Instead of calling last_and_only_stmt, look for the last statement
38463 2023-04-24 Andrew Pinski <apinski@marvell.com>
38465 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
38467 (match_simplify_replacement): Call
38468 empty_bb_or_one_feeding_into_p instead of doing it inline.
38470 2023-04-24 Andrew Pinski <apinski@marvell.com>
38472 PR tree-optimization/68894
38473 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
38474 continue for the do_hoist_loads diamond case.
38476 2023-04-24 Andrew Pinski <apinski@marvell.com>
38478 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
38479 code for better code readability.
38481 2023-04-24 Andrew Pinski <apinski@marvell.com>
38483 PR tree-optimization/109604
38484 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
38485 diamond form check from ...
38486 (minmax_replacement): Here.
38488 2023-04-24 Patrick Palka <ppalka@redhat.com>
38490 * tree.cc (strip_array_types): Don't define here.
38491 (is_typedef_decl): Don't define here.
38492 (typedef_variant_p): Don't define here.
38493 * tree.h (strip_array_types): Define here.
38494 (is_typedef_decl): Define here.
38495 (typedef_variant_p): Define here.
38497 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
38499 * doc/generic.texi (OpenMP): Add != to allowed
38500 conditions and state that vars can be unsigned.
38501 * tree.def (OMP_FOR): Likewise.
38503 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38505 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
38507 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
38509 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
38510 Remove explicit Solaris 11 references.
38512 (Options specification, --with-gnu-as): as and gas always differ
38514 Remove /usr/ccs/bin reference.
38515 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
38516 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
38517 (*-*-solaris2*): ... here.
38518 Update bundled GCC versions.
38519 Don't refer to pre-built binaries.
38520 Remove /bin/sh warning.
38521 Update assembler, linker recommendations.
38522 Document GNAT bootstrap compiler.
38523 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
38524 (sparc64-*-solaris2*): Move content...
38525 (sparcv9-*-solaris2*): ...here.
38526 Add GDC for 64-bit bootstrap compilers.
38528 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38531 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
38533 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
38536 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38538 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
38539 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
38540 (aarch64_<su>abal2<mode>): New define_expand.
38541 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
38542 (aarch64_rtx_costs): Handle ABD rtxes.
38543 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
38544 * config/aarch64/iterators.md (ABAL2): Delete.
38545 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
38547 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38549 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
38550 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
38551 (<sur>sadv16qi): Rename to...
38552 (<su>sadv16qi): ... This. Adjust for the above.
38553 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
38554 (<su>sad<vsi2qi>): ... This. Adjust for the above.
38555 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
38556 * config/aarch64/iterators.md (ABAL): Delete.
38557 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
38559 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38561 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
38562 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
38563 (aarch64_<su>abdl2<mode>): New define_expand.
38564 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
38565 * config/aarch64/iterators.md (ABDL2): Delete.
38566 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
38568 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38570 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
38571 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
38573 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
38574 * config/aarch64/iterators.md (ABDL): Delete.
38575 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
38577 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38579 * config/aarch64/aarch64-simd.md
38580 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
38582 2023-04-24 Richard Biener <rguenther@suse.de>
38584 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
38586 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
38588 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
38589 (set_switch_stmt_execution_predicate): Likewise.
38590 (phi_result_unknown_predicate): Likewise.
38591 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
38592 (ipa_analyze_indirect_call_uses): Likewise.
38593 * predict.cc (predict_iv_comparison): Likewise.
38594 (predict_extra_loop_exits): Likewise.
38595 (predict_loops): Likewise.
38596 (tree_predict_by_opcode): Likewise.
38597 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
38599 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
38600 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
38601 (replace_phi_edge_with_variable): Likewise.
38602 (two_value_replacement): Likewise.
38603 (value_replacement): Likewise.
38604 (minmax_replacement): Likewise.
38605 (spaceship_replacement): Likewise.
38606 (cond_removal_in_builtin_zero_pattern): Likewise.
38607 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
38608 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
38609 (vn_phi_lookup): Likewise.
38610 (vn_phi_insert): Likewise.
38611 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
38612 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
38614 (back_threader_profitability::possibly_profitable_path_p):
38616 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
38618 * tree-switch-conversion.cc (pass_convert_switch::execute):
38620 (pass_lower_switch<O0>::execute): Likewise.
38621 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
38622 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
38623 * tree-vect-slp.cc (vect_slp_function): Likewise.
38624 * tree-vect-stmts.cc (cfun_returns): Likewise.
38625 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
38626 (vect_loop_dist_alias_call): Likewise.
38628 2023-04-24 Richard Biener <rguenther@suse.de>
38630 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
38632 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38634 * config/riscv/riscv-vsetvl.cc
38635 (vector_infos_manager::all_avail_in_compatible_p): New function.
38636 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
38637 * config/riscv/riscv-vsetvl.h: New function.
38639 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38641 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
38642 comment for cleanup_insns.
38644 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38646 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
38647 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
38648 with the fault first load property.
38650 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38652 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
38653 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
38655 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38658 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
38659 (aarch64_addp<mode><vczle><vczbe>): ... This.
38661 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
38663 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
38664 provide reasonable values for common arithmetic operations and
38665 immediate operands (in several machine modes).
38667 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
38669 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
38670 format specifier to output high_part register name of SImode reg.
38671 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
38672 (zero_extendqihi2): Fix lengths, consistent formatting and add
38673 "and Rx,#255" alternative, for documentation purposes.
38674 (zero_extendhisi2): New define_insn.
38676 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
38678 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
38679 SImode shifts by two by performing a single bit SImode shift twice.
38681 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
38683 PR tree-optimization/109593
38684 * value-range.cc (frange::operator==): Handle NANs.
38686 2023-04-23 liuhongt <hongtao.liu@intel.com>
38688 PR rtl-optimization/108707
38689 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
38690 GENERAL_REGS when preferred reg_class is not known.
38692 2023-04-22 Andrew Pinski <apinski@marvell.com>
38694 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
38695 Change the code around slightly to move diamond
38696 handling for do_store_elim/do_hoist_loads out of
38699 2023-04-22 Andrew Pinski <apinski@marvell.com>
38701 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
38702 Remove check on empty_block_p.
38704 2023-04-22 Jakub Jelinek <jakub@redhat.com>
38706 PR bootstrap/109589
38707 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
38708 * realmpfr.h (class auto_mpfr): Likewise.
38710 2023-04-22 Jakub Jelinek <jakub@redhat.com>
38712 PR tree-optimization/109583
38713 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
38714 if vec_mode is not VECTOR_MODE_P.
38716 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
38717 Ondrej Kubanek <kubanek0ondrej@gmail.com>
38719 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
38720 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
38721 loop profile and bounds after header duplication.
38722 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
38723 Break out from try_peel_loop; fix handling of 0 iterations.
38724 (try_peel_loop): Use adjust_loop_info_after_peeling.
38726 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
38728 PR tree-optimization/109546
38729 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
38730 not fold conditions with ADDR_EXPR early.
38732 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38734 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
38735 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
38737 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
38738 (*aarch64_<optab><mode>3_zero): Define.
38739 (*aarch64_<optab><mode>3_cssc): Likewise.
38740 * config/aarch64/iterators.md (maxminand): New code attribute.
38742 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38745 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
38746 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
38748 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
38749 (aarch64_override_options_internal): Handle the above.
38750 (aarch64_output_load_tp): New function.
38751 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
38752 aarch64_output_load_tp.
38753 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
38754 (mtp=): New option.
38755 * doc/invoke.texi (AArch64 Options): Document -mtp=.
38757 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
38760 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
38761 (add_vec_concat_subst_be): Likewise.
38764 (add<mode>3): Rename to...
38765 (add<mode>3<vczle><vczbe>): ... This.
38766 (sub<mode>3): Rename to...
38767 (sub<mode>3<vczle><vczbe>): ... This.
38768 (mul<mode>3): Rename to...
38769 (mul<mode>3<vczle><vczbe>): ... This.
38770 (and<mode>3): Rename to...
38771 (and<mode>3<vczle><vczbe>): ... This.
38772 (ior<mode>3): Rename to...
38773 (ior<mode>3<vczle><vczbe>): ... This.
38774 (xor<mode>3): Rename to...
38775 (xor<mode>3<vczle><vczbe>): ... This.
38776 * config/aarch64/iterators.md (VDZ): Define.
38778 2023-04-21 Patrick Palka <ppalka@redhat.com>
38780 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
38783 2023-04-21 Jan Hubicka <jh@suse.cz>
38785 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
38788 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
38790 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
38791 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
38793 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
38795 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
38796 force_reg instead of copy_to_mode_reg.
38797 (aarch64_expand_vector_init): Likewise.
38799 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
38801 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
38802 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
38803 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
38804 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
38805 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
38806 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
38807 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
38808 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
38809 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
38810 * config/i386/predicates.md (index_register_operand):
38811 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
38812 * config/i386/i386.cc (ix86_legitimate_address_p): Use
38813 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
38814 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
38816 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
38817 Ondrej Kubanek <kubanek0ondrej@gmail.com>
38819 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
38822 2023-04-21 Richard Biener <rguenther@suse.de>
38824 * is-a.h (safe_is_a): New.
38826 2023-04-21 Richard Biener <rguenther@suse.de>
38828 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
38829 (gphi_iterator::operator*): Likewise.
38831 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
38832 Michal Jires <michal@jires.eu>
38834 * ipa-inline.cc (class inline_badness): New class.
38835 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
38837 (update_edge_key): Update.
38838 (lookup_recursive_calls): Likewise.
38839 (recursive_inlining): Likewise.
38840 (add_new_edges_to_heap): Likewise.
38841 (inline_small_functions): Likewise.
38843 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
38845 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
38847 2023-04-21 Richard Biener <rguenther@suse.de>
38849 PR tree-optimization/109573
38850 * tree-vect-loop.cc (vectorizable_live_operation): Allow
38851 unhandled SSA copy as well. Demote assert to checking only.
38853 2023-04-21 Richard Biener <rguenther@suse.de>
38855 * df-core.cc (df_analyze): Compute RPO on the reverse graph
38856 for DF_BACKWARD problems.
38857 (loop_post_order_compute): Rename to ...
38858 (loop_rev_post_order_compute): ... this, compute a RPO.
38859 (loop_inverted_post_order_compute): Rename to ...
38860 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
38861 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
38862 problems, RPO on the inverted graph for DF_BACKWARD.
38864 2023-04-21 Richard Biener <rguenther@suse.de>
38866 * cfganal.h (inverted_rev_post_order_compute): Rename
38868 (inverted_post_order_compute): ... this. Add struct function
38869 argument, change allocation to a C array.
38870 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
38871 * lcm.cc (compute_antinout_edge): Adjust.
38872 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
38873 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
38874 * tree-ssa-pre.cc (compute_antic): Likewise.
38876 2023-04-21 Richard Biener <rguenther@suse.de>
38878 * df.h (df_d::postorder_inverted): Change back to int *,
38880 * df-core.cc (rest_of_handle_df_finish): Adjust.
38881 (df_analyze_1): Likewise.
38882 (df_analyze): For DF_FORWARD problems use RPO on the forward
38884 (loop_inverted_post_order_compute): Adjust API.
38885 (df_analyze_loop): Adjust.
38886 (df_get_n_blocks): Likewise.
38887 (df_get_postorder): Likewise.
38889 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38892 * config/riscv/riscv-vsetvl.cc
38893 (vector_infos_manager::all_empty_predecessor_p): New function.
38894 (pass_vsetvl::backward_demand_fusion): Ditto.
38895 * config/riscv/riscv-vsetvl.h: Ditto.
38897 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
38900 * config/riscv/generic.md: Change standard names to insn names.
38902 2023-04-21 Richard Biener <rguenther@suse.de>
38904 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
38905 (compute_laterin): Use RPO.
38906 (compute_available): Likewise.
38908 2023-04-21 Peng Fan <fanpeng@loongson.cn>
38910 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
38912 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
38915 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
38916 (vector_insn_info::skip_avl_compatible_p): Ditto.
38917 (vector_insn_info::merge): Remove default value.
38918 (pass_vsetvl::compute_local_backward_infos): Ditto.
38919 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
38920 * config/riscv/riscv-vsetvl.h: Ditto.
38922 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
38924 * doc/extend.texi (Common Function Attributes): Remove duplicate
38927 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
38929 PR tree-optimization/109564
38930 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
38931 UNDEFINED range names when deciding if all PHI arguments are the same,
38933 2023-04-20 Jakub Jelinek <jakub@redhat.com>
38935 PR tree-optimization/109011
38936 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
38937 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
38938 .CTZ (X) = PREC - .POPCOUNT (X | -X).
38940 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
38942 * lra-constraints.cc (match_reload): Exclude some hard regs for
38943 multi-reg inout reload pseudos used in asm in different mode.
38945 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
38947 * config/arm/arm.cc (thumb1_legitimate_address_p):
38948 Use VIRTUAL_REGISTER_P predicate.
38949 (arm_eliminable_register): Ditto.
38950 * config/avr/avr.md (push<mode>_1): Ditto.
38951 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
38952 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
38953 * config/i386/predicates.md (register_no_elim_operand): Ditto.
38954 * config/iq2000/predicates.md (call_insn_operand): Ditto.
38955 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
38957 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
38960 * config/i386/predicates.md (extract_operator): New predicate.
38961 * config/i386/i386.md (any_extract): Remove code iterator.
38962 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
38963 (*cmpqi_ext<mode>_1): Ditto.
38964 (*cmpqi_ext<mode>_2): Ditto.
38965 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
38966 (*cmpqi_ext<mode>_3): Ditto.
38967 (*cmpqi_ext<mode>_4): Ditto.
38968 (*extzvqi_mem_rex64): Ditto.
38970 (*insvqi_2): Ditto.
38971 (*extendqi<SWI24:mode>_ext_1): Ditto.
38972 (*addqi_ext<mode>_0): Ditto.
38973 (*addqi_ext<mode>_1): Ditto.
38974 (*addqi_ext<mode>_2): Ditto.
38975 (*subqi_ext<mode>_0): Ditto.
38976 (*subqi_ext<mode>_2): Ditto.
38977 (*testqi_ext<mode>_1): Ditto.
38978 (*testqi_ext<mode>_2): Ditto.
38979 (*andqi_ext<mode>_0): Ditto.
38980 (*andqi_ext<mode>_1): Ditto.
38981 (*andqi_ext<mode>_1_cc): Ditto.
38982 (*andqi_ext<mode>_2): Ditto.
38983 (*<any_or:code>qi_ext<mode>_0): Ditto.
38984 (*<any_or:code>qi_ext<mode>_1): Ditto.
38985 (*<any_or:code>qi_ext<mode>_2): Ditto.
38986 (*xorqi_ext<mode>_1_cc): Ditto.
38987 (*negqi_ext<mode>_2): Ditto.
38988 (*ashlqi_ext<mode>_2): Ditto.
38989 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
38991 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
38994 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
38995 <bitmanip_insn> as the type to allow for fine grained control of
38996 scheduling these insns.
38997 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
38999 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
39000 pcnt, signed and unsigned min/max.
39002 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39003 kito-cheng <kito.cheng@sifive.com>
39005 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
39007 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39008 kito-cheng <kito.cheng@sifive.com>
39011 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
39012 (pass_vsetvl::cleanup_insns): Fix bug.
39014 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
39016 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
39017 (ldexp<mode>3): Delete.
39018 (ldexp<mode>3<exec>): Change "B" to "A".
39020 2023-04-20 Jakub Jelinek <jakub@redhat.com>
39021 Jonathan Wakely <jwakely@redhat.com>
39023 * tree.h (built_in_function_equal_p): New helper function.
39024 (fndecl_built_in_p): Turn into variadic template to support
39025 1 or more built_in_function arguments.
39026 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
39027 * gimplify.cc (goa_stabilize_expr): Likewise.
39028 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
39029 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
39030 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
39031 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
39032 cgraph_update_edges_for_call_stmt_node,
39033 cgraph_edge::verify_corresponds_to_fndecl,
39034 cgraph_node::verify_node): Likewise.
39035 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
39036 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
39037 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
39039 2023-04-20 Jakub Jelinek <jakub@redhat.com>
39041 PR tree-optimization/109011
39042 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
39043 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
39044 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
39045 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
39046 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
39048 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
39050 2023-04-20 Richard Biener <rguenther@suse.de>
39052 * df-core.cc (rest_of_handle_df_initialize): Remove
39053 computation of df->postorder, df->postorder_inverted and
39056 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39058 * common/config/i386/i386-common.cc
39059 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
39060 (ix86_handle_option): Set AVX flag for VAES.
39061 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
39062 Add OPTION_MASK_ISA2_VAES_UNSET.
39063 (def_builtin): Share builtin between AES and VAES.
39064 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
39066 * config/i386/i386.md (aes): New isa attribute.
39067 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
39068 (aesenclast): Ditto.
39070 (aesdeclast): Ditto.
39071 * config/i386/vaesintrin.h: Remove redundant avx target push.
39072 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
39073 (_mm_aesdeclast_si128): Ditto.
39074 (_mm_aesenc_si128): Ditto.
39075 (_mm_aesenclast_si128): Ditto.
39077 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
39079 * config/i386/avx2intrin.h
39080 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
39081 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
39082 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
39083 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
39084 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
39085 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
39086 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
39087 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
39088 (_mm_reduce_add_epi16): New instrinsics.
39089 (_mm_reduce_mul_epi16): Ditto.
39090 (_mm_reduce_and_epi16): Ditto.
39091 (_mm_reduce_or_epi16): Ditto.
39092 (_mm_reduce_max_epi16): Ditto.
39093 (_mm_reduce_max_epu16): Ditto.
39094 (_mm_reduce_min_epi16): Ditto.
39095 (_mm_reduce_min_epu16): Ditto.
39096 (_mm256_reduce_add_epi16): Ditto.
39097 (_mm256_reduce_mul_epi16): Ditto.
39098 (_mm256_reduce_and_epi16): Ditto.
39099 (_mm256_reduce_or_epi16): Ditto.
39100 (_mm256_reduce_max_epi16): Ditto.
39101 (_mm256_reduce_max_epu16): Ditto.
39102 (_mm256_reduce_min_epi16): Ditto.
39103 (_mm256_reduce_min_epu16): Ditto.
39104 (_mm_reduce_add_epi8): Ditto.
39105 (_mm_reduce_mul_epi8): Ditto.
39106 (_mm_reduce_and_epi8): Ditto.
39107 (_mm_reduce_or_epi8): Ditto.
39108 (_mm_reduce_max_epi8): Ditto.
39109 (_mm_reduce_max_epu8): Ditto.
39110 (_mm_reduce_min_epi8): Ditto.
39111 (_mm_reduce_min_epu8): Ditto.
39112 (_mm256_reduce_add_epi8): Ditto.
39113 (_mm256_reduce_mul_epi8): Ditto.
39114 (_mm256_reduce_and_epi8): Ditto.
39115 (_mm256_reduce_or_epi8): Ditto.
39116 (_mm256_reduce_max_epi8): Ditto.
39117 (_mm256_reduce_max_epu8): Ditto.
39118 (_mm256_reduce_min_epi8): Ditto.
39119 (_mm256_reduce_min_epu8): Ditto.
39120 * config/i386/avx512vlbwintrin.h:
39121 (_mm_mask_reduce_add_epi16): Ditto.
39122 (_mm_mask_reduce_mul_epi16): Ditto.
39123 (_mm_mask_reduce_and_epi16): Ditto.
39124 (_mm_mask_reduce_or_epi16): Ditto.
39125 (_mm_mask_reduce_max_epi16): Ditto.
39126 (_mm_mask_reduce_max_epu16): Ditto.
39127 (_mm_mask_reduce_min_epi16): Ditto.
39128 (_mm_mask_reduce_min_epu16): Ditto.
39129 (_mm256_mask_reduce_add_epi16): Ditto.
39130 (_mm256_mask_reduce_mul_epi16): Ditto.
39131 (_mm256_mask_reduce_and_epi16): Ditto.
39132 (_mm256_mask_reduce_or_epi16): Ditto.
39133 (_mm256_mask_reduce_max_epi16): Ditto.
39134 (_mm256_mask_reduce_max_epu16): Ditto.
39135 (_mm256_mask_reduce_min_epi16): Ditto.
39136 (_mm256_mask_reduce_min_epu16): Ditto.
39137 (_mm_mask_reduce_add_epi8): Ditto.
39138 (_mm_mask_reduce_mul_epi8): Ditto.
39139 (_mm_mask_reduce_and_epi8): Ditto.
39140 (_mm_mask_reduce_or_epi8): Ditto.
39141 (_mm_mask_reduce_max_epi8): Ditto.
39142 (_mm_mask_reduce_max_epu8): Ditto.
39143 (_mm_mask_reduce_min_epi8): Ditto.
39144 (_mm_mask_reduce_min_epu8): Ditto.
39145 (_mm256_mask_reduce_add_epi8): Ditto.
39146 (_mm256_mask_reduce_mul_epi8): Ditto.
39147 (_mm256_mask_reduce_and_epi8): Ditto.
39148 (_mm256_mask_reduce_or_epi8): Ditto.
39149 (_mm256_mask_reduce_max_epi8): Ditto.
39150 (_mm256_mask_reduce_max_epu8): Ditto.
39151 (_mm256_mask_reduce_min_epi8): Ditto.
39152 (_mm256_mask_reduce_min_epu8): Ditto.
39154 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39156 * common/config/i386/i386-common.cc
39157 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
39158 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
39159 (OPTION_MASK_ISA_AVX_UNSET):
39160 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
39161 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
39162 * config/i386/i386.md (vpclmulqdqvl): New.
39163 * config/i386/sse.md (pclmulqdq): Add evex encoding.
39164 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
39167 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39169 * config/i386/avx512vlbwintrin.h
39170 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
39171 (_mm_mask_blend_epi8): Ditto.
39172 (_mm256_mask_blend_epi16): Ditto.
39173 (_mm256_mask_blend_epi8): Ditto.
39174 * config/i386/avx512vlintrin.h
39175 (_mm256_mask_blend_pd): Ditto.
39176 (_mm256_mask_blend_ps): Ditto.
39177 (_mm256_mask_blend_epi64): Ditto.
39178 (_mm256_mask_blend_epi32): Ditto.
39179 (_mm_mask_blend_pd): Ditto.
39180 (_mm_mask_blend_ps): Ditto.
39181 (_mm_mask_blend_epi64): Ditto.
39182 (_mm_mask_blend_epi32): Ditto.
39183 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
39184 (VF_AVX512HFBFVL): Move it before the first usage.
39185 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
39186 to VF_AVX512HFBFVL.
39188 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39190 * common/config/i386/i386-common.cc
39191 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
39192 to OPTION_MASK_ISA_AVX512BW_SET.
39193 (OPTION_MASK_ISA_AVX512F_UNSET):
39194 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
39195 (OPTION_MASK_ISA_AVX512BW_UNSET):
39196 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
39197 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
39198 * config/i386/avx512vbmi2vlintrin.h: Ditto.
39199 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
39200 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
39201 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
39202 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
39204 (compressstore<mode>_mask): Ditto.
39205 (expand<mode>_mask): Ditto.
39206 (expand<mode>_maskz): Ditto.
39207 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
39208 VI12_VI48F_AVX512VL.
39210 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39212 * common/config/i386/i386-common.cc
39213 (OPTION_MASK_ISA_AVX512BITALG_SET):
39214 Change OPTION_MASK_ISA_AVX512F_SET
39215 to OPTION_MASK_ISA_AVX512BW_SET.
39216 (OPTION_MASK_ISA_AVX512F_UNSET):
39217 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
39218 (OPTION_MASK_ISA_AVX512BW_UNSET):
39219 Add OPTION_MASK_ISA_AVX512BITALG_SET.
39220 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
39221 * config/i386/i386-builtin.def:
39222 Remove redundant OPTION_MASK_ISA_AVX512BW.
39223 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
39224 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
39225 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
39227 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
39229 * config/i386/i386-expand.cc
39230 (ix86_check_builtin_isa_match): Correct wrong comments.
39231 Add a new macro SHARE_BUILTIN and refactor the current if
39234 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
39236 * config/i386/cpuid.h: Open a new section for Extended Features
39237 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
39240 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
39242 * config/i386/sse.md: Modify insn vperm{i,f}
39245 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
39247 * config/xtensa/xtensa-opts.h: New header.
39248 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
39249 xtensa_strict_align.
39250 * config/xtensa/xtensa.cc (xtensa_option_override): When
39251 -m[no-]strict-align is not specified in the command line set
39252 xtensa_strict_align to 0 if the hardware supports both unaligned
39253 loads and stores or to 1 otherwise.
39254 * config/xtensa/xtensa.opt (mstrict-align): New option.
39255 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
39257 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
39259 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
39262 2023-04-19 Andrew Pinski <apinski@marvell.com>
39264 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
39266 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
39268 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
39269 (VECTOR_BOOL_MODE): Ditto.
39270 (ADJUST_NUNITS): Ditto.
39271 (ADJUST_ALIGNMENT): Ditto.
39272 (ADJUST_BYTESIZE): Ditto.
39273 (ADJUST_PRECISION): Ditto.
39274 (RVV_MODES): Ditto.
39275 (VECTOR_MODE_WITH_PREFIX): Ditto.
39276 * config/riscv/riscv-v.cc (ENTRY): Ditto.
39277 (get_vlmul): Ditto.
39278 (get_ratio): Ditto.
39279 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
39280 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
39281 (vbool64_t): Ditto.
39282 (vbool32_t): Ditto.
39283 (vbool16_t): Ditto.
39288 (vint8mf8_t): Ditto.
39289 (vuint8mf8_t): Ditto.
39290 (vint8mf4_t): Ditto.
39291 (vuint8mf4_t): Ditto.
39292 (vint8mf2_t): Ditto.
39293 (vuint8mf2_t): Ditto.
39294 (vint8m1_t): Ditto.
39295 (vuint8m1_t): Ditto.
39296 (vint8m2_t): Ditto.
39297 (vuint8m2_t): Ditto.
39298 (vint8m4_t): Ditto.
39299 (vuint8m4_t): Ditto.
39300 (vint8m8_t): Ditto.
39301 (vuint8m8_t): Ditto.
39302 (vint16mf4_t): Ditto.
39303 (vuint16mf4_t): Ditto.
39304 (vint16mf2_t): Ditto.
39305 (vuint16mf2_t): Ditto.
39306 (vint16m1_t): Ditto.
39307 (vuint16m1_t): Ditto.
39308 (vint16m2_t): Ditto.
39309 (vuint16m2_t): Ditto.
39310 (vint16m4_t): Ditto.
39311 (vuint16m4_t): Ditto.
39312 (vint16m8_t): Ditto.
39313 (vuint16m8_t): Ditto.
39314 (vint32mf2_t): Ditto.
39315 (vuint32mf2_t): Ditto.
39316 (vint32m1_t): Ditto.
39317 (vuint32m1_t): Ditto.
39318 (vint32m2_t): Ditto.
39319 (vuint32m2_t): Ditto.
39320 (vint32m4_t): Ditto.
39321 (vuint32m4_t): Ditto.
39322 (vint32m8_t): Ditto.
39323 (vuint32m8_t): Ditto.
39324 (vint64m1_t): Ditto.
39325 (vuint64m1_t): Ditto.
39326 (vint64m2_t): Ditto.
39327 (vuint64m2_t): Ditto.
39328 (vint64m4_t): Ditto.
39329 (vuint64m4_t): Ditto.
39330 (vint64m8_t): Ditto.
39331 (vuint64m8_t): Ditto.
39332 (vfloat32mf2_t): Ditto.
39333 (vfloat32m1_t): Ditto.
39334 (vfloat32m2_t): Ditto.
39335 (vfloat32m4_t): Ditto.
39336 (vfloat32m8_t): Ditto.
39337 (vfloat64m1_t): Ditto.
39338 (vfloat64m2_t): Ditto.
39339 (vfloat64m4_t): Ditto.
39340 (vfloat64m8_t): Ditto.
39341 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
39342 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
39343 (riscv_convert_vector_bits): Ditto.
39344 * config/riscv/riscv.md:
39345 * config/riscv/vector-iterators.md:
39346 * config/riscv/vector.md
39347 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39348 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
39349 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39350 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
39351 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
39352 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
39353 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
39354 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
39355 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
39357 2023-04-19 Pan Li <pan2.li@intel.com>
39359 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
39360 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
39362 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
39366 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
39367 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
39368 for operand 0. Use any_extract code iterator.
39369 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
39370 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
39371 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
39372 (*cmpqi_ext<mode>_1): Use general_operand predicate
39373 for operand 1. Use any_extract code iterator.
39374 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
39375 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
39377 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39379 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
39380 (aarch64_uaddw2<mode>): Delete.
39381 (aarch64_ssubw2<mode>): Delete.
39382 (aarch64_usubw2<mode>): Delete.
39383 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
39385 2023-04-19 Richard Biener <rguenther@suse.de>
39387 * tree-ssa-structalias.cc (do_ds_constraint): Use
39388 solve_add_graph_edge.
39390 2023-04-19 Richard Biener <rguenther@suse.de>
39392 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
39394 (do_sd_constraint): ... here.
39396 2023-04-19 Richard Biener <rguenther@suse.de>
39398 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
39399 rejecting the merge when A contains only a non-local label.
39401 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
39403 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
39404 (VIRTUAL_REGISTER_NUM_P): Ditto.
39405 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
39406 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
39407 * function.cc (instantiate_decl_rtl): Ditto.
39408 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
39409 (nonzero_address_p): Ditto.
39410 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
39412 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
39414 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
39416 2023-04-19 Richard Biener <rguenther@suse.de>
39418 * system.h (auto_mpz::operator->()): New.
39419 * realmpfr.h (auto_mpfr::operator->()): New.
39420 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
39421 * real.cc (real_from_string): Likewise.
39422 (dconst_e_ptr): Likewise.
39423 (dconst_sqrt2_ptr): Likewise.
39424 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
39426 (bound_difference_of_offsetted_base): Likewise.
39427 (number_of_iterations_ne): Likewise.
39428 (number_of_iterations_lt_to_ne): Likewise.
39429 * ubsan.cc: Include realmpfr.h.
39430 (ubsan_instrument_float_cast): Use auto_mpfr.
39432 2023-04-19 Richard Biener <rguenther@suse.de>
39434 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
39435 edges, remove edges from escaped after special-casing them.
39437 2023-04-19 Richard Biener <rguenther@suse.de>
39439 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
39442 2023-04-19 Richard Biener <rguenther@suse.de>
39444 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
39445 to the LHS varinfo solution member.
39447 2023-04-19 Richard Biener <rguenther@suse.de>
39449 * tree-ssa-structalias.cc (topo_visit): Look at the real
39450 destination of edges.
39452 2023-04-19 Richard Biener <rguenther@suse.de>
39454 PR tree-optimization/44794
39455 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
39456 If an epilogue loop is required set its iteration upper bound.
39458 2023-04-19 Xi Ruoyao <xry111@xry111.site>
39461 * config/loongarch/loongarch-protos.h
39462 (loongarch_expand_block_move): Add a parameter as alignment RTX.
39463 * config/loongarch/loongarch.h:
39464 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
39465 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
39466 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
39467 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
39468 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
39469 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
39470 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
39471 Take the alignment from the parameter, but set it to
39472 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
39473 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
39474 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
39475 (loongarch_block_move_straight): When there are left-over bytes,
39476 half the mode size instead of falling back to byte mode at once.
39477 (loongarch_block_move_loop): Limit the length of loop body with
39478 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
39479 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
39480 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
39481 to loongarch_expand_block_move.
39483 2023-04-19 Xi Ruoyao <xry111@xry111.site>
39485 * config/loongarch/loongarch.cc
39486 (loongarch_setup_incoming_varargs): Don't save more GARs than
39487 cfun->va_list_gpr_size / UNITS_PER_WORD.
39489 2023-04-19 Richard Biener <rguenther@suse.de>
39491 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
39492 no epilogue condition.
39494 2023-04-19 Richard Biener <rguenther@suse.de>
39496 * gimple.h (gimple_assign_load): Outline...
39497 * gimple.cc (gimple_assign_load): ... here. Avoid
39498 get_base_address and instead just strip the outermost
39499 handled component, treating a remaining handled component
39502 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39504 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
39506 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
39508 2023-04-19 Jakub Jelinek <jakub@redhat.com>
39510 PR tree-optimization/109011
39511 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
39512 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
39513 CLZ, CTZ and FFS. Remove vargs variable, use
39514 gimple_build_call_internal rather than gimple_build_call_internal_vec.
39515 (vect_vect_recog_func_ptrs): Adjust popcount entry.
39517 2023-04-19 Jakub Jelinek <jakub@redhat.com>
39520 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
39521 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
39522 a new REG rather than the SUBREG.
39524 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39526 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
39529 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39532 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
39533 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
39535 2023-04-19 Richard Biener <rguenther@suse.de>
39537 PR rtl-optimization/109237
39538 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
39539 TREE_VISITED on INSN_VAR_LOCATION_DECL.
39540 (delete_trivially_dead_insns): Maintain TREE_VISITED on
39541 active debug bind INSN_VAR_LOCATION_DECL.
39543 2023-04-19 Richard Biener <rguenther@suse.de>
39545 PR rtl-optimization/109237
39546 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
39548 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
39550 * doc/install.texi (enable-decimal-float): Add AArch64.
39552 2023-04-19 liuhongt <hongtao.liu@intel.com>
39554 PR rtl-optimization/109351
39555 * ira.cc (setup_class_subset_and_memory_move_costs): Check
39556 hard_regno_mode_ok before setting lowest memory move cost for
39557 the mode with different reg classes.
39559 2023-04-18 Jason Merrill <jason@redhat.com>
39561 * doc/invoke.texi: Remove stray @gol.
39563 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39565 * ifcvt.cc (cond_move_process_if_block): Consider the result of
39566 targetm.noce_conversion_profitable_p() when replacing the original
39567 sequence with the converted one.
39569 2023-04-18 Mark Harmstone <mark@harmstone.com>
39571 * common.opt (gcodeview): Add new option.
39572 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
39573 * opts.cc (command_handle_option): Similarly.
39574 * doc/invoke.texi: Add documentation for -gcodeview.
39576 2023-04-18 Andrew Pinski <apinski@marvell.com>
39578 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
39579 (make_pass_phiopt): Make execute out of line.
39580 (tree_ssa_cs_elim): Move code into ...
39581 (pass_cselim::execute): here.
39583 2023-04-18 Sam James <sam@gentoo.org>
39585 * system.h: Drop unused INCLUDE_PTHREAD_H.
39587 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
39589 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
39592 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
39594 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
39595 (bswapdi2, bswapsi2): Similarly.
39597 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
39600 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
39601 Use CODE_FOR_sse4_1_insertps_v4sf.
39602 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
39603 (expand_vec_perm_1): Call expand_vec_per_insertps.
39604 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
39605 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
39606 (@sse4_1_insertps_<mode>): New insn pattern.
39607 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
39608 pattern from sse4_1_insertps using VI4F_128 mode iterator.
39610 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39612 * value-range.cc (gt_ggc_mx): New.
39614 * value-range.h (class vrange): Add GTY marker.
39615 (class frange): Same.
39616 (gt_ggc_mx): Remove.
39617 (gt_pch_nx): Remove.
39619 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
39621 * lra-constraints.cc (constraint_unique): New.
39622 (process_address_1): Apply constraint_unique test.
39623 * recog.cc (constrain_operands): Allow relaxed memory
39626 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
39628 * doc/extend.texi (Target Builtins): Add RISC-V Vector
39630 (RISC-V Vector Intrinsics): Document GCC implemented which
39631 version of RISC-V vector intrinsics and its reference.
39633 2023-04-18 Richard Biener <rguenther@suse.de>
39635 PR middle-end/108786
39636 * bitmap.h (bitmap_clear_first_set_bit): New.
39637 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
39638 bitmap_first_set_bit and add optional clearing of the bit.
39639 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
39640 (bitmap_clear_first_set_bit): Likewise.
39641 * df-core.cc (df_worklist_dataflow_doublequeue): Use
39642 bitmap_clear_first_set_bit.
39643 * graphite-scop-detection.cc (scop_detection::merge_sese):
39645 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
39646 (sanitize_asan_mark_poison): Likewise.
39647 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
39648 * tree-into-ssa.cc (rewrite_blocks): Likewise.
39649 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
39650 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
39652 2023-04-18 Richard Biener <rguenther@suse.de>
39654 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
39655 (dump_sa_points_to_info): ... this function.
39656 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
39657 and call dump_sa_stats guarded with TDF_STATS.
39658 (ipa_pta_execute): Likewise.
39659 (compute_may_aliases): Guard dump_alias_info with
39660 TDF_DETAILS|TDF_ALIAS.
39662 2023-04-18 Andrew Pinski <apinski@marvell.com>
39664 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
39665 the expression that is being tried when TDF_FOLDING
39667 (phiopt_worker::match_simplify_replacement): Dump
39668 the sequence which was created by gimple_simplify_phiopt
39669 when TDF_FOLDING is true.
39671 2023-04-18 Andrew Pinski <apinski@marvell.com>
39673 * tree-ssa-phiopt.cc (match_simplify_replacement):
39674 Simplify code that does the movement slightly.
39676 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39678 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
39680 (rev16<mode>2): Rename to...
39681 (aarch64_rev16<mode>2_alt1): ... This.
39682 (rev16<mode>2_alt): Rename to...
39683 (*aarch64_rev16<mode>2_alt2): ... This.
39685 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39687 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
39688 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
39690 * range-op-float.cc (zero_range): Use dconstm0.
39691 (zero_to_inf_range): Same.
39692 * real.h (dconstm0): New.
39693 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
39694 (frange::set_zero): Do not declare dconstm0.
39696 2023-04-18 Richard Biener <rguenther@suse.de>
39698 * system.h (class auto_mpz): New,
39699 * realmpfr.h (class auto_mpfr): Likewise.
39700 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
39701 (do_mpfr_arg2): Likewise.
39702 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
39704 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39706 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
39707 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
39709 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39711 * value-range.cc (frange::operator==): Adjust for NAN.
39712 (range_tests_nan): Remove some NAN tests.
39714 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39716 * inchash.cc (hash::add_real_value): New.
39717 * inchash.h (class hash): Add add_real_value.
39718 * value-range.cc (add_vrange): New.
39719 * value-range.h (inchash::add_vrange): New.
39721 2023-04-18 Richard Biener <rguenther@suse.de>
39723 PR tree-optimization/109539
39724 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
39725 Re-implement pointer relatedness for PHIs.
39727 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
39729 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
39730 (SV_FP): New iterator.
39731 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
39732 (recip<mode>2): Unify the two patterns using SV_FP.
39733 (div_scale<mode><exec_vcc>): New insn.
39734 (div_fmas<mode><exec>): New insn.
39735 (div_fixup<mode><exec>): New insn.
39736 (div<mode>3): Unify the two expanders and rewrite using hardfp.
39737 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
39738 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
39739 and UNSPEC_DIV_FIXUP.
39740 (vccwait): New attribute.
39742 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39744 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
39745 if the argument matches that.
39747 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39749 * config/aarch64/atomics.md
39750 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
39751 Use SD_HSDI for destination mode iterator.
39753 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
39755 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
39756 of z-extensions and s-extensions.
39757 (riscv_subset_list::parse): Likewise.
39759 2023-04-18 Jakub Jelinek <jakub@redhat.com>
39761 PR tree-optimization/109240
39762 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
39763 first vec_perm operand and minus as second using fneg/fadd and
39764 minus as first vec_perm operand and plus as second using fneg/fsub.
39766 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39768 * data-streamer.cc (bp_pack_real_value): New.
39769 (bp_unpack_real_value): New.
39770 * data-streamer.h (bp_pack_real_value): New.
39771 (bp_unpack_real_value): New.
39772 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
39773 bp_unpack_real_value.
39774 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
39775 bp_pack_real_value.
39777 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39779 * wide-int.h (WIDE_INT_MAX_HWIS): New.
39780 (class fixed_wide_int_storage): Use it.
39781 (trailing_wide_ints <N>::set_precision): Use it.
39782 (trailing_wide_ints <N>::extra_size): Use it.
39784 2023-04-18 Xi Ruoyao <xry111@xry111.site>
39786 * config/loongarch/loongarch-protos.h
39787 (loongarch_addu16i_imm12_operand_p): New function prototype.
39788 (loongarch_split_plus_constant): Likewise.
39789 * config/loongarch/loongarch.cc
39790 (loongarch_addu16i_imm12_operand_p): New function.
39791 (loongarch_split_plus_constant): Likewise.
39792 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
39793 (DUAL_IMM12_OPERAND): Likewise.
39794 (DUAL_ADDU16I_OPERAND): Likewise.
39795 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
39797 * config/loongarch/predicates.md (const_dual_imm12_operand): New
39799 (const_addu16i_operand): Likewise.
39800 (const_addu16i_imm12_di_operand): Likewise.
39801 (const_addu16i_imm12_si_operand): Likewise.
39802 (plus_di_operand): Likewise.
39803 (plus_si_operand): Likewise.
39804 (plus_si_extend_operand): Likewise.
39805 * config/loongarch/loongarch.md (add<mode>3): Convert to
39806 define_insn_and_split. Use plus_<mode>_operand predicate
39807 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
39808 and Le constraints.
39809 (*addsi3_extended): Convert to define_insn_and_split. Use
39810 plus_si_extend_operand instead of arith_operand. Add
39811 alternatives for La and Le alternatives.
39813 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39815 * value-range.h (Value_Range::Value_Range): New.
39816 (Value_Range::contains_p): New.
39818 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
39820 * value-range.h (class vrange): Make m_discriminator const.
39821 (class irange): Make m_max_ranges const. Adjust constructors
39823 (class unsupported_range): Construct vrange appropriately.
39824 (class frange): Same.
39826 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
39828 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
39831 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
39833 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
39835 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
39837 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
39839 (riscv_expand_epilogue): Likewise.
39841 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
39843 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
39845 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
39847 2023-04-17 Andrew Pinski <apinski@marvell.com>
39849 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
39852 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
39854 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
39857 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
39859 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
39860 parameter remaining_size.
39861 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
39862 (riscv_expand_prologue): Likewise.
39863 (riscv_expand_epilogue): Likewise.
39865 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
39867 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
39868 roriw for constant counts.
39869 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
39870 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
39871 (simplify_context::simplify_binary_operation_1): Use it.
39872 * expmed.cc (expand_shift_1): Likewise.
39874 2023-04-17 Martin Jambor <mjambor@suse.cz>
39878 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
39879 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
39880 (ipa_zap_jf_refdesc): New function.
39881 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
39882 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
39883 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
39884 the new parameter of find_reference.
39885 (adjust_references_in_caller): Likewise. Make sure the constant jump
39886 function is not used to decrement a refdec counter again. Only
39887 decrement refdesc counters when the pass_through jump function allows
39888 it. Added a detailed dump when decrementing refdesc counters.
39889 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
39890 (ipa_set_jf_simple_pass_through): Initialize the new flag.
39891 (ipa_set_jf_unary_pass_through): Likewise.
39892 (ipa_set_jf_arith_pass_through): Likewise.
39893 (remove_described_reference): Provide a value for the new parameter of
39895 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
39896 the previous pass_through had a flag mandating that we do so.
39897 (propagate_controlled_uses): Likewise. Only decrement refdesc
39898 counters when the pass_through jump function allows it.
39899 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
39900 parameter of find_reference.
39901 (ipa_write_jump_function): Assert the new flag does not have to be
39903 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
39906 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
39907 Di Zhao <di.zhao@amperecomputing.com>
39909 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
39910 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
39911 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
39912 Check for the above tuning option when processing loads.
39914 2023-04-17 Richard Biener <rguenther@suse.de>
39916 PR tree-optimization/109524
39917 * tree-vrp.cc (remove_unreachable::m_list): Change to a
39918 vector of pairs of block indices.
39919 (remove_unreachable::maybe_register_block): Adjust.
39920 (remove_unreachable::remove_and_update_globals): Likewise.
39921 Deal with removed blocks.
39923 2023-04-16 Jeff Law <jlaw@ventanamicro>
39926 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
39927 TARGET_SFB_ALU, force the true arm into a register.
39929 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
39932 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
39933 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
39935 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
39936 (pa_function_arg_size): Change return type to int. Return zero
39937 for arguments larger than 1 GB. Update comments.
39939 2023-04-15 Jakub Jelinek <jakub@redhat.com>
39941 PR tree-optimization/109154
39942 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
39943 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
39945 2023-04-15 Jason Merrill <jason@redhat.com>
39948 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
39949 Overhaul lhs_ref.ref analysis.
39951 2023-04-14 Richard Biener <rguenther@suse.de>
39953 PR tree-optimization/109502
39954 * tree-vect-stmts.cc (vectorizable_assignment): Fix
39955 check for conversion between mask and non-mask types.
39957 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
39958 Jakub Jelinek <jakub@redhat.com>
39962 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
39963 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
39964 smaller than word_mode.
39965 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
39966 <case AND>: Likewise.
39968 2023-04-14 Jakub Jelinek <jakub@redhat.com>
39970 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
39973 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
39975 PR tree-optimization/108139
39976 PR tree-optimization/109462
39977 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
39978 equivalency check for PHI nodes.
39979 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
39980 does not dominate single-arg equivalency edges.
39982 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
39985 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
39986 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
39988 2023-04-13 Richard Biener <rguenther@suse.de>
39990 PR tree-optimization/109491
39991 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
39992 NULL operands test.
39994 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39997 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
39998 (vint16mf4_t): Ditto.
39999 (vint32mf2_t): Ditto.
40000 (vint64m1_t): Ditto.
40001 (vint64m2_t): Ditto.
40002 (vint64m4_t): Ditto.
40003 (vint64m8_t): Ditto.
40004 (vuint8mf8_t): Ditto.
40005 (vuint16mf4_t): Ditto.
40006 (vuint32mf2_t): Ditto.
40007 (vuint64m1_t): Ditto.
40008 (vuint64m2_t): Ditto.
40009 (vuint64m4_t): Ditto.
40010 (vuint64m8_t): Ditto.
40011 (vfloat32mf2_t): Ditto.
40012 (vbool64_t): Ditto.
40013 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
40014 (register_vector_type): Ditto.
40015 (check_required_extensions): Fix condition.
40016 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
40017 (RVV_REQUIRE_ELEN_64): New define.
40018 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
40019 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
40020 (TARGET_VECTOR_FP64): Ditto.
40021 (ENTRY): Fix predicate.
40022 * config/riscv/vector-iterators.md: Fix predicate.
40024 2023-04-12 Jakub Jelinek <jakub@redhat.com>
40026 PR tree-optimization/109410
40027 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
40028 block if first statement of the function is a call to returns_twice
40031 2023-04-12 Jakub Jelinek <jakub@redhat.com>
40034 * config/i386/i386.cc: Include rtl-error.h.
40035 (ix86_print_operand): For z modifier warning, use warning_for_asm
40036 if this_is_asm_operands. For Z modifier errors, use %c and code
40037 instead of hardcoded Z.
40039 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
40041 * config/i386/x-mingw32-utf8: Remove extrataneous $@
40043 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
40045 PR tree-optimization/109462
40046 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
40047 check for equivalences if NAME is a phi node.
40049 2023-04-12 Richard Biener <rguenther@suse.de>
40051 PR tree-optimization/109473
40052 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
40053 Convert scalar result to the computation type before performing
40054 the reduction adjustment.
40056 2023-04-12 Richard Biener <rguenther@suse.de>
40058 PR tree-optimization/109469
40059 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
40060 a returns-twice call.
40062 2023-04-12 Richard Biener <rguenther@suse.de>
40064 PR tree-optimization/109434
40065 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
40066 handle possibly throwing calls when processing the LHS
40067 and may-defs are not OK.
40069 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
40071 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
40072 predicate to avoid splitting arith constants.
40074 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
40075 Pan Li <pan2.li@intel.com>
40076 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40077 Kito Cheng <kito.cheng@sifive.com>
40080 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
40081 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
40082 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
40083 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
40084 (riscv_zero_call_used_regs): New.
40085 (TARGET_ZERO_CALL_USED_REGS): New.
40087 2023-04-11 Martin Liska <mliska@suse.cz>
40090 * opts.cc (finish_options): Drop also
40091 x_flag_var_tracking_assignments.
40093 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
40095 PR tree-optimization/108888
40096 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
40098 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
40101 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
40102 (vsx_sign_extend_v16qi_<mode>): ... this.
40103 (vsx_sign_extend_hi_<mode>): Rename to...
40104 (vsx_sign_extend_v8hi_<mode>): ... this.
40105 (vsx_sign_extend_si_v2di): Rename to...
40106 (vsx_sign_extend_v4si_v2di): ... this.
40107 (vsignextend_qi_<mode>): Remove.
40108 (vsignextend_hi_<mode>): Remove.
40109 (vsignextend_si_v2di): Remove.
40110 (vsignextend_v2di_v1ti): Remove.
40111 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
40112 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
40113 with gen_vsx_sign_extend_v16qi_v4si.
40114 * config/rs6000/rs6000.md (split for DI constant generation):
40115 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
40116 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
40117 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
40118 with gen_vsx_sign_extend_v16qi_si.
40119 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
40120 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
40121 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
40122 vsx_sign_extend_v16qi_v4si.
40123 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
40124 vsx_sign_extend_v8hi_v2di.
40125 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
40126 vsx_sign_extend_v8hi_v4si.
40127 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
40128 vsx_sign_extend_si_v2di.
40129 (__builtin_altivec_vsignext): Set bif-pattern to
40130 vsx_sign_extend_v2di_v1ti.
40131 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
40132 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
40133 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
40134 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
40136 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
40139 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
40140 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
40142 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
40144 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
40146 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
40148 * common/config/i386/cpuinfo.h (get_available_features):
40149 Detect AMX-COMPLEX.
40150 * common/config/i386/i386-common.cc
40151 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
40152 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
40153 (ix86_handle_option): Handle -mamx-complex.
40154 * common/config/i386/i386-cpuinfo.h (enum processor_features):
40155 Add FEATURE_AMX_COMPLEX.
40156 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
40158 * config.gcc: Add amxcomplexintrin.h.
40159 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
40160 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
40162 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
40163 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
40164 Handle amx-complex.
40165 * config/i386/i386.opt: Add option -mamx-complex.
40166 * config/i386/immintrin.h: Include amxcomplexintrin.h.
40167 * doc/extend.texi: Document amx-complex.
40168 * doc/invoke.texi: Document -mamx-complex.
40169 * doc/sourcebuild.texi: Document target amx-complex.
40170 * config/i386/amxcomplexintrin.h: New file.
40172 2023-04-08 Jakub Jelinek <jakub@redhat.com>
40174 PR tree-optimization/109392
40175 * tree-vect-generic.cc (tree_vec_extract): Handle failure
40176 of maybe_push_res_to_seq better.
40178 2023-04-08 Jakub Jelinek <jakub@redhat.com>
40180 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
40182 (SYSTEM_H): Depend on $(HASHTAB_H).
40183 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
40184 dependency on $(RTL_BASE_H), remove redundant dependency on
40187 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
40190 * config/arm/arm.cc (arm_effective_regno): New function.
40191 (mve_vector_mem_operand): Use it.
40193 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
40195 PR tree-optimization/109417
40196 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
40197 dependency is in SSA_NAME_FREE_LIST.
40199 2023-04-06 Andrew Pinski <apinski@marvell.com>
40201 PR tree-optimization/109427
40202 * params.opt (-param=vect-induction-float=):
40203 Fix option attribute typo for IntegerRange.
40205 2023-04-05 Jeff Law <jlaw@ventanamicro>
40208 * combine.cc (combine_instructions): Force re-recognition when
40209 after restoring the body of an insn to its original form.
40211 2023-04-05 Martin Jambor <mjambor@suse.cz>
40214 * ipa-sra.cc (zap_useless_ipcp_results): New function.
40215 (process_isra_node_results): Call it.
40217 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40219 * config/riscv/vector.md: Fix incorrect operand order.
40221 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40223 * config/riscv/riscv-vsetvl.cc
40224 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
40227 2023-04-05 Li Xu <xuli1@eswincomputing.com>
40229 * config/riscv/riscv-vector-builtins.def: Fix typo.
40230 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
40231 * config/riscv/vector-iterators.md: Ditto.
40233 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
40235 * doc/md.texi (Including Patterns): Fix page break.
40237 2023-04-04 Jakub Jelinek <jakub@redhat.com>
40239 PR tree-optimization/109386
40240 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
40241 foperator_le::op1_range, foperator_le::op2_range,
40242 foperator_gt::op1_range, foperator_gt::op2_range,
40243 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
40244 BRS_FALSE case even if the other op is maybe_isnan, not just
40246 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
40247 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
40248 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
40249 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
40250 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
40251 not just known_isnan.
40253 2023-04-04 Marek Polacek <polacek@redhat.com>
40255 PR sanitizer/109107
40256 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
40258 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
40260 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
40262 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
40263 (mve_vcreateq_f<mode>): Swap operands.
40265 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
40267 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
40269 2023-04-04 Jakub Jelinek <jakub@redhat.com>
40272 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
40273 Reword diagnostics about zfinx conflict with f, formatting fixes.
40275 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
40277 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
40279 2023-04-04 Richard Biener <rguenther@suse.de>
40281 PR tree-optimization/109304
40282 * tree-profile.cc (tree_profiling): Use symtab node
40283 availability to decide whether to skip adjusting calls.
40284 Do not adjust calls to internal functions.
40286 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
40289 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
40290 function for permutation control vector by considering big endianness.
40292 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
40295 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
40296 (rs6000_vprtyb<mode>2): ... this.
40297 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
40298 rs6000_vprtybv2di2.
40299 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
40300 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
40301 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
40302 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
40304 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
40305 Sandra Loosemore <sandra@codesourcery.com>
40307 * doc/md.texi (Insn Splitting): Tweak wording for readability.
40309 2023-04-03 Martin Jambor <mjambor@suse.cz>
40312 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
40313 offset + size will be representable in unsigned int.
40315 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
40317 * configure.ac (ZSTD_LIB): Move before zstd.h check.
40318 Unset gcc_cv_header_zstd_h without libzstd.
40319 * configure: Regenerate.
40321 2023-04-03 Martin Liska <mliska@suse.cz>
40323 * doc/invoke.texi: Document new param.
40325 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
40327 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
40328 new check_effective_target function.
40330 2023-04-03 Li Xu <xuli1@eswincomputing.com>
40332 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
40333 (vfloat32m8_t): Likewise
40335 2023-04-03 liuhongt <hongtao.liu@intel.com>
40337 * doc/md.texi: Document signbitm2.
40339 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40340 kito-cheng <kito.cheng@sifive.com>
40342 * config/riscv/vector.md: Fix RA constraint.
40344 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
40346 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
40347 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
40348 * config/riscv/vector.md: Fix scalar move bug.
40350 2023-04-01 Jakub Jelinek <jakub@redhat.com>
40352 * range-op-float.cc (foperator_equal::fold_range): If at least
40353 one of the op ranges is not singleton and neither is NaN and all
40354 4 bounds are zero, return [1, 1].
40355 (foperator_not_equal::fold_range): In the same case return [0, 0].
40357 2023-04-01 Jakub Jelinek <jakub@redhat.com>
40359 * range-op-float.cc (foperator_equal::fold_range): Perform the
40360 non-singleton handling regardless of maybe_isnan (op1, op2).
40361 (foperator_not_equal::fold_range): Likewise.
40362 (foperator_lt::fold_range, foperator_le::fold_range,
40363 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
40364 real_* comparison check which results in range_false (type)
40365 even if maybe_isnan (op1, op2). Simplify.
40366 (foperator_ltgt): New class.
40367 (fop_ltgt): New variable.
40368 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
40371 2023-04-01 Jakub Jelinek <jakub@redhat.com>
40374 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
40375 returns VOIDmode, handle it like if the register isn't used for
40376 passing arguments at all.
40377 (apply_result_size): If targetm.calls.get_raw_result_mode returns
40378 VOIDmode, handle it like if the register isn't used for returning
40380 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
40381 means to return VOIDmode.
40382 * doc/tm.texi: Regenerated.
40383 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
40384 TARGET_SVE for P0_REGNUM.
40385 (aarch64_function_arg_regno_p): Also return true for p0-p3.
40386 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
40388 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
40390 * lra-constraints.cc: (combine_reload_insn): New function.
40392 2023-03-31 Jakub Jelinek <jakub@redhat.com>
40394 PR tree-optimization/91645
40395 * range-op-float.cc (foperator_unordered_lt::fold_range,
40396 foperator_unordered_le::fold_range,
40397 foperator_unordered_gt::fold_range,
40398 foperator_unordered_ge::fold_range,
40399 foperator_unordered_equal::fold_range): Call the ordered
40400 fold_range on ranges with cleared NaNs.
40401 * value-query.cc (range_query::get_tree_range): Handle also
40402 COMPARISON_CLASS_P trees.
40404 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
40405 Andrew Pinski <pinskia@gmail.com>
40408 * config/riscv/t-riscv: Add missing dependencies.
40410 2023-03-31 liuhongt <hongtao.liu@intel.com>
40412 * config/i386/i386.cc (inline_memory_move_cost): Return 100
40413 for MASK_REGS when MODE_SIZE > 8.
40415 2023-03-31 liuhongt <hongtao.liu@intel.com>
40418 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
40419 ufloat/ufix to floatuns/fixuns.
40420 * config/i386/i386-expand.cc
40421 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
40422 * config/i386/sse.md
40423 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
40425 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
40426 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
40428 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
40430 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
40432 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
40433 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
40434 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
40435 (ufloatv2siv2df2<mask_name>): Renamed to ..
40436 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
40437 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
40439 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
40441 (ufix_notruncv2dfv2si2): Renamed to ..
40442 (fixuns_notruncv2dfv2si2):.. this.
40443 (ufix_notruncv2dfv2si2_mask): Renamed to ..
40444 (fixuns_notruncv2dfv2si2_mask): .. this.
40445 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
40446 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
40447 (ufix_truncv2dfv2si2): Renamed to ..
40448 (*fixuns_truncv2dfv2si2): .. this.
40449 (ufix_truncv2dfv2si2_mask): Renamed to ..
40450 (fixuns_truncv2dfv2si2_mask): .. this.
40451 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
40452 (*fixuns_truncv2dfv2si2_mask_1): .. this.
40453 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
40454 (fixuns_truncv4dfv4si2<mask_name>): .. this.
40455 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
40457 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
40459 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
40460 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
40463 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
40465 PR tree-optimization/109154
40466 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
40467 * gimple-range-gori.h (may_recompute_p): Add depth param.
40468 * params.opt (ranger-recompute-depth): New param.
40470 2023-03-30 Jason Merrill <jason@redhat.com>
40474 * cgraph.h: Move reset() from cgraph_node to symtab_node.
40475 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
40476 remove_from_same_comdat_group.
40478 2023-03-30 Richard Biener <rguenther@suse.de>
40480 PR tree-optimization/107561
40481 * gimple-ssa-warn-access.cc (get_size_range): Add flags
40482 argument and pass it on.
40483 (check_access): When querying for the size range pass
40484 SR_ALLOW_ZERO when the known destination size is zero.
40486 2023-03-30 Richard Biener <rguenther@suse.de>
40488 PR tree-optimization/109342
40489 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
40490 overload for edge. When that edge is a backedge use
40491 dominated_by_p directly.
40493 2023-03-30 liuhongt <hongtao.liu@intel.com>
40495 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
40496 vpblendd instead of vpblendw for V4SI under avx2.
40498 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
40500 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
40501 for many quick operands, for register-sized modes.
40503 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
40505 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
40508 2023-03-29 Martin Liska <mliska@suse.cz>
40510 PR bootstrap/109310
40511 * configure.ac: Emit a warning for deprecated option
40512 --enable-link-mutex.
40513 * configure: Regenerate.
40515 2023-03-29 Richard Biener <rguenther@suse.de>
40517 PR tree-optimization/109331
40518 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
40519 discover a taken edge make sure to cleanup the CFG.
40521 2023-03-29 Richard Biener <rguenther@suse.de>
40523 PR tree-optimization/109327
40524 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
40525 already removed stmts when draining to_remove.
40527 2023-03-29 Richard Biener <rguenther@suse.de>
40530 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
40531 so we can re-create the DIE for the type if required.
40533 2023-03-29 Jakub Jelinek <jakub@redhat.com>
40534 Richard Biener <rguenther@suse.de>
40536 PR tree-optimization/109301
40537 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
40538 properties_provided from PROP_gimple_opt_math to 0.
40539 (pass_data_expand_powcabs): Change properties_provided from 0 to
40540 PROP_gimple_opt_math.
40542 2023-03-29 Richard Biener <rguenther@suse.de>
40544 PR tree-optimization/109154
40545 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
40546 inverted condition specially by inverting at the caller.
40547 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
40549 2023-03-28 David Malcolm <dmalcolm@redhat.com>
40552 * diagnostic-show-locus.cc (column_range::column_range): Factor
40553 out assertion conditional into...
40554 (column_range::valid_p): ...this new function.
40555 (line_corrections::add_hint): Don't attempt to consolidate hints
40556 if it would lead to invalid column_range instances.
40558 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
40561 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
40562 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
40565 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
40567 PR rtl-optimization/109187
40568 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
40569 subtraction in three-way comparison.
40571 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
40573 PR tree-optimization/109265
40574 PR tree-optimization/109274
40575 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
40576 not create a relation record is op1 and op2 are the same symbol.
40577 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
40578 handler for this stmt, but create a new record only if this statement
40579 generates a relation based on the ranges.
40580 (gori_compute::compute_operand2_range): Ditto.
40581 * value-relation.h (value_relation::set_relation): Always create the
40582 record that is requested.
40584 2023-03-28 Richard Biener <rguenther@suse.de>
40586 PR tree-optimization/107087
40587 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
40588 executable regions to avoid useless work and to better
40589 propagate degenerate PHIs.
40591 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
40593 * config/i386/x-mingw32-utf8: update comments.
40595 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
40598 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
40599 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
40601 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
40603 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
40604 after inlining. Record which decls are loaded from. Fix handling
40605 of vops for loads and stores.
40606 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
40607 (aarch64_accesses_vector_load_decl_p): Likewise.
40608 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
40610 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
40611 that loads from a decl, treat vector stores to those decls as
40613 (aarch64_vector_costs::finish_cost): ...and in that case,
40614 if the vector code does nothing more than a store, give the
40615 prologue a zero cost as well.
40617 2023-03-28 Richard Biener <rguenther@suse.de>
40620 PR tree-optimization/108129
40621 * genmatch.cc (lower_for): For (match ...) delay
40622 substituting into the match operator if possible.
40623 (dt_operand::gen_gimple_expr): For user_id look at the
40624 first substitute for determining how to access operands.
40625 (dt_operand::gen_generic_expr): Likewise.
40626 (dt_node::gen_kids): Properly sort user_ids according
40627 to their substitutes.
40628 (dt_node::gen_kids_1): Code-generate user_id matching.
40630 2023-03-28 Jakub Jelinek <jakub@redhat.com>
40631 Jonathan Wakely <jwakely@redhat.com>
40633 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
40634 Use subcommand rather than sub-command in function comments.
40636 2023-03-28 Jakub Jelinek <jakub@redhat.com>
40638 PR tree-optimization/109154
40639 * value-range.h (frange::flush_denormals_to_zero): Make it public
40640 rather than private.
40641 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
40643 * range-op-float.cc (range_operator_float::fold_range): Call
40644 flush_denormals_to_zero.
40646 2023-03-28 Jakub Jelinek <jakub@redhat.com>
40648 PR middle-end/106190
40649 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
40650 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
40652 2023-03-28 Jakub Jelinek <jakub@redhat.com>
40654 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
40655 as 4th argument to set to avoid clear_nan and union_ calls.
40657 2023-03-28 Jakub Jelinek <jakub@redhat.com>
40660 * config/i386/i386.cc (assign_386_stack_local): For DImode
40661 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
40662 align 32 rather than 0 to assign_stack_local.
40664 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
40667 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
40668 on operand #3 to get the final condition code. Use std::swap.
40669 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
40670 (fucmp<gcond:code>8<P:mode>_vis): Move around.
40671 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
40672 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
40674 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
40676 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
40677 top-level sections.
40679 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
40681 * config.host: Pull in i386/x-mingw32-utf8 Makefile
40682 fragment and reference utf8rc-mingw32.o explicitly
40684 * config/i386/sym-mingw32.cc: prevent name mangling of
40686 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
40687 depend on manifest file explicitly.
40689 2023-03-28 Richard Biener <rguenther@suse.de>
40692 2023-03-27 Richard Biener <rguenther@suse.de>
40694 PR rtl-optimization/109237
40695 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
40697 2023-03-28 Richard Biener <rguenther@suse.de>
40699 * common.opt (gdwarf): Remove Negative(gdwarf-).
40701 2023-03-28 Richard Biener <rguenther@suse.de>
40703 * common.opt (gdwarf): Add RejectNegative.
40704 (gdwarf-): Likewise.
40708 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
40710 * config/cris/constraints.md ("T"): Correct to
40711 define_memory_constraint.
40713 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
40715 * config/cris/cris.md (BW2): New mode-iterator.
40716 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
40719 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
40721 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
40722 for possible eliminable compares.
40724 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
40726 * config/cris/constraints.md ("R"): Remove unused constraint.
40728 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
40730 PR gcov-profile/109297
40731 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
40732 (merge_stream_usage): Likewise.
40733 (overlap_usage): Likewise.
40735 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
40738 * config/riscv/thead.md: Add missing mode specifiers.
40740 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
40741 Jiangning Liu <jiangning.liu@amperecomputing.com>
40742 Manolis Tsamis <manolis.tsamis@vrull.eu>
40744 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
40746 2023-03-27 Richard Biener <rguenther@suse.de>
40748 PR rtl-optimization/109237
40749 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
40751 2023-03-27 Richard Biener <rguenther@suse.de>
40754 * lto-wrapper.cc (run_gcc): Parse alternate debug options
40755 as well, they always enable debug.
40757 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
40760 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
40762 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
40764 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
40767 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
40768 than zero when calling vec_sld.
40769 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
40770 zero when calling vec_sld.
40771 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
40772 than zero when calling vec_sld.
40774 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
40776 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
40777 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
40778 loops are represented and which fields are vectors. Add
40779 documentation for OMP_FOR_PRE_BODY field. Document internal
40780 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
40781 * tree.def (OMP_FOR): Make documentation consistent with the
40782 Texinfo manual, to fill some gaps and correct errors.
40784 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
40787 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
40788 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
40789 (handle_move_double): Call it before handle_movsi.
40790 * config/m68k/m68k-protos.h: Declare it.
40792 2023-03-26 Jakub Jelinek <jakub@redhat.com>
40794 PR tree-optimization/109230
40795 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
40797 2023-03-26 Jakub Jelinek <jakub@redhat.com>
40800 * predict.cc (compute_function_frequency): Don't call
40801 warn_function_cold if function already has cold attribute.
40803 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
40805 * doc/install.texi: Remove anachronistic note
40806 related to languages built and separate source tarballs.
40808 2023-03-25 David Malcolm <dmalcolm@redhat.com>
40811 * diagnostic-format-sarif.cc (read_until_eof): Delete.
40812 (maybe_read_file): Delete.
40813 (sarif_builder::maybe_make_artifact_content_object): Use
40814 get_source_file_content rather than maybe_read_file.
40815 Reject it if it's not valid UTF-8.
40816 * input.cc (file_cache_slot::get_full_file_content): New.
40817 (get_source_file_content): New.
40818 (selftest::check_cpp_valid_utf8_p): New.
40819 (selftest::test_cpp_valid_utf8_p): New.
40820 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
40821 * input.h (get_source_file_content): New prototype.
40823 2023-03-24 David Malcolm <dmalcolm@redhat.com>
40825 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
40827 (Special Functions for Debugging the Analyzer): Convert to a
40828 table, and rewrite in places.
40829 (Other Debugging Techniques): Add notes on how to compare two
40830 different exploded graphs.
40832 2023-03-24 David Malcolm <dmalcolm@redhat.com>
40835 * json.cc: Update comments to indicate that we now preserve
40836 insertion order of keys within objects.
40837 (object::print): Traverse keys in insertion order.
40838 (object::set): Preserve insertion order of keys.
40839 (selftest::test_writing_objects): Add an additional key to verify
40840 that we preserve insertion order.
40841 * json.h (object::m_keys): New field.
40843 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
40845 PR tree-optimization/109238
40846 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
40847 predecessors which this block dominates.
40849 2023-03-24 Richard Biener <rguenther@suse.de>
40851 PR tree-optimization/106912
40852 * tree-profile.cc (tree_profiling): Update stmts only when
40853 profiling or testing coverage. Make sure to update calls
40854 fntype, stripping 'const' there.
40856 2023-03-24 Jakub Jelinek <jakub@redhat.com>
40858 PR middle-end/109258
40859 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
40860 if target == const0_rtx.
40862 2023-03-24 Alexandre Oliva <oliva@adacore.com>
40864 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
40865 Document options and effective targets.
40867 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
40869 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
40872 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
40874 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
40875 non-earlyclobber alternative.
40877 2023-03-23 Andrew Pinski <apinski@marvell.com>
40880 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
40883 2023-03-23 Richard Biener <rguenther@suse.de>
40885 PR tree-optimization/107569
40886 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
40887 Do not push SSA names with zero uses as available leader.
40888 (process_bb): Likewise.
40890 2023-03-23 Richard Biener <rguenther@suse.de>
40892 PR tree-optimization/109262
40893 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
40894 combining a piecewise complex load avoid touching loads
40895 that throw internally. Use fun, not cfun throughout.
40897 2023-03-23 Jakub Jelinek <jakub@redhat.com>
40899 * value-range.cc (irange::irange_union, irange::intersect): Fix
40900 comment spelling bugs.
40901 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
40902 * gimple-range-trace.h: Likewise.
40903 * gimple-range-edge.cc: Likewise.
40904 (gimple_outgoing_range_stmt_p,
40905 gimple_outgoing_range::switch_edge_range,
40906 gimple_outgoing_range::edge_range_p): Likewise.
40907 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
40908 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
40909 assume_query::assume_query, assume_query::calculate_phi): Likewise.
40910 * gimple-range-edge.h: Likewise.
40911 * value-range.h (Value_Range::set, Value_Range::lower_bound,
40912 Value_Range::upper_bound, frange::set_undefined): Likewise.
40913 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
40914 gori_compute): Likewise.
40915 * gimple-range-fold.h (fold_using_range): Likewise.
40916 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
40918 * gimple-range-gori.cc (range_def_chain::in_chain_p,
40919 range_def_chain::dump, gori_map::calculate_gori,
40920 gori_compute::compute_operand_range_switch,
40921 gori_compute::logical_combine, gori_compute::refine_using_relation,
40922 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
40924 * gimple-range.h: Likewise.
40925 (enable_ranger): Likewise.
40926 * range-op.h (empty_range_varying): Likewise.
40927 * value-query.h (value_query): Likewise.
40928 * gimple-range-cache.cc (block_range_cache::set_bb_range,
40929 block_range_cache::dump, ssa_global_cache::clear_global_range,
40930 temporal_cache::temporal_value, temporal_cache::current_p,
40931 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
40932 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
40934 * gimple-range-fold.cc (fur_edge::get_phi_operand,
40935 fur_stmt::get_operand, gimple_range_adjustment,
40936 fold_using_range::range_of_phi,
40937 fold_using_range::relation_fold_and_or): Likewise.
40938 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
40939 * value-query.cc (range_query::value_of_expr,
40940 range_query::value_on_edge, range_query::query_relation): Likewise.
40941 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
40942 intersect_range_with_nonzero_bits): Likewise.
40943 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
40944 exit_range): Likewise.
40945 * value-relation.h: Likewise.
40946 (equiv_oracle, relation_trio::relation_trio, value_relation,
40947 value_relation::value_relation, pe_min): Likewise.
40948 * range-op-float.cc (range_operator_float::rv_fold,
40949 frange_arithmetic, foperator_unordered_equal::op1_range,
40950 foperator_div::rv_fold): Likewise.
40951 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
40952 * value-relation.cc (equiv_oracle::query_relation,
40953 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
40954 value_relation::apply_transitive, relation_chain_head::find_relation,
40955 dom_oracle::query_relation, dom_oracle::find_relation_block,
40956 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
40957 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
40958 create_possibly_reversed_range, adjust_op1_for_overflow,
40959 operator_mult::wi_fold, operator_exact_divide::op1_range,
40960 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
40961 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
40962 range_op_lshift_tests): Likewise.
40964 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
40966 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
40967 (move_callee_saved_registers): Detect the bug condition early.
40969 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
40971 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
40972 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
40974 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
40975 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
40976 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
40977 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
40978 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
40980 2023-03-23 Jakub Jelinek <jakub@redhat.com>
40982 PR tree-optimization/109176
40983 * tree-vect-generic.cc (expand_vector_condition): If a has
40984 vector boolean type and is a comparison, also check if both
40985 the comparison and VEC_COND_EXPR could be successfully expanded
40988 2023-03-23 Pan Li <pan2.li@intel.com>
40989 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40993 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
40994 for vector mask modes.
40995 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
40996 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
40998 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
41000 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
41002 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41005 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
41006 (emit_vlmax_op): Ditto.
41007 * config/riscv/riscv-v.cc (get_sew): New function.
41008 (emit_vlmax_vsetvl): Adapt function.
41009 (emit_pred_op): Ditto.
41010 (emit_vlmax_op): Ditto.
41011 (emit_nonvlmax_op): Ditto.
41012 (legitimize_move): Fix LRA ICE.
41013 (gen_no_side_effects_vsetvl_rtx): Adapt function.
41014 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
41015 (@mov<VB:mode><P:mode>_lra): Ditto.
41016 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
41017 (*mov<VB:mode><P:mode>_lra): Ditto.
41019 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41022 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
41023 __riscv_vlenb support.
41025 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41026 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
41027 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
41029 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41030 * config/riscv/riscv-vector-builtins.cc: Ditto.
41032 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41033 kito-cheng <kito.cheng@sifive.com>
41035 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
41036 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
41037 (pass_vsetvl::need_vsetvl): Fix bugs.
41038 (pass_vsetvl::backward_demand_fusion): Fix bugs.
41039 (pass_vsetvl::demand_fusion): Fix bugs.
41040 (eliminate_insn): Fix bugs.
41041 (insert_vsetvl): Ditto.
41042 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
41043 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
41044 * config/riscv/vector.md: Ditto.
41046 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41047 kito-cheng <kito.cheng@sifive.com>
41049 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
41050 * config/riscv/vector-iterators.md (nmsac): Ditto.
41056 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
41057 (@pred_mul_plus<mode>): Ditto.
41058 (*pred_madd<mode>): Ditto.
41059 (*pred_macc<mode>): Ditto.
41060 (*pred_mul_plus<mode>): Ditto.
41061 (@pred_mul_plus<mode>_scalar): Ditto.
41062 (*pred_madd<mode>_scalar): Ditto.
41063 (*pred_macc<mode>_scalar): Ditto.
41064 (*pred_mul_plus<mode>_scalar): Ditto.
41065 (*pred_madd<mode>_extended_scalar): Ditto.
41066 (*pred_macc<mode>_extended_scalar): Ditto.
41067 (*pred_mul_plus<mode>_extended_scalar): Ditto.
41068 (@pred_minus_mul<mode>): Ditto.
41069 (*pred_<madd_nmsub><mode>): Ditto.
41070 (*pred_nmsub<mode>): Ditto.
41071 (*pred_<macc_nmsac><mode>): Ditto.
41072 (*pred_nmsac<mode>): Ditto.
41073 (*pred_mul_<optab><mode>): Ditto.
41074 (*pred_minus_mul<mode>): Ditto.
41075 (@pred_mul_<optab><mode>_scalar): Ditto.
41076 (@pred_minus_mul<mode>_scalar): Ditto.
41077 (*pred_<madd_nmsub><mode>_scalar): Ditto.
41078 (*pred_nmsub<mode>_scalar): Ditto.
41079 (*pred_<macc_nmsac><mode>_scalar): Ditto.
41080 (*pred_nmsac<mode>_scalar): Ditto.
41081 (*pred_mul_<optab><mode>_scalar): Ditto.
41082 (*pred_minus_mul<mode>_scalar): Ditto.
41083 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
41084 (*pred_nmsub<mode>_extended_scalar): Ditto.
41085 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
41086 (*pred_nmsac<mode>_extended_scalar): Ditto.
41087 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
41088 (*pred_minus_mul<mode>_extended_scalar): Ditto.
41089 (*pred_<madd_msub><mode>): Ditto.
41090 (*pred_<macc_msac><mode>): Ditto.
41091 (*pred_<madd_msub><mode>_scalar): Ditto.
41092 (*pred_<macc_msac><mode>_scalar): Ditto.
41093 (@pred_neg_mul_<optab><mode>): Ditto.
41094 (@pred_mul_neg_<optab><mode>): Ditto.
41095 (*pred_<nmadd_msub><mode>): Ditto.
41096 (*pred_<nmsub_nmadd><mode>): Ditto.
41097 (*pred_<nmacc_msac><mode>): Ditto.
41098 (*pred_<nmsac_nmacc><mode>): Ditto.
41099 (*pred_neg_mul_<optab><mode>): Ditto.
41100 (*pred_mul_neg_<optab><mode>): Ditto.
41101 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
41102 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
41103 (*pred_<nmadd_msub><mode>_scalar): Ditto.
41104 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
41105 (*pred_<nmacc_msac><mode>_scalar): Ditto.
41106 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
41107 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
41108 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
41109 (@pred_widen_neg_mul_<optab><mode>): Ditto.
41110 (@pred_widen_mul_neg_<optab><mode>): Ditto.
41111 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
41112 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
41114 2023-03-23 liuhongt <hongtao.liu@intel.com>
41116 * builtins.cc (builtin_memset_read_str): Replace
41117 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
41118 (builtin_memset_gen_str): Ditto.
41119 * config/i386/i386-expand.cc
41120 (ix86_convert_const_wide_int_to_broadcast): Replace
41121 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
41122 (ix86_expand_vector_move): Ditto.
41123 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
41125 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
41126 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
41127 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
41128 * doc/tm.texi.in: Ditto.
41129 * target.def: Ditto.
41131 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
41133 * lra.cc (lra): Do not repeat inheritance and live range splitting
41134 when asm error is found.
41136 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
41138 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
41139 (gcn_expand_dpp_distribute_even_insn)
41140 (gcn_expand_dpp_distribute_odd_insn): Declare.
41141 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
41142 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
41143 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
41144 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
41145 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
41146 (fms<mode>4_negop2): New patterns.
41147 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
41148 (gcn_expand_dpp_distribute_even_insn)
41149 (gcn_expand_dpp_distribute_odd_insn): New functions.
41150 * config/gcn/gcn.md: Add entries to unspec enum.
41152 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
41154 PR tree-optimization/109008
41155 * value-range.cc (frange::set): Add nan_state argument.
41156 * value-range.h (class nan_state): New.
41157 (frange::get_nan_state): New.
41159 2023-03-22 Martin Liska <mliska@suse.cz>
41161 * configure: Regenerate.
41163 2023-03-21 Joseph Myers <joseph@codesourcery.com>
41165 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
41168 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
41170 PR tree-optimization/109192
41171 * gimple-range-gori.cc (gori_compute::compute_operand_range):
41172 Terminate gori calculations if a relation is not relevant.
41173 * value-relation.h (value_relation::set_relation): Allow
41174 equality between op1 and op2 if they are the same.
41176 2023-03-21 Richard Biener <rguenther@suse.de>
41178 PR tree-optimization/109219
41179 * tree-vect-loop.cc (vectorizable_reduction): Check
41180 slp_node, not STMT_SLP_TYPE.
41181 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
41182 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
41183 Remove assertion on STMT_SLP_TYPE.
41185 2023-03-21 Jakub Jelinek <jakub@redhat.com>
41187 PR tree-optimization/109215
41188 * tree.h (enum special_array_member): Adjust comments for int_0
41190 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
41191 has zero sized element type and the array has variable number of
41192 elements or constant one or more elements.
41193 (component_ref_size): Adjust comments, formatting fix.
41195 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41197 * configure.ac: Add check for the Texinfo 6.8
41198 CONTENTS_OUTPUT_LOCATION customization variable and set it if
41200 * configure: Regenerate.
41201 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
41202 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
41203 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
41204 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
41206 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41208 * doc/extend.texi: Associate use_hazard_barrier_return index
41209 entry with its attribute.
41210 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
41213 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41215 * doc/implement-c.texi: Remove usage of @gol.
41216 * doc/invoke.texi: Ditto.
41217 * doc/sourcebuild.texi: Ditto.
41218 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
41219 texinfo.tex versions, the bug it was working around appears to
41222 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41224 * doc/include/texinfo.tex: Update to 2023-01-17.19.
41226 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41228 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
41229 @enddefbuiltin for defining built-in functions.
41230 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
41231 places where it should be used.
41233 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41235 * doc/extend.texi (Formatted Output Function Checking): New
41236 subsection for grouping together printf et al.
41237 (Exception handling) Fix missing @ sign before copyright
41238 header, which lead to the copyright line leaking into
41239 '(gcc)Exception handling'.
41240 * doc/gcc.texi: Set document language to en_US.
41241 (@copying): Wrap front cover texts in quotations, move in manual
41244 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
41246 * doc/gcc.texi: Add the Indices appendix, to make texinfo
41247 generate nice indices overview page.
41249 2023-03-21 Richard Biener <rguenther@suse.de>
41251 PR tree-optimization/109170
41252 * gimple-range-op.cc (cfn_pass_through_arg1): New.
41253 (gimple_range_op_handler::maybe_builtin_call): Handle
41254 __builtin_expect via cfn_pass_through_arg1.
41256 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
41259 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
41260 (init_float128_ieee): Delete code to switch complex multiply and divide
41262 (complex_multiply_builtin_code): New helper function.
41263 (complex_divide_builtin_code): Likewise.
41264 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
41265 of complex 128-bit multiply and divide built-in functions.
41267 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
41270 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
41272 2023-03-19 Jonny Grant <jg@jguk.org>
41274 * doc/extend.texi (Common Function Attributes) <nonnull>:
41277 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
41279 PR rtl-optimization/109179
41280 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
41281 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
41283 2023-03-17 Jakub Jelinek <jakub@redhat.com>
41286 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
41288 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
41289 to allocate_struct_function instead of false.
41290 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
41291 nor DECL_RESULT here. Pass true as ABSTRACT_P to
41292 push_struct_function. Call targetm.target_option.relayout_function
41294 (tree_function_versioning): Formatting fix.
41296 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
41298 * lra-constraints.cc: Include hooks.h.
41299 (combine_reload_insn): New function.
41300 (lra_constraints): Call it.
41302 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41303 kito-cheng <kito.cheng@sifive.com>
41305 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
41306 as legitimate value.
41307 * config/riscv/riscv-vector-builtins.cc
41308 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
41309 (function_expander::use_widen_ternop_insn): Ditto.
41310 * config/riscv/vector.md (@vundefined<mode>): New pattern.
41311 (pred_mul_<optab><mode>_undef_merge): Remove.
41312 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
41313 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
41314 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
41315 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
41317 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41320 * config/riscv/riscv.md: Fix subreg bug.
41322 2023-03-17 Jakub Jelinek <jakub@redhat.com>
41324 PR middle-end/108685
41325 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
41326 use its loop_father rather than BODY_BB's loop_father.
41327 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
41328 If broken_loop with ordered > collapse and at least one of those
41329 extra loops aren't guaranteed to have at least one iteration, change
41330 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
41331 loop_father to l0_bb's loop_father rather than l1_bb's.
41333 2023-03-17 Jakub Jelinek <jakub@redhat.com>
41336 * gdbhooks.py (TreePrinter.to_string): Wrap
41337 gdb.parse_and_eval('tree_code_type') in a try block, parse
41338 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
41339 raises exception. Update comments for the recent tree_code_type
41342 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
41344 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
41345 issues. Add more line breaks to example so it doesn't overflow
41348 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
41350 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
41351 line breaks in examples.
41352 <malloc>: Fix bad line breaks in running text, also copy-edit
41354 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
41355 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
41357 (C++ Dialect Options) <-fcontracts>: Add line break in example.
41358 <-Wctad-maybe-unsupported>: Likewise.
41359 <-Winvalid-constexpr>: Likewise.
41360 (Warning Options) <-Wdangling-pointer>: Likewise.
41361 <-Winterference-size>: Likewise.
41362 <-Wvla-parameter>: Likewise.
41363 (Static Analyzer Options): Fix bad line breaks in running text,
41364 plus add some missing markup.
41365 (Optimize Options) <openacc-privatization>: Fix more bad line
41366 breaks in running text.
41368 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
41370 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
41371 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
41372 (expand_vec_perm_2perm_pblendv): Ditto.
41374 2023-03-16 Martin Liska <mliska@suse.cz>
41376 PR middle-end/106133
41377 * gcc.cc (driver_handle_option): Use x_main_input_basename
41378 if x_dump_base_name is null.
41379 * opts.cc (common_handle_option): Likewise.
41381 2023-03-16 Richard Biener <rguenther@suse.de>
41383 PR tree-optimization/109123
41384 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
41385 Do not emit -Wuse-after-free late.
41386 (pass_waccess::check_call): Always check call pointer uses.
41388 2023-03-16 Richard Biener <rguenther@suse.de>
41390 PR tree-optimization/109141
41391 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
41392 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
41394 (renumber_gimple_stmt_uids): ... here and
41395 (renumber_gimple_stmt_uids_in_blocks): ... here.
41396 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
41397 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
41399 (pass_waccess::check_pointer_uses): Process all PHIs.
41401 2023-03-15 David Malcolm <dmalcolm@redhat.com>
41404 * diagnostic-format-sarif.cc (class sarif_invocation): New.
41405 (class sarif_ice_notification): New.
41406 (sarif_builder::m_invocation_obj): New field.
41407 (sarif_invocation::add_notification_for_ice): New.
41408 (sarif_invocation::prepare_to_flush): New.
41409 (sarif_ice_notification::sarif_ice_notification): New.
41410 (sarif_builder::sarif_builder): Add m_invocation_obj.
41411 (sarif_builder::end_diagnostic): Special-case DK_ICE and
41413 (sarif_builder::flush_to_file): Call prepare_to_flush on
41414 m_invocation_obj. Pass the latter to make_top_level_object.
41415 (sarif_builder::make_result_object): Move creation of "locations"
41417 (sarif_builder::make_locations_arr): ...this new function.
41418 (sarif_builder::make_top_level_object): Add "invocation_obj" param
41419 and pass it to make_run_object.
41420 (sarif_builder::make_run_object): Add "invocation_obj" param and
41422 (sarif_ice_handler): New callback.
41423 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
41424 * diagnostic.cc (diagnostic_initialize): Initialize new field
41426 (diagnostic_action_after_output): If it is set, make one attempt
41427 to call ice_handler_cb.
41428 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
41430 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
41432 * config/i386/i386-expand.cc (expand_vec_perm_blend):
41433 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
41434 and fix V2HImode handling.
41435 (expand_vec_perm_1): Try to emit BLEND instruction
41436 before MOVSS/MOVSD.
41437 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
41439 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
41441 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
41443 2023-03-15 Richard Biener <rguenther@suse.de>
41445 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
41446 Do not diagnose clobbers.
41448 2023-03-15 Richard Biener <rguenther@suse.de>
41450 PR tree-optimization/109139
41451 * tree-ssa-live.cc (remove_unused_locals): Look at the
41452 base address for unused decls on the LHS of .DEFERRED_INIT.
41454 2023-03-15 Xi Ruoyao <xry111@xry111.site>
41457 * builtins.cc (inline_string_cmp): Force the character
41458 difference into "result" pseudo-register, instead of reassign
41459 the pseudo-register.
41461 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41463 * config.gcc: Add thead.o to RISC-V extra_objs.
41464 * config/riscv/peephole.md: Add mempair peephole passes.
41465 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
41467 (th_mempair_operands_p): Likewise.
41468 (th_mempair_order_operands): Likewise.
41469 (th_mempair_prepare_save_restore_operands): Likewise.
41470 (th_mempair_save_restore_regs): Likewise.
41471 (th_mempair_output_move): Likewise.
41472 * config/riscv/riscv.cc (riscv_save_reg): Move code.
41473 (riscv_restore_reg): Move code.
41474 (riscv_for_each_saved_reg): Add code to emit mempair insns.
41475 * config/riscv/t-riscv: Add thead.cc.
41476 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
41478 (*th_mempair_store_<GPR:mode>2): Likewise.
41479 (*th_mempair_load_extendsidi2): Likewise.
41480 (*th_mempair_load_zero_extendsidi2): Likewise.
41481 * config/riscv/thead.cc: New file.
41483 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41485 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
41486 New constraint "th_f_fmv".
41487 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
41489 * config/riscv/riscv.cc (riscv_split_doubleword_move):
41490 Add split code for XTheadFmv.
41491 (riscv_secondary_memory_needed): XTheadFmv does not need
41493 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
41494 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
41495 movdf_hardfloat_rv32.
41496 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
41497 (th_fmv_x_w): New INSN.
41498 (th_fmv_x_hw): New INSN.
41500 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41502 * config/riscv/riscv.md (maddhisi4): New expand.
41503 (msubhisi4): New expand.
41504 * config/riscv/thead.md (*th_mula<mode>): New pattern.
41505 (*th_mulawsi): New pattern.
41506 (*th_mulawsi2): New pattern.
41507 (*th_maddhisi4): New pattern.
41508 (*th_sextw_maddhisi4): New pattern.
41509 (*th_muls<mode>): New pattern.
41510 (*th_mulswsi): New pattern.
41511 (*th_mulswsi2): New pattern.
41512 (*th_msubhisi4): New pattern.
41513 (*th_sextw_msubhisi4): New pattern.
41515 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41517 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
41518 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
41520 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
41522 (riscv_expand_conditional_move): New function.
41523 (riscv_expand_conditional_move_onesided): New function.
41524 * config/riscv/riscv.md: Add support for XTheadCondMov.
41525 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
41526 support for XTheadCondMov.
41527 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
41529 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41531 * config/riscv/bitmanip.md (clzdi2): New expand.
41532 (clzsi2): New expand.
41533 (ctz<mode>2): New expand.
41534 (popcount<mode>2): New expand.
41535 (<bitmanip_optab>si2): Rename INSN.
41536 (*<bitmanip_optab>si2): Hide INSN name.
41537 (<bitmanip_optab>di2): Rename INSN.
41538 (*<bitmanip_optab>di2): Hide INSN name.
41539 (rotrsi3): Remove INSN.
41540 (rotr<mode>3): Add expand.
41541 (*rotrsi3): New INSN.
41542 (rotrdi3): Rename INSN.
41543 (*rotrdi3): Hide INSN name.
41544 (rotrsi3_sext): Rename INSN.
41545 (*rotrsi3_sext): Hide INSN name.
41546 (bswap<mode>2): Remove INSN.
41547 (bswapdi2): Add expand.
41548 (bswapsi2): Add expand.
41549 (*bswap<mode>2): Hide INSN name.
41550 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
41552 * config/riscv/riscv.md (extv<mode>): New expand.
41553 (extzv<mode>): New expand.
41554 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
41555 (*th_ext<mode>): New INSN.
41556 (*th_extu<mode>): New INSN.
41557 (*th_clz<mode>2): New INSN.
41558 (*th_rev<mode>2): New INSN.
41560 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41562 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
41563 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
41565 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41567 * config/riscv/riscv.md: Include thead.md
41568 * config/riscv/thead.md: New file.
41570 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41572 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
41574 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
41576 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
41577 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
41578 (MASK_XTHEADBB): New.
41579 (MASK_XTHEADBS): New.
41580 (MASK_XTHEADCMO): New.
41581 (MASK_XTHEADCONDMOV): New.
41582 (MASK_XTHEADFMEMIDX): New.
41583 (MASK_XTHEADFMV): New.
41584 (MASK_XTHEADINT): New.
41585 (MASK_XTHEADMAC): New.
41586 (MASK_XTHEADMEMIDX): New.
41587 (MASK_XTHEADMEMPAIR): New.
41588 (MASK_XTHEADSYNC): New.
41589 (TARGET_XTHEADBA): New.
41590 (TARGET_XTHEADBB): New.
41591 (TARGET_XTHEADBS): New.
41592 (TARGET_XTHEADCMO): New.
41593 (TARGET_XTHEADCONDMOV): New.
41594 (TARGET_XTHEADFMEMIDX): New.
41595 (TARGET_XTHEADFMV): New.
41596 (TARGET_XTHEADINT): New.
41597 (TARGET_XTHEADMAC): New.
41598 (TARGET_XTHEADMEMIDX): New.
41599 (TARGET_XTHEADMEMPAIR): new.
41600 (TARGET_XTHEADSYNC): New.
41601 * config/riscv/riscv.opt: Add riscv_xthead_subext.
41603 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
41606 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
41607 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
41608 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
41610 2023-03-14 Jakub Jelinek <jakub@redhat.com>
41613 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
41614 when lo is equal to dhi and hi is a MEM which uses dlo register.
41616 2023-03-14 Martin Jambor <mjambor@suse.cz>
41619 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
41620 global0 instead of zeroing when it does not have as many counts as
41623 2023-03-14 Martin Jambor <mjambor@suse.cz>
41626 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
41627 ipa count, remove assert, lenient_count_portion_handling, dump
41628 also orig_node_count.
41630 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
41632 * config/i386/i386-expand.cc (expand_vec_perm_movs):
41633 Handle V2SImode for TARGET_MMX_WITH_SSE.
41634 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
41635 using V2FI mode iterator to handle both V2SI and V2SF modes.
41637 2023-03-14 Sam James <sam@gentoo.org>
41639 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
41640 including <sstream> earlier.
41641 * system.h: Add INCLUDE_SSTREAM.
41643 2023-03-14 Richard Biener <rguenther@suse.de>
41645 * tree-ssa-live.cc (remove_unused_locals): Do not treat
41646 the .DEFERRED_INIT of a variable as use, instead remove
41647 that if it is the only use.
41649 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
41651 PR rtl-optimization/107762
41652 * expr.cc (emit_group_store): Revert latest change.
41654 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
41656 PR tree-optimization/109005
41657 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
41658 aggregate type check.
41660 2023-03-14 Jakub Jelinek <jakub@redhat.com>
41662 PR tree-optimization/109115
41663 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
41664 r.upper_bound () on r.undefined_p () range.
41666 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
41668 PR tree-optimization/106896
41669 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
41670 implementatoin with probability_in; avoid some asserts.
41672 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
41674 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
41676 2023-03-13 Sean Bright <sean@seanbright.com>
41678 * doc/invoke.texi (Warning Options): Remove errant 'See'
41681 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41683 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
41684 REG_OK_FOR_BASE_P): Remove.
41686 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41688 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
41689 (=vd,vd,vr,vr): Ditto.
41690 * config/riscv/vector.md: Ditto.
41692 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41694 * config/riscv/riscv-vector-builtins.cc
41695 (function_expander::use_compare_insn): Add operand predicate check.
41697 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41699 * config/riscv/vector.md: Fine tune RA constraints.
41701 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
41703 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
41704 hsaco assemble/link.
41706 2023-03-13 Richard Biener <rguenther@suse.de>
41708 PR tree-optimization/109046
41709 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
41710 piecewise complex loads.
41712 2023-03-12 Jakub Jelinek <jakub@redhat.com>
41714 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
41715 (aarch64_bf16_ptr_type_node): Adjust comment.
41716 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
41717 bfloat16_type_node rather than aarch64_bf16_type_node.
41718 (aarch64_libgcc_floating_mode_supported_p,
41719 aarch64_scalar_mode_supported_p): Also support BFmode.
41720 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
41721 (aarch64_invalid_binary_op): Remove BFmode related rejections.
41722 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
41723 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
41724 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
41725 aarch64_bf16_type_node.
41726 (aarch64_init_simd_builtin_types): Likewise.
41727 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
41728 which is created in tree.cc already.
41729 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
41731 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
41733 PR middle-end/109031
41734 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
41735 ensure that the type of x is as wide or wider than the type of a.
41737 2023-03-12 Tamar Christina <tamar.christina@arm.com>
41740 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
41741 (*bitmask_shift_plus<mode>): New.
41742 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
41743 (@aarch64_bitmask_udiv<mode>3): Remove.
41744 * config/aarch64/aarch64.cc
41745 (aarch64_vectorize_can_special_div_by_constant,
41746 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
41747 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
41748 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
41750 2023-03-12 Tamar Christina <tamar.christina@arm.com>
41753 * target.def (preferred_div_as_shifts_over_mult): New.
41754 * doc/tm.texi.in: Document it.
41755 * doc/tm.texi: Regenerate.
41756 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
41757 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
41758 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
41760 2023-03-12 Tamar Christina <tamar.christina@arm.com>
41761 Richard Sandiford <richard.sandiford@arm.com>
41764 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
41767 2023-03-12 Tamar Christina <tamar.christina@arm.com>
41768 Andrew MacLeod <amacleod@redhat.com>
41771 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
41772 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
41774 (gimple_range_op_handler::maybe_non_standard): New.
41775 * range-op.cc (class operator_widen_plus_signed,
41776 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
41777 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
41778 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
41779 operator_widen_mult_unsigned::wi_fold,
41780 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
41781 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
41782 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
41783 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
41785 2023-03-12 Tamar Christina <tamar.christina@arm.com>
41788 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
41789 * doc/tm.texi.in: Likewise.
41790 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
41791 * expmed.cc (expand_divmod): Likewise.
41792 * expmed.h (expand_divmod): Likewise.
41793 * expr.cc (force_operand, expand_expr_divmod): Likewise.
41794 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
41795 * target.def (can_special_div_by_const): Remove.
41796 * target.h: Remove tree-core.h include
41797 * targhooks.cc (default_can_special_div_by_const): Remove.
41798 * targhooks.h (default_can_special_div_by_const): Remove.
41799 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
41800 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
41801 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
41803 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
41805 * doc/install.texi2html: Fix issue number typo in comment.
41807 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
41809 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
41812 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
41814 * doc/invoke.texi (Optimize Options): Add markup to
41815 description of asan-kernel-mem-intrinsic-prefix, and clarify
41818 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
41820 * doc/extend.texi (Named Address Spaces): Drop a redundant link
41823 2023-03-11 Jeff Law <jlaw@ventanamicro>
41826 * doc/extend.texi: Clarify Attribute Syntax a bit.
41828 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
41830 * doc/install.texi (Prerequisites): Suggest using newer versions
41832 (Final install): Clean up and modernize discussion of how to
41833 build or obtain the GCC manuals.
41834 * doc/install.texi2html: Update comment to point to the PR instead
41835 of "makeinfo 4.7 brokenness" (it's not specific to that version).
41837 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41840 * optabs.cc (expand_fix): For conversions from BFmode to integral,
41841 use shifts to convert it to SFmode first and then convert SFmode
41844 2023-03-10 Andrew Pinski <apinski@marvell.com>
41846 * config/aarch64/aarch64.md: Add a new define_split
41849 2023-03-10 Richard Biener <rguenther@suse.de>
41851 * tree-ssa-structalias.cc (solve_graph): Immediately
41852 iterate self-cycles.
41854 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41856 PR tree-optimization/109008
41857 * range-op-float.cc (float_widen_lhs_range): If not
41858 -frounding-math and not IBM double double format, extend lhs
41859 range just by 0.5ulp rather than 1ulp in each direction.
41861 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41864 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
41866 * config/i386/t-cygwin-w64: Remove.
41868 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41871 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
41872 C++14, don't declare as extern const arrays.
41873 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
41874 static constexpr member arrays for C++11 or C++14.
41875 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
41876 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
41877 (TREE_CODE_LENGTH): For C++11 or C++14 use
41878 tree_code_length_tmpl <0>::tree_code_length instead of
41880 * tree.cc (tree_code_type, tree_code_length): Remove.
41882 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41885 * common.opt (fcanon-prefix-map): New option.
41886 * opts.cc: Include file-prefix-map.h.
41887 (flag_canon_prefix_map): New variable.
41888 (common_handle_option): Handle OPT_fcanon_prefix_map.
41889 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
41890 * file-prefix-map.h (flag_canon_prefix_map): Declare.
41891 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
41893 (add_prefix_map): Initialize canonicalize member from
41894 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
41895 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
41896 use lrealpath result only for map->canonicalize map entries.
41897 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
41898 * opts-global.cc (handle_common_deferred_options): Clear
41899 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
41900 * doc/invoke.texi (-fcanon-prefix-map): Document.
41901 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
41902 see also for -fcanon-prefix-map.
41903 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
41905 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41908 * cgraphunit.cc (check_global_declaration): Don't warn for unused
41909 variables which have OPT_Wunused_variable warning suppressed.
41911 2023-03-10 Jakub Jelinek <jakub@redhat.com>
41913 PR tree-optimization/109008
41914 * range-op-float.cc (float_widen_lhs_range): If lb is
41915 minimum representable finite number or ub is maximum
41916 representable finite number, instead of widening it to
41917 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
41918 Temporarily clear flag_finite_math_only when canonicalizing
41921 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41923 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
41924 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
41925 (gimple_fold_builtin): Ditto.
41926 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
41927 (class vleff): Ditto.
41929 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41930 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
41932 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
41933 (struct fault_load_def): Ditto.
41935 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41936 * config/riscv/riscv-vector-builtins.cc
41937 (rvv_arg_type_info::get_tree_type): Add size_ptr.
41938 (gimple_folder::gimple_folder): New class.
41939 (gimple_folder::fold): Ditto.
41940 (gimple_fold_builtin): New function.
41941 (get_read_vl_instance): Ditto.
41942 (get_read_vl_decl): Ditto.
41943 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
41944 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
41945 (get_read_vl_instance): New function.
41946 (get_read_vl_decl): Ditto.
41947 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
41948 (read_vl_insn_p): Ditto.
41949 (available_occurrence_p): Ditto.
41950 (backward_propagate_worthwhile_p): Ditto.
41951 (gen_vsetvl_pat): Adapt for vleff support.
41952 (get_forward_read_vl_insn): New function.
41953 (get_backward_fault_first_load_insn): Ditto.
41954 (source_equal_p): Adapt for vleff support.
41955 (first_ratio_invalid_for_second_sew_p): Remove.
41956 (first_ratio_invalid_for_second_lmul_p): Ditto.
41957 (first_lmul_less_than_second_lmul_p): Ditto.
41958 (first_ratio_less_than_second_ratio_p): Ditto.
41959 (support_relaxed_compatible_p): New function.
41960 (vector_insn_info::operator>): Remove.
41961 (vector_insn_info::operator>=): Refine.
41962 (vector_insn_info::parse_insn): Adapt for vleff support.
41963 (vector_insn_info::compatible_p): Ditto.
41964 (vector_insn_info::update_fault_first_load_avl): New function.
41965 (pass_vsetvl::transfer_after): Adapt for vleff support.
41966 (pass_vsetvl::demand_fusion): Ditto.
41967 (pass_vsetvl::cleanup_insns): Ditto.
41968 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
41969 redundant condtions.
41970 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
41971 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
41972 * config/riscv/riscv.md: Adapt for vleff support.
41973 * config/riscv/t-riscv: Ditto.
41974 * config/riscv/vector-iterators.md: New iterator.
41975 * config/riscv/vector.md (read_vlsi): New pattern.
41976 (read_vldi_zero_extend): Ditto.
41977 (@pred_fault_load<mode>): Ditto.
41979 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41981 * config/riscv/riscv-vector-builtins.cc
41982 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
41983 (function_expander::use_widen_ternop_insn): Ditto.
41984 * optabs.cc (maybe_gen_insn): Extend nops handling.
41986 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41988 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
41989 patterns according to RVV ISA.
41990 * config/riscv/vector-iterators.md: New iterators.
41991 * config/riscv/vector.md
41992 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
41993 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
41994 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
41995 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
41996 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
41997 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
41998 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
41999 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
42000 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
42001 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
42002 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
42003 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
42004 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
42005 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
42007 2023-03-10 Michael Collison <collison@rivosinc.com>
42009 * tree-vect-loop-manip.cc (vect_do_peeling): Use
42010 result of constant_lower_bound instead of vf for the lower
42011 bound of the epilog loop trip count.
42013 2023-03-09 Tamar Christina <tamar.christina@arm.com>
42015 * passes.cc (emergency_dump_function): Finish graph generation.
42017 2023-03-09 Tamar Christina <tamar.christina@arm.com>
42019 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
42020 and bottom bit only.
42022 2023-03-09 Andrew Pinski <apinski@marvell.com>
42024 PR tree-optimization/108980
42025 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
42026 Reorgnize the call to warning for not strict flexible arrays
42027 to be before the check of warned.
42029 2023-03-09 Jason Merrill <jason@redhat.com>
42031 * doc/extend.texi: Comment out __is_deducible docs.
42033 2023-03-09 Jason Merrill <jason@redhat.com>
42036 * doc/extend.texi (Type Traits):: Document __is_deducible.
42038 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
42041 * config.host: add object for x86_64-*-mingw*.
42042 * config/i386/sym-mingw32.cc: dummy file to attach
42044 * config/i386/utf8-mingw32.rc: windres resource file.
42045 * config/i386/winnt-utf8.manifest: XML manifest to
42047 * config/i386/x-mingw32: reference to x-mingw32-utf8.
42048 * config/i386/x-mingw32-utf8: Makefile fragment to
42049 embed UTF-8 manifest.
42051 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
42053 * lra-constraints.cc (process_alt_operands): Use operand modes for
42054 clobbered regs instead of the biggest access mode.
42056 2023-03-09 Richard Biener <rguenther@suse.de>
42058 PR middle-end/108995
42059 * fold-const.cc (extract_muldiv_1): Avoid folding
42060 (CST * b) / CST2 when sanitizing overflow and we rely on
42061 overflow being undefined.
42063 2023-03-09 Jakub Jelinek <jakub@redhat.com>
42064 Richard Biener <rguenther@suse.de>
42066 PR tree-optimization/109008
42067 * range-op-float.cc (float_widen_lhs_range): New function.
42068 (foperator_plus::op1_range, foperator_minus::op1_range,
42069 foperator_minus::op2_range, foperator_mult::op1_range,
42070 foperator_div::op1_range, foperator_div::op2_range): Use it.
42072 2023-03-07 Jonathan Grant <jg@jguk.org>
42075 * doc/invoke.texi (Instrumentation Options): Clarify
42076 LeakSanitizer behavior.
42078 2023-03-07 Benson Muite <benson_muite@emailplus.org>
42080 * doc/install.texi (Prerequisites): Add link to gmplib.org.
42082 2023-03-07 Pan Li <pan2.li@intel.com>
42083 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42087 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
42089 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
42090 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
42091 * genmodes.cc (adj_precision): New.
42092 (ADJUST_PRECISION): New.
42093 (emit_mode_adjustments): Handle ADJUST_PRECISION.
42095 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
42097 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
42099 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
42101 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
42102 {s|u}{max|min} in QI, HI and DI modes.
42103 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
42104 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
42105 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
42106 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
42109 2023-03-06 Richard Biener <rguenther@suse.de>
42111 PR tree-optimization/109025
42112 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
42113 the inner LC PHI use is the inner loop PHI latch definition
42114 before classifying an outer PHI as double reduction.
42116 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
42119 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
42121 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
42122 (X86_TUNE_USE_SCATTER): Likewise.
42124 2023-03-06 Xi Ruoyao <xry111@xry111.site>
42127 * config/loongarch/loongarch.h (FP_RETURN): Use
42128 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
42129 (UNITS_PER_FP_ARG): Likewise.
42131 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42133 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
42134 (pass_vsetvl::backward_demand_fusion): Ditto.
42136 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42137 SiYu Wu <siyu@isrc.iscas.ac.cn>
42139 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
42141 (riscv_sm3p1_<mode>): New.
42142 (riscv_sm4ed_<mode>): New.
42143 (riscv_sm4ks_<mode>): New.
42144 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
42145 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
42146 ZKSH's built-in functions.
42148 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42149 SiYu Wu <siyu@isrc.iscas.ac.cn>
42151 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
42152 (riscv_sha256sig1_<mode>): New.
42153 (riscv_sha256sum0_<mode>): New.
42154 (riscv_sha256sum1_<mode>): New.
42155 (riscv_sha512sig0h): New.
42156 (riscv_sha512sig0l): New.
42157 (riscv_sha512sig1h): New.
42158 (riscv_sha512sig1l): New.
42159 (riscv_sha512sum0r): New.
42160 (riscv_sha512sum1r): New.
42161 (riscv_sha512sig0): New.
42162 (riscv_sha512sig1): New.
42163 (riscv_sha512sum0): New.
42164 (riscv_sha512sum1): New.
42165 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
42166 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
42167 built-in functions.
42168 (DIRECT_BUILTIN): Add new.
42170 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42171 SiYu Wu <siyu@isrc.iscas.ac.cn>
42173 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
42175 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
42176 (riscv_aes32dsmi): New.
42177 (riscv_aes64ds): New.
42178 (riscv_aes64dsm): New.
42179 (riscv_aes64im): New.
42180 (riscv_aes64ks1i): New.
42181 (riscv_aes64ks2): New.
42182 (riscv_aes32esi): New.
42183 (riscv_aes32esmi): New.
42184 (riscv_aes64es): New.
42185 (riscv_aes64esm): New.
42186 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
42187 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
42188 ZKNE's built-in functions.
42190 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42191 SiYu Wu <siyu@isrc.iscas.ac.cn>
42193 * config/riscv/bitmanip.md: Add ZBKB's instructions.
42194 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
42195 * config/riscv/riscv.md: Add new type for crypto instructions.
42196 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
42198 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
42199 extension's built-in function file.
42201 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
42202 SiYu Wu <siyu@isrc.iscas.ac.cn>
42204 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
42205 (RISCV_FTYPE_NAME3): New.
42206 (RISCV_ATYPE_QI): New.
42207 (RISCV_ATYPE_HI): New.
42208 (RISCV_FTYPE_ATYPES2): New.
42209 (RISCV_FTYPE_ATYPES3): New.
42210 * config/riscv/riscv-ftypes.def (2): New.
42213 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
42215 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
42218 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42219 kito-cheng <kito.cheng@sifive.com>
42221 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
42222 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
42223 (riscv_register_pragmas): Add builtin function check call.
42224 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
42225 (check_builtin_call): New function.
42226 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
42227 (class vreinterpret): Ditto.
42228 (class vlmul_ext): Ditto.
42229 (class vlmul_trunc): Ditto.
42230 (class vset): Ditto.
42231 (class vget): Ditto.
42233 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42234 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
42250 (vundefined): Add new intrinsic.
42251 (vreinterpret): Ditto.
42252 (vlmul_ext): Ditto.
42253 (vlmul_trunc): Ditto.
42256 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
42257 (struct narrow_alu_def): Ditto.
42258 (struct reduc_alu_def): Ditto.
42259 (struct vundefined_def): Ditto.
42260 (struct misc_def): Ditto.
42261 (struct vset_def): Ditto.
42262 (struct vget_def): Ditto.
42264 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42265 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
42266 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
42267 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
42268 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
42269 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
42270 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
42271 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
42272 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
42273 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
42274 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
42275 (DEF_RVV_LMUL1_OPS): Ditto.
42276 (DEF_RVV_LMUL2_OPS): Ditto.
42277 (DEF_RVV_LMUL4_OPS): Ditto.
42278 (vint16mf4_t): Ditto.
42279 (vint16mf2_t): Ditto.
42280 (vint16m1_t): Ditto.
42281 (vint16m2_t): Ditto.
42282 (vint16m4_t): Ditto.
42283 (vint16m8_t): Ditto.
42284 (vint32mf2_t): Ditto.
42285 (vint32m1_t): Ditto.
42286 (vint32m2_t): Ditto.
42287 (vint32m4_t): Ditto.
42288 (vint32m8_t): Ditto.
42289 (vint64m1_t): Ditto.
42290 (vint64m2_t): Ditto.
42291 (vint64m4_t): Ditto.
42292 (vint64m8_t): Ditto.
42293 (vuint16mf4_t): Ditto.
42294 (vuint16mf2_t): Ditto.
42295 (vuint16m1_t): Ditto.
42296 (vuint16m2_t): Ditto.
42297 (vuint16m4_t): Ditto.
42298 (vuint16m8_t): Ditto.
42299 (vuint32mf2_t): Ditto.
42300 (vuint32m1_t): Ditto.
42301 (vuint32m2_t): Ditto.
42302 (vuint32m4_t): Ditto.
42303 (vuint32m8_t): Ditto.
42304 (vuint64m1_t): Ditto.
42305 (vuint64m2_t): Ditto.
42306 (vuint64m4_t): Ditto.
42307 (vuint64m8_t): Ditto.
42308 (vint8mf4_t): Ditto.
42309 (vint8mf2_t): Ditto.
42310 (vint8m1_t): Ditto.
42311 (vint8m2_t): Ditto.
42312 (vint8m4_t): Ditto.
42313 (vint8m8_t): Ditto.
42314 (vuint8mf4_t): Ditto.
42315 (vuint8mf2_t): Ditto.
42316 (vuint8m1_t): Ditto.
42317 (vuint8m2_t): Ditto.
42318 (vuint8m4_t): Ditto.
42319 (vuint8m8_t): Ditto.
42320 (vint8mf8_t): Ditto.
42321 (vuint8mf8_t): Ditto.
42322 (vfloat32mf2_t): Ditto.
42323 (vfloat32m1_t): Ditto.
42324 (vfloat32m2_t): Ditto.
42325 (vfloat32m4_t): Ditto.
42326 (vfloat64m1_t): Ditto.
42327 (vfloat64m2_t): Ditto.
42328 (vfloat64m4_t): Ditto.
42329 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
42330 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
42331 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
42332 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
42333 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
42334 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
42335 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
42336 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
42337 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
42338 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
42339 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
42340 (DEF_RVV_LMUL1_OPS): Ditto.
42341 (DEF_RVV_LMUL2_OPS): Ditto.
42342 (DEF_RVV_LMUL4_OPS): Ditto.
42343 (DEF_RVV_TYPE_INDEX): Ditto.
42344 (required_extensions_p): Adapt for new intrinsic support/
42345 (get_required_extensions): New function.
42346 (check_required_extensions): Ditto.
42347 (unsigned_base_type_p): Remove.
42348 (rvv_arg_type_info::get_scalar_ptr_type): New function.
42349 (get_mode_for_bitsize): Remove.
42350 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
42351 (rvv_arg_type_info::get_base_vector_type): Ditto.
42352 (rvv_arg_type_info::get_function_type_index): Ditto.
42353 (DEF_RVV_BASE_TYPE): New def.
42354 (function_builder::apply_predication): New class.
42355 (function_expander::mask_mode): Ditto.
42356 (function_checker::function_checker): Ditto.
42357 (function_checker::report_non_ice): Ditto.
42358 (function_checker::report_out_of_range): Ditto.
42359 (function_checker::require_immediate): Ditto.
42360 (function_checker::require_immediate_range): Ditto.
42361 (function_checker::check): Ditto.
42362 (check_builtin_call): Ditto.
42363 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
42364 (DEF_RVV_BASE_TYPE): Ditto.
42365 (DEF_RVV_TYPE_INDEX): Ditto.
42366 (vbool64_t): Ditto.
42367 (vbool32_t): Ditto.
42368 (vbool16_t): Ditto.
42373 (vuint8mf8_t): Ditto.
42374 (vuint8mf4_t): Ditto.
42375 (vuint8mf2_t): Ditto.
42376 (vuint8m1_t): Ditto.
42377 (vuint8m2_t): Ditto.
42378 (vint8m4_t): Ditto.
42379 (vuint8m4_t): Ditto.
42380 (vint8m8_t): Ditto.
42381 (vuint8m8_t): Ditto.
42382 (vint16mf4_t): Ditto.
42383 (vuint16mf2_t): Ditto.
42384 (vuint16m1_t): Ditto.
42385 (vuint16m2_t): Ditto.
42386 (vuint16m4_t): Ditto.
42387 (vuint16m8_t): Ditto.
42388 (vint32mf2_t): Ditto.
42389 (vuint32m1_t): Ditto.
42390 (vuint32m2_t): Ditto.
42391 (vuint32m4_t): Ditto.
42392 (vuint32m8_t): Ditto.
42393 (vuint64m1_t): Ditto.
42394 (vuint64m2_t): Ditto.
42395 (vuint64m4_t): Ditto.
42396 (vuint64m8_t): Ditto.
42397 (vfloat32mf2_t): Ditto.
42398 (vfloat32m1_t): Ditto.
42399 (vfloat32m2_t): Ditto.
42400 (vfloat32m4_t): Ditto.
42401 (vfloat32m8_t): Ditto.
42402 (vfloat64m1_t): Ditto.
42403 (vfloat64m4_t): Ditto.
42404 (vector): Move it def.
42407 (signed_vector): Ditto.
42408 (unsigned_vector): Ditto.
42409 (unsigned_scalar): Ditto.
42410 (vector_ptr): Ditto.
42411 (scalar_ptr): Ditto.
42412 (scalar_const_ptr): Ditto.
42416 (unsigned_long): Ditto.
42418 (eew8_index): Ditto.
42419 (eew16_index): Ditto.
42420 (eew32_index): Ditto.
42421 (eew64_index): Ditto.
42422 (shift_vector): Ditto.
42423 (double_trunc_vector): Ditto.
42424 (quad_trunc_vector): Ditto.
42425 (oct_trunc_vector): Ditto.
42426 (double_trunc_scalar): Ditto.
42427 (double_trunc_signed_vector): Ditto.
42428 (double_trunc_unsigned_vector): Ditto.
42429 (double_trunc_unsigned_scalar): Ditto.
42430 (double_trunc_float_vector): Ditto.
42431 (float_vector): Ditto.
42432 (lmul1_vector): Ditto.
42433 (widen_lmul1_vector): Ditto.
42434 (eew8_interpret): Ditto.
42435 (eew16_interpret): Ditto.
42436 (eew32_interpret): Ditto.
42437 (eew64_interpret): Ditto.
42438 (vlmul_ext_x2): Ditto.
42439 (vlmul_ext_x4): Ditto.
42440 (vlmul_ext_x8): Ditto.
42441 (vlmul_ext_x16): Ditto.
42442 (vlmul_ext_x32): Ditto.
42443 (vlmul_ext_x64): Ditto.
42444 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
42445 (struct function_type_info): New function.
42446 (struct rvv_arg_type_info): Ditto.
42447 (class function_checker): New class.
42448 (rvv_arg_type_info::get_scalar_type): New function.
42449 (rvv_arg_type_info::get_vector_type): Ditto.
42450 (function_expander::ret_mode): New function.
42451 (function_checker::arg_mode): Ditto.
42452 (function_checker::ret_mode): Ditto.
42453 * config/riscv/t-riscv: Add generator.
42454 * config/riscv/vector-iterators.md: New iterators.
42455 * config/riscv/vector.md (vundefined<mode>): New pattern.
42456 (@vundefined<mode>): Ditto.
42457 (@vreinterpret<mode>): Ditto.
42458 (@vlmul_extx2<mode>): Ditto.
42459 (@vlmul_extx4<mode>): Ditto.
42460 (@vlmul_extx8<mode>): Ditto.
42461 (@vlmul_extx16<mode>): Ditto.
42462 (@vlmul_extx32<mode>): Ditto.
42463 (@vlmul_extx64<mode>): Ditto.
42464 (*vlmul_extx2<mode>): Ditto.
42465 (*vlmul_extx4<mode>): Ditto.
42466 (*vlmul_extx8<mode>): Ditto.
42467 (*vlmul_extx16<mode>): Ditto.
42468 (*vlmul_extx32<mode>): Ditto.
42469 (*vlmul_extx64<mode>): Ditto.
42470 * config/riscv/genrvv-type-indexer.cc: New file.
42472 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42474 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
42475 (slide1_sew64_helper): New function.
42476 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
42477 (get_unknown_min_value): Ditto.
42478 (force_vector_length_operand): Ditto.
42479 (gen_no_side_effects_vsetvl_rtx): Ditto.
42480 (get_vl_x2_rtx): Ditto.
42481 (slide1_sew64_helper): Ditto.
42482 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
42483 (class vrgather): Ditto.
42484 (class vrgatherei16): Ditto.
42485 (class vcompress): Ditto.
42487 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42488 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
42489 (vslidedown): Ditto.
42490 (vslide1up): Ditto.
42491 (vslide1down): Ditto.
42492 (vfslide1up): Ditto.
42493 (vfslide1down): Ditto.
42495 (vrgatherei16): Ditto.
42496 (vcompress): Ditto.
42497 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
42498 (vint8mf8_t): Ditto.
42499 (vint8mf4_t): Ditto.
42500 (vint8mf2_t): Ditto.
42501 (vint8m1_t): Ditto.
42502 (vint8m2_t): Ditto.
42503 (vint8m4_t): Ditto.
42504 (vint16mf4_t): Ditto.
42505 (vint16mf2_t): Ditto.
42506 (vint16m1_t): Ditto.
42507 (vint16m2_t): Ditto.
42508 (vint16m4_t): Ditto.
42509 (vint16m8_t): Ditto.
42510 (vint32mf2_t): Ditto.
42511 (vint32m1_t): Ditto.
42512 (vint32m2_t): Ditto.
42513 (vint32m4_t): Ditto.
42514 (vint32m8_t): Ditto.
42515 (vint64m1_t): Ditto.
42516 (vint64m2_t): Ditto.
42517 (vint64m4_t): Ditto.
42518 (vint64m8_t): Ditto.
42519 (vuint8mf8_t): Ditto.
42520 (vuint8mf4_t): Ditto.
42521 (vuint8mf2_t): Ditto.
42522 (vuint8m1_t): Ditto.
42523 (vuint8m2_t): Ditto.
42524 (vuint8m4_t): Ditto.
42525 (vuint16mf4_t): Ditto.
42526 (vuint16mf2_t): Ditto.
42527 (vuint16m1_t): Ditto.
42528 (vuint16m2_t): Ditto.
42529 (vuint16m4_t): Ditto.
42530 (vuint16m8_t): Ditto.
42531 (vuint32mf2_t): Ditto.
42532 (vuint32m1_t): Ditto.
42533 (vuint32m2_t): Ditto.
42534 (vuint32m4_t): Ditto.
42535 (vuint32m8_t): Ditto.
42536 (vuint64m1_t): Ditto.
42537 (vuint64m2_t): Ditto.
42538 (vuint64m4_t): Ditto.
42539 (vuint64m8_t): Ditto.
42540 (vfloat32mf2_t): Ditto.
42541 (vfloat32m1_t): Ditto.
42542 (vfloat32m2_t): Ditto.
42543 (vfloat32m4_t): Ditto.
42544 (vfloat32m8_t): Ditto.
42545 (vfloat64m1_t): Ditto.
42546 (vfloat64m2_t): Ditto.
42547 (vfloat64m4_t): Ditto.
42548 (vfloat64m8_t): Ditto.
42549 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
42550 * config/riscv/riscv.md: Adjust RVV instruction types.
42551 * config/riscv/vector-iterators.md (down): New iterator.
42552 (=vd,vr): New attribute.
42553 (UNSPEC_VSLIDE1UP): New unspec.
42554 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
42555 (*pred_slide<ud><mode>): Ditto.
42556 (*pred_slide<ud><mode>_extended): Ditto.
42557 (@pred_gather<mode>): Ditto.
42558 (@pred_gather<mode>_scalar): Ditto.
42559 (@pred_gatherei16<mode>): Ditto.
42560 (@pred_compress<mode>): Ditto.
42562 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42564 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
42566 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42568 * config/riscv/constraints.md (Wb1): New constraint.
42569 * config/riscv/predicates.md
42570 (vector_least_significant_set_mask_operand): New predicate.
42571 (vector_broadcast_mask_operand): Ditto.
42572 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
42573 (gen_scalar_move_mask): New function.
42574 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
42575 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
42576 (class vmv_s): Ditto.
42578 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42579 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
42583 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
42585 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42586 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
42587 (function_expander::use_exact_insn): New function.
42588 (function_expander::use_contiguous_load_insn): New function.
42589 (function_expander::use_contiguous_store_insn): New function.
42590 (function_expander::use_ternop_insn): New function.
42591 (function_expander::use_widen_ternop_insn): New function.
42592 (function_expander::use_scalar_move_insn): New function.
42593 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
42594 * config/riscv/riscv-vector-builtins.h
42595 (function_expander::add_scalar_move_mask_operand): New class.
42596 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
42597 (scalar_move_insn_p): Ditto.
42598 (has_vsetvl_killed_avl_p): Ditto.
42599 (anticipatable_occurrence_p): Ditto.
42600 (insert_vsetvl): Ditto.
42601 (get_vl_vtype_info): Ditto.
42602 (calculate_sew): Ditto.
42603 (calculate_vlmul): Ditto.
42604 (incompatible_avl_p): Ditto.
42605 (different_sew_p): Ditto.
42606 (different_lmul_p): Ditto.
42607 (different_ratio_p): Ditto.
42608 (different_tail_policy_p): Ditto.
42609 (different_mask_policy_p): Ditto.
42610 (possible_zero_avl_p): Ditto.
42611 (first_ratio_invalid_for_second_sew_p): Ditto.
42612 (first_ratio_invalid_for_second_lmul_p): Ditto.
42613 (second_ratio_invalid_for_first_sew_p): Ditto.
42614 (second_ratio_invalid_for_first_lmul_p): Ditto.
42615 (second_sew_less_than_first_sew_p): Ditto.
42616 (first_sew_less_than_second_sew_p): Ditto.
42617 (compare_lmul): Ditto.
42618 (second_lmul_less_than_first_lmul_p): Ditto.
42619 (first_lmul_less_than_second_lmul_p): Ditto.
42620 (first_ratio_less_than_second_ratio_p): Ditto.
42621 (second_ratio_less_than_first_ratio_p): Ditto.
42622 (DEF_INCOMPATIBLE_COND): Ditto.
42623 (greatest_sew): Ditto.
42624 (first_sew): Ditto.
42625 (second_sew): Ditto.
42626 (first_vlmul): Ditto.
42627 (second_vlmul): Ditto.
42628 (first_ratio): Ditto.
42629 (second_ratio): Ditto.
42630 (vlmul_for_first_sew_second_ratio): Ditto.
42631 (ratio_for_second_sew_first_vlmul): Ditto.
42632 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
42633 (always_unavailable): Ditto.
42634 (avl_unavailable_p): Ditto.
42635 (sew_unavailable_p): Ditto.
42636 (lmul_unavailable_p): Ditto.
42637 (ge_sew_unavailable_p): Ditto.
42638 (ge_sew_lmul_unavailable_p): Ditto.
42639 (ge_sew_ratio_unavailable_p): Ditto.
42640 (DEF_UNAVAILABLE_COND): Ditto.
42641 (same_sew_lmul_demand_p): Ditto.
42642 (propagate_avl_across_demands_p): Ditto.
42643 (reg_available_p): Ditto.
42644 (avl_info::has_non_zero_avl): Ditto.
42645 (vl_vtype_info::has_non_zero_avl): Ditto.
42646 (vector_insn_info::operator>=): Refactor.
42647 (vector_insn_info::parse_insn): Adjust for scalar move.
42648 (vector_insn_info::demand_vl_vtype): Remove.
42649 (vector_insn_info::compatible_p): New function.
42650 (vector_insn_info::compatible_avl_p): Ditto.
42651 (vector_insn_info::compatible_vtype_p): Ditto.
42652 (vector_insn_info::available_p): Ditto.
42653 (vector_insn_info::merge): Ditto.
42654 (vector_insn_info::fuse_avl): Ditto.
42655 (vector_insn_info::fuse_sew_lmul): Ditto.
42656 (vector_insn_info::fuse_tail_policy): Ditto.
42657 (vector_insn_info::fuse_mask_policy): Ditto.
42658 (vector_insn_info::dump): Ditto.
42659 (vector_infos_manager::release): Ditto.
42660 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
42661 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
42662 (pass_vsetvl::hard_empty_block_p): Ditto.
42663 (pass_vsetvl::backward_demand_fusion): Ditto.
42664 (pass_vsetvl::forward_demand_fusion): Ditto.
42665 (pass_vsetvl::refine_vsetvls): Ditto.
42666 (pass_vsetvl::cleanup_vsetvls): Ditto.
42667 (pass_vsetvl::commit_vsetvls): Ditto.
42668 (pass_vsetvl::propagate_avl): Ditto.
42669 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
42670 (struct demands_pair): Ditto.
42671 (struct demands_cond): Ditto.
42672 (struct demands_fuse_rule): Ditto.
42673 * config/riscv/vector-iterators.md: New iterator.
42674 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
42675 (*pred_broadcast<mode>): Ditto.
42676 (*pred_broadcast<mode>_extended_scalar): Ditto.
42677 (@pred_extract_first<mode>): Ditto.
42678 (*pred_extract_first<mode>): Ditto.
42679 (@pred_extract_first_trunc<mode>): Ditto.
42680 * config/riscv/riscv-vsetvl.def: New file.
42682 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
42684 * config/riscv/bitmanip.md: allow 0 constant in max/min
42687 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
42689 * config/riscv/bitmanip.md: Fix wrong index in the check.
42691 2023-03-04 Jakub Jelinek <jakub@redhat.com>
42693 PR middle-end/109006
42694 * vec.cc (test_auto_alias): Adjust comment for removal of
42696 * read-rtl-function.cc (function_reader::parse_block): Likewise.
42697 * gdbhooks.py: Likewise.
42699 2023-03-04 Jakub Jelinek <jakub@redhat.com>
42701 PR testsuite/108973
42702 * selftest-diagnostic.cc
42703 (test_diagnostic_context::test_diagnostic_context): Set
42704 caret_max_width to 80.
42706 2023-03-03 Alexandre Oliva <oliva@adacore.com>
42708 * gimple-ssa-warn-access.cc
42709 (pass_waccess::check_dangling_stores): Skip non-stores.
42711 2023-03-03 Alexandre Oliva <oliva@adacore.com>
42713 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
42714 after vmsr and vmrs, and lower the case of P0.
42716 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
42718 PR middle-end/109006
42719 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
42721 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
42723 PR middle-end/109006
42724 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
42726 2023-03-03 Jakub Jelinek <jakub@redhat.com>
42729 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
42730 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
42731 suppressed on stmt. For [static %E] warning, print access_nelts
42732 rather than access_size. Fix up comment wording.
42734 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
42736 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
42737 arch14 instead of z16.
42739 2023-03-03 Anthony Green <green@moxielogic.com>
42741 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
42743 2023-03-03 Anthony Green <green@moxielogic.com>
42745 * config/moxie/constraints.md (A, B, W): Change
42746 define_constraint to define_memory_constraint.
42748 2023-03-03 Xi Ruoyao <xry111@xry111.site>
42750 * toplev.cc (process_options): Fix the spelling of
42751 "-fstack-clash-protection".
42753 2023-03-03 Richard Biener <rguenther@suse.de>
42755 PR tree-optimization/109002
42756 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
42757 PHI-translate ANTIC_IN.
42759 2023-03-03 Jakub Jelinek <jakub@redhat.com>
42761 PR tree-optimization/108988
42762 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
42763 size_type_node before passing it as argument to fwrite. Formatting
42766 2023-03-03 Richard Biener <rguenther@suse.de>
42769 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
42770 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
42771 * config/i386/i386-features.h (scalar_chain::max_visits): New.
42772 (scalar_chain::build): Add bitmap parameter, return boolean.
42773 (scalar_chain::add_insn): Likewise.
42774 (scalar_chain::analyze_register_chain): Likewise.
42775 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
42776 Initialize max_visits.
42777 (scalar_chain::analyze_register_chain): When we exhaust
42778 max_visits, abort. Also abort when running into any
42780 (scalar_chain::add_insn): Propagate abort.
42781 (scalar_chain::build): Likewise. When aborting amend
42782 the set of disallowed insn with the insns set.
42783 (convert_scalars_to_vector): Adjust. Do not convert aborted
42786 2023-03-03 Richard Biener <rguenther@suse.de>
42789 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
42790 generate a DIE for a function scope static.
42792 2023-03-03 Alexandre Oliva <oliva@adacore.com>
42794 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
42796 2023-03-02 Jakub Jelinek <jakub@redhat.com>
42799 * target.h (emit_support_tinfos_callback): New typedef.
42800 * targhooks.h (default_emit_support_tinfos): Declare.
42801 * targhooks.cc (default_emit_support_tinfos): New function.
42802 * target.def (emit_support_tinfos): New target hook.
42803 * doc/tm.texi.in (emit_support_tinfos): Document it.
42804 * doc/tm.texi: Regenerated.
42805 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
42806 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
42808 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
42810 * ira-costs.cc: Include print-rtl.h.
42811 (record_reg_classes, scan_one_insn): Add code to print debug info.
42812 (record_operand_costs): Find and use smaller cost for hard reg
42815 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
42816 Paul-Antoine Arras <pa@codesourcery.com>
42818 * builtins.cc (mathfn_built_in_explicit): New.
42819 * config/gcn/gcn.cc: Include case-cfn-macros.h.
42820 (mathfn_built_in_explicit): Add prototype.
42821 (gcn_vectorize_builtin_vectorized_function): New.
42822 (gcn_libc_has_function): New.
42823 (TARGET_LIBC_HAS_FUNCTION): Define.
42824 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
42826 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
42828 PR tree-optimization/108979
42829 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
42830 operations on invariants.
42832 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
42834 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
42835 * config/s390/s390.cc (s390_option_override_internal): Make
42836 partial vector usage the default from z13 on.
42837 * config/s390/vector.md (len_load_v16qi): Add.
42838 (len_store_v16qi): Add.
42840 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
42842 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
42843 of constant 0 offset.
42845 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
42847 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
42849 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
42851 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
42853 * config.gcc: add -with-{no-}msa build option.
42854 * config/mips/mips.h: Likewise.
42855 * doc/install.texi: Likewise.
42857 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
42859 PR tree-optimization/108603
42860 * explow.cc (convert_memory_address_addr_space_1): Only wrap
42861 the result of a recursive call in a CONST if no instructions
42864 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
42866 PR tree-optimization/108430
42867 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
42868 of inverted condition.
42870 2023-03-02 Jakub Jelinek <jakub@redhat.com>
42873 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
42874 comparison copy the bytes from ptr to a temporary buffer and clearing
42875 padding bits in there.
42877 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
42879 PR middle-end/108545
42880 * gimplify.cc (struct tree_operand_hash_no_se): New.
42881 (omp_index_mapping_groups_1, omp_index_mapping_groups,
42882 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
42883 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
42884 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
42885 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
42886 of tree_operand_hash.
42888 2023-03-01 LIU Hao <lh_mouse@126.com>
42891 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
42892 Remove the size limit `pch_VA_max_size`
42894 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
42896 PR middle-end/108546
42897 * omp-low.cc (lower_omp_target): Remove optional handling
42898 on the receiver side, i.e. inside target (data), for
42901 2023-03-01 Jakub Jelinek <jakub@redhat.com>
42904 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
42905 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
42907 2023-03-01 Richard Biener <rguenther@suse.de>
42909 PR tree-optimization/108970
42910 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
42911 Check we can copy the BBs.
42912 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
42914 (vect_do_peeling): Streamline error handling.
42916 2023-03-01 Richard Biener <rguenther@suse.de>
42918 PR tree-optimization/108950
42919 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
42920 Check oprnd0 is defined in the loop.
42921 * tree-vect-loop.cc (vectorizable_reduction): Record all
42922 operands vector types, compute that of invariants and
42923 properly update their SLP nodes.
42925 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
42928 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
42929 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
42931 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
42933 PR middle-end/107411
42934 PR middle-end/107411
42935 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
42937 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
42938 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
42940 2023-02-28 Jakub Jelinek <jakub@redhat.com>
42942 PR sanitizer/108894
42943 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
42944 comparison rather than index > bound.
42945 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
42946 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
42947 * doc/invoke.texi (-fsanitize=bounds): Document that whether
42948 flexible array member-like arrays are instrumented or not depends
42949 on -fstrict-flex-arrays* options of strict_flex_array attributes.
42950 (-fsanitize=bounds-strict): Document that flexible array members
42951 are not instrumented.
42953 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
42957 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
42958 (fmod<mode>3): Ditto.
42959 (fpremxf4_i387): Ditto.
42960 (reminderxf3): Ditto.
42961 (reminder<mode>3): Ditto.
42962 (fprem1xf4_i387): Ditto.
42964 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
42966 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
42967 generating FFS with mismatched operand and result modes, by using
42968 an explicit SIGN_EXTEND/ZERO_EXTEND.
42969 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
42970 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
42972 2023-02-27 Patrick Palka <ppalka@redhat.com>
42974 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
42975 * lra-int.h (lra_change_class): Likewise.
42976 * recog.h (which_op_alt): Likewise.
42977 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
42980 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
42982 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
42984 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
42986 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
42987 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
42989 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
42991 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
42992 (xtensa_get_config_v3): New functions.
42994 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
42996 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
42998 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
43000 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
43001 the macro to 0x1000000000.
43003 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
43006 * doc/gm2.texi (-fm2-pathname): New option documented.
43007 (-fm2-pathnameI): New option documented.
43008 (-fm2-prefix=): New option documented.
43009 (-fruntime-modules=): Update default module list.
43011 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
43014 * config/xtensa/xtensa-protos.h
43015 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
43016 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
43017 to xtensa_expand_call.
43018 (xtensa_expand_call): Emit the call and add a clobber expression
43019 for the static chain to it in case of windowed ABI.
43020 * config/xtensa/xtensa.md (call, call_value, sibcall)
43021 (sibcall_value): Call xtensa_expand_call and complete expansion
43022 right after that call.
43024 2023-02-24 Richard Biener <rguenther@suse.de>
43026 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
43027 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
43028 changing alignment of vec<T, A, vl_embed> and simplifying
43030 (vec<T, A, vl_embed>::address): Compute as this + 1.
43031 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
43032 vector instead of the offset of the m_vecdata member.
43033 (auto_vec<T, N>::m_data): Turn storage into
43034 uninitialized unsigned char.
43035 (auto_vec<T, N>::auto_vec): Allow allocation of one
43036 stack member. Initialize m_vec in a special way to
43037 avoid later stringop overflow diagnostics.
43038 * vec.cc (test_auto_alias): New.
43039 (vec_cc_tests): Call it.
43041 2023-02-24 Richard Biener <rguenther@suse.de>
43043 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
43044 take a const reference to the object, use address to
43046 (vec<T, A, vl_embed>::contains): Use address to access data.
43047 (vec<T, A, vl_embed>::operator[]): Use address instead of
43048 m_vecdata to access data.
43049 (vec<T, A, vl_embed>::iterate): Likewise.
43050 (vec<T, A, vl_embed>::copy): Likewise.
43051 (vec<T, A, vl_embed>::quick_push): Likewise.
43052 (vec<T, A, vl_embed>::pop): Likewise.
43053 (vec<T, A, vl_embed>::quick_insert): Likewise.
43054 (vec<T, A, vl_embed>::ordered_remove): Likewise.
43055 (vec<T, A, vl_embed>::unordered_remove): Likewise.
43056 (vec<T, A, vl_embed>::block_remove): Likewise.
43057 (vec<T, A, vl_heap>::address): Likewise.
43059 2023-02-24 Martin Liska <mliska@suse.cz>
43061 PR sanitizer/108834
43062 * asan.cc (asan_add_global): Use proper TU name for normal
43063 global variables (and aux_base_name for the artificial one).
43065 2023-02-24 Jakub Jelinek <jakub@redhat.com>
43067 * config/i386/i386-builtin.def: Update description of BDESC
43068 and BDESC_FIRST in file comment to include mask2.
43070 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43072 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
43074 2023-02-24 Jakub Jelinek <jakub@redhat.com>
43076 PR middle-end/108854
43077 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
43078 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
43079 nodes and adjust their DECL_CONTEXT.
43081 2023-02-24 Jakub Jelinek <jakub@redhat.com>
43084 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
43085 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
43086 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
43087 __builtin_ia32_cvtne2ps2bf16_v8bf,
43088 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
43089 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
43090 __builtin_ia32_cvtneps2bf16_v8sf_mask,
43091 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
43092 __builtin_ia32_cvtneps2bf16_v4sf_mask,
43093 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
43094 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
43095 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
43096 __builtin_ia32_dpbf16ps_v4sf_mask,
43097 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
43098 OPTION_MASK_ISA_AVX512VL.
43100 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
43102 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
43103 Add non-compact 32-bit multilibs.
43105 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
43107 * config/mips/mips.md (*clo<mode>2): New pattern.
43109 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
43111 * config/mips/mips.h (machine_function): New variable
43112 use_hazard_barrier_return_p.
43113 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
43114 (mips_hb_return_internal): New insn pattern.
43115 * config/mips/mips.cc (mips_attribute_table): Add attribute
43116 use_hazard_barrier_return.
43117 (mips_use_hazard_barrier_return_p): New static function.
43118 (mips_function_attr_inlinable_p): Likewise.
43119 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
43120 Emit error for unsupported architecture choice.
43121 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
43122 Return false for use_hazard_barrier_return.
43123 (mips_expand_epilogue): Emit hazard barrier return.
43124 * doc/extend.texi: Document use_hazard_barrier_return.
43126 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43128 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
43129 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
43130 for the gcc-internal headers.
43132 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43134 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
43135 and $(POSTCOMPILE) instead of manual dependency listing.
43136 * config/xtensa/xtensa-dynconfig.c: Rename to ...
43137 * config/xtensa/xtensa-dynconfig.cc: ... this.
43139 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
43141 * doc/cfg.texi: Reorder index entries around @items.
43142 * doc/cpp.texi: Ditto.
43143 * doc/cppenv.texi: Ditto.
43144 * doc/cppopts.texi: Ditto.
43145 * doc/generic.texi: Ditto.
43146 * doc/install.texi: Ditto.
43147 * doc/extend.texi: Ditto.
43148 * doc/invoke.texi: Ditto.
43149 * doc/md.texi: Ditto.
43150 * doc/rtl.texi: Ditto.
43151 * doc/tm.texi.in: Ditto.
43152 * doc/trouble.texi: Ditto.
43153 * doc/tm.texi: Regenerate.
43155 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43157 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
43158 the occurrence of general-purpose register used only once and for
43159 transferring intermediate value.
43161 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43163 * config/xtensa/xtensa.cc (machine_function): Add new member
43164 'eliminated_callee_saved_bmp'.
43165 (xtensa_can_eliminate_callee_saved_reg_p): New function to
43166 determine whether the register can be eliminated or not.
43167 (xtensa_expand_prologue): Add invoking the above function and
43168 elimination the use of callee-saved register by using its stack
43169 slot through the stack pointer (or the frame pointer if needed)
43171 (xtensa_expand_prologue): Modify to not emit register restoration
43172 insn from its stack slot if the register is already eliminated.
43174 2023-02-23 Jakub Jelinek <jakub@redhat.com>
43176 PR translation/108890
43177 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
43178 around fatal_error format strings.
43180 2023-02-23 Richard Biener <rguenther@suse.de>
43182 * tree-ssa-structalias.cc (handle_lhs_call): Do not
43183 re-create rhsc, only truncate it.
43185 2023-02-23 Jakub Jelinek <jakub@redhat.com>
43187 PR middle-end/106258
43188 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
43189 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
43191 2023-02-23 Richard Biener <rguenther@suse.de>
43193 * tree-if-conv.cc (tree_if_conversion): Properly manage
43194 memory of refs and the contained data references.
43196 2023-02-23 Richard Biener <rguenther@suse.de>
43198 PR tree-optimization/108888
43199 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
43200 calls to predicate.
43201 (predicate_statements): Only predicate calls with PLF_2.
43203 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43205 * config/xtensa/xtensa.md
43206 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
43207 Add missing "SI:" to PLUS RTXes.
43209 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43212 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
43213 Emit (use (reg:SI A0_REG)) at the end in the sibling call
43214 (i.e. the same place as (return) in the normal call).
43216 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
43219 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
43222 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
43224 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
43225 (sibcall_value, sibcall_value_internal): Add 'use' expression
43228 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
43230 * doc/cppdiropts.texi: Reorder @opindex commands to precede
43231 @items they relate to.
43232 * doc/cppopts.texi: Ditto.
43233 * doc/cppwarnopts.texi: Ditto.
43234 * doc/invoke.texi: Ditto.
43235 * doc/lto.texi: Ditto.
43237 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
43239 * internal-fn.cc (expand_MASK_CALL): New.
43240 * internal-fn.def (MASK_CALL): New.
43241 * internal-fn.h (expand_MASK_CALL): New prototype.
43242 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
43243 for mask arguments also.
43244 * tree-if-conv.cc: Include cgraph.h.
43245 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
43246 (predicate_statements): Convert functions to IFN_MASK_CALL.
43247 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
43248 IFN_MASK_CALL as a SIMD function call.
43249 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
43250 IFN_MASK_CALL as an inbranch SIMD function call.
43251 Generate the mask vector arguments.
43253 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43255 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
43256 (class widen_reducop): Ditto.
43257 (class freducop): Ditto.
43258 (class widen_freducop): Ditto.
43260 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43261 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
43270 (vwredsumu): Ditto.
43271 (vfredusum): Ditto.
43272 (vfredosum): Ditto.
43275 (vfwredosum): Ditto.
43276 (vfwredusum): Ditto.
43277 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
43279 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43280 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
43281 (DEF_RVV_WU_OPS): Ditto.
43282 (DEF_RVV_WF_OPS): Ditto.
43283 (vint8mf8_t): Ditto.
43284 (vint8mf4_t): Ditto.
43285 (vint8mf2_t): Ditto.
43286 (vint8m1_t): Ditto.
43287 (vint8m2_t): Ditto.
43288 (vint8m4_t): Ditto.
43289 (vint8m8_t): Ditto.
43290 (vint16mf4_t): Ditto.
43291 (vint16mf2_t): Ditto.
43292 (vint16m1_t): Ditto.
43293 (vint16m2_t): Ditto.
43294 (vint16m4_t): Ditto.
43295 (vint16m8_t): Ditto.
43296 (vint32mf2_t): Ditto.
43297 (vint32m1_t): Ditto.
43298 (vint32m2_t): Ditto.
43299 (vint32m4_t): Ditto.
43300 (vint32m8_t): Ditto.
43301 (vuint8mf8_t): Ditto.
43302 (vuint8mf4_t): Ditto.
43303 (vuint8mf2_t): Ditto.
43304 (vuint8m1_t): Ditto.
43305 (vuint8m2_t): Ditto.
43306 (vuint8m4_t): Ditto.
43307 (vuint8m8_t): Ditto.
43308 (vuint16mf4_t): Ditto.
43309 (vuint16mf2_t): Ditto.
43310 (vuint16m1_t): Ditto.
43311 (vuint16m2_t): Ditto.
43312 (vuint16m4_t): Ditto.
43313 (vuint16m8_t): Ditto.
43314 (vuint32mf2_t): Ditto.
43315 (vuint32m1_t): Ditto.
43316 (vuint32m2_t): Ditto.
43317 (vuint32m4_t): Ditto.
43318 (vuint32m8_t): Ditto.
43319 (vfloat32mf2_t): Ditto.
43320 (vfloat32m1_t): Ditto.
43321 (vfloat32m2_t): Ditto.
43322 (vfloat32m4_t): Ditto.
43323 (vfloat32m8_t): Ditto.
43324 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
43325 (DEF_RVV_WU_OPS): Ditto.
43326 (DEF_RVV_WF_OPS): Ditto.
43327 (required_extensions_p): Add reduction support.
43328 (rvv_arg_type_info::get_base_vector_type): Ditto.
43329 (rvv_arg_type_info::get_tree_type): Ditto.
43330 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
43331 * config/riscv/riscv.md: Ditto.
43332 * config/riscv/vector-iterators.md (minu): Ditto.
43333 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
43334 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
43335 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
43336 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
43337 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
43338 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
43339 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
43341 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43343 * config/riscv/iterators.md: New iterator.
43344 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
43345 (enum ternop_type): New enum.
43346 (class vmacc): New class.
43347 (class imac): Ditto.
43348 (class vnmsac): Ditto.
43349 (enum widen_ternop_type): New enum.
43350 (class vmadd): Ditto.
43351 (class vnmsub): Ditto.
43352 (class iwmac): Ditto.
43353 (class vwmacc): Ditto.
43354 (class vwmaccu): Ditto.
43355 (class vwmaccsu): Ditto.
43356 (class vwmaccus): Ditto.
43357 (class reverse_binop): Ditto.
43358 (class vfmacc): Ditto.
43359 (class vfnmsac): Ditto.
43360 (class vfmadd): Ditto.
43361 (class vfnmsub): Ditto.
43362 (class vfnmacc): Ditto.
43363 (class vfmsac): Ditto.
43364 (class vfnmadd): Ditto.
43365 (class vfmsub): Ditto.
43366 (class vfwmacc): Ditto.
43367 (class vfwnmacc): Ditto.
43368 (class vfwmsac): Ditto.
43369 (class vfwnmsac): Ditto.
43370 (class float_misc): Ditto.
43371 (class fcmp): Ditto.
43372 (class vfclass): Ditto.
43373 (class vfcvt_x): Ditto.
43374 (class vfcvt_rtz_x): Ditto.
43375 (class vfcvt_f): Ditto.
43376 (class vfwcvt_x): Ditto.
43377 (class vfwcvt_rtz_x): Ditto.
43378 (class vfwcvt_f): Ditto.
43379 (class vfncvt_x): Ditto.
43380 (class vfncvt_rtz_x): Ditto.
43381 (class vfncvt_f): Ditto.
43382 (class vfncvt_rod_f): Ditto.
43384 * config/riscv/riscv-vector-builtins-bases.h:
43385 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
43429 (vfcvt_rtz_x): Ditto.
43430 (vfcvt_rtz_xu): Ditto.
43433 (vfwcvt_xu): Ditto.
43434 (vfwcvt_rtz_x): Ditto.
43435 (vfwcvt_rtz_xu): Ditto.
43438 (vfncvt_xu): Ditto.
43439 (vfncvt_rtz_x): Ditto.
43440 (vfncvt_rtz_xu): Ditto.
43442 (vfncvt_rod_f): Ditto.
43443 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
43444 (struct move_def): Ditto.
43445 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
43446 (DEF_RVV_CONVERT_I_OPS): Ditto.
43447 (DEF_RVV_CONVERT_U_OPS): Ditto.
43448 (DEF_RVV_WCONVERT_I_OPS): Ditto.
43449 (DEF_RVV_WCONVERT_U_OPS): Ditto.
43450 (DEF_RVV_WCONVERT_F_OPS): Ditto.
43451 (vfloat64m1_t): Ditto.
43452 (vfloat64m2_t): Ditto.
43453 (vfloat64m4_t): Ditto.
43454 (vfloat64m8_t): Ditto.
43455 (vint32mf2_t): Ditto.
43456 (vint32m1_t): Ditto.
43457 (vint32m2_t): Ditto.
43458 (vint32m4_t): Ditto.
43459 (vint32m8_t): Ditto.
43460 (vint64m1_t): Ditto.
43461 (vint64m2_t): Ditto.
43462 (vint64m4_t): Ditto.
43463 (vint64m8_t): Ditto.
43464 (vuint32mf2_t): Ditto.
43465 (vuint32m1_t): Ditto.
43466 (vuint32m2_t): Ditto.
43467 (vuint32m4_t): Ditto.
43468 (vuint32m8_t): Ditto.
43469 (vuint64m1_t): Ditto.
43470 (vuint64m2_t): Ditto.
43471 (vuint64m4_t): Ditto.
43472 (vuint64m8_t): Ditto.
43473 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
43474 (DEF_RVV_CONVERT_U_OPS): Ditto.
43475 (DEF_RVV_WCONVERT_I_OPS): Ditto.
43476 (DEF_RVV_WCONVERT_U_OPS): Ditto.
43477 (DEF_RVV_WCONVERT_F_OPS): Ditto.
43478 (DEF_RVV_F_OPS): Ditto.
43479 (DEF_RVV_WEXTF_OPS): Ditto.
43480 (required_extensions_p): Adjust for floating-point support.
43481 (check_required_extensions): Ditto.
43482 (unsigned_base_type_p): Ditto.
43483 (get_mode_for_bitsize): Ditto.
43484 (rvv_arg_type_info::get_base_vector_type): Ditto.
43485 (rvv_arg_type_info::get_tree_type): Ditto.
43486 * config/riscv/riscv-vector-builtins.def (v_f): New define.
43489 (xu_v): New define.
43491 (xu_w): New define.
43492 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
43493 (function_expander::arg_mode): New function.
43494 * config/riscv/vector-iterators.md (sof): New iterator.
43500 (fixuns_trunc): Ditto.
43502 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
43503 (@pred_<optab><mode>): Ditto.
43504 (@pred_<optab><mode>_scalar): Ditto.
43505 (@pred_<optab><mode>_reverse_scalar): Ditto.
43506 (@pred_<copysign><mode>): Ditto.
43507 (@pred_<copysign><mode>_scalar): Ditto.
43508 (@pred_mul_<optab><mode>): Ditto.
43509 (pred_mul_<optab><mode>_undef_merge): Ditto.
43510 (*pred_<madd_nmsub><mode>): Ditto.
43511 (*pred_<macc_nmsac><mode>): Ditto.
43512 (*pred_mul_<optab><mode>): Ditto.
43513 (@pred_mul_<optab><mode>_scalar): Ditto.
43514 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
43515 (*pred_<madd_nmsub><mode>_scalar): Ditto.
43516 (*pred_<macc_nmsac><mode>_scalar): Ditto.
43517 (*pred_mul_<optab><mode>_scalar): Ditto.
43518 (@pred_neg_mul_<optab><mode>): Ditto.
43519 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
43520 (*pred_<nmadd_msub><mode>): Ditto.
43521 (*pred_<nmacc_msac><mode>): Ditto.
43522 (*pred_neg_mul_<optab><mode>): Ditto.
43523 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
43524 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
43525 (*pred_<nmadd_msub><mode>_scalar): Ditto.
43526 (*pred_<nmacc_msac><mode>_scalar): Ditto.
43527 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
43528 (@pred_<misc_op><mode>): Ditto.
43529 (@pred_class<mode>): Ditto.
43530 (@pred_dual_widen_<optab><mode>): Ditto.
43531 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
43532 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
43533 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
43534 (@pred_widen_mul_<optab><mode>): Ditto.
43535 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
43536 (@pred_widen_neg_mul_<optab><mode>): Ditto.
43537 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
43538 (@pred_cmp<mode>): Ditto.
43539 (*pred_cmp<mode>): Ditto.
43540 (*pred_cmp<mode>_narrow): Ditto.
43541 (@pred_cmp<mode>_scalar): Ditto.
43542 (*pred_cmp<mode>_scalar): Ditto.
43543 (*pred_cmp<mode>_scalar_narrow): Ditto.
43544 (@pred_eqne<mode>_scalar): Ditto.
43545 (*pred_eqne<mode>_scalar): Ditto.
43546 (*pred_eqne<mode>_scalar_narrow): Ditto.
43547 (@pred_merge<mode>_scalar): Ditto.
43548 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
43549 (@pred_<fix_cvt><mode>): Ditto.
43550 (@pred_<float_cvt><mode>): Ditto.
43551 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
43552 (@pred_widen_<fix_cvt><mode>): Ditto.
43553 (@pred_widen_<float_cvt><mode>): Ditto.
43554 (@pred_extend<mode>): Ditto.
43555 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
43556 (@pred_narrow_<fix_cvt><mode>): Ditto.
43557 (@pred_narrow_<float_cvt><mode>): Ditto.
43558 (@pred_trunc<mode>): Ditto.
43559 (@pred_rod_trunc<mode>): Ditto.
43561 2023-02-22 Jakub Jelinek <jakub@redhat.com>
43563 PR middle-end/106258
43564 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
43565 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
43566 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
43567 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
43569 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
43571 * common.opt (-Wcomplain-wrong-lang): New.
43572 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
43573 * opts-common.cc (prune_options): Handle it.
43574 * opts-global.cc (complain_wrong_lang): Use it.
43576 2023-02-21 David Malcolm <dmalcolm@redhat.com>
43579 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
43581 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
43584 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
43586 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
43587 (sibcall_value, sibcall_value_internal): Add 'use' expression
43590 2023-02-21 Richard Biener <rguenther@suse.de>
43592 PR tree-optimization/108691
43593 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
43594 assert about calls_setjmp not becoming true when it was false.
43596 2023-02-21 Richard Biener <rguenther@suse.de>
43598 PR tree-optimization/108793
43599 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
43600 Use convert operands to niter_type when computing num.
43602 2023-02-21 Richard Biener <rguenther@suse.de>
43605 2023-02-13 Richard Biener <rguenther@suse.de>
43607 PR tree-optimization/108691
43608 * tree-cfg.cc (notice_special_calls): When the CFG is built
43609 honor gimple_call_ctrl_altering_p.
43610 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
43611 temporarily if the call is not control-altering.
43612 * calls.cc (emit_call_1): Do not add REG_SETJMP if
43613 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
43615 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43617 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
43618 true if register A0 (return address register) when -Og is specified.
43620 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
43622 * config/i386/predicates.md
43623 (general_x64constmem_operand): New predicate.
43624 * config/i386/i386.md (*cmpqi_ext<mode>_1):
43625 Use nonimm_x64constmem_operand.
43626 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
43627 (*addqi_ext<mode>_1): Ditto.
43628 (*testqi_ext<mode>_1): Ditto.
43629 (*andqi_ext<mode>_1): Ditto.
43630 (*andqi_ext<mode>_1_cc): Ditto.
43631 (*<any_or:code>qi_ext<mode>_1): Ditto.
43632 (*xorqi_ext<mode>_1_cc): Ditto.
43634 2023-02-20 Jakub Jelinek <jakub2redhat.com>
43637 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
43638 gen_umadddi4_highpart{,_le}.
43640 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
43642 * config/riscv/riscv.md (prefetch): Use r instead of p for the
43644 (riscv_prefetchi_<mode>): Ditto.
43646 2023-02-20 Richard Biener <rguenther@suse.de>
43648 PR tree-optimization/108816
43649 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
43650 versioning condition split prerequesite, assert required
43653 2023-02-20 Richard Biener <rguenther@suse.de>
43655 PR tree-optimization/108825
43656 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
43657 loop-local verfication only verify there's no pending SSA
43660 2023-02-20 Richard Biener <rguenther@suse.de>
43662 PR tree-optimization/108819
43663 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
43664 we have an SSA name as iv_2 as expected.
43666 2023-02-18 Jakub Jelinek <jakub@redhat.com>
43668 PR tree-optimization/108819
43669 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
43671 2023-02-18 Jakub Jelinek <jakub@redhat.com>
43674 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
43675 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
43677 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
43678 with ix86_replace_reg_with_reg.
43680 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
43682 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
43684 2023-02-18 Xi Ruoyao <xry111@xry111.site>
43686 * config.gcc (triplet_abi): Set its value based on $with_abi,
43687 instead of $target.
43688 (la_canonical_triplet): Set it after $triplet_abi is set
43690 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
43691 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
43694 2023-02-18 Andrew Pinski <apinski@marvell.com>
43696 * match.pd: Remove #if GIMPLE around the
43699 2023-02-18 Andrew Pinski <apinski@marvell.com>
43701 * value-query.h (get_range_query): Return the global ranges
43702 for a nullptr func.
43704 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
43706 * doc/invoke.texi (@item -Wall): Fix typo in
43709 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
43712 * config/i386/predicates.md
43713 (nonimm_x64constmem_operand): New predicate.
43714 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
43715 (*subqi_ext<mode>_0): Ditto.
43716 (*andqi_ext<mode>_0): Ditto.
43717 (*<any_or:code>qi_ext<mode>_0): Ditto.
43719 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
43722 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
43723 int_outermode instead of GET_MODE (tem) to prevent
43724 VOIDmode from entering simplify_gen_subreg.
43726 2023-02-17 Richard Biener <rguenther@suse.de>
43728 PR tree-optimization/108821
43729 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
43730 move volatile accesses.
43732 2023-02-17 Richard Biener <rguenther@suse.de>
43734 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
43735 called on virtual operands.
43736 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
43737 ssa_undefined_value_p calls.
43738 (vn_phi_insert): Likewise.
43739 (set_ssa_val_to): Likewise.
43740 (visit_phi): Avoid extra work with equivalences for
43741 virtual operand PHIs.
43743 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43745 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
43747 (class mask_nlogic): Ditto.
43748 (class mask_notlogic): Ditto.
43749 (class vmmv): Ditto.
43750 (class vmclr): Ditto.
43751 (class vmset): Ditto.
43752 (class vmnot): Ditto.
43753 (class vcpop): Ditto.
43754 (class vfirst): Ditto.
43755 (class mask_misc): Ditto.
43756 (class viota): Ditto.
43757 (class vid): Ditto.
43759 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43760 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
43779 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
43780 (struct mask_alu_def): Ditto.
43782 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
43783 * config/riscv/riscv-vector-builtins.cc: Ditto.
43784 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
43785 for dest it scalar RVV intrinsics.
43786 * config/riscv/vector-iterators.md (sof): New iterator.
43787 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
43788 (@pred_<optab>not<mode>): New pattern.
43789 (@pred_popcount<VB:mode><P:mode>): New pattern.
43790 (@pred_ffs<VB:mode><P:mode>): New pattern.
43791 (@pred_<misc_op><mode>): New pattern.
43792 (@pred_iota<mode>): New pattern.
43793 (@pred_series<mode>): New pattern.
43795 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43797 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
43801 * config/riscv/riscv-vector-builtins.cc: Ditto.
43803 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43804 kito-cheng <kito.cheng@sifive.com>
43806 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
43807 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
43808 (sew64_scalar_helper): New function.
43809 * config/riscv/vector.md: Normalization.
43811 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43813 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
43875 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43877 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
43878 (@pred_<optab><mode>_scalar): Ditto.
43879 (*pred_<optab><mode>_scalar): Ditto.
43880 (*pred_<optab><mode>_extended_scalar): Ditto.
43882 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43884 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
43885 (init_builtins): Ditto.
43886 (mangle_builtin_type): Ditto.
43887 (verify_type_context): Ditto.
43888 (handle_pragma_vector): Ditto.
43889 (builtin_decl): Ditto.
43890 (expand_builtin): Ditto.
43891 (const_vec_all_same_in_range_p): Ditto.
43892 (legitimize_move): Ditto.
43893 (emit_vlmax_op): Ditto.
43894 (emit_nonvlmax_op): Ditto.
43895 (get_vlmul): Ditto.
43896 (get_ratio): Ditto.
43899 (get_avl_type): Ditto.
43900 (calculate_ratio): Ditto.
43901 (enum vlmul_type): Ditto.
43903 (neg_simm5_p): Ditto.
43904 (has_vi_variant_p): Ditto.
43906 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43908 * config/riscv/riscv-protos.h (simm32_p): Remove.
43909 * config/riscv/riscv-v.cc (simm32_p): Ditto.
43910 * config/riscv/vector.md: Use immediate_operand
43911 instead of riscv_vector::simm32_p.
43913 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
43915 * doc/invoke.texi (Optimize Options): Reword the explanation
43916 getting minimal, maximal and default values of a parameter.
43918 2023-02-16 Patrick Palka <ppalka@redhat.com>
43920 * addresses.h: Mechanically drop 'static' from 'static inline'
43921 functions via s/^static inline/inline/g.
43922 * asan.h: Likewise.
43923 * attribs.h: Likewise.
43924 * basic-block.h: Likewise.
43925 * bitmap.h: Likewise.
43926 * cfghooks.h: Likewise.
43927 * cfgloop.h: Likewise.
43928 * cgraph.h: Likewise.
43929 * cselib.h: Likewise.
43930 * data-streamer.h: Likewise.
43931 * debug.h: Likewise.
43933 * diagnostic.h: Likewise.
43934 * dominance.h: Likewise.
43935 * dumpfile.h: Likewise.
43936 * emit-rtl.h: Likewise.
43937 * except.h: Likewise.
43938 * expmed.h: Likewise.
43939 * expr.h: Likewise.
43940 * fixed-value.h: Likewise.
43941 * gengtype.h: Likewise.
43942 * gimple-expr.h: Likewise.
43943 * gimple-iterator.h: Likewise.
43944 * gimple-predict.h: Likewise.
43945 * gimple-range-fold.h: Likewise.
43946 * gimple-ssa.h: Likewise.
43947 * gimple.h: Likewise.
43948 * graphite.h: Likewise.
43949 * hard-reg-set.h: Likewise.
43950 * hash-map.h: Likewise.
43951 * hash-set.h: Likewise.
43952 * hash-table.h: Likewise.
43953 * hwint.h: Likewise.
43954 * input.h: Likewise.
43955 * insn-addr.h: Likewise.
43956 * internal-fn.h: Likewise.
43957 * ipa-fnsummary.h: Likewise.
43958 * ipa-icf-gimple.h: Likewise.
43959 * ipa-inline.h: Likewise.
43960 * ipa-modref.h: Likewise.
43961 * ipa-prop.h: Likewise.
43962 * ira-int.h: Likewise.
43964 * lra-int.h: Likewise.
43966 * lto-streamer.h: Likewise.
43967 * memmodel.h: Likewise.
43968 * omp-general.h: Likewise.
43969 * optabs-query.h: Likewise.
43970 * optabs.h: Likewise.
43971 * plugin.h: Likewise.
43972 * pretty-print.h: Likewise.
43973 * range.h: Likewise.
43974 * read-md.h: Likewise.
43975 * recog.h: Likewise.
43976 * regs.h: Likewise.
43977 * rtl-iter.h: Likewise.
43979 * sbitmap.h: Likewise.
43980 * sched-int.h: Likewise.
43981 * sel-sched-ir.h: Likewise.
43982 * sese.h: Likewise.
43983 * sparseset.h: Likewise.
43984 * ssa-iterators.h: Likewise.
43985 * system.h: Likewise.
43986 * target-globals.h: Likewise.
43987 * target.h: Likewise.
43988 * timevar.h: Likewise.
43989 * tree-chrec.h: Likewise.
43990 * tree-data-ref.h: Likewise.
43991 * tree-iterator.h: Likewise.
43992 * tree-outof-ssa.h: Likewise.
43993 * tree-phinodes.h: Likewise.
43994 * tree-scalar-evolution.h: Likewise.
43995 * tree-sra.h: Likewise.
43996 * tree-ssa-alias.h: Likewise.
43997 * tree-ssa-live.h: Likewise.
43998 * tree-ssa-loop-manip.h: Likewise.
43999 * tree-ssa-loop.h: Likewise.
44000 * tree-ssa-operands.h: Likewise.
44001 * tree-ssa-propagate.h: Likewise.
44002 * tree-ssa-sccvn.h: Likewise.
44003 * tree-ssa.h: Likewise.
44004 * tree-ssanames.h: Likewise.
44005 * tree-streamer.h: Likewise.
44006 * tree-switch-conversion.h: Likewise.
44007 * tree-vectorizer.h: Likewise.
44008 * tree.h: Likewise.
44009 * wide-int.h: Likewise.
44011 2023-02-16 Jakub Jelinek <jakub@redhat.com>
44013 PR tree-optimization/108657
44014 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
44015 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
44016 is a call to internal or builtin function.
44018 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
44020 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
44021 using-declaration to unhide functions.
44023 2023-02-16 Jakub Jelinek <jakub@redhat.com>
44025 PR tree-optimization/108783
44026 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
44027 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
44028 t to curr->op. Otherwise, punt if either newop1 or newop2 are
44029 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
44031 2023-02-16 Richard Biener <rguenther@suse.de>
44033 PR tree-optimization/108791
44034 * tree-ssa-forwprop.cc (optimize_vector_load): Build
44035 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
44038 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
44041 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
44042 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
44043 (ix86_expand_prologue): Likewise.
44045 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
44047 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
44049 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
44051 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
44052 int248_register_operand predicate in zero_extract sub-RTX.
44053 (*cmpqi_ext<mode>_2): Ditto.
44054 (*cmpqi_ext<mode>_3): Ditto.
44055 (*cmpqi_ext<mode>_4): Ditto.
44056 (*extzvqi_mem_rex64): Ditto.
44058 (*insvqi_1_mem_rex64): Ditto.
44059 (@insv<mode>_1): Ditto.
44060 (*insvqi_1): Ditto.
44061 (*insvqi_2): Ditto.
44062 (*insvqi_3): Ditto.
44063 (*extendqi<SWI24:mode>_ext_1): Ditto.
44064 (*addqi_ext<mode>_1): Ditto.
44065 (*addqi_ext<mode>_2): Ditto.
44066 (*subqi_ext<mode>_2): Ditto.
44067 (*testqi_ext<mode>_1): Ditto.
44068 (*testqi_ext<mode>_2): Ditto.
44069 (*andqi_ext<mode>_1): Ditto.
44070 (*andqi_ext<mode>_1_cc): Ditto.
44071 (*andqi_ext<mode>_2): Ditto.
44072 (*<any_or:code>qi_ext<mode>_1): Ditto.
44073 (*<any_or:code>qi_ext<mode>_2): Ditto.
44074 (*xorqi_ext<mode>_1_cc): Ditto.
44075 (*negqi_ext<mode>_2): Ditto.
44076 (*ashlqi_ext<mode>_2): Ditto.
44077 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
44079 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
44081 * config/i386/predicates.md (int248_register_operand):
44082 Rename from extr_register_operand.
44083 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
44084 (*extzx<mode>): Ditto.
44085 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
44086 (*ashl<mode>3_mask): Ditto.
44087 (*<any_shiftrt:insn><mode>3_mask): Ditto.
44088 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
44089 (*<any_rotate:insn><mode>3_mask): Ditto.
44090 (*<btsc><mode>_mask): Ditto.
44091 (*btr<mode>_mask): Ditto.
44092 (*jcc_bt<mode>_mask_1): Ditto.
44094 2023-02-15 Richard Biener <rguenther@suse.de>
44096 PR middle-end/26854
44097 * df-core.cc (df_worklist_propagate_forward): Put later
44098 blocks on worklist and only earlier blocks on pending.
44099 (df_worklist_propagate_backward): Likewise.
44100 (df_worklist_dataflow_doublequeue): Change the iteration
44101 to process new blocks in the same iteration if that
44102 maintains the iteration order.
44104 2023-02-15 Marek Polacek <polacek@redhat.com>
44106 PR middle-end/106080
44107 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
44110 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44112 * config/riscv/predicates.md: Refine codes.
44113 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
44114 * config/riscv/riscv-v.cc: Refine codes.
44115 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
44117 (class imac): New class.
44118 (enum widen_ternop_type): New enum.
44119 (class iwmac): New class.
44121 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44122 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
44130 * config/riscv/riscv-vector-builtins.cc
44131 (function_builder::apply_predication): Adjust for multiply-add support.
44132 (function_expander::add_vundef_operand): Refine codes.
44133 (function_expander::use_ternop_insn): New function.
44134 (function_expander::use_widen_ternop_insn): Ditto.
44135 * config/riscv/riscv-vector-builtins.h: New function.
44136 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
44137 (pred_mul_<optab><mode>_undef_merge): Ditto.
44138 (*pred_<madd_nmsub><mode>): Ditto.
44139 (*pred_<macc_nmsac><mode>): Ditto.
44140 (*pred_mul_<optab><mode>): Ditto.
44141 (@pred_mul_<optab><mode>_scalar): Ditto.
44142 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
44143 (*pred_<madd_nmsub><mode>_scalar): Ditto.
44144 (*pred_<macc_nmsac><mode>_scalar): Ditto.
44145 (*pred_mul_<optab><mode>_scalar): Ditto.
44146 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
44147 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
44148 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
44149 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
44150 (@pred_widen_mul_plus<su><mode>): Ditto.
44151 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
44152 (@pred_widen_mul_plussu<mode>): Ditto.
44153 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
44154 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
44156 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44158 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
44159 (vector_all_trues_mask_operand): New predicate.
44160 (vector_undef_operand): New predicate.
44161 (ltge_operator): New predicate.
44162 (comparison_except_ltge_operator): New predicate.
44163 (comparison_except_eqge_operator): New predicate.
44164 (ge_operator): New predicate.
44165 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
44166 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
44168 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44169 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
44179 * config/riscv/riscv-vector-builtins-shapes.cc
44180 (struct return_mask_def): Adjust for compare support.
44181 * config/riscv/riscv-vector-builtins.cc
44182 (function_expander::use_compare_insn): New function.
44183 * config/riscv/riscv-vector-builtins.h
44184 (function_expander::add_integer_operand): Ditto.
44185 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
44186 * config/riscv/riscv.md: Add vector min/max attributes.
44187 * config/riscv/vector-iterators.md (xnor): New iterator.
44188 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
44189 (*pred_cmp<mode>): Ditto.
44190 (*pred_cmp<mode>_narrow): Ditto.
44191 (@pred_ltge<mode>): Ditto.
44192 (*pred_ltge<mode>): Ditto.
44193 (*pred_ltge<mode>_narrow): Ditto.
44194 (@pred_cmp<mode>_scalar): Ditto.
44195 (*pred_cmp<mode>_scalar): Ditto.
44196 (*pred_cmp<mode>_scalar_narrow): Ditto.
44197 (@pred_eqne<mode>_scalar): Ditto.
44198 (*pred_eqne<mode>_scalar): Ditto.
44199 (*pred_eqne<mode>_scalar_narrow): Ditto.
44200 (*pred_cmp<mode>_extended_scalar): Ditto.
44201 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
44202 (*pred_eqne<mode>_extended_scalar): Ditto.
44203 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
44204 (@pred_ge<mode>_scalar): Ditto.
44205 (@pred_<optab><mode>): Ditto.
44206 (@pred_n<optab><mode>): Ditto.
44207 (@pred_<optab>n<mode>): Ditto.
44208 (@pred_not<mode>): Ditto.
44210 2023-02-15 Martin Jambor <mjambor@suse.cz>
44213 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
44214 creation of non-scalar replacements even if IPA-CP knows their
44217 2023-02-15 Jakub Jelinek <jakub@redhat.com>
44221 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
44222 expander, change operand 3 to be TImode, emit maddlddi4 and
44223 umadddi4_highpart{,_le} with its low half and finally add the high
44224 half to the result.
44226 2023-02-15 Martin Liska <mliska@suse.cz>
44228 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
44230 2023-02-15 Richard Biener <rguenther@suse.de>
44232 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
44233 for with_poison and alias worklist to it.
44234 (sanitize_asan_mark_poison): Likewise.
44236 2023-02-15 Richard Biener <rguenther@suse.de>
44239 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
44240 Combine bitmap test and set.
44241 (scalar_chain::add_insn): Likewise.
44242 (scalar_chain::analyze_register_chain): Remove redundant
44243 attempt to add to queue and instead strengthen assert.
44244 Sink common attempts to mark the def dual-mode.
44245 (scalar_chain::add_to_queue): Remove redundant insn bitmap
44248 2023-02-15 Richard Biener <rguenther@suse.de>
44251 * config/i386/i386-features.cc (convert_scalars_to_vector):
44252 Switch candidates bitmaps to tree view before building the chains.
44254 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
44256 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
44257 "failure trying to reload" call.
44259 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
44261 * gdbinit.in (phrs): New command.
44262 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
44263 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
44265 2023-02-14 David Faust <david.faust@oracle.com>
44268 * config/bpf/constraints.md (q): New memory constraint.
44269 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
44270 (zero_extendqidi2): Likewise.
44271 (zero_extendsidi2): Likewise.
44272 (*mov<MM:mode>): Likewise.
44274 2023-02-14 Andrew Pinski <apinski@marvell.com>
44276 PR tree-optimization/108355
44277 PR tree-optimization/96921
44278 * match.pd: Add pattern for "1 - bool_val".
44280 2023-02-14 Richard Biener <rguenther@suse.de>
44282 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
44283 basic block index hashing on the availability of ->cclhs.
44284 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
44285 rely on ->cclhs availability.
44286 (vn_phi_lookup): Set ->cclhs only when we are eventually
44287 going to CSE the PHI.
44288 (vn_phi_insert): Likewise.
44290 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
44292 * gimplify.cc (gimplify_save_expr): Add missing guard.
44294 2023-02-14 Richard Biener <rguenther@suse.de>
44296 PR tree-optimization/108782
44297 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
44298 Make sure we're not vectorizing an inner loop.
44300 2023-02-14 Jakub Jelinek <jakub@redhat.com>
44302 PR sanitizer/108777
44303 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
44304 * asan.h (asan_memfn_rtl): Declare.
44305 * asan.cc (asan_memfn_rtls): New variable.
44306 (asan_memfn_rtl): New function.
44307 * builtins.cc (expand_builtin): If
44308 param_asan_kernel_mem_intrinsic_prefix and function is
44309 kernel-{,hw}address sanitized, emit calls to
44310 __{,hw}asan_{memcpy,memmove,memset} rather than
44311 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
44312 instead of flag_sanitize & SANITIZE_ADDRESS to check if
44313 asan_intercepted_p functions shouldn't be expanded inline.
44315 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
44317 PR tree-optimization/96373
44318 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
44319 operations on the loop mask. Reject partial vectors if this isn't
44322 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
44324 PR rtl-optimization/108681
44325 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
44326 code to handle bare uses and clobbers.
44328 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
44330 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
44331 caller_save_p flag when clearing defined_p flag.
44332 (setup_reg_equiv): Ditto.
44333 * lra-constraints.cc (lra_constraints): Ditto.
44335 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
44338 * config/i386/predicates.md (extr_register_operand):
44339 New special predicate.
44340 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
44341 as operand 1 predicate.
44342 (*exzv<mode>): Ditto.
44343 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
44345 2023-02-13 Richard Biener <rguenther@suse.de>
44347 PR tree-optimization/28614
44348 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
44349 walking all edges in most cases.
44350 (vn_nary_op_insert_pieces_predicated): Avoid repeated
44351 calls to can_track_predicate_on_edge unless checking is
44353 (process_bb): Instead call it once here for each edge
44354 we register possibly multiple predicates on.
44356 2023-02-13 Richard Biener <rguenther@suse.de>
44358 PR tree-optimization/108691
44359 * tree-cfg.cc (notice_special_calls): When the CFG is built
44360 honor gimple_call_ctrl_altering_p.
44361 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
44362 temporarily if the call is not control-altering.
44363 * calls.cc (emit_call_1): Do not add REG_SETJMP if
44364 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
44366 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
44369 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
44370 (struct s390_sched_state): Initialise to zero.
44371 (s390_sched_variable_issue): For better debuggability also emit
44373 (s390_sched_init): Unconditionally reset scheduler state.
44375 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
44377 * ifcvt.h (noce_if_info::cond_inverted): New field.
44378 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
44379 values when cond_inverted is true.
44380 (noce_find_if_block): Allow the condition to be inverted when
44381 handling conditional moves.
44383 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
44385 * config/s390/predicates.md (execute_operation): Use
44386 constrain_operands instead of extract_constrain_insn in order to
44387 determine wheter there exists a valid alternative.
44389 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
44391 * common/config/arc/arc-common.cc (arc_option_optimization_table):
44392 Remove millicode from list.
44394 2023-02-13 Martin Liska <mliska@suse.cz>
44396 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
44398 2023-02-13 Richard Biener <rguenther@suse.de>
44400 PR tree-optimization/106722
44401 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
44402 whether we marked a stmt.
44403 (mark_control_dependent_edges_necessary): When
44404 mark_last_stmt_necessary didn't mark any stmt make sure
44405 to mark its control dependent edges.
44406 (propagate_necessity): Likewise.
44408 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
44410 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
44411 (DWARF_FRAME_REGISTERS): New.
44412 (DWARF_REG_TO_UNWIND_COLUMN): New.
44414 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
44416 * doc/sourcebuild.texi: Remove (broken) direct reference to
44417 "The GNU configure and build system".
44419 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
44421 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
44422 gen_add3_insn to gen_rtx_SET.
44423 (riscv_adjust_libcall_cfi_epilogue): Likewise.
44425 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44427 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
44428 (class vnclip): Ditto.
44430 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44431 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
44440 * config/riscv/vector-iterators.md (su): Add instruction.
44443 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
44444 (@pred_<sat_op><mode>_scalar): Ditto.
44445 (*pred_<sat_op><mode>_scalar): Ditto.
44446 (*pred_<sat_op><mode>_extended_scalar): Ditto.
44447 (@pred_narrow_clip<v_su><mode>): Ditto.
44448 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
44450 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44452 * config/riscv/constraints.md (Wbr): Remove unused constraint.
44453 * config/riscv/predicates.md: Fix move operand predicate.
44454 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
44455 (class vncvt_x): Ditto.
44456 (class vmerge): Ditto.
44457 (class vmv_v): Ditto.
44459 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44460 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
44467 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
44468 (struct move_def): Ditto.
44470 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44471 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
44472 (DEF_RVV_WEXTU_OPS): Ditto
44473 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
44478 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
44479 * config/riscv/vector-iterators.md (nmsac):New iterator.
44480 (nmsub): New iterator.
44481 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
44482 (@pred_merge<mode>_scalar): New pattern.
44483 (*pred_merge<mode>_scalar): New pattern.
44484 (*pred_merge<mode>_extended_scalar): New pattern.
44485 (@pred_narrow_<optab><mode>): New pattern.
44486 (@pred_narrow_<optab><mode>_scalar): New pattern.
44487 (@pred_trunc<mode>): New pattern.
44489 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44491 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
44492 (class vmsbc): Ditto.
44493 (BASE): Define new class.
44494 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44495 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
44497 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
44500 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44501 * config/riscv/riscv-vector-builtins.cc
44502 (function_expander::use_exact_insn): Adjust for new support
44503 * config/riscv/riscv-vector-builtins.h
44504 (function_base::has_merge_operand_p): New function.
44505 * config/riscv/vector-iterators.md: New iterator.
44506 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
44507 (@pred_msbc<mode>): Ditto.
44508 (@pred_madc<mode>_scalar): Ditto.
44509 (@pred_msbc<mode>_scalar): Ditto.
44510 (*pred_madc<mode>_scalar): Ditto.
44511 (*pred_madc<mode>_extended_scalar): Ditto.
44512 (*pred_msbc<mode>_scalar): Ditto.
44513 (*pred_msbc<mode>_extended_scalar): Ditto.
44514 (@pred_madc<mode>_overflow): Ditto.
44515 (@pred_msbc<mode>_overflow): Ditto.
44516 (@pred_madc<mode>_overflow_scalar): Ditto.
44517 (@pred_msbc<mode>_overflow_scalar): Ditto.
44518 (*pred_madc<mode>_overflow_scalar): Ditto.
44519 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
44520 (*pred_msbc<mode>_overflow_scalar): Ditto.
44521 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
44523 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44525 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
44526 * config/riscv/riscv-v.cc (simm32_p): Ditto.
44527 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
44528 (class vsbc): Ditto.
44530 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44531 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
44533 * config/riscv/riscv-vector-builtins-shapes.cc
44534 (struct no_mask_policy_def): Ditto.
44536 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44537 * config/riscv/riscv-vector-builtins.cc
44538 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
44539 (rvv_arg_type_info::get_tree_type): Ditto.
44540 (function_expander::use_exact_insn): Ditto.
44541 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
44542 (function_base::use_mask_predication_p): New function.
44543 * config/riscv/vector-iterators.md: New iterator.
44544 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
44545 (@pred_sbc<mode>): Ditto.
44546 (@pred_adc<mode>_scalar): Ditto.
44547 (@pred_sbc<mode>_scalar): Ditto.
44548 (*pred_adc<mode>_scalar): Ditto.
44549 (*pred_adc<mode>_extended_scalar): Ditto.
44550 (*pred_sbc<mode>_scalar): Ditto.
44551 (*pred_sbc<mode>_extended_scalar): Ditto.
44553 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44555 * config/riscv/vector.md: use "zero" reg.
44557 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44559 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
44561 (class vwmulsu): Ditto.
44562 (class vwcvt): Ditto.
44563 (BASE): Add integer widening support.
44564 * config/riscv/riscv-vector-builtins-bases.h: Ditto
44565 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
44566 (vwsub): New class.
44567 (vwmul): New class.
44568 (vwmulu): New class.
44569 (vwmulsu): New class.
44570 (vwaddu): New class.
44571 (vwsubu): New class.
44572 (vwcvt_x): New class.
44573 (vwcvtu_x): New class.
44574 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
44576 (struct widen_alu_def): New class.
44577 (SHAPE): New class.
44578 * config/riscv/riscv-vector-builtins-shapes.h: New class.
44579 * config/riscv/riscv-vector-builtins.cc
44580 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
44581 (rvv_arg_type_info::get_tree_type): Ditto.
44582 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
44584 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
44586 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
44587 * config/riscv/riscv.h (X0_REGNUM): New constant.
44588 * config/riscv/vector-iterators.md: New iterators.
44589 * config/riscv/vector.md
44590 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
44592 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
44594 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
44595 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
44597 (@pred_widen_mulsu<mode>): Ditto.
44598 (@pred_widen_mulsu<mode>_scalar): Ditto.
44599 (@pred_<optab><mode>): Ditto.
44601 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44602 kito-cheng <kito.cheng@sifive.com>
44604 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
44605 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
44607 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44608 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
44612 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
44614 (DEF_RVV_FULL_V_U_OPS): Ditto.
44615 (vint8mf8_t): Ditto.
44616 (vint8mf4_t): Ditto.
44617 (vint8mf2_t): Ditto.
44618 (vint8m1_t): Ditto.
44619 (vint8m2_t): Ditto.
44620 (vint8m4_t): Ditto.
44621 (vint8m8_t): Ditto.
44622 (vint16mf4_t): Ditto.
44623 (vint16mf2_t): Ditto.
44624 (vint16m1_t): Ditto.
44625 (vint16m2_t): Ditto.
44626 (vint16m4_t): Ditto.
44627 (vint16m8_t): Ditto.
44628 (vint32mf2_t): Ditto.
44629 (vint32m1_t): Ditto.
44630 (vint32m2_t): Ditto.
44631 (vint32m4_t): Ditto.
44632 (vint32m8_t): Ditto.
44633 (vint64m1_t): Ditto.
44634 (vint64m2_t): Ditto.
44635 (vint64m4_t): Ditto.
44636 (vint64m8_t): Ditto.
44637 (vuint8mf8_t): Ditto.
44638 (vuint8mf4_t): Ditto.
44639 (vuint8mf2_t): Ditto.
44640 (vuint8m1_t): Ditto.
44641 (vuint8m2_t): Ditto.
44642 (vuint8m4_t): Ditto.
44643 (vuint8m8_t): Ditto.
44644 (vuint16mf4_t): Ditto.
44645 (vuint16mf2_t): Ditto.
44646 (vuint16m1_t): Ditto.
44647 (vuint16m2_t): Ditto.
44648 (vuint16m4_t): Ditto.
44649 (vuint16m8_t): Ditto.
44650 (vuint32mf2_t): Ditto.
44651 (vuint32m1_t): Ditto.
44652 (vuint32m2_t): Ditto.
44653 (vuint32m4_t): Ditto.
44654 (vuint32m8_t): Ditto.
44655 (vuint64m1_t): Ditto.
44656 (vuint64m2_t): Ditto.
44657 (vuint64m4_t): Ditto.
44658 (vuint64m8_t): Ditto.
44659 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
44660 (DEF_RVV_FULL_V_U_OPS): Ditto.
44661 (check_required_extensions): Add vmulh support.
44662 (rvv_arg_type_info::get_tree_type): Ditto.
44663 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
44664 (enum rvv_base_type): Ditto.
44665 * config/riscv/riscv.opt: Add 'V' extension flag.
44666 * config/riscv/vector-iterators.md (su): New iterator.
44667 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
44668 (@pred_mulh<v_su><mode>_scalar): Ditto.
44669 (*pred_mulh<v_su><mode>_scalar): Ditto.
44670 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
44672 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44674 * config/riscv/iterators.md: Add sign_extend/zero_extend.
44675 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
44677 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
44678 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
44681 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
44682 for vsext/vzext support.
44683 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
44685 (DEF_RVV_QEXTI_OPS): Ditto.
44686 (DEF_RVV_OEXTI_OPS): Ditto.
44687 (DEF_RVV_WEXTU_OPS): Ditto.
44688 (DEF_RVV_QEXTU_OPS): Ditto.
44689 (DEF_RVV_OEXTU_OPS): Ditto.
44690 (vint16mf4_t): Ditto.
44691 (vint16mf2_t): Ditto.
44692 (vint16m1_t): Ditto.
44693 (vint16m2_t): Ditto.
44694 (vint16m4_t): Ditto.
44695 (vint16m8_t): Ditto.
44696 (vint32mf2_t): Ditto.
44697 (vint32m1_t): Ditto.
44698 (vint32m2_t): Ditto.
44699 (vint32m4_t): Ditto.
44700 (vint32m8_t): Ditto.
44701 (vint64m1_t): Ditto.
44702 (vint64m2_t): Ditto.
44703 (vint64m4_t): Ditto.
44704 (vint64m8_t): Ditto.
44705 (vuint16mf4_t): Ditto.
44706 (vuint16mf2_t): Ditto.
44707 (vuint16m1_t): Ditto.
44708 (vuint16m2_t): Ditto.
44709 (vuint16m4_t): Ditto.
44710 (vuint16m8_t): Ditto.
44711 (vuint32mf2_t): Ditto.
44712 (vuint32m1_t): Ditto.
44713 (vuint32m2_t): Ditto.
44714 (vuint32m4_t): Ditto.
44715 (vuint32m8_t): Ditto.
44716 (vuint64m1_t): Ditto.
44717 (vuint64m2_t): Ditto.
44718 (vuint64m4_t): Ditto.
44719 (vuint64m8_t): Ditto.
44720 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
44721 (DEF_RVV_QEXTI_OPS): Ditto.
44722 (DEF_RVV_OEXTI_OPS): Ditto.
44723 (DEF_RVV_WEXTU_OPS): Ditto.
44724 (DEF_RVV_QEXTU_OPS): Ditto.
44725 (DEF_RVV_OEXTU_OPS): Ditto.
44726 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
44728 (rvv_arg_type_info::get_tree_type): Ditto.
44729 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
44730 * config/riscv/vector-iterators.md (z): New attribute.
44731 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
44732 (@pred_<optab><mode>_vf4): Ditto.
44733 (@pred_<optab><mode>_vf8): Ditto.
44735 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44737 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
44738 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
44739 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
44740 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44741 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
44745 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
44750 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
44751 (@pred_<optab><mode>_scalar): New pattern.
44752 (*pred_<optab><mode>_scalar): New pattern.
44753 (*pred_<optab><mode>_extended_scalar): New pattern.
44755 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44757 * config/riscv/iterators.md: Add neg and not.
44758 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
44760 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44761 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
44782 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
44783 (struct alu_def): Ditto.
44785 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
44786 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
44787 * config/riscv/vector-iterators.md: New iterator.
44788 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
44790 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44792 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
44794 2023-02-11 Jakub Jelinek <jakub@redhat.com>
44797 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
44798 item->offset bit position is too large to be representable as
44799 unsigned int byte position.
44801 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
44803 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
44805 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
44807 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
44808 valid_combine only when ira_use_lra_p is true.
44810 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
44812 * params.opt (ira-simple-lra-insn-threshold): Add new param.
44813 * ira.cc (ira): Use the param to switch on simple LRA.
44815 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
44817 PR tree-optimization/108687
44818 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
44819 back to RFD_NONE mode for calculations.
44820 (ranger_cache::propagate_cache): Call the internal edge range API
44821 with RFD_READ_ONLY instead of changing the external routine.
44823 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
44825 PR tree-optimization/108520
44826 * gimple-range-infer.cc (check_assume_func): Invoke
44827 gimple_range_global directly instead using global_range_query.
44828 * value-query.cc (get_range_global): Add function context and
44829 avoid calling nonnull_arg_p if not cfun.
44830 (gimple_range_global): Add function context pointer.
44831 * value-query.h (imple_range_global): Add function context.
44833 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
44835 * config/riscv/constraints.md (Wdm): Adjust constraint.
44836 (Wbr): New constraint.
44837 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
44838 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
44839 (emit_vlmax_op): New function.
44840 (emit_nonvlmax_op): Ditto.
44842 (neg_simm5_p): Ditto.
44843 (has_vi_variant_p): Ditto.
44844 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
44845 (emit_vlmax_op): New function.
44846 (emit_nonvlmax_op): Ditto.
44847 (expand_const_vector): Adjust function.
44848 (legitimize_move): Ditto.
44849 (simm32_p): New function.
44851 (neg_simm5_p): Ditto.
44852 (has_vi_variant_p): Ditto.
44853 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
44855 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
44856 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
44859 (vminu): Remove signed cases.
44861 (vdiv): Remove unsigned cases.
44863 (vdivu): Remove signed cases.
44867 (vrsub): New class.
44872 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
44873 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
44874 * config/riscv/vector-iterators.md: New iterators.
44875 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
44877 (@pred_<optab><mode>_scalar): New pattern.
44878 (@pred_sub<mode>_reverse_scalar): Ditto.
44879 (*pred_<optab><mode>_scalar): Ditto.
44880 (*pred_<optab><mode>_extended_scalar): Ditto.
44881 (*pred_sub<mode>_reverse_scalar): Ditto.
44882 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
44884 2023-02-10 Richard Biener <rguenther@suse.de>
44886 PR tree-optimization/108724
44887 * tree-vect-stmts.cc (vectorizable_operation): Avoid
44888 using word_mode vectors when vector lowering will
44889 decompose them to elementwise operations.
44891 2023-02-10 Jakub Jelinek <jakub@redhat.com>
44894 2023-02-09 Martin Liska <mliska@suse.cz>
44897 * doc/extend.texi: Document that the function
44898 does not work correctly for old VIA processors.
44900 2023-02-10 Andrew Pinski <apinski@marvell.com>
44901 Andrew Macleod <amacleod@redhat.com>
44903 PR tree-optimization/108684
44904 * tree-ssa-dce.cc (simple_dce_from_worklist):
44905 Check all ssa names and not just non-vdef ones
44906 before accepting the inline-asm.
44907 Call unlink_stmt_vdef on the statement before
44910 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
44912 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
44913 * ira.cc (validate_equiv_mem): Check memref address variance.
44914 (no_equiv): Clear caller_save_p flag.
44915 (update_equiv_regs): Define caller save equivalence for
44917 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
44918 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
44919 call_save_p. Use caller save equivalence depending on the arg.
44920 (split_reg): Adjust the call.
44922 2023-02-09 Jakub Jelinek <jakub@redhat.com>
44925 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
44926 (cpu_indicator_init): Call get_available_features for all CPUs with
44927 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
44930 2023-02-09 Jakub Jelinek <jakub@redhat.com>
44932 PR tree-optimization/108688
44933 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
44934 of BIT_INSERT_EXPR extracting exactly all inserted bits even
44935 when without mode precision. Formatting fixes.
44937 2023-02-09 Andrew Pinski <apinski@marvell.com>
44939 PR tree-optimization/108688
44940 * match.pd (bit_field_ref [bit_insert]): Avoid generating
44941 BIT_FIELD_REFs of non-mode-precision integral operands.
44943 2023-02-09 Martin Liska <mliska@suse.cz>
44946 * doc/extend.texi: Document that the function
44947 does not work correctly for old VIA processors.
44949 2023-02-09 Andreas Schwab <schwab@suse.de>
44951 * lto-wrapper.cc (merge_and_complain): Handle
44952 -funwind-tables and -fasynchronous-unwind-tables.
44953 (append_compiler_options): Likewise.
44955 2023-02-09 Richard Biener <rguenther@suse.de>
44957 PR tree-optimization/26854
44958 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
44959 view around insert_updated_phi_nodes_for.
44960 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
44962 (walk_aliased_vdefs_1): Likewise.
44964 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
44966 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
44968 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
44971 * config.gcc (tm_mlib_file): Define new variable.
44973 2023-02-08 Jakub Jelinek <jakub@redhat.com>
44975 PR tree-optimization/108692
44976 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
44977 widened_code which is different from code, don't call
44978 vect_look_through_possible_promotion but instead just check op is
44979 SSA_NAME with integral type for which vect_is_simple_use is true
44980 and call set_op on this_unprom.
44982 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
44984 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
44986 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
44988 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
44989 to 'aarch_ra_sign_key'.
44990 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
44992 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
44993 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
44994 * config/arm/arm.opt: Define.
44996 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
44998 PR tree-optimization/108316
44999 * tree-vect-stmts.cc (get_load_store_type): When using
45000 internal functions for gather/scatter, make sure that the type
45001 of the offset argument is consistent with the offset vector type.
45003 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
45006 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
45008 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
45009 * ira.cc (validate_equiv_mem): Check memref address variance.
45010 (update_equiv_regs): Define caller save equivalence for
45012 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
45013 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
45014 call_save_p. Use caller save equivalence depending on the arg.
45015 (split_reg): Adjust the call.
45017 2023-02-08 Jakub Jelinek <jakub@redhat.com>
45019 * tree.def (SAD_EXPR): Remove outdated comment about missing
45022 2023-02-07 Marek Polacek <polacek@redhat.com>
45024 * doc/invoke.texi: Update -fchar8_t documentation.
45026 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
45028 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
45029 * ira.cc (validate_equiv_mem): Check memref address variance.
45030 (update_equiv_regs): Define caller save equivalence for
45032 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
45033 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
45034 call_save_p. Use caller save equivalence depending on the arg.
45035 (split_reg): Adjust the call.
45037 2023-02-07 Richard Biener <rguenther@suse.de>
45039 PR tree-optimization/26854
45040 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
45041 instead of immediate uses.
45043 2023-02-07 Jakub Jelinek <jakub@redhat.com>
45045 PR tree-optimization/106923
45046 * ipa-split.cc (execute_split_functions): Don't split returns_twice
45049 2023-02-07 Jakub Jelinek <jakub@redhat.com>
45051 PR tree-optimization/106433
45052 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
45053 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
45055 2023-02-07 Jan Hubicka <jh@suse.cz>
45057 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
45060 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
45062 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
45063 (process_asm): Create a constructor for GCN_STACK_SIZE.
45064 (main): Parse the -mstack-size option.
45066 2023-02-06 Alex Coplan <alex.coplan@arm.com>
45069 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
45070 Use correct constraint for operand 3.
45072 2023-02-06 Martin Jambor <mjambor@suse.cz>
45074 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
45076 2023-02-06 Xi Ruoyao <xry111@xry111.site>
45078 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
45079 New define_int_iterator.
45080 (bytepick_d_ashift_amount): Likewise.
45081 (bytepick_imm): New define_int_attr.
45082 (bytepick_w_lshiftrt_amount): Likewise.
45083 (bytepick_d_lshiftrt_amount): Likewise.
45084 (bytepick_w_<bytepick_imm>): New define_insn template.
45085 (bytepick_w_<bytepick_imm>_extend): Likewise.
45086 (bytepick_d_<bytepick_imm>): Likewise.
45087 (bytepick_w): Remove unused define_insn.
45088 (bytepick_d): Likewise.
45089 (UNSPEC_BYTEPICK_W): Remove unused unspec.
45090 (UNSPEC_BYTEPICK_D): Likewise.
45091 * config/loongarch/predicates.md (const_0_to_3_operand):
45092 Remove unused define_predicate.
45093 (const_0_to_7_operand): Likewise.
45095 2023-02-06 Jakub Jelinek <jakub@redhat.com>
45097 PR tree-optimization/108655
45098 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
45099 or -fsanitize=unreachable -fsanitize-trap=unreachable return
45100 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
45102 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
45104 * doc/install.texi (Specific): Remove PW32.
45106 2023-02-03 Jakub Jelinek <jakub@redhat.com>
45108 PR tree-optimization/108647
45109 * range-op.cc (operator_equal::op1_range,
45110 operator_not_equal::op1_range): Don't test op2 bound
45111 equality if op2.undefined_p (), instead set_varying.
45112 (operator_lt::op1_range, operator_le::op1_range,
45113 operator_gt::op1_range, operator_ge::op1_range): Return false if
45114 op2.undefined_p ().
45115 (operator_lt::op2_range, operator_le::op2_range,
45116 operator_gt::op2_range, operator_ge::op2_range): Return false if
45117 op1.undefined_p ().
45119 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
45121 PR tree-optimization/108639
45122 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
45124 (irange::operator==): Same.
45126 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
45128 PR tree-optimization/108647
45129 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
45130 (foperator_lt::op2_range): Same.
45131 (foperator_le::op1_range): Same.
45132 (foperator_le::op2_range): Same.
45133 (foperator_gt::op1_range): Same.
45134 (foperator_gt::op2_range): Same.
45135 (foperator_ge::op1_range): Same.
45136 (foperator_ge::op2_range): Same.
45137 (foperator_unordered_lt::op1_range): Same.
45138 (foperator_unordered_lt::op2_range): Same.
45139 (foperator_unordered_le::op1_range): Same.
45140 (foperator_unordered_le::op2_range): Same.
45141 (foperator_unordered_gt::op1_range): Same.
45142 (foperator_unordered_gt::op2_range): Same.
45143 (foperator_unordered_ge::op1_range): Same.
45144 (foperator_unordered_ge::op2_range): Same.
45146 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
45148 PR tree-optimization/107570
45149 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
45151 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
45153 * doc/gm2.texi (Internals): Remove from menu.
45154 (Using): Comment out ifnohtml conditional.
45155 (Documentation): Use gcc url.
45156 (License): Node simplified.
45157 (Copying): New node. Include gpl_v3_without_node.
45158 (Contributing): Node simplified.
45159 (Internals): Commented out.
45160 (Libraries): Node simplified.
45163 (Functions): Ditto.
45165 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
45167 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
45169 (mve_vqshluq_m_n_s<mode>): Likewise.
45170 (mve_vshlq_m_<supf><mode>): Likewise.
45171 (mve_vsriq_m_n_<supf><mode>): Likewise.
45172 (mve_vsubq_m_<supf><mode>): Likewise.
45174 2023-02-03 Martin Jambor <mjambor@suse.cz>
45177 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
45178 when comparing to an IPA-CP value.
45179 (dump_list_of_param_indices): New function.
45180 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
45181 Dump removed candidates using dump_list_of_param_indices.
45182 * ipa-param-manipulation.cc
45183 (ipa_param_body_adjustments::modify_expression): Add assert checking
45184 sizes of a VIEW_CONVERT_EXPR will match.
45185 (ipa_param_body_adjustments::modify_assignment): Likewise.
45187 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
45189 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
45190 * config/riscv/riscv.cc: Ditto.
45192 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45194 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
45198 * config/riscv/vector.md: Ditto.
45200 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45202 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
45203 * config/riscv/riscv-vector-builtins-bases.cc: New class.
45204 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
45207 * config/riscv/riscv-vector-builtins.cc: Ditto.
45208 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
45210 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
45212 * toplev.cc (toplev::main): Only print the version information header
45213 from toplevel main().
45215 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
45217 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
45218 cond_{ashl|ashr|lshr}
45220 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
45222 PR rtl-optimization/108086
45223 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
45224 Adjust size-related commentary accordingly.
45226 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
45228 PR rtl-optimization/108508
45229 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
45230 the splay tree search gives the first clobber in the second group,
45231 make sure that the root of the first clobber group is updated
45232 correctly. Enter the new clobber group into the definition splay
45235 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
45237 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
45238 Fix finding best match score.
45240 2023-02-02 Jakub Jelinek <jakub@redhat.com>
45243 PR rtl-optimization/108463
45245 * cselib.cc (cselib_current_insn): Move declaration earlier.
45246 (cselib_hasher::equal): For debug only locs, temporarily override
45247 cselib_current_insn to their l->setting_insn for the
45248 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
45249 promote some debug locs.
45250 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
45251 when using cselib call cselib_lookup_from_insn on the address but
45252 don't substitute it.
45254 2023-02-02 Richard Biener <rguenther@suse.de>
45256 PR middle-end/108625
45257 * genmatch.cc (expr::gen_transform): Also disallow resimplification
45258 from pushing to lseq with force_leaf.
45259 (dt_simplify::gen_1): Likewise.
45261 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
45263 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
45264 (struct kernargs): Replace the common content with kernargs_abi.
45265 (struct heap): Delete.
45266 (main): Read GCN_STACK_SIZE envvar.
45267 Allocate space for the device stacks.
45268 Write the new kernargs fields.
45269 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
45270 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
45271 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
45272 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
45273 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
45274 Set up the stacks from the values in the kernargs, not private.
45275 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
45276 (gcn_hsa_declare_function_name): Turn off the private segment.
45277 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
45278 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
45279 * config/gcn/gcn.opt (mstack-size): Change the description.
45281 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
45284 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
45285 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
45286 addressing MVE predicate modes.
45287 (mve_bool_vec_to_const): Change to represent correct MVE predicate
45289 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
45291 (arm_vector_mode_supported_p): Likewise.
45292 (arm_mode_to_pred_mode): Add V2QI.
45293 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
45295 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
45296 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
45297 (v2qi_UP): New macro.
45298 (v4bi_UP): New macro.
45299 (v8bi_UP): New macro.
45300 (v16bi_UP): New macro.
45301 (arm_expand_builtin_args): Make it able to expand the new predicate
45303 * config/arm/arm-modes.def (V2QI): New mode.
45304 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
45305 Pred4x4_t): Remove unused predicate builtin types.
45306 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
45307 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
45308 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
45309 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
45310 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
45311 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
45312 of MODE_VECTOR_BOOL.
45313 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
45314 (MVE_VPRED): Likewise.
45315 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
45316 (MVE_vctp): New mode attribute.
45320 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
45321 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
45323 (mve_vpnothi): Rename this...
45324 (mve_vpnotv16bi): ... to this.
45325 (mve_vctp<mode1>q_mhi): Rename this...
45326 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
45327 (mve_vldrdq_gather_base_z_<supf>v2di,
45328 mve_vldrdq_gather_offset_z_<supf>v2di,
45329 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
45330 mve_vstrdq_scatter_base_p_<supf>v2di,
45331 mve_vstrdq_scatter_offset_p_<supf>v2di,
45332 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
45333 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
45334 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
45335 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
45336 mve_vldrdq_gather_base_wb_z_<supf>v2di,
45337 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
45338 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
45340 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
45342 (VCTP): ... with this.
45343 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
45344 (VCTP_M): ... with this.
45345 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
45346 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
45348 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
45351 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
45352 (arm_modes_tieable_p): Make MVE predicate modes tieable.
45353 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
45354 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
45355 simplify_subreg to simplify subregs where the outermode is not scalar.
45357 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
45360 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
45361 new qualifiers parameter and use unsigned short type for MVE predicate.
45362 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
45364 (arm_init_crypto_builtins): Likewise.
45366 2023-02-02 Jakub Jelinek <jakub@redhat.com>
45369 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
45370 * internal-fn.def (TRAP): Remove.
45371 * internal-fn.cc (expand_TRAP): Remove.
45372 * tree.cc (build_common_builtin_nodes): Define
45373 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
45374 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
45375 instead of BUILT_IN_TRAP.
45376 * gimple.cc (gimple_build_builtin_unreachable): Remove
45377 emitting internal function for BUILT_IN_TRAP.
45378 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
45379 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
45380 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
45381 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
45382 BUILT_IN_UNREACHABLE_TRAP.
45383 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
45384 * tree-cfg.cc (verify_gimple_call,
45385 pass_warn_function_return::execute): Likewise.
45386 * attribs.cc (decl_attributes): Don't report exclusions on
45387 BUILT_IN_UNREACHABLE_TRAP either.
45389 2023-02-02 liuhongt <hongtao.liu@intel.com>
45391 PR tree-optimization/108601
45392 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
45393 * tree-vect-loop.cc
45394 (vectorizable_nonlinear_induction): Remove
45395 vect_can_peel_nonlinear_iv_p.
45396 (vect_can_peel_nonlinear_iv_p): Don't peel
45397 nonlinear iv(mult or shift) for epilog when vf is not
45398 constant and moved the defination to ..
45399 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
45402 2023-02-02 Jakub Jelinek <jakub@redhat.com>
45404 PR middle-end/108435
45405 * tree-nested.cc (convert_nonlocal_omp_clauses)
45406 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
45407 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
45408 before calling declare_vars.
45409 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
45410 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
45411 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
45412 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
45414 2023-02-01 Tamar Christina <tamar.christina@arm.com>
45416 * common/config/aarch64/aarch64-common.cc
45417 (struct aarch64_option_extension): Add native_detect and document struct
45419 (all_extensions): Set new field native_detect.
45420 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
45423 2023-02-01 Martin Liska <mliska@suse.cz>
45425 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
45428 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
45430 PR tree-optimization/108356
45431 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
45432 do a search of the DOM tree for a range.
45434 2023-02-01 Martin Liska <mliska@suse.cz>
45437 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
45438 ony non-null values.
45439 * ipa.cc (walk_polymorphic_call_targets): Likewise.
45441 2023-02-01 Martin Liska <mliska@suse.cz>
45444 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
45447 2023-02-01 Jakub Jelinek <jakub@redhat.com>
45450 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
45451 subregs in DEBUG_INSNs.
45453 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
45455 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
45457 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
45459 * config/s390/s390.cc (s390_restore_gpr_p): New function.
45460 (s390_preserve_gpr_arg_in_range_p): New function.
45461 (s390_preserve_gpr_arg_p): New function.
45462 (s390_preserve_fpr_arg_p): New function.
45463 (s390_register_info_stdarg_fpr): Rename to ...
45464 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
45465 (s390_register_info_stdarg_gpr): Rename to ...
45466 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
45467 (s390_register_info): Use the renamed functions above.
45468 (s390_optimize_register_info): Likewise.
45469 (save_fpr): Generate CFI for -mpreserve-args.
45470 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
45471 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
45472 (s390_optimize_prologue): Likewise.
45473 * config/s390/s390.opt: New option -mpreserve-args
45475 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
45477 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
45478 (restore_gprs): Likewise.
45479 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
45480 frame pointer if a frame-pointer is used.
45481 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
45482 * config/s390/s390.md (stack_tie): Add a register operand and
45484 (@stack_tie<mode>): ... this.
45486 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
45488 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
45489 EMIT_CFI parameter.
45490 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
45491 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
45493 2023-02-01 Richard Biener <rguenther@suse.de>
45495 PR middle-end/108500
45496 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
45497 with tree traversal algorithm.
45499 2023-02-01 Jason Merrill <jason@redhat.com>
45501 * doc/invoke.texi: Document -Wno-changes-meaning.
45503 2023-02-01 David Malcolm <dmalcolm@redhat.com>
45505 * doc/invoke.texi (Static Analyzer Options): Add notes about
45506 limitations of -fanalyzer.
45508 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45510 * config/riscv/constraints.md (vj): New.
45512 * config/riscv/iterators.md: Add more opcode.
45513 * config/riscv/predicates.md (vector_arith_operand): New.
45514 (vector_neg_arith_operand): New.
45515 (vector_shift_operand): New.
45516 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
45517 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
45534 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
45551 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
45552 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
45553 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
45554 (DEF_RVV_U_OPS): New.
45555 (rvv_arg_type_info::get_base_vector_type): Handle
45556 RVV_BASE_shift_vector.
45557 (rvv_arg_type_info::get_tree_type): Ditto.
45558 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
45559 RVV_BASE_shift_vector.
45560 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
45561 * config/riscv/vector-iterators.md: Handle more opcode.
45562 * config/riscv/vector.md (@pred_<optab><mode>): New.
45564 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
45567 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
45570 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
45572 PR tree-optimization/108608
45573 * tree-vect-loop.cc (vect_transform_reduction): Handle single
45574 def-use cycles that involve function calls rather than tree codes.
45576 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
45578 PR tree-optimization/108385
45579 * gimple-range-gori.cc (gori_compute::compute_operand_range):
45580 Allow VARYING computations to continue if there is a relation.
45581 * range-op.cc (pointer_plus_operator::op2_range): New.
45583 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
45585 PR tree-optimization/108359
45586 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
45587 (range_operator::fold_range): If op1 is equivalent to op2 then
45588 invoke new fold_in_parts_equiv to operate on sub-components.
45589 * range-op.h (wi_fold_in_parts_equiv): New prototype.
45591 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
45593 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
45594 not abort calculations if there is a valid relation available.
45595 (gori_compute::refine_using_relation): Pass correct relation trio.
45596 (gori_compute::compute_operand1_range): Create trio and use it.
45597 (gori_compute::compute_operand2_range): Ditto.
45598 * range-op.cc (operator_plus::op1_range): Use correct trio member.
45599 (operator_minus::op1_range): Use correct trio member.
45600 * value-relation.cc (value_relation::create_trio): New.
45601 * value-relation.h (value_relation::create_trio): New prototype.
45603 2023-01-31 Jakub Jelinek <jakub@redhat.com>
45606 * config/i386/i386-expand.cc
45607 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
45608 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
45609 equal to bitsize of mode.
45611 2023-01-31 Jakub Jelinek <jakub@redhat.com>
45613 PR rtl-optimization/108596
45614 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
45615 ends with asm goto and has a crossing fallthrough edge to the same bb
45616 that contains at least one of its labels by restoring EDGE_CROSSING
45617 flag even on possible edge from cur_bb to new_bb successor.
45619 2023-01-31 Jakub Jelinek <jakub@redhat.com>
45622 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
45623 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
45624 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
45625 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
45626 uninitialized automatic variable __W.
45628 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
45630 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
45632 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45634 * config/riscv/riscv-protos.h (get_vector_mode): New function.
45635 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
45636 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
45637 (class loadstore): Adjust for indexed loads/stores support.
45639 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
45640 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
45656 * config/riscv/riscv-vector-builtins-shapes.cc
45657 (struct indexed_loadstore_def): New class.
45659 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
45660 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
45661 for indexed loads/stores support.
45662 (check_required_extensions): Ditto.
45663 (rvv_arg_type_info::get_base_vector_type): New function.
45664 (rvv_arg_type_info::get_tree_type): Ditto.
45665 (function_builder::add_unique_function): Adjust for indexed loads/stores
45667 (function_expander::use_exact_insn): New function.
45668 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
45669 indexed loads/stores support.
45670 (struct rvv_arg_type_info): Ditto.
45671 (function_expander::index_mode): New function.
45672 (function_base::apply_tail_policy_p): Ditto.
45673 (function_base::apply_mask_policy_p): Ditto.
45674 * config/riscv/vector-iterators.md (unspec): New unspec.
45675 * config/riscv/vector.md (unspec): Ditto.
45676 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
45678 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
45679 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
45680 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
45681 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
45682 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
45683 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
45684 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
45685 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
45686 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
45687 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
45688 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
45689 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
45690 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
45692 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
45694 * config.gcc: Recognize x86_64-*-gnu* targets and include
45696 * config/i386/gnu64.h: Define configuration for new target
45697 including ld.so location.
45699 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
45701 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
45702 ampere1a to include SM4.
45704 2023-01-30 Andrew Pinski <apinski@marvell.com>
45706 PR tree-optimization/108582
45707 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
45708 for middlebb to have no phi nodes.
45710 2023-01-30 Richard Biener <rguenther@suse.de>
45712 PR tree-optimization/108574
45713 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
45714 sameval and def, ignore the equivalence if there's the
45715 danger of oscillating between two values.
45717 2023-01-30 Andreas Schwab <schwab@suse.de>
45719 * common/config/riscv/riscv-common.cc
45720 (riscv_option_optimization_table)
45721 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
45722 -fasynchronous-unwind-tables and -funwind-tables.
45723 * config.gcc (riscv*-*-linux*): Define
45724 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
45726 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
45728 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
45729 value of includedir.
45731 2023-01-30 Richard Biener <rguenther@suse.de>
45734 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
45737 2023-01-30 liuhongt <hongtao.liu@intel.com>
45739 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
45740 * doc/invoke.texi: Ditto.
45742 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
45744 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
45745 (stmt_may_terminate_function_p): If assuming return or EH
45746 volatile asm is safe.
45747 (find_always_executed_bbs): Fix handling of terminating BBS and
45748 infinite loops; add debug output.
45749 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
45751 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
45753 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
45754 off-by-one in checking the permissible shift-amount.
45756 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
45758 * doc/extend.texi (Named Address Spaces): Update link to the
45761 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
45763 * doc/standards.texi (Standards): Fix markup.
45765 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
45767 * doc/standards.texi (Standards): Update link to Objective-C book.
45769 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
45771 * doc/invoke.texi (Instrumentation Options): Update reference to
45774 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
45776 * doc/standards.texi: Update Go1 link.
45778 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45780 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
45781 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
45784 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45785 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
45787 * config/riscv/riscv-vector-builtins.cc
45788 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
45789 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
45790 (@pred_strided_store<mode>): Ditto.
45792 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45794 * config/riscv/vector.md (tail_policy_op_idx): Remove.
45795 (mask_policy_op_idx): Remove.
45796 (avl_type_op_idx): Remove.
45798 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
45800 PR tree-optimization/96373
45801 * tree.h (sign_mask_for): Declare.
45802 * tree.cc (sign_mask_for): New function.
45803 (signed_or_unsigned_type_for): For vector types, try to use the
45804 related_int_vector_mode.
45805 * genmatch.cc (commutative_op): Handle conditional internal functions.
45806 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
45808 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
45810 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
45811 Use the likely minimum VF when bounding the denominators to
45812 the estimated number of iterations.
45814 2023-01-27 Richard Biener <rguenther@suse.de>
45817 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
45818 and -Ofast FP environment side-effects.
45820 2023-01-27 Richard Biener <rguenther@suse.de>
45823 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
45824 Don't add crtfastmath.o for -shared.
45826 2023-01-27 Richard Biener <rguenther@suse.de>
45829 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
45832 2023-01-27 Richard Biener <rguenther@suse.de>
45835 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
45836 crtfastmath.o for -shared.
45838 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
45840 PR tree-optimization/108306
45841 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
45842 varying for shifts that are always out of void range.
45843 (operator_rshift::fold_range): Return [0, 0] not
45844 varying for shifts that are always out of void range.
45846 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
45848 PR tree-optimization/108447
45849 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
45850 Do not attempt to fold HONOR_NAN types.
45852 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45854 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
45855 Remove _m suffix for "vop_m" C++ overloaded API name.
45857 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45859 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
45860 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
45861 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
45863 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
45864 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
45865 (vbool64_t): Ditto.
45866 (vbool32_t): Ditto.
45867 (vbool16_t): Ditto.
45872 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
45873 (rvv_arg_type_info::get_tree_type): Ditto.
45874 (function_expander::use_contiguous_load_insn): Ditto.
45875 * config/riscv/vector.md (@pred_store<mode>): Ditto.
45877 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45879 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
45880 (vsetvl_discard_result_insn_p): New function.
45881 (reg_killed_by_bb_p): rename to find_reg_killed_by.
45882 (find_reg_killed_by): New name.
45883 (get_vl): allow it to be called by more functions.
45884 (has_vsetvl_killed_avl_p): Add condition.
45885 (get_avl): allow it to be called by more functions.
45886 (insn_should_be_added_p): New function.
45887 (get_all_nonphi_defs): Refine function.
45888 (get_all_sets): Ditto.
45889 (get_same_bb_set): New function.
45890 (any_insn_in_bb_p): Ditto.
45891 (any_set_in_bb_p): Ditto.
45892 (get_vl_vtype_info): Add VLMAX forward optimization.
45893 (source_equal_p): Fix issues.
45894 (extract_single_source): Refine.
45895 (avl_info::multiple_source_equal_p): New function.
45896 (avl_info::operator==): Adjust for final version.
45897 (vl_vtype_info::operator==): Ditto.
45898 (vl_vtype_info::same_avl_p): Ditto.
45899 (vector_insn_info::parse_insn): Ditto.
45900 (vector_insn_info::available_p): New function.
45901 (vector_insn_info::merge): Adjust for final version.
45902 (vector_insn_info::dump): Add hard_empty.
45903 (pass_vsetvl::hard_empty_block_p): New function.
45904 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
45905 (pass_vsetvl::forward_demand_fusion): Ditto.
45906 (pass_vsetvl::demand_fusion): Ditto.
45907 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
45908 (pass_vsetvl::compute_local_properties): Adjust for final version.
45909 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
45910 (pass_vsetvl::refine_vsetvls): Ditto.
45911 (pass_vsetvl::commit_vsetvls): Ditto.
45912 (pass_vsetvl::propagate_avl): New function.
45913 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
45914 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
45916 2023-01-27 Jakub Jelinek <jakub@redhat.com>
45919 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
45920 from size_t to int.
45922 2023-01-27 Jakub Jelinek <jakub@redhat.com>
45925 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
45926 redirection of calls to __builtin_trap in addition to redirection
45927 to __builtin_unreachable.
45929 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45931 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
45933 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45935 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
45936 (emit_vsetvl_insn): Ditto.
45938 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45940 * config/riscv/vector.md: Fix constraints.
45942 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45944 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
45946 2023-01-27 Patrick Palka <ppalka@redhat.com>
45947 Jakub Jelinek <jakub@redhat.com>
45949 * tree-core.h (tree_code_type, tree_code_length): For
45950 C++17 and later, add inline keyword, otherwise don't define
45951 the arrays, but declare extern arrays.
45952 * tree.cc (tree_code_type, tree_code_length): Define these
45953 arrays for C++14 and older.
45955 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45957 * config/riscv/riscv-vsetvl.h: Change it into public.
45959 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45961 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
45964 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45966 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
45968 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45970 * config/riscv/vector.md: Fix incorrect attributes.
45972 2023-01-27 Richard Biener <rguenther@suse.de>
45975 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
45976 Don't add crtfastmath.o for -shared.
45978 2023-01-27 Alexandre Oliva <oliva@gnu.org>
45980 * doc/options.texi (option, RejectNegative): Mention that
45981 -g-started options are also implicitly negatable.
45983 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
45985 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
45986 Use get_typenode_from_name to get fixed-width integer type
45988 * config/riscv/riscv-vector-builtins.def: Update define with
45989 fixed-width integer type nodes.
45991 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
45993 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
45994 (real_insn_and_same_bb_p): New function.
45995 (same_bb_and_after_or_equal_p): Remove it.
45996 (before_p): New function.
45997 (reg_killed_by_bb_p): Ditto.
45998 (has_vsetvl_killed_avl_p): Ditto.
45999 (get_vl): Move location so that we can call it.
46000 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
46001 (available_occurrence_p): Ditto.
46002 (dominate_probability_p): Remove it.
46003 (can_backward_propagate_p): Remove it.
46004 (get_all_nonphi_defs): New function.
46005 (get_all_predecessors): Ditto.
46006 (any_insn_in_bb_p): Ditto.
46007 (insert_vsetvl): Adjust AVL REG.
46008 (source_equal_p): New function.
46009 (extract_single_source): Ditto.
46010 (avl_info::single_source_equal_p): Ditto.
46011 (avl_info::operator==): Adjust for AVL=REG.
46012 (vl_vtype_info::same_avl_p): Ditto.
46013 (vector_insn_info::set_demand_info): Remove it.
46014 (vector_insn_info::compatible_p): Adjust for AVL=REG.
46015 (vector_insn_info::compatible_avl_p): New function.
46016 (vector_insn_info::merge): Adjust AVL=REG.
46017 (vector_insn_info::dump): Ditto.
46018 (pass_vsetvl::merge_successors): Remove it.
46019 (enum fusion_type): New enum.
46020 (pass_vsetvl::get_backward_fusion_type): New function.
46021 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
46022 (pass_vsetvl::forward_demand_fusion): Ditto.
46023 (pass_vsetvl::demand_fusion): Ditto.
46024 (pass_vsetvl::prune_expressions): Ditto.
46025 (pass_vsetvl::compute_local_properties): Ditto.
46026 (pass_vsetvl::cleanup_vsetvls): Ditto.
46027 (pass_vsetvl::commit_vsetvls): Ditto.
46028 (pass_vsetvl::init): Ditto.
46029 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
46030 (enum merge_type): New enum.
46032 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46034 * config/riscv/riscv-vsetvl.cc
46035 (vector_infos_manager::vector_infos_manager): Add probability.
46036 (vector_infos_manager::dump): Ditto.
46037 (pass_vsetvl::compute_probabilities): Ditto.
46038 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
46040 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46042 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
46043 (vector_insn_info::merge): Ditto.
46044 (vector_insn_info::dump): Ditto.
46045 (pass_vsetvl::merge_successors): Ditto.
46046 (pass_vsetvl::backward_demand_fusion): Ditto.
46047 (pass_vsetvl::forward_demand_fusion): Ditto.
46048 (pass_vsetvl::commit_vsetvls): Ditto.
46049 * config/riscv/riscv-vsetvl.h: Ditto.
46051 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46053 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
46056 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46058 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
46060 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46062 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
46063 Add pre-check for redundant flow.
46065 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46067 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
46068 (vector_infos_manager::free_bitmap_vectors): Ditto.
46069 (pass_vsetvl::pre_vsetvl): Adjust codes.
46070 * config/riscv/riscv-vsetvl.h: New function declaration.
46072 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46074 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
46075 (vector_insn_info::set_demand_info): New function.
46076 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
46077 (pass_vsetvl::merge_successors): Ditto.
46078 (pass_vsetvl::compute_global_backward_infos): Ditto.
46079 (pass_vsetvl::backward_demand_fusion): Ditto.
46080 (pass_vsetvl::forward_demand_fusion): Ditto.
46081 (pass_vsetvl::demand_fusion): New function.
46082 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
46083 * config/riscv/riscv-vsetvl.h: New function declaration.
46085 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46087 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
46089 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46091 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
46092 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
46094 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46096 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
46097 (backward_propagate_worthwhile_p): Fix non-worthwhile.
46099 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46101 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
46103 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46105 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
46106 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
46107 (pass_vsetvl::commit_vsetvls): Ditto.
46108 * config/riscv/riscv-vsetvl.h: New function declaration.
46110 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46112 * config/riscv/vector.md:
46114 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46116 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
46117 pred_store for vse.
46118 * config/riscv/riscv-vector-builtins.cc
46119 (function_expander::add_mem_operand): Refine function.
46120 (function_expander::use_contiguous_load_insn): Adjust new
46122 (function_expander::use_contiguous_store_insn): Ditto.
46123 * config/riscv/riscv-vector-builtins.h: Refine function.
46124 * config/riscv/vector.md (@pred_store<mode>): New pattern.
46126 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
46128 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
46130 2023-01-26 Marek Polacek <polacek@redhat.com>
46132 PR middle-end/108543
46133 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
46134 if it was previously set.
46136 2023-01-26 Jakub Jelinek <jakub@redhat.com>
46138 PR tree-optimization/108540
46139 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
46140 are singletons, use range_true even if op1 != op2
46141 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
46142 even if intersection of the ranges is empty and one has
46143 zero low bound and another zero high bound, use range_true_and_false
46144 rather than range_false.
46145 (foperator_not_equal::fold_range): If both op1 and op2
46146 are singletons, use range_false even if op1 != op2
46147 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
46148 even if intersection of the ranges is empty and one has
46149 zero low bound and another zero high bound, use range_true_and_false
46150 rather than range_true.
46152 2023-01-26 Jakub Jelinek <jakub@redhat.com>
46154 * value-relation.cc (kind_string): Add const.
46155 (rr_negate_table, rr_swap_table, rr_intersect_table,
46156 rr_union_table, rr_transitive_table): Add static const, change
46157 element type from relation_kind to unsigned char.
46158 (relation_negate, relation_swap, relation_intersect, relation_union,
46159 relation_transitive): Cast rr_*_table element to relation_kind.
46160 (relation_to_code): Add static const.
46161 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
46163 2023-01-26 Richard Biener <rguenther@suse.de>
46165 PR tree-optimization/108547
46166 * gimple-predicate-analysis.cc (value_sat_pred_p):
46169 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
46171 PR tree-optimization/108522
46172 * tree-object-size.cc (compute_object_offset): Make EXPR
46173 argument non-const. Call component_ref_field_offset.
46175 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
46177 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
46178 FEATURE_STRING field.
46180 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
46182 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
46184 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
46188 * gcc.cc: Provide default specs for Modula-2 so that when the
46189 language is not built-in better diagnostics are emitted for
46190 attempts to use .mod or .m2i file extensions.
46192 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46194 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
46196 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46198 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
46200 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46202 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
46205 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46207 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
46209 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
46211 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
46213 2023-01-25 Richard Biener <rguenther@suse.de>
46215 PR tree-optimization/108523
46216 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
46217 backedge value for the result when using predication to
46220 2023-01-25 Richard Biener <rguenther@suse.de>
46222 * doc/lto.texi (Command line options): Reword and update reference
46223 to removed lto_read_all_file_options.
46225 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
46227 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
46230 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
46232 * doc/contrib.texi: Add Jose E. Marchesi.
46234 2023-01-25 Jakub Jelinek <jakub@redhat.com>
46236 PR tree-optimization/108498
46237 * gimple-ssa-store-merging.cc (class store_operand_info):
46238 End coment with full stop rather than comma.
46239 (split_group): Likewise.
46240 (merged_store_group::apply_stores): Clear string_concatenation if
46241 start or end aren't on a byte boundary.
46243 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
46244 Jakub Jelinek <jakub@redhat.com>
46246 PR tree-optimization/108522
46247 * tree-object-size.cc (compute_object_offset): Use
46248 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
46250 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46252 * config/xtensa/xtensa.md:
46253 Fix exit from loops detecting references before overwriting in the
46256 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
46258 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
46259 do elimination but only for hard register.
46260 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
46261 calls of get_hard_regno.
46263 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
46265 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
46268 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
46271 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
46272 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
46275 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
46277 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
46278 and only include 'csky/t-csky-linux' when enable multilib.
46279 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
46280 define it when disable multilib.
46282 2023-01-24 Richard Biener <rguenther@suse.de>
46284 PR tree-optimization/108500
46285 * dominance.h (calculate_dominance_info): Add parameter
46286 to indicate fast-query compute, defaulted to true.
46287 * dominance.cc (calculate_dominance_info): Honor
46288 fast-query compute parameter.
46289 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
46290 not compute the dominator fast-query DFS numbers.
46292 2023-01-24 Eric Biggers <ebiggers@google.com>
46295 * optc-save-gen.awk: Fix copy-and-paste error.
46297 2023-01-24 Jakub Jelinek <jakub@redhat.com>
46300 * cgraphbuild.cc: Include gimplify.h.
46301 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
46302 their corresponding DECL_VALUE_EXPR expressions after unsharing.
46304 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46307 * config.gcc (tm_file): Move the variable out of loop.
46309 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
46310 Yang Yujie <yangyujie@loongson.cn>
46313 * config/loongarch/loongarch.cc (loongarch_classify_address):
46314 Add precessint for CONST_INT.
46315 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
46316 (loongarch_print_operand): Increase the processing of '%c'.
46317 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
46318 And port the public operand modifiers information to this document.
46320 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46322 * doc/invoke.texi (-mbranch-protection): Update documentation.
46324 2023-01-23 Richard Biener <rguenther@suse.de>
46327 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
46329 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
46330 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
46331 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
46332 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
46334 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46336 * config/arm/aout.h (ra_auth_code): Add entry in enum.
46337 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
46338 to dwarf frame expression.
46339 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
46340 (arm_expand_prologue): Update frame related information and reg notes
46341 for pac/pacbit insn.
46342 (arm_regno_class): Check for pac pseudo reigster.
46343 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
46344 (arm_init_machine_status): Set pacspval_needed to zero.
46345 (arm_debugger_regno): Check for PAC register.
46346 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
46348 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
46349 (arm_unwind_emit): Update REG_CFA_REGISTER case._
46350 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
46351 (DWARF_PAC_REGNUM): Define.
46352 (IS_PAC_REGNUM): Likewise.
46353 (enum reg_class): Add PAC_REG entry.
46354 (machine_function): Add pacbti_needed state to structure.
46355 * config/arm/arm.md (RA_AUTH_CODE): Define.
46357 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46359 * config.gcc ($tm_file): Update variable.
46360 * config/arm/arm-mlib.h: Create new header file.
46361 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
46362 multilib arch directory.
46363 (MULTILIB_REUSE): Add multilib reuse rules.
46364 (MULTILIB_MATCHES): Add multilib match rules.
46366 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46368 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
46369 * config/arm/arm-tables.opt: Regenerate.
46370 * config/arm/arm-tune.md: Likewise.
46371 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
46372 * (-mfix-cmse-cve-2021-35465): Likewise.
46374 2023-01-23 Richard Biener <rguenther@suse.de>
46376 PR tree-optimization/108482
46377 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
46378 .LOOP_DIST_ALIAS calls.
46380 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46382 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
46383 * config/arm/arm-protos.h: Update.
46384 * config/arm/aarch-common-protos.h: Declare
46385 'aarch_bti_arch_check'.
46386 * config/arm/arm.cc (aarch_bti_enabled) Update.
46387 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
46388 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
46389 * config/arm/arm.md (bti_nop): New insn.
46390 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
46391 (aarch-bti-insert.o): New target.
46392 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
46393 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
46395 (gate): Make use of 'aarch_bti_arch_check'.
46396 * config/arm/arm-passes.def: New file.
46397 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
46399 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46401 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
46402 'aarch-bti-insert.o'.
46403 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
46405 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
46406 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
46407 (aarch64_output_mi_thunk)
46408 (aarch64_print_patchable_function_entry)
46409 (aarch64_file_end_indicate_exec_stack): Update renamed function
46410 calls to renamed functions.
46411 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
46412 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
46414 * config/aarch64/aarch64-bti-insert.cc: Delete.
46415 * config/arm/aarch-bti-insert.cc: New file including and
46416 generalizing code from aarch64-bti-insert.cc.
46417 * config/arm/aarch-common-protos.h: Update.
46419 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46421 * config/arm/arm.h (arm_arch8m_main): Declare it.
46422 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
46424 * config/arm/arm.cc (arm_arch8m_main): Define it.
46425 (arm_option_reconfigure_globals): Set arm_arch8m_main.
46426 (arm_compute_frame_layout, arm_expand_prologue)
46427 (thumb2_expand_return, arm_expand_epilogue)
46428 (arm_conditional_register_usage): Update for pac codegen.
46429 (arm_current_function_pac_enabled_p): New function.
46430 (aarch_bti_enabled) New function.
46431 (use_return_insn): Return zero when pac is enabled.
46432 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
46434 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
46435 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
46437 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46439 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
46440 mbranch-protection.
46442 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46443 Tejas Belagod <tbelagod@arm.com>
46445 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
46446 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
46448 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46449 Tejas Belagod <tbelagod@arm.com>
46450 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46452 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
46453 new pseudo register class _UVRSC_PAC.
46455 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46456 Tejas Belagod <tbelagod@arm.com>
46458 * config/arm/arm-c.cc (arm_cpu_builtins): Define
46459 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
46460 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
46462 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46463 Tejas Belagod <tbelagod@arm.com>
46465 * doc/sourcebuild.texi: Document arm_pacbti_hw.
46467 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46468 Tejas Belagod <tbelagod@arm.com>
46469 Richard Earnshaw <Richard.Earnshaw@arm.com>
46471 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
46472 -mbranch-protection option and initialize appropriate data structures.
46473 * config/arm/arm.opt (-mbranch-protection): New option.
46474 * doc/invoke.texi (Arm Options): Document it.
46476 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46477 Tejas Belagod <tbelagod@arm.com>
46479 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
46480 * config/arm/arm-cpus.in (pacbti): New feature.
46481 * doc/invoke.texi (Arm Options): Document it.
46483 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
46484 Tejas Belagod <tbelagod@arm.com>
46486 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
46487 (all_architectures): Fix comment.
46488 (aarch64_parse_extension): Rename return type, enum value names.
46489 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
46490 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
46491 Also rename corresponding enum values.
46492 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
46493 out aarch64_function_type and move it to common code as
46494 aarch_function_type in aarch-common.h.
46495 * config/aarch64/aarch64-protos.h: Include common types header,
46496 move out types aarch64_parse_opt_result and aarch64_key_type to
46498 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
46499 and functions out into aarch-common.h and aarch-common.cc. Fix up
46500 all the name changes resulting from the move.
46501 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
46503 * config/aarch64/aarch64.opt: Include aarch-common.h to import
46504 type move. Fix up name changes from factoring out common code and
46506 * config/arm/aarch-common-protos.h: Export factored out routines to both
46508 * config/arm/aarch-common.cc: Include newly factored out types.
46509 Move all mbranch-protection code and data structures from
46511 * config/arm/aarch-common.h: New header that declares types shared
46512 between aarch32 and aarch64 backends.
46513 * config/arm/arm-protos.h: Declare types and variables that are
46514 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
46515 aarch_ra_sign_scope and aarch_enable_bti.
46516 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
46517 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
46518 * config/arm/arm.cc: Add missing includes.
46520 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
46522 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
46524 2023-01-23 Richard Biener <rguenther@suse.de>
46526 PR tree-optimization/108449
46527 * cgraphunit.cc (check_global_declaration): Do not turn
46528 undefined statics into externs.
46530 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
46532 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
46533 and HI input modes.
46534 * config/pru/pru.md (clz): Fix generated code for QI and HI
46537 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
46539 * config/v850/v850.cc (v850_select_section): Put const volatile
46540 objects into read-only sections.
46542 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
46544 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
46545 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
46546 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
46548 2023-01-20 Jakub Jelinek <jakub@redhat.com>
46550 PR tree-optimization/108457
46551 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
46552 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
46553 argument instead of a temporary. Formatting fixes.
46555 2023-01-19 Jakub Jelinek <jakub@redhat.com>
46557 PR tree-optimization/108447
46558 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
46559 (relation_tests): Add self-tests for relation_{intersect,union}
46561 * selftest.h (relation_tests): Declare.
46562 * function-tests.cc (test_ranges): Call it.
46564 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
46567 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
46568 invalid third argument to __builtin_ia32_prefetch.
46570 2023-01-19 Jakub Jelinek <jakub@redhat.com>
46572 PR middle-end/108459
46573 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
46574 than fold_unary for NEGATE_EXPR.
46576 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
46579 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
46580 comment. Move assert about alignment a bit later.
46582 2023-01-19 Jakub Jelinek <jakub@redhat.com>
46584 PR tree-optimization/108440
46585 * tree-ssa-forwprop.cc: Include gimple-range.h.
46586 (simplify_rotate): For the forms with T2 wider than T and shift counts of
46587 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
46588 to B. For the forms with T2 wider than T and shift counts of
46589 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
46590 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
46591 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
46592 pass specific ranger instead of get_global_range_query.
46593 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
46596 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
46598 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
46599 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
46601 (aarch64_simd_vec_copy_lane<mode>): Likewise.
46602 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
46604 2023-01-19 Alexandre Oliva <oliva@adacore.com>
46607 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
46608 within debug insns.
46610 2023-01-18 Martin Jambor <mjambor@suse.cz>
46613 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
46614 lcone_of chain also do not need the body.
46616 2023-01-18 Richard Biener <rguenther@suse.de>
46619 2022-12-16 Richard Biener <rguenther@suse.de>
46621 PR middle-end/108086
46622 * tree-inline.cc (remap_ssa_name): Do not unshare the
46623 result from the decl_map.
46625 2023-01-18 Murray Steele <murray.steele@arm.com>
46628 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
46630 (__arm_vst1q_p_s8): Likewise.
46631 (__arm_vld1q_z_u8): Likewise.
46632 (__arm_vld1q_z_s8): Likewise.
46633 (__arm_vst1q_p_u16): Likewise.
46634 (__arm_vst1q_p_s16): Likewise.
46635 (__arm_vld1q_z_u16): Likewise.
46636 (__arm_vld1q_z_s16): Likewise.
46637 (__arm_vst1q_p_u32): Likewise.
46638 (__arm_vst1q_p_s32): Likewise.
46639 (__arm_vld1q_z_u32): Likewise.
46640 (__arm_vld1q_z_s32): Likewise.
46641 (__arm_vld1q_z_f16): Likewise.
46642 (__arm_vst1q_p_f16): Likewise.
46643 (__arm_vld1q_z_f32): Likewise.
46644 (__arm_vst1q_p_f32): Likewise.
46646 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46648 * config/xtensa/xtensa.md (xorsi3_internal):
46649 Rename from the original of "xorsi3".
46650 (xorsi3): New expansion pattern that emits addition rather than
46651 bitwise-XOR when the second source is a constant of -2147483648
46654 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
46655 Andrew Pinski <apinski@marvell.com>
46658 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
46659 vec_vsubcuqP with vec_vsubcuq.
46661 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
46664 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
46665 support for invalid uses of MMA opaque type in function arguments.
46667 2023-01-18 liuhongt <hongtao.liu@intel.com>
46670 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
46671 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
46672 -share or -mno-daz-ftz is specified.
46673 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
46674 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
46676 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
46678 * config/bpf/bpf.cc (bpf_option_override): Disable
46681 2023-01-17 Jakub Jelinek <jakub@redhat.com>
46683 PR tree-optimization/106523
46684 * tree-ssa-forwprop.cc (simplify_rotate): For the
46685 patterns with (-Y) & (B - 1) in one operand's shift
46686 count and Y in another, if T2 has wider precision than T,
46687 punt if Y could have a value in [B, B2 - 1] range.
46689 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
46692 * config/i386/i386.cc (x86_output_mi_thunk): Disable
46693 -mforce-indirect-call for PIC in 32-bit mode.
46695 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
46698 * ipa-modref.cc (modref_access_analysis::analyze): Use
46699 find_always_executed_bbs.
46700 * ipa-sra.cc (process_scan_results): Likewise.
46701 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
46702 (find_always_executed_bbs): New function.
46703 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
46704 (find_always_executed_bbs): Declare.
46706 2023-01-16 Jan Hubicka <jh@suse.cz>
46708 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
46709 by TARGET_USE_SCATTER.
46710 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
46711 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
46712 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
46713 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
46714 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
46715 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
46717 2023-01-16 Richard Biener <rguenther@suse.de>
46720 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
46722 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
46726 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
46727 (__ARM_mve_coerce3): Likewise.
46729 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
46731 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
46733 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
46735 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
46736 (number_of_iterations_bitcount): Add call to the above.
46737 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
46738 c[lt]z idiom recognition.
46740 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
46742 * doc/sourcebuild.texi: Add missing target attributes.
46744 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
46746 PR tree-optimization/94793
46747 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
46749 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
46750 (number_of_iterations_cltz_complement): New.
46751 (number_of_iterations_bitcount): Add call to the above.
46753 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
46755 * doc/extend.texi (Common Function Attributes): Fix grammar.
46757 2023-01-16 Jakub Jelinek <jakub@redhat.com>
46760 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
46761 * config/riscv/riscv-vsetvl.cc: Likewise.
46763 2023-01-16 Jakub Jelinek <jakub@redhat.com>
46766 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
46767 disable -Winit-self using pragma GCC diagnostic ignored.
46768 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
46770 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
46771 _mm256_undefined_si256): Likewise.
46772 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
46773 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
46774 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
46775 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
46777 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
46780 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
46781 support for invalid uses in inline asm, factor out the checking and
46782 erroring to lambda function check_and_error_invalid_use.
46784 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
46786 PR tree-optimization/107608
46787 * range-op-float.cc (range_operator_float::fold_range): Avoid
46788 folding into INF when flag_trapping_math.
46789 * value-range.h (frange::known_isinf): Return false for possible NANs.
46791 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
46793 * config.gcc (csky-*-*): Support --with-float=softfp.
46795 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46797 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
46798 Rename to xtensa_adjust_reg_alloc_order.
46799 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
46800 Ditto. And also remove code to reorder register numbers for
46801 leaf functions, rename the tables, and adjust the allocation
46802 order for the call0 ABI to use register A0 more.
46803 (xtensa_leaf_regs): Remove.
46804 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
46805 (order_regs_for_local_alloc): Rename as the above.
46806 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
46808 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
46810 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
46811 Change to define_insn_and_split to fold ldr+dup to ld1rq.
46812 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
46814 2023-01-14 Alexandre Oliva <oliva@adacore.com>
46816 * hash-table.h (is_deleted): Precheck !is_empty.
46817 (mark_deleted): Postcheck !is_empty.
46818 (copy constructor): Test is_empty before is_deleted.
46820 2023-01-14 Alexandre Oliva <oliva@adacore.com>
46823 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
46826 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
46828 PR rtl-optimization/108274
46829 * function.cc (thread_prologue_and_epilogue_insns): Also update the
46830 DF information for calls in a few more cases.
46832 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
46834 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
46835 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
46837 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
46838 (MAX_SYNC_LIBFUNC_SIZE): Define.
46839 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
46841 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
46842 libcall when sync libcalls are disabled.
46843 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
46844 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
46845 are disabled on 32-bit target.
46846 * config/pa/pa.opt (matomic-libcalls): New option.
46847 * doc/invoke.texi (HPPA Options): Update.
46849 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
46851 PR rtl-optimization/108117
46852 PR rtl-optimization/108132
46853 * sched-deps.cc (deps_analyze_insn): Do not schedule across
46854 calls before reload.
46856 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
46858 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
46859 options for -mlibarch.
46860 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
46861 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
46863 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
46865 * attribs.cc (strict_flex_array_level_of): Move this function to ...
46866 * attribs.h (strict_flex_array_level_of): Remove the declaration.
46867 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
46868 replace the referece to strict_flex_array_level_of with
46869 DECL_NOT_FLEXARRAY.
46870 * tree.cc (component_ref_size): Likewise.
46872 2023-01-13 Richard Biener <rguenther@suse.de>
46875 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
46876 crtfastmath.o for -shared.
46877 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
46879 2023-01-13 Richard Biener <rguenther@suse.de>
46882 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
46883 crtfastmath.o for -shared.
46884 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
46886 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
46889 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
46891 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
46893 (TARGET_DWARF_FRAME_REG_MODE): Define.
46895 2023-01-13 Richard Biener <rguenther@suse.de>
46898 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
46899 update EH info on the fly.
46901 2023-01-13 Richard Biener <rguenther@suse.de>
46903 PR tree-optimization/108387
46904 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
46905 value before inserting expression into the tables.
46907 2023-01-12 Andrew Pinski <apinski@marvell.com>
46908 Roger Sayle <roger@nextmovesoftware.com>
46910 PR tree-optimization/92342
46911 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
46912 Use tcc_comparison and :c for the multiply.
46913 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
46915 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
46916 Richard Sandiford <richard.sandiford@arm.com>
46919 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
46920 Check DECL_PACKED for bitfield.
46921 (aarch64_layout_arg): Warn when parameter passing ABI changes.
46922 (aarch64_function_arg_boundary): Do not warn here.
46923 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
46926 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
46927 Richard Sandiford <richard.sandiford@arm.com>
46929 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
46931 (aarch64_layout_arg): Factorize warning conditions.
46932 (aarch64_function_arg_boundary): Fix typo.
46933 * function.cc (currently_expanding_function_start): New variable.
46934 (expand_function_start): Handle
46935 currently_expanding_function_start.
46936 * function.h (currently_expanding_function_start): Declare.
46938 2023-01-12 Richard Biener <rguenther@suse.de>
46940 PR tree-optimization/99412
46941 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
46942 (swap_ops_for_binary_stmt): Remove reduction handling.
46943 (rewrite_expr_tree_parallel): Adjust.
46944 (reassociate_bb): Likewise.
46945 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
46947 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46949 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
46950 Rearrange the emitting codes.
46952 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
46954 * config/xtensa/xtensa.md (*btrue):
46955 Correct value of the attribute "length" that depends on
46956 TARGET_DENSITY and operands, and add '?' character to the register
46957 constraint of the compared operand.
46959 2023-01-12 Alexandre Oliva <oliva@adacore.com>
46961 * hash-table.h (expand): Check elements and deleted counts.
46962 (verify): Likewise.
46964 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
46966 PR tree-optimization/71343
46967 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
46968 the value number of the expression X << C the same as the value
46969 number for the multiplication X * (1<<C).
46971 2023-01-11 David Faust <david.faust@oracle.com>
46974 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
46975 floating point modes.
46977 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
46979 PR tree-optimization/108199
46980 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
46981 for bit-field references.
46983 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
46985 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
46986 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
46987 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
46988 OPTION_MASK_P10_FUSION.
46990 2023-01-11 Richard Biener <rguenther@suse.de>
46992 PR tree-optimization/107767
46993 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
46994 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
46995 * tree-switch-conversion.cc (switch_conversion::collect):
46996 Count unique non-default targets accounting for later
46997 merging opportunities.
46999 2023-01-11 Martin Liska <mliska@suse.cz>
47001 PR middle-end/107976
47002 * params.opt: Limit JT params.
47003 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
47005 2023-01-11 Richard Biener <rguenther@suse.de>
47007 PR tree-optimization/108352
47008 * tree-ssa-threadbackward.cc
47009 (back_threader_profitability::profitable_path_p): Adjust
47010 heuristic that allows non-multi-way branch threads creating
47012 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
47013 (--param fsm-scale-path-stmts): Adjust.
47014 * params.opt (--param=fsm-scale-path-blocks=): Remove.
47015 (-param=fsm-scale-path-stmts=): Adjust description.
47017 2023-01-11 Richard Biener <rguenther@suse.de>
47019 PR tree-optimization/108353
47020 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
47022 (add_ssa_edge): Simplify.
47023 (add_control_edge): Likewise.
47024 (ssa_prop_init): Likewise.
47025 (ssa_prop_fini): Likewise.
47026 (ssa_propagation_engine::ssa_propagate): Likewise.
47028 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
47030 * config/s390/s390.md (*not<mode>): New pattern.
47032 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47034 * config/xtensa/xtensa.cc (xtensa_insn_cost):
47035 Let insn cost for size be obtained by applying COSTS_N_INSNS()
47036 to instruction length and then dividing by 3.
47038 2023-01-10 Richard Biener <rguenther@suse.de>
47040 PR tree-optimization/106293
47041 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
47042 process degenerate PHI defs.
47044 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
47046 PR rtl-optimization/106421
47047 * cprop.cc (bypass_block): Check that DEST is local to this
47048 function (non-NULL) before calling find_edge.
47050 2023-01-10 Martin Jambor <mjambor@suse.cz>
47053 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
47054 sort_replacements, lookup_first_base_replacement and
47055 m_sorted_replacements_p.
47056 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
47057 (ipa_param_body_adjustments::register_replacement): Set
47058 m_sorted_replacements_p to false.
47059 (compare_param_body_replacement): New function.
47060 (ipa_param_body_adjustments::sort_replacements): Likewise.
47061 (ipa_param_body_adjustments::common_initialization): Call
47063 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
47064 m_sorted_replacements_p.
47065 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
47067 (ipa_param_body_adjustments::lookup_first_base_replacement): New
47069 (ipa_param_body_adjustments::modify_call_stmt): Use
47070 lookup_first_base_replacement.
47071 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
47072 adjustments->sort_replacements.
47074 2023-01-10 Richard Biener <rguenther@suse.de>
47076 PR tree-optimization/108314
47077 * tree-vect-stmts.cc (vectorizable_condition): Do not
47078 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
47080 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47082 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
47084 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47086 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
47088 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47090 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
47091 defines for soft float abi.
47093 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47095 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
47096 (smart_bclri): Likewise.
47097 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
47098 (fast_bclri): Likewise.
47099 (fast_cmpnesi_i): Likewise.
47100 (*fast_cmpltsi_i): Likewise.
47101 (*fast_cmpgeusi_i): Likewise.
47103 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
47105 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
47106 flag_fp_int_builtin_inexact || !flag_trapping_math.
47107 (<frm_pattern><mode>2): Likewise.
47109 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
47111 * config/s390/s390.cc (s390_register_info): Check call_used_regs
47112 instead of hard-coding the register numbers for call saved
47114 (s390_optimize_register_info): Likewise.
47116 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
47118 * doc/gm2.texi (Overview): Fix @node markers.
47119 (Using): Likewise. Remove subsections that were moved to Overview
47120 from the menu and move others around.
47122 2023-01-09 Richard Biener <rguenther@suse.de>
47124 PR middle-end/108209
47125 * genmatch.cc (commutative_op): Fix return value for
47126 user-id with non-commutative first replacement.
47128 2023-01-09 Jakub Jelinek <jakub@redhat.com>
47131 * calls.cc (expand_call): For calls with
47132 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
47135 2023-01-09 Richard Biener <rguenther@suse.de>
47137 PR middle-end/69482
47138 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
47139 qualified accesses also force objects to memory.
47141 2023-01-09 Martin Liska <mliska@suse.cz>
47144 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
47145 NULL (deleleted value) to a hash_set.
47147 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47149 * config/xtensa/xtensa.md (*splice_bits):
47150 New insn_and_split pattern.
47152 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
47154 * config/xtensa/xtensa.cc
47155 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
47156 New helper functions.
47157 (xtensa_set_return_address, xtensa_output_mi_thunk):
47158 Change to use the helper function.
47159 (xtensa_emit_adjust_stack_ptr): Ditto.
47160 And also change to try reusing the content of scratch register
47161 A9 if the register is not modified in the function body.
47163 2023-01-07 LIU Hao <lh_mouse@126.com>
47165 PR middle-end/108300
47166 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
47167 before <windows.h>.
47168 * diagnostic-color.cc: Likewise.
47169 * plugin.cc: Likewise.
47170 * prefix.cc: Likewise.
47172 2023-01-06 Joseph Myers <joseph@codesourcery.com>
47174 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
47175 for handling real integer types.
47177 2023-01-06 Tamar Christina <tamar.christina@arm.com>
47180 2022-12-12 Tamar Christina <tamar.christina@arm.com>
47182 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
47183 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
47184 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
47185 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
47186 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
47187 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
47188 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
47189 (aarch64_simd_dupv2hf): New.
47190 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
47192 * config/aarch64/iterators.md (VHSDF_P): New.
47193 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
47194 Vel, q, vp): Add V2HF.
47195 * config/arm/types.md (neon_fp_reduc_add_h): New.
47197 2023-01-06 Martin Liska <mliska@suse.cz>
47199 PR middle-end/107966
47200 * doc/options.texi: Fix Var documentation in internal manual.
47202 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
47205 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
47207 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
47208 RTL expansion to allow condition (mask) to be shared/reused,
47209 by avoiding overwriting pseudos and adding REG_EQUAL notes.
47211 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
47213 * common.opt: Add -static-libgm2.
47214 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
47215 * doc/gm2.texi: Document static-libgm2.
47216 * gcc.cc (driver_handle_option): Allow static-libgm2.
47218 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
47220 * common/config/i386/i386-common.cc (processor_alias_table):
47221 Use CPU_ZNVER4 for znver4.
47222 * config/i386/i386.md: Add znver4.md.
47223 * config/i386/znver4.md: New.
47225 2023-01-04 Jakub Jelinek <jakub@redhat.com>
47227 PR tree-optimization/108253
47228 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
47231 2023-01-04 Jakub Jelinek <jakub@redhat.com>
47233 PR middle-end/108237
47234 * generic-match-head.cc: Include tree-pass.h.
47235 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
47236 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
47237 resp. PROP_gimple_lvec property set.
47239 2023-01-04 Jakub Jelinek <jakub@redhat.com>
47241 PR sanitizer/108256
47242 * convert.cc (do_narrow): Punt for MULT_EXPR if original
47243 type doesn't wrap around and -fsanitize=signed-integer-overflow
47245 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
47247 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
47249 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
47250 * common/config/i386/i386-common.cc: Add Emeraldrapids.
47252 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
47254 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
47257 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
47259 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
47260 default constructor to initialize it.
47261 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
47262 for last and iterate to handle recursive calls. Delete leftover
47263 candidates at the end.
47264 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
47266 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
47267 gc_candidate bit when a clone is used.
47269 2023-01-03 Florian Weimer <fweimer@redhat.com>
47272 2023-01-02 Florian Weimer <fweimer@redhat.com>
47274 * dwarf2cfi.cc (init_return_column_size): Remove.
47275 (init_one_dwarf_reg_size): Adjust.
47276 (generate_dwarf_reg_sizes): New function. Extracted
47277 from expand_builtin_init_dwarf_reg_sizes.
47278 (expand_builtin_init_dwarf_reg_sizes): Call
47279 generate_dwarf_reg_sizes.
47280 * target.def (init_dwarf_reg_sizes_extra): Adjust
47282 * config/msp430/msp430.cc
47283 (msp430_init_dwarf_reg_sizes_extra): Adjust.
47284 * config/rs6000/rs6000.cc
47285 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
47286 * doc/tm.texi: Update.
47288 2023-01-03 Florian Weimer <fweimer@redhat.com>
47291 2023-01-02 Florian Weimer <fweimer@redhat.com>
47293 * debug.h (dwarf_reg_sizes_constant): Declare.
47294 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
47296 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
47298 PR tree-optimization/105043
47299 * doc/extend.texi (Object Size Checking): Split out into two
47300 subsections and mention _FORTIFY_SOURCE.
47302 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
47304 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
47305 RTL expansion to allow condition (mask) to be shared/reused,
47306 by avoiding overwriting pseudos and adding REG_EQUAL notes.
47308 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
47311 * config/i386/i386-features.cc
47312 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
47313 the gain/cost of converting a MEM operand.
47315 2023-01-03 Jakub Jelinek <jakub@redhat.com>
47317 PR middle-end/108264
47318 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
47319 from source which doesn't have scalar integral mode first convert
47322 2023-01-03 Jakub Jelinek <jakub@redhat.com>
47324 PR rtl-optimization/108263
47325 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
47328 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
47331 * config/i386/lujiazui.md (lujiazui_div): New automaton.
47332 (lua_div): New unit.
47333 (lua_idiv_qi): Correct unit in the reservation.
47334 (lua_idiv_qi_load): Ditto.
47335 (lua_idiv_hi): Ditto.
47336 (lua_idiv_hi_load): Ditto.
47337 (lua_idiv_si): Ditto.
47338 (lua_idiv_si_load): Ditto.
47339 (lua_idiv_di): Ditto.
47340 (lua_idiv_di_load): Ditto.
47341 (lua_fdiv_SF): Ditto.
47342 (lua_fdiv_SF_load): Ditto.
47343 (lua_fdiv_DF): Ditto.
47344 (lua_fdiv_DF_load): Ditto.
47345 (lua_fdiv_XF): Ditto.
47346 (lua_fdiv_XF_load): Ditto.
47347 (lua_ssediv_SF): Ditto.
47348 (lua_ssediv_load_SF): Ditto.
47349 (lua_ssediv_V4SF): Ditto.
47350 (lua_ssediv_load_V4SF): Ditto.
47351 (lua_ssediv_V8SF): Ditto.
47352 (lua_ssediv_load_V8SF): Ditto.
47353 (lua_ssediv_SD): Ditto.
47354 (lua_ssediv_load_SD): Ditto.
47355 (lua_ssediv_V2DF): Ditto.
47356 (lua_ssediv_load_V2DF): Ditto.
47357 (lua_ssediv_V4DF): Ditto.
47358 (lua_ssediv_load_V4DF): Ditto.
47360 2023-01-02 Florian Weimer <fweimer@redhat.com>
47362 * debug.h (dwarf_reg_sizes_constant): Declare.
47363 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
47365 2023-01-02 Florian Weimer <fweimer@redhat.com>
47367 * dwarf2cfi.cc (init_return_column_size): Remove.
47368 (init_one_dwarf_reg_size): Adjust.
47369 (generate_dwarf_reg_sizes): New function. Extracted
47370 from expand_builtin_init_dwarf_reg_sizes.
47371 (expand_builtin_init_dwarf_reg_sizes): Call
47372 generate_dwarf_reg_sizes.
47373 * target.def (init_dwarf_reg_sizes_extra): Adjust
47375 * config/msp430/msp430.cc
47376 (msp430_init_dwarf_reg_sizes_extra): Adjust.
47377 * config/rs6000/rs6000.cc
47378 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
47379 * doc/tm.texi: Update.
47381 2023-01-02 Jakub Jelinek <jakub@redhat.com>
47383 * gcc.cc (process_command): Update copyright notice dates.
47384 * gcov-dump.cc (print_version): Ditto.
47385 * gcov.cc (print_version): Ditto.
47386 * gcov-tool.cc (print_version): Ditto.
47387 * gengtype.cc (create_file): Ditto.
47388 * doc/cpp.texi: Bump @copying's copyright year.
47389 * doc/cppinternals.texi: Ditto.
47390 * doc/gcc.texi: Ditto.
47391 * doc/gccint.texi: Ditto.
47392 * doc/gcov.texi: Ditto.
47393 * doc/install.texi: Ditto.
47394 * doc/invoke.texi: Ditto.
47396 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
47397 Uroš Bizjak <ubizjak@gmail.com>
47399 * config/i386/i386.md (extendditi2): New define_insn.
47400 (define_split): Use DWIH mode iterator to treat new extendditi2
47401 identically to existing extendsidi2_1.
47402 (define_peephole2): Likewise.
47403 (define_peephole2): Likewise.
47404 (define_Split): Likewise.
47407 Copyright (C) 2023 Free Software Foundation, Inc.
47409 Copying and distribution of this file, with or without modification,
47410 are permitted in any medium without royalty provided the copyright
47411 notice and this notice are preserved.