gcc/testsuite/gcc.target/riscv/zero-extend-3.c

   1 /* { dg-do compile { target { riscv64*-*-* } } } */
   2 /* { dg-options "-march=rv64gc -mabi=lp64 -O2" } */
   3 extern int e (void);
   4 enum { a, b }
   5 c (void)
   6 {
   7   int d = a;
   8   if (e() < 0)
   9     d = b;
  10   return d;
  11 }
  12 /* { dg-final { scan-assembler-times "sext.w" 0 } } */