Add support for ARM's Thumb instruction set.
[official-gcc.git] / gcc / emit-rtl.c
blobe6c07aae1f2562047e00c4a9f497fbdd54c00d71
1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
37 #include "config.h"
38 #ifdef __STDC__
39 #include <stdarg.h>
40 #else
41 #include <varargs.h>
42 #endif
43 #include "system.h"
44 #include "rtl.h"
45 #include "tree.h"
46 #include "flags.h"
47 #include "except.h"
48 #include "function.h"
49 #include "expr.h"
50 #include "regs.h"
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
53 #include "recog.h"
54 #include "real.h"
55 #include "obstack.h"
57 /* Commonly used modes. */
59 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
60 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
61 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
63 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
64 After rtl generation, it is 1 plus the largest register number used. */
66 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Lowest label number in current function. */
75 static int first_label_num;
77 /* Highest label number in current function.
78 Zero means use the value of label_num instead.
79 This is nonzero only when belatedly compiling an inline function. */
81 static int last_label_num;
83 /* Value label_num had when set_new_first_and_last_label_number was called.
84 If label_num has not changed since then, last_label_num is valid. */
86 static int base_label_num;
88 /* Nonzero means do not generate NOTEs for source line numbers. */
90 static int no_line_numbers;
92 /* Commonly used rtx's, so that we only need space for one copy.
93 These are initialized once for the entire compilation.
94 All of these except perhaps the floating-point CONST_DOUBLEs
95 are unique; no other rtx-object will be equal to any of these. */
97 struct _global_rtl global_rtl =
99 {PC, VOIDmode}, /* pc_rtx */
100 {CC0, VOIDmode}, /* cc0_rtx */
101 {REG}, /* stack_pointer_rtx */
102 {REG}, /* frame_pointer_rtx */
103 {REG}, /* hard_frame_pointer_rtx */
104 {REG}, /* arg_pointer_rtx */
105 {REG}, /* virtual_incoming_args_rtx */
106 {REG}, /* virtual_stack_vars_rtx */
107 {REG}, /* virtual_stack_dynamic_rtx */
108 {REG}, /* virtual_outgoing_args_rtx */
111 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
112 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
113 record a copy of const[012]_rtx. */
115 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
117 rtx const_true_rtx;
119 REAL_VALUE_TYPE dconst0;
120 REAL_VALUE_TYPE dconst1;
121 REAL_VALUE_TYPE dconst2;
122 REAL_VALUE_TYPE dconstm1;
124 /* All references to the following fixed hard registers go through
125 these unique rtl objects. On machines where the frame-pointer and
126 arg-pointer are the same register, they use the same unique object.
128 After register allocation, other rtl objects which used to be pseudo-regs
129 may be clobbered to refer to the frame-pointer register.
130 But references that were originally to the frame-pointer can be
131 distinguished from the others because they contain frame_pointer_rtx.
133 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
134 tricky: until register elimination has taken place hard_frame_pointer_rtx
135 should be used if it is being set, and frame_pointer_rtx otherwise. After
136 register elimination hard_frame_pointer_rtx should always be used.
137 On machines where the two registers are same (most) then these are the
138 same.
140 In an inline procedure, the stack and frame pointer rtxs may not be
141 used for anything else. */
142 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
143 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
144 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
145 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
146 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
148 /* This is used to implement __builtin_return_address for some machines.
149 See for instance the MIPS port. */
150 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
152 /* We make one copy of (const_int C) where C is in
153 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
154 to save space during the compilation and simplify comparisons of
155 integers. */
157 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
159 /* The ends of the doubly-linked chain of rtl for the current function.
160 Both are reset to null at the start of rtl generation for the function.
162 start_sequence saves both of these on `sequence_stack' along with
163 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
165 static rtx first_insn = NULL;
166 static rtx last_insn = NULL;
168 /* RTL_EXPR within which the current sequence will be placed. Use to
169 prevent reuse of any temporaries within the sequence until after the
170 RTL_EXPR is emitted. */
172 tree sequence_rtl_expr = NULL;
174 /* INSN_UID for next insn emitted.
175 Reset to 1 for each function compiled. */
177 static int cur_insn_uid = 1;
179 /* Line number and source file of the last line-number NOTE emitted.
180 This is used to avoid generating duplicates. */
182 static int last_linenum = 0;
183 static char *last_filename = 0;
185 /* A vector indexed by pseudo reg number. The allocated length
186 of this vector is regno_pointer_flag_length. Since this
187 vector is needed during the expansion phase when the total
188 number of registers in the function is not yet known,
189 it is copied and made bigger when necessary. */
191 char *regno_pointer_flag;
192 int regno_pointer_flag_length;
194 /* Indexed by pseudo register number, if nonzero gives the known alignment
195 for that pseudo (if regno_pointer_flag is set).
196 Allocated in parallel with regno_pointer_flag. */
197 char *regno_pointer_align;
199 /* Indexed by pseudo register number, gives the rtx for that pseudo.
200 Allocated in parallel with regno_pointer_flag. */
202 rtx *regno_reg_rtx;
204 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
205 Each element describes one pending sequence.
206 The main insn-chain is saved in the last element of the chain,
207 unless the chain is empty. */
209 struct sequence_stack *sequence_stack;
211 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
212 shortly thrown away. We use two mechanisms to prevent this waste:
214 First, we keep a list of the expressions used to represent the sequence
215 stack in sequence_element_free_list.
217 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
218 rtvec for use by gen_sequence. One entry for each size is sufficient
219 because most cases are calls to gen_sequence followed by immediately
220 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
221 destructive on the insn in it anyway and hence can't be redone.
223 We do not bother to save this cached data over nested function calls.
224 Instead, we just reinitialize them. */
226 #define SEQUENCE_RESULT_SIZE 5
228 static struct sequence_stack *sequence_element_free_list;
229 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
231 /* During RTL generation, we also keep a list of free INSN rtl codes. */
232 static rtx free_insn;
234 extern int rtx_equal_function_value_matters;
236 /* Filename and line number of last line-number note,
237 whether we actually emitted it or not. */
238 extern char *emit_filename;
239 extern int emit_lineno;
241 static rtx make_jump_insn_raw PROTO((rtx));
242 static rtx make_call_insn_raw PROTO((rtx));
243 static rtx find_line_note PROTO((rtx));
246 gen_rtx_CONST_INT (mode, arg)
247 enum machine_mode mode;
248 HOST_WIDE_INT arg;
250 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
251 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
253 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
254 if (const_true_rtx && arg == STORE_FLAG_VALUE)
255 return const_true_rtx;
256 #endif
258 return gen_rtx_raw_CONST_INT (mode, arg);
262 gen_rtx_REG (mode, regno)
263 enum machine_mode mode;
264 int regno;
266 /* In case the MD file explicitly references the frame pointer, have
267 all such references point to the same frame pointer. This is
268 used during frame pointer elimination to distinguish the explicit
269 references to these registers from pseudos that happened to be
270 assigned to them.
272 If we have eliminated the frame pointer or arg pointer, we will
273 be using it as a normal register, for example as a spill
274 register. In such cases, we might be accessing it in a mode that
275 is not Pmode and therefore cannot use the pre-allocated rtx.
277 Also don't do this when we are making new REGs in reload, since
278 we don't want to get confused with the real pointers. */
280 if (mode == Pmode && !reload_in_progress)
282 if (regno == FRAME_POINTER_REGNUM)
283 return frame_pointer_rtx;
284 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
285 if (regno == HARD_FRAME_POINTER_REGNUM)
286 return hard_frame_pointer_rtx;
287 #endif
288 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
289 if (regno == ARG_POINTER_REGNUM)
290 return arg_pointer_rtx;
291 #endif
292 #ifdef RETURN_ADDRESS_POINTER_REGNUM
293 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
294 return return_address_pointer_rtx;
295 #endif
296 if (regno == STACK_POINTER_REGNUM)
297 return stack_pointer_rtx;
300 return gen_rtx_raw_REG (mode, regno);
303 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
305 ** This routine generates an RTX of the size specified by
306 ** <code>, which is an RTX code. The RTX structure is initialized
307 ** from the arguments <element1> through <elementn>, which are
308 ** interpreted according to the specific RTX type's format. The
309 ** special machine mode associated with the rtx (if any) is specified
310 ** in <mode>.
312 ** gen_rtx can be invoked in a way which resembles the lisp-like
313 ** rtx it will generate. For example, the following rtx structure:
315 ** (plus:QI (mem:QI (reg:SI 1))
316 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
318 ** ...would be generated by the following C code:
320 ** gen_rtx (PLUS, QImode,
321 ** gen_rtx (MEM, QImode,
322 ** gen_rtx (REG, SImode, 1)),
323 ** gen_rtx (MEM, QImode,
324 ** gen_rtx (PLUS, SImode,
325 ** gen_rtx (REG, SImode, 2),
326 ** gen_rtx (REG, SImode, 3)))),
329 /*VARARGS2*/
331 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
333 #ifndef __STDC__
334 enum rtx_code code;
335 enum machine_mode mode;
336 #endif
337 va_list p;
338 register int i; /* Array indices... */
339 register char *fmt; /* Current rtx's format... */
340 register rtx rt_val; /* RTX to return to caller... */
342 VA_START (p, mode);
344 #ifndef __STDC__
345 code = va_arg (p, enum rtx_code);
346 mode = va_arg (p, enum machine_mode);
347 #endif
349 if (code == CONST_INT)
350 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
351 else if (code == REG)
352 rt_val = gen_rtx_REG (mode, va_arg (p, int));
353 else
355 rt_val = rtx_alloc (code); /* Allocate the storage space. */
356 rt_val->mode = mode; /* Store the machine mode... */
358 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
359 for (i = 0; i < GET_RTX_LENGTH (code); i++)
361 switch (*fmt++)
363 case '0': /* Unused field. */
364 break;
366 case 'i': /* An integer? */
367 XINT (rt_val, i) = va_arg (p, int);
368 break;
370 case 'w': /* A wide integer? */
371 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
372 break;
374 case 's': /* A string? */
375 XSTR (rt_val, i) = va_arg (p, char *);
376 break;
378 case 'e': /* An expression? */
379 case 'u': /* An insn? Same except when printing. */
380 XEXP (rt_val, i) = va_arg (p, rtx);
381 break;
383 case 'E': /* An RTX vector? */
384 XVEC (rt_val, i) = va_arg (p, rtvec);
385 break;
387 default:
388 abort ();
392 va_end (p);
393 return rt_val; /* Return the new RTX... */
396 /* gen_rtvec (n, [rt1, ..., rtn])
398 ** This routine creates an rtvec and stores within it the
399 ** pointers to rtx's which are its arguments.
402 /*VARARGS1*/
403 rtvec
404 gen_rtvec VPROTO((int n, ...))
406 #ifndef __STDC__
407 int n;
408 #endif
409 int i;
410 va_list p;
411 rtx *vector;
413 VA_START (p, n);
415 #ifndef __STDC__
416 n = va_arg (p, int);
417 #endif
419 if (n == 0)
420 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
422 vector = (rtx *) alloca (n * sizeof (rtx));
424 for (i = 0; i < n; i++)
425 vector[i] = va_arg (p, rtx);
426 va_end (p);
428 return gen_rtvec_v (n, vector);
431 rtvec
432 gen_rtvec_v (n, argp)
433 int n;
434 rtx *argp;
436 register int i;
437 register rtvec rt_val;
439 if (n == 0)
440 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
442 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
444 for (i = 0; i < n; i++)
445 rt_val->elem[i].rtx = *argp++;
447 return rt_val;
450 rtvec
451 gen_rtvec_vv (n, argp)
452 int n;
453 rtunion *argp;
455 register int i;
456 register rtvec rt_val;
458 if (n == 0)
459 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
461 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
463 for (i = 0; i < n; i++)
464 rt_val->elem[i].rtx = (argp++)->rtx;
466 return rt_val;
469 /* Generate a REG rtx for a new pseudo register of mode MODE.
470 This pseudo is assigned the next sequential register number. */
473 gen_reg_rtx (mode)
474 enum machine_mode mode;
476 register rtx val;
478 /* Don't let anything called by or after reload create new registers
479 (actually, registers can't be created after flow, but this is a good
480 approximation). */
482 if (reload_in_progress || reload_completed)
483 abort ();
485 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
486 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
488 /* For complex modes, don't make a single pseudo.
489 Instead, make a CONCAT of two pseudos.
490 This allows noncontiguous allocation of the real and imaginary parts,
491 which makes much better code. Besides, allocating DCmode
492 pseudos overstrains reload on some machines like the 386. */
493 rtx realpart, imagpart;
494 int size = GET_MODE_UNIT_SIZE (mode);
495 enum machine_mode partmode
496 = mode_for_size (size * BITS_PER_UNIT,
497 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
498 ? MODE_FLOAT : MODE_INT),
501 realpart = gen_reg_rtx (partmode);
502 imagpart = gen_reg_rtx (partmode);
503 return gen_rtx_CONCAT (mode, realpart, imagpart);
506 /* Make sure regno_pointer_flag and regno_reg_rtx are large
507 enough to have an element for this pseudo reg number. */
509 if (reg_rtx_no == regno_pointer_flag_length)
511 rtx *new1;
512 char *new =
513 (char *) savealloc (regno_pointer_flag_length * 2);
514 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
515 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
516 regno_pointer_flag = new;
518 new = (char *) savealloc (regno_pointer_flag_length * 2);
519 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
520 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
521 regno_pointer_align = new;
523 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
524 bcopy ((char *) regno_reg_rtx, (char *) new1,
525 regno_pointer_flag_length * sizeof (rtx));
526 bzero ((char *) &new1[regno_pointer_flag_length],
527 regno_pointer_flag_length * sizeof (rtx));
528 regno_reg_rtx = new1;
530 regno_pointer_flag_length *= 2;
533 val = gen_rtx_raw_REG (mode, reg_rtx_no);
534 regno_reg_rtx[reg_rtx_no++] = val;
535 return val;
538 /* Identify REG (which may be a CONCAT) as a user register. */
540 void
541 mark_user_reg (reg)
542 rtx reg;
544 if (GET_CODE (reg) == CONCAT)
546 REG_USERVAR_P (XEXP (reg, 0)) = 1;
547 REG_USERVAR_P (XEXP (reg, 1)) = 1;
549 else if (GET_CODE (reg) == REG)
550 REG_USERVAR_P (reg) = 1;
551 else
552 abort ();
555 /* Identify REG as a probable pointer register and show its alignment
556 as ALIGN, if nonzero. */
558 void
559 mark_reg_pointer (reg, align)
560 rtx reg;
561 int align;
563 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
565 if (align)
566 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
569 /* Return 1 plus largest pseudo reg number used in the current function. */
572 max_reg_num ()
574 return reg_rtx_no;
577 /* Return 1 + the largest label number used so far in the current function. */
580 max_label_num ()
582 if (last_label_num && label_num == base_label_num)
583 return last_label_num;
584 return label_num;
587 /* Return first label number used in this function (if any were used). */
590 get_first_label_num ()
592 return first_label_num;
595 /* Return a value representing some low-order bits of X, where the number
596 of low-order bits is given by MODE. Note that no conversion is done
597 between floating-point and fixed-point values, rather, the bit
598 representation is returned.
600 This function handles the cases in common between gen_lowpart, below,
601 and two variants in cse.c and combine.c. These are the cases that can
602 be safely handled at all points in the compilation.
604 If this is not a case we can handle, return 0. */
607 gen_lowpart_common (mode, x)
608 enum machine_mode mode;
609 register rtx x;
611 int word = 0;
613 if (GET_MODE (x) == mode)
614 return x;
616 /* MODE must occupy no more words than the mode of X. */
617 if (GET_MODE (x) != VOIDmode
618 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
619 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
620 / UNITS_PER_WORD)))
621 return 0;
623 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
624 word = ((GET_MODE_SIZE (GET_MODE (x))
625 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
626 / UNITS_PER_WORD);
628 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
629 && (GET_MODE_CLASS (mode) == MODE_INT
630 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
632 /* If we are getting the low-order part of something that has been
633 sign- or zero-extended, we can either just use the object being
634 extended or make a narrower extension. If we want an even smaller
635 piece than the size of the object being extended, call ourselves
636 recursively.
638 This case is used mostly by combine and cse. */
640 if (GET_MODE (XEXP (x, 0)) == mode)
641 return XEXP (x, 0);
642 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
643 return gen_lowpart_common (mode, XEXP (x, 0));
644 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
645 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
647 else if (GET_CODE (x) == SUBREG
648 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
649 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
650 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
651 ? SUBREG_REG (x)
652 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
653 else if (GET_CODE (x) == REG)
655 /* If the register is not valid for MODE, return 0. If we don't
656 do this, there is no way to fix up the resulting REG later.
657 But we do do this if the current REG is not valid for its
658 mode. This latter is a kludge, but is required due to the
659 way that parameters are passed on some machines, most
660 notably Sparc. */
661 if (REGNO (x) < FIRST_PSEUDO_REGISTER
662 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
663 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
664 return 0;
665 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
666 /* integrate.c can't handle parts of a return value register. */
667 && (! REG_FUNCTION_VALUE_P (x)
668 || ! rtx_equal_function_value_matters)
669 #ifdef CLASS_CANNOT_CHANGE_SIZE
670 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
671 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
672 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
673 && (TEST_HARD_REG_BIT
674 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
675 REGNO (x))))
676 #endif
677 /* We want to keep the stack, frame, and arg pointers
678 special. */
679 && x != frame_pointer_rtx
680 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
681 && x != arg_pointer_rtx
682 #endif
683 && x != stack_pointer_rtx)
684 return gen_rtx_REG (mode, REGNO (x) + word);
685 else
686 return gen_rtx_SUBREG (mode, x, word);
688 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
689 from the low-order part of the constant. */
690 else if ((GET_MODE_CLASS (mode) == MODE_INT
691 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
692 && GET_MODE (x) == VOIDmode
693 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
695 /* If MODE is twice the host word size, X is already the desired
696 representation. Otherwise, if MODE is wider than a word, we can't
697 do this. If MODE is exactly a word, return just one CONST_INT.
698 If MODE is smaller than a word, clear the bits that don't belong
699 in our mode, unless they and our sign bit are all one. So we get
700 either a reasonable negative value or a reasonable unsigned value
701 for this mode. */
703 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
704 return x;
705 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
706 return 0;
707 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
708 return (GET_CODE (x) == CONST_INT ? x
709 : GEN_INT (CONST_DOUBLE_LOW (x)));
710 else
712 /* MODE must be narrower than HOST_BITS_PER_INT. */
713 int width = GET_MODE_BITSIZE (mode);
714 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
715 : CONST_DOUBLE_LOW (x));
717 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
718 != ((HOST_WIDE_INT) (-1) << (width - 1))))
719 val &= ((HOST_WIDE_INT) 1 << width) - 1;
721 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
722 : GEN_INT (val));
726 /* If X is an integral constant but we want it in floating-point, it
727 must be the case that we have a union of an integer and a floating-point
728 value. If the machine-parameters allow it, simulate that union here
729 and return the result. The two-word and single-word cases are
730 different. */
732 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
733 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
734 || flag_pretend_float)
735 && GET_MODE_CLASS (mode) == MODE_FLOAT
736 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
737 && GET_CODE (x) == CONST_INT
738 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
739 #ifdef REAL_ARITHMETIC
741 REAL_VALUE_TYPE r;
742 HOST_WIDE_INT i;
744 i = INTVAL (x);
745 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
746 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
748 #else
750 union {HOST_WIDE_INT i; float d; } u;
752 u.i = INTVAL (x);
753 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
755 #endif
756 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
757 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
758 || flag_pretend_float)
759 && GET_MODE_CLASS (mode) == MODE_FLOAT
760 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
761 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
762 && GET_MODE (x) == VOIDmode
763 && (sizeof (double) * HOST_BITS_PER_CHAR
764 == 2 * HOST_BITS_PER_WIDE_INT))
765 #ifdef REAL_ARITHMETIC
767 REAL_VALUE_TYPE r;
768 HOST_WIDE_INT i[2];
769 HOST_WIDE_INT low, high;
771 if (GET_CODE (x) == CONST_INT)
772 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
773 else
774 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
776 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
777 target machine. */
778 if (WORDS_BIG_ENDIAN)
779 i[0] = high, i[1] = low;
780 else
781 i[0] = low, i[1] = high;
783 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
784 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
786 #else
788 union {HOST_WIDE_INT i[2]; double d; } u;
789 HOST_WIDE_INT low, high;
791 if (GET_CODE (x) == CONST_INT)
792 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
793 else
794 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
796 #ifdef HOST_WORDS_BIG_ENDIAN
797 u.i[0] = high, u.i[1] = low;
798 #else
799 u.i[0] = low, u.i[1] = high;
800 #endif
802 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
804 #endif
806 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
807 same as sizeof (double) or when sizeof (float) is larger than the
808 size of a word on the target machine. */
809 #ifdef REAL_ARITHMETIC
810 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
812 REAL_VALUE_TYPE r;
813 HOST_WIDE_INT i;
815 i = INTVAL (x);
816 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
817 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
819 #endif
821 /* Similarly, if this is converting a floating-point value into a
822 single-word integer. Only do this is the host and target parameters are
823 compatible. */
825 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
826 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
827 || flag_pretend_float)
828 && (GET_MODE_CLASS (mode) == MODE_INT
829 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
830 && GET_CODE (x) == CONST_DOUBLE
831 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
832 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
833 return operand_subword (x, word, 0, GET_MODE (x));
835 /* Similarly, if this is converting a floating-point value into a
836 two-word integer, we can do this one word at a time and make an
837 integer. Only do this is the host and target parameters are
838 compatible. */
840 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
841 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
842 || flag_pretend_float)
843 && (GET_MODE_CLASS (mode) == MODE_INT
844 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
845 && GET_CODE (x) == CONST_DOUBLE
846 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
847 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
849 rtx lowpart
850 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
851 rtx highpart
852 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
854 if (lowpart && GET_CODE (lowpart) == CONST_INT
855 && highpart && GET_CODE (highpart) == CONST_INT)
856 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
859 /* Otherwise, we can't do this. */
860 return 0;
863 /* Return the real part (which has mode MODE) of a complex value X.
864 This always comes at the low address in memory. */
867 gen_realpart (mode, x)
868 enum machine_mode mode;
869 register rtx x;
871 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
872 return XEXP (x, 0);
873 else if (WORDS_BIG_ENDIAN)
874 return gen_highpart (mode, x);
875 else
876 return gen_lowpart (mode, x);
879 /* Return the imaginary part (which has mode MODE) of a complex value X.
880 This always comes at the high address in memory. */
883 gen_imagpart (mode, x)
884 enum machine_mode mode;
885 register rtx x;
887 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
888 return XEXP (x, 1);
889 else if (WORDS_BIG_ENDIAN)
890 return gen_lowpart (mode, x);
891 else
892 return gen_highpart (mode, x);
895 /* Return 1 iff X, assumed to be a SUBREG,
896 refers to the real part of the complex value in its containing reg.
897 Complex values are always stored with the real part in the first word,
898 regardless of WORDS_BIG_ENDIAN. */
901 subreg_realpart_p (x)
902 rtx x;
904 if (GET_CODE (x) != SUBREG)
905 abort ();
907 return SUBREG_WORD (x) == 0;
910 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
911 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
912 least-significant part of X.
913 MODE specifies how big a part of X to return;
914 it usually should not be larger than a word.
915 If X is a MEM whose address is a QUEUED, the value may be so also. */
918 gen_lowpart (mode, x)
919 enum machine_mode mode;
920 register rtx x;
922 rtx result = gen_lowpart_common (mode, x);
924 if (result)
925 return result;
926 else if (GET_CODE (x) == REG)
928 /* Must be a hard reg that's not valid in MODE. */
929 result = gen_lowpart_common (mode, copy_to_reg (x));
930 if (result == 0)
931 abort ();
932 return result;
934 else if (GET_CODE (x) == MEM)
936 /* The only additional case we can do is MEM. */
937 register int offset = 0;
938 if (WORDS_BIG_ENDIAN)
939 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
940 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
942 if (BYTES_BIG_ENDIAN)
943 /* Adjust the address so that the address-after-the-data
944 is unchanged. */
945 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
946 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
948 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
950 else if (GET_CODE (x) == ADDRESSOF)
951 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
952 else
953 abort ();
956 /* Like `gen_lowpart', but refer to the most significant part.
957 This is used to access the imaginary part of a complex number. */
960 gen_highpart (mode, x)
961 enum machine_mode mode;
962 register rtx x;
964 /* This case loses if X is a subreg. To catch bugs early,
965 complain if an invalid MODE is used even in other cases. */
966 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
967 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
968 abort ();
969 if (GET_CODE (x) == CONST_DOUBLE
970 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
971 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
972 #endif
974 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
975 else if (GET_CODE (x) == CONST_INT)
976 return const0_rtx;
977 else if (GET_CODE (x) == MEM)
979 register int offset = 0;
980 if (! WORDS_BIG_ENDIAN)
981 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
982 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
984 if (! BYTES_BIG_ENDIAN
985 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
986 offset -= (GET_MODE_SIZE (mode)
987 - MIN (UNITS_PER_WORD,
988 GET_MODE_SIZE (GET_MODE (x))));
990 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
992 else if (GET_CODE (x) == SUBREG)
994 /* The only time this should occur is when we are looking at a
995 multi-word item with a SUBREG whose mode is the same as that of the
996 item. It isn't clear what we would do if it wasn't. */
997 if (SUBREG_WORD (x) != 0)
998 abort ();
999 return gen_highpart (mode, SUBREG_REG (x));
1001 else if (GET_CODE (x) == REG)
1003 int word = 0;
1005 if (! WORDS_BIG_ENDIAN
1006 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
1007 word = ((GET_MODE_SIZE (GET_MODE (x))
1008 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1009 / UNITS_PER_WORD);
1012 * ??? This fails miserably for complex values being passed in registers
1013 * where the sizeof the real and imaginary part are not equal to the
1014 * sizeof SImode. FIXME
1017 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1018 /* integrate.c can't handle parts of a return value register. */
1019 && (! REG_FUNCTION_VALUE_P (x)
1020 || ! rtx_equal_function_value_matters)
1021 /* We want to keep the stack, frame, and arg pointers special. */
1022 && x != frame_pointer_rtx
1023 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1024 && x != arg_pointer_rtx
1025 #endif
1026 && x != stack_pointer_rtx)
1027 return gen_rtx_REG (mode, REGNO (x) + word);
1028 else
1029 return gen_rtx_SUBREG (mode, x, word);
1031 else
1032 abort ();
1035 /* Return 1 iff X, assumed to be a SUBREG,
1036 refers to the least significant part of its containing reg.
1037 If X is not a SUBREG, always return 1 (it is its own low part!). */
1040 subreg_lowpart_p (x)
1041 rtx x;
1043 if (GET_CODE (x) != SUBREG)
1044 return 1;
1045 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1046 return 0;
1048 if (WORDS_BIG_ENDIAN
1049 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1050 return (SUBREG_WORD (x)
1051 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1052 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1053 / UNITS_PER_WORD));
1055 return SUBREG_WORD (x) == 0;
1058 /* Return subword I of operand OP.
1059 The word number, I, is interpreted as the word number starting at the
1060 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1061 otherwise it is the high-order word.
1063 If we cannot extract the required word, we return zero. Otherwise, an
1064 rtx corresponding to the requested word will be returned.
1066 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1067 reload has completed, a valid address will always be returned. After
1068 reload, if a valid address cannot be returned, we return zero.
1070 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1071 it is the responsibility of the caller.
1073 MODE is the mode of OP in case it is a CONST_INT. */
1076 operand_subword (op, i, validate_address, mode)
1077 rtx op;
1078 int i;
1079 int validate_address;
1080 enum machine_mode mode;
1082 HOST_WIDE_INT val;
1083 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1085 if (mode == VOIDmode)
1086 mode = GET_MODE (op);
1088 if (mode == VOIDmode)
1089 abort ();
1091 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1092 if (mode != BLKmode
1093 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1094 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1095 return 0;
1097 /* If OP is already an integer word, return it. */
1098 if (GET_MODE_CLASS (mode) == MODE_INT
1099 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1100 return op;
1102 /* If OP is a REG or SUBREG, we can handle it very simply. */
1103 if (GET_CODE (op) == REG)
1105 /* If the register is not valid for MODE, return 0. If we don't
1106 do this, there is no way to fix up the resulting REG later. */
1107 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1108 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1109 return 0;
1110 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1111 || (REG_FUNCTION_VALUE_P (op)
1112 && rtx_equal_function_value_matters)
1113 /* We want to keep the stack, frame, and arg pointers
1114 special. */
1115 || op == frame_pointer_rtx
1116 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1117 || op == arg_pointer_rtx
1118 #endif
1119 || op == stack_pointer_rtx)
1120 return gen_rtx_SUBREG (word_mode, op, i);
1121 else
1122 return gen_rtx_REG (word_mode, REGNO (op) + i);
1124 else if (GET_CODE (op) == SUBREG)
1125 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1126 else if (GET_CODE (op) == CONCAT)
1128 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1129 if (i < partwords)
1130 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1131 return operand_subword (XEXP (op, 1), i - partwords,
1132 validate_address, mode);
1135 /* Form a new MEM at the requested address. */
1136 if (GET_CODE (op) == MEM)
1138 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1139 rtx new;
1141 if (validate_address)
1143 if (reload_completed)
1145 if (! strict_memory_address_p (word_mode, addr))
1146 return 0;
1148 else
1149 addr = memory_address (word_mode, addr);
1152 new = gen_rtx_MEM (word_mode, addr);
1154 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1155 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1156 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1158 return new;
1161 /* The only remaining cases are when OP is a constant. If the host and
1162 target floating formats are the same, handling two-word floating
1163 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1164 are defined as returning one or two 32 bit values, respectively,
1165 and not values of BITS_PER_WORD bits. */
1166 #ifdef REAL_ARITHMETIC
1167 /* The output is some bits, the width of the target machine's word.
1168 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1169 host can't. */
1170 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1171 && GET_MODE_CLASS (mode) == MODE_FLOAT
1172 && GET_MODE_BITSIZE (mode) == 64
1173 && GET_CODE (op) == CONST_DOUBLE)
1175 long k[2];
1176 REAL_VALUE_TYPE rv;
1178 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1179 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1181 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1182 which the words are written depends on the word endianness.
1184 ??? This is a potential portability problem and should
1185 be fixed at some point. */
1186 if (BITS_PER_WORD == 32)
1187 return GEN_INT ((HOST_WIDE_INT) k[i]);
1188 #if HOST_BITS_PER_WIDE_INT > 32
1189 else if (BITS_PER_WORD >= 64 && i == 0)
1190 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1191 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1192 #endif
1193 else if (BITS_PER_WORD == 16)
1195 long value;
1196 value = k[i >> 1];
1197 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1198 value >>= 16;
1199 value &= 0xffff;
1200 return GEN_INT ((HOST_WIDE_INT) value);
1202 else
1203 abort ();
1205 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1206 && GET_MODE_CLASS (mode) == MODE_FLOAT
1207 && GET_MODE_BITSIZE (mode) > 64
1208 && GET_CODE (op) == CONST_DOUBLE)
1210 long k[4];
1211 REAL_VALUE_TYPE rv;
1213 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1214 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1216 if (BITS_PER_WORD == 32)
1217 return GEN_INT ((HOST_WIDE_INT) k[i]);
1219 #else /* no REAL_ARITHMETIC */
1220 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1221 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1222 || flag_pretend_float)
1223 && GET_MODE_CLASS (mode) == MODE_FLOAT
1224 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1225 && GET_CODE (op) == CONST_DOUBLE)
1227 /* The constant is stored in the host's word-ordering,
1228 but we want to access it in the target's word-ordering. Some
1229 compilers don't like a conditional inside macro args, so we have two
1230 copies of the return. */
1231 #ifdef HOST_WORDS_BIG_ENDIAN
1232 return GEN_INT (i == WORDS_BIG_ENDIAN
1233 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1234 #else
1235 return GEN_INT (i != WORDS_BIG_ENDIAN
1236 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1237 #endif
1239 #endif /* no REAL_ARITHMETIC */
1241 /* Single word float is a little harder, since single- and double-word
1242 values often do not have the same high-order bits. We have already
1243 verified that we want the only defined word of the single-word value. */
1244 #ifdef REAL_ARITHMETIC
1245 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1246 && GET_MODE_BITSIZE (mode) == 32
1247 && GET_CODE (op) == CONST_DOUBLE)
1249 long l;
1250 REAL_VALUE_TYPE rv;
1252 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1253 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1255 if (BITS_PER_WORD == 16)
1257 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1258 l >>= 16;
1259 l &= 0xffff;
1261 return GEN_INT ((HOST_WIDE_INT) l);
1263 #else
1264 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1265 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1266 || flag_pretend_float)
1267 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1268 && GET_MODE_CLASS (mode) == MODE_FLOAT
1269 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1270 && GET_CODE (op) == CONST_DOUBLE)
1272 double d;
1273 union {float f; HOST_WIDE_INT i; } u;
1275 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1277 u.f = d;
1278 return GEN_INT (u.i);
1280 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1281 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1282 || flag_pretend_float)
1283 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1284 && GET_MODE_CLASS (mode) == MODE_FLOAT
1285 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1286 && GET_CODE (op) == CONST_DOUBLE)
1288 double d;
1289 union {double d; HOST_WIDE_INT i; } u;
1291 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1293 u.d = d;
1294 return GEN_INT (u.i);
1296 #endif /* no REAL_ARITHMETIC */
1298 /* The only remaining cases that we can handle are integers.
1299 Convert to proper endianness now since these cases need it.
1300 At this point, i == 0 means the low-order word.
1302 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1303 in general. However, if OP is (const_int 0), we can just return
1304 it for any word. */
1306 if (op == const0_rtx)
1307 return op;
1309 if (GET_MODE_CLASS (mode) != MODE_INT
1310 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1311 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1312 return 0;
1314 if (WORDS_BIG_ENDIAN)
1315 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1317 /* Find out which word on the host machine this value is in and get
1318 it from the constant. */
1319 val = (i / size_ratio == 0
1320 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1321 : (GET_CODE (op) == CONST_INT
1322 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1324 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1325 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1326 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1327 & (((HOST_WIDE_INT) 1
1328 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1330 return GEN_INT (val);
1333 /* Similar to `operand_subword', but never return 0. If we can't extract
1334 the required subword, put OP into a register and try again. If that fails,
1335 abort. We always validate the address in this case. It is not valid
1336 to call this function after reload; it is mostly meant for RTL
1337 generation.
1339 MODE is the mode of OP, in case it is CONST_INT. */
1342 operand_subword_force (op, i, mode)
1343 rtx op;
1344 int i;
1345 enum machine_mode mode;
1347 rtx result = operand_subword (op, i, 1, mode);
1349 if (result)
1350 return result;
1352 if (mode != BLKmode && mode != VOIDmode)
1353 op = force_reg (mode, op);
1355 result = operand_subword (op, i, 1, mode);
1356 if (result == 0)
1357 abort ();
1359 return result;
1362 /* Given a compare instruction, swap the operands.
1363 A test instruction is changed into a compare of 0 against the operand. */
1365 void
1366 reverse_comparison (insn)
1367 rtx insn;
1369 rtx body = PATTERN (insn);
1370 rtx comp;
1372 if (GET_CODE (body) == SET)
1373 comp = SET_SRC (body);
1374 else
1375 comp = SET_SRC (XVECEXP (body, 0, 0));
1377 if (GET_CODE (comp) == COMPARE)
1379 rtx op0 = XEXP (comp, 0);
1380 rtx op1 = XEXP (comp, 1);
1381 XEXP (comp, 0) = op1;
1382 XEXP (comp, 1) = op0;
1384 else
1386 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1387 if (GET_CODE (body) == SET)
1388 SET_SRC (body) = new;
1389 else
1390 SET_SRC (XVECEXP (body, 0, 0)) = new;
1394 /* Return a memory reference like MEMREF, but with its mode changed
1395 to MODE and its address changed to ADDR.
1396 (VOIDmode means don't change the mode.
1397 NULL for ADDR means don't change the address.) */
1400 change_address (memref, mode, addr)
1401 rtx memref;
1402 enum machine_mode mode;
1403 rtx addr;
1405 rtx new;
1407 if (GET_CODE (memref) != MEM)
1408 abort ();
1409 if (mode == VOIDmode)
1410 mode = GET_MODE (memref);
1411 if (addr == 0)
1412 addr = XEXP (memref, 0);
1414 /* If reload is in progress or has completed, ADDR must be valid.
1415 Otherwise, we can call memory_address to make it valid. */
1416 if (reload_completed || reload_in_progress)
1418 if (! memory_address_p (mode, addr))
1419 abort ();
1421 else
1422 addr = memory_address (mode, addr);
1424 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1425 return memref;
1427 new = gen_rtx_MEM (mode, addr);
1428 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1429 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1430 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1431 return new;
1434 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1437 gen_label_rtx ()
1439 register rtx label;
1441 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1442 NULL_RTX, label_num++, NULL_PTR);
1444 LABEL_NUSES (label) = 0;
1445 return label;
1448 /* For procedure integration. */
1450 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1451 from a permanent obstack when the opportunity arises. */
1454 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1455 last_labelno, max_parm_regnum, max_regnum, args_size,
1456 pops_args, stack_slots, forced_labels, function_flags,
1457 outgoing_args_size, original_arg_vector,
1458 original_decl_initial, regno_rtx, regno_flag,
1459 regno_align, parm_reg_stack_loc)
1460 rtx first_insn, first_parm_insn;
1461 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1462 int pops_args;
1463 rtx stack_slots;
1464 rtx forced_labels;
1465 int function_flags;
1466 int outgoing_args_size;
1467 rtvec original_arg_vector;
1468 rtx original_decl_initial;
1469 rtvec regno_rtx;
1470 char *regno_flag;
1471 char *regno_align;
1472 rtvec parm_reg_stack_loc;
1474 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1475 cur_insn_uid++, NULL_RTX,
1476 first_insn, first_parm_insn,
1477 first_labelno, last_labelno,
1478 max_parm_regnum, max_regnum, args_size,
1479 pops_args, stack_slots, forced_labels,
1480 function_flags, outgoing_args_size,
1481 original_arg_vector,
1482 original_decl_initial,
1483 regno_rtx, regno_flag, regno_align,
1484 parm_reg_stack_loc);
1485 return header;
1488 /* Install new pointers to the first and last insns in the chain.
1489 Also, set cur_insn_uid to one higher than the last in use.
1490 Used for an inline-procedure after copying the insn chain. */
1492 void
1493 set_new_first_and_last_insn (first, last)
1494 rtx first, last;
1496 rtx insn;
1498 first_insn = first;
1499 last_insn = last;
1500 cur_insn_uid = 0;
1502 for (insn = first; insn; insn = NEXT_INSN (insn))
1503 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1505 cur_insn_uid++;
1508 /* Set the range of label numbers found in the current function.
1509 This is used when belatedly compiling an inline function. */
1511 void
1512 set_new_first_and_last_label_num (first, last)
1513 int first, last;
1515 base_label_num = label_num;
1516 first_label_num = first;
1517 last_label_num = last;
1520 /* Save all variables describing the current status into the structure *P.
1521 This is used before starting a nested function. */
1523 void
1524 save_emit_status (p)
1525 struct function *p;
1527 p->reg_rtx_no = reg_rtx_no;
1528 p->first_label_num = first_label_num;
1529 p->first_insn = first_insn;
1530 p->last_insn = last_insn;
1531 p->sequence_rtl_expr = sequence_rtl_expr;
1532 p->sequence_stack = sequence_stack;
1533 p->cur_insn_uid = cur_insn_uid;
1534 p->last_linenum = last_linenum;
1535 p->last_filename = last_filename;
1536 p->regno_pointer_flag = regno_pointer_flag;
1537 p->regno_pointer_align = regno_pointer_align;
1538 p->regno_pointer_flag_length = regno_pointer_flag_length;
1539 p->regno_reg_rtx = regno_reg_rtx;
1542 /* Restore all variables describing the current status from the structure *P.
1543 This is used after a nested function. */
1545 void
1546 restore_emit_status (p)
1547 struct function *p;
1549 int i;
1551 reg_rtx_no = p->reg_rtx_no;
1552 first_label_num = p->first_label_num;
1553 last_label_num = 0;
1554 first_insn = p->first_insn;
1555 last_insn = p->last_insn;
1556 sequence_rtl_expr = p->sequence_rtl_expr;
1557 sequence_stack = p->sequence_stack;
1558 cur_insn_uid = p->cur_insn_uid;
1559 last_linenum = p->last_linenum;
1560 last_filename = p->last_filename;
1561 regno_pointer_flag = p->regno_pointer_flag;
1562 regno_pointer_align = p->regno_pointer_align;
1563 regno_pointer_flag_length = p->regno_pointer_flag_length;
1564 regno_reg_rtx = p->regno_reg_rtx;
1566 /* Clear our cache of rtx expressions for start_sequence and
1567 gen_sequence. */
1568 sequence_element_free_list = 0;
1569 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1570 sequence_result[i] = 0;
1572 free_insn = 0;
1575 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1576 It does not work to do this twice, because the mark bits set here
1577 are not cleared afterwards. */
1579 void
1580 unshare_all_rtl (insn)
1581 register rtx insn;
1583 for (; insn; insn = NEXT_INSN (insn))
1584 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1585 || GET_CODE (insn) == CALL_INSN)
1587 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1588 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1589 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1592 /* Make sure the addresses of stack slots found outside the insn chain
1593 (such as, in DECL_RTL of a variable) are not shared
1594 with the insn chain.
1596 This special care is necessary when the stack slot MEM does not
1597 actually appear in the insn chain. If it does appear, its address
1598 is unshared from all else at that point. */
1600 copy_rtx_if_shared (stack_slot_list);
1603 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1604 Recursively does the same for subexpressions. */
1607 copy_rtx_if_shared (orig)
1608 rtx orig;
1610 register rtx x = orig;
1611 register int i;
1612 register enum rtx_code code;
1613 register char *format_ptr;
1614 int copied = 0;
1616 if (x == 0)
1617 return 0;
1619 code = GET_CODE (x);
1621 /* These types may be freely shared. */
1623 switch (code)
1625 case REG:
1626 case QUEUED:
1627 case CONST_INT:
1628 case CONST_DOUBLE:
1629 case SYMBOL_REF:
1630 case CODE_LABEL:
1631 case PC:
1632 case CC0:
1633 case SCRATCH:
1634 /* SCRATCH must be shared because they represent distinct values. */
1635 return x;
1637 case CONST:
1638 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1639 a LABEL_REF, it isn't sharable. */
1640 if (GET_CODE (XEXP (x, 0)) == PLUS
1641 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1642 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1643 return x;
1644 break;
1646 case INSN:
1647 case JUMP_INSN:
1648 case CALL_INSN:
1649 case NOTE:
1650 case BARRIER:
1651 /* The chain of insns is not being copied. */
1652 return x;
1654 case MEM:
1655 /* A MEM is allowed to be shared if its address is constant
1656 or is a constant plus one of the special registers. */
1657 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1658 || XEXP (x, 0) == virtual_stack_vars_rtx
1659 || XEXP (x, 0) == virtual_incoming_args_rtx)
1660 return x;
1662 if (GET_CODE (XEXP (x, 0)) == PLUS
1663 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1664 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1665 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1667 /* This MEM can appear in more than one place,
1668 but its address better not be shared with anything else. */
1669 if (! x->used)
1670 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1671 x->used = 1;
1672 return x;
1674 break;
1676 default:
1677 break;
1680 /* This rtx may not be shared. If it has already been seen,
1681 replace it with a copy of itself. */
1683 if (x->used)
1685 register rtx copy;
1687 copy = rtx_alloc (code);
1688 bcopy ((char *) x, (char *) copy,
1689 (sizeof (*copy) - sizeof (copy->fld)
1690 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1691 x = copy;
1692 copied = 1;
1694 x->used = 1;
1696 /* Now scan the subexpressions recursively.
1697 We can store any replaced subexpressions directly into X
1698 since we know X is not shared! Any vectors in X
1699 must be copied if X was copied. */
1701 format_ptr = GET_RTX_FORMAT (code);
1703 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1705 switch (*format_ptr++)
1707 case 'e':
1708 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1709 break;
1711 case 'E':
1712 if (XVEC (x, i) != NULL)
1714 register int j;
1715 int len = XVECLEN (x, i);
1717 if (copied && len > 0)
1718 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1719 for (j = 0; j < len; j++)
1720 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1722 break;
1725 return x;
1728 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1729 to look for shared sub-parts. */
1731 void
1732 reset_used_flags (x)
1733 rtx x;
1735 register int i, j;
1736 register enum rtx_code code;
1737 register char *format_ptr;
1739 if (x == 0)
1740 return;
1742 code = GET_CODE (x);
1744 /* These types may be freely shared so we needn't do any resetting
1745 for them. */
1747 switch (code)
1749 case REG:
1750 case QUEUED:
1751 case CONST_INT:
1752 case CONST_DOUBLE:
1753 case SYMBOL_REF:
1754 case CODE_LABEL:
1755 case PC:
1756 case CC0:
1757 return;
1759 case INSN:
1760 case JUMP_INSN:
1761 case CALL_INSN:
1762 case NOTE:
1763 case LABEL_REF:
1764 case BARRIER:
1765 /* The chain of insns is not being copied. */
1766 return;
1768 default:
1769 break;
1772 x->used = 0;
1774 format_ptr = GET_RTX_FORMAT (code);
1775 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1777 switch (*format_ptr++)
1779 case 'e':
1780 reset_used_flags (XEXP (x, i));
1781 break;
1783 case 'E':
1784 for (j = 0; j < XVECLEN (x, i); j++)
1785 reset_used_flags (XVECEXP (x, i, j));
1786 break;
1791 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1792 Return X or the rtx for the pseudo reg the value of X was copied into.
1793 OTHER must be valid as a SET_DEST. */
1796 make_safe_from (x, other)
1797 rtx x, other;
1799 while (1)
1800 switch (GET_CODE (other))
1802 case SUBREG:
1803 other = SUBREG_REG (other);
1804 break;
1805 case STRICT_LOW_PART:
1806 case SIGN_EXTEND:
1807 case ZERO_EXTEND:
1808 other = XEXP (other, 0);
1809 break;
1810 default:
1811 goto done;
1813 done:
1814 if ((GET_CODE (other) == MEM
1815 && ! CONSTANT_P (x)
1816 && GET_CODE (x) != REG
1817 && GET_CODE (x) != SUBREG)
1818 || (GET_CODE (other) == REG
1819 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1820 || reg_mentioned_p (other, x))))
1822 rtx temp = gen_reg_rtx (GET_MODE (x));
1823 emit_move_insn (temp, x);
1824 return temp;
1826 return x;
1829 /* Emission of insns (adding them to the doubly-linked list). */
1831 /* Return the first insn of the current sequence or current function. */
1834 get_insns ()
1836 return first_insn;
1839 /* Return the last insn emitted in current sequence or current function. */
1842 get_last_insn ()
1844 return last_insn;
1847 /* Specify a new insn as the last in the chain. */
1849 void
1850 set_last_insn (insn)
1851 rtx insn;
1853 if (NEXT_INSN (insn) != 0)
1854 abort ();
1855 last_insn = insn;
1858 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1861 get_last_insn_anywhere ()
1863 struct sequence_stack *stack;
1864 if (last_insn)
1865 return last_insn;
1866 for (stack = sequence_stack; stack; stack = stack->next)
1867 if (stack->last != 0)
1868 return stack->last;
1869 return 0;
1872 /* Return a number larger than any instruction's uid in this function. */
1875 get_max_uid ()
1877 return cur_insn_uid;
1880 /* Return the next insn. If it is a SEQUENCE, return the first insn
1881 of the sequence. */
1884 next_insn (insn)
1885 rtx insn;
1887 if (insn)
1889 insn = NEXT_INSN (insn);
1890 if (insn && GET_CODE (insn) == INSN
1891 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1892 insn = XVECEXP (PATTERN (insn), 0, 0);
1895 return insn;
1898 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1899 of the sequence. */
1902 previous_insn (insn)
1903 rtx insn;
1905 if (insn)
1907 insn = PREV_INSN (insn);
1908 if (insn && GET_CODE (insn) == INSN
1909 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1910 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1913 return insn;
1916 /* Return the next insn after INSN that is not a NOTE. This routine does not
1917 look inside SEQUENCEs. */
1920 next_nonnote_insn (insn)
1921 rtx insn;
1923 while (insn)
1925 insn = NEXT_INSN (insn);
1926 if (insn == 0 || GET_CODE (insn) != NOTE)
1927 break;
1930 return insn;
1933 /* Return the previous insn before INSN that is not a NOTE. This routine does
1934 not look inside SEQUENCEs. */
1937 prev_nonnote_insn (insn)
1938 rtx insn;
1940 while (insn)
1942 insn = PREV_INSN (insn);
1943 if (insn == 0 || GET_CODE (insn) != NOTE)
1944 break;
1947 return insn;
1950 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1951 or 0, if there is none. This routine does not look inside
1952 SEQUENCEs. */
1955 next_real_insn (insn)
1956 rtx insn;
1958 while (insn)
1960 insn = NEXT_INSN (insn);
1961 if (insn == 0 || GET_CODE (insn) == INSN
1962 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1963 break;
1966 return insn;
1969 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1970 or 0, if there is none. This routine does not look inside
1971 SEQUENCEs. */
1974 prev_real_insn (insn)
1975 rtx insn;
1977 while (insn)
1979 insn = PREV_INSN (insn);
1980 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1981 || GET_CODE (insn) == JUMP_INSN)
1982 break;
1985 return insn;
1988 /* Find the next insn after INSN that really does something. This routine
1989 does not look inside SEQUENCEs. Until reload has completed, this is the
1990 same as next_real_insn. */
1993 next_active_insn (insn)
1994 rtx insn;
1996 while (insn)
1998 insn = NEXT_INSN (insn);
1999 if (insn == 0
2000 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2001 || (GET_CODE (insn) == INSN
2002 && (! reload_completed
2003 || (GET_CODE (PATTERN (insn)) != USE
2004 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2005 break;
2008 return insn;
2011 /* Find the last insn before INSN that really does something. This routine
2012 does not look inside SEQUENCEs. Until reload has completed, this is the
2013 same as prev_real_insn. */
2016 prev_active_insn (insn)
2017 rtx insn;
2019 while (insn)
2021 insn = PREV_INSN (insn);
2022 if (insn == 0
2023 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2024 || (GET_CODE (insn) == INSN
2025 && (! reload_completed
2026 || (GET_CODE (PATTERN (insn)) != USE
2027 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2028 break;
2031 return insn;
2034 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2037 next_label (insn)
2038 rtx insn;
2040 while (insn)
2042 insn = NEXT_INSN (insn);
2043 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2044 break;
2047 return insn;
2050 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2053 prev_label (insn)
2054 rtx insn;
2056 while (insn)
2058 insn = PREV_INSN (insn);
2059 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2060 break;
2063 return insn;
2066 #ifdef HAVE_cc0
2067 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2068 and REG_CC_USER notes so we can find it. */
2070 void
2071 link_cc0_insns (insn)
2072 rtx insn;
2074 rtx user = next_nonnote_insn (insn);
2076 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2077 user = XVECEXP (PATTERN (user), 0, 0);
2079 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2080 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2083 /* Return the next insn that uses CC0 after INSN, which is assumed to
2084 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2085 applied to the result of this function should yield INSN).
2087 Normally, this is simply the next insn. However, if a REG_CC_USER note
2088 is present, it contains the insn that uses CC0.
2090 Return 0 if we can't find the insn. */
2093 next_cc0_user (insn)
2094 rtx insn;
2096 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2098 if (note)
2099 return XEXP (note, 0);
2101 insn = next_nonnote_insn (insn);
2102 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2103 insn = XVECEXP (PATTERN (insn), 0, 0);
2105 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2106 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2107 return insn;
2109 return 0;
2112 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2113 note, it is the previous insn. */
2116 prev_cc0_setter (insn)
2117 rtx insn;
2119 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2121 if (note)
2122 return XEXP (note, 0);
2124 insn = prev_nonnote_insn (insn);
2125 if (! sets_cc0_p (PATTERN (insn)))
2126 abort ();
2128 return insn;
2130 #endif
2132 /* Try splitting insns that can be split for better scheduling.
2133 PAT is the pattern which might split.
2134 TRIAL is the insn providing PAT.
2135 LAST is non-zero if we should return the last insn of the sequence produced.
2137 If this routine succeeds in splitting, it returns the first or last
2138 replacement insn depending on the value of LAST. Otherwise, it
2139 returns TRIAL. If the insn to be returned can be split, it will be. */
2142 try_split (pat, trial, last)
2143 rtx pat, trial;
2144 int last;
2146 rtx before = PREV_INSN (trial);
2147 rtx after = NEXT_INSN (trial);
2148 rtx seq = split_insns (pat, trial);
2149 int has_barrier = 0;
2150 rtx tem;
2152 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2153 We may need to handle this specially. */
2154 if (after && GET_CODE (after) == BARRIER)
2156 has_barrier = 1;
2157 after = NEXT_INSN (after);
2160 if (seq)
2162 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2163 The latter case will normally arise only when being done so that
2164 it, in turn, will be split (SFmode on the 29k is an example). */
2165 if (GET_CODE (seq) == SEQUENCE)
2167 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2168 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2169 increment the usage count so we don't delete the label. */
2170 int i;
2172 if (GET_CODE (trial) == JUMP_INSN)
2173 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2174 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2176 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2178 if (JUMP_LABEL (trial))
2179 LABEL_NUSES (JUMP_LABEL (trial))++;
2182 tem = emit_insn_after (seq, before);
2184 delete_insn (trial);
2185 if (has_barrier)
2186 emit_barrier_after (tem);
2188 /* Recursively call try_split for each new insn created; by the
2189 time control returns here that insn will be fully split, so
2190 set LAST and continue from the insn after the one returned.
2191 We can't use next_active_insn here since AFTER may be a note.
2192 Ignore deleted insns, which can be occur if not optimizing. */
2193 for (tem = NEXT_INSN (before); tem != after;
2194 tem = NEXT_INSN (tem))
2195 if (! INSN_DELETED_P (tem))
2196 tem = try_split (PATTERN (tem), tem, 1);
2198 /* Avoid infinite loop if the result matches the original pattern. */
2199 else if (rtx_equal_p (seq, pat))
2200 return trial;
2201 else
2203 PATTERN (trial) = seq;
2204 INSN_CODE (trial) = -1;
2205 try_split (seq, trial, last);
2208 /* Return either the first or the last insn, depending on which was
2209 requested. */
2210 return last ? prev_active_insn (after) : next_active_insn (before);
2213 return trial;
2216 /* Make and return an INSN rtx, initializing all its slots.
2217 Store PATTERN in the pattern slots. */
2220 make_insn_raw (pattern)
2221 rtx pattern;
2223 register rtx insn;
2225 /* If in RTL generation phase, see if FREE_INSN can be used. */
2226 if (free_insn != 0 && rtx_equal_function_value_matters)
2228 insn = free_insn;
2229 free_insn = NEXT_INSN (free_insn);
2230 PUT_CODE (insn, INSN);
2232 else
2233 insn = rtx_alloc (INSN);
2235 INSN_UID (insn) = cur_insn_uid++;
2236 PATTERN (insn) = pattern;
2237 INSN_CODE (insn) = -1;
2238 LOG_LINKS (insn) = NULL;
2239 REG_NOTES (insn) = NULL;
2241 return insn;
2244 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2246 static rtx
2247 make_jump_insn_raw (pattern)
2248 rtx pattern;
2250 register rtx insn;
2252 insn = rtx_alloc (JUMP_INSN);
2253 INSN_UID (insn) = cur_insn_uid++;
2255 PATTERN (insn) = pattern;
2256 INSN_CODE (insn) = -1;
2257 LOG_LINKS (insn) = NULL;
2258 REG_NOTES (insn) = NULL;
2259 JUMP_LABEL (insn) = NULL;
2261 return insn;
2264 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2266 static rtx
2267 make_call_insn_raw (pattern)
2268 rtx pattern;
2270 register rtx insn;
2272 insn = rtx_alloc (CALL_INSN);
2273 INSN_UID (insn) = cur_insn_uid++;
2275 PATTERN (insn) = pattern;
2276 INSN_CODE (insn) = -1;
2277 LOG_LINKS (insn) = NULL;
2278 REG_NOTES (insn) = NULL;
2279 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2281 return insn;
2284 /* Add INSN to the end of the doubly-linked list.
2285 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2287 void
2288 add_insn (insn)
2289 register rtx insn;
2291 PREV_INSN (insn) = last_insn;
2292 NEXT_INSN (insn) = 0;
2294 if (NULL != last_insn)
2295 NEXT_INSN (last_insn) = insn;
2297 if (NULL == first_insn)
2298 first_insn = insn;
2300 last_insn = insn;
2303 /* Add INSN into the doubly-linked list after insn AFTER. This and
2304 the next should be the only functions called to insert an insn once
2305 delay slots have been filled since only they know how to update a
2306 SEQUENCE. */
2308 void
2309 add_insn_after (insn, after)
2310 rtx insn, after;
2312 rtx next = NEXT_INSN (after);
2314 if (optimize && INSN_DELETED_P (after))
2315 abort ();
2317 NEXT_INSN (insn) = next;
2318 PREV_INSN (insn) = after;
2320 if (next)
2322 PREV_INSN (next) = insn;
2323 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2324 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2326 else if (last_insn == after)
2327 last_insn = insn;
2328 else
2330 struct sequence_stack *stack = sequence_stack;
2331 /* Scan all pending sequences too. */
2332 for (; stack; stack = stack->next)
2333 if (after == stack->last)
2335 stack->last = insn;
2336 break;
2339 if (stack == 0)
2340 abort ();
2343 NEXT_INSN (after) = insn;
2344 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2346 rtx sequence = PATTERN (after);
2347 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2351 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2352 the previous should be the only functions called to insert an insn once
2353 delay slots have been filled since only they know how to update a
2354 SEQUENCE. */
2356 void
2357 add_insn_before (insn, before)
2358 rtx insn, before;
2360 rtx prev = PREV_INSN (before);
2362 if (optimize && INSN_DELETED_P (before))
2363 abort ();
2365 PREV_INSN (insn) = prev;
2366 NEXT_INSN (insn) = before;
2368 if (prev)
2370 NEXT_INSN (prev) = insn;
2371 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2373 rtx sequence = PATTERN (prev);
2374 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2377 else if (first_insn == before)
2378 first_insn = insn;
2379 else
2381 struct sequence_stack *stack = sequence_stack;
2382 /* Scan all pending sequences too. */
2383 for (; stack; stack = stack->next)
2384 if (before == stack->first)
2386 stack->first = insn;
2387 break;
2390 if (stack == 0)
2391 abort ();
2394 PREV_INSN (before) = insn;
2395 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2396 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2399 /* Delete all insns made since FROM.
2400 FROM becomes the new last instruction. */
2402 void
2403 delete_insns_since (from)
2404 rtx from;
2406 if (from == 0)
2407 first_insn = 0;
2408 else
2409 NEXT_INSN (from) = 0;
2410 last_insn = from;
2413 /* This function is deprecated, please use sequences instead.
2415 Move a consecutive bunch of insns to a different place in the chain.
2416 The insns to be moved are those between FROM and TO.
2417 They are moved to a new position after the insn AFTER.
2418 AFTER must not be FROM or TO or any insn in between.
2420 This function does not know about SEQUENCEs and hence should not be
2421 called after delay-slot filling has been done. */
2423 void
2424 reorder_insns (from, to, after)
2425 rtx from, to, after;
2427 /* Splice this bunch out of where it is now. */
2428 if (PREV_INSN (from))
2429 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2430 if (NEXT_INSN (to))
2431 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2432 if (last_insn == to)
2433 last_insn = PREV_INSN (from);
2434 if (first_insn == from)
2435 first_insn = NEXT_INSN (to);
2437 /* Make the new neighbors point to it and it to them. */
2438 if (NEXT_INSN (after))
2439 PREV_INSN (NEXT_INSN (after)) = to;
2441 NEXT_INSN (to) = NEXT_INSN (after);
2442 PREV_INSN (from) = after;
2443 NEXT_INSN (after) = from;
2444 if (after == last_insn)
2445 last_insn = to;
2448 /* Return the line note insn preceding INSN. */
2450 static rtx
2451 find_line_note (insn)
2452 rtx insn;
2454 if (no_line_numbers)
2455 return 0;
2457 for (; insn; insn = PREV_INSN (insn))
2458 if (GET_CODE (insn) == NOTE
2459 && NOTE_LINE_NUMBER (insn) >= 0)
2460 break;
2462 return insn;
2465 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2466 of the moved insns when debugging. This may insert a note between AFTER
2467 and FROM, and another one after TO. */
2469 void
2470 reorder_insns_with_line_notes (from, to, after)
2471 rtx from, to, after;
2473 rtx from_line = find_line_note (from);
2474 rtx after_line = find_line_note (after);
2476 reorder_insns (from, to, after);
2478 if (from_line == after_line)
2479 return;
2481 if (from_line)
2482 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2483 NOTE_LINE_NUMBER (from_line),
2484 after);
2485 if (after_line)
2486 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2487 NOTE_LINE_NUMBER (after_line),
2488 to);
2491 /* Emit an insn of given code and pattern
2492 at a specified place within the doubly-linked list. */
2494 /* Make an instruction with body PATTERN
2495 and output it before the instruction BEFORE. */
2498 emit_insn_before (pattern, before)
2499 register rtx pattern, before;
2501 register rtx insn = before;
2503 if (GET_CODE (pattern) == SEQUENCE)
2505 register int i;
2507 for (i = 0; i < XVECLEN (pattern, 0); i++)
2509 insn = XVECEXP (pattern, 0, i);
2510 add_insn_before (insn, before);
2512 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2513 sequence_result[XVECLEN (pattern, 0)] = pattern;
2515 else
2517 insn = make_insn_raw (pattern);
2518 add_insn_before (insn, before);
2521 return insn;
2524 /* Make an instruction with body PATTERN and code JUMP_INSN
2525 and output it before the instruction BEFORE. */
2528 emit_jump_insn_before (pattern, before)
2529 register rtx pattern, before;
2531 register rtx insn;
2533 if (GET_CODE (pattern) == SEQUENCE)
2534 insn = emit_insn_before (pattern, before);
2535 else
2537 insn = make_jump_insn_raw (pattern);
2538 add_insn_before (insn, before);
2541 return insn;
2544 /* Make an instruction with body PATTERN and code CALL_INSN
2545 and output it before the instruction BEFORE. */
2548 emit_call_insn_before (pattern, before)
2549 register rtx pattern, before;
2551 register rtx insn;
2553 if (GET_CODE (pattern) == SEQUENCE)
2554 insn = emit_insn_before (pattern, before);
2555 else
2557 insn = make_call_insn_raw (pattern);
2558 add_insn_before (insn, before);
2559 PUT_CODE (insn, CALL_INSN);
2562 return insn;
2565 /* Make an insn of code BARRIER
2566 and output it before the insn AFTER. */
2569 emit_barrier_before (before)
2570 register rtx before;
2572 register rtx insn = rtx_alloc (BARRIER);
2574 INSN_UID (insn) = cur_insn_uid++;
2576 add_insn_before (insn, before);
2577 return insn;
2580 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2583 emit_note_before (subtype, before)
2584 int subtype;
2585 rtx before;
2587 register rtx note = rtx_alloc (NOTE);
2588 INSN_UID (note) = cur_insn_uid++;
2589 NOTE_SOURCE_FILE (note) = 0;
2590 NOTE_LINE_NUMBER (note) = subtype;
2592 add_insn_before (note, before);
2593 return note;
2596 /* Make an insn of code INSN with body PATTERN
2597 and output it after the insn AFTER. */
2600 emit_insn_after (pattern, after)
2601 register rtx pattern, after;
2603 register rtx insn = after;
2605 if (GET_CODE (pattern) == SEQUENCE)
2607 register int i;
2609 for (i = 0; i < XVECLEN (pattern, 0); i++)
2611 insn = XVECEXP (pattern, 0, i);
2612 add_insn_after (insn, after);
2613 after = insn;
2615 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2616 sequence_result[XVECLEN (pattern, 0)] = pattern;
2618 else
2620 insn = make_insn_raw (pattern);
2621 add_insn_after (insn, after);
2624 return insn;
2627 /* Similar to emit_insn_after, except that line notes are to be inserted so
2628 as to act as if this insn were at FROM. */
2630 void
2631 emit_insn_after_with_line_notes (pattern, after, from)
2632 rtx pattern, after, from;
2634 rtx from_line = find_line_note (from);
2635 rtx after_line = find_line_note (after);
2636 rtx insn = emit_insn_after (pattern, after);
2638 if (from_line)
2639 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2640 NOTE_LINE_NUMBER (from_line),
2641 after);
2643 if (after_line)
2644 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2645 NOTE_LINE_NUMBER (after_line),
2646 insn);
2649 /* Make an insn of code JUMP_INSN with body PATTERN
2650 and output it after the insn AFTER. */
2653 emit_jump_insn_after (pattern, after)
2654 register rtx pattern, after;
2656 register rtx insn;
2658 if (GET_CODE (pattern) == SEQUENCE)
2659 insn = emit_insn_after (pattern, after);
2660 else
2662 insn = make_jump_insn_raw (pattern);
2663 add_insn_after (insn, after);
2666 return insn;
2669 /* Make an insn of code BARRIER
2670 and output it after the insn AFTER. */
2673 emit_barrier_after (after)
2674 register rtx after;
2676 register rtx insn = rtx_alloc (BARRIER);
2678 INSN_UID (insn) = cur_insn_uid++;
2680 add_insn_after (insn, after);
2681 return insn;
2684 /* Emit the label LABEL after the insn AFTER. */
2687 emit_label_after (label, after)
2688 rtx label, after;
2690 /* This can be called twice for the same label
2691 as a result of the confusion that follows a syntax error!
2692 So make it harmless. */
2693 if (INSN_UID (label) == 0)
2695 INSN_UID (label) = cur_insn_uid++;
2696 add_insn_after (label, after);
2699 return label;
2702 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2705 emit_note_after (subtype, after)
2706 int subtype;
2707 rtx after;
2709 register rtx note = rtx_alloc (NOTE);
2710 INSN_UID (note) = cur_insn_uid++;
2711 NOTE_SOURCE_FILE (note) = 0;
2712 NOTE_LINE_NUMBER (note) = subtype;
2713 add_insn_after (note, after);
2714 return note;
2717 /* Emit a line note for FILE and LINE after the insn AFTER. */
2720 emit_line_note_after (file, line, after)
2721 char *file;
2722 int line;
2723 rtx after;
2725 register rtx note;
2727 if (no_line_numbers && line > 0)
2729 cur_insn_uid++;
2730 return 0;
2733 note = rtx_alloc (NOTE);
2734 INSN_UID (note) = cur_insn_uid++;
2735 NOTE_SOURCE_FILE (note) = file;
2736 NOTE_LINE_NUMBER (note) = line;
2737 add_insn_after (note, after);
2738 return note;
2741 /* Make an insn of code INSN with pattern PATTERN
2742 and add it to the end of the doubly-linked list.
2743 If PATTERN is a SEQUENCE, take the elements of it
2744 and emit an insn for each element.
2746 Returns the last insn emitted. */
2749 emit_insn (pattern)
2750 rtx pattern;
2752 rtx insn = last_insn;
2754 if (GET_CODE (pattern) == SEQUENCE)
2756 register int i;
2758 for (i = 0; i < XVECLEN (pattern, 0); i++)
2760 insn = XVECEXP (pattern, 0, i);
2761 add_insn (insn);
2763 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2764 sequence_result[XVECLEN (pattern, 0)] = pattern;
2766 else
2768 insn = make_insn_raw (pattern);
2769 add_insn (insn);
2772 return insn;
2775 /* Emit the insns in a chain starting with INSN.
2776 Return the last insn emitted. */
2779 emit_insns (insn)
2780 rtx insn;
2782 rtx last = 0;
2784 while (insn)
2786 rtx next = NEXT_INSN (insn);
2787 add_insn (insn);
2788 last = insn;
2789 insn = next;
2792 return last;
2795 /* Emit the insns in a chain starting with INSN and place them in front of
2796 the insn BEFORE. Return the last insn emitted. */
2799 emit_insns_before (insn, before)
2800 rtx insn;
2801 rtx before;
2803 rtx last = 0;
2805 while (insn)
2807 rtx next = NEXT_INSN (insn);
2808 add_insn_before (insn, before);
2809 last = insn;
2810 insn = next;
2813 return last;
2816 /* Emit the insns in a chain starting with FIRST and place them in back of
2817 the insn AFTER. Return the last insn emitted. */
2820 emit_insns_after (first, after)
2821 register rtx first;
2822 register rtx after;
2824 register rtx last;
2825 register rtx after_after;
2827 if (!after)
2828 abort ();
2830 if (!first)
2831 return first;
2833 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2834 continue;
2836 after_after = NEXT_INSN (after);
2838 NEXT_INSN (after) = first;
2839 PREV_INSN (first) = after;
2840 NEXT_INSN (last) = after_after;
2841 if (after_after)
2842 PREV_INSN (after_after) = last;
2844 if (after == last_insn)
2845 last_insn = last;
2846 return last;
2849 /* Make an insn of code JUMP_INSN with pattern PATTERN
2850 and add it to the end of the doubly-linked list. */
2853 emit_jump_insn (pattern)
2854 rtx pattern;
2856 if (GET_CODE (pattern) == SEQUENCE)
2857 return emit_insn (pattern);
2858 else
2860 register rtx insn = make_jump_insn_raw (pattern);
2861 add_insn (insn);
2862 return insn;
2866 /* Make an insn of code CALL_INSN with pattern PATTERN
2867 and add it to the end of the doubly-linked list. */
2870 emit_call_insn (pattern)
2871 rtx pattern;
2873 if (GET_CODE (pattern) == SEQUENCE)
2874 return emit_insn (pattern);
2875 else
2877 register rtx insn = make_call_insn_raw (pattern);
2878 add_insn (insn);
2879 PUT_CODE (insn, CALL_INSN);
2880 return insn;
2884 /* Add the label LABEL to the end of the doubly-linked list. */
2887 emit_label (label)
2888 rtx label;
2890 /* This can be called twice for the same label
2891 as a result of the confusion that follows a syntax error!
2892 So make it harmless. */
2893 if (INSN_UID (label) == 0)
2895 INSN_UID (label) = cur_insn_uid++;
2896 add_insn (label);
2898 return label;
2901 /* Make an insn of code BARRIER
2902 and add it to the end of the doubly-linked list. */
2905 emit_barrier ()
2907 register rtx barrier = rtx_alloc (BARRIER);
2908 INSN_UID (barrier) = cur_insn_uid++;
2909 add_insn (barrier);
2910 return barrier;
2913 /* Make an insn of code NOTE
2914 with data-fields specified by FILE and LINE
2915 and add it to the end of the doubly-linked list,
2916 but only if line-numbers are desired for debugging info. */
2919 emit_line_note (file, line)
2920 char *file;
2921 int line;
2923 emit_filename = file;
2924 emit_lineno = line;
2926 #if 0
2927 if (no_line_numbers)
2928 return 0;
2929 #endif
2931 return emit_note (file, line);
2934 /* Make an insn of code NOTE
2935 with data-fields specified by FILE and LINE
2936 and add it to the end of the doubly-linked list.
2937 If it is a line-number NOTE, omit it if it matches the previous one. */
2940 emit_note (file, line)
2941 char *file;
2942 int line;
2944 register rtx note;
2946 if (line > 0)
2948 if (file && last_filename && !strcmp (file, last_filename)
2949 && line == last_linenum)
2950 return 0;
2951 last_filename = file;
2952 last_linenum = line;
2955 if (no_line_numbers && line > 0)
2957 cur_insn_uid++;
2958 return 0;
2961 note = rtx_alloc (NOTE);
2962 INSN_UID (note) = cur_insn_uid++;
2963 NOTE_SOURCE_FILE (note) = file;
2964 NOTE_LINE_NUMBER (note) = line;
2965 add_insn (note);
2966 return note;
2969 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2972 emit_line_note_force (file, line)
2973 char *file;
2974 int line;
2976 last_linenum = -1;
2977 return emit_line_note (file, line);
2980 /* Cause next statement to emit a line note even if the line number
2981 has not changed. This is used at the beginning of a function. */
2983 void
2984 force_next_line_note ()
2986 last_linenum = -1;
2989 /* Return an indication of which type of insn should have X as a body.
2990 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2992 enum rtx_code
2993 classify_insn (x)
2994 rtx x;
2996 if (GET_CODE (x) == CODE_LABEL)
2997 return CODE_LABEL;
2998 if (GET_CODE (x) == CALL)
2999 return CALL_INSN;
3000 if (GET_CODE (x) == RETURN)
3001 return JUMP_INSN;
3002 if (GET_CODE (x) == SET)
3004 if (SET_DEST (x) == pc_rtx)
3005 return JUMP_INSN;
3006 else if (GET_CODE (SET_SRC (x)) == CALL)
3007 return CALL_INSN;
3008 else
3009 return INSN;
3011 if (GET_CODE (x) == PARALLEL)
3013 register int j;
3014 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3015 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3016 return CALL_INSN;
3017 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3018 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3019 return JUMP_INSN;
3020 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3021 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3022 return CALL_INSN;
3024 return INSN;
3027 /* Emit the rtl pattern X as an appropriate kind of insn.
3028 If X is a label, it is simply added into the insn chain. */
3031 emit (x)
3032 rtx x;
3034 enum rtx_code code = classify_insn (x);
3036 if (code == CODE_LABEL)
3037 return emit_label (x);
3038 else if (code == INSN)
3039 return emit_insn (x);
3040 else if (code == JUMP_INSN)
3042 register rtx insn = emit_jump_insn (x);
3043 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3044 return emit_barrier ();
3045 return insn;
3047 else if (code == CALL_INSN)
3048 return emit_call_insn (x);
3049 else
3050 abort ();
3053 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3055 void
3056 start_sequence ()
3058 struct sequence_stack *tem;
3060 if (sequence_element_free_list)
3062 /* Reuse a previously-saved struct sequence_stack. */
3063 tem = sequence_element_free_list;
3064 sequence_element_free_list = tem->next;
3066 else
3067 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3069 tem->next = sequence_stack;
3070 tem->first = first_insn;
3071 tem->last = last_insn;
3072 tem->sequence_rtl_expr = sequence_rtl_expr;
3074 sequence_stack = tem;
3076 first_insn = 0;
3077 last_insn = 0;
3080 /* Similarly, but indicate that this sequence will be placed in
3081 T, an RTL_EXPR. */
3083 void
3084 start_sequence_for_rtl_expr (t)
3085 tree t;
3087 start_sequence ();
3089 sequence_rtl_expr = t;
3092 /* Set up the insn chain starting with FIRST
3093 as the current sequence, saving the previously current one. */
3095 void
3096 push_to_sequence (first)
3097 rtx first;
3099 rtx last;
3101 start_sequence ();
3103 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3105 first_insn = first;
3106 last_insn = last;
3109 /* Set up the outer-level insn chain
3110 as the current sequence, saving the previously current one. */
3112 void
3113 push_topmost_sequence ()
3115 struct sequence_stack *stack, *top;
3117 start_sequence ();
3119 for (stack = sequence_stack; stack; stack = stack->next)
3120 top = stack;
3122 first_insn = top->first;
3123 last_insn = top->last;
3124 sequence_rtl_expr = top->sequence_rtl_expr;
3127 /* After emitting to the outer-level insn chain, update the outer-level
3128 insn chain, and restore the previous saved state. */
3130 void
3131 pop_topmost_sequence ()
3133 struct sequence_stack *stack, *top;
3135 for (stack = sequence_stack; stack; stack = stack->next)
3136 top = stack;
3138 top->first = first_insn;
3139 top->last = last_insn;
3140 /* ??? Why don't we save sequence_rtl_expr here? */
3142 end_sequence ();
3145 /* After emitting to a sequence, restore previous saved state.
3147 To get the contents of the sequence just made,
3148 you must call `gen_sequence' *before* calling here. */
3150 void
3151 end_sequence ()
3153 struct sequence_stack *tem = sequence_stack;
3155 first_insn = tem->first;
3156 last_insn = tem->last;
3157 sequence_rtl_expr = tem->sequence_rtl_expr;
3158 sequence_stack = tem->next;
3160 tem->next = sequence_element_free_list;
3161 sequence_element_free_list = tem;
3164 /* Return 1 if currently emitting into a sequence. */
3167 in_sequence_p ()
3169 return sequence_stack != 0;
3172 /* Generate a SEQUENCE rtx containing the insns already emitted
3173 to the current sequence.
3175 This is how the gen_... function from a DEFINE_EXPAND
3176 constructs the SEQUENCE that it returns. */
3179 gen_sequence ()
3181 rtx result;
3182 rtx tem;
3183 int i;
3184 int len;
3186 /* Count the insns in the chain. */
3187 len = 0;
3188 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3189 len++;
3191 /* If only one insn, return its pattern rather than a SEQUENCE.
3192 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3193 the case of an empty list.) */
3194 if (len == 1
3195 && ! RTX_FRAME_RELATED_P (first_insn)
3196 && (GET_CODE (first_insn) == INSN
3197 || GET_CODE (first_insn) == JUMP_INSN
3198 /* Don't discard the call usage field. */
3199 || (GET_CODE (first_insn) == CALL_INSN
3200 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3202 NEXT_INSN (first_insn) = free_insn;
3203 free_insn = first_insn;
3204 return PATTERN (first_insn);
3207 /* Put them in a vector. See if we already have a SEQUENCE of the
3208 appropriate length around. */
3209 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3210 sequence_result[len] = 0;
3211 else
3213 /* Ensure that this rtl goes in saveable_obstack, since we may
3214 cache it. */
3215 push_obstacks_nochange ();
3216 rtl_in_saveable_obstack ();
3217 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3218 pop_obstacks ();
3221 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3222 XVECEXP (result, 0, i) = tem;
3224 return result;
3227 /* Initialize data structures and variables in this file
3228 before generating rtl for each function. */
3230 void
3231 init_emit ()
3233 int i;
3235 first_insn = NULL;
3236 last_insn = NULL;
3237 sequence_rtl_expr = NULL;
3238 cur_insn_uid = 1;
3239 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3240 last_linenum = 0;
3241 last_filename = 0;
3242 first_label_num = label_num;
3243 last_label_num = 0;
3244 sequence_stack = NULL;
3246 /* Clear the start_sequence/gen_sequence cache. */
3247 sequence_element_free_list = 0;
3248 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3249 sequence_result[i] = 0;
3250 free_insn = 0;
3252 /* Init the tables that describe all the pseudo regs. */
3254 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3256 regno_pointer_flag
3257 = (char *) savealloc (regno_pointer_flag_length);
3258 bzero (regno_pointer_flag, regno_pointer_flag_length);
3260 regno_pointer_align
3261 = (char *) savealloc (regno_pointer_flag_length);
3262 bzero (regno_pointer_align, regno_pointer_flag_length);
3264 regno_reg_rtx
3265 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3266 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3268 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3269 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3270 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3271 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3272 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3274 /* Indicate that the virtual registers and stack locations are
3275 all pointers. */
3276 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3277 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3278 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3279 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3281 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3282 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3283 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3284 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3286 #ifdef STACK_BOUNDARY
3287 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3288 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3289 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3290 = STACK_BOUNDARY / BITS_PER_UNIT;
3291 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3293 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3294 = STACK_BOUNDARY / BITS_PER_UNIT;
3295 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3296 = STACK_BOUNDARY / BITS_PER_UNIT;
3297 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3298 = STACK_BOUNDARY / BITS_PER_UNIT;
3299 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3300 = STACK_BOUNDARY / BITS_PER_UNIT;
3301 #endif
3303 #ifdef INIT_EXPANDERS
3304 INIT_EXPANDERS;
3305 #endif
3308 /* Create some permanent unique rtl objects shared between all functions.
3309 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3311 void
3312 init_emit_once (line_numbers)
3313 int line_numbers;
3315 int i;
3316 enum machine_mode mode;
3318 no_line_numbers = ! line_numbers;
3320 sequence_stack = NULL;
3322 /* Compute the word and byte modes. */
3324 byte_mode = VOIDmode;
3325 word_mode = VOIDmode;
3327 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3328 mode = GET_MODE_WIDER_MODE (mode))
3330 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3331 && byte_mode == VOIDmode)
3332 byte_mode = mode;
3334 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3335 && word_mode == VOIDmode)
3336 word_mode = mode;
3339 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3341 /* Create the unique rtx's for certain rtx codes and operand values. */
3343 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3345 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3346 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3347 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3350 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3351 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3352 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3353 else
3354 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3356 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3357 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3358 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3359 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3361 for (i = 0; i <= 2; i++)
3363 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3364 mode = GET_MODE_WIDER_MODE (mode))
3366 rtx tem = rtx_alloc (CONST_DOUBLE);
3367 union real_extract u;
3369 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3370 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3372 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3373 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3374 PUT_MODE (tem, mode);
3376 const_tiny_rtx[i][(int) mode] = tem;
3379 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3381 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3382 mode = GET_MODE_WIDER_MODE (mode))
3383 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3385 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3386 mode != VOIDmode;
3387 mode = GET_MODE_WIDER_MODE (mode))
3388 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3391 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3392 mode = GET_MODE_WIDER_MODE (mode))
3393 const_tiny_rtx[0][(int) mode] = const0_rtx;
3396 /* Assign register numbers to the globally defined register rtx.
3397 This must be done at runtime because the register number field
3398 is in a union and some compilers can't initialize unions. */
3400 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3401 PUT_MODE (stack_pointer_rtx, Pmode);
3402 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3403 PUT_MODE (frame_pointer_rtx, Pmode);
3404 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3405 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3406 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3407 #endif
3408 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3409 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3410 PUT_MODE (arg_pointer_rtx, Pmode);
3411 #endif
3413 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3414 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3415 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3416 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3417 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3418 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3419 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3420 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3422 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3423 return_address_pointer_rtx
3424 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3425 #endif
3427 #ifdef STRUCT_VALUE
3428 struct_value_rtx = STRUCT_VALUE;
3429 #else
3430 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3431 #endif
3433 #ifdef STRUCT_VALUE_INCOMING
3434 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3435 #else
3436 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3437 struct_value_incoming_rtx
3438 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3439 #else
3440 struct_value_incoming_rtx = struct_value_rtx;
3441 #endif
3442 #endif
3444 #ifdef STATIC_CHAIN_REGNUM
3445 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3447 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3448 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3449 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3450 else
3451 #endif
3452 static_chain_incoming_rtx = static_chain_rtx;
3453 #endif
3455 #ifdef STATIC_CHAIN
3456 static_chain_rtx = STATIC_CHAIN;
3458 #ifdef STATIC_CHAIN_INCOMING
3459 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3460 #else
3461 static_chain_incoming_rtx = static_chain_rtx;
3462 #endif
3463 #endif
3465 #ifdef PIC_OFFSET_TABLE_REGNUM
3466 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3467 #endif
3470 /* Query and clear/ restore no_line_numbers. This is used by the
3471 switch / case handling in stmt.c to give proper line numbers in
3472 warnings about unreachable code. */
3475 force_line_numbers ()
3477 int old = no_line_numbers;
3479 no_line_numbers = 0;
3480 if (old)
3481 force_next_line_note ();
3482 return old;
3485 void
3486 restore_line_number_status (old_value)
3487 int old_value;
3489 no_line_numbers = old_value;