Merged with mainline at revision 128810.
[official-gcc.git] / gcc / testsuite / gcc.target / arm / neon / vld4_laneu32.c
blob3c9397d1138d1974306b33a4c7afa1b5836bb600
1 /* Test the `vld4_laneu32' ARM Neon intrinsic. */
2 /* This file was autogenerated by neon-testgen. */
4 /* { dg-do assemble } */
5 /* { dg-require-effective-target arm_neon_ok } */
6 /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
8 #include "arm_neon.h"
10 void test_vld4_laneu32 (void)
12 uint32x2x4_t out_uint32x2x4_t;
13 uint32x2x4_t arg1_uint32x2x4_t;
15 out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1);
18 /* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
19 /* { dg-final { cleanup-saved-temps } } */