1 /* Test the `vld4_lanes16' ARM Neon intrinsic. */
2 /* This file was autogenerated by neon-testgen. */
4 /* { dg-do assemble } */
5 /* { dg-require-effective-target arm_neon_ok } */
6 /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
10 void test_vld4_lanes16 (void)
12 int16x4x4_t out_int16x4x4_t
;
13 int16x4x4_t arg1_int16x4x4_t
;
15 out_int16x4x4_t
= vld4_lane_s16 (0, arg1_int16x4x4_t
, 1);
18 /* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
19 /* { dg-final { cleanup-saved-temps } } */