1 /* Test the `vld4Qs32' ARM Neon intrinsic. */
2 /* This file was autogenerated by neon-testgen. */
4 /* { dg-do assemble } */
5 /* { dg-require-effective-target arm_neon_ok } */
6 /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
10 void test_vld4Qs32 (void)
12 int32x4x4_t out_int32x4x4_t
;
14 out_int32x4x4_t
= vld4q_s32 (0);
17 /* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
18 /* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
19 /* { dg-final { cleanup-saved-temps } } */