gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c

   1 /* Test the `vld3Qs32' ARM Neon intrinsic.  */
   2 /* This file was autogenerated by neon-testgen.  */
   3
   4 /* { dg-do assemble } */
   5 /* { dg-require-effective-target arm_neon_ok } */
   6 /* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
   7
   8 #include "arm_neon.h"
   9
  10 void test_vld3Qs32 (void)
  11 {
  12   int32x4x3_t out_int32x4x3_t;
  13
  14   out_int32x4x3_t = vld3q_s32 (0);
  15 }
  16
  17 /* { dg-final { scan-assembler "vld3\.32\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  18 /* { dg-final { scan-assembler "vld3\.32\[      \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[     \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
  19 /* { dg-final { cleanup-saved-temps } } */