1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
27 #include "tree-pass.h"
31 #include "stor-layout.h"
33 #include "dwarf2out.h"
34 #include "dwarf2asm.h"
35 #include "common/common-target.h"
37 #include "except.h" /* expand_builtin_dwarf_sp_column */
38 #include "profile-count.h" /* For expr.h */
39 #include "expr.h" /* init_return_column_size */
40 #include "output.h" /* asm_out_file */
41 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
44 /* ??? Poison these here until it can be done generically. They've been
45 totally replaced in this file; make sure it stays that way. */
46 #undef DWARF2_UNWIND_INFO
47 #undef DWARF2_FRAME_INFO
48 #if (GCC_VERSION >= 3000)
49 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
52 #ifndef INCOMING_RETURN_ADDR_RTX
53 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
56 /* A collected description of an entire row of the abstract CFI table. */
57 struct GTY(()) dw_cfi_row
59 /* The expression that computes the CFA, expressed in two different ways.
60 The CFA member for the simple cases, and the full CFI expression for
61 the complex cases. The later will be a DW_CFA_cfa_expression. */
65 /* The expressions for any register column that is saved. */
69 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
70 struct GTY(()) reg_saved_in_data
{
76 /* Since we no longer have a proper CFG, we're going to create a facsimile
77 of one on the fly while processing the frame-related insns.
79 We create dw_trace_info structures for each extended basic block beginning
80 and ending at a "save point". Save points are labels, barriers, certain
81 notes, and of course the beginning and end of the function.
83 As we encounter control transfer insns, we propagate the "current"
84 row state across the edges to the starts of traces. When checking is
85 enabled, we validate that we propagate the same data from all sources.
87 All traces are members of the TRACE_INFO array, in the order in which
88 they appear in the instruction stream.
90 All save points are present in the TRACE_INDEX hash, mapping the insn
91 starting a trace to the dw_trace_info describing the trace. */
95 /* The insn that begins the trace. */
98 /* The row state at the beginning and end of the trace. */
99 dw_cfi_row
*beg_row
, *end_row
;
101 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
102 while scanning insns. However, the args_size value is irrelevant at
103 any point except can_throw_internal_p insns. Therefore the "delay"
104 sizes the values that must actually be emitted for this trace. */
105 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
106 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
108 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
111 /* The following variables contain data used in interpreting frame related
112 expressions. These are not part of the "real" row state as defined by
113 Dwarf, but it seems like they need to be propagated into a trace in case
114 frame related expressions have been sunk. */
115 /* ??? This seems fragile. These variables are fragments of a larger
116 expression. If we do not keep the entire expression together, we risk
117 not being able to put it together properly. Consider forcing targets
118 to generate self-contained expressions and dropping all of the magic
119 interpretation code in this file. Or at least refusing to shrink wrap
120 any frame related insn that doesn't contain a complete expression. */
122 /* The register used for saving registers to the stack, and its offset
124 dw_cfa_location cfa_store
;
126 /* A temporary register holding an integral value used in adjusting SP
127 or setting up the store_reg. The "offset" field holds the integer
128 value, not an offset. */
129 dw_cfa_location cfa_temp
;
131 /* A set of registers saved in other registers. This is the inverse of
132 the row->reg_save info, if the entry is a DW_CFA_register. This is
133 implemented as a flat array because it normally contains zero or 1
134 entry, depending on the target. IA-64 is the big spender here, using
135 a maximum of 5 entries. */
136 vec
<reg_saved_in_data
> regs_saved_in_regs
;
138 /* An identifier for this trace. Used only for debugging dumps. */
141 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
142 bool switch_sections
;
144 /* True if we've seen different values incoming to beg_true_args_size. */
145 bool args_size_undefined
;
149 /* Hashtable helpers. */
151 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
153 static inline hashval_t
hash (const dw_trace_info
*);
154 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
158 trace_info_hasher::hash (const dw_trace_info
*ti
)
160 return INSN_UID (ti
->head
);
164 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
166 return a
->head
== b
->head
;
170 /* The variables making up the pseudo-cfg, as described above. */
171 static vec
<dw_trace_info
> trace_info
;
172 static vec
<dw_trace_info
*> trace_work_list
;
173 static hash_table
<trace_info_hasher
> *trace_index
;
175 /* A vector of call frame insns for the CIE. */
178 /* The state of the first row of the FDE table, which includes the
179 state provided by the CIE. */
180 static GTY(()) dw_cfi_row
*cie_cfi_row
;
182 static GTY(()) reg_saved_in_data
*cie_return_save
;
184 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
186 /* The insn after which a new CFI note should be emitted. */
187 static rtx_insn
*add_cfi_insn
;
189 /* When non-null, add_cfi will add the CFI to this vector. */
190 static cfi_vec
*add_cfi_vec
;
192 /* The current instruction trace. */
193 static dw_trace_info
*cur_trace
;
195 /* The current, i.e. most recently generated, row of the CFI table. */
196 static dw_cfi_row
*cur_row
;
198 /* A copy of the current CFA, for use during the processing of a
200 static dw_cfa_location
*cur_cfa
;
202 /* We delay emitting a register save until either (a) we reach the end
203 of the prologue or (b) the register is clobbered. This clusters
204 register saves so that there are fewer pc advances. */
206 struct queued_reg_save
{
209 poly_int64_pod cfa_offset
;
213 static vec
<queued_reg_save
> queued_reg_saves
;
215 /* True if any CFI directives were emitted at the current insn. */
216 static bool any_cfis_emitted
;
218 /* Short-hand for commonly used register numbers. */
219 static unsigned dw_stack_pointer_regnum
;
220 static unsigned dw_frame_pointer_regnum
;
222 /* Hook used by __throw. */
225 expand_builtin_dwarf_sp_column (void)
227 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
228 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
231 /* MEM is a memory reference for the register size table, each element of
232 which has mode MODE. Initialize column C as a return address column. */
235 init_return_column_size (scalar_int_mode mode
, rtx mem
, unsigned int c
)
237 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
238 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
239 emit_move_insn (adjust_address (mem
, mode
, offset
),
240 gen_int_mode (size
, mode
));
243 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
244 init_one_dwarf_reg_size to communicate on what has been done by the
247 struct init_one_dwarf_reg_state
249 /* Whether the dwarf return column was initialized. */
250 bool wrote_return_column
;
252 /* For each hard register REGNO, whether init_one_dwarf_reg_size
253 was given REGNO to process already. */
254 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
258 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
259 initialize the dwarf register size table entry corresponding to register
260 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
261 use for the size entry to initialize, and INIT_STATE is the communication
262 datastructure conveying what we're doing to our caller. */
265 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
266 rtx table
, machine_mode slotmode
,
267 init_one_dwarf_reg_state
*init_state
)
269 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
270 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
271 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
273 const HOST_WIDE_INT slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
274 const HOST_WIDE_INT regsize
= GET_MODE_SIZE (regmode
);
276 init_state
->processed_regno
[regno
] = true;
278 if (rnum
>= DWARF_FRAME_REGISTERS
)
281 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
283 if (regmode
== VOIDmode
)
285 init_state
->wrote_return_column
= true;
291 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
292 gen_int_mode (regsize
, slotmode
));
295 /* Generate code to initialize the dwarf register size table located
296 at the provided ADDRESS. */
299 expand_builtin_init_dwarf_reg_sizes (tree address
)
302 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (char_type_node
);
303 rtx addr
= expand_normal (address
);
304 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
306 init_one_dwarf_reg_state init_state
;
308 memset ((char *)&init_state
, 0, sizeof (init_state
));
310 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
312 machine_mode save_mode
;
315 /* No point in processing a register multiple times. This could happen
316 with register spans, e.g. when a reg is first processed as a piece of
317 a span, then as a register on its own later on. */
319 if (init_state
.processed_regno
[i
])
322 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
323 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
326 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
329 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
331 rtx reg
= XVECEXP (span
, 0, si
);
333 init_one_dwarf_reg_size
334 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
339 if (!init_state
.wrote_return_column
)
340 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
342 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
343 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
346 targetm
.init_dwarf_reg_sizes_extra (address
);
350 static dw_trace_info
*
351 get_trace_info (rtx_insn
*insn
)
355 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
359 save_point_p (rtx_insn
*insn
)
361 /* Labels, except those that are really jump tables. */
363 return inside_basic_block_p (insn
);
365 /* We split traces at the prologue/epilogue notes because those
366 are points at which the unwind info is usually stable. This
367 makes it easier to find spots with identical unwind info so
368 that we can use remember/restore_state opcodes. */
370 switch (NOTE_KIND (insn
))
372 case NOTE_INSN_PROLOGUE_END
:
373 case NOTE_INSN_EPILOGUE_BEG
:
380 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
382 static inline HOST_WIDE_INT
383 div_data_align (HOST_WIDE_INT off
)
385 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
386 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
390 /* Return true if we need a signed version of a given opcode
391 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
394 need_data_align_sf_opcode (HOST_WIDE_INT off
)
396 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
399 /* Return a pointer to a newly allocated Call Frame Instruction. */
401 static inline dw_cfi_ref
404 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
406 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
407 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
412 /* Return a newly allocated CFI row, with no defined data. */
417 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
419 row
->cfa
.reg
= INVALID_REGNUM
;
424 /* Return a copy of an existing CFI row. */
427 copy_cfi_row (dw_cfi_row
*src
)
429 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
432 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
437 /* Return a copy of an existing CFA location. */
439 static dw_cfa_location
*
440 copy_cfa (dw_cfa_location
*src
)
442 dw_cfa_location
*dst
= ggc_alloc
<dw_cfa_location
> ();
447 /* Generate a new label for the CFI info to refer to. */
450 dwarf2out_cfi_label (void)
452 int num
= dwarf2out_cfi_label_num
++;
455 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
457 return xstrdup (label
);
460 /* Add CFI either to the current insn stream or to a vector, or both. */
463 add_cfi (dw_cfi_ref cfi
)
465 any_cfis_emitted
= true;
467 if (add_cfi_insn
!= NULL
)
469 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
470 NOTE_CFI (add_cfi_insn
) = cfi
;
473 if (add_cfi_vec
!= NULL
)
474 vec_safe_push (*add_cfi_vec
, cfi
);
478 add_cfi_args_size (HOST_WIDE_INT size
)
480 dw_cfi_ref cfi
= new_cfi ();
482 /* While we can occasionally have args_size < 0 internally, this state
483 should not persist at a point we actually need an opcode. */
484 gcc_assert (size
>= 0);
486 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
487 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
493 add_cfi_restore (unsigned reg
)
495 dw_cfi_ref cfi
= new_cfi ();
497 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
498 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
503 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
504 that the register column is no longer saved. */
507 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
509 if (vec_safe_length (row
->reg_save
) <= column
)
510 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
511 (*row
->reg_save
)[column
] = cfi
;
514 /* This function fills in aa dw_cfa_location structure from a dwarf location
515 descriptor sequence. */
518 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
520 struct dw_loc_descr_node
*ptr
;
522 cfa
->base_offset
= 0;
526 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
528 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
564 cfa
->reg
= op
- DW_OP_reg0
;
567 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
601 cfa
->reg
= op
- DW_OP_breg0
;
602 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
605 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
606 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
611 case DW_OP_plus_uconst
:
612 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
620 /* Find the previous value for the CFA, iteratively. CFI is the opcode
621 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
622 one level of remember/restore state processing. */
625 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
627 switch (cfi
->dw_cfi_opc
)
629 case DW_CFA_def_cfa_offset
:
630 case DW_CFA_def_cfa_offset_sf
:
631 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
633 case DW_CFA_def_cfa_register
:
634 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
637 case DW_CFA_def_cfa_sf
:
638 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
639 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
641 case DW_CFA_def_cfa_expression
:
642 if (cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
)
643 *loc
= *cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
;
645 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
648 case DW_CFA_remember_state
:
649 gcc_assert (!remember
->in_use
);
651 remember
->in_use
= 1;
653 case DW_CFA_restore_state
:
654 gcc_assert (remember
->in_use
);
656 remember
->in_use
= 0;
664 /* Determine if two dw_cfa_location structures define the same data. */
667 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
669 return (loc1
->reg
== loc2
->reg
670 && known_eq (loc1
->offset
, loc2
->offset
)
671 && loc1
->indirect
== loc2
->indirect
672 && (loc1
->indirect
== 0
673 || known_eq (loc1
->base_offset
, loc2
->base_offset
)));
676 /* Determine if two CFI operands are identical. */
679 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
683 case dw_cfi_oprnd_unused
:
685 case dw_cfi_oprnd_reg_num
:
686 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
687 case dw_cfi_oprnd_offset
:
688 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
689 case dw_cfi_oprnd_addr
:
690 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
691 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
692 case dw_cfi_oprnd_loc
:
693 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
694 case dw_cfi_oprnd_cfa_loc
:
695 return cfa_equal_p (a
->dw_cfi_cfa_loc
, b
->dw_cfi_cfa_loc
);
700 /* Determine if two CFI entries are identical. */
703 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
705 enum dwarf_call_frame_info opc
;
707 /* Make things easier for our callers, including missing operands. */
710 if (a
== NULL
|| b
== NULL
)
713 /* Obviously, the opcodes must match. */
715 if (opc
!= b
->dw_cfi_opc
)
718 /* Compare the two operands, re-using the type of the operands as
719 already exposed elsewhere. */
720 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
721 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
722 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
723 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
726 /* Determine if two CFI_ROW structures are identical. */
729 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
731 size_t i
, n_a
, n_b
, n_max
;
735 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
738 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
741 n_a
= vec_safe_length (a
->reg_save
);
742 n_b
= vec_safe_length (b
->reg_save
);
743 n_max
= MAX (n_a
, n_b
);
745 for (i
= 0; i
< n_max
; ++i
)
747 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
750 r_a
= (*a
->reg_save
)[i
];
752 r_b
= (*b
->reg_save
)[i
];
754 if (!cfi_equal_p (r_a
, r_b
))
761 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
762 what opcode to emit. Returns the CFI opcode to effect the change, or
763 NULL if NEW_CFA == OLD_CFA. */
766 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
770 /* If nothing changed, no need to issue any call frame instructions. */
771 if (cfa_equal_p (old_cfa
, new_cfa
))
776 HOST_WIDE_INT const_offset
;
777 if (new_cfa
->reg
== old_cfa
->reg
778 && !new_cfa
->indirect
779 && !old_cfa
->indirect
780 && new_cfa
->offset
.is_constant (&const_offset
))
782 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
783 the CFA register did not change but the offset did. The data
784 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
785 in the assembler via the .cfi_def_cfa_offset directive. */
786 if (const_offset
< 0)
787 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
789 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
790 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= const_offset
;
792 else if (new_cfa
->offset
.is_constant ()
793 && known_eq (new_cfa
->offset
, old_cfa
->offset
)
794 && old_cfa
->reg
!= INVALID_REGNUM
795 && !new_cfa
->indirect
796 && !old_cfa
->indirect
)
798 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
799 indicating the CFA register has changed to <register> but the
800 offset has not changed. This requires the old CFA to have
801 been set as a register plus offset rather than a general
802 DW_CFA_def_cfa_expression. */
803 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
804 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
806 else if (new_cfa
->indirect
== 0
807 && new_cfa
->offset
.is_constant (&const_offset
))
809 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
810 indicating the CFA register has changed to <register> with
811 the specified offset. The data factoring for DW_CFA_def_cfa_sf
812 happens in output_cfi, or in the assembler via the .cfi_def_cfa
814 if (const_offset
< 0)
815 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
817 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
818 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
819 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
823 /* Construct a DW_CFA_def_cfa_expression instruction to
824 calculate the CFA using a full location expression since no
825 register-offset pair is available. */
826 struct dw_loc_descr_node
*loc_list
;
828 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
829 loc_list
= build_cfa_loc (new_cfa
, 0);
830 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
831 if (!new_cfa
->offset
.is_constant ()
832 || !new_cfa
->base_offset
.is_constant ())
833 /* It's hard to reconstruct the CFA location for a polynomial
834 expression, so just cache it instead. */
835 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= copy_cfa (new_cfa
);
837 cfi
->dw_cfi_oprnd2
.dw_cfi_cfa_loc
= NULL
;
843 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
846 def_cfa_1 (dw_cfa_location
*new_cfa
)
850 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
851 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
853 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
856 cur_row
->cfa
= *new_cfa
;
857 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
864 /* Add the CFI for saving a register. REG is the CFA column number.
865 If SREG is -1, the register is saved at OFFSET from the CFA;
866 otherwise it is saved in SREG. */
869 reg_save (unsigned int reg
, unsigned int sreg
, poly_int64 offset
)
871 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
872 dw_cfi_ref cfi
= new_cfi ();
874 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
876 if (sreg
== INVALID_REGNUM
)
878 HOST_WIDE_INT const_offset
;
879 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
880 if (fde
&& fde
->stack_realign
)
882 cfi
->dw_cfi_opc
= DW_CFA_expression
;
883 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
884 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
885 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
886 fde
->stack_realignment
);
888 else if (offset
.is_constant (&const_offset
))
890 if (need_data_align_sf_opcode (const_offset
))
891 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
892 else if (reg
& ~0x3f)
893 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
895 cfi
->dw_cfi_opc
= DW_CFA_offset
;
896 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= const_offset
;
900 cfi
->dw_cfi_opc
= DW_CFA_expression
;
901 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
902 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
903 = build_cfa_loc (&cur_row
->cfa
, offset
);
906 else if (sreg
== reg
)
908 /* While we could emit something like DW_CFA_same_value or
909 DW_CFA_restore, we never expect to see something like that
910 in a prologue. This is more likely to be a bug. A backend
911 can always bypass this by using REG_CFA_RESTORE directly. */
916 cfi
->dw_cfi_opc
= DW_CFA_register
;
917 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
921 update_row_reg_save (cur_row
, reg
, cfi
);
924 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
925 and adjust data structures to match. */
928 notice_args_size (rtx_insn
*insn
)
930 HOST_WIDE_INT args_size
, delta
;
933 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
937 args_size
= INTVAL (XEXP (note
, 0));
938 delta
= args_size
- cur_trace
->end_true_args_size
;
942 cur_trace
->end_true_args_size
= args_size
;
944 /* If the CFA is computed off the stack pointer, then we must adjust
945 the computation of the CFA as well. */
946 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
948 gcc_assert (!cur_cfa
->indirect
);
950 /* Convert a change in args_size (always a positive in the
951 direction of stack growth) to a change in stack pointer. */
952 if (!STACK_GROWS_DOWNWARD
)
955 cur_cfa
->offset
+= delta
;
959 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
960 data within the trace related to EH insns and args_size. */
963 notice_eh_throw (rtx_insn
*insn
)
965 HOST_WIDE_INT args_size
;
967 args_size
= cur_trace
->end_true_args_size
;
968 if (cur_trace
->eh_head
== NULL
)
970 cur_trace
->eh_head
= insn
;
971 cur_trace
->beg_delay_args_size
= args_size
;
972 cur_trace
->end_delay_args_size
= args_size
;
974 else if (cur_trace
->end_delay_args_size
!= args_size
)
976 cur_trace
->end_delay_args_size
= args_size
;
978 /* ??? If the CFA is the stack pointer, search backward for the last
979 CFI note and insert there. Given that the stack changed for the
980 args_size change, there *must* be such a note in between here and
982 add_cfi_args_size (args_size
);
986 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
987 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
988 used in places where rtl is prohibited. */
990 static inline unsigned
991 dwf_regno (const_rtx reg
)
993 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
994 return DWARF_FRAME_REGNUM (REGNO (reg
));
997 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
1000 compare_reg_or_pc (rtx x
, rtx y
)
1002 if (REG_P (x
) && REG_P (y
))
1003 return REGNO (x
) == REGNO (y
);
1007 /* Record SRC as being saved in DEST. DEST may be null to delete an
1008 existing entry. SRC may be a register or PC_RTX. */
1011 record_reg_saved_in_reg (rtx dest
, rtx src
)
1013 reg_saved_in_data
*elt
;
1016 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
1017 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1020 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1022 elt
->saved_in_reg
= dest
;
1029 reg_saved_in_data e
= {src
, dest
};
1030 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1033 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1034 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1037 queue_reg_save (rtx reg
, rtx sreg
, poly_int64 offset
)
1040 queued_reg_save e
= {reg
, sreg
, offset
};
1043 /* Duplicates waste space, but it's also necessary to remove them
1044 for correctness, since the queue gets output in reverse order. */
1045 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1046 if (compare_reg_or_pc (q
->reg
, reg
))
1052 queued_reg_saves
.safe_push (e
);
1055 /* Output all the entries in QUEUED_REG_SAVES. */
1058 dwarf2out_flush_queued_reg_saves (void)
1063 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1065 unsigned int reg
, sreg
;
1067 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1069 if (q
->reg
== pc_rtx
)
1070 reg
= DWARF_FRAME_RETURN_COLUMN
;
1072 reg
= dwf_regno (q
->reg
);
1074 sreg
= dwf_regno (q
->saved_reg
);
1076 sreg
= INVALID_REGNUM
;
1077 reg_save (reg
, sreg
, q
->cfa_offset
);
1080 queued_reg_saves
.truncate (0);
1083 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1084 location for? Or, does it clobber a register which we've previously
1085 said that some other register is saved in, and for which we now
1086 have a new location for? */
1089 clobbers_queued_reg_save (const_rtx insn
)
1094 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1097 reg_saved_in_data
*rir
;
1099 if (modified_in_p (q
->reg
, insn
))
1102 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1103 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1104 && modified_in_p (rir
->saved_in_reg
, insn
))
1111 /* What register, if any, is currently saved in REG? */
1114 reg_saved_in (rtx reg
)
1116 unsigned int regn
= REGNO (reg
);
1118 reg_saved_in_data
*rir
;
1121 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1122 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1125 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1126 if (regn
== REGNO (rir
->saved_in_reg
))
1127 return rir
->orig_reg
;
1132 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1135 dwarf2out_frame_debug_def_cfa (rtx pat
)
1137 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1139 pat
= strip_offset (pat
, &cur_cfa
->offset
);
1142 cur_cfa
->indirect
= 1;
1143 pat
= strip_offset (XEXP (pat
, 0), &cur_cfa
->base_offset
);
1145 /* ??? If this fails, we could be calling into the _loc functions to
1146 define a full expression. So far no port does that. */
1147 gcc_assert (REG_P (pat
));
1148 cur_cfa
->reg
= dwf_regno (pat
);
1151 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1154 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1158 gcc_assert (GET_CODE (pat
) == SET
);
1159 dest
= XEXP (pat
, 0);
1160 src
= XEXP (pat
, 1);
1162 switch (GET_CODE (src
))
1165 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1166 cur_cfa
->offset
-= rtx_to_poly_int64 (XEXP (src
, 1));
1176 cur_cfa
->reg
= dwf_regno (dest
);
1177 gcc_assert (cur_cfa
->indirect
== 0);
1180 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1183 dwarf2out_frame_debug_cfa_offset (rtx set
)
1186 rtx src
, addr
, span
;
1187 unsigned int sregno
;
1189 src
= XEXP (set
, 1);
1190 addr
= XEXP (set
, 0);
1191 gcc_assert (MEM_P (addr
));
1192 addr
= XEXP (addr
, 0);
1194 /* As documented, only consider extremely simple addresses. */
1195 switch (GET_CODE (addr
))
1198 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1199 offset
= -cur_cfa
->offset
;
1202 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1203 offset
= rtx_to_poly_int64 (XEXP (addr
, 1)) - cur_cfa
->offset
;
1212 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1216 span
= targetm
.dwarf_register_span (src
);
1217 sregno
= dwf_regno (src
);
1220 /* ??? We'd like to use queue_reg_save, but we need to come up with
1221 a different flushing heuristic for epilogues. */
1223 reg_save (sregno
, INVALID_REGNUM
, offset
);
1226 /* We have a PARALLEL describing where the contents of SRC live.
1227 Adjust the offset for each piece of the PARALLEL. */
1228 poly_int64 span_offset
= offset
;
1230 gcc_assert (GET_CODE (span
) == PARALLEL
);
1232 const int par_len
= XVECLEN (span
, 0);
1233 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1235 rtx elem
= XVECEXP (span
, 0, par_index
);
1236 sregno
= dwf_regno (src
);
1237 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1238 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1243 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1246 dwarf2out_frame_debug_cfa_register (rtx set
)
1249 unsigned sregno
, dregno
;
1251 src
= XEXP (set
, 1);
1252 dest
= XEXP (set
, 0);
1254 record_reg_saved_in_reg (dest
, src
);
1256 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1258 sregno
= dwf_regno (src
);
1260 dregno
= dwf_regno (dest
);
1262 /* ??? We'd like to use queue_reg_save, but we need to come up with
1263 a different flushing heuristic for epilogues. */
1264 reg_save (sregno
, dregno
, 0);
1267 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1270 dwarf2out_frame_debug_cfa_expression (rtx set
)
1272 rtx src
, dest
, span
;
1273 dw_cfi_ref cfi
= new_cfi ();
1276 dest
= SET_DEST (set
);
1277 src
= SET_SRC (set
);
1279 gcc_assert (REG_P (src
));
1280 gcc_assert (MEM_P (dest
));
1282 span
= targetm
.dwarf_register_span (src
);
1285 regno
= dwf_regno (src
);
1287 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1288 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1289 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1290 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1291 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1293 /* ??? We'd like to use queue_reg_save, were the interface different,
1294 and, as above, we could manage flushing for epilogues. */
1296 update_row_reg_save (cur_row
, regno
, cfi
);
1299 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION
1303 dwarf2out_frame_debug_cfa_val_expression (rtx set
)
1305 rtx dest
= SET_DEST (set
);
1306 gcc_assert (REG_P (dest
));
1308 rtx span
= targetm
.dwarf_register_span (dest
);
1311 rtx src
= SET_SRC (set
);
1312 dw_cfi_ref cfi
= new_cfi ();
1313 cfi
->dw_cfi_opc
= DW_CFA_val_expression
;
1314 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= dwf_regno (dest
);
1315 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1316 = mem_loc_descriptor (src
, GET_MODE (src
),
1317 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1319 update_row_reg_save (cur_row
, dwf_regno (dest
), cfi
);
1322 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1325 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1327 gcc_assert (REG_P (reg
));
1329 rtx span
= targetm
.dwarf_register_span (reg
);
1332 unsigned int regno
= dwf_regno (reg
);
1333 add_cfi_restore (regno
);
1334 update_row_reg_save (cur_row
, regno
, NULL
);
1338 /* We have a PARALLEL describing where the contents of REG live.
1339 Restore the register for each piece of the PARALLEL. */
1340 gcc_assert (GET_CODE (span
) == PARALLEL
);
1342 const int par_len
= XVECLEN (span
, 0);
1343 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1345 reg
= XVECEXP (span
, 0, par_index
);
1346 gcc_assert (REG_P (reg
));
1347 unsigned int regno
= dwf_regno (reg
);
1348 add_cfi_restore (regno
);
1349 update_row_reg_save (cur_row
, regno
, NULL
);
1354 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1355 ??? Perhaps we should note in the CIE where windows are saved (instead of
1356 assuming 0(cfa)) and what registers are in the window. */
1359 dwarf2out_frame_debug_cfa_window_save (void)
1361 dw_cfi_ref cfi
= new_cfi ();
1363 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1367 /* Record call frame debugging information for an expression EXPR,
1368 which either sets SP or FP (adjusting how we calculate the frame
1369 address) or saves a register to the stack or another register.
1370 LABEL indicates the address of EXPR.
1372 This function encodes a state machine mapping rtxes to actions on
1373 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1374 users need not read the source code.
1376 The High-Level Picture
1378 Changes in the register we use to calculate the CFA: Currently we
1379 assume that if you copy the CFA register into another register, we
1380 should take the other one as the new CFA register; this seems to
1381 work pretty well. If it's wrong for some target, it's simple
1382 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1384 Changes in the register we use for saving registers to the stack:
1385 This is usually SP, but not always. Again, we deduce that if you
1386 copy SP into another register (and SP is not the CFA register),
1387 then the new register is the one we will be using for register
1388 saves. This also seems to work.
1390 Register saves: There's not much guesswork about this one; if
1391 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1392 register save, and the register used to calculate the destination
1393 had better be the one we think we're using for this purpose.
1394 It's also assumed that a copy from a call-saved register to another
1395 register is saving that register if RTX_FRAME_RELATED_P is set on
1396 that instruction. If the copy is from a call-saved register to
1397 the *same* register, that means that the register is now the same
1398 value as in the caller.
1400 Except: If the register being saved is the CFA register, and the
1401 offset is nonzero, we are saving the CFA, so we assume we have to
1402 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1403 the intent is to save the value of SP from the previous frame.
1405 In addition, if a register has previously been saved to a different
1408 Invariants / Summaries of Rules
1410 cfa current rule for calculating the CFA. It usually
1411 consists of a register and an offset. This is
1412 actually stored in *cur_cfa, but abbreviated
1413 for the purposes of this documentation.
1414 cfa_store register used by prologue code to save things to the stack
1415 cfa_store.offset is the offset from the value of
1416 cfa_store.reg to the actual CFA
1417 cfa_temp register holding an integral value. cfa_temp.offset
1418 stores the value, which will be used to adjust the
1419 stack pointer. cfa_temp is also used like cfa_store,
1420 to track stores to the stack via fp or a temp reg.
1422 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1423 with cfa.reg as the first operand changes the cfa.reg and its
1424 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1427 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1428 expression yielding a constant. This sets cfa_temp.reg
1429 and cfa_temp.offset.
1431 Rule 5: Create a new register cfa_store used to save items to the
1434 Rules 10-14: Save a register to the stack. Define offset as the
1435 difference of the original location and cfa_store's
1436 location (or cfa_temp's location if cfa_temp is used).
1438 Rules 16-20: If AND operation happens on sp in prologue, we assume
1439 stack is realigned. We will use a group of DW_OP_XXX
1440 expressions to represent the location of the stored
1441 register instead of CFA+offset.
1445 "{a,b}" indicates a choice of a xor b.
1446 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1449 (set <reg1> <reg2>:cfa.reg)
1450 effects: cfa.reg = <reg1>
1451 cfa.offset unchanged
1452 cfa_temp.reg = <reg1>
1453 cfa_temp.offset = cfa.offset
1456 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1457 {<const_int>,<reg>:cfa_temp.reg}))
1458 effects: cfa.reg = sp if fp used
1459 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1460 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1461 if cfa_store.reg==sp
1464 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1465 effects: cfa.reg = fp
1466 cfa_offset += +/- <const_int>
1469 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1470 constraints: <reg1> != fp
1472 effects: cfa.reg = <reg1>
1473 cfa_temp.reg = <reg1>
1474 cfa_temp.offset = cfa.offset
1477 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1478 constraints: <reg1> != fp
1480 effects: cfa_store.reg = <reg1>
1481 cfa_store.offset = cfa.offset - cfa_temp.offset
1484 (set <reg> <const_int>)
1485 effects: cfa_temp.reg = <reg>
1486 cfa_temp.offset = <const_int>
1489 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1490 effects: cfa_temp.reg = <reg1>
1491 cfa_temp.offset |= <const_int>
1494 (set <reg> (high <exp>))
1498 (set <reg> (lo_sum <exp> <const_int>))
1499 effects: cfa_temp.reg = <reg>
1500 cfa_temp.offset = <const_int>
1503 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1504 effects: cfa_store.offset -= <const_int>
1505 cfa.offset = cfa_store.offset if cfa.reg == sp
1507 cfa.base_offset = -cfa_store.offset
1510 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1511 effects: cfa_store.offset += -/+ mode_size(mem)
1512 cfa.offset = cfa_store.offset if cfa.reg == sp
1514 cfa.base_offset = -cfa_store.offset
1517 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1520 effects: cfa.reg = <reg1>
1521 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1524 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1525 effects: cfa.reg = <reg1>
1526 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1529 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1530 effects: cfa.reg = <reg1>
1531 cfa.base_offset = -cfa_temp.offset
1532 cfa_temp.offset -= mode_size(mem)
1535 (set <reg> {unspec, unspec_volatile})
1536 effects: target-dependent
1539 (set sp (and: sp <const_int>))
1540 constraints: cfa_store.reg == sp
1541 effects: cfun->fde.stack_realign = 1
1542 cfa_store.offset = 0
1543 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1546 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1547 effects: cfa_store.offset += -/+ mode_size(mem)
1550 (set (mem ({pre_inc, pre_dec} sp)) fp)
1551 constraints: fde->stack_realign == 1
1552 effects: cfa_store.offset = 0
1553 cfa.reg != HARD_FRAME_POINTER_REGNUM
1556 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1557 constraints: fde->stack_realign == 1
1559 && cfa.indirect == 0
1560 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1561 effects: Use DW_CFA_def_cfa_expression to define cfa
1562 cfa.reg == fde->drap_reg */
1565 dwarf2out_frame_debug_expr (rtx expr
)
1567 rtx src
, dest
, span
;
1571 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1572 the PARALLEL independently. The first element is always processed if
1573 it is a SET. This is for backward compatibility. Other elements
1574 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1575 flag is set in them. */
1576 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1579 int limit
= XVECLEN (expr
, 0);
1582 /* PARALLELs have strict read-modify-write semantics, so we
1583 ought to evaluate every rvalue before changing any lvalue.
1584 It's cumbersome to do that in general, but there's an
1585 easy approximation that is enough for all current users:
1586 handle register saves before register assignments. */
1587 if (GET_CODE (expr
) == PARALLEL
)
1588 for (par_index
= 0; par_index
< limit
; par_index
++)
1590 elem
= XVECEXP (expr
, 0, par_index
);
1591 if (GET_CODE (elem
) == SET
1592 && MEM_P (SET_DEST (elem
))
1593 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1594 dwarf2out_frame_debug_expr (elem
);
1597 for (par_index
= 0; par_index
< limit
; par_index
++)
1599 elem
= XVECEXP (expr
, 0, par_index
);
1600 if (GET_CODE (elem
) == SET
1601 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1602 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1603 dwarf2out_frame_debug_expr (elem
);
1608 gcc_assert (GET_CODE (expr
) == SET
);
1610 src
= SET_SRC (expr
);
1611 dest
= SET_DEST (expr
);
1615 rtx rsi
= reg_saved_in (src
);
1622 switch (GET_CODE (dest
))
1625 switch (GET_CODE (src
))
1627 /* Setting FP from SP. */
1629 if (cur_cfa
->reg
== dwf_regno (src
))
1632 /* Update the CFA rule wrt SP or FP. Make sure src is
1633 relative to the current CFA register.
1635 We used to require that dest be either SP or FP, but the
1636 ARM copies SP to a temporary register, and from there to
1637 FP. So we just rely on the backends to only set
1638 RTX_FRAME_RELATED_P on appropriate insns. */
1639 cur_cfa
->reg
= dwf_regno (dest
);
1640 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1641 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1645 /* Saving a register in a register. */
1646 gcc_assert (!fixed_regs
[REGNO (dest
)]
1647 /* For the SPARC and its register window. */
1648 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1650 /* After stack is aligned, we can only save SP in FP
1651 if drap register is used. In this case, we have
1652 to restore stack pointer with the CFA value and we
1653 don't generate this DWARF information. */
1655 && fde
->stack_realign
1656 && REGNO (src
) == STACK_POINTER_REGNUM
)
1657 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1658 && fde
->drap_reg
!= INVALID_REGNUM
1659 && cur_cfa
->reg
!= dwf_regno (src
));
1661 queue_reg_save (src
, dest
, 0);
1668 if (dest
== stack_pointer_rtx
)
1672 if (REG_P (XEXP (src
, 1)))
1674 gcc_assert (dwf_regno (XEXP (src
, 1))
1675 == cur_trace
->cfa_temp
.reg
);
1676 offset
= cur_trace
->cfa_temp
.offset
;
1678 else if (!poly_int_rtx_p (XEXP (src
, 1), &offset
))
1681 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1683 /* Restoring SP from FP in the epilogue. */
1684 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1685 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1687 else if (GET_CODE (src
) == LO_SUM
)
1688 /* Assume we've set the source reg of the LO_SUM from sp. */
1691 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1693 if (GET_CODE (src
) != MINUS
)
1695 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1696 cur_cfa
->offset
+= offset
;
1697 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1698 cur_trace
->cfa_store
.offset
+= offset
;
1700 else if (dest
== hard_frame_pointer_rtx
)
1703 /* Either setting the FP from an offset of the SP,
1704 or adjusting the FP */
1705 gcc_assert (frame_pointer_needed
);
1707 gcc_assert (REG_P (XEXP (src
, 0))
1708 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1709 offset
= rtx_to_poly_int64 (XEXP (src
, 1));
1710 if (GET_CODE (src
) != MINUS
)
1712 cur_cfa
->offset
+= offset
;
1713 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1717 gcc_assert (GET_CODE (src
) != MINUS
);
1720 if (REG_P (XEXP (src
, 0))
1721 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1722 && poly_int_rtx_p (XEXP (src
, 1), &offset
))
1724 /* Setting a temporary CFA register that will be copied
1725 into the FP later on. */
1727 cur_cfa
->offset
+= offset
;
1728 cur_cfa
->reg
= dwf_regno (dest
);
1729 /* Or used to save regs to the stack. */
1730 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1731 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1735 else if (REG_P (XEXP (src
, 0))
1736 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1737 && XEXP (src
, 1) == stack_pointer_rtx
)
1739 /* Setting a scratch register that we will use instead
1740 of SP for saving registers to the stack. */
1741 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1742 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1743 cur_trace
->cfa_store
.offset
1744 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1748 else if (GET_CODE (src
) == LO_SUM
1749 && poly_int_rtx_p (XEXP (src
, 1),
1750 &cur_trace
->cfa_temp
.offset
))
1751 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1760 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1761 cur_trace
->cfa_temp
.offset
= rtx_to_poly_int64 (src
);
1766 gcc_assert (REG_P (XEXP (src
, 0))
1767 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1768 && CONST_INT_P (XEXP (src
, 1)));
1770 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1771 if (!can_ior_p (cur_trace
->cfa_temp
.offset
, INTVAL (XEXP (src
, 1)),
1772 &cur_trace
->cfa_temp
.offset
))
1773 /* The target shouldn't generate this kind of CFI note if we
1774 can't represent it. */
1778 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1779 which will fill in all of the bits. */
1786 case UNSPEC_VOLATILE
:
1787 /* All unspecs should be represented by REG_CFA_* notes. */
1793 /* If this AND operation happens on stack pointer in prologue,
1794 we assume the stack is realigned and we extract the
1796 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1798 /* We interpret reg_save differently with stack_realign set.
1799 Thus we must flush whatever we have queued first. */
1800 dwarf2out_flush_queued_reg_saves ();
1802 gcc_assert (cur_trace
->cfa_store
.reg
1803 == dwf_regno (XEXP (src
, 0)));
1804 fde
->stack_realign
= 1;
1805 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1806 cur_trace
->cfa_store
.offset
= 0;
1808 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1809 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1810 fde
->drap_reg
= cur_cfa
->reg
;
1821 /* Saving a register to the stack. Make sure dest is relative to the
1823 switch (GET_CODE (XEXP (dest
, 0)))
1829 /* We can't handle variable size modifications. */
1830 offset
= -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1832 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1833 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1835 cur_trace
->cfa_store
.offset
+= offset
;
1836 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1837 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1839 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1840 offset
-= cur_trace
->cfa_store
.offset
;
1842 offset
= -cur_trace
->cfa_store
.offset
;
1849 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1850 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1853 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1854 == STACK_POINTER_REGNUM
)
1855 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1857 cur_trace
->cfa_store
.offset
+= offset
;
1859 /* Rule 18: If stack is aligned, we will use FP as a
1860 reference to represent the address of the stored
1863 && fde
->stack_realign
1865 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1867 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1868 cur_trace
->cfa_store
.offset
= 0;
1871 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1872 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1874 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1875 offset
+= -cur_trace
->cfa_store
.offset
;
1877 offset
= -cur_trace
->cfa_store
.offset
;
1881 /* With an offset. */
1888 gcc_assert (REG_P (XEXP (XEXP (dest
, 0), 0)));
1889 offset
= rtx_to_poly_int64 (XEXP (XEXP (dest
, 0), 1));
1890 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1893 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1895 if (cur_cfa
->reg
== regno
)
1896 offset
-= cur_cfa
->offset
;
1897 else if (cur_trace
->cfa_store
.reg
== regno
)
1898 offset
-= cur_trace
->cfa_store
.offset
;
1901 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1902 offset
-= cur_trace
->cfa_temp
.offset
;
1908 /* Without an offset. */
1911 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1913 if (cur_cfa
->reg
== regno
)
1914 offset
= -cur_cfa
->offset
;
1915 else if (cur_trace
->cfa_store
.reg
== regno
)
1916 offset
= -cur_trace
->cfa_store
.offset
;
1919 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1920 offset
= -cur_trace
->cfa_temp
.offset
;
1927 gcc_assert (cur_trace
->cfa_temp
.reg
1928 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1929 offset
= -cur_trace
->cfa_temp
.offset
;
1930 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1938 /* If the source operand of this MEM operation is a memory,
1939 we only care how much stack grew. */
1944 && REGNO (src
) != STACK_POINTER_REGNUM
1945 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1946 && dwf_regno (src
) == cur_cfa
->reg
)
1948 /* We're storing the current CFA reg into the stack. */
1950 if (known_eq (cur_cfa
->offset
, 0))
1953 /* If stack is aligned, putting CFA reg into stack means
1954 we can no longer use reg + offset to represent CFA.
1955 Here we use DW_CFA_def_cfa_expression instead. The
1956 result of this expression equals to the original CFA
1959 && fde
->stack_realign
1960 && cur_cfa
->indirect
== 0
1961 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1963 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1965 cur_cfa
->indirect
= 1;
1966 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1967 cur_cfa
->base_offset
= offset
;
1968 cur_cfa
->offset
= 0;
1970 fde
->drap_reg_saved
= 1;
1974 /* If the source register is exactly the CFA, assume
1975 we're saving SP like any other register; this happens
1977 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1982 /* Otherwise, we'll need to look in the stack to
1983 calculate the CFA. */
1984 rtx x
= XEXP (dest
, 0);
1988 gcc_assert (REG_P (x
));
1990 cur_cfa
->reg
= dwf_regno (x
);
1991 cur_cfa
->base_offset
= offset
;
1992 cur_cfa
->indirect
= 1;
1998 span
= targetm
.dwarf_register_span (src
);
2003 queue_reg_save (src
, NULL_RTX
, offset
);
2006 /* We have a PARALLEL describing where the contents of SRC live.
2007 Queue register saves for each piece of the PARALLEL. */
2008 poly_int64 span_offset
= offset
;
2010 gcc_assert (GET_CODE (span
) == PARALLEL
);
2012 const int par_len
= XVECLEN (span
, 0);
2013 for (int par_index
= 0; par_index
< par_len
; par_index
++)
2015 rtx elem
= XVECEXP (span
, 0, par_index
);
2016 queue_reg_save (elem
, NULL_RTX
, span_offset
);
2017 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
2027 /* Record call frame debugging information for INSN, which either sets
2028 SP or FP (adjusting how we calculate the frame address) or saves a
2029 register to the stack. */
2032 dwarf2out_frame_debug (rtx_insn
*insn
)
2035 bool handled_one
= false;
2037 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2038 switch (REG_NOTE_KIND (note
))
2040 case REG_FRAME_RELATED_EXPR
:
2041 pat
= XEXP (note
, 0);
2044 case REG_CFA_DEF_CFA
:
2045 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2049 case REG_CFA_ADJUST_CFA
:
2054 if (GET_CODE (n
) == PARALLEL
)
2055 n
= XVECEXP (n
, 0, 0);
2057 dwarf2out_frame_debug_adjust_cfa (n
);
2061 case REG_CFA_OFFSET
:
2064 n
= single_set (insn
);
2065 dwarf2out_frame_debug_cfa_offset (n
);
2069 case REG_CFA_REGISTER
:
2074 if (GET_CODE (n
) == PARALLEL
)
2075 n
= XVECEXP (n
, 0, 0);
2077 dwarf2out_frame_debug_cfa_register (n
);
2081 case REG_CFA_EXPRESSION
:
2082 case REG_CFA_VAL_EXPRESSION
:
2085 n
= single_set (insn
);
2087 if (REG_NOTE_KIND (note
) == REG_CFA_EXPRESSION
)
2088 dwarf2out_frame_debug_cfa_expression (n
);
2090 dwarf2out_frame_debug_cfa_val_expression (n
);
2095 case REG_CFA_RESTORE
:
2100 if (GET_CODE (n
) == PARALLEL
)
2101 n
= XVECEXP (n
, 0, 0);
2104 dwarf2out_frame_debug_cfa_restore (n
);
2108 case REG_CFA_SET_VDRAP
:
2112 dw_fde_ref fde
= cfun
->fde
;
2115 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2117 fde
->vdrap_reg
= dwf_regno (n
);
2123 case REG_CFA_TOGGLE_RA_MANGLE
:
2124 case REG_CFA_WINDOW_SAVE
:
2125 /* We overload both of these operations onto the same DWARF opcode. */
2126 dwarf2out_frame_debug_cfa_window_save ();
2130 case REG_CFA_FLUSH_QUEUE
:
2131 /* The actual flush happens elsewhere. */
2141 pat
= PATTERN (insn
);
2143 dwarf2out_frame_debug_expr (pat
);
2145 /* Check again. A parallel can save and update the same register.
2146 We could probably check just once, here, but this is safer than
2147 removing the check at the start of the function. */
2148 if (clobbers_queued_reg_save (pat
))
2149 dwarf2out_flush_queued_reg_saves ();
2153 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2156 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2158 size_t i
, n_old
, n_new
, n_max
;
2161 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2162 add_cfi (new_row
->cfa_cfi
);
2165 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2170 n_old
= vec_safe_length (old_row
->reg_save
);
2171 n_new
= vec_safe_length (new_row
->reg_save
);
2172 n_max
= MAX (n_old
, n_new
);
2174 for (i
= 0; i
< n_max
; ++i
)
2176 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2179 r_old
= (*old_row
->reg_save
)[i
];
2181 r_new
= (*new_row
->reg_save
)[i
];
2185 else if (r_new
== NULL
)
2186 add_cfi_restore (i
);
2187 else if (!cfi_equal_p (r_old
, r_new
))
2192 /* Examine CFI and return true if a cfi label and set_loc is needed
2193 beforehand. Even when generating CFI assembler instructions, we
2194 still have to add the cfi to the list so that lookup_cfa_1 works
2195 later on. When -g2 and above we even need to force emitting of
2196 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2197 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2198 and so don't use convert_cfa_to_fb_loc_list. */
2201 cfi_label_required_p (dw_cfi_ref cfi
)
2203 if (!dwarf2out_do_cfi_asm ())
2206 if (dwarf_version
== 2
2207 && debug_info_level
> DINFO_LEVEL_TERSE
2208 && (write_symbols
== DWARF2_DEBUG
2209 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2211 switch (cfi
->dw_cfi_opc
)
2213 case DW_CFA_def_cfa_offset
:
2214 case DW_CFA_def_cfa_offset_sf
:
2215 case DW_CFA_def_cfa_register
:
2216 case DW_CFA_def_cfa
:
2217 case DW_CFA_def_cfa_sf
:
2218 case DW_CFA_def_cfa_expression
:
2219 case DW_CFA_restore_state
:
2228 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2229 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2232 add_cfis_to_fde (void)
2234 dw_fde_ref fde
= cfun
->fde
;
2235 rtx_insn
*insn
, *next
;
2237 for (insn
= get_insns (); insn
; insn
= next
)
2239 next
= NEXT_INSN (insn
);
2241 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2242 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2244 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2246 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2248 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2250 required
|= cfi_label_required_p (NOTE_CFI (next
));
2251 next
= NEXT_INSN (next
);
2253 else if (active_insn_p (next
)
2254 || (NOTE_P (next
) && (NOTE_KIND (next
)
2255 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2258 next
= NEXT_INSN (next
);
2261 int num
= dwarf2out_cfi_label_num
;
2262 const char *label
= dwarf2out_cfi_label ();
2265 /* Set the location counter to the new label. */
2267 xcfi
->dw_cfi_opc
= DW_CFA_advance_loc4
;
2268 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2269 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2271 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2272 NOTE_LABEL_NUMBER (tmp
) = num
;
2277 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2278 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2279 insn
= NEXT_INSN (insn
);
2281 while (insn
!= next
);
2286 static void dump_cfi_row (FILE *f
, dw_cfi_row
*row
);
2288 /* If LABEL is the start of a trace, then initialize the state of that
2289 trace from CUR_TRACE and CUR_ROW. */
2292 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2295 HOST_WIDE_INT args_size
;
2297 ti
= get_trace_info (start
);
2298 gcc_assert (ti
!= NULL
);
2302 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2303 cur_trace
->id
, ti
->id
,
2304 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2305 (origin
? INSN_UID (origin
) : 0));
2308 args_size
= cur_trace
->end_true_args_size
;
2309 if (ti
->beg_row
== NULL
)
2311 /* This is the first time we've encountered this trace. Propagate
2312 state across the edge and push the trace onto the work list. */
2313 ti
->beg_row
= copy_cfi_row (cur_row
);
2314 ti
->beg_true_args_size
= args_size
;
2316 ti
->cfa_store
= cur_trace
->cfa_store
;
2317 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2318 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2320 trace_work_list
.safe_push (ti
);
2323 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2328 /* We ought to have the same state incoming to a given trace no
2329 matter how we arrive at the trace. Anything else means we've
2330 got some kind of optimization error. */
2332 if (!cfi_row_equal_p (cur_row
, ti
->beg_row
))
2336 fprintf (dump_file
, "Inconsistent CFI state!\n");
2337 fprintf (dump_file
, "SHOULD have:\n");
2338 dump_cfi_row (dump_file
, ti
->beg_row
);
2339 fprintf (dump_file
, "DO have:\n");
2340 dump_cfi_row (dump_file
, cur_row
);
2347 /* The args_size is allowed to conflict if it isn't actually used. */
2348 if (ti
->beg_true_args_size
!= args_size
)
2349 ti
->args_size_undefined
= true;
2353 /* Similarly, but handle the args_size and CFA reset across EH
2354 and non-local goto edges. */
2357 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2359 HOST_WIDE_INT save_args_size
, delta
;
2360 dw_cfa_location save_cfa
;
2362 save_args_size
= cur_trace
->end_true_args_size
;
2363 if (save_args_size
== 0)
2365 maybe_record_trace_start (start
, origin
);
2369 delta
= -save_args_size
;
2370 cur_trace
->end_true_args_size
= 0;
2372 save_cfa
= cur_row
->cfa
;
2373 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2375 /* Convert a change in args_size (always a positive in the
2376 direction of stack growth) to a change in stack pointer. */
2377 if (!STACK_GROWS_DOWNWARD
)
2380 cur_row
->cfa
.offset
+= delta
;
2383 maybe_record_trace_start (start
, origin
);
2385 cur_trace
->end_true_args_size
= save_args_size
;
2386 cur_row
->cfa
= save_cfa
;
2389 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2390 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2393 create_trace_edges (rtx_insn
*insn
)
2400 rtx_jump_table_data
*table
;
2402 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2405 if (tablejump_p (insn
, NULL
, &table
))
2407 rtvec vec
= table
->get_labels ();
2409 n
= GET_NUM_ELEM (vec
);
2410 for (i
= 0; i
< n
; ++i
)
2412 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2413 maybe_record_trace_start (lab
, insn
);
2416 else if (computed_jump_p (insn
))
2420 FOR_EACH_VEC_SAFE_ELT (forced_labels
, i
, temp
)
2421 maybe_record_trace_start (temp
, insn
);
2423 else if (returnjump_p (insn
))
2425 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2427 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2428 for (i
= 0; i
< n
; ++i
)
2431 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2432 maybe_record_trace_start (lab
, insn
);
2437 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2438 gcc_assert (lab
!= NULL
);
2439 maybe_record_trace_start (lab
, insn
);
2442 else if (CALL_P (insn
))
2444 /* Sibling calls don't have edges inside this function. */
2445 if (SIBLING_CALL_P (insn
))
2448 /* Process non-local goto edges. */
2449 if (can_nonlocal_goto (insn
))
2450 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2453 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2455 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2457 int i
, n
= seq
->len ();
2458 for (i
= 0; i
< n
; ++i
)
2459 create_trace_edges (seq
->insn (i
));
2463 /* Process EH edges. */
2464 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2466 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2468 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2472 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2475 scan_insn_after (rtx_insn
*insn
)
2477 if (RTX_FRAME_RELATED_P (insn
))
2478 dwarf2out_frame_debug (insn
);
2479 notice_args_size (insn
);
2482 /* Scan the trace beginning at INSN and create the CFI notes for the
2483 instructions therein. */
2486 scan_trace (dw_trace_info
*trace
)
2488 rtx_insn
*prev
, *insn
= trace
->head
;
2489 dw_cfa_location this_cfa
;
2492 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2493 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2496 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2497 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2500 cur_row
= trace
->end_row
;
2502 this_cfa
= cur_row
->cfa
;
2503 cur_cfa
= &this_cfa
;
2505 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2507 prev
= insn
, insn
= NEXT_INSN (insn
))
2511 /* Do everything that happens "before" the insn. */
2512 add_cfi_insn
= prev
;
2514 /* Notice the end of a trace. */
2515 if (BARRIER_P (insn
))
2517 /* Don't bother saving the unneeded queued registers at all. */
2518 queued_reg_saves
.truncate (0);
2521 if (save_point_p (insn
))
2523 /* Propagate across fallthru edges. */
2524 dwarf2out_flush_queued_reg_saves ();
2525 maybe_record_trace_start (insn
, NULL
);
2529 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2532 /* Handle all changes to the row state. Sequences require special
2533 handling for the positioning of the notes. */
2534 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2537 int i
, n
= pat
->len ();
2539 control
= pat
->insn (0);
2540 if (can_throw_internal (control
))
2541 notice_eh_throw (control
);
2542 dwarf2out_flush_queued_reg_saves ();
2544 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2546 /* ??? Hopefully multiple delay slots are not annulled. */
2547 gcc_assert (n
== 2);
2548 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2549 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2551 elt
= pat
->insn (1);
2553 if (INSN_FROM_TARGET_P (elt
))
2555 HOST_WIDE_INT restore_args_size
;
2556 cfi_vec save_row_reg_save
;
2558 /* If ELT is an instruction from target of an annulled
2559 branch, the effects are for the target only and so
2560 the args_size and CFA along the current path
2561 shouldn't change. */
2562 add_cfi_insn
= NULL
;
2563 restore_args_size
= cur_trace
->end_true_args_size
;
2564 cur_cfa
= &cur_row
->cfa
;
2565 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2567 scan_insn_after (elt
);
2569 /* ??? Should we instead save the entire row state? */
2570 gcc_assert (!queued_reg_saves
.length ());
2572 create_trace_edges (control
);
2574 cur_trace
->end_true_args_size
= restore_args_size
;
2575 cur_row
->cfa
= this_cfa
;
2576 cur_row
->reg_save
= save_row_reg_save
;
2577 cur_cfa
= &this_cfa
;
2581 /* If ELT is a annulled branch-taken instruction (i.e.
2582 executed only when branch is not taken), the args_size
2583 and CFA should not change through the jump. */
2584 create_trace_edges (control
);
2586 /* Update and continue with the trace. */
2587 add_cfi_insn
= insn
;
2588 scan_insn_after (elt
);
2589 def_cfa_1 (&this_cfa
);
2594 /* The insns in the delay slot should all be considered to happen
2595 "before" a call insn. Consider a call with a stack pointer
2596 adjustment in the delay slot. The backtrace from the callee
2597 should include the sp adjustment. Unfortunately, that leaves
2598 us with an unavoidable unwinding error exactly at the call insn
2599 itself. For jump insns we'd prefer to avoid this error by
2600 placing the notes after the sequence. */
2601 if (JUMP_P (control
))
2602 add_cfi_insn
= insn
;
2604 for (i
= 1; i
< n
; ++i
)
2606 elt
= pat
->insn (i
);
2607 scan_insn_after (elt
);
2610 /* Make sure any register saves are visible at the jump target. */
2611 dwarf2out_flush_queued_reg_saves ();
2612 any_cfis_emitted
= false;
2614 /* However, if there is some adjustment on the call itself, e.g.
2615 a call_pop, that action should be considered to happen after
2616 the call returns. */
2617 add_cfi_insn
= insn
;
2618 scan_insn_after (control
);
2622 /* Flush data before calls and jumps, and of course if necessary. */
2623 if (can_throw_internal (insn
))
2625 notice_eh_throw (insn
);
2626 dwarf2out_flush_queued_reg_saves ();
2628 else if (!NONJUMP_INSN_P (insn
)
2629 || clobbers_queued_reg_save (insn
)
2630 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2631 dwarf2out_flush_queued_reg_saves ();
2632 any_cfis_emitted
= false;
2634 add_cfi_insn
= insn
;
2635 scan_insn_after (insn
);
2639 /* Between frame-related-p and args_size we might have otherwise
2640 emitted two cfa adjustments. Do it now. */
2641 def_cfa_1 (&this_cfa
);
2643 /* Minimize the number of advances by emitting the entire queue
2644 once anything is emitted. */
2645 if (any_cfis_emitted
2646 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2647 dwarf2out_flush_queued_reg_saves ();
2649 /* Note that a test for control_flow_insn_p does exactly the
2650 same tests as are done to actually create the edges. So
2651 always call the routine and let it not create edges for
2652 non-control-flow insns. */
2653 create_trace_edges (control
);
2656 add_cfi_insn
= NULL
;
2662 /* Scan the function and create the initial set of CFI notes. */
2665 create_cfi_notes (void)
2669 gcc_checking_assert (!queued_reg_saves
.exists ());
2670 gcc_checking_assert (!trace_work_list
.exists ());
2672 /* Always begin at the entry trace. */
2673 ti
= &trace_info
[0];
2676 while (!trace_work_list
.is_empty ())
2678 ti
= trace_work_list
.pop ();
2682 queued_reg_saves
.release ();
2683 trace_work_list
.release ();
2686 /* Return the insn before the first NOTE_INSN_CFI after START. */
2689 before_next_cfi_note (rtx_insn
*start
)
2691 rtx_insn
*prev
= start
;
2694 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2697 start
= NEXT_INSN (start
);
2702 /* Insert CFI notes between traces to properly change state between them. */
2705 connect_traces (void)
2707 unsigned i
, n
= trace_info
.length ();
2708 dw_trace_info
*prev_ti
, *ti
;
2710 /* ??? Ideally, we should have both queued and processed every trace.
2711 However the current representation of constant pools on various targets
2712 is indistinguishable from unreachable code. Assume for the moment that
2713 we can simply skip over such traces. */
2714 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2715 these are not "real" instructions, and should not be considered.
2716 This could be generically useful for tablejump data as well. */
2717 /* Remove all unprocessed traces from the list. */
2718 for (i
= n
- 1; i
> 0; --i
)
2720 ti
= &trace_info
[i
];
2721 if (ti
->beg_row
== NULL
)
2723 trace_info
.ordered_remove (i
);
2727 gcc_assert (ti
->end_row
!= NULL
);
2730 /* Work from the end back to the beginning. This lets us easily insert
2731 remember/restore_state notes in the correct order wrt other notes. */
2732 prev_ti
= &trace_info
[n
- 1];
2733 for (i
= n
- 1; i
> 0; --i
)
2735 dw_cfi_row
*old_row
;
2738 prev_ti
= &trace_info
[i
- 1];
2740 add_cfi_insn
= ti
->head
;
2742 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2743 for the portion of the function in the alternate text
2744 section. The row state at the very beginning of that
2745 new FDE will be exactly the row state from the CIE. */
2746 if (ti
->switch_sections
)
2747 old_row
= cie_cfi_row
;
2750 old_row
= prev_ti
->end_row
;
2751 /* If there's no change from the previous end state, fine. */
2752 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2754 /* Otherwise check for the common case of sharing state with
2755 the beginning of an epilogue, but not the end. Insert
2756 remember/restore opcodes in that case. */
2757 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2761 /* Note that if we blindly insert the remember at the
2762 start of the trace, we can wind up increasing the
2763 size of the unwind info due to extra advance opcodes.
2764 Instead, put the remember immediately before the next
2765 state change. We know there must be one, because the
2766 state at the beginning and head of the trace differ. */
2767 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2769 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2772 add_cfi_insn
= ti
->head
;
2774 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2777 old_row
= prev_ti
->beg_row
;
2779 /* Otherwise, we'll simply change state from the previous end. */
2782 change_cfi_row (old_row
, ti
->beg_row
);
2784 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2788 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2789 prev_ti
->id
, ti
->id
);
2794 note
= NEXT_INSN (note
);
2795 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2796 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2798 while (note
!= add_cfi_insn
);
2802 /* Connect args_size between traces that have can_throw_internal insns. */
2803 if (cfun
->eh
->lp_array
)
2805 HOST_WIDE_INT prev_args_size
= 0;
2807 for (i
= 0; i
< n
; ++i
)
2809 ti
= &trace_info
[i
];
2811 if (ti
->switch_sections
)
2813 if (ti
->eh_head
== NULL
)
2815 gcc_assert (!ti
->args_size_undefined
);
2817 if (ti
->beg_delay_args_size
!= prev_args_size
)
2819 /* ??? Search back to previous CFI note. */
2820 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2821 add_cfi_args_size (ti
->beg_delay_args_size
);
2824 prev_args_size
= ti
->end_delay_args_size
;
2829 /* Set up the pseudo-cfg of instruction traces, as described at the
2830 block comment at the top of the file. */
2833 create_pseudo_cfg (void)
2835 bool saw_barrier
, switch_sections
;
2840 /* The first trace begins at the start of the function,
2841 and begins with the CIE row state. */
2842 trace_info
.create (16);
2843 memset (&ti
, 0, sizeof (ti
));
2844 ti
.head
= get_insns ();
2845 ti
.beg_row
= cie_cfi_row
;
2846 ti
.cfa_store
= cie_cfi_row
->cfa
;
2847 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2848 trace_info
.quick_push (ti
);
2850 if (cie_return_save
)
2851 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2853 /* Walk all the insns, collecting start of trace locations. */
2854 saw_barrier
= false;
2855 switch_sections
= false;
2856 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2858 if (BARRIER_P (insn
))
2860 else if (NOTE_P (insn
)
2861 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2863 /* We should have just seen a barrier. */
2864 gcc_assert (saw_barrier
);
2865 switch_sections
= true;
2867 /* Watch out for save_point notes between basic blocks.
2868 In particular, a note after a barrier. Do not record these,
2869 delaying trace creation until the label. */
2870 else if (save_point_p (insn
)
2871 && (LABEL_P (insn
) || !saw_barrier
))
2873 memset (&ti
, 0, sizeof (ti
));
2875 ti
.switch_sections
= switch_sections
;
2876 ti
.id
= trace_info
.length ();
2877 trace_info
.safe_push (ti
);
2879 saw_barrier
= false;
2880 switch_sections
= false;
2884 /* Create the trace index after we've finished building trace_info,
2885 avoiding stale pointer problems due to reallocation. */
2887 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2889 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2891 dw_trace_info
**slot
;
2894 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2895 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2896 tp
->switch_sections
? " (section switch)" : "");
2898 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2899 gcc_assert (*slot
== NULL
);
2904 /* Record the initial position of the return address. RTL is
2905 INCOMING_RETURN_ADDR_RTX. */
2908 initial_return_save (rtx rtl
)
2910 unsigned int reg
= INVALID_REGNUM
;
2911 poly_int64 offset
= 0;
2913 switch (GET_CODE (rtl
))
2916 /* RA is in a register. */
2917 reg
= dwf_regno (rtl
);
2921 /* RA is on the stack. */
2922 rtl
= XEXP (rtl
, 0);
2923 switch (GET_CODE (rtl
))
2926 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2931 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2932 offset
= rtx_to_poly_int64 (XEXP (rtl
, 1));
2936 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2937 offset
= -rtx_to_poly_int64 (XEXP (rtl
, 1));
2947 /* The return address is at some offset from any value we can
2948 actually load. For instance, on the SPARC it is in %i7+8. Just
2949 ignore the offset for now; it doesn't matter for unwinding frames. */
2950 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2951 initial_return_save (XEXP (rtl
, 0));
2958 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2960 if (reg
!= INVALID_REGNUM
)
2961 record_reg_saved_in_reg (rtl
, pc_rtx
);
2962 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2967 create_cie_data (void)
2969 dw_cfa_location loc
;
2970 dw_trace_info cie_trace
;
2972 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2974 memset (&cie_trace
, 0, sizeof (cie_trace
));
2975 cur_trace
= &cie_trace
;
2977 add_cfi_vec
= &cie_cfi_vec
;
2978 cie_cfi_row
= cur_row
= new_cfi_row ();
2980 /* On entry, the Canonical Frame Address is at SP. */
2981 memset (&loc
, 0, sizeof (loc
));
2982 loc
.reg
= dw_stack_pointer_regnum
;
2983 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2986 if (targetm
.debug_unwind_info () == UI_DWARF2
2987 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2989 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2991 /* For a few targets, we have the return address incoming into a
2992 register, but choose a different return column. This will result
2993 in a DW_CFA_register for the return, and an entry in
2994 regs_saved_in_regs to match. If the target later stores that
2995 return address register to the stack, we want to be able to emit
2996 the DW_CFA_offset against the return column, not the intermediate
2997 save register. Save the contents of regs_saved_in_regs so that
2998 we can re-initialize it at the start of each function. */
2999 switch (cie_trace
.regs_saved_in_regs
.length ())
3004 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
3005 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
3006 cie_trace
.regs_saved_in_regs
.release ();
3018 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
3019 state at each location within the function. These notes will be
3020 emitted during pass_final. */
3023 execute_dwarf2_frame (void)
3025 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
3026 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
3028 /* The first time we're called, compute the incoming frame state. */
3029 if (cie_cfi_vec
== NULL
)
3032 dwarf2out_alloc_current_fde ();
3034 create_pseudo_cfg ();
3037 create_cfi_notes ();
3041 /* Free all the data we allocated. */
3046 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3047 ti
->regs_saved_in_regs
.release ();
3049 trace_info
.release ();
3057 /* Convert a DWARF call frame info. operation to its string name */
3060 dwarf_cfi_name (unsigned int cfi_opc
)
3062 const char *name
= get_DW_CFA_name (cfi_opc
);
3067 return "DW_CFA_<unknown>";
3070 /* This routine will generate the correct assembly data for a location
3071 description based on a cfi entry with a complex address. */
3074 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3076 dw_loc_descr_ref loc
;
3079 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3080 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3083 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3084 dw2_asm_output_data (1, r
, NULL
);
3085 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3088 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3090 /* Output the size of the block. */
3091 size
= size_of_locs (loc
);
3092 dw2_asm_output_data_uleb128 (size
, NULL
);
3094 /* Now output the operations themselves. */
3095 output_loc_sequence (loc
, for_eh
);
3098 /* Similar, but used for .cfi_escape. */
3101 output_cfa_loc_raw (dw_cfi_ref cfi
)
3103 dw_loc_descr_ref loc
;
3106 if (cfi
->dw_cfi_opc
== DW_CFA_expression
3107 || cfi
->dw_cfi_opc
== DW_CFA_val_expression
)
3110 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3111 fprintf (asm_out_file
, "%#x,", r
);
3112 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3115 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3117 /* Output the size of the block. */
3118 size
= size_of_locs (loc
);
3119 dw2_asm_output_data_uleb128_raw (size
);
3120 fputc (',', asm_out_file
);
3122 /* Now output the operations themselves. */
3123 output_loc_sequence_raw (loc
);
3126 /* Output a Call Frame Information opcode and its operand(s). */
3129 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3134 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3135 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3136 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3137 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3138 ((unsigned HOST_WIDE_INT
)
3139 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3140 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3142 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3143 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3144 "DW_CFA_offset, column %#lx", r
);
3145 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3146 dw2_asm_output_data_uleb128 (off
, NULL
);
3148 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3150 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3151 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3152 "DW_CFA_restore, column %#lx", r
);
3156 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3157 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3159 switch (cfi
->dw_cfi_opc
)
3161 case DW_CFA_set_loc
:
3163 dw2_asm_output_encoded_addr_rtx (
3164 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3165 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3168 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3169 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3170 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3173 case DW_CFA_advance_loc1
:
3174 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3175 fde
->dw_fde_current_label
, NULL
);
3176 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3179 case DW_CFA_advance_loc2
:
3180 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3181 fde
->dw_fde_current_label
, NULL
);
3182 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3185 case DW_CFA_advance_loc4
:
3186 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3187 fde
->dw_fde_current_label
, NULL
);
3188 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3191 case DW_CFA_MIPS_advance_loc8
:
3192 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3193 fde
->dw_fde_current_label
, NULL
);
3194 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3197 case DW_CFA_offset_extended
:
3198 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3199 dw2_asm_output_data_uleb128 (r
, NULL
);
3200 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3201 dw2_asm_output_data_uleb128 (off
, NULL
);
3204 case DW_CFA_def_cfa
:
3205 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3206 dw2_asm_output_data_uleb128 (r
, NULL
);
3207 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3210 case DW_CFA_offset_extended_sf
:
3211 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3212 dw2_asm_output_data_uleb128 (r
, NULL
);
3213 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3214 dw2_asm_output_data_sleb128 (off
, NULL
);
3217 case DW_CFA_def_cfa_sf
:
3218 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3219 dw2_asm_output_data_uleb128 (r
, NULL
);
3220 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3221 dw2_asm_output_data_sleb128 (off
, NULL
);
3224 case DW_CFA_restore_extended
:
3225 case DW_CFA_undefined
:
3226 case DW_CFA_same_value
:
3227 case DW_CFA_def_cfa_register
:
3228 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3229 dw2_asm_output_data_uleb128 (r
, NULL
);
3232 case DW_CFA_register
:
3233 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3234 dw2_asm_output_data_uleb128 (r
, NULL
);
3235 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3236 dw2_asm_output_data_uleb128 (r
, NULL
);
3239 case DW_CFA_def_cfa_offset
:
3240 case DW_CFA_GNU_args_size
:
3241 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3244 case DW_CFA_def_cfa_offset_sf
:
3245 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3246 dw2_asm_output_data_sleb128 (off
, NULL
);
3249 case DW_CFA_GNU_window_save
:
3252 case DW_CFA_def_cfa_expression
:
3253 case DW_CFA_expression
:
3254 case DW_CFA_val_expression
:
3255 output_cfa_loc (cfi
, for_eh
);
3258 case DW_CFA_GNU_negative_offset_extended
:
3259 /* Obsoleted by DW_CFA_offset_extended_sf. */
3268 /* Similar, but do it via assembler directives instead. */
3271 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3273 unsigned long r
, r2
;
3275 switch (cfi
->dw_cfi_opc
)
3277 case DW_CFA_advance_loc
:
3278 case DW_CFA_advance_loc1
:
3279 case DW_CFA_advance_loc2
:
3280 case DW_CFA_advance_loc4
:
3281 case DW_CFA_MIPS_advance_loc8
:
3282 case DW_CFA_set_loc
:
3283 /* Should only be created in a code path not followed when emitting
3284 via directives. The assembler is going to take care of this for
3285 us. But this routines is also used for debugging dumps, so
3287 gcc_assert (f
!= asm_out_file
);
3288 fprintf (f
, "\t.cfi_advance_loc\n");
3292 case DW_CFA_offset_extended
:
3293 case DW_CFA_offset_extended_sf
:
3294 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3295 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3296 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3299 case DW_CFA_restore
:
3300 case DW_CFA_restore_extended
:
3301 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3302 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3305 case DW_CFA_undefined
:
3306 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3307 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3310 case DW_CFA_same_value
:
3311 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3312 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3315 case DW_CFA_def_cfa
:
3316 case DW_CFA_def_cfa_sf
:
3317 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3318 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3319 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3322 case DW_CFA_def_cfa_register
:
3323 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3324 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3327 case DW_CFA_register
:
3328 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3329 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3330 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3333 case DW_CFA_def_cfa_offset
:
3334 case DW_CFA_def_cfa_offset_sf
:
3335 fprintf (f
, "\t.cfi_def_cfa_offset "
3336 HOST_WIDE_INT_PRINT_DEC
"\n",
3337 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3340 case DW_CFA_remember_state
:
3341 fprintf (f
, "\t.cfi_remember_state\n");
3343 case DW_CFA_restore_state
:
3344 fprintf (f
, "\t.cfi_restore_state\n");
3347 case DW_CFA_GNU_args_size
:
3348 if (f
== asm_out_file
)
3350 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3351 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3353 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3354 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3359 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3360 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3364 case DW_CFA_GNU_window_save
:
3365 fprintf (f
, "\t.cfi_window_save\n");
3368 case DW_CFA_def_cfa_expression
:
3369 case DW_CFA_expression
:
3370 case DW_CFA_val_expression
:
3371 if (f
!= asm_out_file
)
3373 fprintf (f
, "\t.cfi_%scfa_%sexpression ...\n",
3374 cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
? "def_" : "",
3375 cfi
->dw_cfi_opc
== DW_CFA_val_expression
? "val_" : "");
3378 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3379 output_cfa_loc_raw (cfi
);
3389 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3391 if (dwarf2out_do_cfi_asm ())
3392 output_cfi_directive (asm_out_file
, cfi
);
3396 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3404 dw_cfa_location dummy
;
3405 memset (&dummy
, 0, sizeof (dummy
));
3406 dummy
.reg
= INVALID_REGNUM
;
3407 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3409 output_cfi_directive (f
, cfi
);
3411 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3413 output_cfi_directive (f
, cfi
);
3416 void debug_cfi_row (dw_cfi_row
*row
);
3419 debug_cfi_row (dw_cfi_row
*row
)
3421 dump_cfi_row (stderr
, row
);
3425 /* Save the result of dwarf2out_do_frame across PCH.
3426 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3427 static GTY(()) signed char saved_do_cfi_asm
= 0;
3429 /* Decide whether to emit EH frame unwind information for the current
3430 translation unit. */
3433 dwarf2out_do_eh_frame (void)
3436 (flag_unwind_tables
|| flag_exceptions
)
3437 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
;
3440 /* Decide whether we want to emit frame unwind information for the current
3441 translation unit. */
3444 dwarf2out_do_frame (void)
3446 /* We want to emit correct CFA location expressions or lists, so we
3447 have to return true if we're going to output debug info, even if
3448 we're not going to output frame or unwind info. */
3449 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3452 if (saved_do_cfi_asm
> 0)
3455 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3458 if (dwarf2out_do_eh_frame ())
3464 /* Decide whether to emit frame unwind via assembler directives. */
3467 dwarf2out_do_cfi_asm (void)
3471 if (saved_do_cfi_asm
!= 0)
3472 return saved_do_cfi_asm
> 0;
3474 /* Assume failure for a moment. */
3475 saved_do_cfi_asm
= -1;
3477 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3479 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3482 /* Make sure the personality encoding is one the assembler can support.
3483 In particular, aligned addresses can't be handled. */
3484 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3485 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3487 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3488 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3491 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3492 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3493 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
&& !dwarf2out_do_eh_frame ())
3497 saved_do_cfi_asm
= 1;
3503 const pass_data pass_data_dwarf2_frame
=
3505 RTL_PASS
, /* type */
3506 "dwarf2", /* name */
3507 OPTGROUP_NONE
, /* optinfo_flags */
3508 TV_FINAL
, /* tv_id */
3509 0, /* properties_required */
3510 0, /* properties_provided */
3511 0, /* properties_destroyed */
3512 0, /* todo_flags_start */
3513 0, /* todo_flags_finish */
3516 class pass_dwarf2_frame
: public rtl_opt_pass
3519 pass_dwarf2_frame (gcc::context
*ctxt
)
3520 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3523 /* opt_pass methods: */
3524 virtual bool gate (function
*);
3525 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3527 }; // class pass_dwarf2_frame
3530 pass_dwarf2_frame::gate (function
*)
3532 /* Targets which still implement the prologue in assembler text
3533 cannot use the generic dwarf2 unwinding. */
3534 if (!targetm
.have_prologue ())
3537 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3538 from the optimized shrink-wrapping annotations that we will compute.
3539 For now, only produce the CFI notes for dwarf2. */
3540 return dwarf2out_do_frame ();
3546 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3548 return new pass_dwarf2_frame (ctxt
);
3551 #include "gt-dwarf2cfi.h"