1 2023-11-08 Uros Bizjak <ubizjak@gmail.com>
4 * config/i386/i386.md (*add<mode>_1_slp):
5 Split insn only for unmatched operand 0.
6 (*sub<mode>_1_slp): Ditto.
7 (*<any_logic:code><mode>_1_slp): Merge pattern from "*and<mode>_1_slp"
8 and "*<any_logic:code><mode>_1_slp" using any_logic code iterator.
9 Split insn only for unmatched operand 0.
10 (*neg<mode>1_slp): Split insn only for unmatched operand 0.
11 (*one_cmpl<mode>_1_slp): Ditto.
12 (*ashl<mode>3_1_slp): Ditto.
13 (*<any_shiftrt:insn><mode>_1_slp): Ditto.
14 (*<any_rotate:insn><mode>_1_slp): Ditto.
15 (*addqi_ext<mode>_1): Redefine as define_insn_and_split. Add
16 alternative 1 and split insn after reload for unmatched operand 0.
17 (*<plusminus:insn>qi_ext<mode>_2): Merge pattern from
18 "*addqi_ext<mode>_2" and "*subqi_ext<mode>_2" using plusminus code
19 iterator. Redefine as define_insn_and_split. Add alternative 1
20 and split insn after reload for unmatched operand 0.
21 (*subqi_ext<mode>_1): Redefine as define_insn_and_split. Add
22 alternative 1 and split insn after reload for unmatched operand 0.
23 (*<any_logic:code>qi_ext<mode>_0): Merge pattern from
24 "*andqi_ext<mode>_0" and and "*<any_logic:code>qi_ext<mode>_0" using
25 any_logic code iterator.
26 (*<any_logic:code>qi_ext<mode>_1): Merge pattern from
27 "*andqi_ext<mode>_1" and "*<any_logic:code>qi_ext<mode>_1" using
28 any_logic code iterator. Redefine as define_insn_and_split. Add
29 alternative 1 and split insn after reload for unmatched operand 0.
30 (*<any_logic:code>qi_ext<mode>_1_cc): Merge pattern from
31 "*andqi_ext<mode>_1_cc" and "*xorqi_ext<mode>_1_cc" using any_logic
32 code iterator. Redefine as define_insn_and_split. Add alternative 1
33 and split insn after reload for unmatched operand 0.
34 (*<any_logic:code>qi_ext<mode>_2): Merge pattern from
35 "*andqi_ext<mode>_2" and "*<any_or:code>qi_ext<mode>_2" using
36 any_logic code iterator. Redefine as define_insn_and_split. Add
37 alternative 1 and split insn after reload for unmatched operand 0.
38 (*<any_logic:code>qi_ext<mode>_3): Redefine as define_insn_and_split.
39 Add alternative 1 and split insn after reload for unmatched operand 0.
40 (*negqi_ext<mode>_1): Rename from "*negqi_ext<mode>_2". Add
41 alternative 1 and split insn after reload for unmatched operand 0.
42 (*one_cmplqi_ext<mode>_1): Ditto.
43 (*ashlqi_ext<mode>_1): Ditto.
44 (*<any_shiftrt:insn>qi_ext<mode>_1): Ditto.
46 2023-11-08 Richard Biener <rguenther@suse.de>
48 * tree-vect-stmts.cc (vectorizable_load): Adjust offset
49 vector gathering for SLP of emulated gathers.
51 2023-11-08 Richard Biener <rguenther@suse.de>
53 * tree-vectorizer.h (vect_slp_child_index_for_operand):
54 Add gatherscatter_p argument.
55 * tree-vect-slp.cc (vect_slp_child_index_for_operand): Likewise.
57 * tree-vect-stmts.cc (vect_check_store_rhs): Turn the rhs
58 argument into an output, also output the SLP node associated
60 (vectorizable_simd_clone_call): Adjust.
61 (vectorizable_store): Likewise.
62 (vectorizable_load): Likewise.
64 2023-11-08 Richard Biener <rguenther@suse.de>
66 * tree-vect-stmts.cc (vectorizable_load): Use the correct
67 vectorized mask operand.
69 2023-11-08 Lehua Ding <lehua.ding@rivai.ai>
71 * config/riscv/vector.md (*vsetvldi_no_side_effects_si_extend):
74 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
76 * config/riscv/riscv-vsetvl.cc: Fix ICE.
78 2023-11-08 xuli <xuli1@eswincomputing.com>
80 * config/riscv/riscv-c.cc (riscv_check_builtin_call): Eliminate warning.
82 2023-11-08 Hongyu Wang <hongyu.wang@intel.com>
85 * config/i386/constraints.md (jc): New constraint that prohibits
87 * config/i386/i386.md (*movdi_internal): Change r constraint
89 (*movti_internal): Likewise.
91 2023-11-08 Florian Weimer <fweimer@redhat.com>
93 * doc/invoke.texi (Warning Options): Mention C diagnostics
96 2023-11-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
99 * config/riscv/riscv-vector-builtins-bases.cc: Normalize the vsetvls.
101 2023-11-08 Haochen Jiang <haochen.jiang@intel.com>
104 * config/i386/i386.md (avx_noavx512vl): New definition for isa
106 * config/i386/sse.md (*andnot<mode>3): Change isa attribute from
107 avx_noavx512f to avx_noavx512vl.
109 2023-11-07 Pan Li <pan2.li@intel.com>
111 * config/riscv/autovec.md: Remove the size check of lfloor.
112 * config/riscv/riscv-v.cc (expand_vec_lfloor): Leverage
113 emit_vec_rounding_to_integer for floor.
115 2023-11-07 Robin Dapp <rdapp@ventanamicro.com>
117 PR tree-optimization/112361
120 * tree-if-conv.cc (convert_scalar_cond_reduction): Remember if
121 loop was versioned and only then create COND_OPs.
122 (predicate_scalar_phi): Do not create COND_OP when not
124 * tree-vect-loop.cc (vect_expand_fold_left): Re-create
126 (vectorize_fold_left_reduction): Pass mask to
127 vect_expand_fold_left.
129 2023-11-07 Uros Bizjak <ubizjak@gmail.com>
131 * config/i386/predicates.md ("flags_reg_operand"):
132 Make predicate special to avoid automatic mode checks.
134 2023-11-07 Martin Jambor <mjambor@suse.cz>
136 * configure: Regenerate.
138 2023-11-07 Kwok Cheung Yeung <kcy@codesourcery.com>
140 * lto-cgraph.cc (enum LTO_symtab_tags): Add tag for indirect
142 (output_offload_tables): Write indirect functions.
143 (input_offload_tables): read indirect functions.
144 * lto-section-names.h (OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): New.
145 * omp-builtins.def (BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR): New.
146 * omp-offload.cc (offload_ind_funcs): New.
147 (omp_discover_implicit_declare_target): Add functions marked with
148 'omp declare target indirect' to indirect functions list.
149 (omp_finish_file): Add indirect functions to section for offload
151 (execute_omp_device_lower): Redirect indirect calls on target by
152 passing function pointer to BUILT_IN_GOMP_TARGET_MAP_INDIRECT_PTR.
153 (pass_omp_device_lower::gate): Run pass_omp_device_lower if
154 indirect functions are present on an accelerator device.
155 * omp-offload.h (offload_ind_funcs): New.
156 * tree-core.h (omp_clause_code): Add OMP_CLAUSE_INDIRECT.
157 * tree.cc (omp_clause_num_ops): Add entry for OMP_CLAUSE_INDIRECT.
158 (omp_clause_code_name): Likewise.
159 * tree.h (OMP_CLAUSE_INDIRECT_EXPR): New.
160 * config/gcn/mkoffload.cc (process_asm): Process offload_ind_funcs
161 section. Count number of indirect functions.
162 (process_obj): Emit number of indirect functions.
163 * config/nvptx/mkoffload.cc (ind_func_ids, ind_funcs_tail): New.
164 (process): Emit offload_ind_func_table in PTX code. Emit indirect
165 function names and count in image.
166 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Mark
167 indirect functions in PTX code with IND_FUNC_MAP.
169 2023-11-07 Tobias Burnus <tobias@codesourcery.com>
171 * doc/invoke.texi (-fopenmp, -fopenmp-simd): Adjust wording for
172 attribute syntax supported also in C.
174 2023-11-07 Richard Sandiford <richard.sandiford@arm.com>
176 * config/aarch64/aarch64.cc (aarch64_print_operand): Add a %Z
177 modifier for SVE registers.
179 2023-11-07 Joseph Myers <joseph@codesourcery.com>
181 * builtins.def (DEF_C2X_BUILTIN): Rename to DEF_C23_BUILTIN and
182 use flag_isoc23 and function_c23_misc.
183 * config/rl78/rl78.cc (rl78_option_override): Compare
184 lang_hooks.name with "GNU C23" not "GNU C2X".
185 * coretypes.h (function_c2x_misc): Rename to function_c23_misc.
186 * doc/cpp.texi (@code{__has_attribute}): Refer to C23 instead of
188 * doc/extend.texi: Likewise.
189 * doc/invoke.texi: Likewise.
190 * dwarf2out.cc (highest_c_language, gen_compile_unit_die): Compare
191 against and return "GNU C23" language string instead of "GNU C2X".
192 * ginclude/float.h: Refer to C23 instead of C2X in comments.
193 * ginclude/stdint-gcc.h: Likewise.
194 * glimits.h: Likewise.
197 2023-11-07 Alexandre Oliva <oliva@adacore.com>
199 * doc/sourcebuild.texi (opt_mstrict_align): New target.
201 2023-11-07 Lehua Ding <lehua.ding@rivai.ai>
203 * config/riscv/autovec-opt.md (*cond_len_<optab><v_double_trunc><mode>):
205 (*cond_len_<optab><v_quad_trunc><mode>): Ditto.
206 (*cond_len_<optab><v_oct_trunc><mode>): Ditto.
207 (*cond_len_extend<v_double_trunc><mode>): Ditto.
208 (*cond_len_widen_reduc_plus_scal_<mode>): Ditto.
210 2023-11-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
213 * config/riscv/riscv-avlprop.cc
214 (pass_avlprop::get_vlmax_ta_preferred_avl): Enhance AVL propagation.
215 * config/riscv/t-riscv: Add new include.
217 2023-11-07 Pan Li <pan2.li@intel.com>
219 * config/riscv/autovec.md: Remove the size check of lceil.l
220 * config/riscv/riscv-v.cc (expand_vec_lceil): Leverage
221 emit_vec_rounding_to_integer for ceil.
223 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
225 * config/pa/pa.cc (pa_asm_trampoline_template): Fix typo.
227 2023-11-06 John David Anglin <danglin@gcc.gnu.org>
229 * config/pa/pa-linux.h (NEED_INDICATE_EXEC_STACK): Define to 1.
231 2023-11-06 David Malcolm <dmalcolm@redhat.com>
233 * diagnostic-show-locus.cc (class colorizer): Take just a
234 pretty_printer rather than a diagnostic_context.
235 (layout::layout): Make context param a const reference,
236 and pretty_printer param non-optional.
237 (layout::m_context): Drop field.
238 (layout::m_options): New field.
239 (layout::m_colorize_source_p): Drop field.
240 (layout::m_show_labels_p): Drop field.
241 (layout::m_show_line_numbers_p): Drop field.
242 (layout::print_gap_in_line_numbering): Use m_options.
243 (layout::calculate_line_spans): Likewise.
244 (layout::calculate_linenum_width): Likewise.
245 (layout::calculate_x_offset_display): Likewise.
246 (layout::print_source_line): Likewise.
247 (layout::start_annotation_line): Likewise.
248 (layout::print_annotation_line): Likewise.
249 (layout::print_line): Likewise.
250 (gcc_rich_location::add_location_if_nearby): Update for changes to
252 (diagnostic_show_locus): Likewise.
253 (selftest::test_offset_impl): Likewise.
254 (selftest::test_layout_x_offset_display_utf8): Likewise.
255 (selftest::test_layout_x_offset_display_tab): Likewise.
256 (selftest::test_tab_expansion): Likewise.
257 * diagnostic.h (diagnostic_context::m_source_printing): Move
258 declaration of struct outside diagnostic_context as...
259 (struct diagnostic_source_printing_options)... this.
261 2023-11-06 David Malcolm <dmalcolm@redhat.com>
263 * diagnostic.cc (diagnostic_context::push_diagnostics): Convert
265 (diagnostic_option_classifier::push): ...this.
266 (diagnostic_context::pop_diagnostics): Convert to...
267 (diagnostic_option_classifier::pop): ...this.
268 (diagnostic_context::initialize): Move code to...
269 (diagnostic_option_classifier::init): ...this new function.
270 (diagnostic_context::finish): Move code to...
271 (diagnostic_option_classifier::fini): ...this new function.
272 (diagnostic_context::classify_diagnostic): Convert to...
273 (diagnostic_option_classifier::classify_diagnostic): ...this.
274 (diagnostic_context::update_effective_level_from_pragmas): Convert
276 (diagnostic_option_classifier::update_effective_level_from_pragmas):
278 (diagnostic_context::diagnostic_enabled): Update for refactoring.
279 * diagnostic.h (struct diagnostic_classification_change_t): Move into...
280 (class diagnostic_option_classifier): ...this new class.
281 (diagnostic_context::option_unspecified_p): Update for move of
282 fields into m_option_classifier.
283 (diagnostic_context::classify_diagnostic): Likewise.
284 (diagnostic_context::push_diagnostics): Likewise.
285 (diagnostic_context::pop_diagnostics): Likewise.
286 (diagnostic_context::update_effective_level_from_pragmas): Delete.
287 (diagnostic_context::m_classify_diagnostic): Move into class
288 diagnostic_option_classifier.
289 (diagnostic_context::m_option_classifier): Likewise.
290 (diagnostic_context::m_classification_history): Likewise.
291 (diagnostic_context::m_n_classification_history): Likewise.
292 (diagnostic_context::m_push_list): Likewise.
293 (diagnostic_context::m_n_push): Likewise.
294 (diagnostic_context::m_option_classifier): New.
296 2023-11-06 David Malcolm <dmalcolm@redhat.com>
298 * diagnostic.cc (diagnostic_context::set_urlifier): New.
299 * diagnostic.h (diagnostic_context::set_urlifier): New decl.
300 (diagnostic_context::m_urlifier): Make private.
301 * gcc.cc (driver::global_initializations): Use set_urlifier rather
302 than directly setting field.
303 * toplev.cc (general_init): Likewise.
305 2023-11-06 David Malcolm <dmalcolm@redhat.com>
307 * diagnostic.cc (diagnostic_context::check_max_errors): Replace
308 uses of diagnostic_kind_count with simple field acesss.
309 (diagnostic_context::report_diagnostic): Likewise.
310 (diagnostic_text_output_format::~diagnostic_text_output_format):
311 Replace use of diagnostic_kind_count with
312 diagnostic_context::diagnostic_count.
313 * diagnostic.h (diagnostic_kind_count): Delete.
314 (errorcount): Replace use of diagnostic_kind_count with
315 diagnostic_context::diagnostic_count.
316 (warningcount): Likewise.
317 (werrorcount): Likewise.
318 (sorrycount): Likewise.
320 2023-11-06 Christophe Lyon <christophe.lyon@linaro.org>
322 * doc/sourcebuild.texi (Other attributes): Document thread_fence
325 2023-11-06 Uros Bizjak <ubizjak@gmail.com>
327 * config/i386/constraints.md (Bc): Remove constraint.
328 (Bn): Rewrite to use x86_extended_reg_mentioned_p predicate.
329 * config/i386/i386.cc (ix86_memory_address_reg_class):
330 Do not limit processing to TARGET_APX_EGPR. Exit early for
331 NULL insn. Do not check recog_data.insn before calling
333 (ix86_insn_base_reg_class): Handle ADDR_GPR8.
334 (ix86_regno_ok_for_insn_base_p): Ditto.
335 (ix86_insn_index_reg_class): Ditto.
336 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64):
337 Remove insn pattern and corresponding peephole2 pattern.
338 (*cmpi_ext<mode>_1): Remove (m,Q) alternative.
339 Change (QBc,Q) alternative to (QBn,Q). Add "addr" attribute.
340 (*cmpqi_ext<mode>_3_mem_rex64): Remove insn pattern
341 and corresponding peephole2 pattern.
342 (*cmpi_ext<mode>_3): Remove (Q,m) alternative.
343 Change (Q,QnBc) alternative to (Q,QnBn). Add "addr" attribute.
344 (*extzvqi_mem_rex64): Remove insn pattern and
345 corresponding peephole2 pattern.
346 (*extzvqi): Remove (Q,m) alternative. Change (Q,QnBc)
347 alternative to (Q,QnBn). Add "addr" attribute.
348 (*insvqi_1_mem_rex64): Remove insn pattern and
349 corresponding peephole2 pattern.
350 (*insvqi_1): Remove (Q,m) alternative. Change (Q,QnBc)
351 alternative to (Q,QnBn). Add "addr" attribute.
352 (@insv<mode>_1): Ditto.
353 (*addqi_ext<mode>_0): Remove (m,0,Q) alternative. Change (QBc,0,Q)
354 alternative to (QBn,0,Q). Add "addr" attribute.
355 (*subqi_ext<mode>_0): Ditto.
356 (*andqi_ext<mode>_0): Ditto.
357 (*<any_or:code>qi_ext<mode>_0): Ditto.
358 (*addqi_ext<mode>_1): Remove (Q,0,m) alternative. Change (Q,0,QnBc)
359 alternative to (Q,0,QnBn). Add "addr" attribute.
360 (*andqi_ext<mode>_1): Ditto.
361 (*andqi_ext<mode>_1_cc): Ditto.
362 (*<any_or:code>qi_ext<mode>_1): Ditto.
363 (*xorqi_ext<mode>_1_cc): Ditto.
364 * config/i386/predicates.md (nonimm_x64constmem_operand):
366 (general_x64constmem_operand): Ditto.
367 (norex_memory_operand): Ditto.
369 2023-11-06 Joseph Myers <joseph@codesourcery.com>
372 * doc/cpp.texi (__STDC_VERSION__): Refer to -std=c23 and
373 -std=gnu23 instead of -std=c2x and -std=gnu2x.
374 * doc/extend.texi (Attribute Syntax): Refer to C23 and -std=c23
375 instead of C2x and -std=c2x.
376 * doc/invoke.texi (-Wc11-c23-compat, -std=c23, -std=gnu23)
377 (-std=iso9899:2024): Document, with -Wc11-c2x-compat, -std=c2x and
378 -std=gnu2x as deprecated aliases. Update descriptions of C23.
379 * doc/standards.texi (Standards): Describe C23 with C2X as an old
382 2023-11-06 Thomas Schwinge <thomas@codesourcery.com>
384 * config/nvptx/nvptx.h (MAKE_DECL_ONE_ONLY): Define.
386 2023-11-06 Richard Biener <rguenther@suse.de>
388 PR tree-optimization/112405
389 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
390 Properly handle invariant and/or loop mask passing.
392 2023-11-06 Pan Li <pan2.li@intel.com>
394 * config/riscv/autovec.md: Remove the size check of lround.
395 * config/riscv/riscv-v.cc (expand_vec_lround): Leverage
396 emit_vec_rounding_to_integer for round.
398 2023-11-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
400 * config/riscv/predicates.md: Adapt predicate.
401 * config/riscv/riscv-protos.h (can_be_broadcasted_p): New function.
402 * config/riscv/riscv-v.cc (can_be_broadcasted_p): Ditto.
403 * config/riscv/vector.md (vec_duplicate<mode>): New pattern.
404 (*vec_duplicate<mode>): Adapt vec_duplicate insn pattern.
406 2023-11-06 Richard Biener <rguenther@suse.de>
408 PR tree-optimization/111950
409 * tree-vect-loop-manip.cc (slpeel_duplicate_current_defs_from_edges):
411 (find_guard_arg): Likewise.
412 (slpeel_update_phi_nodes_for_guard2): Likewise.
413 (slpeel_tree_duplicate_loop_to_edge_cfg): Remove calls to
414 slpeel_duplicate_current_defs_from_edges, do not elide
415 LC-PHIs for invariant values.
416 (vect_do_peeling): Materialize PHI arguments for the edge
417 around the epilog from the PHI defs of the main loop exit.
419 2023-11-06 Richard Biener <rguenther@suse.de>
421 PR tree-optimization/112404
422 * tree-vectorizer.h (get_mask_type_for_scalar_type): Declare
423 overload with SLP node argument.
424 * tree-vect-stmts.cc (get_mask_type_for_scalar_type): Implement it.
425 (vect_check_scalar_mask): Use it.
426 * tree-vect-slp.cc (vect_gather_slp_loads): Properly identify
427 loads also for nodes with children, like .MASK_LOAD.
428 * tree-vect-loop.cc (vect_analyze_loop_2): Look at the
429 representative for load nodes and check whether it is a grouped
430 access before looking for load-lanes support.
432 2023-11-06 Robin Dapp <rdapp@ventanamicro.com>
434 PR tree-optimization/111760
435 * config/riscv/autovec.md (vcond_mask_len_<mode><vm>): Add
437 * config/riscv/riscv-protos.h (enum insn_type): Add.
438 * config/riscv/riscv-v.cc (needs_fp_rounding): Add !pred_mov.
439 * doc/md.texi: Add vcond_mask_len.
440 * gimple-match-exports.cc (maybe_resimplify_conditional_op):
441 Create VCOND_MASK_LEN when length masking.
442 * gimple-match.h (gimple_match_op::gimple_match_op): Always
443 initialize len and bias.
444 * internal-fn.cc (vec_cond_mask_len_direct): Add.
445 (direct_vec_cond_mask_len_optab_supported_p): Add.
446 (internal_fn_len_index): Add VCOND_MASK_LEN.
447 (internal_fn_mask_index): Ditto.
448 * internal-fn.def (VCOND_MASK_LEN): New internal function.
449 * match.pd: Combine unconditional unary, binary and ternary
450 operations into the respective COND_LEN operations.
451 * optabs.def (OPTAB_D): Add vcond_mask_len optab.
453 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
455 * explow.cc (align_dynamic_address): Do nothing if the required
458 2023-11-06 Richard Sandiford <richard.sandiford@arm.com>
460 * function.h (get_stack_dynamic_offset): Declare.
461 * function.cc (get_stack_dynamic_offset): New function,
463 (get_stack_dynamic_offset): ...here.
464 * explow.cc (allocate_dynamic_stack_space): Handle calls made
465 after virtual registers have been instantiated.
467 2023-11-06 liuhongt <hongtao.liu@intel.com>
470 * config/i386/i386-expand.cc (ix86_expand_vec_perm_vpermt2):
471 Avoid generating RTL code when d->testing_p.
473 2023-11-06 Richard Biener <rguenther@suse.de>
475 PR tree-optimization/112369
476 * tree.cc (strip_float_extensions): Use element_precision.
478 2023-11-06 Richard Biener <rguenther@suse.de>
481 * doc/extend.texi (__builtin_constant_p): Clarify that
482 side-effects are discarded.
484 2023-11-06 Kewen Lin <linkw@linux.ibm.com>
487 * config.in: Regenerate.
488 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Guard
489 inline asm handling under !HAVE_AS_POWER10_HTM.
490 * configure: Regenerate.
491 * configure.ac: Detect assembler support for HTM insns at power10.
493 2023-11-06 xuli <xuli1@eswincomputing.com>
494 Pan Li <pan2.li@intel.com>
496 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): New function for the hook.
497 (riscv_register_pragmas): Register the hook.
498 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): New decl.
499 * config/riscv/riscv-vector-builtins-bases.cc: New function impl.
500 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Register overloaded function.
501 * config/riscv/riscv-vector-builtins.cc (struct non_overloaded_registered_function_hasher):
503 (function_builder::add_function): Add overloaded arg.
504 (function_builder::add_unique_function): Map overloaded function to non-overloaded function.
505 (function_builder::add_overloaded_function): New API impl.
506 (registered_function::overloaded_hash): Calculate hash value.
507 (has_vxrm_or_frm_p): New function impl.
508 (non_overloaded_registered_function_hasher::hash): Ditto.
509 (non_overloaded_registered_function_hasher::equal): Ditto.
510 (handle_pragma_vector): Allocate space for hash table.
511 (resolve_overloaded_builtin): New function impl.
512 * config/riscv/riscv-vector-builtins.h (function_base::may_require_frm_p): Ditto.
513 (function_base::may_require_vxrm_p): Ditto.
515 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
518 * config/i386/avx512bf16intrin.h: Push no-evex512 target.
519 * config/i386/avx512bf16vlintrin.h: Ditto.
520 * config/i386/avx512bitalgvlintrin.h: Ditto.
521 * config/i386/avx512bwintrin.h: Ditto.
522 * config/i386/avx512dqintrin.h: Ditto.
523 * config/i386/avx512fintrin.h: Ditto.
524 * config/i386/avx512fp16intrin.h: Ditto.
525 * config/i386/avx512fp16vlintrin.h: Ditto.
526 * config/i386/avx512ifmavlintrin.h: Ditto.
527 * config/i386/avx512vbmi2vlintrin.h: Ditto.
528 * config/i386/avx512vbmivlintrin.h: Ditto.
529 * config/i386/avx512vlbwintrin.h: Ditto.
530 * config/i386/avx512vldqintrin.h: Ditto.
531 * config/i386/avx512vlintrin.h: Ditto.
532 * config/i386/avx512vnnivlintrin.h: Ditto.
533 * config/i386/avx512vp2intersectvlintrin.h: Ditto.
534 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
536 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
538 * config/i386/avx512bf16vlintrin.h
539 (_mm_avx512_castsi128_ps): New.
540 (_mm256_avx512_castsi256_ps): Ditto.
541 (_mm_avx512_slli_epi32): Ditto.
542 (_mm256_avx512_slli_epi32): Ditto.
543 (_mm_avx512_cvtepi16_epi32): Ditto.
544 (_mm256_avx512_cvtepi16_epi32): Ditto.
545 (__attribute__): Change intrin call.
546 * config/i386/avx512bwintrin.h
547 (_mm_avx512_set_epi32): New.
548 (_mm_avx512_set_epi16): Ditto.
549 (_mm_avx512_set_epi8): Ditto.
550 (__attribute__): Change intrin call.
551 * config/i386/avx512fp16intrin.h: Ditto.
552 * config/i386/avx512fp16vlintrin.h
553 (_mm_avx512_set1_ps): New.
554 (_mm256_avx512_set1_ps): Ditto.
555 (_mm_avx512_and_si128): Ditto.
556 (_mm256_avx512_and_si256): Ditto.
557 (__attribute__): Change intrin call.
558 * config/i386/avx512vlbwintrin.h
559 (_mm_avx512_set1_epi32): New.
560 (_mm_avx512_set1_epi16): Ditto.
561 (_mm_avx512_set1_epi8): Ditto.
562 (_mm256_avx512_set_epi16): Ditto.
563 (_mm256_avx512_set_epi8): Ditto.
564 (_mm256_avx512_set1_epi16): Ditto.
565 (_mm256_avx512_set1_epi32): Ditto.
566 (_mm256_avx512_set1_epi8): Ditto.
567 (_mm_avx512_max_epi16): Ditto.
568 (_mm_avx512_min_epi16): Ditto.
569 (_mm_avx512_max_epu16): Ditto.
570 (_mm_avx512_min_epu16): Ditto.
571 (_mm_avx512_max_epi8): Ditto.
572 (_mm_avx512_min_epi8): Ditto.
573 (_mm_avx512_max_epu8): Ditto.
574 (_mm_avx512_min_epu8): Ditto.
575 (_mm256_avx512_max_epi16): Ditto.
576 (_mm256_avx512_min_epi16): Ditto.
577 (_mm256_avx512_max_epu16): Ditto.
578 (_mm256_avx512_min_epu16): Ditto.
579 (_mm256_avx512_insertf128_ps): Ditto.
580 (_mm256_avx512_extractf128_pd): Ditto.
581 (_mm256_avx512_extracti128_si256): Ditto.
582 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
583 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
584 (_MM256_AVX512_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
585 (_MM256_AVX512_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
586 (__attribute__): Change intrin call.
588 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
590 * config/i386/avx512bf16vlintrin.h: Change intrin call.
591 * config/i386/avx512fintrin.h
592 (_mm_avx512_undefined_ps): New.
593 (_mm_avx512_undefined_pd): Ditto.
594 (__attribute__): Change intrin call.
595 * config/i386/avx512vbmivlintrin.h: Ditto.
596 * config/i386/avx512vlbwintrin.h: Ditto.
597 * config/i386/avx512vldqintrin.h: Ditto.
598 * config/i386/avx512vlintrin.h
599 (_mm_avx512_undefined_si128): New.
600 (_mm256_avx512_undefined_ps): Ditto.
601 (_mm256_avx512_undefined_pd): Ditto.
602 (_mm256_avx512_undefined_si256): Ditto.
603 (__attribute__): Change intrin call.
605 2023-11-06 Haochen Jiang <haochen.jiang@intel.com>
607 * config/i386/avx512bitalgvlintrin.h: Change intrin call.
608 * config/i386/avx512dqintrin.h: Ditto.
609 * config/i386/avx512fintrin.h:
610 (_mm_avx512_setzero_ps): New.
611 (_mm_avx512_setzero_pd): Ditto.
612 (__attribute__): Change intrin call.
613 * config/i386/avx512fp16intrin.h: Ditto.
614 * config/i386/avx512fp16vlintrin.h: Ditto.
615 * config/i386/avx512vbmi2vlintrin.h: Ditto.
616 * config/i386/avx512vbmivlintrin.h: Ditto.
617 * config/i386/avx512vlbwintrin.h: Ditto.
618 * config/i386/avx512vldqintrin.h: Ditto.
619 * config/i386/avx512vlintrin.h
620 (_mm_avx512_setzero_si128): New.
621 (_mm256_avx512_setzero_pd): Ditto.
622 (_mm256_avx512_setzero_ps): Ditto.
623 (_mm256_avx512_setzero_si256): Ditto.
624 (__attribute__): Change intrin call.
625 * config/i386/avx512vpopcntdqvlintrin.h: Ditto.
626 * config/i386/gfniintrin.h: Ditto.
628 2023-11-05 Uros Bizjak <ubizjak@gmail.com>
630 * config/i386/i386.h (enum reg_class): Add LEGACY_INDEX_REGS.
631 Rename LEGACY_REGS to LEGACY_GENERAL_REGS.
632 (REG_CLASS_NAMES): Ditto.
633 (REG_CLASS_CONTENTS): Ditto.
634 * config/i386/constraints.md ("R"): Update for rename.
636 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
638 * mode-switching.cc: Remove unused forward references.
639 (seginfo): Remove bbnum.
640 (new_seginfo): Remove associated argument.
641 (optimize_mode_switching): Update calls accordingly.
643 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
645 * read-rtl.cc (read_rtx_operand): Avoid spinning endlessly for
646 invalid [...] operands.
648 2023-11-05 Richard Sandiford <richard.sandiford@arm.com>
651 * config/aarch64/aarch64.cc (aarch64_modes_compatible_p): New
652 function, with the core logic extracted from...
653 (aarch64_can_change_mode_class): ...here. Extend the previous rules
654 to allow changes between partial SVE modes and other modes if
655 the other mode is no bigger than an element, and if no other rule
656 prevents it. Use the aarch64_modes_tieable_p handling of
657 partial Advanced SIMD structure modes.
658 (aarch64_modes_tieable_p): Use aarch64_modes_compatible_p.
659 Allow all vector mode ties that it allows.
661 2023-11-05 Pan Li <pan2.li@intel.com>
663 * config/riscv/autovec.md: Remove the size check of lrint.
664 * config/riscv/riscv-v.cc (emit_vec_narrow_cvt_x_f): New help
666 (emit_vec_widden_cvt_x_f): New help emit func impl.
667 (emit_vec_rounding_to_integer): New func impl to emit the
668 rounding from FP to integer.
669 (expand_vec_lrint): Leverage emit_vec_rounding_to_integer.
670 * config/riscv/vector.md: Take V_VLSF for vfncvt.
672 2023-11-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
674 * config/riscv/vector.md: Fix bug.
676 2023-11-04 Sergei Trofimovich <siarheit@google.com>
679 * gcc-urlifier.cc (get_url_suffix_for_quoted_text): Mark as
682 2023-11-04 Pan Li <pan2.li@intel.com>
684 * config/riscv/vector-iterators.md: Remove HF modes.
686 2023-11-04 David Malcolm <dmalcolm@redhat.com>
688 * diagnostic.cc: Include "pretty-print-urlifier.h".
689 (diagnostic_context::initialize): Initialize m_urlifier.
690 (diagnostic_context::finish): Clean up m_urlifier
691 (diagnostic_report::diagnostic): m_urlifier to pp_format.
692 * diagnostic.h (diagnostic_context::m_urlifier): New field.
693 * gcc-urlifier.cc: New file.
694 * gcc-urlifier.def: New file.
695 * gcc-urlifier.h: New file.
696 * gcc.cc: Include "gcc-urlifier.h".
697 (driver::global_initializations): Initialize global_dc->m_urlifier.
698 * pretty-print-urlifier.h: New file.
699 * pretty-print.cc: Include "pretty-print-urlifier.h".
700 (obstack_append_string): New.
701 (urlify_quoted_string): New.
702 (pp_format): Add "urlifier" param and use it to implement optional
703 urlification of quoted text strings.
704 (pp_output_formatted_text): Make buffer a const pointer.
705 (selftest::pp_printf_with_urlifier): New.
706 (selftest::test_urlification): New.
707 (selftest::pretty_print_cc_tests): Call it.
708 * pretty-print.h (class urlifier): New forward declaration.
709 (pp_format): Add optional urlifier param.
710 * selftest-run-tests.cc (selftest::run_tests): Call
711 selftest::gcc_urlifier_cc_tests .
712 * selftest.h (selftest::gcc_urlifier_cc_tests): New decl.
713 * toplev.cc: Include "gcc-urlifier.h".
714 (general_init): Initialize global_dc->m_urlifier.
716 2023-11-04 David Malcolm <dmalcolm@redhat.com>
718 * Makefile.in (GCC_OBJS): Add gcc-urlifier.o.
721 2023-11-04 David Malcolm <dmalcolm@redhat.com>
723 * common.opt (fdiagnostics-text-art-charset=): Remove refererence
724 to diagnostic-text-art.h.
725 * coretypes.h (struct diagnostic_context): Replace forward decl
727 (class diagnostic_context): ...this.
728 * diagnostic-format-json.cc: Update for changes to
730 * diagnostic-format-sarif.cc: Likewise.
731 * diagnostic-show-locus.cc: Likewise.
732 * diagnostic-text-art.h: Deleted file, moving content...
733 (enum diagnostic_text_art_charset): ...to diagnostic.h,
734 (DIAGNOSTICS_TEXT_ART_CHARSET_DEFAULT): ...deleting,
735 (diagnostics_text_art_charset_init): ...deleting in favor of
736 diagnostic_context::set_text_art_charset.
737 * diagnostic.cc: Remove include of "diagnostic-text-art.h".
738 (pedantic_warning_kind): Update for field renaming.
739 (permissive_error_kind): Likewise.
740 (permissive_error_option): Likewise.
741 (diagnostic_initialize): Convert to...
742 (diagnostic_context::initialize): ...this, updating for field
744 (diagnostic_color_init): Convert to...
745 (diagnostic_context::color_init): ...this.
746 (diagnostic_urls_init): Convert to...
747 (diagnostic_context::urls_init): ...this.
748 (diagnostic_initialize_input_context): Convert to...
749 (diagnostic_context::initialize_input_context): ...this.
750 (diagnostic_finish): Convert to...
751 (diagnostic_context::finish): ...this, updating for field
753 (diagnostic_context::set_output_format): New.
754 (diagnostic_context::set_client_data_hooks): New.
755 (diagnostic_context::create_edit_context): New.
756 (diagnostic_converted_column): Convert to...
757 (diagnostic_context::converted_column): ...this.
758 (diagnostic_get_location_text): Update for field renaming.
759 (diagnostic_check_max_errors): Convert to...
760 (diagnostic_context::check_max_errors): ...this, updating for
762 (diagnostic_action_after_output): Convert to...
763 (diagnostic_context::action_after_output): ...this, updating for
765 (last_module_changed_p): Delete.
766 (set_last_module): Delete.
767 (includes_seen): Convert to...
768 (diagnostic_context::includes_seen_p): ...this, updating for field
770 (diagnostic_report_current_module): Convert to...
771 (diagnostic_context::report_current_module): ...this, updating for
772 field renamings, and replacing uses of last_module_changed_p and
773 set_last_module to simple field accesses.
774 (diagnostic_show_any_path): Convert to...
775 (diagnostic_context::show_any_path): ...this.
776 (diagnostic_classify_diagnostic): Convert to...
777 (diagnostic_context::classify_diagnostic): ...this, updating for
779 (diagnostic_push_diagnostics): Convert to...
780 (diagnostic_context::push_diagnostics): ...this, updating for field
782 (diagnostic_pop_diagnostics): Convert to...
783 (diagnostic_context::pop_diagnostics): ...this, updating for field
785 (get_any_inlining_info): Convert to...
786 (diagnostic_context::get_any_inlining_info): ...this, updating for
788 (update_effective_level_from_pragmas): Convert to...
789 (diagnostic_context::update_effective_level_from_pragmas):
790 ...this, updating for field renamings.
791 (print_any_cwe): Convert to...
792 (diagnostic_context::print_any_cwe): ...this.
793 (print_any_rules): Convert to...
794 (diagnostic_context::print_any_rules): ...this.
795 (print_option_information): Convert to...
796 (diagnostic_context::print_option_information): ...this, updating
798 (diagnostic_enabled): Convert to...
799 (diagnostic_context::diagnostic_enabled): ...this, updating for
801 (warning_enabled_at): Convert to...
802 (diagnostic_context::warning_enabled_at): ...this.
803 (diagnostic_report_diagnostic): Convert to...
804 (diagnostic_context::report_diagnostic): ...this, updating for
805 field renamings and conversions to member functions.
806 (diagnostic_append_note): Update for field renaming.
807 (diagnostic_impl): Use diagnostic_context::report_diagnostic
809 (diagnostic_n_impl): Likewise.
810 (diagnostic_emit_diagram): Convert to...
811 (diagnostic_context::emit_diagram): ...this, updating for field
813 (error_recursion): Convert to...
814 (diagnostic_context::error_recursion): ...this.
815 (diagnostic_text_output_format::~diagnostic_text_output_format):
817 (diagnostics_text_art_charset_init): Convert to...
818 (diagnostic_context::set_text_art_charset): ...this.
819 (assert_location_text): Update for field renamings.
820 * diagnostic.h (enum diagnostic_text_art_charset): Move here from
821 diagnostic-text-art.h.
822 (struct diagnostic_context): Convert to...
823 (class diagnostic_context): ...this.
824 (diagnostic_context::ice_handler_callback_t): New typedef.
825 (diagnostic_context::set_locations_callback_t): New typedef.
826 (diagnostic_context::initialize): New decl.
827 (diagnostic_context::color_init): New decl.
828 (diagnostic_context::urls_init): New decl.
829 (diagnostic_context::file_cache_init): New decl.
830 (diagnostic_context::finish): New decl.
831 (diagnostic_context::set_set_locations_callback): New.
832 (diagnostic_context::initialize_input_context): New decl.
833 (diagnostic_context::warning_enabled_at): New decl.
834 (diagnostic_context::option_unspecified_p): New.
835 (diagnostic_context::report_diagnostic): New decl.
836 (diagnostic_context::report_current_module): New decl.
837 (diagnostic_context::check_max_errors): New decl.
838 (diagnostic_context::action_after_output): New decl.
839 (diagnostic_context::classify_diagnostic): New decl.
840 (diagnostic_context::push_diagnostics): New decl.
841 (diagnostic_context::pop_diagnostics): New decl.
842 (diagnostic_context::emit_diagram): New decl.
843 (diagnostic_context::set_output_format): New decl.
844 (diagnostic_context::set_text_art_charset): New decl.
845 (diagnostic_context::set_client_data_hooks): New decl.
846 (diagnostic_context::create_edit_context): New decl.
847 (diagnostic_context::set_warning_as_error_requested): New.
848 (diagnostic_context::set_report_bug): New.
849 (diagnostic_context::set_extra_output_kind): New.
850 (diagnostic_context::set_show_cwe): New.
851 (diagnostic_context::set_show_rules): New.
852 (diagnostic_context::set_path_format): New.
853 (diagnostic_context::set_show_path_depths): New.
854 (diagnostic_context::set_show_option_requested): New.
855 (diagnostic_context::set_max_errors): New.
856 (diagnostic_context::set_escape_format): New.
857 (diagnostic_context::set_ice_handler_callback): New.
858 (diagnostic_context::warning_as_error_requested_p): New.
859 (diagnostic_context::show_path_depths_p): New.
860 (diagnostic_context::get_path_format): New.
861 (diagnostic_context::get_escape_format): New.
862 (diagnostic_context::get_file_cache): New.
863 (diagnostic_context::get_edit_context): New.
864 (diagnostic_context::get_client_data_hooks): New.
865 (diagnostic_context::get_diagram_theme): New.
866 (diagnostic_context::converted_column): New decl.
867 (diagnostic_context::diagnostic_count): New.
868 (diagnostic_context::includes_seen_p): New decl.
869 (diagnostic_context::print_any_cwe): New decl.
870 (diagnostic_context::print_any_rules): New decl.
871 (diagnostic_context::print_option_information): New decl.
872 (diagnostic_context::show_any_path): New decl.
873 (diagnostic_context::error_recursion): New decl.
874 (diagnostic_context::diagnostic_enabled): New decl.
875 (diagnostic_context::get_any_inlining_info): New decl.
876 (diagnostic_context::update_effective_level_from_pragmas): New
878 (diagnostic_context::m_file_cache): Make private.
879 (diagnostic_context::diagnostic_count): Rename to...
880 (diagnostic_context::m_diagnostic_count): ...this and make
882 (diagnostic_context::warning_as_error_requested): Rename to...
883 (diagnostic_context::m_warning_as_error_requested): ...this and
885 (diagnostic_context::n_opts): Rename to...
886 (diagnostic_context::m_n_opts): ...this and make private.
887 (diagnostic_context::classify_diagnostic): Rename to...
888 (diagnostic_context::m_classify_diagnostic): ...this and make
890 (diagnostic_context::classification_history): Rename to...
891 (diagnostic_context::m_classification_history): ...this and make
893 (diagnostic_context::n_classification_history): Rename to...
894 (diagnostic_context::m_n_classification_history): ...this and make
896 (diagnostic_context::push_list): Rename to...
897 (diagnostic_context::m_push_list): ...this and make private.
898 (diagnostic_context::n_push): Rename to...
899 (diagnostic_context::m_n_push): ...this and make private.
900 (diagnostic_context::show_cwe): Rename to...
901 (diagnostic_context::m_show_cwe): ...this and make private.
902 (diagnostic_context::show_rules): Rename to...
903 (diagnostic_context::m_show_rules): ...this and make private.
904 (diagnostic_context::path_format): Rename to...
905 (diagnostic_context::m_path_format): ...this and make private.
906 (diagnostic_context::show_path_depths): Rename to...
907 (diagnostic_context::m_show_path_depths): ...this and make
909 (diagnostic_context::show_option_requested): Rename to...
910 (diagnostic_context::m_show_option_requested): ...this and make
912 (diagnostic_context::abort_on_error): Rename to...
913 (diagnostic_context::m_abort_on_error): ...this.
914 (diagnostic_context::show_column): Rename to...
915 (diagnostic_context::m_show_column): ...this.
916 (diagnostic_context::pedantic_errors): Rename to...
917 (diagnostic_context::m_pedantic_errors): ...this.
918 (diagnostic_context::permissive): Rename to...
919 (diagnostic_context::m_permissive): ...this.
920 (diagnostic_context::opt_permissive): Rename to...
921 (diagnostic_context::m_opt_permissive): ...this.
922 (diagnostic_context::fatal_errors): Rename to...
923 (diagnostic_context::m_fatal_errors): ...this.
924 (diagnostic_context::dc_inhibit_warnings): Rename to...
925 (diagnostic_context::m_inhibit_warnings): ...this.
926 (diagnostic_context::dc_warn_system_headers): Rename to...
927 (diagnostic_context::m_warn_system_headers): ...this.
928 (diagnostic_context::max_errors): Rename to...
929 (diagnostic_context::m_max_errors): ...this and make private.
930 (diagnostic_context::internal_error): Rename to...
931 (diagnostic_context::m_internal_error): ...this.
932 (diagnostic_context::option_enabled): Rename to...
933 (diagnostic_context::m_option_enabled): ...this.
934 (diagnostic_context::option_state): Rename to...
935 (diagnostic_context::m_option_state): ...this.
936 (diagnostic_context::option_name): Rename to...
937 (diagnostic_context::m_option_name): ...this.
938 (diagnostic_context::get_option_url): Rename to...
939 (diagnostic_context::m_get_option_url): ...this.
940 (diagnostic_context::print_path): Rename to...
941 (diagnostic_context::m_print_path): ...this.
942 (diagnostic_context::make_json_for_path): Rename to...
943 (diagnostic_context::m_make_json_for_path): ...this.
944 (diagnostic_context::x_data): Rename to...
945 (diagnostic_context::m_client_aux_data): ...this.
946 (diagnostic_context::last_location): Rename to...
947 (diagnostic_context::m_last_location): ...this.
948 (diagnostic_context::last_module): Rename to...
949 (diagnostic_context::m_last_module): ...this and make private.
950 (diagnostic_context::lock): Rename to...
951 (diagnostic_context::m_lock): ...this and make private.
952 (diagnostic_context::lang_mask): Rename to...
953 (diagnostic_context::m_lang_mask): ...this.
954 (diagnostic_context::inhibit_notes_p): Rename to...
955 (diagnostic_context::m_inhibit_notes_p): ...this.
956 (diagnostic_context::report_bug): Rename to...
957 (diagnostic_context::m_report_bug): ...this and make private.
958 (diagnostic_context::extra_output_kind): Rename to...
959 (diagnostic_context::m_extra_output_kind): ...this and make
961 (diagnostic_context::column_unit): Rename to...
962 (diagnostic_context::m_column_unit): ...this and make private.
963 (diagnostic_context::column_origin): Rename to...
964 (diagnostic_context::m_column_origin): ...this and make private.
965 (diagnostic_context::tabstop): Rename to...
966 (diagnostic_context::m_tabstop): ...this and make private.
967 (diagnostic_context::escape_format): Rename to...
968 (diagnostic_context::m_escape_format): ...this and make private.
969 (diagnostic_context::edit_context_ptr): Rename to...
970 (diagnostic_context::m_edit_context_ptr): ...this and make
972 (diagnostic_context::set_locations_cb): Rename to...
973 (diagnostic_context::m_set_locations_cb): ...this and make
975 (diagnostic_context::ice_handler_cb): Rename to...
976 (diagnostic_context::m_ice_handler_cb): ...this and make private.
977 (diagnostic_context::includes_seen): Rename to...
978 (diagnostic_context::m_includes_seen): ...this and make private.
979 (diagnostic_inhibit_notes): Update for field renaming.
980 (diagnostic_context_auxiliary_data): Likewise.
981 (diagnostic_abort_on_error): Convert from macro to inline function
982 and update for field renaming.
983 (diagnostic_kind_count): Convert from macro to inline function and
984 use diagnostic_count accessor.
985 (diagnostic_report_warnings_p): Update for field renaming.
986 (diagnostic_initialize): Convert decl to inline function calling
987 into diagnostic_context.
988 (diagnostic_color_init): Likewise.
989 (diagnostic_urls_init): Likewise.
990 (diagnostic_urls_init): Likewise.
991 (diagnostic_finish): Likewise.
992 (diagnostic_report_current_module): Likewise.
993 (diagnostic_show_any_path): Delete decl.
994 (diagnostic_initialize_input_context): Convert decl to inline
995 function calling into diagnostic_context.
996 (diagnostic_classify_diagnostic): Likewise.
997 (diagnostic_push_diagnostics): Likewise.
998 (diagnostic_pop_diagnostics): Likewise.
999 (diagnostic_report_diagnostic): Likewise.
1000 (diagnostic_action_after_output): Likewise.
1001 (diagnostic_check_max_errors): Likewise.
1002 (diagnostic_file_cache_fini): Delete decl.
1003 (diagnostic_converted_column): Delete decl.
1004 (warning_enabled_at): Convert decl to inline function calling into
1006 (option_unspecified_p): New.
1007 (diagnostic_emit_diagram): Delete decl.
1008 * gcc.cc: Remove include of "diagnostic-text-art.h".
1009 Update for changes to diagnostic_context.
1010 * input.cc (diagnostic_file_cache_init): Move implementation
1012 (diagnostic_context::file_cache_init): ...this new member
1014 (diagnostic_file_cache_fini): Delete.
1015 (diagnostics_file_cache_forcibly_evict_file): Update for
1016 m_file_cache becoming private.
1017 (location_get_source_line): Likewise.
1018 (get_source_file_content): Likewise.
1019 (location_missing_trailing_newline): Likewise.
1020 * input.h (diagnostics_file_cache_fini): Delete.
1021 * langhooks.cc: Update for changes to diagnostic_context.
1022 * lto-wrapper.cc: Likewise.
1023 * opts.cc: Remove include of "diagnostic-text-art.h".
1024 Update for changes to diagnostic_context.
1025 * selftest-diagnostic.cc: Update for changes to
1027 * toplev.cc: Likewise.
1028 * tree-diagnostic-path.cc: Likewise.
1029 * tree-diagnostic.cc: Likewise.
1031 2023-11-03 Martin Uecker <uecker@tugraz.at>
1034 * gimple-ssa-warn-access.cc
1035 (pass_waccess::maybe_check_access_sizes): For VLA bounds
1036 in parameters, only warn about null pointers with 'static'.
1038 2023-11-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
1040 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Allow unmasked
1041 calls to use masked simdclones.
1043 2023-11-03 David Malcolm <dmalcolm@redhat.com>
1045 * diagnostic.cc (diagnostic_initialize): Update for consolidation
1046 of group-based fields.
1047 (diagnostic_report_diagnostic): Likewise.
1048 (diagnostic_context::begin_group): New, based on body of
1049 auto_diagnostic_group's ctor.
1050 (diagnostic_context::end_group): New, based on body of
1051 auto_diagnostic_group's dtor.
1052 (auto_diagnostic_group::auto_diagnostic_group): Convert to a call
1054 (auto_diagnostic_group::~auto_diagnostic_group): Convert to a call
1056 * diagnostic.h (diagnostic_context::begin_group): New decl.
1057 (diagnostic_context::end_group): New decl.
1058 (diagnostic_context::diagnostic_group_nesting_depth): Rename to...
1059 (diagnostic_context::m_diagnostic_groups.m_nesting_depth):
1061 (diagnostic_context::diagnostic_group_emission_count): Rename
1063 (diagnostic_context::m_diagnostic_groups::m_emission_count):
1066 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
1068 PR tree-optimization/111766
1069 * range-op.cc (operator_equal::fold_range): Check constants
1070 against the bitmask.
1071 (operator_not_equal::fold_range): Ditto.
1072 * value-range.h (irange_bitmask::member_p): New.
1074 2023-11-03 Andrew MacLeod <amacleod@redhat.com>
1076 * value-range.cc (irange_bitmask::adjust_range): New.
1077 (irange::intersect_bitmask): Call adjust_range.
1078 * value-range.h (irange_bitmask::adjust_range): New prototype.
1080 2023-11-03 Uros Bizjak <ubizjak@gmail.com>
1082 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
1084 (ix86_memory_address_reg_class): ... this. Generalize address
1085 register class handling to allow multiple address register classes.
1086 Return maximal class for unrecognized instructions. Improve comments.
1087 (ix86_insn_base_reg_class): Rewrite to handle
1088 multiple address register classes.
1089 (ix86_regno_ok_for_insn_base_p): Ditto.
1090 (ix86_insn_index_reg_class): Ditto.
1091 * config/i386/i386.md: Rename "gpr32" attribute to "addr"
1092 and substitute its values with "0" -> "gpr16", "1" -> "*".
1093 (addr): New attribute to limit allowed address register set.
1095 * config/i386/mmx.md: Rename "gpr32" attribute to "addr"
1096 and substitute its values with "0" -> "gpr16", "1" -> "*".
1097 * config/i386/sse.md: Ditto.
1099 2023-11-03 Richard Biener <rguenther@suse.de>
1101 * tree-vect-loop.cc (vectorizable_live_operation): Simplify
1104 2023-11-03 Roger Sayle <roger@nextmovesoftware.com>
1106 * config/arc/arc.md (addsi3): Fix GNU-style code formatting.
1107 (adddi3): Change define_expand to generate a *adddi3.
1108 (*adddi3): New define_insn_and_split to lower DImode additions
1109 during the split1 pass (after combine and before reload).
1110 (ashldi3): New define_expand to (only) generate *ashldi3_cnt1
1111 for DImode left shifts by a single bit.
1112 (*ashldi3_cnt1): New define_insn_and_split to lower DImode
1113 left shifts by one bit to an *adddi3.
1115 2023-11-03 Richard Sandiford <richard.sandiford@arm.com>
1117 * config/aarch64/aarch64.md (*cmov_uxtw_insn_insv): Remove
1118 can_create_pseudo_p condition.
1120 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1122 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for dummy mask -1.
1123 * tree-vect-stmts.cc (vectorizable_load): Ditto.
1125 2023-11-03 Richard Biener <rguenther@suse.de>
1127 PR tree-optimization/112366
1128 * tree-vect-loop.cc (vectorizable_live_operation): Remove
1131 2023-11-03 Richard Biener <rguenther@suse.de>
1133 PR tree-optimization/112310
1134 * tree-ssa-pre.cc (do_hoist_insertion): Keep the union
1135 of expressions, validate dependences are contained within
1136 the hoistable set before hoisting.
1138 2023-11-03 Pan Li <pan2.li@intel.com>
1140 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
1141 (lround<mode><v_i_l_ll_convert>2): Ditto.
1142 (lceil<mode><v_i_l_ll_convert>2): Ditto.
1143 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
1144 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
1146 (lround<mode><v_f2si_convert>2): Ditto.
1147 (lceil<mode><v_f2si_convert>2): Ditto.
1148 (lfloor<mode><v_f2si_convert>2): Ditto.
1149 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
1151 (lround<mode><v_f2di_convert>2): Ditto.
1152 (lceil<mode><v_f2di_convert>2): Ditto.
1153 (lfloor<mode><v_f2di_convert>2): Ditto.
1154 * config/riscv/vector-iterators.md: Renew iterators for both
1157 2023-11-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1160 * config/riscv/riscv-avlprop.cc (get_insn_vtype_mode): New function.
1161 (simplify_replace_vlmax_avl): Ditto.
1162 (pass_avlprop::execute): Add immediate AVL simplification.
1163 * config/riscv/riscv-protos.h (imm_avl_p): Rename.
1164 * config/riscv/riscv-v.cc (const_vlmax_p): Ditto.
1166 (emit_vlmax_insn): Adapt for new interface name.
1167 * config/riscv/vector.md (mode_idx): New attribute.
1169 2023-11-03 Pan Li <pan2.li@intel.com>
1172 2023-11-02 Pan Li <pan2.li@intel.com>
1174 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
1175 (lround<mode><v_i_l_ll_convert>2): Ditto.
1176 (lceil<mode><v_i_l_ll_convert>2): Ditto.
1177 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
1178 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
1180 (lround<mode><v_f2si_convert>2): Ditto.
1181 (lceil<mode><v_f2si_convert>2): Ditto.
1182 (lfloor<mode><v_f2si_convert>2): Ditto.
1183 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
1185 (lround<mode><v_f2di_convert>2): Ditto.
1186 (lceil<mode><v_f2di_convert>2): Ditto.
1187 (lfloor<mode><v_f2di_convert>2): Ditto.
1188 * config/riscv/vector-iterators.md: Renew iterators for both
1191 2023-11-02 Edwin Lu <ewlu@rivosinc.com>
1193 * config/riscv/riscv.cc (riscv_sched_variable_issue): add disabled assert
1195 2023-11-02 Jeff Law <jlaw@ventanamicro.com>
1197 * config/h8300/combiner.md: Add new patterns for single bit
1200 2023-11-02 Pan Li <pan2.li@intel.com>
1202 * config/riscv/autovec.md (lrint<mode><v_i_l_ll_convert>2): Remove.
1203 (lround<mode><v_i_l_ll_convert>2): Ditto.
1204 (lceil<mode><v_i_l_ll_convert>2): Ditto.
1205 (lfloor<mode><v_i_l_ll_convert>2): Ditto.
1206 (lrint<mode><v_f2si_convert>2): New pattern for cvt from
1208 (lround<mode><v_f2si_convert>2): Ditto.
1209 (lceil<mode><v_f2si_convert>2): Ditto.
1210 (lfloor<mode><v_f2si_convert>2): Ditto.
1211 (lrint<mode><v_f2di_convert>2): New pattern for cvt from
1213 (lround<mode><v_f2di_convert>2): Ditto.
1214 (lceil<mode><v_f2di_convert>2): Ditto.
1215 (lfloor<mode><v_f2di_convert>2): Ditto.
1216 * config/riscv/vector-iterators.md: Renew iterators for both
1219 2023-11-02 Sam James <sam@gentoo.org>
1221 * doc/passes.texi (Dead code elimination): Explicitly say 'lifetime'
1222 as this has become the standard term for what we're doing here.
1224 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1226 * config/riscv/riscv-avlprop.cc
1227 (pass_avlprop::get_vlmax_ta_preferred_avl): Don't allow
1228 non-real insn AVL propation.
1230 2023-11-02 Robin Dapp <rdapp@ventanamicro.com>
1232 PR middle-end/111401
1233 * internal-fn.cc (internal_fn_else_index): New function.
1234 * internal-fn.h (internal_fn_else_index): Define.
1235 * tree-if-conv.cc (convert_scalar_cond_reduction): Emit COND_OP
1237 (predicate_scalar_phi): Add whitespace.
1238 * tree-vect-loop.cc (fold_left_reduction_fn): Add IFN_COND_OP.
1239 (neutral_op_for_reduction): Return -0 for PLUS.
1240 (check_reduction_path): Don't count else operand in COND_OP.
1241 (vect_is_simple_reduction): Ditto.
1242 (vect_create_epilog_for_reduction): Fix whitespace.
1243 (vectorize_fold_left_reduction): Add COND_OP handling.
1244 (vectorizable_reduction): Don't count else operand in COND_OP.
1245 (vect_transform_reduction): Add COND_OP handling.
1246 * tree-vectorizer.h (neutral_op_for_reduction): Add default
1249 2023-11-02 Richard Biener <rguenther@suse.de>
1251 PR tree-optimization/112320
1252 * gimple-fold.h (rewrite_to_defined_overflow): New overload
1253 for in-place operation.
1254 * gimple-fold.cc (rewrite_to_defined_overflow): Add stmt
1255 iterator argument to worker, define separate API for
1256 in-place and not in-place operation.
1257 * tree-if-conv.cc (predicate_statements): Simplify.
1258 * tree-scalar-evolution.cc (final_value_replacement_loop):
1260 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute): Adjust.
1261 * tree-ssa-reassoc.cc (update_range_test): Likewise.
1263 2023-11-02 Uros Bizjak <ubizjak@gmail.com>
1265 * config/i386/i386.md: Move stack protector patterns
1266 above mov $0,%reg -> xor %reg,%reg peephole2 pattern.
1268 2023-11-02 liuhongt <hongtao.liu@intel.com>
1270 * config/i386/mmx.md (cmlav4hf4): New expander.
1271 (cmla_conjv4hf4): Ditto.
1273 (cmul_conjv4hf3): Ditto.
1275 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1277 * config/riscv/vector.md: Fix redundant codes in attributes.
1279 2023-11-02 xuli <xuli1@eswincomputing.com>
1281 * config/riscv/riscv-vector-builtins-bases.cc: Expand non-tuple intrinsics.
1282 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Define non-tuple intrinsics.
1283 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
1284 * config/riscv/riscv-vector-builtins.cc: Add arg types.
1286 2023-11-02 Pan Li <pan2.li@intel.com>
1288 * tree-vect-stmts.cc (vectorizable_internal_function): Add type
1289 size check for vectype_out doesn't participating for optab query.
1290 (vectorizable_call): Remove the type size check.
1292 2023-11-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1295 * config/riscv/vector.md: Add '0'.
1297 2023-11-01 Roger Sayle <roger@nextmovesoftware.com>
1300 * config/i386/i386.md (*bmi2_umul<mode><dwi>3_1): Tidy condition
1301 as operands[2] with predicate register_operand must be !MEM_P.
1302 (peephole2): Optimize a mulx followed by a register-to-register
1303 move, to place result in the correct destination if possible.
1305 2023-11-01 Patrick O'Neill <patrick@rivosinc.com>
1307 * config/riscv/sync.md: Use riscv_subword_address function to
1308 calculate the address and shift in atomic_test_and_set.
1310 2023-11-01 Vineet Gupta <vineetg@rivosinc.com>
1312 * config/riscv/riscv.cc (riscv_promote_function_mode): Fix mode
1313 returned for libcall case.
1315 2023-11-01 Martin Uecker <uecker@tugraz.at>
1318 * doc/invoke.texi: Document -Walloc-size option.
1320 2023-11-01 Edwin Lu <ewlu@rivosinc.com>
1322 * genautomata.cc (write_automata): move endif
1324 2023-11-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
1326 * omp-simd-clone.cc (simd_clone_adjust_return_type): Hoist out code to
1327 create return array and don't return new type.
1328 (simd_clone_adjust_argument_types): Hoist out code that creates
1329 ipa_param_body_adjustments and don't return them.
1330 (simd_clone_adjust): Call TARGET_SIMD_CLONE_ADJUST after return and
1331 argument types have been vectorized, create adjustments and return array
1333 (expand_simd_clones): Call TARGET_SIMD_CLONE_ADJUST after return and
1334 argument types have been vectorized.
1336 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
1339 * config/i386/i386.md (stack_protexct_set_2 peephole2):
1340 Use general_gr_operand as operand 4 predicate.
1342 2023-11-01 Uros Bizjak <ubizjak@gmail.com>
1344 * config/i386/i386.md (stack_protect_set): Explicitly
1345 generate scratch register in word mode.
1346 (@stack_protect_set_1_<mode>): Rename to ...
1347 (@stack_protect_set_1_<PTR:mode>_<SWI48:mode>): ... this.
1348 Use SWI48 mode iterator to match scratch register.
1349 (stack_protexct_set_1 peephole2): Use PTR, W and SWI48 mode
1350 iterators to match peephole sequence. Use general_operand
1351 predicate for operand 4. Allow different operand 2 and operand 3
1352 registers and use peep2_reg_dead_p to ensure new scratch
1353 register is dead before peephole seqeunce. Use peep2_reg_dead_p
1354 to ensure old scratch register is dead after peephole sequence.
1355 (*stack_protect_set_2_<mode>): Rename to ...
1356 (*stack_protect_set_2_<mode>_si): .. this.
1357 (*stack_protect_set_3): Rename to ...
1358 (*stack_protect_set_2_<mode>_di): ... this.
1359 Use PTR mode iterator to match stack protector memory move.
1360 Use earlyclobber for all alternatives of operand 1.
1361 (stack_protexct_set_2 peephole2): Use PTR, W and SWI48 mode
1362 iterators to match peephole sequence. Use general_operand
1363 predicate for operand 4. Allow different operand 2 and operand 3
1364 registers and use peep2_reg_dead_p to ensure new scratch
1365 register is dead before peephole seqeunce. Use peep2_reg_dead_p
1366 to ensure old scratch register is dead after peephole sequence.
1368 2023-11-01 xuli <xuli1@eswincomputing.com>
1370 * config/riscv/riscv-vector-builtins-functions.def (vundefined): Add vundefine
1371 intrinsics for tuple types.
1372 * config/riscv/riscv-vector-builtins.cc: Ditto.
1373 * config/riscv/vector.md (@vundefined<mode>): Ditto.
1375 2023-11-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1377 * tree-vect-slp.cc (vect_build_slp_tree_1): Fix whitespace.
1379 2023-10-31 David Malcolm <dmalcolm@redhat.com>
1381 * Makefile.in (ANALYZER_OBJS): Add analyzer/record-layout.o.
1383 2023-10-31 David Malcolm <dmalcolm@redhat.com>
1385 * input.cc (dump_location_info): Update for removal of
1386 MACRO_MAP_EXPANSION_POINT_LOCATION.
1387 * tree-diagnostic.cc (maybe_unwind_expanded_macro_loc):
1390 2023-10-31 David Malcolm <dmalcolm@redhat.com>
1392 * opts.cc (get_option_url): Update comment; the requirement to
1393 pass DOCUMENTATION_ROOT_URL's value via -D was removed in
1394 r10-8065-ge33a1eae25b8a8.
1396 2023-10-31 David Malcolm <dmalcolm@redhat.com>
1398 * pretty-print.cc (pretty_printer::pretty_printer): Initialize
1399 m_skipping_null_url.
1400 (pp_begin_url): Handle URL being null.
1401 (pp_end_url): Likewise.
1402 (selftest::test_null_urls): New.
1403 (selftest::pretty_print_cc_tests): Call it.
1404 * pretty-print.h (pretty_printer::m_skipping_null_url): New.
1406 2023-10-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1408 * tree-vect-slp.cc (vect_get_operand_map): Add MASK_LEN_GATHER_LOAD.
1409 (vect_build_slp_tree_1): Ditto.
1410 (vect_build_slp_tree_2): Ditto.
1412 2023-10-31 Cupertino Miranda <cupertino.miranda@oracle.com>
1414 * config/bpf/bpf-passes.def (pass_lower_bpf_core): Added pass.
1415 * config/bpf/bpf-protos.h: Added prototype for new pass.
1416 * config/bpf/bpf.cc (bpf_delegitimize_address): New function.
1417 * config/bpf/bpf.md (mov_reloc_core<MM:mode>): Prefixed
1419 * config/bpf/core-builtins.cc (cr_builtins) Added access_node to
1421 (is_attr_preserve_access): Improved check.
1422 (core_field_info): Make use of root_for_core_field_info
1424 (process_field_expr): Adapted to new functions.
1425 (pack_type): Small improvement.
1426 (bpf_handle_plugin_finish_type): Adapted to GTY(()).
1427 (bpf_init_core_builtins): Changed to new function names.
1428 (construct_builtin_core_reloc): Improved implementation.
1429 (bpf_resolve_overloaded_core_builtin): Changed how
1430 __builtin_preserve_access_index is converted.
1431 (compute_field_expr): Corrected implementation. Added
1432 access_node argument.
1433 (bpf_core_get_index): Added valid argument.
1434 (root_for_core_field_info, pack_field_expr)
1435 (core_expr_with_field_expr_plus_base, make_core_safe_access_index)
1436 (replace_core_access_index_comp_expr, maybe_get_base_for_field_expr)
1437 (core_access_clean, core_is_access_index, core_mark_as_access_index)
1438 (make_gimple_core_safe_access_index, execute_lower_bpf_core)
1439 (make_pass_lower_bpf_core): Added functions.
1440 (pass_data_lower_bpf_core): New pass struct.
1441 (pass_lower_bpf_core): New gimple_opt_pass class.
1442 (pack_field_expr_for_preserve_field)
1443 (bpf_replace_core_move_operands): Removed function.
1444 (bpf_enum_value_kind): Added GTY(()).
1445 * config/bpf/core-builtins.h (bpf_field_info_kind, bpf_type_id_kind)
1446 (bpf_type_info_kind, bpf_enum_value_kind): New enum.
1447 * config/bpf/t-bpf: Added pass bpf-passes.def to PASSES_EXTRA.
1449 2023-10-31 Neal Frager <neal.frager@amd.com>
1451 * config/microblaze/microblaze.cc: Fix mcpu version check.
1453 2023-10-31 Patrick O'Neill <patrick@rivosinc.com>
1455 * config/riscv/sync-rvwmo.md (atomic_load_rvwmo<mode>): Remove
1456 TARGET_ATOMIC constraint
1457 (atomic_store_rvwmo<mode>): Ditto.
1458 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Ditto.
1459 (atomic_store_ztso<mode>): Ditto.
1460 * config/riscv/sync.md (atomic_load<mode>): Ditto.
1461 (atomic_store<mode>): Ditto.
1463 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
1465 * config/riscv/riscv.cc (riscv_index_reg_class):
1466 Return GR_REGS for XTheadFMemIdx.
1467 (riscv_regno_ok_for_index_p): Add support for XTheadFMemIdx.
1468 * config/riscv/riscv.h (HARDFP_REG_P): New macro.
1469 * config/riscv/thead.cc (is_fmemidx_mode): New function.
1470 (th_memidx_classify_address_index): Add support for XTheadFMemIdx.
1471 (th_fmemidx_output_index): New function.
1472 (th_output_move): Add support for XTheadFMemIdx.
1473 * config/riscv/thead.md (TH_M_ANYF): New mode iterator.
1474 (TH_M_NOEXTF): Likewise.
1475 (*th_fmemidx_movsf_hardfloat): New INSN.
1476 (*th_fmemidx_movdf_hardfloat_rv64): Likewise.
1477 (*th_fmemidx_I_a): Likewise.
1478 (*th_fmemidx_I_c): Likewise.
1479 (*th_fmemidx_US_a): Likewise.
1480 (*th_fmemidx_US_c): Likewise.
1481 (*th_fmemidx_UZ_a): Likewise.
1482 (*th_fmemidx_UZ_c): Likewise.
1484 2023-10-31 Christoph Müllner <christoph.muellner@vrull.eu>
1486 * config/riscv/constraints.md (th_m_mia): New constraint.
1487 (th_m_mib): Likewise.
1488 (th_m_mir): Likewise.
1489 (th_m_miu): Likewise.
1490 * config/riscv/riscv-protos.h (enum riscv_address_type):
1491 Add new address types ADDRESS_REG_REG, ADDRESS_REG_UREG,
1492 and ADDRESS_REG_WB and their documentation.
1493 (struct riscv_address_info): Add new field 'shift' and
1494 document the field usage for the new address types.
1495 (riscv_valid_base_register_p): New prototype.
1496 (th_memidx_legitimate_modify_p): Likewise.
1497 (th_memidx_legitimate_index_p): Likewise.
1498 (th_classify_address): Likewise.
1499 (th_output_move): Likewise.
1500 (th_print_operand_address): Likewise.
1501 * config/riscv/riscv.cc (riscv_index_reg_class):
1502 Return GR_REGS for XTheadMemIdx.
1503 (riscv_regno_ok_for_index_p): Add support for XTheadMemIdx.
1504 (riscv_classify_address): Call th_classify_address() on top.
1505 (riscv_output_move): Call th_output_move() on top.
1506 (riscv_print_operand_address): Call th_print_operand_address()
1508 * config/riscv/riscv.h (HAVE_POST_MODIFY_DISP): New macro.
1509 (HAVE_PRE_MODIFY_DISP): Likewise.
1510 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2): Disable
1512 (*zero_extendqi<SUPERQI:mode>2_internal): Convert to expand,
1513 create INSN with same name and disable it for XTheadMemIdx.
1514 (extendsidi2): Likewise.
1515 (*extendsidi2_internal): Disable for XTheadMemIdx.
1516 * config/riscv/thead.cc (valid_signed_immediate): New helper
1518 (th_memidx_classify_address_modify): New function.
1519 (th_memidx_legitimate_modify_p): Likewise.
1520 (th_memidx_output_modify): Likewise.
1521 (is_memidx_mode): Likewise.
1522 (th_memidx_classify_address_index): Likewise.
1523 (th_memidx_legitimate_index_p): Likewise.
1524 (th_memidx_output_index): Likewise.
1525 (th_classify_address): Likewise.
1526 (th_output_move): Likewise.
1527 (th_print_operand_address): Likewise.
1528 * config/riscv/thead.md (*th_memidx_operand): New splitter.
1529 (*th_memidx_zero_extendqi<SUPERQI:mode>2): New INSN.
1530 (*th_memidx_extendsidi2): Likewise.
1531 (*th_memidx_zero_extendsidi2): Likewise.
1532 (*th_memidx_zero_extendhi<GPR:mode>2): Likewise.
1533 (*th_memidx_extend<SHORT:mode><SUPERQI:mode>2): Likewise.
1534 (*th_memidx_bb_zero_extendsidi2): Likewise.
1535 (*th_memidx_bb_zero_extendhi<GPR:mode>2): Likewise.
1536 (*th_memidx_bb_extendhi<GPR:mode>2): Likewise.
1537 (*th_memidx_bb_extendqi<SUPERQI:mode>2): Likewise.
1538 (TH_M_ANYI): New mode iterator.
1539 (TH_M_NOEXTI): Likewise.
1540 (*th_memidx_I_a): New combiner optimization.
1541 (*th_memidx_I_b): Likewise.
1542 (*th_memidx_I_c): Likewise.
1543 (*th_memidx_US_a): Likewise.
1544 (*th_memidx_US_b): Likewise.
1545 (*th_memidx_US_c): Likewise.
1546 (*th_memidx_UZ_a): Likewise.
1547 (*th_memidx_UZ_b): Likewise.
1548 (*th_memidx_UZ_c): Likewise.
1550 2023-10-31 Carl Love <cel@us.ibm.com>
1552 * doc/extend.texi (__builtin_bcdsub_le, __builtin_bcdsub_ge): Add
1553 documentation for the builti-ins.
1555 2023-10-31 Vladimir N. Makarov <vmakarov@redhat.com>
1557 PR rtl-optimization/111971
1558 * lra-constraints.cc: (process_alt_operands): Don't check start
1559 hard regs for regs originated from register variables.
1561 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
1563 * config/riscv/autovec.md (<ieee_fmaxmin_op><mode>3): fmax/fmin
1565 (cond_<ieee_fmaxmin_op><mode>): Ditto.
1566 (cond_len_<ieee_fmaxmin_op><mode>): Ditto.
1567 (reduc_fmax_scal_<mode>): Ditto.
1568 (reduc_fmin_scal_<mode>): Ditto.
1569 * config/riscv/riscv-v.cc (needs_fp_rounding): Add fmin/fmax.
1570 * config/riscv/vector-iterators.md (fmin): New UNSPEC.
1571 (UNSPEC_VFMIN): Ditto.
1572 * config/riscv/vector.md (@pred_<ieee_fmaxmin_op><mode>): Add
1573 UNSPEC insn patterns.
1574 (@pred_<ieee_fmaxmin_op><mode>_scalar): Ditto.
1576 2023-10-31 Robin Dapp <rdapp@ventanamicro.com>
1580 * Makefile.in: Handle split insn-emit.cc.
1581 * configure: Regenerate.
1582 * configure.ac: Add --with-insnemit-partitions.
1583 * genemit.cc (output_peephole2_scratches): Print to file instead
1585 (print_code): Ditto.
1586 (gen_rtx_scratch): Ditto.
1588 (gen_emit_seq): Ditto.
1589 (emit_c_code): Ditto.
1591 (gen_expand): Ditto.
1593 (output_add_clobbers): Ditto.
1594 (output_added_clobbers_hard_reg_p): Ditto.
1595 (print_overload_arguments): Ditto.
1596 (print_overload_test): Ditto.
1597 (handle_overloaded_code_for): Ditto.
1598 (handle_overloaded_gen): Ditto.
1599 (print_header): New function.
1600 (handle_arg): New function.
1601 (main): Split output into 10 files.
1602 * gensupport.cc (count_patterns): New function.
1603 * gensupport.h (count_patterns): Define.
1604 * read-md.cc (md_reader::print_md_ptr_loc): Add file argument.
1605 * read-md.h (class md_reader): Change definition.
1607 2023-10-31 Alexandre Oliva <oliva@adacore.com>
1609 PR tree-optimization/111943
1610 * gimple-harden-control-flow.cc: Adjust copyright year.
1611 (rt_bb_visited): Add vfalse and vtrue data members.
1612 Zero-initialize them in the ctor.
1613 (rt_bb_visited::insert_exit_check_on_edge): Upon encountering
1614 abnormal edges, insert initializers for vfalse and vtrue on
1615 entry, and insert the check sequence guarded by a conditional
1618 2023-10-31 Richard Biener <rguenther@suse.de>
1620 PR tree-optimization/112305
1621 * tree-scalar-evolution.h (expression_expensive): Adjust.
1622 * tree-scalar-evolution.cc (expression_expensive): Record
1623 when we see a COND_EXPR.
1624 (final_value_replacement_loop): When the replacement contains
1625 a COND_EXPR, rewrite it to defined overflow.
1626 * tree-ssa-loop-ivopts.cc (may_eliminate_iv): Adjust.
1628 2023-10-31 Xi Ruoyao <xry111@xry111.site>
1631 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0
1634 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
1636 * gimple-match.h (gimple_match_op::gimple_match_op):
1637 Add interfaces for more arguments.
1638 (gimple_match_op::set_op): Add interfaces for more arguments.
1639 * match.pd: Add support of combining cond_len_op + vec_cond
1641 2023-10-31 Haochen Jiang <haochen.jiang@intel.com>
1643 * config/i386/avx512cdintrin.h (target): Push evex512 for
1645 * config/i386/avx512vlintrin.h (target): Split avx512cdvl part
1647 * config/i386/i386-builtin.def (BDESC): Do not check evex512
1648 for builtins not needed.
1650 2023-10-31 Lehua Ding <lehua.ding@rivai.ai>
1652 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
1653 Change to define_expand.
1655 2023-10-31 liuhongt <hongtao.liu@intel.com>
1658 * config/i386/mmx.md (*mmx_pblendvb_v8qi_1): Change
1659 define_split to define_insn_and_split to handle
1660 immediate_operand for comparison.
1661 (*mmx_pblendvb_v8qi_2): Ditto.
1662 (*mmx_pblendvb_<mode>_1): Ditto.
1663 (*mmx_pblendvb_v4qi_2): Ditto.
1664 (<code><mode>3): Remove define_split after it.
1665 (<code>v8qi3): Ditto.
1666 (<code><mode>3): Ditto.
1667 (<ode>v2hi3): Ditto.
1669 2023-10-31 Andrew Pinski <pinskia@gmail.com>
1671 * match.pd (`a == 1 ? b : a OP b`): New pattern.
1672 (`a == -1 ? b : a & b`): New pattern.
1674 2023-10-31 Andrew Pinski <pinskia@gmail.com>
1676 * match.pd: (`a == 0 ? b : b + a`,
1677 `a == 0 ? b : b - a`): New patterns.
1679 2023-10-31 Neal Frager <neal.frager@amd.com>
1681 * config/microblaze/microblaze.cc: Fix mcpu version check.
1683 2023-10-30 Mayshao <mayshao-oc@zhaoxin.com>
1685 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize yongfeng.
1686 * common/config/i386/i386-common.cc: Add yongfeng.
1687 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
1688 Add ZHAOXIN_FAM7H_YONGFENG.
1689 * config.gcc: Add yongfeng.
1690 * config/i386/driver-i386.cc (host_detect_local_cpu):
1691 Let -march=native recognize yongfeng processors.
1692 * config/i386/i386-c.cc (ix86_target_macros_internal): Add yongfeng.
1693 * config/i386/i386-options.cc (m_YONGFENG): New definition.
1695 * config/i386/i386.h (enum processor_type): Add PROCESSOR_YONGFENG.
1696 * config/i386/i386.md: Add yongfeng.
1697 * config/i386/lujiazui.md: Fix typo.
1698 * config/i386/x86-tune-costs.h (struct processor_costs):
1700 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add yongfeng.
1701 (ix86_adjust_cost): Ditto.
1702 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Replace
1703 m_LUJIAZUI with m_ZHAOXIN.
1704 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
1705 (X86_TUNE_SSE_PARTIAL_REG_DEPENDENCY): Ditto.
1706 (X86_TUNE_SSE_PARTIAL_REG_FP_CONVERTS_DEPENDENCY): Ditto.
1707 (X86_TUNE_SSE_PARTIAL_REG_CONVERTS_DEPENDENCY): Ditto.
1708 (X86_TUNE_MOVX): Ditto.
1709 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
1710 (X86_TUNE_FUSE_CMP_AND_BRANCH_32): Ditto.
1711 (X86_TUNE_FUSE_CMP_AND_BRANCH_64): Ditto.
1712 (X86_TUNE_FUSE_CMP_AND_BRANCH_SOFLAGS): Ditto.
1713 (X86_TUNE_FUSE_ALU_AND_BRANCH): Ditto.
1714 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
1715 (X86_TUNE_USE_LEAVE): Ditto.
1716 (X86_TUNE_PUSH_MEMORY): Ditto.
1717 (X86_TUNE_LCP_STALL): Ditto.
1718 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
1719 (X86_TUNE_OPT_AGU): Ditto.
1720 (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Ditto.
1721 (X86_TUNE_MISALIGNED_MOVE_STRING_PRO_EPILOGUES): Ditto.
1722 (X86_TUNE_USE_SAHF): Ditto.
1723 (X86_TUNE_USE_BT): Ditto.
1724 (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI): Ditto.
1725 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
1726 (X86_TUNE_AVOID_MFENCE): Ditto.
1727 (X86_TUNE_EXPAND_ABS): Ditto.
1728 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
1729 (X86_TUNE_USE_FFREEP): Ditto.
1730 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
1731 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
1732 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
1733 (X86_TUNE_SSE_TYPELESS_STORES): Ditto.
1734 (X86_TUNE_SSE_LOAD0_BY_PXOR): Ditto.
1735 (X86_TUNE_USE_GATHER_2PARTS): Add m_YONGFENG.
1736 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
1737 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
1738 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
1739 * doc/extend.texi: Add details about yongfeng.
1740 * doc/invoke.texi: Ditto.
1741 * config/i386/yongfeng.md: New file to describe yongfeng processor.
1743 2023-10-30 Martin Jambor <mjambor@suse.cz>
1746 * ipa-prop.h (struct ipa_argagg_value): Newf flag killed.
1747 * ipa-modref.cc (ipcp_argagg_and_kill_overlap_p): New function.
1748 (update_signature): Mark any any IPA-CP aggregate constants at
1749 positions known to be killed as killed. Move check that there is
1750 clone_info after this pruning.
1751 * ipa-cp.cc (ipa_argagg_value_list::dump): Dump the killed flag.
1752 (ipa_argagg_value_list::push_adjusted_values): Clear the new flag.
1753 (push_agg_values_from_plats): Likewise.
1754 (ipa_push_agg_values_from_jfunc): Likewise.
1755 (estimate_local_effects): Likewise.
1756 (push_agg_values_for_index_from_edge): Likewise.
1757 * ipa-prop.cc (write_ipcp_transformation_info): Stream the killed
1759 (read_ipcp_transformation_info): Likewise.
1760 (ipcp_get_aggregate_const): Update comment, assert that encountered
1761 record does not have killed flag set.
1762 (ipcp_transform_function): Prune all aggregate constants with killed
1765 2023-10-30 Martin Jambor <mjambor@suse.cz>
1768 * ipa-prop.h (ipcp_transformation): New member function template
1770 * ipa-sra.cc (zap_useless_ipcp_results): Use remove_argaggs_if to
1771 filter aggreagate constants.
1773 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
1775 PR middle-end/101955
1776 * config/arc/arc.md (*extvsi_1_0): New define_insn_and_split
1777 to convert sign extract of the least significant bit into an
1778 AND $1 then a NEG when !TARGET_BARREL_SHIFTER.
1780 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
1782 * config/arc/arc.cc (arc_rtx_costs): Improve cost estimates.
1783 Provide reasonable values for SHIFTS and ROTATES by constant
1784 bit counts depending upon TARGET_BARREL_SHIFTER.
1785 (arc_insn_cost): Use insn attributes if the instruction is
1786 recognized. Avoid calling get_attr_length for type "multi",
1787 i.e. define_insn_and_split patterns without explicit type.
1788 Fall-back to set_rtx_cost for single_set and pattern_cost
1790 * config/arc/arc.h (COSTS_N_BYTES): Define helper macro.
1791 (BRANCH_COST): Improve/correct definition.
1792 (LOGICAL_OP_NON_SHORT_CIRCUIT): Preserve previous behavior.
1794 2023-10-30 Roger Sayle <roger@nextmovesoftware.com>
1796 * config/arc/arc.cc (arc_split_ashl): Use lsl16 on TARGET_SWAP.
1797 (arc_split_ashr): Use swap and sign-extend on TARGET_SWAP.
1798 (arc_split_lshr): Use lsr16 on TARGET_SWAP.
1799 (arc_split_rotl): Use swap on TARGET_SWAP.
1800 (arc_split_rotr): Likewise.
1801 * config/arc/arc.md (ANY_ROTATE): New code iterator.
1802 (<ANY_ROTATE>si2_cnt16): New define_insn for alternate form of
1803 swap instruction on TARGET_SWAP.
1804 (ashlsi2_cnt16): Rename from *ashlsi16_cnt16 and move earlier.
1805 (lshrsi2_cnt16): New define_insn for LSR16 instruction.
1806 (*ashlsi2_cnt16): See above.
1808 2023-10-30 Richard Ball <richard.ball@arm.com>
1810 * config/arm/aout.h: Change to use the Lrtx label.
1811 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Remove arm targets
1812 from (!target_pure_code) condition.
1813 (ADDR_VEC_ALIGN): Add align for tables in rodata section.
1814 * config/arm/arm.cc (arm_output_casesi): Alter the function to include
1815 .Lrtx label and remove adr instructions.
1817 (arm_casesi_internal): Use force_reg to generate ldr instructions that
1818 would otherwise be out of range, and change rtl to accommodate force reg.
1819 Additionally remove unnecessary register temp.
1820 (casesi): Remove pure code check for Arm.
1821 * config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Remove arm
1822 targets from JUMP_TABLES_IN_TEXT_SECTION definition.
1824 2023-10-30 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
1827 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Change bitwise
1828 xor to an equality and fix comment indentation.
1830 2023-10-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1832 * config/riscv/riscv-protos.h (sew64_scalar_helper): Fix bug.
1833 * config/riscv/riscv-v.cc (sew64_scalar_helper): Ditto.
1834 * config/riscv/vector.md: Ditto.
1836 2023-10-30 liuhongt <hongtao.liu@intel.com>
1839 * config/i386/i386-expand.cc (ix86_expand_branch): Handle
1840 512-bit vector with vpcmpeq + kortest.
1841 * config/i386/i386.md (cbranchxi4): New expander.
1842 * config/i386/sse.md: (cbranch<mode>4): Extend to V16SImode
1845 2023-10-30 Haochen Gui <guihaoc@gcc.gnu.org>
1848 * expr.cc (qi_vector_mode_supported_p): Rename to...
1849 (by_pieces_mode_supported_p): ...this, and extends it to do
1850 the checking for both scalar and vector mode.
1851 (widest_fixed_size_mode_for_size): Call
1852 by_pieces_mode_supported_p to examine the mode.
1853 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Likewise.
1855 2023-10-29 Martin Uecker <uecker@tugraz.at>
1857 PR tree-optimization/109334
1858 * tree-object-size.cc (parm_object_size): Allow size
1859 computation for implicit access attributes.
1861 2023-10-29 Max Filippov <jcmvbkbc@gmail.com>
1863 * config/xtensa/xtensa.h (TARGET_SALT): Change HW version from
1864 260000 (which corresponds to RF-2014.0) to 270000 (which
1865 corresponds to RG-2015.0, the release where salt/saltu opcodes
1868 2023-10-29 Pan Li <pan2.li@intel.com>
1870 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Use
1871 reference type to prevent copying.
1873 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
1875 PR rtl-optimization/112107
1876 * ira-costs.cc: (calculate_equiv_gains): Use NONDEBUG_INSN_P
1879 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
1882 * config/gcn/gcn.cc (gcn_expand_epilogue): Fix kernel epilogue register
1885 2023-10-27 Andrew Stubbs <ams@codesourcery.com>
1887 * config/gcn/gcn-valu.md
1888 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): Mention "operands" in
1889 condition to silence the warnings.
1890 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): Likewise.
1891 * config/gcn/gcn.md (*movti_insn): Likewise.
1893 2023-10-27 Richard Sandiford <richard.sandiford@arm.com>
1895 * recog.cc (insn_propagation::apply_to_pattern_1): Handle shared
1898 2023-10-27 Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
1900 * config/riscv/riscv.cc (rocket_tune_info): Fix int_div cost.
1901 (sifive_7_tune_info, thead_c906_tune_info): Likewise.
1903 2023-10-27 Robin Dapp <rdapp@ventanamicro.com>
1905 * config/riscv/autovec.md (rawmemchr<ANYI:mode>): New expander.
1906 * config/riscv/riscv-protos.h (gen_no_side_effects_vsetvl_rtx):
1908 (expand_rawmemchr): Define.
1909 * config/riscv/riscv-v.cc (force_vector_length_operand): Remove
1911 (expand_block_move): Move from here...
1912 * config/riscv/riscv-string.cc (expand_block_move): ...to here.
1913 (expand_rawmemchr): Add vectorized expander.
1914 * internal-fn.cc (expand_RAWMEMCHR): Fix typo.
1916 2023-10-27 Vladimir N. Makarov <vmakarov@redhat.com>
1918 * ira-costs.cc: (get_equiv_regno, calculate_equiv_gains):
1919 Process reg equivalence invariants.
1921 2023-10-27 Uros Bizjak <ubizjak@gmail.com>
1923 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
1924 i386: Fiy typo in "partial_memory_read_stall" tune option.
1926 2023-10-27 Victor Do Nascimento <victor.donascimento@arm.com>
1928 * config/aarch64/aarch64.cc (aarch64_print_operand): Add
1929 support for CONST_STRING.
1931 2023-10-27 Roger Sayle <roger@nextmovesoftware.com>
1934 * config/i386/i386.md (<u>mul<mode><dwi>3): Make operands 1 and
1935 2 take "regiser_operand" and "nonimmediate_operand" respectively.
1936 (<u>mulqihi3): Likewise.
1937 (*bmi2_umul<mode><dwi>3_1): Operand 2 needs to be register_operand
1938 matching the %d constraint. Use umul_highpart RTX to represent
1939 the highpart multiplication.
1940 (*umul<mode><dwi>3_1): Operand 2 should use regiser_operand
1941 predicate, and "a" rather than "0" as operands 0 and 2 have
1943 (define_split): For mul to mulx conversion, use the new
1944 umul_highpart RTX representation.
1945 (*mul<mode><dwi>3_1): Operand 1 should be register_operand
1946 and the constraint %a as operands 0 and 1 have different modes.
1947 (*<u>mulqihi3_1): Operand 1 should be register_operand matching
1949 (define_peephole2): Providing widening multiplication variants
1950 of the peephole2s that tweak highpart multiplication register
1953 2023-10-27 Lewis Hyatt <lhyatt@gmail.com>
1955 PR preprocessor/87299
1956 * toplev.cc (no_backend): New static global.
1957 (finalize): Remove argument no_backend, which is now a
1959 (process_options): Likewise.
1960 (do_compile): Likewise.
1961 (target_reinit): Don't do anything in preprocess-only mode.
1962 (toplev::main): Adapt to no_backend change.
1963 (toplev::finalize): Likewise.
1965 2023-10-27 Andrew Pinski <apinski@marvell.com>
1967 PR tree-optimization/101590
1968 PR tree-optimization/94884
1969 * match.pd (`(X BIT_OP Y) CMP X`): New pattern.
1971 2023-10-27 liuhongt <hongtao.liu@intel.com>
1974 * config/i386/i386-expand.cc (ix86_expand_sse_movcc): Handle
1975 V2HF/V2BF/V4HF/V4BFmode.
1976 * config/i386/i386.cc (ix86_get_mask_mode): Return QImode when
1977 data_mode is V4HF/V2HFmode.
1978 * config/i386/mmx.md (vec_cmpv4hfqi): New expander.
1979 (vcond_mask_<mode>v4hi): Ditto.
1980 (vcond_mask_<mode>qi): Ditto.
1981 (vec_cmpv2hfqi): Ditto.
1982 (vcond_mask_<mode>v2hi): Ditto.
1983 (mmx_plendvb_<mode>): Add 2 combine splitters after the
1985 (mmx_pblendvb_v8qi): Ditto.
1986 (<code>v2hi3): Add a combine splitter after the pattern.
1987 (<code><mode>3): Ditto.
1988 (<code>v8qi3): Ditto.
1989 (<code><mode>3): Ditto.
1990 * config/i386/sse.md (vcond<mode><mode>): Merge this with ..
1991 (vcond<sseintvecmodelower><mode>): .. this into ..
1992 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): .. this,
1993 and extend to V8BF/V16BF/V32BFmode.
1995 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1997 * config/riscv/riscv-opts.h (TARGET_MAX_LMUL): New macro.
1998 * config/riscv/riscv-v.cc (preferred_simd_mode): Adapt macro.
1999 (autovectorize_vector_modes): Ditto.
2000 (can_find_related_mode_p): Ditto.
2002 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2006 * config.gcc: Add AVL propagation pass.
2007 * config/riscv/riscv-passes.def (INSERT_PASS_AFTER): Ditto.
2008 * config/riscv/riscv-protos.h (make_pass_avlprop): Ditto.
2009 * config/riscv/t-riscv: Ditto.
2010 * config/riscv/riscv-avlprop.cc: New file.
2012 2023-10-26 David Malcolm <dmalcolm@redhat.com>
2014 * doc/extend.texi (Common Function Attributes): Add
2015 null_terminated_string_arg.
2017 2023-10-26 Andrew Pinski <pinskia@gmail.com>
2019 PR tree-optimization/111957
2020 * match.pd (`a != C1 ? abs(a) : C2`): New pattern.
2022 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
2024 * range-op-float.cc (range_operator::fold_range): Delete unused
2027 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
2029 * range-op-float.cc (range_operator::fold_range): Remove
2031 (range_operator::rv_fold): Remove unneeded arguments.
2032 (operator_plus::rv_fold): Same.
2033 (operator_minus::rv_fold): Same.
2034 (operator_mult::rv_fold): Same.
2035 (operator_div::rv_fold): Same.
2036 * range-op-mixed.h: Remove lb, ub, and maybe_nan arguments from
2040 2023-10-26 Aldy Hernandez <aldyh@redhat.com>
2042 * range-op-float.cc (range_operator::fold_range): Pass frange
2043 argument to rv_fold.
2044 (range_operator::rv_fold): Add frange argument.
2045 (operator_plus::rv_fold): Same.
2046 (operator_minus::rv_fold): Same.
2047 (operator_mult::rv_fold): Same.
2048 (operator_div::rv_fold): Same.
2049 * range-op-mixed.h: Add frange argument to rv_fold methods.
2052 2023-10-26 Richard Ball <richard.ball@arm.com>
2054 * config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Add table output
2055 for different machine modes for arm.
2056 * config/arm/arm-protos.h (arm_output_casesi): New prototype.
2057 * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Make arm use
2058 ASM_OUTPUT_ADDR_DIFF_ELT.
2059 (CASE_VECTOR_SHORTEN_MODE): Change table size calculation for
2061 (LABEL_ALIGN_AFTER_BARRIER): Change to accommodate .p2align 2
2063 * config/arm/arm.cc (arm_output_casesi): New function.
2064 * config/arm/arm.md (arm_casesi_internal): Change casesi expand
2066 for arm to use new function arm_output_casesi.
2068 2023-10-26 Iain Sandoe <iain@sandoe.co.uk>
2071 (darwin_label_is_anonymous_local_objc_name): Make metadata names
2072 linker-visibile for GNU objective C.
2074 2023-10-26 Vladimir N. Makarov <vmakarov@redhat.com>
2076 * dwarf2out.cc (reg_loc_descriptor): Use lra_eliminate_regs when
2078 * ira-costs.cc: Include regset.h.
2079 (equiv_can_be_consumed_p, get_equiv_regno, calculate_equiv_gains):
2081 (find_costs_and_classes): Call calculate_equiv_gains and redefine
2082 mem_cost of pseudos with equivs when LRA is used.
2083 * var-tracking.cc: Include ira.h and lra.h.
2084 (vt_initialize): Use lra_eliminate_regs when LRA is used.
2086 2023-10-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2088 * doc/md.texi: Adapt COND_LEN pseudo code.
2090 2023-10-26 Roger Sayle <roger@nextmovesoftware.com>
2091 Richard Biener <rguenther@suse.de>
2093 PR rtl-optimization/91865
2094 * combine.cc (make_compound_operation): Avoid creating a
2095 ZERO_EXTEND of a ZERO_EXTEND.
2097 2023-10-26 Jiahao Xu <xujiahao@loongson.cn>
2099 * config/loongarch/lasx.md (vcond_mask_<ILASX:mode><ILASX:mode>): Change to
2100 (vcond_mask_<mode><mode256_i>): this.
2101 * config/loongarch/lsx.md (vcond_mask_<ILSX:mode><ILSX:mode>): Change to
2102 (vcond_mask_<mode><mode_i>): this.
2104 2023-10-26 Thomas Schwinge <thomas@codesourcery.com>
2106 * ipa-icf.cc (sem_item::target_supports_symbol_aliases_p):
2107 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);' before
2109 * ipa-visibility.cc (function_and_variable_visibility): Change
2110 '#ifdef ASM_OUTPUT_DEF' to 'if (TARGET_SUPPORTS_ALIASES)'.
2111 * varasm.cc (output_constant_pool_contents)
2112 [#ifdef ASM_OUTPUT_DEF]:
2113 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
2114 (do_assemble_alias) [#ifdef ASM_OUTPUT_DEF]:
2115 'if (!TARGET_SUPPORTS_ALIASES)',
2116 'gcc_checking_assert (seen_error ());'.
2117 (assemble_alias): Change '#if !defined (ASM_OUTPUT_DEF)' to
2118 'if (!TARGET_SUPPORTS_ALIASES)'.
2119 (default_asm_output_anchor):
2120 'gcc_checking_assert (TARGET_SUPPORTS_ALIASES);'.
2122 2023-10-26 Alexandre Oliva <oliva@adacore.com>
2124 PR tree-optimization/111520
2125 * gimple-harden-conditionals.cc
2126 (pass_harden_compares::execute): Set EH edge probability and
2127 EH block execution count.
2129 2023-10-26 Alexandre Oliva <oliva@adacore.com>
2131 * tree-eh.h (make_eh_edges): Rename to...
2132 (make_eh_edge): ... this.
2133 * tree-eh.cc: Likewise. Adjust all callers...
2134 * gimple-harden-conditionals.cc: ... here, ...
2135 * gimple-harden-control-flow.cc: ... here, ...
2136 * tree-cfg.cc: ... here, ...
2137 * tree-inline.cc: ... and here.
2139 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
2141 * config/darwin.cc (darwin_override_options): Handle fPIE.
2143 2023-10-25 Iain Sandoe <iain@sandoe.co.uk>
2145 * config.gcc: Use -E to to sed to indicate that we are using
2148 2023-10-25 Jason Merrill <jason@redhat.com>
2150 * tree-core.h (struct tree_base): Update address_space comment.
2152 2023-10-25 Wilco Dijkstra <wilco.dijkstra@arm.com>
2154 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
2155 Add support for immediates using MOV/EOR bitmask.
2157 2023-10-25 Uros Bizjak <ubizjak@gmail.com>
2160 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_MEMORY_READ_STALL):
2162 * config/i386/i386.h (TARGET_PARTIAL_MEMORY_READ_STALL): New macro.
2163 * config/i386/i386.md: New peephole pattern to narrow test
2164 instructions with immediate operands that test memory locations
2167 2023-10-25 Andrew MacLeod <amacleod@redhat.com>
2169 * value-range.cc (irange::union_append): New.
2170 (irange::union_): Call union_append when appropriate.
2171 * value-range.h (irange::union_append): New prototype.
2173 2023-10-25 Chenghui Pan <panchenghui@loongson.cn>
2175 * config/loongarch/lasxintrin.h (__lasx_xvftintrnel_l_s): Fix comments.
2176 (__lasx_xvfrintrne_s): Ditto.
2177 (__lasx_xvfrintrne_d): Ditto.
2178 (__lasx_xvfrintrz_s): Ditto.
2179 (__lasx_xvfrintrz_d): Ditto.
2180 (__lasx_xvfrintrp_s): Ditto.
2181 (__lasx_xvfrintrp_d): Ditto.
2182 (__lasx_xvfrintrm_s): Ditto.
2183 (__lasx_xvfrintrm_d): Ditto.
2184 * config/loongarch/lsxintrin.h (__lsx_vftintrneh_l_s): Ditto.
2185 (__lsx_vfrintrne_s): Ditto.
2186 (__lsx_vfrintrne_d): Ditto.
2187 (__lsx_vfrintrz_s): Ditto.
2188 (__lsx_vfrintrz_d): Ditto.
2189 (__lsx_vfrintrp_s): Ditto.
2190 (__lsx_vfrintrp_d): Ditto.
2191 (__lsx_vfrintrm_s): Ditto.
2192 (__lsx_vfrintrm_d): Ditto.
2194 2023-10-25 chenxiaolong <chenxiaolong@loongson.cn>
2196 * config/loongarch/loongarch.md (get_thread_pointer<mode>):Adds the
2197 instruction template corresponding to the __builtin_thread_pointer
2199 * doc/extend.texi:Add the __builtin_thread_pointer function support
2200 description to the documentation.
2202 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2204 * Makefile.in (OBJS): Add rtl-ssa/movement.o.
2205 * rtl-ssa/access-utils.h (accesses_include_nonfixed_hard_registers)
2206 (single_set_info): New functions.
2207 (remove_uses_of_def, accesses_reference_same_resource): Declare.
2208 (insn_clobbers_resources): Likewise.
2209 * rtl-ssa/accesses.cc (rtl_ssa::remove_uses_of_def): New function.
2210 (rtl_ssa::accesses_reference_same_resource): Likewise.
2211 (rtl_ssa::insn_clobbers_resources): Likewise.
2212 * rtl-ssa/movement.h (can_move_insn_p): Declare.
2213 * rtl-ssa/movement.cc: New file.
2215 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2217 * rtl-ssa/functions.h (function_info::remains_available_at_insn):
2218 New member function.
2219 * rtl-ssa/accesses.cc (function_info::remains_available_at_insn):
2221 (function_info::make_use_available): Avoid false negatives for
2222 queries within an EBB.
2224 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2226 * rtl-ssa/changes.cc: Include sreal.h.
2227 (rtl_ssa::changes_are_worthwhile): When optimizing for speed,
2228 scale the cost of each instruction by its execution frequency.
2230 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2232 * rtl-ssa/access-utils.h (next_call_clobbers): New function.
2233 (is_single_dominating_def, remains_available_on_exit): Replace with...
2234 * rtl-ssa/functions.h (function_info::is_single_dominating_def)
2235 (function_info::remains_available_on_exit): ...these new member
2237 (function_info::m_clobbered_by_calls): New member variable.
2238 * rtl-ssa/functions.cc (function_info::function_info): Explicitly
2239 initialize m_clobbered_by_calls.
2240 * rtl-ssa/insns.cc (function_info::record_call_clobbers): Update
2241 m_clobbered_by_calls for each call-clobber note.
2242 * rtl-ssa/member-fns.inl (function_info::is_single_dominating_def):
2243 New function. Check for call clobbers.
2244 * rtl-ssa/accesses.cc (function_info::remains_available_on_exit):
2247 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2249 * rtl-ssa/internals.h (build_info::exit_block_dominator): New
2251 * rtl-ssa/blocks.cc (build_info::build_info): Initialize it.
2252 (bb_walker::bb_walker): Use it, moving the computation of the
2254 (function_info::process_all_blocks): ...here.
2255 (function_info::place_phis): Add dominance frontiers for the
2258 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2260 * rtl-ssa/functions.h (function_info::process_uses_of_deleted_def):
2261 New member function.
2262 * rtl-ssa/changes.cc (function_info::process_uses_of_deleted_def):
2264 (function_info::change_insns): Use it.
2266 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2268 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
2269 If a change describes a set of memory, ensure that that set
2270 is kept, regardless of the insn pattern.
2272 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2274 * rtl-ssa/changes.cc (function_info::apply_changes_to_insn): Remove
2275 call to add_reg_unused_notes and instead...
2276 (function_info::change_insns): ...use a separate loop here.
2278 2023-10-25 Richard Sandiford <richard.sandiford@arm.com>
2280 * rtl-ssa/blocks.cc (function_info::add_artificial_accesses): Force
2281 global registers to be live on exit. Handle any block with zero
2282 successors like an exit block.
2284 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
2286 * omp-oacc-kernels-decompose.cc (omp_oacc_kernels_decompose_1):
2287 Handle 'OMP_CLAUSE_SELF' like 'OMP_CLAUSE_IF'.
2288 * omp-expand.cc (expand_omp_target): Handle 'OMP_CLAUSE_SELF' for
2289 'GF_OMP_TARGET_KIND_OACC_DATA_KERNELS'.
2291 2023-10-25 Thomas Schwinge <thomas@codesourcery.com>
2293 * tree-core.h (omp_clause_code): Move 'OMP_CLAUSE_SELF' after
2295 * tree-pretty-print.cc (dump_omp_clause): Adjust.
2296 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Likewise.
2299 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2301 * config/riscv/riscv-protos.h (has_vl_op): Export from riscv-vsetvl to riscv-v
2302 (tail_agnostic_p): Ditto.
2303 (validate_change_or_fail): Ditto.
2304 (nonvlmax_avl_type_p): Ditto.
2305 (vlmax_avl_p): Ditto.
2307 (enum vlmul_type): Ditto.
2308 (count_regno_occurrences): Ditto.
2309 * config/riscv/riscv-v.cc (has_vl_op): Ditto.
2310 (get_default_ta): Ditto.
2311 (tail_agnostic_p): Ditto.
2312 (validate_change_or_fail): Ditto.
2313 (nonvlmax_avl_type_p): Ditto.
2314 (vlmax_avl_p): Ditto.
2316 (enum vlmul_type): Ditto.
2318 (count_regno_occurrences): Ditto.
2319 * config/riscv/riscv-vsetvl.cc (vlmax_avl_p): Ditto.
2323 (get_default_ta): Ditto.
2324 (tail_agnostic_p): Ditto.
2325 (count_regno_occurrences): Ditto.
2326 (validate_change_or_fail): Ditto.
2328 2023-10-25 Chung-Lin Tang <cltang@codesourcery.com>
2330 * gimplify.cc (gimplify_scan_omp_clauses): Add OMP_CLAUSE_SELF case.
2331 (gimplify_adjust_omp_clauses): Likewise.
2332 * omp-expand.cc (expand_omp_target): Add OMP_CLAUSE_SELF expansion code,
2333 * omp-low.cc (scan_sharing_clauses): Add OMP_CLAUSE_SELF case.
2334 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_SELF enum.
2335 * tree-nested.cc (convert_nonlocal_omp_clauses): Add OMP_CLAUSE_SELF
2337 (convert_local_omp_clauses): Likewise.
2338 * tree-pretty-print.cc (dump_omp_clause): Add OMP_CLAUSE_SELF case.
2339 * tree.cc (omp_clause_num_ops): Add OMP_CLAUSE_SELF entry.
2340 (omp_clause_code_name): Likewise.
2341 * tree.h (OMP_CLAUSE_SELF_EXPR): New macro.
2343 2023-10-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2345 * config/riscv/riscv-protos.h (vlmax_avl_type_p): New function.
2346 * config/riscv/riscv-v.cc (vlmax_avl_type_p): Ditto.
2347 * config/riscv/riscv-vsetvl.cc (get_avl): Adapt function.
2348 * config/riscv/vector.md: Change avl_type into avl_type_idx.
2350 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2352 * recog.cc (constrain_operands): Remove UNARY_P handling.
2353 * reload.cc (find_reloads): Likewise.
2355 2023-10-24 Jose E. Marchesi <jose.marchesi@oracle.com>
2357 * gcov-io.h: Fix record length encoding in comment.
2359 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
2361 * config/i386/i386-features.cc (compute_convert_gain): Provide
2362 more accurate values (sizes) for inter-unit moves with -Os.
2364 2023-10-24 Roger Sayle <roger@nextmovesoftware.com>
2365 Claudiu Zissulescu <claziss@gmail.com>
2367 * config/arc/arc-protos.h (output_shift): Rename to...
2368 (output_shift_loop): Tweak API to take an explicit rtx_code.
2369 (arc_split_ashl): Prototype new function here.
2370 (arc_split_ashr): Likewise.
2371 (arc_split_lshr): Likewise.
2372 (arc_split_rotl): Likewise.
2373 (arc_split_rotr): Likewise.
2374 * config/arc/arc.cc (output_shift): Delete local prototype. Rename.
2375 (output_shift_loop): New function replacing output_shift to output
2376 a zero overheap loop for SImode shifts and rotates on ARC targets
2377 without barrel shifter (i.e. no hardware support for these insns).
2378 (arc_split_ashl): New helper function to split *ashlsi3_nobs.
2379 (arc_split_ashr): New helper function to split *ashrsi3_nobs.
2380 (arc_split_lshr): New helper function to split *lshrsi3_nobs.
2381 (arc_split_rotl): New helper function to split *rotlsi3_nobs.
2382 (arc_split_rotr): New helper function to split *rotrsi3_nobs.
2383 (arc_print_operand): Correct whitespace.
2384 (arc_rtx_costs): Likewise.
2385 (hwloop_optimize): Likewise.
2386 * config/arc/arc.md (ANY_SHIFT_ROTATE): New define_code_iterator.
2387 (define_code_attr insn): New code attribute to map to pattern name.
2388 (<ANY_SHIFT_ROTATE>si3): New expander unifying previous ashlsi3,
2389 ashrsi3 and lshrsi3 define_expands. Adds rotlsi3 and rotrsi3.
2390 (*<ANY_SHIFT_ROTATE>si3_nobs): New define_insn_and_split that
2391 unifies the previous *ashlsi3_nobs, *ashrsi3_nobs and *lshrsi3_nobs.
2392 We now call arc_split_<insn> in arc.cc to implement each split.
2393 (shift_si3): Delete define_insn, all shifts/rotates are now split.
2394 (shift_si3_loop): Rename to...
2395 (<insn>si3_loop): define_insn to handle loop implementations of
2396 SImode shifts and rotates, calling ouput_shift_loop for template.
2397 (rotrsi3): Rename to...
2398 (*rotrsi3_insn): define_insn for TARGET_BARREL_SHIFTER's ror.
2399 (*rotlsi3): New define_insn_and_split to transform left rotates
2400 into right rotates before reload.
2401 (rotlsi3_cnt1): New define_insn_and_split to implement a left
2402 rotate by one bit using an add.f followed by an adc.
2403 * config/arc/predicates.md (shiftr4_operator): Delete.
2405 2023-10-24 Claudiu Zissulescu <claziss@gmail.com>
2407 * config/arc/arc.md (mulsi3_700): Update pattern.
2408 (mulsi3_v2): Likewise.
2409 * config/arc/predicates.md (mpy_dest_reg_operand): Remove it.
2411 2023-10-24 Andrew Pinski <pinskia@gmail.com>
2413 PR tree-optimization/104376
2414 PR tree-optimization/101541
2415 * tree-ssa-phiopt.cc (factor_out_conditional_operation):
2416 Allow nop conversions even if it is defined by a statement
2417 inside the conditional.
2419 2023-10-24 Andrew Pinski <pinskia@gmail.com>
2421 PR tree-optimization/111913
2422 * match.pd (`popcount(X&Y) + popcount(X|Y)`): Add the resulting
2425 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2427 * rtl-ssa/blocks.cc (function_info::create_degenerate_phi): Check
2428 whether the requested phi already exists.
2430 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2432 * rtl-ssa.h: Include cfgbuild.h.
2433 * rtl-ssa/movement.h (can_insert_after): Replace is_jump with the
2434 more comprehensive control_flow_insn_p.
2436 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2438 * rtl-ssa/changes.cc (function_info::perform_pending_updates): Check
2439 whether an insn has been replaced by a note.
2441 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2443 * rtl-ssa/member-fns.inl (first_any_insn_use): Handle null
2446 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2448 * config/i386/i386-expand.cc (ix86_split_mmx_punpck): Allow the
2449 destination to be wider than the sources. Take the mode from the
2451 (ix86_expand_sse_extend): Pass the destination directly to
2452 ix86_split_mmx_punpck, rather than using a fresh register that
2455 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2457 * config/i386/predicates.md (aeswidekl_operation): Protect
2458 REGNO check with REG_P.
2460 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2462 * config/aarch64/aarch64.cc (aarch64_insn_cost): New function.
2463 (TARGET_INSN_COST): Define.
2465 2023-10-24 Richard Sandiford <richard.sandiford@arm.com>
2467 * config/aarch64/atomics.md (aarch64_atomic_exchange<mode>): Require
2470 2023-10-24 xuli <xuli1@eswincomputing.com>
2473 * config/riscv/riscv-vector-builtins-bases.cc: fix bug.
2475 2023-10-24 Mark Harmstone <mark@harmstone.com>
2477 * opts.cc (debug_type_names): Remove stabs and xcoff.
2478 (df_set_names): Adjust.
2480 2023-10-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2483 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Add REGNO check.
2485 2023-10-23 Lewis Hyatt <lhyatt@gmail.com>
2487 PR preprocessor/36887
2488 * toplev.h (ident_hash_extra): Declare...
2489 * stringpool.cc (ident_hash_extra): ...this new global variable.
2490 (init_stringpool): Handle ident_hash_extra as well as ident_hash.
2491 (ggc_mark_stringpool): Likewise.
2492 (ggc_purge_stringpool): Likewise.
2493 (struct string_pool_data_extra): New struct.
2494 (spd2): New GC root variable.
2495 (gt_pch_save_stringpool): Use spd2 to handle ident_hash_extra,
2496 analogous to how spd is used to handle ident_hash.
2497 (gt_pch_restore_stringpool): Likewise.
2499 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
2501 PR tree-optimization/111794
2502 * tree-vect-stmts.cc (vectorizable_assignment): Add
2503 same-precision exception for dest and source.
2505 2023-10-23 Robin Dapp <rdapp@ventanamicro.com>
2507 * config/riscv/autovec.md (popcount<mode>2): New expander.
2508 * config/riscv/riscv-protos.h (expand_popcount): Define.
2509 * config/riscv/riscv-v.cc (expand_popcount): Vectorize popcount
2510 with the WWG algorithm.
2512 2023-10-23 Richard Biener <rguenther@suse.de>
2514 PR tree-optimization/111916
2515 * tree-sra.cc (sra_modify_assign): Do not lower all
2516 BIT_FIELD_REF reads that are sra_handled_bf_read_p.
2518 2023-10-23 Richard Biener <rguenther@suse.de>
2520 PR tree-optimization/111915
2521 * tree-vect-slp.cc (vect_build_slp_tree_1): Check all
2522 accesses are either grouped or not.
2524 2023-10-23 Richard Biener <rguenther@suse.de>
2527 * tree-inline.cc (setup_one_parameter): Move code emitting
2528 a dummy load when not optimizing ...
2529 (initialize_inlined_parameters): ... here to after when
2530 we remapped the parameter type.
2532 2023-10-23 Oleg Endo <olegendo@gcc.gnu.org>
2535 * config/sh/sh_treg_combine.cc (sh_treg_combine::record_set_of_reg):
2536 Skip over nop move insns.
2538 2023-10-23 Tamar Christina <tamar.christina@arm.com>
2540 PR tree-optimization/111860
2541 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
2542 Drop .MEM nodes only.
2544 2023-10-23 Andrew Pinski <apinski@marvell.com>
2546 * match.pd (`(A - B) CMP 0 ? (A - B) : (B - A)`):
2549 2023-10-23 Andrew Pinski <pinskia@gmail.com>
2551 * convert.cc (convert_to_pointer_1): Return error_mark_node
2553 (convert_to_real_1): Likewise.
2554 (convert_to_integer_1): Likewise.
2555 (convert_to_complex_1): Likewise.
2557 2023-10-23 Andrew Pinski <pinskia@gmail.com>
2560 * convert.cc (convert_to_complex_1): Return
2561 error_mark_node if either convert was an error
2562 when converting from a scalar.
2564 2023-10-23 Richard Biener <rguenther@suse.de>
2566 PR tree-optimization/111917
2567 * tree-ssa-loop-unswitch.cc (hoist_guard): Always insert
2568 new conditional after last stmt.
2570 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2573 * config/riscv/riscv-vsetvl.cc: Fix bug.
2575 2023-10-23 Pan Li <pan2.li@intel.com>
2577 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): Add insn type
2579 (expand_vec_trunc): Take MA instead of MU for cvt_x_f_rtz.
2581 2023-10-23 Xi Ruoyao <xry111@xry111.site>
2583 * doc/invoke.texi (-mexplicit-relocs=style): Document.
2584 (-mexplicit-relocs): Document as an alias of
2585 -mexplicit-relocs=always.
2586 (-mno-explicit-relocs): Document as an alias of
2587 -mexplicit-relocs=none.
2588 (-mcmodel=extreme): Mention -mexplicit-relocs=always instead of
2591 2023-10-23 Xi Ruoyao <xry111@xry111.site>
2593 * config/loongarch/predicates.md (symbolic_pcrel_operand): New
2595 * config/loongarch/loongarch.md (define_peephole2): Optimize
2596 la.local + ld/st to pcalau12i + ld/st if the address is only used
2597 once if -mexplicit-relocs=auto and -mcmodel=normal or medium.
2599 2023-10-23 Xi Ruoyao <xry111@xry111.site>
2601 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
2602 Return true for TLS symbol types if -mexplicit-relocs=auto.
2603 (loongarch_call_tls_get_addr): Replace TARGET_EXPLICIT_RELOCS
2604 with la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE.
2605 (loongarch_legitimize_tls_address): Likewise.
2606 * config/loongarch/loongarch.md (@tls_low<mode>): Remove
2607 TARGET_EXPLICIT_RELOCS from insn condition.
2609 2023-10-23 Xi Ruoyao <xry111@xry111.site>
2611 * config/loongarch/loongarch-protos.h
2612 (loongarch_explicit_relocs_p): Declare new function.
2613 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
2615 (loongarch_symbol_insns): Call loongarch_explicit_relocs_p for
2616 SYMBOL_GOT_DISP, instead of using TARGET_EXPLICIT_RELOCS.
2617 (loongarch_split_symbol): Call loongarch_explicit_relocs_p for
2618 deciding if return early, instead of using
2619 TARGET_EXPLICIT_RELOCS.
2620 (loongarch_output_move): CAll loongarch_explicit_relocs_p
2621 instead of using TARGET_EXPLICIT_RELOCS.
2622 * config/loongarch/loongarch.md (*low<mode>): Remove
2623 TARGET_EXPLICIT_RELOCS from insn condition.
2624 (@ld_from_got<mode>): Likewise.
2625 * config/loongarch/predicates.md (move_operand): Call
2626 loongarch_explicit_relocs_p instead of using
2627 TARGET_EXPLICIT_RELOCS.
2629 2023-10-23 Xi Ruoyao <xry111@xry111.site>
2631 * config/loongarch/genopts/loongarch-strings: Add strings for
2632 -mexplicit-relocs={auto,none,always}.
2633 * config/loongarch/genopts/loongarch.opt.in: Add options for
2634 -mexplicit-relocs={auto,none,always}.
2635 * config/loongarch/loongarch-str.h: Regenerate.
2636 * config/loongarch/loongarch.opt: Regenerate.
2637 * config/loongarch/loongarch-def.h
2638 (EXPLICIT_RELOCS_AUTO): Define.
2639 (EXPLICIT_RELOCS_NONE): Define.
2640 (EXPLICIT_RELOCS_ALWAYS): Define.
2641 (N_EXPLICIT_RELOCS_TYPES): Define.
2642 * config/loongarch/loongarch.cc
2643 (loongarch_option_override_internal): Error out if the old-style
2644 -m[no-]explicit-relocs option is used with
2645 -mexplicit-relocs={auto,none,always} together. Map
2646 -mno-explicit-relocs to -mexplicit-relocs=none and
2647 -mexplicit-relocs to -mexplicit-relocs=always for backward
2648 compatibility. Set a proper default for -mexplicit-relocs=
2649 based on configure-time probed linker capability. Update a
2650 diagnostic message to mention -mexplicit-relocs=always instead
2651 of the old-style -mexplicit-relocs.
2652 (loongarch_handle_model_attribute): Update a diagnostic message
2653 to mention -mexplicit-relocs=always instead of the old-style
2655 * config/loongarch/loongarch.h (TARGET_EXPLICIT_RELOCS): Define.
2657 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2659 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Fix typo.
2660 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
2662 2023-10-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2664 * config/riscv/vector.md: Fix avl_type attribute of tuple mov<mode>.
2666 2023-10-23 Kewen Lin <linkw@linux.ibm.com>
2668 PR tree-optimization/111784
2669 * tree-vect-stmts.cc (vectorizable_store): Adjust costing way for
2670 adjacent vector stores, by costing them with the total number
2671 rather than costing them one by one.
2672 (vectorizable_load): Adjust costing way for adjacent vector
2673 loads, by costing them with the total number rather than costing
2676 2023-10-23 Haochen Jiang <haochen.jiang@intel.com>
2679 * config/i386/i386.cc (ix86_standard_x87sse_constant_load_p):
2680 Do not split to xmm16+ when !TARGET_AVX512VL.
2682 2023-10-23 Pan Li <pan2.li@intel.com>
2684 * config/riscv/riscv-protos.h (enum insn_type): Add new type
2686 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): Add undef merge
2688 (expand_vec_ceil): Take MA instead of MU for tmp register.
2689 (expand_vec_floor): Ditto.
2690 (expand_vec_nearbyint): Ditto.
2691 (expand_vec_rint): Ditto.
2692 (expand_vec_round): Ditto.
2693 (expand_vec_roundeven): Ditto.
2695 2023-10-23 Lulu Cheng <chenglulu@loongson.cn>
2697 * config/loongarch/loongarch.h (CLEAR_INSN_CACHE): New definition.
2699 2023-10-23 Haochen Gui <guihaoc@gcc.gnu.org>
2702 * expr.cc (can_use_qi_vectors): New function to return true if
2703 we know how to implement OP using vectors of bytes.
2704 (qi_vector_mode_supported_p): New function to check if optabs
2705 exists for the mode and certain by pieces operations.
2706 (widest_fixed_size_mode_for_size): Replace the second argument
2707 with the type of by pieces operations. Call can_use_qi_vectors
2708 and qi_vector_mode_supported_p to do the check. Call
2709 scalar_mode_supported_p to check if the scalar mode is supported.
2710 (by_pieces_ninsns): Pass the type of by pieces operation to
2711 widest_fixed_size_mode_for_size.
2712 (class op_by_pieces_d): Remove m_qi_vector_mode. Add m_op to
2713 record the type of by pieces operations.
2714 (op_by_pieces_d::op_by_pieces_d): Change last argument to the
2715 type of by pieces operations, initialize m_op with it. Pass
2716 m_op to function widest_fixed_size_mode_for_size.
2717 (op_by_pieces_d::get_usable_mode): Pass m_op to function
2718 widest_fixed_size_mode_for_size.
2719 (op_by_pieces_d::smallest_fixed_size_mode_for_size): Call
2720 can_use_qi_vectors and qi_vector_mode_supported_p to do the
2722 (op_by_pieces_d::run): Pass m_op to function
2723 widest_fixed_size_mode_for_size.
2724 (move_by_pieces_d::move_by_pieces_d): Set m_op to MOVE_BY_PIECES.
2725 (store_by_pieces_d::store_by_pieces_d): Set m_op with the op.
2726 (can_store_by_pieces): Pass the type of by pieces operations to
2727 widest_fixed_size_mode_for_size.
2728 (clear_by_pieces): Initialize class store_by_pieces_d with
2730 (compare_by_pieces_d::compare_by_pieces_d): Set m_op to
2733 2023-10-23 liuhongt <hongtao.liu@intel.com>
2735 PR tree-optimization/111820
2736 PR tree-optimization/111833
2737 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Give
2738 up vectorization for nonlinear iv vect_step_op_mul when
2739 step_expr is not exact_log2 and niters is greater than
2740 TYPE_PRECISION (TREE_TYPE (step_expr)). Also don't vectorize
2741 for nagative niters_skip which will be used by fully masked
2743 (vect_can_advance_ivs_p): Pass whole phi_info to
2744 vect_can_peel_nonlinear_iv_p.
2745 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Optimize
2746 init_expr * pow (step_expr, skipn) to init_expr
2747 << (log2 (step_expr) * skipn) when step_expr is exact_log2.
2749 2023-10-23 liuhongt <hongtao.liu@intel.com>
2751 * config/i386/mmx.md (mmx_pinsrw): Remove.
2753 2023-10-22 Andrew Pinski <pinskia@gmail.com>
2756 * config/aarch64/aarch64.md (*cmov<mode>_insn_insv): New pattern.
2757 (*cmov_uxtw_insn_insv): Likewise.
2759 2023-10-22 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
2761 * doc/invoke.texi: Document the new -nodefaultrpaths option.
2762 * doc/install.texi: Document the new --with-darwin-extra-rpath
2765 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
2767 * Makefile.in: set ENABLE_DARWIN_AT_RPATH in site.tmp.
2769 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
2771 * configure.ac: Add --with-darwin-extra-rpath option.
2772 * config/darwin.h: Handle DARWIN_EXTRA_RPATH.
2773 * config.in: Regenerate.
2774 * configure: Regenerate.
2776 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
2778 * aclocal.m4: Regenerate.
2779 * configure: Regenerate.
2780 * configure.ac: Handle Darwin rpaths.
2781 * config/darwin.h: Handle Darwin rpaths.
2782 * config/darwin.opt: Handle Darwin rpaths.
2783 * Makefile.in: Handle Darwin rpaths.
2785 2023-10-22 Iain Sandoe <iain@sandoe.co.uk>
2787 * gcc.cc (RUNPATH_OPTION): New.
2788 (do_spec_1): Provide '%P' as a spec to insert rpaths for
2789 each compiler startfile path.
2791 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
2792 Maxim Blinov <maxim.blinov@embecosm.com>
2793 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
2794 Iain Sandoe <iain@sandoe.co.uk>
2796 * config.gcc: Default to heap trampolines on macOS 11 and above.
2797 * config/i386/darwin.h: Define X86_CUSTOM_FUNCTION_TEST.
2798 * config/i386/i386.h: Define X86_CUSTOM_FUNCTION_TEST.
2799 * config/i386/i386.cc: Use X86_CUSTOM_FUNCTION_TEST.
2801 2023-10-22 Andrew Burgess <andrew.burgess@embecosm.com>
2802 Maxim Blinov <maxim.blinov@embecosm.com>
2803 Iain Sandoe <iain@sandoe.co.uk>
2804 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
2806 * builtins.def (BUILT_IN_NESTED_PTR_CREATED): Define.
2807 (BUILT_IN_NESTED_PTR_DELETED): Ditto.
2808 * common.opt (ftrampoline-impl): Add option to control
2809 generation of trampoline instantiation (heap or stack).
2810 * coretypes.h: Define enum trampoline_impl.
2811 * tree-nested.cc (convert_tramp_reference_op): Don't bother calling
2812 __builtin_adjust_trampoline for heap trampolines.
2813 (finalize_nesting_tree_1): Emit calls to
2814 __builtin_nested_...{created,deleted} if we're generating with
2815 -ftrampoline-impl=heap.
2816 * tree.cc (build_common_builtin_nodes): Build
2817 __builtin_nested_...{created,deleted}.
2818 * doc/invoke.texi (-ftrampoline-impl): Document.
2820 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
2822 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
2823 Prohibit 'E' and 'H' combinations.
2825 2023-10-22 Tsukasa OI <research_trasio@irq.a4lg.com>
2827 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
2828 Change version number of the 'Zfa' extension to 1.0.
2830 2023-10-21 Pan Li <pan2.li@intel.com>
2833 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Remove.
2834 * config/riscv/riscv-protos.h (vls_mode_valid_p): New func decl.
2835 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Replace
2836 macro reference to func.
2837 (vls_mode_valid_p): New func impl for vls mode valid or not.
2838 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Replace
2839 macro reference to func.
2840 * config/riscv/vector-iterators.md: Ditto.
2842 2023-10-20 Roger Sayle <roger@nextmovesoftware.com>
2843 Uros Bizjak <ubizjak@gmail.com>
2845 PR middle-end/101955
2846 PR tree-optimization/106245
2847 * config/i386/i386.md (*extv<mode>_1_0): New define_insn_and_split.
2849 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
2851 * gimple-harden-control-flow.cc: Include memmodel.h.
2853 2023-10-20 David Edelsohn <dje.gcc@gmail.com>
2855 * gimple-harden-control-flow.cc: Include tm_p.h.
2857 2023-10-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
2859 PR tree-optimization/111882
2860 * tree-if-conv.cc (get_bitfield_rep): Return NULL_TREE for bitfields
2861 with non-constant offsets.
2863 2023-10-20 Tamar Christina <tamar.christina@arm.com>
2865 PR tree-optimization/111866
2866 * tree-vect-loop-manip.cc (vect_do_peeling): Pass null as vinfo to
2867 vect_set_loop_condition during prolog peeling.
2869 2023-10-20 Richard Biener <rguenther@suse.de>
2871 PR tree-optimization/111445
2872 * tree-scalar-evolution.cc (simple_iv_with_niters):
2873 Add missing check for a sign-conversion.
2875 2023-10-20 Richard Biener <rguenther@suse.de>
2877 PR tree-optimization/110243
2878 PR tree-optimization/111336
2879 * tree-ssa-loop-ivopts.cc (strip_offset_1): Rewrite
2880 operations with undefined behavior on overflow to
2881 unsigned arithmetic.
2883 2023-10-20 Richard Biener <rguenther@suse.de>
2885 PR tree-optimization/111891
2886 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fix
2889 2023-10-20 Andrew Stubbs <ams@codesourcery.com>
2891 * config.gcc: Allow --with-arch=gfx1030.
2892 * config/gcn/gcn-hsa.h (NO_XNACK): gfx1030 does not support xnack.
2893 (ASM_SPEC): gfx1030 needs -mattr=+wavefrontsize64 set.
2894 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1030.
2895 (TARGET_GFX1030): New.
2896 (TARGET_RDNA2): New.
2897 * config/gcn/gcn-valu.md (@dpp_move<mode>): Disable for RDNA2.
2898 (addc<mode>3<exec_vcc>): Add RDNA2 syntax variant.
2899 (subc<mode>3<exec_vcc>): Likewise.
2900 (<convop><mode><vndi>2_exec): Add RDNA2 alternatives.
2901 (vec_cmp<mode>di): Likewise.
2902 (vec_cmp<u><mode>di): Likewise.
2903 (vec_cmp<mode>di_exec): Likewise.
2904 (vec_cmp<u><mode>di_exec): Likewise.
2905 (vec_cmp<mode>di_dup): Likewise.
2906 (vec_cmp<mode>di_dup_exec): Likewise.
2907 (reduc_<reduc_op>_scal_<mode>): Disable for RDNA2.
2908 (*<reduc_op>_dpp_shr_<mode>): Likewise.
2909 (*plus_carry_dpp_shr_<mode>): Likewise.
2910 (*plus_carry_in_dpp_shr_<mode>): Likewise.
2911 * config/gcn/gcn.cc (gcn_option_override): Recognise gfx1030.
2912 (gcn_global_address_p): RDNA2 only allows smaller offsets.
2913 (gcn_addr_space_legitimate_address_p): Likewise.
2914 (gcn_omp_device_kind_arch_isa): Recognise gfx1030.
2915 (gcn_expand_epilogue): Use VGPRs instead of SGPRs.
2916 (output_file_start): Configure gfx1030.
2917 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __RDNA2__;
2918 (ASSEMBLER_DIALECT): New.
2919 * config/gcn/gcn.md (rdna): New define_attr.
2920 (enabled): Use "rdna" attribute.
2921 (gcn_return): Remove s_dcache_wb.
2922 (addcsi3_scalar): Add RDNA2 syntax variant.
2923 (addcsi3_scalar_zero): Likewise.
2924 (addptrdi3): Likewise.
2925 (mulsi3): v_mul_lo_i32 should be v_mul_lo_u32 on all ISA.
2926 (*memory_barrier): Add RDNA2 syntax variant.
2927 (atomic_load<mode>): Add RDNA2 cache control variants, and disable
2928 scalar atomics for RDNA2.
2929 (atomic_store<mode>): Likewise.
2930 (atomic_exchange<mode>): Likewise.
2931 * config/gcn/gcn.opt (gpu_type): Add gfx1030.
2932 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1030): New.
2933 (main): Recognise -march=gfx1030.
2934 * config/gcn/t-omp-device: Add gfx1030 isa.
2936 2023-10-20 Richard Biener <rguenther@suse.de>
2938 PR tree-optimization/111000
2939 * stor-layout.h (element_precision): Move ..
2940 * tree.h (element_precision): .. here.
2941 * tree-ssa-loop-im.cc (movement_possibility_1): Restrict
2942 motion of shifts and rotates.
2944 2023-10-20 Alexandre Oliva <oliva@adacore.com>
2946 * tree-core.h (ECF_XTHROW): New macro.
2947 * tree.cc (set_call_expr): Add expected_throw attribute when
2949 (build_common_builtin_node): Add ECF_XTHROW to
2950 __cxa_end_cleanup and _Unwind_Resume or _Unwind_SjLj_Resume.
2951 * calls.cc (flags_from_decl_or_type): Check for expected_throw
2952 attribute to set ECF_XTHROW.
2953 * gimple.cc (gimple_build_call_from_tree): Propagate
2954 ECF_XTHROW from decl flags to gimple call...
2955 (gimple_call_flags): ... and back.
2956 * gimple.h (GF_CALL_XTHROW): New gf_mask flag.
2957 (gimple_call_set_expected_throw): New.
2958 (gimple_call_expected_throw_p): New.
2959 * Makefile.in (OBJS): Add gimple-harden-control-flow.o.
2960 * builtins.def (BUILT_IN___HARDCFR_CHECK): New.
2961 * common.opt (fharden-control-flow-redundancy): New.
2962 (-fhardcfr-check-returning-calls): New.
2963 (-fhardcfr-check-exceptions): New.
2964 (-fhardcfr-check-noreturn-calls=*): New.
2965 (Enum hardcfr_check_noreturn_calls): New.
2966 (fhardcfr-skip-leaf): New.
2967 * doc/invoke.texi: Document them.
2968 (hardcfr-max-blocks, hardcfr-max-inline-blocks): New params.
2969 * flag-types.h (enum hardcfr_noret): New.
2970 * gimple-harden-control-flow.cc: New.
2971 * params.opt (-param=hardcfr-max-blocks=): New.
2972 (-param=hradcfr-max-inline-blocks=): New.
2973 * passes.def (pass_harden_control_flow_redundancy): Add.
2974 * tree-pass.h (make_pass_harden_control_flow_redundancy):
2976 * doc/extend.texi: Document expected_throw attribute.
2978 2023-10-20 Alex Coplan <alex.coplan@arm.com>
2980 * rtl-ssa/changes.cc (function_info::change_insns): Ensure we call
2981 ::remove_insn on deleted insns.
2983 2023-10-20 Richard Biener <rguenther@suse.de>
2985 * doc/generic.texi ({L,R}ROTATE_EXPR): Document.
2987 2023-10-20 Oleg Endo <olegendo@gcc.gnu.org>
2990 * config/sh/sh.md (unnamed split pattern): Fix comparison of
2991 find_regno_note result.
2993 2023-10-20 Richard Biener <rguenther@suse.de>
2995 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Rewrite
2996 both STMT_VINFO_GATHER_SCATTER_P and VMAT_GATHER_SCATTER
2999 2023-10-20 Richard Biener <rguenther@suse.de>
3001 * tree-vect-slp.cc (off_map, off_op0_map, off_arg2_map,
3002 off_arg3_arg2_map): New.
3003 (vect_get_operand_map): Get flag whether the stmt was
3004 recognized as gather or scatter and use the above
3006 (vect_get_and_check_slp_defs): Adjust.
3007 (vect_build_slp_tree_2): Likewise.
3009 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3011 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info): Rename variables.
3012 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
3013 (pre_vsetvl::emit_vsetvl): Ditto.
3015 2023-10-20 Tamar Christina <tamar.christina@arm.com>
3016 Andre Vieira <andre.simoesdiasvieira@arm.com>
3018 * tree-if-conv.cc (if_convertible_loop_p_1): Move check from here ...
3019 (get_loop_body_if_conv_order): ... to here.
3020 (if_convertible_loop_p): Remove single_exit check.
3021 (tree_if_conversion): Move single_exit check to if-conversion part and
3022 support multiple exits.
3024 2023-10-20 Tamar Christina <tamar.christina@arm.com>
3025 Andre Vieira <andre.simoesdiasvieira@arm.com>
3027 * tree-vect-patterns.cc (vect_init_pattern_stmt): Copy STMT_VINFO_TYPE
3028 from original statement.
3029 (vect_recog_bitfield_ref_pattern): Support bitfields in gcond.
3031 2023-10-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3034 * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Adapt selftest.
3035 * config/riscv/riscv-v.cc (expand_const_vector): Change it into vec_duplicate splitter.
3037 2023-10-20 Lehua Ding <lehua.ding@rivai.ai>
3042 * config/riscv/riscv-vsetvl.cc (bitmap_union_of_preds_with_entry): New.
3044 (compute_reaching_defintion): New.
3045 (enum vsetvl_type): Moved.
3046 (vlmax_avl_p): Moved.
3047 (enum emit_type): Moved.
3048 (vlmul_to_str): Moved.
3049 (vlmax_avl_insn_p): Removed.
3050 (policy_to_str): Moved.
3051 (loop_basic_block_p): Removed.
3052 (valid_sew_p): Removed.
3053 (vsetvl_insn_p): Moved.
3054 (vsetvl_vtype_change_only_p): Removed.
3055 (after_or_same_p): Removed.
3056 (before_p): Removed.
3057 (anticipatable_occurrence_p): Removed.
3058 (available_occurrence_p): Removed.
3059 (insn_should_be_added_p): Removed.
3060 (get_all_sets): Moved.
3061 (get_same_bb_set): Moved.
3062 (gen_vsetvl_pat): Removed.
3063 (calculate_vlmul): Moved.
3064 (get_max_int_sew): New.
3065 (emit_vsetvl_insn): Removed.
3066 (get_max_float_sew): New.
3067 (eliminate_insn): Removed.
3068 (insert_vsetvl): Removed.
3069 (count_regno_occurrences): Moved.
3070 (get_vl_vtype_info): Removed.
3071 (enum def_type): Moved.
3072 (validate_change_or_fail): Moved.
3073 (change_insn): Removed.
3074 (get_all_real_uses): Moved.
3075 (get_forward_read_vl_insn): Removed.
3076 (get_backward_fault_first_load_insn): Removed.
3077 (change_vsetvl_insn): Removed.
3078 (avl_source_has_vsetvl_p): Removed.
3079 (source_equal_p): Moved.
3080 (calculate_sew): Removed.
3081 (same_equiv_note_p): Moved.
3083 (incompatible_avl_p): Removed.
3085 (different_sew_p): Removed.
3086 (get_bb_index): New.
3087 (different_lmul_p): Removed.
3088 (has_no_uses): Moved.
3089 (different_ratio_p): Removed.
3090 (different_tail_policy_p): Removed.
3091 (different_mask_policy_p): Removed.
3092 (possible_zero_avl_p): Removed.
3093 (enum demand_flags): New.
3094 (second_ratio_invalid_for_first_sew_p): Removed.
3095 (second_ratio_invalid_for_first_lmul_p): Removed.
3097 (float_insn_valid_sew_p): Removed.
3098 (second_sew_less_than_first_sew_p): Removed.
3099 (first_sew_less_than_second_sew_p): Removed.
3100 (class vsetvl_info): New.
3101 (compare_lmul): Removed.
3102 (second_lmul_less_than_first_lmul_p): Removed.
3103 (second_ratio_less_than_first_ratio_p): Removed.
3104 (DEF_INCOMPATIBLE_COND): Removed.
3105 (greatest_sew): Removed.
3106 (first_sew): Removed.
3107 (second_sew): Removed.
3108 (first_vlmul): Removed.
3109 (second_vlmul): Removed.
3110 (first_ratio): Removed.
3111 (second_ratio): Removed.
3112 (vlmul_for_first_sew_second_ratio): Removed.
3113 (vlmul_for_greatest_sew_second_ratio): Removed.
3114 (ratio_for_second_sew_first_vlmul): Removed.
3115 (class vsetvl_block_info): New.
3116 (DEF_SEW_LMUL_FUSE_RULE): New.
3117 (always_unavailable): Removed.
3118 (avl_unavailable_p): Removed.
3119 (class demand_system): New.
3120 (sew_unavailable_p): Removed.
3121 (lmul_unavailable_p): Removed.
3122 (ge_sew_unavailable_p): Removed.
3123 (ge_sew_lmul_unavailable_p): Removed.
3124 (ge_sew_ratio_unavailable_p): Removed.
3125 (DEF_UNAVAILABLE_COND): Removed.
3126 (same_sew_lmul_demand_p): Removed.
3127 (propagate_avl_across_demands_p): Removed.
3128 (reg_available_p): Removed.
3129 (support_relaxed_compatible_p): Removed.
3130 (demands_can_be_fused_p): Removed.
3131 (earliest_pred_can_be_fused_p): Removed.
3132 (vsetvl_dominated_by_p): Removed.
3133 (avl_info::avl_info): Removed.
3134 (avl_info::single_source_equal_p): Removed.
3135 (avl_info::multiple_source_equal_p): Removed.
3136 (DEF_SEW_LMUL_RULE): New.
3137 (avl_info::operator=): Removed.
3138 (avl_info::operator==): Removed.
3139 (DEF_POLICY_RULE): New.
3140 (avl_info::operator!=): Removed.
3141 (avl_info::has_non_zero_avl): Removed.
3142 (vl_vtype_info::vl_vtype_info): Removed.
3143 (vl_vtype_info::operator==): Removed.
3144 (DEF_AVL_RULE): New.
3145 (vl_vtype_info::operator!=): Removed.
3146 (vl_vtype_info::same_avl_p): Removed.
3147 (vl_vtype_info::same_vtype_p): Removed.
3148 (vl_vtype_info::same_vlmax_p): Removed.
3149 (vector_insn_info::operator>=): Removed.
3150 (vector_insn_info::operator==): Removed.
3151 (class pre_vsetvl): New.
3152 (vector_insn_info::parse_insn): Removed.
3153 (vector_insn_info::compatible_p): Removed.
3154 (vector_insn_info::skip_avl_compatible_p): Removed.
3155 (vector_insn_info::compatible_avl_p): Removed.
3156 (vector_insn_info::compatible_vtype_p): Removed.
3157 (vector_insn_info::available_p): Removed.
3158 (vector_insn_info::fuse_avl): Removed.
3159 (vector_insn_info::fuse_sew_lmul): Removed.
3160 (vector_insn_info::fuse_tail_policy): Removed.
3161 (vector_insn_info::fuse_mask_policy): Removed.
3162 (vector_insn_info::local_merge): Removed.
3163 (vector_insn_info::global_merge): Removed.
3164 (vector_insn_info::get_avl_or_vl_reg): Removed.
3165 (vector_insn_info::update_fault_first_load_avl): Removed.
3166 (vector_insn_info::dump): Removed.
3167 (vector_infos_manager::vector_infos_manager): Removed.
3168 (vector_infos_manager::create_expr): Removed.
3169 (vector_infos_manager::get_expr_id): Removed.
3170 (vector_infos_manager::all_same_ratio_p): Removed.
3171 (vector_infos_manager::all_avail_in_compatible_p): Removed.
3172 (vector_infos_manager::all_same_avl_p): Removed.
3173 (vector_infos_manager::expr_set_num): Removed.
3174 (vector_infos_manager::release): Removed.
3175 (vector_infos_manager::create_bitmap_vectors): Removed.
3176 (vector_infos_manager::free_bitmap_vectors): Removed.
3177 (vector_infos_manager::dump): Removed.
3178 (class pass_vsetvl): Adjust.
3179 (pass_vsetvl::get_vector_info): Removed.
3180 (pass_vsetvl::get_block_info): Removed.
3181 (pass_vsetvl::update_vector_info): Removed.
3182 (pass_vsetvl::update_block_info): Removed.
3183 (pre_vsetvl::compute_avl_def_data): New.
3184 (pass_vsetvl::simple_vsetvl): Removed.
3185 (pass_vsetvl::compute_local_backward_infos): Removed.
3186 (pass_vsetvl::need_vsetvl): Removed.
3187 (pass_vsetvl::transfer_before): Removed.
3188 (pass_vsetvl::transfer_after): Removed.
3189 (pre_vsetvl::compute_vsetvl_def_data): New.
3190 (pass_vsetvl::emit_local_forward_vsetvls): Removed.
3191 (pass_vsetvl::prune_expressions): Removed.
3192 (pass_vsetvl::compute_local_properties): Removed.
3193 (pre_vsetvl::compute_lcm_local_properties): New.
3194 (pass_vsetvl::earliest_fusion): Removed.
3195 (pre_vsetvl::fuse_local_vsetvl_info): New.
3196 (pass_vsetvl::vsetvl_fusion): Removed.
3197 (pass_vsetvl::can_refine_vsetvl_p): Removed.
3198 (pre_vsetvl::earliest_fuse_vsetvl_info): New.
3199 (pass_vsetvl::refine_vsetvls): Removed.
3200 (pass_vsetvl::cleanup_vsetvls): Removed.
3201 (pass_vsetvl::commit_vsetvls): Removed.
3202 (pass_vsetvl::pre_vsetvl): Removed.
3203 (pass_vsetvl::get_vsetvl_at_end): Removed.
3204 (local_avl_compatible_p): Removed.
3205 (pass_vsetvl::local_eliminate_vsetvl_insn): Removed.
3206 (pre_vsetvl::pre_global_vsetvl_info): New.
3207 (get_first_vsetvl_before_rvv_insns): Removed.
3208 (pass_vsetvl::global_eliminate_vsetvl_insn): Removed.
3209 (pre_vsetvl::emit_vsetvl): New.
3210 (pass_vsetvl::ssa_post_optimization): Removed.
3211 (pre_vsetvl::cleaup): New.
3212 (pre_vsetvl::remove_avl_operand): New.
3213 (pass_vsetvl::df_post_optimization): Removed.
3214 (pre_vsetvl::remove_unused_dest_operand): New.
3215 (pass_vsetvl::init): Removed.
3216 (pass_vsetvl::done): Removed.
3217 (pass_vsetvl::compute_probabilities): Removed.
3218 (pass_vsetvl::lazy_vsetvl): Adjust.
3219 (pass_vsetvl::execute): Adjust.
3220 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Removed.
3221 (DEF_SEW_LMUL_RULE): New.
3222 (DEF_SEW_LMUL_FUSE_RULE): Removed.
3223 (DEF_POLICY_RULE): New.
3224 (DEF_UNAVAILABLE_COND): Removed
3225 (DEF_AVL_RULE): New demand type.
3226 (sew_lmul): New demand type.
3227 (ratio_only): New demand type.
3228 (sew_only): New demand type.
3229 (ge_sew): New demand type.
3230 (ratio_and_ge_sew): New demand type.
3231 (tail_mask_policy): New demand type.
3232 (tail_policy_only): New demand type.
3233 (mask_policy_only): New demand type.
3234 (ignore_policy): New demand type.
3235 (avl): New demand type.
3236 (non_zero_avl): New demand type.
3237 (ignore_avl): New demand type.
3238 * config/riscv/t-riscv: Removed riscv-vsetvl.h
3239 * config/riscv/riscv-vsetvl.h: Removed.
3241 2023-10-20 Alexandre Oliva <oliva@adacore.com>
3243 * tree-eh.cc (make_eh_edges): Return the new edge.
3244 * tree-eh.h (make_eh_edges): Likewise.
3246 2023-10-19 Marek Polacek <polacek@redhat.com>
3248 * doc/contrib.texi: Add entry for Patrick Palka.
3250 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
3252 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Make function
3253 compatible with mask parameters in clone.
3254 * tree-vect-stmts.cc (vect_build_all_ones_mask): Allow vector boolean
3256 (vectorizable_simd_clone_call): Enable the use of masked clones in
3259 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
3261 PR tree-optimization/110485
3262 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Disable partial
3263 vectors usage if a notinbranch simdclone has been selected.
3265 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
3267 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Special case
3268 simd clone calls and only use types that are mapped to vectors.
3269 (simd_clone_call_p): New helper function.
3271 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
3273 * tree-parloops.cc (try_transform_to_exit_first_loop_alt): Accept
3274 poly NIT and ALT_BOUND.
3276 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
3278 * tree-parloops.cc (create_loop_fn): Copy specific target and
3279 optimization options to clone.
3281 2023-10-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
3283 * omp-simd-clone.cc (simd_clone_subparts): Remove.
3284 (simd_clone_init_simd_arrays): Replace simd_clone_supbarts with
3285 TYPE_VECTOR_SUBPARTS.
3286 (ipa_simd_modify_function_body): Likewise.
3287 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Likewise.
3288 (simd_clone_subparts): Remove.
3290 2023-10-19 Jason Merrill <jason@redhat.com>
3292 * ABOUT-GCC-NLS: Add usage guidance.
3294 2023-10-19 Jason Merrill <jason@redhat.com>
3296 * diagnostic-core.h (permerror): Rename new overloads...
3297 (permerror_opt): To this.
3298 * diagnostic.cc: Likewise.
3300 2023-10-19 Tamar Christina <tamar.christina@arm.com>
3302 PR tree-optimization/111860
3303 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
3304 Remove PHI nodes that dominate loop.
3306 2023-10-19 Richard Biener <rguenther@suse.de>
3308 PR tree-optimization/111131
3309 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Make
3310 sure to update all gather/scatter stmt DRs, not only those
3311 that eventually got VMAT_GATHER_SCATTER set.
3312 * tree-vect-slp.cc (_slp_oprnd_info::first_gs_info): Add.
3313 (vect_get_and_check_slp_defs): Handle gathers/scatters,
3314 adding the offset as SLP operand and comparing base and scale.
3315 (vect_build_slp_tree_1): Handle gathers.
3316 (vect_build_slp_tree_2): Likewise.
3318 2023-10-19 Richard Biener <rguenther@suse.de>
3320 * tree-vect-stmts.cc (vect_build_gather_load_calls): Rename
3322 (vect_build_one_gather_load_call): ... this. Refactor,
3323 inline widening/narrowing support ...
3324 (vectorizable_load): ... here, do gather vectorization
3325 with builtin decls along other gather vectorization.
3327 2023-10-19 Alex Coplan <alex.coplan@arm.com>
3329 * config/aarch64/aarch64.md (load_pair_dw_tftf): Rename to ...
3330 (load_pair_dw_<TX:mode><TX2:mode>): ... this.
3331 (store_pair_dw_tftf): Rename to ...
3332 (store_pair_dw_<TX:mode><TX2:mode>): ... this.
3333 * config/aarch64/iterators.md (TX2): New.
3335 2023-10-19 Alex Coplan <alex.coplan@arm.com>
3337 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new
3338 parameter to give final insn position, infer use of mem if it isn't
3339 specified explicitly.
3340 (function_info::change_insns): Pass down final insn position to
3341 finalize_new_accesses.
3342 * rtl-ssa/functions.h: Add parameter to finalize_new_accesses.
3344 2023-10-19 Alex Coplan <alex.coplan@arm.com>
3346 * rtl-ssa/accesses.cc (function_info::reparent_use): New.
3347 * rtl-ssa/functions.h (function_info): Declare new member
3348 function reparent_use.
3350 2023-10-19 Alex Coplan <alex.coplan@arm.com>
3352 * rtl-ssa/access-utils.h (drop_memory_access): New.
3354 2023-10-19 Alex Coplan <alex.coplan@arm.com>
3356 * rtl-ssa/insns.cc (function_info::add_insn_after): Ensure we
3357 update the prev pointer on the following nondebug insn in the
3358 case that !insn->is_debug_insn () && next->is_debug_insn ().
3360 2023-10-19 Haochen Jiang <haochen.jiang@intel.com>
3362 * config/i386/i386.h: Correct the ISA enabled for Arrow Lake.
3363 Also make Clearwater Forest depends on Sierra Forest.
3364 * config/i386/i386-options.cc: Revise the order of the macro
3365 definition to avoid confusion.
3366 * doc/extend.texi: Revise documentation.
3367 * doc/invoke.texi: Correct documentation.
3369 2023-10-19 Andrew Stubbs <ams@codesourcery.com>
3371 * config.gcc (amdgcn): Switch default to --with-arch=gfx900.
3372 Implement support for --with-multilib-list.
3373 * config/gcn/t-gcn-hsa: Likewise.
3374 * doc/install.texi: Likewise.
3375 * doc/invoke.texi: Mark Fiji deprecated.
3377 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
3379 * config/loongarch/loongarch.cc (loongarch_vector_costs): Inherit from
3380 vector_costs. Add a constructor.
3381 (loongarch_vector_costs::add_stmt_cost): Use adjust_cost_for_freq to
3382 adjust the cost for inner loops.
3383 (loongarch_vector_costs::count_operations): New function.
3384 (loongarch_vector_costs::determine_suggested_unroll_factor): Ditto.
3385 (loongarch_vector_costs::finish_cost): Ditto.
3386 (loongarch_builtin_vectorization_cost): Adjust.
3387 * config/loongarch/loongarch.opt (loongarch-vect-unroll-limit): New parameter.
3388 (loongarcg-vect-issue-info): Ditto.
3389 (mmemvec-cost): Delete.
3390 * config/loongarch/genopts/loongarch.opt.in
3391 (loongarch-vect-unroll-limit): Ditto.
3392 (loongarcg-vect-issue-info): Ditto.
3393 (mmemvec-cost): Delete.
3394 * doc/invoke.texi (loongarcg-vect-unroll-limit): Document new option.
3396 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
3398 * config/loongarch/lasx.md
3399 (vec_widen_<su>mult_even_v8si): New patterns.
3400 (vec_widen_<su>add_hi_<mode>): Ditto.
3401 (vec_widen_<su>add_lo_<mode>): Ditto.
3402 (vec_widen_<su>sub_hi_<mode>): Ditto.
3403 (vec_widen_<su>sub_lo_<mode>): Ditto.
3404 (vec_widen_<su>mult_hi_<mode>): Ditto.
3405 (vec_widen_<su>mult_lo_<mode>): Ditto.
3406 * config/loongarch/loongarch.md (u_bool): New iterator.
3407 * config/loongarch/loongarch-protos.h
3408 (loongarch_expand_vec_widen_hilo): New prototype.
3409 * config/loongarch/loongarch.cc
3410 (loongarch_expand_vec_interleave): New function.
3411 (loongarch_expand_vec_widen_hilo): New function.
3413 2023-10-19 Jiahao Xu <xujiahao@loongson.cn>
3415 * config/loongarch/lasx.md
3416 (avg<mode>3_ceil): New patterns.
3417 (uavg<mode>3_ceil): Ditto.
3418 (avg<mode>3_floor): Ditto.
3419 (uavg<mode>3_floor): Ditto.
3422 * config/loongarch/lsx.md
3423 (avg<mode>3_ceil): New patterns.
3424 (uavg<mode>3_ceil): Ditto.
3425 (avg<mode>3_floor): Ditto.
3426 (uavg<mode>3_floor): Ditto.
3430 2023-10-18 Andrew Pinski <pinskia@gmail.com>
3432 PR middle-end/111863
3433 * expr.cc (do_store_flag): Don't over write arg0
3434 when stripping off `& POW2`.
3436 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3438 PR tree-optimization/111648
3439 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
3440 chooses base element from arg, ensure that it's a natural stepped
3442 (build_vec_cst_rand): New param natural_stepped and use it to
3443 construct a naturally stepped sequence.
3444 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
3446 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
3448 * config/pru/pru.cc (pru_insn_cost): New function.
3449 (TARGET_INSN_COST): Define for PRU.
3451 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
3453 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
3454 Test <= instead of testing < twice.
3456 2023-10-18 Jakub Jelinek <jakub@redhat.com>
3459 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
3460 using rtx_def type for memory_extend_buf, use unsigned char
3461 arrayy with size of rtx_def and its alignment.
3463 2023-10-18 Jason Merrill <jason@redhat.com>
3465 * doc/invoke.texi: Move -fpermissive to Warning Options.
3466 * diagnostic.cc (update_effective_level_from_pragmas): Remove
3467 redundant system header check.
3468 (diagnostic_report_diagnostic): Move down syshdr/-w check.
3469 (diagnostic_impl): Handle DK_PERMERROR with an option number.
3470 (permerror): Add new overloads.
3471 * diagnostic-core.h (permerror): Declare them.
3473 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
3475 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
3476 to avoid that auxillary statement list reaches LTO.
3478 2023-10-18 Jakub Jelinek <jakub@redhat.com>
3480 PR tree-optimization/111845
3481 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
3482 statements for the 4 operand addition or subtraction of 3 operands
3483 from 1 operand cases and remove them when successful. Look for
3484 nested additions even from rhs[2], not just rhs[1].
3486 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
3489 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
3490 instead of an assert ICE when no -march= has been specified.
3492 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
3494 * config.in: Regenerate.
3495 * config/darwin.cc (darwin_file_start): Add assembler directives
3496 for the target OS version, where these are supported by the
3498 (darwin_override_options): Check for building >= macOS 10.14.
3499 * configure: Regenerate.
3500 * configure.ac: Check for assembler support of .build_version
3503 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3505 PR tree-optimization/109154
3506 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
3507 (typedef struct ifcvt_arg_entry): New.
3508 (cmp_arg_entry): New.
3509 (gen_phi_arg_condition, gen_phi_nest_statement,
3510 predicate_scalar_phi): Use them.
3512 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3514 PR tree-optimization/109154
3515 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
3516 Rewrite to new syntax.
3517 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
3520 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3522 PR tree-optimization/109154
3523 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
3525 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3527 PR tree-optimization/109154
3528 * match.pd: Add new cond_op rule.
3530 2023-10-18 Xi Ruoyao <xry111@xry111.site>
3532 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
3535 2023-10-18 Richard Biener <rguenther@suse.de>
3537 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
3538 Relax check to again allow passing integer mode masks
3539 as traditional vectors.
3541 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3543 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
3544 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
3546 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
3547 (find_guard_arg): Look value up through explicit edge and original defs.
3548 (vect_do_peeling): Use it.
3549 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
3550 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
3552 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
3553 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
3554 optional param to turn off LCSSA mode.
3556 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3558 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
3559 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
3561 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
3562 (vec_init_loop_exit_info): Extend analysis when multiple exits.
3563 (vect_analyze_loop_form): Record conds and determine main cond.
3564 (vect_create_loop_vinfo): Extend bookkeeping of conds.
3565 (vect_analyze_loop): Release conds.
3566 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
3567 LOOP_VINFO_LOOP_IV_COND): New.
3568 (struct vect_loop_form_info): Add conds, alt_loop_conds;
3569 (struct loop_vec_info): Add conds, loop_iv_cond.
3571 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3573 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
3574 (loop_distribution::distribute_loop): Bail out of not single exit.
3575 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
3576 * tree-scalar-evolution.h (get_loop_exit_condition): New.
3577 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
3579 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
3580 vect_set_loop_condition_partial_vectors_avx512,
3581 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
3583 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
3584 return new peeled corresponding peeled exit.
3585 (slpeel_can_duplicate_loop_p): Explicitly take exit.
3586 (find_loop_location): Handle not knowing an explicit exit.
3587 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
3588 find_guard_arg, slpeel_update_phi_nodes_for_loops,
3589 slpeel_update_phi_nodes_for_guard2): Use new exits.
3590 (vect_do_peeling): Update bookkeeping to keep track of exits.
3591 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
3593 (vec_init_loop_exit_info): New.
3594 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
3595 vec_epilogue_loop_iv, scalar_loop_iv.
3596 (vect_analyze_loop_form): Initialize exits.
3597 (vect_create_loop_vinfo): Set main exit.
3598 (vect_create_epilog_for_reduction, vectorizable_live_operation,
3599 vect_transform_loop): Use it.
3600 (scale_profile_for_vect_loop): Explicitly take exit to scale.
3601 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
3602 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
3603 LOOP_VINFO_SCALAR_IV_EXIT): New.
3604 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
3606 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
3607 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
3608 (vec_init_loop_exit_info): New.
3609 (struct vect_loop_form_info): Add loop_exit.
3611 2023-10-18 Tamar Christina <tamar.christina@arm.com>
3613 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
3615 (vectorizable_comparison_1): ...This.
3617 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3619 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
3620 (expand_vec_perm_const_1): Add consecutive pattern recognition.
3622 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
3624 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
3626 * common/config/i386/i386-common.cc (processor_name):
3628 (processor_alias_table): Ditto.
3629 * common/config/i386/i386-cpuinfo.h (enum processor_types):
3630 Add INTEL_PANTHERLAKE.
3631 * config.gcc: Add -march=pantherlake.
3632 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
3633 the if clause. Handle pantherlake.
3634 * config/i386/i386-c.cc (ix86_target_macros_internal):
3636 * config/i386/i386-options.cc (processor_cost_table): Ditto.
3637 (m_PANTHERLAKE): New.
3638 (m_CORE_HYBRID): Add pantherlake.
3639 * config/i386/i386.h (enum processor_type): Ditto.
3640 * doc/extend.texi: Ditto.
3641 * doc/invoke.texi: Ditto.
3643 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
3645 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
3646 * config/i386/x86-tune.def: Replace hybrid client tune to
3649 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
3651 * common/config/i386/cpuinfo.h
3652 (get_intel_cpu): Handle Clearwater Forest.
3653 * common/config/i386/i386-common.cc (processor_name):
3654 Add Clearwater Forest.
3655 (processor_alias_table): Ditto.
3656 * common/config/i386/i386-cpuinfo.h (enum processor_types):
3657 Add INTEL_CLEARWATERFOREST.
3658 * config.gcc: Add -march=clearwaterforest.
3659 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
3661 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
3662 * config/i386/i386-options.cc (processor_cost_table): Ditto.
3663 (m_CLEARWATERFOREST): New.
3664 (m_CORE_ATOM): Add clearwaterforest.
3665 * config/i386/i386.h (enum processor_type): Ditto.
3666 * doc/extend.texi: Ditto.
3667 * doc/invoke.texi: Ditto.
3669 2023-10-18 liuhongt <hongtao.liu@intel.com>
3671 * config/i386/mmx.md (fma<mode>4): New expander.
3672 (fms<mode>4): Ditto.
3673 (fnma<mode>4): Ditto.
3674 (fnms<mode>4): Ditto.
3675 (vec_fmaddsubv4hf4): Ditto.
3676 (vec_fmsubaddv4hf4): Ditto.
3678 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3681 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
3683 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
3685 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
3686 the position of the LR save slot dependent on stack clash
3687 protection unless shadow call stacks are enabled.
3689 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
3691 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
3692 store the list saved GPRs, FPRs and predicate registers.
3693 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
3694 the lists of saved registers. Use them to choose push candidates.
3695 Invalidate pop candidates if we're not going to do a pop.
3696 (aarch64_next_callee_save): Delete.
3697 (aarch64_save_callee_saves): Take a list of registers,
3698 rather than a range. Make !skip_wb select only write-back
3700 (aarch64_expand_prologue): Update calls accordingly.
3701 (aarch64_restore_callee_saves): Take a list of registers,
3702 rather than a range. Always skip pop candidates. Also skip
3703 LR if shadow call stacks are enabled.
3704 (aarch64_expand_epilogue): Update calls accordingly.
3706 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
3708 * cfgbuild.h (find_sub_basic_blocks): Declare.
3709 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
3711 (find_many_sub_basic_blocks): ...here.
3712 (find_sub_basic_blocks): New function.
3713 * function.cc (thread_prologue_and_epilogue_insns): Handle
3714 epilogues that contain jumps.
3716 2023-10-17 Andrew Pinski <apinski@marvell.com>
3718 PR tree-optimization/110817
3719 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
3720 check for boolean type as they don't have "[0,1]" range.
3722 2023-10-17 Andrew Pinski <pinskia@gmail.com>
3724 PR tree-optimization/111432
3725 * match.pd (`a & (x | CST)`): New pattern.
3727 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
3729 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
3732 2023-10-17 Richard Biener <rguenther@suse.de>
3734 PR tree-optimization/111846
3735 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
3736 (SLP_TREE_SIMD_CLONE_INFO): New.
3737 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
3738 SLP_TREE_SIMD_CLONE_INFO.
3739 (_slp_tree::~_slp_tree): Release it.
3740 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
3741 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
3742 dependent on if we're doing SLP.
3744 2023-10-17 Jakub Jelinek <jakub@redhat.com>
3746 * wide-int-print.h (print_dec_buf_size): For length, divide number
3747 of bits by 3 and add 3 instead of division by 4 and adding 4.
3748 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
3749 print_hex, instead call print_decu on either negated value after
3750 printing - or on wi itself.
3751 (print_decu): Don't call print_hex, instead print even large numbers
3753 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
3754 even if it returns false.
3755 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
3756 pp_wide_int_large should be used.
3757 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
3758 to compute needed buffer size.
3760 2023-10-17 Richard Biener <rguenther@suse.de>
3762 PR middle-end/111818
3763 * tree-ssa.cc (maybe_optimize_var): When clearing
3764 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
3766 2023-10-17 Richard Biener <rguenther@suse.de>
3768 PR tree-optimization/111807
3769 * tree-sra.cc (build_ref_for_model): Only call
3770 build_reconstructed_reference when the offsets are the same.
3772 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
3775 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
3777 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
3779 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
3780 fix impl related to vec_initv32qiv16qi template to avoid ICE.
3782 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
3783 Chenghua Xu <xuchenghua@loongson.cn>
3785 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
3788 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3790 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
3791 (get_store_value): New function.
3793 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
3795 * explow.cc (probe_stack_range): Handle case when expand_binop
3796 does not construct its result in the expected location.
3798 2023-10-16 David Malcolm <dmalcolm@redhat.com>
3800 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
3801 default for -fdiagnostics-text-art-charset from emoji to ascii.
3802 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
3804 2023-10-16 David Malcolm <dmalcolm@redhat.com>
3806 * diagnostic.cc (diagnostic_initialize): Ensure
3807 context->extra_output_kind is initialized.
3809 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
3811 * config/i386/i386.cc (ix86_can_inline_p):
3812 Handle CM_LARGE and CM_LARGE_PIC.
3813 (x86_elf_aligned_decl_common): Ditto.
3814 (x86_output_aligned_bss): Ditto.
3815 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
3816 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
3818 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
3820 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
3821 prototype. Improve comment.
3822 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
3823 into riscv-string.cc.
3824 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
3825 (riscv_expand_block_move): Likewise.
3826 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
3828 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
3829 (riscv_expand_block_move): Likewise.
3831 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
3833 * Makefile.in: Add fold-mem-offsets.o.
3834 * passes.def: Schedule a new pass.
3835 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
3836 * common.opt: New options.
3837 * doc/invoke.texi: Document new option.
3838 * fold-mem-offsets.cc: New file.
3840 2023-10-16 Andrew Pinski <pinskia@gmail.com>
3842 PR tree-optimization/101541
3843 * match.pd (A CMP 0 ? A : -A): Improve
3844 using bitwise_equal_p.
3846 2023-10-16 Andrew Pinski <pinskia@gmail.com>
3848 PR tree-optimization/31531
3849 * match.pd (~X op ~Y): Allow for an optional nop convert.
3850 (~X op C): Likewise.
3852 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
3854 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
3855 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
3857 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3859 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
3860 unsigned vector element.
3862 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3864 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
3866 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
3868 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
3870 * gimple-fold.cc (size_must_be_zero_p): Likewise.
3871 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
3872 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
3873 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
3875 2023-10-16 liuhongt <hongtao.liu@intel.com>
3877 * config/i386/mmx.md (V2FI_32): New mode iterator
3878 (movd_v2hf_to_sse): Rename to ..
3879 (movd_<mode>_to_sse): .. this.
3880 (movd_v2hf_to_sse_reg): Rename to ..
3881 (movd_<mode>_to_sse_reg): .. this.
3882 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
3884 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
3885 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
3886 (float<floatunssuffix>v2siv2hf2): Ditto.
3887 (extendv2hfv2sf2): Ditto.
3888 (truncv2sfv2hf2): Ditto.
3889 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
3890 (*vec_concat<mode>_movss): .. this.
3892 2023-10-16 liuhongt <hongtao.liu@intel.com>
3894 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
3896 (ix86_expand_round_sse4): Ditto.
3897 * config/i386/i386.md (roundhf2): New expander.
3898 (lroundhf<mode>2): Ditto.
3899 (lrinthf<mode>2): Ditto.
3900 (l<rounding_insn>hf<mode>2): Ditto.
3901 * config/i386/mmx.md (sqrt<mode>2): Ditto.
3902 (btrunc<mode>2): Ditto.
3903 (nearbyint<mode>2): Ditto.
3904 (rint<mode>2): Ditto.
3905 (lrint<mode><mmxintvecmodelower>2): Ditto.
3906 (floor<mode>2): Ditto.
3907 (lfloor<mode><mmxintvecmodelower>2): Ditto.
3908 (ceil<mode>2): Ditto.
3909 (lceil<mode><mmxintvecmodelower>2): Ditto.
3910 (round<mode>2): Ditto.
3911 (lround<mode><mmxintvecmodelower>2): Ditto.
3912 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
3913 (lfloor<mode><sseintvecmodelower>2): Ditto.
3914 (lceil<mode><sseintvecmodelower>2): Ditto.
3915 (lround<mode><sseintvecmodelower>2): Ditto.
3916 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
3917 (round<mode>2): Extend to V8HF/V16HF/V32HF.
3919 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
3921 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
3922 @code; document more completely the supported Fortran sentinels.
3924 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
3926 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
3927 instead of expand_binop. Optimize cases (i.e. avoid generating
3928 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
3929 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
3931 2023-10-15 Jakub Jelinek <jakub@redhat.com>
3933 PR tree-optimization/111800
3934 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
3935 print_decu_buf_size, print_hex_buf_size): New inline functions.
3936 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
3937 (assert_hexeq): Use print_hex_buf_size.
3938 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
3939 (print_decu): Use print_decu_buf_size.
3940 (print_hex): Use print_hex_buf_size.
3941 (pp_wide_int_large): Use print_dec_buf_size.
3942 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
3943 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
3945 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
3946 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
3948 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3950 * combine.cc (simplify_compare_const): Fix handling of unsigned
3953 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3955 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
3957 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
3959 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
3960 'omp allocate' for stack variables.
3962 2023-10-14 Jakub Jelinek <jakub@redhat.com>
3965 * tree-core.h (struct tree_base): Remove int_length.offset
3966 member, change type of int_length.unextended and int_length.extended
3967 from unsigned char to unsigned short.
3968 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
3969 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
3970 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
3971 TREE_INT_CST_NUNITS.
3972 * tree.cc (wide_int_to_tree_1): Don't assert
3973 TREE_INT_CST_OFFSET_NUNITS value.
3974 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
3975 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
3976 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
3977 (trailing_wide_int_storage): Change m_len type from unsigned char *
3978 to unsigned short *.
3979 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
3980 argument from unsigned char * to unsigned short *.
3981 (trailing_wide_ints): Change m_max_len type from unsigned char to
3982 unsigned short. Change m_len element type from
3983 struct{unsigned char len;} to unsigned short.
3984 (trailing_wide_ints <N>::operator []): Remove .len from m_len
3986 * value-range-storage.h (irange_storage::lengths_address): Change
3987 return type from const unsigned char * to const unsigned short *.
3988 (irange_storage::write_lengths_address): Change return type from
3989 unsigned char * to unsigned short *.
3990 * value-range-storage.cc (irange_storage::write_lengths_address):
3992 (irange_storage::lengths_address): Change return type from
3993 const unsigned char * to const unsigned short *.
3994 (write_wide_int): Change len argument type from unsigned char *&
3995 to unsigned short *&.
3996 (irange_storage::set_irange): Change len variable type from
3997 unsigned char * to unsigned short *.
3998 (read_wide_int): Change len argument type from unsigned char to
3999 unsigned short. Use trailing_wide_int_storage <unsigned short>
4000 instead of trailing_wide_int_storage and
4001 trailing_wide_int <unsigned short> instead of trailing_wide_int.
4002 (irange_storage::get_irange): Change len variable type from
4003 unsigned char * to unsigned short *.
4004 (irange_storage::size): Multiply n by sizeof (unsigned short)
4005 in len_size variable initialization.
4006 (irange_storage::dump): Change len variable type from
4007 unsigned char * to unsigned short *.
4009 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4011 * config/riscv/vector-iterators.md: Remove redundant iterators.
4013 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
4015 PR tree-optimization/111622
4016 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
4017 register a partial equivalence if an operand has no uses.
4019 2023-10-13 Richard Biener <rguenther@suse.de>
4021 PR tree-optimization/111795
4022 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
4023 integer mode mask arguments.
4025 2023-10-13 Richard Biener <rguenther@suse.de>
4027 * tree-vect-slp.cc (mask_call_maps): New.
4028 (vect_get_operand_map): Handle IFN_MASK_CALL.
4029 (vect_build_slp_tree_1): Likewise.
4030 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
4033 2023-10-13 Richard Biener <rguenther@suse.de>
4035 PR tree-optimization/111779
4036 * tree-sra.cc (sra_handled_bf_read_p): New function.
4037 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
4038 (sra_modify_expr): Likewise.
4039 (make_fancy_name_1): Skip over BIT_FIELD_REF.
4041 2023-10-13 Richard Biener <rguenther@suse.de>
4043 PR tree-optimization/111773
4044 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
4045 not elide noreturn calls that are reflected to the IL.
4047 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
4049 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
4051 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
4053 2023-10-13 Pan Li <pan2.li@intel.com>
4055 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
4056 pattern for lfloor/lfloorf.
4057 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
4058 (expand_vec_lfloor): New func decl for expanding lfloor.
4059 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
4060 for expanding lfloor.
4062 2023-10-13 Pan Li <pan2.li@intel.com>
4064 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
4065 pattern] for lceil/lceilf.
4066 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
4067 (expand_vec_lceil): New func decl for expanding lceil.
4068 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
4069 for expanding lceil.
4071 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
4074 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
4075 code from shifts that are undefined.
4076 (can_be_built_by_li_lis_and_rldicr): Likewise.
4077 (can_be_built_by_li_and_rldic): Protect code from shifts that
4078 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
4080 2023-10-12 Alex Coplan <alex.coplan@arm.com>
4082 * reg-notes.def (NOALIAS): Correct comment.
4084 2023-10-12 Jakub Jelinek <jakub@redhat.com>
4087 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
4089 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
4090 (wi::ints_for): Provide separate partial specializations for
4091 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
4092 and CONST_PRECISION, rather than using
4093 int_traits <extended_tree <N> >::precision_type as the second template
4095 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
4097 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
4100 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
4102 PR middle-end/111777
4103 * doc/extend.texi: Change subsubsection to subsection for
4106 2023-10-12 Tamar Christina <tamar.christina@arm.com>
4108 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
4110 2023-10-12 Jakub Jelinek <jakub@redhat.com>
4112 * wide-int.h (widest_int_storage <N>::write_val): If l is small
4113 and there is space in u.val array, store a canary value at the
4115 (widest_int_storage <N>::set_len): Check the canary hasn't been
4118 2023-10-12 Jakub Jelinek <jakub@redhat.com>
4121 * wide-int.h: Adjust file comment.
4122 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
4123 (WIDE_INT_MAX_INL_PRECISION): Define.
4124 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
4125 is smaller than WIDE_INT_MAX_ELTS.
4126 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
4127 WIDEST_INT_MAX_PRECISION): Define.
4128 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
4129 to pass 0 as a new argument.
4130 (class widest_int_storage): Likewise.
4131 (widest_int, widest2_int): Change typedefs to use widest_int_storage
4132 rather than fixed_wide_int_storage.
4133 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
4134 (struct binary_traits): Add partial specializations for
4135 INL_CONST_PRECISION.
4136 (generic_wide_int): Add needs_write_val_arg static data member.
4137 (int_traits): Likewise.
4138 (wide_int_storage): Replace val non-static data member with a union
4139 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
4140 assignment operator and destructor. Add unsigned int argument to
4142 (wide_int_storage::wide_int_storage): Initialize precision to 0
4143 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
4144 Assert in non-default ctor T's precision_type is not
4145 INL_CONST_PRECISION and allocate u.valp for large precision. Add
4147 (wide_int_storage::~wide_int_storage): New.
4148 (wide_int_storage::operator=): Add copy assignment operator. In
4149 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
4150 assert ctor T's precision_type is not INL_CONST_PRECISION and
4151 if precision changes, deallocate and/or allocate u.valp.
4152 (wide_int_storage::get_val): Return u.valp rather than u.val for
4154 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
4156 (wide_int_storage::set_len): Use write_val instead of writing val
4158 (wide_int_storage::from, wide_int_storage::from_array): Adjust
4160 (wide_int_storage::create): Allocate u.valp for large precisions.
4161 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
4162 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
4164 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
4165 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
4166 Adjust write_val callers.
4167 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
4168 (WIDEST_INT): Define.
4169 (widest_int_storage): New template class.
4170 (wi::int_traits <widest_int_storage>): New.
4171 (trailing_wide_int_storage::write_val): Add unused unsigned int
4173 (wi::get_binary_precision): Use
4174 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
4175 rather than get_precision on get_binary_result.
4176 (wi::copy): Adjust write_val callers. Don't call set_len if
4177 needs_write_val_arg.
4178 (wi::bit_not): If result.needs_write_val_arg, call write_val
4179 again with upper bound estimate of len.
4180 (wi::sext, wi::zext, wi::set_bit): Likewise.
4181 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
4182 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
4183 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
4184 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
4185 wi::lshift, wi::lrshift, wi::arshift): Likewise.
4186 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
4188 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
4189 generic_wide_int, instead add functions and templates for each
4190 storage of generic_wide_int. Make functions for
4191 generic_wide_int <wide_int_storage> and templates for
4192 generic_wide_int <widest_int_storage <N>> deleted.
4193 (wi::mask, wi::shifted_mask): Adjust write_val calls.
4194 * wide-int.cc (zeros): Decrease array size to 1.
4195 (BLOCKS_NEEDED): Use CEIL.
4196 (canonize): Use HOST_WIDE_INT_M1.
4197 (wi::from_buffer): Pass 0 to write_val.
4198 (wi::to_mpz): Use CEIL.
4199 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
4200 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
4201 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
4202 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
4203 above WIDE_INT_MAX_INL_PRECISION estimate precision from
4204 lengths of operands. Use XALLOCAVEC allocated buffers for
4205 prec above WIDE_INT_MAX_INL_PRECISION.
4206 (wi::divmod_internal): Likewise.
4207 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
4208 it from xlen and skip.
4209 (rshift_large_common): Remove xprecision argument, add len
4210 argument with len computed in caller. Don't return anything.
4211 (wi::lrshift_large, wi::arshift_large): Compute len here
4212 and pass it to rshift_large_common, for lengths above
4213 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
4214 (assert_deceq, assert_hexeq): For lengths above
4215 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
4216 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
4217 WIDE_INT_MAX_PRECISION.
4218 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
4219 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
4220 * wide-int-print.cc (print_decs, print_decu, print_hex): For
4221 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
4222 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
4223 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
4224 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
4225 WIDE_INT_MAX_PRECISION.
4226 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
4227 instead of hard coded CONST_PRECISION.
4228 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
4229 WIDE_INT_MAX_PRECISION.
4230 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
4231 than WIDE_INT_MAX_PRECISION.
4232 (wi::ints_for::zero): Use
4233 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
4234 wi::CONST_PRECISION.
4235 * tree.cc (build_replicated_int_cst): Formatting fix. Use
4236 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
4237 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
4238 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
4239 * double-int.h (wi::int_traits <double_int>::precision_type): Change
4240 to INL_CONST_PRECISION from CONST_PRECISION.
4241 * poly-int.h (struct poly_coeff_traits): Add partial specialization
4242 for wi::INL_CONST_PRECISION.
4243 * cfgloop.h (bound_wide_int): New typedef.
4244 (struct nb_iter_bound): Change bound type from widest_int to
4246 (struct loop): Change nb_iterations_upper_bound,
4247 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
4248 widest_int to bound_wide_int.
4249 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
4250 of i_bound is too large for bound_wide_int. Adjustments for the
4251 widest_int to bound_wide_int type change in non-static data members.
4252 (get_estimated_loop_iterations, get_max_loop_iterations,
4253 get_likely_max_loop_iterations): Adjustments for the widest_int to
4254 bound_wide_int type change in non-static data members.
4255 * tree-vect-loop.cc (vect_transform_loop): Likewise.
4256 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
4257 XALLOCAVEC allocated buffer for i_bound len above
4258 WIDE_INT_MAX_INL_ELTS.
4259 (record_estimate): Return early if wi::min_precision of i_bound is too
4260 large for bound_wide_int. Adjustments for the widest_int to
4261 bound_wide_int type change in non-static data members.
4262 (wide_int_cmp): Use bound_wide_int instead of widest_int.
4263 (bound_index): Use bound_wide_int instead of widest_int.
4264 (discover_iteration_bound_by_body_walk): Likewise. Use
4265 widest_int::from to convert it to widest_int when passed to
4267 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
4268 widest_int when passed to record_niter_bound.
4269 (estimate_numbers_of_iteration): Don't record upper bound if
4270 loop->nb_iterations has too large precision for bound_wide_int.
4271 (n_of_executions_at_most): Use widest_int::from.
4272 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
4273 the widest_int to bound_wide_int changes.
4274 * match.pd (fold_sign_changed_comparison simplification): Use
4275 wide_int::from on wi::to_wide instead of wi::to_widest.
4276 * value-range.h (irange::maybe_resize): Avoid using memcpy on
4277 non-trivially copyable elements.
4278 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
4279 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
4280 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
4281 Use wide_int::from on wi::to_wide instead of wi::to_widest.
4282 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
4283 before calling wi::udiv_trunc.
4284 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
4285 bound_wide_int type change in non-static data members.
4286 * lto-streamer-in.cc (input_cfg): Likewise.
4287 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
4288 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
4289 XALLOCAVEC allocated buffer. Formatting fix.
4290 * data-streamer-in.cc (streamer_read_wide_int,
4291 streamer_read_widest_int): Likewise.
4292 * tree-affine.cc (aff_combination_expand): Use placement new to
4293 construct name_expansion.
4294 (free_name_expansion): Destruct name_expansion.
4295 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
4296 index type from widest_int to offset_int.
4297 (class incr_info_d): Change incr type from widest_int to offset_int.
4298 (alloc_cand_and_find_basis, backtrace_base_for_ref,
4299 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
4300 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
4301 slsr_process_add, cand_abs_increment, replace_mult_candidate,
4302 replace_unconditional_candidate, incr_vec_index,
4303 create_add_on_incoming_edge, create_phi_basis_1,
4304 replace_conditional_candidate, record_increment,
4305 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
4306 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
4307 nearest_common_dominator_for_cands, insert_initializers,
4308 all_phi_incrs_profitable_1, replace_one_candidate,
4309 replace_profitable_candidates): Use offset_int rather than widest_int
4310 and wi::to_offset rather than wi::to_widest.
4311 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
4312 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
4314 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
4315 to construct tree_niter_desc and destruct it on failure.
4316 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
4317 * gengtype.cc (main): Remove widest_int handling.
4318 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
4319 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
4320 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
4321 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
4322 assert get_len () fits into it.
4323 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
4324 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
4326 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
4327 wide_int::from on wi::to_wide instead of wi::to_widest.
4328 * omp-general.cc (score_wide_int): New typedef.
4329 (omp_context_compute_score): Use score_wide_int instead of widest_int
4330 and adjust for those changes.
4331 (struct omp_declare_variant_entry): Change score and
4332 score_in_declare_simd_clone non-static data member type from widest_int
4334 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
4335 score_wide_int instead of widest_int and adjust for those changes.
4336 (omp_lto_output_declare_variant_alt): Likewise.
4337 (omp_lto_input_declare_variant_alt): Likewise.
4338 * godump.cc (go_output_typedef): Assert get_len () is smaller than
4339 WIDE_INT_MAX_INL_ELTS.
4341 2023-10-12 Pan Li <pan2.li@intel.com>
4343 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
4344 pattern for lround/lroundf.
4345 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
4346 (expand_vec_lround): New func decl for expanding lround.
4347 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
4348 for expanding lround.
4350 2023-10-12 Jakub Jelinek <jakub@redhat.com>
4352 * dwarf2out.h (wide_int_ptr): Remove.
4353 (dw_wide_int_ptr): New typedef.
4354 (struct dw_val_node): Change type of val_wide from wide_int_ptr
4356 (struct dw_wide_int): New type.
4357 (dw_wide_int::elt): New method.
4358 (dw_wide_int::operator ==): Likewise.
4359 * dwarf2out.cc (get_full_len): Change argument type to
4360 const dw_wide_int & from const wide_int &. Use CEIL. Call
4361 get_precision method instead of calling wi::get_precision.
4362 (alloc_dw_wide_int): New function.
4363 (add_AT_wide): Change w argument type to const wide_int_ref &
4364 from const wide_int &. Use alloc_dw_wide_int.
4365 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
4366 (insert_wide_int): Change val argument type to const wide_int_ref &
4367 from const wide_int &.
4368 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
4369 add_AT_wide instead of using a temporary variable.
4371 2023-10-12 Richard Biener <rguenther@suse.de>
4373 PR tree-optimization/111764
4374 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
4375 to allow x + x via special-casing of assigns.
4377 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
4379 * common/config/i386/cpuinfo.h (get_available_features):
4381 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
4382 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
4383 (ix86_handle_option): Handle -musermsr.
4384 * common/config/i386/i386-cpuinfo.h (enum processor_features):
4385 Add FEATURE_USER_MSR.
4386 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
4387 * config.gcc: Add usermsrintrin.h
4388 * config/i386/cpuid.h (bit_USER_MSR): New.
4389 * config/i386/i386-builtin-types.def:
4390 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
4391 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
4392 Add __builtin_urdmsr and __builtin_uwrmsr.
4393 * config/i386/i386-builtins.h (ix86_builtins):
4394 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
4395 * config/i386/i386-c.cc (ix86_target_macros_internal):
4396 Define __USER_MSR__.
4397 * config/i386/i386-expand.cc (ix86_expand_builtin):
4398 Handle new builtins.
4399 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
4400 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
4402 * config/i386/i386.md (urdmsr): New define_insn.
4404 * config/i386/i386.opt: Add option -musermsr.
4405 * config/i386/x86gprintrin.h: Include usermsrintrin.h
4406 * doc/extend.texi: Document usermsr.
4407 * doc/invoke.texi: Document -musermsr.
4408 * doc/sourcebuild.texi: Document target usermsr.
4409 * config/i386/usermsrintrin.h: New file.
4411 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
4413 * config.gcc: Add loongarch-driver.h to tm_files.
4414 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
4415 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
4416 instead of $(TM_H) for building generator programs.
4418 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4421 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
4422 instruction emission and incorporate to stack_protect_set<mode>.
4423 (stack_protect_setdi): Rename to ...
4424 (stack_protect_set<mode>): ... this, adjust constraint.
4425 (stack_protect_testsi): Support prefixed instruction emission and
4426 incorporate to stack_protect_test<mode>.
4427 (stack_protect_testdi): Rename to ...
4428 (stack_protect_test<mode>): ... this, adjust constraint.
4430 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4432 * tree-vect-stmts.cc (vectorizable_store): Consider generated
4433 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
4436 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4438 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
4439 (vectorizable_store): Adjust the costing for the remaining memory
4440 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
4442 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4444 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
4445 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
4447 (vectorizable_store): Adjust the cost handling on
4448 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
4450 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4452 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
4453 get VMAT_LOAD_STORE_LANES.
4454 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
4455 without calling vect_model_store_cost. Factor out new lambda function
4456 update_prologue_cost.
4458 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4460 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
4461 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
4463 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
4464 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
4466 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4468 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
4469 vectorizable_scan_store without calling vect_model_store_cost
4472 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4474 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
4475 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
4476 handlings and the related parameter gs_info.
4477 (vect_build_scatter_store_calls): Add the handlings on costing with
4478 one more argument cost_vec.
4479 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
4480 without calling vect_model_store_cost any more.
4482 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4484 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
4485 to vect_model_store_cost down to some different transform paths
4486 according to the handlings of different vect_memory_access_types
4487 or some special handling need.
4489 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
4491 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
4492 vector store for some case of VMAT_ELEMENTWISE is supported.
4494 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
4495 Hu Lin1 <lin1.hu@intel.com>
4496 Hongyu Wang <hongyu.wang@intel.com>
4498 * config/i386/i386.cc (gen_push2): New function to emit push2
4499 and adjust cfa offset.
4500 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
4501 determine whether push2/pop2 can be used.
4502 (ix86_compute_frame_layout): Adjust preferred stack boundary
4503 and stack alignment needed for push2/pop2.
4504 (ix86_emit_save_regs): Emit push2 when available.
4505 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
4506 and adjust cfa info.
4507 (ix86_emit_restore_regs_using_pop2): New function to loop
4508 through the saved regs and call above.
4509 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
4510 when push2pop2 available.
4511 * config/i386/i386.md (push2_di): New pattern for push2.
4512 (pop2_di): Likewise for pop2.
4514 2023-10-12 Pan Li <pan2.li@intel.com>
4516 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
4517 (lrint<mode><v_i_l_ll_convert>2): Rename to.
4518 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
4520 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
4522 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
4524 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
4526 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
4527 pseudo op instead of a "call" pseudo op.
4529 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
4531 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
4533 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
4534 (riscv_subset_list::clone): Ditto.
4535 (riscv_subset_list::parse_single_ext): Ditto.
4536 (riscv_subset_list::set_loc): Ditto.
4537 (riscv_set_arch_by_subset_list): Ditto.
4538 * common/config/riscv/riscv-common.cc
4539 (riscv_subset_list::parse_single_std_ext): New.
4540 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
4541 (riscv_subset_list::clone): Ditto.
4542 (riscv_subset_list::parse_single_ext): Ditto.
4543 (riscv_subset_list::set_loc): Ditto.
4544 (riscv_set_arch_by_subset_list): Ditto.
4546 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
4548 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
4549 from argument rather than get setting from global setting.
4550 (riscv_override_options_internal): New, splited from
4551 riscv_override_options, also take a gcc_options argument.
4552 (riscv_option_override): Splited most part to
4553 riscv_override_options_internal.
4555 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
4557 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
4558 TARGET_<NAME>_OPTS_P.
4559 (InverseMask): Ditto.
4560 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
4561 TARGET_<NAME>_OPTS_P macro.
4562 (InverseMask): Ditto.
4564 2023-10-11 Andrew Pinski <pinskia@gmail.com>
4566 PR tree-optimization/111282
4567 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
4568 `a & ((~a) ^ b)`): New patterns.
4570 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
4572 * common/config/riscv/riscv-common.cc: Add the XCValu
4574 * config/riscv/constraints.md: Add builtins for the XCValu
4576 * config/riscv/predicates.md (immediate_register_operand):
4578 * config/riscv/corev.def: Likewise.
4579 * config/riscv/corev.md: Likewise.
4580 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
4581 (RISCV_ATYPE_UHI): Likewise.
4582 * config/riscv/riscv-ftypes.def: Likewise.
4583 * config/riscv/riscv.opt: Likewise.
4584 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
4585 * doc/extend.texi: Add XCValu documentation.
4586 * doc/sourcebuild.texi: Likewise.
4588 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
4590 * common/config/riscv/riscv-common.cc: Add XCVmac.
4591 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
4592 * config/riscv/riscv-builtins.cc: Likewise.
4593 * config/riscv/riscv.md: Likewise.
4594 * config/riscv/riscv.opt: Likewise.
4595 * doc/extend.texi: Add XCVmac builtin documentation.
4596 * doc/sourcebuild.texi: Likewise.
4597 * config/riscv/corev.def: New file.
4598 * config/riscv/corev.md: New file.
4600 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4602 * config/riscv/autovec.md: Fix index bug.
4603 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
4604 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
4605 (gather_scatter_valid_offset_mode_p): New function.
4607 2023-10-11 Pan Li <pan2.li@intel.com>
4609 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
4611 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
4613 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
4615 (expand_vec_lrint): New function impl for expanding lint.
4616 * config/riscv/vector-iterators.md: New mode attr and iterator.
4618 2023-10-11 Richard Biener <rguenther@suse.de>
4619 Jakub Jelinek <jakub@redhat.com>
4621 PR tree-optimization/111519
4622 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
4623 argument and pass it through to recursive calls and
4624 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
4625 change stmt for gimple_assign_single_p statements for which we don't
4627 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
4628 it through to recursive calls and count_nonzero_bytes calls. Don't
4629 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
4630 shadow the stmt argument.
4632 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
4634 PR middle-end/101955
4635 PR tree-optimization/106245
4636 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
4637 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
4639 2023-10-11 liuhongt <hongtao.liu@intel.com>
4642 * config/i386/mmx.md (divv4hf3): Refine predicate of
4643 operands[2] with register_operand.
4645 2023-10-10 Andrew Waterman <andrew@sifive.com>
4646 Philipp Tomsich <philipp.tomsich@vrull.eu>
4647 Jeff Law <jlaw@ventanamicro.com>
4649 * config/riscv/riscv.cc (struct machine_function): Track if a
4650 far-branch/jump is used within a function (and $ra needs to be
4652 (riscv_print_operand): Implement 'N' (inverse integer branch).
4653 (riscv_far_jump_used_p): Implement.
4654 (riscv_save_return_addr_reg_p): New function.
4655 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
4656 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
4657 (CALL_USED_REGISTERS): Update $ra.
4658 * config/riscv/riscv.md: Add new types "ret" and "jalr".
4659 (length attribute): Handle long conditional and unconditional
4661 (conditional branch pattern): Handle case where jump can not
4662 reach the intended target.
4663 (indirect_jump, tablejump): Use new "jalr" type.
4664 (simple_return): Use new "ret" type.
4665 (simple_return_internal, eh_return_internal): Likewise.
4666 (gpr_restore_return, riscv_mret): Likewise.
4667 (riscv_uret, riscv_sret): Likewise.
4668 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
4670 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
4672 2023-10-10 Andrew Pinski <pinskia@gmail.com>
4674 PR tree-optimization/111679
4675 * match.pd (`a | ((~a) ^ b)`): New pattern.
4677 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4680 * config/riscv/autovec.md: Add VLS BOOL modes.
4682 2023-10-10 Richard Biener <rguenther@suse.de>
4684 PR tree-optimization/111751
4685 * fold-const.cc (fold_view_convert_expr): Up the buffer size
4687 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
4688 constants, giving up when re-interpretation to the target type
4691 2023-10-10 Richard Biener <rguenther@suse.de>
4693 PR tree-optimization/111751
4694 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
4695 BLKmode result from the padding bits check.
4697 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
4699 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
4701 * config/arc/arc.md (addsi_compare): Make pattern canonical.
4702 (addsi_compare_2): Fix identation, constraint letters.
4703 (addsi_compare_3): Likewise.
4705 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
4707 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
4708 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
4709 when scaling loop profile
4711 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
4713 PR tree-optimization/111694
4714 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
4716 * value-relation.cc (adjust_equivalence_range): New.
4717 * value-relation.h (adjust_equivalence_range): New prototype.
4719 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
4721 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
4722 not call get_identity_relation.
4723 (gori_compute::compute_operand2_range): Ditto.
4724 * value-relation.cc (get_identity_relation): Remove.
4725 * value-relation.h (get_identity_relation): Remove protyotype.
4727 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
4729 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
4730 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
4732 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
4734 (TARGET_SCHED_ADJUST_COST): Define.
4735 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
4736 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
4737 * config/riscv/generic-ooo.md: New file.
4738 * config/riscv/vector.md: Add vsetvl_pre.
4740 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4742 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
4743 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
4744 * config/riscv/vector.md (movmisalign<mode>): New pattern.
4746 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
4748 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
4749 directives for store-pair instruction.
4751 2023-10-09 Richard Biener <rguenther@suse.de>
4753 PR tree-optimization/111715
4754 * alias.cc (reference_alias_ptr_type_1): When we have
4755 a type-punning ref at the base search for the access
4756 path part that's still semantically valid.
4758 2023-10-09 Pan Li <pan2.li@intel.com>
4760 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
4762 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
4764 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
4766 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
4767 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
4769 (ix86_split_lshr): Likewise, split shifts by one bit into
4770 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
4771 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
4772 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
4773 (rcrdi2): New define_insn for rcrq.
4774 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
4775 set the carry flag from the least significant bit, modelled using
4777 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
4778 controlling use of rcr 1 vs. shrd, which is significantly faster on
4781 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
4783 * config/i386/i386.opt: Allow -mno-evex512.
4785 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
4786 Hu, Lin1 <lin1.hu@intel.com>
4788 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
4791 (VFH_AVX512VL): Ditto.
4793 (VHF_AVX512VL): Ditto.
4794 (VI2H_AVX512VL): Ditto.
4795 (VI2F_256_512): Ditto.
4796 (VF48_I1248): Remove unused iterator.
4797 (VF48H_AVX512VL): Add TARGET_EVEX512.
4798 (VF_AVX512): Remove unused iterator.
4799 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
4800 (REDUC_SMINMAX_MODE): Ditto.
4802 (VFH_SF_AVX512VL): Ditto.
4803 (VEC_PERM_AVX2): Ditto.
4805 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
4806 Hu, Lin1 <lin1.hu@intel.com>
4808 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
4810 (VI1_AVX512F): Ditto.
4811 (VI1_AVX512VNNI): Ditto.
4812 (VI1_AVX512VL_F): Ditto.
4813 (VI12_VI48F_AVX512VL): Ditto.
4814 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
4815 (sdot_prod<mode>): Ditto.
4816 (VEC_PERM_AVX2): Ditto.
4819 (vpmadd52<vpmadd52type>v8di): Ditto.
4820 (usdot_prod<mode>): Ditto.
4821 (vpdpbusd_v16si): Ditto.
4822 (vpdpbusds_v16si): Ditto.
4823 (vpdpwssd_v16si): Ditto.
4824 (vpdpwssds_v16si): Ditto.
4825 (VI48_AVX512VP2VL): Ditto.
4826 (avx512vp2intersect_2intersectv16si): Ditto.
4827 (VF_AVX512BF16VL): Ditto.
4828 (VF1_AVX512_256): Ditto.
4830 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
4832 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
4833 Make sure there is EVEX512 enabled.
4834 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
4835 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
4836 when !TARGET_EVEX512.
4837 * config/i386/i386.md (avx512bw_512): New.
4838 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
4839 (*zero_extendsidi2): Change isa to avx512bw_512.
4842 (*andn<mode>_1): Change isa to kmov_isa.
4843 (*<code><mode>_1): Ditto.
4844 (*notxor<mode>_1): Ditto.
4845 (*one_cmpl<mode>2_1): Ditto.
4846 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
4847 (*ashl<mode>3_1): Change isa to kmov_isa.
4848 (*lshr<mode>3_1): Ditto.
4849 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
4850 (VI1248_AVX512VLBW): Ditto.
4851 (VHFBF_AVX512VL): Ditto.
4855 (VI1_AVX512): Ditto.
4856 (VI12_256_512_AVX512VL): Ditto.
4857 (VI2_AVX2_AVX512BW): Ditto.
4858 (VI2_AVX512VNNIBW): Ditto.
4859 (VI2_AVX512VL): Ditto.
4860 (VI2HFBF_AVX512VL): Ditto.
4861 (VI8_AVX2_AVX512BW): Ditto.
4862 (VIMAX_AVX2_AVX512BW): Ditto.
4863 (VIMAX_AVX512VL): Ditto.
4864 (VI12_AVX2_AVX512BW): Ditto.
4865 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
4866 (VI248_AVX512VL): Ditto.
4867 (VI248_AVX512VLBW): Ditto.
4868 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
4869 (VI248_AVX512BW): Ditto.
4870 (VI248_AVX512BW_AVX512VL): Ditto.
4872 (VI124_256_AVX512F_AVX512BW): Ditto.
4873 (VI_AVX512BW): Ditto.
4874 (VIHFBF_AVX512BW): Ditto.
4875 (SWI1248_AVX512BWDQ): Ditto.
4876 (SWI1248_AVX512BW): Ditto.
4877 (SWI1248_AVX512BWDQ2): Ditto.
4878 (*knotsi_1_zext): Ditto.
4879 (define_split for zero_extend + not): Ditto.
4881 (REDUC_SMINMAX_MODE): Ditto.
4882 (VEC_EXTRACT_MODE): Ditto.
4883 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
4884 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
4885 (truncv32hiv32qi2): Ditto.
4886 (avx512bw_<code>v32hiv32qi2): Ditto.
4887 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
4888 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
4890 (VEC_PERM_AVX2): Ditto.
4891 (AVX512ZEXTMASK): Ditto.
4893 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
4894 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
4895 (avx512bw_packssdw<mask_name>): Ditto.
4896 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
4897 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
4898 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
4899 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
4900 (vec_unpacks_lo_di): Ditto.
4902 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
4903 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
4904 (VI1248_AVX512VL_AVX512BW): Ditto.
4905 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
4906 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
4907 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
4908 (<insn>v32qiv32hi2): Ditto.
4909 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
4910 (VPERMI2): Add TARGET_EVEX512.
4913 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
4915 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
4916 Add TARGET_EVEX512 for 512 bit usage.
4917 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
4918 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
4919 (VF1_128_256VL): Ditto.
4920 (VF2_AVX512VL): Ditto.
4921 (VI8_256_512): Ditto.
4922 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
4924 (AVX512_VEC): Ditto.
4925 (AVX512_VEC_2): Ditto.
4926 (VI4F_BRCST32x2): Ditto.
4927 (VI8F_BRCST64x2): Ditto.
4929 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
4931 * config/i386/i386-builtins.cc
4932 (ix86_vectorize_builtin_gather): Disable 512 bit gather
4933 when !TARGET_EVEX512.
4934 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
4936 (ix86_expand_int_sse_cmp): Ditto.
4937 (ix86_expand_vector_init_one_nonzero): Disable subroutine
4938 when !TARGET_EVEX512.
4939 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
4940 (ix86_vectorize_vec_perm_const): Disable subroutine when
4942 * config/i386/i386.cc
4943 (standard_sse_constant_p): Add TARGET_EVEX512.
4944 (standard_sse_constant_opcode): Ditto.
4945 (ix86_get_ssemov): Ditto.
4946 (ix86_legitimate_constant_p): Ditto.
4947 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
4948 when !TARGET_EVEX512.
4949 * config/i386/i386.md (avx512f_512): New.
4950 (movxi): Add TARGET_EVEX512.
4951 (*movxi_internal_avx512f): Ditto.
4952 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
4954 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
4956 (*movhi_internal): Change alternative 11 to *Yv.
4957 (*movdf_internal): Change alternative 12 to Yv.
4958 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
4959 alternative 5 and 6.
4960 (*mov<mode>_internal): Change alternative 4 to Yv.
4961 (define_split for convert SF to DF): Add TARGET_EVEX512.
4962 (extendbfsf2_1): Ditto.
4963 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
4964 for 512 bit when !TARGET_EVEX512.
4965 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
4966 (V48_AVX512VL): Ditto.
4967 (V48_256_512_AVX512VL): Ditto.
4968 (V48H_AVX512VL): Ditto.
4969 (VI12_AVX512VL): Ditto.
4974 (VF1_VF2_AVX512DQ): Ditto.
4981 (VF2_512_256): Ditto.
4982 (VF2_512_256VL): Ditto.
4985 (VI48_AVX512VL): Ditto.
4986 (VI1248_AVX512VLBW): Ditto.
4987 (VF_AVX512VL): Ditto.
4988 (VFH_AVX512VL): Ditto.
4989 (VF1_AVX512VL): Ditto.
4994 (VI8_AVX512VL): Ditto.
4995 (VI2_AVX512F): Ditto.
4996 (VI4_AVX512F): Ditto.
4997 (VI4_AVX512VL): Ditto.
4998 (VI48_AVX512F_AVX512VL): Ditto.
4999 (VI8_AVX2_AVX512F): Ditto.
5000 (VI8_AVX_AVX512F): Ditto.
5003 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
5004 (VI248_AVX512VLBW): Ditto.
5005 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
5006 (VI248_AVX512BW): Ditto.
5007 (VI248_AVX512BW_AVX512VL): Ditto.
5008 (VI48_AVX512F): Ditto.
5009 (VI48_AVX_AVX512F): Ditto.
5010 (VI12_AVX_AVX512F): Ditto.
5012 (VI124_256_AVX512F_AVX512BW): Ditto.
5014 (VI_AVX512BW): Ditto.
5015 (VIHFBF_AVX512BW): Ditto.
5016 (VI4F_256_512): Ditto.
5017 (VI48F_256_512): Ditto.
5019 (VI12_VI48F_AVX512VL): Ditto.
5021 (AVX512MODE2P): Ditto.
5022 (STORENT_MODE): Ditto.
5023 (REDUC_PLUS_MODE): Ditto.
5024 (REDUC_SMINMAX_MODE): Ditto.
5025 (*andnot<mode>3): Change isa attribute to avx512f_512.
5026 (*andnot<mode>3): Ditto.
5027 (<code><mode>3): Ditto.
5029 (FMAMODEM): Add TARGET_EVEX512.
5030 (FMAMODE_AVX512): Ditto.
5031 (VFH_SF_AVX512VL): Ditto.
5032 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
5033 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
5035 (avx512f_cvtdq2pd512_2): Ditto.
5036 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
5037 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
5039 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
5040 (vec_unpacks_lo_v16sf): Ditto.
5041 (vec_unpacks_hi_v16sf): Ditto.
5042 (vec_unpacks_float_hi_v16si): Ditto.
5043 (vec_unpacks_float_lo_v16si): Ditto.
5044 (vec_unpacku_float_hi_v16si): Ditto.
5045 (vec_unpacku_float_lo_v16si): Ditto.
5046 (vec_pack_sfix_trunc_v8df): Ditto.
5047 (avx512f_vec_pack_sfix_v8df): Ditto.
5048 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
5049 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
5050 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
5051 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
5052 (AVX512_VEC): Ditto.
5053 (AVX512_VEC_2): Ditto.
5054 (vec_extract_lo_v64qi): Ditto.
5055 (vec_extract_hi_v64qi): Ditto.
5056 (VEC_EXTRACT_MODE): Ditto.
5057 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
5058 (avx512f_movddup512<mask_name>): Ditto.
5059 (avx512f_unpcklpd512<mask_name>): Ditto.
5060 (*<avx512>_vternlog<mode>_all): Ditto.
5061 (*<avx512>_vpternlog<mode>_1): Ditto.
5062 (*<avx512>_vpternlog<mode>_2): Ditto.
5063 (*<avx512>_vpternlog<mode>_3): Ditto.
5064 (avx512f_shufps512_mask): Ditto.
5065 (avx512f_shufps512_1<mask_name>): Ditto.
5066 (avx512f_shufpd512_mask): Ditto.
5067 (avx512f_shufpd512_1<mask_name>): Ditto.
5068 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
5069 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
5070 (vec_dupv2df<mask_name>): Ditto.
5071 (trunc<pmov_src_lower><mode>2): Ditto.
5072 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
5073 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
5074 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
5075 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
5076 (truncv8div8qi2): Ditto.
5077 (avx512f_<code>v8div16qi2): Ditto.
5078 (*avx512f_<code>v8div16qi2_store_1): Ditto.
5079 (*avx512f_<code>v8div16qi2_store_2): Ditto.
5080 (avx512f_<code>v8div16qi2_mask): Ditto.
5081 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
5082 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
5083 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
5084 (vec_widen_umult_even_v16si<mask_name>): Ditto.
5085 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
5086 (vec_widen_smult_even_v16si<mask_name>): Ditto.
5087 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
5088 (VEC_PERM_AVX2): Ditto.
5089 (one_cmpl<mode>2): Ditto.
5090 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
5091 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
5092 (define_split to xor): Ditto.
5093 (*andnot<mode>3): Ditto.
5094 (define_split for ior): Ditto.
5095 (*iornot<mode>3): Ditto.
5096 (*xnor<mode>3): Ditto.
5097 (*<nlogic><mode>3): Ditto.
5098 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
5099 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
5100 (avx512f_pshufdv3_mask): Ditto.
5101 (avx512f_pshufd_1<mask_name>): Ditto.
5102 (*vec_extractv4ti): Ditto.
5103 (VEXTRACTI128_MODE): Ditto.
5104 (define_split to vec_extract): Ditto.
5105 (VI1248_AVX512VL_AVX512BW): Ditto.
5106 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
5107 (<insn>v16qiv16si2): Ditto.
5108 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
5109 (<insn>v16hiv16si2): Ditto.
5110 (avx512f_zero_extendv16hiv16si2_1): Ditto.
5111 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
5112 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
5113 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
5114 (<insn>v8qiv8di2): Ditto.
5115 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
5116 (<insn>v8hiv8di2): Ditto.
5117 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
5118 (*avx512f_zero_extendv8siv8di2_1): Ditto.
5119 (*avx512f_zero_extendv8siv8di2_2): Ditto.
5120 (<insn>v8siv8di2): Ditto.
5121 (avx512f_roundps512_sfix): Ditto.
5122 (vashrv8di3): Ditto.
5123 (vashrv16si3): Ditto.
5124 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
5125 (vec_dupv4sf): Add TARGET_EVEX512.
5126 (*vec_dupv4si): Ditto.
5127 (*vec_dupv2di): Ditto.
5128 (vec_dup<mode>): Change isa attribute to avx512f_512.
5129 (VPERMI2): Add TARGET_EVEX512.
5131 (VEC_INIT_MODE): Ditto.
5132 (VEC_INIT_HALF_MODE): Ditto.
5133 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
5135 (avx512f_vcvtps2ph512_mask_sae): Ditto.
5136 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
5138 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
5139 (INT_BROADCAST_MODE): Ditto.
5141 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5143 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
5144 Disable zmm broadcast for !TARGET_EVEX512.
5145 * config/i386/i386-options.cc (ix86_option_override_internal):
5146 Do not use PVW_512 when no-evex512.
5147 (ix86_simd_clone_adjust): Add evex512 target into string.
5148 * config/i386/i386.cc (type_natural_mode): Report ABI warning
5149 when using zmm register w/o evex512.
5150 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
5151 (ix86_hard_regno_mode_ok): Ditto.
5152 (ix86_set_reg_reg_cost): Ditto.
5153 (ix86_rtx_costs): Ditto.
5154 (ix86_vector_mode_supported_p): Ditto.
5155 (ix86_preferred_simd_mode): Ditto.
5156 (ix86_get_mask_mode): Ditto.
5157 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
5158 libmvec call when !TARGET_EVEX512.
5159 (ix86_simd_clone_usable): Ditto.
5160 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
5161 when !TARGET_EVEX512
5162 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
5163 (STORE_MAX_PIECES): Ditto.
5165 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5167 * config/i386/i386-builtin.def (BDESC): Add
5168 OPTION_MASK_ISA2_EVEX512.
5170 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5172 * config/i386/i386-builtin.def (BDESC): Add
5173 OPTION_MASK_ISA2_EVEX512.
5175 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5177 * config/i386/i386-builtin.def (BDESC): Add
5178 OPTION_MASK_ISA2_EVEX512.
5180 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5182 * config/i386/i386-builtin.def (BDESC): Add
5183 OPTION_MASK_ISA2_EVEX512.
5185 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5187 * config/i386/i386-builtin.def (BDESC): Add
5188 OPTION_MASK_ISA2_EVEX512.
5189 * config/i386/i386-builtins.cc
5190 (ix86_init_mmx_sse_builtins): Ditto.
5192 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5193 Hu, Lin1 <lin1.hu@intel.com>
5195 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
5198 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5200 * config.gcc: Add avx512bitalgvlintrin.h.
5201 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
5203 * config/i386/avx5124vnniwintrin.h: Ditto.
5204 * config/i386/avx512bf16intrin.h: Ditto.
5205 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
5206 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
5207 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
5209 * config/i386/avx512ifmaintrin.h: Ditto
5210 * config/i386/avx512pfintrin.h: Ditto
5211 * config/i386/avx512vbmi2intrin.h: Ditto.
5212 * config/i386/avx512vbmiintrin.h: Ditto.
5213 * config/i386/avx512vnniintrin.h: Ditto.
5214 * config/i386/avx512vp2intersectintrin.h: Ditto.
5215 * config/i386/avx512vpopcntdqintrin.h: Ditto.
5216 * config/i386/gfniintrin.h: Ditto.
5217 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
5218 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
5219 * config/i386/vpclmulqdqintrin.h: Ditto.
5220 * config/i386/avx512bitalgvlintrin.h: New.
5222 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5224 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
5227 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5229 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
5232 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5234 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
5236 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
5238 * common/config/i386/i386-common.cc
5239 (OPTION_MASK_ISA2_EVEX512_SET): New.
5240 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
5241 (ix86_handle_option): Handle EVEX512.
5242 * config/i386/i386-c.cc
5243 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
5244 when AVX512VL is set.
5245 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
5246 (ix86_valid_target_attribute_inner_p): Ditto.
5247 (ix86_option_override_internal): Set EVEX512 target if it is not
5248 explicitly set when AVX512 is enabled. Disable
5249 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
5250 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
5252 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
5255 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
5256 from insn condition.
5257 (lrint<mode>si2): New insn pattern for 32bit lrint.
5259 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
5262 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
5263 Enable SImode on FP registers for P7.
5264 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
5265 move between FP registers. Set attribute isa of stfiwx to "*"
5266 and attribute of stxsiwx to "p7".
5268 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5270 * config/s390/s390.md: Make use of new copysign RTL.
5272 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
5274 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
5275 with "jm" for alternative 0 and 1 of operand 2.
5276 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
5277 "ja" for alternative 0 and 1 of operand2.
5279 2023-10-08 David Malcolm <dmalcolm@redhat.com>
5282 * text-art/table.cc (table::maybe_set_cell_span): New.
5283 (table::add_other_table): New.
5284 * text-art/table.h (class table::cell_placement): Add class table
5286 (table::add_rows): New.
5287 (table::add_row): Reimplement in terms of add_rows.
5288 (table::maybe_set_cell_span): New decl.
5289 (table::add_other_table): New decl.
5290 * text-art/types.h (operator+): New operator for rect + coord.
5292 2023-10-08 David Malcolm <dmalcolm@redhat.com>
5294 * genmatch.cc (main): Update for "m_" prefix of some fields of
5296 * input.cc (make_location): Update for removal of
5297 COMBINE_LOCATION_DATA.
5298 (dump_line_table_statistics): Update for "m_" prefix of some
5299 fields of line_maps.
5300 (location_with_discriminator): Update for removal of
5301 COMBINE_LOCATION_DATA.
5302 (line_table_test::line_table_test): Update for "m_" prefix of some
5303 fields of line_maps.
5304 * toplev.cc (general_init): Likewise.
5305 * tree.cc (set_block): Update for removal of
5306 COMBINE_LOCATION_DATA.
5307 (set_source_range): Likewise.
5309 2023-10-08 David Malcolm <dmalcolm@redhat.com>
5311 * input.cc (make_location): Move implementation to
5312 line_maps::make_location.
5314 2023-10-08 David Malcolm <dmalcolm@redhat.com>
5317 * input.cc (file_cache::add_file): Update leading comment to
5318 clarify that it can fail.
5319 (file_cache::lookup_or_add_file): Likewise.
5320 (file_cache::get_source_file_content): Gracefully handle
5321 lookup_or_add_file failing.
5323 2023-10-08 liuhongt <hongtao.liu@intel.com>
5325 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
5327 (ix86_build_signbit_mask): Ditto.
5328 * config/i386/mmx.md (mmxintvecmode): Ditto.
5329 (<code><mode>2): New define_expand.
5330 (*mmx_<code><mode>): New define_insn_and_split.
5331 (*mmx_nabs<mode>2): Ditto.
5332 (*mmx_andnot<mode>3): New define_insn.
5333 (<code><mode>3): Ditto.
5334 (copysign<mode>3): New define_expand.
5335 (xorsign<mode>3): Ditto.
5336 (signbit<mode>2): Ditto.
5338 2023-10-08 liuhongt <hongtao.liu@intel.com>
5340 * config/i386/mmx.md (VHF_32_64): New mode iterator.
5341 (<insn><mode>3): New define_expand, merged from ..
5342 (<insn>v4hf3): .. this and
5343 (<insn>v2hf3): .. this.
5344 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
5345 (movd_v2hf_to_sse): .. this.
5346 (<code><mode>3): New define_expand.
5348 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
5350 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
5351 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
5353 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
5355 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
5357 (can_be_built_by_li_lis_and_rldicr): New function.
5358 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
5359 can_be_built_by_li_lis_and_rldicl.
5361 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
5363 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
5365 (can_be_built_by_li_and_rotldi): Rename to ...
5366 (can_be_built_by_li_lis_and_rotldi): ... this function.
5367 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
5369 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
5371 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
5372 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
5374 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
5376 * config/riscv/linux.h: Pass the static-pie specific options to
5379 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
5381 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
5383 * config/aarch64/aarch64-tune.md: Regenerated.
5384 * doc/invoke.texi: Add command-line option for cortex-x4 core.
5386 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5387 Hongyu Wang <hongyu.wang@intel.com>
5388 Hongtao Liu <hongtao.liu@intel.com>
5390 * config/i386/constraints.md (jb): New constraint for vsib memory
5391 that does not allow gpr32.
5392 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
5393 alternative and set attr_gpr32 to 0.
5394 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
5396 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
5397 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
5398 (*rsqrtsf2_sse): Likewise.
5399 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
5400 avx/noavx and assign jr/r constraint to dest.
5401 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
5402 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
5403 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
5404 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
5405 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
5406 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
5407 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
5408 (<sse2_avx2>_pmovmskb): Likewise.
5409 (*<sse2_avx2>_pmovmskb_zext): Likewise.
5410 (*sse2_pmovmskb_ext): Likewise.
5411 (*<sse2_avx2>_pmovmskb_lt): Likewise.
5412 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
5413 (*sse2_pmovmskb_ext_lt): Likewise.
5414 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
5415 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
5416 (sse_vmrcpv4sf2): Likewise.
5417 (*sse_vmrcpv4sf2): Likewise.
5418 (rsqrt<mode>2): Likewise.
5419 (sse_vmrsqrtv4sf2): Likewise.
5420 (*sse_vmrsqrtv4sf2): Likewise.
5421 (avx_h<insn>v4df3): Likewise.
5422 (sse3_hsubv2df3): Likewise.
5423 (avx_h<insn>v8sf3): Likewise.
5424 (sse3_h<insn>v4sf3): Likewise.
5425 (<sse3>_lddqu<avxsizesuffix>): Likewise.
5426 (avx_cmp<mode>3): Likewise.
5427 (avx_vmcmp<mode>3): Likewise.
5428 (*sse2_gt<mode>3): Likewise.
5429 (sse_ldmxcsr): Likewise.
5430 (sse_stmxcsr): Likewise.
5431 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
5432 avx alternative and set attr_gpr32 to 0.
5433 (avx2_permv2ti): Likewise.
5434 (*avx_vperm2f128<mode>_full): Likewise.
5435 (*avx_vperm2f128<mode>_nozero): Likewise.
5436 (vec_set_lo_v32qi): Likewise.
5437 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
5438 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
5439 (avx_cmp<mode>3): Likewise.
5440 (avx_vmcmp<mode>3): Likewise.
5441 (*<sse>_maskcmp<mode>3_comm): Likewise.
5442 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
5444 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
5445 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
5446 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
5447 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
5448 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
5449 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
5450 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
5451 (vec_set_lo_<mode><mask_name>): Likewise.
5452 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
5453 (vec_set_hi_<mode><mask_name>): Likewise.
5454 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
5455 (vec_set_hi_<mode>): Likewise.
5456 (vec_set_lo_<mode>): Likewise.
5457 (avx2_set_hi_v32qi): Likewise.
5459 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5460 Hongyu Wang <hongyu.wang@intel.com>
5461 Hongtao Liu <hongtao.liu@intel.com>
5463 * config/i386/i386.md (*movhi_internal): Split out non-gpr
5464 supported pextrw with mem constraint to avx/noavx alternatives,
5465 set jm and attr gpr32 0 to the noavx alternative.
5466 (*mov<mode>_internal): Likewise.
5467 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
5468 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
5469 (mmx_pshufbv4qi3): Likewise.
5470 (*mmx_pinsrd): Likewise.
5471 (*mmx_pinsrb): Likewise.
5472 (*pinsrb): Likewise.
5473 (mmx_pshufbv8qi3): Likewise.
5474 (mmx_pshufbv4qi3): Likewise.
5475 (@sse4_1_insertps_<mode>): Likewise.
5476 (*mmx_pextrw): Split altrenatives and map non-EGPR
5477 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
5478 (*movv2qi_internal): Likewise.
5479 (*pextrw): Likewise.
5480 (*mmx_pextrb): Likewise.
5481 (*mmx_pextrb_zext): Likewise.
5482 (*pextrb): Likewise.
5483 (*pextrb_zext): Likewise.
5484 (vec_extractv2si_1): Likewise.
5485 (vec_extractv2si_1_zext): Likewise.
5486 * config/i386/sse.md: (vi128_h_r): New mode attr for
5487 pinsr{bw}/pextr{bw} with reg operand.
5488 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
5489 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
5490 (*vec_extract<mode>): Likewise.
5491 (*vec_extract<mode>): Likewise for HFBF pattern.
5492 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
5493 (*vec_extractv4si_1): Likewise.
5494 (*vec_extractv4si_zext): Likewise.
5495 (*vec_extractv2di_1): Likewise.
5496 (*vec_concatv2si_sse4_1): Likewise.
5497 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
5498 (vec_concatv2di): Likewise.
5499 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
5500 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
5501 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
5502 %v for avx/noavx alternatives if necessary.
5503 (*vec_concatv2sf_sse4_1): Likewise.
5504 (*sse4_1_extractps): Likewise.
5505 (vec_set<mode>_0): Likewise for VI4F_128.
5506 (*vec_setv4sf_sse4_1): Likewise.
5507 (@sse4_1_insertps<mode>): Likewise.
5508 (ssse3_pmaddubsw128): Likewise.
5509 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
5510 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
5511 (<ssse3_avx2>_palignr<mode>): Likewise.
5512 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
5513 (<sse4_1_avx2>_mpsadbw): Likewise.
5514 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
5515 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
5516 (*sse4_1_<code><mode>3<mask_name>): Likewise.
5517 (*<code>v8hi3): Likewise.
5518 (*<code>v16qi3): Likewise.
5519 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
5520 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
5521 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
5522 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
5523 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
5524 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
5525 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
5526 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
5527 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
5528 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
5529 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
5531 (aesdeclast): Likewise.
5533 (aesenclast): Likewise.
5534 (pclmulqdq): Likewise.
5535 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
5536 (vgf2p8affineqb_<mode><mask_name>): Likewise.
5537 (vgf2p8mulb_<mode><mask_name>): Likewise.
5539 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5540 Hongyu Wang <hongyu.wang@intel.com>
5541 Hongtao Liu <hongtao.liu@intel.com>
5543 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
5545 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
5547 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
5548 and constraint jm to all non-evex alternatives, adjust
5549 alternative outputs if evex reg is mentioned.
5550 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
5551 and constraint jm/ja to all non-evex alternatives.
5552 (ptesttf2): Likewise.
5553 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
5554 (sse4_1_round<ssescalarmodesuffix>): Likewise.
5555 (sse4_2_pcmpestri): Likewise.
5556 (sse4_2_pcmpestrm): Likewise.
5557 (sse4_2_pcmpestr_cconly): Likewise.
5558 (sse4_2_pcmpistr): Likewise.
5559 (sse4_2_pcmpistri): Likewise.
5560 (sse4_2_pcmpistrm): Likewise.
5561 (sse4_2_pcmpistr_cconly): Likewise.
5563 (aeskeygenassist): Likewise.
5565 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5566 Hongyu Wang <hongyu.wang@intel.com>
5567 Hongtao Liu <hongtao.liu@intel.com>
5569 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
5570 attr gpr32 0 and constraint jm/ja to all mem alternatives.
5571 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
5572 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
5573 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
5574 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
5575 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
5576 (<ssse3_avx2>_psign<mode>3): Likewise.
5577 (ssse3_psign<mode>3): Likewise.
5578 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
5579 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
5580 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
5581 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
5582 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
5583 (<sse4_1_avx2>_mpsadbw): Likewise.
5584 (<sse4_1_avx2>_pblendvb): Likewise.
5585 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
5586 (sse4_1_pblend<ssemodesuffix>): Likewise.
5587 (*avx2_pblend<ssemodesuffix>): Likewise.
5588 (avx2_permv2ti): Likewise.
5589 (*avx_vperm2f128<mode>_nozero): Likewise.
5590 (*avx2_eq<mode>3): Likewise.
5591 (*sse4_1_eqv2di3): Likewise.
5592 (sse4_2_gtv2di3): Likewise.
5593 (avx2_gt<mode>3): Likewise.
5595 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5596 Hongyu Wang <hongyu.wang@intel.com>
5597 Hongtao Liu <hongtao.liu@intel.com>
5599 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
5601 (<xsave>_rex64): Likewise.
5602 (<xrstor>_rex64): Likewise.
5603 (<xrstor>64): Likewise.
5604 (fxsave64): Likewise.
5605 (fxstore64): Likewise.
5607 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
5608 Kong Lingling <lingling.kong@intel.com>
5609 Hongtao Liu <hongtao.liu@intel.com>
5611 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
5612 adjust mnemonic for vmovduq/vmovdqa.
5613 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
5614 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
5615 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
5618 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5619 Hongyu Wang <hongyu.wang@intel.com>
5620 Hongtao Liu <hongtao.liu@intel.com>
5622 * config/i386/i386.cc (map_egpr_constraints): New funciton to
5623 map common constraints to EGPR prohibited constraints.
5624 (ix86_md_asm_adjust): Calls map_egpr_constraints.
5625 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
5627 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5628 Hongyu Wang <hongyu.wang@intel.com>
5629 Hongtao Liu <hongtao.liu@intel.com>
5631 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
5633 (ix86_regno_ok_for_insn_base_p): Likewise.
5634 (ix86_insn_index_reg_class): Likewise.
5635 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
5636 New helper function to scan the insn.
5637 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
5638 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
5639 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
5640 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
5641 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
5642 (INSN_INDEX_REG_CLASS): Likewise.
5643 (enum reg_class): Add INDEX_GPR16.
5644 (GENERAL_GPR16_REGNO_P): Define.
5645 * config/i386/i386.md (gpr32): New attribute.
5647 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5648 Hongyu Wang <hongyu.wang@intel.com>
5649 Hongtao Liu <hongtao.liu@intel.com>
5651 * config/i386/constraints.md (jr): New register constraint
5652 that prohibits EGPR.
5653 (jR): Constraint that force usage of EGPR.
5654 (jm): New memory constraint that prohibits EGPR.
5655 (ja): Likewise for Bm constraint.
5656 (jb): Likewise for Tv constraint.
5657 (j<): New auto-dec memory constraint that prohibits EGPR.
5658 (j>): Likewise for ">" constraint.
5659 (jo): Likewise for "o" constraint.
5660 (jv): Likewise for "V" constraint.
5661 (jp): Likewise for "p" constraint.
5662 * config/i386/i386.h (enum reg_class): Add new reg class
5665 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5666 Hongyu Wang <hongyu.wang@intel.com>
5667 Hongtao Liu <hongtao.liu@intel.com>
5669 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
5670 New function prototype.
5671 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
5673 (debugger64_register_map): Likewise.
5674 (ix86_conditional_register_usage): Clear REX2 register when APX
5676 (ix86_code_end): Add handling for REX2 reg.
5677 (print_reg): Likewise.
5678 (ix86_output_jmp_thunk_or_indirect): Likewise.
5679 (ix86_output_indirect_branch_via_reg): Likewise.
5680 (ix86_attr_length_vex_default): Likewise.
5681 (ix86_emit_save_regs): Adjust to allow saving r31.
5682 (ix86_register_priority): Set REX2 reg priority same as REX.
5683 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
5684 (x86_extended_rex2reg_mentioned_p): New function.
5685 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
5687 (REG_ALLOC_ORDER): Likewise.
5688 (FIRST_REX2_INT_REG): Define.
5689 (LAST_REX2_INT_REG): Ditto.
5690 (GENERAL_REGS): Add 16 new registers.
5691 (INT_SSE_REGS): Likewise.
5692 (FLOAT_INT_REGS): Likewise.
5693 (FLOAT_INT_SSE_REGS): Likewise.
5694 (INT_MASK_REGS): Likewise.
5695 (ALL_REGS):Likewise.
5696 (REX2_INT_REG_P): Define.
5697 (REX2_INT_REGNO_P): Ditto.
5698 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
5699 (REGNO_OK_FOR_INDEX_P): Ditto.
5700 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
5701 * config/i386/i386.md: Add 16 new integer general
5704 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5705 Hongyu Wang <hongyu.wang@intel.com>
5706 Hongtao Liu <hongtao.liu@intel.com>
5708 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
5709 (XCR_APX_F_ENABLED_MASK): Likewise.
5710 (get_available_features): Detect APX_F under
5711 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
5712 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
5713 (ix86_handle_option): Handle -mapxf.
5714 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
5715 * common/config/i386/i386-isas.h: Add entry for APX_F.
5716 * config/i386/cpuid.h (bit_APX_F): New.
5717 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
5718 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
5719 * config/i386/i386-opts.h (enum apx_features): New enum.
5720 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
5721 * config/i386/i386-options.cc (ix86_function_specific_save):
5722 Save ix86_apx_features.
5723 (ix86_function_specific_restore): Restore it.
5724 (ix86_valid_target_attribute_inner_p): Add mapxf.
5725 (ix86_option_override_internal): Set ix86_apx_features for PTA
5726 and TARGET_APX_F. Also reports error when APX_F is set but not
5727 having TARGET_64BIT.
5728 * config/i386/i386.opt: (-mapxf): New ISA flag option.
5729 (-mapx=): New enumeration option.
5730 (apx_features): New enum type.
5731 (apx_none): New enum value.
5732 (apx_egpr): Likewise.
5733 (apx_push2pop2): Likewise.
5734 (apx_ndd): Likewise.
5735 (apx_all): Likewise.
5736 * doc/invoke.texi: Document mapxf.
5738 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
5739 Kong Lingling <lingling.kong@intel.com>
5740 Hongtao Liu <hongtao.liu@intel.com>
5742 * addresses.h (index_reg_class): New wrapper function like
5744 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
5745 * doc/tm.texi.in: Ditto.
5746 * lra-constraints.cc (index_part_to_reg): Pass index_class.
5747 (process_address_1): Calls index_reg_class with curr_insn and
5748 replace INDEX_REG_CLASS with its return value index_cl.
5749 * reload.cc (find_reloads_address): Likewise.
5750 (find_reloads_address_1): Likewise.
5752 2023-10-07 Kong Lingling <lingling.kong@intel.com>
5753 Hongyu Wang <hongyu.wang@intel.com>
5754 Hongtao Liu <hongtao.liu@intel.com>
5756 * addresses.h (base_reg_class): Add insn argument and new macro
5757 INSN_BASE_REG_CLASS.
5758 (regno_ok_for_base_p_1): Add insn argument and new macro
5759 REGNO_OK_FOR_INSN_BASE_P.
5760 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
5761 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
5762 REGNO_OK_FOR_INSN_BASE_P.
5763 * doc/tm.texi.in: Ditto.
5764 * lra-constraints.cc (process_address_1): Pass insn to
5766 (curr_insn_transform): Ditto.
5767 * reload.cc (find_reloads): Ditto.
5768 (find_reloads_address): Ditto.
5769 (find_reloads_address_1): Ditto.
5770 (find_reloads_subreg_address): Ditto.
5771 * reload1.cc (maybe_fix_stack_asms): Ditto.
5773 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
5776 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
5779 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
5782 * config/rs6000/predicates.md (lowpart_subreg_operator): New
5784 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
5785 (movsf_from_si2): Rename to ...
5786 (movsf_from_si2_<code>): ... this.
5788 2023-10-07 Pan Li <pan2.li@intel.com>
5791 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
5792 object is a REG before extracting its' REGNO.
5794 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
5796 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
5797 one into add3_cc_overflow_1 followed by add3_carry.
5798 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
5799 "*add<mode>3_cc_overflow_1" to provide generator function.
5801 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
5802 Uros Bizjak <ubizjak@gmail.com>
5804 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
5805 to perform left shifts into shorter instructions with -Oz.
5807 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
5809 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
5811 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
5813 * doc/extend.texi (Function Attributes): Mention standard attribute
5815 (Variable Attributes): Likewise.
5816 (Type Attributes): Likewise.
5817 (Attribute Syntax): Likewise.
5819 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
5821 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
5822 (mov<mode>_exec): Likewise.
5823 (mov<mode>_sgprbase): Likewise.
5824 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
5825 (*movti_insn): Likewise.
5827 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
5829 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
5831 2023-10-06 Andrew Pinski <pinskia@gmail.com>
5833 PR middle-end/111699
5834 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
5835 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
5837 2023-10-06 Jakub Jelinek <jakub@redhat.com>
5839 * ipa-prop.h (ipa_bits): Remove.
5840 (struct ipa_jump_func): Remove bits member.
5841 (struct ipcp_transformation): Remove bits member, adjust
5843 (ipa_get_ipa_bits_for_value): Remove.
5844 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
5845 (ipa_bits_hash_table): Remove.
5846 (ipa_print_node_jump_functions_for_edge): Don't print bits.
5847 (ipa_get_ipa_bits_for_value): Remove.
5848 (ipa_set_jfunc_bits): Remove.
5849 (ipa_compute_jump_functions_for_edge): For pointers query
5850 pointer alignment before ipa_set_jfunc_vr and update_bitmask
5851 in there. For integral types, just rely on bitmask already
5852 being handled in value ranges.
5853 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
5854 (ipcp_transformation_initialize): Neither here.
5855 (ipcp_transformation_t::duplicate): Don't copy bits vector.
5856 (ipa_write_jump_function): Don't stream bits here.
5857 (ipa_read_jump_function): Neither here.
5858 (useful_ipcp_transformation_info_p): Don't test bits vec.
5859 (write_ipcp_transformation_info): Don't stream bits here.
5860 (read_ipcp_transformation_info): Neither here.
5861 (ipcp_get_parm_bits): Get mask and value from m_vr rather
5863 (ipcp_update_bits): Remove.
5864 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
5865 bitmask stored in value range.
5866 (ipcp_transform_function): Don't test bits vector, don't call
5868 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
5869 jfunc->bits, instead get mask and value from jfunc->m_vr.
5870 (ipcp_store_bits_results): Remove.
5871 (ipcp_store_vr_results): Incorporate parts of
5872 ipcp_store_bits_results here, merge the bitmasks with value
5873 range if both are supplied.
5874 (ipcp_driver): Don't call ipcp_store_bits_results.
5875 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
5878 2023-10-06 Pan Li <pan2.li@intel.com>
5880 * config/riscv/autovec.md: Update comments.
5882 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
5884 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
5886 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
5888 * timevar.def (TV_TREE_FAST_VRP): New.
5889 * tree-pass.h (make_pass_fast_vrp): New prototype.
5890 * tree-vrp.cc (class fvrp_folder): New.
5891 (fvrp_folder::fvrp_folder): New.
5892 (fvrp_folder::~fvrp_folder): New.
5893 (fvrp_folder::value_of_expr): New.
5894 (fvrp_folder::value_on_edge): New.
5895 (fvrp_folder::value_of_stmt): New.
5896 (fvrp_folder::pre_fold_bb): New.
5897 (fvrp_folder::post_fold_bb): New.
5898 (fvrp_folder::pre_fold_stmt): New.
5899 (fvrp_folder::fold_stmt): New.
5900 (execute_fast_vrp): New.
5901 (pass_data_fast_vrp): New.
5902 (pass_vrp:execute): Check for fast VRP pass.
5903 (make_pass_fast_vrp): New.
5905 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
5907 * gimple-range.cc (dom_ranger::dom_ranger): New.
5908 (dom_ranger::~dom_ranger): New.
5909 (dom_ranger::range_of_expr): New.
5910 (dom_ranger::edge_range): New.
5911 (dom_ranger::range_on_edge): New.
5912 (dom_ranger::range_in_bb): New.
5913 (dom_ranger::range_of_stmt): New.
5914 (dom_ranger::maybe_push_edge): New.
5915 (dom_ranger::pre_bb): New.
5916 (dom_ranger::post_bb): New.
5917 * gimple-range.h (class dom_ranger): New.
5919 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
5921 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
5922 (gori_calc_operands): New.
5923 (gori_on_edge): New.
5924 (gori_name_helper): New.
5925 (gori_name_on_edge): New.
5926 * gimple-range-gori.h (gori_on_edge): New prototype.
5927 (gori_name_on_edge): New prototype.
5929 2023-10-05 Sergei Trofimovich <siarheit@google.com>
5932 PR gcov-profile/111559
5933 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
5934 uninitialized probabilities when merging counters with zero
5937 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
5940 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
5941 strategy for non-default address spaces.
5942 (decide_alg): Use loop strategy as a fallback strategy for
5943 non-default address spaces.
5945 2023-10-05 Jakub Jelinek <jakub@redhat.com>
5947 * sreal.cc (verify_aritmetics): Rename to ...
5948 (verify_arithmetics): ... this.
5949 (sreal_verify_arithmetics): Adjust caller.
5951 2023-10-05 Martin Jambor <mjambor@suse.cz>
5954 2023-10-03 Martin Jambor <mjambor@suse.cz>
5957 * cgraph.h (cgraph_edge): Add a parameter to
5958 redirect_call_stmt_to_callee.
5959 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
5960 parameter to modify_call.
5961 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
5962 parameter killed_ssas, pass it to padjs->modify_call.
5963 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
5964 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
5965 Instead of substituting uses, invoke purge_transitive_uses. If
5966 hash of killed SSAs has not been provided, create a temporary one
5967 and release SSAs that have been added to it.
5968 * tree-inline.cc (redirect_all_calls): Create
5969 id->killed_new_ssa_names earlier, pass it to edge redirection,
5971 (copy_body): Release SSAs in id->killed_new_ssa_names.
5973 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5975 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
5976 (vec_series<mode>): Ditto.
5977 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
5978 (shuffle_decompress_patterns): Ditto.
5980 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
5982 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
5983 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
5984 (arc_ccfsm_record_branch_deleted): Likewise.
5985 (arc_ccfsm_cond_exec_p): Likewise.
5986 (arc_ccfsm): Likewise.
5987 (arc_ccfsm_record_condition): Likewise.
5988 (make_pass_arc_ifcvt): Likewise.
5989 * config/arc/arc.cc (arc_ccfsm): Remove.
5990 (arc_ccfsm_current): Likewise.
5991 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
5992 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
5993 (ARC_CCFSM_COND_EXEC_P): Likewise.
5994 (CCFSM_ISCOMPACT): Likewise.
5995 (CCFSM_DBR_ISCOMPACT): Likewise.
5996 (machine_function): Remove ccfsm related fields.
5997 (arc_ifcvt): Remove pass.
5998 (arc_print_operand): Remove `#` punct operand and other ccfsm
6000 (arc_ccfsm_advance): Remove.
6001 (arc_ccfsm_at_label): Likewise.
6002 (arc_ccfsm_record_condition): Likewise.
6003 (arc_ccfsm_post_advance): Likewise.
6004 (arc_ccfsm_branch_deleted_p): Likewise.
6005 (arc_ccfsm_record_branch_deleted): Likewise.
6006 (arc_ccfsm_cond_exec_p): Likewise.
6007 (arc_get_ccfsm_cond): Likewise.
6008 (arc_final_prescan_insn): Remove ccfsm references.
6009 (arc_internal_label): Likewise.
6010 (arc_reorg): Likewise.
6011 (arc_output_libcall): Likewise.
6012 * config/arc/arc.md: Remove ccfsm references and update related
6013 instruction patterns.
6015 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
6017 * config/arc/arc.cc (arc_init): Remove '^' punct char.
6018 (arc_print_operand): Remove related code.
6019 * config/arc/arc.md: Update patterns which uses '%&'.
6021 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
6023 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
6024 (arc_toggle_unalign): Likewise.
6025 * config/arc/arc.cc (machine_function) Remove unalign.
6026 (arc_init): Remove `&` punct character.
6027 (arc_print_operand): Remove `&` related functions.
6028 (arc_verify_short): Update function's number of parameters.
6029 (output_short_suffix): Update function.
6030 (arc_short_long): Likewise.
6031 (arc_clear_unalign): Remove.
6032 (arc_toggle_unalign): Likewise.
6033 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
6034 (ASM_OUTPUT_ALIGN): Update.
6035 * config/arc/arc.md: Remove all `%&` references.
6036 * config/arc/arc.opt (mannotate-align): Ignore option.
6037 * doc/invoke.texi (mannotate-align): Update description.
6039 2023-10-05 Richard Biener <rguenther@suse.de>
6041 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
6042 ask for internal_fn_p (CFN_LAST).
6044 2023-10-05 Richard Biener <rguenther@suse.de>
6046 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
6047 visited value numbers are available itself.
6049 2023-10-05 Richard Biener <rguenther@suse.de>
6052 * doc/extend.texi (attribute flatten): Clarify.
6054 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
6056 * config/arc/arc-protos.h (emit_shift): Delete prototype.
6057 (arc_pre_reload_split): New function prototype.
6058 * config/arc/arc.cc (emit_shift): Delete function.
6059 (arc_pre_reload_split): New predicate function, copied from i386,
6060 to schedule define_insn_and_split splitters to the split1 pass.
6061 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
6062 (ashrsi3): Likewise.
6063 (lshrsi3): Likewise.
6064 (shift_si3): Move after other shift patterns, and disable when
6065 operands[2] is one (which is handled by its own define_insn).
6066 Use shiftr4_operator, instead of shift4_operator, as this is no
6067 longer used for left shifts.
6068 (shift_si3_loop): Likewise. Additionally remove match_scratch.
6069 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
6070 (*ashrsi3_nobs): Likewise.
6071 (*lshrsi3_nobs): Likewise.
6072 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
6073 (add_shift): Rename define_insn from *add_shift.
6074 * config/arc/predicates.md (shiftl4_operator): Delete.
6075 (shift4_operator): Delete.
6077 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
6079 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
6080 Change type attribute to "unary", as this doesn't have operands[2].
6081 Change length attribute to "*,4" to allow compact representation.
6082 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
6083 insn type attribute to "unary", as this doesn't have operands[2].
6084 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
6085 insn type attribute to "unary", as this doesn't have operands[2].
6087 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
6089 PR rtl-optimization/110701
6090 * combine.cc (record_dead_and_set_regs_1): Split comment into
6091 pieces placed before the relevant clauses. When the SET_DEST
6092 is a partial_subreg_p, mark the bits outside of the updated
6093 portion of the destination as undefined.
6095 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
6098 * opt-read.awk: Drop multidimensional arrays.
6099 * opth-gen.awk: Ditto.
6101 2023-10-04 Xi Ruoyao <xry111@xry111.site>
6103 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
6104 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
6106 2023-10-04 Jakub Jelinek <jakub@redhat.com>
6108 PR middle-end/111369
6109 * match.pd (x == cstN ? cst4 : cst3): Use
6110 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
6111 Fix comment typo. Formatting fix.
6112 (a?~t:t -> (-(a))^t): Always convert to type rather
6113 than using build_nonstandard_integer_type. Perform negation
6114 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
6116 2023-10-04 Jakub Jelinek <jakub@redhat.com>
6118 PR tree-optimization/111668
6119 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
6120 a ? 0 : -1 cases before the powerof2cst cases and differentiate
6121 between 1-bit precision types, larger precision boolean types
6122 and other integral types. Fix comment pastos and formatting.
6124 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
6126 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
6127 pointers rather than range_info_get_range.
6129 2023-10-03 Martin Jambor <mjambor@suse.cz>
6131 * ipa-modref.h (modref_summary::dump): Make const.
6132 * ipa-modref.cc (modref_summary::dump): Likewise.
6133 (dump_lto_records): Dump to out instead of dump_file.
6135 2023-10-03 Martin Jambor <mjambor@suse.cz>
6138 * ipa-param-manipulation.cc
6139 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
6140 return uses of PARAM will be removed.
6141 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
6142 * ipa-sra.cc (isra_param_desc): New fields
6143 remove_only_when_retval_removed and split_only_when_retval_removed.
6144 (struct gensum_param_desc): Likewise. Fix comment long line.
6145 (ipa_sra_function_summaries::duplicate): Copy the new flags.
6146 (dump_gensum_param_descriptor): Dump the new flags.
6147 (dump_isra_param_descriptor): Likewise.
6148 (isra_track_scalar_value_uses): New parameter desc. Set its flag
6149 remove_only_when_retval_removed when encountering a simple return.
6150 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
6151 with desc. Pass it to isra_track_scalar_value_uses and set its
6153 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
6154 parameter. If there is a direct return use, mark any..
6155 (create_parameter_descriptors): Pass the whole parameter descriptor to
6156 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
6157 (process_scan_results): Copy the new flags.
6158 (isra_write_node_summary): Stream the new flags.
6159 (isra_read_node_info): Likewise.
6160 (adjust_parameter_descriptions): Check that transformations
6161 requring return removal only happen when return value is removed.
6162 Restructure main loop. Adjust dump message.
6164 2023-10-03 Martin Jambor <mjambor@suse.cz>
6167 * cgraph.h (cgraph_edge): Add a parameter to
6168 redirect_call_stmt_to_callee.
6169 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
6170 parameter to modify_call.
6171 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
6172 parameter killed_ssas, pass it to padjs->modify_call.
6173 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
6174 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
6175 Instead of substituting uses, invoke purge_transitive_uses. If
6176 hash of killed SSAs has not been provided, create a temporary one
6177 and release SSAs that have been added to it.
6178 * tree-inline.cc (redirect_all_calls): Create
6179 id->killed_new_ssa_names earlier, pass it to edge redirection,
6181 (copy_body): Release SSAs in id->killed_new_ssa_names.
6183 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
6185 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
6186 * tree-vrp.cc (vrp_pass_num): Remove.
6187 (pass_vrp::my_pass): Remove.
6188 (pass_vrp::pass_vrp): Add warn_p as a parameter.
6189 (pass_vrp::final_p): New.
6190 (pass_vrp::set_pass_param): Set final_p param.
6191 (pass_vrp::execute): Call execute_range_vrp with no conditions.
6192 (make_pass_vrp): Pass additional parameter.
6193 (make_pass_early_vrp): Ditto.
6195 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
6197 * tree-ssanames.cc (set_range_info): Return true only if the
6198 current value changes.
6200 2023-10-03 David Malcolm <dmalcolm@redhat.com>
6202 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
6203 prefixes to text_info fields.
6204 (diagnostic_report_diagnostic): Likewise.
6205 (verbatim): Use text_info ctor.
6206 (simple_diagnostic_path::add_event): Likewise.
6207 (simple_diagnostic_path::add_thread_event): Likewise.
6208 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
6209 "m_" prefixes to text_info fields.
6210 (dump_context::dump_printf_va): Use text_info ctor.
6211 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
6212 (graphviz_out::print): Likewise.
6213 * opt-problem.cc (opt_problem::opt_problem): Likewise.
6214 * pretty-print.cc (pp_format): Update for "m_" prefixes to
6216 (pp_printf): Use text_info ctor.
6217 (pp_verbatim): Likewise.
6218 (assert_pp_format_va): Likewise.
6219 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
6221 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
6223 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
6224 prefixes to text_info fields.
6225 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
6227 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
6229 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
6230 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
6231 (*scc_insn): Don't split to a conditional move sequence for LTU.
6233 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
6235 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
6236 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
6237 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
6238 (load_pair_dw_<DX:mode><DX2:mode>)
6239 (store_pair_sw_<SX:mode><SX2:mode>)
6240 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
6241 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
6242 (*extend<SHORT:mode><GPI:mode>2_aarch64)
6243 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
6244 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
6245 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
6246 (add<mode>3_compare0, *addsi3_compare0_uxtw)
6247 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
6248 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
6249 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
6250 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
6251 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
6252 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
6253 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
6254 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
6255 (*aarch64_ashl_sisd_or_int_<mode>3)
6256 (*aarch64_lshr_sisd_or_int_<mode>3)
6257 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
6258 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
6259 (<optab><fcvt_target><GPF:mode>2)
6260 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
6261 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
6262 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
6264 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
6265 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
6266 (*aarch64_mul_unpredicated_<mode>)
6267 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
6268 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
6269 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
6270 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
6271 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
6272 (@aarch64_sve_<sve_int_op>_lane_<mode>)
6273 (@aarch64_sve_add_mul_lane_<mode>)
6274 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
6275 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
6276 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
6277 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
6278 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
6279 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
6280 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
6281 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
6282 (@aarch64_sve_qadd_<sve_int_op><mode>)
6283 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
6284 (@aarch64_sve_sub_<sve_int_op><mode>)
6285 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
6286 (@aarch64_sve_qsub_<sve_int_op><mode>)
6287 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
6288 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
6289 (@aarch64_pred_<sve_int_op><mode>)
6290 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
6291 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
6292 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
6293 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
6294 (*cond_<sve_fp_op><mode>_any_relaxed)
6295 (*cond_<sve_fp_op><mode>_any_strict)
6296 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
6297 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
6298 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
6299 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
6300 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
6301 (*aarch64_sve_mov<mode>, aarch64_wrffr)
6302 (mask_scatter_store<mode><v_int_container>)
6303 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
6304 (*mask_scatter_store<mode><v_int_container>_sxtw)
6305 (*mask_scatter_store<mode><v_int_container>_uxtw)
6306 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
6307 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
6308 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
6309 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
6310 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
6311 (vec_series<mode>, @extract_<last_op>_<mode>)
6312 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
6313 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
6314 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
6315 (@cond_<optab><mode>)
6316 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
6317 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
6318 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
6319 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
6320 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
6321 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
6322 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
6323 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
6324 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
6325 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
6326 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
6327 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
6328 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
6329 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
6330 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
6331 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
6332 (*cond_bic<mode>_2, *cond_bic<mode>_any)
6333 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
6334 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
6335 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
6336 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
6337 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
6338 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
6339 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
6340 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
6341 (*cond_<optab><mode>_2_const_relaxed)
6342 (*cond_<optab><mode>_2_const_strict)
6343 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
6344 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
6345 (*cond_<optab><mode>_any_const_relaxed)
6346 (*cond_<optab><mode>_any_const_strict)
6347 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
6348 (*cond_add<mode>_2_const_strict)
6349 (*cond_add<mode>_any_const_relaxed)
6350 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
6351 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
6352 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
6353 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
6354 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
6355 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
6356 (*aarch64_pred_abd<mode>_strict)
6357 (*aarch64_cond_abd<mode>_2_relaxed)
6358 (*aarch64_cond_abd<mode>_2_strict)
6359 (*aarch64_cond_abd<mode>_3_relaxed)
6360 (*aarch64_cond_abd<mode>_3_strict)
6361 (*aarch64_cond_abd<mode>_any_relaxed)
6362 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
6363 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
6364 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
6365 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
6366 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
6367 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
6368 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
6369 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
6370 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
6371 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
6372 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
6373 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
6374 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
6375 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
6376 (@aarch64_sve_<sve_fp_op>vnx4sf)
6377 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
6378 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
6379 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
6380 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
6381 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
6382 (@aarch64_fold_extract_vector_<last_op>_<mode>)
6383 (@aarch64_sve_splice<mode>)
6384 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
6385 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
6386 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
6387 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
6388 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
6389 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
6390 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
6391 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
6392 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
6393 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
6394 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
6395 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
6396 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
6397 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
6398 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
6399 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
6400 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
6402 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
6403 (load_pair<DREG:mode><DREG2:mode>)
6404 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
6405 (aarch64_simd_mov_from_<mode>low)
6406 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
6407 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
6408 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
6409 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
6410 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
6411 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
6412 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
6413 (*aarch64_combinez_be<mode>)
6414 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
6415 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
6416 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
6418 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
6420 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
6421 in new compact pattern syntax.
6423 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
6425 * gensupport.cc (convert_syntax): Updated to support unordered
6426 constraints in compact syntax.
6428 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
6430 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
6431 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
6432 (copysign<mode>3_hard): Likewise.
6433 (copysign<mode>3_soft): Likewise.
6434 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
6436 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
6439 2023-10-02 David Malcolm <dmalcolm@redhat.com>
6441 * diagnostic-format-json.cc (toplevel_array): Remove global in
6442 favor of json_output_format::m_top_level_array.
6443 (cur_group): Likewise, for json_output_format::m_cur_group.
6444 (cur_children_array): Likewise, for
6445 json_output_format::m_cur_children_array.
6446 (class json_output_format): New.
6447 (json_begin_diagnostic): Remove, in favor of
6448 json_output_format::on_begin_diagnostic.
6449 (json_end_diagnostic): Convert to...
6450 (json_output_format::on_end_diagnostic): ...this.
6451 (json_begin_group): Remove, in favor of
6452 json_output_format::on_begin_group.
6453 (json_end_group): Remove, in favor of
6454 json_output_format::on_end_group.
6455 (json_flush_to_file): Remove, in favor of
6456 json_output_format::flush_to_file.
6457 (json_stderr_final_cb): Remove, in favor of json_output_format
6459 (json_output_base_file_name): Remove global.
6460 (class json_stderr_output_format): New.
6461 (json_file_final_cb): Remove.
6462 (class json_file_output_format): New.
6463 (json_emit_diagram): Remove.
6464 (diagnostic_output_format_init_json): Update.
6465 (diagnostic_output_format_init_json_file): Update.
6466 * diagnostic-format-sarif.cc (the_builder): Remove this global,
6467 moving to a field of the sarif_output_format.
6468 (sarif_builder::maybe_make_artifact_content_object): Use the
6469 context's m_file_cache.
6470 (get_source_lines): Convert to...
6471 (sarif_builder::get_source_lines): ...this, using context's
6473 (sarif_begin_diagnostic): Remove, in favor of
6474 sarif_output_format::on_begin_diagnostic.
6475 (sarif_end_diagnostic): Remove, in favor of
6476 sarif_output_format::on_end_diagnostic.
6477 (sarif_begin_group): Remove, in favor of
6478 sarif_output_format::on_begin_group.
6479 (sarif_end_group): Remove, in favor of
6480 sarif_output_format::on_end_group.
6481 (sarif_flush_to_file): Delete.
6482 (sarif_stderr_final_cb): Delete.
6483 (sarif_output_base_file_name): Delete.
6484 (sarif_file_final_cb): Delete.
6485 (class sarif_output_format): New.
6486 (sarif_emit_diagram): Delete.
6487 (class sarif_stream_output_format): New.
6488 (class sarif_file_output_format): New.
6489 (diagnostic_output_format_init_sarif): Update.
6490 (diagnostic_output_format_init_sarif_stderr): Update.
6491 (diagnostic_output_format_init_sarif_file): Update.
6492 (diagnostic_output_format_init_sarif_stream): Update.
6493 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
6494 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
6495 diagnostic_text_output_format's dtor.
6496 (diagnostic_initialize): Update, making a new instance of
6497 diagnostic_text_output_format.
6498 (diagnostic_finish): Delete m_output_format, rather than calling
6500 (diagnostic_report_diagnostic): Assert that m_output_format is
6501 non-NULL. Replace call to begin_group_cb with call to
6502 m_output_format->on_begin_group. Replace call to
6503 diagnostic_starter with call to
6504 m_output_format->on_begin_diagnostic. Replace call to
6505 diagnostic_finalizer with call to
6506 m_output_format->on_end_diagnostic.
6507 (diagnostic_emit_diagram): Replace both optional call to
6508 m_diagrams.m_emission_cb and default implementation with call to
6509 m_output_format->on_diagram. Move default implementation to
6510 diagnostic_text_output_format::on_diagram.
6511 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
6512 end_group_cb with call to m_output_format->on_end_group.
6513 (diagnostic_text_output_format::~diagnostic_text_output_format):
6514 New, based on default_diagnostic_final_cb.
6515 (diagnostic_text_output_format::on_begin_diagnostic): New, based
6516 on code from diagnostic_report_diagnostic.
6517 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
6518 (diagnostic_text_output_format::on_diagram): New, based on code
6519 from diagnostic_emit_diagram.
6520 * diagnostic.h (class diagnostic_output_format): New.
6521 (class diagnostic_text_output_format): New.
6522 (diagnostic_context::begin_diagnostic): Move to...
6523 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
6524 (diagnostic_context::start_span): Move to...
6525 (diagnostic_context::m_text_callbacks::start_span): ...here.
6526 (diagnostic_context::end_diagnostic): Move to...
6527 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
6528 (diagnostic_context::begin_group_cb): Remove, in favor of
6529 m_output_format->on_begin_group.
6530 (diagnostic_context::end_group_cb): Remove, in favor of
6531 m_output_format->on_end_group.
6532 (diagnostic_context::final_cb): Remove, in favor of
6533 m_output_format's dtor.
6534 (diagnostic_context::m_output_format): New field.
6535 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
6536 of m_output_format->on_diagram.
6537 (diagnostic_starter): Update.
6538 (diagnostic_finalizer): Update.
6539 (diagnostic_output_format_init_sarif_stream): New.
6540 * input.cc (location_get_source_line): Move implementation apart from
6541 call to diagnostic_file_cache_init to...
6542 (file_cache::get_source_line): ...this new function...
6543 (location_get_source_line): ...and reintroduce, rewritten in terms of
6544 file_cache::get_source_line.
6545 (get_source_file_content): Likewise, refactor into...
6546 (file_cache::get_source_file_content): ...this new function.
6547 * input.h (file_cache::get_source_line): New decl.
6548 (file_cache::get_source_file_content): New decl.
6549 * selftest-diagnostic.cc
6550 (test_diagnostic_context::test_diagnostic_context): Update.
6551 * tree-diagnostic-path.cc (event_range::print): Update for
6552 change to diagnostic_context's start_span callback.
6554 2023-10-02 David Malcolm <dmalcolm@redhat.com>
6556 * diagnostic-show-locus.cc: Update for reorganization of
6557 source-printing fields of diagnostic_context.
6558 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
6559 (diagnostic_initialize): Likewise.
6560 * diagnostic.h (diagnostic_context::show_caret): Move to...
6561 (diagnostic_context::m_source_printing::enabled): ...here.
6562 (diagnostic_context::caret_max_width): Move to...
6563 (diagnostic_context::m_source_printing::max_width): ...here.
6564 (diagnostic_context::caret_chars): Move to...
6565 (diagnostic_context::m_source_printing::caret_chars): ...here.
6566 (diagnostic_context::colorize_source_p): Move to...
6567 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
6568 (diagnostic_context::show_labels_p): Move to...
6569 (diagnostic_context::m_source_printing::show_labels_p): ...here.
6570 (diagnostic_context::show_line_numbers_p): Move to...
6571 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
6572 (diagnostic_context::min_margin_width): Move to...
6573 (diagnostic_context::m_source_printing::min_margin_width): ...here.
6574 (diagnostic_context::show_ruler_p): Move to...
6575 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
6576 (diagnostic_same_line): Update for above changes.
6577 * opts.cc (common_handle_option): Update for reorganization of
6578 source-printing fields of diagnostic_context.
6579 * selftest-diagnostic.cc
6580 (test_diagnostic_context::test_diagnostic_context): Likewise.
6581 * toplev.cc (general_init): Likewise.
6582 * tree-diagnostic-path.cc (struct event_range): Likewise.
6584 2023-10-02 David Malcolm <dmalcolm@redhat.com>
6586 * diagnostic.cc (diagnostic_initialize): Initialize
6587 set_locations_cb to nullptr.
6589 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
6592 * config/arm/constraints.md: Remove Pf constraint.
6593 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
6594 (arm_atomic_load_acquire<mode>): Likewise.
6595 (arm_atomic_store<mode>): Likewise.
6596 (arm_atomic_store_release<mode>): Likewise.
6597 (atomic_load<mode>): Switch patterns to define_expand.
6598 (atomic_store<mode>): Likewise.
6599 (arm_atomic_loaddi2_ldrd): Remove predication.
6600 (arm_load_exclusive<mode>): Likewise.
6601 (arm_load_acquire_exclusive<mode>): Likewise.
6602 (arm_load_exclusivesi): Likewise.
6603 (arm_load_acquire_exclusivesi): Likewise.
6604 (arm_load_exclusivedi): Likewise.
6605 (arm_load_acquire_exclusivedi): Likewise.
6606 (arm_store_exclusive<mode>): Likewise.
6607 (arm_store_release_exclusivedi): Likewise.
6608 (arm_store_release_exclusive<mode>): Likewise.
6609 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
6611 2023-10-02 Tamar Christina <tamar.christina@arm.com>
6614 2023-10-02 Tamar Christina <tamar.christina@arm.com>
6616 PR tree-optimization/109154
6617 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
6618 (cmp_arg_entry): New.
6619 (predicate_scalar_phi): Use it.
6621 2023-10-02 Tamar Christina <tamar.christina@arm.com>
6623 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
6624 (@xorsign<mode>3): ...This.
6625 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
6626 (@xorsign<mode>3): ..This and emit vectors directly
6627 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
6629 2023-10-02 Tamar Christina <tamar.christina@arm.com>
6631 * emit-rtl.cc (validate_subreg): Relax subreg rule.
6633 2023-10-02 Tamar Christina <tamar.christina@arm.com>
6635 PR tree-optimization/109154
6636 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
6637 (cmp_arg_entry): New.
6638 (predicate_scalar_phi): Use it.
6640 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
6643 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
6645 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
6647 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
6648 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6650 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
6652 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
6654 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
6656 (cpymem<P:mode>) .. this.
6658 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
6660 * combine.cc (simplify_compare_const): Properly handle unsigned
6661 constants while narrowing comparison of memory and constants.
6663 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
6665 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
6666 (MASK_ZIFENCEI): Delete;
6667 (MASK_ZIHINTNTL): Ditto.
6668 (MASK_ZIHINTPAUSE): Ditto.
6669 (TARGET_ZICSR): Ditto.
6670 (TARGET_ZIFENCEI): Ditto.
6671 (TARGET_ZIHINTNTL): Ditto.
6672 (TARGET_ZIHINTPAUSE): Ditto.
6673 (MASK_ZAWRS): Ditto.
6674 (TARGET_ZAWRS): Ditto.
6679 (TARGET_ZBA): Ditto.
6680 (TARGET_ZBB): Ditto.
6681 (TARGET_ZBC): Ditto.
6682 (TARGET_ZBS): Ditto.
6683 (MASK_ZFINX): Ditto.
6684 (MASK_ZDINX): Ditto.
6685 (MASK_ZHINX): Ditto.
6686 (MASK_ZHINXMIN): Ditto.
6687 (TARGET_ZFINX): Ditto.
6688 (TARGET_ZDINX): Ditto.
6689 (TARGET_ZHINX): Ditto.
6690 (TARGET_ZHINXMIN): Ditto.
6698 (MASK_ZKSED): Ditto.
6701 (TARGET_ZBKB): Ditto.
6702 (TARGET_ZBKC): Ditto.
6703 (TARGET_ZBKX): Ditto.
6704 (TARGET_ZKNE): Ditto.
6705 (TARGET_ZKND): Ditto.
6706 (TARGET_ZKNH): Ditto.
6707 (TARGET_ZKR): Ditto.
6708 (TARGET_ZKSED): Ditto.
6709 (TARGET_ZKSH): Ditto.
6710 (TARGET_ZKT): Ditto.
6712 (TARGET_ZTSO): Ditto.
6713 (MASK_VECTOR_ELEN_32): Ditto.
6714 (MASK_VECTOR_ELEN_64): Ditto.
6715 (MASK_VECTOR_ELEN_FP_32): Ditto.
6716 (MASK_VECTOR_ELEN_FP_64): Ditto.
6717 (MASK_VECTOR_ELEN_FP_16): Ditto.
6718 (TARGET_VECTOR_ELEN_32): Ditto.
6719 (TARGET_VECTOR_ELEN_64): Ditto.
6720 (TARGET_VECTOR_ELEN_FP_32): Ditto.
6721 (TARGET_VECTOR_ELEN_FP_64): Ditto.
6722 (TARGET_VECTOR_ELEN_FP_16): Ditto.
6725 (TARGET_ZVBB): Ditto.
6726 (TARGET_ZVBC): Ditto.
6728 (MASK_ZVKNED): Ditto.
6729 (MASK_ZVKNHA): Ditto.
6730 (MASK_ZVKNHB): Ditto.
6731 (MASK_ZVKSED): Ditto.
6732 (MASK_ZVKSH): Ditto.
6734 (MASK_ZVKNC): Ditto.
6735 (MASK_ZVKNG): Ditto.
6737 (MASK_ZVKSC): Ditto.
6738 (MASK_ZVKSG): Ditto.
6740 (TARGET_ZVKG): Ditto.
6741 (TARGET_ZVKNED): Ditto.
6742 (TARGET_ZVKNHA): Ditto.
6743 (TARGET_ZVKNHB): Ditto.
6744 (TARGET_ZVKSED): Ditto.
6745 (TARGET_ZVKSH): Ditto.
6746 (TARGET_ZVKN): Ditto.
6747 (TARGET_ZVKNC): Ditto.
6748 (TARGET_ZVKNG): Ditto.
6749 (TARGET_ZVKS): Ditto.
6750 (TARGET_ZVKSC): Ditto.
6751 (TARGET_ZVKSG): Ditto.
6752 (TARGET_ZVKT): Ditto.
6753 (MASK_ZVL32B): Ditto.
6754 (MASK_ZVL64B): Ditto.
6755 (MASK_ZVL128B): Ditto.
6756 (MASK_ZVL256B): Ditto.
6757 (MASK_ZVL512B): Ditto.
6758 (MASK_ZVL1024B): Ditto.
6759 (MASK_ZVL2048B): Ditto.
6760 (MASK_ZVL4096B): Ditto.
6761 (MASK_ZVL8192B): Ditto.
6762 (MASK_ZVL16384B): Ditto.
6763 (MASK_ZVL32768B): Ditto.
6764 (MASK_ZVL65536B): Ditto.
6765 (TARGET_ZVL32B): Ditto.
6766 (TARGET_ZVL64B): Ditto.
6767 (TARGET_ZVL128B): Ditto.
6768 (TARGET_ZVL256B): Ditto.
6769 (TARGET_ZVL512B): Ditto.
6770 (TARGET_ZVL1024B): Ditto.
6771 (TARGET_ZVL2048B): Ditto.
6772 (TARGET_ZVL4096B): Ditto.
6773 (TARGET_ZVL8192B): Ditto.
6774 (TARGET_ZVL16384B): Ditto.
6775 (TARGET_ZVL32768B): Ditto.
6776 (TARGET_ZVL65536B): Ditto.
6777 (MASK_ZICBOZ): Ditto.
6778 (MASK_ZICBOM): Ditto.
6779 (MASK_ZICBOP): Ditto.
6780 (TARGET_ZICBOZ): Ditto.
6781 (TARGET_ZICBOM): Ditto.
6782 (TARGET_ZICBOP): Ditto.
6783 (MASK_ZICOND): Ditto.
6784 (TARGET_ZICOND): Ditto.
6786 (TARGET_ZFA): Ditto.
6787 (MASK_ZFHMIN): Ditto.
6789 (MASK_ZVFHMIN): Ditto.
6791 (TARGET_ZFHMIN): Ditto.
6792 (TARGET_ZFH): Ditto.
6793 (TARGET_ZVFHMIN): Ditto.
6794 (TARGET_ZVFH): Ditto.
6795 (MASK_ZMMUL): Ditto.
6796 (TARGET_ZMMUL): Ditto.
6804 (TARGET_ZCA): Ditto.
6805 (TARGET_ZCB): Ditto.
6806 (TARGET_ZCE): Ditto.
6807 (TARGET_ZCF): Ditto.
6808 (TARGET_ZCD): Ditto.
6809 (TARGET_ZCMP): Ditto.
6810 (TARGET_ZCMT): Ditto.
6811 (MASK_SVINVAL): Ditto.
6812 (MASK_SVNAPOT): Ditto.
6813 (TARGET_SVINVAL): Ditto.
6814 (TARGET_SVNAPOT): Ditto.
6815 (MASK_XTHEADBA): Ditto.
6816 (MASK_XTHEADBB): Ditto.
6817 (MASK_XTHEADBS): Ditto.
6818 (MASK_XTHEADCMO): Ditto.
6819 (MASK_XTHEADCONDMOV): Ditto.
6820 (MASK_XTHEADFMEMIDX): Ditto.
6821 (MASK_XTHEADFMV): Ditto.
6822 (MASK_XTHEADINT): Ditto.
6823 (MASK_XTHEADMAC): Ditto.
6824 (MASK_XTHEADMEMIDX): Ditto.
6825 (MASK_XTHEADMEMPAIR): Ditto.
6826 (MASK_XTHEADSYNC): Ditto.
6827 (TARGET_XTHEADBA): Ditto.
6828 (TARGET_XTHEADBB): Ditto.
6829 (TARGET_XTHEADBS): Ditto.
6830 (TARGET_XTHEADCMO): Ditto.
6831 (TARGET_XTHEADCONDMOV): Ditto.
6832 (TARGET_XTHEADFMEMIDX): Ditto.
6833 (TARGET_XTHEADFMV): Ditto.
6834 (TARGET_XTHEADINT): Ditto.
6835 (TARGET_XTHEADMAC): Ditto.
6836 (TARGET_XTHEADMEMIDX): Ditto.
6837 (TARGET_XTHEADMEMPAIR): Ditto.
6838 (TARGET_XTHEADSYNC): Ditto.
6839 (MASK_XVENTANACONDOPS): Ditto.
6840 (TARGET_XVENTANACONDOPS): Ditto.
6841 * config/riscv/riscv.opt: Add new Mask defination.
6842 * doc/options.texi: Add explanation for this new usage.
6843 * opt-functions.awk: Add new function to find the index
6844 of target variable from extra_target_vars.
6845 * opt-read.awk: Add new function to store the Mask flags.
6846 * opth-gen.awk: Add new function to output the defination of
6847 Mask Macro and Target Macro.
6849 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
6850 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6851 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6854 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
6855 Change second parameter to rtx *.
6856 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
6857 * config/riscv/vector.md: Changed callers of
6858 riscv_vector::legitimize_move.
6859 (*mov<mode>_mem_to_mem): Remove.
6861 2023-09-30 Jakub Jelinek <jakub@redhat.com>
6864 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
6865 Replace safe_grow with safe_grow_cleared.
6867 2023-09-30 Jakub Jelinek <jakub@redhat.com>
6869 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
6870 in function comment.
6872 2023-09-30 Jakub Jelinek <jakub@redhat.com>
6874 PR middle-end/111625
6875 PR middle-end/111637
6876 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
6878 (bitint_large_huge::handle_operand_addr): For uninitialized operands
6879 use limb_prec or -limb_prec precision.
6881 2023-09-30 Jakub Jelinek <jakub@redhat.com>
6883 * vec.h (quick_grow): Uncomment static_assert.
6885 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
6887 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
6889 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
6891 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
6892 SETs when the outer code is INSN.
6894 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
6896 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
6899 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
6901 * poly-int.h (poly_int_pod): Delete.
6902 (poly_coeff_traits::init_cast): New type.
6903 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
6904 (poly_int): Replace constructors that take 1 and 2 coefficients with
6905 a general one that takes an arbitrary number of coefficients.
6906 Delegate initialization to two new private constructors, one of
6907 which uses the coefficients as-is and one of which adds an extra
6908 zero of the appropriate type (and precision, where applicable).
6909 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
6910 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
6911 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
6912 * gengtype.cc (main): Don't register poly_int64_pod.
6913 * calls.cc (initialize_argument_information): Use poly_int rather
6915 (combine_pending_stack_adjustment_and_call): Likewise.
6916 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
6917 * data-streamer.h (bp_unpack_poly_value): Likewise.
6918 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
6919 (struct queued_reg_save): Likewise.
6920 * dwarf2out.h (struct dw_cfa_location): Likewise.
6921 * emit-rtl.h (struct incoming_args): Likewise.
6922 (struct rtl_data): Likewise.
6923 * expr.cc (get_bit_range): Likewise.
6924 (get_inner_reference): Likewise.
6925 * expr.h (get_bit_range): Likewise.
6926 * fold-const.cc (split_address_to_core_and_offset): Likewise.
6927 (ptr_difference_const): Likewise.
6928 * fold-const.h (ptr_difference_const): Likewise.
6929 * function.cc (try_fit_stack_local): Likewise.
6930 (instantiate_new_reg): Likewise.
6931 * function.h (struct expr_status): Likewise.
6932 (struct args_size): Likewise.
6933 * genmodes.cc (ZERO_COEFFS): Likewise.
6934 (mode_size_inline): Likewise.
6935 (mode_nunits_inline): Likewise.
6936 (emit_mode_precision): Likewise.
6937 (emit_mode_size): Likewise.
6938 (emit_mode_nunits): Likewise.
6939 * gimple-fold.cc (get_base_constructor): Likewise.
6940 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
6941 * inchash.h (class hash): Likewise.
6942 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
6943 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
6945 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
6946 * lra-eliminations.cc (self_elim_offsets): Likewise.
6947 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
6948 * omp-low.cc (omplow_simd_context): Likewise.
6949 * pretty-print.cc (pp_wide_integer): Likewise.
6950 * pretty-print.h (pp_wide_integer): Likewise.
6951 * reload.cc (struct decomposition): Likewise.
6952 * reload.h (struct reload): Likewise.
6953 * reload1.cc (spill_stack_slot_width): Likewise.
6954 (struct elim_table): Likewise.
6955 (offsets_at): Likewise.
6956 (init_eliminable_invariants): Likewise.
6957 * rtl.h (union rtunion): Likewise.
6958 (poly_int_rtx_p): Likewise.
6959 (strip_offset): Likewise.
6960 (strip_offset_and_add): Likewise.
6961 * rtlanal.cc (strip_offset): Likewise.
6962 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
6963 (get_addr_base_and_unit_offset_1): Likewise.
6964 (get_addr_base_and_unit_offset): Likewise.
6965 * tree-dfa.h (get_ref_base_and_extent): Likewise.
6966 (get_addr_base_and_unit_offset_1): Likewise.
6967 (get_addr_base_and_unit_offset): Likewise.
6968 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
6969 (strip_offset): Likewise.
6970 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
6971 * tree.cc (ptrdiff_tree_p): Likewise.
6972 * tree.h (poly_int_tree_p): Likewise.
6973 (ptrdiff_tree_p): Likewise.
6974 (get_inner_reference): Likewise.
6976 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
6978 * config/pa/pa.md (memory_barrier): Revise comment.
6979 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
6980 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
6982 2023-09-29 Jakub Jelinek <jakub@redhat.com>
6984 * vec.h (quick_insert, ordered_remove, unordered_remove,
6985 block_remove, qsort, sort, stablesort, quick_grow): Guard
6986 std::is_trivially_{copyable,default_constructible} and
6987 vec_detail::is_trivially_copyable_or_pair static assertions
6988 with GCC_VERSION >= 5000.
6989 (vec_detail::is_trivially_copyable_or_pair): Guard definition
6990 with GCC_VERSION >= 5000.
6992 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
6994 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
6995 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
6996 and aarch64_stp_policy to aarch64_ldp_stp_policy.
6997 (enum aarch64_stp_policy): Removed.
6998 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
6999 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
7000 and left only the definitions to the aarch64-opts one.
7001 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
7002 (aarch64_parse_stp_policy): Removed.
7003 (aarch64_override_options_internal): Removed calls to parsing
7004 functions and added obvious direct assignments.
7005 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
7006 code quality based on the new changes.
7007 * config/aarch64/aarch64.opt: Use single enum type
7008 aarch64_ldp_stp_policy for both ldp and stp options.
7010 2023-09-29 Richard Biener <rguenther@suse.de>
7012 PR tree-optimization/111583
7013 * tree-loop-distribution.cc (find_single_drs): Ensure the
7014 load/store are always executed.
7016 2023-09-29 Jakub Jelinek <jakub@redhat.com>
7018 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
7019 quick_grow_cleared method on unprom rather than quick_grow.
7021 2023-09-29 Sergei Trofimovich <siarheit@google.com>
7023 PR middle-end/111505
7024 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
7025 Add new helper. Use helper instead of memset() to wipe out pointers.
7027 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
7029 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
7031 * builtins.cc (c_readstr): Likewise. Build a local array of
7032 bytes and use native_decode_rtx to get the rtx image.
7033 (builtin_memcpy_read_str): Simplify accordingly.
7034 (builtin_strncpy_read_str): Likewise.
7035 (builtin_memset_read_str): Likewise.
7036 (builtin_memset_gen_str): Likewise.
7037 * expr.cc (string_cst_read_str): Likewise.
7039 2023-09-29 Jakub Jelinek <jakub@redhat.com>
7041 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
7042 instead of quick_grow on vec<bitmap_head> members.
7043 * cfganal.cc (control_dependences::control_dependences): Likewise.
7044 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
7045 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
7046 on auto_vec<bitmap_head> vars.
7047 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
7048 of quick_grow on vec<bitmap_head> var.
7050 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
7053 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
7055 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
7058 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
7061 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
7062 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
7063 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
7065 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
7068 2023-09-28 Pan Li <pan2.li@intel.com>
7071 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
7073 * config/riscv/vector-iterators.md: New iterator.
7075 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
7077 * rtl.h (lra_in_progress): Change type to bool.
7078 (ira_in_progress): Add new extern.
7079 * ira.cc (ira_in_progress): New global.
7080 (pass_ira::execute): Set up ira_in_progress.
7081 * lra.cc: (lra_in_progress): Change type to bool and initialize.
7082 (lra): Use bool values for lra_in_progress.
7083 * lra-eliminations.cc (init_elim_table): Ditto.
7085 2023-09-28 Richard Biener <rguenther@suse.de>
7088 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
7089 Use a heap allocated worklist for CFG traversal instead of
7092 2023-09-28 Jakub Jelinek <jakub@redhat.com>
7093 Jonathan Wakely <jwakely@redhat.com>
7095 * vec.h: Mention in file comment limited support for non-POD types
7097 (vec_destruct): New function template.
7098 (release): Use it for non-trivially destructible T.
7099 (truncate): Likewise.
7100 (quick_push): Perform a placement new into slot
7101 instead of assignment.
7102 (pop): For non-trivially destructible T return void
7103 rather than T & and destruct the popped element.
7104 (quick_insert, ordered_remove): Note that they aren't suitable
7105 for non-trivially copyable types. Add static_asserts for that.
7106 (block_remove): Assert T is trivially copyable.
7107 (vec_detail::is_trivially_copyable_or_pair): New trait.
7108 (qsort, sort, stablesort): Assert T is trivially copyable or
7109 std::pair with both trivally copyable types.
7110 (quick_grow): Add assert T is trivially default constructible,
7111 for now commented out.
7112 (quick_grow_cleared): Don't call quick_grow, instead inline it
7113 by hand except for the new static_assert.
7114 (gt_ggc_mx): Assert T is trivially destructable.
7115 (auto_vec::operator=): Formatting fixes.
7116 (auto_vec::auto_vec): Likewise.
7117 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
7118 it manually and call quick_grow_cleared method rather than quick_grow.
7119 (safe_grow_cleared): Likewise.
7120 * edit-context.cc (class line_event): Move definition earlier.
7121 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
7123 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
7124 safe_grow_cleared instead of safe_grow followed by placement new
7125 constructing the elements.
7127 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
7129 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
7130 * tree-affine.cc (expr_to_aff_combination): Likewise.
7132 2023-09-28 Richard Biener <rguenther@suse.de>
7134 PR tree-optimization/111614
7135 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
7136 convert the first vector when required.
7138 2023-09-28 xuli <xuli1@eswincomputing.com>
7141 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
7142 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
7144 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
7146 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
7148 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
7151 * configure: Regenerate.
7152 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
7154 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
7155 Philipp Tomsich <philipp.tomsich@vrull.eu>
7156 Manolis Tsamis <manolis.tsamis@vrull.eu>
7158 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
7160 (enum aarch64_stp_policy): New enum type.
7161 * config/aarch64/aarch64-protos.h (struct tune_params): Add
7162 appropriate enums for the policies.
7163 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
7164 * config/aarch64/aarch64-tuning-flags.def
7165 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
7167 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
7168 function to parse ldp-policy parameter.
7169 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
7170 (aarch64_override_options_internal): Call parsing functions.
7171 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
7172 (aarch64_operands_ok_for_ldpstp): Add call to
7173 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
7174 check and alignment check and remove superseded ones.
7175 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
7176 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
7177 check and alignment check and remove superseded ones.
7178 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
7179 (aarch64-stp-policy): New param.
7180 * doc/invoke.texi: Document the parameters accordingly.
7182 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
7184 * tree-data-ref.cc (include calls.h): Add new include.
7185 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
7187 2023-09-27 Richard Biener <rguenther@suse.de>
7189 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
7191 2023-09-27 Jakub Jelinek <jakub@redhat.com>
7194 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
7195 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
7197 * function.cc (assign_parm_find_data_types): Likewise.
7199 2023-09-27 Pan Li <pan2.li@intel.com>
7201 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
7202 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
7203 (enum insn_type): Ditto.
7204 (expand_vec_roundeven): New func decl.
7205 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
7207 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7210 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
7212 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7214 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
7216 2023-09-27 Pan Li <pan2.li@intel.com>
7218 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
7219 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
7220 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
7221 (expand_vec_trunc): Ditto.
7223 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
7227 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
7228 Handle failure from expand_builtin_atomic_test_and_set.
7229 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
7230 generate atomic code through target support, return NULL
7231 instead of emitting non-atomic code. Also, for code handling
7232 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
7233 from calling emit_store_flag_force instead of returning NULL.
7235 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
7237 PR tree-optimization/111599
7238 * value-relation.cc (relation_oracle::valid_equivs): Ensure
7241 2023-09-26 Andrew Pinski <apinski@marvell.com>
7243 PR tree-optimization/106164
7244 PR tree-optimization/111456
7245 * match.pd (`(A ==/!= B) & (A CMP C)`):
7246 Support an optional cast on the second A.
7247 (`(A ==/!= B) | (A CMP C)`): Likewise.
7249 2023-09-26 Andrew Pinski <apinski@marvell.com>
7251 PR tree-optimization/111469
7252 * tree-ssa-phiopt.cc (minmax_replacement): Fix
7253 the assumption for the `non-diamond` handling cases
7256 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7258 * match.pd: Optimize COND_ADD reduction pattern.
7260 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7262 PR tree-optimization/111594
7263 PR tree-optimization/110660
7264 * match.pd: Optimize COND_LEN_ADD reduction.
7266 2023-09-26 Pan Li <pan2.li@intel.com>
7268 * config/riscv/autovec.md (round<mode>2): New pattern.
7269 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
7270 (enum insn_type): Ditto.
7271 (expand_vec_round): New function decl.
7272 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
7274 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
7276 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
7278 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
7280 PR middle-end/111547
7281 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
7282 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
7284 2023-09-26 Pan Li <pan2.li@intel.com>
7286 * config/riscv/autovec.md (rint<mode>2): New pattern.
7287 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
7288 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
7290 2023-09-26 Pan Li <pan2.li@intel.com>
7292 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
7293 * config/riscv/riscv-protos.h (enum insn_type): New enum.
7294 (expand_vec_nearbyint): New function decl.
7295 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
7297 2023-09-26 Pan Li <pan2.li@intel.com>
7299 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
7300 (get_fp_rounding_coefficient): Rename.
7301 (gen_floor_const_fp): Remove.
7302 (expand_vec_ceil): Take renamed func.
7303 (expand_vec_floor): Ditto.
7305 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
7307 PR middle-end/111497
7308 * lra-constraints.cc (lra_constraints): Copy substituted
7310 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
7312 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
7314 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
7315 return statement in the varying case.
7317 2023-09-25 Xi Ruoyao <xry111@xry111.site>
7319 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
7321 2023-09-25 Andrew Pinski <apinski@marvell.com>
7323 PR tree-optimization/110386
7324 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
7326 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7329 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
7331 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
7334 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
7337 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
7340 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
7341 target_option_default_node when the callee has no option
7342 attributes, also simplify the existing code accordingly.
7344 2023-09-25 Guo Jie <guojie@loongson.cn>
7346 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
7347 pattern for vector construction.
7348 (vec_set<mode>_internal): Ditto.
7349 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
7350 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
7351 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
7352 Optimized the implementation of vector construction.
7353 (loongarch_expand_vector_init_same): New function.
7354 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
7355 pattern for vector construction.
7356 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
7358 (vec_concatv2df): Ditto.
7359 (vec_concatv4sf): Ditto.
7361 2023-09-24 Pan Li <pan2.li@intel.com>
7364 * config/riscv/riscv-v.cc
7365 (expand_vector_init_merge_repeating_sequence): Bugfix
7367 2023-09-24 Andrew Pinski <apinski@marvell.com>
7369 PR tree-optimization/111543
7370 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
7372 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7374 * config/riscv/autovec-opt.md: Extend VLS modes
7375 * config/riscv/vector-iterators.md: Ditto.
7377 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7379 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
7381 2023-09-23 Pan Li <pan2.li@intel.com>
7383 * config/riscv/autovec.md (floor<mode>2): New pattern.
7384 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
7385 (enum insn_type): Ditto.
7386 (expand_vec_floor): New function decl.
7387 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
7388 (expand_vec_floor): Ditto.
7390 2023-09-22 Pan Li <pan2.li@intel.com>
7392 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
7393 (emit_vec_float_cmp_mask): Rename.
7394 (expand_vec_copysign): Ditto.
7395 (emit_vec_copysign): Ditto.
7396 (emit_vec_abs): New function impl.
7397 (emit_vec_cvt_x_f): Ditto.
7398 (emit_vec_cvt_f_x): Ditto.
7399 (expand_vec_ceil): Ditto.
7401 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7403 * config/riscv/vector-iterators.md: Extend VLS modes.
7405 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7407 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
7408 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
7409 (vec_duplicate<mode>): Ditto.
7411 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7413 * config/riscv/autovec.md: Add VLS conditional patterns.
7414 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
7415 (expand_cond_binop): Ditto.
7416 (expand_cond_ternop): Ditto.
7417 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
7418 (expand_cond_binop): Ditto.
7419 (expand_cond_ternop): Ditto.
7421 2023-09-22 xuli <xuli1@eswincomputing.com>
7424 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
7425 into vrgatherei16.vv.
7427 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
7429 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
7430 New combine patterns.
7431 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
7433 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
7435 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
7436 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
7438 2023-09-22 Pan Li <pan2.li@intel.com>
7440 * config/riscv/autovec.md (ceil<mode>2): New pattern.
7441 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
7442 (enum insn_type): Ditto.
7443 (expand_vec_ceil): New function decl.
7444 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
7445 (expand_vec_float_cmp_mask): Ditto.
7446 (expand_vec_copysign): Ditto.
7447 (expand_vec_ceil): Ditto.
7448 * config/riscv/vector.md: Add VLS mode support.
7450 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7452 * config/riscv/autovec.md: Extend VLS modes.
7454 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7456 * config/riscv/vector-iterators.md: Extend VLS modes.
7458 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
7459 Robin Dapp <rdapp.gcc@gmail.com>
7461 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
7462 (emit_nonvlmax_insn): Adjust comments.
7463 (emit_vlmax_insn_lra): Adjust comments.
7465 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7467 * config.gcc (*linux*): Set rust target_objs, and
7468 target_has_targetrustm,
7469 * config/t-linux (linux-rust.o): New rule.
7470 * config/linux-rust.cc: New file.
7472 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7474 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
7475 rust_target_objs and target_has_targetrustm.
7476 * config/t-winnt (winnt-rust.o): New rule.
7477 * config/winnt-rust.cc: New file.
7479 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7481 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
7482 and target_has_targetrustm.
7483 * config/fuchsia-rust.cc: New file.
7484 * config/t-fuchsia: New file.
7486 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7488 * config.gcc (*-*-vxworks*): Set rust_target_objs and
7489 target_has_targetrustm.
7490 * config/t-vxworks (vxworks-rust.o): New rule.
7491 * config/vxworks-rust.cc: New file.
7493 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7495 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
7496 target_has_targetrustm.
7497 * config/t-dragonfly (dragonfly-rust.o): New rule.
7498 * config/dragonfly-rust.cc: New file.
7500 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7502 * config.gcc (*-*-solaris2*): Set rust_target_objs and
7503 target_has_targetrustm.
7504 * config/t-sol2 (sol2-rust.o): New rule.
7505 * config/sol2-rust.cc: New file.
7507 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7509 * config.gcc (*-*-openbsd*): Set rust_target_objs and
7510 target_has_targetrustm.
7511 * config/t-openbsd (openbsd-rust.o): New rule.
7512 * config/openbsd-rust.cc: New file.
7514 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7516 * config.gcc (*-*-netbsd*): Set rust_target_objs and
7517 target_has_targetrustm.
7518 * config/t-netbsd (netbsd-rust.o): New rule.
7519 * config/netbsd-rust.cc: New file.
7521 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7523 * config.gcc (*-*-freebsd*): Set rust_target_objs and
7524 target_has_targetrustm.
7525 * config/t-freebsd (freebsd-rust.o): New rule.
7526 * config/freebsd-rust.cc: New file.
7528 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7530 * config.gcc (*-*-darwin*): Set rust_target_objs and
7531 target_has_targetrustm.
7532 * config/t-darwin (darwin-rust.o): New rule.
7533 * config/darwin-rust.cc: New file.
7535 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7537 * config/i386/t-i386 (i386-rust.o): New rule.
7538 * config/i386/i386-rust.cc: New file.
7539 * config/i386/i386-rust.h: New file.
7541 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7543 * doc/tm.texi: Regenerate.
7544 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
7546 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7548 * doc/tm.texi: Regenerate.
7549 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
7550 TARGET_RUST_CPU_INFO.
7552 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
7554 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
7555 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
7556 (tm_rust.h, cs-tm_rust.h, default-rust.o,
7557 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
7558 (s-tm-texi): Also check timestamp on rust-target.def.
7559 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
7560 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
7561 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
7563 * configure: Regenerate.
7564 * configure.ac (tm_rust_file_list, tm_rust_include_list,
7565 rust_target_objs): Add substitutes.
7566 * doc/tm.texi: Regenerate.
7567 * doc/tm.texi.in (targetrustm): Document.
7568 (target_has_targetrustm): Document.
7569 * genhooks.cc: Include rust/rust-target.def.
7570 * config/default-rust.cc: New file.
7572 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7575 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
7576 * config/riscv/predicates.md (autovec_else_operand): New predicate.
7577 * config/riscv/riscv-v.cc (get_else_operand): New function.
7578 (expand_cond_len_unop): Adapt ELSE value.
7579 (expand_cond_len_binop): Ditto.
7580 (expand_cond_len_ternop): Ditto.
7581 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
7582 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
7584 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7587 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
7589 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
7591 PR tree-optimization/111355
7592 * match.pd ((X + C) / N): Update pattern.
7594 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
7596 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
7598 2023-09-21 xuli <xuli1@eswincomputing.com>
7601 * config/riscv/constraints.md (c01): const_int 1.
7605 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
7606 (vector_eew16_stride_operand): Ditto.
7607 (vector_eew32_stride_operand): Ditto.
7608 (vector_eew64_stride_operand): Ditto.
7609 * config/riscv/vector-iterators.md: New iterator for stride operand.
7610 * config/riscv/vector.md: Add stride = element width constraint.
7612 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
7614 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
7615 (const_1_or_4_operand): Ditto.
7616 (vector_gs_scale_operand_16): Ditto.
7617 (vector_gs_scale_operand_32): Ditto.
7618 * config/riscv/vector-iterators.md: Adjust.
7620 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7622 * config/riscv/autovec.md: Extend VLS modes.
7623 * config/riscv/vector-iterators.md: Ditto.
7624 * config/riscv/vector.md: Ditto.
7626 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
7628 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
7629 of the return value.
7630 (ssa_cache::dump): Don't print GLOBAL RANGE header.
7631 (ssa_lazy_cache::merge_range): Adjust return value meaning.
7632 (ranger_cache::dump): Print GLOBAL RANGE header.
7634 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
7636 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
7638 (foperator_unordered_gt::fold_range): Same.
7639 (foperator_unordered_lt::fold_range): Same.
7640 (foperator_unordered_le::fold_range): Same.
7642 2023-09-20 Jakub Jelinek <jakub@redhat.com>
7644 * builtins.h (type_to_class): Declare.
7645 * builtins.cc (type_to_class): No longer static. Return
7646 int rather than enum.
7647 * doc/extend.texi (__builtin_classify_type): Document.
7649 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7652 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
7653 * optabs.cc (maybe_legitimize_operand): Ditto.
7654 (can_reuse_operands_p): Ditto.
7655 * optabs.h (enum expand_operand_type): Ditto.
7656 (create_undefined_input_operand): Ditto.
7658 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
7660 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
7661 'omp allocate' variables; move stack cleanup after other
7663 (omp_notice_variable): Process original decl when decl
7664 of the value-expression for a 'omp allocate' variable is passed.
7665 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
7667 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
7669 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
7670 support simplifying vector int not only scalar int.
7672 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7674 * config/riscv/vector-iterators.md: Extend VLS floating-point.
7676 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7678 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
7680 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
7683 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
7684 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
7686 2023-09-20 Richard Biener <rguenther@suse.de>
7688 PR tree-optimization/111489
7689 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
7691 2023-09-20 Richard Biener <rguenther@suse.de>
7693 PR tree-optimization/111489
7694 * doc/invoke.texi (--param uninit-max-chain-len): Document.
7695 (--param uninit-max-num-chains): Likewise.
7696 * params.opt (-param=uninit-max-chain-len=): New.
7697 (-param=uninit-max-num-chains=): Likewise.
7698 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
7699 param_uninit_max_num_chains.
7700 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
7701 (uninit_analysis::init_use_preds): Avoid VLA.
7702 (uninit_analysis::init_from_phi_def): Likewise.
7703 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
7706 2023-09-20 Jakub Jelinek <jakub@redhat.com>
7708 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
7709 GET_MODE_PRECISION of TImode or DImode depending on whether
7710 TImode is supported scalar mode.
7711 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
7712 * expr.cc (expand_expr_real_1): Likewise.
7713 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
7714 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
7716 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
7718 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
7719 (*n<optab><mode>): Ditto.
7720 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
7721 (*<any_shiftrt:optab>trunc<mode>): Ditto.
7722 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
7723 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
7724 (*single_widen_mult<any_extend:su><mode>): Ditto.
7725 (*single_widen_mul<any_extend:su><mode>): Ditto.
7726 (*single_widen_mult<mode>): Ditto.
7727 (*single_widen_mul<mode>): Ditto.
7728 (*dual_widen_fma<mode>): Ditto.
7729 (*dual_widen_fma<su><mode>): Ditto.
7730 (*single_widen_fma<mode>): Ditto.
7731 (*single_widen_fma<su><mode>): Ditto.
7732 (*dual_fma<mode>): Ditto.
7733 (*single_fma<mode>): Ditto.
7734 (*dual_fnma<mode>): Ditto.
7735 (*dual_widen_fnma<mode>): Ditto.
7736 (*single_fnma<mode>): Ditto.
7737 (*single_widen_fnma<mode>): Ditto.
7738 (*dual_fms<mode>): Ditto.
7739 (*dual_widen_fms<mode>): Ditto.
7740 (*single_fms<mode>): Ditto.
7741 (*single_widen_fms<mode>): Ditto.
7742 (*dual_fnms<mode>): Ditto.
7743 (*dual_widen_fnms<mode>): Ditto.
7744 (*single_fnms<mode>): Ditto.
7745 (*single_widen_fnms<mode>): Ditto.
7747 2023-09-20 Jakub Jelinek <jakub@redhat.com>
7750 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
7751 on vars or function decls if -fopenmp or -fopenmp-simd.
7753 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
7756 * config/riscv/autovec-opt.md: Add missed operand.
7758 2023-09-20 Omar Sandoval <osandov@osandov.com>
7761 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
7762 dwarf_split_debug_info.
7764 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7766 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
7767 (vectorize_related_mode): Add VLS related modes.
7768 * config/riscv/vector-iterators.md: Extend VLS modes.
7770 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
7772 PR rtl-optimization/110071
7773 * ira-color.cc (improve_allocation): Consider cost of callee
7776 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
7777 Xi Ruoyao <xry111@xry111.site>
7779 * configure: Regenerate.
7780 * configure.ac: Checking assembler for -mno-relax support.
7781 Disable relaxation when probing leb128 support.
7783 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
7785 * config.in: Regenerate.
7786 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
7787 mrelax. And set the initial value of explicit-relocs according to the
7789 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
7790 --no-relax option to the linker.
7791 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
7792 -mno-relax, pass the -mno-relax option to the assembler.
7793 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
7794 * config/loongarch/loongarch.opt: Regenerate.
7795 * configure: Regenerate.
7796 * configure.ac: Add detection of support for binutils relax function.
7798 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
7800 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
7801 -fdeps-target= flags.
7802 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
7803 only -fdeps-format= is specified.
7804 * json.h: Add a TODO item to refactor out to share with
7807 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
7808 Jason Merrill <jason@redhat.com>
7810 * gcc.cc (join_spec_func): Add a spec function to join all
7813 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
7815 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
7816 src_op_0 var to avoid rtl check error.
7818 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
7820 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
7822 (operator_not_equal::fold_range): Handle VREL_EQ.
7823 (operator_lt::fold_range): Remove special casing for VREL_EQ.
7824 (operator_gt::fold_range): Same.
7825 (foperator_unordered_equal::fold_range): Same.
7827 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
7829 * doc/extend.texi: Document attributes hot, cold on C++ types.
7831 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
7833 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
7834 modulo instruction is disabled.
7835 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
7836 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
7837 (define_expand umod<mode>3): New.
7838 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
7839 instruction is disabled.
7840 (umodti3, modti3): Check if the modulo instruction is disabled.
7842 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
7844 * doc/gm2.texi (fdebug-builtins): Correct description.
7846 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
7848 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
7849 * config/iq2000/iq2000.md (rotrsi3): Use it.
7851 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
7853 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
7854 (operator_lt::op2_range): Same.
7855 (operator_le::op1_range): Same.
7856 (operator_le::op2_range): Same.
7857 (operator_gt::op1_range): Same.
7858 (operator_gt::op2_range): Same.
7859 (operator_ge::op1_range): Same.
7860 (operator_ge::op2_range): Same.
7861 (foperator_unordered_lt::op1_range): Same.
7862 (foperator_unordered_lt::op2_range): Same.
7863 (foperator_unordered_le::op1_range): Same.
7864 (foperator_unordered_le::op2_range): Same.
7865 (foperator_unordered_gt::op1_range): Same.
7866 (foperator_unordered_gt::op2_range): Same.
7867 (foperator_unordered_ge::op1_range): Same.
7868 (foperator_unordered_ge::op2_range): Same.
7870 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
7872 * value-range.h (frange::update_nan): New.
7874 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
7876 * range-op-float.cc (operator_not_equal::op2_range): New.
7877 * range-op-mixed.h: Add operator_not_equal::op2_range.
7879 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
7881 PR tree-optimization/110080
7882 PR tree-optimization/110249
7883 * tree-vrp.cc (remove_unreachable::final_p): New.
7884 (remove_unreachable::maybe_register): Rename from
7885 maybe_register_block and call early or final routine.
7886 (fully_replaceable): New.
7887 (remove_unreachable::handle_early): New.
7888 (remove_unreachable::remove_and_update_globals): Remove
7889 non-final processing.
7890 (rvrp_folder::rvrp_folder): Add final flag to constructor.
7891 (rvrp_folder::post_fold_bb): Remove unreachable registration.
7892 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
7893 (execute_ranger_vrp): Adjust some call parameters.
7895 2023-09-19 Richard Biener <rguenther@suse.de>
7898 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
7900 * tree-pretty-print.cc (op_symbol): Likewise.
7901 (op_symbol_code): Print TDF_GIMPLE variant if requested.
7902 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
7904 (dump_gimple_cond): Likewise.
7906 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
7907 Pan Li <pan2.li@intel.com>
7909 * tree-streamer.h (bp_unpack_machine_mode): If
7910 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
7912 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7914 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
7916 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7918 * config/riscv/autovec.md: Extend VLS modes.
7919 * config/riscv/vector.md: Ditto.
7921 2023-09-19 Richard Biener <rguenther@suse.de>
7923 PR tree-optimization/111465
7924 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
7925 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
7927 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7929 * config/riscv/autovec.md: Extend VLS floating-point modes.
7930 * config/riscv/vector.md: Ditto.
7932 2023-09-19 Jakub Jelinek <jakub@redhat.com>
7934 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
7935 nor check type_has_mode_precision_p for width larger than [TD]Imode
7937 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
7938 to type. Use boolean_true_node instead of
7939 constant_boolean_node (true, boolean_type_node). Formatting fixes.
7941 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7943 * config/riscv/autovec.md: Add VLS modes.
7944 * config/riscv/vector.md: Ditto.
7946 2023-09-19 Jakub Jelinek <jakub@redhat.com>
7948 * tree.cc (build_bitint_type): Assert precision is not 0, or
7950 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
7951 of unsigned _BitInt(1).
7953 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
7955 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
7956 Removed old combine patterns.
7957 (*single_<optab>mult_plus<mode>): Ditto.
7958 (*double_<optab>mult_plus<mode>): Ditto.
7959 (*sign_zero_extend_fma): Ditto.
7960 (*zero_sign_extend_fma): Ditto.
7961 (*double_widen_fma<mode>): Ditto.
7962 (*single_widen_fma<mode>): Ditto.
7963 (*double_widen_fnma<mode>): Ditto.
7964 (*single_widen_fnma<mode>): Ditto.
7965 (*double_widen_fms<mode>): Ditto.
7966 (*single_widen_fms<mode>): Ditto.
7967 (*double_widen_fnms<mode>): Ditto.
7968 (*single_widen_fnms<mode>): Ditto.
7969 (*reduc_plus_scal_<mode>): Adjust name.
7970 (*widen_reduc_plus_scal_<mode>): Adjust name.
7971 (*dual_widen_fma<mode>): New combine pattern.
7972 (*dual_widen_fmasu<mode>): Ditto.
7973 (*dual_widen_fmaus<mode>): Ditto.
7974 (*dual_fma<mode>): Ditto.
7975 (*single_fma<mode>): Ditto.
7976 (*dual_fnma<mode>): Ditto.
7977 (*single_fnma<mode>): Ditto.
7978 (*dual_fms<mode>): Ditto.
7979 (*single_fms<mode>): Ditto.
7980 (*dual_fnms<mode>): Ditto.
7981 (*single_fnms<mode>): Ditto.
7982 * config/riscv/autovec.md (fma<mode>4):
7983 Reafctor fma pattern.
7984 (*fma<VI:mode><P:mode>): Removed.
7985 (fnma<mode>4): Reafctor.
7986 (*fnma<VI:mode><P:mode>): Removed.
7987 (*fma<VF:mode><P:mode>): Removed.
7988 (*fnma<VF:mode><P:mode>): Removed.
7989 (fms<mode>4): Reafctor.
7990 (*fms<VF:mode><P:mode>): Removed.
7991 (fnms<mode>4): Reafctor.
7992 (*fnms<VF:mode><P:mode>): Removed.
7993 * config/riscv/riscv-protos.h (prepare_ternary_operands):
7995 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
7996 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
7997 (*pred_mul_plus<mode>): Removed.
7998 (*pred_mul_plus<mode>_scalar): Removed.
7999 (*pred_mul_plus<mode>_extended_scalar): Removed.
8000 (*pred_minus_mul<mode>_undef): New pattern.
8001 (*pred_minus_mul<mode>): Removed.
8002 (*pred_minus_mul<mode>_scalar): Removed.
8003 (*pred_minus_mul<mode>_extended_scalar): Removed.
8004 (*pred_mul_<optab><mode>_undef): New pattern.
8005 (*pred_mul_<optab><mode>): Removed.
8006 (*pred_mul_<optab><mode>_scalar): Removed.
8007 (*pred_mul_neg_<optab><mode>_undef): New pattern.
8008 (*pred_mul_neg_<optab><mode>): Removed.
8009 (*pred_mul_neg_<optab><mode>_scalar): Removed.
8011 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
8013 * config/riscv/riscv-vector-builtins.cc
8014 (builtin_decl, expand_builtin): Replace SVE with RVV.
8016 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
8018 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
8019 riscv-cmo.def and riscv-scalar-crypto.def.
8021 2023-09-18 Pan Li <pan2.li@intel.com>
8023 * config/riscv/autovec.md: Extend to vls mode.
8025 2023-09-18 Pan Li <pan2.li@intel.com>
8027 * config/riscv/autovec.md: Bugfix.
8028 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
8030 2023-09-18 Andrew Pinski <apinski@marvell.com>
8032 PR tree-optimization/111442
8033 * match.pd (zero_one_valued_p): Have the bit_and match not be
8036 2023-09-18 Andrew Pinski <apinski@marvell.com>
8038 PR tree-optimization/111435
8039 * match.pd (zero_one_valued_p): Don't do recursion
8042 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
8044 * config/darwin-protos.h (enum darwin_external_toolchain): New.
8045 * config/darwin.cc (DSYMUTIL_VERSION): New.
8046 (darwin_override_options): Choose the default debug DWARF version
8047 depending on the configured dsymutil version.
8049 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
8051 * configure: Regenerate.
8052 * configure.ac: Handle explict disable of stdlib option, set
8053 defaults for Darwin.
8055 2023-09-18 Andrew Pinski <apinski@marvell.com>
8057 PR tree-optimization/111431
8058 * match.pd (`(a == CST) & a`): New pattern.
8060 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8062 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
8063 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
8065 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
8068 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
8069 Add support for immediates using shifted ORR/BIC.
8070 (aarch64_split_dimode_const_store): Apply if we save one instruction.
8071 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
8072 Make pattern global.
8074 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
8076 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
8077 (neoverse-v1): Place before zeus.
8078 (neoverse-v2): Place before demeter.
8079 * config/aarch64/aarch64-tune.md: Regenerate.
8081 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8083 * config/riscv/autovec.md: Add VLS modes.
8084 * config/riscv/vector-iterators.md: Ditto.
8085 * config/riscv/vector.md: Ditto.
8087 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8089 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
8090 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
8092 2023-09-18 Richard Biener <rguenther@suse.de>
8094 PR tree-optimization/111294
8095 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
8097 (back_threader::find_paths_to_names): Adjust.
8098 (back_threader::maybe_thread_block): Likewise.
8099 (back_threader_profitability::possibly_profitable_path_p): Remove
8100 code applying extra costs to copies PHIs.
8102 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8104 * config/riscv/autovec.md: Extend VLS modes.
8105 * config/riscv/vector.md: Ditto.
8107 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8109 * config/riscv/vector.md (mov<mode>): New pattern.
8110 (*mov<mode>_mem_to_mem): Ditto.
8111 (*mov<mode>): Ditto.
8112 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
8113 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
8114 (*mov<mode>_vls): Ditto.
8115 (movmisalign<mode>): Ditto.
8116 (@vec_duplicate<mode>): Ditto.
8117 * config/riscv/autovec-vls.md: Removed.
8119 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8122 * config/riscv/autovec.md: Add VLS modes.
8124 2023-09-18 Jason Merrill <jason@redhat.com>
8126 * doc/gty.texi: Add discussion of cache vs. deletable.
8128 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8130 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
8131 (copysign<mode>3): Ditto.
8132 (xorsign<mode>3): Ditto.
8133 (<optab><mode>2): Ditto.
8134 * config/riscv/autovec.md: Extend VLS modes.
8136 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
8138 PR middle-end/111303
8139 * match.pd ((t * 2) / 2): Update pattern.
8141 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
8143 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
8145 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8148 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
8149 (vec_extract<mode><vel>): Ditto.
8150 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
8151 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
8152 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
8154 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
8156 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
8157 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
8158 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
8159 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
8160 new insn/expansions.
8161 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
8162 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
8163 (*riscv_<sha256_op>_si): New raw instruction for RV32.
8164 (*riscv_<sm3_op>_si): Ditto.
8165 (*riscv_<sm4_op>_si): Ditto.
8166 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
8167 (riscv_<sm3_op>_di_extended): Ditto.
8168 (riscv_<sm4_op>_di_extended): Ditto.
8169 (riscv_<sha256_op>_si): New common instruction expansion.
8170 (riscv_<sm3_op>_si): Ditto.
8171 (riscv_<sm4_op>_si): Ditto.
8172 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
8173 "crypto_zksh" and "crypto_zksed". Remove availability
8174 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
8175 * config/riscv/riscv-ftypes.def: Remove unused function type.
8176 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
8177 intrinsics to operate on uint32_t.
8179 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
8181 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
8182 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
8183 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
8184 Removed as no longer used.
8185 (RISCV_ATYPE_UDI): New for uint64_t.
8186 * config/riscv/riscv-cmo.def: Make types unsigned for not working
8187 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
8188 argument/return types.
8189 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
8190 number and shift amount types unsigned.
8191 * config/riscv/riscv-scalar-crypto.def: Ditto.
8193 2023-09-16 Pan Li <pan2.li@intel.com>
8195 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
8197 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
8199 * config/riscv/predicates.md: Restrict predicate
8200 to allow 'reg' only.
8202 2023-09-15 Andrew Pinski <apinski@marvell.com>
8204 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
8205 Also match `a & zero_one_valued_p` too.
8207 2023-09-15 Andrew Pinski <apinski@marvell.com>
8209 PR tree-optimization/111414
8210 * match.pd (`(1 >> X) != 0`): Check to see if
8211 the integer_onep was an integral type (not a vector type).
8213 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
8215 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
8216 run phi analysis, and do it before loop analysis.
8218 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
8220 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
8223 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
8225 PR tree-optimization/111407
8226 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
8227 when one of the operands is subject to abnormal coalescing.
8229 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
8231 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
8232 (enum insn_type): Ditto.
8233 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
8234 (emit_vlmax_insn): Adjust.
8235 (emit_nonvlmax_insn): Adjust.
8236 (emit_vlmax_insn_lra): Adjust.
8238 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
8240 * config/riscv/autovec-opt.md: Adjust.
8241 * config/riscv/autovec.md: Ditto.
8242 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
8243 (expand_reduction): Adjust expand_reduction prototype.
8244 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
8245 (expand_reduction): Refactor expand_reduction.
8247 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
8250 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
8251 the lower memory access to a mem-pair operand.
8253 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
8255 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
8256 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
8257 before the driver canonicalization routines.
8258 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
8259 to loongarch-driver.h
8260 * config/loongarch/t-linux: Move multilib-related definitions to
8262 * config/loongarch/t-multilib: New file. Inject library build
8263 options obtained from --with-multilib-list.
8264 * config/loongarch/t-loongarch: Same.
8266 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
8269 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
8270 New combine pattern.
8271 (*fold_left_widen_plus_<mode>): Ditto.
8272 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
8273 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
8274 Change from define_expand to define_insn_and_split.
8275 (fold_left_plus_<mode>): Ditto.
8276 (mask_len_fold_left_plus_<mode>): Ditto.
8277 * config/riscv/riscv-v.cc (expand_reduction):
8278 Support widen reduction.
8279 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
8280 Add new iterators and attrs.
8282 2023-09-14 David Malcolm <dmalcolm@redhat.com>
8284 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
8285 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
8286 (sarif_thread_flow::sarif_thread_flow): New.
8287 (sarif_builder::make_code_flow_object): Reimplement, creating
8288 per-thread threadFlow objects, populating them with the relevant
8290 (sarif_builder::make_thread_flow_object): Delete, moving the
8291 code into sarif_builder::make_code_flow_object.
8292 (sarif_builder::make_thread_flow_location_object): Add
8293 "path_event_idx" param. Use it to set "executionOrder"
8295 * diagnostic-path.h (diagnostic_event::get_thread_id): New
8297 (class diagnostic_thread): New.
8298 (diagnostic_path::num_threads): New pure-virtual vfunc.
8299 (diagnostic_path::get_thread): New pure-virtual vfunc.
8300 (diagnostic_path::multithreaded_p): New decl.
8301 (simple_diagnostic_event::simple_diagnostic_event): Add optional
8303 (simple_diagnostic_event::get_thread_id): New accessor.
8304 (simple_diagnostic_event::m_thread_id): New.
8305 (class simple_diagnostic_thread): New.
8306 (simple_diagnostic_path::simple_diagnostic_path): Move definition
8308 (simple_diagnostic_path::num_threads): New.
8309 (simple_diagnostic_path::get_thread): New.
8310 (simple_diagnostic_path::add_thread): New.
8311 (simple_diagnostic_path::add_thread_event): New.
8312 (simple_diagnostic_path::m_threads): New.
8313 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
8314 param for overriding the context's printer.
8315 (diagnostic_show_locus): Likwise.
8316 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
8317 Move here from diagnostic-path.h. Add main thread.
8318 (simple_diagnostic_path::num_threads): New.
8319 (simple_diagnostic_path::get_thread): New.
8320 (simple_diagnostic_path::add_thread): New.
8321 (simple_diagnostic_path::add_thread_event): New.
8322 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
8323 param and use it to initialize m_thread_id. Reformat.
8324 * diagnostic.h: Add pretty_printer param for overriding the
8326 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
8327 (can_consolidate_events): Compare thread ids.
8328 (class per_thread_summary): New.
8329 (event_range::event_range): Add per_thread_summary arg.
8330 (event_range::print): Add "pp" param and use it rather than dc's
8332 (event_range::m_thread_id): New field.
8333 (event_range::m_per_thread_summary): New field.
8334 (path_summary::multithreaded_p): New.
8335 (path_summary::get_events_for_thread_id): New.
8336 (path_summary::m_per_thread_summary): New field.
8337 (path_summary::m_thread_id_to_events): New field.
8338 (path_summary::get_or_create_events_for_thread_id): New.
8339 (path_summary::path_summary): Create per_thread_summary instances
8340 as needed and associate the event_range instances with them.
8341 (base_indent): Move here from print_path_summary_as_text.
8342 (per_frame_indent): Likewise.
8343 (class thread_event_printer): New, adapted from parts of
8344 print_path_summary_as_text.
8345 (print_path_summary_as_text): Make static. Reimplement to
8346 moving most of existing code to class thread_event_printer,
8347 capturing state as per-thread as appropriate.
8348 (default_tree_diagnostic_path_printer): Add missing 'break' on
8351 2023-09-14 David Malcolm <dmalcolm@redhat.com>
8353 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
8354 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
8355 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
8356 clearing the deletable gcc_root_tab_t.
8357 (ggc_common_finalize): New.
8358 * ggc.h (ggc_common_finalize): New decl.
8359 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
8360 ggc_common_finalize.
8362 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
8364 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
8365 unsigned comparisons.
8366 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
8367 generation of salt/saltu instructions.
8368 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
8369 * config/xtensa/xtensa.md (salt, saltu): New instruction
8372 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
8374 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
8377 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
8379 * config/riscv/autovec.md: Change rtx code to unspec.
8380 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
8381 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
8382 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
8384 (class widen_freducop): Removed.
8385 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
8386 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
8387 (@pred_<reduc_op><mode>): New name.
8388 (@pred_widen_reduc_plus<v_su><mode>): Change name.
8389 (@pred_reduc_plus<order><mode>): Change name.
8390 (@pred_widen_reduc_plus<order><mode>): Change name.
8392 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
8394 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
8395 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
8396 * config/riscv/vector-iterators.md: New iterators and attrs.
8397 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
8399 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
8400 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
8401 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
8402 (@pred_reduc_<reduc><mode>): Added.
8403 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
8404 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
8405 (@pred_widen_reduc_plus<v_su><mode>): Added.
8406 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
8407 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
8408 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
8409 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
8410 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
8411 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
8412 (@pred_reduc_plus<order><mode>): Added.
8413 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
8414 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
8415 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
8416 (@pred_widen_reduc_plus<order><mode>): Added.
8418 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
8420 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
8421 Move WHILELO handling to...
8422 (aarch64_vector_costs::finish_cost): ...here. Check whether the
8423 vectorizer has decided to use a predicated loop.
8425 2023-09-14 Andrew Pinski <apinski@marvell.com>
8427 PR tree-optimization/106164
8428 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
8429 Expand to support constants that are off by one.
8431 2023-09-14 Andrew Pinski <apinski@marvell.com>
8433 * genmatch.cc (parser::parse_result): For an else clause
8434 of an if statement inside a switch, error out explictly.
8436 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8438 * config/riscv/autovec-opt.md: Add VLS mask modes.
8439 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
8440 (vcond_mask_<mode><vm>): Add VLS mask modes.
8441 * config/riscv/vector.md: Ditto.
8443 2023-09-14 Richard Biener <rguenther@suse.de>
8445 PR tree-optimization/111294
8446 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
8447 operands that eventually become dead and use simple_dce_from_worklist
8448 to remove their definitions if they did so.
8450 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
8452 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
8453 Accept all nonimmediate_operands, but keep the existing constraints.
8454 If the instruction is split before RA, load invalid addresses into
8455 a temporary register.
8456 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
8458 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8461 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
8462 (vector_insn_info::global_merge): Ditto.
8463 (vector_insn_info::get_avl_or_vl_reg): Ditto.
8465 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8467 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
8469 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
8471 * config/loongarch/loongarch-def.c: Modify the default value of
8474 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
8476 * config/xtensa/xtensa.cc (xtensa_expand_scc):
8477 Revert the changes from the last patch, as the work in the RTL
8478 expansion pass is too far to determine the physical registers.
8479 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
8480 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
8482 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
8485 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
8487 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8489 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
8490 (@vec_extract<mode><vel>): Ditto.
8491 * config/riscv/vector.md: Ditto
8493 2023-09-13 Andrew Pinski <apinski@marvell.com>
8495 * match.pd (`X <= MAX(X, Y)`):
8496 Move before `MIN (X, C1) < C2` pattern.
8498 2023-09-13 Andrew Pinski <apinski@marvell.com>
8500 PR tree-optimization/111364
8501 * match.pd (`MIN (X, Y) == X`): Extend
8502 to min/lt, min/ge, max/gt, max/le.
8504 2023-09-13 Andrew Pinski <apinski@marvell.com>
8506 PR tree-optimization/111345
8507 * match.pd (`Y > (X % Y)`): Merge
8509 (`(X % Y) < Y`): Pattern by adding `:c`
8512 2023-09-13 Richard Biener <rguenther@suse.de>
8514 PR tree-optimization/111387
8515 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
8516 EDGE_DFS_BACK when doing BB vectorization.
8517 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
8518 to compute RPO and mark backedges.
8520 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
8522 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
8523 New combine pattern.
8524 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
8525 (<mulh_table><mode>3_highpart): Merged pattern.
8526 (umul<mode>3_highpart): Mrege smul and umul.
8527 * config/riscv/vector-iterators.md (umul): New iterators.
8528 (UNSPEC_VMULHU): New iterators.
8530 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
8532 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
8533 New combine pattern.
8534 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
8536 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
8538 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
8539 (*cond_copysign<mode>): New combine pattern.
8540 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
8542 2023-09-13 Richard Biener <rguenther@suse.de>
8544 PR tree-optimization/111397
8545 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
8546 argument to specify whether the PHI destination doesn't flow in
8547 from an abnormal PHI.
8548 (propagate_value): Adjust.
8549 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
8551 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
8553 (process_bb): Likewise.
8555 2023-09-13 Pan Li <pan2.li@intel.com>
8558 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
8560 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
8562 PR tree-optimization/111303
8563 * match.pd ((X - N * M) / N): Add undefined_p checking.
8564 ((X + N * M) / N): Likewise.
8565 ((X + C) div_rshift N): Likewise.
8567 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8570 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
8572 2023-09-12 Martin Jambor <mjambor@suse.cz>
8574 * dbgcnt.def (form_fma): New.
8575 * tree-ssa-math-opts.cc: Include dbgcnt.h.
8576 (convert_mult_to_fma): Bail out if the debug counter say so.
8578 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
8580 * config/riscv/autovec-opt.md: Update type
8581 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
8583 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8585 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
8587 (aarch64_layout_frame): Use it to decide whether locals should
8588 go above or below the saved registers.
8589 (aarch64_expand_prologue): Update stack layout comment.
8590 Emit a stack tie after the final adjustment.
8592 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8594 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
8595 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
8596 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
8598 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8600 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
8601 (aarch64_frame::hard_fp_save_and_probe): New fields.
8602 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
8603 Rather than asserting that a leaf function saves LR, instead assert
8604 that a leaf function saves something.
8605 (aarch64_get_separate_components): Prevent the chosen probe
8606 registers from being individually shrink-wrapped.
8607 (aarch64_allocate_and_probe_stack_space): Remove workaround for
8608 probe registers that aren't at the bottom of the previous allocation.
8610 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8612 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
8613 Always probe the residual allocation at offset 1024, asserting
8614 that that is in range.
8616 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8618 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
8619 the LR save slot is in the first 16 bytes of the register save area.
8620 Only form STP/LDP push/pop candidates if both registers are valid.
8621 (aarch64_allocate_and_probe_stack_space): Remove workaround for
8622 when LR was not in the first 16 bytes.
8624 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8626 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
8627 Don't probe final allocations that are exactly 1KiB in size (after
8628 unprobed space above the final allocation has been deducted).
8630 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8632 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
8633 calculation of initial_adjust for frames in which all saves
8636 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8638 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
8639 the allocation of the top of the frame.
8641 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8643 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
8645 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
8646 from the bottom of the frame, rather than the bottom of the saved
8647 register area. Measure reg_offset from the bottom of the frame
8648 rather than the bottom of the saved register area.
8649 (aarch64_save_callee_saves): Update accordingly.
8650 (aarch64_restore_callee_saves): Likewise.
8651 (aarch64_get_separate_components): Likewise.
8652 (aarch64_process_components): Likewise.
8654 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8656 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
8658 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8660 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
8662 (aarch64_frame::bytes_above_hard_fp): ...this.
8663 * config/aarch64/aarch64.cc (aarch64_layout_frame)
8664 (aarch64_expand_prologue): Update accordingly.
8665 (aarch64_initial_elimination_offset): Likewise.
8667 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8669 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
8670 (aarch64_frame::bytes_above_locals): ...this.
8671 * config/aarch64/aarch64.cc (aarch64_layout_frame)
8672 (aarch64_initial_elimination_offset): Update accordingly.
8674 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8676 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
8677 calculation of chain_offset into the emit_frame_chain block.
8679 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8681 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
8682 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
8683 callee_offset handling.
8684 (aarch64_save_callee_saves): Replace the start_offset parameter
8685 with a bytes_below_sp parameter.
8686 (aarch64_restore_callee_saves): Likewise.
8687 (aarch64_expand_prologue): Update accordingly.
8688 (aarch64_expand_epilogue): Likewise.
8690 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8692 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
8694 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
8695 (aarch64_expand_epilogue): Use it instead of
8696 below_hard_fp_saved_regs_size.
8698 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8700 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
8702 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
8703 and use it instead of crtl->outgoing_args_size.
8704 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
8705 of outgoing_args_size.
8706 (aarch64_process_components): Likewise.
8708 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8710 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
8711 allocate the frame in one go if there are no saved registers.
8713 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8715 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
8716 chain_offset rather than callee_offset.
8718 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
8720 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
8721 a local shorthand for cfun->machine->frame.
8722 (aarch64_restore_callee_saves, aarch64_get_separate_components):
8723 (aarch64_process_components): Likewise.
8724 (aarch64_allocate_and_probe_stack_space): Likewise.
8725 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
8726 (aarch64_layout_frame): Use existing shorthand for one more case.
8728 2023-09-12 Andrew Pinski <apinski@marvell.com>
8730 PR tree-optimization/107881
8731 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
8732 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
8734 2023-09-12 Pan Li <pan2.li@intel.com>
8736 * config/riscv/riscv-vector-costs.h (struct range): Removed.
8738 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8740 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
8741 (compute_nregs_for_mode): Ditto.
8742 (live_range_conflict_p): Ditto.
8743 (max_number_of_live_regs): Ditto.
8744 (compute_lmul): Ditto.
8745 (costs::prefer_new_lmul_p): Ditto.
8746 (costs::better_main_loop_than_p): Ditto.
8747 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
8748 (struct var_live_range): Ditto.
8749 (struct autovec_info): Ditto.
8750 * config/riscv/t-riscv: Update makefile for COST model.
8752 2023-09-12 Jakub Jelinek <jakub@redhat.com>
8754 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
8757 2023-09-12 Jakub Jelinek <jakub@redhat.com>
8759 PR middle-end/111338
8760 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
8762 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
8763 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
8764 optimization if type's precision is too large for
8765 vn_walk_cb_data::bufsize.
8767 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
8769 * doc/gm2.texi (Compiler options): Document new option
8772 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
8774 * doc/sourcebuild.texi (stack_size): Update.
8776 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
8778 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
8779 (<optab>_not<mode>3): Likewise.
8780 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
8782 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
8784 (GEN_EMIT_HELPER2): Likewise.
8785 (emit_strcmp_scalar_compare_byte): New function.
8786 (emit_strcmp_scalar_compare_subword): Likewise.
8787 (emit_strcmp_scalar_compare_word): Likewise.
8788 (emit_strcmp_scalar_load_and_compare): Likewise.
8789 (emit_strcmp_scalar_call_to_libc): Likewise.
8790 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
8791 (emit_strcmp_scalar_result_calculation): Likewise.
8792 (riscv_expand_strcmp_scalar): Likewise.
8793 (riscv_expand_strcmp): Likewise.
8794 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
8796 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
8797 (cmpstrnsi): Invoke expansion function for str(n)cmp.
8798 (cmpstrsi): Likewise.
8799 * config/riscv/riscv.opt: Add new parameter
8800 '-mstring-compare-inline-limit'.
8801 * doc/invoke.texi: Document new parameter
8802 '-mstring-compare-inline-limit'.
8804 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
8806 * config.gcc: Add new object riscv-string.o.
8808 * config/riscv/riscv-protos.h (riscv_expand_strlen):
8810 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
8811 * config/riscv/riscv.opt: New flag 'minline-strlen'.
8812 * config/riscv/t-riscv: Add new object riscv-string.o.
8813 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
8814 (th_rev<mode>2): Likewise.
8815 (th_tstnbz<mode>2): New INSN.
8816 * doc/invoke.texi: Document '-minline-strlen'.
8817 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
8818 (emit_unlikely_jump_insn): Likewise.
8819 * rtl.h (emit_likely_jump_insn): New prototype.
8820 (emit_unlikely_jump_insn): Likewise.
8821 * config/riscv/riscv-string.cc: New file.
8823 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
8825 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
8826 (TARGET_SUPPORTS_ALIASES): Define.
8828 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
8830 * doc/sourcebuild.texi (check-function-bodies): Update.
8832 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
8834 * gimplify.cc (gimplify_bind_expr): Check for
8835 insertion after variable cleanup. Convert 'omp allocate'
8836 var-decl attribute to GOMP_alloc/GOMP_free calls.
8838 2023-09-12 xuli <xuli1@eswincomputing.com>
8840 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
8841 parameter e and replace NULL_RTX with gcc_unreachable.
8843 2023-09-12 xuli <xuli1@eswincomputing.com>
8845 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
8847 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8848 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
8849 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
8851 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8852 * config/riscv/riscv-vector-builtins.cc: Add args type.
8854 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
8856 * config/riscv/riscv.cc
8857 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
8858 riscv_avoid_shrink_wrapping_separate.
8859 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
8861 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
8863 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
8865 * shrink-wrap.cc (try_shrink_wrapping_separate):call
8866 use_shrink_wrapping_separate.
8867 (use_shrink_wrapping_separate): wrap the condition
8868 check in use_shrink_wrapping_separate.
8869 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
8871 2023-09-11 Andrew Pinski <apinski@marvell.com>
8873 PR tree-optimization/111348
8874 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
8875 the cmp part of the pattern.
8877 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
8880 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
8881 Call output_addr_const for CASE_CONST_SCALAR_INT.
8883 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
8885 * config/riscv/thead.md: Update types
8887 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
8889 * config/riscv/riscv.md: Update types
8891 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
8893 * config/riscv/riscv.md: Add "zicond" type
8894 * config/riscv/zicond.md: Update types
8896 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
8898 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
8899 * config/riscv/zc.md: Update types
8901 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
8903 * config/riscv/autovec-opt.md: Update types
8904 * config/riscv/autovec.md: likewise
8906 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8908 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
8910 (s390_vec_unsigned_flt): Ditto.
8911 (s390_vec_revb_flt): Ditto.
8912 (s390_vec_reve_flt): Ditto.
8913 (s390_vclfnhs): Fix operand flags.
8914 (s390_vclfnls): Ditto.
8915 (s390_vcrnfs): Ditto.
8919 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8921 * config/s390/s390-builtins.def (O_U64): New.
8926 (O_M12): Change bit position.
8937 (OB_DEF_VAR): Add operand constraints.
8939 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
8942 2023-09-11 Andrew Pinski <apinski@marvell.com>
8944 PR tree-optimization/111349
8945 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
8946 the cmp part of the pattern.
8948 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8951 * config/riscv/riscv.opt: Set default as scalable vectorization.
8953 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8955 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
8956 (get_all_successors): Ditto.
8957 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
8958 (get_all_successors): Ditto.
8960 2023-09-11 Jakub Jelinek <jakub@redhat.com>
8962 PR middle-end/111329
8963 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
8964 function. For printing values which don't fit into digit_buffer
8965 use out-of-line function.
8966 * wide-int-print.h (pp_wide_int_large): Declare.
8967 * wide-int-print.cc: Include pretty-print.h.
8968 (pp_wide_int_large): Define.
8970 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8972 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
8973 Use dominance analysis.
8974 (pass_vsetvl::init): Ditto.
8975 (pass_vsetvl::done): Ditto.
8977 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8980 * config/riscv/autovec.md: Add VLS modes.
8981 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
8982 (cmp_lmul_gt_one): Ditto.
8983 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
8984 (cmp_lmul_gt_one): Ditto.
8985 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
8986 (riscv_vectorize_vec_perm_const): Ditto.
8987 * config/riscv/vector-iterators.md: Ditto.
8988 * config/riscv/vector.md: Ditto.
8990 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8992 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
8993 * config/riscv/vector-iterators.md: New iterator
8995 2023-09-11 Andrew Pinski <apinski@marvell.com>
8997 PR tree-optimization/111346
8998 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
9001 2023-09-11 liuhongt <hongtao.liu@intel.com>
9005 * config/i386/sse.md (int_comm): New int_attr.
9006 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
9007 Remove % for Complex conjugate operations since they're not
9009 (fma_<complexpairopname>_<mode>_pair): Ditto.
9010 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
9011 (cmul<conj_op><mode>3): Ditto.
9013 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9015 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
9016 fixed-vlmax/vls vector permutation.
9018 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9020 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
9022 2023-09-10 Andrew Pinski <apinski@marvell.com>
9024 PR tree-optimization/111331
9025 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
9026 Fix the LE/GE comparison to the correct value.
9027 * tree-ssa-phiopt.cc (minmax_replacement):
9028 Fix the LE/GE comparison for the
9029 `(a CMP CST1) ? max<a,CST2> : a` optimization.
9031 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
9033 * config/darwin.cc (darwin_function_section): Place unlikely
9034 executed global init code into the standard cold section.
9036 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9039 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
9040 (pass_vsetvl::pre_vsetvl): Ditto.
9041 (pass_vsetvl::init): Ditto.
9042 (pass_vsetvl::lazy_vsetvl): Ditto.
9044 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
9046 * config/loongarch/loongarch.md (mulsidi3_64bit):
9047 Field unsigned extension support.
9048 (<u>muldi3_highpart): Modify template name.
9049 (<u>mulsi3_highpart): Likewise.
9050 (<u>mulsidi3_64bit): Field unsigned extension support.
9051 (<su>muldi3_highpart): Modify muldi3_highpart to
9053 (<su>mulsi3_highpart): Modify mulsi3_highpart to
9056 2023-09-09 Xi Ruoyao <xry111@xry111.site>
9058 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
9059 Check precondition (delta must be a power of 2) and use
9060 popcount_hwi instead of a homebrew loop.
9062 2023-09-09 Xi Ruoyao <xry111@xry111.site>
9064 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
9065 Define to the maximum amount of bytes able to be loaded or
9066 stored with one machine instruction.
9067 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
9068 New static function.
9069 (loongarch_block_move_straight): Call
9070 loongarch_mode_for_move_size for machine_mode to be moved.
9071 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
9072 instead of UNITS_PER_WORD.
9074 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9076 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
9078 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
9080 * fold-const.cc (can_min_p): New function.
9081 (poly_int_binop): Try fold MIN_EXPR.
9083 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
9085 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
9086 case VREL_EQ nor call frelop_early_resolve.
9088 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
9090 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
9092 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
9093 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
9095 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
9097 * config/riscv/thead.md: Use more appropriate mode attributes
9100 2023-09-08 Guo Jie <guojie@loongson.cn>
9102 * common/config/loongarch/loongarch-common.cc:
9103 (default_options loongarch_option_optimization_table):
9104 Default to -fsched-pressure.
9106 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
9108 * config.gcc: remove non-POSIX syntax "<<<".
9110 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
9112 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
9113 Rename postfix to _bitmanip.
9114 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
9115 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
9117 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9119 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
9121 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9123 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
9125 2023-09-07 liuhongt <hongtao.liu@intel.com>
9127 * config/i386/sse.md
9128 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
9129 (VHFBF_AVX512VL): New mode iterator.
9130 (VI2HFBF_AVX512VL): New mode iterator.
9132 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
9134 * value-range.h (contains_zero_p): Return false for undefined ranges.
9135 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
9136 contains_zero_p change above.
9137 (operator_ge::op1_op2_relation): Same.
9138 (operator_equal::op1_op2_relation): Same.
9139 (operator_not_equal::op1_op2_relation): Same.
9140 (operator_lt::op1_op2_relation): Same.
9141 (operator_le::op1_op2_relation): Same.
9142 (operator_ge::op1_op2_relation): Same.
9143 * range-op.cc (operator_equal::op1_op2_relation): Same.
9144 (operator_not_equal::op1_op2_relation): Same.
9145 (operator_lt::op1_op2_relation): Same.
9146 (operator_le::op1_op2_relation): Same.
9147 (operator_cast::op1_range): Same.
9148 (set_nonzero_range_from_mask): Same.
9149 (operator_bitwise_xor::op1_range): Same.
9150 (operator_addr_expr::fold_range): Same.
9151 (operator_addr_expr::op1_range): Same.
9153 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
9155 PR tree-optimization/110875
9156 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
9157 cache-prefilling routine when the ssa-name has no global value.
9159 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
9162 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
9163 (process_alt_operands): Set up the flag. Clear flag for chosen
9164 alternative with special memory constraints.
9165 (process_alt_operands): Set up used insn alternative depending on the flag.
9167 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9169 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
9170 * config/riscv/riscv.md: Ditto.
9171 * config/riscv/vector-iterators.md: Ditto.
9172 * config/riscv/vector.md: Ditto.
9174 2023-09-07 David Malcolm <dmalcolm@redhat.com>
9176 * diagnostic-core.h (error_meta): New decl.
9177 * diagnostic.cc (error_meta): New.
9179 2023-09-07 Jakub Jelinek <jakub@redhat.com>
9182 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
9183 inside gcc_assert, as later code relies on it filling info variable.
9184 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
9185 clear_padding_type): Likewise.
9186 * varasm.cc (output_constant): Likewise.
9187 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
9188 * stor-layout.cc (finish_bitfield_representative, layout_type):
9190 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
9192 2023-09-07 Xi Ruoyao <xry111@xry111.site>
9195 * config/loongarch/loongarch-protos.h
9196 (loongarch_pre_reload_split): Declare new function.
9197 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
9198 * config/loongarch/loongarch.cc
9199 (loongarch_pre_reload_split): Implement.
9200 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
9201 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
9203 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
9204 New define_insn_and_split.
9205 (bstrins_<mode>_for_ior_mask): Likewise.
9206 (define_peephole2): Further optimize code sequence produced by
9207 bstrins_<mode>_for_ior_mask if possible.
9209 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
9211 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
9212 rather than gen_rtx_PLUS.
9214 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9217 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
9218 (pass_vsetvl::df_post_optimization): Remove incorrect function.
9220 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
9222 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
9223 Parse 'XVentanaCondOps' extension.
9224 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
9225 (TARGET_XVENTANACONDOPS): Ditto.
9226 (TARGET_ZICOND_LIKE): New to represent targets with conditional
9227 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
9228 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
9229 with TARGET_ZICOND_LIKE.
9230 (riscv_expand_conditional_move): Ditto.
9231 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
9233 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
9234 * config/riscv/zicond.md: Modify description.
9235 (eqz_ventana): New to match corresponding czero instructions.
9236 (nez_ventana): Ditto.
9237 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
9238 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
9239 (*czero.<eqz>.<GPR><X>): Ditto.
9240 (*czero.eqz.<GPR><X>.opt1): Ditto.
9241 (*czero.nez.<GPR><X>.opt2): Ditto.
9243 2023-09-06 Ian Lance Taylor <iant@golang.org>
9246 * godump.cc (go_format_type): Handle BITINT_TYPE.
9248 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9251 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
9254 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9257 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
9258 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
9259 rather than make_edge, initialize bb->count.
9261 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9264 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
9265 Document general rules for _BitInt support library functions
9266 and document __mulbitint3 and __divmodbitint4.
9267 (Conversion functions): Document __fix{s,d,x,t}fbitint,
9268 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
9269 __bid_floatbitint{s,d,t}d.
9271 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9274 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
9277 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9280 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
9281 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
9282 check if all padding bits up to mode precision are zeros or sign
9283 bit copies and if not, jump to DO_ERROR.
9284 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
9285 Adjust expand_ubsan_result_store callers.
9286 * ubsan.cc: Include target.h and langhooks.h.
9287 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
9288 size converted to pointer sized integer, pass BITINT_TYPE values
9289 which fit into TImode (if supported) or DImode as those integer types
9290 or otherwise for now punt (pass 0).
9291 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
9292 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
9293 TImode/DImode precision rather than TK_Unknown used otherwise for
9294 large/huge BITINT_TYPEs.
9295 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
9296 they don't have mode precision.
9297 * ubsan.h (enum ubsan_print_style): New enumerator.
9299 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9302 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
9303 (ix86_bitint_type_info): New function.
9304 (TARGET_C_BITINT_TYPE_INFO): Redefine.
9306 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9309 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
9310 * passes.def: Add pass_lower_bitint after pass_lower_complex and
9311 pass_lower_bitint_O0 after pass_lower_complex_O0.
9312 * tree-pass.h (PROP_gimple_lbitint): Define.
9313 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
9314 * gimple-lower-bitint.h: New file.
9315 * tree-ssa-live.h (struct _var_map): Add bitint member.
9316 (init_var_map): Adjust declaration.
9317 (region_contains_p): Handle map->bitint like map->outofssa_p.
9318 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
9319 map->bitint and set map->outofssa_p to false if it is non-NULL.
9320 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
9321 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
9323 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
9324 not in that bitmap, and allow res without default def.
9325 (compute_optimized_partition_bases): In map->bitint mode try hard to
9326 coalesce any SSA_NAMEs with the same size.
9327 (coalesce_bitint): New function.
9328 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
9329 used_in_copies and call coalesce_bitint.
9330 * gimple-lower-bitint.cc: New file.
9332 2023-09-06 Jakub Jelinek <jakub@redhat.com>
9335 * tree.def (BITINT_TYPE): New type.
9336 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
9337 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
9339 (BITINT_TYPE_P): Define.
9340 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
9341 they have BITINT_TYPE type.
9342 (tree_check6, tree_not_check6): New inline functions.
9343 (any_integral_type_check): Include BITINT_TYPE.
9344 (build_bitint_type): Declare.
9345 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
9346 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
9347 type_hash_canon): Handle BITINT_TYPE.
9348 (bitint_type_cache): New variable.
9349 (build_bitint_type): New function.
9350 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
9352 (tree_cc_finalize): Free bitint_type_cache.
9353 * builtins.cc (type_to_class): Handle BITINT_TYPE.
9354 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
9355 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
9357 * convert.cc (convert_to_pointer_1, convert_to_real_1,
9358 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
9359 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
9360 GET_MODE_PRECISION (TYPE_MODE (type)).
9361 * doc/generic.texi (BITINT_TYPE): Document.
9362 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
9363 * doc/tm.texi: Regenerated.
9364 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
9365 gen_type_die_with_usage): Handle BITINT_TYPE.
9366 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
9367 handle those which fit into shwi.
9368 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
9369 to bitfield precision reads from BITINT_TYPE vars, parameters or
9370 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
9372 * fold-const.cc (fold_convert_loc, make_range_step): Handle
9374 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
9375 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
9376 (native_encode_int, native_interpret_int, native_interpret_expr):
9378 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
9379 to some other integral type or vice versa conversions non-useless.
9380 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
9381 (clear_padding_unit): Mention in comment that _BitInt types don't need
9383 (clear_padding_bitint_needs_padding_p): New function.
9384 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
9385 (clear_padding_type): Likewise.
9386 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
9387 precision operands force pos_neg? to 1.
9388 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
9389 expand_BITINTTOFLOAT): New functions.
9390 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
9391 BITINTTOFLOAT): New internal functions.
9392 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
9393 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
9394 * match.pd (non-equality compare simplifications from fold_binary):
9395 Punt if TYPE_MODE (arg1_type) is BLKmode.
9396 * pretty-print.h (pp_wide_int): Handle printing of large precision
9397 wide_ints which would buffer overflow digit_buffer.
9398 * stor-layout.cc (finish_bitfield_representative): For bit-fields
9399 with BITINT_TYPE, prefer representatives with precisions in
9400 multiple of limb precision.
9401 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
9402 element type and assert it is BITINT_TYPE.
9403 * target.def (bitint_type_info): New C target hook.
9404 * target.h (struct bitint_info): New type.
9405 * targhooks.cc (default_bitint_type_info): New function.
9406 * targhooks.h (default_bitint_type_info): Declare.
9407 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
9408 Handle printing large wide_ints which would buffer overflow
9410 * tree-ssa-sccvn.cc: Include target.h.
9411 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
9413 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
9414 64-bit BITINT_TYPE subtract low bound from expression and cast to
9415 64-bit integer type both the controlling expression and case labels.
9416 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
9417 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
9418 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
9420 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
9421 unsigned_type_for rather than build_nonstandard_integer_type.
9423 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9426 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
9427 tieable for RVV modes.
9429 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9432 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
9434 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9436 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
9438 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
9440 * config/xtensa/xtensa.cc (xtensa_expand_scc):
9441 Add code for particular constants (only 0 and INT_MIN for now)
9442 for EQ/NE boolean evaluation in SImode.
9443 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
9444 implementation has been integrated into the above.
9446 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
9449 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
9451 (*pred_widen_mulsu<mode>): Delete.
9452 (*pred_single_widen_mul<mode>): Delete.
9453 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
9454 Add new combine patterns.
9455 (*single_widen_sub<any_extend:su><mode>): Ditto.
9456 (*single_widen_add<any_extend:su><mode>): Ditto.
9457 (*single_widen_mult<any_extend:su><mode>): Ditto.
9458 (*dual_widen_mulsu<mode>): Ditto.
9459 (*dual_widen_mulus<mode>): Ditto.
9460 (*dual_widen_<optab><mode>): Ditto.
9461 (*single_widen_add<mode>): Ditto.
9462 (*single_widen_sub<mode>): Ditto.
9463 (*single_widen_mult<mode>): Ditto.
9464 * config/riscv/autovec.md (<optab><mode>3):
9465 Change define_expand to define_insn_and_split.
9466 (<optab><mode>2): Ditto.
9467 (abs<mode>2): Ditto.
9468 (smul<mode>3_highpart): Ditto.
9469 (umul<mode>3_highpart): Ditto.
9471 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
9473 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
9474 (riscv_asm_output_alias): Ditto.
9475 (riscv_asm_output_external): Ditto.
9476 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
9477 Output .variant_cc directive for vector function.
9478 (riscv_declare_function_name): Ditto.
9479 (riscv_asm_output_alias): Ditto.
9480 (riscv_asm_output_external): Ditto.
9481 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
9482 Implement ASM_DECLARE_FUNCTION_NAME.
9483 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
9484 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
9486 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
9488 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
9489 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
9490 (riscv_frame_info::reset): Reset new fileds.
9491 (riscv_call_tls_get_addr): Pass riscv_cc.
9492 (riscv_function_arg): Return riscv_cc for call patterm.
9493 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
9494 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
9495 (riscv_save_reg_p): Add vector callee-saved check.
9496 (riscv_stack_align): Add vector save area comment.
9497 (riscv_compute_frame_info): Ditto.
9498 (riscv_restore_reg): Update for type change.
9499 (riscv_for_each_saved_v_reg): New function save vector registers.
9500 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
9501 (riscv_expand_prologue): Ditto.
9502 (riscv_expand_epilogue): Ditto.
9503 (riscv_output_mi_thunk): Pass riscv_cc.
9504 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
9505 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
9506 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
9508 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
9510 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
9511 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
9512 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
9513 (riscv_init_cumulative_args): Setup variant_cc field.
9514 (riscv_vector_type_p): New function for checking vector type.
9515 (riscv_hard_regno_nregs): Hoist declare.
9516 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
9517 (riscv_get_arg_info): Support vector cc.
9518 (riscv_function_arg_advance): Update cum.
9519 (riscv_pass_by_reference): Handle vector args.
9520 (riscv_v_abi): New function return vector abi.
9521 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
9522 (riscv_arguments_is_vector_type_p): New function for check vector returns.
9523 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
9524 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
9525 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
9526 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
9527 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
9528 (V_ARG_FIRST): Ditto.
9529 (V_ARG_LAST): Ditto.
9530 (enum riscv_cc): Define all RISCV_CC variants.
9531 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
9533 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
9535 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
9536 Add sqrt + vcond_mask combine pattern.
9537 * config/riscv/autovec.md (<optab><mode>2):
9538 Change define_expand to define_insn_and_split.
9540 2023-09-06 Jason Merrill <jason@redhat.com>
9542 * common.opt: Update -fabi-version=19.
9544 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
9546 * config/riscv/zicond.md: Add closing parent to a comment.
9548 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
9550 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
9551 large constant cons/alt into a register.
9553 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
9555 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
9556 require one zero bit in the upper 32 bits for LI+RORI synthesis.
9558 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
9560 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
9562 2023-09-05 Andrew Pinski <apinski@marvell.com>
9564 PR tree-optimization/98710
9565 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
9566 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
9568 2023-09-05 Andrew Pinski <apinski@marvell.com>
9570 PR tree-optimization/103536
9571 * match.pd (`(x | y) & (x & z)`,
9572 `(x & y) | (x | z)`): New patterns.
9574 2023-09-05 Andrew Pinski <apinski@marvell.com>
9576 PR tree-optimization/107137
9577 * match.pd (`(nop_convert)-(convert)a`): New pattern.
9579 2023-09-05 Andrew Pinski <apinski@marvell.com>
9581 PR tree-optimization/96694
9582 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
9584 2023-09-05 Andrew Pinski <apinski@marvell.com>
9586 PR tree-optimization/105832
9587 * match.pd (`(1 >> X) != 0`): New pattern
9589 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
9591 * config/riscv/riscv.md: Update/Add types
9593 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
9595 * config/riscv/pic.md: Update types
9597 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
9599 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
9600 synthesis with rotate-right for XTheadBb.
9602 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
9604 * config/riscv/zicond.md: Fix op2 pattern.
9606 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
9608 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
9610 2023-09-05 Xi Ruoyao <xry111@xry111.site>
9612 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
9613 Define to 0 if not defined yet.
9615 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
9617 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
9618 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
9620 2023-09-05 Pan Li <pan2.li@intel.com>
9622 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
9623 * config/riscv/vector.md: Extend iterator for VLS.
9625 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
9627 * config.gcc: Export the header file lasxintrin.h.
9628 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
9629 Add Loongson ASX builtin functions support.
9631 (LASX_BUILTIN): Ditto.
9632 (LASX_NO_TARGET_BUILTIN): Ditto.
9633 (LASX_BUILTIN_TEST_BRANCH): Ditto.
9634 (CODE_FOR_lasx_xvsadd_b): Ditto.
9635 (CODE_FOR_lasx_xvsadd_h): Ditto.
9636 (CODE_FOR_lasx_xvsadd_w): Ditto.
9637 (CODE_FOR_lasx_xvsadd_d): Ditto.
9638 (CODE_FOR_lasx_xvsadd_bu): Ditto.
9639 (CODE_FOR_lasx_xvsadd_hu): Ditto.
9640 (CODE_FOR_lasx_xvsadd_wu): Ditto.
9641 (CODE_FOR_lasx_xvsadd_du): Ditto.
9642 (CODE_FOR_lasx_xvadd_b): Ditto.
9643 (CODE_FOR_lasx_xvadd_h): Ditto.
9644 (CODE_FOR_lasx_xvadd_w): Ditto.
9645 (CODE_FOR_lasx_xvadd_d): Ditto.
9646 (CODE_FOR_lasx_xvaddi_bu): Ditto.
9647 (CODE_FOR_lasx_xvaddi_hu): Ditto.
9648 (CODE_FOR_lasx_xvaddi_wu): Ditto.
9649 (CODE_FOR_lasx_xvaddi_du): Ditto.
9650 (CODE_FOR_lasx_xvand_v): Ditto.
9651 (CODE_FOR_lasx_xvandi_b): Ditto.
9652 (CODE_FOR_lasx_xvbitsel_v): Ditto.
9653 (CODE_FOR_lasx_xvseqi_b): Ditto.
9654 (CODE_FOR_lasx_xvseqi_h): Ditto.
9655 (CODE_FOR_lasx_xvseqi_w): Ditto.
9656 (CODE_FOR_lasx_xvseqi_d): Ditto.
9657 (CODE_FOR_lasx_xvslti_b): Ditto.
9658 (CODE_FOR_lasx_xvslti_h): Ditto.
9659 (CODE_FOR_lasx_xvslti_w): Ditto.
9660 (CODE_FOR_lasx_xvslti_d): Ditto.
9661 (CODE_FOR_lasx_xvslti_bu): Ditto.
9662 (CODE_FOR_lasx_xvslti_hu): Ditto.
9663 (CODE_FOR_lasx_xvslti_wu): Ditto.
9664 (CODE_FOR_lasx_xvslti_du): Ditto.
9665 (CODE_FOR_lasx_xvslei_b): Ditto.
9666 (CODE_FOR_lasx_xvslei_h): Ditto.
9667 (CODE_FOR_lasx_xvslei_w): Ditto.
9668 (CODE_FOR_lasx_xvslei_d): Ditto.
9669 (CODE_FOR_lasx_xvslei_bu): Ditto.
9670 (CODE_FOR_lasx_xvslei_hu): Ditto.
9671 (CODE_FOR_lasx_xvslei_wu): Ditto.
9672 (CODE_FOR_lasx_xvslei_du): Ditto.
9673 (CODE_FOR_lasx_xvdiv_b): Ditto.
9674 (CODE_FOR_lasx_xvdiv_h): Ditto.
9675 (CODE_FOR_lasx_xvdiv_w): Ditto.
9676 (CODE_FOR_lasx_xvdiv_d): Ditto.
9677 (CODE_FOR_lasx_xvdiv_bu): Ditto.
9678 (CODE_FOR_lasx_xvdiv_hu): Ditto.
9679 (CODE_FOR_lasx_xvdiv_wu): Ditto.
9680 (CODE_FOR_lasx_xvdiv_du): Ditto.
9681 (CODE_FOR_lasx_xvfadd_s): Ditto.
9682 (CODE_FOR_lasx_xvfadd_d): Ditto.
9683 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
9684 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
9685 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
9686 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
9687 (CODE_FOR_lasx_xvffint_s_w): Ditto.
9688 (CODE_FOR_lasx_xvffint_d_l): Ditto.
9689 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
9690 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
9691 (CODE_FOR_lasx_xvfsub_s): Ditto.
9692 (CODE_FOR_lasx_xvfsub_d): Ditto.
9693 (CODE_FOR_lasx_xvfmul_s): Ditto.
9694 (CODE_FOR_lasx_xvfmul_d): Ditto.
9695 (CODE_FOR_lasx_xvfdiv_s): Ditto.
9696 (CODE_FOR_lasx_xvfdiv_d): Ditto.
9697 (CODE_FOR_lasx_xvfmax_s): Ditto.
9698 (CODE_FOR_lasx_xvfmax_d): Ditto.
9699 (CODE_FOR_lasx_xvfmin_s): Ditto.
9700 (CODE_FOR_lasx_xvfmin_d): Ditto.
9701 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
9702 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
9703 (CODE_FOR_lasx_xvflogb_s): Ditto.
9704 (CODE_FOR_lasx_xvflogb_d): Ditto.
9705 (CODE_FOR_lasx_xvmax_b): Ditto.
9706 (CODE_FOR_lasx_xvmax_h): Ditto.
9707 (CODE_FOR_lasx_xvmax_w): Ditto.
9708 (CODE_FOR_lasx_xvmax_d): Ditto.
9709 (CODE_FOR_lasx_xvmaxi_b): Ditto.
9710 (CODE_FOR_lasx_xvmaxi_h): Ditto.
9711 (CODE_FOR_lasx_xvmaxi_w): Ditto.
9712 (CODE_FOR_lasx_xvmaxi_d): Ditto.
9713 (CODE_FOR_lasx_xvmax_bu): Ditto.
9714 (CODE_FOR_lasx_xvmax_hu): Ditto.
9715 (CODE_FOR_lasx_xvmax_wu): Ditto.
9716 (CODE_FOR_lasx_xvmax_du): Ditto.
9717 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
9718 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
9719 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
9720 (CODE_FOR_lasx_xvmaxi_du): Ditto.
9721 (CODE_FOR_lasx_xvmin_b): Ditto.
9722 (CODE_FOR_lasx_xvmin_h): Ditto.
9723 (CODE_FOR_lasx_xvmin_w): Ditto.
9724 (CODE_FOR_lasx_xvmin_d): Ditto.
9725 (CODE_FOR_lasx_xvmini_b): Ditto.
9726 (CODE_FOR_lasx_xvmini_h): Ditto.
9727 (CODE_FOR_lasx_xvmini_w): Ditto.
9728 (CODE_FOR_lasx_xvmini_d): Ditto.
9729 (CODE_FOR_lasx_xvmin_bu): Ditto.
9730 (CODE_FOR_lasx_xvmin_hu): Ditto.
9731 (CODE_FOR_lasx_xvmin_wu): Ditto.
9732 (CODE_FOR_lasx_xvmin_du): Ditto.
9733 (CODE_FOR_lasx_xvmini_bu): Ditto.
9734 (CODE_FOR_lasx_xvmini_hu): Ditto.
9735 (CODE_FOR_lasx_xvmini_wu): Ditto.
9736 (CODE_FOR_lasx_xvmini_du): Ditto.
9737 (CODE_FOR_lasx_xvmod_b): Ditto.
9738 (CODE_FOR_lasx_xvmod_h): Ditto.
9739 (CODE_FOR_lasx_xvmod_w): Ditto.
9740 (CODE_FOR_lasx_xvmod_d): Ditto.
9741 (CODE_FOR_lasx_xvmod_bu): Ditto.
9742 (CODE_FOR_lasx_xvmod_hu): Ditto.
9743 (CODE_FOR_lasx_xvmod_wu): Ditto.
9744 (CODE_FOR_lasx_xvmod_du): Ditto.
9745 (CODE_FOR_lasx_xvmul_b): Ditto.
9746 (CODE_FOR_lasx_xvmul_h): Ditto.
9747 (CODE_FOR_lasx_xvmul_w): Ditto.
9748 (CODE_FOR_lasx_xvmul_d): Ditto.
9749 (CODE_FOR_lasx_xvclz_b): Ditto.
9750 (CODE_FOR_lasx_xvclz_h): Ditto.
9751 (CODE_FOR_lasx_xvclz_w): Ditto.
9752 (CODE_FOR_lasx_xvclz_d): Ditto.
9753 (CODE_FOR_lasx_xvnor_v): Ditto.
9754 (CODE_FOR_lasx_xvor_v): Ditto.
9755 (CODE_FOR_lasx_xvori_b): Ditto.
9756 (CODE_FOR_lasx_xvnori_b): Ditto.
9757 (CODE_FOR_lasx_xvpcnt_b): Ditto.
9758 (CODE_FOR_lasx_xvpcnt_h): Ditto.
9759 (CODE_FOR_lasx_xvpcnt_w): Ditto.
9760 (CODE_FOR_lasx_xvpcnt_d): Ditto.
9761 (CODE_FOR_lasx_xvxor_v): Ditto.
9762 (CODE_FOR_lasx_xvxori_b): Ditto.
9763 (CODE_FOR_lasx_xvsll_b): Ditto.
9764 (CODE_FOR_lasx_xvsll_h): Ditto.
9765 (CODE_FOR_lasx_xvsll_w): Ditto.
9766 (CODE_FOR_lasx_xvsll_d): Ditto.
9767 (CODE_FOR_lasx_xvslli_b): Ditto.
9768 (CODE_FOR_lasx_xvslli_h): Ditto.
9769 (CODE_FOR_lasx_xvslli_w): Ditto.
9770 (CODE_FOR_lasx_xvslli_d): Ditto.
9771 (CODE_FOR_lasx_xvsra_b): Ditto.
9772 (CODE_FOR_lasx_xvsra_h): Ditto.
9773 (CODE_FOR_lasx_xvsra_w): Ditto.
9774 (CODE_FOR_lasx_xvsra_d): Ditto.
9775 (CODE_FOR_lasx_xvsrai_b): Ditto.
9776 (CODE_FOR_lasx_xvsrai_h): Ditto.
9777 (CODE_FOR_lasx_xvsrai_w): Ditto.
9778 (CODE_FOR_lasx_xvsrai_d): Ditto.
9779 (CODE_FOR_lasx_xvsrl_b): Ditto.
9780 (CODE_FOR_lasx_xvsrl_h): Ditto.
9781 (CODE_FOR_lasx_xvsrl_w): Ditto.
9782 (CODE_FOR_lasx_xvsrl_d): Ditto.
9783 (CODE_FOR_lasx_xvsrli_b): Ditto.
9784 (CODE_FOR_lasx_xvsrli_h): Ditto.
9785 (CODE_FOR_lasx_xvsrli_w): Ditto.
9786 (CODE_FOR_lasx_xvsrli_d): Ditto.
9787 (CODE_FOR_lasx_xvsub_b): Ditto.
9788 (CODE_FOR_lasx_xvsub_h): Ditto.
9789 (CODE_FOR_lasx_xvsub_w): Ditto.
9790 (CODE_FOR_lasx_xvsub_d): Ditto.
9791 (CODE_FOR_lasx_xvsubi_bu): Ditto.
9792 (CODE_FOR_lasx_xvsubi_hu): Ditto.
9793 (CODE_FOR_lasx_xvsubi_wu): Ditto.
9794 (CODE_FOR_lasx_xvsubi_du): Ditto.
9795 (CODE_FOR_lasx_xvpackod_d): Ditto.
9796 (CODE_FOR_lasx_xvpackev_d): Ditto.
9797 (CODE_FOR_lasx_xvpickod_d): Ditto.
9798 (CODE_FOR_lasx_xvpickev_d): Ditto.
9799 (CODE_FOR_lasx_xvrepli_b): Ditto.
9800 (CODE_FOR_lasx_xvrepli_h): Ditto.
9801 (CODE_FOR_lasx_xvrepli_w): Ditto.
9802 (CODE_FOR_lasx_xvrepli_d): Ditto.
9803 (CODE_FOR_lasx_xvandn_v): Ditto.
9804 (CODE_FOR_lasx_xvorn_v): Ditto.
9805 (CODE_FOR_lasx_xvneg_b): Ditto.
9806 (CODE_FOR_lasx_xvneg_h): Ditto.
9807 (CODE_FOR_lasx_xvneg_w): Ditto.
9808 (CODE_FOR_lasx_xvneg_d): Ditto.
9809 (CODE_FOR_lasx_xvbsrl_v): Ditto.
9810 (CODE_FOR_lasx_xvbsll_v): Ditto.
9811 (CODE_FOR_lasx_xvfmadd_s): Ditto.
9812 (CODE_FOR_lasx_xvfmadd_d): Ditto.
9813 (CODE_FOR_lasx_xvfmsub_s): Ditto.
9814 (CODE_FOR_lasx_xvfmsub_d): Ditto.
9815 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
9816 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
9817 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
9818 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
9819 (CODE_FOR_lasx_xvpermi_q): Ditto.
9820 (CODE_FOR_lasx_xvpermi_d): Ditto.
9821 (CODE_FOR_lasx_xbnz_v): Ditto.
9822 (CODE_FOR_lasx_xbz_v): Ditto.
9823 (CODE_FOR_lasx_xvssub_b): Ditto.
9824 (CODE_FOR_lasx_xvssub_h): Ditto.
9825 (CODE_FOR_lasx_xvssub_w): Ditto.
9826 (CODE_FOR_lasx_xvssub_d): Ditto.
9827 (CODE_FOR_lasx_xvssub_bu): Ditto.
9828 (CODE_FOR_lasx_xvssub_hu): Ditto.
9829 (CODE_FOR_lasx_xvssub_wu): Ditto.
9830 (CODE_FOR_lasx_xvssub_du): Ditto.
9831 (CODE_FOR_lasx_xvabsd_b): Ditto.
9832 (CODE_FOR_lasx_xvabsd_h): Ditto.
9833 (CODE_FOR_lasx_xvabsd_w): Ditto.
9834 (CODE_FOR_lasx_xvabsd_d): Ditto.
9835 (CODE_FOR_lasx_xvabsd_bu): Ditto.
9836 (CODE_FOR_lasx_xvabsd_hu): Ditto.
9837 (CODE_FOR_lasx_xvabsd_wu): Ditto.
9838 (CODE_FOR_lasx_xvabsd_du): Ditto.
9839 (CODE_FOR_lasx_xvavg_b): Ditto.
9840 (CODE_FOR_lasx_xvavg_h): Ditto.
9841 (CODE_FOR_lasx_xvavg_w): Ditto.
9842 (CODE_FOR_lasx_xvavg_d): Ditto.
9843 (CODE_FOR_lasx_xvavg_bu): Ditto.
9844 (CODE_FOR_lasx_xvavg_hu): Ditto.
9845 (CODE_FOR_lasx_xvavg_wu): Ditto.
9846 (CODE_FOR_lasx_xvavg_du): Ditto.
9847 (CODE_FOR_lasx_xvavgr_b): Ditto.
9848 (CODE_FOR_lasx_xvavgr_h): Ditto.
9849 (CODE_FOR_lasx_xvavgr_w): Ditto.
9850 (CODE_FOR_lasx_xvavgr_d): Ditto.
9851 (CODE_FOR_lasx_xvavgr_bu): Ditto.
9852 (CODE_FOR_lasx_xvavgr_hu): Ditto.
9853 (CODE_FOR_lasx_xvavgr_wu): Ditto.
9854 (CODE_FOR_lasx_xvavgr_du): Ditto.
9855 (CODE_FOR_lasx_xvmuh_b): Ditto.
9856 (CODE_FOR_lasx_xvmuh_h): Ditto.
9857 (CODE_FOR_lasx_xvmuh_w): Ditto.
9858 (CODE_FOR_lasx_xvmuh_d): Ditto.
9859 (CODE_FOR_lasx_xvmuh_bu): Ditto.
9860 (CODE_FOR_lasx_xvmuh_hu): Ditto.
9861 (CODE_FOR_lasx_xvmuh_wu): Ditto.
9862 (CODE_FOR_lasx_xvmuh_du): Ditto.
9863 (CODE_FOR_lasx_xvssran_b_h): Ditto.
9864 (CODE_FOR_lasx_xvssran_h_w): Ditto.
9865 (CODE_FOR_lasx_xvssran_w_d): Ditto.
9866 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
9867 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
9868 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
9869 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
9870 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
9871 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
9872 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
9873 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
9874 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
9875 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
9876 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
9877 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
9878 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
9879 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
9880 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
9881 (CODE_FOR_lasx_xvftint_w_s): Ditto.
9882 (CODE_FOR_lasx_xvftint_l_d): Ditto.
9883 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
9884 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
9885 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
9886 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
9887 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
9888 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
9889 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
9890 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
9891 (CODE_FOR_lasx_xvsat_b): Ditto.
9892 (CODE_FOR_lasx_xvsat_h): Ditto.
9893 (CODE_FOR_lasx_xvsat_w): Ditto.
9894 (CODE_FOR_lasx_xvsat_d): Ditto.
9895 (CODE_FOR_lasx_xvsat_bu): Ditto.
9896 (CODE_FOR_lasx_xvsat_hu): Ditto.
9897 (CODE_FOR_lasx_xvsat_wu): Ditto.
9898 (CODE_FOR_lasx_xvsat_du): Ditto.
9899 (loongarch_builtin_vectorized_function): Ditto.
9900 (loongarch_expand_builtin_insn): Ditto.
9901 (loongarch_expand_builtin): Ditto.
9902 * config/loongarch/loongarch-ftypes.def (1): Ditto.
9906 * config/loongarch/lasxintrin.h: New file.
9908 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
9910 * config/loongarch/loongarch-modes.def
9911 (VECTOR_MODES): Add Loongson ASX instruction support.
9912 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
9913 (loongarch_split_256bit_move_p): Ditto.
9914 (loongarch_expand_vector_group_init): Ditto.
9915 (loongarch_expand_vec_perm_1): Ditto.
9916 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
9917 (loongarch_valid_offset_p): Ditto.
9918 (loongarch_address_insns): Ditto.
9919 (loongarch_const_insns): Ditto.
9920 (loongarch_legitimize_move): Ditto.
9921 (loongarch_builtin_vectorization_cost): Ditto.
9922 (loongarch_split_move_p): Ditto.
9923 (loongarch_split_move): Ditto.
9924 (loongarch_output_move_index_float): Ditto.
9925 (loongarch_split_256bit_move_p): Ditto.
9926 (loongarch_split_256bit_move): Ditto.
9927 (loongarch_output_move): Ditto.
9928 (loongarch_print_operand_reloc): Ditto.
9929 (loongarch_print_operand): Ditto.
9930 (loongarch_hard_regno_mode_ok_uncached): Ditto.
9931 (loongarch_hard_regno_nregs): Ditto.
9932 (loongarch_class_max_nregs): Ditto.
9933 (loongarch_can_change_mode_class): Ditto.
9934 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
9935 (loongarch_vector_mode_supported_p): Ditto.
9936 (loongarch_preferred_simd_mode): Ditto.
9937 (loongarch_autovectorize_vector_modes): Ditto.
9938 (loongarch_lsx_output_division): Ditto.
9939 (loongarch_expand_lsx_shuffle): Ditto.
9940 (loongarch_expand_vec_perm): Ditto.
9941 (loongarch_expand_vec_perm_interleave): Ditto.
9942 (loongarch_try_expand_lsx_vshuf_const): Ditto.
9943 (loongarch_expand_vec_perm_even_odd_1): Ditto.
9944 (loongarch_expand_vec_perm_even_odd): Ditto.
9945 (loongarch_expand_vec_perm_1): Ditto.
9946 (loongarch_expand_vec_perm_const_2): Ditto.
9947 (loongarch_is_quad_duplicate): Ditto.
9948 (loongarch_is_double_duplicate): Ditto.
9949 (loongarch_is_odd_extraction): Ditto.
9950 (loongarch_is_even_extraction): Ditto.
9951 (loongarch_is_extraction_permutation): Ditto.
9952 (loongarch_is_center_extraction): Ditto.
9953 (loongarch_is_reversing_permutation): Ditto.
9954 (loongarch_is_di_misalign_extract): Ditto.
9955 (loongarch_is_si_misalign_extract): Ditto.
9956 (loongarch_is_lasx_lowpart_interleave): Ditto.
9957 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
9958 (COMPARE_SELECTOR): Ditto.
9959 (loongarch_is_lasx_lowpart_extract): Ditto.
9960 (loongarch_is_lasx_highpart_interleave): Ditto.
9961 (loongarch_is_lasx_highpart_interleave_2): Ditto.
9962 (loongarch_is_elem_duplicate): Ditto.
9963 (loongarch_is_op_reverse_perm): Ditto.
9964 (loongarch_is_single_op_perm): Ditto.
9965 (loongarch_is_divisible_perm): Ditto.
9966 (loongarch_is_triple_stride_extract): Ditto.
9967 (loongarch_vectorize_vec_perm_const): Ditto.
9968 (loongarch_cpu_sched_reassociation_width): Ditto.
9969 (loongarch_expand_vector_extract): Ditto.
9970 (emit_reduc_half): Ditto.
9971 (loongarch_expand_vec_unpack): Ditto.
9972 (loongarch_expand_vector_group_init): Ditto.
9973 (loongarch_expand_vector_init): Ditto.
9974 (loongarch_expand_lsx_cmp): Ditto.
9975 (loongarch_builtin_support_vector_misalignment): Ditto.
9976 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
9977 (BITS_PER_LASX_REG): Ditto.
9978 (STRUCTURE_SIZE_BOUNDARY): Ditto.
9979 (LASX_REG_FIRST): Ditto.
9980 (LASX_REG_LAST): Ditto.
9981 (LASX_REG_NUM): Ditto.
9982 (LASX_REG_P): Ditto.
9983 (LASX_REG_RTX_P): Ditto.
9984 (LASX_SUPPORTED_MODE_P): Ditto.
9985 * config/loongarch/loongarch.md: Ditto.
9986 * config/loongarch/lasx.md: New file.
9988 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
9990 * config.gcc: Export the header file lsxintrin.h.
9991 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
9992 (enum loongarch_builtin_type): Ditto.
9994 (LARCH_BUILTIN): Ditto.
9995 (LSX_BUILTIN): Ditto.
9996 (LSX_BUILTIN_TEST_BRANCH): Ditto.
9997 (LSX_NO_TARGET_BUILTIN): Ditto.
9998 (CODE_FOR_lsx_vsadd_b): Ditto.
9999 (CODE_FOR_lsx_vsadd_h): Ditto.
10000 (CODE_FOR_lsx_vsadd_w): Ditto.
10001 (CODE_FOR_lsx_vsadd_d): Ditto.
10002 (CODE_FOR_lsx_vsadd_bu): Ditto.
10003 (CODE_FOR_lsx_vsadd_hu): Ditto.
10004 (CODE_FOR_lsx_vsadd_wu): Ditto.
10005 (CODE_FOR_lsx_vsadd_du): Ditto.
10006 (CODE_FOR_lsx_vadd_b): Ditto.
10007 (CODE_FOR_lsx_vadd_h): Ditto.
10008 (CODE_FOR_lsx_vadd_w): Ditto.
10009 (CODE_FOR_lsx_vadd_d): Ditto.
10010 (CODE_FOR_lsx_vaddi_bu): Ditto.
10011 (CODE_FOR_lsx_vaddi_hu): Ditto.
10012 (CODE_FOR_lsx_vaddi_wu): Ditto.
10013 (CODE_FOR_lsx_vaddi_du): Ditto.
10014 (CODE_FOR_lsx_vand_v): Ditto.
10015 (CODE_FOR_lsx_vandi_b): Ditto.
10016 (CODE_FOR_lsx_bnz_v): Ditto.
10017 (CODE_FOR_lsx_bz_v): Ditto.
10018 (CODE_FOR_lsx_vbitsel_v): Ditto.
10019 (CODE_FOR_lsx_vseqi_b): Ditto.
10020 (CODE_FOR_lsx_vseqi_h): Ditto.
10021 (CODE_FOR_lsx_vseqi_w): Ditto.
10022 (CODE_FOR_lsx_vseqi_d): Ditto.
10023 (CODE_FOR_lsx_vslti_b): Ditto.
10024 (CODE_FOR_lsx_vslti_h): Ditto.
10025 (CODE_FOR_lsx_vslti_w): Ditto.
10026 (CODE_FOR_lsx_vslti_d): Ditto.
10027 (CODE_FOR_lsx_vslti_bu): Ditto.
10028 (CODE_FOR_lsx_vslti_hu): Ditto.
10029 (CODE_FOR_lsx_vslti_wu): Ditto.
10030 (CODE_FOR_lsx_vslti_du): Ditto.
10031 (CODE_FOR_lsx_vslei_b): Ditto.
10032 (CODE_FOR_lsx_vslei_h): Ditto.
10033 (CODE_FOR_lsx_vslei_w): Ditto.
10034 (CODE_FOR_lsx_vslei_d): Ditto.
10035 (CODE_FOR_lsx_vslei_bu): Ditto.
10036 (CODE_FOR_lsx_vslei_hu): Ditto.
10037 (CODE_FOR_lsx_vslei_wu): Ditto.
10038 (CODE_FOR_lsx_vslei_du): Ditto.
10039 (CODE_FOR_lsx_vdiv_b): Ditto.
10040 (CODE_FOR_lsx_vdiv_h): Ditto.
10041 (CODE_FOR_lsx_vdiv_w): Ditto.
10042 (CODE_FOR_lsx_vdiv_d): Ditto.
10043 (CODE_FOR_lsx_vdiv_bu): Ditto.
10044 (CODE_FOR_lsx_vdiv_hu): Ditto.
10045 (CODE_FOR_lsx_vdiv_wu): Ditto.
10046 (CODE_FOR_lsx_vdiv_du): Ditto.
10047 (CODE_FOR_lsx_vfadd_s): Ditto.
10048 (CODE_FOR_lsx_vfadd_d): Ditto.
10049 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
10050 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
10051 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
10052 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
10053 (CODE_FOR_lsx_vffint_s_w): Ditto.
10054 (CODE_FOR_lsx_vffint_d_l): Ditto.
10055 (CODE_FOR_lsx_vffint_s_wu): Ditto.
10056 (CODE_FOR_lsx_vffint_d_lu): Ditto.
10057 (CODE_FOR_lsx_vfsub_s): Ditto.
10058 (CODE_FOR_lsx_vfsub_d): Ditto.
10059 (CODE_FOR_lsx_vfmul_s): Ditto.
10060 (CODE_FOR_lsx_vfmul_d): Ditto.
10061 (CODE_FOR_lsx_vfdiv_s): Ditto.
10062 (CODE_FOR_lsx_vfdiv_d): Ditto.
10063 (CODE_FOR_lsx_vfmax_s): Ditto.
10064 (CODE_FOR_lsx_vfmax_d): Ditto.
10065 (CODE_FOR_lsx_vfmin_s): Ditto.
10066 (CODE_FOR_lsx_vfmin_d): Ditto.
10067 (CODE_FOR_lsx_vfsqrt_s): Ditto.
10068 (CODE_FOR_lsx_vfsqrt_d): Ditto.
10069 (CODE_FOR_lsx_vflogb_s): Ditto.
10070 (CODE_FOR_lsx_vflogb_d): Ditto.
10071 (CODE_FOR_lsx_vmax_b): Ditto.
10072 (CODE_FOR_lsx_vmax_h): Ditto.
10073 (CODE_FOR_lsx_vmax_w): Ditto.
10074 (CODE_FOR_lsx_vmax_d): Ditto.
10075 (CODE_FOR_lsx_vmaxi_b): Ditto.
10076 (CODE_FOR_lsx_vmaxi_h): Ditto.
10077 (CODE_FOR_lsx_vmaxi_w): Ditto.
10078 (CODE_FOR_lsx_vmaxi_d): Ditto.
10079 (CODE_FOR_lsx_vmax_bu): Ditto.
10080 (CODE_FOR_lsx_vmax_hu): Ditto.
10081 (CODE_FOR_lsx_vmax_wu): Ditto.
10082 (CODE_FOR_lsx_vmax_du): Ditto.
10083 (CODE_FOR_lsx_vmaxi_bu): Ditto.
10084 (CODE_FOR_lsx_vmaxi_hu): Ditto.
10085 (CODE_FOR_lsx_vmaxi_wu): Ditto.
10086 (CODE_FOR_lsx_vmaxi_du): Ditto.
10087 (CODE_FOR_lsx_vmin_b): Ditto.
10088 (CODE_FOR_lsx_vmin_h): Ditto.
10089 (CODE_FOR_lsx_vmin_w): Ditto.
10090 (CODE_FOR_lsx_vmin_d): Ditto.
10091 (CODE_FOR_lsx_vmini_b): Ditto.
10092 (CODE_FOR_lsx_vmini_h): Ditto.
10093 (CODE_FOR_lsx_vmini_w): Ditto.
10094 (CODE_FOR_lsx_vmini_d): Ditto.
10095 (CODE_FOR_lsx_vmin_bu): Ditto.
10096 (CODE_FOR_lsx_vmin_hu): Ditto.
10097 (CODE_FOR_lsx_vmin_wu): Ditto.
10098 (CODE_FOR_lsx_vmin_du): Ditto.
10099 (CODE_FOR_lsx_vmini_bu): Ditto.
10100 (CODE_FOR_lsx_vmini_hu): Ditto.
10101 (CODE_FOR_lsx_vmini_wu): Ditto.
10102 (CODE_FOR_lsx_vmini_du): Ditto.
10103 (CODE_FOR_lsx_vmod_b): Ditto.
10104 (CODE_FOR_lsx_vmod_h): Ditto.
10105 (CODE_FOR_lsx_vmod_w): Ditto.
10106 (CODE_FOR_lsx_vmod_d): Ditto.
10107 (CODE_FOR_lsx_vmod_bu): Ditto.
10108 (CODE_FOR_lsx_vmod_hu): Ditto.
10109 (CODE_FOR_lsx_vmod_wu): Ditto.
10110 (CODE_FOR_lsx_vmod_du): Ditto.
10111 (CODE_FOR_lsx_vmul_b): Ditto.
10112 (CODE_FOR_lsx_vmul_h): Ditto.
10113 (CODE_FOR_lsx_vmul_w): Ditto.
10114 (CODE_FOR_lsx_vmul_d): Ditto.
10115 (CODE_FOR_lsx_vclz_b): Ditto.
10116 (CODE_FOR_lsx_vclz_h): Ditto.
10117 (CODE_FOR_lsx_vclz_w): Ditto.
10118 (CODE_FOR_lsx_vclz_d): Ditto.
10119 (CODE_FOR_lsx_vnor_v): Ditto.
10120 (CODE_FOR_lsx_vor_v): Ditto.
10121 (CODE_FOR_lsx_vori_b): Ditto.
10122 (CODE_FOR_lsx_vnori_b): Ditto.
10123 (CODE_FOR_lsx_vpcnt_b): Ditto.
10124 (CODE_FOR_lsx_vpcnt_h): Ditto.
10125 (CODE_FOR_lsx_vpcnt_w): Ditto.
10126 (CODE_FOR_lsx_vpcnt_d): Ditto.
10127 (CODE_FOR_lsx_vxor_v): Ditto.
10128 (CODE_FOR_lsx_vxori_b): Ditto.
10129 (CODE_FOR_lsx_vsll_b): Ditto.
10130 (CODE_FOR_lsx_vsll_h): Ditto.
10131 (CODE_FOR_lsx_vsll_w): Ditto.
10132 (CODE_FOR_lsx_vsll_d): Ditto.
10133 (CODE_FOR_lsx_vslli_b): Ditto.
10134 (CODE_FOR_lsx_vslli_h): Ditto.
10135 (CODE_FOR_lsx_vslli_w): Ditto.
10136 (CODE_FOR_lsx_vslli_d): Ditto.
10137 (CODE_FOR_lsx_vsra_b): Ditto.
10138 (CODE_FOR_lsx_vsra_h): Ditto.
10139 (CODE_FOR_lsx_vsra_w): Ditto.
10140 (CODE_FOR_lsx_vsra_d): Ditto.
10141 (CODE_FOR_lsx_vsrai_b): Ditto.
10142 (CODE_FOR_lsx_vsrai_h): Ditto.
10143 (CODE_FOR_lsx_vsrai_w): Ditto.
10144 (CODE_FOR_lsx_vsrai_d): Ditto.
10145 (CODE_FOR_lsx_vsrl_b): Ditto.
10146 (CODE_FOR_lsx_vsrl_h): Ditto.
10147 (CODE_FOR_lsx_vsrl_w): Ditto.
10148 (CODE_FOR_lsx_vsrl_d): Ditto.
10149 (CODE_FOR_lsx_vsrli_b): Ditto.
10150 (CODE_FOR_lsx_vsrli_h): Ditto.
10151 (CODE_FOR_lsx_vsrli_w): Ditto.
10152 (CODE_FOR_lsx_vsrli_d): Ditto.
10153 (CODE_FOR_lsx_vsub_b): Ditto.
10154 (CODE_FOR_lsx_vsub_h): Ditto.
10155 (CODE_FOR_lsx_vsub_w): Ditto.
10156 (CODE_FOR_lsx_vsub_d): Ditto.
10157 (CODE_FOR_lsx_vsubi_bu): Ditto.
10158 (CODE_FOR_lsx_vsubi_hu): Ditto.
10159 (CODE_FOR_lsx_vsubi_wu): Ditto.
10160 (CODE_FOR_lsx_vsubi_du): Ditto.
10161 (CODE_FOR_lsx_vpackod_d): Ditto.
10162 (CODE_FOR_lsx_vpackev_d): Ditto.
10163 (CODE_FOR_lsx_vpickod_d): Ditto.
10164 (CODE_FOR_lsx_vpickev_d): Ditto.
10165 (CODE_FOR_lsx_vrepli_b): Ditto.
10166 (CODE_FOR_lsx_vrepli_h): Ditto.
10167 (CODE_FOR_lsx_vrepli_w): Ditto.
10168 (CODE_FOR_lsx_vrepli_d): Ditto.
10169 (CODE_FOR_lsx_vsat_b): Ditto.
10170 (CODE_FOR_lsx_vsat_h): Ditto.
10171 (CODE_FOR_lsx_vsat_w): Ditto.
10172 (CODE_FOR_lsx_vsat_d): Ditto.
10173 (CODE_FOR_lsx_vsat_bu): Ditto.
10174 (CODE_FOR_lsx_vsat_hu): Ditto.
10175 (CODE_FOR_lsx_vsat_wu): Ditto.
10176 (CODE_FOR_lsx_vsat_du): Ditto.
10177 (CODE_FOR_lsx_vavg_b): Ditto.
10178 (CODE_FOR_lsx_vavg_h): Ditto.
10179 (CODE_FOR_lsx_vavg_w): Ditto.
10180 (CODE_FOR_lsx_vavg_d): Ditto.
10181 (CODE_FOR_lsx_vavg_bu): Ditto.
10182 (CODE_FOR_lsx_vavg_hu): Ditto.
10183 (CODE_FOR_lsx_vavg_wu): Ditto.
10184 (CODE_FOR_lsx_vavg_du): Ditto.
10185 (CODE_FOR_lsx_vavgr_b): Ditto.
10186 (CODE_FOR_lsx_vavgr_h): Ditto.
10187 (CODE_FOR_lsx_vavgr_w): Ditto.
10188 (CODE_FOR_lsx_vavgr_d): Ditto.
10189 (CODE_FOR_lsx_vavgr_bu): Ditto.
10190 (CODE_FOR_lsx_vavgr_hu): Ditto.
10191 (CODE_FOR_lsx_vavgr_wu): Ditto.
10192 (CODE_FOR_lsx_vavgr_du): Ditto.
10193 (CODE_FOR_lsx_vssub_b): Ditto.
10194 (CODE_FOR_lsx_vssub_h): Ditto.
10195 (CODE_FOR_lsx_vssub_w): Ditto.
10196 (CODE_FOR_lsx_vssub_d): Ditto.
10197 (CODE_FOR_lsx_vssub_bu): Ditto.
10198 (CODE_FOR_lsx_vssub_hu): Ditto.
10199 (CODE_FOR_lsx_vssub_wu): Ditto.
10200 (CODE_FOR_lsx_vssub_du): Ditto.
10201 (CODE_FOR_lsx_vabsd_b): Ditto.
10202 (CODE_FOR_lsx_vabsd_h): Ditto.
10203 (CODE_FOR_lsx_vabsd_w): Ditto.
10204 (CODE_FOR_lsx_vabsd_d): Ditto.
10205 (CODE_FOR_lsx_vabsd_bu): Ditto.
10206 (CODE_FOR_lsx_vabsd_hu): Ditto.
10207 (CODE_FOR_lsx_vabsd_wu): Ditto.
10208 (CODE_FOR_lsx_vabsd_du): Ditto.
10209 (CODE_FOR_lsx_vftint_w_s): Ditto.
10210 (CODE_FOR_lsx_vftint_l_d): Ditto.
10211 (CODE_FOR_lsx_vftint_wu_s): Ditto.
10212 (CODE_FOR_lsx_vftint_lu_d): Ditto.
10213 (CODE_FOR_lsx_vandn_v): Ditto.
10214 (CODE_FOR_lsx_vorn_v): Ditto.
10215 (CODE_FOR_lsx_vneg_b): Ditto.
10216 (CODE_FOR_lsx_vneg_h): Ditto.
10217 (CODE_FOR_lsx_vneg_w): Ditto.
10218 (CODE_FOR_lsx_vneg_d): Ditto.
10219 (CODE_FOR_lsx_vshuf4i_d): Ditto.
10220 (CODE_FOR_lsx_vbsrl_v): Ditto.
10221 (CODE_FOR_lsx_vbsll_v): Ditto.
10222 (CODE_FOR_lsx_vfmadd_s): Ditto.
10223 (CODE_FOR_lsx_vfmadd_d): Ditto.
10224 (CODE_FOR_lsx_vfmsub_s): Ditto.
10225 (CODE_FOR_lsx_vfmsub_d): Ditto.
10226 (CODE_FOR_lsx_vfnmadd_s): Ditto.
10227 (CODE_FOR_lsx_vfnmadd_d): Ditto.
10228 (CODE_FOR_lsx_vfnmsub_s): Ditto.
10229 (CODE_FOR_lsx_vfnmsub_d): Ditto.
10230 (CODE_FOR_lsx_vmuh_b): Ditto.
10231 (CODE_FOR_lsx_vmuh_h): Ditto.
10232 (CODE_FOR_lsx_vmuh_w): Ditto.
10233 (CODE_FOR_lsx_vmuh_d): Ditto.
10234 (CODE_FOR_lsx_vmuh_bu): Ditto.
10235 (CODE_FOR_lsx_vmuh_hu): Ditto.
10236 (CODE_FOR_lsx_vmuh_wu): Ditto.
10237 (CODE_FOR_lsx_vmuh_du): Ditto.
10238 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
10239 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
10240 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
10241 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
10242 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
10243 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
10244 (CODE_FOR_lsx_vssran_b_h): Ditto.
10245 (CODE_FOR_lsx_vssran_h_w): Ditto.
10246 (CODE_FOR_lsx_vssran_w_d): Ditto.
10247 (CODE_FOR_lsx_vssran_bu_h): Ditto.
10248 (CODE_FOR_lsx_vssran_hu_w): Ditto.
10249 (CODE_FOR_lsx_vssran_wu_d): Ditto.
10250 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
10251 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
10252 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
10253 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
10254 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
10255 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
10256 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
10257 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
10258 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
10259 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
10260 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
10261 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
10262 (loongarch_builtin_vector_type): Ditto.
10263 (loongarch_build_cvpointer_type): Ditto.
10264 (LARCH_ATYPE_CVPOINTER): Ditto.
10265 (LARCH_ATYPE_BOOLEAN): Ditto.
10266 (LARCH_ATYPE_V2SF): Ditto.
10267 (LARCH_ATYPE_V2HI): Ditto.
10268 (LARCH_ATYPE_V2SI): Ditto.
10269 (LARCH_ATYPE_V4QI): Ditto.
10270 (LARCH_ATYPE_V4HI): Ditto.
10271 (LARCH_ATYPE_V8QI): Ditto.
10272 (LARCH_ATYPE_V2DI): Ditto.
10273 (LARCH_ATYPE_V4SI): Ditto.
10274 (LARCH_ATYPE_V8HI): Ditto.
10275 (LARCH_ATYPE_V16QI): Ditto.
10276 (LARCH_ATYPE_V2DF): Ditto.
10277 (LARCH_ATYPE_V4SF): Ditto.
10278 (LARCH_ATYPE_V4DI): Ditto.
10279 (LARCH_ATYPE_V8SI): Ditto.
10280 (LARCH_ATYPE_V16HI): Ditto.
10281 (LARCH_ATYPE_V32QI): Ditto.
10282 (LARCH_ATYPE_V4DF): Ditto.
10283 (LARCH_ATYPE_V8SF): Ditto.
10284 (LARCH_ATYPE_UV2DI): Ditto.
10285 (LARCH_ATYPE_UV4SI): Ditto.
10286 (LARCH_ATYPE_UV8HI): Ditto.
10287 (LARCH_ATYPE_UV16QI): Ditto.
10288 (LARCH_ATYPE_UV4DI): Ditto.
10289 (LARCH_ATYPE_UV8SI): Ditto.
10290 (LARCH_ATYPE_UV16HI): Ditto.
10291 (LARCH_ATYPE_UV32QI): Ditto.
10292 (LARCH_ATYPE_UV2SI): Ditto.
10293 (LARCH_ATYPE_UV4HI): Ditto.
10294 (LARCH_ATYPE_UV8QI): Ditto.
10295 (loongarch_builtin_vectorized_function): Ditto.
10296 (LARCH_GET_BUILTIN): Ditto.
10297 (loongarch_expand_builtin_insn): Ditto.
10298 (loongarch_expand_builtin_lsx_test_branch): Ditto.
10299 (loongarch_expand_builtin): Ditto.
10300 * config/loongarch/loongarch-ftypes.def (1): Ditto.
10304 * config/loongarch/lsxintrin.h: New file.
10306 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
10308 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
10328 * config/loongarch/genopts/loongarch.opt.in: Ditto.
10329 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
10330 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
10331 (VECTOR_MODE): Ditto.
10333 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
10334 (loongarch_split_move_insn): Ditto.
10335 (loongarch_split_128bit_move): Ditto.
10336 (loongarch_split_128bit_move_p): Ditto.
10337 (loongarch_split_lsx_copy_d): Ditto.
10338 (loongarch_split_lsx_insert_d): Ditto.
10339 (loongarch_split_lsx_fill_d): Ditto.
10340 (loongarch_expand_vec_cmp): Ditto.
10341 (loongarch_const_vector_same_val_p): Ditto.
10342 (loongarch_const_vector_same_bytes_p): Ditto.
10343 (loongarch_const_vector_same_int_p): Ditto.
10344 (loongarch_const_vector_shuffle_set_p): Ditto.
10345 (loongarch_const_vector_bitimm_set_p): Ditto.
10346 (loongarch_const_vector_bitimm_clr_p): Ditto.
10347 (loongarch_lsx_vec_parallel_const_half): Ditto.
10348 (loongarch_gen_const_int_vector): Ditto.
10349 (loongarch_lsx_output_division): Ditto.
10350 (loongarch_expand_vector_init): Ditto.
10351 (loongarch_expand_vec_unpack): Ditto.
10352 (loongarch_expand_vec_perm): Ditto.
10353 (loongarch_expand_vector_extract): Ditto.
10354 (loongarch_expand_vector_reduc): Ditto.
10355 (loongarch_ldst_scaled_shift): Ditto.
10356 (loongarch_expand_vec_cond_expr): Ditto.
10357 (loongarch_expand_vec_cond_mask_expr): Ditto.
10358 (loongarch_builtin_vectorized_function): Ditto.
10359 (loongarch_gen_const_int_vector_shuffle): Ditto.
10360 (loongarch_build_signbit_mask): Ditto.
10361 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
10362 (loongarch_setup_incoming_varargs): Ditto.
10363 (loongarch_emit_move): Ditto.
10364 (loongarch_const_vector_bitimm_set_p): Ditto.
10365 (loongarch_const_vector_bitimm_clr_p): Ditto.
10366 (loongarch_const_vector_same_val_p): Ditto.
10367 (loongarch_const_vector_same_bytes_p): Ditto.
10368 (loongarch_const_vector_same_int_p): Ditto.
10369 (loongarch_const_vector_shuffle_set_p): Ditto.
10370 (loongarch_symbol_insns): Ditto.
10371 (loongarch_cannot_force_const_mem): Ditto.
10372 (loongarch_valid_offset_p): Ditto.
10373 (loongarch_valid_index_p): Ditto.
10374 (loongarch_classify_address): Ditto.
10375 (loongarch_address_insns): Ditto.
10376 (loongarch_ldst_scaled_shift): Ditto.
10377 (loongarch_const_insns): Ditto.
10378 (loongarch_split_move_insn_p): Ditto.
10379 (loongarch_subword_at_byte): Ditto.
10380 (loongarch_legitimize_move): Ditto.
10381 (loongarch_builtin_vectorization_cost): Ditto.
10382 (loongarch_split_move_p): Ditto.
10383 (loongarch_split_move): Ditto.
10384 (loongarch_split_move_insn): Ditto.
10385 (loongarch_output_move_index_float): Ditto.
10386 (loongarch_split_128bit_move_p): Ditto.
10387 (loongarch_split_128bit_move): Ditto.
10388 (loongarch_split_lsx_copy_d): Ditto.
10389 (loongarch_split_lsx_insert_d): Ditto.
10390 (loongarch_split_lsx_fill_d): Ditto.
10391 (loongarch_output_move): Ditto.
10392 (loongarch_extend_comparands): Ditto.
10393 (loongarch_print_operand_reloc): Ditto.
10394 (loongarch_print_operand): Ditto.
10395 (loongarch_hard_regno_mode_ok_uncached): Ditto.
10396 (loongarch_hard_regno_call_part_clobbered): Ditto.
10397 (loongarch_hard_regno_nregs): Ditto.
10398 (loongarch_class_max_nregs): Ditto.
10399 (loongarch_can_change_mode_class): Ditto.
10400 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
10401 (loongarch_secondary_reload): Ditto.
10402 (loongarch_vector_mode_supported_p): Ditto.
10403 (loongarch_preferred_simd_mode): Ditto.
10404 (loongarch_autovectorize_vector_modes): Ditto.
10405 (loongarch_lsx_output_division): Ditto.
10406 (loongarch_option_override_internal): Ditto.
10407 (loongarch_hard_regno_caller_save_mode): Ditto.
10408 (MAX_VECT_LEN): Ditto.
10409 (loongarch_spill_class): Ditto.
10410 (struct expand_vec_perm_d): Ditto.
10411 (loongarch_promote_function_mode): Ditto.
10412 (loongarch_expand_vselect): Ditto.
10413 (loongarch_starting_frame_offset): Ditto.
10414 (loongarch_expand_vselect_vconcat): Ditto.
10415 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
10416 (TARGET_OPTION_OVERRIDE): Ditto.
10417 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
10418 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
10419 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
10420 (loongarch_expand_lsx_shuffle): Ditto.
10421 (TARGET_SCHED_INIT): Ditto.
10422 (TARGET_SCHED_REORDER): Ditto.
10423 (TARGET_SCHED_REORDER2): Ditto.
10424 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
10425 (TARGET_SCHED_ADJUST_COST): Ditto.
10426 (TARGET_SCHED_ISSUE_RATE): Ditto.
10427 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
10428 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
10429 (TARGET_VALID_POINTER_MODE): Ditto.
10430 (TARGET_REGISTER_MOVE_COST): Ditto.
10431 (TARGET_MEMORY_MOVE_COST): Ditto.
10432 (TARGET_RTX_COSTS): Ditto.
10433 (TARGET_ADDRESS_COST): Ditto.
10434 (TARGET_IN_SMALL_DATA_P): Ditto.
10435 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
10436 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
10437 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
10438 (loongarch_expand_vec_perm): Ditto.
10439 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
10440 (TARGET_RETURN_IN_MEMORY): Ditto.
10441 (TARGET_FUNCTION_VALUE): Ditto.
10442 (TARGET_LIBCALL_VALUE): Ditto.
10443 (loongarch_try_expand_lsx_vshuf_const): Ditto.
10444 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
10445 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
10446 (TARGET_PRINT_OPERAND): Ditto.
10447 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
10448 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
10449 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
10450 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
10451 (TARGET_MUST_PASS_IN_STACK): Ditto.
10452 (TARGET_PASS_BY_REFERENCE): Ditto.
10453 (TARGET_ARG_PARTIAL_BYTES): Ditto.
10454 (TARGET_FUNCTION_ARG): Ditto.
10455 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
10456 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
10457 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
10458 (TARGET_INIT_BUILTINS): Ditto.
10459 (loongarch_expand_vec_perm_const_1): Ditto.
10460 (loongarch_expand_vec_perm_const_2): Ditto.
10461 (loongarch_vectorize_vec_perm_const): Ditto.
10462 (loongarch_cpu_sched_reassociation_width): Ditto.
10463 (loongarch_sched_reassociation_width): Ditto.
10464 (loongarch_expand_vector_extract): Ditto.
10465 (emit_reduc_half): Ditto.
10466 (loongarch_expand_vector_reduc): Ditto.
10467 (loongarch_expand_vec_unpack): Ditto.
10468 (loongarch_lsx_vec_parallel_const_half): Ditto.
10469 (loongarch_constant_elt_p): Ditto.
10470 (loongarch_gen_const_int_vector_shuffle): Ditto.
10471 (loongarch_expand_vector_init): Ditto.
10472 (loongarch_expand_lsx_cmp): Ditto.
10473 (loongarch_expand_vec_cond_expr): Ditto.
10474 (loongarch_expand_vec_cond_mask_expr): Ditto.
10475 (loongarch_expand_vec_cmp): Ditto.
10476 (loongarch_case_values_threshold): Ditto.
10477 (loongarch_build_const_vector): Ditto.
10478 (loongarch_build_signbit_mask): Ditto.
10479 (loongarch_builtin_support_vector_misalignment): Ditto.
10480 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
10481 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
10482 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
10483 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
10484 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
10485 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
10486 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
10487 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
10488 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
10489 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
10490 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
10491 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
10492 (UNITS_PER_LSX_REG): Ditto.
10493 (BITS_PER_LSX_REG): Ditto.
10494 (BIGGEST_ALIGNMENT): Ditto.
10495 (LSX_REG_FIRST): Ditto.
10496 (LSX_REG_LAST): Ditto.
10497 (LSX_REG_NUM): Ditto.
10498 (LSX_REG_P): Ditto.
10499 (LSX_REG_RTX_P): Ditto.
10500 (IMM13_OPERAND): Ditto.
10501 (LSX_SUPPORTED_MODE_P): Ditto.
10502 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
10503 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
10504 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
10511 * config/loongarch/loongarch.opt: Ditto.
10512 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
10513 (const_uimm3_operand): Ditto.
10514 (const_8_to_11_operand): Ditto.
10515 (const_12_to_15_operand): Ditto.
10516 (const_uimm4_operand): Ditto.
10517 (const_uimm6_operand): Ditto.
10518 (const_uimm7_operand): Ditto.
10519 (const_uimm8_operand): Ditto.
10520 (const_imm5_operand): Ditto.
10521 (const_imm10_operand): Ditto.
10522 (const_imm13_operand): Ditto.
10523 (reg_imm10_operand): Ditto.
10524 (aq8b_operand): Ditto.
10525 (aq8h_operand): Ditto.
10526 (aq8w_operand): Ditto.
10527 (aq8d_operand): Ditto.
10528 (aq10b_operand): Ditto.
10529 (aq10h_operand): Ditto.
10530 (aq10w_operand): Ditto.
10531 (aq10d_operand): Ditto.
10532 (aq12b_operand): Ditto.
10533 (aq12h_operand): Ditto.
10534 (aq12w_operand): Ditto.
10535 (aq12d_operand): Ditto.
10536 (const_m1_operand): Ditto.
10537 (reg_or_m1_operand): Ditto.
10538 (const_exp_2_operand): Ditto.
10539 (const_exp_4_operand): Ditto.
10540 (const_exp_8_operand): Ditto.
10541 (const_exp_16_operand): Ditto.
10542 (const_exp_32_operand): Ditto.
10543 (const_0_or_1_operand): Ditto.
10544 (const_0_to_3_operand): Ditto.
10545 (const_0_to_7_operand): Ditto.
10546 (const_2_or_3_operand): Ditto.
10547 (const_4_to_7_operand): Ditto.
10548 (const_8_to_15_operand): Ditto.
10549 (const_16_to_31_operand): Ditto.
10550 (qi_mask_operand): Ditto.
10551 (hi_mask_operand): Ditto.
10552 (si_mask_operand): Ditto.
10553 (d_operand): Ditto.
10554 (db4_operand): Ditto.
10555 (db7_operand): Ditto.
10556 (db8_operand): Ditto.
10557 (ib3_operand): Ditto.
10558 (sb4_operand): Ditto.
10559 (sb5_operand): Ditto.
10560 (sb8_operand): Ditto.
10561 (sd8_operand): Ditto.
10562 (ub4_operand): Ditto.
10563 (ub8_operand): Ditto.
10564 (uh4_operand): Ditto.
10565 (uw4_operand): Ditto.
10566 (uw5_operand): Ditto.
10567 (uw6_operand): Ditto.
10568 (uw8_operand): Ditto.
10569 (addiur2_operand): Ditto.
10570 (addiusp_operand): Ditto.
10571 (andi16_operand): Ditto.
10572 (movep_src_register): Ditto.
10573 (movep_src_operand): Ditto.
10574 (fcc_reload_operand): Ditto.
10575 (muldiv_target_operand): Ditto.
10576 (const_vector_same_val_operand): Ditto.
10577 (const_vector_same_simm5_operand): Ditto.
10578 (const_vector_same_uimm5_operand): Ditto.
10579 (const_vector_same_ximm5_operand): Ditto.
10580 (const_vector_same_uimm6_operand): Ditto.
10581 (par_const_vector_shf_set_operand): Ditto.
10582 (reg_or_vector_same_val_operand): Ditto.
10583 (reg_or_vector_same_simm5_operand): Ditto.
10584 (reg_or_vector_same_uimm5_operand): Ditto.
10585 (reg_or_vector_same_ximm5_operand): Ditto.
10586 (reg_or_vector_same_uimm6_operand): Ditto.
10587 * doc/md.texi: Ditto.
10588 * config/loongarch/lsx.md: New file.
10590 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10592 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
10593 (get_all_predecessors): New function.
10594 (get_all_successors): Ditto.
10595 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
10596 (get_all_successors): Ditto.
10597 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
10598 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
10600 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
10602 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
10603 (split_addsi): Likewise.
10604 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
10605 'N', 'x', and 'J' code letters.
10606 (arc_output_addsi): Make it static.
10607 (split_addsi): Remove it.
10608 * config/arc/arc.h (UNSIGNED_INT*): New defines.
10609 (SINNED_INT*): Likewise.
10610 * config/arc/arc.md (type): Add add, sub, bxor types.
10611 (tst_movb): Change code letter from 's' to 'x'.
10612 (andsi3_i): Likewise.
10613 (addsi3_mixed): Refurbish the pattern.
10614 (call_i): Change code letter from 'S' to 'J'.
10615 * config/arc/arc700.md: Add newly introduced types.
10616 * config/arc/arcHS.md: Likewsie.
10617 * config/arc/arcHS4x.md: Likewise.
10618 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
10619 (CM4): Update description.
10620 (CP4, C6u, C6n, CIs, C4p): New constraint.
10622 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
10624 * common/config/arc/arc-common.cc (arc_option_optimization_table):
10625 Remove mbbit_peephole.
10626 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
10627 (store_direct): Likewise.
10628 (BBIT peephole2): Likewise.
10629 * config/arc/arc.opt (mbbit-peephole): Ignore option.
10630 * doc/invoke.texi (mbbit-peephole): Update document.
10632 2023-09-05 Jakub Jelinek <jakub@redhat.com>
10634 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
10635 avreage -> average.
10637 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
10639 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
10640 options passed from driver to gnat1 as explicit for multilib.
10642 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
10644 * config.gcc: add loongarch*-elf target.
10645 * config/loongarch/elf.h: New file.
10646 Link against newlib by default.
10648 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
10650 * config.gcc: use -mstrict-align for building libraries
10651 if --with-strict-align-lib is given.
10652 * doc/install.texi: likewise.
10654 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
10656 * config/loongarch/loongarch-c.cc: Export macros
10657 "__loongarch_{arch,tune}" in the preprocessor.
10659 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
10661 * config.gcc: Make --with-abi= obsolete, decide the default ABI
10662 with target triplet. Allow specifying multilib library build
10663 options with --with-multilib-list and --with-multilib-default.
10664 * config/loongarch/t-linux: Likewise.
10665 * config/loongarch/genopts/loongarch-strings: Likewise.
10666 * config/loongarch/loongarch-str.h: Likewise.
10667 * doc/install.texi: Likewise.
10668 * config/loongarch/genopts/loongarch.opt.in: Introduce
10669 -m[no-]l[a]sx options. Only process -m*-float and
10670 -m[no-]l[a]sx in the GCC driver.
10671 * config/loongarch/loongarch.opt: Likewise.
10672 * config/loongarch/la464.md: Likewise.
10673 * config/loongarch/loongarch-c.cc: Likewise.
10674 * config/loongarch/loongarch-cpu.cc: Likewise.
10675 * config/loongarch/loongarch-cpu.h: Likewise.
10676 * config/loongarch/loongarch-def.c: Likewise.
10677 * config/loongarch/loongarch-def.h: Likewise.
10678 * config/loongarch/loongarch-driver.cc: Likewise.
10679 * config/loongarch/loongarch-driver.h: Likewise.
10680 * config/loongarch/loongarch-opts.cc: Likewise.
10681 * config/loongarch/loongarch-opts.h: Likewise.
10682 * config/loongarch/loongarch.cc: Likewise.
10683 * doc/invoke.texi: Likewise.
10685 2023-09-05 liuhongt <hongtao.liu@intel.com>
10687 * config/i386/sse.md: (V8BFH_128): Renamed to ..
10688 (VHFBF_128): .. this.
10689 (V16BFH_256): Renamed to ..
10690 (VHFBF_256): .. this.
10691 (avx512f_mov<mode>): Extend to V_128.
10692 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
10693 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
10694 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
10695 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
10696 * config/i386/i386-expand.cc (expand_vec_perm_blend):
10697 Canonicalize vec_merge.
10699 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10701 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
10702 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
10703 (autovectorize_vector_modes): Ditto.
10704 (vectorize_related_mode): Ditto.
10706 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
10708 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
10709 all 32b Darwin PowerPC cases.
10711 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
10713 * config/darwin-sections.def (static_init_section): Add the
10714 __TEXT,__StaticInit section.
10715 * config/darwin.cc (darwin_function_section): Use the static init
10716 section for global initializers, to match other platform toolchains.
10718 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
10720 * config/darwin-sections.def (darwin_exception_section): Move to
10721 the __TEXT segment.
10722 * config/darwin.cc (darwin_emit_except_table_label): Align before
10723 the exception table label.
10724 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
10725 relative 4byte relocs.
10727 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
10729 * config/darwin.cc (dump_machopic_symref_flags): New.
10730 (debug_machopic_symref_flags): New.
10732 2023-09-04 Pan Li <pan2.li@intel.com>
10734 * config/riscv/riscv-vector-builtins-types.def
10735 (vfloat16mf4_t): Add FP16 intrinsic def.
10736 (vfloat16mf2_t): Ditto.
10737 (vfloat16m1_t): Ditto.
10738 (vfloat16m2_t): Ditto.
10739 (vfloat16m4_t): Ditto.
10740 (vfloat16m8_t): Ditto.
10742 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
10744 PR tree-optimization/108757
10745 * match.pd ((X - N * M) / N): New pattern.
10746 ((X + N * M) / N): New pattern.
10747 ((X + C) div_rshift N): New pattern.
10749 2023-09-04 Guo Jie <guojie@loongson.cn>
10751 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
10752 movsf_hardfloat and movdf_hardfloat.
10754 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
10756 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
10757 In unsigned QImode test, check for sign extended subreg and/or
10758 constant operands, and do a sign extension in that case.
10759 * config/loongarch/loongarch.md (TARGET_64BIT): Define
10760 template cbranchqi4.
10762 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
10764 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
10765 from memory into floating-point registers.
10767 2023-09-03 Pan Li <pan2.li@intel.com>
10769 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
10771 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
10773 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
10775 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
10776 pointer before overwriting it.
10778 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
10780 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
10781 Associate the __float128 type to float128_type_node so that it can
10782 be recognized by the compiler.
10783 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
10784 Add the flag "FLOAT128_TYPE" to gcc and associate a function
10785 with the suffix "q" to "f128".
10786 * doc/extend.texi:Added support for 128-bit floating-point functions on
10787 the LoongArch architecture.
10789 2023-09-01 Jakub Jelinek <jakub@redhat.com>
10792 * common.opt (fabi-version=): Document version 19.
10793 * doc/invoke.texi (-fabi-version=): Likewise.
10795 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
10797 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
10798 New combine pattern.
10799 (*cond_<float_cvt><vconvert><mode>): Ditto.
10800 (*cond_<optab><vnconvert><mode>): Ditto.
10801 (*cond_<float_cvt><vnconvert><mode>): Ditto.
10802 (*cond_<optab><mode><vnconvert>): Ditto.
10803 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
10804 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
10805 (<float_cvt><vconvert><mode>2): Adjust.
10806 (<optab><vnconvert><mode>2): Adjust.
10807 (<float_cvt><vnconvert><mode>2): Adjust.
10808 (<optab><mode><vnconvert>2): Adjust.
10809 (<float_cvt><mode><vnconvert>2): Adjust.
10810 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
10812 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
10814 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
10815 New combine pattern.
10816 (*cond_trunc<mode><v_double_trunc>): Ditto.
10817 * config/riscv/autovec.md: Adjust.
10818 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
10820 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
10822 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
10823 New combine pattern.
10824 (*cond_<optab><v_quad_trunc><mode>): Ditto.
10825 (*cond_<optab><v_oct_trunc><mode>): Ditto.
10826 (*cond_trunc<mode><v_double_trunc>): Ditto.
10827 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
10828 (<optab><v_oct_trunc><mode>2): Ditto.
10830 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
10832 * config/riscv/autovec.md: Adjust.
10833 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
10834 (expand_cond_len_binop): Ditto.
10835 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
10836 (expand_cond_len_op): Ditto.
10837 (expand_cond_len_unop): Ditto.
10838 (expand_cond_len_binop): Ditto.
10839 (expand_cond_len_ternop): Ditto.
10841 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10843 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
10844 VECT_COMPARE_COSTS by default.
10846 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
10848 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
10850 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10852 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
10854 * config/riscv/riscv.opt: Add dynamic compile option.
10856 2023-09-01 Pan Li <pan2.li@intel.com>
10858 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
10859 vls floating-point autovec.
10860 * config/riscv/vector-iterators.md: New iterator for
10861 floating-point V and VLS.
10862 * config/riscv/vector.md: Add VLS to floating-point binop.
10864 2023-09-01 Andrew Pinski <apinski@marvell.com>
10866 PR tree-optimization/19832
10867 * match.pd: Add pattern to optimize
10868 `(a != b) ? a OP b : c`.
10870 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
10871 Guo Jie <guojie@loongson.cn>
10874 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
10875 frame_pointer_needed to determine whether to use the $fp register.
10877 2023-08-31 Andrew Pinski <apinski@marvell.com>
10879 PR tree-optimization/110915
10880 * match.pd (min_value, max_value): Extend to vector constants.
10882 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
10884 * config.in: Regenerate.
10885 * config/darwin-c.cc: Change spelling to macOS.
10886 * config/darwin-driver.cc: Likewise.
10887 * config/darwin.h: Likewise.
10888 * configure.ac: Likewise.
10889 * doc/contrib.texi: Likewise.
10890 * doc/extend.texi: Likewise.
10891 * doc/invoke.texi: Likewise.
10892 * doc/plugins.texi: Likewise.
10893 * doc/tm.texi: Regenerate.
10894 * doc/tm.texi.in: Change spelling to macOS.
10895 * plugin.cc: Likewise.
10897 2023-08-31 Pan Li <pan2.li@intel.com>
10899 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
10900 * config/riscv/autovec.md: Ditto.
10902 2023-08-31 Pan Li <pan2.li@intel.com>
10904 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
10905 * config/riscv/autovec.md: Ditto.
10907 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
10909 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
10910 rather than a call. List each possible destination register
10911 in the call pattern.
10913 2023-08-31 Pan Li <pan2.li@intel.com>
10915 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
10916 * config/riscv/autovec.md: Ditto.
10918 2023-08-31 Pan Li <pan2.li@intel.com>
10919 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10921 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
10922 * config/riscv/autovec.md: Ditto.
10923 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
10925 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
10927 * config/riscv/autovec.md (shifts): Use
10928 vector_scalar_shift_operand.
10929 * config/riscv/predicates.md (vector_scalar_shift_operand): New
10932 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10934 * config.gcc: Add vector cost model framework for RVV.
10935 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
10936 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
10937 * config/riscv/t-riscv: Ditto.
10938 * config/riscv/riscv-vector-costs.cc: New file.
10939 * config/riscv/riscv-vector-costs.h: New file.
10941 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
10944 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
10945 AltiVec address operands.
10946 (define_insn_and_split movxo): Likewise.
10947 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
10948 redundant mode size check.
10950 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
10952 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
10953 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
10954 Change to default policy.
10955 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
10956 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
10957 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
10959 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
10961 * config/riscv/autovec-opt.md: Adjust.
10962 * config/riscv/autovec-vls.md: Ditto.
10963 * config/riscv/autovec.md: Ditto.
10964 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
10965 (enum insn_flags): Add insn flags.
10966 (emit_vlmax_insn): Adjust.
10967 (emit_vlmax_fp_insn): Delete.
10968 (emit_vlmax_ternary_insn): Delete.
10969 (emit_vlmax_fp_ternary_insn): Delete.
10970 (emit_nonvlmax_insn): Adjust.
10971 (emit_vlmax_slide_insn): Delete.
10972 (emit_nonvlmax_slide_tu_insn): Delete.
10973 (emit_vlmax_merge_insn): Delete.
10974 (emit_vlmax_cmp_insn): Delete.
10975 (emit_vlmax_cmp_mu_insn): Delete.
10976 (emit_vlmax_masked_mu_insn): Delete.
10977 (emit_scalar_move_insn): Delete.
10978 (emit_nonvlmax_integer_move_insn): Delete.
10979 (emit_vlmax_insn_lra): Add.
10980 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
10981 (emit_vlmax_insn): Adjust.
10982 (emit_nonvlmax_insn): Adjust.
10983 (emit_vlmax_insn_lra): Add.
10984 (emit_vlmax_fp_insn): Delete.
10985 (emit_vlmax_ternary_insn): Delete.
10986 (emit_vlmax_fp_ternary_insn): Delete.
10987 (emit_vlmax_slide_insn): Delete.
10988 (emit_nonvlmax_slide_tu_insn): Delete.
10989 (emit_nonvlmax_slide_insn): Delete.
10990 (emit_vlmax_merge_insn): Delete.
10991 (emit_vlmax_cmp_insn): Delete.
10992 (emit_vlmax_cmp_mu_insn): Delete.
10993 (emit_vlmax_masked_insn): Delete.
10994 (emit_nonvlmax_masked_insn): Delete.
10995 (emit_vlmax_masked_store_insn): Delete.
10996 (emit_nonvlmax_masked_store_insn): Delete.
10997 (emit_vlmax_masked_mu_insn): Delete.
10998 (emit_vlmax_masked_fp_mu_insn): Delete.
10999 (emit_nonvlmax_tu_insn): Delete.
11000 (emit_nonvlmax_fp_tu_insn): Delete.
11001 (emit_nonvlmax_tumu_insn): Delete.
11002 (emit_nonvlmax_fp_tumu_insn): Delete.
11003 (emit_scalar_move_insn): Delete.
11004 (emit_cpop_insn): Delete.
11005 (emit_vlmax_integer_move_insn): Delete.
11006 (emit_nonvlmax_integer_move_insn): Delete.
11007 (emit_vlmax_gather_insn): Delete.
11008 (emit_vlmax_masked_gather_mu_insn): Delete.
11009 (emit_vlmax_compress_insn): Delete.
11010 (emit_nonvlmax_compress_insn): Delete.
11011 (emit_vlmax_reduction_insn): Delete.
11012 (emit_vlmax_fp_reduction_insn): Delete.
11013 (emit_nonvlmax_fp_reduction_insn): Delete.
11014 (expand_vec_series): Adjust.
11015 (expand_const_vector): Adjust.
11016 (legitimize_move): Adjust.
11017 (sew64_scalar_helper): Adjust.
11018 (expand_tuple_move): Adjust.
11019 (expand_vector_init_insert_elems): Adjust.
11020 (expand_vector_init_merge_repeating_sequence): Adjust.
11021 (expand_vec_cmp): Adjust.
11022 (expand_vec_cmp_float): Adjust.
11023 (expand_vec_perm): Adjust.
11024 (shuffle_merge_patterns): Adjust.
11025 (shuffle_compress_patterns): Adjust.
11026 (shuffle_decompress_patterns): Adjust.
11027 (expand_load_store): Adjust.
11028 (expand_cond_len_op): Adjust.
11029 (expand_cond_len_unop): Adjust.
11030 (expand_cond_len_binop): Adjust.
11031 (expand_gather_scatter): Adjust.
11032 (expand_cond_len_ternop): Adjust.
11033 (expand_reduction): Adjust.
11034 (expand_lanes_load_store): Adjust.
11035 (expand_fold_extract_last): Adjust.
11036 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
11037 * config/riscv/vector.md: Adjust.
11039 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
11042 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
11043 load/store with length only on 64-bit Power10.
11045 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
11047 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
11048 SWAP option is enabled.
11049 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
11051 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
11053 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
11054 Use common insn for signed and unsigned front-end definitions.
11055 * config/arm/arm_mve_builtins.def
11056 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
11057 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
11058 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
11061 (mve_rot): Likewise.
11063 (VxCADDQ_M): Likewise.
11064 * config/arm/unspecs.md (unspec): Likewise.
11065 * config/arm/mve.md: Fix minor typo.
11067 2023-08-31 liuhongt <hongtao.liu@intel.com>
11069 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
11070 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
11071 (VF_AVX512HFBF16): Renamed to VHFBF.
11072 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
11073 (VF_AVX512FP16): Removed.
11074 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
11075 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
11076 (rsqrt<mode>2): Ditto.
11077 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
11078 (vcond<mode><code>): Ditto.
11079 (vcond<sseintvecmodelower><mode>): Ditto.
11080 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
11081 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
11082 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
11083 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
11084 (cmla<conj_op><mode>4): Ditto.
11085 (fma_<mode>_fadd_fmul): Ditto.
11086 (fma_<mode>_fadd_fcmul): Ditto.
11087 (fma_<complexopname>_<mode>_fma_zero): Ditto.
11088 (fma_<mode>_fmaddc_bcst): Ditto.
11089 (fma_<mode>_fcmaddc_bcst): Ditto.
11090 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
11091 (cmul<conj_op><mode>3): Ditto.
11092 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
11094 (vec_unpacks_lo_<mode>): Ditto.
11095 (vec_unpacks_hi_<mode>): Ditto.
11096 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
11097 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
11098 (*vec_extract<mode>_0): Ditto.
11099 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
11101 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
11104 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
11106 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
11108 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
11109 (operator_minus::overflow_free_p): New declare.
11110 (operator_mult::overflow_free_p): New declare.
11111 * range-op.cc (range_op_handler::overflow_free_p): New function.
11112 (range_operator::overflow_free_p): New default function.
11113 (operator_plus::overflow_free_p): New function.
11114 (operator_minus::overflow_free_p): New function.
11115 (operator_mult::overflow_free_p): New function.
11116 * range-op.h (range_op_handler::overflow_free_p): New declare.
11117 (range_operator::overflow_free_p): New declare.
11118 * value-range.cc (irange::nonnegative_p): New function.
11119 (irange::nonpositive_p): New function.
11120 * value-range.h (irange::nonnegative_p): New declare.
11121 (irange::nonpositive_p): New declare.
11123 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
11126 * config/pru/predicates.md (const_0_operand): New predicate.
11127 (pru_cstore_comparison_operator): Ditto.
11128 * config/pru/pru.md (cstore<mode>4): New pattern.
11129 (cstoredi4): Ditto.
11131 2023-08-30 Richard Biener <rguenther@suse.de>
11133 PR tree-optimization/111228
11134 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
11135 New simplifications.
11137 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11139 * config/riscv/autovec.md (movmisalign<mode>): Delete.
11141 2023-08-30 Die Li <lidie@eswincomputing.com>
11142 Fei Gao <gaofei@eswincomputing.com>
11144 * config/riscv/peephole.md: New pattern.
11145 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
11146 (zcmp_mv_sreg_operand): New predicate.
11147 * config/riscv/riscv.md: New predicate.
11148 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
11149 (*mvsa01<X:mode>): New pattern.
11151 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
11153 * config/riscv/riscv.cc
11154 (riscv_zcmp_can_use_popretz): true if popretz can be used
11155 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
11156 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
11157 * config/riscv/riscv.md: define A0_REGNUM
11158 * config/riscv/zc.md
11159 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
11160 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
11161 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
11162 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
11163 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
11164 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
11165 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
11166 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
11167 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
11168 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
11169 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
11170 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
11172 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
11174 * config/riscv/iterators.md
11175 (slot0_offset): slot 0 offset in stack GPRs area in bytes
11176 (slot1_offset): slot 1 offset in stack GPRs area in bytes
11177 (slot2_offset): likewise
11178 (slot3_offset): likewise
11179 (slot4_offset): likewise
11180 (slot5_offset): likewise
11181 (slot6_offset): likewise
11182 (slot7_offset): likewise
11183 (slot8_offset): likewise
11184 (slot9_offset): likewise
11185 (slot10_offset): likewise
11186 (slot11_offset): likewise
11187 (slot12_offset): likewise
11188 * config/riscv/predicates.md
11189 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
11190 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
11191 (stack_push_up_to_s1_operand): likewise
11192 (stack_push_up_to_s2_operand): likewise
11193 (stack_push_up_to_s3_operand): likewise
11194 (stack_push_up_to_s4_operand): likewise
11195 (stack_push_up_to_s5_operand): likewise
11196 (stack_push_up_to_s6_operand): likewise
11197 (stack_push_up_to_s7_operand): likewise
11198 (stack_push_up_to_s8_operand): likewise
11199 (stack_push_up_to_s9_operand): likewise
11200 (stack_push_up_to_s11_operand): likewise
11201 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
11202 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
11203 (stack_pop_up_to_s1_operand): likewise
11204 (stack_pop_up_to_s2_operand): likewise
11205 (stack_pop_up_to_s3_operand): likewise
11206 (stack_pop_up_to_s4_operand): likewise
11207 (stack_pop_up_to_s5_operand): likewise
11208 (stack_pop_up_to_s6_operand): likewise
11209 (stack_pop_up_to_s7_operand): likewise
11210 (stack_pop_up_to_s8_operand): likewise
11211 (stack_pop_up_to_s9_operand): likewise
11212 (stack_pop_up_to_s11_operand): likewise
11213 * config/riscv/riscv-protos.h
11214 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
11215 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
11216 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
11217 (riscv_use_multi_push): true if multi push is used
11218 (riscv_multi_push_sregs_count): num of sregs in multi-push
11219 (riscv_multi_push_regs_count): num of regs in multi-push
11220 (riscv_16bytes_align): align to 16 bytes
11221 (riscv_stack_align): moved to a better place
11222 (riscv_save_libcall_count): no functional change
11223 (riscv_compute_frame_info): add zcmp frame info
11224 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
11225 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
11226 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
11227 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
11228 (riscv_expand_prologue): allocate stack by cm.push
11229 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
11230 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
11231 (zcmp_base_adj): calculate stack adjustment base size
11232 (zcmp_additional_adj): calculate stack adjustment additional size
11233 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
11234 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
11235 (S0_MASK): likewise
11236 (S1_MASK): likewise
11237 (S2_MASK): likewise
11238 (S3_MASK): likewise
11239 (S4_MASK): likewise
11240 (S5_MASK): likewise
11241 (S6_MASK): likewise
11242 (S7_MASK): likewise
11243 (S8_MASK): likewise
11244 (S9_MASK): likewise
11245 (S10_MASK): likewise
11246 (S11_MASK): likewise
11247 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
11248 (ZCMP_MAX_SPIMM): max spimm value
11249 (ZCMP_SP_INC_STEP): zcmp sp increment step
11250 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
11251 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
11252 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
11253 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
11254 * config/riscv/riscv.md: include zc.md
11255 * config/riscv/zc.md: New file. machine description for zcmp
11257 2023-08-30 Jakub Jelinek <jakub@redhat.com>
11259 PR tree-optimization/110914
11260 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
11261 adjust_last_stmt unless len is known constant.
11263 2023-08-30 Jakub Jelinek <jakub@redhat.com>
11265 PR tree-optimization/111015
11266 * gimple-ssa-store-merging.cc
11267 (imm_store_chain_info::output_merged_store): Use wi::mask and
11268 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
11269 build_int_cst to build BIT_AND_EXPR mask.
11271 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11273 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
11274 (call_may_clobber_ref_p_1): Ditto.
11275 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
11276 (get_alias_ptr_type_for_ptr_address): Ditto.
11278 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11280 * config/riscv/riscv-vsetvl.cc
11281 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
11283 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11285 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
11286 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
11289 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
11291 * config/riscv/zicond.md: New splitters to rewrite single bit
11292 sign extension as the condition to a czero in the desired form.
11294 2023-08-29 David Malcolm <dmalcolm@redhat.com>
11297 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
11299 2023-08-29 David Malcolm <dmalcolm@redhat.com>
11302 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
11304 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
11306 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
11307 zvfh can generate zfa extended instruction fli.h, just like zfh.
11309 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
11310 Vineet Gupta <vineetg@rivosinc.com>
11312 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
11313 __riscv_unaligned_avoid with value 1 or
11314 __riscv_unaligned_slow with value 1 or
11315 __riscv_unaligned_fast with value 1
11316 * config/riscv/riscv.cc (riscv_option_override): Define
11317 riscv_user_wants_strict_align. Set
11318 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
11319 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
11321 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
11323 * config/riscv/autovec-vls.md: Update types
11324 * config/riscv/riscv.md: Add vector placeholder type
11325 * config/riscv/vector.md: Update types
11327 2023-08-29 Carl Love <cel@us.ibm.com>
11329 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
11330 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
11331 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
11332 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
11333 New buit-in definitions.
11334 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
11335 overloaded definition.
11336 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
11338 2023-08-29 Pan Li <pan2.li@intel.com>
11339 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11341 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
11342 (riscv_legitimize_const_move): Handle ref plus const poly.
11344 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
11346 * common/config/riscv/riscv-common.cc
11347 (riscv_implied_info): Add implications from unprivileged extensions.
11348 (riscv_ext_version_table): Add stub support for all unprivileged
11349 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
11351 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
11353 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
11354 Add stub support for all vendor extensions supported by Binutils.
11356 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
11358 * common/config/riscv/riscv-common.cc
11359 (riscv_implied_info): Add implications from privileged extensions.
11360 (riscv_ext_version_table): Add stub support for all privileged
11361 extensions supported by Binutils.
11363 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
11365 * config/riscv/autovec.md: Adjust
11366 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
11367 (get_vlmax_rtx): Exported.
11368 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
11369 (emit_vlmax_masked_gather_mu_insn): Adjust.
11370 (get_vlmax_rtx): New func.
11371 (expand_load_store): Adjust.
11372 (expand_cond_len_unop): Call expand_cond_len_op.
11373 (expand_cond_len_op): New subroutine.
11374 (expand_cond_len_binop): Call expand_cond_len_op.
11375 (expand_cond_len_ternop): Call expand_cond_len_op.
11376 (expand_lanes_load_store): Adjust.
11378 2023-08-29 Jakub Jelinek <jakub@redhat.com>
11380 PR middle-end/79173
11381 PR middle-end/111209
11382 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
11383 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
11384 carry-out on higher limb. Don't match it though if it could be
11385 matched later on 4 argument addition/subtraction.
11387 2023-08-29 Andrew Pinski <apinski@marvell.com>
11389 PR tree-optimization/111147
11390 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
11391 instead of matching bit_not.
11393 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
11395 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
11398 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11400 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
11401 (pass_vsetvl::compute_local_properties): Fix bug.
11402 (pass_vsetvl::commit_vsetvls): Ditto.
11403 * config/riscv/riscv-vsetvl.h: New function.
11405 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
11408 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
11410 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
11411 force_reg mem target operand.
11412 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
11413 (*pred_mov<mode>): Remove imm -> reg pattern.
11414 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
11416 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
11418 * common/config/loongarch/loongarch-common.cc:
11419 Enable '-free' on O2 and above.
11420 * doc/invoke.texi: Modify the description information
11421 of the '-free' compilation option and add the LoongArch
11424 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
11426 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
11428 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
11430 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
11431 Implement the 'Zihintpause' extension, version 2.0.
11432 (riscv_ext_flag_table) Add 'Zihintpause' handling.
11433 * config/riscv/riscv-builtins.cc: Remove availability predicate
11434 "always" and add "hint_pause".
11435 (riscv_builtins) : Add "pause" extension.
11436 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
11437 * config/riscv/riscv.md (riscv_pause): Adjust output based on
11438 TARGET_ZIHINTPAUSE.
11440 2023-08-28 Andrew Pinski <apinski@marvell.com>
11442 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
11443 instead of specifically checking for ~X.
11445 2023-08-28 Andrew Pinski <apinski@marvell.com>
11447 PR tree-optimization/111146
11448 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
11451 2023-08-28 Andrew Pinski <apinski@marvell.com>
11453 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
11454 when resimplify returns true.
11455 (match_simplify_replacement): Print only if accepted the match-and-simplify
11456 result rather than the full sequence.
11458 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11460 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
11462 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
11464 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11466 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
11468 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11470 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
11471 (vmulltq_poly): New.
11472 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
11473 (vmulltq_poly): New.
11474 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
11475 (vmulltq_poly): New.
11476 * config/arm/arm_mve.h (vmulltq_poly): Remove.
11477 (vmullbq_poly): Remove.
11478 (vmullbq_poly_m): Remove.
11479 (vmulltq_poly_m): Remove.
11480 (vmullbq_poly_x): Remove.
11481 (vmulltq_poly_x): Remove.
11482 (vmulltq_poly_p8): Remove.
11483 (vmullbq_poly_p8): Remove.
11484 (vmulltq_poly_p16): Remove.
11485 (vmullbq_poly_p16): Remove.
11486 (vmullbq_poly_m_p8): Remove.
11487 (vmullbq_poly_m_p16): Remove.
11488 (vmulltq_poly_m_p8): Remove.
11489 (vmulltq_poly_m_p16): Remove.
11490 (vmullbq_poly_x_p8): Remove.
11491 (vmullbq_poly_x_p16): Remove.
11492 (vmulltq_poly_x_p8): Remove.
11493 (vmulltq_poly_x_p16): Remove.
11494 (__arm_vmulltq_poly_p8): Remove.
11495 (__arm_vmullbq_poly_p8): Remove.
11496 (__arm_vmulltq_poly_p16): Remove.
11497 (__arm_vmullbq_poly_p16): Remove.
11498 (__arm_vmullbq_poly_m_p8): Remove.
11499 (__arm_vmullbq_poly_m_p16): Remove.
11500 (__arm_vmulltq_poly_m_p8): Remove.
11501 (__arm_vmulltq_poly_m_p16): Remove.
11502 (__arm_vmullbq_poly_x_p8): Remove.
11503 (__arm_vmullbq_poly_x_p16): Remove.
11504 (__arm_vmulltq_poly_x_p8): Remove.
11505 (__arm_vmulltq_poly_x_p16): Remove.
11506 (__arm_vmulltq_poly): Remove.
11507 (__arm_vmullbq_poly): Remove.
11508 (__arm_vmullbq_poly_m): Remove.
11509 (__arm_vmulltq_poly_m): Remove.
11510 (__arm_vmullbq_poly_x): Remove.
11511 (__arm_vmulltq_poly_x): Remove.
11513 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11515 * config/arm/arm-mve-builtins-functions.h (class
11516 unspec_mve_function_exact_insn_vmull_poly): New.
11518 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11520 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
11521 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
11523 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11525 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
11526 support for 'U' and 'p' format specifiers.
11528 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11530 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
11532 (TYPES_poly_8_16): New.
11534 * config/arm/arm-mve-builtins.def (p8): New type suffix.
11536 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
11538 (struct type_suffix_info): Add poly_p field.
11540 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11542 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
11544 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
11546 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
11548 * config/arm/arm_mve.h (vmulltq_int): Remove.
11549 (vmullbq_int): Remove.
11550 (vmullbq_int_m): Remove.
11551 (vmulltq_int_m): Remove.
11552 (vmullbq_int_x): Remove.
11553 (vmulltq_int_x): Remove.
11554 (vmulltq_int_u8): Remove.
11555 (vmullbq_int_u8): Remove.
11556 (vmulltq_int_s8): Remove.
11557 (vmullbq_int_s8): Remove.
11558 (vmulltq_int_u16): Remove.
11559 (vmullbq_int_u16): Remove.
11560 (vmulltq_int_s16): Remove.
11561 (vmullbq_int_s16): Remove.
11562 (vmulltq_int_u32): Remove.
11563 (vmullbq_int_u32): Remove.
11564 (vmulltq_int_s32): Remove.
11565 (vmullbq_int_s32): Remove.
11566 (vmullbq_int_m_s8): Remove.
11567 (vmullbq_int_m_s32): Remove.
11568 (vmullbq_int_m_s16): Remove.
11569 (vmullbq_int_m_u8): Remove.
11570 (vmullbq_int_m_u32): Remove.
11571 (vmullbq_int_m_u16): Remove.
11572 (vmulltq_int_m_s8): Remove.
11573 (vmulltq_int_m_s32): Remove.
11574 (vmulltq_int_m_s16): Remove.
11575 (vmulltq_int_m_u8): Remove.
11576 (vmulltq_int_m_u32): Remove.
11577 (vmulltq_int_m_u16): Remove.
11578 (vmullbq_int_x_s8): Remove.
11579 (vmullbq_int_x_s16): Remove.
11580 (vmullbq_int_x_s32): Remove.
11581 (vmullbq_int_x_u8): Remove.
11582 (vmullbq_int_x_u16): Remove.
11583 (vmullbq_int_x_u32): Remove.
11584 (vmulltq_int_x_s8): Remove.
11585 (vmulltq_int_x_s16): Remove.
11586 (vmulltq_int_x_s32): Remove.
11587 (vmulltq_int_x_u8): Remove.
11588 (vmulltq_int_x_u16): Remove.
11589 (vmulltq_int_x_u32): Remove.
11590 (__arm_vmulltq_int_u8): Remove.
11591 (__arm_vmullbq_int_u8): Remove.
11592 (__arm_vmulltq_int_s8): Remove.
11593 (__arm_vmullbq_int_s8): Remove.
11594 (__arm_vmulltq_int_u16): Remove.
11595 (__arm_vmullbq_int_u16): Remove.
11596 (__arm_vmulltq_int_s16): Remove.
11597 (__arm_vmullbq_int_s16): Remove.
11598 (__arm_vmulltq_int_u32): Remove.
11599 (__arm_vmullbq_int_u32): Remove.
11600 (__arm_vmulltq_int_s32): Remove.
11601 (__arm_vmullbq_int_s32): Remove.
11602 (__arm_vmullbq_int_m_s8): Remove.
11603 (__arm_vmullbq_int_m_s32): Remove.
11604 (__arm_vmullbq_int_m_s16): Remove.
11605 (__arm_vmullbq_int_m_u8): Remove.
11606 (__arm_vmullbq_int_m_u32): Remove.
11607 (__arm_vmullbq_int_m_u16): Remove.
11608 (__arm_vmulltq_int_m_s8): Remove.
11609 (__arm_vmulltq_int_m_s32): Remove.
11610 (__arm_vmulltq_int_m_s16): Remove.
11611 (__arm_vmulltq_int_m_u8): Remove.
11612 (__arm_vmulltq_int_m_u32): Remove.
11613 (__arm_vmulltq_int_m_u16): Remove.
11614 (__arm_vmullbq_int_x_s8): Remove.
11615 (__arm_vmullbq_int_x_s16): Remove.
11616 (__arm_vmullbq_int_x_s32): Remove.
11617 (__arm_vmullbq_int_x_u8): Remove.
11618 (__arm_vmullbq_int_x_u16): Remove.
11619 (__arm_vmullbq_int_x_u32): Remove.
11620 (__arm_vmulltq_int_x_s8): Remove.
11621 (__arm_vmulltq_int_x_s16): Remove.
11622 (__arm_vmulltq_int_x_s32): Remove.
11623 (__arm_vmulltq_int_x_u8): Remove.
11624 (__arm_vmulltq_int_x_u16): Remove.
11625 (__arm_vmulltq_int_x_u32): Remove.
11626 (__arm_vmulltq_int): Remove.
11627 (__arm_vmullbq_int): Remove.
11628 (__arm_vmullbq_int_m): Remove.
11629 (__arm_vmulltq_int_m): Remove.
11630 (__arm_vmullbq_int_x): Remove.
11631 (__arm_vmulltq_int_x): Remove.
11633 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11635 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
11636 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
11638 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11640 * config/arm/arm-mve-builtins-functions.h (class
11641 unspec_mve_function_exact_insn_vmull): New.
11643 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11645 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
11646 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
11648 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
11650 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
11651 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
11652 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
11653 (mve_vmulltq_int_<supf><mode>): Merge into ...
11654 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
11655 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
11656 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
11657 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
11658 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
11659 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
11660 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
11662 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11664 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
11667 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
11669 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
11670 (binary_acca_int64): Likewise.
11672 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
11674 * range-op-float.cc (fold_range): Handle relations.
11676 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
11678 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
11679 Optimize the function implementation.
11681 2023-08-28 liuhongt <hongtao.liu@intel.com>
11684 * config/i386/sse.md (V48_AVX2): Rename to ..
11685 (V48_128_256): .. this.
11686 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
11687 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
11688 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
11689 integral modes when TARGET_AVX2 is not available.
11690 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
11691 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
11693 (maskstore<mode><sseintvecmodelower>): Ditto.
11695 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11697 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
11699 (after_or_same_p): Ditto.
11700 (find_reg_killed_by): Delete.
11701 (has_vsetvl_killed_avl_p): Ditto.
11702 (anticipatable_occurrence_p): Refactor.
11703 (any_set_in_bb_p): Delete.
11704 (count_regno_occurrences): Ditto.
11705 (backward_propagate_worthwhile_p): Ditto.
11706 (demands_can_be_fused_p): Ditto.
11707 (earliest_pred_can_be_fused_p): New function.
11708 (vsetvl_dominated_by_p): Ditto.
11709 (vector_insn_info::parse_insn): Refactor.
11710 (vector_insn_info::merge): Refactor.
11711 (vector_insn_info::dump): Refactor.
11712 (vector_infos_manager::vector_infos_manager): Refactor.
11713 (vector_infos_manager::all_empty_predecessor_p): Delete.
11714 (vector_infos_manager::all_same_avl_p): Ditto.
11715 (vector_infos_manager::create_bitmap_vectors): Refactor.
11716 (vector_infos_manager::free_bitmap_vectors): Refactor.
11717 (vector_infos_manager::dump): Refactor.
11718 (pass_vsetvl::update_block_info): New function.
11719 (enum fusion_type): Ditto.
11720 (pass_vsetvl::get_backward_fusion_type): Delete.
11721 (pass_vsetvl::hard_empty_block_p): Ditto.
11722 (pass_vsetvl::backward_demand_fusion): Ditto.
11723 (pass_vsetvl::forward_demand_fusion): Ditto.
11724 (pass_vsetvl::demand_fusion): Ditto.
11725 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
11726 (pass_vsetvl::compute_local_properties): Ditto.
11727 (pass_vsetvl::earliest_fusion): New function.
11728 (pass_vsetvl::vsetvl_fusion): Ditto.
11729 (pass_vsetvl::commit_vsetvls): Refactor.
11730 (get_first_vsetvl_before_rvv_insns): Ditto.
11731 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
11732 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
11733 (pass_vsetvl::df_post_optimization): Refactor.
11734 (pass_vsetvl::lazy_vsetvl): Ditto.
11735 * config/riscv/riscv-vsetvl.h: Ditto.
11737 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11739 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
11740 * config/riscv/riscv-protos.h (enum insn_type): New enum.
11741 (expand_fold_extract_last): New function.
11742 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
11743 (emit_cpop_insn): Ditto.
11744 (emit_nonvlmax_compress_insn): Ditto.
11745 (expand_fold_extract_last): Ditto.
11746 * config/riscv/vector.md: Fix vcpop.m ratio demand.
11748 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
11750 * config/riscv/sync-rvwmo.md: updated types to "multi" or
11751 "atomic" based on number of assembly lines generated
11752 * config/riscv/sync-ztso.md: likewise
11753 * config/riscv/sync.md: likewise
11755 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
11757 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
11759 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
11760 instructions FLI.H/S/D can load.
11761 * config/riscv/iterators.md (ceil): New.
11762 * config/riscv/riscv-opts.h (MASK_ZFA): New.
11764 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
11765 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
11766 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
11768 (riscv_const_insns): Likewise.
11769 (riscv_legitimize_const_move): Likewise.
11770 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
11772 (riscv_split_doubleword_move): Likewise.
11773 (riscv_output_move): Output the mov instructions in zfa extension.
11774 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
11776 (riscv_secondary_memory_needed): Likewise.
11777 * config/riscv/riscv.md (fminm<mode>3): New.
11778 (fmaxm<mode>3): New.
11779 (movsidf2_low_rv32): New.
11780 (movsidf2_high_rv32): New.
11781 (movdfsisi3_rv32): New.
11782 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
11783 * config/riscv/riscv.opt: New.
11785 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
11788 * omp-general.cc (omp_runtime_api_procname): New.
11789 (omp_runtime_api_call): Moved here from omp-low.cc, and make
11791 * omp-general.h: Include omp-api.h.
11792 * omp-low.cc (omp_runtime_api_call): Delete this copy.
11794 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
11796 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
11797 * doc/gimple.texi (GIMPLE instruction set): Add
11798 GIMPLE_OMP_STRUCTURED_BLOCK.
11799 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
11800 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
11801 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
11802 GIMPLE_OMP_STRUCTURED_BLOCK.
11803 (pp_gimple_stmt_1): Likewise.
11804 * gimple-walk.cc (walk_gimple_stmt): Likewise.
11805 * gimple.cc (gimple_build_omp_structured_block): New.
11806 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
11807 * gimple.h (gimple_build_omp_structured_block): Declare.
11808 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
11809 (CASE_GIMPLE_OMP): Likewise.
11810 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
11811 (gimplify_expr): Likewise.
11812 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
11813 GIMPLE_OMP_STRUCTURED_BLOCK.
11814 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
11815 (lower_omp_1): Likewise.
11816 (diagnose_sb_1): Likewise.
11817 (diagnose_sb_2): Likewise.
11818 * tree-inline.cc (remap_gimple_stmt): Handle
11819 GIMPLE_OMP_STRUCTURED_BLOCK.
11820 (estimate_num_insns): Likewise.
11821 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
11822 (convert_local_reference_stmt): Likewise.
11823 (convert_gimple_call): Likewise.
11824 * tree-pretty-print.cc (dump_generic_node): Handle
11825 OMP_STRUCTURED_BLOCK.
11826 * tree.def (OMP_STRUCTURED_BLOCK): New.
11827 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
11829 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
11831 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
11832 cost. Add some comments about different constants handling.
11834 2023-08-25 Andrew Pinski <apinski@marvell.com>
11836 * match.pd (`a ? one_zero : one_zero`): Move
11837 below detection of minmax.
11839 2023-08-25 Andrew Pinski <apinski@marvell.com>
11841 * match.pd (`a | C -> C`): New pattern.
11843 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
11845 * caller-save.cc (new_saved_hard_reg):
11846 Rename TRUE/FALSE to true/false.
11847 (setup_save_areas): Ditto.
11848 * gcc.cc (set_collect_gcc_options): Ditto.
11849 (driver::build_multilib_strings): Ditto.
11850 (print_multilib_info): Ditto.
11851 * genautomata.cc (gen_cpu_unit): Ditto.
11852 (gen_query_cpu_unit): Ditto.
11853 (gen_bypass): Ditto.
11854 (gen_excl_set): Ditto.
11855 (gen_presence_absence_set): Ditto.
11856 (gen_presence_set): Ditto.
11857 (gen_final_presence_set): Ditto.
11858 (gen_absence_set): Ditto.
11859 (gen_final_absence_set): Ditto.
11860 (gen_automaton): Ditto.
11861 (gen_regexp_repeat): Ditto.
11862 (gen_regexp_allof): Ditto.
11863 (gen_regexp_oneof): Ditto.
11864 (gen_regexp_sequence): Ditto.
11865 (process_decls): Ditto.
11866 (reserv_sets_are_intersected): Ditto.
11867 (initiate_excl_sets): Ditto.
11868 (form_reserv_sets_list): Ditto.
11869 (check_presence_pattern_sets): Ditto.
11870 (check_absence_pattern_sets): Ditto.
11871 (check_regexp_units_distribution): Ditto.
11872 (check_unit_distributions_to_automata): Ditto.
11873 (create_ainsns): Ditto.
11874 (output_insn_code_cases): Ditto.
11875 (output_internal_dead_lock_func): Ditto.
11876 (form_important_insn_automata_lists): Ditto.
11877 * gengtype-state.cc (read_state_files_list): Ditto.
11878 * gengtype.cc (main): Ditto.
11879 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
11881 * gimple.cc (gimple_build_call_from_tree): Ditto.
11882 (preprocess_case_label_vec_for_gimple): Ditto.
11883 * gimplify.cc (gimplify_call_expr): Ditto.
11884 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
11886 2023-08-25 Richard Biener <rguenther@suse.de>
11888 PR tree-optimization/111137
11889 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
11890 Properly handle grouped stores from other SLP instances.
11892 2023-08-25 Richard Biener <rguenther@suse.de>
11894 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
11895 Split out from vect_slp_analyze_node_dependences, remove
11897 (vect_slp_analyze_load_dependences): Split out from
11898 vect_slp_analyze_node_dependences, adjust comments. Process
11899 queued stores before any disambiguation.
11900 (vect_slp_analyze_node_dependences): Remove.
11901 (vect_slp_analyze_instance_dependence): Adjust.
11903 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
11905 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
11907 (operator_not_equal::fold_range): Adjust for relations.
11908 (operator_lt::fold_range): Same.
11909 (operator_gt::fold_range): Same.
11910 (foperator_unordered_equal::fold_range): Same.
11911 (foperator_unordered_lt::fold_range): Same.
11912 (foperator_unordered_le::fold_range): Same.
11913 (foperator_unordered_gt::fold_range): Same.
11914 (foperator_unordered_ge::fold_range): Same.
11916 2023-08-25 Richard Biener <rguenther@suse.de>
11918 PR tree-optimization/111136
11919 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
11920 stores force STMT_VINFO_STRIDED_P and also duplicate that
11923 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11925 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
11926 Add early continue.
11928 2023-08-25 liuhongt <hongtao.liu@intel.com>
11930 * config/i386/sse.md (vec_set<mode>): Removed.
11931 (V_128H): Merge into ..
11933 (V_256H): Merge into ..
11935 (V_512): Add V32HF, V32BF.
11936 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
11938 (vcond<mode><sseintvecmodelower>): Removed
11939 (vcondu<mode><sseintvecmodelower>): Removed.
11940 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
11942 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
11945 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
11946 Adjust paramter order.
11948 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
11951 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
11953 2023-08-24 David Malcolm <dmalcolm@redhat.com>
11956 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
11957 list of functions known to the analyzer.
11959 2023-08-24 Richard Biener <rguenther@suse.de>
11961 PR tree-optimization/111123
11962 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
11963 remove indirect clobbers here ...
11964 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
11965 (remove_indirect_clobbers): New function.
11967 2023-08-24 Jan Hubicka <jh@suse.cz>
11969 * cfg.h (struct control_flow_graph): New field full_profile.
11970 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
11971 * cfg.cc (init_flow): Set full_profile to false.
11972 * graphite.cc (graphite_transform_loops): Set full_profile to false.
11973 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
11974 * predict.cc (pass_profile::execute): Set full_profile to true.
11975 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
11976 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
11977 if full_profile is set.
11978 * tree-inline.cc (initialize_cfun): Initialize full_profile.
11979 (expand_call_inline): Combine full_profile.
11981 2023-08-24 Richard Biener <rguenther@suse.de>
11983 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
11984 load_p to ldst_p, fix mistakes and rely on
11985 STMT_VINFO_DATA_REF.
11987 2023-08-24 Jan Hubicka <jh@suse.cz>
11989 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
11990 of newly build trap bb.
11992 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11994 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
11995 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
11996 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
11998 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
12000 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
12001 * config/riscv/riscv.cc (riscv_option_override): Set sched
12002 pressure algorithm.
12004 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
12006 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
12008 2023-08-24 Richard Biener <rguenther@suse.de>
12010 PR tree-optimization/111125
12011 * tree-vect-slp.cc (vect_slp_function): Split at novector
12012 loop entry, do not push blocks in novector loops.
12014 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
12016 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
12018 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12020 * genmatch.cc (decision_tree::gen): Support
12021 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
12022 * gimple-match-exports.cc (gimple_simplify): Ditto.
12023 (gimple_resimplify6): New function.
12024 (gimple_resimplify7): New function.
12025 (gimple_match_op::resimplify): Support
12026 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
12027 (convert_conditional_op): Ditto.
12028 (build_call_internal): Ditto.
12029 (try_conditional_simplification): Ditto.
12030 (gimple_extract): Ditto.
12031 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
12032 * internal-fn.cc (CASE): Ditto.
12034 2023-08-24 Richard Biener <rguenther@suse.de>
12036 PR tree-optimization/111115
12037 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
12038 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
12040 * tree-vect-slp.cc (arg3_arg2_map): New.
12041 (vect_get_operand_map): Handle IFN_MASK_STORE.
12042 (vect_slp_child_index_for_operand): New function.
12043 (vect_build_slp_tree_1): Handle statements with no LHS,
12045 (vect_remove_slp_scalar_calls): Likewise.
12046 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
12047 SLP child corresponding to the ifn value index.
12048 (vectorizable_store): Likewise for the mask index. Support
12050 (vectorizable_load): Lookup the SLP child corresponding to the
12053 2023-08-24 Richard Biener <rguenther@suse.de>
12055 PR tree-optimization/111125
12056 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
12057 for the remain_defs processing.
12059 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
12061 * config/aarch64/aarch64.cc: Include ssa.h.
12062 (aarch64_multiply_add_p): Require the second operand of an
12063 Advanced SIMD subtraction to be a multiplication. Assume that
12064 such an operation won't be fused if the second operand is used
12065 multiple times and if the first operand is also a multiplication.
12067 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12069 * tree-vect-loop.cc (vectorizable_reduction): Apply
12070 LEN_FOLD_EXTRACT_LAST.
12071 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
12073 2023-08-24 Richard Biener <rguenther@suse.de>
12075 PR tree-optimization/111128
12076 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
12077 Emit external shift operand inline if we promoted it with
12078 another pattern stmt.
12080 2023-08-24 Pan Li <pan2.li@intel.com>
12082 * config/riscv/autovec.md: Fix typo.
12084 2023-08-24 Pan Li <pan2.li@intel.com>
12086 * config/riscv/riscv-vector-builtins-bases.cc
12087 (class binop_frm): Removed.
12088 (class reverse_binop_frm): Ditto.
12089 (class widen_binop_frm): Ditto.
12090 (class vfmacc_frm): Ditto.
12091 (class vfnmacc_frm): Ditto.
12092 (class vfmsac_frm): Ditto.
12093 (class vfnmsac_frm): Ditto.
12094 (class vfmadd_frm): Ditto.
12095 (class vfnmadd_frm): Ditto.
12096 (class vfmsub_frm): Ditto.
12097 (class vfnmsub_frm): Ditto.
12098 (class vfwmacc_frm): Ditto.
12099 (class vfwnmacc_frm): Ditto.
12100 (class vfwmsac_frm): Ditto.
12101 (class vfwnmsac_frm): Ditto.
12102 (class unop_frm): Ditto.
12103 (class vfrec7_frm): Ditto.
12104 (class binop): Add frm_op_type template arg.
12105 (class unop): Ditto.
12106 (class widen_binop): Ditto.
12107 (class widen_binop_fp): Ditto.
12108 (class reverse_binop): Ditto.
12109 (class vfmacc): Ditto.
12110 (class vfnmsac): Ditto.
12111 (class vfmadd): Ditto.
12112 (class vfnmsub): Ditto.
12113 (class vfnmacc): Ditto.
12114 (class vfmsac): Ditto.
12115 (class vfnmadd): Ditto.
12116 (class vfmsub): Ditto.
12117 (class vfwmacc): Ditto.
12118 (class vfwnmacc): Ditto.
12119 (class vfwmsac): Ditto.
12120 (class vfwnmsac): Ditto.
12121 (class float_misc): Ditto.
12123 2023-08-24 Andrew Pinski <apinski@marvell.com>
12125 PR tree-optimization/111109
12126 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
12127 Add check to make sure cmp and icmp are inverse.
12129 2023-08-24 Andrew Pinski <apinski@marvell.com>
12131 PR tree-optimization/95929
12132 * match.pd (convert?(-a)): New pattern
12133 for 1bit integer types.
12135 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12138 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12140 * common/config/i386/cpuinfo.h (get_available_features):
12141 Add avx10_set and version and detect avx10.1.
12142 (cpu_indicator_init): Handle avx10.1-512.
12143 * common/config/i386/i386-common.cc
12144 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
12145 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
12146 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
12147 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
12148 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
12149 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
12151 * common/config/i386/i386-cpuinfo.h (enum processor_features):
12152 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
12153 FEATURE_AVX10_512BIT.
12154 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
12155 AVX10_512BIT, AVX10_1 and AVX10_1_512.
12156 * config/i386/constraints.md (Yk): Add AVX10_1.
12159 * config/i386/cpuid.h (bit_AVX10): New.
12160 (bit_AVX10_256): Ditto.
12161 (bit_AVX10_512): Ditto.
12162 * config/i386/i386-c.cc (ix86_target_macros_internal):
12163 Define AVX10_512BIT and AVX10_1.
12164 * config/i386/i386-isa.def
12165 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
12166 (AVX10_1): Add DEF_PTA(AVX10_1).
12167 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
12168 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
12170 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
12171 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
12172 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
12173 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
12174 (ix86_conditional_register_usage): Ditto.
12175 (ix86_hard_regno_mode_ok): Ditto.
12176 (ix86_rtx_costs): Ditto.
12177 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
12178 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
12180 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
12181 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
12182 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
12185 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12188 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12190 * common/config/i386/i386-common.cc
12191 (ix86_check_avx10): New function to check isa_flags and
12192 isa_flags_explicit to emit warning when AVX10 is enabled
12194 (ix86_check_avx512): New function to check isa_flags and
12195 isa_flags_explicit to emit warning when AVX512 is enabled
12197 (ix86_handle_option): Do not change the flags when warning
12199 * config/i386/driver-i386.cc (host_detect_local_cpu):
12200 Do not append -mno-avx10.1 for -march=native.
12202 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12205 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12207 * common/config/i386/i386-common.cc
12208 (ix86_check_avx10_vector_width): New function to check isa_flags
12209 to emit a warning when there is a conflict in AVX10 options for
12211 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
12212 * config/i386/driver-i386.cc (host_detect_local_cpu):
12213 Do not append -mno-avx10-max-512bit for -march=native.
12215 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12218 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12220 * config/i386/avx512vldqintrin.h: Remove target attribute.
12221 * config/i386/i386-builtin.def (BDESC):
12222 Add OPTION_MASK_ISA2_AVX10_1.
12223 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
12224 * config/i386/i386-expand.cc
12225 (ix86_check_builtin_isa_match): Ditto.
12226 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
12227 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
12228 and avx10_1_or_avx512vl.
12229 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
12230 (VF1_128_256VLDQ_AVX10_1): Ditto.
12231 (VI8_AVX512VLDQ_AVX10_1): Ditto.
12232 (<sse>_andnot<mode>3<mask_name>):
12233 Add TARGET_AVX10_1 and change isa attr from avx512dq to
12234 avx10_1_or_avx512dq.
12235 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
12236 avx512vl to avx10_1_or_avx512vl.
12237 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
12238 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
12239 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
12241 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
12243 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
12244 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
12245 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
12246 Add TARGET_AVX10_1.
12247 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
12248 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
12249 Remove target check.
12250 (avx512dq_mul<mode>3<mask_name>): Ditto.
12251 (*avx512dq_mul<mode>3<mask_name>): Ditto.
12252 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
12253 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
12254 Remove target check.
12255 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
12256 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
12257 Remove target check.
12258 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
12259 (mask_avx512vl_condition): Ditto.
12262 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12265 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12267 * config/i386/avx512vldqintrin.h: Remove target attribute.
12268 * config/i386/i386-builtin.def (BDESC):
12269 Add OPTION_MASK_ISA2_AVX10_1.
12270 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
12271 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
12272 (VI48_AVX512VLDQ_AVX10_1): Ditto.
12273 (VF2_AVX512VL): Remove.
12274 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
12275 Add TARGET_AVX10_1.
12276 (*<code><mode>3<mask_name>): Change isa attribute to
12277 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
12278 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
12279 to avx10_1_or_avx512vl.
12280 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
12281 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
12282 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
12283 Add TARGET_AVX10_1.
12284 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
12285 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
12286 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
12287 Add TARGET_AVX10_1.
12288 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
12289 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
12290 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
12291 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
12292 (float<floatunssuffix>v4div4sf2<mask_name>):
12293 Add TARGET_AVX10_1.
12294 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
12295 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
12296 (float<floatunssuffix>v2div2sf2): Ditto.
12297 (float<floatunssuffix>v2div2sf2_mask): Ditto.
12298 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
12299 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
12300 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
12301 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
12302 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
12303 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
12304 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
12305 Change when constraint is enabled.
12307 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12310 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12312 * config/i386/avx512vldqintrin.h: Remove target attribute.
12313 * config/i386/i386-builtin.def (BDESC):
12314 Add OPTION_MASK_ISA2_AVX10_1.
12315 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
12316 (VFH_AVX512VLDQ_AVX10_1): Ditto.
12317 (VF1_AVX512VLDQ_AVX10_1): Ditto.
12318 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
12319 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
12320 (vec_pack<floatprefix>_float_<mode>): Change iterator to
12321 VI8_AVX512VLDQ_AVX10_1. Remove target check.
12322 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
12323 VF1_AVX512VLDQ_AVX10_1. Remove target check.
12324 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
12325 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
12326 (avx512vl_vextractf128<mode>): Change iterator to
12327 VI48F_256_DQVL_AVX10_1. Remove target check.
12328 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
12329 (vec_extract_hi_<mode>): Ditto.
12330 (avx512vl_vinsert<mode>): Ditto.
12331 (vec_set_lo_<mode><mask_name>): Ditto.
12332 (vec_set_hi_<mode><mask_name>): Ditto.
12333 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
12334 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
12335 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
12336 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
12337 * config/i386/subst.md (mask_avx512dq_condition): Add
12339 (mask_scalar_merge): Ditto.
12341 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
12344 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
12347 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
12350 2023-08-24 Richard Biener <rguenther@suse.de>
12353 * dwarf2out.cc (prune_unused_types_walk): Handle
12354 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
12355 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
12356 and DW_TAG_dynamic_type as to only output them when referenced.
12358 2023-08-24 liuhongt <hongtao.liu@intel.com>
12360 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
12363 2023-08-24 liuhongt <hongtao.liu@intel.com>
12365 * common/config/i386/i386-common.cc (processor_names): Add new
12366 member graniterapids-s and arrowlake-s.
12367 * config/i386/i386-options.cc (processor_alias_table): Update
12368 table with PROCESSOR_ARROWLAKE_S and
12369 PROCESSOR_GRANITERAPIDS_D.
12370 (m_GRANITERAPID_D): New macro.
12371 (m_ARROWLAKE_S): Ditto.
12372 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
12373 (processor_cost_table): Add icelake_cost for
12374 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
12375 PROCESSOR_ARROWLAKE_S.
12376 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
12378 * config/i386/i386.h (enum processor_type): Add new member
12379 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
12380 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
12381 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
12383 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
12385 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
12386 to help simplify code further.
12388 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
12390 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
12391 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
12392 Initialize using a range instead of value and edge.
12393 (phi_group::calculate_using_modifier): Use initializer value and
12394 process for relations after trying for iteration convergence.
12395 (phi_group::refine_using_relation): Use initializer range.
12396 (phi_group::dump): Rework the dump output.
12397 (phi_analyzer::process_phi): Allow multiple constant initilizers.
12398 Dump groups immediately as created.
12399 (phi_analyzer::dump): Tweak output.
12400 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
12401 (phi_group::initial_value): Delete.
12402 (phi_group::refine_using_relation): Adjust prototype.
12403 (phi_group::m_initial_value): Delete.
12404 (phi_group::m_initial_edge): Delete.
12405 (phi_group::m_vr): Use int_range_max.
12406 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
12408 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
12410 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
12411 no group was created.
12412 (phi_analyzer::process_phi): Do not create groups of one phi node.
12414 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
12416 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
12417 CODE, CMP_CODE and BIT_CODE arguments.
12418 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
12419 (aarch64_gen_ccmp_next): Likewise.
12420 * doc/tm.texi: Regenerated.
12422 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
12424 * coretypes.h (rtx_code): Add forward declaration.
12425 * rtl.h (rtx_code): Make compatible with forward declaration.
12427 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
12430 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
12431 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
12432 DWIH mode iterator. Disable (=&r,m,m) alternative for
12434 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
12435 alternative for 32-bit targets.
12437 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
12439 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
12440 appropriate type attribute.
12442 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
12444 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
12445 (*copysign<mode>_neg): Ditto.
12446 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
12447 (<optab><mode>2): Ditto.
12448 (cond_<optab><mode>): New.
12449 (cond_len_<optab><mode>): Ditto.
12450 * config/riscv/riscv-protos.h (enum insn_type): New.
12451 (expand_cond_len_unop): New helper func.
12452 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
12453 (expand_cond_len_unop): New helper func.
12455 2023-08-23 Jan Hubicka <jh@suse.cz>
12457 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
12458 (should_duplicate_loop_header_p): Fix return value for static exits.
12459 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
12461 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
12463 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
12464 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
12465 and update the final nest accordingly.
12467 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
12469 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
12470 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
12471 and update the final nest accordingly.
12473 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
12475 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
12476 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
12477 gvec_oprnds with auto_delete_vec.
12479 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12481 * config/riscv/riscv-vsetvl.cc
12482 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
12484 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12486 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
12488 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
12490 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12492 * config/riscv/vector.md: Add attribute.
12494 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12496 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
12497 (vector_infos_manager::all_same_ratio_p): Ditto.
12498 (vector_infos_manager::all_same_avl_p): Ditto.
12499 (pass_vsetvl::refine_vsetvls): Ditto.
12500 (pass_vsetvl::cleanup_vsetvls): Ditto.
12501 (pass_vsetvl::commit_vsetvls): Ditto.
12502 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
12503 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
12504 (pass_vsetvl::compute_probabilities): Ditto.
12506 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12508 * config/riscv/t-riscv: Add riscv-vsetvl.def
12510 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
12512 * config/riscv/riscv.opt: Add --param names
12513 riscv-autovec-preference and riscv-autovec-lmul
12515 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
12517 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
12519 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
12521 * tree-core.h (enum omp_clause_defaultmap_kind): Add
12522 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
12523 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
12524 * tree-pretty-print.cc (dump_omp_clause): Likewise.
12526 2023-08-22 Jakub Jelinek <jakub@redhat.com>
12529 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
12530 types aren't supported in C++.
12532 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12534 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
12535 * internal-fn.cc (fold_len_extract_direct): Ditto.
12536 (expand_fold_len_extract_optab_fn): Ditto.
12537 (direct_fold_len_extract_optab_supported_p): Ditto.
12538 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
12539 * optabs.def (OPTAB_D): Ditto.
12541 2023-08-22 Richard Biener <rguenther@suse.de>
12543 * tree-vect-stmts.cc (vectorizable_store): Do not bump
12544 DR_GROUP_STORE_COUNT here. Remove early out.
12545 (vect_transform_stmt): Only call vectorizable_store on
12546 the last element of an interleaving chain.
12548 2023-08-22 Richard Biener <rguenther@suse.de>
12550 PR tree-optimization/94864
12551 PR tree-optimization/94865
12552 PR tree-optimization/93080
12553 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
12554 for vector insertion from vector extraction.
12556 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12557 Kewen.Lin <linkw@linux.ibm.com>
12559 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
12560 (vectorizable_live_operation): Add live vectorization for length loop
12563 2023-08-22 David Malcolm <dmalcolm@redhat.com>
12566 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
12568 2023-08-22 Pan Li <pan2.li@intel.com>
12570 * config/riscv/riscv-vector-builtins-bases.cc
12571 (vfwredusum_frm_obj): New declaration.
12573 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12574 * config/riscv/riscv-vector-builtins-functions.def
12575 (vfwredusum_frm): New intrinsic function def.
12577 2023-08-21 David Faust <david.faust@oracle.com>
12579 * config/bpf/bpf.md (neg): Second operand must be a register.
12581 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
12583 * config/riscv/bitmanip.md: Added bitmanip type to insns
12584 that are missing types.
12586 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
12588 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
12591 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12593 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
12594 Fix format specifier.
12596 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
12598 * value-range.cc (frange::union_nans): Return false if nothing
12600 (range_tests_floats): New test.
12602 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
12604 PR tree-optimization/111048
12605 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
12607 (fold_vec_perm_cst): Remove workaround and again call
12608 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
12609 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
12611 2023-08-21 Richard Biener <rguenther@suse.de>
12613 PR tree-optimization/111082
12614 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
12615 pun operations that can overflow.
12617 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12619 * lcm.cc (compute_antinout_edge): Export as global use.
12620 (compute_earliest): Ditto.
12621 (compute_rev_insert_delete): Ditto.
12622 * lcm.h (compute_antinout_edge): Ditto.
12623 (compute_earliest): Ditto.
12625 2023-08-21 Richard Biener <rguenther@suse.de>
12627 PR tree-optimization/111070
12628 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
12629 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
12631 2023-08-21 Andrew Pinski <apinski@marvell.com>
12633 PR tree-optimization/111002
12634 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
12636 2023-08-21 liuhongt <hongtao.liu@intel.com>
12638 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
12640 * common/config/i386/i386-common.cc (alias_table): Support
12641 -march=gracemont as an alias of -march=alderlake.
12643 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
12645 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
12646 instead of src in the call to ix86_expand_sse_cmp.
12647 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
12648 force operands[1] to a register.
12649 (<any_extend:insn>v4hiv4si2): Ditto.
12650 (<any_extend:insn>v2siv2di2): Ditto.
12652 2023-08-20 Andrew Pinski <apinski@marvell.com>
12654 PR tree-optimization/111006
12655 PR tree-optimization/110986
12656 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
12658 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
12661 * Makefile.in: improve error message when /usr/include is
12664 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
12666 PR middle-end/111017
12667 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
12668 to expand_omp_build_cond for 'factor != 0' condition, resulting
12669 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
12671 2023-08-19 Guo Jie <guojie@loongson.cn>
12672 Lulu Cheng <chenglulu@loongson.cn>
12674 * config/loongarch/t-loongarch: Add loongarch-driver.h into
12675 TM_H. Add loongarch-def.h and loongarch-tune.h into
12678 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
12681 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
12682 Also handle V2QImode.
12683 (ix86_expand_sse_extend): New function.
12684 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
12685 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
12686 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
12687 (<any_extend:insn>v2hiv2si2): Ditto.
12688 (<any_extend:insn>v2qiv2hi2): Ditto.
12689 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
12690 (<any_extend:insn>v4hiv4si2): Ditto.
12691 (<any_extend:insn>v2siv2di2): Ditto.
12693 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
12696 * value-range.cc (irange::union_bitmask): Return FALSE if updated
12697 bitmask is semantically equivalent to the original mask.
12698 (irange::intersect_bitmask): Same.
12699 (irange::get_bitmask): Add comment.
12701 2023-08-18 Richard Biener <rguenther@suse.de>
12703 PR tree-optimization/111019
12704 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
12705 also scrap base and offset in case the ref is indirect.
12707 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
12709 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
12711 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
12713 PR bootstrap/111021
12714 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
12716 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
12718 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
12720 (vectorizable_store): ... here.
12722 2023-08-18 Richard Biener <rguenther@suse.de>
12724 PR tree-optimization/111048
12725 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
12728 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
12731 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
12734 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
12736 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
12737 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
12738 and update the final nest accordingly.
12740 2023-08-18 Andrew Pinski <apinski@marvell.com>
12742 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
12743 cond_len_neg and cond_len_one_cmpl.
12745 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
12747 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
12748 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
12749 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
12750 (*local_pic_load_32d<ANYF:mode>): Ditto.
12751 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
12752 (*local_pic_store<ANYF:mode>): Ditto.
12753 (*local_pic_store<ANYLSF:mode>): Ditto.
12754 (*local_pic_store_32d<ANYF:mode>): Ditto.
12755 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
12757 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
12758 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12760 * config/riscv/predicates.md (vector_const_0_operand): New.
12761 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
12763 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
12765 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
12768 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
12770 PR tree-optimization/111009
12771 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
12773 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
12775 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
12776 slots_num initialization from here ...
12777 (lra_spill): ... to here before the 1st call of
12778 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
12779 fp->sp elimination.
12781 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
12784 * doc/invoke.texi (Option Summary): Mention
12785 -Wcompare-distinct-pointer-types under `Warning Options'.
12786 (Warning Options): Document -Wcompare-distinct-pointer-types.
12788 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
12790 * recog.cc (memory_address_addr_space_p): Mark possibly unused
12791 argument as unused.
12793 2023-08-17 Richard Biener <rguenther@suse.de>
12795 PR tree-optimization/111039
12796 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
12797 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
12799 2023-08-17 Alex Coplan <alex.coplan@arm.com>
12801 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
12803 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
12806 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
12807 `naked' function attribute.
12808 (bpf_warn_func_return): New function.
12809 (TARGET_WARN_FUNC_RETURN): Define.
12810 (bpf_expand_prologue): Add preventive comment.
12811 (bpf_expand_epilogue): Likewise.
12812 * doc/extend.texi (BPF Function Attributes): Document the `naked'
12813 function attribute.
12815 2023-08-17 Richard Biener <rguenther@suse.de>
12817 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
12818 !needs_fold_left_reduction_p to decide whether we can
12819 handle the reduction with association.
12820 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
12821 reductions perform all arithmetic in an unsigned type.
12823 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
12825 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
12827 * configure: Regenerate.
12829 2023-08-17 Pan Li <pan2.li@intel.com>
12831 * config/riscv/riscv-vector-builtins-bases.cc
12832 (widen_freducop): Add frm_opt_type template arg.
12833 (vfwredosum_frm_obj): New declaration.
12835 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12836 * config/riscv/riscv-vector-builtins-functions.def
12837 (vfwredosum_frm): New intrinsic function def.
12839 2023-08-17 Pan Li <pan2.li@intel.com>
12841 * config/riscv/riscv-vector-builtins-bases.cc
12842 (vfredosum_frm_obj): New declaration.
12844 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12845 * config/riscv/riscv-vector-builtins-functions.def
12846 (vfredosum_frm): New intrinsic function def.
12848 2023-08-17 Pan Li <pan2.li@intel.com>
12850 * config/riscv/riscv-vector-builtins-bases.cc
12851 (class freducop): Add frm_op_type template arg.
12852 (vfredusum_frm_obj): New declaration.
12854 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12855 * config/riscv/riscv-vector-builtins-functions.def
12856 (vfredusum_frm): New intrinsic function def.
12857 * config/riscv/riscv-vector-builtins-shapes.cc
12858 (struct reduc_alu_frm_def): New class for frm shape.
12859 (SHAPE): New declaration.
12860 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
12862 2023-08-17 Pan Li <pan2.li@intel.com>
12864 * config/riscv/riscv-vector-builtins-bases.cc
12865 (class vfncvt_f): Add frm_op_type template arg.
12866 (vfncvt_f_frm_obj): New declaration.
12868 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12869 * config/riscv/riscv-vector-builtins-functions.def
12870 (vfncvt_f_frm): New intrinsic function def.
12872 2023-08-17 Pan Li <pan2.li@intel.com>
12874 * config/riscv/riscv-vector-builtins-bases.cc
12875 (vfncvt_xu_frm_obj): New declaration.
12877 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12878 * config/riscv/riscv-vector-builtins-functions.def
12879 (vfncvt_xu_frm): New intrinsic function def.
12881 2023-08-17 Pan Li <pan2.li@intel.com>
12883 * config/riscv/riscv-vector-builtins-bases.cc
12884 (class vfncvt_x): Add frm_op_type template arg.
12885 (BASE): New declaration.
12886 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
12887 * config/riscv/riscv-vector-builtins-functions.def
12888 (vfncvt_x_frm): New intrinsic function def.
12889 * config/riscv/riscv-vector-builtins-shapes.cc
12890 (struct narrow_alu_frm_def): New shape function for frm.
12891 (SHAPE): New declaration.
12892 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
12894 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12896 * config/i386/avx512vldqintrin.h: Remove target attribute.
12897 * config/i386/i386-builtin.def (BDESC):
12898 Add OPTION_MASK_ISA2_AVX10_1.
12899 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
12900 (VFH_AVX512VLDQ_AVX10_1): Ditto.
12901 (VF1_AVX512VLDQ_AVX10_1): Ditto.
12902 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
12903 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
12904 (vec_pack<floatprefix>_float_<mode>): Change iterator to
12905 VI8_AVX512VLDQ_AVX10_1. Remove target check.
12906 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
12907 VF1_AVX512VLDQ_AVX10_1. Remove target check.
12908 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
12909 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
12910 (avx512vl_vextractf128<mode>): Change iterator to
12911 VI48F_256_DQVL_AVX10_1. Remove target check.
12912 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
12913 (vec_extract_hi_<mode>): Ditto.
12914 (avx512vl_vinsert<mode>): Ditto.
12915 (vec_set_lo_<mode><mask_name>): Ditto.
12916 (vec_set_hi_<mode><mask_name>): Ditto.
12917 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
12918 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
12919 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
12920 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
12921 * config/i386/subst.md (mask_avx512dq_condition): Add
12923 (mask_scalar_merge): Ditto.
12925 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12927 * config/i386/avx512vldqintrin.h: Remove target attribute.
12928 * config/i386/i386-builtin.def (BDESC):
12929 Add OPTION_MASK_ISA2_AVX10_1.
12930 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
12931 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
12932 (VI48_AVX512VLDQ_AVX10_1): Ditto.
12933 (VF2_AVX512VL): Remove.
12934 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
12935 Add TARGET_AVX10_1.
12936 (*<code><mode>3<mask_name>): Change isa attribute to
12937 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
12938 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
12939 to avx10_1_or_avx512vl.
12940 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
12941 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
12942 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
12943 Add TARGET_AVX10_1.
12944 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
12945 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
12946 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
12947 Add TARGET_AVX10_1.
12948 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
12949 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
12950 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
12951 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
12952 (float<floatunssuffix>v4div4sf2<mask_name>):
12953 Add TARGET_AVX10_1.
12954 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
12955 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
12956 (float<floatunssuffix>v2div2sf2): Ditto.
12957 (float<floatunssuffix>v2div2sf2_mask): Ditto.
12958 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
12959 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
12960 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
12961 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
12962 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
12963 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
12964 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
12965 Change when constraint is enabled.
12967 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12970 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
12971 (second_sew_less_than_first_sew_p): Fix bug.
12972 (first_sew_less_than_second_sew_p): Ditto.
12974 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
12976 * config/i386/avx512vldqintrin.h: Remove target attribute.
12977 * config/i386/i386-builtin.def (BDESC):
12978 Add OPTION_MASK_ISA2_AVX10_1.
12979 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
12980 * config/i386/i386-expand.cc
12981 (ix86_check_builtin_isa_match): Ditto.
12982 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
12983 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
12984 and avx10_1_or_avx512vl.
12985 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
12986 (VF1_128_256VLDQ_AVX10_1): Ditto.
12987 (VI8_AVX512VLDQ_AVX10_1): Ditto.
12988 (<sse>_andnot<mode>3<mask_name>):
12989 Add TARGET_AVX10_1 and change isa attr from avx512dq to
12990 avx10_1_or_avx512dq.
12991 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
12992 avx512vl to avx10_1_or_avx512vl.
12993 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
12994 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
12995 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
12997 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
12999 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
13000 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
13001 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
13002 Add TARGET_AVX10_1.
13003 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
13004 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
13005 Remove target check.
13006 (avx512dq_mul<mode>3<mask_name>): Ditto.
13007 (*avx512dq_mul<mode>3<mask_name>): Ditto.
13008 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
13009 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
13010 Remove target check.
13011 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
13012 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
13013 Remove target check.
13014 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
13015 (mask_avx512vl_condition): Ditto.
13018 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13020 * common/config/i386/i386-common.cc
13021 (ix86_check_avx10_vector_width): New function to check isa_flags
13022 to emit a warning when there is a conflict in AVX10 options for
13024 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
13025 * config/i386/driver-i386.cc (host_detect_local_cpu):
13026 Do not append -mno-avx10-max-512bit for -march=native.
13028 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13030 * common/config/i386/i386-common.cc
13031 (ix86_check_avx10): New function to check isa_flags and
13032 isa_flags_explicit to emit warning when AVX10 is enabled
13034 (ix86_check_avx512): New function to check isa_flags and
13035 isa_flags_explicit to emit warning when AVX512 is enabled
13037 (ix86_handle_option): Do not change the flags when warning
13039 * config/i386/driver-i386.cc (host_detect_local_cpu):
13040 Do not append -mno-avx10.1 for -march=native.
13042 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
13044 * common/config/i386/cpuinfo.h (get_available_features):
13045 Add avx10_set and version and detect avx10.1.
13046 (cpu_indicator_init): Handle avx10.1-512.
13047 * common/config/i386/i386-common.cc
13048 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
13049 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
13050 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
13051 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
13052 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
13053 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
13055 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13056 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
13057 FEATURE_AVX10_512BIT.
13058 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13059 AVX10_512BIT, AVX10_1 and AVX10_1_512.
13060 * config/i386/constraints.md (Yk): Add AVX10_1.
13063 * config/i386/cpuid.h (bit_AVX10): New.
13064 (bit_AVX10_256): Ditto.
13065 (bit_AVX10_512): Ditto.
13066 * config/i386/i386-c.cc (ix86_target_macros_internal):
13067 Define AVX10_512BIT and AVX10_1.
13068 * config/i386/i386-isa.def
13069 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
13070 (AVX10_1): Add DEF_PTA(AVX10_1).
13071 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
13072 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
13074 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
13075 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
13076 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
13077 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
13078 (ix86_conditional_register_usage): Ditto.
13079 (ix86_hard_regno_mode_ok): Ditto.
13080 (ix86_rtx_costs): Ditto.
13081 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
13082 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
13084 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
13085 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
13086 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
13089 2023-08-17 Sergei Trofimovich <siarheit@google.com>
13091 * flag-types.h (vrp_mode): Remove unused.
13093 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
13095 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
13098 2023-08-17 Andrew Pinski <apinski@marvell.com>
13100 * internal-fn.def (COND_NOT): New internal function.
13101 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
13103 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
13104 into conditional not.
13105 * optabs.def (cond_one_cmpl): New optab.
13106 (cond_len_one_cmpl): Likewise.
13108 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
13110 PR rtl-optimization/110254
13111 * ira-color.cc (improve_allocation): Update array
13112 allocated_hard_reg_p.
13114 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
13116 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
13117 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
13118 (lra_update_fp2sp_elimination): Ditto.
13119 (update_reg_eliminate): Adjust spill_pseudos call.
13120 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
13121 in lra_update_fp2sp_elimination.
13123 2023-08-16 Richard Ball <richard.ball@arm.com>
13125 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
13126 * config/aarch64/aarch64-tune.md: Regenerate.
13127 * doc/invoke.texi: Document Cortex-A720 CPU.
13129 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
13131 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
13132 Implement expander.
13133 (<u>avg<v_double_trunc>3_ceil): Ditto.
13134 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
13137 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
13139 * internal-fn.cc (vec_extract_direct): Change type argument
13141 (expand_vec_extract_optab_fn): Call convert_optab_fn.
13142 (direct_vec_extract_optab_supported_p): Use
13143 convert_optab_supported_p.
13145 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13146 Richard Sandiford <richard.sandiford@arm.com>
13148 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
13149 (valid_mask_for_fold_vec_perm_cst_p): New function.
13150 (fold_vec_perm_cst): Likewise.
13151 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
13152 (test_fold_vec_perm_cst): New namespace.
13153 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
13154 (test_fold_vec_perm_cst::validate_res): Likewise.
13155 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
13156 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
13157 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
13158 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
13159 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
13160 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
13161 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
13162 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
13163 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
13164 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
13165 (test_fold_vec_perm_cst::test): Likewise.
13166 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
13168 2023-08-16 Pan Li <pan2.li@intel.com>
13170 * config/riscv/riscv-vector-builtins-bases.cc
13171 (BASE): New declaration.
13172 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13173 * config/riscv/riscv-vector-builtins-functions.def
13174 (vfwcvt_xu_frm): New intrinsic function def.
13176 2023-08-16 Pan Li <pan2.li@intel.com>
13178 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
13180 2023-08-16 Pan Li <pan2.li@intel.com>
13182 * config/riscv/riscv-vector-builtins-bases.cc
13183 (BASE): New declaration.
13184 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13185 * config/riscv/riscv-vector-builtins-functions.def
13186 (vfwcvt_x_frm): New intrinsic function def.
13188 2023-08-16 Pan Li <pan2.li@intel.com>
13190 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
13191 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13192 * config/riscv/riscv-vector-builtins-functions.def
13193 (vfcvt_f_frm): New intrinsic function def.
13195 2023-08-16 Pan Li <pan2.li@intel.com>
13197 * config/riscv/riscv-vector-builtins-bases.cc
13198 (BASE): New declaration.
13199 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13200 * config/riscv/riscv-vector-builtins-functions.def
13201 (vfcvt_xu_frm): New intrinsic function def..
13203 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
13206 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
13207 extract when the element is 7 on BE while 8 on LE for byte or 3 on
13208 BE while 4 on LE for halfword.
13210 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
13213 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
13214 for V8HI and V16QI.
13215 (vsx_extract_v4si): New expand for V4SI extraction.
13216 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
13217 word 1 from BE order.
13218 (*mfvsrwz): New insn pattern for mfvsrwz.
13219 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
13220 word 1 from BE order.
13221 (*vsx_extract_si): Remove.
13222 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
13225 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13227 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
13229 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
13230 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
13231 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
13232 (expand_lanes_load_store): New function.
13233 * config/riscv/vector-iterators.md: New iterator.
13235 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13237 * internal-fn.cc (internal_load_fn_p): Apply
13238 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
13239 (internal_store_fn_p): Ditto.
13240 (internal_fn_len_index): Ditto.
13241 (internal_fn_mask_index): Ditto.
13242 (internal_fn_stored_value_index): Ditto.
13243 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
13244 (vect_load_lanes_supported): Ditto.
13245 * tree-vect-loop.cc: Ditto.
13246 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
13247 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
13248 (get_group_load_store_type): Ditto.
13249 (vectorizable_store): Ditto.
13250 (vectorizable_load): Ditto.
13251 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
13252 (vect_load_lanes_supported): Ditto.
13254 2023-08-16 Pan Li <pan2.li@intel.com>
13256 * config/riscv/riscv-vector-builtins-bases.cc
13257 (enum frm_op_type): New type for frm.
13258 (BASE): New declaration.
13259 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13260 * config/riscv/riscv-vector-builtins-functions.def
13261 (vfcvt_x_frm): New intrinsic function def.
13263 2023-08-16 liuhongt <hongtao.liu@intel.com>
13265 * config/i386/i386-builtins.cc
13266 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
13267 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
13268 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
13269 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
13270 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
13271 for use_scatter_8parts
13272 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
13273 (TARGET_USE_GATHER_8PARTS): .. this.
13274 (TARGET_USE_SCATTER): Rename to ..
13275 (TARGET_USE_SCATTER_8PARTS): .. this.
13276 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
13277 (X86_TUNE_USE_GATHER_8PARTS): .. this.
13278 (X86_TUNE_USE_SCATTER): Rename to
13279 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
13280 * config/i386/i386.opt: Add new options mgather, mscatter.
13282 2023-08-16 liuhongt <hongtao.liu@intel.com>
13284 * config/i386/i386-options.cc (m_GDS): New macro.
13285 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
13287 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
13288 (X86_TUNE_USE_GATHER): Ditto.
13290 2023-08-16 liuhongt <hongtao.liu@intel.com>
13292 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
13293 vmovsd when moving DFmode between SSE_REGS.
13294 (movhi_internal): Generate vmovdqa instead of vmovsh when
13295 moving HImode between SSE_REGS.
13296 (mov<mode>_internal): Use vmovaps instead of vmovsh when
13297 moving HF/BFmode between SSE_REGS.
13299 2023-08-15 David Faust <david.faust@oracle.com>
13301 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
13303 2023-08-15 David Faust <david.faust@oracle.com>
13306 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
13307 for any mode 32-bits or smaller, not just SImode.
13309 2023-08-15 Martin Jambor <mjambor@suse.cz>
13313 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
13314 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
13315 (ipcp_transform_function): Do not deallocate transformation info.
13316 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
13318 (vn_reference_lookup_2): When hitting default-def vuse, query
13319 IPA-CP transformation info for any known constants.
13321 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
13322 Thomas Schwinge <thomas@codesourcery.com>
13324 * gimplify.cc (oacc_region_type_name): New function.
13325 (oacc_default_clause): If no 'default' clause appears on this
13326 compute construct, see if one appears on a lexically containing
13328 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
13329 ctx->oacc_default_clause_ctx to current context.
13331 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13334 * config/riscv/predicates.md: Fix predicate.
13336 2023-08-15 Richard Biener <rguenther@suse.de>
13338 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
13339 slp_inst_kind_ctor handling.
13340 (vect_analyze_slp): Simplify.
13341 (vect_build_slp_instance): Dump when we analyze a CTOR.
13342 (vect_slp_check_for_constructors): Rename to ...
13343 (vect_slp_check_for_roots): ... this. Register a
13344 slp_root for CONSTRUCTORs instead of shoving them to
13345 the set of grouped stores.
13346 (vect_slp_analyze_bb_1): Adjust.
13348 2023-08-15 Richard Biener <rguenther@suse.de>
13350 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
13352 (_slp_instance::remain_defs): ... this.
13353 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
13354 (SLP_INSTANCE_REMAIN_DEFS): ... this.
13355 (slp_root::remain): New.
13356 (slp_root::slp_root): Adjust.
13357 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
13358 (vect_build_slp_instance): Get extra remain parameter,
13359 adjust former handling of a cut off stmt.
13360 (vect_analyze_slp_instance): Adjust.
13361 (vect_analyze_slp): Likewise.
13362 (_bb_vec_info::~_bb_vec_info): Likewise.
13363 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
13364 (vect_slp_check_for_constructors): Handle non-internal
13365 defs as remain defs of a reduction.
13366 (vectorize_slp_instance_root_stmt): Adjust.
13368 2023-08-15 Richard Biener <rguenther@suse.de>
13370 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
13371 (canonicalize_loop_induction_variables): Use find_loop_location.
13373 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
13375 PR bootstrap/111021
13376 * config/cris/cris-protos.h: Revert recent change.
13377 * config/cris/cris.cc (cris_legitimate_address_p): Remove
13378 code_helper unused parameter.
13379 (cris_legitimate_address_p_hook): New wrapper function.
13380 (TARGET_LEGITIMATE_ADDRESS_P): Change to
13381 cris_legitimate_address_p_hook.
13383 2023-08-15 Richard Biener <rguenther@suse.de>
13385 PR tree-optimization/110963
13386 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
13387 a PHI node when the expression is available on all edges
13388 and we insert at most one copy from a constant.
13390 2023-08-15 Richard Biener <rguenther@suse.de>
13392 PR tree-optimization/110991
13393 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
13394 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
13395 that will end up constant.
13397 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
13399 PR bootstrap/111021
13400 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
13402 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
13404 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
13405 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
13406 and update the final nest accordingly.
13408 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
13410 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
13413 2023-08-15 Pan Li <pan2.li@intel.com>
13415 * mode-switching.cc (create_pre_exit): Add SET insn check.
13417 2023-08-15 Pan Li <pan2.li@intel.com>
13419 * config/riscv/riscv-vector-builtins-bases.cc
13420 (class vfrec7_frm): New class for frm.
13421 (vfrec7_frm_obj): New declaration.
13423 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13424 * config/riscv/riscv-vector-builtins-functions.def
13425 (vfrec7_frm): New intrinsic function definition.
13426 * config/riscv/vector-iterators.md
13427 (VFMISC): Remove VFREC7.
13429 (float_insn_type): Ditto.
13430 (VFMISC_FRM): New int iterator.
13431 (misc_frm_op): New op for frm.
13432 (float_frm_insn_type): New type for frm.
13433 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
13434 New pattern for misc frm.
13436 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
13438 * lra-constraints.cc (curr_insn_transform): Process output stack
13439 pointer reloads before emitting reload insns.
13441 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
13444 * doc/invoke.texi: Add documentation of
13445 fanalyzer-show-events-in-system-headers
13447 2023-08-14 Jan Hubicka <jh@suse.cz>
13449 PR gcov-profile/110988
13450 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
13452 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
13454 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
13455 Enable compressed builtins when ZC* extensions enabled.
13456 * config/riscv/riscv-shorten-memrefs.cc:
13457 Enable shorten_memrefs pass when ZC* extensions enabled.
13458 * config/riscv/riscv.cc (riscv_compressed_reg_p):
13459 Enable compressible registers when ZC* extensions enabled.
13460 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
13461 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
13462 (riscv_first_stack_step): Allow compression of the register saves
13463 without adding extra instructions.
13464 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
13465 to 16 bits when ZC* extensions enabled.
13467 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
13469 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
13470 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
13475 (MASK_ZCMP): Ditto.
13476 (MASK_ZCMT): Ditto.
13477 (TARGET_ZCA): New target.
13478 (TARGET_ZCB): Ditto.
13479 (TARGET_ZCE): Ditto.
13480 (TARGET_ZCF): Ditto.
13481 (TARGET_ZCD): Ditto.
13482 (TARGET_ZCMP): Ditto.
13483 (TARGET_ZCMT): Ditto.
13484 * config/riscv/riscv.opt: New target variable.
13486 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13489 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
13491 * genrecog.cc (print_nonbool_test): Fix type error of
13492 switch (SUBREG_BYTE (op))'.
13494 2023-08-14 Richard Biener <rguenther@suse.de>
13496 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
13498 2023-08-14 Pan Li <pan2.li@intel.com>
13500 * config/riscv/riscv-vector-builtins-bases.cc
13501 (class unop_frm): New class for frm.
13502 (vfsqrt_frm_obj): New declaration.
13504 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13505 * config/riscv/riscv-vector-builtins-functions.def
13506 (vfsqrt_frm): New intrinsic function definition.
13508 2023-08-14 Pan Li <pan2.li@intel.com>
13510 * config/riscv/riscv-vector-builtins-bases.cc
13511 (class vfwnmsac_frm): New class for frm.
13512 (vfwnmsac_frm_obj): New declaration.
13514 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13515 * config/riscv/riscv-vector-builtins-functions.def
13516 (vfwnmsac_frm): New intrinsic function definition.
13518 2023-08-14 Pan Li <pan2.li@intel.com>
13520 * config/riscv/riscv-vector-builtins-bases.cc
13521 (class vfwmsac_frm): New class for frm.
13522 (vfwmsac_frm_obj): New declaration.
13524 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13525 * config/riscv/riscv-vector-builtins-functions.def
13526 (vfwmsac_frm): New intrinsic function definition.
13528 2023-08-14 Pan Li <pan2.li@intel.com>
13530 * config/riscv/riscv-vector-builtins-bases.cc
13531 (class vfwnmacc_frm): New class for frm.
13532 (vfwnmacc_frm_obj): New declaration.
13534 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13535 * config/riscv/riscv-vector-builtins-functions.def
13536 (vfwnmacc_frm): New intrinsic function definition.
13538 2023-08-14 Cui, Lili <lili.cui@intel.com>
13540 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
13543 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
13545 * config/mmix/predicates.md (mmix_address_operand): Use
13546 lra_in_progress, not reload_in_progress.
13548 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
13550 * config/mmix/mmix.cc: Re-enable LRA.
13552 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
13554 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
13555 when lra_in_progress.
13557 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
13559 * config/mmix/mmix.cc: Disable LRA for MMIX.
13561 2023-08-14 Pan Li <pan2.li@intel.com>
13563 * config/riscv/riscv-vector-builtins-bases.cc
13564 (class vfwmacc_frm): New class for vfwmacc frm.
13565 (vfwmacc_frm_obj): New declaration.
13567 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13568 * config/riscv/riscv-vector-builtins-functions.def
13569 (vfwmacc_frm): Function definition for vfwmacc.
13570 * config/riscv/riscv-vector-builtins.cc
13571 (function_expander::use_widen_ternop_insn): Add frm support.
13573 2023-08-14 Pan Li <pan2.li@intel.com>
13575 * config/riscv/riscv-vector-builtins-bases.cc
13576 (class vfnmsub_frm): New class for vfnmsub frm.
13577 (vfnmsub_frm): New declaration.
13579 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13580 * config/riscv/riscv-vector-builtins-functions.def
13581 (vfnmsub_frm): New function declaration.
13583 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
13585 * lra-constraints.cc (curr_insn_transform): Set done_p up and
13586 check it on true after processing output stack pointer reload.
13588 2023-08-12 Jakub Jelinek <jakub@redhat.com>
13590 * Makefile.in (USER_H): Add stdckdint.h.
13591 * ginclude/stdckdint.h: New file.
13593 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13596 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
13598 2023-08-12 Patrick Palka <ppalka@redhat.com>
13600 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
13601 Delimit output with braces.
13603 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13606 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
13608 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13610 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
13611 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
13612 * config/riscv/vector.md: Ditto.
13614 2023-08-11 David Malcolm <dmalcolm@redhat.com>
13617 * doc/analyzer.texi (__analyzer_get_strlen): New.
13618 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
13620 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
13622 * config/rx/rx.md (subdi3): Fix test for borrow.
13624 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13626 PR middle-end/110989
13627 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
13628 (vectorizable_load): Ditto.
13630 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
13632 * config/bpf/bpf.md (allocate_stack): Define.
13633 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
13634 stack pointer register.
13635 (FIXED_REGISTERS): Adjust accordingly.
13636 (CALL_USED_REGISTERS): Likewise.
13637 (REG_CLASS_CONTENTS): Likewise.
13638 (REGISTER_NAMES): Likewise.
13639 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
13640 space for callee-saved registers.
13641 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
13642 (bpf_expand_epilogue): Do not restore callee-saved registers in
13645 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
13647 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
13648 about too many arguments if function is always inlined.
13650 2023-08-11 Patrick Palka <ppalka@redhat.com>
13652 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
13653 Don't call component_ref_field_offset if the RHS isn't a decl.
13655 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
13657 PR bootstrap/110646
13658 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
13660 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
13662 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
13663 (process_alt_operands): Set the flag.
13664 (curr_insn_transform): Modify stack pointer offsets if output
13665 stack pointer reload is generated.
13667 2023-08-11 Joseph Myers <joseph@codesourcery.com>
13669 * configure: Regenerate.
13671 2023-08-11 Richard Biener <rguenther@suse.de>
13673 PR tree-optimization/110979
13674 * tree-vect-loop.cc (vectorizable_reduction): For
13675 FOLD_LEFT_REDUCTION without target support make sure
13676 we don't need to honor signed zeros and sign dependent rounding.
13678 2023-08-11 Richard Biener <rguenther@suse.de>
13680 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
13681 subgraph entries. Dump the used vector size based on the
13682 SLP subgraph entry root vector type.
13684 2023-08-11 Pan Li <pan2.li@intel.com>
13686 * config/riscv/riscv-vector-builtins-bases.cc
13687 (class vfmsub_frm): New class for vfmsub frm.
13688 (vfmsub_frm): New declaration.
13690 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13691 * config/riscv/riscv-vector-builtins-functions.def
13692 (vfmsub_frm): New function declaration.
13694 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13696 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
13697 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
13698 (expand_partial_store_optab_fn): Ditto.
13699 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
13700 (MASK_LEN_STORE_LANES): Ditto.
13701 * optabs.def (OPTAB_CD): Ditto.
13703 2023-08-11 Pan Li <pan2.li@intel.com>
13705 * config/riscv/riscv-vector-builtins-bases.cc
13706 (class vfnmadd_frm): New class for vfnmadd frm.
13707 (vfnmadd_frm): New declaration.
13709 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13710 * config/riscv/riscv-vector-builtins-functions.def
13711 (vfnmadd_frm): New function declaration.
13713 2023-08-11 Drew Ross <drross@redhat.com>
13714 Jakub Jelinek <jakub@redhat.com>
13716 PR tree-optimization/109938
13717 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
13719 2023-08-11 Pan Li <pan2.li@intel.com>
13721 * config/riscv/riscv-vector-builtins-bases.cc
13722 (class vfmadd_frm): New class for vfmadd frm.
13723 (vfmadd_frm_obj): New declaration.
13725 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13726 * config/riscv/riscv-vector-builtins-functions.def
13727 (vfmadd_frm): New function definition.
13729 2023-08-11 Pan Li <pan2.li@intel.com>
13731 * config/riscv/riscv-vector-builtins-bases.cc
13732 (class vfnmsac_frm): New class for vfnmsac frm.
13733 (vfnmsac_frm_obj): New declaration.
13735 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13736 * config/riscv/riscv-vector-builtins-functions.def
13737 (vfnmsac_frm): New function definition.
13739 2023-08-11 Jakub Jelinek <jakub@redhat.com>
13741 * doc/extend.texi (Typeof): Document typeof_unqual
13742 and __typeof_unqual__.
13744 2023-08-11 Andrew Pinski <apinski@marvell.com>
13746 PR tree-optimization/110954
13747 * generic-match-head.cc (bitwise_inverted_equal_p): Add
13748 wascmp argument and set it accordingly.
13749 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
13750 wascmp argument to the macro.
13751 (gimple_bitwise_inverted_equal_p): Add
13752 wascmp argument and set it accordingly.
13753 * match.pd (`a & ~a`, `a ^| ~a`): Update call
13754 to bitwise_inverted_equal_p and handle wascmp case.
13755 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
13756 call to bitwise_inverted_equal_p and check to see
13757 if was !wascmp or if precision was 1.
13759 2023-08-11 Martin Uecker <uecker@tugraz.at>
13762 * doc/invoke.texi: Update.
13764 2023-08-11 Pan Li <pan2.li@intel.com>
13766 * config/riscv/riscv-vector-builtins-bases.cc
13767 (class vfmsac_frm): New class for vfmsac frm.
13768 (vfmsac_frm_obj): New declaration.
13770 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13771 * config/riscv/riscv-vector-builtins-functions.def
13772 (vfmsac_frm): New function definition
13774 2023-08-10 Jan Hubicka <jh@suse.cz>
13776 PR middle-end/110923
13777 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
13779 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
13781 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
13782 dependent on 'a' extension.
13783 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
13784 (TARGET_ZTSO): New target.
13785 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
13787 (riscv_memmodel_needs_amo_release): Add Ztso case.
13788 (riscv_print_operand): Add Ztso case for LR/SC annotations.
13789 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
13790 * config/riscv/riscv.opt: Add Ztso target variable.
13791 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
13792 Ztso specific insn.
13793 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
13794 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
13795 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
13796 specific load/store/fence mappings.
13797 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
13798 specific load/store/fence mappings.
13800 2023-08-10 Jan Hubicka <jh@suse.cz>
13802 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
13805 2023-08-10 Jan Hubicka <jh@suse.cz>
13807 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
13809 2023-08-10 Jan Hubicka <jh@suse.cz>
13811 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
13812 handling of undefined values.
13814 2023-08-10 Jakub Jelinek <jakub@redhat.com>
13817 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
13818 return virtual phis and return NULL if there is a virtual phi
13819 where the arguments from E0 and E1 edges aren't equal.
13821 2023-08-10 Richard Biener <rguenther@suse.de>
13823 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
13824 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
13826 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13829 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
13831 2023-08-10 Pan Li <pan2.li@intel.com>
13833 * config/riscv/riscv-vector-builtins-bases.cc
13834 (class vfnmacc_frm): New class for vfnmacc.
13835 (vfnmacc_frm_obj): New declaration.
13837 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13838 * config/riscv/riscv-vector-builtins-functions.def
13839 (vfnmacc_frm): New function definition.
13841 2023-08-10 Pan Li <pan2.li@intel.com>
13843 * config/riscv/riscv-vector-builtins-bases.cc
13844 (class vfmacc_frm): New class for vfmacc frm.
13845 (vfmacc_frm_obj): New declaration.
13847 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
13848 * config/riscv/riscv-vector-builtins-functions.def
13849 (vfmacc_frm): New function definition.
13851 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13854 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
13856 2023-08-10 Richard Biener <rguenther@suse.de>
13858 * tree-vectorizer.h (vectorizable_live_operation): Remove
13859 gimple_stmt_iterator * argument.
13860 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
13861 Adjust plumbing around vect_get_loop_mask.
13862 (vect_analyze_loop_operations): Adjust.
13863 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
13864 (vect_bb_slp_mark_live_stmts): Likewise.
13865 (vect_schedule_slp_node): Likewise.
13866 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
13867 Remove gimple_stmt_iterator * argument.
13868 (vect_transform_stmt): Adjust.
13870 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13872 * config/riscv/vector-iterators.md: Add missing modes.
13874 2023-08-10 Jakub Jelinek <jakub@redhat.com>
13877 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
13878 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
13880 2023-08-10 Jakub Jelinek <jakub@redhat.com>
13883 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
13884 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
13887 2023-08-10 liuhongt <hongtao.liu@intel.com>
13890 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
13891 sanitize upper part of V4HFmode register with
13892 -fno-trapping-math.
13893 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
13894 (<divv4hf3): Ditto.
13895 (<insn>v2hf3): Ditto.
13897 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
13898 register with -fno-trapping-math.
13900 2023-08-10 Pan Li <pan2.li@intel.com>
13901 Kito Cheng <kito.cheng@sifive.com>
13903 * config/riscv/riscv-protos.h
13904 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
13905 (get_frm_mode): New declaration.
13906 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
13907 * config/riscv/riscv-vector-builtins.cc
13908 (function_expander::use_ternop_insn): Take care of frm reg.
13909 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
13910 (riscv_emit_frm_mode_set): Ditto.
13911 (riscv_emit_mode_set): Ditto.
13912 (riscv_frm_adjust_mode_after_call): Ditto.
13913 (riscv_frm_mode_needed): Ditto.
13914 (riscv_frm_mode_after): Ditto.
13915 (riscv_mode_entry): Ditto.
13916 (riscv_mode_exit): Ditto.
13917 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
13918 * config/riscv/vector.md
13919 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
13920 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
13922 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13924 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
13925 incorrect anticipate info.
13927 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
13929 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
13930 Remove 'Zve32d' from the version list.
13932 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
13934 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
13935 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
13936 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
13937 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
13939 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
13941 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
13942 (mem_shadd_or_shadd_rtx_p): New function.
13944 2023-08-09 Andrew Pinski <apinski@marvell.com>
13946 PR tree-optimization/110937
13947 PR tree-optimization/100798
13948 * match.pd (`a ? ~b : b`): Handle this
13951 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
13953 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
13955 2023-08-09 Richard Ball <richard.ball@arm.com>
13957 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
13958 * config/aarch64/aarch64-tune.md: Regenerate.
13959 * doc/invoke.texi: Document Cortex-A520 CPU.
13961 2023-08-09 Carl Love <cel@us.ibm.com>
13963 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
13964 Move definitions to Altivec stanza.
13965 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
13968 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13971 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
13972 stepped vector support.
13974 2023-08-09 liuhongt <hongtao.liu@intel.com>
13976 * common/config/i386/cpuinfo.h (get_available_features):
13977 Rename local variable subleaf_level to max_subleaf_level.
13979 2023-08-09 Richard Biener <rguenther@suse.de>
13981 PR rtl-optimization/110587
13982 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
13984 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
13986 PR tree-optimization/110248
13987 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
13988 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
13989 legitimate when outer code is PLUS.
13991 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
13993 PR tree-optimization/110248
13994 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
13995 type code_helper and pass it to targetm.addr_space.legitimate_address_p
13996 instead of ERROR_MARK.
13997 (offsettable_address_addr_space_p): Update one function pointer with
13998 one more argument of type code_helper as its assignees
13999 memory_address_addr_space_p and strict_memory_address_addr_space_p
14000 have been adjusted, and adjust some call sites with ERROR_MARK.
14001 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
14002 (memory_address_addr_space_p): Adjust with one more unnamed argument
14003 of type code_helper with default ERROR_MARK.
14004 (strict_memory_address_addr_space_p): Likewise.
14005 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
14006 argument of type code_helper.
14007 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
14008 type code_helper and pass it to memory_address_addr_space_p.
14009 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
14010 one more unnamed argument of type code_helper with default value
14012 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
14013 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
14014 pass it to all valid_mem_ref_p calls.
14016 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
14018 PR tree-optimization/110248
14019 * coretypes.h (class code_helper): Add forward declaration.
14020 * doc/tm.texi: Regenerate.
14021 * lra-constraints.cc (valid_address_p): Call target hook
14022 targetm.addr_space.legitimate_address_p with an extra parameter
14023 ERROR_MARK as its prototype changes.
14024 * recog.cc (memory_address_addr_space_p): Likewise.
14025 * reload.cc (strict_memory_address_addr_space_p): Likewise.
14026 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
14027 Extend with one more argument of type code_helper, update the
14028 documentation accordingly.
14029 * targhooks.cc (default_legitimate_address_p): Adjust for the
14030 new code_helper argument.
14031 (default_addr_space_legitimate_address_p): Likewise.
14032 * targhooks.h (default_legitimate_address_p): Likewise.
14033 (default_addr_space_legitimate_address_p): Likewise.
14034 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
14035 with extra unnamed code_helper argument with default ERROR_MARK.
14036 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
14037 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
14038 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
14039 (tree.h): New include for tree_code ERROR_MARK.
14040 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
14041 unnamed code_helper argument with default ERROR_MARK.
14042 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
14043 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
14044 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
14045 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
14046 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
14047 (tree.h): New include for tree_code ERROR_MARK.
14048 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
14049 unnamed code_helper argument with default ERROR_MARK.
14050 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
14051 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
14053 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
14054 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
14055 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
14056 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
14057 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
14058 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
14059 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
14060 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
14061 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
14063 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
14064 (m32c_addr_space_legitimate_address_p): Likewise.
14065 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
14066 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
14067 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
14068 * config/microblaze/microblaze-protos.h (tree.h): New include for
14069 tree_code ERROR_MARK.
14070 (microblaze_legitimate_address_p): Adjust with extra unnamed
14071 code_helper argument with default ERROR_MARK.
14072 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
14074 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
14075 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
14076 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
14077 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
14078 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
14079 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
14080 argument with default ERROR_MARK and adjust the call to function
14081 msp430_legitimate_address_p.
14082 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
14083 unnamed code_helper argument with default ERROR_MARK.
14084 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
14085 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
14086 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
14087 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
14088 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
14089 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
14090 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
14091 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
14092 (tree.h): New include for tree_code ERROR_MARK.
14093 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
14094 extra unnamed code_helper argument with default ERROR_MARK.
14095 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
14096 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
14097 argument and adjust the call to function rs6000_legitimate_address_p.
14098 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
14099 unnamed code_helper argument with default ERROR_MARK.
14100 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
14101 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
14102 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
14103 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
14104 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
14105 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
14106 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
14107 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
14109 (tree.h): New include for tree_code ERROR_MARK.
14110 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
14111 Adjust with extra unnamed code_helper argument with default
14114 2023-08-09 liuhongt <hongtao.liu@intel.com>
14116 * common/config/i386/cpuinfo.h (get_available_features): Check
14117 EAX for valid subleaf before use CPUID.
14119 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
14121 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
14122 for the temporary when canonicalizing the condition.
14124 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
14126 * config/bpf/core-builtins.cc: Cleaned include headers.
14127 (struct cr_builtins): Added GTY.
14128 (cr_builtins_ref): Created.
14129 (builtins_data) Changed to GC root.
14130 (allocate_builtin_data): Changed.
14131 Included gt-core-builtins.h.
14132 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
14133 (bpf_core_extra_ref): Created.
14134 (bpf_comment_info): Changed to GC root.
14135 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
14137 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
14140 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
14141 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
14142 upper part of V2SFmode register with -fno-trapping-math.
14143 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
14145 (<smaxmin:code>v2sf3): Ditto.
14146 (sqrtv2sf2): Ditto.
14147 (*mmx_haddv2sf3_low): Ditto.
14148 (*mmx_hsubv2sf3_low): Ditto.
14149 (vec_addsubv2sf3): Ditto.
14150 (vec_cmpv2sfv2si): Ditto.
14151 (vcond<V2FI:mode>v2sf): Ditto.
14154 (fnmav2sf4): Ditto.
14155 (fnmsv2sf4): Ditto.
14156 (fix_truncv2sfv2si2): Ditto.
14157 (fixuns_truncv2sfv2si2): Ditto.
14158 (floatv2siv2sf2): Ditto.
14159 (floatunsv2siv2sf2): Ditto.
14160 (nearbyintv2sf2): Ditto.
14161 (rintv2sf2): Ditto.
14162 (lrintv2sfv2si2): Ditto.
14163 (ceilv2sf2): Ditto.
14164 (lceilv2sfv2si2): Ditto.
14165 (floorv2sf2): Ditto.
14166 (lfloorv2sfv2si2): Ditto.
14167 (btruncv2sf2): Ditto.
14168 (roundv2sf2): Ditto.
14169 (lroundv2sfv2si2): Ditto.
14170 * doc/invoke.texi (x86 Options): Document
14171 -mpartial-vector-fp-math option.
14173 2023-08-08 Andrew Pinski <apinski@marvell.com>
14175 PR tree-optimization/103281
14176 PR tree-optimization/28794
14177 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
14179 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
14180 (simplify_using_ranges::simplify_casted_cond): Rename to ...
14181 (simplify_using_ranges::simplify_casted_compare): This
14182 and change arguments to take op0 and op1.
14183 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
14184 (simplify_using_ranges::simplify): For tcc_comparison assignments call
14185 simplify_compare_assign_using_ranges_1.
14186 * vr-values.h (simplify_using_ranges): Add
14187 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
14188 Rename simplify_casted_cond and simplify_casted_compare and
14189 update argument types.
14191 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
14193 * genmatch.cc: Log line numbers indirectly.
14195 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
14197 * genmatch.cc: Make sinfo map ordered.
14198 * Makefile.in: Require the ordered map header for genmatch.o.
14200 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
14202 * ordered-hash-map.h: Add get_or_insert.
14203 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
14205 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14207 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
14208 (cond_len_<optab><mode>): Ditto.
14209 (cond_fma<mode>): Ditto.
14210 (cond_len_fma<mode>): Ditto.
14211 (cond_fnma<mode>): Ditto.
14212 (cond_len_fnma<mode>): Ditto.
14213 (cond_fms<mode>): Ditto.
14214 (cond_len_fms<mode>): Ditto.
14215 (cond_fnms<mode>): Ditto.
14216 (cond_len_fnms<mode>): Ditto.
14217 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
14219 (enum insn_type): Add new enum type.
14220 (prepare_ternary_operands): New function.
14221 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
14222 (emit_nonvlmax_tumu_insn): Ditto.
14223 (emit_nonvlmax_fp_tumu_insn): Ditto.
14224 (expand_cond_len_binop): Add condtional operations.
14225 (expand_cond_len_ternop): Ditto.
14226 (prepare_ternary_operands): New function.
14227 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
14228 riscv_get_v_regno_alignment as global scope.
14229 * config/riscv/vector.md: Fix ternary bugs.
14231 2023-08-08 Richard Biener <rguenther@suse.de>
14233 PR tree-optimization/49955
14234 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
14235 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
14236 * tree-vect-slp.cc (vect_free_slp_instance): Release
14237 SLP_INSTANCE_REMAIN_STMTS.
14238 (vect_build_slp_instance): Make the number of lanes of
14239 a BB reduction even.
14240 (vectorize_slp_instance_root_stmt): Handle unvectorized
14241 defs of a BB reduction.
14243 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14245 * internal-fn.cc (get_len_internal_fn): New function.
14246 (DEF_INTERNAL_COND_FN): Ditto.
14247 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
14248 * internal-fn.h (get_len_internal_fn): Ditto.
14249 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
14251 2023-08-08 Richard Biener <rguenther@suse.de>
14253 PR tree-optimization/110924
14254 * tree-ssa-live.h (virtual_operand_live): Update comment.
14255 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
14256 optimization, look at each predecessor.
14257 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
14259 2023-08-08 yulong <shiyulong@iscas.ac.cn>
14261 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
14263 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14265 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
14266 * config/riscv/vector.md: Ditto.
14268 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14270 * config/riscv/autovec.md: Add VLS shift.
14272 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14274 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
14275 * config/riscv/vector-iterators.md: Ditto.
14276 * config/riscv/vector.md: Ditto.
14278 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
14280 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
14282 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
14284 * configure: Regenerate.
14286 2023-08-07 John Ericson <git@JohnEricson.me>
14288 * configure: Regenerate.
14290 2023-08-07 Alan Modra <amodra@gmail.com>
14292 * configure: Regenerate.
14294 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
14296 * configure: Regenerate.
14298 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
14300 * configure: Regenerate.
14302 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
14304 * configure: Regenerate.
14306 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
14308 * configure: Regenerate.
14310 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
14312 * configure: Regenerate.
14314 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
14316 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
14317 VOIDmode operands to conditional before canonicalization.
14319 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
14321 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
14322 (find_oldest_value_reg): Inline stack_pointer_rtx check.
14323 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
14325 2023-08-07 Martin Jambor <mjambor@suse.cz>
14328 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
14329 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
14330 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
14331 (ptr_parm_has_nonarg_uses): Likewise.
14332 * ipa-param-manipulation.cc
14333 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
14334 (ipa_param_body_adjustments::mark_dead_statements): Move initial
14335 checks to get_ddef_if_exists_and_is_used.
14336 (ipa_param_body_adjustments::mark_clobbers_dead): New.
14337 (ipa_param_body_adjustments::common_initialization): Call
14338 mark_clobbers_dead when splitting.
14340 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
14342 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
14343 as an argument and pass it to riscv_emit_int_order_test.
14344 (riscv_expand_conditional_move): Handle cases where the condition
14345 is not EQ/NE or the second argument to the conditional is not
14347 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
14348 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
14350 2023-08-07 Andrew Pinski <apinski@marvell.com>
14352 PR tree-optimization/109959
14353 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
14356 2023-08-07 Richard Biener <rguenther@suse.de>
14358 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
14359 calculate post-dominators. Calculate RPO on the inverted
14360 graph and process blocks in that order.
14362 2023-08-07 liuhongt <hongtao.liu@intel.com>
14365 * config/i386/i386-protos.h
14366 (vpternlog_redundant_operand_mask): Adjust parameter type.
14367 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
14368 INTVAL instead of XINT, also adjust parameter type from rtx*
14369 to rtx since the function only needs operands[4] in vpternlog
14371 (substitute_vpternlog_operands): Pass operands[4] instead of
14372 operands to vpternlog_redundant_operand_mask.
14373 * config/i386/sse.md: Ditto.
14375 2023-08-07 Richard Biener <rguenther@suse.de>
14377 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
14378 around dumping code.
14380 2023-08-07 liuhongt <hongtao.liu@intel.com>
14383 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
14384 to define_expand and break into ..
14385 (<insn>v4hf3): .. this.
14386 (divv4hf3): .. this.
14387 (<insn>v2hf3): .. this.
14388 (divv2hf3): .. this.
14389 (movd_v2hf_to_sse): New define_expand.
14390 (movq_<mode>_to_sse): Extend to V4HFmode.
14391 (mmxdoublevecmode): Ditto.
14392 (V2FI_V4HF): New mode iterator.
14393 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
14394 by using mode iterator V4SF_V8HF, renamed to ..
14395 (*vec_concat<mode>): .. this.
14396 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
14397 iterator V4SF_V8HF, renamed to ..
14398 (*vec_concat<mode>_0): .. this.
14399 (*vec_concatv8hf_movss): New define_insn.
14400 (V4SF_V8HF): New mode iterator.
14402 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14404 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
14406 2023-08-07 Jan Beulich <jbeulich@suse.com>
14408 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
14409 (*mmx_pinsrb): Likewise.
14410 (*mmx_pextrb): Likewise.
14411 (*mmx_pextrb_zext): Likewise.
14412 (mmx_pshufbv8qi3): Likewise.
14413 (mmx_pshufbv4qi3): Likewise.
14414 (mmx_pswapdv2si2): Likewise.
14415 (*pinsrb): Likewise.
14416 (*pextrb): Likewise.
14417 (*pextrb_zext): Likewise.
14418 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
14419 (*sse2_eq<mode>3): Likewise.
14420 (*sse2_gt<mode>3): Likewise.
14421 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
14422 (*vec_extract<mode>): Likewise.
14423 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
14424 (*vec_extractv16qi_zext): Likewise.
14425 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
14426 (ssse3_pmaddubsw128): Likewise.
14427 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
14428 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
14429 (<ssse3_avx2>_psign<mode>3): Likewise.
14430 (<ssse3_avx2>_palignr<mode>): Likewise.
14431 (*abs<mode>2): Likewise.
14432 (sse4_2_pcmpestr): Likewise.
14433 (sse4_2_pcmpestri): Likewise.
14434 (sse4_2_pcmpestrm): Likewise.
14435 (sse4_2_pcmpestr_cconly): Likewise.
14436 (sse4_2_pcmpistr): Likewise.
14437 (sse4_2_pcmpistri): Likewise.
14438 (sse4_2_pcmpistrm): Likewise.
14439 (sse4_2_pcmpistr_cconly): Likewise.
14440 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
14441 (vgf2p8affineqb_<mode><mask_name>): Likewise.
14442 (vgf2p8mulb_<mode><mask_name>): Likewise.
14443 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
14445 (*<code>v16qi3 [umaxmin]): Likewise.
14447 2023-08-07 Jan Beulich <jbeulich@suse.com>
14449 * config/i386/i386.md (sse4_1_round<mode>2): Make
14450 "length_immediate" uniformly 1.
14451 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
14452 (mmx_pblendvb_<mode>): Likewise.
14454 2023-08-07 Jan Beulich <jbeulich@suse.com>
14456 * config/i386/sse.md
14457 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
14458 "prefix" attribute.
14459 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
14462 2023-08-07 Jan Beulich <jbeulich@suse.com>
14464 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
14465 "prefix_extra", and "mode" attributes.
14466 (xop_phadd<u>bd): Likewise.
14467 (xop_phadd<u>bq): Likewise.
14468 (xop_phadd<u>wd): Likewise.
14469 (xop_phadd<u>wq): Likewise.
14470 (xop_phadd<u>dq): Likewise.
14471 (xop_phsubbw): Likewise.
14472 (xop_phsubwd): Likewise.
14473 (xop_phsubdq): Likewise.
14474 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
14475 (xop_rotr<mode>3): Likewise.
14476 (xop_frcz<mode>2): Likewise.
14477 (*xop_vmfrcz<mode>2): Likewise.
14478 (xop_vrotl<mode>3): Add "prefix" attribute. Change
14479 "prefix_extra" to 1.
14480 (xop_sha<mode>3): Likewise.
14481 (xop_shl<mode>3): Likewise.
14483 2023-08-07 Jan Beulich <jbeulich@suse.com>
14485 * config/i386/sse.md
14486 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
14488 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
14489 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
14490 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
14491 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
14492 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
14493 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
14494 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
14495 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
14496 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
14497 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
14498 (vec_extract_lo_v64qi): Likewise.
14499 (vec_extract_hi_v64qi): Likewise.
14500 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
14501 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
14502 (*avx512f_<code><mode>3<mask_name>): Likewise.
14503 (*vec_extractv4ti): Likewise.
14504 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
14505 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
14506 Add "length_immediate".
14508 2023-08-07 Jan Beulich <jbeulich@suse.com>
14510 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
14512 (@rdseed<mode>): Likewise.
14513 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
14514 Adjust "prefix_extra".
14515 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
14516 (*sse4_1_<code><mode>3<mask_name>): Likewise.
14517 (*avx2_eq<mode>3): Likewise.
14518 (avx2_gt<mode>3): Likewise.
14519 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
14520 (*vec_extract<mode>): Likewise.
14521 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
14523 2023-08-07 Jan Beulich <jbeulich@suse.com>
14525 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
14526 "prefix_rep". Drop "prefix_extra".
14527 (wr<fsgs>base<mode>): Likewise.
14528 (ptwrite<mode>): Likewise.
14530 2023-08-07 Jan Beulich <jbeulich@suse.com>
14532 * config/i386/i386.md (isa): Move up.
14533 (length_immediate): Handle "fma4".
14534 (prefix): Handle "ssemuladd".
14535 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
14536 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
14538 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
14539 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
14540 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
14542 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
14543 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
14544 (*fma_fnmadd_<mode>): Likewise.
14545 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
14547 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
14548 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
14549 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
14551 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
14552 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
14553 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
14555 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
14556 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
14557 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
14559 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
14560 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
14561 (*fmai_fmadd_<mode>): Likewise.
14562 (*fmai_fmsub_<mode>): Likewise.
14563 (*fmai_fnmadd_<mode><round_name>): Likewise.
14564 (*fmai_fnmsub_<mode><round_name>): Likewise.
14565 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
14566 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
14567 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
14568 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
14569 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
14570 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
14571 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
14572 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
14573 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
14574 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
14575 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
14576 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
14577 (*fma4i_vmfmadd_<mode>): Likewise.
14578 (*fma4i_vmfmsub_<mode>): Likewise.
14579 (*fma4i_vmfnmadd_<mode>): Likewise.
14580 (*fma4i_vmfnmsub_<mode>): Likewise.
14581 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
14582 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
14583 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
14585 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
14586 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
14587 (xop_p<macs>dql): Likewise.
14588 (xop_p<macs>dqh): Likewise.
14589 (xop_p<macs>wd): Likewise.
14590 (xop_p<madcs>wd): Likewise.
14591 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
14593 2023-08-07 Jan Beulich <jbeulich@suse.com>
14595 * config/i386/i386.md (length_immediate): Handle "sse4arg".
14596 (prefix): Likewise.
14597 (*xop_pcmov_<mode>): Add "mode" attribute.
14598 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
14599 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
14600 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
14601 (*xop_pcmov_<mode>): Add "mode" attribute.
14602 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
14604 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
14605 "prefix_extra", and "length_immediate" attributes.
14606 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
14607 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
14608 and "length_immediate" attributes. Switch "type" to "sse4arg".
14609 (xop_pcom_tf<mode>3): Likewise.
14610 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
14612 2023-08-07 Jan Beulich <jbeulich@suse.com>
14614 * config/i386/i386.md (prefix_extra): Correct comment. Fold
14615 cases yielding 2 into ones yielding 1.
14617 2023-08-07 Jan Hubicka <jh@suse.cz>
14619 PR tree-optimization/106293
14620 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
14621 * tree-vect-loop.cc (vect_transform_loop): Likewise.
14623 2023-08-07 Andrew Pinski <apinski@marvell.com>
14625 PR tree-optimization/96695
14626 * match.pd (min_value, max_value): Extend to
14629 2023-08-06 Jan Hubicka <jh@suse.cz>
14631 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
14632 __builtin_expect that CPU likely supports cpuid.
14634 2023-08-06 Jan Hubicka <jh@suse.cz>
14636 * tree-loop-distribution.cc (loop_distribution::execute): Disable
14637 distribution for loops with estimated iterations 0.
14639 2023-08-06 Jan Hubicka <jh@suse.cz>
14641 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
14643 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
14645 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
14646 more Zicond patterns. Fix whitespace typo.
14647 (riscv_rtx_costs): Remove accidental code duplication.
14648 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
14650 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
14653 * config/i386/i386-protos.h
14654 (vpternlog_redundant_operand_mask): Declare.
14655 (substitute_vpternlog_operands): Declare.
14656 * config/i386/i386.cc
14657 (vpternlog_redundant_operand_mask): New helper.
14658 (substitute_vpternlog_operands): New function. Use them...
14659 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
14661 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
14663 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
14664 value of -1 is equivalent to don't care.
14665 (extract_integral_bit_field): Indicate that we don't require
14666 the most significant word to be zero extended, if we're about
14668 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
14669 of -1 is equivalent to don't care. Don't clear the most
14670 significant bits with AND mask when UNSIGNEDP is -1.
14672 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
14674 * config/i386/sse.md (define_split): Convert highpart:DF extract
14675 from V2DFmode register into a sse2_storehpd instruction.
14676 (define_split): Likewise, convert lowpart:DF extract from V2DF
14677 register into a sse2_storelpd instruction.
14679 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
14681 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
14684 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
14686 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
14687 against early clobber hard regs.
14689 2023-08-04 Tamar Christina <tamar.christina@arm.com>
14691 * doc/extend.texi: Document it.
14693 2023-08-04 Tamar Christina <tamar.christina@arm.com>
14696 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
14697 vec_widen_<sur>shiftl_hi_<mode>): Remove.
14698 (aarch64_<sur>shll<mode>_internal): Renamed to...
14699 (aarch64_<su>shll<mode>): .. This.
14700 (aarch64_<sur>shll2<mode>_internal): Renamed to...
14701 (aarch64_<su>shll2<mode>): .. This.
14702 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
14704 * config/aarch64/constraints.md (D2, DL): New.
14705 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
14707 2023-08-04 Tamar Christina <tamar.christina@arm.com>
14709 * gensupport.cc (conlist): Support length 0 attribute.
14711 2023-08-04 Tamar Christina <tamar.christina@arm.com>
14713 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
14714 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
14716 2023-08-04 Tamar Christina <tamar.christina@arm.com>
14718 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
14720 (aarch64_adjust_stmt_cost): Use it.
14721 (aarch64_vector_costs::count_ops): Likewise.
14722 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
14723 aarch64_adjust_stmt_cost.
14725 2023-08-04 Richard Biener <rguenther@suse.de>
14727 PR tree-optimization/110838
14728 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
14729 Fix right-shift value sanitizing. Properly emit external
14730 def mangling in the preheader rather than in the pattern
14731 def sequence where it will fail vectorizing.
14733 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
14735 PR middle-end/110316
14737 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
14738 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
14739 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
14740 (timer::validate_phases): Use integral arithmetic to check
14742 (timer::print_row, timer::print): Convert from integral
14743 nanoseconds to floating point seconds before printing.
14744 (timer::all_zero): Change limit to nanosec count instead of
14745 fractional count of seconds.
14746 (make_json_for_timevar_time_def): Convert from integral
14747 nanoseconds to floating point seconds before recording.
14748 * timevar.h (struct timevar_time_def): Update all measurements
14749 to use uint64_t nanoseconds rather than seconds stored in a
14752 2023-08-04 Richard Biener <rguenther@suse.de>
14754 PR tree-optimization/110838
14755 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
14756 the arithmetic right-shift case to non-negative operands.
14758 2023-08-04 Pan Li <pan2.li@intel.com>
14761 2023-08-04 Pan Li <pan2.li@intel.com>
14763 * config/riscv/riscv-vector-builtins-bases.cc
14764 (class vfmacc_frm): New class for vfmacc frm.
14765 (vfmacc_frm_obj): New declaration.
14767 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14768 * config/riscv/riscv-vector-builtins-functions.def
14769 (vfmacc_frm): New function definition.
14770 * config/riscv/riscv-vector-builtins.cc
14771 (function_expander::use_ternop_insn): Add frm operand support.
14772 * config/riscv/vector.md: Add vfmuladd to frm_mode.
14774 2023-08-04 Pan Li <pan2.li@intel.com>
14777 2023-08-04 Pan Li <pan2.li@intel.com>
14779 * config/riscv/riscv-vector-builtins-bases.cc
14780 (class vfnmacc_frm): New class for vfnmacc.
14781 (vfnmacc_frm_obj): New declaration.
14783 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14784 * config/riscv/riscv-vector-builtins-functions.def
14785 (vfnmacc_frm): New function definition.
14787 2023-08-04 Pan Li <pan2.li@intel.com>
14790 2023-08-04 Pan Li <pan2.li@intel.com>
14792 * config/riscv/riscv-vector-builtins-bases.cc
14793 (class vfmsac_frm): New class for vfmsac frm.
14794 (vfmsac_frm_obj): New declaration.
14796 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14797 * config/riscv/riscv-vector-builtins-functions.def
14798 (vfmsac_frm): New function definition.
14800 2023-08-04 Pan Li <pan2.li@intel.com>
14803 2023-08-04 Pan Li <pan2.li@intel.com>
14805 * config/riscv/riscv-vector-builtins-bases.cc
14806 (class vfnmsac_frm): New class for vfnmsac frm.
14807 (vfnmsac_frm_obj): New declaration.
14809 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14810 * config/riscv/riscv-vector-builtins-functions.def
14811 (vfnmsac_frm): New function definition.
14813 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
14815 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
14816 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
14817 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
14818 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
14819 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
14820 (attiny102, attiny104): New devices.
14821 * doc/avr-mmcu.texi: Regenerate.
14823 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
14825 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
14826 and PM_OFFSET entries.
14828 2023-08-04 Andrew Pinski <apinski@marvell.com>
14830 PR tree-optimization/110874
14831 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
14832 (gimple_maybe_cmp): Likewise.
14833 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
14834 and gimple_maybe_cmp instead of being recursive.
14835 * match.pd (bit_not_with_nop): New match pattern.
14836 (maybe_cmp): Likewise.
14838 2023-08-04 Drew Ross <drross@redhat.com>
14840 PR middle-end/101955
14841 * match.pd ((signed x << c) >> c): New canonicalization.
14843 2023-08-04 Pan Li <pan2.li@intel.com>
14845 * config/riscv/riscv-vector-builtins-bases.cc
14846 (class vfnmsac_frm): New class for vfnmsac frm.
14847 (vfnmsac_frm_obj): New declaration.
14849 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14850 * config/riscv/riscv-vector-builtins-functions.def
14851 (vfnmsac_frm): New function definition.
14853 2023-08-04 Pan Li <pan2.li@intel.com>
14855 * config/riscv/riscv-vector-builtins-bases.cc
14856 (class vfmsac_frm): New class for vfmsac frm.
14857 (vfmsac_frm_obj): New declaration.
14859 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14860 * config/riscv/riscv-vector-builtins-functions.def
14861 (vfmsac_frm): New function definition.
14863 2023-08-04 Pan Li <pan2.li@intel.com>
14865 * config/riscv/riscv-vector-builtins-bases.cc
14866 (class vfnmacc_frm): New class for vfnmacc.
14867 (vfnmacc_frm_obj): New declaration.
14869 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14870 * config/riscv/riscv-vector-builtins-functions.def
14871 (vfnmacc_frm): New function definition.
14873 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
14876 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
14877 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
14879 2023-08-04 Pan Li <pan2.li@intel.com>
14881 * config/riscv/riscv-vector-builtins-bases.cc
14882 (class vfmacc_frm): New class for vfmacc frm.
14883 (vfmacc_frm_obj): New declaration.
14885 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
14886 * config/riscv/riscv-vector-builtins-functions.def
14887 (vfmacc_frm): New function definition.
14888 * config/riscv/riscv-vector-builtins.cc
14889 (function_expander::use_ternop_insn): Add frm operand support.
14890 * config/riscv/vector.md: Add vfmuladd to frm_mode.
14892 2023-08-04 Pan Li <pan2.li@intel.com>
14894 * config/riscv/riscv-vector-builtins-bases.cc
14895 (vfwmul_frm_obj): New declaration.
14896 (vfwmul_frm): Ditto.
14897 * config/riscv/riscv-vector-builtins-bases.h:
14898 (vfwmul_frm): Ditto.
14899 * config/riscv/riscv-vector-builtins-functions.def
14900 (vfwmul_frm): New function definition.
14901 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
14903 2023-08-04 Pan Li <pan2.li@intel.com>
14905 * config/riscv/riscv-vector-builtins-bases.cc
14906 (binop_frm): New declaration.
14907 (reverse_binop_frm): Likewise.
14909 * config/riscv/riscv-vector-builtins-bases.h:
14910 (vfdiv_frm): New extern declaration.
14911 (vfrdiv_frm): Likewise.
14912 * config/riscv/riscv-vector-builtins-functions.def
14913 (vfdiv_frm): New function definition.
14914 (vfrdiv_frm): Likewise.
14915 * config/riscv/vector.md: Add vfdiv to frm_mode.
14917 2023-08-03 Jan Hubicka <jh@suse.cz>
14919 * tree-cfg.cc (print_loop_info): Print entry count.
14921 2023-08-03 Jan Hubicka <jh@suse.cz>
14923 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
14925 2023-08-03 Jan Hubicka <jh@suse.cz>
14927 PR bootstrap/110857
14928 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
14929 unadjusted_exit_count.
14931 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
14933 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
14936 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
14938 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
14939 various Zicond patterns.
14940 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
14941 sfb_alu_operand for both arms of the conditional move.
14942 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
14944 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
14950 * config.gcc: Added core-builtins.cc and .o files.
14951 * config/bpf/bpf-passes.def: Removed file.
14952 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
14953 bpf_replace_core_move_operands): New prototypes.
14954 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
14955 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
14956 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
14957 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
14958 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
14960 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
14961 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
14962 (mov_reloc_core<mode>): Added.
14963 * config/bpf/core-builtins.cc (struct cr_builtin, enum
14964 cr_decision struct cr_local, struct cr_final, struct
14965 core_builtin_helpers, enum bpf_plugin_states): Added types.
14966 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
14968 (allocate_builtin_data, get_builtin-data, search_builtin_data,
14969 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
14970 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
14971 bpf_core_get_index, compute_field_expr,
14972 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
14973 process_field_expr, pack_enum_value, process_enum_value, pack_type,
14974 process_type, bpf_require_core_support, make_core_relo, read_kind,
14975 kind_access_index, kind_preserve_field_info, kind_enum_value,
14976 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
14977 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
14978 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
14979 bpf_expand_core_builtin, bpf_add_core_reloc,
14980 bpf_replace_core_move_operands): Added functions.
14981 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
14982 (bpf_init_core_builtins, bpf_expand_core_builtin,
14983 bpf_resolve_overloaded_core_builtin): Added functions.
14984 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
14985 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
14986 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
14987 * config/bpf/t-bpf: Added core-builtins.o.
14988 * doc/extend.texi: Added documentation for new BPF builtins.
14990 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
14992 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
14993 ranges to the call to relation_fold_and_or.
14994 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
14995 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
14996 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
14997 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
14998 a varying op1 and op2 to call.
14999 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
15000 (operator_equal::op1_op2_relation): New float version.
15001 (operator_not_equal::op1_op2_relation): Ditto.
15002 (operator_lt::op1_op2_relation): Ditto.
15003 (operator_le::op1_op2_relation): Ditto.
15004 (operator_gt::op1_op2_relation): Ditto.
15005 (operator_ge::op1_op2_relation) Ditto.
15006 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
15008 (operator_not_equal::op1_op2_relation): Ditto.
15009 (operator_lt::op1_op2_relation): Ditto.
15010 (operator_le::op1_op2_relation): Ditto.
15011 (operator_gt::op1_op2_relation): Ditto.
15012 (operator_ge::op1_op2_relation): Ditto.
15013 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
15015 (range_operator::op1_op2_relation): Add extra params.
15016 (operator_equal::op1_op2_relation): Ditto.
15017 (operator_not_equal::op1_op2_relation): Ditto.
15018 (operator_lt::op1_op2_relation): Ditto.
15019 (operator_le::op1_op2_relation): Ditto.
15020 (operator_gt::op1_op2_relation): Ditto.
15021 (operator_ge::op1_op2_relation): Ditto.
15022 * range-op.h (range_operator): New prototypes.
15023 (range_op_handler): Ditto.
15025 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
15027 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
15028 Use identity relation.
15029 (gori_compute::compute_operand2_range): Ditto.
15030 * value-relation.cc (get_identity_relation): New.
15031 * value-relation.h (get_identity_relation): New prototype.
15033 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
15035 * value-range.h (Value_Range::set_varying): Set the type.
15036 (Value_Range::set_zero): Ditto.
15037 (Value_Range::set_nonzero): Ditto.
15039 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
15041 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
15044 2023-08-03 Pan Li <pan2.li@intel.com>
15046 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
15048 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
15050 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
15052 2023-08-03 Richard Biener <rguenther@suse.de>
15054 PR tree-optimization/110838
15055 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
15056 Adjust the shift operand of RSHIFT_EXPRs.
15058 2023-08-03 Richard Biener <rguenther@suse.de>
15060 PR tree-optimization/110702
15061 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
15062 we created a NULL pointer based access rewrite that to
15065 2023-08-03 Richard Biener <rguenther@suse.de>
15067 * tree-ssa-sink.cc: Include tree-ssa-live.h.
15068 (pass_sink_code::execute): Instantiate virtual_operand_live
15070 (sink_code_in_bb): Pass down virtual_operand_live.
15071 (statement_sink_location): Get virtual_operand_live and
15072 verify we are not sinking loads across stores by looking up
15073 the live virtual operand at the sink location.
15075 2023-08-03 Richard Biener <rguenther@suse.de>
15077 * tree-ssa-live.h (class virtual_operand_live): New.
15078 * tree-ssa-live.cc (virtual_operand_live::init): New.
15079 (virtual_operand_live::get_live_in): Likewise.
15080 (virtual_operand_live::get_live_out): Likewise.
15082 2023-08-03 Richard Biener <rguenther@suse.de>
15084 * passes.def: Exchange loop splitting and final value
15085 replacement passes.
15087 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
15089 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
15090 New function which handles bswap patterns for vec_perm_const.
15091 (vectorize_vec_perm_const_1): Call new function.
15092 * config/s390/vector.md (*bswap<mode>): Fix operands in output
15094 (*vstbr<mode>): New insn.
15096 2023-08-03 Alexandre Oliva <oliva@adacore.com>
15098 * config/vxworks-smp.opt: New. Introduce -msmp.
15099 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
15100 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
15101 lib_smp when -msmp is present in the command line.
15102 * doc/invoke.texi: Document it.
15104 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
15106 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
15107 when enabling -mno-omit-leaf-frame-pointer
15108 (riscv_option_override): Override omit-frame-pointer.
15109 (riscv_frame_pointer_required): Save s0 for non-leaf function
15110 (TARGET_FRAME_POINTER_REQUIRED): Override defination
15111 * config/riscv/riscv.opt: Add option support.
15113 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
15116 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
15117 place operand in a register before gen_<insn>64ti2_doubleword.
15118 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
15119 operand in a register before gen_<insn>32di2_doubleword.
15120 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
15121 (<any_rotate>64ti2_doubleword): Likewise.
15123 2023-08-03 Pan Li <pan2.li@intel.com>
15125 * config/riscv/riscv-vector-builtins-bases.cc
15126 (vfmul_frm_obj): New declaration.
15128 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
15129 * config/riscv/riscv-vector-builtins-functions.def
15130 (vfmul_frm): New function definition.
15131 * config/riscv/vector.md: Add vfmul to frm_mode.
15133 2023-08-03 Andrew Pinski <apinski@marvell.com>
15135 * match.pd (`~X & X`): Check that the types match.
15136 (`~x | x`, `~x ^ x`): Likewise.
15138 2023-08-03 Pan Li <pan2.li@intel.com>
15140 * config/riscv/riscv-vector-builtins-bases.h: Remove
15141 redudant declaration.
15143 2023-08-03 Pan Li <pan2.li@intel.com>
15145 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
15147 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
15148 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
15149 Add vfwsub function definitions.
15151 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
15153 PR rtl-optimization/110867
15154 * combine.cc (simplify_compare_const): Try the optimization only
15155 in case the constant fits into the comparison mode.
15157 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
15159 * config/riscv/zicond.md: Remove incorrect zicond patterns and
15160 renumber/rename them.
15161 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
15163 2023-08-02 Richard Biener <rguenther@suse.de>
15165 * tree-phinodes.h (add_phi_node_to_bb): Remove.
15166 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
15168 2023-08-02 Jan Beulich <jbeulich@suse.com>
15170 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
15171 two of the alternatives.
15173 2023-08-02 Richard Biener <rguenther@suse.de>
15175 PR tree-optimization/92335
15176 * tree-ssa-sink.cc (select_best_block): Before loop
15177 optimizations avoid sinking unconditional loads/stores
15178 in innermost loops to conditional executed places.
15180 2023-08-02 Andrew Pinski <apinski@marvell.com>
15182 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
15183 the comparison operands before comparing them.
15185 2023-08-02 Andrew Pinski <apinski@marvell.com>
15187 * match.pd (`~X & X`, `~X | X`): Move over to
15188 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
15189 handles that already.
15190 Remove range test simplifications to true/false as they
15191 are now handled by these patterns.
15193 2023-08-02 Andrew Pinski <apinski@marvell.com>
15195 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
15196 statement's lhs and rhs to check if trivial dead.
15197 Rename inserted_exprs to exprs_maybe_dce; also move it so
15198 bitmap is not allocated if not needed.
15200 2023-08-02 Pan Li <pan2.li@intel.com>
15202 * config/riscv/riscv-vector-builtins-bases.cc
15203 (class widen_binop_frm): New class for binop frm.
15204 (BASE): Add vfwadd_frm.
15205 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
15206 * config/riscv/riscv-vector-builtins-functions.def
15207 (vfwadd_frm): New function definition.
15208 * config/riscv/riscv-vector-builtins-shapes.cc
15209 (BASE_NAME_MAX_LEN): New macro.
15210 (struct alu_frm_def): Leverage new base class.
15211 (struct build_frm_base): New build base for frm.
15212 (struct widen_alu_frm_def): New struct for widen alu frm.
15213 (SHAPE): Add widen_alu_frm shape.
15214 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
15215 * config/riscv/vector.md (frm_mode): Add vfwalu type.
15217 2023-08-02 Jan Hubicka <jh@suse.cz>
15219 * cfgloop.h (loop_count_in): Declare.
15220 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
15221 (loop_count_in): Move here from ...
15222 * cfgloopmanip.cc (loop_count_in): ... here.
15223 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
15225 2023-08-02 Jan Hubicka <jh@suse.cz>
15227 * cfg.cc (scale_strictly_dominated_blocks): New function.
15228 * cfg.h (scale_strictly_dominated_blocks): Declare.
15229 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
15231 2023-08-02 Richard Biener <rguenther@suse.de>
15233 PR rtl-optimization/110587
15234 * lra-spills.cc (return_regno_p): Remove.
15235 (regno_in_use_p): Likewise.
15236 (lra_final_code_change): Do not remove noop moves
15237 between hard registers.
15239 2023-08-02 liuhongt <hongtao.liu@intel.com>
15242 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
15243 HFmode, use mode iterator VFH instead.
15244 (vec_fmsubadd<mode>4): Ditto.
15245 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
15246 Remove scalar mode from iterator, use VFH_AVX512VL instead.
15247 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
15250 2023-08-02 liuhongt <hongtao.liu@intel.com>
15252 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
15253 pre_reload define_insn_and_split.
15255 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
15257 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
15258 using Zicond to implement some conditional moves.
15260 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
15262 * config/riscv/zicond.md: Use the X iterator instead of ANYI
15263 on the comparison input operands.
15265 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
15267 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
15269 (case SET): For INSNs that just set a REG, take the cost from the
15271 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
15273 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
15275 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
15276 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
15277 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
15278 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
15279 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
15280 (OPTION_MASK_ISA_ABM_SET):
15281 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
15283 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
15285 * config/s390/s390.cc (s390_encode_section_info): Assume external
15286 symbols without explicit alignment to be unaligned if
15287 -munaligned-symbols has been specified.
15288 * config/s390/s390.opt (-munaligned-symbols): New option.
15290 2023-08-01 Richard Ball <richard.ball@arm.com>
15292 * gimple-fold.cc (fold_ctor_reference):
15293 Add support for poly_int.
15295 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
15298 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
15299 LABEL_NUSES of new conditional branch instruction.
15301 2023-08-01 Jan Hubicka <jh@suse.cz>
15303 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
15304 constant prologue peeling.
15306 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
15308 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
15310 2023-08-01 Pan Li <pan2.li@intel.com>
15311 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15313 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
15314 (STATIC_FRM_P): Ditto.
15315 (struct mode_switching_info): New struct for mode switching.
15316 (struct machine_function): Add new field mode switching.
15317 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
15318 (riscv_frm_adjust_mode_after_call): New function for call mode.
15319 (riscv_frm_emit_after_call_in_bb_end): New function for emit
15320 insn when call as the end of bb.
15321 (riscv_frm_mode_needed): New function for frm mode needed.
15322 (frm_unknown_dynamic_p): Remove call check.
15323 (riscv_mode_needed): Extrac function for frm.
15324 (riscv_frm_mode_after): Add DYN_CALL after.
15325 (riscv_mode_entry): Remove backup rtl initialization.
15326 * config/riscv/vector.md (frm_mode): Add dyn_call.
15327 (fsrmsi_restore_exit): Rename to _volatile.
15328 (fsrmsi_restore_volatile): Likewise.
15330 2023-08-01 Pan Li <pan2.li@intel.com>
15332 * config/riscv/riscv-vector-builtins-bases.cc
15333 (class reverse_binop_frm): Add new template for reversed frm.
15334 (vfsub_frm_obj): New obj.
15335 (vfrsub_frm_obj): Likewise.
15336 * config/riscv/riscv-vector-builtins-bases.h:
15337 (vfsub_frm): New declaration.
15338 (vfrsub_frm): Likewise.
15339 * config/riscv/riscv-vector-builtins-functions.def
15340 (vfsub_frm): New function define.
15341 (vfrsub_frm): Likewise.
15343 2023-08-01 Andrew Pinski <apinski@marvell.com>
15345 PR tree-optimization/93044
15346 * match.pd (nested int casts): A truncation (to the same size or smaller)
15347 can always remove the inner cast.
15349 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
15352 * doc/invoke.texi (-Wmissing-variable-declarations): Document
15355 2023-07-31 Andrew Pinski <apinski@marvell.com>
15357 PR tree-optimization/106164
15358 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
15359 `a == b | a < b`, `a == b | a > b`): Handle these cases
15362 2023-07-31 Andrew Pinski <apinski@marvell.com>
15364 PR tree-optimization/106164
15365 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
15366 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
15368 2023-07-31 Andrew Pinski <apinski@marvell.com>
15370 PR tree-optimization/100864
15371 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
15372 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
15373 (gimple_bitwise_inverted_equal_p): New function.
15374 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
15375 instead of direct matching bit_not.
15377 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
15380 * gcc-ar.cc (main): Expand argv and use
15381 temporary response file to call ar if any
15382 expansions were made.
15384 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
15386 PR tree-optimization/110582
15387 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
15388 range vector for non-ssa names.
15390 2023-07-31 David Malcolm <dmalcolm@redhat.com>
15393 * diagnostic-client-data-hooks.h (class sarif_object): New forward
15395 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
15397 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
15398 (class sarif_invocation): Inherit from sarif_object rather than
15400 (class sarif_result): Likewise.
15401 (class sarif_ice_notification): Likewise.
15402 (sarif_object::get_or_create_properties): New.
15403 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
15404 to call the context's add_sarif_invocation_properties hook.
15405 (sarif_builder::flush_to_file): Pass m_context to
15406 sarif_invocation::prepare_to_flush.
15407 * diagnostic-format-sarif.h: New header.
15408 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
15409 writes to stderr. Document that if SARIF diagnostic output is
15410 requested then any timing information is written in JSON form as
15411 part of the SARIF output, rather than to stderr.
15412 * timevar.cc: Include "json.h".
15413 (timer::named_items::m_hash_map): Split out type into...
15414 (timer::named_items::hash_map_t): ...this new typedef.
15415 (timer::named_items::make_json): New function.
15416 (timevar_diff): New function.
15417 (make_json_for_timevar_time_def): New function.
15418 (timer::timevar_def::make_json): New function.
15419 (timer::make_json): New function.
15420 * timevar.h (class json::value): New forward decl.
15421 (timer::make_json): New decl.
15422 (timer::timevar_def::make_json): New decl.
15423 * tree-diagnostic-client-data-hooks.cc: Include
15424 "diagnostic-format-sarif.h" and "timevar.h".
15425 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
15428 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
15430 * combine.cc (simplify_compare_const): Narrow comparison of
15431 memory and constant.
15432 (try_combine): Adapt new function signature.
15433 (simplify_comparison): Adapt new function signature.
15435 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
15437 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
15439 (expand_vector_init_insert_elems): Ditto.
15441 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
15444 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
15445 single_defuse_cycle while counting reduction_latency.
15447 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15449 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
15450 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
15451 (COND_ADD): Remove.
15456 (COND_RDIV): Ditto.
15459 (COND_FMIN): Ditto.
15460 (COND_FMAX): Ditto.
15468 (COND_FNMA): Ditto.
15469 (COND_FNMS): Ditto.
15471 (COND_LEN_ADD): Ditto.
15472 (COND_LEN_SUB): Ditto.
15473 (COND_LEN_MUL): Ditto.
15474 (COND_LEN_DIV): Ditto.
15475 (COND_LEN_MOD): Ditto.
15476 (COND_LEN_RDIV): Ditto.
15477 (COND_LEN_MIN): Ditto.
15478 (COND_LEN_MAX): Ditto.
15479 (COND_LEN_FMIN): Ditto.
15480 (COND_LEN_FMAX): Ditto.
15481 (COND_LEN_AND): Ditto.
15482 (COND_LEN_IOR): Ditto.
15483 (COND_LEN_XOR): Ditto.
15484 (COND_LEN_SHL): Ditto.
15485 (COND_LEN_SHR): Ditto.
15486 (COND_LEN_FMA): Ditto.
15487 (COND_LEN_FMS): Ditto.
15488 (COND_LEN_FNMA): Ditto.
15489 (COND_LEN_FNMS): Ditto.
15490 (COND_LEN_NEG): Ditto.
15491 (ADD): New macro define.
15512 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
15515 * config/i386/i386-features.cc (compute_convert_gain): Check
15516 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
15517 and V4SImode rotates in STV.
15518 (general_scalar_chain::convert_rotate): Likewise.
15520 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
15522 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
15523 * config/riscv/riscv-protos.h (get_mask_mode): Update return
15525 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
15527 (emit_vlmax_insn): Ditto.
15528 (emit_vlmax_fp_insn): Ditto.
15529 (emit_vlmax_ternary_insn): Ditto.
15530 (emit_vlmax_fp_ternary_insn): Ditto.
15531 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
15532 (emit_nonvlmax_insn): Ditto.
15533 (emit_vlmax_slide_insn): Ditto.
15534 (emit_nonvlmax_slide_tu_insn): Ditto.
15535 (emit_vlmax_merge_insn): Ditto.
15536 (emit_vlmax_masked_insn): Ditto.
15537 (emit_nonvlmax_masked_insn): Ditto.
15538 (emit_vlmax_masked_store_insn): Ditto.
15539 (emit_nonvlmax_masked_store_insn): Ditto.
15540 (emit_vlmax_masked_mu_insn): Ditto.
15541 (emit_nonvlmax_tu_insn): Ditto.
15542 (emit_nonvlmax_fp_tu_insn): Ditto.
15543 (emit_scalar_move_insn): Ditto.
15544 (emit_vlmax_compress_insn): Ditto.
15545 (emit_vlmax_reduction_insn): Ditto.
15546 (emit_vlmax_fp_reduction_insn): Ditto.
15547 (emit_nonvlmax_fp_reduction_insn): Ditto.
15548 (expand_vec_series): Ditto.
15549 (expand_vector_init_merge_repeating_sequence): Ditto.
15550 (expand_vec_perm): Ditto.
15551 (shuffle_merge_patterns): Ditto.
15552 (shuffle_compress_patterns): Ditto.
15553 (shuffle_decompress_patterns): Ditto.
15554 (expand_reduction): Ditto.
15555 (get_mask_mode): Update return type.
15556 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
15557 is valid, and use new get_mask_mode interface.
15559 2023-07-31 Pan Li <pan2.li@intel.com>
15561 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
15562 Move rm suffix before mask.
15564 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15566 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
15567 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
15570 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
15573 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
15574 (extzv<mode>): Likewise.
15575 (insv<mode>): Likewise.
15576 (*testqi_ext_3): Likewise.
15577 (*btr<mode>_2): Likewise.
15578 (define_split): Likewise.
15579 (*btsq_imm): Likewise.
15580 (*btrq_imm): Likewise.
15581 (*btcq_imm): Likewise.
15582 (define_peephole2 x3): Likewise.
15583 (*bt<mode>): Likewise
15584 (*bt<mode>_mask): New define_insn_and_split.
15585 (*jcc_bt<mode>): Use QImode for offsets.
15586 (*jcc_bt<mode>_1): Delete obsolete pattern.
15587 (*jcc_bt<mode>_mask): Use QImode offsets.
15588 (*jcc_bt<mode>_mask_1): Likewise.
15589 (define_split): Likewise.
15590 (*bt<mode>_setcqi): Likewise.
15591 (*bt<mode>_setncqi): Likewise.
15592 (*bt<mode>_setnc<mode>): Likewise.
15593 (*bt<mode>_setncqi_2): Likewise.
15594 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
15595 (bmi2_bzhi_<mode>3): Use QImode offsets.
15596 (*bmi2_bzhi_<mode>3): Likewise.
15597 (*bmi2_bzhi_<mode>3_1): Likewise.
15598 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
15599 (@tbm_bextri_<mode>): Likewise.
15601 2023-07-29 Jan Hubicka <jh@suse.cz>
15603 * profile-count.cc (profile_probability::sqrt): New member function.
15604 (profile_probability::pow): Likewise.
15605 * profile-count.h: (profile_probability::sqrt): Declare
15606 (profile_probability::pow): Likewise.
15607 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
15609 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
15611 * gimple-range-cache.cc (ssa_cache::merge_range): New.
15612 (ssa_lazy_cache::merge_range): New.
15613 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
15614 (class ssa_lazy_cache): Ditto.
15615 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
15617 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
15619 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
15620 Move from value-query.cc.
15621 (substitute_and_fold_engine::value_of_stmt): Ditto.
15622 (substitute_and_fold_engine::range_of_expr): New.
15623 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
15624 range_query. New prototypes.
15625 * value-query.cc (value_query::value_on_edge): Relocate.
15626 (value_query::value_of_stmt): Ditto.
15627 * value-query.h (class value_query): Remove.
15628 (class range_query): Remove base class. Adjust prototypes.
15630 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
15632 PR tree-optimization/110205
15633 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
15634 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
15635 Add final override.
15636 * range-op.cc (operator_lshift): Add missing final overrides.
15637 (operator_rshift): Ditto.
15639 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
15641 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
15642 optimizations in BPF target.
15644 2023-07-28 Honza <jh@ryzen4.suse.cz>
15646 * cfgloopmanip.cc (loop_count_in): Break out from ...
15647 (loop_exit_for_scaling): Break out from ...
15648 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
15649 add more sanity check and debug info.
15650 (scale_loop_profile): ... here.
15651 (create_empty_loop_on_edge): Fix whitespac.
15652 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
15653 * loop-unroll.cc (unroll_loop_constant_iterations): Use
15654 update_loop_exit_probability_scale_dom_bbs.
15655 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
15656 (tree_transform_and_unroll_loop): Use
15657 update_loop_exit_probability_scale_dom_bbs.
15658 * tree-ssa-loop-split.cc (split_loop): Use
15659 update_loop_exit_probability_scale_dom_bbs.
15661 2023-07-28 Jan Hubicka <jh@suse.cz>
15663 PR middle-end/77689
15664 * tree-ssa-loop-split.cc: Include value-query.h.
15665 (split_at_bb_p): Analyze cases where EQ/NE can be turned
15666 into LT/LE/GT/GE; return updated guard code.
15667 (split_loop): Use guard code.
15669 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
15670 Richard Biener <rguenther@suse.de>
15672 PR middle-end/28071
15673 PR rtl-optimization/110587
15674 * expr.cc (emit_group_load_1): Simplify logic for calling
15675 force_reg on ORIG_SRC, to avoid making a copy if the source
15676 is already in a pseudo register.
15678 2023-07-28 Jan Hubicka <jh@suse.cz>
15680 PR middle-end/106923
15681 * tree-ssa-loop-split.cc (connect_loops): Change probability
15682 of the test preconditioning second loop to very_likely.
15683 (fix_loop_bb_probability): Handle correctly case where
15684 on of the arms of the conditional is empty.
15685 (split_loop): Fold the test guarding first condition to
15686 see if it is constant true; Set correct entry block
15687 probabilities of the split loops; determine correct loop
15688 eixt probabilities.
15690 2023-07-28 xuli <xuli1@eswincomputing.com>
15692 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
15693 vsadd[u] and vssub[u].
15694 * config/riscv/vector.md: Ditto.
15696 2023-07-28 Jan Hubicka <jh@suse.cz>
15698 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
15699 loops when IV test is not overflowing.
15701 2023-07-28 liuhongt <hongtao.liu@intel.com>
15704 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
15706 (avx512cd_maskw_vec_dup<mode>): Ditto.
15708 2023-07-27 David Faust <david.faust@oracle.com>
15712 * config/bpf/bpf.opt (msmov): New option.
15713 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
15714 * config/bpf/bpf.md (*extendsidi2): New.
15715 (extendhidi2): New.
15716 (extendqidi2): New.
15717 (extendsisi2): New.
15718 (extendhisi2): New.
15719 (extendqisi2): New.
15720 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
15721 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
15722 also enables -msmov.
15724 2023-07-27 David Faust <david.faust@oracle.com>
15726 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
15727 Add -mbswap and -msdiv eBPF options.
15728 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
15729 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
15732 2023-07-27 David Faust <david.faust@oracle.com>
15734 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
15735 in pseudo-C dialect output template.
15736 (sub<AM:mode>3): Likewise.
15738 2023-07-27 Jan Hubicka <jh@suse.cz>
15740 * tree-vect-loop.cc (optimize_mask_stores): Make store
15743 2023-07-27 Jan Hubicka <jh@suse.cz>
15745 * cfgloop.h (single_dom_exit): Declare.
15746 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
15747 * cfgrtl.cc (struct cfg_hooks): Fix comment.
15748 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
15749 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
15750 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
15752 (tree_transform_and_unroll_loop): ... here;
15754 2023-07-27 Jan Hubicka <jh@suse.cz>
15756 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
15757 tree-ssa-loop-manip.cc and avoid recursion.
15758 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
15759 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
15761 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
15762 (scale_dominated_blocks_in_loop): Declare.
15763 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
15764 (change_edge_frequency): Remove.
15765 * predict.h (change_edge_frequency): Remove.
15766 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
15768 (niter_for_unrolled_loop): Remove.
15769 (tree_transform_and_unroll_loop): Fix profile update.
15771 2023-07-27 Jan Hubicka <jh@suse.cz>
15773 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
15774 to guessed; fix count of new_bb.
15776 2023-07-27 Jan Hubicka <jh@suse.cz>
15778 * profile-count.h (profile_count::apply_probability): Fix
15779 handling of uninitialized probabilities, optimize scaling
15782 2023-07-27 Richard Biener <rguenther@suse.de>
15784 PR tree-optimization/91838
15785 * gimple-match-head.cc: Include attribs.h and asan.h.
15786 * generic-match-head.cc: Likewise.
15787 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
15789 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15791 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
15792 (ADJUST_ALIGNMENT): Ditto.
15793 (ADJUST_PRECISION): Ditto.
15794 (VLS_MODES): Ditto.
15795 (VECTOR_MODE_WITH_PREFIX): Ditto.
15796 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
15797 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
15798 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
15799 (legitimize_move): Enable basic VLS modes support.
15800 (get_vlmul): Ditto.
15801 (get_ratio): Ditto.
15802 (get_vector_mode): Ditto.
15803 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
15804 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
15805 (VLS_ENTRY): New macro.
15806 (riscv_v_ext_mode_p): Add vls modes.
15807 (riscv_get_v_regno_alignment): New function.
15808 (riscv_print_operand): Add vls modes.
15809 (riscv_hard_regno_nregs): Ditto.
15810 (riscv_hard_regno_mode_ok): Ditto.
15811 (riscv_regmode_natural_size): Ditto.
15812 (riscv_vectorize_preferred_vector_alignment): Ditto.
15813 * config/riscv/riscv.md: Ditto.
15814 * config/riscv/vector-iterators.md: Ditto.
15815 * config/riscv/vector.md: Ditto.
15816 * config/riscv/autovec-vls.md: New file.
15818 2023-07-27 Pan Li <pan2.li@intel.com>
15820 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
15821 (vread_csr): Ditto.
15822 (vwrite_csr): Ditto.
15824 2023-07-27 demin.han <demin.han@starfivetech.com>
15826 * config/riscv/autovec.md: Delete which_alternative use in split
15828 2023-07-27 Richard Biener <rguenther@suse.de>
15830 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
15832 (pass_sink_code::execute): ... in the caller.
15834 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
15835 Richard Biener <rguenther@suse.de>
15837 PR tree-optimization/110776
15838 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
15841 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
15843 * config/riscv/riscv.md: Include zicond.md
15844 * config/riscv/zicond.md: New file.
15846 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
15848 * common/config/riscv/riscv-common.cc: New extension.
15849 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
15850 (TARGET_ZICOND): New target.
15852 2023-07-26 Carl Love <cel@us.ibm.com>
15854 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
15855 specifies the number of built-in arguments to check.
15856 (altivec_resolve_overloaded_builtin): Update calls to find_instance
15857 to pass the number of built-in arguments to be checked.
15859 2023-07-26 David Faust <david.faust@oracle.com>
15861 * config/bpf/bpf.opt (mv3-atomics): New option.
15862 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
15863 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
15864 (REG_CLASS_NAMES): Likewise.
15865 (REG_CLASS_CONTENTS): Likewise.
15866 (REGNO_REG_CLASS): Handle R0.
15867 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
15868 (UNSPEC_AAND): New unspec.
15869 (UNSPEC_AOR): Likewise.
15870 (UNSPEC_AXOR): Likewise.
15871 (UNSPEC_AFADD): Likewise.
15872 (UNSPEC_AFAND): Likewise.
15873 (UNSPEC_AFOR): Likewise.
15874 (UNSPEC_AFXOR): Likewise.
15875 (UNSPEC_AXCHG): Likewise.
15876 (UNSPEC_ACMPX): Likewise.
15877 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
15879 * config/bpf/atomic.md: ...Here. New file.
15880 * config/bpf/constraints.md (t): New constraint for R0.
15881 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
15883 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
15885 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
15888 2023-07-26 Carl Love <cel@us.ibm.com>
15890 * config/rs6000/rs6000-builtins.def: Rename
15891 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
15892 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
15893 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
15894 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
15895 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
15896 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
15897 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
15898 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
15899 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
15900 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
15901 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
15902 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
15903 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
15904 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
15905 * config/rs6000/rs6000-c.cc (find_instance): Add case
15906 RS6000_OVLD_VEC_REPLACE_UN.
15907 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
15908 Fix first argument type. Rename VREPLACE_UN_UV4SI as
15909 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
15910 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
15911 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
15912 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
15913 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
15914 REPLACE_ELT_V for vector modes.
15915 (REPLACE_ELT): New scalar mode iterator.
15916 (REPLACE_ELT_char): Add scalar attributes.
15917 (vreplace_un_<mode>): Change iterator and mode attribute.
15919 2023-07-26 David Malcolm <dmalcolm@redhat.com>
15922 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
15924 2023-07-26 Richard Biener <rguenther@suse.de>
15926 PR tree-optimization/106081
15927 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
15928 Assign layout -1 to splats.
15930 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
15932 * range-op-mixed.h (class operator_cast): Add update_bitmask.
15933 * range-op.cc (operator_cast::update_bitmask): New.
15934 (operator_cast::fold_range): Call update_bitmask.
15936 2023-07-26 Li Xu <xuli1@eswincomputing.com>
15938 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
15939 scalar type to float16, eliminate warning.
15940 (vfloat16mf4x3_t): Ditto.
15941 (vfloat16mf4x4_t): Ditto.
15942 (vfloat16mf4x5_t): Ditto.
15943 (vfloat16mf4x6_t): Ditto.
15944 (vfloat16mf4x7_t): Ditto.
15945 (vfloat16mf4x8_t): Ditto.
15946 (vfloat16mf2x2_t): Ditto.
15947 (vfloat16mf2x3_t): Ditto.
15948 (vfloat16mf2x4_t): Ditto.
15949 (vfloat16mf2x5_t): Ditto.
15950 (vfloat16mf2x6_t): Ditto.
15951 (vfloat16mf2x7_t): Ditto.
15952 (vfloat16mf2x8_t): Ditto.
15953 (vfloat16m1x2_t): Ditto.
15954 (vfloat16m1x3_t): Ditto.
15955 (vfloat16m1x4_t): Ditto.
15956 (vfloat16m1x5_t): Ditto.
15957 (vfloat16m1x6_t): Ditto.
15958 (vfloat16m1x7_t): Ditto.
15959 (vfloat16m1x8_t): Ditto.
15960 (vfloat16m2x2_t): Ditto.
15961 (vfloat16m2x3_t): Ditto.
15962 (vfloat16m2x4_t): Ditto.
15963 (vfloat16m4x2_t): Ditto.
15964 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
15965 * config/riscv/vector.md: add tuple mode in attr sew.
15967 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
15970 * config/i386/i386.md (plusminusmult): New code iterator.
15971 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
15972 (movq_<mode>_to_sse): New expander.
15973 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
15974 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
15975 as a wrapper around V4SFmode operation.
15976 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
15977 nonimmediate_operand.
15978 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
15979 operand 2 predicates to nonimmediate_operand.
15980 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
15981 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
15982 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
15983 operand 2 predicates to nonimmediate_operand.
15984 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
15985 nonimmediate_operand.
15986 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
15987 operand 2 predicates to nonimmediate_operand.
15988 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
15989 (<smaxmin:code>v2sf3): Ditto.
15990 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
15991 predicates to nonimmediate_operand.
15992 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
15993 operand 1 and operand 2 predicates to nonimmediate_operand.
15994 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
15995 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
15996 (*mmx_haddv2sf3_low): Ditto.
15997 (*mmx_hsubv2sf3_low): Ditto.
15998 (vec_addsubv2sf3): Ditto.
15999 (*mmx_maskcmpv2sf3_comm): Remove.
16000 (*mmx_maskcmpv2sf3): Remove.
16001 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
16002 (vcond<V2FI:mode>v2sf): Ditto.
16005 (fnmav2sf4): Ditto.
16006 (fnmsv2sf4): Ditto.
16007 (fix_truncv2sfv2si2): Ditto.
16008 (fixuns_truncv2sfv2si2): Ditto.
16009 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
16010 Change operand 1 predicate to nonimmediate_operand.
16011 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
16012 (floatunsv2siv2sf2): Ditto.
16013 (mmx_floatv2siv2sf2): Remove SSE alternatives.
16014 Change operand 1 predicate to nonimmediate_operand.
16015 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
16016 (rintv2sf2): Ditto.
16017 (lrintv2sfv2si2): Ditto.
16018 (ceilv2sf2): Ditto.
16019 (lceilv2sfv2si2): Ditto.
16020 (floorv2sf2): Ditto.
16021 (lfloorv2sfv2si2): Ditto.
16022 (btruncv2sf2): Ditto.
16023 (roundv2sf2): Ditto.
16024 (lroundv2sfv2si2): Ditto.
16025 (*mmx_roundv2sf2): Remove.
16027 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
16029 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
16031 2023-07-26 Richard Biener <rguenther@suse.de>
16033 PR tree-optimization/110799
16034 * tree-ssa-pre.cc (compute_avail): More thoroughly match
16035 up TBAA behavior of redundant loads.
16037 2023-07-26 Jakub Jelinek <jakub@redhat.com>
16039 PR tree-optimization/110755
16040 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
16041 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
16042 it is exact op1 + (-op1) or op1 - op1.
16044 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
16047 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
16048 operands output with "x".
16050 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
16052 * range-op.cc (class operator_absu): Add update_bitmask.
16053 (operator_absu::update_bitmask): New.
16055 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
16057 * range-op-mixed.h (class operator_abs): Add update_bitmask.
16058 * range-op.cc (operator_abs::update_bitmask): New.
16060 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
16062 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
16063 * range-op.cc (operator_bitwise_not::update_bitmask): New.
16065 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
16067 * range-op.cc (update_known_bitmask): Handle unary operators.
16069 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
16071 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
16073 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
16075 * config/riscv/riscv.md: Likewise.
16077 2023-07-26 Jan Hubicka <jh@suse.cz>
16079 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
16080 if we divide by zero.
16082 2023-07-25 David Faust <david.faust@oracle.com>
16084 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
16085 enclosing parentheses for pseudo-C dialect.
16086 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
16087 operands of pseudo-C dialect output templates where needed.
16088 (zero_extendqidi2): Likewise.
16089 (zero_extendsidi2): Likewise.
16090 (*mov<MM:mode>): Likewise.
16092 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
16094 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
16095 (bit_value_mult_const): Same.
16096 (get_individual_bits): Same.
16098 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
16101 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
16102 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
16103 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
16104 (minmax_op): New int attribute.
16105 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
16106 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
16107 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
16108 pattern to fmaxdf3.
16109 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
16111 2023-07-24 David Faust <david.faust@oracle.com>
16113 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
16115 2023-07-24 Drew Ross <drross@redhat.com>
16116 Jakub Jelinek <jakub@redhat.com>
16118 PR middle-end/109986
16119 * generic-match-head.cc (bitwise_equal_p): New macro.
16120 * gimple-match-head.cc (bitwise_equal_p): New macro.
16121 (gimple_nop_convert): Declare.
16122 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
16123 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
16125 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
16127 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
16128 single quote rather than backquote in diagnostic.
16130 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
16133 * config/bpf/bpf.opt: New command-line option -msdiv.
16134 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
16135 * config/bpf/bpf.cc (bpf_option_override): Initialize
16137 * doc/invoke.texi (eBPF Options): Document -msdiv.
16139 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
16141 * config/riscv/riscv.cc (riscv_option_override): Spell out
16142 greater than and use cannot in diagnostic string.
16144 2023-07-24 Richard Biener <rguenther@suse.de>
16146 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
16147 (_slp_tree::vec_stmts): Remove.
16148 (SLP_TREE_VEC_STMTS): Remove.
16149 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
16150 (_slp_tree::_slp_tree): Adjust.
16151 (_slp_tree::~_slp_tree): Likewise.
16152 (vect_get_slp_vect_def): Simplify.
16153 (vect_get_slp_defs): Likewise.
16154 (vect_transform_slp_perm_load_1): Adjust.
16155 (vect_add_slp_permutation): Likewise.
16156 (vect_schedule_slp_node): Likewise.
16157 (vectorize_slp_instance_root_stmt): Likewise.
16158 (vect_schedule_scc): Likewise.
16159 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
16160 (vectorizable_call): Likewise.
16161 (vectorizable_call): Likewise.
16162 (vect_create_vectorized_demotion_stmts): Likewise.
16163 (vectorizable_conversion): Likewise.
16164 (vectorizable_assignment): Likewise.
16165 (vectorizable_shift): Likewise.
16166 (vectorizable_operation): Likewise.
16167 (vectorizable_load): Likewise.
16168 (vectorizable_condition): Likewise.
16169 (vectorizable_comparison): Likewise.
16170 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
16171 (vectorize_fold_left_reduction): Use push_vec_def.
16172 (vect_transform_reduction): Likewise.
16173 (vect_transform_cycle_phi): Likewise.
16174 (vectorizable_lc_phi): Likewise.
16175 (vectorizable_phi): Likewise.
16176 (vectorizable_recurr): Likewise.
16177 (vectorizable_induction): Likewise.
16178 (vectorizable_live_operation): Likewise.
16180 2023-07-24 Richard Biener <rguenther@suse.de>
16182 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
16184 2023-07-24 Richard Biener <rguenther@suse.de>
16186 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
16187 * config/i386/i386-expand.cc: Likewise.
16188 * config/i386/i386-features.cc: Likewise.
16189 * config/i386/i386-options.cc: Likewise.
16191 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
16193 * tree-vect-stmts.cc (vectorizable_conversion): Handle
16194 more demotion/promotion for modifier == NONE.
16196 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
16201 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
16202 (extzv<mode>): Likewise.
16203 (insv<mode>): Likewise.
16204 (*testqi_ext_3): Likewise.
16205 (*btr<mode>_2): Likewise.
16206 (define_split): Likewise.
16207 (*btsq_imm): Likewise.
16208 (*btrq_imm): Likewise.
16209 (*btcq_imm): Likewise.
16210 (define_peephole2 x3): Likewise.
16211 (*bt<mode>): Likewise
16212 (*bt<mode>_mask): New define_insn_and_split.
16213 (*jcc_bt<mode>): Use QImode for offsets.
16214 (*jcc_bt<mode>_1): Delete obsolete pattern.
16215 (*jcc_bt<mode>_mask): Use QImode offsets.
16216 (*jcc_bt<mode>_mask_1): Likewise.
16217 (define_split): Likewise.
16218 (*bt<mode>_setcqi): Likewise.
16219 (*bt<mode>_setncqi): Likewise.
16220 (*bt<mode>_setnc<mode>): Likewise.
16221 (*bt<mode>_setncqi_2): Likewise.
16222 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
16223 (bmi2_bzhi_<mode>3): Use QImode offsets.
16224 (*bmi2_bzhi_<mode>3): Likewise.
16225 (*bmi2_bzhi_<mode>3_1): Likewise.
16226 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
16227 (@tbm_bextri_<mode>): Likewise.
16229 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
16231 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
16232 * config/bpf/bpf.opt (mkernel): Remove option.
16233 * config/bpf/bpf.cc (bpf_target_macros): Do not define
16234 BPF_KERNEL_VERSION_CODE.
16236 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
16239 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
16240 (mbswap): New option.
16241 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
16242 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
16243 * config/bpf/bpf.md: Use bswap instructions if available for
16244 bswap* insn, and fix constraint.
16245 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
16247 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16249 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
16250 (mask_len_fold_left_plus_<mode>): Ditto.
16251 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16252 (enum reduction_type): Ditto.
16253 (expand_reduction): Add in-order reduction.
16254 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
16255 (expand_reduction): Add in-order reduction.
16257 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16259 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
16260 (vectorize_fold_left_reduction): Ditto.
16261 (vectorizable_reduction): Ditto.
16262 (vect_transform_reduction): Ditto.
16264 2023-07-24 Richard Biener <rguenther@suse.de>
16266 PR tree-optimization/110777
16267 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
16268 Avoid propagating abnormals.
16270 2023-07-24 Richard Biener <rguenther@suse.de>
16272 PR tree-optimization/110766
16273 * tree-scalar-evolution.cc
16274 (analyze_and_compute_bitwise_induction_effect): Check the PHI
16275 is defined in the loop header.
16277 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
16279 PR tree-optimization/110740
16280 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
16281 loop with a single scalar iteration.
16283 2023-07-24 Pan Li <pan2.li@intel.com>
16285 * config/riscv/riscv-vector-builtins-shapes.cc
16286 (struct alu_frm_def): Take range check.
16288 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
16291 * config/riscv/predicates.md (const_0_operand): Add back
16294 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
16296 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
16297 64-bit insertions into TImode optimizations with -O0, unless
16298 the function has the "naked" attribute (for PR target/110533).
16300 2023-07-22 Andrew Pinski <apinski@marvell.com>
16303 * rtl.h (extended_count): Change last argument type
16306 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
16308 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
16309 (extzv<mode>): Likewise.
16310 (insv<mode>): Likewise.
16311 (*testqi_ext_3): Likewise.
16312 (*btr<mode>_2): Likewise.
16313 (define_split): Likewise.
16314 (*btsq_imm): Likewise.
16315 (*btrq_imm): Likewise.
16316 (*btcq_imm): Likewise.
16317 (define_peephole2 x3): Likewise.
16318 (*bt<mode>): Likewise
16319 (*bt<mode>_mask): New define_insn_and_split.
16320 (*jcc_bt<mode>): Use QImode for offsets.
16321 (*jcc_bt<mode>_1): Delete obsolete pattern.
16322 (*jcc_bt<mode>_mask): Use QImode offsets.
16323 (*jcc_bt<mode>_mask_1): Likewise.
16324 (define_split): Likewise.
16325 (*bt<mode>_setcqi): Likewise.
16326 (*bt<mode>_setncqi): Likewise.
16327 (*bt<mode>_setnc<mode>): Likewise.
16328 (*bt<mode>_setncqi_2): Likewise.
16329 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
16330 (bmi2_bzhi_<mode>3): Use QImode offsets.
16331 (*bmi2_bzhi_<mode>3): Likewise.
16332 (*bmi2_bzhi_<mode>3_1): Likewise.
16333 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
16334 (@tbm_bextri_<mode>): Likewise.
16336 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
16338 * config/bfin/bfin.md (ones): Fix length computation.
16340 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
16342 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
16343 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
16344 instead of FRAME_POINTER_REGNUM to spill pseudos.
16346 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
16347 Richard Biener <rguenther@suse.de>
16350 * gimplify.cc (gimplify_compound_lval): If the array's type
16351 is error_mark_node then return GS_ERROR.
16353 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
16356 * config/bpf/bpf.opt: Added option -masm=<dialect>.
16357 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
16358 * config/bpf/bpf.cc (bpf_print_register): New function.
16359 (bpf_print_register): Support pseudo-c syntax for registers.
16360 (bpf_print_operand_address): Likewise.
16361 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
16362 (ASSEMBLER_DIALECT): Define.
16363 * config/bpf/bpf.md: Added pseudo-c templates.
16364 * doc/invoke.texi (-masm=): New eBPF option item.
16366 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
16368 * config/bpf/bpf.md: fixed template for neg instruction.
16370 2023-07-21 Jan Hubicka <jh@suse.cz>
16373 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
16374 profiles by vectorization factor.
16375 (vect_transform_loop): Check for flat profiles.
16377 2023-07-21 Jan Hubicka <jh@suse.cz>
16379 * cfgloop.h (maybe_flat_loop_profile): Declare
16380 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
16381 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
16383 2023-07-21 Jan Hubicka <jh@suse.cz>
16385 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
16386 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
16387 * predict.cc (estimate_bb_frequencies): Likewise.
16388 * profile.cc (branch_prob): Likewise.
16389 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
16391 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
16393 * config.in: Regenerate.
16394 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
16395 (LINK_COMMAND_SPEC_A): Add demangle handling.
16396 * configure: Regenerate.
16397 * configure.ac: Detect linker support for '-demangle'.
16399 2023-07-21 Jan Hubicka <jh@suse.cz>
16401 * sreal.cc (sreal::to_nearest_int): New.
16402 (sreal_verify_basics): Verify also to_nearest_int.
16403 (verify_aritmetics): Likewise.
16404 (sreal_verify_conversions): New.
16405 (sreal_cc_tests): Call sreal_verify_conversions.
16406 * sreal.h: (sreal::to_nearest_int): Declare
16408 2023-07-21 Jan Hubicka <jh@suse.cz>
16410 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
16411 (should_duplicate_loop_header_p): Return info on profitability.
16412 (do_while_loop_p): Watch for constant conditionals.
16413 (update_profile_after_ch): Do not sanity check that all
16414 static exits are taken.
16415 (ch_base::copy_headers): Run on all loops.
16416 (pass_ch::process_loop_p): Improve heuristics by handling also
16417 do_while loop and duplicating shortest sequence containing all
16420 2023-07-21 Jan Hubicka <jh@suse.cz>
16422 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
16423 tests first; update finite_p flag.
16425 2023-07-21 Jan Hubicka <jh@suse.cz>
16427 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
16428 * cfgloop.h (print_loop_info): Declare.
16429 * tree-cfg.cc (print_loop_info): Break out from ...; add
16430 printing of missing fields and profile
16431 (print_loop): ... here.
16433 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16435 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
16437 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16439 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
16440 (vectorizable_operation): Ditto.
16442 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16444 * config/riscv/autovec.md: Align order of mask and len.
16445 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
16446 (expand_gather_scatter): Ditto.
16447 * doc/md.texi: Ditto.
16448 * internal-fn.cc (add_len_and_mask_args): Ditto.
16449 (add_mask_and_len_args): Ditto.
16450 (expand_partial_load_optab_fn): Ditto.
16451 (expand_partial_store_optab_fn): Ditto.
16452 (expand_scatter_store_optab_fn): Ditto.
16453 (expand_gather_load_optab_fn): Ditto.
16454 (internal_fn_len_index): Ditto.
16455 (internal_fn_mask_index): Ditto.
16456 (internal_len_load_store_bias): Ditto.
16457 * tree-vect-stmts.cc (vectorizable_store): Ditto.
16458 (vectorizable_load): Ditto.
16460 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16462 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
16463 (mask_len_load<mode><vm>): Ditto.
16464 (len_maskstore<mode><vm>): Ditto.
16465 (mask_len_store<mode><vm>): Ditto.
16466 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
16467 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
16468 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
16469 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
16470 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
16471 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
16472 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
16473 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
16474 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
16475 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
16476 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
16477 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
16478 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
16479 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
16480 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
16481 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
16482 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
16483 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
16484 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
16485 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
16486 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
16487 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
16488 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
16489 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
16490 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
16491 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
16492 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
16493 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
16494 * doc/md.texi: Ditto.
16495 * genopinit.cc (main): Ditto.
16496 (CMP_NAME): Ditto. Ditto.
16497 * gimple-fold.cc (arith_overflowed_p): Ditto.
16498 (gimple_fold_partial_load_store_mem_ref): Ditto.
16499 (gimple_fold_call): Ditto.
16500 * internal-fn.cc (len_maskload_direct): Ditto.
16501 (mask_len_load_direct): Ditto.
16502 (len_maskstore_direct): Ditto.
16503 (mask_len_store_direct): Ditto.
16504 (expand_call_mem_ref): Ditto.
16505 (expand_len_maskload_optab_fn): Ditto.
16506 (expand_mask_len_load_optab_fn): Ditto.
16507 (expand_len_maskstore_optab_fn): Ditto.
16508 (expand_mask_len_store_optab_fn): Ditto.
16509 (direct_len_maskload_optab_supported_p): Ditto.
16510 (direct_mask_len_load_optab_supported_p): Ditto.
16511 (direct_len_maskstore_optab_supported_p): Ditto.
16512 (direct_mask_len_store_optab_supported_p): Ditto.
16513 (internal_load_fn_p): Ditto.
16514 (internal_store_fn_p): Ditto.
16515 (internal_gather_scatter_fn_p): Ditto.
16516 (internal_fn_len_index): Ditto.
16517 (internal_fn_mask_index): Ditto.
16518 (internal_fn_stored_value_index): Ditto.
16519 (internal_len_load_store_bias): Ditto.
16520 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
16521 (MASK_LEN_GATHER_LOAD): Ditto.
16522 (LEN_MASK_LOAD): Ditto.
16523 (MASK_LEN_LOAD): Ditto.
16524 (LEN_MASK_SCATTER_STORE): Ditto.
16525 (MASK_LEN_SCATTER_STORE): Ditto.
16526 (LEN_MASK_STORE): Ditto.
16527 (MASK_LEN_STORE): Ditto.
16528 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
16529 (supports_vec_scatter_store_p): Ditto.
16530 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
16531 (target_supports_len_load_store_p): Ditto.
16532 * optabs.def (OPTAB_CD): Ditto.
16533 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
16534 (call_may_clobber_ref_p_1): Ditto.
16535 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
16536 (dse_optimize_stmt): Ditto.
16537 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
16538 (get_alias_ptr_type_for_ptr_address): Ditto.
16539 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
16540 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
16541 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
16542 (vect_get_strided_load_store_ops): Ditto.
16543 (vectorizable_store): Ditto.
16544 (vectorizable_load): Ditto.
16546 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
16548 * config/i386/i386.opt: Fix a typo.
16550 2023-07-21 Richard Biener <rguenther@suse.de>
16552 PR tree-optimization/88540
16553 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
16554 with NaNs but handle the simple case by if-converting to a
16557 2023-07-21 Andrew Pinski <apinski@marvell.com>
16559 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
16562 2023-07-21 Richard Biener <rguenther@suse.de>
16564 PR tree-optimization/110742
16565 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
16566 Do not materialize an edge permutation in an external node with
16568 (vect_slp_analyze_node_operations_1): Guard purely internal
16571 2023-07-21 Jan Hubicka <jh@suse.cz>
16573 * cfgloop.cc: Include sreal.h.
16574 (flow_loop_dump): Dump sreal iteration exsitmate.
16575 (get_estimated_loop_iterations): Update.
16576 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
16577 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
16578 (expected_loop_iterations_unbounded): Use new API.
16579 * cfgloopmanip.cc (scale_loop_profile): Use
16580 expected_loop_iterations_by_profile
16581 * predict.cc (pass_profile::execute): Likewise.
16582 * profile.cc (branch_prob): Likewise.
16583 * tree-ssa-loop-niter.cc: Include sreal.h.
16584 (estimate_numbers_of_iterations): Likewise
16586 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
16588 PR tree-optimization/110744
16589 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
16590 operand for ifn IFN_LEN_STORE.
16592 2023-07-21 liuhongt <hongtao.liu@intel.com>
16595 * common.opt: (fcf-protection=): Add EnumSet attribute to
16596 support combination of params.
16598 2023-07-21 David Malcolm <dmalcolm@redhat.com>
16600 PR middle-end/110612
16601 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
16603 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
16604 (table_geometry::table_y_to_canvas_y): Likewise.
16605 * text-art/table.h (table_geometry::m_table): Drop unused field.
16606 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
16609 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
16612 * config/i386/i386-features.cc
16613 (general_scalar_chain::compute_convert_gain): Calculate gain
16614 for extend higpart case.
16615 (general_scalar_chain::convert_op): Handle
16616 ASHIFTRT/ASHIFT combined RTX.
16617 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
16618 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
16619 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
16620 New define_insn_and_split pattern.
16621 (*extendv2di2_highpart_stv): Ditto.
16623 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
16625 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
16628 2023-07-20 Andrew Pinski <apinski@marvell.com>
16630 * combine.cc (dump_combine_stats): Remove.
16631 (dump_combine_total_stats): Remove.
16632 (total_attempts, total_merges, total_extras,
16633 total_successes): Remove.
16634 (combine_instructions): Don't increment total stats
16635 instead use statistics_counter_event.
16636 * dumpfile.cc (print_combine_total_stats): Remove.
16637 * dumpfile.h (print_combine_total_stats): Remove.
16638 (dump_combine_total_stats): Remove.
16639 * passes.cc (finish_optimization_passes):
16640 Don't call print_combine_total_stats.
16641 * rtl.h (dump_combine_total_stats): Remove.
16642 (dump_combine_stats): Remove.
16644 2023-07-20 Jan Hubicka <jh@suse.cz>
16646 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
16649 2023-07-20 Martin Jambor <mjambor@suse.cz>
16651 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
16652 (analyzer-text-art-ideal-canvas-width): Likewise.
16653 (analyzer-text-art-string-ellipsis-head-len): Likewise.
16654 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
16656 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16658 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
16659 Refine code structure.
16661 2023-07-20 Jan Hubicka <jh@suse.cz>
16663 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
16664 (get_range_query): ... this one; do
16665 (static_loop_exit): Add query parametr, turn ranger to reference.
16666 (loop_static_stmt_p): New function.
16667 (loop_static_op_p): New function.
16668 (loop_iv_derived_p): Remove.
16669 (loop_combined_static_and_iv_p): New function.
16670 (should_duplicate_loop_header_p): Discover combined onditionals;
16671 do not track iv derived; improve dumps.
16672 (pass_ch::execute): Fix whitespace.
16674 2023-07-20 Richard Biener <rguenther@suse.de>
16676 PR tree-optimization/110204
16677 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
16678 Look through copies generated by PRE.
16680 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
16682 * tree-vect-stmts.cc (get_group_load_store_type): Account for
16683 `gap` when checking if need to peel twice.
16685 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
16687 PR middle-end/77928
16688 * doc/extend.texi: Document iseqsig builtin.
16689 * builtins.cc (fold_builtin_iseqsig): New function.
16690 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
16691 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
16692 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
16694 2023-07-20 Pan Li <pan2.li@intel.com>
16696 * config/riscv/vector.md: Fix incorrect match_operand.
16698 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
16700 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
16701 force_reg, to use SUBREG rather than create a new pseudo when
16702 inserting DFmode fields into TImode with insvti_{high,low}part.
16703 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
16704 define_insn_and_split...
16705 (*concatditi3_3): 64-bit implementation. Provide alternative
16706 that allows register allocation to use SSE registers that is
16707 split into vec_concatv2di after reload.
16708 (*concatsidi3_3): 32-bit implementation.
16710 2023-07-20 Richard Biener <rguenther@suse.de>
16712 PR middle-end/61747
16713 * internal-fn.cc (expand_vec_cond_optab_fn): When the
16714 value operands are equal to the original comparison operands
16715 preserve that equality by re-using the comparison expansion.
16716 * optabs.cc (emit_conditional_move): When the value operands
16717 are equal to the comparison operands and would be forced to
16718 a register by prepare_cmp_insn do so earlier, preserving the
16721 2023-07-20 Pan Li <pan2.li@intel.com>
16723 * config/riscv/vector.md: Align pattern format.
16725 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
16727 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
16728 Granite Rapids{, D} from documentation.
16730 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16732 * config/riscv/autovec.md
16733 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
16734 Refactor RVV machine modes.
16735 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
16736 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
16737 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
16738 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
16739 (len_mask_gather_load<mode><mode>): Ditto.
16740 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
16741 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
16742 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
16743 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
16744 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
16745 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
16746 (len_mask_scatter_store<mode><mode>): Ditto.
16747 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
16748 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
16749 (ADJUST_NUNITS): Ditto.
16750 (ADJUST_ALIGNMENT): Ditto.
16751 (ADJUST_BYTESIZE): Ditto.
16752 (ADJUST_PRECISION): Ditto.
16753 (RVV_MODES): Ditto.
16754 (RVV_WHOLE_MODES): Ditto.
16755 (RVV_FRACT_MODE): Ditto.
16756 (RVV_NF8_MODES): Ditto.
16757 (RVV_NF4_MODES): Ditto.
16758 (VECTOR_MODES_WITH_PREFIX): Ditto.
16759 (VECTOR_MODE_WITH_PREFIX): Ditto.
16760 (RVV_TUPLE_MODES): Ditto.
16761 (RVV_NF2_MODES): Ditto.
16762 (RVV_TUPLE_PARTIAL_MODES): Ditto.
16763 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
16765 (TUPLE_ENTRY): Ditto.
16766 (get_vlmul): Ditto.
16768 (get_ratio): Ditto.
16769 (preferred_simd_mode): Ditto.
16770 (autovectorize_vector_modes): Ditto.
16771 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
16772 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
16773 (vbool64_t): Ditto.
16774 (vbool32_t): Ditto.
16775 (vbool16_t): Ditto.
16780 (vint8mf8_t): Ditto.
16781 (vuint8mf8_t): Ditto.
16782 (vint8mf4_t): Ditto.
16783 (vuint8mf4_t): Ditto.
16784 (vint8mf2_t): Ditto.
16785 (vuint8mf2_t): Ditto.
16786 (vint8m1_t): Ditto.
16787 (vuint8m1_t): Ditto.
16788 (vint8m2_t): Ditto.
16789 (vuint8m2_t): Ditto.
16790 (vint8m4_t): Ditto.
16791 (vuint8m4_t): Ditto.
16792 (vint8m8_t): Ditto.
16793 (vuint8m8_t): Ditto.
16794 (vint16mf4_t): Ditto.
16795 (vuint16mf4_t): Ditto.
16796 (vint16mf2_t): Ditto.
16797 (vuint16mf2_t): Ditto.
16798 (vint16m1_t): Ditto.
16799 (vuint16m1_t): Ditto.
16800 (vint16m2_t): Ditto.
16801 (vuint16m2_t): Ditto.
16802 (vint16m4_t): Ditto.
16803 (vuint16m4_t): Ditto.
16804 (vint16m8_t): Ditto.
16805 (vuint16m8_t): Ditto.
16806 (vint32mf2_t): Ditto.
16807 (vuint32mf2_t): Ditto.
16808 (vint32m1_t): Ditto.
16809 (vuint32m1_t): Ditto.
16810 (vint32m2_t): Ditto.
16811 (vuint32m2_t): Ditto.
16812 (vint32m4_t): Ditto.
16813 (vuint32m4_t): Ditto.
16814 (vint32m8_t): Ditto.
16815 (vuint32m8_t): Ditto.
16816 (vint64m1_t): Ditto.
16817 (vuint64m1_t): Ditto.
16818 (vint64m2_t): Ditto.
16819 (vuint64m2_t): Ditto.
16820 (vint64m4_t): Ditto.
16821 (vuint64m4_t): Ditto.
16822 (vint64m8_t): Ditto.
16823 (vuint64m8_t): Ditto.
16824 (vfloat16mf4_t): Ditto.
16825 (vfloat16mf2_t): Ditto.
16826 (vfloat16m1_t): Ditto.
16827 (vfloat16m2_t): Ditto.
16828 (vfloat16m4_t): Ditto.
16829 (vfloat16m8_t): Ditto.
16830 (vfloat32mf2_t): Ditto.
16831 (vfloat32m1_t): Ditto.
16832 (vfloat32m2_t): Ditto.
16833 (vfloat32m4_t): Ditto.
16834 (vfloat32m8_t): Ditto.
16835 (vfloat64m1_t): Ditto.
16836 (vfloat64m2_t): Ditto.
16837 (vfloat64m4_t): Ditto.
16838 (vfloat64m8_t): Ditto.
16839 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
16840 (TUPLE_ENTRY): Ditto.
16841 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
16842 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
16843 (riscv_v_adjust_nunits): Ditto.
16844 (riscv_v_adjust_bytesize): Ditto.
16845 (riscv_v_adjust_precision): Ditto.
16846 (riscv_convert_vector_bits): Ditto.
16847 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
16848 * config/riscv/riscv.md: Ditto.
16849 * config/riscv/vector-iterators.md: Ditto.
16850 * config/riscv/vector.md
16851 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
16852 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
16853 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
16854 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
16855 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
16856 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
16857 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
16858 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
16859 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
16860 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
16861 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
16862 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
16863 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
16864 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
16865 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
16866 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
16867 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
16868 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
16869 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
16870 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
16871 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
16872 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
16873 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
16874 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
16875 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
16876 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
16877 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
16878 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
16879 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
16880 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
16881 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
16882 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
16883 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
16885 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
16887 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
16888 (lra_asm_insn_error): New prototype.
16889 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
16891 (lra_spill): Call lra_update_fp2sp_elimination.
16892 * lra-eliminations.cc: Remove trailing spaces.
16893 (elimination_fp2sp_occured_p): New static flag.
16894 (lra_eliminate_regs_1): Set the flag up.
16895 (update_reg_eliminate): Modify the assert for stack to frame
16896 pointer elimination.
16897 (lra_update_fp2sp_elimination): New function.
16898 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
16900 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
16902 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
16904 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
16905 dependencies from target pragmas.
16906 * config/aarch64/arm_fp16.h (target): Likewise.
16907 * config/aarch64/arm_neon.h (target): Likewise.
16909 2023-07-19 Andrew Pinski <apinski@marvell.com>
16911 PR tree-optimization/110252
16912 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
16913 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
16914 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
16915 (match_simplify_replacement): Temporarily
16916 remove the flow sensitive info on the two statements that might
16919 2023-07-19 Andrew Pinski <apinski@marvell.com>
16921 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
16922 with flow_sensitive_info_storage.
16923 (follow_outer_ssa_edges): Update how to save off the flow
16925 (maybe_fold_comparisons_from_match_pd): Update restoring
16926 of flow sensitive info.
16927 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
16928 (flow_sensitive_info_storage::restore): New method.
16929 (flow_sensitive_info_storage::save_and_clear): New method.
16930 (flow_sensitive_info_storage::clear_storage): New method.
16931 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
16933 2023-07-19 Andrew Pinski <apinski@marvell.com>
16935 PR tree-optimization/110726
16936 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
16937 Add checks to make sure the type was one bit precision
16940 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16942 * doc/md.texi: Add mask_len_fold_left_plus.
16943 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
16944 (expand_mask_len_fold_left_optab_fn): Ditto.
16945 (direct_mask_len_fold_left_optab_supported_p): Ditto.
16946 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
16947 * optabs.def (OPTAB_D): Ditto.
16949 2023-07-19 Jakub Jelinek <jakub@redhat.com>
16951 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
16953 2023-07-19 Jakub Jelinek <jakub@redhat.com>
16955 PR tree-optimization/110731
16956 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
16957 divisor as UNSIGNED regardless of sgn.
16959 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
16961 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
16962 (standard_extensions_p): Add check.
16963 (riscv_subset_list::add): Just return NULL if it failed before.
16964 (riscv_subset_list::parse_std_ext): Continue parse when find a error
16965 (riscv_subset_list::parse): Just return NULL if it failed before.
16966 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
16968 2023-07-19 Jan Beulich <jbeulich@suse.com>
16970 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
16972 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
16973 gen_vec_extract_hi.
16974 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
16975 gen_vec_interleave_low. Rename local variable.
16977 2023-07-19 Jan Beulich <jbeulich@suse.com>
16979 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
16980 alternative. Move AVX512VL part of condition to new "enabled"
16983 2023-07-19 liuhongt <hongtao.liu@intel.com>
16986 * config/i386/i386-builtins.cc
16987 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
16988 (ix86_register_bf16_builtin_type): Ditto.
16989 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
16990 isn't available, undef the macros which are used to check the
16991 backend support of the _Float16/__bf16 types when building
16992 libstdc++ and libgcc.
16993 * config/i386/i386.cc (construct_container): Issue errors for
16994 HFmode/BFmode when TARGET_SSE2 is not available.
16995 (function_value_32): Ditto.
16996 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
16997 (ix86_libgcc_floating_mode_supported_p): Ditto.
16998 (ix86_emit_support_tinfos): Adjust codes.
16999 (ix86_invalid_conversion): Return diagnostic message string
17000 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
17001 (ix86_invalid_unary_op): New function.
17002 (ix86_invalid_binary_op): Ditto.
17003 (TARGET_INVALID_UNARY_OP): Define.
17004 (TARGET_INVALID_BINARY_OP): Define.
17005 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
17006 related instrinsics header files.
17007 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
17009 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
17011 * dwarf2asm.cc: Change FALSE to false.
17012 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
17013 * dwarf2out.cc (matches_main_base): Change return type from
17014 int to bool. Change "last_match" variable to bool.
17015 (dump_struct_debug): Change return type from int to bool.
17016 Change "matches" and "result" function arguments to bool.
17017 (is_pseudo_reg): Change return type from int to bool.
17018 (is_tagged_type): Ditto.
17019 (same_loc_p): Ditto.
17020 (same_dw_val_p): Change return type from int to bool and adjust
17021 function body accordingly.
17022 (same_attr_p): Ditto.
17023 (same_die_p): Ditto.
17024 (is_type_die): Ditto.
17025 (is_declaration_die): Ditto.
17026 (should_move_die_to_comdat): Ditto.
17027 (is_base_type): Ditto.
17028 (is_based_loc): Ditto.
17029 (local_scope_p): Ditto.
17030 (class_scope_p): Ditto.
17031 (class_or_namespace_scope_p): Ditto.
17032 (is_tagged_type): Ditto.
17033 (is_rust): Use void argument.
17034 (is_nested_in_subprogram): Change return type from int to bool.
17035 (contains_subprogram_definition): Ditto.
17036 (gen_struct_or_union_type_die): Change "nested", "complete"
17037 and "ns_decl" variables to bool.
17038 (is_naming_typedef_decl): Change FALSE to false.
17040 2023-07-18 Jan Hubicka <jh@suse.cz>
17042 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
17043 for queries not in headers.
17044 (static_loop_exit): Add basic blck parameter; update use of
17046 (should_duplicate_loop_header_p): Add ranger and static_exits
17047 parameter. Do not account statements that will be optimized
17048 out after duplicaiton in overall size. Add ranger query to
17050 (update_profile_after_ch): Take static_exits has set instead of
17051 single eliminated_edge.
17052 (ch_base::copy_headers): Do all analysis in the first pass;
17053 remember invariant_exits and static_exits.
17055 2023-07-18 Jason Merrill <jason@redhat.com>
17057 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
17059 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
17061 * doc/gm2.texi (Semantic checking): Change example testwithptr
17064 2023-07-18 Richard Biener <rguenther@suse.de>
17066 PR middle-end/105715
17067 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
17068 (pass_gimple_isel::execute): ... this. Duplicate
17069 comparison defs of COND_EXPRs.
17071 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17073 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
17074 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
17075 (riscv_convert_vector_bits): Ditto.
17077 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17079 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
17080 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
17082 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
17084 * config/s390/vx-builtins.md: New vsel pattern.
17086 2023-07-18 liuhongt <hongtao.liu@intel.com>
17089 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
17090 Remove # from assemble output.
17092 2023-07-18 liuhongt <hongtao.liu@intel.com>
17095 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
17096 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
17097 3 define_peephole2 after the pattern.
17099 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17101 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
17103 2023-07-18 Pan Li <pan2.li@intel.com>
17104 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17106 * config/riscv/riscv.cc (struct machine_function): Add new field.
17107 (riscv_static_frm_mode_p): New function.
17108 (riscv_emit_frm_mode_set): New function for emit FRM.
17109 (riscv_emit_mode_set): Extract function for FRM.
17110 (riscv_mode_needed): Fix the TODO.
17111 (riscv_mode_entry): Initial dynamic frm RTL.
17112 (riscv_mode_exit): Return DYN_EXIT.
17113 * config/riscv/riscv.md: Add rdfrm.
17114 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
17115 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
17117 (fsrmsi_backup): New pattern for swap.
17118 (fsrmsi_restore): New pattern for restore.
17119 (fsrmsi_restore_exit): New pattern for restore exit.
17120 (frrmsi): New pattern for backup.
17122 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
17124 * doc/extend.texi: Add @cindex on __auto_type.
17126 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
17128 * combine-stack-adj.cc (stack_memref_p): Change return type from
17129 int to bool and adjust function body accordingly.
17130 (rest_of_handle_stack_adjustments): Change return type to void.
17132 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
17134 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
17135 (cant_combine_insn_p): Change return type from int to bool and adjust
17136 function body accordingly.
17137 (can_combine_p): Ditto.
17138 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
17139 function arguments from int to bool.
17140 (contains_muldiv): Change return type from int to bool and adjust
17141 function body accordingly.
17142 (try_combine): Ditto. Change "new_direct_jump" pointer function
17143 argument from int to bool. Change "substed_i2", "substed_i1",
17144 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
17145 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
17146 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
17147 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
17148 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
17149 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
17151 (subst): Change "in_dest", "in_cond" and "unique_copy" function
17152 arguments from int to bool.
17153 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
17154 arguments from int to bool.
17155 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
17156 function argument from int to bool.
17157 (force_int_to_mode): Change "just_select" function argument
17158 from int to bool. Change "next_select" variable to bool.
17159 (rtx_equal_for_field_assignment_p): Change return type from
17160 int to bool and adjust function body accordingly.
17161 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
17162 argument from int to bool.
17163 (get_last_value_validate): Change return type from int to bool
17164 and adjust function body accordingly.
17165 (reg_dead_at_p): Ditto.
17166 (reg_bitfield_target_p): Ditto.
17167 (combine_instructions): Ditto. Change "new_direct_jump"
17169 (can_combine_p): Change return type from int to bool
17170 and adjust function body accordingly.
17171 (likely_spilled_retval_p): Ditto.
17172 (can_change_dest_mode): Change "added_sets" function argument
17174 (find_split_point): Change "unsignedp" variable to bool.
17175 (simplify_if_then_else): Change "comparison_p" and "swapped"
17177 (simplify_set): Change "other_changed" variable to bool.
17178 (expand_compound_operation): Change "unsignedp" variable to bool.
17179 (force_to_mode): Change "just_select" function argument
17180 from int to bool. Change "next_select" variable to bool.
17181 (extended_count): Change "unsignedp" function argument to bool.
17182 (simplify_shift_const_1): Change "complement_p" variable to bool.
17183 (simplify_comparison): Change "changed" variable to bool.
17184 (rest_of_handle_combine): Change return type to void.
17186 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17189 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
17191 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
17193 * ira.cc (setup_reg_class_relations): Continue
17194 if regclass cl3 is hard_reg_set_empty_p.
17196 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17198 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
17200 2023-07-17 Martin Jambor <mjambor@suse.cz>
17202 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
17205 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
17207 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
17209 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
17212 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
17213 recur add all implied extensions.
17214 (riscv_subset_list::check_implied_ext): Add new method.
17215 (riscv_subset_list::parse): Call checker check_implied_ext.
17216 * config/riscv/riscv-subset.h: Add new method.
17218 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17220 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
17221 (reduc_smax_scal_<mode>): Ditto.
17222 (reduc_umax_scal_<mode>): Ditto.
17223 (reduc_smin_scal_<mode>): Ditto.
17224 (reduc_umin_scal_<mode>): Ditto.
17225 (reduc_and_scal_<mode>): Ditto.
17226 (reduc_ior_scal_<mode>): Ditto.
17227 (reduc_xor_scal_<mode>): Ditto.
17228 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
17229 (expand_reduction): New function.
17230 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
17231 (emit_vlmax_fp_reduction_insn): Ditto.
17232 (get_m1_mode): Ditto.
17233 (expand_cond_len_binop): Fix name.
17234 (expand_reduction): New function
17235 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
17236 (validate_change_or_fail): New function.
17237 (change_insn): Fix VSETVL BUG.
17238 (change_vsetvl_insn): Ditto.
17239 (pass_vsetvl::backward_demand_fusion): Ditto.
17240 (pass_vsetvl::df_post_optimization): Ditto.
17242 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
17244 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
17246 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
17248 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
17249 Remove parameter name from declaration of unused parameter.
17251 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
17253 PR tree-optimization/110652
17254 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
17257 2023-07-17 Richard Biener <rguenther@suse.de>
17259 PR tree-optimization/110669
17260 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
17261 Check we matched a header PHI.
17263 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
17265 * tree-ssanames.cc (set_bitmask): New.
17266 * tree-ssanames.h (set_bitmask): New.
17268 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
17270 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
17272 * value-range.h (irange_bitmask::union_): Normalize beforehand.
17273 (irange_bitmask::intersect): Same.
17275 2023-07-17 Andrew Pinski <apinski@marvell.com>
17277 PR tree-optimization/95923
17278 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
17280 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
17282 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
17283 to the std::sort comparison lambda function const.
17285 2023-07-17 Andrew Pinski <apinski@marvell.com>
17287 PR tree-optimization/110666
17288 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
17290 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
17292 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
17293 Arrow Lake and Arrow Lake S.
17294 * common/config/i386/i386-common.cc:
17295 (processor_name): Add arrowlake.
17296 (processor_alias_table): Add arrow lake, arrow lake s and lunar
17298 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
17299 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
17300 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
17301 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
17303 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
17305 * config/i386/i386-options.cc (m_ARROWLAKE): New.
17306 (processor_cost_table): Add arrowlake.
17307 * config/i386/i386.h (enum processor_type):
17308 Add PROCESSOR_ARROWLAKE.
17309 * config/i386/x86-tune.def: Add m_ARROWLAKE.
17310 * doc/extend.texi: Add arrowlake and arrowlake-s.
17311 * doc/invoke.texi: Ditto.
17313 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
17315 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
17316 have the same iterator. Also renaming all the occurence to
17318 (usdot_prod<mode>): New define_expand.
17319 (udot_prod<mode>): Ditto.
17321 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
17323 * common/config/i386/cpuinfo.h (get_available_features):
17325 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
17326 OPTION_MASK_ISA2_SM4_UNSET): New.
17327 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
17328 (ix86_handle_option): Handle -msm4.
17329 * common/config/i386/i386-cpuinfo.h (enum processor_features):
17331 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
17333 * config.gcc: Add sm4intrin.h.
17334 * config/i386/cpuid.h (bit_SM4): New.
17335 * config/i386/i386-builtin.def (BDESC): Add new builtins.
17336 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
17338 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
17339 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
17340 (ix86_valid_target_attribute_inner_p): Handle sm4.
17341 * config/i386/i386.opt: Add option -msm4.
17342 * config/i386/immintrin.h: Include sm4intrin.h
17343 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
17344 (vsm4rnds4_<mode>): Ditto.
17345 * doc/extend.texi: Document sm4.
17346 * doc/invoke.texi: Document -msm4.
17347 * doc/sourcebuild.texi: Document target sm4.
17348 * config/i386/sm4intrin.h: New file.
17350 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
17352 * common/config/i386/cpuinfo.h (get_available_features):
17354 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
17355 OPTION_MASK_ISA2_SHA512_UNSET): New.
17356 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
17357 (ix86_handle_option): Handle -msha512.
17358 * common/config/i386/i386-cpuinfo.h (enum processor_features):
17359 Add FEATURE_SHA512.
17360 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
17362 * config.gcc: Add sha512intrin.h.
17363 * config/i386/cpuid.h (bit_SHA512): New.
17364 * config/i386/i386-builtin-types.def:
17365 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
17366 * config/i386/i386-builtin.def (BDESC): Add new builtins.
17367 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
17369 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
17370 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
17371 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
17372 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
17373 (ix86_valid_target_attribute_inner_p): Handle sha512.
17374 * config/i386/i386.opt: Add option -msha512.
17375 * config/i386/immintrin.h: Include sha512intrin.h.
17376 * config/i386/sse.md (vsha512msg1): New define insn.
17377 (vsha512msg2): Ditto.
17378 (vsha512rnds2): Ditto.
17379 * doc/extend.texi: Document sha512.
17380 * doc/invoke.texi: Document -msha512.
17381 * doc/sourcebuild.texi: Document target sha512.
17382 * config/i386/sha512intrin.h: New file.
17384 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
17386 * common/config/i386/cpuinfo.h (get_available_features):
17388 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
17389 OPTION_MASK_ISA2_SM3_UNSET): New.
17390 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
17391 (ix86_handle_option): Handle -msm3.
17392 * common/config/i386/i386-cpuinfo.h (enum processor_features):
17394 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
17396 * config.gcc: Add sm3intrin.h
17397 * config/i386/cpuid.h (bit_SM3): New.
17398 * config/i386/i386-builtin-types.def:
17399 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
17400 * config/i386/i386-builtin.def (BDESC): Add new builtins.
17401 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
17403 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
17404 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
17405 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
17406 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
17407 (ix86_valid_target_attribute_inner_p): Handle sm3.
17408 * config/i386/i386.opt: Add option -msm3.
17409 * config/i386/immintrin.h: Include sm3intrin.h.
17410 * config/i386/sse.md (vsm3msg1): New define insn.
17412 (vsm3rnds2): Ditto.
17413 * doc/extend.texi: Document sm3.
17414 * doc/invoke.texi: Document -msm3.
17415 * doc/sourcebuild.texi: Document target sm3.
17416 * config/i386/sm3intrin.h: New file.
17418 2023-07-17 Kong Lingling <lingling.kong@intel.com>
17419 Haochen Jiang <haochen.jiang@intel.com>
17421 * common/config/i386/cpuinfo.h (get_available_features): Detect
17423 * common/config/i386/i386-common.cc
17424 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
17425 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
17426 (ix86_handle_option): Handle -mavxvnniint16.
17427 * common/config/i386/i386-cpuinfo.h (enum processor_features):
17428 Add FEATURE_AVXVNNIINT16.
17429 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
17431 * config.gcc: Add avxvnniint16.h.
17432 * config/i386/avxvnniint16intrin.h: New file.
17433 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
17434 * config/i386/i386-builtin.def: Add new builtins.
17435 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
17437 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
17438 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
17439 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
17440 * config/i386/i386.opt: Add option -mavxvnniint16.
17441 * config/i386/immintrin.h: Include avxvnniint16.h.
17442 * config/i386/sse.md
17443 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
17444 * doc/extend.texi: Document avxvnniint16.
17445 * doc/invoke.texi: Document -mavxvnniint16.
17446 * doc/sourcebuild.texi: Document target avxvnniint16.
17448 2023-07-16 Jan Hubicka <jh@suse.cz>
17450 PR middle-end/110649
17451 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
17452 (vect_transform_loop): Move scale_profile_for_vect_loop after
17453 upper bound updates.
17455 2023-07-16 Jan Hubicka <jh@suse.cz>
17457 PR tree-optimization/110649
17458 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
17459 probability of the if-then-else construct.
17461 2023-07-16 Jan Hubicka <jh@suse.cz>
17463 PR middle-end/110649
17464 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
17466 2023-07-15 Andrew Pinski <apinski@marvell.com>
17468 * doc/contrib.texi: Update my entry.
17470 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
17472 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
17474 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
17475 (tld_load): Likewise.
17476 (tgd_load_pic): Change to expander.
17477 (tld_load_pic, tld_offset_load, tp_load): Likewise.
17478 (tie_load_pic, tle_load): Likewise.
17479 (tgd_load_picsi, tgd_load_picdi): New.
17480 (tld_load_picsi, tld_load_picdi): New.
17481 (tld_offset_load<P:mode>): New.
17482 (tp_load<P:mode>): New.
17483 (tie_load_picsi, tie_load_picdi): New.
17484 (tle_load<P:mode>): New.
17486 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
17488 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
17489 (vcmlaq_rot180, vcmlaq_rot270): New.
17490 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
17491 (vcmlaq_rot180, vcmlaq_rot270): New.
17492 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
17493 (vcmlaq_rot180, vcmlaq_rot270): New.
17494 * config/arm/arm-mve-builtins.cc
17495 (function_instance::has_inactive_argument): Handle vcmlaq,
17496 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
17497 * config/arm/arm_mve.h (vcmlaq): Delete.
17498 (vcmlaq_rot180): Delete.
17499 (vcmlaq_rot270): Delete.
17500 (vcmlaq_rot90): Delete.
17501 (vcmlaq_m): Delete.
17502 (vcmlaq_rot180_m): Delete.
17503 (vcmlaq_rot270_m): Delete.
17504 (vcmlaq_rot90_m): Delete.
17505 (vcmlaq_f16): Delete.
17506 (vcmlaq_rot180_f16): Delete.
17507 (vcmlaq_rot270_f16): Delete.
17508 (vcmlaq_rot90_f16): Delete.
17509 (vcmlaq_f32): Delete.
17510 (vcmlaq_rot180_f32): Delete.
17511 (vcmlaq_rot270_f32): Delete.
17512 (vcmlaq_rot90_f32): Delete.
17513 (vcmlaq_m_f32): Delete.
17514 (vcmlaq_m_f16): Delete.
17515 (vcmlaq_rot180_m_f32): Delete.
17516 (vcmlaq_rot180_m_f16): Delete.
17517 (vcmlaq_rot270_m_f32): Delete.
17518 (vcmlaq_rot270_m_f16): Delete.
17519 (vcmlaq_rot90_m_f32): Delete.
17520 (vcmlaq_rot90_m_f16): Delete.
17521 (__arm_vcmlaq_f16): Delete.
17522 (__arm_vcmlaq_rot180_f16): Delete.
17523 (__arm_vcmlaq_rot270_f16): Delete.
17524 (__arm_vcmlaq_rot90_f16): Delete.
17525 (__arm_vcmlaq_f32): Delete.
17526 (__arm_vcmlaq_rot180_f32): Delete.
17527 (__arm_vcmlaq_rot270_f32): Delete.
17528 (__arm_vcmlaq_rot90_f32): Delete.
17529 (__arm_vcmlaq_m_f32): Delete.
17530 (__arm_vcmlaq_m_f16): Delete.
17531 (__arm_vcmlaq_rot180_m_f32): Delete.
17532 (__arm_vcmlaq_rot180_m_f16): Delete.
17533 (__arm_vcmlaq_rot270_m_f32): Delete.
17534 (__arm_vcmlaq_rot270_m_f16): Delete.
17535 (__arm_vcmlaq_rot90_m_f32): Delete.
17536 (__arm_vcmlaq_rot90_m_f16): Delete.
17537 (__arm_vcmlaq): Delete.
17538 (__arm_vcmlaq_rot180): Delete.
17539 (__arm_vcmlaq_rot270): Delete.
17540 (__arm_vcmlaq_rot90): Delete.
17541 (__arm_vcmlaq_m): Delete.
17542 (__arm_vcmlaq_rot180_m): Delete.
17543 (__arm_vcmlaq_rot270_m): Delete.
17544 (__arm_vcmlaq_rot90_m): Delete.
17546 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
17548 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
17549 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
17550 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
17551 (mve_insn): Add vcmla.
17552 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
17554 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
17556 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
17557 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
17558 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
17559 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
17561 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
17563 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
17565 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
17566 (vcmulq_rot180, vcmulq_rot270): New.
17567 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
17568 (vcmulq_rot180, vcmulq_rot270): New.
17569 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
17570 (vcmulq_rot180, vcmulq_rot270): New.
17571 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
17572 (vcmulq_rot270): Delete.
17573 (vcmulq_rot180): Delete.
17575 (vcmulq_m): Delete.
17576 (vcmulq_rot180_m): Delete.
17577 (vcmulq_rot270_m): Delete.
17578 (vcmulq_rot90_m): Delete.
17579 (vcmulq_x): Delete.
17580 (vcmulq_rot90_x): Delete.
17581 (vcmulq_rot180_x): Delete.
17582 (vcmulq_rot270_x): Delete.
17583 (vcmulq_rot90_f16): Delete.
17584 (vcmulq_rot270_f16): Delete.
17585 (vcmulq_rot180_f16): Delete.
17586 (vcmulq_f16): Delete.
17587 (vcmulq_rot90_f32): Delete.
17588 (vcmulq_rot270_f32): Delete.
17589 (vcmulq_rot180_f32): Delete.
17590 (vcmulq_f32): Delete.
17591 (vcmulq_m_f32): Delete.
17592 (vcmulq_m_f16): Delete.
17593 (vcmulq_rot180_m_f32): Delete.
17594 (vcmulq_rot180_m_f16): Delete.
17595 (vcmulq_rot270_m_f32): Delete.
17596 (vcmulq_rot270_m_f16): Delete.
17597 (vcmulq_rot90_m_f32): Delete.
17598 (vcmulq_rot90_m_f16): Delete.
17599 (vcmulq_x_f16): Delete.
17600 (vcmulq_x_f32): Delete.
17601 (vcmulq_rot90_x_f16): Delete.
17602 (vcmulq_rot90_x_f32): Delete.
17603 (vcmulq_rot180_x_f16): Delete.
17604 (vcmulq_rot180_x_f32): Delete.
17605 (vcmulq_rot270_x_f16): Delete.
17606 (vcmulq_rot270_x_f32): Delete.
17607 (__arm_vcmulq_rot90_f16): Delete.
17608 (__arm_vcmulq_rot270_f16): Delete.
17609 (__arm_vcmulq_rot180_f16): Delete.
17610 (__arm_vcmulq_f16): Delete.
17611 (__arm_vcmulq_rot90_f32): Delete.
17612 (__arm_vcmulq_rot270_f32): Delete.
17613 (__arm_vcmulq_rot180_f32): Delete.
17614 (__arm_vcmulq_f32): Delete.
17615 (__arm_vcmulq_m_f32): Delete.
17616 (__arm_vcmulq_m_f16): Delete.
17617 (__arm_vcmulq_rot180_m_f32): Delete.
17618 (__arm_vcmulq_rot180_m_f16): Delete.
17619 (__arm_vcmulq_rot270_m_f32): Delete.
17620 (__arm_vcmulq_rot270_m_f16): Delete.
17621 (__arm_vcmulq_rot90_m_f32): Delete.
17622 (__arm_vcmulq_rot90_m_f16): Delete.
17623 (__arm_vcmulq_x_f16): Delete.
17624 (__arm_vcmulq_x_f32): Delete.
17625 (__arm_vcmulq_rot90_x_f16): Delete.
17626 (__arm_vcmulq_rot90_x_f32): Delete.
17627 (__arm_vcmulq_rot180_x_f16): Delete.
17628 (__arm_vcmulq_rot180_x_f32): Delete.
17629 (__arm_vcmulq_rot270_x_f16): Delete.
17630 (__arm_vcmulq_rot270_x_f32): Delete.
17631 (__arm_vcmulq_rot90): Delete.
17632 (__arm_vcmulq_rot270): Delete.
17633 (__arm_vcmulq_rot180): Delete.
17634 (__arm_vcmulq): Delete.
17635 (__arm_vcmulq_m): Delete.
17636 (__arm_vcmulq_rot180_m): Delete.
17637 (__arm_vcmulq_rot270_m): Delete.
17638 (__arm_vcmulq_rot90_m): Delete.
17639 (__arm_vcmulq_x): Delete.
17640 (__arm_vcmulq_rot90_x): Delete.
17641 (__arm_vcmulq_rot180_x): Delete.
17642 (__arm_vcmulq_rot270_x): Delete.
17644 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
17646 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
17647 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
17648 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
17649 (MVE_VCADDQ_VCMULQ_M): New.
17650 (mve_insn): Add vcmul.
17651 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
17654 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
17656 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
17657 @mve_<mve_insn>q<mve_rot>_f<mode>.
17658 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
17659 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
17660 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
17662 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
17664 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
17665 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
17666 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
17667 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
17668 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
17669 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
17670 * config/arm/arm-mve-builtins-functions.h (class
17671 unspec_mve_function_exact_insn_rot): New.
17672 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
17673 (vcaddq_rot270): Delete.
17674 (vhcaddq_rot90): Delete.
17675 (vhcaddq_rot270): Delete.
17676 (vcaddq_rot270_m): Delete.
17677 (vcaddq_rot90_m): Delete.
17678 (vhcaddq_rot270_m): Delete.
17679 (vhcaddq_rot90_m): Delete.
17680 (vcaddq_rot90_x): Delete.
17681 (vcaddq_rot270_x): Delete.
17682 (vhcaddq_rot90_x): Delete.
17683 (vhcaddq_rot270_x): Delete.
17684 (vcaddq_rot90_u8): Delete.
17685 (vcaddq_rot270_u8): Delete.
17686 (vhcaddq_rot90_s8): Delete.
17687 (vhcaddq_rot270_s8): Delete.
17688 (vcaddq_rot90_s8): Delete.
17689 (vcaddq_rot270_s8): Delete.
17690 (vcaddq_rot90_u16): Delete.
17691 (vcaddq_rot270_u16): Delete.
17692 (vhcaddq_rot90_s16): Delete.
17693 (vhcaddq_rot270_s16): Delete.
17694 (vcaddq_rot90_s16): Delete.
17695 (vcaddq_rot270_s16): Delete.
17696 (vcaddq_rot90_u32): Delete.
17697 (vcaddq_rot270_u32): Delete.
17698 (vhcaddq_rot90_s32): Delete.
17699 (vhcaddq_rot270_s32): Delete.
17700 (vcaddq_rot90_s32): Delete.
17701 (vcaddq_rot270_s32): Delete.
17702 (vcaddq_rot90_f16): Delete.
17703 (vcaddq_rot270_f16): Delete.
17704 (vcaddq_rot90_f32): Delete.
17705 (vcaddq_rot270_f32): Delete.
17706 (vcaddq_rot270_m_s8): Delete.
17707 (vcaddq_rot270_m_s32): Delete.
17708 (vcaddq_rot270_m_s16): Delete.
17709 (vcaddq_rot270_m_u8): Delete.
17710 (vcaddq_rot270_m_u32): Delete.
17711 (vcaddq_rot270_m_u16): Delete.
17712 (vcaddq_rot90_m_s8): Delete.
17713 (vcaddq_rot90_m_s32): Delete.
17714 (vcaddq_rot90_m_s16): Delete.
17715 (vcaddq_rot90_m_u8): Delete.
17716 (vcaddq_rot90_m_u32): Delete.
17717 (vcaddq_rot90_m_u16): Delete.
17718 (vhcaddq_rot270_m_s8): Delete.
17719 (vhcaddq_rot270_m_s32): Delete.
17720 (vhcaddq_rot270_m_s16): Delete.
17721 (vhcaddq_rot90_m_s8): Delete.
17722 (vhcaddq_rot90_m_s32): Delete.
17723 (vhcaddq_rot90_m_s16): Delete.
17724 (vcaddq_rot270_m_f32): Delete.
17725 (vcaddq_rot270_m_f16): Delete.
17726 (vcaddq_rot90_m_f32): Delete.
17727 (vcaddq_rot90_m_f16): Delete.
17728 (vcaddq_rot90_x_s8): Delete.
17729 (vcaddq_rot90_x_s16): Delete.
17730 (vcaddq_rot90_x_s32): Delete.
17731 (vcaddq_rot90_x_u8): Delete.
17732 (vcaddq_rot90_x_u16): Delete.
17733 (vcaddq_rot90_x_u32): Delete.
17734 (vcaddq_rot270_x_s8): Delete.
17735 (vcaddq_rot270_x_s16): Delete.
17736 (vcaddq_rot270_x_s32): Delete.
17737 (vcaddq_rot270_x_u8): Delete.
17738 (vcaddq_rot270_x_u16): Delete.
17739 (vcaddq_rot270_x_u32): Delete.
17740 (vhcaddq_rot90_x_s8): Delete.
17741 (vhcaddq_rot90_x_s16): Delete.
17742 (vhcaddq_rot90_x_s32): Delete.
17743 (vhcaddq_rot270_x_s8): Delete.
17744 (vhcaddq_rot270_x_s16): Delete.
17745 (vhcaddq_rot270_x_s32): Delete.
17746 (vcaddq_rot90_x_f16): Delete.
17747 (vcaddq_rot90_x_f32): Delete.
17748 (vcaddq_rot270_x_f16): Delete.
17749 (vcaddq_rot270_x_f32): Delete.
17750 (__arm_vcaddq_rot90_u8): Delete.
17751 (__arm_vcaddq_rot270_u8): Delete.
17752 (__arm_vhcaddq_rot90_s8): Delete.
17753 (__arm_vhcaddq_rot270_s8): Delete.
17754 (__arm_vcaddq_rot90_s8): Delete.
17755 (__arm_vcaddq_rot270_s8): Delete.
17756 (__arm_vcaddq_rot90_u16): Delete.
17757 (__arm_vcaddq_rot270_u16): Delete.
17758 (__arm_vhcaddq_rot90_s16): Delete.
17759 (__arm_vhcaddq_rot270_s16): Delete.
17760 (__arm_vcaddq_rot90_s16): Delete.
17761 (__arm_vcaddq_rot270_s16): Delete.
17762 (__arm_vcaddq_rot90_u32): Delete.
17763 (__arm_vcaddq_rot270_u32): Delete.
17764 (__arm_vhcaddq_rot90_s32): Delete.
17765 (__arm_vhcaddq_rot270_s32): Delete.
17766 (__arm_vcaddq_rot90_s32): Delete.
17767 (__arm_vcaddq_rot270_s32): Delete.
17768 (__arm_vcaddq_rot270_m_s8): Delete.
17769 (__arm_vcaddq_rot270_m_s32): Delete.
17770 (__arm_vcaddq_rot270_m_s16): Delete.
17771 (__arm_vcaddq_rot270_m_u8): Delete.
17772 (__arm_vcaddq_rot270_m_u32): Delete.
17773 (__arm_vcaddq_rot270_m_u16): Delete.
17774 (__arm_vcaddq_rot90_m_s8): Delete.
17775 (__arm_vcaddq_rot90_m_s32): Delete.
17776 (__arm_vcaddq_rot90_m_s16): Delete.
17777 (__arm_vcaddq_rot90_m_u8): Delete.
17778 (__arm_vcaddq_rot90_m_u32): Delete.
17779 (__arm_vcaddq_rot90_m_u16): Delete.
17780 (__arm_vhcaddq_rot270_m_s8): Delete.
17781 (__arm_vhcaddq_rot270_m_s32): Delete.
17782 (__arm_vhcaddq_rot270_m_s16): Delete.
17783 (__arm_vhcaddq_rot90_m_s8): Delete.
17784 (__arm_vhcaddq_rot90_m_s32): Delete.
17785 (__arm_vhcaddq_rot90_m_s16): Delete.
17786 (__arm_vcaddq_rot90_x_s8): Delete.
17787 (__arm_vcaddq_rot90_x_s16): Delete.
17788 (__arm_vcaddq_rot90_x_s32): Delete.
17789 (__arm_vcaddq_rot90_x_u8): Delete.
17790 (__arm_vcaddq_rot90_x_u16): Delete.
17791 (__arm_vcaddq_rot90_x_u32): Delete.
17792 (__arm_vcaddq_rot270_x_s8): Delete.
17793 (__arm_vcaddq_rot270_x_s16): Delete.
17794 (__arm_vcaddq_rot270_x_s32): Delete.
17795 (__arm_vcaddq_rot270_x_u8): Delete.
17796 (__arm_vcaddq_rot270_x_u16): Delete.
17797 (__arm_vcaddq_rot270_x_u32): Delete.
17798 (__arm_vhcaddq_rot90_x_s8): Delete.
17799 (__arm_vhcaddq_rot90_x_s16): Delete.
17800 (__arm_vhcaddq_rot90_x_s32): Delete.
17801 (__arm_vhcaddq_rot270_x_s8): Delete.
17802 (__arm_vhcaddq_rot270_x_s16): Delete.
17803 (__arm_vhcaddq_rot270_x_s32): Delete.
17804 (__arm_vcaddq_rot90_f16): Delete.
17805 (__arm_vcaddq_rot270_f16): Delete.
17806 (__arm_vcaddq_rot90_f32): Delete.
17807 (__arm_vcaddq_rot270_f32): Delete.
17808 (__arm_vcaddq_rot270_m_f32): Delete.
17809 (__arm_vcaddq_rot270_m_f16): Delete.
17810 (__arm_vcaddq_rot90_m_f32): Delete.
17811 (__arm_vcaddq_rot90_m_f16): Delete.
17812 (__arm_vcaddq_rot90_x_f16): Delete.
17813 (__arm_vcaddq_rot90_x_f32): Delete.
17814 (__arm_vcaddq_rot270_x_f16): Delete.
17815 (__arm_vcaddq_rot270_x_f32): Delete.
17816 (__arm_vcaddq_rot90): Delete.
17817 (__arm_vcaddq_rot270): Delete.
17818 (__arm_vhcaddq_rot90): Delete.
17819 (__arm_vhcaddq_rot270): Delete.
17820 (__arm_vcaddq_rot270_m): Delete.
17821 (__arm_vcaddq_rot90_m): Delete.
17822 (__arm_vhcaddq_rot270_m): Delete.
17823 (__arm_vhcaddq_rot90_m): Delete.
17824 (__arm_vcaddq_rot90_x): Delete.
17825 (__arm_vcaddq_rot270_x): Delete.
17826 (__arm_vhcaddq_rot90_x): Delete.
17827 (__arm_vhcaddq_rot270_x): Delete.
17829 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
17831 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
17832 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
17833 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
17834 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
17835 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
17836 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
17838 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
17839 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
17840 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
17841 VHCADDQ_ROT270_M_S.
17842 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
17843 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
17844 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
17845 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
17846 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
17847 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
17849 (VCADDQ_ROT270_M): Delete.
17850 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
17851 (VCADDQ_ROT90_M): Delete.
17852 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
17853 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
17855 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
17856 (mve_vcaddq<mve_rot><mode>): Rename into ...
17857 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
17858 (mve_vcaddq_rot270_m_<supf><mode>)
17859 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
17860 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
17861 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
17862 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
17864 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
17866 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
17869 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
17870 preparation statement over braces for a single statement.
17871 (*bt<mode>_setncqi): Likewise.
17872 (*bt<mode>_setncqi_2): New define_insn_and_split.
17874 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
17876 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
17877 case inserting of 64-bit values into a TImode register, to handle
17878 both DImode and DFmode using either *insvti_lowpart_1
17879 or *isnvti_highpart_1.
17881 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
17884 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
17885 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
17886 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
17887 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
17888 when the original source contains a paradoxical subreg.
17890 2023-07-14 Jan Hubicka <jh@suse.cz>
17892 * passes.cc (execute_function_todo): Remove
17893 TODO_rebuild_frequencies
17894 * passes.def: Add rebuild_frequencies pass.
17895 * predict.cc (estimate_bb_frequencies): Drop
17897 (tree_estimate_probability): Update call of
17898 estimate_bb_frequencies.
17899 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
17900 first and do not rebuild if not necessary.
17901 (class pass_rebuild_frequencies): New.
17902 (make_pass_rebuild_frequencies): New.
17903 * profile-count.h: Add profile_count::very_large_p.
17904 * tree-inline.cc (optimize_inline_calls): Do not return
17905 TODO_rebuild_frequencies
17906 * tree-pass.h (TODO_rebuild_frequencies): Remove.
17907 (make_pass_rebuild_frequencies): Declare.
17909 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17911 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
17912 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17913 (expand_cond_len_ternop): New function.
17914 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
17915 (expand_cond_len_ternop): Ditto.
17917 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
17920 * config/bpf/bpf.md: Enable instruction scheduling.
17922 2023-07-14 Tamar Christina <tamar.christina@arm.com>
17924 PR tree-optimization/109154
17925 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
17926 (struct bb_predicate): Add no_predicate_stmts.
17927 (set_bb_predicate): Increase predicate count.
17928 (set_bb_predicate_gimplified_stmts): Conditionally initialize
17929 no_predicate_stmts.
17930 (get_bb_num_predicate_stmts): New.
17931 (init_bb_predicate): Initialzie no_predicate_stmts.
17932 (release_bb_predicate): Cleanup no_predicate_stmts.
17933 (insert_gimplified_predicates): Preserve no_predicate_stmts.
17935 2023-07-14 Tamar Christina <tamar.christina@arm.com>
17937 PR tree-optimization/109154
17938 * tree-if-conv.cc (gen_simplified_condition,
17939 gen_phi_nest_statement): New.
17940 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
17942 2023-07-14 Richard Biener <rguenther@suse.de>
17944 * gimple.h (gimple_phi_arg): New const overload.
17945 (gimple_phi_arg_def): Make gimple arg const.
17946 (gimple_phi_arg_def_from_edge): New inline function.
17947 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
17949 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
17950 new inline function.
17951 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
17953 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
17955 * common/config/riscv/riscv-common.cc:
17956 (riscv_implied_info): Add zihintntl item.
17957 (riscv_ext_version_table): Ditto.
17958 (riscv_ext_flag_table): Ditto.
17959 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
17960 (TARGET_ZIHINTNTL): Ditto.
17962 2023-07-14 Die Li <lidie@eswincomputing.com>
17964 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
17966 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
17969 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
17970 used by the address of the following memory operand.
17972 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
17975 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
17976 deallocate alloca-only frame.
17978 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
17981 * config/darwin.h (DARWIN_PLATFORM_ID): New.
17982 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
17983 and SDK data to the static linker.
17985 2023-07-13 Carl Love <cel@us.ibm.com>
17987 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
17988 built-in definition return type.
17989 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
17990 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
17991 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
17992 argument to return FPSCR fields.
17993 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
17994 the return value. Add description for
17995 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
17997 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
18000 * config/alpha/alpha.cc (alpha_emit_set_long_const):
18001 Always use DImode when constructing long const.
18003 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
18005 * haifa-sched.cc: Change TRUE/FALSE to true/false.
18007 * lra-assigns.cc: Ditto.
18008 * lra-constraints.cc: Ditto.
18009 * sel-sched.cc: Ditto.
18011 2023-07-13 Andrew Pinski <apinski@marvell.com>
18013 PR tree-optimization/110293
18014 PR tree-optimization/110539
18015 * match.pd: Expand the `x != (typeof x)(x == 0)`
18016 pattern to handle where the inner and outer comparsions
18017 are either `!=` or `==` and handle other constants
18020 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
18022 PR middle-end/109520
18023 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
18024 (lra_asm_insn_error): New prototype.
18025 * lra.cc: Include rtl_error.h.
18026 (lra_set_insn_recog_data): Initialize asm_reloads_num.
18027 (lra_asm_insn_error): New func whose code is taken from ...
18028 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
18029 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
18031 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18033 * genmatch.cc (commutative_op): Add COND_LEN_*
18034 * internal-fn.cc (first_commutative_argument): Ditto.
18036 (get_unconditional_internal_fn): Ditto.
18037 (can_interpret_as_conditional_op_p): Ditto.
18038 (internal_fn_len_index): Ditto.
18039 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
18040 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
18041 (convert_mult_to_fma): Ditto.
18042 (math_opts_dom_walker::after_dom_children): Ditto.
18044 2023-07-13 Pan Li <pan2.li@intel.com>
18046 * config/riscv/riscv.cc (vxrm_rtx): New static var.
18048 (global_state_unknown_p): Removed.
18049 (riscv_entity_mode_after): Removed.
18050 (asm_insn_p): New function.
18051 (vxrm_unknown_p): New function for fixed-point.
18052 (riscv_vxrm_mode_after): Ditto.
18053 (frm_unknown_dynamic_p): New function for floating-point.
18054 (riscv_frm_mode_after): Ditto.
18055 (riscv_mode_after): Leverage new functions.
18057 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18059 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
18060 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
18061 calling vect_model_load_cost.
18063 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18065 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
18066 handle memory_access_type VMAT_CONTIGUOUS, remove some
18067 VMAT_CONTIGUOUS_PERMUTE related handlings.
18068 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
18069 without calling vect_model_load_cost.
18071 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18073 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
18074 VMAT_CONTIGUOUS_REVERSE any more.
18075 (vectorizable_load): Adjust the costing handling on
18076 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
18078 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18080 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
18081 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
18082 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
18083 assert it will never get VMAT_LOAD_STORE_LANES.
18085 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18087 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
18088 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
18089 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
18090 remove VMAT_GATHER_SCATTER related handlings and the related parameter
18093 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18095 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
18096 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
18097 vect_model_load_cost.
18098 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
18099 VMAT_STRIDED_SLP any more, and remove their related handlings.
18101 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18103 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
18104 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
18105 hoisting decision and without calling vect_model_load_cost.
18106 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
18107 and remove VMAT_INVARIANT related handlings.
18109 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18111 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
18112 on costing with one extra argument cost_vec.
18113 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
18114 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
18115 gs_info.decl set any more.
18117 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18119 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
18120 to vect_model_load_cost down to some different transform paths
18121 according to the handlings of different vect_memory_access_types.
18123 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
18125 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
18127 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18129 * config/riscv/autovec.md
18130 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
18131 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
18132 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
18133 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
18134 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
18135 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
18136 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
18137 (len_mask_gather_load<mode><mode>): Ditto.
18138 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
18139 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
18140 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
18141 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
18142 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
18143 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
18144 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
18145 (len_mask_scatter_store<mode><mode>): Ditto.
18146 * config/riscv/predicates.md (const_1_operand): New predicate.
18147 (vector_gs_scale_operand_16): Ditto.
18148 (vector_gs_scale_operand_32): Ditto.
18149 (vector_gs_scale_operand_64): Ditto.
18150 (vector_gs_extension_operand): Ditto.
18151 (vector_gs_scale_operand_16_rv32): Ditto.
18152 (vector_gs_scale_operand_32_rv32): Ditto.
18153 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
18154 (expand_gather_scatter): New function.
18155 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
18156 (emit_vlmax_masked_store_insn): New function.
18157 (emit_nonvlmax_masked_store_insn): Ditto.
18158 (modulo_sel_indices): Ditto.
18159 (expand_vec_perm): Fix SLP for gather/scatter.
18160 (prepare_gather_scatter): New function.
18161 (expand_gather_scatter): Ditto.
18162 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
18163 (subreg:SI (DI CONST_POLY_INT)).
18164 * config/riscv/vector-iterators.md: Add gather/scatter.
18165 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
18166 (@vec_duplicate<mode>): Ditto.
18167 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
18169 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
18171 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18173 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
18174 * config/riscv/riscv-protos.h (enum insn_type): New enum.
18175 (expand_cond_len_binop): New function.
18176 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
18177 (emit_nonvlmax_fp_tu_insn): Ditto.
18178 (need_fp_rounding_p): Ditto.
18179 (expand_cond_len_binop): Ditto.
18180 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
18181 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
18183 2023-07-12 Jan Hubicka <jh@suse.cz>
18185 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
18186 (gimple_duplicate_seme_region): ... this; break out profile updating
18188 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
18189 (ch_base::copy_headers): Update.
18190 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
18191 (gimple_duplicate_seme_region): ... this.
18193 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
18195 PR tree-optimization/107043
18196 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
18198 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
18200 PR tree-optimization/107053
18201 * gimple-range-op.cc (cfn_popcount): Use known set bits.
18203 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
18205 * ira.cc (equiv_init_varies_p): Change return type from int to bool
18206 and adjust function body accordingly.
18207 (equiv_init_movable_p): Ditto.
18208 (memref_used_between_p): Ditto.
18209 * lra-constraints.cc (valid_address_p): Ditto.
18211 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
18213 * range-op.cc (irange_to_masked_value): Remove.
18214 (update_known_bitmask): Update irange value/mask pair instead of
18215 only updating nonzero bits.
18217 2023-07-12 Jan Hubicka <jh@suse.cz>
18219 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
18220 parameter and rewrite profile updating code to handle edges elimination.
18221 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
18222 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
18223 (loop_iv_derived_p): New function.
18224 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
18225 of PHIs and propagation of IV derived variables.
18226 (ch_base::copy_headers): Pass around the invariant edges hash set.
18228 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
18230 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
18231 (last_active_insn): Change "skip_use_p" function argument to bool.
18232 (noce_operand_ok): Change return type from int to bool.
18233 (find_cond_trap): Ditto.
18234 (block_jumps_and_fallthru_p): Change "fallthru_p" and
18235 "jump_p" variables to bool.
18236 (noce_find_if_block): Change return type from int to bool.
18237 (cond_exec_find_if_block): Ditto.
18238 (find_if_case_1): Ditto.
18239 (find_if_case_2): Ditto.
18240 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
18241 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
18242 (cond_exec_process_insns): Change return type from int to bool.
18243 Change "mod_ok" function arg to bool.
18244 (cond_exec_process_if_block): Change return type from int to bool.
18245 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
18247 (noce_emit_store_flag): Change return type from int to bool.
18248 Change "reversep" function arg to bool. Change "cond_complex"
18250 (noce_try_move): Change return type from int to bool.
18251 (noce_try_ifelse_collapse): Ditto.
18252 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
18253 (noce_try_addcc): Change return type from int to bool. Change
18254 "subtract" variable to bool.
18255 (noce_try_store_flag_constants): Change return type from int to bool.
18256 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
18257 (noce_try_cmove): Change return type from int to bool.
18258 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
18259 (noce_try_minmax): Change return type from int to bool. Change
18260 "unsignedp" variable to bool.
18261 (noce_try_abs): Change return type from int to bool. Change
18262 "negate" variable to bool.
18263 (noce_try_sign_mask): Change return type from int to bool.
18264 (noce_try_move): Ditto.
18265 (noce_try_store_flag_constants): Ditto.
18266 (noce_try_cmove): Ditto.
18267 (noce_try_cmove_arith): Ditto.
18268 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
18269 (noce_try_bitop): Change return type from int to bool.
18270 (noce_operand_ok): Ditto.
18271 (noce_convert_multiple_sets): Ditto.
18272 (noce_convert_multiple_sets_1): Ditto.
18273 (noce_process_if_block): Ditto.
18274 (check_cond_move_block): Ditto.
18275 (cond_move_process_if_block): Ditto. Change "success_p"
18277 (rest_of_handle_if_conversion): Change return type to void.
18279 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18281 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
18283 (get_conditional_len_internal_fn): New function.
18284 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
18285 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
18288 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
18291 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
18293 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
18296 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
18297 define_insn_and_split derived from *add<dwi>3_doubleword_concat
18298 and *add<dwi>3_doubleword_zext.
18300 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
18303 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
18304 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
18305 (peephole2): Simplify rega = 0; rega op= rega cases.
18307 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
18309 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
18310 testing a TImode SUBREG of a 128-bit vector register against
18311 zero, use a PTEST instruction instead of first moving it to
18312 a pair of scalar registers.
18314 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
18316 * genopinit.cc (main): Adjust maximal number of optabs and
18318 * gensupport.cc (find_optab): Shift optab by 20 and mode by
18320 * optabs-query.h (optab_handler): Ditto.
18321 (convert_optab_handler): Ditto.
18323 2023-07-12 Richard Biener <rguenther@suse.de>
18325 PR tree-optimization/110630
18326 * tree-vect-slp.cc (vect_add_slp_permutation): New
18327 offset parameter, honor that for the extract code generation.
18328 (vectorizable_slp_permutation_1): Handle offsetted identities.
18330 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18332 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
18333 (umul<mode>3_highpart): Ditto.
18335 2023-07-12 Jan Beulich <jbeulich@suse.com>
18337 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
18338 alternative. Adjust original last alternative's "prefix"
18339 attribute to maybe_evex.
18341 2023-07-12 Jan Beulich <jbeulich@suse.com>
18343 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
18344 vbroadcastss for AVX2. New AVX512F alternative.
18345 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
18346 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
18348 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18350 * config/riscv/peephole.md: Remove XThead* peephole passes.
18351 * config/riscv/thead.md: Include thead-peephole.md.
18352 * config/riscv/thead-peephole.md: New file.
18354 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18356 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
18358 (riscv_index_reg_class): Likewise.
18359 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
18360 (riscv_index_reg_class): New function.
18361 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
18362 riscv_index_reg_class().
18363 (REGNO_OK_FOR_INDEX_P): Call new function
18364 riscv_regno_ok_for_index_p().
18366 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18368 * config/riscv/riscv-protos.h (enum riscv_address_type):
18369 New location of type definition.
18370 (struct riscv_address_info): Likewise.
18371 * config/riscv/riscv.cc (enum riscv_address_type):
18372 Old location of type definition.
18373 (struct riscv_address_info): Likewise.
18375 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18377 * config/riscv/riscv.h (Xmode): New macro.
18379 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18381 * config/riscv/riscv.cc (riscv_print_operand_address): Use
18382 output_addr_const rather than riscv_print_operand.
18384 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18386 * config/riscv/thead.md: Adjust constraints of th_addsl.
18388 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18390 * config/riscv/thead.cc (th_mempair_operands_p):
18391 Fix documentation of th_mempair_order_operands().
18393 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18395 * config/riscv/thead.cc (th_mempair_save_regs):
18396 Emit REG_FRAME_RELATED_EXPR notes in prologue.
18398 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
18400 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
18401 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
18402 New XThead extension INSN.
18403 (*zero_extendsidi2_th_extu): New XThead extension INSN.
18404 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
18406 2023-07-12 liuhongt <hongtao.liu@intel.com>
18410 * config/i386/predicates.md
18411 (int_float_vector_all_ones_operand): New predicate.
18412 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
18414 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
18416 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
18418 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
18419 define_insn_and_split to avoid false dependence.
18420 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
18421 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
18422 of operands 1 to '0' to avoid false dependence.
18423 (*andnot<mode>3): Ditto.
18424 (iornot<mode>3): Ditto.
18425 (*<nlogic><mode>3): Ditto.
18427 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
18429 * common/config/i386/cpuinfo.h
18430 (get_intel_cpu): Handle Granite Rapids D.
18431 * common/config/i386/i386-common.cc:
18432 (processor_alias_table): Add graniterapids-d.
18433 * common/config/i386/i386-cpuinfo.h
18434 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
18435 * config.gcc: Add -march=graniterapids-d.
18436 * config/i386/driver-i386.cc (host_detect_local_cpu):
18437 Handle graniterapids-d.
18438 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
18439 * doc/extend.texi: Add graniterapids-d.
18440 * doc/invoke.texi: Ditto.
18442 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
18444 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
18445 Add OPTION_MASK_ISA_AVX512VL.
18446 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
18449 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18451 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
18452 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
18453 (shuffle_compress_patterns): Ditto.
18454 (expand_vec_perm_const_1): Ditto.
18456 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
18458 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
18459 * cfghooks.h (struct cfg_hooks): Change return type of
18460 verify_flow_info from integer to bool.
18461 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
18462 (can_delete_label_p): Ditto.
18463 (rtl_verify_flow_info): Change return type from int to bool
18464 and adjust function body accordingly. Change "err" variable to bool.
18465 (rtl_verify_flow_info_1): Ditto.
18466 (free_bb_for_insn): Change return type to void.
18467 (rtl_merge_blocks): Change "b_empty" variable to bool.
18468 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
18469 (verify_hot_cold_block_grouping): Change return type from int to bool.
18470 Change "err" variable to bool.
18471 (rtl_verify_edges): Ditto.
18472 (rtl_verify_bb_insns): Ditto.
18473 (rtl_verify_bb_pointers): Ditto.
18474 (rtl_verify_bb_insn_chain): Ditto.
18475 (rtl_verify_fallthru): Ditto.
18476 (rtl_verify_bb_layout): Ditto.
18477 (purge_all_dead_edges): Change "purged" variable to bool.
18478 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
18479 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
18480 (load_killed_in_block_p): Change return type from int to bool
18481 and adjust function body accordingly.
18482 (oprs_unchanged_p): Return true/false.
18483 (rest_of_handle_gcse2): Change return type to void.
18484 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
18485 int to bool. Change "err" variable to bool.
18487 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
18489 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
18491 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18493 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
18494 * internal-fn.cc (cond_len_unary_direct): Ditto.
18495 (cond_len_binary_direct): Ditto.
18496 (cond_len_ternary_direct): Ditto.
18497 (expand_cond_len_unary_optab_fn): Ditto.
18498 (expand_cond_len_binary_optab_fn): Ditto.
18499 (expand_cond_len_ternary_optab_fn): Ditto.
18500 (direct_cond_len_unary_optab_supported_p): Ditto.
18501 (direct_cond_len_binary_optab_supported_p): Ditto.
18502 (direct_cond_len_ternary_optab_supported_p): Ditto.
18503 * internal-fn.def (COND_LEN_ADD): Ditto.
18504 (COND_LEN_SUB): Ditto.
18505 (COND_LEN_MUL): Ditto.
18506 (COND_LEN_DIV): Ditto.
18507 (COND_LEN_MOD): Ditto.
18508 (COND_LEN_RDIV): Ditto.
18509 (COND_LEN_MIN): Ditto.
18510 (COND_LEN_MAX): Ditto.
18511 (COND_LEN_FMIN): Ditto.
18512 (COND_LEN_FMAX): Ditto.
18513 (COND_LEN_AND): Ditto.
18514 (COND_LEN_IOR): Ditto.
18515 (COND_LEN_XOR): Ditto.
18516 (COND_LEN_SHL): Ditto.
18517 (COND_LEN_SHR): Ditto.
18518 (COND_LEN_FMA): Ditto.
18519 (COND_LEN_FMS): Ditto.
18520 (COND_LEN_FNMA): Ditto.
18521 (COND_LEN_FNMS): Ditto.
18522 (COND_LEN_NEG): Ditto.
18523 * optabs.def (OPTAB_D): Ditto.
18525 2023-07-11 Richard Biener <rguenther@suse.de>
18527 PR tree-optimization/110614
18528 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
18529 SLP splats are not suitable for re-align ops.
18531 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
18533 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
18535 (vsx_quad_dform_memory_operand): Likewise.
18537 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
18539 * reorg.cc (stop_search_p): Change return type from int to bool
18540 and adjust function body accordingly.
18541 (resource_conflicts_p): Ditto.
18542 (insn_references_resource_p): Change return type from int to bool.
18543 (insn_sets_resource_p): Ditto.
18544 (redirect_with_delay_slots_safe_p): Ditto.
18545 (condition_dominates_p): Change return type from int to bool
18546 and adjust function body accordingly.
18547 (redirect_with_delay_list_safe_p): Ditto.
18548 (check_annul_list_true_false): Ditto. Change "annul_true_p"
18549 function argument to bool.
18550 (steal_delay_list_from_target): Change "pannul_p" function
18551 argument to bool pointer. Change "must_annul" and "used_annul"
18552 variables from int to bool.
18553 (steal_delay_list_from_fallthrough): Ditto.
18554 (own_thread_p): Change return type from int to bool and adjust
18555 function body accordingly. Change "allow_fallthrough" function
18557 (reorg_redirect_jump): Change return type from int to bool.
18558 (fill_simple_delay_slots): Change "non_jumps_p" function
18559 argument from int to bool. Change "maybe_never" varible to bool.
18560 (fill_slots_from_thread): Change "likely", "thread_if_true" and
18561 "own_thread" function arguments to bool. Change "lose" and
18562 "must_annul" variables to bool.
18563 (delete_from_delay_slot): Change "had_barrier" variable to bool.
18564 (try_merge_delay_insns): Change "annul_p" variable to bool.
18565 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
18567 (rest_of_handle_delay_slots): Change return type from int to void
18568 and adjust function body accordingly.
18570 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
18572 * doc/extend.texi (RISC-V Operand Modifiers): New.
18574 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18576 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
18577 (insert_insn_end_basic_block): Ditto.
18578 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
18579 * gcse.cc (insert_insn_end_basic_block): Export as global function.
18580 * gcse.h (insert_insn_end_basic_block): Ditto.
18582 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
18585 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
18586 (arm_builtin_decl): Hahndle MVE builtins.
18587 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
18588 (add_unique_function): Fix handling of
18589 __ARM_MVE_PRESERVE_USER_NAMESPACE.
18590 (add_overloaded_function): Likewise.
18591 * config/arm/arm-protos.h (builtin_decl): New declaration.
18593 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
18595 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
18597 2023-07-10 Xi Ruoyao <xry111@xry111.site>
18599 PR tree-optimization/110557
18600 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
18601 Ensure the output sign-extended if necessary.
18603 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
18605 * config/i386/i386.md (peephole2): Transform xchg insn with a
18606 REG_UNUSED note to a (simple) move.
18607 (*insvti_lowpart_1): New define_insn_and_split.
18608 (*insvdi_lowpart_1): Likewise.
18610 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
18612 * config/i386/i386-features.cc (compute_convert_gain): Tweak
18613 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
18614 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
18615 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
18617 2023-07-10 liuhongt <hongtao.liu@intel.com>
18620 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
18621 splitter to detect fp max pattern.
18622 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
18624 2023-07-09 Jan Hubicka <jh@suse.cz>
18626 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
18627 (dump_edge_info): Likewise.
18628 (dump_bb_info): Likewise.
18629 * profile-count.cc (profile_count::dump): Add comma between quality and
18632 2023-07-08 Jan Hubicka <jh@suse.cz>
18634 PR tree-optimization/110600
18635 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
18637 2023-07-08 Jan Hubicka <jh@suse.cz>
18639 PR middle-end/110590
18640 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
18641 inner loops and be more careful about inconsistent profiles.
18642 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
18643 exit is followed by other exit.
18645 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
18647 * cprop.cc (reg_available_p): Change return type from int to bool.
18648 (reg_not_set_p): Ditto.
18649 (try_replace_reg): Ditto. Change "success" variable to bool.
18650 (cprop_jump): Change return type from int to void
18651 and adjust function body accordingly.
18652 (constprop_register): Ditto.
18653 (cprop_insn): Ditto. Change "changed" variable to bool.
18654 (local_cprop_pass): Change return type from int to void
18655 and adjust function body accordingly.
18656 (bypass_block): Ditto. Change "change", "may_be_loop_header"
18657 and "removed_p" variables to bool.
18658 (bypass_conditional_jumps): Change return type from int to void
18659 and adjust function body accordingly. Change "changed"
18661 (one_cprop_pass): Ditto.
18663 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
18665 * gcse.cc (expr_equiv_p): Change return type from int to bool.
18666 (oprs_unchanged_p): Change return type from int to void
18667 and adjust function body accordingly.
18668 (oprs_anticipatable_p): Ditto.
18669 (oprs_available_p): Ditto.
18670 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
18671 arguments to bool. Change "found" variable to bool.
18672 (load_killed_in_block_p): Change return type from int to void and
18673 adjust function body accordingly. Change "avail_p" argument to bool.
18674 (pre_expr_reaches_here_p): Change return type from int to void
18675 and adjust function body accordingly.
18676 (pre_delete): Ditto. Change "changed" variable to bool.
18677 (pre_gcse): Change return type from int to void
18678 and adjust function body accordingly. Change "did_insert" and
18679 "changed" variables to bool.
18680 (one_pre_gcse_pass): Change return type from int to void
18681 and adjust function body accordingly. Change "changed" variable
18683 (should_hoist_expr_to_dom): Change return type from int to void
18684 and adjust function body accordingly. Change
18685 "visited_allocated_locally" variable to bool.
18686 (hoist_code): Change return type from int to void and adjust
18687 function body accordingly. Change "changed" variable to bool.
18688 (one_code_hoisting_pass): Ditto.
18689 (pre_edge_insert): Change return type from int to void and adjust
18690 function body accordingly. Change "did_insert" variable to bool.
18691 (pre_expr_reaches_here_p_work): Change return type from int to void
18692 and adjust function body accordingly.
18693 (simple_mem): Ditto.
18694 (want_to_gcse_p): Change return type from int to void
18695 and adjust function body accordingly.
18696 (can_assign_to_reg_without_clobbers_p): Update function body
18697 for bool return type.
18698 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
18699 (pre_insert_copies): Change "added_copy" variable to bool.
18701 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
18705 * doc/invoke.texi (Warning Options): Fix typos.
18707 2023-07-07 Jan Hubicka <jh@suse.cz>
18709 * profile-count.cc (profile_count::dump): Add FUN
18710 parameter; print relative frequency.
18711 (profile_count::debug): Update.
18712 * profile-count.h (profile_count::dump): Update
18715 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
18719 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
18720 TImode destinations from paradoxical SUBREGs (setting the lowpart)
18721 into explicit zero extensions. Use *insvti_highpart_1 instruction
18722 to set the highpart of a TImode destination.
18724 2023-07-07 Jan Hubicka <jh@suse.cz>
18726 * predict.cc (force_edge_cold): Use
18727 set_edge_probability_and_rescale_others; improve dumps.
18729 2023-07-07 Jan Hubicka <jh@suse.cz>
18731 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
18733 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
18736 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
18738 * config/s390/s390.cc (vec_init): Fix default case
18740 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
18742 * lra-assigns.cc (assign_by_spills): Add reload insns involving
18743 reload pseudos with non-refined class to be processed on the next
18745 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
18746 (in_class_p): Use it.
18747 (print_curr_insn_alt): New func.
18748 (process_alt_operands): Use it. Improve debug info.
18749 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
18750 pseudo class if it is not refined yet.
18752 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
18754 * value-range.cc (irange::get_bitmask_from_range): Return all the
18755 known bits for a singleton.
18756 (irange::set_range_from_bitmask): Set a range of a singleton when
18757 all bits are known.
18759 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
18761 * value-range.cc (irange::intersect): Leave normalization to
18764 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
18766 * data-streamer-in.cc (streamer_read_value_range): Adjust for
18768 * data-streamer-out.cc (streamer_write_vrange): Same.
18769 * range-op.cc (operator_cast::fold_range): Same.
18770 * value-range-pretty-print.cc
18771 (vrange_printer::print_irange_bitmasks): Same.
18772 * value-range-storage.cc (irange_storage::write_lengths_address):
18774 (irange_storage::set_irange): Same.
18775 (irange_storage::get_irange): Same.
18776 (irange_storage::size): Same.
18777 (irange_storage::dump): Same.
18778 * value-range-storage.h: Same.
18779 * value-range.cc (debug): New.
18780 (irange_bitmask::dump): New.
18781 (add_vrange): Adjust for value/mask.
18782 (irange::operator=): Same.
18783 (irange::set): Same.
18784 (irange::verify_range): Same.
18785 (irange::operator==): Same.
18786 (irange::contains_p): Same.
18787 (irange::irange_single_pair_union): Same.
18788 (irange::union_): Same.
18789 (irange::intersect): Same.
18790 (irange::invert): Same.
18791 (irange::get_nonzero_bits_from_range): Rename to...
18792 (irange::get_bitmask_from_range): ...this.
18793 (irange::set_range_from_nonzero_bits): Rename to...
18794 (irange::set_range_from_bitmask): ...this.
18795 (irange::set_nonzero_bits): Rename to...
18796 (irange::update_bitmask): ...this.
18797 (irange::get_nonzero_bits): Rename to...
18798 (irange::get_bitmask): ...this.
18799 (irange::intersect_nonzero_bits): Rename to...
18800 (irange::intersect_bitmask): ...this.
18801 (irange::union_nonzero_bits): Rename to...
18802 (irange::union_bitmask): ...this.
18803 (irange_bitmask::verify_mask): New.
18804 * value-range.h (class irange_bitmask): New.
18805 (irange_bitmask::set_unknown): New.
18806 (irange_bitmask::unknown_p): New.
18807 (irange_bitmask::irange_bitmask): New.
18808 (irange_bitmask::get_precision): New.
18809 (irange_bitmask::get_nonzero_bits): New.
18810 (irange_bitmask::set_nonzero_bits): New.
18811 (irange_bitmask::operator==): New.
18812 (irange_bitmask::union_): New.
18813 (irange_bitmask::intersect): New.
18814 (class irange): Friend vrange_printer.
18815 (irange::varying_compatible_p): Adjust for bitmask.
18816 (irange::set_varying): Same.
18817 (irange::set_nonzero): Same.
18819 2023-07-07 Jan Beulich <jbeulich@suse.com>
18821 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
18823 2023-07-07 Jan Beulich <jbeulich@suse.com>
18825 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
18826 alternative. Switch new last alternative's "isa" attribute to
18828 (vec_extract_hi_v32qi): Likewise.
18830 2023-07-07 Pan Li <pan2.li@intel.com>
18831 Robin Dapp <rdapp@ventanamicro.com>
18833 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
18835 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
18836 (riscv_mode_exit): Likewise for exit mode.
18837 (riscv_mode_needed): Likewise for needed mode.
18838 (riscv_mode_after): Likewise for after mode.
18840 2023-07-07 Pan Li <pan2.li@intel.com>
18842 * config/riscv/vector.md: Fix typo.
18844 2023-07-06 Jan Hubicka <jh@suse.cz>
18846 PR middle-end/25623
18847 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
18848 of iterations determined.
18849 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
18851 2023-07-06 Jan Hubicka <jh@suse.cz>
18853 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
18854 probability update to be safe on loops with subloops.
18855 Make bound parameter to be iteration bound.
18856 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
18857 of scale_loop_profile.
18858 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
18860 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
18862 PR tree-optimization/110449
18863 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
18864 vec_loop for the unrolled loop.
18866 2023-07-06 Jan Hubicka <jh@suse.cz>
18868 * cfg.cc (set_edge_probability_and_rescale_others): New function.
18869 (update_bb_profile_for_threading): Use it; simplify the rest.
18870 * cfg.h (set_edge_probability_and_rescale_others): Declare.
18871 * profile-count.h (profile_probability::apply_scale): New.
18873 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
18875 * doc/extend.texi (ARC Built-in Functions): Update documentation
18876 with missing builtins.
18878 2023-07-06 Richard Biener <rguenther@suse.de>
18880 PR tree-optimization/110556
18881 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
18882 assign code and all operands of non-stores.
18884 2023-07-06 Richard Biener <rguenther@suse.de>
18886 PR tree-optimization/110563
18887 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
18888 Remove second argument.
18889 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
18890 Remove for_epilogue_p argument. Merge assert ...
18891 (vect_analyze_loop_2): ... with check done before determining
18892 partial vectors by moving it after.
18893 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
18895 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18897 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
18898 few things re 'reorder' option and strings.
18899 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
18901 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18903 * gengtype-parse.cc: Clean up obsolete parametrized structs
18905 * gengtype.cc: Likewise.
18906 * gengtype.h: Likewise.
18908 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18910 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
18913 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18915 * gengtype-parse.cc (token_names): Add '"user"'.
18916 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
18917 'FIRST_TOKEN_WITH_VALUE'.
18919 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18921 * doc/gty.texi (GTY Options) <string_length>: Enhance.
18923 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18925 * gengtype.cc (write_root, write_roots): Explicitly reject
18926 'string_length' option.
18927 * doc/gty.texi (GTY Options) <string_length>: Document.
18929 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
18931 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
18932 (ggc_pch_write_object): Remove 'bool is_string' argument.
18933 * ggc-common.cc: Adjust.
18934 * ggc-page.cc: Likewise.
18936 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
18938 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
18940 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
18942 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
18943 and add description for inling of function with arch and tune
18946 2023-07-06 Richard Biener <rguenther@suse.de>
18948 PR tree-optimization/110515
18949 * tree-ssa-pre.cc (compute_avail): Make code dealing
18950 with hoisting loads with different alias-sets more
18953 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18955 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
18957 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
18959 * config/i386/i386.cc (ix86_can_inline_p): If callee has
18960 default arch=x86-64 and tune=generic, do not block the
18961 inlining to its caller. Also allow callee with different
18962 arch= to be inlined if it has always_inline attribute and
18963 it's ISA is subset of caller's.
18965 2023-07-06 liuhongt <hongtao.liu@intel.com>
18967 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
18968 DF/SFmode AND/IOR/XOR/ANDN operations.
18970 2023-07-06 Andrew Pinski <apinski@marvell.com>
18972 PR middle-end/110554
18973 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
18974 just build using boolean_type_node instead of the cond_type.
18975 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
18976 that will feed into the COND_EXPR.
18978 2023-07-06 liuhongt <hongtao.liu@intel.com>
18981 * config/i386/i386.md (movdf_internal): Disparage slightly for
18982 2 alternatives (r,v) and (v,r) by adding constraint modifier
18985 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
18988 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
18989 initialization of new_addr.
18991 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
18993 PR tree-optimization/110474
18994 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
18995 unroll factor while selecting the epilog vect loop VF.
18997 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
18999 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
19002 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
19004 * gimple-range-gori.cc (compute_operand_range): After calling
19005 compute_operand2_range, recursively call self if needed.
19006 (compute_operand2_range): Turn into a leaf function.
19007 (gori_compute::compute_operand1_and_operand2_range): Finish
19008 operand2 calculation.
19009 * gimple-range-gori.h (compute_operand2_range): Remove name param.
19011 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
19013 * gimple-range-gori.cc (compute_operand_range): After calling
19014 compute_operand1_range, recursively call self if needed.
19015 (compute_operand1_range): Turn into a leaf function.
19016 (gori_compute::compute_operand1_and_operand2_range): Finish
19017 operand1 calculation.
19018 * gimple-range-gori.h (compute_operand1_range): Remove name param.
19020 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
19022 * gimple-range-gori.cc (compute_operand_range): Check for
19023 operand interdependence when both op1 and op2 are computed.
19024 (compute_operand1_and_operand2_range): No checks required now.
19026 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
19028 * gimple-range-gori.cc (compute_operand_range): Check for
19029 a relation between op1 and op2 and use that instead.
19030 (compute_operand1_range): Don't look for a relation override.
19031 (compute_operand2_range): Ditto.
19033 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
19035 * doc/contrib.texi (Contributors): Update my entry.
19037 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
19039 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
19042 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
19044 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
19045 scehdule_more_p and contributes_to_priority indirect frunction
19046 type from int to bool.
19047 (no_real_insns_p): Change return type from int to bool.
19048 (contributes_to_priority): Ditto.
19049 * haifa-sched.cc (no_real_insns_p): Change return type from
19050 int to bool and adjust function body accordingly.
19051 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
19052 variable type from int to bool.
19053 (ps_insn_advance_column): Change return type from int to bool.
19054 (ps_has_conflicts): Ditto. Change "has_conflicts"
19055 variable type from int to bool.
19056 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
19057 (conditions_mutex_p): Ditto.
19058 * sched-ebb.cc (schedule_more_p): Ditto.
19059 (ebb_contributes_to_priority): Change return type from
19060 int to bool and adjust function body accordingly.
19061 * sched-rgn.cc (is_cfg_nonregular): Ditto.
19062 (check_live_1): Ditto.
19064 (find_conditional_protection): Ditto.
19065 (is_conditionally_protected): Ditto.
19066 (is_prisky): Ditto.
19067 (is_exception_free): Ditto.
19068 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
19069 variables from int to bool.
19070 (extend_rgns): Change "rescan" variable from int to bool.
19071 (check_live): Change return type from
19072 int to bool and adjust function body accordingly.
19073 (can_schedule_ready_p): Ditto.
19074 (schedule_more_p): Ditto.
19075 (contributes_to_priority): Ditto.
19077 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
19079 * doc/md.texi: Document that vec_set and vec_extract must not
19081 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
19082 (gimple_expand_vec_set_extract_expr): ...to this.
19083 (gimple_expand_vec_exprs): Call renamed function.
19084 * internal-fn.cc (vec_extract_direct): Add.
19085 (expand_vec_extract_optab_fn): New function to expand
19087 (direct_vec_extract_optab_supported_p): Add.
19088 * internal-fn.def (VEC_EXTRACT): Add.
19089 * optabs.cc (can_vec_extract_var_idx_p): New function.
19090 * optabs.h (can_vec_extract_var_idx_p): Declare.
19092 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
19094 * config/riscv/autovec.md: Add gen_lowpart.
19096 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
19098 * config/riscv/autovec.md: Allow register index operand.
19100 2023-07-05 Pan Li <pan2.li@intel.com>
19102 * config/riscv/riscv-vector-builtins.cc
19103 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
19105 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
19107 * config/riscv/autovec.md: Use float_truncate.
19109 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19111 * internal-fn.cc (internal_fn_len_index): Apply
19112 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
19113 (internal_fn_mask_index): Ditto.
19114 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
19115 (supports_vec_scatter_store_p): Ditto.
19116 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
19117 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
19118 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
19119 (vect_get_strided_load_store_ops): Ditto.
19120 (vectorizable_store): Ditto.
19121 (vectorizable_load): Ditto.
19123 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
19124 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19126 * simplify-rtx.cc (native_encode_rtx): Ditto.
19127 (native_decode_vector_rtx): Ditto.
19128 (simplify_const_vector_byte_offset): Ditto.
19129 (simplify_const_vector_subreg): Ditto.
19130 * tree.cc (build_truth_vector_type_for_mode): Ditto.
19131 * varasm.cc (output_constant_pool_2): Ditto.
19133 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
19135 * config/mips/mips.cc (mips_expand_block_move): don't expand for
19136 r6 with -mno-unaligned-access option if one or both of src and
19137 dest are unaligned. restruct: return directly if length is not const.
19138 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
19140 2023-07-05 Jan Beulich <jbeulich@suse.com>
19143 * config/i386/sse.md: New splitters to simplify
19144 not;vec_duplicate as a singular vpternlog.
19145 (one_cmpl<mode>2): Allow broadcast for operand 1.
19146 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
19148 2023-07-05 Jan Beulich <jbeulich@suse.com>
19151 * config/i386/sse.md: New splitters to simplify
19152 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
19154 2023-07-05 Jan Beulich <jbeulich@suse.com>
19157 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
19158 form of splitter for PR target/100711.
19160 2023-07-05 Richard Biener <rguenther@suse.de>
19162 PR middle-end/110541
19163 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
19166 2023-07-05 Jan Beulich <jbeulich@suse.com>
19169 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
19170 for memory form operand 1.
19172 2023-07-05 Jan Beulich <jbeulich@suse.com>
19175 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
19176 bitwise vector operations.
19177 * config/i386/sse.md (*iornot<mode>3): New insn.
19178 (*xnor<mode>3): Likewise.
19179 (*<nlogic><mode>3): Likewise.
19180 (andor): New code iterator.
19181 (nlogic): New code attribute.
19182 (ternlog_nlogic): Likewise.
19184 2023-07-05 Richard Biener <rguenther@suse.de>
19186 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
19188 2023-07-05 yulong <shiyulong@iscas.ac.cn>
19190 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
19192 2023-07-05 yulong <shiyulong@iscas.ac.cn>
19194 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
19195 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
19196 (ADJUST_ALIGNMENT): Ditto.
19197 (RVV_TUPLE_PARTIAL_MODES): Ditto.
19198 (ADJUST_NUNITS): Ditto.
19199 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
19201 (vfloat16mf4x3_t): Ditto.
19202 (vfloat16mf4x4_t): Ditto.
19203 (vfloat16mf4x5_t): Ditto.
19204 (vfloat16mf4x6_t): Ditto.
19205 (vfloat16mf4x7_t): Ditto.
19206 (vfloat16mf4x8_t): Ditto.
19207 (vfloat16mf2x2_t): Ditto.
19208 (vfloat16mf2x3_t): Ditto.
19209 (vfloat16mf2x4_t): Ditto.
19210 (vfloat16mf2x5_t): Ditto.
19211 (vfloat16mf2x6_t): Ditto.
19212 (vfloat16mf2x7_t): Ditto.
19213 (vfloat16mf2x8_t): Ditto.
19214 (vfloat16m1x2_t): Ditto.
19215 (vfloat16m1x3_t): Ditto.
19216 (vfloat16m1x4_t): Ditto.
19217 (vfloat16m1x5_t): Ditto.
19218 (vfloat16m1x6_t): Ditto.
19219 (vfloat16m1x7_t): Ditto.
19220 (vfloat16m1x8_t): Ditto.
19221 (vfloat16m2x2_t): Ditto.
19222 (vfloat16m2x3_t): Ditto.
19223 (vfloat16m2x4_t): Ditto.
19224 (vfloat16m4x2_t): Ditto.
19225 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
19226 (vfloat16mf4x3_t): Ditto.
19227 (vfloat16mf4x4_t): Ditto.
19228 (vfloat16mf4x5_t): Ditto.
19229 (vfloat16mf4x6_t): Ditto.
19230 (vfloat16mf4x7_t): Ditto.
19231 (vfloat16mf4x8_t): Ditto.
19232 (vfloat16mf2x2_t): Ditto.
19233 (vfloat16mf2x3_t): Ditto.
19234 (vfloat16mf2x4_t): Ditto.
19235 (vfloat16mf2x5_t): Ditto.
19236 (vfloat16mf2x6_t): Ditto.
19237 (vfloat16mf2x7_t): Ditto.
19238 (vfloat16mf2x8_t): Ditto.
19239 (vfloat16m1x2_t): Ditto.
19240 (vfloat16m1x3_t): Ditto.
19241 (vfloat16m1x4_t): Ditto.
19242 (vfloat16m1x5_t): Ditto.
19243 (vfloat16m1x6_t): Ditto.
19244 (vfloat16m1x7_t): Ditto.
19245 (vfloat16m1x8_t): Ditto.
19246 (vfloat16m2x2_t): Ditto.
19247 (vfloat16m2x3_t): Ditto.
19248 (vfloat16m2x4_t): Ditto.
19249 (vfloat16m4x2_t): Ditto.
19250 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
19251 * config/riscv/riscv.md: New.
19252 * config/riscv/vector-iterators.md: New.
19254 2023-07-04 Andrew Pinski <apinski@marvell.com>
19256 PR tree-optimization/110487
19257 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
19258 build a nonstandard integer and use that.
19260 2023-07-04 Andrew Pinski <apinski@marvell.com>
19262 * match.pd (a?-1:0): Cast type an integer type
19263 rather the type before the negative.
19264 (a?0:-1): Likewise.
19266 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19268 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
19269 Change to use HARD_REG_BIT and its macros.
19270 * config/xtensa/xtensa.md
19271 (peephole2: regmove elimination during DFmode input reload):
19274 2023-07-04 Richard Biener <rguenther@suse.de>
19276 PR tree-optimization/110491
19277 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
19278 whether the PHI args are possibly undefined before folding
19281 2023-07-04 Pan Li <pan2.li@intel.com>
19282 Thomas Schwinge <thomas@codesourcery.com>
19284 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
19285 bits for machine mode table.
19286 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
19287 HOST machine mode bits.
19288 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
19289 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
19291 * tree-streamer.h (streamer_mode_table): Ditto.
19292 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
19293 as the packing limit.
19294 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
19296 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
19298 * lto-streamer.h (class lto_input_block): Capture
19299 'lto_file_decl_data *file_data' instead of just
19300 'unsigned char *mode_table'.
19301 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
19302 * ipa-fnsummary.cc (inline_read_section): Likewise.
19303 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
19304 * ipa-modref.cc (read_section): Likewise.
19305 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
19307 * ipa-sra.cc (isra_read_summary_section): Likewise.
19308 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
19309 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
19310 * lto-streamer-in.cc (lto_read_body_or_constructor)
19311 (lto_input_toplevel_asms): Likewise.
19312 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
19314 2023-07-04 Richard Biener <rguenther@suse.de>
19316 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
19317 (empty_bb_or_one_feeding_into_p): Check for them.
19318 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
19319 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
19321 2023-07-04 Richard Biener <rguenther@suse.de>
19323 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
19324 check guarding scalar_niter underflow.
19326 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
19328 PR tree-optimization/110531
19329 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
19330 slp_done_for_suggested_uf to false.
19332 2023-07-04 Richard Biener <rguenther@suse.de>
19334 PR tree-optimization/110228
19335 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
19336 Mark SSA may-undefs.
19337 (bb_no_side_effects_p): Check stmt uses for undefs.
19339 2023-07-04 Richard Biener <rguenther@suse.de>
19341 PR tree-optimization/110436
19342 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
19343 force live but not relevant pattern stmts relevant.
19345 2023-07-04 Lili Cui <lili.cui@intel.com>
19347 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
19348 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
19350 2023-07-04 Richard Biener <rguenther@suse.de>
19352 PR middle-end/110495
19353 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
19354 since we do not set TREE_OVERFLOW on those since the
19355 introduction of VL vectors.
19356 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
19357 at TREE_OVERFLOW to determine validity of association.
19359 2023-07-04 Richard Biener <rguenther@suse.de>
19361 PR tree-optimization/110310
19362 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
19363 Move costing part ...
19364 (vect_analyze_loop_costing): ... here. Integrate better
19365 estimate for epilogues from ...
19366 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
19367 with actual epilogue status.
19368 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
19369 avoid cancelling epilogue vectorization.
19370 (vect_update_epilogue_niters): Remove. No longer update
19371 epilogue LOOP_VINFO_NITERS.
19373 2023-07-04 Pan Li <pan2.li@intel.com>
19376 2023-07-03 Pan Li <pan2.li@intel.com>
19378 * config/riscv/vector.md: Fix typo.
19380 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19382 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
19383 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
19384 (expand_gather_load_optab_fn): Ditto.
19385 (internal_load_fn_p): Ditto.
19386 (internal_store_fn_p): Ditto.
19387 (internal_gather_scatter_fn_p): Ditto.
19388 (internal_fn_len_index): Ditto.
19389 (internal_fn_mask_index): Ditto.
19390 (internal_fn_stored_value_index): Ditto.
19391 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
19392 (LEN_MASK_SCATTER_STORE): Ditto.
19393 * optabs.def (OPTAB_CD): Ditto.
19395 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19397 * config/riscv/riscv-vsetvl.cc
19398 (vector_insn_info::parse_insn): Add early break.
19400 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
19402 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
19403 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
19405 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
19407 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
19409 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
19411 * common/config/riscv/riscv-common.cc: Add support for zvbb,
19412 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
19413 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
19414 * config/riscv/arch-canonicalize: Add canonicalization info for
19415 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
19416 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
19417 (MASK_ZVBC): Likewise.
19418 (TARGET_ZVBB): Likewise.
19419 (TARGET_ZVBC): Likewise.
19420 (MASK_ZVKG): Likewise.
19421 (MASK_ZVKNED): Likewise.
19422 (MASK_ZVKNHA): Likewise.
19423 (MASK_ZVKNHB): Likewise.
19424 (MASK_ZVKSED): Likewise.
19425 (MASK_ZVKSH): Likewise.
19426 (MASK_ZVKN): Likewise.
19427 (MASK_ZVKNC): Likewise.
19428 (MASK_ZVKNG): Likewise.
19429 (MASK_ZVKS): Likewise.
19430 (MASK_ZVKSC): Likewise.
19431 (MASK_ZVKSG): Likewise.
19432 (MASK_ZVKT): Likewise.
19433 (TARGET_ZVKG): Likewise.
19434 (TARGET_ZVKNED): Likewise.
19435 (TARGET_ZVKNHA): Likewise.
19436 (TARGET_ZVKNHB): Likewise.
19437 (TARGET_ZVKSED): Likewise.
19438 (TARGET_ZVKSH): Likewise.
19439 (TARGET_ZVKN): Likewise.
19440 (TARGET_ZVKNC): Likewise.
19441 (TARGET_ZVKNG): Likewise.
19442 (TARGET_ZVKS): Likewise.
19443 (TARGET_ZVKSC): Likewise.
19444 (TARGET_ZVKSG): Likewise.
19445 (TARGET_ZVKT): Likewise.
19446 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
19448 2023-07-03 Andrew Pinski <apinski@marvell.com>
19450 PR middle-end/110510
19451 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
19453 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
19455 * config/darwin.h: Avoid duplicate multiply_defined specs on
19456 earlier Darwin versions with shared libgcc.
19458 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
19460 * tree.h (tree_int_cst_equal): Change return type from int to bool.
19461 (operand_equal_for_phi_arg_p): Ditto.
19462 (tree_map_base_marked_p): Ditto.
19463 * tree.cc (contains_placeholder_p): Update function body
19464 for bool return type.
19465 (type_cache_hasher::equal): Ditto.
19466 (tree_map_base_hash): Change return type
19467 from int to void and adjust function body accordingly.
19468 (tree_int_cst_equal): Ditto.
19469 (operand_equal_for_phi_arg_p): Ditto.
19470 (get_narrower): Change "first" variable to bool.
19471 (cl_option_hasher::equal): Update function body for bool return type.
19472 * ggc.h (ggc_set_mark): Change return type from int to bool.
19473 (ggc_marked_p): Ditto.
19474 * ggc-page.cc (gt_ggc_mx): Change return type
19475 from int to void and adjust function body accordingly.
19476 (ggc_set_mark): Ditto.
19478 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19480 * config/riscv/autovec.md: Change order of
19481 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
19482 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
19483 * doc/md.texi: Ditto.
19484 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
19485 * internal-fn.cc (len_maskload_direct): Ditto.
19486 (len_maskstore_direct): Ditto.
19487 (add_len_and_mask_args): New function.
19488 (expand_partial_load_optab_fn): Change order of
19489 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
19490 (expand_partial_store_optab_fn): Ditto.
19491 (internal_fn_len_index): New function.
19492 (internal_fn_mask_index): Change order of
19493 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
19494 (internal_fn_stored_value_index): Ditto.
19495 (internal_len_load_store_bias): Ditto.
19496 * internal-fn.h (internal_fn_len_index): New function.
19497 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
19498 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
19499 * tree-vect-stmts.cc (vectorizable_store): Ditto.
19500 (vectorizable_load): Ditto.
19502 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
19505 * doc/gm2.texi (Semantic checking): Include examples using
19506 -Wuninit-variable-checking.
19508 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19510 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
19511 (*single_widen_fnma<mode>): Ditto.
19512 (*double_widen_fms<mode>): Ditto.
19513 (*single_widen_fms<mode>): Ditto.
19514 (*double_widen_fnms<mode>): Ditto.
19515 (*single_widen_fnms<mode>): Ditto.
19517 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19519 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
19520 into "*" in pattern name which simplifies build files.
19521 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
19522 (*pred_single_widen_mul<mode>): New pattern.
19524 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
19526 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
19527 the index to be 0 or 1.
19529 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
19532 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19534 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
19535 (*single_widen_fnma<mode>): Ditto.
19536 (*double_widen_fms<mode>): Ditto.
19537 (*single_widen_fms<mode>): Ditto.
19538 (*double_widen_fnms<mode>): Ditto.
19539 (*single_widen_fnms<mode>): Ditto.
19541 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19543 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
19544 (*single_widen_fnma<mode>): Ditto.
19545 (*double_widen_fms<mode>): Ditto.
19546 (*single_widen_fms<mode>): Ditto.
19547 (*double_widen_fnms<mode>): Ditto.
19548 (*single_widen_fnms<mode>): Ditto.
19550 2023-07-03 Pan Li <pan2.li@intel.com>
19552 * config/riscv/vector.md: Fix typo.
19554 2023-07-03 Richard Biener <rguenther@suse.de>
19556 PR tree-optimization/110506
19557 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
19558 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
19560 2023-07-03 Richard Biener <rguenther@suse.de>
19562 PR tree-optimization/110506
19563 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
19564 type before relying on TYPE_PRECISION to produce a nonzero mask.
19566 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19568 * config/mips/mips.md(*and<mode>3_mips16): Generates
19569 ZEB/ZEH instructions.
19571 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19573 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
19574 address register to M16_REGS for MIPS16.
19575 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
19576 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
19577 (AVAIL_NON_MIPS16 (cache..)): Update to
19578 AVAIL_MIPS16E2_OR_NON_MIPS16.
19579 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
19580 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
19582 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19584 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
19585 for ISA_HAS_MIPS16E2.
19586 (ISA_HAS_SYNC): Same as above.
19587 (ISA_HAS_LL_SC): Same as above.
19589 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19591 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
19592 Add logics for generating instruction.
19593 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
19594 * config/mips/mips.md(mov_<load>l): Generates instructions.
19595 (mov_<load>r): Same as above.
19596 (mov_<store>l): Adjusted for the conditions above.
19597 (mov_<store>r): Same as above.
19598 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
19599 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
19601 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19603 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
19604 (mips_const_insns): Same as above.
19605 (mips_output_move): Same as above.
19606 (mips_output_function_prologue): Same as above.
19607 * config/mips/mips.md: Same as above
19609 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19611 * config/mips/constraints.md(Yz): New constraints for mips16e2.
19612 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
19613 (mips_bit_clear_info): Same as above.
19614 * config/mips/mips.cc(mips_bit_clear_info): New function for
19615 generating instructions.
19616 (mips_bit_clear_p): Same as above.
19617 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
19618 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
19619 (*and<mode>3): Generates INS instruction.
19620 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
19621 (ior<mode>3): Add logics for ORI instruction.
19622 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
19623 (*ior<mode>3_mips16): Add logics for XORI instruction.
19624 (*xor<mode>3_mips16): Generates XORI instrucion.
19625 (*extzv<mode>): Add logics for EXT instruction.
19626 (*insv<mode>): Add logics for INS instruction.
19627 * config/mips/predicates.md(bit_clear_operand): New predicate for
19628 generating bitwise instructions.
19629 (and_reg_operand): Add logics for generating bitwise instructions.
19631 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19633 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
19634 that uses global pointer register.
19635 (mips16_unextended_reference_p): Same as above.
19636 (mips_pic_base_register): Same as above.
19637 (mips_init_relocs): Same as above.
19638 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
19639 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
19640 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
19641 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
19643 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19645 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
19646 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
19647 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
19648 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
19649 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
19650 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
19652 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
19654 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
19656 * config/mips/mips.h(__mips_mips16e2): Defined a new
19658 (ISA_HAS_MIPS16E2): Defined a new macro.
19659 (ASM_SPEC): Pass mmips16e2 to the assembler.
19660 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
19661 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
19662 * doc/invoke.texi: Add -m(no-)mips16e2 option..
19664 2023-07-02 Jakub Jelinek <jakub@redhat.com>
19666 PR tree-optimization/110508
19667 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
19668 REALPART_EXPR opf nlhs if re2 is non-NULL.
19670 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19672 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
19674 * config/xtensa/xtensa.md (*xtensa_clamps):
19675 Add TARGET_MINMAX to the condition.
19677 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19679 * config/xtensa/xtensa.md (*eqne_INT_MIN):
19680 Add missing ":SI" to the match_operator.
19682 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
19685 * config/darwin.opt: Add fconstant-cfstrings alias to
19686 mconstant-cfstrings.
19687 * doc/invoke.texi: Amend invocation descriptions to reflect
19688 that the fconstant-cfstrings is a target-option alias and to
19689 add the missing mconstant-cfstrings option description to the
19692 2023-07-01 Jan Hubicka <jh@suse.cz>
19694 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
19695 parmaeter; update profile.
19696 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
19697 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
19698 (static_loop_exit): ... this; return the edge to be elliminated.
19699 (ch_base::copy_headers): Handle profile updating for eliminated exits.
19701 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
19703 * config/i386/i386-features.cc (compute_convert_gain): Provide
19704 gains/costs for ROTATE and ROTATERT (by an integer constant).
19705 (general_scalar_chain::convert_rotate): New helper function to
19706 convert a DImode or SImode rotation by an integer constant into
19708 (general_scalar_chain::convert_insn): Call the new convert_rotate
19709 for ROTATE and ROTATERT.
19710 (general_scalar_to_vector_candidate_p): Consider ROTATE and
19711 ROTATERT to be candidates if the second operand is an integer
19712 constant, valid for a rotation (or shift) in the given mode.
19713 * config/i386/i386-features.h (general_scalar_chain): Add new
19714 helper method convert_rotate.
19716 2023-07-01 Jan Hubicka <jh@suse.cz>
19718 PR tree-optimization/103680
19719 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
19720 make message clearer.
19722 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
19724 PR tree-optimization/101832
19725 * tree-object-size.cc (addr_object_size): Handle structure/union type
19726 when it has flexible size.
19728 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
19730 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
19731 (fold_nonarray_ctor_reference): Likewise. Specifically deal
19732 with integral bit-fields.
19733 (fold_ctor_reference): Make sure that the constructor uses the
19734 native storage order.
19736 2023-06-30 Jan Hubicka <jh@suse.cz>
19738 PR middle-end/109849
19739 * predict.cc (estimate_bb_frequencies): Turn to static function.
19740 (expr_expected_value_1): Fix handling of binary expressions with
19742 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
19743 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
19745 * predict.h (estimate_bb_frequencies): No longer declare it.
19747 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
19749 * fold-const.h (multiple_of_p): Change return type from int to bool.
19750 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
19751 neg_conp_p and neg_var_p variables to bool.
19752 (const_binop): Change sat_p variable to bool.
19753 (merge_ranges): Change no_overlap variable to bool.
19754 (extract_muldiv_1): Change same_p variable to bool.
19755 (tree_swap_operands_p): Update function body for bool return type.
19756 (fold_truth_andor): Change commutative variable to bool.
19757 (multiple_of_p): Change return type
19758 from int to void and adjust function body accordingly.
19759 * optabs.h (expand_twoval_unop): Change return type from int to bool.
19760 (expand_twoval_binop): Ditto.
19761 (can_compare_p): Ditto.
19762 (have_add2_insn): Ditto.
19763 (have_addptr3_insn): Ditto.
19764 (have_sub2_insn): Ditto.
19765 (have_insn_for): Ditto.
19766 * optabs.cc (add_equal_note): Ditto.
19767 (widen_operand): Change no_extend argument from int to bool.
19768 (expand_binop): Ditto.
19769 (expand_twoval_unop): Change return type
19770 from int to void and adjust function body accordingly.
19771 (expand_twoval_binop): Ditto.
19772 (can_compare_p): Ditto.
19773 (have_add2_insn): Ditto.
19774 (have_addptr3_insn): Ditto.
19775 (have_sub2_insn): Ditto.
19776 (have_insn_for): Ditto.
19778 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
19780 * config/aarch64/aarch64-simd.md
19781 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
19782 Expansions for abd vec widen optabs.
19783 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
19784 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
19785 that give the appropriate extend RTL for the max RTL.
19787 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
19789 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
19790 * optabs.def (vec_widen_sabd_optab,
19791 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
19792 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
19793 vec_widen_uabd_optab,
19794 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
19795 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
19797 * doc/md.texi: Document them.
19798 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
19799 to build a VEC_WIDEN_ABD call if the input precision is smaller
19800 than the precision of the output.
19801 (vect_recog_widen_abd_pattern): Should an ABD expression be
19802 found preceeding an extension, replace the two with a
19805 2023-06-30 Pan Li <pan2.li@intel.com>
19807 * config/riscv/vector.md: Refactor the common condition.
19809 2023-06-30 Richard Biener <rguenther@suse.de>
19811 PR tree-optimization/110496
19812 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
19813 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
19815 2023-06-30 Richard Biener <rguenther@suse.de>
19817 PR middle-end/110489
19818 * statistics.cc (curr_statistics_hash): Add argument
19819 indicating whether we should allocate the hash.
19820 (statistics_fini_pass): If the hash isn't allocated
19821 only print the summary header.
19823 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
19824 Thomas Schwinge <thomas@codesourcery.com>
19826 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
19828 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
19831 * config/mips/mips.cc (mips_function_arg_alignment): Returns
19832 the alignment of function argument. In case of typedef type,
19833 it returns the aligment of the aliased type.
19834 (mips_function_arg_boundary): Relocated calculation of the
19835 aligment of function arguments.
19837 2023-06-29 Jan Hubicka <jh@suse.cz>
19839 PR tree-optimization/109849
19840 * ipa-fnsummary.cc (decompose_param_expr): Skip
19841 functions returning its parameter.
19842 (set_cond_stmt_execution_predicate): Return early
19843 if predicate was constructed.
19845 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
19848 * doc/extend.texi: Document GCC extension on a structure containing
19849 a flexible array member to be a member of another structure.
19851 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
19853 * print-tree.cc (print_node): Print new bit type_include_flexarray.
19854 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
19855 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
19856 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
19857 in bit no_named_args_stdarg_p properly for its corresponding type.
19858 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
19859 out bit no_named_args_stdarg_p properly for its corresponding type.
19860 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
19862 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
19864 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
19865 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
19866 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
19868 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
19870 * value-range.cc (frange::set): Do not call verify_range.
19871 (frange::normalize_kind): Verify range.
19872 (frange::union_nans): Do not call verify_range.
19873 (frange::union_): Same.
19874 (frange::intersect): Same.
19875 (irange::irange_single_pair_union): Call normalize_kind if
19877 (irange::union_): Same.
19878 (irange::intersect): Same.
19879 (irange::set_range_from_nonzero_bits): Verify range.
19880 (irange::set_nonzero_bits): Call normalize_kind if necessary.
19881 (irange::get_nonzero_bits): Tweak comment.
19882 (irange::intersect_nonzero_bits): Call normalize_kind if
19884 (irange::union_nonzero_bits): Same.
19885 * value-range.h (irange::normalize_kind): Verify range.
19887 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
19889 * cselib.h (rtx_equal_for_cselib_1):
19890 Change return type from int to bool.
19891 (references_value_p): Ditto.
19892 (rtx_equal_for_cselib_p): Ditto.
19893 * expr.h (can_store_by_pieces): Ditto.
19894 (try_casesi): Ditto.
19895 (try_tablejump): Ditto.
19896 (safe_from_p): Ditto.
19897 * sbitmap.h (bitmap_equal_p): Ditto.
19898 * cselib.cc (references_value_p): Change return type
19899 from int to void and adjust function body accordingly.
19900 (rtx_equal_for_cselib_1): Ditto.
19901 * expr.cc (is_aligning_offset): Ditto.
19902 (can_store_by_pieces): Ditto.
19903 (mostly_zeros_p): Ditto.
19904 (all_zeros_p): Ditto.
19905 (safe_from_p): Ditto.
19906 (is_aligning_offset): Ditto.
19907 (try_casesi): Ditto.
19908 (try_tablejump): Ditto.
19909 (store_constructor): Change "need_to_clear" and
19910 "const_bounds_p" variables to bool.
19911 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
19913 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
19915 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
19918 2023-06-29 Richard Biener <rguenther@suse.de>
19920 PR tree-optimization/110460
19921 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
19922 Only allow integral, pointer and scalar float type scalar_type.
19924 2023-06-29 Lili Cui <lili.cui@intel.com>
19926 PR tree-optimization/110148
19927 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
19928 ops in this function.
19930 2023-06-29 Richard Biener <rguenther@suse.de>
19932 PR middle-end/110452
19933 * expr.cc (store_constructor): Handle uniform boolean
19934 vectors with integer mode specially.
19936 2023-06-29 Richard Biener <rguenther@suse.de>
19938 PR middle-end/110461
19939 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
19942 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
19944 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
19945 (array_slice): Relax va_gc constructor to handle all vectors
19946 with a vl_embed layout.
19948 2023-06-29 Pan Li <pan2.li@intel.com>
19950 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
19951 (riscv_mode_needed): Likewise.
19952 (riscv_entity_mode_after): Likewise.
19953 (riscv_mode_after): Likewise.
19954 (riscv_mode_entry): Likewise.
19955 (riscv_mode_exit): Likewise.
19956 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
19958 * config/riscv/riscv.md: Add FRM register.
19959 * config/riscv/vector-iterators.md: Add FRM type.
19960 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
19961 (fsrm): Define new insn for fsrm instruction.
19963 2023-06-29 Pan Li <pan2.li@intel.com>
19965 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
19966 Add macro for static frm min and max.
19967 * config/riscv/riscv-vector-builtins-bases.cc
19968 (class binop_frm): New class for floating-point with frm.
19969 (BASE): Add vfadd for frm.
19970 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
19971 * config/riscv/riscv-vector-builtins-functions.def
19972 (vfadd_frm): Likewise.
19973 * config/riscv/riscv-vector-builtins-shapes.cc
19974 (struct alu_frm_def): New struct for alu with frm.
19975 (SHAPE): Add alu with frm.
19976 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
19977 * config/riscv/riscv-vector-builtins.cc
19978 (function_checker::report_out_of_range_and_not): New function
19979 for report out of range and not val.
19980 (function_checker::require_immediate_range_or): New function
19981 for checking in range or one val.
19982 * config/riscv/riscv-vector-builtins.h: Add function decl.
19984 2023-06-29 Cui, Lili <lili.cui@intel.com>
19986 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
19987 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
19989 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
19992 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
19993 to insn before validating it.
19995 2023-06-28 Jan Hubicka <jh@suse.cz>
19997 PR middle-end/110334
19998 * ipa-fnsummary.h (ipa_fn_summary): Add
19999 safe_to_inline_to_always_inline.
20000 * ipa-inline.cc (can_early_inline_edge_p): ICE
20001 if SSA is not built; do cycle checking for
20002 always_inline functions.
20003 (inline_always_inline_functions): Be recrusive;
20004 watch for cycles; do not updat overall summary.
20005 (early_inliner): Do not give up on always_inlines.
20006 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
20009 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
20011 * output.h (leaf_function_p): Change return type from int to bool.
20012 (final_forward_branch_p): Ditto.
20013 (only_leaf_regs_used): Ditto.
20014 (maybe_assemble_visibility): Ditto.
20015 * varasm.h (supports_one_only): Ditto.
20016 * rtl.h (compute_alignments): Change return type from int to void.
20017 * final.cc (app_on): Change return type from int to bool.
20018 (compute_alignments): Change return type from int to void
20019 and adjust function body accordingly.
20020 (shorten_branches): Change "something_changed" variable
20021 type from int to bool.
20022 (leaf_function_p): Change return type from int to bool
20023 and adjust function body accordingly.
20024 (final_forward_branch_p): Ditto.
20025 (only_leaf_regs_used): Ditto.
20026 * varasm.cc (contains_pointers_p): Change return type from
20027 int to bool and adjust function body accordingly.
20028 (compare_constant): Ditto.
20029 (maybe_assemble_visibility): Ditto.
20030 (supports_one_only): Ditto.
20032 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
20035 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
20036 (maybe_copy_reg_attrs): New function.
20037 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
20038 (copyprop_hardreg_forward_1): Ditto.
20040 2023-06-28 Richard Biener <rguenther@suse.de>
20042 PR tree-optimization/110434
20043 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
20044 VAR we replace with <retval>.
20046 2023-06-28 Richard Biener <rguenther@suse.de>
20048 PR tree-optimization/110451
20049 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
20050 tcc_comparison are expensive.
20052 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
20054 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
20055 for TImode comparisons on 32-bit architectures.
20056 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
20057 SWIM1248x to exclude/avoid TImode being conditional on -m64.
20058 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
20059 and/or with TARGET_SSE4_1.
20060 * config/i386/predicates.md (ix86_timode_comparison_operator):
20061 New predicate that depends upon TARGET_64BIT.
20062 (ix86_timode_comparison_operand): Likewise.
20064 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
20067 * config/i386/i386-features.cc (compute_convert_gain): Provide
20068 more accurate gains for conversion of scalar comparisons to
20071 2023-06-28 Richard Biener <rguenther@suse.de>
20073 PR tree-optimization/110443
20074 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
20077 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
20079 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
20080 (peephole2 for move_and_compare): New.
20081 (mode_iterator WORD): New. Set the mode to SI/DImode by
20083 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
20084 (split pattern for compare_and_move): Likewise.
20086 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20088 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
20089 (*single_widen_fma<mode>): Ditto.
20091 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
20094 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
20096 (altivec_vupkhs<VU_char>_direct): ...this.
20097 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
20098 predicate to test if a constant can be loaded with vspltisw and
20100 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
20101 a vector constant can be synthesized with a vspltisw and a vupkhsw.
20102 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
20104 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
20105 function to return true if OP mode is V2DI and can be synthesized
20106 with vupkhsw and vspltisw.
20107 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
20108 constants with vspltisw and vupkhsw.
20110 2023-06-28 Jan Hubicka <jh@suse.cz>
20112 PR tree-optimization/110377
20113 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
20115 (ipa_analyze_node): Enable ranger.
20117 2023-06-28 Richard Biener <rguenther@suse.de>
20119 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
20120 (TYPE_PRECISION_RAW): Provide raw access to the precision
20122 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
20123 (gimple_canonical_types_compatible_p): Likewise.
20124 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
20125 Stream TYPE_PRECISION_RAW.
20126 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
20128 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
20130 2023-06-28 Alexandre Oliva <oliva@adacore.com>
20132 * doc/extend.texi (zero-call-used-regs): Document leafy and
20134 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
20135 LEAFY and variants.
20136 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
20137 functions in leafy mode.
20138 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
20140 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20142 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
20143 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
20145 (@pred_single_widen_add<mode>): New pattern.
20146 (@pred_single_widen_sub<mode>): New pattern.
20148 2023-06-28 liuhongt <hongtao.liu@intel.com>
20150 * config/i386/i386.cc (ix86_invalid_conversion): New function.
20151 (TARGET_INVALID_CONVERSION): Define as
20152 ix86_invalid_conversion.
20154 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
20156 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
20158 (<float_cvt><vnconvert><mode>2): Ditto.
20159 (<optab><mode><vnconvert>2): Ditto.
20160 (<float_cvt><mode><vnconvert>2): Ditto.
20161 * config/riscv/vector-iterators.md: Add vnconvert.
20163 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
20165 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
20167 (extend<v_quad_trunc><mode>2): Ditto.
20168 (trunc<mode><v_double_trunc>2): Ditto.
20169 (trunc<mode><v_quad_trunc>2): Ditto.
20170 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
20171 V_QUAD_TRUNC and v_quad_trunc.
20173 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
20175 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
20178 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
20180 * config/riscv/autovec.md (copysign<mode>3): Add expander.
20181 (xorsign<mode>3): Ditto.
20182 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
20184 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
20188 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
20189 (@pred_ncopysign<mode>_scalar): Ditto.
20191 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
20193 * config/riscv/autovec.md: VF_AUTO -> VF.
20194 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
20195 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
20197 * config/riscv/vector.md: Use new iterators.
20199 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
20201 * match.pd: Use element_mode and check if target supports
20202 operation with new type.
20204 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20206 * config/aarch64/aarch64-sve-builtins-base.cc
20207 (svdupq_impl::fold_nonconst_dupq): New method.
20208 (svdupq_impl::fold): Call fold_nonconst_dupq.
20210 2023-06-27 Andrew Pinski <apinski@marvell.com>
20212 PR middle-end/110420
20213 PR middle-end/103979
20214 PR middle-end/98619
20215 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
20217 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
20219 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
20220 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
20222 (set_switch_stmt_execution_predicate): Same.
20223 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
20225 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
20227 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
20228 ipa_vr instead of value_range.
20231 (ipa_get_value_range): Same.
20232 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
20236 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
20238 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
20239 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
20240 (ipa_set_jfunc_vr): Take a range.
20241 (ipa_compute_jump_functions_for_edge): Pass range to
20243 (ipa_write_jump_function): Call streamer write helper.
20244 (ipa_read_jump_function): Call streamer read helper.
20245 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
20247 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
20249 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
20250 as a probable initializer rather than a probable complete statement.
20252 2023-06-27 Richard Biener <rguenther@suse.de>
20254 PR tree-optimization/96208
20255 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
20256 a non-grouped load if it is the same for all lanes.
20257 (vect_build_slp_tree_2): Handle not grouped loads.
20258 (vect_optimize_slp_pass::remove_redundant_permutations):
20260 (vect_transform_slp_perm_load_1): Likewise.
20261 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
20262 (get_group_load_store_type): Likewise. Handle
20263 invariant accesses.
20264 (vectorizable_load): Likewise.
20266 2023-06-27 liuhongt <hongtao.liu@intel.com>
20268 PR rtl-optimization/110237
20269 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
20271 (maskstore<mode><avx512fmaskmodelower): Ditto.
20272 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
20273 from original <avx512>_store<mode>_mask.
20275 2023-06-27 liuhongt <hongtao.liu@intel.com>
20277 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
20278 Move flag_expensive_optimizations && !optimize_size to ..
20279 * config/i386/i386-options.cc (ix86_option_override_internal):
20280 .. this, it makes -mvzeroupper independent of optimization
20281 level, but still keeps the behavior of architecture
20282 tuning(emit_vzeroupper) unchanged.
20284 2023-06-27 liuhongt <hongtao.liu@intel.com>
20287 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
20288 vzeroupper for vzeroupper call_insn.
20290 2023-06-27 Andrew Pinski <apinski@marvell.com>
20292 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
20295 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20297 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
20300 2023-06-26 Andrew Pinski <apinski@marvell.com>
20302 * doc/extend.texi (access attribute): Add
20304 (interrupt/interrupt_handler attribute):
20307 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20309 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
20310 Use <DWI> instead of <V2XWIDE>.
20311 (aarch64_sqrshrun_n<mode>): Likewise.
20313 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20315 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
20317 (aarch64_rnd_imm_p): ... This.
20318 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
20320 (aarch64_int_rnd_operand): ... This.
20321 (aarch64_simd_rshrn_imm_vec): Delete.
20322 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
20323 Adjust for the above.
20324 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
20325 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
20326 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
20327 (aarch64_sqrshrun_n<mode>_insn): Likewise.
20328 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
20329 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
20330 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
20331 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
20332 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
20334 (aarch64_rnd_imm_p): ... This.
20336 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
20338 * config/s390/s390.cc (s390_encode_section_info): Set
20339 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
20342 2023-06-26 Jan Hubicka <jh@suse.cz>
20344 PR tree-optimization/109849
20345 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
20346 count of newly constructed forwarder block.
20348 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
20350 * doc/optinfo.texi: Fix "steam" -> "stream".
20352 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20354 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
20356 (dse_optimize_stmt): Add LEN_MASK_STORE.
20358 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20360 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
20361 fold of LOAD/STORE with length.
20363 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
20365 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
20366 Check for interdependence between operands 1 and 2.
20368 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
20370 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
20371 into account when costing non-widening/truncating conversions.
20373 2023-06-26 Richard Biener <rguenther@suse.de>
20375 PR tree-optimization/110381
20376 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
20377 Materialize permutes before fold-left reductions.
20379 2023-06-26 Pan Li <pan2.li@intel.com>
20381 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
20383 2023-06-26 Richard Biener <rguenther@suse.de>
20385 * varasm.cc (initializer_constant_valid_p_1): Also
20386 constrain the type of value to be scalar integral
20387 before dispatching to narrowing_initializer_constant_valid_p.
20389 2023-06-26 Richard Biener <rguenther@suse.de>
20391 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
20392 Use element_precision.
20394 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20396 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
20398 (vcondu<V:mode><VI:mode>): Ditto.
20399 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
20400 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
20402 2023-06-26 Richard Biener <rguenther@suse.de>
20404 PR tree-optimization/110392
20405 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
20406 Do early exits on true/false predicate only after normalization.
20408 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20410 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
20413 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
20415 * config/i386/i386.md (peephole2): Simplify zeroing a register
20416 followed by an IOR, XOR or PLUS operation on it, into a move.
20417 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
20418 eliminate (and hide from reload) unnecessary word to doubleword
20419 extensions that are followed by left shifts by sufficiently large,
20420 but valid, bit counts.
20422 2023-06-26 liuhongt <hongtao.liu@intel.com>
20424 PR tree-optimization/110371
20425 PR tree-optimization/110018
20426 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
20427 save intermediate type operand instead of "subtle" vec_dest
20430 2023-06-26 liuhongt <hongtao.liu@intel.com>
20432 PR tree-optimization/110371
20433 PR tree-optimization/110018
20434 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
20435 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
20437 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
20439 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
20440 Override tune_string with arch_string if tune_string is not
20441 explicitly specified.
20443 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20445 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
20447 * config/riscv/riscv-vsetvl.h: New function.
20449 2023-06-25 Li Xu <xuli1@eswincomputing.com>
20451 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
20454 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20456 * config/riscv/autovec.md (len_load_<mode>): Remove.
20457 (len_maskload<mode><vm>): Remove.
20458 (len_store_<mode>): New pattern.
20459 (len_maskstore<mode><vm>): New pattern.
20460 * config/riscv/predicates.md (autovec_length_operand): New predicate.
20461 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20462 (expand_load_store): New function.
20463 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
20464 (emit_nonvlmax_masked_insn): Ditto.
20465 (expand_load_store): Ditto.
20466 * config/riscv/riscv-vector-builtins.cc
20467 (function_expander::use_contiguous_store_insn): Add avl_type operand
20469 * config/riscv/vector.md: Ditto.
20471 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20473 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
20476 2023-06-25 Pan Li <pan2.li@intel.com>
20478 * config/riscv/vector.md: Revert.
20480 2023-06-25 Pan Li <pan2.li@intel.com>
20482 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
20483 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
20484 (ADJUST_ALIGNMENT): Ditto.
20485 (RVV_TUPLE_PARTIAL_MODES): Ditto.
20486 (ADJUST_NUNITS): Ditto.
20487 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
20488 (vfloat16mf4x3_t): Ditto.
20489 (vfloat16mf4x4_t): Ditto.
20490 (vfloat16mf4x5_t): Ditto.
20491 (vfloat16mf4x6_t): Ditto.
20492 (vfloat16mf4x7_t): Ditto.
20493 (vfloat16mf4x8_t): Ditto.
20494 (vfloat16mf2x2_t): Ditto.
20495 (vfloat16mf2x3_t): Ditto.
20496 (vfloat16mf2x4_t): Ditto.
20497 (vfloat16mf2x5_t): Ditto.
20498 (vfloat16mf2x6_t): Ditto.
20499 (vfloat16mf2x7_t): Ditto.
20500 (vfloat16mf2x8_t): Ditto.
20501 (vfloat16m1x2_t): Ditto.
20502 (vfloat16m1x3_t): Ditto.
20503 (vfloat16m1x4_t): Ditto.
20504 (vfloat16m1x5_t): Ditto.
20505 (vfloat16m1x6_t): Ditto.
20506 (vfloat16m1x7_t): Ditto.
20507 (vfloat16m1x8_t): Ditto.
20508 (vfloat16m2x2_t): Ditto.
20509 (vfloat16m2x3_t): Diito.
20510 (vfloat16m2x4_t): Diito.
20511 (vfloat16m4x2_t): Diito.
20512 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
20513 (vfloat16mf4x3_t): Ditto.
20514 (vfloat16mf4x4_t): Ditto.
20515 (vfloat16mf4x5_t): Ditto.
20516 (vfloat16mf4x6_t): Ditto.
20517 (vfloat16mf4x7_t): Ditto.
20518 (vfloat16mf4x8_t): Ditto.
20519 (vfloat16mf2x2_t): Ditto.
20520 (vfloat16mf2x3_t): Ditto.
20521 (vfloat16mf2x4_t): Ditto.
20522 (vfloat16mf2x5_t): Ditto.
20523 (vfloat16mf2x6_t): Ditto.
20524 (vfloat16mf2x7_t): Ditto.
20525 (vfloat16mf2x8_t): Ditto.
20526 (vfloat16m1x2_t): Ditto.
20527 (vfloat16m1x3_t): Ditto.
20528 (vfloat16m1x4_t): Ditto.
20529 (vfloat16m1x5_t): Ditto.
20530 (vfloat16m1x6_t): Ditto.
20531 (vfloat16m1x7_t): Ditto.
20532 (vfloat16m1x8_t): Ditto.
20533 (vfloat16m2x2_t): Ditto.
20534 (vfloat16m2x3_t): Ditto.
20535 (vfloat16m2x4_t): Ditto.
20536 (vfloat16m4x2_t): Ditto.
20537 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
20538 * config/riscv/riscv.md: Ditto.
20539 * config/riscv/vector-iterators.md: Ditto.
20541 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20543 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
20544 (gimple_fold_partial_load_store_mem_ref): Ditto.
20545 (gimple_fold_partial_store): Ditto.
20546 (gimple_fold_call): Ditto.
20548 2023-06-25 liuhongt <hongtao.liu@intel.com>
20551 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
20552 Refine pattern with UNSPEC_MASKLOAD.
20553 (maskload<mode><avx512fmaskmodelower>): Ditto.
20554 (*<avx512>_load<mode>_mask): Extend mode iterator to
20556 (*<avx512>_load<mode>): Ditto.
20558 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20560 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
20562 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20564 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
20565 LEN_MASK_{LOAD,STORE}
20567 2023-06-25 yulong <shiyulong@iscas.ac.cn>
20569 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
20571 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
20573 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
20575 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20577 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
20578 (*fma<VI:mode><P:mode>): Ditto.
20579 (*fnma<mode>): Ditto.
20580 (*fnma<VI:mode><P:mode>): Ditto.
20582 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20584 * config/riscv/autovec.md (fma<mode>4): New pattern.
20585 (*fma<mode>): Ditto.
20586 (fnma<mode>4): Ditto.
20587 (*fnma<mode>): Ditto.
20588 (fms<mode>4): Ditto.
20589 (*fms<mode>): Ditto.
20590 (fnms<mode>4): Ditto.
20591 (*fnms<mode>): Ditto.
20592 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
20594 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
20595 * config/riscv/vector.md: Fix attribute bug.
20597 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20599 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
20600 Apply LEN_MASK_{LOAD,STORE}.
20602 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20604 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
20605 Add LEN_MASK_{LOAD,STORE}.
20607 2023-06-24 David Malcolm <dmalcolm@redhat.com>
20609 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
20610 * diagnostic.cc: Likewise.
20611 * text-art/box-drawing.cc: Likewise.
20612 * text-art/canvas.cc: Likewise.
20613 * text-art/ruler.cc: Likewise.
20614 * text-art/selftests.cc: Likewise.
20615 * text-art/selftests.h (text_art::canvas): New forward decl.
20616 * text-art/style.cc: Add #define INCLUDE_VECTOR.
20617 * text-art/styled-string.cc: Likewise.
20618 * text-art/table.cc: Likewise.
20619 * text-art/table.h: Remove #include <vector>.
20620 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
20621 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
20622 Remove #include of <vector> and <string>.
20623 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
20624 * text-art/widget.h: Remove #include <vector>.
20626 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20628 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
20629 (internal_load_fn_p): Add LEN_MASK_LOAD.
20630 (internal_store_fn_p): Add LEN_MASK_STORE.
20631 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
20632 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
20633 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
20634 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
20635 (get_len_load_store_mode): Ditto.
20636 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
20637 (get_len_load_store_mode): Ditto.
20638 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
20639 (get_all_ones_mask): New function.
20640 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
20641 (vectorizable_load): Ditto.
20643 2023-06-23 Marek Polacek <polacek@redhat.com>
20645 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
20646 -std=gnu++26. Document that for C++23, its value is 202302L.
20647 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
20648 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
20649 (gen_compile_unit_die): Likewise.
20651 2023-06-23 Jan Hubicka <jh@suse.cz>
20653 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
20655 (pass_phiprop::execute): Do not compute it here; return
20656 update_ssa_only_virtuals if something changed.
20657 (pass_data_phiprop): Remove TODO_update_ssa from todos.
20659 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
20660 Aaron Sawdey <acsawdey@linux.ibm.com>
20663 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
20664 allowed prefixed lwa to be generated.
20665 * config/rs6000/fusion.md: Regenerate.
20666 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
20667 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
20668 plus compare immediate fused insns.
20669 (maybe_prefixed): Likewise.
20671 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
20673 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
20674 of ASHIFT to const0_rtx with sufficiently large shift count.
20675 Optimize highpart SUBREGs of ASHIFT as the shift operand when
20676 the shift count is the correct offset. Optimize SUBREGs of
20677 multi-word logic operations if the SUBREGs of both operands
20680 2023-06-23 Richard Biener <rguenther@suse.de>
20682 * varasm.cc (initializer_constant_valid_p_1): Only
20683 allow conversions between scalar floating point types.
20685 2023-06-23 Richard Biener <rguenther@suse.de>
20687 * tree-vect-stmts.cc (vectorizable_assignment):
20688 Properly handle non-integral operands when analyzing
20691 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
20693 PR tree-optimization/110280
20694 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
20695 using build_vector_from_val with the element of input operand, and
20696 mask's type if operand and mask's types don't match.
20698 2023-06-23 Richard Biener <rguenther@suse.de>
20700 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
20701 the truth_value_p case with !VECTOR_TYPE_P.
20703 2023-06-23 Richard Biener <rguenther@suse.de>
20705 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
20706 Exit early when the type isn't scalar integral.
20708 2023-06-23 Richard Biener <rguenther@suse.de>
20710 * match.pd ((outertype)((innertype0)a+(innertype1)b)
20711 -> ((newtype)a+(newtype)b)): Use element_precision
20714 2023-06-23 Richard Biener <rguenther@suse.de>
20716 * fold-const.cc (fold_binary_loc): Use element_precision
20717 when trying (double)float1 CMP (double)float2 to
20718 float1 CMP float2 simplification.
20719 * match.pd: Likewise.
20721 2023-06-23 Richard Biener <rguenther@suse.de>
20723 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
20724 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
20726 2023-06-23 Richard Biener <rguenther@suse.de>
20728 * tree-vect-stmts.cc (vector_vector_composition_type):
20729 Handle composition of a vector from a number of elements that
20730 happens to match its number of lanes.
20732 2023-06-22 Marek Polacek <polacek@redhat.com>
20734 * configure.ac (--enable-host-bind-now): New check. Add
20735 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
20736 * configure: Regenerate.
20737 * doc/install.texi: Document --enable-host-bind-now.
20739 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
20741 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
20743 2023-06-22 Richard Biener <rguenther@suse.de>
20745 PR tree-optimization/110332
20746 * tree-ssa-phiprop.cc (propagate_with_phi): Always
20747 check aliasing with edge inserted loads.
20749 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
20750 Uros Bizjak <ubizjak@gmail.com>
20752 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
20753 expansion of ptestc with equal operands as producing const1_rtx.
20754 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
20755 estimates of UNSPEC_PTEST, where the ptest performs the PAND
20756 or PAND of its operands.
20757 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
20758 of reg_equal_p operands into an x86_stc instruction.
20759 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
20760 (define_split): Similar to above for strict_low_part destinations.
20761 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
20763 2023-06-22 David Malcolm <dmalcolm@redhat.com>
20766 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
20767 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
20769 (fanalyzer-debug-text-art): New.
20771 2023-06-22 David Malcolm <dmalcolm@redhat.com>
20773 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
20774 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
20775 text-art/style.o, text-art/styled-string.o, text-art/table.o,
20776 text-art/theme.o, and text-art/widget.o.
20777 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
20778 (COLOR_FG_BRIGHT_RED): New.
20779 (COLOR_FG_BRIGHT_GREEN): New.
20780 (COLOR_FG_BRIGHT_YELLOW): New.
20781 (COLOR_FG_BRIGHT_BLUE): New.
20782 (COLOR_FG_BRIGHT_MAGENTA): New.
20783 (COLOR_FG_BRIGHT_CYAN): New.
20784 (COLOR_FG_BRIGHT_WHITE): New.
20785 (COLOR_BG_BRIGHT_BLACK): New.
20786 (COLOR_BG_BRIGHT_RED): New.
20787 (COLOR_BG_BRIGHT_GREEN): New.
20788 (COLOR_BG_BRIGHT_YELLOW): New.
20789 (COLOR_BG_BRIGHT_BLUE): New.
20790 (COLOR_BG_BRIGHT_MAGENTA): New.
20791 (COLOR_BG_BRIGHT_CYAN): New.
20792 (COLOR_BG_BRIGHT_WHITE): New.
20793 * common.opt (fdiagnostics-text-art-charset=): New option.
20794 (diagnostic-text-art.h): New SourceInclude.
20795 (diagnostic_text_art_charset) New Enum and EnumValues.
20796 * configure: Regenerate.
20797 * configure.ac (gccdepdir): Add text-art to loop.
20798 * diagnostic-diagram.h: New file.
20799 * diagnostic-format-json.cc (json_emit_diagram): New.
20800 (diagnostic_output_format_init_json): Wire it up to
20801 context->m_diagrams.m_emission_cb.
20802 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
20803 "text-art/canvas.h".
20804 (sarif_result::on_nested_diagnostic): Move code to...
20805 (sarif_result::add_related_location): ...this new function.
20806 (sarif_result::on_diagram): New.
20807 (sarif_builder::emit_diagram): New.
20808 (sarif_builder::make_message_object_for_diagram): New.
20809 (sarif_emit_diagram): New.
20810 (diagnostic_output_format_init_sarif): Set
20811 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
20812 * diagnostic-text-art.h: New file.
20813 * diagnostic.cc: Include "diagnostic-text-art.h",
20814 "diagnostic-diagram.h", and "text-art/theme.h".
20815 (diagnostic_initialize): Initialize context->m_diagrams and
20816 call diagnostics_text_art_charset_init.
20817 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
20818 (diagnostic_emit_diagram): New.
20819 (diagnostics_text_art_charset_init): New.
20820 * diagnostic.h (text_art::theme): New forward decl.
20821 (class diagnostic_diagram): Likewise.
20822 (diagnostic_context::m_diagrams): New field.
20823 (diagnostic_emit_diagram): New decl.
20824 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
20825 -fdiagnostics-text-art-charset=.
20826 (-fdiagnostics-plain-output): Add
20827 -fdiagnostics-text-art-charset=none.
20828 * gcc.cc: Include "diagnostic-text-art.h".
20829 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
20830 * opts-common.cc (decode_cmdline_options_to_array): Add
20831 "-fdiagnostics-text-art-charset=none" to expanded_args for
20832 -fdiagnostics-plain-output.
20833 * opts.cc: Include "diagnostic-text-art.h".
20834 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
20835 * pretty-print.cc (pp_unicode_character): New.
20836 * pretty-print.h (pp_unicode_character): New decl.
20837 * selftest-run-tests.cc: Include "text-art/selftests.h".
20838 (selftest::run_tests): Call text_art_tests.
20839 * text-art/box-drawing-chars.inc: New file, generated by
20840 contrib/unicode/gen-box-drawing-chars.py.
20841 * text-art/box-drawing.cc: New file.
20842 * text-art/box-drawing.h: New file.
20843 * text-art/canvas.cc: New file.
20844 * text-art/canvas.h: New file.
20845 * text-art/ruler.cc: New file.
20846 * text-art/ruler.h: New file.
20847 * text-art/selftests.cc: New file.
20848 * text-art/selftests.h: New file.
20849 * text-art/style.cc: New file.
20850 * text-art/styled-string.cc: New file.
20851 * text-art/table.cc: New file.
20852 * text-art/table.h: New file.
20853 * text-art/theme.cc: New file.
20854 * text-art/theme.h: New file.
20855 * text-art/types.h: New file.
20856 * text-art/widget.cc: New file.
20857 * text-art/widget.h: New file.
20859 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
20861 * function.h (emit_initial_value_sets):
20862 Change return type from int to void.
20863 (aggregate_value_p): Change return type from int to bool.
20864 (prologue_contains): Ditto.
20865 (epilogue_contains): Ditto.
20866 (prologue_epilogue_contains): Ditto.
20867 * function.cc (temp_slot): Make "in_use" variable bool.
20868 (make_slot_available): Update for changed "in_use" variable.
20869 (assign_stack_temp_for_type): Ditto.
20870 (emit_initial_value_sets): Change return type from int to void
20871 and update function body accordingly.
20872 (instantiate_virtual_regs): Ditto.
20873 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
20874 (safe_insn_predicate): Change return type from int to bool.
20875 (aggregate_value_p): Change return type from int to bool
20876 and update function body accordingly.
20877 (prologue_contains): Change return type from int to bool.
20878 (prologue_epilogue_contains): Ditto.
20880 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
20882 * common.opt (fp_contract_mode) [on]: Remove fallback.
20883 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
20884 * doc/invoke.texi (-ffp-contract): Update.
20885 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
20887 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20889 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
20890 Add alternatives to prefer to avoid same input and output Z register.
20891 (mask_gather_load<mode><v_int_container>): Likewise.
20892 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
20893 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
20894 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
20895 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
20897 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
20899 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20900 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
20901 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20902 <SVE_2BHSI:mode>_sxtw): Likewise.
20903 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20904 <SVE_2BHSI:mode>_uxtw): Likewise.
20905 (@aarch64_ldff1_gather<mode>): Likewise.
20906 (@aarch64_ldff1_gather<mode>): Likewise.
20907 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
20908 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
20909 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
20910 <VNx4_NARROW:mode>): Likewise.
20911 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20912 <VNx2_NARROW:mode>): Likewise.
20913 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20914 <VNx2_NARROW:mode>_sxtw): Likewise.
20915 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20916 <VNx2_NARROW:mode>_uxtw): Likewise.
20917 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
20918 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
20919 <SVE_PARTIAL_I:mode>): Likewise.
20921 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20923 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
20924 Convert to compact alternatives syntax.
20925 (mask_gather_load<mode><v_int_container>): Likewise.
20926 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
20927 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
20928 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
20929 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
20931 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
20933 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20934 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
20935 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20936 <SVE_2BHSI:mode>_sxtw): Likewise.
20937 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20938 <SVE_2BHSI:mode>_uxtw): Likewise.
20939 (@aarch64_ldff1_gather<mode>): Likewise.
20940 (@aarch64_ldff1_gather<mode>): Likewise.
20941 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
20942 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
20943 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
20944 <VNx4_NARROW:mode>): Likewise.
20945 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20946 <VNx2_NARROW:mode>): Likewise.
20947 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20948 <VNx2_NARROW:mode>_sxtw): Likewise.
20949 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20950 <VNx2_NARROW:mode>_uxtw): Likewise.
20951 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
20952 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
20953 <SVE_PARTIAL_I:mode>): Likewise.
20955 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20958 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20960 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
20961 Convert to compact alternatives syntax.
20962 (mask_gather_load<mode><v_int_container>): Likewise.
20963 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
20964 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
20965 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
20966 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
20968 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
20970 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20971 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
20972 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20973 <SVE_2BHSI:mode>_sxtw): Likewise.
20974 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
20975 <SVE_2BHSI:mode>_uxtw): Likewise.
20976 (@aarch64_ldff1_gather<mode>): Likewise.
20977 (@aarch64_ldff1_gather<mode>): Likewise.
20978 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
20979 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
20980 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
20981 <VNx4_NARROW:mode>): Likewise.
20982 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20983 <VNx2_NARROW:mode>): Likewise.
20984 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20985 <VNx2_NARROW:mode>_sxtw): Likewise.
20986 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
20987 <VNx2_NARROW:mode>_uxtw): Likewise.
20988 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
20989 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
20990 <SVE_PARTIAL_I:mode>): Likewise.
20992 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20994 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
20995 (get_len_load_store_mode): Ditto.
20996 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
20997 (get_len_load_store_mode): Ditto.
20998 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
20999 (get_len_load_store_mode): Ditto.
21000 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
21001 (get_len_load_store_mode): Ditto.
21002 * tree-if-conv.cc: include optabs-tree instead of optabs-query
21004 2023-06-21 Richard Biener <rguenther@suse.de>
21006 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
21007 split_constant_offset for the POINTER_PLUS_EXPR case.
21009 2023-06-21 Richard Biener <rguenther@suse.de>
21011 * tree-ssa-loop-ivopts.cc (record_group_use): Use
21012 split_constant_offset.
21014 2023-06-21 Richard Biener <rguenther@suse.de>
21016 * tree-loop-distribution.cc (classify_builtin_st): Use
21017 split_constant_offset.
21018 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
21019 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
21021 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21023 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
21024 Convert to compact alternatives syntax.
21025 (mask_gather_load<mode><v_int_container>): Likewise.
21026 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
21027 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
21028 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
21029 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
21031 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
21033 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
21034 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
21035 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
21036 <SVE_2BHSI:mode>_sxtw): Likewise.
21037 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
21038 <SVE_2BHSI:mode>_uxtw): Likewise.
21039 (@aarch64_ldff1_gather<mode>): Likewise.
21040 (@aarch64_ldff1_gather<mode>): Likewise.
21041 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
21042 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
21043 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
21044 <VNx4_NARROW:mode>): Likewise.
21045 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
21046 <VNx2_NARROW:mode>): Likewise.
21047 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
21048 <VNx2_NARROW:mode>_sxtw): Likewise.
21049 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
21050 <VNx2_NARROW:mode>_uxtw): Likewise.
21051 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
21052 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
21053 <SVE_PARTIAL_I:mode>): Likewise.
21055 2023-06-21 Tamar Christina <tamar.christina@arm.com>
21058 * doc/md.texi: Replace backslashchar.
21060 2023-06-21 Richard Biener <rguenther@suse.de>
21062 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
21063 Overload. For masked main loops make sure the vectorization
21064 factor isn't more than double the number of iterations.
21066 2023-06-21 Jan Beulich <jbeulich@suse.com>
21068 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
21069 value duplication by ix86_build_signbit_mask() when AVX512F and
21071 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
21072 2-alternative form. Adjust "mode" attribute. Add "enabled"
21074 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
21075 && !TARGET_PREFER_AVX256.
21076 (*<avx512>_vpternlog<mode>_2): Likewise.
21077 (*<avx512>_vpternlog<mode>_3): Likewise.
21079 2023-06-21 liuhongt <hongtao.liu@intel.com>
21082 * tree-vect-stmts.cc (vectorizable_conversion): Use
21083 intermiediate integer type for float_expr/fix_trunc_expr when
21084 direct optab is not existed.
21086 2023-06-20 Tamar Christina <tamar.christina@arm.com>
21088 PR bootstrap/110324
21089 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
21091 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
21093 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
21094 register operand to the stack pointer. Require the second register
21095 operand to have the number specified in a separate const_int operand.
21096 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
21097 (aarch64_allocate_and_probe_stack_space): Use it.
21098 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
21099 (aarch64_expand_epilogue): Likewise.
21101 2023-06-20 Jakub Jelinek <jakub@redhat.com>
21103 PR middle-end/79173
21104 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
21105 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
21108 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
21110 * calls.h (setjmp_call_p): Change return type from int to bool.
21111 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
21112 (store_one_arg): Change return type from int to bool
21113 and adjust function body accordingly. Change "sibcall_failure"
21115 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
21116 argument to bool. Change "partial_seen" variable to bool.
21117 (load_register_parameters): Change *sibcall_failure
21118 pointer argument to bool.
21119 (check_sibcall_argument_overlap_1): Change return type from int to bool
21120 and adjust function body accordingly.
21121 (check_sibcall_argument_overlap): Ditto. Change
21122 "mark_stored_args_map" argument to bool.
21123 (emit_call_1): Change "already_popped" variable to bool.
21124 (setjmp_call_p): Change return type from int to bool
21125 and adjust function body accordingly.
21126 (initialize_argument_information): Change *must_preallocate
21127 pointer argument to bool.
21128 (expand_call): Change "pcc_struct_value", "must_preallocate"
21129 and "sibcall_failure" variables to bool.
21130 (emit_library_call_value_1): Change "pcc_struct_value"
21133 2023-06-20 Martin Jambor <mjambor@suse.cz>
21136 * ipa-sra.cc (struct caller_issues): New field there_is_one.
21137 (check_for_caller_issues): Set it.
21138 (check_all_callers_for_issues): Check it.
21140 2023-06-20 Martin Jambor <mjambor@suse.cz>
21142 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
21143 (struct ipcp_transformation): Rearrange members according to
21144 C++ class coding convention, add m_uid_to_idx,
21145 get_param_index and maybe_create_parm_idx_map.
21146 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
21147 (compare_uids): Likewise.
21148 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
21149 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
21150 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
21151 (ipcp_update_vr): Likewise.
21152 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
21153 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
21155 2023-06-20 Carl Love <cel@us.ibm.com>
21157 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
21158 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
21159 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
21160 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
21161 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
21162 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
21163 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
21164 * config/rs6000/rs6000-builtins.def
21165 (__builtin_vsx_scalar_extract_exp_to_vec,
21166 __builtin_vsx_scalar_extract_sig_to_vec,
21167 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
21168 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
21169 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
21170 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
21171 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
21172 overloaded instance. Update comments.
21173 * config/rs6000/rs6000-overload.def
21174 (__builtin_vec_scalar_insert_exp): Add new overload definition with
21176 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
21177 overloaded definitions.
21178 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
21179 (DI_to_TI): New mode attribute.
21180 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
21181 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
21182 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
21183 * doc/extend.texi (scalar_extract_exp_to_vec,
21184 scalar_extract_sig_to_vec): Add documentation for new builtins.
21185 (scalar_insert_exp): Add new overloaded builtin definition.
21187 2023-06-20 Li Xu <xuli1@eswincomputing.com>
21189 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
21190 size of vector mask mode to one rvv register.
21192 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21194 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
21196 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
21198 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
21201 2023-06-20 Richard Biener <rguenther@suse.de>
21203 * tree-ssa-dse.cc (dse_classify_store): When we found
21204 no defs and the basic-block with the original definition
21205 ends in __builtin_unreachable[_trap] the store is dead.
21207 2023-06-20 Richard Biener <rguenther@suse.de>
21209 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
21210 keep the virtual SSA form up-to-date.
21212 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21214 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
21215 New define_insn_and_split.
21217 2023-06-20 Tamar Christina <tamar.christina@arm.com>
21219 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
21221 2023-06-20 Jan Beulich <jbeulich@suse.com>
21223 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
21224 constraint. Add new AVX512F alternative.
21226 2023-06-20 Richard Biener <rguenther@suse.de>
21229 * dwarf2out.cc (process_scope_var): Continue processing
21230 the decl after setting a parent in case the existing DIE
21233 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
21235 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
21236 (riscv_arg_has_vector): Simplify.
21237 (riscv_pass_in_vector_p): Adjust warning message.
21239 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
21241 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
21242 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
21243 * config/riscv/riscv.md (riscv_frcsr): New patterns.
21244 (riscv_fscsr): Likewise.
21246 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
21248 PR rtl-optimization/110305
21249 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
21250 Handle HONOR_SNANS for x + 0.0.
21252 2023-06-19 Jan Hubicka <jh@suse.cz>
21254 PR tree-optimization/109811
21255 PR tree-optimization/109849
21256 * passes.def: Add phiprop to early optimization passes.
21257 * tree-ssa-phiprop.cc: Allow clonning.
21259 2023-06-19 Tamar Christina <tamar.christina@arm.com>
21261 * config/aarch64/aarch64.md (arches): Add nosimd.
21262 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
21265 2023-06-19 Tamar Christina <tamar.christina@arm.com>
21266 Omar Tahir <Omar.Tahir2@arm.com>
21268 * gensupport.cc (class conlist, add_constraints, add_attributes,
21269 skip_spaces, expect_char, preprocess_compact_syntax,
21270 parse_section_layout, parse_section, convert_syntax): New.
21271 (process_rtx): Check for conversion.
21272 * genoutput.cc (process_template): Check for unresolved iterators.
21273 (class data): Add compact_syntax_p.
21274 (gen_insn): Use it.
21275 * gensupport.h (compact_syntax): New.
21276 (hash-set.h): Include.
21277 * doc/md.texi: Document it.
21279 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
21281 * recog.h (check_asm_operands): Change return type from int to bool.
21282 (insn_invalid_p): Ditto.
21283 (verify_changes): Ditto.
21284 (apply_change_group): Ditto.
21285 (constrain_operands): Ditto.
21286 (constrain_operands_cached): Ditto.
21287 (validate_replace_rtx_subexp): Ditto.
21288 (validate_replace_rtx): Ditto.
21289 (validate_replace_rtx_part): Ditto.
21290 (validate_replace_rtx_part_nosimplify): Ditto.
21291 (added_clobbers_hard_reg_p): Ditto.
21292 (peep2_regno_dead_p): Ditto.
21293 (peep2_reg_dead_p): Ditto.
21294 (store_data_bypass_p): Ditto.
21295 (if_test_bypass_p): Ditto.
21296 * rtl.h (split_all_insns_noflow): Change
21297 return type from unsigned int to void.
21298 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
21299 of generated added_clobbers_hard_reg_p from int to bool and adjust
21300 function body accordingly. Change "used" variable type from
21302 * recog.cc (check_asm_operands): Change return type
21303 from int to bool and adjust function body accordingly.
21304 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
21305 (verify_changes): Change return type from int to bool.
21306 (apply_change_group): Change return type from int to bool
21307 and adjust function body accordingly.
21308 (validate_replace_rtx_subexp): Change return type from int to bool.
21309 (validate_replace_rtx): Ditto.
21310 (validate_replace_rtx_part): Ditto.
21311 (validate_replace_rtx_part_nosimplify): Ditto.
21312 (constrain_operands_cached): Ditto.
21313 (constrain_operands): Ditto. Change "lose" and "win"
21314 variables type from int to bool.
21315 (split_all_insns_noflow): Change return type from unsigned int
21316 to void and adjust function body accordingly.
21317 (peep2_regno_dead_p): Change return type from int to bool.
21318 (peep2_reg_dead_p): Ditto.
21319 (peep2_find_free_register): Change "success"
21320 variable type from int to bool
21321 (store_data_bypass_p_1): Change return type from int to bool.
21322 (store_data_bypass_p): Ditto.
21324 2023-06-19 Li Xu <xuli1@eswincomputing.com>
21326 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
21329 2023-06-19 Pan Li <pan2.li@intel.com>
21332 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
21334 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
21335 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
21336 VF_ZVE63 and VF_ZVE32.
21337 * config/riscv/vector.md
21338 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
21339 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
21340 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
21341 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
21342 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
21343 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
21344 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
21345 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
21346 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
21347 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
21349 2023-06-19 Pan Li <pan2.li@intel.com>
21352 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
21354 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
21355 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
21356 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
21357 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
21358 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
21359 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
21360 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
21361 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
21362 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
21363 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
21364 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
21365 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
21366 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
21367 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
21369 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
21371 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
21372 (gcn_init_libfuncs): Add div and mod functions for all modes.
21373 Add placeholders for divmod functions.
21374 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
21376 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
21378 * tree-vect-generic.cc: Include optabs-libfuncs.h.
21379 (get_compute_type): Check optab_libfunc.
21380 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
21381 (vectorizable_operation): Check optab_libfunc.
21383 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
21385 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
21386 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
21387 (V_MOV, V_MOV_ALT): Likewise.
21388 (scalar_mode, SCALAR_MODE): Add TImode.
21389 (vnsi, VnSI, vndi, VnDI): Likewise.
21390 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
21391 (mov<mode>, mov<mode>_unspec): Use V_MOV.
21392 (*mov<mode>_4reg): New insn.
21393 (mov<mode>_exec): New 4reg variant.
21394 (mov<mode>_sgprbase): Likewise.
21395 (reload_in<mode>, reload_out<mode>): Use V_MOV.
21396 (vec_set<mode>): Likewise.
21397 (vec_duplicate<mode><exec>): New 4reg variant.
21398 (vec_extract<mode><scalar_mode>): Likewise.
21399 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
21400 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
21401 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
21402 (fold_extract_last_<mode>): Use V_MOV.
21403 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
21404 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
21405 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
21406 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
21407 gather<mode>_insn_2offsets<exec>): Use V_MOV.
21408 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
21409 scatter<mode>_insn_1offset<exec_scatter>,
21410 scatter<mode>_insn_1offset_ds<exec_scatter>,
21411 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
21412 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
21413 mask_scatter_store<mode><vnsi>): Likewise.
21414 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
21415 (gcn_hard_regno_mode_ok): Likewise.
21416 (GEN_VNM): Add TImode support.
21417 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
21418 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
21419 V8TImode, and V2TImode.
21420 (print_operand): Add 'J' and 'K' print codes.
21422 2023-06-19 Richard Biener <rguenther@suse.de>
21424 PR tree-optimization/110298
21425 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
21426 Clear number of iterations info before cleaning up the CFG.
21428 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21430 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
21431 Simplify vec_concat of lowpart subreg and high part vec_select.
21433 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
21435 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
21437 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
21439 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
21440 Handle null niters_skip.
21442 2023-06-19 Richard Biener <rguenther@suse.de>
21444 * config/aarch64/aarch64.cc
21445 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
21446 to LOOP_VINFO_MASKS.
21448 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
21451 * common/config/avr/avr-common.cc: Remove setting
21452 of OPT_fdelete_null_pointer_checks.
21453 * config/avr/avr.cc (avr_option_override): Clear
21454 flag_delete_null_pointer_checks if zero_address_valid.
21455 (avr_addr_space_zero_address_valid): New function.
21456 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
21459 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21460 Robin Dapp <rdapp.gcc@gmail.com>
21462 * doc/md.texi: Add len_mask{load,store}.
21463 * genopinit.cc (main): Ditto.
21465 * internal-fn.cc (len_maskload_direct): Ditto.
21466 (len_maskstore_direct): Ditto.
21467 (expand_call_mem_ref): Ditto.
21468 (expand_partial_load_optab_fn): Ditto.
21469 (expand_len_maskload_optab_fn): Ditto.
21470 (expand_partial_store_optab_fn): Ditto.
21471 (expand_len_maskstore_optab_fn): Ditto.
21472 (direct_len_maskload_optab_supported_p): Ditto.
21473 (direct_len_maskstore_optab_supported_p): Ditto.
21474 * internal-fn.def (LEN_MASK_LOAD): Ditto.
21475 (LEN_MASK_STORE): Ditto.
21476 * optabs.def (OPTAB_CD): Ditto.
21478 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
21480 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
21482 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
21484 * config/riscv/autovec.md (<optab><mode>3): Implement binop
21486 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
21487 (enum vxrm_field_enum): Rename this...
21488 (enum fixed_point_rounding_mode): ...to this.
21489 (enum frm_field_enum): Rename this...
21490 (enum floating_point_rounding_mode): ...to this.
21491 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
21492 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
21494 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
21495 (riscv_excess_precision): Do not convert to float for ZVFH.
21496 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
21498 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
21500 * config/riscv/vector-iterators.md: Add VI_QH iterator.
21501 * config/riscv/autovec-opt.md
21502 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
21503 that includes sign extension.
21504 (@pred_extract_first_sextsi<mode>): Dito for SImode.
21506 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
21508 * config/riscv/autovec.md (vec_set<mode>): Implement.
21509 (vec_extract<mode><vel>): Implement.
21510 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
21511 (emit_vlmax_slide_insn): Declare.
21512 (emit_nonvlmax_slide_tu_insn): Declare.
21513 (emit_scalar_move_insn): Export.
21514 (emit_nonvlmax_integer_move_insn): Export.
21515 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
21516 (emit_nonvlmax_slide_tu_insn): New function.
21517 (emit_vlmax_masked_mu_insn): No change.
21518 (emit_vlmax_integer_move_insn): Export.
21520 2023-06-19 Richard Biener <rguenther@suse.de>
21522 * tree-vectorizer.h (enum vect_partial_vector_style): New.
21523 (_loop_vec_info::partial_vector_style): Likewise.
21524 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
21525 (rgroup_controls::compare_type): Add.
21526 (vec_loop_masks): Change from a typedef to auto_vec<>
21528 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
21529 Adjust. Convert niters_skip to compare_type.
21530 (vect_set_loop_condition_partial_vectors_avx512): New function
21531 implementing the AVX512 partial vector codegen.
21532 (vect_set_loop_condition): Dispatch to the correct
21533 vect_set_loop_condition_partial_vectors_* function based on
21534 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
21535 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
21536 in the original niter type.
21537 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
21538 partial_vector_style.
21539 (can_produce_all_loop_masks_p): Adjust.
21540 (vect_verify_full_masking): Produce the rgroup_controls vector
21541 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
21542 (vect_verify_full_masking_avx512): New function implementing
21543 verification of AVX512 style masking.
21544 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
21545 (vect_analyze_loop_2): Also try AVX512 style masking.
21547 (vect_estimate_min_profitable_iters): Implement AVX512 style
21548 mask producing cost.
21549 (vect_record_loop_mask): Do not build the rgroup_controls
21550 vector here but record masks in a hash-set.
21551 (vect_get_loop_mask): Implement AVX512 style mask query,
21552 complementing the existing while_ult style.
21554 2023-06-19 Richard Biener <rguenther@suse.de>
21556 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
21558 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
21559 (vectorize_fold_left_reduction): Adjust.
21560 (vect_transform_reduction): Likewise.
21561 (vectorizable_live_operation): Likewise.
21562 * tree-vect-stmts.cc (vectorizable_call): Likewise.
21563 (vectorizable_operation): Likewise.
21564 (vectorizable_store): Likewise.
21565 (vectorizable_load): Likewise.
21566 (vectorizable_condition): Likewise.
21568 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
21571 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
21572 Add Optimization option property.
21574 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21576 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
21577 Add new pattern for the abovementioned case.
21579 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21581 * config/xtensa/xtensa.cc
21582 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
21584 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
21586 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
21588 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
21590 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
21592 2023-06-19 liuhongt <hongtao.liu@intel.com>
21595 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
21597 (sse2_packsswb<mask_name>): .. this, ..
21598 (avx2_packsswb<mask_name>): .. this and ..
21599 (avx512bw_packsswb<mask_name>): .. this.
21600 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
21601 (sse2_packssdw<mask_name>): .. this, ..
21602 (avx2_packssdw<mask_name>): .. this and ..
21603 (avx512bw_packssdw<mask_name>): .. this.
21605 2023-06-19 liuhongt <hongtao.liu@intel.com>
21608 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
21609 UNSPEC_US_TRUNCATE instead of original us_truncate for
21611 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
21613 (mmx_packsswb): .. this and ..
21614 (mmx_packuswb): .. this.
21615 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
21617 (s_trunsuffix): Removed code iterator.
21618 (any_s_truncate): Ditto.
21619 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
21620 UNSPEC_US_TRUNCATE instead of original us_truncate.
21621 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
21622 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
21624 2023-06-18 Pan Li <pan2.li@intel.com>
21626 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
21628 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
21630 * rtl.h (*rtx_equal_p_callback_function):
21631 Change return type from int to bool.
21632 (rtx_equal_p): Ditto.
21633 (*hash_rtx_callback_function): Ditto.
21634 * rtl.cc (rtx_equal_p): Change return type from int to bool
21635 and adjust function body accordingly.
21636 * early-remat.cc (scratch_equal): Ditto.
21637 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
21638 (hash_with_unspec_callback): Ditto.
21640 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
21642 * config/arc/arc.md (movqi_insn): Allow certain constants to
21643 be stored into memory in the pattern's condition.
21644 (movsf_insn): Similarly.
21646 2023-06-18 Honza <jh@ryzen3.suse.cz>
21648 PR tree-optimization/109849
21649 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
21650 ES; handle ipa_predicate::not_sra_candidate.
21651 (evaluate_properties_for_edge): Pass es to
21652 evaluate_conditions_for_known_args.
21653 (ipa_fn_summary_t::duplicate): Handle sra candidates.
21654 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
21655 (load_or_store_of_ptr_parameter): New function.
21656 (points_to_possible_sra_candidate_p): New function.
21657 (analyze_function_body): Initialize points_to_possible_sra_candidate;
21658 determine sra predicates.
21659 (estimate_ipcp_clone_size_and_time): Update call of
21660 evaluate_conditions_for_known_args.
21661 (remap_edge_params): Update points_to_possible_sra_candidate.
21662 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
21663 (write_ipa_call_summary): Likewise.
21664 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
21665 (dump_condition): Dump it.
21666 * ipa-predicate.h (struct inline_param_summary): Add
21667 points_to_possible_sra_candidate.
21669 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
21671 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
21672 function for setting the carry flag.
21673 (ix86_expand_builtin) <handlecarry>: Use it here.
21674 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
21675 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
21676 (usubc<mode>5): Likewise.
21678 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
21680 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
21681 for the immediate constant shift count.
21682 (*concat<mode><dwi>3_2): Likewise.
21683 (*concat<mode><dwi>3_3): Likewise.
21684 (*concat<mode><dwi>3_4): Likewise.
21685 (*concat<mode><dwi>3_5): Likewise.
21686 (*concat<mode><dwi>3_6): Likewise.
21688 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
21690 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
21691 (hash_rtx): Remove.
21692 * early-remat.cc (remat_candidate_hasher::equal): Update
21693 to call rtx_equal_p with rtx_equal_p_callback_function argument.
21694 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
21695 (rtx_equal_p): Remove.
21696 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
21697 argument with NULL default value.
21698 (rtx_equal_p_cb): Remove function declaration.
21699 (hash_rtx_cb): Ditto.
21700 (hash_rtx): Add hash_rtx_callback_function argument
21701 with NULL default value.
21702 * sel-sched-ir.cc (free_nop_pool): Update function comment.
21703 (skip_unspecs_callback): Ditto.
21704 (vinsn_init): Update to call hash_rtx with
21705 hash_rtx_callback_function argument.
21706 (vinsn_equal_p): Ditto.
21708 2023-06-18 yulong <shiyulong@iscas.ac.cn>
21710 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
21711 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
21712 (ADJUST_ALIGNMENT): Ditto.
21713 (RVV_TUPLE_PARTIAL_MODES): Ditto.
21714 (ADJUST_NUNITS): Ditto.
21715 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
21717 (vfloat16mf4x3_t): Ditto.
21718 (vfloat16mf4x4_t): Ditto.
21719 (vfloat16mf4x5_t): Ditto.
21720 (vfloat16mf4x6_t): Ditto.
21721 (vfloat16mf4x7_t): Ditto.
21722 (vfloat16mf4x8_t): Ditto.
21723 (vfloat16mf2x2_t): Ditto.
21724 (vfloat16mf2x3_t): Ditto.
21725 (vfloat16mf2x4_t): Ditto.
21726 (vfloat16mf2x5_t): Ditto.
21727 (vfloat16mf2x6_t): Ditto.
21728 (vfloat16mf2x7_t): Ditto.
21729 (vfloat16mf2x8_t): Ditto.
21730 (vfloat16m1x2_t): Ditto.
21731 (vfloat16m1x3_t): Ditto.
21732 (vfloat16m1x4_t): Ditto.
21733 (vfloat16m1x5_t): Ditto.
21734 (vfloat16m1x6_t): Ditto.
21735 (vfloat16m1x7_t): Ditto.
21736 (vfloat16m1x8_t): Ditto.
21737 (vfloat16m2x2_t): Ditto.
21738 (vfloat16m2x3_t): Ditto.
21739 (vfloat16m2x4_t): Ditto.
21740 (vfloat16m4x2_t): Ditto.
21741 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
21742 (vfloat16mf4x3_t): Ditto.
21743 (vfloat16mf4x4_t): Ditto.
21744 (vfloat16mf4x5_t): Ditto.
21745 (vfloat16mf4x6_t): Ditto.
21746 (vfloat16mf4x7_t): Ditto.
21747 (vfloat16mf4x8_t): Ditto.
21748 (vfloat16mf2x2_t): Ditto.
21749 (vfloat16mf2x3_t): Ditto.
21750 (vfloat16mf2x4_t): Ditto.
21751 (vfloat16mf2x5_t): Ditto.
21752 (vfloat16mf2x6_t): Ditto.
21753 (vfloat16mf2x7_t): Ditto.
21754 (vfloat16mf2x8_t): Ditto.
21755 (vfloat16m1x2_t): Ditto.
21756 (vfloat16m1x3_t): Ditto.
21757 (vfloat16m1x4_t): Ditto.
21758 (vfloat16m1x5_t): Ditto.
21759 (vfloat16m1x6_t): Ditto.
21760 (vfloat16m1x7_t): Ditto.
21761 (vfloat16m1x8_t): Ditto.
21762 (vfloat16m2x2_t): Ditto.
21763 (vfloat16m2x3_t): Ditto.
21764 (vfloat16m2x4_t): Ditto.
21765 (vfloat16m4x2_t): Ditto.
21766 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
21767 * config/riscv/riscv.md: New.
21768 * config/riscv/vector-iterators.md: New.
21770 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
21772 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
21773 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
21774 Generalize special case for converting TImode to V1TImode to handle
21775 all 128-bit vector conversions.
21777 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
21779 * gcc-ar.cc (main): Refactor to slightly reduce code
21780 duplication. Avoid unnecessary elements in nargv.
21782 2023-06-16 Pan Li <pan2.li@intel.com>
21785 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
21786 integer reduction expand.
21787 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
21788 and the LMUL1 attr respectively.
21789 * config/riscv/vector.md
21790 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
21791 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
21792 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
21793 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
21794 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
21795 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
21796 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
21798 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21801 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
21803 2023-06-16 Jakub Jelinek <jakub@redhat.com>
21805 PR middle-end/79173
21806 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
21807 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
21808 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
21810 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
21811 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
21812 * builtins.cc (fold_builtin_addc_subc): New function.
21813 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
21814 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
21816 2023-06-16 Jakub Jelinek <jakub@redhat.com>
21818 PR tree-optimization/110271
21819 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
21820 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
21821 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
21823 2023-06-16 Martin Jambor <mjambor@suse.cz>
21825 * configure: Regenerate.
21827 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
21828 Uros Bizjak <ubizjak@gmail.com>
21831 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
21832 define_insn_and_split combine *add<dwi>3_doubleword with
21833 a *concat<mode><dwi>3 for more efficient lowering after reload.
21835 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
21837 * ira-lives.cc: Include except.h.
21838 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
21839 when the pseudo does not live at the exception landing pad.
21841 2023-06-16 Alex Coplan <alex.coplan@arm.com>
21843 * doc/invoke.texi: Document -Welaborated-enum-base.
21845 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21847 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
21848 (ushrn2_n): ... This.
21849 (sqshrn2_n): Rename builtins to...
21850 (ssqshrn2_n): ... This.
21851 (uqshrn2_n): Rename builtins to...
21852 (uqushrn2_n): ... This.
21853 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
21854 (vqshrn_high_n_s32): Likewise.
21855 (vqshrn_high_n_s64): Likewise.
21856 (vqshrn_high_n_u16): Likewise.
21857 (vqshrn_high_n_u32): Likewise.
21858 (vqshrn_high_n_u64): Likewise.
21859 (vshrn_high_n_s16): Likewise.
21860 (vshrn_high_n_s32): Likewise.
21861 (vshrn_high_n_s64): Likewise.
21862 (vshrn_high_n_u16): Likewise.
21863 (vshrn_high_n_u32): Likewise.
21864 (vshrn_high_n_u64): Likewise.
21865 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
21867 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
21868 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
21869 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
21870 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
21871 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
21872 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
21873 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
21874 Update expander for the above.
21876 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21878 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
21879 (shrn2_n): ... This.
21880 (rshrn2): Rename builtins to...
21881 (rshrn2_n): ... This.
21882 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
21883 (vrshrn_high_n_s32): Likewise.
21884 (vrshrn_high_n_s64): Likewise.
21885 (vrshrn_high_n_u16): Likewise.
21886 (vrshrn_high_n_u32): Likewise.
21887 (vrshrn_high_n_u64): Likewise.
21888 (vshrn_high_n_s16): Likewise.
21889 (vshrn_high_n_s32): Likewise.
21890 (vshrn_high_n_s64): Likewise.
21891 (vshrn_high_n_u16): Likewise.
21892 (vshrn_high_n_u32): Likewise.
21893 (vshrn_high_n_u64): Likewise.
21894 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
21896 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
21897 (aarch64_shrn2<mode>_insn_le): Likewise.
21898 (aarch64_shrn2<mode>_insn_be): Likewise.
21899 (aarch64_shrn2<mode>): Likewise.
21900 (aarch64_rshrn2<mode>_insn_le): Likewise.
21901 (aarch64_rshrn2<mode>_insn_be): Likewise.
21902 (aarch64_rshrn2<mode>): Likewise.
21903 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
21904 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
21905 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
21906 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
21907 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
21908 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
21909 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
21910 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
21911 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
21912 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
21913 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
21914 (aarch64_sqshrun2_n<mode>): New define_expand.
21915 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
21916 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
21917 (aarch64_sqrshrun2_n<mode>): New define_expand.
21918 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
21919 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
21920 Delete unspec values.
21921 (VQSHRN_N): Delete int iterator.
21923 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21925 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
21926 * config/aarch64/aarch64-simd.md
21927 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
21928 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
21929 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
21930 * config/aarch64/iterators.md (shrn_s): New code attribute.
21932 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21934 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
21936 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
21937 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
21938 (aarch64_sqrshrun_n<mode>_insn): Likewise.
21939 (aarch64_sqshrun_n<mode>_insn): Likewise.
21940 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
21941 (aarch64_sqshrun_n<mode>): Likewise.
21942 (aarch64_sqrshrun_n<mode>): Likewise.
21943 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
21945 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21947 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
21948 (shrn_n): ... This.
21949 (rshrn): Rename builtins to...
21950 (rshrn_n): ... This.
21951 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
21952 (vshrn_n_s32): Likewise.
21953 (vshrn_n_s64): Likewise.
21954 (vshrn_n_u16): Likewise.
21955 (vshrn_n_u32): Likewise.
21956 (vshrn_n_u64): Likewise.
21957 (vrshrn_n_s16): Likewise.
21958 (vrshrn_n_s32): Likewise.
21959 (vrshrn_n_s64): Likewise.
21960 (vrshrn_n_u16): Likewise.
21961 (vrshrn_n_u32): Likewise.
21962 (vrshrn_n_u64): Likewise.
21963 * config/aarch64/aarch64-simd.md
21964 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
21965 (aarch64_shrn<mode>): Likewise.
21966 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
21967 (aarch64_rshrn<mode>): Likewise.
21968 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
21969 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
21970 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
21971 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
21972 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
21973 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
21974 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
21975 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
21976 (aarch64_sqshrun_n<mode>): Likewise.
21977 (aarch64_sqrshrun_n<mode>): Likewise.
21978 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
21979 (TRUNCEXTEND): New code attribute.
21980 (TRUNC_SHIFT): Likewise.
21981 (shrn_op): Likewise.
21982 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
21985 2023-06-16 Pan Li <pan2.li@intel.com>
21987 * config/riscv/riscv-vsetvl.cc
21988 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
21990 2023-06-16 Richard Biener <rguenther@suse.de>
21992 PR tree-optimization/110278
21993 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
21994 (x != (typeof x)(x == 0) -> true): Likewise.
21996 2023-06-16 Pali Rohár <pali@kernel.org>
21998 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
21999 (REAL_LIBGCC_SPEC): New define.
22000 * config/i386/mingw.opt: Add mcrtdll=
22001 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
22002 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
22003 (STARTFILE_SPEC): Adjust for -mcrtdll=.
22004 * doc/invoke.texi: Add mcrtdll= documentation.
22006 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
22008 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
22009 (mips_handle_code_readable_attr):New static function.
22010 (mips_get_code_readable_attr):New static enum function.
22011 (mips_set_current_function):Set the code_readable mode.
22012 (mips_option_override):Same as above.
22013 * doc/extend.texi:Document code_readable.
22015 2023-06-16 Richard Biener <rguenther@suse.de>
22017 PR tree-optimization/110269
22018 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
22019 with tree_expr_nonzero_p ...
22020 * match.pd (cmp (convert? addr@0) integer_zerop): With this
22023 2023-06-15 Marek Polacek <polacek@redhat.com>
22025 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
22026 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
22027 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
22028 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
22029 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
22031 * configure: Regenerate.
22032 * doc/install.texi: Document --enable-host-pie.
22034 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
22036 * regcprop.cc (maybe_mode_change): Enable stack pointer
22039 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
22041 PR tree-optimization/110266
22042 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
22044 (adjust_realpart_expr): Ditto.
22046 2023-06-15 Jan Beulich <jbeulich@suse.com>
22048 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
22051 2023-06-15 Jan Beulich <jbeulich@suse.com>
22053 * config/i386/constraints.md: Mention k and r for B.
22055 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
22056 Andrew Pinski <apinski@marvell.com>
22059 * config/loongarch/loongarch.md: Modify the register constraints for template
22060 "jumptable" and "indirect_jump" from "r" to "e".
22062 2023-06-15 Xi Ruoyao <xry111@xry111.site>
22064 * config/loongarch/loongarch-tune.h (loongarch_align): New
22066 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
22068 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
22070 * config/loongarch/loongarch.cc
22071 (loongarch_option_override_internal): Set the value of
22072 -falign-functions= if -falign-functions is enabled but no value
22073 is given. Likewise for -falign-labels=.
22075 2023-06-15 Jakub Jelinek <jakub@redhat.com>
22077 PR middle-end/79173
22078 * internal-fn.def (UADDC, USUBC): New internal functions.
22079 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
22080 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
22081 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
22082 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
22083 match_uaddc_usubc): New functions.
22084 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
22085 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
22086 other optimizations have been successful for those.
22087 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
22088 * fold-const-call.cc (fold_const_call): Likewise.
22089 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
22090 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
22091 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
22093 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
22094 define_expand patterns.
22095 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
22096 into NOTE_INSN_DELETED note rather than nop instruction.
22097 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
22100 2023-06-15 Jakub Jelinek <jakub@redhat.com>
22102 PR middle-end/79173
22103 * config/i386/i386.md (subborrow<mode>): Add alternative with
22104 memory destination and add for it define_peephole2
22105 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
22106 destination in these patterns.
22108 2023-06-15 Jakub Jelinek <jakub@redhat.com>
22110 PR middle-end/79173
22111 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
22112 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
22113 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
22114 using memory destination in these patterns.
22116 2023-06-15 Jakub Jelinek <jakub@redhat.com>
22118 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
22119 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
22120 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
22121 * fold-const-call.cc (fold_const_call): ... here.
22123 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
22125 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
22126 Rename to <su>abd<mode>3.
22127 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
22130 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
22132 * doc/md.texi (sabd, uabd): Document them.
22133 * internal-fn.def (ABD): Use new optab.
22134 * optabs.def (sabd_optab, uabd_optab): New optabs,
22135 * tree-vect-patterns.cc (vect_recog_absolute_difference):
22136 Recognize the following idiom abs (a - b).
22137 (vect_recog_sad_pattern): Refactor to use
22138 vect_recog_absolute_difference.
22139 (vect_recog_abd_pattern): Use patterns found by
22140 vect_recog_absolute_difference to build a new ABD
22143 2023-06-15 chenxiaolong <chenxl04200420@163.com>
22145 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
22146 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
22148 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22150 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
22151 (expand_vec_perm_const_1): Add merge optmization.
22153 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
22156 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
22157 (riscv_pass_by_reference): Return true for vector mode
22159 2023-06-15 Pan Li <pan2.li@intel.com>
22161 * config/riscv/autovec-opt.md: Align the predictor sytle.
22162 * config/riscv/autovec.md: Ditto.
22164 2023-06-15 Pan Li <pan2.li@intel.com>
22166 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
22167 Take elen instead of scalar BITS_PER_WORD.
22168 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
22169 instead of scaler BITS_PER_WORD.
22171 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22173 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
22175 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22177 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
22178 Fix signed comparison warning in loop from npats to enelts.
22180 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
22182 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
22183 to offloading compilation.
22184 * config/gcn/mkoffload.cc (main): Adjust.
22185 * config/nvptx/mkoffload.cc (main): Likewise.
22186 * doc/invoke.texi (foffload-options): Update example.
22188 2023-06-14 liuhongt <hongtao.liu@intel.com>
22191 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
22192 for alternative 2 since there's no evex version for vpcmpeqd
22195 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
22197 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
22199 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
22201 * config/sh/divtab.cc: Remove.
22203 2023-06-13 Jakub Jelinek <jakub@redhat.com>
22205 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
22206 superfluous spaces around \t for vpcmpeqd.
22208 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
22210 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
22211 clearing vectors with only a single element. Set CLEARED if the
22212 vector was initialized to zero.
22214 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
22216 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
22219 (TUPLE_ENTRY): Undef.
22221 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22223 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
22224 (shuffle_generic_patterns): Ditto.
22225 (expand_vec_perm_const_1): Ditto.
22227 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22229 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
22230 (shuffle_decompress_patterns): Ditto.
22232 2023-06-13 Richard Biener <rguenther@suse.de>
22234 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
22236 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
22237 Kito Cheng <kito.cheng@sifive.com>
22239 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
22240 warning flag if func is not builtin
22241 * config/riscv/riscv.cc
22242 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
22243 (riscv_arg_has_vector): Determine whether the arg is vector type.
22244 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
22245 (riscv_init_cumulative_args): The same as header.
22246 (riscv_get_arg_info): Add the checking.
22247 (riscv_function_value): Check the func return and set warning flag
22248 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
22249 determine whether warning psabi or not.
22251 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22253 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
22254 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
22255 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
22256 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
22258 (arm_output_load_tpidr): Define.
22259 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
22260 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
22262 (reload_tp_hard): Likewise.
22263 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
22265 * doc/invoke.texi (Arm Options, mtp): Document new values.
22267 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22270 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
22271 AARCH64_TPIDRRO_EL0 value.
22272 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
22273 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
22274 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
22275 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
22277 2023-06-13 Alexandre Oliva <oliva@adacore.com>
22279 * range-op-float.cc (frange_nextafter): Drop inline.
22280 (frelop_early_resolve): Add static.
22281 (frange_float): Likewise.
22283 2023-06-13 Richard Biener <rguenther@suse.de>
22285 PR middle-end/110232
22286 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
22287 to check whether the buffer covers the whole vector.
22289 2023-06-13 Richard Biener <rguenther@suse.de>
22291 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
22292 .MASK_LOAD and friends set the size of the access to unknown.
22294 2023-06-13 Tejas Belagod <tbelagod@arm.com>
22297 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
22298 calls that have a constant input predicate vector.
22299 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
22300 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
22301 (svlast_impl::vect_all_same): Check if all vector elements are equal.
22303 2023-06-13 Andi Kleen <ak@linux.intel.com>
22305 * config/i386/gcc-auto-profile: Regenerate.
22307 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22309 * config/riscv/vector-iterators.md: Fix requirement.
22311 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22313 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
22314 (shuffle_decompress_patterns): New function.
22315 (expand_vec_perm_const_1): Add decompress optimization.
22317 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
22319 PR rtl-optimization/101188
22320 * postreload.cc (reload_cse_move2add_invalidate): New function,
22322 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
22324 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22326 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
22327 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
22328 and if maxv == 1, use constant element for duplicating into register.
22330 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
22332 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
22333 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
22334 (gimplify_adjust_omp_clauses): Change
22335 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
22336 GOMP_MAP_FORCE_PRESENT.
22337 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
22338 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
22339 to/from clauses with present modifier.
22341 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22343 PR tree-optimization/110205
22344 * range-op-float.cc (range_operator::fold_range): Add default FII
22346 * range-op-mixed.h (class operator_gt): Add missing final overrides.
22347 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
22348 (operator_lshift ::update_bitmask): Add final override.
22349 (operator_rshift ::update_bitmask): Add final override.
22350 * range-op.h (range_operator::fold_range): Add FII prototype.
22352 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22354 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
22355 Use range_op_handler directly.
22356 * range-op.cc (range_op_handler::range_op_handler): Unsigned
22357 param instead of tree-code.
22358 (ptr_op_widen_plus_signed): Delete.
22359 (ptr_op_widen_plus_unsigned): Delete.
22360 (ptr_op_widen_mult_signed): Delete.
22361 (ptr_op_widen_mult_unsigned): Delete.
22362 (range_op_table::initialize_integral_ops): Add new opcodes.
22363 * range-op.h (range_op_handler): Use unsigned.
22364 (OP_WIDEN_MULT_SIGNED): New.
22365 (OP_WIDEN_MULT_UNSIGNED): New.
22366 (OP_WIDEN_PLUS_SIGNED): New.
22367 (OP_WIDEN_PLUS_UNSIGNED): New.
22368 (RANGE_OP_TABLE_SIZE): New.
22369 (range_op_table::operator []): Use unsigned.
22370 (range_op_table::set): Use unsigned.
22371 (m_range_tree): Make unsigned.
22372 (ptr_op_widen_mult_signed): Remove.
22373 (ptr_op_widen_mult_unsigned): Remove.
22374 (ptr_op_widen_plus_signed): Remove.
22375 (ptr_op_widen_plus_unsigned): Remove.
22377 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22379 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
22380 manually as there is no access to the default operator.
22381 (cfn_copysign::fold_range): Don't check for validity.
22382 (cfn_ubsan::fold_range): Ditto.
22383 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
22384 * range-op.cc (default_operator): New.
22385 (range_op_handler::range_op_handler): Use default_operator
22387 (range_op_handler::operator bool): Move from header, compare
22388 against default operator.
22389 (range_op_handler::range_op): New.
22390 * range-op.h (range_op_handler::operator bool): Move.
22392 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22394 * range-op.cc (unified_table): Delete.
22395 (range_op_table operator_table): Instantiate.
22396 (range_op_table::range_op_table): Rename from unified_table.
22397 (range_op_handler::range_op_handler): Use range_op_table.
22398 * range-op.h (range_op_table::operator []): Inline.
22399 (range_op_table::set): Inline.
22401 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22403 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
22405 * gimple-range-op.cc (get_code): Rename from get_code_and_type
22407 (gimple_range_op_handler::supported_p): No need for type.
22408 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
22409 (cfn_copysign::fold_range): Ditto.
22410 (cfn_ubsan::fold_range): Ditto.
22411 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
22412 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
22413 * range-op-float.cc (operator_plus::op1_range): Ditto.
22414 (operator_mult::op1_range): Ditto.
22415 (range_op_float_tests): Ditto.
22416 * range-op.cc (get_op_handler): Remove.
22417 (range_op_handler::set_op_handler): Remove.
22418 (operator_plus::op1_range): No need for type.
22419 (operator_minus::op1_range): Ditto.
22420 (operator_mult::op1_range): Ditto.
22421 (operator_exact_divide::op1_range): Ditto.
22422 (operator_cast::op1_range): Ditto.
22423 (perator_bitwise_not::fold_range): Ditto.
22424 (operator_negate::fold_range): Ditto.
22425 * range-op.h (range_op_handler::range_op_handler): Remove type param.
22426 (range_cast): No need for type.
22427 (range_op_table::operator[]): Check for enum_code >= 0.
22428 * tree-data-ref.cc (compute_distributive_range): No need for type.
22429 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
22430 * value-query.cc (range_query::get_tree_range): Ditto.
22431 * value-relation.cc (relation_oracle::validate_relation): Ditto.
22432 * vr-values.cc (range_of_var_in_loop): Ditto.
22433 (simplify_using_ranges::fold_cond_with_ops): Ditto.
22435 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22437 * range-op-mixed.h (operator_max): Remove final.
22438 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
22439 (pointer_table::pointer_table): Remove.
22440 (class hybrid_max_operator): New.
22441 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
22442 * range-op.cc (pointer_tree_table): Remove.
22443 (unified_table::unified_table): Comment out MAX_EXPR.
22444 (get_op_handler): Remove check of pointer table.
22445 * range-op.h (class pointer_table): Remove.
22447 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22449 * range-op-mixed.h (operator_min): Remove final.
22450 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
22451 (class hybrid_min_operator): New.
22452 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
22453 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
22455 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22457 * range-op-mixed.h (operator_bitwise_or): Remove final.
22458 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
22459 (class hybrid_or_operator): New.
22460 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
22461 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
22463 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22465 * range-op-mixed.h (operator_bitwise_and): Remove final.
22466 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
22467 (class hybrid_and_operator): New.
22468 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
22469 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
22471 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22473 * Makefile.in (OBJS): Add range-op-ptr.o.
22474 * range-op-mixed.h (update_known_bitmask): Move prototype here.
22475 (minus_op1_op2_relation_effect): Move prototype here.
22476 (wi_includes_zero_p): Move function to here.
22477 (wi_zero_p): Ditto.
22478 * range-op.cc (update_known_bitmask): Remove static.
22479 (wi_includes_zero_p): Move to header.
22480 (wi_zero_p): Move to header.
22481 (minus_op1_op2_relation_effect): Remove static.
22482 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
22483 (pointer_plus_operator): Ditto.
22484 (pointer_min_max_operator): Ditto.
22485 (pointer_and_operator): Ditto.
22486 (pointer_or_operator): Ditto.
22487 (pointer_table): Ditto.
22488 (range_op_table::initialize_pointer_ops): Ditto.
22489 * range-op-ptr.cc: New.
22491 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22493 * range-op-mixed.h (class operator_max): Move from...
22494 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
22495 (get_op_handler): Remove the integral table.
22496 (class operator_max): Move from here.
22497 (integral_table::integral_table): Delete.
22498 * range-op.h (class integral_table): Delete.
22500 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22502 * range-op-mixed.h (class operator_min): Move from...
22503 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
22504 (class operator_min): Move from here.
22505 (integral_table::integral_table): Remove MIN_EXPR.
22507 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22509 * range-op-mixed.h (class operator_bitwise_or): Move from...
22510 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
22511 (class operator_bitwise_or): Move from here.
22512 (integral_table::integral_table): Remove BIT_IOR_EXPR.
22514 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22516 * range-op-mixed.h (class operator_bitwise_and): Move from...
22517 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
22518 (get_op_handler): Check for a pointer table entry first.
22519 (class operator_bitwise_and): Move from here.
22520 (integral_table::integral_table): Remove BIT_AND_EXPR.
22522 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22524 * range-op-mixed.h (class operator_bitwise_xor): Move from...
22525 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
22526 (class operator_bitwise_xor): Move from here.
22527 (integral_table::integral_table): Remove BIT_XOR_EXPR.
22528 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
22530 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22532 * range-op-mixed.h (class operator_bitwise_not): Move from...
22533 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
22534 (class operator_bitwise_not): Move from here.
22535 (integral_table::integral_table): Remove BIT_NOT_EXPR.
22536 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
22538 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
22540 * range-op-mixed.h (class operator_addr_expr): Move from...
22541 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
22542 (class operator_addr_expr): Move from here.
22543 (integral_table::integral_table): Remove ADDR_EXPR.
22544 (pointer_table::pointer_table): Remove ADDR_EXPR.
22546 2023-06-12 Pan Li <pan2.li@intel.com>
22548 * config/riscv/riscv-vector-builtins-types.def
22549 (vfloat16m1_t): Add type to lmul1 ops.
22550 (vfloat16m2_t): Likewise.
22551 (vfloat16m4_t): Likewise.
22553 2023-06-12 Richard Biener <rguenther@suse.de>
22555 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
22556 .MASK_STORE and friend set the size of the access to
22559 2023-06-12 Tamar Christina <tamar.christina@arm.com>
22561 * config.in: Regenerate.
22562 * configure: Regenerate.
22563 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
22565 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22567 * config/riscv/autovec-opt.md
22568 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
22569 (*<any_shiftrt:optab>trunc<mode>): Ditto.
22570 * config/riscv/autovec.md (<optab><mode>3): Change to
22571 define_insn_and_split.
22572 (v<optab><mode>3): Ditto.
22573 (trunc<mode><v_double_trunc>2): Ditto.
22575 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22577 * simplify-rtx.cc (simplify_const_unary_operation):
22578 Handle US_TRUNCATE, SS_TRUNCATE.
22580 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
22583 * doc/gm2.texi (Standard procedures): Fix Next link.
22585 2023-06-12 Tamar Christina <tamar.christina@arm.com>
22587 * config.in: Regenerate.
22589 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
22591 PR middle-end/110142
22592 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
22593 subtype to vect_widened_op_tree and remove subtype parameter, also
22594 remove superfluous overloaded function definition.
22595 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
22596 to call to vect_recog_widen_op_pattern.
22597 (vect_recog_widen_minus_pattern): Likewise.
22599 2023-06-12 liuhongt <hongtao.liu@intel.com>
22601 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
22602 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
22603 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
22604 (vec_unpacks_lo_<mode>): Ditto.
22605 (vec_unpacks_hi_<mode>): Ditto.
22606 (sse_movlhps_<mode>): New define_insn.
22607 (ssse3_palignr<mode>_perm): Extend to V_128H.
22608 (V_128H): New mode iterator.
22609 (ssepackPHmode): New mode attribute.
22610 (vunpck_extract_mode): Ditto.
22611 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
22612 (vpckfloat_temp_mode): Ditto.
22613 (vpckfloat_op_mode): Ditto.
22614 (vunpckfixt_mode): Extend to VxHF.
22615 (vunpckfixt_model): Ditto.
22616 (vunpckfixt_extract_mode): Ditto.
22618 2023-06-12 Richard Biener <rguenther@suse.de>
22620 PR middle-end/110200
22621 * genmatch.cc (expr::gen_transform): Put braces around
22622 the if arm for the (convert ...) short-cut.
22624 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
22627 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
22628 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
22630 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
22633 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
22634 floating constant itself for real_to_target call.
22636 2023-06-12 Pan Li <pan2.li@intel.com>
22638 * config/riscv/riscv-vector-builtins-types.def
22639 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
22640 (vfloat16mf2_t): Ditto.
22641 (vfloat16m1_t): Ditto.
22642 (vfloat16m2_t): Ditto.
22643 (vfloat16m4_t): Ditto.
22645 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
22647 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
22648 Do not require a stack frame when debugging is enabled for AIX.
22650 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
22652 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
22653 Remove attribute values.
22654 (insv_notbit): New post-reload insn.
22655 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
22656 (*insv.not-bit.0_split, *insv.not-bit.7_split)
22657 (*insv.xor-extract_split): Split to insv_notbit.
22658 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
22659 (*insv.xor-extract): Remove post-reload insns.
22660 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
22661 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
22662 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
22663 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
22665 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
22668 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
22669 (MSB, SIZE): New mode attributes.
22670 (any_shift): New code iterator.
22671 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
22672 (*lshr<mode>3_const_split): Add constraint alternative for
22673 the case of shift-offset = MSB. Ditch "length" attribute.
22674 (extzv<mode): New. replaces extzv. Adjust following patterns.
22675 Use avr_out_extr, avr_out_extr_not to print asm.
22676 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
22677 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
22678 * config/avr/constraints.md (C15, C23, C31, Yil): New
22679 * config/avr/predicates.md (reg_or_low_io_operand)
22680 (const7_operand, reg_or_low_io_operand)
22681 (const15_operand, const_0_to_15_operand)
22682 (const23_operand, const_0_to_23_operand)
22683 (const31_operand, const_0_to_31_operand): New.
22684 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
22685 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
22686 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
22687 MSB case to new insn constraint "r" for operands[1].
22688 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
22689 Handle these cases.
22690 (avr_rtx_costs_1): Adjust cost for a new pattern.
22692 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22694 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
22695 (vector_insn_info::parse_insn): Add rtx_insn parse.
22696 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
22697 (get_first_vsetvl): New function.
22698 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
22699 (pass_vsetvl::cleanup_insns): Remove it.
22700 (pass_vsetvl::ssa_post_optimization): New function.
22701 (has_no_uses): Ditto.
22702 (pass_vsetvl::propagate_avl): Remove it.
22703 (pass_vsetvl::df_post_optimization): New function.
22704 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
22705 * config/riscv/riscv-vsetvl.h: Adapt declaration.
22707 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
22709 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
22710 (ipcp_vr_lattice::print): Call dump method.
22711 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
22713 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
22714 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
22716 (initialize_node_lattices): Pass type when appropriate.
22717 (ipa_vr_operation_and_type_effects): Make type agnostic.
22718 (ipa_value_range_from_jfunc): Same.
22719 (propagate_vr_across_jump_function): Same.
22720 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
22721 (evaluate_properties_for_edge): Same.
22722 * ipa-prop.cc (ipa_vr::get_vrange): Same.
22723 (ipcp_update_vr): Same.
22724 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
22725 (ipa_range_set_and_normalize): Same.
22727 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
22731 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
22732 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
22733 (avr_pass_data_ifelse): New pass_data for it.
22734 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
22735 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
22736 (avr_out_cmp_ext): New functions.
22737 (compare_condtition): Make sure REG_CC dies in the branch insn.
22738 (avr_rtx_costs_1): Add computation of cbranch costs.
22739 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
22740 [ADJUST_LEN_CMP_SEXT]Handle them.
22741 (TARGET_CANONICALIZE_COMPARISON): New define.
22742 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
22743 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
22744 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
22745 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
22746 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
22747 (avr_out_cmp_zext): New Protos
22748 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
22749 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
22750 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
22751 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
22752 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
22753 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
22754 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
22755 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
22756 (adjust_len) [add_set_ZN, cmp_zext]: New.
22757 (QIPSI): New mode iterator.
22758 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
22759 (gelt): New code iterator.
22760 (gelt_eqne): New code attribute.
22761 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
22762 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
22763 (*cmpqi_sign_extend): Remove insns.
22764 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
22765 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
22766 * config/avr/predicates.md (scratch_or_d_register_operand): New.
22767 * config/avr/constraints.md (Yxx): New constraint.
22769 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22771 * config/riscv/autovec.md (select_vl<mode>): New pattern.
22772 * config/riscv/riscv-protos.h (expand_select_vl): New function.
22773 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
22775 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22777 * range-op-float.cc (foperator_mult_div_base): Delete.
22778 (foperator_mult_div_base::find_range): Make static local function.
22779 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
22780 (operator_mult::op1_range): Rename from foperator_mult.
22781 (operator_mult::op2_range): Ditto.
22782 (operator_mult::rv_fold): Ditto.
22783 (float_table::float_table): Remove MULT_EXPR.
22784 (class foperator_div): Inherit from range_operator.
22785 (float_table::float_table): Delete.
22786 * range-op-mixed.h (class operator_mult): Combined from integer
22788 * range-op.cc (float_tree_table): Delete.
22789 (op_mult): New object.
22790 (unified_table::unified_table): Add MULT_EXPR.
22791 (get_op_handler): Do not check float table any longer.
22792 (class cross_product_operator): Move to range-op-mixed.h.
22793 (class operator_mult): Move to range-op-mixed.h.
22794 (integral_table::integral_table): Remove MULT_EXPR.
22795 (pointer_table::pointer_table): Remove MULT_EXPR.
22796 * range-op.h (float_table): Remove.
22798 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22800 * range-op-float.cc (foperator_negate): Remove. Move prototypes
22801 to range-op-mixed.h
22802 (operator_negate::fold_range): Rename from foperator_negate.
22803 (operator_negate::op1_range): Ditto.
22804 (float_table::float_table): Remove NEGATE_EXPR.
22805 * range-op-mixed.h (class operator_negate): Combined from integer
22807 * range-op.cc (op_negate): New object.
22808 (unified_table::unified_table): Add NEGATE_EXPR.
22809 (class operator_negate): Move to range-op-mixed.h.
22810 (integral_table::integral_table): Remove NEGATE_EXPR.
22811 (pointer_table::pointer_table): Remove NEGATE_EXPR.
22813 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22815 * range-op-float.cc (foperator_minus): Remove. Move prototypes
22816 to range-op-mixed.h
22817 (operator_minus::fold_range): Rename from foperator_minus.
22818 (operator_minus::op1_range): Ditto.
22819 (operator_minus::op2_range): Ditto.
22820 (operator_minus::rv_fold): Ditto.
22821 (float_table::float_table): Remove MINUS_EXPR.
22822 * range-op-mixed.h (class operator_minus): Combined from integer
22824 * range-op.cc (op_minus): New object.
22825 (unified_table::unified_table): Add MINUS_EXPR.
22826 (class operator_minus): Move to range-op-mixed.h.
22827 (integral_table::integral_table): Remove MINUS_EXPR.
22828 (pointer_table::pointer_table): Remove MINUS_EXPR.
22830 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22832 * range-op-float.cc (foperator_abs): Remove. Move prototypes
22833 to range-op-mixed.h
22834 (operator_abs::fold_range): Rename from foperator_abs.
22835 (operator_abs::op1_range): Ditto.
22836 (float_table::float_table): Remove ABS_EXPR.
22837 * range-op-mixed.h (class operator_abs): Combined from integer
22839 * range-op.cc (op_abs): New object.
22840 (unified_table::unified_table): Add ABS_EXPR.
22841 (class operator_abs): Move to range-op-mixed.h.
22842 (integral_table::integral_table): Remove ABS_EXPR.
22843 (pointer_table::pointer_table): Remove ABS_EXPR.
22845 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22847 * range-op-float.cc (foperator_plus): Remove. Move prototypes
22848 to range-op-mixed.h
22849 (operator_plus::fold_range): Rename from foperator_plus.
22850 (operator_plus::op1_range): Ditto.
22851 (operator_plus::op2_range): Ditto.
22852 (operator_plus::rv_fold): Ditto.
22853 (float_table::float_table): Remove PLUS_EXPR.
22854 * range-op-mixed.h (class operator_plus): Combined from integer
22856 * range-op.cc (op_plus): New object.
22857 (unified_table::unified_table): Add PLUS_EXPR.
22858 (class operator_plus): Move to range-op-mixed.h.
22859 (integral_table::integral_table): Remove PLUS_EXPR.
22860 (pointer_table::pointer_table): Remove PLUS_EXPR.
22862 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22864 * range-op-mixed.h (class operator_cast): Combined from integer
22866 * range-op.cc (op_cast): New object.
22867 (unified_table::unified_table): Add op_cast
22868 (class operator_cast): Move to range-op-mixed.h.
22869 (integral_table::integral_table): Remove op_cast
22870 (pointer_table::pointer_table): Remove op_cast.
22872 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22874 * range-op-float.cc (operator_cst::fold_range): New.
22875 * range-op-mixed.h (class operator_cst): Move from integer file.
22876 * range-op.cc (op_cst): New object.
22877 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
22878 (class operator_cst): Move to range-op-mixed.h.
22879 (integral_table::integral_table): Remove op_cst.
22880 (pointer_table::pointer_table): Remove op_cst.
22882 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22884 * range-op-float.cc (foperator_identity): Remove. Move prototypes
22885 to range-op-mixed.h
22886 (operator_identity::fold_range): Rename from foperator_identity.
22887 (operator_identity::op1_range): Ditto.
22888 (float_table::float_table): Remove fop_identity.
22889 * range-op-mixed.h (class operator_identity): Combined from integer
22891 * range-op.cc (op_identity): New object.
22892 (unified_table::unified_table): Add op_identity.
22893 (class operator_identity): Move to range-op-mixed.h.
22894 (integral_table::integral_table): Remove identity.
22895 (pointer_table::pointer_table): Remove identity.
22897 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22899 * range-op-float.cc (foperator_ge): Remove. Move prototypes
22900 to range-op-mixed.h
22901 (operator_ge::fold_range): Rename from foperator_ge.
22902 (operator_ge::op1_range): Ditto.
22903 (float_table::float_table): Remove GE_EXPR.
22904 * range-op-mixed.h (class operator_ge): Combined from integer
22906 * range-op.cc (op_ge): New object.
22907 (unified_table::unified_table): Add GE_EXPR.
22908 (class operator_ge): Move to range-op-mixed.h.
22909 (ge_op1_op2_relation): Fold into
22910 operator_ge::op1_op2_relation.
22911 (integral_table::integral_table): Remove GE_EXPR.
22912 (pointer_table::pointer_table): Remove GE_EXPR.
22913 * range-op.h (ge_op1_op2_relation): Delete.
22915 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22917 * range-op-float.cc (foperator_gt): Remove. Move prototypes
22918 to range-op-mixed.h
22919 (operator_gt::fold_range): Rename from foperator_gt.
22920 (operator_gt::op1_range): Ditto.
22921 (float_table::float_table): Remove GT_EXPR.
22922 * range-op-mixed.h (class operator_gt): Combined from integer
22924 * range-op.cc (op_gt): New object.
22925 (unified_table::unified_table): Add GT_EXPR.
22926 (class operator_gt): Move to range-op-mixed.h.
22927 (gt_op1_op2_relation): Fold into
22928 operator_gt::op1_op2_relation.
22929 (integral_table::integral_table): Remove GT_EXPR.
22930 (pointer_table::pointer_table): Remove GT_EXPR.
22931 * range-op.h (gt_op1_op2_relation): Delete.
22933 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22935 * range-op-float.cc (foperator_le): Remove. Move prototypes
22936 to range-op-mixed.h
22937 (operator_le::fold_range): Rename from foperator_le.
22938 (operator_le::op1_range): Ditto.
22939 (float_table::float_table): Remove LE_EXPR.
22940 * range-op-mixed.h (class operator_le): Combined from integer
22942 * range-op.cc (op_le): New object.
22943 (unified_table::unified_table): Add LE_EXPR.
22944 (class operator_le): Move to range-op-mixed.h.
22945 (le_op1_op2_relation): Fold into
22946 operator_le::op1_op2_relation.
22947 (integral_table::integral_table): Remove LE_EXPR.
22948 (pointer_table::pointer_table): Remove LE_EXPR.
22949 * range-op.h (le_op1_op2_relation): Delete.
22951 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22953 * range-op-float.cc (foperator_lt): Remove. Move prototypes
22954 to range-op-mixed.h
22955 (operator_lt::fold_range): Rename from foperator_lt.
22956 (operator_lt::op1_range): Ditto.
22957 (float_table::float_table): Remove LT_EXPR.
22958 * range-op-mixed.h (class operator_lt): Combined from integer
22960 * range-op.cc (op_lt): New object.
22961 (unified_table::unified_table): Add LT_EXPR.
22962 (class operator_lt): Move to range-op-mixed.h.
22963 (lt_op1_op2_relation): Fold into
22964 operator_lt::op1_op2_relation.
22965 (integral_table::integral_table): Remove LT_EXPR.
22966 (pointer_table::pointer_table): Remove LT_EXPR.
22967 * range-op.h (lt_op1_op2_relation): Delete.
22969 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22971 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
22972 to range-op-mixed.h
22973 (operator_equal::fold_range): Rename from foperator_not_equal.
22974 (operator_equal::op1_range): Ditto.
22975 (float_table::float_table): Remove NE_EXPR.
22976 * range-op-mixed.h (class operator_not_equal): Combined from integer
22978 * range-op.cc (op_equal): New object.
22979 (unified_table::unified_table): Add NE_EXPR.
22980 (class operator_not_equal): Move to range-op-mixed.h.
22981 (not_equal_op1_op2_relation): Fold into
22982 operator_not_equal::op1_op2_relation.
22983 (integral_table::integral_table): Remove NE_EXPR.
22984 (pointer_table::pointer_table): Remove NE_EXPR.
22985 * range-op.h (not_equal_op1_op2_relation): Delete.
22987 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
22989 * range-op-float.cc (foperator_equal): Remove. Move prototypes
22990 to range-op-mixed.h
22991 (operator_equal::fold_range): Rename from foperator_equal.
22992 (operator_equal::op1_range): Ditto.
22993 (float_table::float_table): Remove EQ_EXPR.
22994 * range-op-mixed.h (class operator_equal): Combined from integer
22996 * range-op.cc (op_equal): New object.
22997 (unified_table::unified_table): Add EQ_EXPR.
22998 (class operator_equal): Move to range-op-mixed.h.
22999 (equal_op1_op2_relation): Fold into
23000 operator_equal::op1_op2_relation.
23001 (integral_table::integral_table): Remove EQ_EXPR.
23002 (pointer_table::pointer_table): Remove EQ_EXPR.
23003 * range-op.h (equal_op1_op2_relation): Delete.
23005 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
23007 * range-op-float.cc (class float_table): Move to header.
23008 (float_table::float_table): Move float only operators to...
23009 (range_op_table::initialize_float_ops): Here.
23010 * range-op-mixed.h: New.
23011 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
23013 (float_tree_table): Moved from range-op-float.cc.
23014 (unified_tree_table): New.
23015 (unified_table::unified_table): New. Call initialize routines.
23016 (get_op_handler): Check unified table first.
23017 (range_op_handler::range_op_handler): Handle no type constructor.
23018 (integral_table::integral_table): Move integral only operators to...
23019 (range_op_table::initialize_integral_ops): Here.
23020 (pointer_table::pointer_table): Move pointer only operators to...
23021 (range_op_table::initialize_pointer_ops): Here.
23022 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
23023 (get_bool_state): Ditto.
23024 (empty_range_varying): Ditto.
23025 (relop_early_resolve): Ditto.
23026 (class range_op_table): Add new init methods for range types.
23027 (class integral_table): Move declaration to here.
23028 (class pointer_table): Move declaration to here.
23029 (class float_table): Move declaration to here.
23031 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23032 Richard Sandiford <richard.sandiford@arm.com>
23033 Richard Biener <rguenther@suse.de>
23035 * doc/md.texi: Add SELECT_VL support.
23036 * internal-fn.def (SELECT_VL): Ditto.
23037 * optabs.def (OPTAB_D): Ditto.
23038 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
23039 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
23040 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
23041 (vectorizable_store): Ditto.
23042 (vectorizable_load): Ditto.
23043 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
23045 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
23048 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
23051 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
23053 * range-op.cc (range_cast): Move to...
23054 * range-op.h (range_cast): Here and add generic a version.
23056 2023-06-09 Marek Polacek <polacek@redhat.com>
23060 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
23061 warn about designated initializers in C only.
23063 2023-06-09 Andrew Pinski <apinski@marvell.com>
23065 PR tree-optimization/97711
23066 PR tree-optimization/110155
23067 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
23068 ((zero_one != 0) ? z <op> y : y): Likewise.
23070 2023-06-09 Andrew Pinski <apinski@marvell.com>
23072 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
23073 multiply rather than negation/bit_and.
23075 2023-06-09 Andrew Pinski <apinski@marvell.com>
23077 * match.pd (`X & -Y -> X * Y`): Allow for truncation
23078 and the same type for unsigned types.
23080 2023-06-09 Andrew Pinski <apinski@marvell.com>
23082 PR tree-optimization/110165
23083 PR tree-optimization/110166
23084 * match.pd (zero_one_valued_p): Don't accept
23085 signed 1-bit integers.
23087 2023-06-09 Richard Biener <rguenther@suse.de>
23089 * match.pd (two conversions in a row): Use element_precision
23090 to DTRT for VECTOR_TYPE.
23092 2023-06-09 Pan Li <pan2.li@intel.com>
23094 * config/riscv/riscv.md (enabled): Move to another place, and
23095 add fp_vector_disabled to the cond.
23096 (fp_vector_disabled): New attr defined for disabling fp.
23097 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
23099 2023-06-09 Pan Li <pan2.li@intel.com>
23101 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
23104 2023-06-09 liuhongt <hongtao.liu@intel.com>
23107 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
23108 view_convert_expr mask to signed type when folding pblendvb
23111 2023-06-09 liuhongt <hongtao.liu@intel.com>
23114 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
23115 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
23116 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
23118 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
23119 real codename for __builtin_ia32_pabs{b,w,d}.
23121 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
23123 * gimple-range-op.cc
23124 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
23125 (gimple_range_op_handler::maybe_builtin_call): Adjust.
23126 * gimple-range-op.h (operand1, operand2): Use m_operator.
23127 * range-op.cc (integral_table, pointer_table): Relocate.
23128 (get_op_handler): Rename from get_handler and handle all types.
23129 (range_op_handler::range_op_handler): Relocate.
23130 (range_op_handler::set_op_handler): Relocate and adjust.
23131 (range_op_handler::range_op_handler): Relocate.
23132 (dispatch_trio): New.
23133 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
23134 (range_op_handler::dispatch_kind): New.
23135 (range_op_handler::fold_range): Relocate and Use new dispatch value.
23136 (range_op_handler::op1_range): Ditto.
23137 (range_op_handler::op2_range): Ditto.
23138 (range_op_handler::lhs_op1_relation): Ditto.
23139 (range_op_handler::lhs_op2_relation): Ditto.
23140 (range_op_handler::op1_op2_relation): Ditto.
23141 (range_op_handler::set_op_handler): Use m_operator member.
23142 * range-op.h (range_op_handler::operator bool): Use m_operator.
23143 (range_op_handler::dispatch_kind): New.
23144 (range_op_handler::m_valid): Delete.
23145 (range_op_handler::m_int): Delete
23146 (range_op_handler::m_float): Delete
23147 (range_op_handler::m_operator): New.
23148 (range_op_table::operator[]): Relocate from .cc file.
23149 (range_op_table::set): Ditto.
23150 * value-range.h (class vrange): Make range_op_handler a friend.
23152 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
23154 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
23155 (cfn_pass_through_arg1): Adjust using statemenmt.
23156 (cfn_signbit): Change base class, adjust using statement.
23157 (cfn_copysign): Ditto.
23159 (cfn_sincos): Ditto.
23160 * range-op-float.cc (fold_range): Change class to range_operator.
23164 (lhs_op1_relation): Ditto.
23165 (lhs_op2_relation): Ditto.
23166 (op1_op2_relation): Ditto.
23167 (foperator_*): Ditto.
23168 (class float_table): New. Inherit from range_op_table.
23169 (floating_tree_table) Change to range_op_table pointer.
23170 (class floating_op_table): Delete.
23171 * range-op.cc (operator_equal): Adjust using statement.
23172 (operator_not_equal): Ditto.
23173 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
23174 (operator_minus, operator_cast): Ditto.
23175 (operator_bitwise_and, pointer_plus_operator): Ditto.
23176 (get_float_handle): Change return type.
23177 * range-op.h (range_operator_float): Delete. Relocate all methods
23178 into class range_operator.
23179 (range_op_handler::m_float): Change type to range_operator.
23180 (floating_op_table): Delete.
23181 (floating_tree_table): Change type.
23183 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
23185 * range-op.cc (range_operator::fold_range): Call virtual routine.
23186 (range_operator::update_bitmask): New.
23187 (operator_equal::update_bitmask): New.
23188 (operator_not_equal::update_bitmask): New.
23189 (operator_lt::update_bitmask): New.
23190 (operator_le::update_bitmask): New.
23191 (operator_gt::update_bitmask): New.
23192 (operator_ge::update_bitmask): New.
23193 (operator_ge::update_bitmask): New.
23194 (operator_plus::update_bitmask): New.
23195 (operator_minus::update_bitmask): New.
23196 (operator_pointer_diff::update_bitmask): New.
23197 (operator_min::update_bitmask): New.
23198 (operator_max::update_bitmask): New.
23199 (operator_mult::update_bitmask): New.
23200 (operator_div:operator_div):New.
23201 (operator_div::update_bitmask): New.
23202 (operator_div::m_code): New member.
23203 (operator_exact_divide::operator_exact_divide): New constructor.
23204 (operator_lshift::update_bitmask): New.
23205 (operator_rshift::update_bitmask): New.
23206 (operator_bitwise_and::update_bitmask): New.
23207 (operator_bitwise_or::update_bitmask): New.
23208 (operator_bitwise_xor::update_bitmask): New.
23209 (operator_trunc_mod::update_bitmask): New.
23210 (op_ident, op_unknown, op_ptr_min_max): New.
23211 (op_nop, op_convert): Delete.
23212 (op_ssa, op_paren, op_obj_type): Delete.
23213 (op_realpart, op_imagpart): Delete.
23214 (op_ptr_min, op_ptr_max): Delete.
23215 (pointer_plus_operator:update_bitmask): New.
23216 (range_op_table::set): Do not use m_code.
23217 (integral_table::integral_table): Adjust to single instances.
23218 * range-op.h (range_operator::range_operator): Delete.
23219 (range_operator::m_code): Delete.
23220 (range_operator::update_bitmask): New.
23222 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
23224 * range-op-float.cc (range_operator_float::fold_range): Return
23225 NAN of the result type.
23227 2023-06-08 Jakub Jelinek <jakub@redhat.com>
23229 * optabs.cc (expand_ffs): Add forward declaration.
23230 (expand_doubleword_clz): Rename to ...
23231 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
23232 handle also doubleword CTZ and FFS in addition to CLZ.
23233 (expand_unop): Adjust caller. Also call it for doubleword
23234 ctz_optab and ffs_optab.
23236 2023-06-08 Jakub Jelinek <jakub@redhat.com>
23239 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
23240 n_words == 2 recurse with mmx_ok as first argument rather than false.
23242 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
23244 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
23245 avoid sign extension/undefined behaviour when setting each bit.
23247 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
23248 Uros Bizjak <ubizjak@gmail.com>
23250 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
23251 Use new x86_stc instruction when the carry flag must be set.
23252 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
23253 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
23254 * config/i386/i386.h (TARGET_SLOW_STC): New define.
23255 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
23256 (x86_stc): New define_insn.
23257 (define_peephole2): Convert x86_stc into alternate implementation
23258 on pentium4 without -Os when a QImode register is available.
23259 (*x86_cmc): New define_insn.
23260 (define_peephole2): Convert *x86_cmc into alternate implementation
23261 on pentium4 without -Os when a QImode register is available.
23262 (*setccc): New define_insn_and_split for a no-op CCCmode move.
23263 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
23264 recognize (and eliminate) the carry flag being copied to itself.
23265 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
23266 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
23268 2023-06-07 Andrew Pinski <apinski@marvell.com>
23270 * match.pd: Fix comment for the
23271 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
23273 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
23274 Jeff Law <jlaw@ventanamicro.com>
23276 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
23277 (rotrsi3_sext): Expose generator.
23278 (rotlsi3 pattern): Hide generator.
23279 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
23281 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
23282 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
23283 (mulsi3, <optab>si3): Likewise.
23284 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
23285 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
23286 (<u>mulsidi3): Likewise.
23287 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
23288 (mulsi3_extended, <optab>si3_extended): Likewise.
23289 (splitter for shadd feeding divison): Update RTL pattern to account
23290 for changes in how 32 bit ops are expanded for TARGET_64BIT.
23291 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
23293 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
23296 * config/riscv/riscv.cc (riscv_print_operand): Calculate
23297 memmodel only when it is valid.
23299 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
23301 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
23302 for constant element of a vector.
23304 2023-06-07 Jakub Jelinek <jakub@redhat.com>
23306 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
23307 instead compare tree_nonzero_bits <= 1U rather than just == 1.
23309 2023-06-07 Alex Coplan <alex.coplan@arm.com>
23312 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
23314 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
23315 names for builtins.
23316 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
23317 setup if in_lto_p, just like we do for SVE.
23318 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
23319 (__arm_st64b): Delete.
23320 (__arm_st64bv): Delete.
23321 (__arm_st64bv0): Delete.
23323 2023-06-07 Alex Coplan <alex.coplan@arm.com>
23326 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
23327 Use input operand for the destination address.
23328 * config/aarch64/aarch64.md (st64b): Fix constraint on address
23331 2023-06-07 Alex Coplan <alex.coplan@arm.com>
23334 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
23335 Replace eight consecutive spaces with tabs.
23336 (aarch64_init_ls64_builtins): Likewise.
23337 (aarch64_expand_builtin_ls64): Likewise.
23338 * config/aarch64/aarch64.md (ld64b): Likewise.
23341 (st64bv0): Likewise.
23343 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
23345 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
23346 offset table pseudo to a general reg subset.
23348 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23350 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
23352 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
23354 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
23355 (aarch64_sqxtun2<mode>_le): Likewise.
23356 (aarch64_sqxtun2<mode>_be): Likewise.
23357 (aarch64_sqxtun2<mode>): Adjust for the above.
23358 (aarch64_sqmovun<mode>): New define_expand.
23359 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
23360 (half_mask): New mode attribute.
23361 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
23364 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23366 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
23368 (aarch64_addp<mode>_insn): ... This...
23369 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
23370 (aarch64_addp<mode>): New define_expand.
23372 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23374 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
23375 * config/riscv/riscv-v.cc
23376 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
23378 (rvv_builder::single_step_npatterns_p): New function.
23379 (rvv_builder::npatterns_all_equal_p): Ditto.
23380 (const_vec_all_in_range_p): Support POLY handling.
23381 (gen_const_vector_dup): Ditto.
23382 (emit_vlmax_gather_insn): Add vrgatherei16.
23383 (emit_vlmax_masked_gather_mu_insn): Ditto.
23384 (expand_const_vector): Add VLA SLP const vector support.
23385 (expand_vec_perm): Support POLY.
23386 (struct expand_vec_perm_d): New struct.
23387 (shuffle_generic_patterns): New function.
23388 (expand_vec_perm_const_1): Ditto.
23389 (expand_vec_perm_const): Ditto.
23390 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
23391 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
23393 2023-06-07 Andrew Pinski <apinski@marvell.com>
23395 PR middle-end/110117
23396 * expr.cc (expand_single_bit_test): Handle
23397 const_int from expand_expr.
23399 2023-06-07 Andrew Pinski <apinski@marvell.com>
23401 * expr.cc (do_store_flag): Rearrange the
23402 TER code so that it overrides the nonzero bits
23403 info if we had `a & POW2`.
23405 2023-06-07 Andrew Pinski <apinski@marvell.com>
23407 PR tree-optimization/110134
23408 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
23410 (-A CMP CST -> B CMP (-CST)): Likewise.
23412 2023-06-07 Andrew Pinski <apinski@marvell.com>
23414 PR tree-optimization/89263
23415 PR tree-optimization/99069
23416 PR tree-optimization/20083
23417 PR tree-optimization/94898
23418 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
23419 one of the operands are constant.
23421 2023-06-07 Andrew Pinski <apinski@marvell.com>
23423 * match.pd (zero_one_valued_p): Match 0 integer constant
23426 2023-06-07 Pan Li <pan2.li@intel.com>
23428 * config/riscv/riscv-vector-builtins-types.def
23429 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
23430 (vfloat32m1_t): Ditto.
23431 (vfloat32m2_t): Ditto.
23432 (vfloat32m4_t): Ditto.
23433 (vfloat32m8_t): Ditto.
23434 (vint16mf4_t): Ditto.
23435 (vint16mf2_t): Ditto.
23436 (vint16m1_t): Ditto.
23437 (vint16m2_t): Ditto.
23438 (vint16m4_t): Ditto.
23439 (vint16m8_t): Ditto.
23440 (vuint16mf4_t): Ditto.
23441 (vuint16mf2_t): Ditto.
23442 (vuint16m1_t): Ditto.
23443 (vuint16m2_t): Ditto.
23444 (vuint16m4_t): Ditto.
23445 (vuint16m8_t): Ditto.
23446 (vint32mf2_t): Ditto.
23447 (vint32m1_t): Ditto.
23448 (vint32m2_t): Ditto.
23449 (vint32m4_t): Ditto.
23450 (vint32m8_t): Ditto.
23451 (vuint32mf2_t): Ditto.
23452 (vuint32m1_t): Ditto.
23453 (vuint32m2_t): Ditto.
23454 (vuint32m4_t): Ditto.
23455 (vuint32m8_t): Ditto.
23457 2023-06-07 Jason Merrill <jason@redhat.com>
23460 * doc/invoke.texi: Document it.
23462 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
23464 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
23465 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
23466 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
23467 NOT (BITREVERSE x) as BITREVERSE (NOT x).
23468 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
23469 Optimize PARITY (BITREVERSE x) as PARITY x.
23470 Optimize BITREVERSE (BITREVERSE x) as x.
23471 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
23472 BITREVERSE of a constant integer at compile-time.
23473 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
23474 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
23475 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
23476 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
23477 Optimize COPYSIGN (x, ABS y) as ABS x.
23478 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
23479 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
23480 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
23481 arguments at compile-time.
23483 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
23485 * rtl.h (function_invariant_p): Change return type from int to bool.
23486 * reload1.cc (function_invariant_p): Change return type from
23487 int to bool and adjust function body accordingly.
23489 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23491 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
23492 (*single_<optab>mult_plus<mode>): Ditto.
23493 (*double_<optab>mult_plus<mode>): Ditto.
23494 (*sign_zero_extend_fma): Ditto.
23495 (*zero_sign_extend_fma): Ditto.
23496 * config/riscv/riscv-protos.h (enum insn_type): New enum.
23498 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
23499 Tobias Burnus <tobias@codesourcery.com>
23501 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
23502 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
23504 (omp_get_attachment): Handle map clauses with 'present' modifier.
23505 (omp_group_base): Likewise.
23506 (gimplify_scan_omp_clauses): Reorder present maps to come first.
23507 Set GOVD flags for present defaultmaps.
23508 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
23509 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
23511 (lower_omp_target): Handle map clauses with 'present' modifier.
23512 Handle 'to' and 'from' clauses with 'present'.
23513 * tree-core.h (enum omp_clause_defaultmap_kind): Add
23514 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
23515 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
23516 'from' clauses with 'present' modifier. Handle present defaultmap.
23517 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
23519 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
23521 * config/rs6000/genfusion.pl: Delete some dead code.
23523 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
23525 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
23527 (gen_ld_cmpi_p10): ... this.
23529 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
23532 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
23533 duplicate expression.
23535 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23537 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
23538 Handle unsigned reduc_plus_scal_ builtins.
23539 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
23540 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
23541 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
23542 __builtin_aarch64_reduc_plus_scal_v2di.
23543 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
23545 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23547 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
23548 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
23549 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
23551 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23553 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
23554 (aarch64_shrn<mode>_insn_be): Delete.
23555 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
23556 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
23557 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
23558 (aarch64_rshrn<mode>_insn_le): Delete.
23559 (aarch64_rshrn<mode>_insn_be): Delete.
23560 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
23561 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
23563 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23565 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
23567 (aarch64_pars_overlap_p): Likewise.
23568 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
23569 Express in terms of UNSPEC_ADDV.
23570 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
23571 (*aarch64_<su>addlv<mode>_reduction): Define.
23572 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
23573 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
23574 (aarch64_pars_overlap_p): Likewise.
23575 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
23576 (VQUADW): New mode attribute.
23577 (VWIDE2X_S): Likewise.
23579 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
23580 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
23582 2023-06-06 Richard Biener <rguenther@suse.de>
23584 PR middle-end/110055
23585 * gimplify.cc (gimplify_target_expr): Do not emit
23586 CLOBBERs for variables which have static storage duration
23587 after gimplifying their initializers.
23589 2023-06-06 Richard Biener <rguenther@suse.de>
23591 PR tree-optimization/109143
23592 * tree-ssa-structalias.cc (solution_set_expand): Avoid
23593 one bitmap iteration and optimize bit range setting.
23595 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
23597 PR bootstrap/110120
23598 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
23599 XVECEXP, not XEXP, to access first item of a PARALLEL.
23601 2023-06-06 Pan Li <pan2.li@intel.com>
23603 * config/riscv/riscv-vector-builtins-types.def
23604 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
23605 (vfloat16mf2_t): Likewise.
23606 (vfloat16m1_t): Likewise.
23607 (vfloat16m2_t): Likewise.
23608 (vfloat16m4_t): Likewise.
23609 (vfloat16m8_t): Likewise.
23610 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
23611 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
23613 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
23615 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
23616 for cfi reg/mem machmode
23617 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
23619 2023-06-06 Li Xu <xuli1@eswincomputing.com>
23621 * config/riscv/vector-iterators.md:
23622 Fix 'REQUIREMENT' for machine_mode 'MODE'.
23623 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
23624 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
23625 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
23627 2023-06-06 Pan Li <pan2.li@intel.com>
23629 * config/riscv/vector-iterators.md: Fix typo in mode attr.
23631 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
23632 Joel Hutton <joel.hutton@arm.com>
23634 * doc/generic.texi: Remove old tree codes.
23635 * expr.cc (expand_expr_real_2): Remove old tree code cases.
23636 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
23637 * optabs-tree.cc (optab_for_tree_code): Likewise.
23638 (supportable_half_widening_operation): Likewise.
23639 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
23640 * tree-inline.cc (estimate_operator_cost): Likewise.
23641 (op_symbol_code): Likewise.
23642 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
23643 (vect_analyze_data_ref_accesses): Likewise.
23644 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
23645 * cfgexpand.cc (expand_debug_expr): Likewise.
23646 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
23647 (supportable_widening_operation): Likewise.
23648 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
23650 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
23651 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
23652 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
23653 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
23654 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
23655 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
23656 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
23657 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
23659 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
23660 Joel Hutton <joel.hutton@arm.com>
23661 Tamar Christina <tamar.christina@arm.com>
23663 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
23665 (vec_widen_<su>add_lo_<mode>): ... to this.
23666 (vec_widen_<su>addl_hi_<mode>): Rename this ...
23667 (vec_widen_<su>add_hi_<mode>): ... to this.
23668 (vec_widen_<su>subl_lo_<mode>): Rename this ...
23669 (vec_widen_<su>sub_lo_<mode>): ... to this.
23670 (vec_widen_<su>subl_hi_<mode>): Rename this ...
23671 (vec_widen_<su>sub_hi_<mode>): ...to this.
23672 * doc/generic.texi: Document new IFN codes.
23673 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
23674 (commutative_binary_fn_p): Add widen_plus fn's.
23675 (widening_fn_p): New function.
23676 (narrowing_fn_p): New function.
23677 (direct_internal_fn_optab): Change visibility.
23678 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
23679 internal_fn that expands into multiple internal_fns for widening.
23680 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
23681 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
23682 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
23683 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
23684 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
23685 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
23686 (lookup_hilo_internal_fn): Likewise.
23687 (widening_fn_p): Likewise.
23688 (Narrowing_fn_p): Likewise.
23689 * optabs.cc (commutative_optab_p): Add widening plus optabs.
23690 * optabs.def (OPTAB_D): Define widen add, sub optabs.
23691 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
23692 patterns with a hi/lo or even/odd split.
23693 (vect_recog_sad_pattern): Refactor to use new IFN codes.
23694 (vect_recog_widen_plus_pattern): Likewise.
23695 (vect_recog_widen_minus_pattern): Likewise.
23696 (vect_recog_average_pattern): Likewise.
23697 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
23699 (supportable_widening_operation): Likewise.
23700 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
23702 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
23703 Joel Hutton <joel.hutton@arm.com>
23705 * tree-vect-patterns.cc: Add include for gimple-iterator.
23706 (vect_recog_widen_op_pattern): Refactor to use code_helper.
23707 (vect_gimple_build): New function.
23708 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
23710 (vectorizable_call): Likewise.
23711 (vect_gen_widened_results_half): Likewise.
23712 (vect_create_vectorized_demotion_stmts): Likewise.
23713 (vect_create_vectorized_promotion_stmts): Likewise.
23714 (vect_create_half_widening_stmts): Likewise.
23715 (vectorizable_conversion): Likewise.
23716 (supportable_widening_operation): Likewise.
23717 (supportable_narrowing_operation): Likewise.
23718 * tree-vectorizer.h (supportable_widening_operation): Change
23719 prototype to use code_helper.
23720 (supportable_narrowing_operation): Likewise.
23721 (vect_gimple_build): New function prototype.
23722 * tree.h (code_helper::safe_as_tree_code): New function.
23723 (code_helper::safe_as_fn_code): New function.
23725 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
23727 * wide-int.cc (wi::bitreverse_large): New function implementing
23728 bit reversal of an integer.
23729 * wide-int.h (wi::bitreverse): New (template) function prototype.
23730 (bitreverse_large): Prototype helper function/implementation.
23731 (wi::bitreverse): New template wrapper around bitreverse_large.
23733 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
23735 * rtl.h (print_rtl_single): Change return type from int to void.
23736 (print_rtl_single_with_indent): Ditto.
23737 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
23738 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
23739 (rtx_writer::print_rtx_operand_code_0): Ditto.
23740 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
23741 (rtx_writer::print_rtx_operand_code_i): Ditto.
23742 (rtx_writer::print_rtx_operand_code_u): Ditto.
23743 (rtx_writer::print_rtx_operand): Ditto.
23744 (rtx_writer::print_rtx): Ditto.
23745 (rtx_writer::finish_directive): Ditto.
23746 (print_rtl_single): Change return type from int to void
23747 and adjust function body accordingly.
23748 (rtx_writer::print_rtl_single_with_indent): Ditto.
23750 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
23752 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
23753 (reg_class_subset_p): Ditto.
23754 * reginfo.cc (reg_classes_intersect_p): Ditto.
23755 (reg_class_subset_p): Ditto.
23757 2023-06-05 Pan Li <pan2.li@intel.com>
23759 * config/riscv/riscv-vector-builtins-types.def
23760 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
23761 (vfloat32m1_t): Ditto.
23762 (vfloat32m2_t): Ditto.
23763 (vfloat32m4_t): Ditto.
23764 (vfloat32m8_t): Ditto.
23765 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
23766 (vint16mf2_t): Ditto.
23767 (vint16m1_t): Ditto.
23768 (vint16m2_t): Ditto.
23769 (vint16m4_t): Ditto.
23770 (vint16m8_t): Ditto.
23771 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
23772 (vuint16mf2_t): Ditto.
23773 (vuint16m1_t): Ditto.
23774 (vuint16m2_t): Ditto.
23775 (vuint16m4_t): Ditto.
23776 (vuint16m8_t): Ditto.
23777 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
23778 (vint32m1_t): Ditto.
23779 (vint32m2_t): Ditto.
23780 (vint32m4_t): Ditto.
23781 (vint32m8_t): Ditto.
23782 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
23783 (vuint32m1_t): Ditto.
23784 (vuint32m2_t): Ditto.
23785 (vuint32m4_t): Ditto.
23786 (vuint32m8_t): Ditto.
23787 * config/riscv/vector-iterators.md: Add FP=16 support for V,
23788 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
23790 2023-06-05 Andrew Pinski <apinski@marvell.com>
23792 PR bootstrap/110085
23793 * Makefile.in (clean): Remove the removing of
23794 MULTILIB_DIR/MULTILIB_OPTIONS directories.
23796 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
23798 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
23800 * config/mips/mips.cc (speculation_barrier_libfunc): New static
23802 (mips_init_libfuncs): Initialize it.
23803 (mips_emit_speculation_barrier): New function.
23804 * config/mips/mips.md (speculation_barrier): Call
23805 mips_emit_speculation_barrier.
23807 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23809 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
23810 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
23811 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
23812 (rvv_builder::get_merged_repeating_sequence): Ditto.
23813 (rvv_builder::get_merge_scalar_mask): Ditto.
23814 (emit_scalar_move_insn): Ditto.
23815 (emit_vlmax_integer_move_insn): Ditto.
23816 (emit_nonvlmax_integer_move_insn): Ditto.
23817 (emit_vlmax_gather_insn): Ditto.
23818 (emit_vlmax_masked_gather_mu_insn): Ditto.
23819 (get_repeating_sequence_dup_machine_mode): Ditto.
23821 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23823 * config/riscv/autovec.md: Split arguments.
23824 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
23825 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
23827 2023-06-04 Andrew Pinski <apinski@marvell.com>
23829 * expr.cc (do_store_flag): Improve for single bit testing
23830 not against zero but against that single bit.
23832 2023-06-04 Andrew Pinski <apinski@marvell.com>
23834 * expr.cc (do_store_flag): Extend the one bit checking case
23835 to handle the case where we don't have an and but rather still
23836 one bit is known to be non-zero.
23838 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
23840 * config/h8300/constraints.md (Zz): Make this a normal
23842 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
23843 * config/h8300/logical.md (H8/SX bit patterns): Remove.
23845 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
23847 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
23848 New insn_and_split patterns.
23850 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23853 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
23854 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
23855 (@vlmul_extx4<mode>): Ditto.
23856 (@vlmul_extx8<mode>): Ditto.
23857 (@vlmul_extx16<mode>): Ditto.
23858 (@vlmul_extx32<mode>): Ditto.
23859 (@vlmul_extx64<mode>): Ditto.
23860 (*vlmul_extx2<mode>): Ditto.
23861 (*vlmul_extx4<mode>): Ditto.
23862 (*vlmul_extx8<mode>): Ditto.
23863 (*vlmul_extx16<mode>): Ditto.
23864 (*vlmul_extx32<mode>): Ditto.
23865 (*vlmul_extx64<mode>): Ditto.
23867 2023-06-04 Pan Li <pan2.li@intel.com>
23869 * config/riscv/riscv-vector-builtins-types.def
23870 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
23871 (vfloat32m1_t): Likewise.
23872 (vfloat32m2_t): Likewise.
23873 (vfloat32m4_t): Likewise.
23874 (vfloat32m8_t): Likewise.
23875 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
23876 * config/riscv/vector-iterators.md: Add single to half machine
23879 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23881 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
23882 (*n<optab><mode>): Ditto.
23883 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
23884 (*n<optab><mode>): Ditto.
23885 * config/riscv/vector.md: Ditto.
23887 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
23890 * config/i386/i386-features.cc (scalar_chain::convert_compare):
23891 Update or delete REG_EQUAL notes, converting CONST_INT and
23892 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
23894 2023-06-04 Jason Merrill <jason@redhat.com>
23897 * tree-eh.cc (lower_resx): Pass the exception pointer to the
23899 * except.h: Tweak comment.
23901 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
23903 * postreload.cc (move2add_use_add2_insn): Handle
23904 trivial single_sets. Rename variable PAT to SET.
23905 (move2add_use_add3_insn, reload_cse_move2add): Similar.
23907 2023-06-04 Pan Li <pan2.li@intel.com>
23909 * config/riscv/riscv-vector-builtins-types.def
23910 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
23911 (vfloat16mf2_t): Likewise.
23912 (vfloat16m1_t): Likewise.
23913 (vfloat16m2_t): Likewise.
23914 (vfloat16m4_t): Likewise.
23915 (vfloat16m8_t): Likewise.
23916 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
23917 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
23918 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
23919 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
23922 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
23924 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
23927 2023-06-03 Die Li <lidie@eswincomputing.com>
23929 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
23931 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23933 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
23935 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23937 * config/riscv/vector.md: Add vector-opt.md.
23938 * config/riscv/autovec-opt.md: New file.
23940 2023-06-03 liuhongt <hongtao.liu@intel.com>
23942 PR tree-optimization/110067
23943 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
23944 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
23946 2023-06-03 liuhongt <hongtao.liu@intel.com>
23949 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
23950 (truncv2si<mode>2): Ditto.
23952 2023-06-02 Andrew Pinski <apinski@marvell.com>
23954 PR rtl-optimization/102733
23955 * dse.cc (store_info): Add addrspace field.
23956 (record_store): Record the address space
23957 and check to make sure they are the same.
23959 2023-06-02 Andrew Pinski <apinski@marvell.com>
23961 PR rtl-optimization/110042
23962 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
23963 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
23965 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
23968 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
23969 Make sure that we do not have a cap on field alignment before altering
23970 the struct layout based on the type alignment of the first entry.
23972 2023-06-02 David Faust <david.faust@oracle.com>
23975 * btfout.cc (btf_absolute_func_id): New function.
23976 (btf_asm_func_type): Call it here. Change index parameter from
23977 size_t to ctf_id_t. Use PRIu64 formatter.
23979 2023-06-02 Alex Coplan <alex.coplan@arm.com>
23981 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
23982 (btf_asm_datasec_type): Likewise.
23984 2023-06-02 Carl Love <cel@us.ibm.com>
23986 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
23987 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
23989 2023-06-02 Jason Merrill <jason@redhat.com>
23993 * tree.h (DECL_MERGEABLE): New.
23994 * tree-core.h (struct tree_decl_common): Mention it.
23995 * gimplify.cc (gimplify_init_constructor): Check it.
23996 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
23997 * varasm.cc (categorize_decl_for_section): Likewise.
23999 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
24001 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
24002 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
24003 (stack_regs_mentioned_p): Change return type from int to bool
24004 and adjust function body accordingly.
24005 (stack_regs_mentioned): Ditto.
24006 (check_asm_stack_operands): Ditto. Change "malformed_asm"
24008 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
24009 (swap_rtx_condition_1): Change return type from int to bool
24010 and adjust function body accordingly. Change "r" variable to bool.
24011 (swap_rtx_condition): Change return type from int to bool
24012 and adjust function body accordingly.
24013 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
24014 (subst_stack_regs): Ditto.
24015 (convert_regs_entry): Change return type from int to bool and adjust
24016 function body accordingly. Change "inserted" variable to bool.
24017 (convert_regs_1): Recode handling of control_flow_insn_deleted.
24018 (convert_regs_2): Recode handling of cfg_altered.
24019 (convert_regs): Ditto. Change "inserted" variable to bool.
24021 2023-06-02 Jason Merrill <jason@redhat.com>
24024 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
24025 (initializer_constant_valid_p_1): Compare float precision.
24027 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
24029 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
24032 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24034 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
24035 (vect_set_loop_condition_partial_vectors): Ditto.
24037 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
24040 * config/avr/avr.md: Add an RTL peephole to optimize operations on
24041 non-LD_REGS after a move from LD_REGS.
24042 (piaop): New code iterator.
24044 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
24047 * doc/install.texi: Document (optional) Perl usage for parallel
24048 testing of libgomp.
24050 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
24053 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
24056 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24057 KuanLin Chen <best124612@gmail.com>
24059 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
24060 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
24062 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24064 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
24066 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24068 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
24070 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24072 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
24074 (DEF_RVV_FRM_ENUM): Ditto.
24076 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24078 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
24079 intrinsic API expander
24080 * config/riscv/vector.md
24081 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
24082 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
24083 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
24085 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24087 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
24088 * config/riscv/predicates.md (vector_perm_operand): New predicate.
24089 * config/riscv/riscv-protos.h (enum insn_type): New enum.
24090 (expand_vec_perm): New function.
24091 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
24092 (gen_const_vector_dup): Ditto.
24093 (emit_vlmax_gather_insn): Ditto.
24094 (emit_vlmax_masked_gather_mu_insn): Ditto.
24095 (expand_vec_perm): Ditto.
24097 2023-06-01 Jason Merrill <jason@redhat.com>
24099 * doc/invoke.texi (-Wpedantic): Improve clarity.
24101 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
24103 * rtl.h (exp_equiv_p): Change return type from int to bool.
24104 * cse.cc (mention_regs): Change return type from int to bool
24105 and adjust function body accordingly.
24106 (exp_equiv_p): Ditto.
24107 (insert_regs): Ditto. Change "modified" function argument to bool
24108 and update usage accordingly.
24109 (record_jump_cond): Remove always zero "reversed_nonequality"
24110 function argument and update usage accordingly.
24111 (fold_rtx): Change "changed" variable to bool.
24112 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
24113 (is_dead_reg): Change return type from int to bool.
24115 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24117 * config/xtensa/xtensa.md (adddi3, subdi3):
24118 New RTL generation patterns implemented according to the instruc-
24119 tion idioms described in the Xtensa ISA reference manual (p. 600).
24121 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
24122 Uros Bizjak <ubizjak@gmail.com>
24125 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
24126 CODE_for_sse4_1_ptestzv2di.
24127 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
24128 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
24129 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
24130 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
24131 when expanding UNSPEC_PTEST to compare against zero.
24132 * config/i386/i386-features.cc (scalar_chain::convert_compare):
24133 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
24134 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
24135 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
24136 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
24137 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
24138 check for suitable matching modes for the UNSPEC_PTEST pattern.
24139 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
24140 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
24141 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
24142 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
24143 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
24144 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
24145 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
24147 (*ptest<mode>_and): Specify CCZ to only perform this optimization
24148 when only the Z flag is required.
24150 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
24153 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
24155 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24157 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
24158 Add =r,m and =r,m alternatives.
24159 (load_pair<DREG:mode><DREG2:mode>): Likewise.
24160 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
24162 2023-06-01 Pan Li <pan2.li@intel.com>
24164 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
24166 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
24167 (main): Disable FP16 tuple.
24168 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
24169 (TARGET_VECTOR_ELEN_FP_16): Ditto.
24170 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
24172 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
24173 (vfloat16mf2_t): Ditto.
24174 (vfloat16m1_t): Ditto.
24175 (vfloat16m2_t): Ditto.
24176 (vfloat16m4_t): Ditto.
24177 (vfloat16m8_t): Ditto.
24178 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
24180 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
24181 machine mode based on TARGET_VECTOR_ELEN_FP_16.
24183 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24185 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
24186 (DEF_RVV_FRM_ENUM): New macro.
24187 (handle_pragma_vector): Add FRM enum
24188 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
24195 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
24196 Richard Sandiford <richard.sandiford@arm.com>
24198 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
24199 Update call to wi::bswap.
24200 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
24201 Update call to wi::bswap.
24202 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
24203 Update calls to wi::bswap.
24204 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
24205 (wi::bswap_large): New function, with revised API.
24206 * wide-int.h (wi::bswap): New (template) function prototype.
24207 (wide_int_storage::bswap): Remove method.
24208 (sext_large, zext_large): Consistent indentation/line wrapping.
24209 (bswap_large): Prototype helper function containing implementation.
24210 (wi::bswap): New template wrapper around bswap_large.
24212 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24215 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
24216 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
24217 (usdot_prod<vsi2qi>): Rename to...
24218 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
24219 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
24220 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
24221 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
24222 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
24223 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
24224 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
24227 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24230 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
24231 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
24232 (aarch64_sq<r>dmulh_n<mode>): Rename to...
24233 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
24234 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
24235 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
24236 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
24237 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
24238 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
24239 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
24240 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
24241 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
24242 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
24243 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
24245 2023-05-31 David Faust <david.faust@oracle.com>
24247 * btfout.cc (btf_kind_names): New.
24248 (btf_kind_name): New.
24249 (btf_absolute_var_id): New utility function.
24250 (btf_relative_var_id): Likewise.
24251 (btf_relative_func_id): Likewise.
24252 (btf_absolute_datasec_id): Likewise.
24253 (btf_asm_type_ref): New.
24254 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
24255 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
24256 (btf_asm_varent): Likewise.
24257 (btf_asm_func_arg): Likewise.
24258 (btf_asm_datasec_entry): Likewise.
24259 (btf_asm_datasec_type): Likewise.
24260 (btf_asm_func_type): Likewise. Add index parameter.
24261 (btf_asm_enum_const): Likewise.
24262 (btf_asm_sou_member): Likewise.
24263 (output_btf_vars): Update btf_asm_* call accordingly.
24264 (output_asm_btf_sou_fields): Likewise.
24265 (output_asm_btf_enum_list): Likewise.
24266 (output_asm_btf_func_args_list): Likewise.
24267 (output_asm_btf_vlen_bytes): Likewise.
24268 (output_btf_func_types): Add ctf_container_ref parameter.
24269 Pass it to btf_asm_func_type.
24270 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
24271 (btf_output): Update output_btf_func_types call similarly.
24273 2023-05-31 David Faust <david.faust@oracle.com>
24275 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
24276 and BTF_KIND_FWD which do not use the size/type field at all.
24278 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
24280 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
24281 (active_insn_p): Ditto.
24282 (in_sequence_p): Ditto.
24283 (unshare_all_rtl): Change return type from int to void.
24284 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
24285 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
24286 and adjust function body accordingly.
24287 (mem_expr_equal_p): Ditto.
24288 (unshare_all_rtl): Change return type from int to void
24289 and adjust function body accordingly.
24290 (verify_rtx_sharing): Remove unneeded return.
24291 (active_insn_p): Change return type from int to bool
24292 and adjust function body accordingly.
24293 (in_sequence_p): Ditto.
24295 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
24297 * rtl.h (true_dependence): Change return type from int to bool.
24298 (canon_true_dependence): Ditto.
24299 (read_dependence): Ditto.
24300 (anti_dependence): Ditto.
24301 (canon_anti_dependence): Ditto.
24302 (output_dependence): Ditto.
24303 (canon_output_dependence): Ditto.
24304 (may_alias_p): Ditto.
24305 * alias.h (alias_sets_conflict_p): Ditto.
24306 (alias_sets_must_conflict_p): Ditto.
24307 (objects_must_conflict_p): Ditto.
24308 (nonoverlapping_memrefs_p): Ditto.
24309 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
24310 (record_set): Ditto.
24311 (base_alias_check): Ditto.
24312 (find_base_value): Ditto.
24313 (mems_in_disjoint_alias_sets_p): Ditto.
24314 (get_alias_set_entry): Ditto.
24315 (decl_for_component_ref): Ditto.
24316 (write_dependence_p): Ditto.
24317 (memory_modified_1): Ditto.
24318 (mems_in_disjoint_alias_set_p): Change return type from int to bool
24319 and adjust function body accordingly.
24320 (alias_sets_conflict_p): Ditto.
24321 (alias_sets_must_conflict_p): Ditto.
24322 (objects_must_conflict_p): Ditto.
24323 (rtx_equal_for_memref_p): Ditto.
24324 (base_alias_check): Ditto.
24325 (read_dependence): Ditto.
24326 (nonoverlapping_memrefs_p): Ditto.
24327 (true_dependence_1): Ditto.
24328 (true_dependence): Ditto.
24329 (canon_true_dependence): Ditto.
24330 (write_dependence_p): Ditto.
24331 (anti_dependence): Ditto.
24332 (canon_anti_dependence): Ditto.
24333 (output_dependence): Ditto.
24334 (canon_output_dependence): Ditto.
24335 (may_alias_p): Ditto.
24336 (init_alias_analysis): Change "changed" variable to bool.
24338 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24340 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
24341 expand into define_insn_and_split.
24343 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24345 * config/riscv/vector.md: Remove FRM.
24347 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24349 * config/riscv/vector.md: Remove FRM.
24351 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24353 * config/riscv/vector.md: Remove FRM.
24355 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
24358 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
24361 2023-05-31 Richard Biener <rguenther@suse.de>
24364 PR tree-optimization/109143
24365 * tree-ssa-structalias.cc (struct topo_info): Remove.
24366 (init_topo_info): Likewise.
24367 (free_topo_info): Likewise.
24368 (compute_topo_order): Simplify API, put the component
24369 with ESCAPED last so it's processed first.
24370 (topo_visit): Adjust.
24371 (solve_graph): Likewise.
24373 2023-05-31 Richard Biener <rguenther@suse.de>
24375 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
24377 (add_graph_edge): Count redundant edges we avoid to create.
24378 (dump_sa_stats): Dump them.
24379 (ipa_pta_execute): Do not dump generating constraints when
24380 we are not dumping them.
24382 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24384 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
24385 output template to avoid explicit switch on which_alternative.
24386 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
24387 (and<mode>3): Likewise.
24388 (ior<mode>3): Likewise.
24389 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
24391 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24393 * config/xtensa/predicates.md (xtensa_bit_join_operator):
24395 * config/xtensa/xtensa.md (ior_op): Remove.
24396 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
24397 insn_and_split pattern of the same name to express and capture
24398 the bit-combining operation with both sides swapped.
24399 In addition, replace use of code iterator with new operator
24401 (*shlrd_const, *shlrd_per_byte):
24402 Likewise regarding the code iterator.
24404 2023-05-31 Cui, Lili <lili.cui@intel.com>
24406 PR tree-optimization/110038
24407 * params.opt: Add a limit on tree-reassoc-width.
24408 * tree-ssa-reassoc.cc
24409 (rewrite_expr_tree_parallel): Add width limit.
24411 2023-05-31 Pan Li <pan2.li@intel.com>
24413 * common/config/riscv/riscv-common.cc:
24414 (riscv_implied_info): Add zvfh item.
24415 (riscv_ext_version_table): Ditto.
24416 (riscv_ext_flag_table): Ditto.
24417 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
24418 (TARGET_ZVFH): Ditto.
24420 2023-05-30 liuhongt <hongtao.liu@intel.com>
24422 PR tree-optimization/108804
24423 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
24424 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
24425 Add new parameter narrow_src_p.
24426 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
24427 vectorization by truncating to lower precision.
24428 * tree-vectorizer.h (vect_get_range_info): New declare.
24430 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
24432 * lra-int.h (lra_update_sp_offset): Add the prototype.
24433 * lra.cc (setup_sp_offset): Change the return type. Use
24434 lra_update_sp_offset.
24435 * lra-eliminations.cc (lra_update_sp_offset): New function.
24436 (lra_process_new_insns): Push the current insn to reprocess if the
24437 input reload changes sp offset.
24439 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
24442 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
24443 Fix misleading identation.
24445 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
24447 * rtl.h (comparison_dominates_p): Change return type from int to bool.
24448 (condjump_p): Ditto.
24449 (any_condjump_p): Ditto.
24450 (any_uncondjump_p): Ditto.
24451 (simplejump_p): Ditto.
24452 (returnjump_p): Ditto.
24453 (eh_returnjump_p): Ditto.
24454 (onlyjump_p): Ditto.
24455 (invert_jump_1): Ditto.
24456 (invert_jump): Ditto.
24457 (rtx_renumbered_equal_p): Ditto.
24458 (redirect_jump_1): Ditto.
24459 (redirect_jump): Ditto.
24460 (condjump_in_parallel_p): Ditto.
24461 * jump.cc (invert_exp_1): Adjust forward declaration.
24462 (comparison_dominates_p): Change return type from int to bool
24463 and adjust function body accordingly.
24464 (simplejump_p): Ditto.
24465 (condjump_p): Ditto.
24466 (condjump_in_parallel_p): Ditto.
24467 (any_uncondjump_p): Ditto.
24468 (any_condjump_p): Ditto.
24469 (returnjump_p): Ditto.
24470 (eh_returnjump_p): Ditto.
24471 (onlyjump_p): Ditto.
24472 (redirect_jump_1): Ditto.
24473 (redirect_jump): Ditto.
24474 (invert_exp_1): Ditto.
24475 (invert_jump_1): Ditto.
24476 (invert_jump): Ditto.
24477 (rtx_renumbered_equal_p): Ditto.
24479 2023-05-30 Andrew Pinski <apinski@marvell.com>
24481 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
24482 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
24483 Add ne as a possible cmp.
24484 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
24486 2023-05-30 Andrew Pinski <apinski@marvell.com>
24488 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
24491 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
24493 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
24494 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
24495 (and (extend X) C) as (zero_extend (and X C)), to also optimize
24496 modes wider than HOST_WIDE_INT.
24498 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
24501 * simplify-rtx.cc (simplify_const_relational_operation): Return
24502 early if we have a MODE_CC comparison that isn't a COMPARE against
24505 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
24507 * config/riscv/riscv.cc (riscv_const_insns): Allow
24508 const_vec_duplicates.
24510 2023-05-30 liuhongt <hongtao.liu@intel.com>
24512 PR middle-end/108938
24513 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
24514 function, cut from original find_bswap_or_nop function.
24515 (find_bswap_or_nop): Add a new parameter, detect bswap +
24516 rotate and save rotate result in the new parameter.
24517 (bswap_replace): Add a new parameter to indicate rotate and
24518 generate rotate stmt if needed.
24519 (maybe_optimize_vector_constructor): Adjust for new rotate
24520 parameter in the upper 2 functions.
24521 (pass_optimize_bswap::execute): Ditto.
24522 (imm_store_chain_info::output_merged_store): Ditto.
24524 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24526 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
24527 (aarch64_<su>adalp<mode>): New define_expand.
24528 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
24529 (aarch64_<su>addlp<mode>): Convert to define_expand.
24530 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
24531 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
24533 (USADDLP): Likewise.
24534 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
24536 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24538 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
24539 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
24540 srhadd, urhadd builtin codes for standard optab ones.
24541 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
24542 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
24544 (<u>avg<mode>3_ceil): Rename to...
24545 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
24547 (aarch64_<su>hsub<mode>): New define_expand.
24548 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
24549 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
24550 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
24552 2023-05-30 Andreas Schwab <schwab@suse.de>
24555 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
24556 match libsanitizer.
24558 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24560 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
24561 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
24563 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
24564 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
24565 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
24566 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
24567 (aarch64_<sra_op>sra_n<mode>): New define_expand.
24568 (aarch64_<sra_op>rsra_n<mode>): Likewise.
24569 (aarch64_<sur>sra_n<mode>): Rename to...
24570 (aarch64_<sur>sra_ndi): ... This.
24571 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
24572 any_target_p argument.
24573 (aarch64_extract_vec_duplicate_wide_int): Define.
24574 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
24575 (aarch64_const_vec_rnd_cst_p): Likewise.
24576 (aarch64_vector_mode_supported_any_target_p): Likewise.
24577 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
24578 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
24579 (VSRA): Adjust for the above.
24581 (V2XWIDE): New mode_attr.
24582 (vec_or_offset): Likewise.
24583 (SHIFTEXTEND): Likewise.
24584 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
24586 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
24587 clarify that it applies to current target options.
24588 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
24589 * doc/tm.texi.in: Regenerate.
24590 * stor-layout.cc (mode_for_vector): Check
24591 vector_mode_supported_any_target_p when iterating through vector modes.
24592 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
24593 clarify that it applies to current target options.
24594 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
24596 2023-05-30 Lili Cui <lili.cui@intel.com>
24598 PR tree-optimization/98350
24599 * tree-ssa-reassoc.cc
24600 (rewrite_expr_tree_parallel): Rewrite this function.
24601 (rank_ops_for_fma): New.
24602 (reassociate_bb): Handle new function.
24604 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
24606 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
24607 (rtx_unstable_p): Ditto.
24608 (reg_mentioned_p): Ditto.
24609 (reg_referenced_p): Ditto.
24610 (reg_used_between_p): Ditto.
24611 (reg_set_between_p): Ditto.
24612 (modified_between_p): Ditto.
24613 (no_labels_between_p): Ditto.
24614 (modified_in_p): Ditto.
24615 (reg_set_p): Ditto.
24616 (multiple_sets): Ditto.
24617 (set_noop_p): Ditto.
24618 (noop_move_p): Ditto.
24619 (reg_overlap_mentioned_p): Ditto.
24620 (dead_or_set_p): Ditto.
24621 (dead_or_set_regno_p): Ditto.
24622 (find_reg_fusage): Ditto.
24623 (find_regno_fusage): Ditto.
24624 (side_effects_p): Ditto.
24625 (volatile_refs_p): Ditto.
24626 (volatile_insn_p): Ditto.
24627 (may_trap_p_1): Ditto.
24628 (may_trap_p): Ditto.
24629 (may_trap_or_fault_p): Ditto.
24630 (computed_jump_p): Ditto.
24631 (auto_inc_p): Ditto.
24632 (loc_mentioned_in_p): Ditto.
24633 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
24634 (rtx_unstable_p): Change return type from int to bool
24635 and adjust function body accordingly.
24636 (rtx_addr_can_trap_p): Ditto.
24637 (reg_mentioned_p): Ditto.
24638 (no_labels_between_p): Ditto.
24639 (reg_used_between_p): Ditto.
24640 (reg_referenced_p): Ditto.
24641 (reg_set_between_p): Ditto.
24642 (reg_set_p): Ditto.
24643 (modified_between_p): Ditto.
24644 (modified_in_p): Ditto.
24645 (multiple_sets): Ditto.
24646 (set_noop_p): Ditto.
24647 (noop_move_p): Ditto.
24648 (reg_overlap_mentioned_p): Ditto.
24649 (dead_or_set_p): Ditto.
24650 (dead_or_set_regno_p): Ditto.
24651 (find_reg_fusage): Ditto.
24652 (find_regno_fusage): Ditto.
24653 (remove_node_from_insn_list): Ditto.
24654 (volatile_insn_p): Ditto.
24655 (volatile_refs_p): Ditto.
24656 (side_effects_p): Ditto.
24657 (may_trap_p_1): Ditto.
24658 (may_trap_p): Ditto.
24659 (may_trap_or_fault_p): Ditto.
24660 (computed_jump_p): Ditto.
24661 (auto_inc_p): Ditto.
24662 (loc_mentioned_in_p): Ditto.
24663 * combine.cc (can_combine_p): Update indirect function.
24665 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24667 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
24668 * config/riscv/iterators.md: New attribute.
24669 * config/riscv/vector-iterators.md: New attribute.
24671 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
24673 * config/riscv/riscv.md: Fix signed and unsigned comparison
24676 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24678 * config/riscv/autovec.md (fnma<mode>4): New pattern.
24679 (*fnma<mode>): Ditto.
24681 2023-05-29 Die Li <lidie@eswincomputing.com>
24683 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
24685 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
24686 process for TARGET_XTHEADCONDMOV
24688 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
24691 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
24692 TARGET_AVX512BW to generate truncv16hiv16qi2.
24694 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
24696 * config/riscv/riscv.md (and<mode>3): New expander.
24697 (*and<mode>3) New pattern.
24698 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
24701 2023-05-29 Pan Li <pan2.li@intel.com>
24703 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
24704 comments and rename local variables.
24705 (emit_nonvlmax_insn): Diito.
24706 (emit_vlmax_merge_insn): Ditto.
24707 (emit_vlmax_cmp_insn): Ditto.
24708 (emit_vlmax_cmp_mu_insn): Ditto.
24709 (emit_scalar_move_insn): Ditto.
24711 2023-05-29 Pan Li <pan2.li@intel.com>
24713 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
24715 (emit_nonvlmax_insn): Ditto.
24716 (emit_vlmax_merge_insn): Ditto.
24717 (emit_vlmax_cmp_insn): Ditto.
24718 (emit_vlmax_cmp_mu_insn): Ditto.
24719 (expand_vec_series): Ditto.
24721 2023-05-29 Pan Li <pan2.li@intel.com>
24723 * config/riscv/riscv-protos.h (enum insn_type): New type.
24724 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
24725 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
24727 (rvv_builder::get_merged_repeating_sequence): Ditto.
24728 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
24729 to evaluate the optimization cost.
24730 (rvv_builder::get_merge_scalar_mask): New function to get the merge
24732 (emit_scalar_move_insn): New function to emit vmv.s.x.
24733 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
24734 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
24736 (get_repeating_sequence_dup_machine_mode): New function to get the dup
24738 (expand_vector_init_merge_repeating_sequence): New function to perform
24740 (expand_vec_init): Add this vector init optimization.
24741 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
24743 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
24745 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
24746 put onto the increment when it is inserted after the position.
24748 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
24750 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
24753 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24755 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
24757 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24759 * config/riscv/autovec.md (fma<mode>4): New pattern.
24760 (*fma<mode>): Ditto.
24761 * config/riscv/riscv-protos.h (enum insn_type): New enum.
24762 (emit_vlmax_ternary_insn): New function.
24763 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
24765 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24767 * config/riscv/vector.md: Fix vimuladd instruction bug.
24769 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24771 * config/riscv/riscv.cc (global_state_unknown_p): New function.
24772 (riscv_mode_after): Fix incorrect VXM.
24774 2023-05-29 Pan Li <pan2.li@intel.com>
24776 * common/config/riscv/riscv-common.cc:
24777 (riscv_implied_info): Add zvfhmin item.
24778 (riscv_ext_version_table): Ditto.
24779 (riscv_ext_flag_table): Ditto.
24780 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
24781 (TARGET_ZFHMIN): Align indent.
24782 (TARGET_ZFH): Ditto.
24783 (TARGET_ZVFHMIN): New macro.
24785 2023-05-27 liuhongt <hongtao.liu@intel.com>
24788 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
24789 to VI_AVX2 to cover more modes.
24791 2023-05-27 liuhongt <hongtao.liu@intel.com>
24793 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
24794 Remove ATOM and ICELAKE(and later) core processors.
24796 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
24798 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
24800 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
24802 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
24805 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
24806 Juzhe Zhong <juzhe.zhong@rivai.ai>
24808 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
24810 (<optab><v_quad_trunc><mode>2): Dito.
24811 (<optab><v_oct_trunc><mode>2): Dito.
24812 (trunc<mode><v_double_trunc>2): Dito.
24813 (trunc<mode><v_quad_trunc>2): Dito.
24814 (trunc<mode><v_oct_trunc>2): Dito.
24815 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
24816 (autovectorize_vector_modes): Define.
24817 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
24819 (autovectorize_vector_modes): Implement hook.
24820 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
24821 Implement target hook.
24822 (riscv_vectorize_related_mode): Implement target hook.
24823 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
24824 (TARGET_VECTORIZE_RELATED_MODE): Define.
24825 * config/riscv/vector-iterators.md: Add lowercase versions of
24826 mode_attr iterators.
24828 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
24829 Tobias Burnus <tobias@codesourcery.com>
24831 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
24832 (ASM_SPEC): Use XNACKOPT.
24833 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
24834 (enum hsaco_attr_type): ... this, and generalize the names.
24835 (TARGET_XNACK): New macro.
24836 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
24838 (output_file_start): Update xnack handling.
24839 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
24840 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
24841 (sram_ecc_type): Rename to ...
24842 (hsaco_attr_type: ... this.)
24843 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
24844 (TEST_XNACK): Delete.
24845 (TEST_XNACK_ANY): New macro.
24846 (TEST_XNACK_ON): New macro.
24847 (main): Support the new -mxnack=on/off/any syntax.
24848 * doc/invoke.texi (-mxnack): Update for new syntax.
24850 2023-05-26 Andrew Pinski <apinski@marvell.com>
24852 * genmatch.cc (emit_debug_printf): New function.
24853 (dt_simplify::gen_1): Emit printf into the code
24854 before the `return true` or returning the folded result
24855 instead of emitting it always.
24857 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24859 * config/xtensa/xtensa-protos.h
24860 (xtensa_expand_block_set_unrolled_loop,
24861 xtensa_expand_block_set_small_loop): Remove.
24862 (xtensa_expand_block_set): New prototype.
24863 * config/xtensa/xtensa.cc
24864 (xtensa_expand_block_set_libcall): New subfunction.
24865 (xtensa_expand_block_set_unrolled_loop,
24866 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
24867 (xtensa_expand_block_set): New function that calls the above
24869 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
24870 xtensa_expand_block_set().
24872 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24874 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
24876 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
24878 * config/xtensa/constraints.md (O):
24879 Change to use the above function.
24880 * config/xtensa/xtensa.md (*subsi3_from_const):
24881 New insn_and_split pattern.
24883 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
24885 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
24886 Retract excessive line folding, and correct the value of
24887 the "length" insn attribute related to TARGET_DENSITY.
24888 (*extzvsi-1bit_addsubx): Ditto.
24890 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
24892 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
24893 Do not disable call to ix86_expand_vecop_qihi2.
24895 2023-05-26 liuhongt <hongtao.liu@intel.com>
24899 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
24900 calculation when !hard_regno_mode_ok for GENERAL_REGS and
24901 mode, otherwise still use GENERAL_REGS.
24903 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24905 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
24906 explict VL and drop VL in ops.
24908 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
24910 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
24911 in different BB blocks.
24913 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
24915 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
24916 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
24917 instructions when available. Emulate truncation via
24918 ix86_expand_vec_perm_const_1 when native truncate insn
24920 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
24921 when available. Trivially rename some variables.
24922 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
24923 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
24924 calculation of V*QImode emulations to account for generation of
24925 2x-wider mode instructions.
24926 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
24927 emulations to account for generation of 2x-wider mode instructions.
24929 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
24932 * config/avr/avr.cc (avr_can_inline_p): New static function.
24933 (TARGET_CAN_INLINE_P): Define to that function.
24935 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
24938 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
24939 Handle any bit position and use mode QISI.
24940 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
24941 of 2 insns for bit-transfer of respective style.
24943 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
24945 * config/arm/iterators.md (MVE_6): Remove.
24946 * config/arm/mve.md: Replace MVE_6 with MVE_5.
24948 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
24949 Richard Sandiford <richard.sandiford@arm.com>
24951 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
24953 (vect_set_loop_controls_directly): Add decrement IV support.
24954 (vect_set_loop_condition_partial_vectors): Ditto.
24955 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
24957 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
24960 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24963 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
24964 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
24965 Fix canonicalization of PLUS operands.
24966 (aarch64_fcmla<rot><mode>): Rename to...
24967 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
24968 Fix canonicalization of PLUS operands.
24969 (aarch64_fcmla_lane<rot><mode>): Rename to...
24970 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
24971 Fix canonicalization of PLUS operands.
24972 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
24973 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
24974 Fix canonicalization of PLUS operands.
24975 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
24977 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
24979 * config/arm/arm.md (rbitsi2): Rename to...
24980 (arm_rbit): ... This.
24981 (ctzsi2): Adjust for the above.
24982 (arm_rev16si2): Convert to define_expand.
24983 (arm_rev16si2_alt1): New pattern.
24984 (arm_rev16si2_alt): Rename to...
24985 (*arm_rev16si2_alt2): ... This.
24986 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
24987 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
24988 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
24989 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
24991 2023-05-25 Alex Coplan <alex.coplan@arm.com>
24994 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
24996 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
24997 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
24998 DFmode as an rvalue.
25000 2023-05-25 Richard Biener <rguenther@suse.de>
25003 * tree-vect-stmts.cc (vectorizable_condition): For
25004 embedded comparisons also handle the case when the target
25005 only provides vec_cmp and vcond_mask.
25007 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
25009 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
25012 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
25014 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
25015 (seq_cost_ignoring_scalar_moves): Likewise.
25016 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
25018 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25020 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
25021 (vcage_f32): Likewise.
25022 (vcages_f32): Likewise.
25023 (vcageq_f32): Likewise.
25024 (vcaged_f64): Likewise.
25025 (vcageq_f64): Likewise.
25026 (vcagts_f32): Likewise.
25027 (vcagt_f32): Likewise.
25028 (vcagt_f64): Likewise.
25029 (vcagtq_f32): Likewise.
25030 (vcagtd_f64): Likewise.
25031 (vcagtq_f64): Likewise.
25032 (vcale_f32): Likewise.
25033 (vcale_f64): Likewise.
25034 (vcaled_f64): Likewise.
25035 (vcales_f32): Likewise.
25036 (vcaleq_f32): Likewise.
25037 (vcaleq_f64): Likewise.
25038 (vcalt_f32): Likewise.
25039 (vcalt_f64): Likewise.
25040 (vcaltd_f64): Likewise.
25041 (vcaltq_f32): Likewise.
25042 (vcaltq_f64): Likewise.
25043 (vcalts_f32): Likewise.
25045 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
25049 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
25050 int to const int or const int to const unsigned int.
25051 (_mm512_mask_srli_epi16): Ditto.
25052 (_mm512_slli_epi16): Ditto.
25053 (_mm512_mask_slli_epi16): Ditto.
25054 (_mm512_maskz_slli_epi16): Ditto.
25055 (_mm512_srai_epi16): Ditto.
25056 (_mm512_mask_srai_epi16): Ditto.
25057 (_mm512_maskz_srai_epi16): Ditto.
25058 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
25059 (_mm512_mask_slli_epi64): Ditto.
25060 (_mm512_maskz_slli_epi64): Ditto.
25061 (_mm512_srli_epi64): Ditto.
25062 (_mm512_mask_srli_epi64): Ditto.
25063 (_mm512_maskz_srli_epi64): Ditto.
25064 (_mm512_srai_epi64): Ditto.
25065 (_mm512_mask_srai_epi64): Ditto.
25066 (_mm512_maskz_srai_epi64): Ditto.
25067 (_mm512_slli_epi32): Ditto.
25068 (_mm512_mask_slli_epi32): Ditto.
25069 (_mm512_maskz_slli_epi32): Ditto.
25070 (_mm512_srli_epi32): Ditto.
25071 (_mm512_mask_srli_epi32): Ditto.
25072 (_mm512_maskz_srli_epi32): Ditto.
25073 (_mm512_srai_epi32): Ditto.
25074 (_mm512_mask_srai_epi32): Ditto.
25075 (_mm512_maskz_srai_epi32): Ditto.
25076 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
25077 (_mm256_maskz_srai_epi16): Ditto.
25078 (_mm_mask_srai_epi16): Ditto.
25079 (_mm_maskz_srai_epi16): Ditto.
25080 (_mm256_mask_slli_epi16): Ditto.
25081 (_mm256_maskz_slli_epi16): Ditto.
25082 (_mm_mask_slli_epi16): Ditto.
25083 (_mm_maskz_slli_epi16): Ditto.
25084 (_mm_maskz_srli_epi16): Ditto.
25085 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
25086 (_mm256_maskz_srli_epi32): Ditto.
25087 (_mm_mask_srli_epi32): Ditto.
25088 (_mm_maskz_srli_epi32): Ditto.
25089 (_mm256_mask_srli_epi64): Ditto.
25090 (_mm256_maskz_srli_epi64): Ditto.
25091 (_mm_mask_srli_epi64): Ditto.
25092 (_mm_maskz_srli_epi64): Ditto.
25093 (_mm256_mask_srai_epi32): Ditto.
25094 (_mm256_maskz_srai_epi32): Ditto.
25095 (_mm_mask_srai_epi32): Ditto.
25096 (_mm_maskz_srai_epi32): Ditto.
25097 (_mm256_srai_epi64): Ditto.
25098 (_mm256_mask_srai_epi64): Ditto.
25099 (_mm256_maskz_srai_epi64): Ditto.
25100 (_mm_srai_epi64): Ditto.
25101 (_mm_mask_srai_epi64): Ditto.
25102 (_mm_maskz_srai_epi64): Ditto.
25103 (_mm_mask_slli_epi32): Ditto.
25104 (_mm_maskz_slli_epi32): Ditto.
25105 (_mm_mask_slli_epi64): Ditto.
25106 (_mm_maskz_slli_epi64): Ditto.
25107 (_mm256_mask_slli_epi32): Ditto.
25108 (_mm256_maskz_slli_epi32): Ditto.
25109 (_mm256_mask_slli_epi64): Ditto.
25110 (_mm256_maskz_slli_epi64): Ditto.
25112 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25114 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
25117 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
25119 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
25120 * data-streamer-out.cc (streamer_write_vrange): Same.
25121 * value-range.h (class vrange): Make streamer_write_vrange a friend.
25123 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
25125 * value-query.cc (range_query::get_tree_range): Set NAN directly
25127 * value-range.cc (frange::set): Assert that bounds are not NAN.
25129 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
25131 * value-range.cc (add_vrange): Handle known NANs.
25133 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
25135 * value-range.h (frange::set_nan): New.
25137 2023-05-25 Alexandre Oliva <oliva@adacore.com>
25140 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
25141 requires stricter alignment than MEM's.
25143 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25145 PR tree-optimization/107822
25146 PR tree-optimization/107986
25147 * Makefile.in (OBJS): Add gimple-range-phi.o.
25148 * gimple-range-cache.h (ranger_cache::m_estimate): New
25149 phi_analyzer pointer member.
25150 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
25151 phi_analyzer if no loop info is available.
25152 * gimple-range-phi.cc: New file.
25153 * gimple-range-phi.h: New file.
25154 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
25156 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25158 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
25160 (fold_range): Add range_query parameter.
25161 (fur_relation::fur_relation): New.
25162 (fur_relation::trio): New.
25163 (fur_relation::register_relation): New.
25164 (fold_relations): New.
25165 * gimple-range-fold.h (fold_range): Adjust prototypes.
25166 (fold_relations): New.
25168 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25170 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
25171 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
25172 (ranger_cache::const_query): New.
25173 * gimple-range.cc (gimple_ranger::const_query): New.
25174 * gimple-range.h (gimple_ranger::const_query): New prototype.
25176 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25178 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
25179 (ssa_cache::dump_range_query): Delete.
25180 (ssa_lazy_cache::dump_range_query): Delete.
25181 (ssa_lazy_cache::get_range): Move from header file.
25182 (ssa_lazy_cache::clear_range): ditto.
25183 (ssa_lazy_cache::clear): Ditto.
25184 * gimple-range-cache.h (class ssa_cache): Virtualize.
25185 (class ssa_lazy_cache): Inherit and virtualize.
25187 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
25189 * value-range.h (vrange::kind): Remove.
25191 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
25193 PR middle-end/109840
25194 * match.pd <popcount optimizations>: Preserve zero-extension when
25195 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
25196 popcount((T)x), so the popcount's argument keeps the same type.
25197 <parity optimizations>: Likewise preserve extensions when
25198 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
25199 parity((T)x), so that the parity's argument type is the same.
25201 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
25203 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
25204 (ipcp_store_vr_results): Same.
25205 * ipa-prop.cc (ipa_vr::ipa_vr): New.
25206 (ipa_vr::get_vrange): New.
25207 (ipa_vr::set_unknown): New.
25208 (ipa_vr::streamer_read): New.
25209 (ipa_vr::streamer_write): New.
25210 (write_ipcp_transformation_info): Use new ipa_vr API.
25211 (read_ipcp_transformation_info): Same.
25212 (ipa_vr::nonzero_p): Delete.
25213 (ipcp_update_vr): Use new ipa_vr API.
25214 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
25215 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
25217 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
25219 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
25220 silence overflow warnings later on.
25222 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
25224 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
25225 Remove handling of V8QImode.
25226 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
25227 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
25228 (v<insn>v4qi3): Ditto.
25229 * config/i386/sse.md (v<insn>v8qi3): Remove.
25231 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25234 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
25235 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
25236 (aarch64_simd_ashr<mode>): Rename to...
25237 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
25238 (aarch64_simd_imm_shl<mode>): Rename to...
25239 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
25240 (aarch64_simd_reg_sshl<mode>): Rename to...
25241 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
25242 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
25243 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
25244 (aarch64_simd_reg_shl<mode>_signed): Rename to...
25245 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
25246 (vec_shr_<mode>): Rename to...
25247 (vec_shr_<mode><vczle><vczbe>): ... This.
25248 (aarch64_<sur>shl<mode>): Rename to...
25249 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
25250 (aarch64_<sur>q<r>shl<mode>): Rename to...
25251 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
25253 2023-05-24 Richard Biener <rguenther@suse.de>
25256 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
25257 Perform final vector composition using
25258 ix86_expand_vector_init_general instead of setting
25259 the highpart and lowpart which causes spilling.
25261 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25263 PR tree-optimization/109695
25264 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
25266 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
25267 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
25268 flag to set_global_range.
25269 (gimple_ranger::prefill_stmt_dependencies): Ditto.
25271 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25273 PR tree-optimization/109695
25274 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
25276 (temporal_cache::current_p): Check always_current method.
25277 (temporal_cache::set_always_current): Add param and set value
25279 (temporal_cache::always_current_p): New.
25280 (ranger_cache::get_global_range): Adjust.
25281 (ranger_cache::set_global_range): set always current first.
25283 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
25285 PR tree-optimization/109695
25286 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
25287 fold_range with global query to choose an initial value.
25289 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25291 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
25294 2023-05-24 Richard Biener <rguenther@suse.de>
25296 PR tree-optimization/109849
25297 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
25298 expressions but take the first sets.
25300 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
25303 * doc/gm2.texi (High procedure function): New node.
25304 (Using): New menu entry for High procedure function.
25306 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
25308 PR rtl-optimization/109940
25309 * early-remat.cc (postorder_index): Rename to...
25310 (rpo_index): ...this.
25311 (compare_candidates): Sort by decreasing rpo_index rather than
25312 increasing postorder_index.
25313 (early_remat::sort_candidates): Calculate the forward RPO from
25315 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
25316 rather than DF_BACKWARD in reverse.
25318 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25321 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
25322 qualifier_none for the return operand.
25324 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25326 * config/riscv/autovec.md (<optab><mode>3): New pattern.
25327 (one_cmpl<mode>2): Ditto.
25328 (*<optab>not<mode>): Ditto.
25329 (*n<optab><mode>): Ditto.
25330 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
25333 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
25335 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
25336 calculation on n_perms by considering nvectors_per_build.
25338 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25339 Richard Sandiford <richard.sandiford@arm.com>
25341 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
25342 (vec_cmp<mode><vm>): New pattern.
25343 (vec_cmpu<mode><vm>): New pattern.
25344 (vcond<V:mode><VI:mode>): New pattern.
25345 (vcondu<V:mode><VI:mode>): New pattern.
25346 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
25347 (emit_vlmax_merge_insn): New function.
25348 (emit_vlmax_cmp_insn): Ditto.
25349 (emit_vlmax_cmp_mu_insn): Ditto.
25350 (expand_vec_cmp): Ditto.
25351 (expand_vec_cmp_float): Ditto.
25352 (expand_vcond): Ditto.
25353 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
25354 (emit_vlmax_cmp_insn): Ditto.
25355 (emit_vlmax_cmp_mu_insn): Ditto.
25356 (get_cmp_insn_code): Ditto.
25357 (expand_vec_cmp): Ditto.
25358 (expand_vec_cmp_float): Ditto.
25359 (expand_vcond): Ditto.
25361 2023-05-24 Pan Li <pan2.li@intel.com>
25363 * config/riscv/genrvv-type-indexer.cc (main): Add
25364 unsigned_eew*_lmul1_interpret for indexer.
25365 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
25366 Register vuint*m1_t interpret function.
25367 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
25368 New macro for vuint8m1_t.
25369 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
25370 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
25371 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
25372 (vbool1_t): Add to unsigned_eew*_interpret_ops.
25373 (vbool2_t): Likewise.
25374 (vbool4_t): Likewise.
25375 (vbool8_t): Likewise.
25376 (vbool16_t): Likewise.
25377 (vbool32_t): Likewise.
25378 (vbool64_t): Likewise.
25379 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
25380 New macro for vuint*m1_t.
25381 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
25382 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
25383 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
25384 (required_extensions_p): Add vuint*m1_t interpret case.
25385 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
25386 Add vuint*m1_t interpret to base type.
25387 (unsigned_eew16_lmul1_interpret): Likewise.
25388 (unsigned_eew32_lmul1_interpret): Likewise.
25389 (unsigned_eew64_lmul1_interpret): Likewise.
25391 2023-05-24 Pan Li <pan2.li@intel.com>
25393 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
25394 for the eew size list.
25395 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
25396 (main): Add signed_eew*_lmul1_interpret for indexer.
25397 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
25398 Register vint*m1_t interpret function.
25399 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
25400 New macro for vint8m1_t.
25401 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
25402 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
25403 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
25404 (vbool1_t): Add to signed_eew*_interpret_ops.
25405 (vbool2_t): Likewise.
25406 (vbool4_t): Likewise.
25407 (vbool8_t): Likewise.
25408 (vbool16_t): Likewise.
25409 (vbool32_t): Likewise.
25410 (vbool64_t): Likewise.
25411 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
25412 New macro for vint*m1_t.
25413 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
25414 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
25415 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
25416 (required_extensions_p): Add vint8m1_t interpret case.
25417 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
25418 Add vint*m1_t interpret to base type.
25419 (signed_eew16_lmul1_interpret): Likewise.
25420 (signed_eew32_lmul1_interpret): Likewise.
25421 (signed_eew64_lmul1_interpret): Likewise.
25423 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25425 * config/riscv/autovec.md: Adjust for new interface.
25426 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
25427 (emit_nonvlmax_insn): Add AVL operand.
25428 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
25429 (emit_nonvlmax_insn): Add AVL operand.
25430 (sew64_scalar_helper): Adjust for new interface.
25431 (expand_tuple_move): Ditto.
25432 * config/riscv/vector.md: Ditto.
25434 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25436 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
25437 (expand_const_vector): Ditto.
25438 (legitimize_move): Ditto.
25439 (sew64_scalar_helper): Ditto.
25440 (expand_tuple_move): Ditto.
25441 (expand_vector_init_insert_elems): Ditto.
25442 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
25444 2023-05-24 liuhongt <hongtao.liu@intel.com>
25447 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
25448 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
25449 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
25450 (ix86_masked_all_ones): Handle 64-bit mask.
25451 * config/i386/i386-builtin.def: Replace icode of related
25452 non-mask simd abs builtins with CODE_FOR_nothing.
25454 2023-05-23 Martin Uecker <uecker@tugraz.at>
25457 * function.cc (gimplify_parm_type): Remove function.
25458 (gimplify_parameters): Call gimplify_type_sizes.
25460 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25462 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
25463 and change to also accept '*subx' pattern.
25466 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
25468 * config/xtensa/predicates.md (addsub_operator): New.
25469 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
25470 *extzvsi-1bit_addsubx): New insn_and_split patterns.
25471 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
25472 Add a special case about ifcvt 'noce_try_cmove()' to handle
25473 constant loads that do not fit into signed 12 bits in the
25474 patterns added above.
25476 2023-05-23 Richard Biener <rguenther@suse.de>
25478 PR tree-optimization/109747
25479 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
25480 the SLP node only once to the cost hook.
25482 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
25484 * config/avr/avr.cc (avr_insn_cost): New static function.
25485 (TARGET_INSN_COST): Define to that function.
25487 2023-05-23 Richard Biener <rguenther@suse.de>
25490 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
25491 For vector construction or splats apply GPR->XMM move
25492 costing. QImode memory can be handled directly only
25493 with SSE4.1 pinsrb.
25495 2023-05-23 Richard Biener <rguenther@suse.de>
25497 PR tree-optimization/108752
25498 * tree-vect-stmts.cc (vectorizable_operation): For bit
25499 operations with generic word_mode vectors do not cost
25500 an extra stmt. For plus, minus and negate also cost the
25501 constant materialization.
25503 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
25505 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
25506 Call ix86_expand_vec_shift_qihi_constant for shifts
25507 with constant count operand.
25508 * config/i386/i386.cc (ix86_shift_rotate_cost):
25509 Handle V4QImode and V8QImode.
25510 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
25511 (<insn>v4qi3): Ditto.
25513 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25515 * config/riscv/vector.md: Add mode.
25517 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
25519 PR tree-optimization/109934
25520 * value-range.cc (irange::invert): Remove buggy special case.
25522 2023-05-23 Richard Biener <rguenther@suse.de>
25524 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
25527 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
25530 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
25531 subregs between any scalars that are 64 bits or smaller.
25532 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
25533 (bits_etype): New int attribute.
25534 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
25535 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
25536 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
25538 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
25540 * doc/md.texi: Document that <FOO> can be used to refer to the
25541 numerical value of an int iterator FOO. Tweak other parts of
25542 the int iterator documentation.
25543 * read-rtl.cc (iterator_group::has_self_attr): New field.
25544 (map_attr_string): When has_self_attr is true, make <FOO>
25545 expand to the current value of iterator FOO.
25546 (initialize_iterators): Set has_self_attr for int iterators.
25548 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25550 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
25551 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
25552 (RVV_UNOP_NUM): New macro.
25553 (RVV_BINOP_NUM): Ditto.
25554 (legitimize_move): Refactor the framework of RVV auto-vectorization.
25555 (emit_vlmax_op): Ditto.
25556 (emit_vlmax_reg_op): Ditto.
25557 (emit_len_op): Ditto.
25558 (emit_len_binop): Ditto.
25559 (emit_vlmax_tany_many): Ditto.
25560 (emit_nonvlmax_tany_many): Ditto.
25561 (sew64_scalar_helper): Ditto.
25562 (expand_tuple_move): Ditto.
25563 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
25564 (emit_pred_binop): Ditto.
25565 (emit_vlmax_op): Ditto.
25566 (emit_vlmax_tany_many): New function.
25567 (emit_len_op): Remove.
25568 (emit_nonvlmax_tany_many): New function.
25569 (emit_vlmax_reg_op): Remove.
25570 (emit_len_binop): Ditto.
25571 (emit_index_op): Ditto.
25572 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
25573 (expand_const_vector): Ditto.
25574 (legitimize_move): Ditto.
25575 (sew64_scalar_helper): Ditto.
25576 (expand_tuple_move): Ditto.
25577 (expand_vector_init_insert_elems): Ditto.
25578 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
25579 * config/riscv/vector.md: Ditto.
25581 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25584 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
25585 and constraint for operand 0.
25586 (add_vec_concat_subst_be): Likewise.
25588 2023-05-23 Richard Biener <rguenther@suse.de>
25590 PR tree-optimization/109849
25591 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
25592 and use that to determine what to hoist.
25594 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
25596 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
25597 specific treatment for bit-fields only if they have an integral type
25598 and filter out non-integral bit-fields that do not start and end on
25601 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
25603 PR tree-optimization/109920
25604 * value-range.h (RESIZABLE>::~int_range): Use delete[].
25606 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
25608 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
25609 calcuation of integer vector mode costs to reflect generated
25610 instruction sequences of different integer vector modes and
25611 different target ABIs. Remove "speed" function argument.
25612 (ix86_rtx_costs): Update call for removed function argument.
25613 (ix86_vector_costs::add_stmt_cost): Ditto.
25615 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
25617 * value-range.h (class Value_Range): Implement set_zero,
25618 set_nonzero, and nonzero_p.
25620 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
25622 * config/i386/i386.cc (ix86_multiplication_cost): Add
25623 the cost of a memory read to the cost of V?QImode sequences.
25625 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25627 * config/riscv/riscv-v.cc: Add "m_" prefix.
25629 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
25631 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
25632 multiple-rgroup of length.
25633 * tree-vect-stmts.cc (vectorizable_store): Ditto.
25634 (vectorizable_load): Ditto.
25635 * tree-vectorizer.h (vect_get_loop_len): Ditto.
25637 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25639 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
25642 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
25644 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
25645 handling for the case index == count.
25647 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
25650 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
25651 Don't fold to XOR / AND / XOR if just one bit is copied to the
25654 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
25656 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
25657 builtin for bit reversal using brev instruction.
25658 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
25659 NVPTX_BUILTIN_BREVLL.
25660 (nvptx_init_builtins): Define "brev" and "brevll".
25661 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
25662 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
25663 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
25664 section, document __builtin_nvptx_brev{,ll}.
25666 2023-05-21 Jakub Jelinek <jakub@redhat.com>
25668 PR tree-optimization/109505
25669 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
25670 Combine successive equal operations with constants,
25671 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
25672 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
25675 2023-05-21 Andrew Pinski <apinski@marvell.com>
25677 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
25679 2023-05-21 Pan Li <pan2.li@intel.com>
25681 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
25682 rest bool size, aka 2, 4, 8, 16, 32, 64.
25683 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
25684 Register vbool[2|4|8|16|32|64] interpret function.
25685 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
25686 New macro for vbool2_t.
25687 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
25688 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
25689 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
25690 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
25691 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
25692 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
25693 (vint16m1_t): Likewise.
25694 (vint32m1_t): Likewise.
25695 (vint64m1_t): Likewise.
25696 (vuint8m1_t): Likewise.
25697 (vuint16m1_t): Likewise.
25698 (vuint32m1_t): Likewise.
25699 (vuint64m1_t): Likewise.
25700 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
25701 New macro for vbool2_t.
25702 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
25703 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
25704 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
25705 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
25706 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
25707 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
25708 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
25709 vbool2_t interprect to base type.
25710 (bool4_interpret): Likewise.
25711 (bool8_interpret): Likewise.
25712 (bool16_interpret): Likewise.
25713 (bool32_interpret): Likewise.
25714 (bool64_interpret): Likewise.
25716 2023-05-21 Andrew Pinski <apinski@marvell.com>
25718 PR middle-end/109919
25719 * expr.cc (expand_single_bit_test): Don't use the
25720 target for expand_expr.
25722 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
25724 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
25727 2023-05-20 Pan Li <pan2.li@intel.com>
25729 * mode-switching.cc (entity_map): Initialize the array to zero.
25732 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
25735 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
25736 Remove superfluous "parallel" in insn pattern.
25737 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
25738 printing error text to assembly.
25740 2023-05-20 Andrew Pinski <apinski@marvell.com>
25742 * expr.cc (fold_single_bit_test): Rename to ...
25743 (expand_single_bit_test): This and expand directly.
25744 (do_store_flag): Update for the rename function.
25746 2023-05-20 Andrew Pinski <apinski@marvell.com>
25748 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
25749 instead of shift/and.
25751 2023-05-20 Andrew Pinski <apinski@marvell.com>
25753 * expr.cc (fold_single_bit_test): Add an assert
25754 and simplify based on code being NE_EXPR or EQ_EXPR.
25756 2023-05-20 Andrew Pinski <apinski@marvell.com>
25758 * expr.cc (fold_single_bit_test): Take inner and bitnum
25759 instead of arg0 and arg1. Update the code.
25760 (do_store_flag): Don't create a tree when calling
25761 fold_single_bit_test instead just call it with the bitnum
25762 and the inner tree.
25764 2023-05-20 Andrew Pinski <apinski@marvell.com>
25766 * expr.cc (fold_single_bit_test): Use get_def_for_expr
25767 instead of checking the inner's code.
25769 2023-05-20 Andrew Pinski <apinski@marvell.com>
25771 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
25772 (fold_single_bit_test): This and simplify.
25774 2023-05-20 Andrew Pinski <apinski@marvell.com>
25776 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
25778 (fold_single_bit_test): Likewise.
25779 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
25780 (fold_single_bit_test): Likewise and make static.
25781 * fold-const.h (fold_single_bit_test): Remove declaration.
25783 2023-05-20 Die Li <lidie@eswincomputing.com>
25785 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
25788 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
25790 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
25792 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
25795 * config/riscv/bitmanip.md
25796 (<bitmanip_optab>disi2): Match with any_extend.
25797 (<bitmanip_optab>disi2_sext): New pattern to match
25798 with sign extend using an ANDI instruction.
25800 2023-05-19 Nathan Sidwell <nathan@acm.org>
25803 * opts.h (handle_deferred_dump_options): Declare.
25804 * opts-global.cc (handle_common_deferred_options): Do not handle
25806 (handle_deferred_dump_options): New.
25807 * toplev.cc (toplev::main): Call it after plugin init.
25809 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
25811 * config/riscv/constraints.md (DsS, DsD): Restore agreement
25812 with shiftm1 mode attribute.
25814 2023-05-19 Andrew Pinski <apinski@marvell.com>
25817 * gcc.cc (default_compilers["@c-header"]): Add %w
25818 after the --output-pch.
25820 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
25822 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
25823 to hival, ASHIFT the corresponding regs.
25825 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
25827 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
25829 2023-05-19 Jakub Jelinek <jakub@redhat.com>
25831 PR tree-optimization/105776
25832 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
25833 non-NULL, allow division statement to have a cast as single imm use
25834 rather than comparison/condition.
25835 (match_arith_overflow): In that case remove the cast stmt in addition
25836 to the division statement.
25838 2023-05-19 Jakub Jelinek <jakub@redhat.com>
25840 PR tree-optimization/101856
25841 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
25842 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
25843 support it but umul_highpart_optab does.
25845 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
25847 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
25848 of tree_to_shwi on array indices. Minor tweaks.
25850 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
25852 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
25853 * attribs.cc (diag_attr_exclusions): Ditto.
25854 (decl_attributes): Ditto.
25855 (build_type_attribute_qual_variant): Ditto.
25856 * builtins.cc (fold_builtin_carg): Ditto.
25857 (fold_builtin_next_arg): Ditto.
25858 (do_mpc_arg2): Ditto.
25859 * cfgexpand.cc (expand_return): Ditto.
25860 * cgraph.h (decl_in_symtab_p): Ditto.
25861 (symtab_node::get_create): Ditto.
25862 * dwarf2out.cc (base_type_die): Ditto.
25863 (implicit_ptr_descriptor): Ditto.
25864 (gen_array_type_die): Ditto.
25865 (gen_type_die_with_usage): Ditto.
25866 (optimize_location_into_implicit_ptr): Ditto.
25867 * expr.cc (do_store_flag): Ditto.
25868 * fold-const.cc (negate_expr_p): Ditto.
25869 (fold_negate_expr_1): Ditto.
25870 (fold_convert_const): Ditto.
25871 (fold_convert_loc): Ditto.
25872 (constant_boolean_node): Ditto.
25873 (fold_binary_op_with_conditional_arg): Ditto.
25874 (build_fold_addr_expr_with_type_loc): Ditto.
25875 (fold_comparison): Ditto.
25876 (fold_checksum_tree): Ditto.
25877 (tree_unary_nonnegative_warnv_p): Ditto.
25878 (integer_valued_real_unary_p): Ditto.
25879 (fold_read_from_constant_string): Ditto.
25880 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
25881 * gimple-expr.cc (useless_type_conversion_p): Ditto.
25882 (is_gimple_reg): Ditto.
25883 (is_gimple_asm_val): Ditto.
25884 (mark_addressable): Ditto.
25885 * gimple-expr.h (is_gimple_variable): Ditto.
25886 (virtual_operand_p): Ditto.
25887 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
25888 * gimplify.cc (gimplify_bind_expr): Ditto.
25889 (gimplify_return_expr): Ditto.
25890 (gimple_add_padding_init_for_auto_var): Ditto.
25891 (gimplify_addr_expr): Ditto.
25892 (omp_add_variable): Ditto.
25893 (omp_notice_variable): Ditto.
25894 (omp_get_base_pointer): Ditto.
25895 (omp_strip_components_and_deref): Ditto.
25896 (omp_strip_indirections): Ditto.
25897 (omp_accumulate_sibling_list): Ditto.
25898 (omp_build_struct_sibling_lists): Ditto.
25899 (gimplify_adjust_omp_clauses_1): Ditto.
25900 (gimplify_adjust_omp_clauses): Ditto.
25901 (gimplify_omp_for): Ditto.
25902 (goa_lhs_expr_p): Ditto.
25903 (gimplify_one_sizepos): Ditto.
25904 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
25905 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
25906 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
25907 (propagate_controlled_uses): Ditto.
25908 * ipa-sra.cc (type_prevails_p): Ditto.
25909 (scan_expr_access): Ditto.
25910 * optabs-tree.cc (optab_for_tree_code): Ditto.
25911 * toplev.cc (wrapup_global_declaration_1): Ditto.
25912 * trans-mem.cc (transaction_invariant_address_p): Ditto.
25913 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
25914 (verify_gimple_comparison): Ditto.
25915 (verify_gimple_assign_binary): Ditto.
25916 (verify_gimple_assign_single): Ditto.
25917 * tree-complex.cc (get_component_ssa_name): Ditto.
25918 * tree-emutls.cc (lower_emutls_2): Ditto.
25919 * tree-inline.cc (copy_tree_body_r): Ditto.
25920 (estimate_move_cost): Ditto.
25921 (copy_decl_for_dup_finish): Ditto.
25922 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
25923 (note_nonlocal_vla_type): Ditto.
25924 (convert_local_omp_clauses): Ditto.
25925 (remap_vla_decls): Ditto.
25926 (fixup_vla_decls): Ditto.
25927 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
25928 * tree-pretty-print.cc (print_declaration): Ditto.
25929 (print_call_name): Ditto.
25930 * tree-sra.cc (compare_access_positions): Ditto.
25931 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
25932 * tree-ssa-ccp.cc (get_default_value): Ditto.
25933 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
25934 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
25935 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
25936 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
25937 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
25938 * tree-ssa-sink.cc (statement_sink_location): Ditto.
25939 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
25940 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
25941 * tree-ssa-uninit.cc (warn_uninit): Ditto.
25942 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
25943 (non_rewritable_mem_ref_base): Ditto.
25944 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
25945 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
25946 * tree-vect-generic.cc (do_binop): Ditto.
25948 * tree-vect-stmts.cc (vect_init_vector): Ditto.
25949 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
25950 * tree.cc (sign_mask_for): Ditto.
25951 (verify_type_variant): Ditto.
25952 (gimple_canonical_types_compatible_p): Ditto.
25953 (verify_type): Ditto.
25954 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
25955 * var-tracking.cc (prepare_call_arguments): Ditto.
25956 (vt_add_function_parameters): Ditto.
25957 * varasm.cc (decode_addr_const): Ditto.
25959 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
25961 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
25962 (lower_reduction_clauses): Ditto.
25963 (lower_send_clauses): Ditto.
25964 (lower_omp_task_reductions): Ditto.
25965 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
25966 (worker_single_copy): Ditto.
25967 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
25968 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
25970 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
25972 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
25974 (lto_read_body_or_constructor): Ditto.
25975 * lto-streamer-out.cc (tree_is_indexable): Ditto.
25976 (lto_output_var_decl_ref): Ditto.
25977 (DFS::DFS_write_tree_body): Ditto.
25978 (wrap_refs): Ditto.
25979 (write_symbol_extension_info): Ditto.
25981 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
25983 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
25984 defines from tree.h.
25985 (aarch64_mangle_type): Ditto.
25986 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
25987 (alpha_gimplify_va_arg_1): Ditto.
25988 * config/arc/arc.cc (arc_encode_section_info): Ditto.
25989 (arc_is_aux_reg_p): Ditto.
25990 (arc_is_uncached_mem_p): Ditto.
25991 (arc_handle_aux_attribute): Ditto.
25992 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
25993 (arm_handle_cmse_nonsecure_call): Ditto.
25994 (arm_set_default_type_attributes): Ditto.
25995 (arm_is_segment_info_known): Ditto.
25996 (arm_mangle_type): Ditto.
25997 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
25998 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
25999 (avr_decl_absdata_p): Ditto.
26000 (avr_insert_attributes): Ditto.
26001 (avr_section_type_flags): Ditto.
26002 (avr_encode_section_info): Ditto.
26003 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
26004 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
26005 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
26006 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
26007 (csky_mangle_type): Ditto.
26008 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
26009 * config/darwin.cc (is_objc_metadata): Ditto.
26010 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
26011 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
26012 * config/frv/frv.cc (frv_emit_movsi): Ditto.
26013 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
26014 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
26015 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
26016 * config/i386/i386-expand.cc: Ditto.
26017 * config/i386/i386.cc (type_natural_mode): Ditto.
26018 (ix86_function_arg): Ditto.
26019 (ix86_data_alignment): Ditto.
26020 (ix86_local_alignment): Ditto.
26021 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
26022 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
26023 (i386_pe_type_dllexport_p): Ditto.
26024 (i386_pe_adjust_class_at_definition): Ditto.
26025 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
26026 (i386_pe_binds_local_p): Ditto.
26027 (i386_pe_section_type_flags): Ditto.
26028 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
26029 (ia64_gimplify_va_arg): Ditto.
26030 (ia64_in_small_data_p): Ditto.
26031 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
26032 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
26033 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
26034 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
26035 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
26036 (mcore_encode_section_info): Ditto.
26037 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
26038 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
26039 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
26040 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
26041 (pass_in_memory): Ditto.
26042 (nvptx_generate_vector_shuffle): Ditto.
26043 (nvptx_lockless_update): Ditto.
26044 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
26045 (pa_function_value): Ditto.
26046 (pa_function_arg): Ditto.
26047 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
26048 (TEXT_SPACE_P): Ditto.
26049 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
26050 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
26051 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
26052 (riscv_mangle_type): Ditto.
26053 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
26054 (rl78_addsi3_internal): Ditto.
26055 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
26056 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
26057 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
26058 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
26059 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
26060 (rs6000_function_arg_advance_1): Ditto.
26061 (rs6000_function_arg): Ditto.
26062 (rs6000_pass_by_reference): Ditto.
26063 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
26064 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
26065 (rs6000_set_default_type_attributes): Ditto.
26066 (rs6000_elf_in_small_data_p): Ditto.
26067 (IN_NAMED_SECTION): Ditto.
26068 (rs6000_xcoff_encode_section_info): Ditto.
26069 (rs6000_function_value): Ditto.
26070 (invalid_arg_for_unprototyped_fn): Ditto.
26071 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
26072 (s390_vec_n_elem): Ditto.
26073 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
26074 (s390_function_arg_integer): Ditto.
26075 (s390_return_in_memory): Ditto.
26076 (s390_encode_section_info): Ditto.
26077 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
26078 (sh_function_value): Ditto.
26079 * config/sol2.cc (solaris_insert_attributes): Ditto.
26080 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
26081 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
26082 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
26083 (xstormy16_handle_below100_attribute): Ditto.
26084 * config/v850/v850.cc (v850_encode_section_info): Ditto.
26085 (v850_insert_attributes): Ditto.
26086 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
26087 (visium_return_in_memory): Ditto.
26088 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
26090 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
26092 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
26093 (ix86_expand_vecop_qihi): Add op2vec bool variable.
26094 Do not set REG_EQUAL note.
26095 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
26097 * config/i386/i386.cc (ix86_multiplication_cost): Handle
26098 V4QImode and V8QImode.
26099 * config/i386/mmx.md (mulv8qi3): New expander.
26101 * config/i386/sse.md (mulv8qi3): Remove.
26103 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
26105 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
26107 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
26109 PR bootstrap/105831
26110 * config.gcc: Use = operator instead of ==.
26112 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
26114 PR bootstrap/105831
26115 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
26116 * configure.ac: Likewise.
26117 * configure: Regenerate.
26119 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
26121 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
26122 (__ARM_mve_coerce1): Remove.
26123 (__ARM_mve_coerce2): Remove.
26124 (__ARM_mve_coerce3): Remove.
26125 (__ARM_mve_coerce_i_scalar): New.
26126 (__ARM_mve_coerce_s8_ptr): New.
26127 (__ARM_mve_coerce_u8_ptr): New.
26128 (__ARM_mve_coerce_s16_ptr): New.
26129 (__ARM_mve_coerce_u16_ptr): New.
26130 (__ARM_mve_coerce_s32_ptr): New.
26131 (__ARM_mve_coerce_u32_ptr): New.
26132 (__ARM_mve_coerce_s64_ptr): New.
26133 (__ARM_mve_coerce_u64_ptr): New.
26134 (__ARM_mve_coerce_f_scalar): New.
26135 (__ARM_mve_coerce_f16_ptr): New.
26136 (__ARM_mve_coerce_f32_ptr): New.
26137 (__arm_vst4q): Change _coerce_ overloads.
26138 (__arm_vbicq): Change _coerce_ overloads.
26139 (__arm_vld1q): Change _coerce_ overloads.
26140 (__arm_vld1q_z): Change _coerce_ overloads.
26141 (__arm_vld2q): Change _coerce_ overloads.
26142 (__arm_vld4q): Change _coerce_ overloads.
26143 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
26144 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
26145 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
26146 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
26147 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
26148 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
26149 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
26150 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
26151 (__arm_vst1q_p): Change _coerce_ overloads.
26152 (__arm_vst2q): Change _coerce_ overloads.
26153 (__arm_vst1q): Change _coerce_ overloads.
26154 (__arm_vstrhq): Change _coerce_ overloads.
26155 (__arm_vstrhq_p): Change _coerce_ overloads.
26156 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
26157 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
26158 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
26159 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
26160 (__arm_vstrwq_p): Change _coerce_ overloads.
26161 (__arm_vstrwq): Change _coerce_ overloads.
26162 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
26163 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
26164 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
26165 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
26166 (__arm_vsetq_lane): Change _coerce_ overloads.
26167 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
26168 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
26169 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
26170 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
26171 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
26172 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
26173 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
26174 (__arm_vidupq_x_u8): Change _coerce_ overloads.
26175 (__arm_vddupq_x_u8): Change _coerce_ overloads.
26176 (__arm_vidupq_x_u16): Change _coerce_ overloads.
26177 (__arm_vddupq_x_u16): Change _coerce_ overloads.
26178 (__arm_vidupq_x_u32): Change _coerce_ overloads.
26179 (__arm_vddupq_x_u32): Change _coerce_ overloads.
26180 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
26181 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
26182 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
26183 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
26184 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
26185 (__arm_vidupq_u16): Change _coerce_ overloads.
26186 (__arm_vidupq_u32): Change _coerce_ overloads.
26187 (__arm_vidupq_u8): Change _coerce_ overloads.
26188 (__arm_vddupq_u16): Change _coerce_ overloads.
26189 (__arm_vddupq_u32): Change _coerce_ overloads.
26190 (__arm_vddupq_u8): Change _coerce_ overloads.
26191 (__arm_viwdupq_m): Change _coerce_ overloads.
26192 (__arm_viwdupq_u16): Change _coerce_ overloads.
26193 (__arm_viwdupq_u32): Change _coerce_ overloads.
26194 (__arm_viwdupq_u8): Change _coerce_ overloads.
26195 (__arm_vdwdupq_m): Change _coerce_ overloads.
26196 (__arm_vdwdupq_u16): Change _coerce_ overloads.
26197 (__arm_vdwdupq_u32): Change _coerce_ overloads.
26198 (__arm_vdwdupq_u8): Change _coerce_ overloads.
26199 (__arm_vstrbq): Change _coerce_ overloads.
26200 (__arm_vstrbq_p): Change _coerce_ overloads.
26201 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
26202 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
26203 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
26204 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
26205 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
26207 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
26209 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
26212 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
26214 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
26215 (__arm_vadcq_u32): Likewise.
26216 (__arm_vadcq_m_s32): Likewise.
26217 (__arm_vadcq_m_u32): Likewise.
26218 (__arm_vsbcq_s32): Likewise.
26219 (__arm_vsbcq_u32): Likewise.
26220 (__arm_vsbcq_m_s32): Likewise.
26221 (__arm_vsbcq_m_u32): Likewise.
26222 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
26224 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
26226 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
26227 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
26228 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
26229 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
26230 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
26231 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
26232 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
26233 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
26234 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
26235 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
26236 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
26237 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
26238 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
26239 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
26240 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
26241 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
26242 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
26243 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
26244 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
26245 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
26246 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
26247 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
26248 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
26249 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
26250 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
26251 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
26252 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
26253 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
26254 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
26255 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
26256 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
26257 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
26258 (mve_vorrq_m_f<mode>)
26259 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
26260 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
26261 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
26262 capitalization in the emitted asm.
26264 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
26266 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
26268 (Ri): Move constraint definition from predicates.md.
26269 (Rl): Define new constraint.
26270 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
26271 missing constraint.
26272 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
26273 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
26274 op 2. Fix asm output spacing.
26275 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
26276 * config/arm/predicates.md (Ri) Move constraint to constraints.md
26277 (mve_vldrd_immediate): Move it from
26279 (mve_vstrw_immediate): New predicate.
26281 2023-05-18 Pan Li <pan2.li@intel.com>
26282 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26283 Kito Cheng <kito.cheng@sifive.com>
26284 Richard Biener <rguenther@suse.de>
26285 Richard Sandiford <richard.sandiford@arm.com>
26287 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
26288 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
26289 (struct table_elt): Extend machine_mode to 16 bits.
26290 (struct set): Ditto.
26291 * genmodes.cc (emit_mode_wider): Extend type from char to short.
26292 (emit_mode_complex): Ditto.
26293 (emit_mode_inner): Ditto.
26294 (emit_class_narrowest_mode): Ditto.
26295 * genopinit.cc (main): Extend the machine_mode limit.
26296 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
26297 re-ordered the struct fields for padding.
26298 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
26299 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
26300 (get_mode_alignment): Extend type from char to short.
26301 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
26302 removed the ATTRIBUTE_PACKED.
26303 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
26304 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
26305 m_kind to 2 bits and remove m_spare.
26306 * rtl.h (RTX_CODE_BITSIZE): New macro.
26307 (struct rtx_def): Swap both the bit size and location between the
26308 rtx_code and the machine_mode.
26309 (subreg_shape::unique_id): Extend the machine_mode limit.
26310 * rtlanal.h: Extend machine_mode to 16 bits.
26311 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
26312 bits and re-ordered the struct fields for padding.
26313 (struct tree_decl_common): Extend machine_mode to 16 bits.
26315 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
26317 * genrecog.cc (print_nonbool_test): Fix type error of
26318 switch (SUBREG_BYTE (op))'.
26320 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
26322 * common/config/riscv/riscv-common.cc: Remove
26323 trailing spaces on lines.
26324 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
26325 * config/riscv/riscv.h (enum reg_class): Likewise.
26326 * config/riscv/riscv.md: Likewise.
26328 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
26330 * config/pa/pa.md (clear_cache): New.
26332 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
26334 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
26335 parenthesis. Fix misnamed index entry.
26336 <concept>: Fix misnamed index entry.
26338 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
26340 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
26342 (*<optab>si3_mask, *<optab>di3_mask): Here.
26343 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
26344 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
26346 (*<bitmanip_optab>si3_sext_mask): Likewise.
26347 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
26348 and const_di_mask_operand.
26349 (bitmanip_rotate): New iterator.
26350 (bitmanip_optab): Add rotates.
26351 * config/riscv/predicates.md (const_si_mask_operand): Renamed
26352 from const31_operand. Generalize to handle more mask constants.
26353 (const_di_mask_operand): Similarly.
26355 2023-05-17 Jakub Jelinek <jakub@redhat.com>
26358 * config/i386/i386-builtin-types.def (FLOAT128): Use
26359 float128t_type_node rather than float128_type_node.
26361 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
26363 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
26364 FP_CONTRACT_FAST (no functional change).
26366 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
26368 * config/i386/i386.cc (ix86_multiplication_cost): Correct
26369 calcuation of integer vector mode costs to reflect generated
26370 instruction sequences of different integer vector modes and
26371 different target ABIs.
26373 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26375 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
26376 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
26377 (riscv_mode_needed): Ditto.
26378 (riscv_mode_after): Ditto.
26379 (riscv_mode_entry): Ditto.
26380 (riscv_mode_exit): Ditto.
26381 (riscv_mode_priority): Ditto.
26382 (TARGET_MODE_EMIT): New target hook.
26383 (TARGET_MODE_NEEDED): Ditto.
26384 (TARGET_MODE_AFTER): Ditto.
26385 (TARGET_MODE_ENTRY): Ditto.
26386 (TARGET_MODE_EXIT): Ditto.
26387 (TARGET_MODE_PRIORITY): Ditto.
26388 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
26389 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
26390 * config/riscv/riscv.md: Add csrwvxrm.
26391 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
26392 (vxrmsi): New pattern.
26394 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26396 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
26397 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
26398 (struct narrow_alu_def): Ditto.
26399 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
26400 (function_expander::use_exact_insn): Ditto.
26401 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
26402 (function_base::has_rounding_mode_operand_p): New function.
26404 2023-05-17 Andrew Pinski <apinski@marvell.com>
26406 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
26407 against 0 instead of calling integer_zerop.
26409 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26411 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
26412 (DEF_RVV_VXRM_ENUM): New macro.
26413 (handle_pragma_vector): Add vxrm enum register.
26414 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
26420 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
26422 * value-range.h (Value_Range::operator=): New.
26424 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
26426 * value-range.cc (vrange::operator=): Add a stub to copy
26427 unsupported ranges.
26428 * value-range.h (is_a <unsupported_range>): New.
26429 (Value_Range::operator=): Support copying unsupported ranges.
26431 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
26433 * data-streamer-in.cc (streamer_read_real_value): New.
26434 (streamer_read_value_range): New.
26435 * data-streamer-out.cc (streamer_write_real_value): New.
26436 (streamer_write_vrange): New.
26437 * data-streamer.h (streamer_write_vrange): New.
26438 (streamer_read_value_range): New.
26440 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
26443 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
26444 is ignored for a fixed underlying type.
26445 (C++ Dialect Options): Likewise for -fstrict-enums.
26447 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
26449 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
26452 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
26454 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
26456 (s390_atomic_align_for_mode): New.
26458 2023-05-17 Jakub Jelinek <jakub@redhat.com>
26460 * wide-int.cc (wi::from_array): Add missing closing paren in function
26463 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
26465 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
26466 suggested unroll factor once the previous analysis fails.
26468 2023-05-17 Pan Li <pan2.li@intel.com>
26470 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
26472 (main): Add bool1 to the type indexer.
26473 * config/riscv/riscv-vector-builtins-functions.def
26474 (vreinterpret): Register vbool1 interpret function.
26475 * config/riscv/riscv-vector-builtins-types.def
26476 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
26477 (vint8m1_t): Add the type to bool1_interpret_ops.
26478 (vint16m1_t): Ditto.
26479 (vint32m1_t): Ditto.
26480 (vint64m1_t): Ditto.
26481 (vuint8m1_t): Ditto.
26482 (vuint16m1_t): Ditto.
26483 (vuint32m1_t): Ditto.
26484 (vuint64m1_t): Ditto.
26485 * config/riscv/riscv-vector-builtins.cc
26486 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
26487 (required_extensions_p): Add bool1 interpret case.
26488 * config/riscv/riscv-vector-builtins.def
26489 (bool1_interpret): Add bool1 interpret to base type.
26490 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
26491 with VB dest for vreinterpret.
26493 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
26496 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
26497 constants through "lis; xoris".
26499 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
26501 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
26502 default rs6000 target pass for O2 and above.
26503 * doc/invoke.texi: Document -free
26505 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
26507 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
26508 Fix wrong select_kind...
26510 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
26512 * config/s390/s390-protos.h (s390_expand_setmem): Change
26513 function signature.
26514 * config/s390/s390.cc (s390_expand_setmem): For memset's less
26515 than or equal to 256 byte do not perform a libc call.
26516 * config/s390/s390.md: Change expander into a version which
26519 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
26521 * config/s390/s390-protos.h (s390_expand_movmem): New.
26522 * config/s390/s390.cc (s390_expand_movmem): New.
26523 * config/s390/s390.md (movmem<mode>): New.
26527 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
26529 * config/s390/s390-protos.h (s390_expand_cpymem): Change
26530 function signature.
26531 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
26532 than or equal to 256 byte do not perform a libc call.
26533 (s390_expand_insv): Adapt new function signature of
26534 s390_expand_cpymem.
26535 * config/s390/s390.md: Change expander into a version which
26538 2023-05-16 Andrew Pinski <apinski@marvell.com>
26540 PR tree-optimization/109424
26541 * match.pd: Add patterns for min/max of zero_one_valued
26544 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26546 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
26547 * config/riscv/riscv-vector-builtins.cc
26548 (function_expander::use_ternop_insn): Add default rounding mode.
26549 (function_expander::use_widen_ternop_insn): Ditto.
26550 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
26551 (riscv_hard_regno_mode_ok): Ditto.
26552 (riscv_conditional_register_usage): Ditto.
26553 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
26554 (FRM_REG_P): Ditto.
26555 (RISCV_DWARF_FRM): Ditto.
26556 * config/riscv/riscv.md: Ditto.
26557 * config/riscv/vector-iterators.md: split no frm and has frm operations.
26558 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
26559 (@pred_<optab><mode>): Ditto.
26561 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
26563 PR tree-optimization/109695
26564 * value-range.cc (irange::operator=): Resize range.
26565 (irange::union_): Same.
26566 (irange::intersect): Same.
26567 (irange::invert): Same.
26568 (int_range_max): Default to 3 sub-ranges and resize as needed.
26569 * value-range.h (irange::maybe_resize): New.
26571 (int_range::int_range): Adjust for resizing.
26572 (int_range::operator=): Same.
26574 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
26576 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
26578 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
26579 when range changed.
26581 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26583 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
26584 * config/riscv/riscv-vector-builtins.cc
26585 (function_expander::use_exact_insn): Add default rounding mode operand.
26586 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
26587 (riscv_hard_regno_mode_ok): Ditto.
26588 (riscv_conditional_register_usage): Ditto.
26589 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
26590 (VXRM_REG_P): Ditto.
26591 (RISCV_DWARF_VXRM): Ditto.
26592 * config/riscv/riscv.md: Ditto.
26593 * config/riscv/vector.md: Ditto
26595 2023-05-15 Pan Li <pan2.li@intel.com>
26597 * optabs.cc (maybe_gen_insn): Add case to generate instruction
26598 that has 11 operands.
26600 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26602 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
26603 logic for vector modes.
26605 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26608 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
26609 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
26610 (aarch64_cmtst<mode>): Rename to...
26611 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
26612 (*aarch64_cmtst_same_<mode>): Rename to...
26613 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
26614 (*aarch64_cmtstdi): Rename to...
26615 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
26616 (aarch64_fac<optab><mode>): Rename to...
26617 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
26619 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26622 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
26623 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
26625 2023-05-15 Pan Li <pan2.li@intel.com>
26626 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26627 kito-cheng <kito.cheng@sifive.com>
26629 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
26630 deciding the mode is constant or not.
26631 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
26633 2023-05-15 Richard Biener <rguenther@suse.de>
26635 PR tree-optimization/109848
26636 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
26637 TARGET_MEM_REF address preparation before the store, not
26640 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26642 * config/riscv/riscv.cc
26643 (riscv_vectorize_preferred_vector_alignment): New function.
26644 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
26646 2023-05-14 Andrew Pinski <apinski@marvell.com>
26648 PR tree-optimization/109829
26649 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
26651 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
26654 * config/i386/i386.cc: Revert the 2023-05-11 change.
26655 (ix86_widen_mult_cost): Return high value instead of
26656 ICEing for unsupported modes.
26658 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
26660 * config/i386/i386.cc (x86_function_profiler): Take
26661 ix86_direct_extern_access into account when generating calls
26664 2023-05-14 Pan Li <pan2.li@intel.com>
26666 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
26667 Refactor the or pattern to switch cases.
26669 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
26671 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
26672 aarch64_expand_vector_init to this, and remove interleaving case.
26673 Recursively call aarch64_expand_vector_init_fallback, instead of
26674 aarch64_expand_vector_init.
26675 (aarch64_unzip_vector_init): New function.
26676 (aarch64_expand_vector_init): Likewise.
26678 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
26680 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
26681 Pull out function call from the gcc_assert.
26683 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
26685 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
26686 (policy_to_str): New.
26687 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
26689 2023-05-13 Andrew Pinski <apinski@marvell.com>
26691 PR tree-optimization/109834
26692 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
26693 (popcount(rotate(x,y))->popcount(x)): Likewise.
26695 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
26697 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
26698 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
26699 gen_extend_insn to generate zero/sign extension instructions.
26701 (ix86_expand_vecop_qihi): Initialize interleave functions
26702 for MULT code only. Fix comments.
26704 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
26707 * config/i386/mmx.md (mulv2si3): Remove expander.
26708 (mulv2si3): Rename insn pattern from *mulv2si.
26710 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
26712 PR libstdc++/109816
26713 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
26714 '!lto_stream_offload_p'.
26716 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
26717 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26720 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
26721 (local_avl_compatible_p): New.
26722 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
26723 for LCM, rewrite as a backward algorithm.
26724 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
26725 interface, handle a BB at once.
26727 2023-05-12 Richard Biener <rguenther@suse.de>
26729 PR tree-optimization/64731
26730 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
26731 handle TARGET_MEM_REF destinations of stores from vector
26734 2023-05-12 Richard Biener <rguenther@suse.de>
26736 PR tree-optimization/109791
26737 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
26739 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
26742 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26744 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
26745 * config/arm/arm-mve-builtins-base.def (vsriq): New.
26746 * config/arm/arm-mve-builtins-base.h (vsriq): New.
26747 * config/arm/arm-mve-builtins.cc
26748 (function_instance::has_inactive_argument): Handle vsriq.
26749 * config/arm/arm_mve.h (vsriq): Remove.
26751 (vsriq_n_u8): Remove.
26752 (vsriq_n_s8): Remove.
26753 (vsriq_n_u16): Remove.
26754 (vsriq_n_s16): Remove.
26755 (vsriq_n_u32): Remove.
26756 (vsriq_n_s32): Remove.
26757 (vsriq_m_n_s8): Remove.
26758 (vsriq_m_n_u8): Remove.
26759 (vsriq_m_n_s16): Remove.
26760 (vsriq_m_n_u16): Remove.
26761 (vsriq_m_n_s32): Remove.
26762 (vsriq_m_n_u32): Remove.
26763 (__arm_vsriq_n_u8): Remove.
26764 (__arm_vsriq_n_s8): Remove.
26765 (__arm_vsriq_n_u16): Remove.
26766 (__arm_vsriq_n_s16): Remove.
26767 (__arm_vsriq_n_u32): Remove.
26768 (__arm_vsriq_n_s32): Remove.
26769 (__arm_vsriq_m_n_s8): Remove.
26770 (__arm_vsriq_m_n_u8): Remove.
26771 (__arm_vsriq_m_n_s16): Remove.
26772 (__arm_vsriq_m_n_u16): Remove.
26773 (__arm_vsriq_m_n_s32): Remove.
26774 (__arm_vsriq_m_n_u32): Remove.
26775 (__arm_vsriq): Remove.
26776 (__arm_vsriq_m): Remove.
26778 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26780 * config/arm/iterators.md (mve_insn): Add vsri.
26781 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
26782 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
26783 (mve_vsriq_m_n_<supf><mode>): Rename into ...
26784 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26786 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26788 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
26789 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
26791 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26793 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
26794 * config/arm/arm-mve-builtins-base.def (vsliq): New.
26795 * config/arm/arm-mve-builtins-base.h (vsliq): New.
26796 * config/arm/arm-mve-builtins.cc
26797 (function_instance::has_inactive_argument): Handle vsliq.
26798 * config/arm/arm_mve.h (vsliq): Remove.
26800 (vsliq_n_u8): Remove.
26801 (vsliq_n_s8): Remove.
26802 (vsliq_n_u16): Remove.
26803 (vsliq_n_s16): Remove.
26804 (vsliq_n_u32): Remove.
26805 (vsliq_n_s32): Remove.
26806 (vsliq_m_n_s8): Remove.
26807 (vsliq_m_n_s32): Remove.
26808 (vsliq_m_n_s16): Remove.
26809 (vsliq_m_n_u8): Remove.
26810 (vsliq_m_n_u32): Remove.
26811 (vsliq_m_n_u16): Remove.
26812 (__arm_vsliq_n_u8): Remove.
26813 (__arm_vsliq_n_s8): Remove.
26814 (__arm_vsliq_n_u16): Remove.
26815 (__arm_vsliq_n_s16): Remove.
26816 (__arm_vsliq_n_u32): Remove.
26817 (__arm_vsliq_n_s32): Remove.
26818 (__arm_vsliq_m_n_s8): Remove.
26819 (__arm_vsliq_m_n_s32): Remove.
26820 (__arm_vsliq_m_n_s16): Remove.
26821 (__arm_vsliq_m_n_u8): Remove.
26822 (__arm_vsliq_m_n_u32): Remove.
26823 (__arm_vsliq_m_n_u16): Remove.
26824 (__arm_vsliq): Remove.
26825 (__arm_vsliq_m): Remove.
26827 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26829 * config/arm/iterators.md (mve_insn>): Add vsli.
26830 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
26831 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26832 (mve_vsliq_m_n_<supf><mode>): Rename into ...
26833 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26835 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26837 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
26838 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
26840 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26842 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
26843 * config/arm/arm-mve-builtins-base.def (vpselq): New.
26844 * config/arm/arm-mve-builtins-base.h (vpselq): New.
26845 * config/arm/arm_mve.h (vpselq): Remove.
26846 (vpselq_u8): Remove.
26847 (vpselq_s8): Remove.
26848 (vpselq_u16): Remove.
26849 (vpselq_s16): Remove.
26850 (vpselq_u32): Remove.
26851 (vpselq_s32): Remove.
26852 (vpselq_u64): Remove.
26853 (vpselq_s64): Remove.
26854 (vpselq_f16): Remove.
26855 (vpselq_f32): Remove.
26856 (__arm_vpselq_u8): Remove.
26857 (__arm_vpselq_s8): Remove.
26858 (__arm_vpselq_u16): Remove.
26859 (__arm_vpselq_s16): Remove.
26860 (__arm_vpselq_u32): Remove.
26861 (__arm_vpselq_s32): Remove.
26862 (__arm_vpselq_u64): Remove.
26863 (__arm_vpselq_s64): Remove.
26864 (__arm_vpselq_f16): Remove.
26865 (__arm_vpselq_f32): Remove.
26866 (__arm_vpselq): Remove.
26868 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26870 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
26871 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
26873 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26875 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
26877 * config/arm/iterators.md (MVE_VPSELQ_F): New.
26878 (mve_insn): Add vpsel.
26879 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
26880 (@mve_<mve_insn>q_<supf><mode>): ... this.
26881 (@mve_vpselq_f<mode>): Rename into ...
26882 (@mve_<mve_insn>q_f<mode>): ... this.
26884 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26886 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
26887 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
26888 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
26889 * config/arm/arm-mve-builtins.cc
26890 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
26892 * config/arm/arm_mve.h (vfmaq): Remove.
26896 (vfmasq_m): Remove.
26898 (vfmaq_f16): Remove.
26899 (vfmaq_n_f16): Remove.
26900 (vfmasq_n_f16): Remove.
26901 (vfmsq_f16): Remove.
26902 (vfmaq_f32): Remove.
26903 (vfmaq_n_f32): Remove.
26904 (vfmasq_n_f32): Remove.
26905 (vfmsq_f32): Remove.
26906 (vfmaq_m_f32): Remove.
26907 (vfmaq_m_f16): Remove.
26908 (vfmaq_m_n_f32): Remove.
26909 (vfmaq_m_n_f16): Remove.
26910 (vfmasq_m_n_f32): Remove.
26911 (vfmasq_m_n_f16): Remove.
26912 (vfmsq_m_f32): Remove.
26913 (vfmsq_m_f16): Remove.
26914 (__arm_vfmaq_f16): Remove.
26915 (__arm_vfmaq_n_f16): Remove.
26916 (__arm_vfmasq_n_f16): Remove.
26917 (__arm_vfmsq_f16): Remove.
26918 (__arm_vfmaq_f32): Remove.
26919 (__arm_vfmaq_n_f32): Remove.
26920 (__arm_vfmasq_n_f32): Remove.
26921 (__arm_vfmsq_f32): Remove.
26922 (__arm_vfmaq_m_f32): Remove.
26923 (__arm_vfmaq_m_f16): Remove.
26924 (__arm_vfmaq_m_n_f32): Remove.
26925 (__arm_vfmaq_m_n_f16): Remove.
26926 (__arm_vfmasq_m_n_f32): Remove.
26927 (__arm_vfmasq_m_n_f16): Remove.
26928 (__arm_vfmsq_m_f32): Remove.
26929 (__arm_vfmsq_m_f16): Remove.
26930 (__arm_vfmaq): Remove.
26931 (__arm_vfmasq): Remove.
26932 (__arm_vfmsq): Remove.
26933 (__arm_vfmaq_m): Remove.
26934 (__arm_vfmasq_m): Remove.
26935 (__arm_vfmsq_m): Remove.
26937 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26939 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
26941 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
26942 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
26943 (mve_insn): Add vfma, vfmas, vfms.
26944 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
26946 (@mve_<mve_insn>q_f<mode>): ... this.
26947 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
26948 (@mve_<mve_insn>q_n_f<mode>): ... this.
26949 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
26950 @mve_<mve_insn>q_m_f<mode>.
26951 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
26952 @mve_<mve_insn>q_m_n_f<mode>.
26954 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26956 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
26957 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
26959 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
26961 * config/arm/arm-mve-builtins-base.cc
26962 (FUNCTION_WITH_RTX_M_N_NO_F): New.
26964 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
26965 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
26966 * config/arm/arm_mve.h (vmvnq): Remove.
26969 (vmvnq_s8): Remove.
26970 (vmvnq_s16): Remove.
26971 (vmvnq_s32): Remove.
26972 (vmvnq_n_s16): Remove.
26973 (vmvnq_n_s32): Remove.
26974 (vmvnq_u8): Remove.
26975 (vmvnq_u16): Remove.
26976 (vmvnq_u32): Remove.
26977 (vmvnq_n_u16): Remove.
26978 (vmvnq_n_u32): Remove.
26979 (vmvnq_m_u8): Remove.
26980 (vmvnq_m_s8): Remove.
26981 (vmvnq_m_u16): Remove.
26982 (vmvnq_m_s16): Remove.
26983 (vmvnq_m_u32): Remove.
26984 (vmvnq_m_s32): Remove.
26985 (vmvnq_m_n_s16): Remove.
26986 (vmvnq_m_n_u16): Remove.
26987 (vmvnq_m_n_s32): Remove.
26988 (vmvnq_m_n_u32): Remove.
26989 (vmvnq_x_s8): Remove.
26990 (vmvnq_x_s16): Remove.
26991 (vmvnq_x_s32): Remove.
26992 (vmvnq_x_u8): Remove.
26993 (vmvnq_x_u16): Remove.
26994 (vmvnq_x_u32): Remove.
26995 (vmvnq_x_n_s16): Remove.
26996 (vmvnq_x_n_s32): Remove.
26997 (vmvnq_x_n_u16): Remove.
26998 (vmvnq_x_n_u32): Remove.
26999 (__arm_vmvnq_s8): Remove.
27000 (__arm_vmvnq_s16): Remove.
27001 (__arm_vmvnq_s32): Remove.
27002 (__arm_vmvnq_n_s16): Remove.
27003 (__arm_vmvnq_n_s32): Remove.
27004 (__arm_vmvnq_u8): Remove.
27005 (__arm_vmvnq_u16): Remove.
27006 (__arm_vmvnq_u32): Remove.
27007 (__arm_vmvnq_n_u16): Remove.
27008 (__arm_vmvnq_n_u32): Remove.
27009 (__arm_vmvnq_m_u8): Remove.
27010 (__arm_vmvnq_m_s8): Remove.
27011 (__arm_vmvnq_m_u16): Remove.
27012 (__arm_vmvnq_m_s16): Remove.
27013 (__arm_vmvnq_m_u32): Remove.
27014 (__arm_vmvnq_m_s32): Remove.
27015 (__arm_vmvnq_m_n_s16): Remove.
27016 (__arm_vmvnq_m_n_u16): Remove.
27017 (__arm_vmvnq_m_n_s32): Remove.
27018 (__arm_vmvnq_m_n_u32): Remove.
27019 (__arm_vmvnq_x_s8): Remove.
27020 (__arm_vmvnq_x_s16): Remove.
27021 (__arm_vmvnq_x_s32): Remove.
27022 (__arm_vmvnq_x_u8): Remove.
27023 (__arm_vmvnq_x_u16): Remove.
27024 (__arm_vmvnq_x_u32): Remove.
27025 (__arm_vmvnq_x_n_s16): Remove.
27026 (__arm_vmvnq_x_n_s32): Remove.
27027 (__arm_vmvnq_x_n_u16): Remove.
27028 (__arm_vmvnq_x_n_u32): Remove.
27029 (__arm_vmvnq): Remove.
27030 (__arm_vmvnq_m): Remove.
27031 (__arm_vmvnq_x): Remove.
27033 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27035 * config/arm/iterators.md (mve_insn): Add vmvn.
27036 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
27037 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27038 (mve_vmvnq_m_<supf><mode>): Rename into ...
27039 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
27040 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
27041 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27043 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27045 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
27046 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
27048 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27050 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
27051 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
27052 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
27053 * config/arm/arm_mve.h (vbrsrq): Remove.
27054 (vbrsrq_m): Remove.
27055 (vbrsrq_x): Remove.
27056 (vbrsrq_n_f16): Remove.
27057 (vbrsrq_n_f32): Remove.
27058 (vbrsrq_n_u8): Remove.
27059 (vbrsrq_n_s8): Remove.
27060 (vbrsrq_n_u16): Remove.
27061 (vbrsrq_n_s16): Remove.
27062 (vbrsrq_n_u32): Remove.
27063 (vbrsrq_n_s32): Remove.
27064 (vbrsrq_m_n_s8): Remove.
27065 (vbrsrq_m_n_s32): Remove.
27066 (vbrsrq_m_n_s16): Remove.
27067 (vbrsrq_m_n_u8): Remove.
27068 (vbrsrq_m_n_u32): Remove.
27069 (vbrsrq_m_n_u16): Remove.
27070 (vbrsrq_m_n_f32): Remove.
27071 (vbrsrq_m_n_f16): Remove.
27072 (vbrsrq_x_n_s8): Remove.
27073 (vbrsrq_x_n_s16): Remove.
27074 (vbrsrq_x_n_s32): Remove.
27075 (vbrsrq_x_n_u8): Remove.
27076 (vbrsrq_x_n_u16): Remove.
27077 (vbrsrq_x_n_u32): Remove.
27078 (vbrsrq_x_n_f16): Remove.
27079 (vbrsrq_x_n_f32): Remove.
27080 (__arm_vbrsrq_n_u8): Remove.
27081 (__arm_vbrsrq_n_s8): Remove.
27082 (__arm_vbrsrq_n_u16): Remove.
27083 (__arm_vbrsrq_n_s16): Remove.
27084 (__arm_vbrsrq_n_u32): Remove.
27085 (__arm_vbrsrq_n_s32): Remove.
27086 (__arm_vbrsrq_m_n_s8): Remove.
27087 (__arm_vbrsrq_m_n_s32): Remove.
27088 (__arm_vbrsrq_m_n_s16): Remove.
27089 (__arm_vbrsrq_m_n_u8): Remove.
27090 (__arm_vbrsrq_m_n_u32): Remove.
27091 (__arm_vbrsrq_m_n_u16): Remove.
27092 (__arm_vbrsrq_x_n_s8): Remove.
27093 (__arm_vbrsrq_x_n_s16): Remove.
27094 (__arm_vbrsrq_x_n_s32): Remove.
27095 (__arm_vbrsrq_x_n_u8): Remove.
27096 (__arm_vbrsrq_x_n_u16): Remove.
27097 (__arm_vbrsrq_x_n_u32): Remove.
27098 (__arm_vbrsrq_n_f16): Remove.
27099 (__arm_vbrsrq_n_f32): Remove.
27100 (__arm_vbrsrq_m_n_f32): Remove.
27101 (__arm_vbrsrq_m_n_f16): Remove.
27102 (__arm_vbrsrq_x_n_f16): Remove.
27103 (__arm_vbrsrq_x_n_f32): Remove.
27104 (__arm_vbrsrq): Remove.
27105 (__arm_vbrsrq_m): Remove.
27106 (__arm_vbrsrq_x): Remove.
27108 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27110 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
27111 (mve_insn): Add vbrsr.
27112 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
27113 (@mve_<mve_insn>q_n_f<mode>): ... this.
27114 (mve_vbrsrq_n_<supf><mode>): Rename into ...
27115 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27116 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
27117 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27118 (mve_vbrsrq_m_n_f<mode>): Rename into ...
27119 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
27121 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27123 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
27124 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
27126 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27128 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
27129 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
27130 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
27131 * config/arm/arm_mve.h (vqshluq): Remove.
27132 (vqshluq_m): Remove.
27133 (vqshluq_n_s8): Remove.
27134 (vqshluq_n_s16): Remove.
27135 (vqshluq_n_s32): Remove.
27136 (vqshluq_m_n_s8): Remove.
27137 (vqshluq_m_n_s16): Remove.
27138 (vqshluq_m_n_s32): Remove.
27139 (__arm_vqshluq_n_s8): Remove.
27140 (__arm_vqshluq_n_s16): Remove.
27141 (__arm_vqshluq_n_s32): Remove.
27142 (__arm_vqshluq_m_n_s8): Remove.
27143 (__arm_vqshluq_m_n_s16): Remove.
27144 (__arm_vqshluq_m_n_s32): Remove.
27145 (__arm_vqshluq): Remove.
27146 (__arm_vqshluq_m): Remove.
27148 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27150 * config/arm/iterators.md (mve_insn): Add vqshlu.
27151 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
27152 (VQSHLUQ_M_N, VQSHLUQ_N): New.
27153 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
27154 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27155 (mve_vqshluq_m_n_s<mode>): Change name into ...
27156 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27158 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27160 * config/arm/arm-mve-builtins-shapes.cc
27161 (binary_lshift_unsigned): New.
27162 * config/arm/arm-mve-builtins-shapes.h
27163 (binary_lshift_unsigned): New.
27165 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27167 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
27168 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
27169 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
27170 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
27171 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
27172 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
27173 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
27174 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
27175 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
27176 (vrmlaldavhaxq): Remove.
27177 (vrmlsldavhaq): Remove.
27178 (vrmlsldavhaxq): Remove.
27179 (vrmlaldavhaq_p): Remove.
27180 (vrmlaldavhaxq_p): Remove.
27181 (vrmlsldavhaq_p): Remove.
27182 (vrmlsldavhaxq_p): Remove.
27183 (vrmlaldavhaq_s32): Remove.
27184 (vrmlaldavhaq_u32): Remove.
27185 (vrmlaldavhaxq_s32): Remove.
27186 (vrmlsldavhaq_s32): Remove.
27187 (vrmlsldavhaxq_s32): Remove.
27188 (vrmlaldavhaq_p_s32): Remove.
27189 (vrmlaldavhaq_p_u32): Remove.
27190 (vrmlaldavhaxq_p_s32): Remove.
27191 (vrmlsldavhaq_p_s32): Remove.
27192 (vrmlsldavhaxq_p_s32): Remove.
27193 (__arm_vrmlaldavhaq_s32): Remove.
27194 (__arm_vrmlaldavhaq_u32): Remove.
27195 (__arm_vrmlaldavhaxq_s32): Remove.
27196 (__arm_vrmlsldavhaq_s32): Remove.
27197 (__arm_vrmlsldavhaxq_s32): Remove.
27198 (__arm_vrmlaldavhaq_p_s32): Remove.
27199 (__arm_vrmlaldavhaq_p_u32): Remove.
27200 (__arm_vrmlaldavhaxq_p_s32): Remove.
27201 (__arm_vrmlsldavhaq_p_s32): Remove.
27202 (__arm_vrmlsldavhaxq_p_s32): Remove.
27203 (__arm_vrmlaldavhaq): Remove.
27204 (__arm_vrmlaldavhaxq): Remove.
27205 (__arm_vrmlsldavhaq): Remove.
27206 (__arm_vrmlsldavhaxq): Remove.
27207 (__arm_vrmlaldavhaq_p): Remove.
27208 (__arm_vrmlaldavhaxq_p): Remove.
27209 (__arm_vrmlsldavhaq_p): Remove.
27210 (__arm_vrmlsldavhaxq_p): Remove.
27212 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27214 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
27215 (MVE_VRMLxLDAVHAxQ_P): New.
27216 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
27218 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
27219 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
27221 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
27222 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
27223 (mve_vrmlsldavhaq_sv4si): Merge into ...
27224 (@mve_<mve_insn>q_<supf>v4si): ... this.
27225 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
27226 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
27227 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
27228 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
27230 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27232 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
27233 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
27235 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
27236 * config/arm/arm_mve.h (vqdmulltq): Remove.
27237 (vqdmullbq): Remove.
27238 (vqdmullbq_m): Remove.
27239 (vqdmulltq_m): Remove.
27240 (vqdmulltq_s16): Remove.
27241 (vqdmulltq_n_s16): Remove.
27242 (vqdmullbq_s16): Remove.
27243 (vqdmullbq_n_s16): Remove.
27244 (vqdmulltq_s32): Remove.
27245 (vqdmulltq_n_s32): Remove.
27246 (vqdmullbq_s32): Remove.
27247 (vqdmullbq_n_s32): Remove.
27248 (vqdmullbq_m_n_s32): Remove.
27249 (vqdmullbq_m_n_s16): Remove.
27250 (vqdmullbq_m_s32): Remove.
27251 (vqdmullbq_m_s16): Remove.
27252 (vqdmulltq_m_n_s32): Remove.
27253 (vqdmulltq_m_n_s16): Remove.
27254 (vqdmulltq_m_s32): Remove.
27255 (vqdmulltq_m_s16): Remove.
27256 (__arm_vqdmulltq_s16): Remove.
27257 (__arm_vqdmulltq_n_s16): Remove.
27258 (__arm_vqdmullbq_s16): Remove.
27259 (__arm_vqdmullbq_n_s16): Remove.
27260 (__arm_vqdmulltq_s32): Remove.
27261 (__arm_vqdmulltq_n_s32): Remove.
27262 (__arm_vqdmullbq_s32): Remove.
27263 (__arm_vqdmullbq_n_s32): Remove.
27264 (__arm_vqdmullbq_m_n_s32): Remove.
27265 (__arm_vqdmullbq_m_n_s16): Remove.
27266 (__arm_vqdmullbq_m_s32): Remove.
27267 (__arm_vqdmullbq_m_s16): Remove.
27268 (__arm_vqdmulltq_m_n_s32): Remove.
27269 (__arm_vqdmulltq_m_n_s16): Remove.
27270 (__arm_vqdmulltq_m_s32): Remove.
27271 (__arm_vqdmulltq_m_s16): Remove.
27272 (__arm_vqdmulltq): Remove.
27273 (__arm_vqdmullbq): Remove.
27274 (__arm_vqdmullbq_m): Remove.
27275 (__arm_vqdmulltq_m): Remove.
27277 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27279 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
27280 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
27281 (mve_insn): Add vqdmullb, vqdmullt.
27282 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
27283 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
27285 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
27286 (mve_vqdmulltq_n_s<mode>): Merge into ...
27287 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27288 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
27289 (@mve_<mve_insn>q_<supf><mode>): ... this.
27290 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
27292 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27293 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
27294 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
27296 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
27298 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
27299 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
27301 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
27303 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
27304 Drop unused parameter.
27305 (riscv_select_multilib): Ditto.
27306 (riscv_compute_multilib): Update call site of
27307 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
27309 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
27311 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
27312 * config/riscv/riscv-protos.h (expand_vec_init): New function.
27313 * config/riscv/riscv-v.cc (class rvv_builder): New class.
27314 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
27315 (rvv_builder::get_merged_repeating_sequence): Ditto.
27316 (expand_vector_init_insert_elems): Ditto.
27317 (expand_vec_init): Ditto.
27318 * config/riscv/vector-iterators.md: New attribute.
27320 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
27322 * config/rs6000/rs6000-builtins.def
27323 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
27325 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
27326 xsiexpdpf to xsiexpdpf_di.
27327 * config/rs6000/vsx.md (xsiexpdp): Rename to...
27328 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
27329 replace TARGET_64BIT with TARGET_POWERPC64.
27330 (xsiexpdpf): Rename to...
27331 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
27332 replace TARGET_64BIT with TARGET_POWERPC64.
27334 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
27336 * config/rs6000/rs6000-builtins.def
27337 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
27339 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
27342 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
27344 * config/rs6000/rs6000-builtins.def
27345 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
27346 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
27348 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
27349 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
27350 TARGET_64BIT check.
27351 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
27352 requirement when it has a 64-bit argument.
27354 2023-05-12 Pan Li <pan2.li@intel.com>
27355 Richard Sandiford <richard.sandiford@arm.com>
27356 Richard Biener <rguenther@suse.de>
27357 Jakub Jelinek <jakub@redhat.com>
27359 * mux-utils.h: Add overload operator == and != for pointer_mux.
27360 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
27361 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
27362 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
27363 (dv_as_decl): Ditto.
27364 (dv_as_opaque): Removed due to unnecessary.
27365 (struct variable_hasher): Take decl_or_value as compare_type.
27366 (variable_hasher::equal): Diito.
27367 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
27368 (dv_from_value): Ditto.
27369 (attrs_list_member): Ditto.
27370 (vars_copy): Ditto.
27371 (var_reg_decl_set): Ditto.
27372 (var_reg_delete_and_set): Ditto.
27373 (find_loc_in_1pdv): Ditto.
27374 (canonicalize_values_star): Ditto.
27375 (variable_post_merge_new_vals): Ditto.
27376 (dump_onepart_variable_differences): Ditto.
27377 (variable_different_p): Ditto.
27378 (set_slot_part): Ditto.
27379 (clobber_slot_part): Ditto.
27380 (clobber_variable_part): Ditto.
27382 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
27384 * match.pd: simplify vector shift + bit_and + multiply.
27386 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27388 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
27389 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
27390 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
27391 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
27392 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
27393 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
27394 * config/arm/arm-mve-builtins.cc
27395 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
27396 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
27397 * config/arm/arm_mve.h (vqrdmlashq): Remove.
27398 (vqrdmlahq): Remove.
27399 (vqdmlashq): Remove.
27400 (vqdmlahq): Remove.
27404 (vmlasq_m): Remove.
27405 (vqdmlashq_m): Remove.
27406 (vqdmlahq_m): Remove.
27407 (vqrdmlahq_m): Remove.
27408 (vqrdmlashq_m): Remove.
27409 (vmlasq_n_u8): Remove.
27410 (vmlaq_n_u8): Remove.
27411 (vqrdmlashq_n_s8): Remove.
27412 (vqrdmlahq_n_s8): Remove.
27413 (vqdmlahq_n_s8): Remove.
27414 (vqdmlashq_n_s8): Remove.
27415 (vmlasq_n_s8): Remove.
27416 (vmlaq_n_s8): Remove.
27417 (vmlasq_n_u16): Remove.
27418 (vmlaq_n_u16): Remove.
27419 (vqrdmlashq_n_s16): Remove.
27420 (vqrdmlahq_n_s16): Remove.
27421 (vqdmlashq_n_s16): Remove.
27422 (vqdmlahq_n_s16): Remove.
27423 (vmlasq_n_s16): Remove.
27424 (vmlaq_n_s16): Remove.
27425 (vmlasq_n_u32): Remove.
27426 (vmlaq_n_u32): Remove.
27427 (vqrdmlashq_n_s32): Remove.
27428 (vqrdmlahq_n_s32): Remove.
27429 (vqdmlashq_n_s32): Remove.
27430 (vqdmlahq_n_s32): Remove.
27431 (vmlasq_n_s32): Remove.
27432 (vmlaq_n_s32): Remove.
27433 (vmlaq_m_n_s8): Remove.
27434 (vmlaq_m_n_s32): Remove.
27435 (vmlaq_m_n_s16): Remove.
27436 (vmlaq_m_n_u8): Remove.
27437 (vmlaq_m_n_u32): Remove.
27438 (vmlaq_m_n_u16): Remove.
27439 (vmlasq_m_n_s8): Remove.
27440 (vmlasq_m_n_s32): Remove.
27441 (vmlasq_m_n_s16): Remove.
27442 (vmlasq_m_n_u8): Remove.
27443 (vmlasq_m_n_u32): Remove.
27444 (vmlasq_m_n_u16): Remove.
27445 (vqdmlashq_m_n_s8): Remove.
27446 (vqdmlashq_m_n_s32): Remove.
27447 (vqdmlashq_m_n_s16): Remove.
27448 (vqdmlahq_m_n_s8): Remove.
27449 (vqdmlahq_m_n_s32): Remove.
27450 (vqdmlahq_m_n_s16): Remove.
27451 (vqrdmlahq_m_n_s8): Remove.
27452 (vqrdmlahq_m_n_s32): Remove.
27453 (vqrdmlahq_m_n_s16): Remove.
27454 (vqrdmlashq_m_n_s8): Remove.
27455 (vqrdmlashq_m_n_s32): Remove.
27456 (vqrdmlashq_m_n_s16): Remove.
27457 (__arm_vmlasq_n_u8): Remove.
27458 (__arm_vmlaq_n_u8): Remove.
27459 (__arm_vqrdmlashq_n_s8): Remove.
27460 (__arm_vqdmlashq_n_s8): Remove.
27461 (__arm_vqrdmlahq_n_s8): Remove.
27462 (__arm_vqdmlahq_n_s8): Remove.
27463 (__arm_vmlasq_n_s8): Remove.
27464 (__arm_vmlaq_n_s8): Remove.
27465 (__arm_vmlasq_n_u16): Remove.
27466 (__arm_vmlaq_n_u16): Remove.
27467 (__arm_vqrdmlashq_n_s16): Remove.
27468 (__arm_vqdmlashq_n_s16): Remove.
27469 (__arm_vqrdmlahq_n_s16): Remove.
27470 (__arm_vqdmlahq_n_s16): Remove.
27471 (__arm_vmlasq_n_s16): Remove.
27472 (__arm_vmlaq_n_s16): Remove.
27473 (__arm_vmlasq_n_u32): Remove.
27474 (__arm_vmlaq_n_u32): Remove.
27475 (__arm_vqrdmlashq_n_s32): Remove.
27476 (__arm_vqdmlashq_n_s32): Remove.
27477 (__arm_vqrdmlahq_n_s32): Remove.
27478 (__arm_vqdmlahq_n_s32): Remove.
27479 (__arm_vmlasq_n_s32): Remove.
27480 (__arm_vmlaq_n_s32): Remove.
27481 (__arm_vmlaq_m_n_s8): Remove.
27482 (__arm_vmlaq_m_n_s32): Remove.
27483 (__arm_vmlaq_m_n_s16): Remove.
27484 (__arm_vmlaq_m_n_u8): Remove.
27485 (__arm_vmlaq_m_n_u32): Remove.
27486 (__arm_vmlaq_m_n_u16): Remove.
27487 (__arm_vmlasq_m_n_s8): Remove.
27488 (__arm_vmlasq_m_n_s32): Remove.
27489 (__arm_vmlasq_m_n_s16): Remove.
27490 (__arm_vmlasq_m_n_u8): Remove.
27491 (__arm_vmlasq_m_n_u32): Remove.
27492 (__arm_vmlasq_m_n_u16): Remove.
27493 (__arm_vqdmlahq_m_n_s8): Remove.
27494 (__arm_vqdmlahq_m_n_s32): Remove.
27495 (__arm_vqdmlahq_m_n_s16): Remove.
27496 (__arm_vqrdmlahq_m_n_s8): Remove.
27497 (__arm_vqrdmlahq_m_n_s32): Remove.
27498 (__arm_vqrdmlahq_m_n_s16): Remove.
27499 (__arm_vqrdmlashq_m_n_s8): Remove.
27500 (__arm_vqrdmlashq_m_n_s32): Remove.
27501 (__arm_vqrdmlashq_m_n_s16): Remove.
27502 (__arm_vqdmlashq_m_n_s8): Remove.
27503 (__arm_vqdmlashq_m_n_s16): Remove.
27504 (__arm_vqdmlashq_m_n_s32): Remove.
27505 (__arm_vmlasq): Remove.
27506 (__arm_vmlaq): Remove.
27507 (__arm_vqrdmlashq): Remove.
27508 (__arm_vqdmlashq): Remove.
27509 (__arm_vqrdmlahq): Remove.
27510 (__arm_vqdmlahq): Remove.
27511 (__arm_vmlaq_m): Remove.
27512 (__arm_vmlasq_m): Remove.
27513 (__arm_vqdmlahq_m): Remove.
27514 (__arm_vqrdmlahq_m): Remove.
27515 (__arm_vqrdmlashq_m): Remove.
27516 (__arm_vqdmlashq_m): Remove.
27518 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27520 * config/arm/iterators.md (MVE_VMLxQ_N): New.
27521 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
27523 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
27525 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
27526 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
27527 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
27528 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
27529 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27531 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27533 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
27534 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
27536 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27538 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
27539 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
27540 (vqrdmlsdhxq): New.
27541 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
27542 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
27543 (vqrdmlsdhxq): New.
27544 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
27545 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
27546 (vqrdmlsdhxq): New.
27547 * config/arm/arm-mve-builtins.cc
27548 (function_instance::has_inactive_argument): Handle vqrdmladhq,
27549 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
27550 vqdmlsdhq, vqdmlsdhxq.
27551 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
27552 (vqrdmlsdhq): Remove.
27553 (vqrdmladhxq): Remove.
27554 (vqrdmladhq): Remove.
27555 (vqdmlsdhxq): Remove.
27556 (vqdmlsdhq): Remove.
27557 (vqdmladhxq): Remove.
27558 (vqdmladhq): Remove.
27559 (vqdmladhq_m): Remove.
27560 (vqdmladhxq_m): Remove.
27561 (vqdmlsdhq_m): Remove.
27562 (vqdmlsdhxq_m): Remove.
27563 (vqrdmladhq_m): Remove.
27564 (vqrdmladhxq_m): Remove.
27565 (vqrdmlsdhq_m): Remove.
27566 (vqrdmlsdhxq_m): Remove.
27567 (vqrdmlsdhxq_s8): Remove.
27568 (vqrdmlsdhq_s8): Remove.
27569 (vqrdmladhxq_s8): Remove.
27570 (vqrdmladhq_s8): Remove.
27571 (vqdmlsdhxq_s8): Remove.
27572 (vqdmlsdhq_s8): Remove.
27573 (vqdmladhxq_s8): Remove.
27574 (vqdmladhq_s8): Remove.
27575 (vqrdmlsdhxq_s16): Remove.
27576 (vqrdmlsdhq_s16): Remove.
27577 (vqrdmladhxq_s16): Remove.
27578 (vqrdmladhq_s16): Remove.
27579 (vqdmlsdhxq_s16): Remove.
27580 (vqdmlsdhq_s16): Remove.
27581 (vqdmladhxq_s16): Remove.
27582 (vqdmladhq_s16): Remove.
27583 (vqrdmlsdhxq_s32): Remove.
27584 (vqrdmlsdhq_s32): Remove.
27585 (vqrdmladhxq_s32): Remove.
27586 (vqrdmladhq_s32): Remove.
27587 (vqdmlsdhxq_s32): Remove.
27588 (vqdmlsdhq_s32): Remove.
27589 (vqdmladhxq_s32): Remove.
27590 (vqdmladhq_s32): Remove.
27591 (vqdmladhq_m_s8): Remove.
27592 (vqdmladhq_m_s32): Remove.
27593 (vqdmladhq_m_s16): Remove.
27594 (vqdmladhxq_m_s8): Remove.
27595 (vqdmladhxq_m_s32): Remove.
27596 (vqdmladhxq_m_s16): Remove.
27597 (vqdmlsdhq_m_s8): Remove.
27598 (vqdmlsdhq_m_s32): Remove.
27599 (vqdmlsdhq_m_s16): Remove.
27600 (vqdmlsdhxq_m_s8): Remove.
27601 (vqdmlsdhxq_m_s32): Remove.
27602 (vqdmlsdhxq_m_s16): Remove.
27603 (vqrdmladhq_m_s8): Remove.
27604 (vqrdmladhq_m_s32): Remove.
27605 (vqrdmladhq_m_s16): Remove.
27606 (vqrdmladhxq_m_s8): Remove.
27607 (vqrdmladhxq_m_s32): Remove.
27608 (vqrdmladhxq_m_s16): Remove.
27609 (vqrdmlsdhq_m_s8): Remove.
27610 (vqrdmlsdhq_m_s32): Remove.
27611 (vqrdmlsdhq_m_s16): Remove.
27612 (vqrdmlsdhxq_m_s8): Remove.
27613 (vqrdmlsdhxq_m_s32): Remove.
27614 (vqrdmlsdhxq_m_s16): Remove.
27615 (__arm_vqrdmlsdhxq_s8): Remove.
27616 (__arm_vqrdmlsdhq_s8): Remove.
27617 (__arm_vqrdmladhxq_s8): Remove.
27618 (__arm_vqrdmladhq_s8): Remove.
27619 (__arm_vqdmlsdhxq_s8): Remove.
27620 (__arm_vqdmlsdhq_s8): Remove.
27621 (__arm_vqdmladhxq_s8): Remove.
27622 (__arm_vqdmladhq_s8): Remove.
27623 (__arm_vqrdmlsdhxq_s16): Remove.
27624 (__arm_vqrdmlsdhq_s16): Remove.
27625 (__arm_vqrdmladhxq_s16): Remove.
27626 (__arm_vqrdmladhq_s16): Remove.
27627 (__arm_vqdmlsdhxq_s16): Remove.
27628 (__arm_vqdmlsdhq_s16): Remove.
27629 (__arm_vqdmladhxq_s16): Remove.
27630 (__arm_vqdmladhq_s16): Remove.
27631 (__arm_vqrdmlsdhxq_s32): Remove.
27632 (__arm_vqrdmlsdhq_s32): Remove.
27633 (__arm_vqrdmladhxq_s32): Remove.
27634 (__arm_vqrdmladhq_s32): Remove.
27635 (__arm_vqdmlsdhxq_s32): Remove.
27636 (__arm_vqdmlsdhq_s32): Remove.
27637 (__arm_vqdmladhxq_s32): Remove.
27638 (__arm_vqdmladhq_s32): Remove.
27639 (__arm_vqdmladhq_m_s8): Remove.
27640 (__arm_vqdmladhq_m_s32): Remove.
27641 (__arm_vqdmladhq_m_s16): Remove.
27642 (__arm_vqdmladhxq_m_s8): Remove.
27643 (__arm_vqdmladhxq_m_s32): Remove.
27644 (__arm_vqdmladhxq_m_s16): Remove.
27645 (__arm_vqdmlsdhq_m_s8): Remove.
27646 (__arm_vqdmlsdhq_m_s32): Remove.
27647 (__arm_vqdmlsdhq_m_s16): Remove.
27648 (__arm_vqdmlsdhxq_m_s8): Remove.
27649 (__arm_vqdmlsdhxq_m_s32): Remove.
27650 (__arm_vqdmlsdhxq_m_s16): Remove.
27651 (__arm_vqrdmladhq_m_s8): Remove.
27652 (__arm_vqrdmladhq_m_s32): Remove.
27653 (__arm_vqrdmladhq_m_s16): Remove.
27654 (__arm_vqrdmladhxq_m_s8): Remove.
27655 (__arm_vqrdmladhxq_m_s32): Remove.
27656 (__arm_vqrdmladhxq_m_s16): Remove.
27657 (__arm_vqrdmlsdhq_m_s8): Remove.
27658 (__arm_vqrdmlsdhq_m_s32): Remove.
27659 (__arm_vqrdmlsdhq_m_s16): Remove.
27660 (__arm_vqrdmlsdhxq_m_s8): Remove.
27661 (__arm_vqrdmlsdhxq_m_s32): Remove.
27662 (__arm_vqrdmlsdhxq_m_s16): Remove.
27663 (__arm_vqrdmlsdhxq): Remove.
27664 (__arm_vqrdmlsdhq): Remove.
27665 (__arm_vqrdmladhxq): Remove.
27666 (__arm_vqrdmladhq): Remove.
27667 (__arm_vqdmlsdhxq): Remove.
27668 (__arm_vqdmlsdhq): Remove.
27669 (__arm_vqdmladhxq): Remove.
27670 (__arm_vqdmladhq): Remove.
27671 (__arm_vqdmladhq_m): Remove.
27672 (__arm_vqdmladhxq_m): Remove.
27673 (__arm_vqdmlsdhq_m): Remove.
27674 (__arm_vqdmlsdhxq_m): Remove.
27675 (__arm_vqrdmladhq_m): Remove.
27676 (__arm_vqrdmladhxq_m): Remove.
27677 (__arm_vqrdmlsdhq_m): Remove.
27678 (__arm_vqrdmlsdhxq_m): Remove.
27680 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27682 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
27683 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
27684 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
27685 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
27686 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
27687 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
27688 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
27689 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
27690 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
27691 (mve_vqdmladhq_s<mode>): Merge into ...
27692 (@mve_<mve_insn>q_<supf><mode>): ... this.
27694 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27696 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
27697 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
27699 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27701 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
27702 (vmlsldavaq, vmlsldavaxq): New.
27703 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
27704 (vmlsldavaq, vmlsldavaxq): New.
27705 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
27706 (vmlsldavaq, vmlsldavaxq): New.
27707 * config/arm/arm_mve.h (vmlaldavaq): Remove.
27708 (vmlaldavaxq): Remove.
27709 (vmlsldavaq): Remove.
27710 (vmlsldavaxq): Remove.
27711 (vmlaldavaq_p): Remove.
27712 (vmlaldavaxq_p): Remove.
27713 (vmlsldavaq_p): Remove.
27714 (vmlsldavaxq_p): Remove.
27715 (vmlaldavaq_s16): Remove.
27716 (vmlaldavaxq_s16): Remove.
27717 (vmlsldavaq_s16): Remove.
27718 (vmlsldavaxq_s16): Remove.
27719 (vmlaldavaq_u16): Remove.
27720 (vmlaldavaq_s32): Remove.
27721 (vmlaldavaxq_s32): Remove.
27722 (vmlsldavaq_s32): Remove.
27723 (vmlsldavaxq_s32): Remove.
27724 (vmlaldavaq_u32): Remove.
27725 (vmlaldavaq_p_s32): Remove.
27726 (vmlaldavaq_p_s16): Remove.
27727 (vmlaldavaq_p_u32): Remove.
27728 (vmlaldavaq_p_u16): Remove.
27729 (vmlaldavaxq_p_s32): Remove.
27730 (vmlaldavaxq_p_s16): Remove.
27731 (vmlsldavaq_p_s32): Remove.
27732 (vmlsldavaq_p_s16): Remove.
27733 (vmlsldavaxq_p_s32): Remove.
27734 (vmlsldavaxq_p_s16): Remove.
27735 (__arm_vmlaldavaq_s16): Remove.
27736 (__arm_vmlaldavaxq_s16): Remove.
27737 (__arm_vmlsldavaq_s16): Remove.
27738 (__arm_vmlsldavaxq_s16): Remove.
27739 (__arm_vmlaldavaq_u16): Remove.
27740 (__arm_vmlaldavaq_s32): Remove.
27741 (__arm_vmlaldavaxq_s32): Remove.
27742 (__arm_vmlsldavaq_s32): Remove.
27743 (__arm_vmlsldavaxq_s32): Remove.
27744 (__arm_vmlaldavaq_u32): Remove.
27745 (__arm_vmlaldavaq_p_s32): Remove.
27746 (__arm_vmlaldavaq_p_s16): Remove.
27747 (__arm_vmlaldavaq_p_u32): Remove.
27748 (__arm_vmlaldavaq_p_u16): Remove.
27749 (__arm_vmlaldavaxq_p_s32): Remove.
27750 (__arm_vmlaldavaxq_p_s16): Remove.
27751 (__arm_vmlsldavaq_p_s32): Remove.
27752 (__arm_vmlsldavaq_p_s16): Remove.
27753 (__arm_vmlsldavaxq_p_s32): Remove.
27754 (__arm_vmlsldavaxq_p_s16): Remove.
27755 (__arm_vmlaldavaq): Remove.
27756 (__arm_vmlaldavaxq): Remove.
27757 (__arm_vmlsldavaq): Remove.
27758 (__arm_vmlsldavaxq): Remove.
27759 (__arm_vmlaldavaq_p): Remove.
27760 (__arm_vmlaldavaxq_p): Remove.
27761 (__arm_vmlsldavaq_p): Remove.
27762 (__arm_vmlsldavaxq_p): Remove.
27764 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27766 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
27768 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
27769 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
27770 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
27771 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
27772 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
27773 (mve_vmlaldavaxq_s<mode>): Merge into ...
27774 (@mve_<mve_insn>q_<supf><mode>): ... this.
27775 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
27776 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
27778 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
27780 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27782 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
27783 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
27785 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27787 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
27788 (vrmlsldavhq, vrmlsldavhxq): New.
27789 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
27790 (vrmlsldavhq, vrmlsldavhxq): New.
27791 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
27792 (vrmlsldavhq, vrmlsldavhxq): New.
27793 * config/arm/arm-mve-builtins-functions.h
27794 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
27795 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
27796 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
27797 (vrmlsldavhxq): Remove.
27798 (vrmlsldavhq): Remove.
27799 (vrmlaldavhxq): Remove.
27800 (vrmlaldavhq_p): Remove.
27801 (vrmlaldavhxq_p): Remove.
27802 (vrmlsldavhq_p): Remove.
27803 (vrmlsldavhxq_p): Remove.
27804 (vrmlaldavhq_u32): Remove.
27805 (vrmlsldavhxq_s32): Remove.
27806 (vrmlsldavhq_s32): Remove.
27807 (vrmlaldavhxq_s32): Remove.
27808 (vrmlaldavhq_s32): Remove.
27809 (vrmlaldavhq_p_s32): Remove.
27810 (vrmlaldavhxq_p_s32): Remove.
27811 (vrmlsldavhq_p_s32): Remove.
27812 (vrmlsldavhxq_p_s32): Remove.
27813 (vrmlaldavhq_p_u32): Remove.
27814 (__arm_vrmlaldavhq_u32): Remove.
27815 (__arm_vrmlsldavhxq_s32): Remove.
27816 (__arm_vrmlsldavhq_s32): Remove.
27817 (__arm_vrmlaldavhxq_s32): Remove.
27818 (__arm_vrmlaldavhq_s32): Remove.
27819 (__arm_vrmlaldavhq_p_s32): Remove.
27820 (__arm_vrmlaldavhxq_p_s32): Remove.
27821 (__arm_vrmlsldavhq_p_s32): Remove.
27822 (__arm_vrmlsldavhxq_p_s32): Remove.
27823 (__arm_vrmlaldavhq_p_u32): Remove.
27824 (__arm_vrmlaldavhq): Remove.
27825 (__arm_vrmlsldavhxq): Remove.
27826 (__arm_vrmlsldavhq): Remove.
27827 (__arm_vrmlaldavhxq): Remove.
27828 (__arm_vrmlaldavhq_p): Remove.
27829 (__arm_vrmlaldavhxq_p): Remove.
27830 (__arm_vrmlsldavhq_p): Remove.
27831 (__arm_vrmlsldavhxq_p): Remove.
27833 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27835 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
27837 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
27838 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
27839 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
27840 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
27841 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
27842 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
27843 (@mve_<mve_insn>q_<supf>v4si): ... this.
27844 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
27845 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
27847 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
27849 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27851 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
27852 (vmlsldavq, vmlsldavxq): New.
27853 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
27854 (vmlsldavq, vmlsldavxq): New.
27855 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
27856 (vmlsldavq, vmlsldavxq): New.
27857 * config/arm/arm_mve.h (vmlaldavq): Remove.
27858 (vmlsldavxq): Remove.
27859 (vmlsldavq): Remove.
27860 (vmlaldavxq): Remove.
27861 (vmlaldavq_p): Remove.
27862 (vmlaldavxq_p): Remove.
27863 (vmlsldavq_p): Remove.
27864 (vmlsldavxq_p): Remove.
27865 (vmlaldavq_u16): Remove.
27866 (vmlsldavxq_s16): Remove.
27867 (vmlsldavq_s16): Remove.
27868 (vmlaldavxq_s16): Remove.
27869 (vmlaldavq_s16): Remove.
27870 (vmlaldavq_u32): Remove.
27871 (vmlsldavxq_s32): Remove.
27872 (vmlsldavq_s32): Remove.
27873 (vmlaldavxq_s32): Remove.
27874 (vmlaldavq_s32): Remove.
27875 (vmlaldavq_p_s16): Remove.
27876 (vmlaldavxq_p_s16): Remove.
27877 (vmlsldavq_p_s16): Remove.
27878 (vmlsldavxq_p_s16): Remove.
27879 (vmlaldavq_p_u16): Remove.
27880 (vmlaldavq_p_s32): Remove.
27881 (vmlaldavxq_p_s32): Remove.
27882 (vmlsldavq_p_s32): Remove.
27883 (vmlsldavxq_p_s32): Remove.
27884 (vmlaldavq_p_u32): Remove.
27885 (__arm_vmlaldavq_u16): Remove.
27886 (__arm_vmlsldavxq_s16): Remove.
27887 (__arm_vmlsldavq_s16): Remove.
27888 (__arm_vmlaldavxq_s16): Remove.
27889 (__arm_vmlaldavq_s16): Remove.
27890 (__arm_vmlaldavq_u32): Remove.
27891 (__arm_vmlsldavxq_s32): Remove.
27892 (__arm_vmlsldavq_s32): Remove.
27893 (__arm_vmlaldavxq_s32): Remove.
27894 (__arm_vmlaldavq_s32): Remove.
27895 (__arm_vmlaldavq_p_s16): Remove.
27896 (__arm_vmlaldavxq_p_s16): Remove.
27897 (__arm_vmlsldavq_p_s16): Remove.
27898 (__arm_vmlsldavxq_p_s16): Remove.
27899 (__arm_vmlaldavq_p_u16): Remove.
27900 (__arm_vmlaldavq_p_s32): Remove.
27901 (__arm_vmlaldavxq_p_s32): Remove.
27902 (__arm_vmlsldavq_p_s32): Remove.
27903 (__arm_vmlsldavxq_p_s32): Remove.
27904 (__arm_vmlaldavq_p_u32): Remove.
27905 (__arm_vmlaldavq): Remove.
27906 (__arm_vmlsldavxq): Remove.
27907 (__arm_vmlsldavq): Remove.
27908 (__arm_vmlaldavxq): Remove.
27909 (__arm_vmlaldavq_p): Remove.
27910 (__arm_vmlaldavxq_p): Remove.
27911 (__arm_vmlsldavq_p): Remove.
27912 (__arm_vmlsldavxq_p): Remove.
27914 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27916 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
27917 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
27918 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
27919 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
27920 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
27921 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
27922 (mve_vmlsldavxq_s<mode>): Merge into ...
27923 (@mve_<mve_insn>q_<supf><mode>): ... this.
27924 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
27925 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
27927 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
27929 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27931 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
27932 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
27934 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27936 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
27937 * config/arm/arm-mve-builtins-base.def (vabavq): New.
27938 * config/arm/arm-mve-builtins-base.h (vabavq): New.
27939 * config/arm/arm_mve.h (vabavq): Remove.
27940 (vabavq_p): Remove.
27941 (vabavq_s8): Remove.
27942 (vabavq_s16): Remove.
27943 (vabavq_s32): Remove.
27944 (vabavq_u8): Remove.
27945 (vabavq_u16): Remove.
27946 (vabavq_u32): Remove.
27947 (vabavq_p_s8): Remove.
27948 (vabavq_p_u8): Remove.
27949 (vabavq_p_s16): Remove.
27950 (vabavq_p_u16): Remove.
27951 (vabavq_p_s32): Remove.
27952 (vabavq_p_u32): Remove.
27953 (__arm_vabavq_s8): Remove.
27954 (__arm_vabavq_s16): Remove.
27955 (__arm_vabavq_s32): Remove.
27956 (__arm_vabavq_u8): Remove.
27957 (__arm_vabavq_u16): Remove.
27958 (__arm_vabavq_u32): Remove.
27959 (__arm_vabavq_p_s8): Remove.
27960 (__arm_vabavq_p_u8): Remove.
27961 (__arm_vabavq_p_s16): Remove.
27962 (__arm_vabavq_p_u16): Remove.
27963 (__arm_vabavq_p_s32): Remove.
27964 (__arm_vabavq_p_u32): Remove.
27965 (__arm_vabavq): Remove.
27966 (__arm_vabavq_p): Remove.
27968 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27970 * config/arm/iterators.md (mve_insn): Add vabav.
27971 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
27972 (@mve_<mve_insn>q_<supf><mode>): ... this,.
27973 (mve_vabavq_p_<supf><mode>): Rename into ...
27974 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
27976 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
27978 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
27979 (vmlsdavaq, vmlsdavaxq): New.
27980 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
27981 (vmlsdavaq, vmlsdavaxq): New.
27982 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
27983 (vmlsdavaq, vmlsdavaxq): New.
27984 * config/arm/arm_mve.h (vmladavaq): Remove.
27985 (vmlsdavaxq): Remove.
27986 (vmlsdavaq): Remove.
27987 (vmladavaxq): Remove.
27988 (vmladavaq_p): Remove.
27989 (vmladavaxq_p): Remove.
27990 (vmlsdavaq_p): Remove.
27991 (vmlsdavaxq_p): Remove.
27992 (vmladavaq_u8): Remove.
27993 (vmlsdavaxq_s8): Remove.
27994 (vmlsdavaq_s8): Remove.
27995 (vmladavaxq_s8): Remove.
27996 (vmladavaq_s8): Remove.
27997 (vmladavaq_u16): Remove.
27998 (vmlsdavaxq_s16): Remove.
27999 (vmlsdavaq_s16): Remove.
28000 (vmladavaxq_s16): Remove.
28001 (vmladavaq_s16): Remove.
28002 (vmladavaq_u32): Remove.
28003 (vmlsdavaxq_s32): Remove.
28004 (vmlsdavaq_s32): Remove.
28005 (vmladavaxq_s32): Remove.
28006 (vmladavaq_s32): Remove.
28007 (vmladavaq_p_s8): Remove.
28008 (vmladavaq_p_s32): Remove.
28009 (vmladavaq_p_s16): Remove.
28010 (vmladavaq_p_u8): Remove.
28011 (vmladavaq_p_u32): Remove.
28012 (vmladavaq_p_u16): Remove.
28013 (vmladavaxq_p_s8): Remove.
28014 (vmladavaxq_p_s32): Remove.
28015 (vmladavaxq_p_s16): Remove.
28016 (vmlsdavaq_p_s8): Remove.
28017 (vmlsdavaq_p_s32): Remove.
28018 (vmlsdavaq_p_s16): Remove.
28019 (vmlsdavaxq_p_s8): Remove.
28020 (vmlsdavaxq_p_s32): Remove.
28021 (vmlsdavaxq_p_s16): Remove.
28022 (__arm_vmladavaq_u8): Remove.
28023 (__arm_vmlsdavaxq_s8): Remove.
28024 (__arm_vmlsdavaq_s8): Remove.
28025 (__arm_vmladavaxq_s8): Remove.
28026 (__arm_vmladavaq_s8): Remove.
28027 (__arm_vmladavaq_u16): Remove.
28028 (__arm_vmlsdavaxq_s16): Remove.
28029 (__arm_vmlsdavaq_s16): Remove.
28030 (__arm_vmladavaxq_s16): Remove.
28031 (__arm_vmladavaq_s16): Remove.
28032 (__arm_vmladavaq_u32): Remove.
28033 (__arm_vmlsdavaxq_s32): Remove.
28034 (__arm_vmlsdavaq_s32): Remove.
28035 (__arm_vmladavaxq_s32): Remove.
28036 (__arm_vmladavaq_s32): Remove.
28037 (__arm_vmladavaq_p_s8): Remove.
28038 (__arm_vmladavaq_p_s32): Remove.
28039 (__arm_vmladavaq_p_s16): Remove.
28040 (__arm_vmladavaq_p_u8): Remove.
28041 (__arm_vmladavaq_p_u32): Remove.
28042 (__arm_vmladavaq_p_u16): Remove.
28043 (__arm_vmladavaxq_p_s8): Remove.
28044 (__arm_vmladavaxq_p_s32): Remove.
28045 (__arm_vmladavaxq_p_s16): Remove.
28046 (__arm_vmlsdavaq_p_s8): Remove.
28047 (__arm_vmlsdavaq_p_s32): Remove.
28048 (__arm_vmlsdavaq_p_s16): Remove.
28049 (__arm_vmlsdavaxq_p_s8): Remove.
28050 (__arm_vmlsdavaxq_p_s32): Remove.
28051 (__arm_vmlsdavaxq_p_s16): Remove.
28052 (__arm_vmladavaq): Remove.
28053 (__arm_vmlsdavaxq): Remove.
28054 (__arm_vmlsdavaq): Remove.
28055 (__arm_vmladavaxq): Remove.
28056 (__arm_vmladavaq_p): Remove.
28057 (__arm_vmladavaxq_p): Remove.
28058 (__arm_vmlsdavaq_p): Remove.
28059 (__arm_vmlsdavaxq_p): Remove.
28061 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28063 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
28064 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
28066 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28068 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
28069 (vmlsdavq, vmlsdavxq): New.
28070 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
28071 (vmlsdavq, vmlsdavxq): New.
28072 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
28073 (vmlsdavq, vmlsdavxq): New.
28074 * config/arm/arm_mve.h (vmladavq): Remove.
28075 (vmlsdavxq): Remove.
28076 (vmlsdavq): Remove.
28077 (vmladavxq): Remove.
28078 (vmladavq_p): Remove.
28079 (vmlsdavxq_p): Remove.
28080 (vmlsdavq_p): Remove.
28081 (vmladavxq_p): Remove.
28082 (vmladavq_u8): Remove.
28083 (vmlsdavxq_s8): Remove.
28084 (vmlsdavq_s8): Remove.
28085 (vmladavxq_s8): Remove.
28086 (vmladavq_s8): Remove.
28087 (vmladavq_u16): Remove.
28088 (vmlsdavxq_s16): Remove.
28089 (vmlsdavq_s16): Remove.
28090 (vmladavxq_s16): Remove.
28091 (vmladavq_s16): Remove.
28092 (vmladavq_u32): Remove.
28093 (vmlsdavxq_s32): Remove.
28094 (vmlsdavq_s32): Remove.
28095 (vmladavxq_s32): Remove.
28096 (vmladavq_s32): Remove.
28097 (vmladavq_p_u8): Remove.
28098 (vmlsdavxq_p_s8): Remove.
28099 (vmlsdavq_p_s8): Remove.
28100 (vmladavxq_p_s8): Remove.
28101 (vmladavq_p_s8): Remove.
28102 (vmladavq_p_u16): Remove.
28103 (vmlsdavxq_p_s16): Remove.
28104 (vmlsdavq_p_s16): Remove.
28105 (vmladavxq_p_s16): Remove.
28106 (vmladavq_p_s16): Remove.
28107 (vmladavq_p_u32): Remove.
28108 (vmlsdavxq_p_s32): Remove.
28109 (vmlsdavq_p_s32): Remove.
28110 (vmladavxq_p_s32): Remove.
28111 (vmladavq_p_s32): Remove.
28112 (__arm_vmladavq_u8): Remove.
28113 (__arm_vmlsdavxq_s8): Remove.
28114 (__arm_vmlsdavq_s8): Remove.
28115 (__arm_vmladavxq_s8): Remove.
28116 (__arm_vmladavq_s8): Remove.
28117 (__arm_vmladavq_u16): Remove.
28118 (__arm_vmlsdavxq_s16): Remove.
28119 (__arm_vmlsdavq_s16): Remove.
28120 (__arm_vmladavxq_s16): Remove.
28121 (__arm_vmladavq_s16): Remove.
28122 (__arm_vmladavq_u32): Remove.
28123 (__arm_vmlsdavxq_s32): Remove.
28124 (__arm_vmlsdavq_s32): Remove.
28125 (__arm_vmladavxq_s32): Remove.
28126 (__arm_vmladavq_s32): Remove.
28127 (__arm_vmladavq_p_u8): Remove.
28128 (__arm_vmlsdavxq_p_s8): Remove.
28129 (__arm_vmlsdavq_p_s8): Remove.
28130 (__arm_vmladavxq_p_s8): Remove.
28131 (__arm_vmladavq_p_s8): Remove.
28132 (__arm_vmladavq_p_u16): Remove.
28133 (__arm_vmlsdavxq_p_s16): Remove.
28134 (__arm_vmlsdavq_p_s16): Remove.
28135 (__arm_vmladavxq_p_s16): Remove.
28136 (__arm_vmladavq_p_s16): Remove.
28137 (__arm_vmladavq_p_u32): Remove.
28138 (__arm_vmlsdavxq_p_s32): Remove.
28139 (__arm_vmlsdavq_p_s32): Remove.
28140 (__arm_vmladavxq_p_s32): Remove.
28141 (__arm_vmladavq_p_s32): Remove.
28142 (__arm_vmladavq): Remove.
28143 (__arm_vmlsdavxq): Remove.
28144 (__arm_vmlsdavq): Remove.
28145 (__arm_vmladavxq): Remove.
28146 (__arm_vmladavq_p): Remove.
28147 (__arm_vmlsdavxq_p): Remove.
28148 (__arm_vmlsdavq_p): Remove.
28149 (__arm_vmladavxq_p): Remove.
28151 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28153 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
28154 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
28155 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
28156 vmlsdavax, vmlsdav, vmlsdavx.
28157 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
28158 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
28159 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
28161 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
28162 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
28163 (mve_vmlsdavxq_s<mode>): Merge into ...
28164 (@mve_<mve_insn>q_<supf><mode>): ... this.
28165 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
28166 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
28168 (@mve_<mve_insn>q_<supf><mode>): ... this.
28169 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
28170 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
28171 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
28172 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
28173 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
28175 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
28177 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28179 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
28180 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
28182 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28184 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
28185 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
28186 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
28187 * config/arm/arm_mve.h (vaddlvaq): Remove.
28188 (vaddlvaq_p): Remove.
28189 (vaddlvaq_u32): Remove.
28190 (vaddlvaq_s32): Remove.
28191 (vaddlvaq_p_s32): Remove.
28192 (vaddlvaq_p_u32): Remove.
28193 (__arm_vaddlvaq_u32): Remove.
28194 (__arm_vaddlvaq_s32): Remove.
28195 (__arm_vaddlvaq_p_s32): Remove.
28196 (__arm_vaddlvaq_p_u32): Remove.
28197 (__arm_vaddlvaq): Remove.
28198 (__arm_vaddlvaq_p): Remove.
28200 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28202 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
28203 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
28205 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28207 * config/arm/iterators.md (mve_insn): Add vaddlva.
28208 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
28209 (@mve_<mve_insn>q_<supf>v4si): ... this.
28210 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
28211 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
28213 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
28216 * config/i386/i386.cc (ix86_widen_mult_cost):
28217 Handle V4HImode and V2SImode.
28219 2023-05-11 Andrew Pinski <apinski@marvell.com>
28221 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
28222 defined by a phi node with more than one uses, allow for the
28223 only uses are in that same defining statement.
28225 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
28227 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
28230 2023-05-11 Pan Li <pan2.li@intel.com>
28232 * config/riscv/vector.md: Add comments for simplifying to vmset.
28234 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
28236 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
28238 (v<optab><mode>3): Add vector shift pattern.
28239 * config/riscv/vector-iterators.md: New iterator.
28241 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
28243 * config/riscv/autovec.md: Use renamed functions.
28244 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
28245 (emit_vlmax_reg_op): To this.
28246 (emit_nonvlmax_op): Rename.
28247 (emit_len_op): To this.
28248 (emit_nonvlmax_binop): Rename.
28249 (emit_len_binop): To this.
28250 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
28251 (emit_pred_binop): Remove vlmax_p.
28252 (emit_vlmax_op): Rename.
28253 (emit_vlmax_reg_op): To this.
28254 (emit_nonvlmax_op): Rename.
28255 (emit_len_op): To this.
28256 (emit_nonvlmax_binop): Rename.
28257 (emit_len_binop): To this.
28258 (sew64_scalar_helper): Use renamed functions.
28259 (expand_tuple_move): Use renamed functions.
28260 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
28262 * config/riscv/vector.md: Use renamed functions.
28264 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
28265 Michael Collison <collison@rivosinc.com>
28267 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
28268 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
28269 * config/riscv/riscv-v.cc (emit_pred_op): New function.
28270 (set_expander_dest_and_mask): New function.
28271 (emit_pred_binop): New function.
28272 (emit_nonvlmax_binop): New function.
28274 2023-05-11 Pan Li <pan2.li@intel.com>
28276 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
28277 * gimple-loop-interchange.cc
28278 (tree_loop_interchange::map_inductions_to_loop): Ditto.
28279 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
28280 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
28281 * tree-ssa-loop-manip.cc (create_iv): Ditto.
28282 (tree_transform_and_unroll_loop): Ditto.
28283 (canonicalize_loop_ivs): Ditto.
28284 * tree-ssa-loop-manip.h (create_iv): Ditto.
28285 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
28286 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
28288 (vect_set_loop_condition_normal): Ditto.
28289 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
28290 * tree-vect-stmts.cc (vectorizable_store): Ditto.
28291 (vectorizable_load): Ditto.
28293 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28295 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
28296 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
28297 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
28298 * config/arm/arm_mve.h (vmovlbq): Remove.
28300 (vmovlbq_m): Remove.
28301 (vmovltq_m): Remove.
28302 (vmovlbq_x): Remove.
28303 (vmovltq_x): Remove.
28304 (vmovlbq_s8): Remove.
28305 (vmovlbq_s16): Remove.
28306 (vmovltq_s8): Remove.
28307 (vmovltq_s16): Remove.
28308 (vmovltq_u8): Remove.
28309 (vmovltq_u16): Remove.
28310 (vmovlbq_u8): Remove.
28311 (vmovlbq_u16): Remove.
28312 (vmovlbq_m_s8): Remove.
28313 (vmovltq_m_s8): Remove.
28314 (vmovlbq_m_u8): Remove.
28315 (vmovltq_m_u8): Remove.
28316 (vmovlbq_m_s16): Remove.
28317 (vmovltq_m_s16): Remove.
28318 (vmovlbq_m_u16): Remove.
28319 (vmovltq_m_u16): Remove.
28320 (vmovlbq_x_s8): Remove.
28321 (vmovlbq_x_s16): Remove.
28322 (vmovlbq_x_u8): Remove.
28323 (vmovlbq_x_u16): Remove.
28324 (vmovltq_x_s8): Remove.
28325 (vmovltq_x_s16): Remove.
28326 (vmovltq_x_u8): Remove.
28327 (vmovltq_x_u16): Remove.
28328 (__arm_vmovlbq_s8): Remove.
28329 (__arm_vmovlbq_s16): Remove.
28330 (__arm_vmovltq_s8): Remove.
28331 (__arm_vmovltq_s16): Remove.
28332 (__arm_vmovltq_u8): Remove.
28333 (__arm_vmovltq_u16): Remove.
28334 (__arm_vmovlbq_u8): Remove.
28335 (__arm_vmovlbq_u16): Remove.
28336 (__arm_vmovlbq_m_s8): Remove.
28337 (__arm_vmovltq_m_s8): Remove.
28338 (__arm_vmovlbq_m_u8): Remove.
28339 (__arm_vmovltq_m_u8): Remove.
28340 (__arm_vmovlbq_m_s16): Remove.
28341 (__arm_vmovltq_m_s16): Remove.
28342 (__arm_vmovlbq_m_u16): Remove.
28343 (__arm_vmovltq_m_u16): Remove.
28344 (__arm_vmovlbq_x_s8): Remove.
28345 (__arm_vmovlbq_x_s16): Remove.
28346 (__arm_vmovlbq_x_u8): Remove.
28347 (__arm_vmovlbq_x_u16): Remove.
28348 (__arm_vmovltq_x_s8): Remove.
28349 (__arm_vmovltq_x_s16): Remove.
28350 (__arm_vmovltq_x_u8): Remove.
28351 (__arm_vmovltq_x_u16): Remove.
28352 (__arm_vmovlbq): Remove.
28353 (__arm_vmovltq): Remove.
28354 (__arm_vmovlbq_m): Remove.
28355 (__arm_vmovltq_m): Remove.
28356 (__arm_vmovlbq_x): Remove.
28357 (__arm_vmovltq_x): Remove.
28359 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28361 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
28362 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
28364 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28366 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
28367 (VMOVLBQ, VMOVLTQ): Merge into ...
28368 (VMOVLxQ): ... this.
28369 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
28370 (VMOVLxQ_M): ... this.
28371 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
28372 (mve_vmovlbq_<supf><mode>): Merge into ...
28373 (@mve_<mve_insn>q_<supf><mode>): ... this.
28374 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
28376 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
28378 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28380 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
28381 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
28382 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
28383 * config/arm/arm-mve-builtins-functions.h
28384 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
28385 * config/arm/arm_mve.h (vaddlvq): Remove.
28386 (vaddlvq_p): Remove.
28387 (vaddlvq_s32): Remove.
28388 (vaddlvq_u32): Remove.
28389 (vaddlvq_p_s32): Remove.
28390 (vaddlvq_p_u32): Remove.
28391 (__arm_vaddlvq_s32): Remove.
28392 (__arm_vaddlvq_u32): Remove.
28393 (__arm_vaddlvq_p_s32): Remove.
28394 (__arm_vaddlvq_p_u32): Remove.
28395 (__arm_vaddlvq): Remove.
28396 (__arm_vaddlvq_p): Remove.
28398 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28400 * config/arm/iterators.md (mve_insn): Add vaddlv.
28401 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
28402 (@mve_<mve_insn>q_<supf>v4si): ... this.
28403 (mve_vaddlvq_p_<supf>v4si): Rename into ...
28404 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
28406 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28408 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
28409 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
28411 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28413 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
28414 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
28415 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
28416 * config/arm/arm_mve.h (vaddvaq): Remove.
28417 (vaddvaq_p): Remove.
28418 (vaddvaq_u8): Remove.
28419 (vaddvaq_s8): Remove.
28420 (vaddvaq_u16): Remove.
28421 (vaddvaq_s16): Remove.
28422 (vaddvaq_u32): Remove.
28423 (vaddvaq_s32): Remove.
28424 (vaddvaq_p_u8): Remove.
28425 (vaddvaq_p_s8): Remove.
28426 (vaddvaq_p_u16): Remove.
28427 (vaddvaq_p_s16): Remove.
28428 (vaddvaq_p_u32): Remove.
28429 (vaddvaq_p_s32): Remove.
28430 (__arm_vaddvaq_u8): Remove.
28431 (__arm_vaddvaq_s8): Remove.
28432 (__arm_vaddvaq_u16): Remove.
28433 (__arm_vaddvaq_s16): Remove.
28434 (__arm_vaddvaq_u32): Remove.
28435 (__arm_vaddvaq_s32): Remove.
28436 (__arm_vaddvaq_p_u8): Remove.
28437 (__arm_vaddvaq_p_s8): Remove.
28438 (__arm_vaddvaq_p_u16): Remove.
28439 (__arm_vaddvaq_p_s16): Remove.
28440 (__arm_vaddvaq_p_u32): Remove.
28441 (__arm_vaddvaq_p_s32): Remove.
28442 (__arm_vaddvaq): Remove.
28443 (__arm_vaddvaq_p): Remove.
28445 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28447 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
28448 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
28450 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28452 * config/arm/iterators.md (mve_insn): Add vaddva.
28453 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
28454 (@mve_<mve_insn>q_<supf><mode>): ... this.
28455 (mve_vaddvaq_p_<supf><mode>): Rename into ...
28456 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
28458 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28460 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
28461 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
28462 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
28463 * config/arm/arm_mve.h (vaddvq): Remove.
28464 (vaddvq_p): Remove.
28465 (vaddvq_s8): Remove.
28466 (vaddvq_s16): Remove.
28467 (vaddvq_s32): Remove.
28468 (vaddvq_u8): Remove.
28469 (vaddvq_u16): Remove.
28470 (vaddvq_u32): Remove.
28471 (vaddvq_p_u8): Remove.
28472 (vaddvq_p_s8): Remove.
28473 (vaddvq_p_u16): Remove.
28474 (vaddvq_p_s16): Remove.
28475 (vaddvq_p_u32): Remove.
28476 (vaddvq_p_s32): Remove.
28477 (__arm_vaddvq_s8): Remove.
28478 (__arm_vaddvq_s16): Remove.
28479 (__arm_vaddvq_s32): Remove.
28480 (__arm_vaddvq_u8): Remove.
28481 (__arm_vaddvq_u16): Remove.
28482 (__arm_vaddvq_u32): Remove.
28483 (__arm_vaddvq_p_u8): Remove.
28484 (__arm_vaddvq_p_s8): Remove.
28485 (__arm_vaddvq_p_u16): Remove.
28486 (__arm_vaddvq_p_s16): Remove.
28487 (__arm_vaddvq_p_u32): Remove.
28488 (__arm_vaddvq_p_s32): Remove.
28489 (__arm_vaddvq): Remove.
28490 (__arm_vaddvq_p): Remove.
28492 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28494 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
28495 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
28497 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28499 * config/arm/iterators.md (mve_insn): Add vaddv.
28500 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
28501 (@mve_<mve_insn>q_<supf><mode>): ... this.
28502 (mve_vaddvq_p_<supf><mode>): Rename into ...
28503 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
28504 * config/arm/vec-common.md: Use gen_mve_q instead of
28507 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28509 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
28511 * config/arm/arm-mve-builtins-base.def (vdupq): New.
28512 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
28513 * config/arm/arm_mve.h (vdupq_n): Remove.
28515 (vdupq_n_f16): Remove.
28516 (vdupq_n_f32): Remove.
28517 (vdupq_n_s8): Remove.
28518 (vdupq_n_s16): Remove.
28519 (vdupq_n_s32): Remove.
28520 (vdupq_n_u8): Remove.
28521 (vdupq_n_u16): Remove.
28522 (vdupq_n_u32): Remove.
28523 (vdupq_m_n_u8): Remove.
28524 (vdupq_m_n_s8): Remove.
28525 (vdupq_m_n_u16): Remove.
28526 (vdupq_m_n_s16): Remove.
28527 (vdupq_m_n_u32): Remove.
28528 (vdupq_m_n_s32): Remove.
28529 (vdupq_m_n_f16): Remove.
28530 (vdupq_m_n_f32): Remove.
28531 (vdupq_x_n_s8): Remove.
28532 (vdupq_x_n_s16): Remove.
28533 (vdupq_x_n_s32): Remove.
28534 (vdupq_x_n_u8): Remove.
28535 (vdupq_x_n_u16): Remove.
28536 (vdupq_x_n_u32): Remove.
28537 (vdupq_x_n_f16): Remove.
28538 (vdupq_x_n_f32): Remove.
28539 (__arm_vdupq_n_s8): Remove.
28540 (__arm_vdupq_n_s16): Remove.
28541 (__arm_vdupq_n_s32): Remove.
28542 (__arm_vdupq_n_u8): Remove.
28543 (__arm_vdupq_n_u16): Remove.
28544 (__arm_vdupq_n_u32): Remove.
28545 (__arm_vdupq_m_n_u8): Remove.
28546 (__arm_vdupq_m_n_s8): Remove.
28547 (__arm_vdupq_m_n_u16): Remove.
28548 (__arm_vdupq_m_n_s16): Remove.
28549 (__arm_vdupq_m_n_u32): Remove.
28550 (__arm_vdupq_m_n_s32): Remove.
28551 (__arm_vdupq_x_n_s8): Remove.
28552 (__arm_vdupq_x_n_s16): Remove.
28553 (__arm_vdupq_x_n_s32): Remove.
28554 (__arm_vdupq_x_n_u8): Remove.
28555 (__arm_vdupq_x_n_u16): Remove.
28556 (__arm_vdupq_x_n_u32): Remove.
28557 (__arm_vdupq_n_f16): Remove.
28558 (__arm_vdupq_n_f32): Remove.
28559 (__arm_vdupq_m_n_f16): Remove.
28560 (__arm_vdupq_m_n_f32): Remove.
28561 (__arm_vdupq_x_n_f16): Remove.
28562 (__arm_vdupq_x_n_f32): Remove.
28563 (__arm_vdupq_n): Remove.
28564 (__arm_vdupq_m): Remove.
28566 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28568 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
28569 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
28571 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28573 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
28574 (MVE_FP_N_VDUPQ_ONLY): New.
28575 (mve_insn): Add vdupq.
28576 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
28577 (@mve_<mve_insn>q_n_f<mode>): ... this.
28578 (mve_vdupq_n_<supf><mode>): Rename into ...
28579 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28580 (mve_vdupq_m_n_<supf><mode>): Rename into ...
28581 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28582 (mve_vdupq_m_n_f<mode>): Rename into ...
28583 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
28585 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28587 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
28589 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
28591 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
28593 * config/arm/arm_mve.h (vrev16q): Remove.
28596 (vrev64q_m): Remove.
28597 (vrev16q_m): Remove.
28598 (vrev32q_m): Remove.
28599 (vrev16q_x): Remove.
28600 (vrev32q_x): Remove.
28601 (vrev64q_x): Remove.
28602 (vrev64q_f16): Remove.
28603 (vrev64q_f32): Remove.
28604 (vrev32q_f16): Remove.
28605 (vrev16q_s8): Remove.
28606 (vrev32q_s8): Remove.
28607 (vrev32q_s16): Remove.
28608 (vrev64q_s8): Remove.
28609 (vrev64q_s16): Remove.
28610 (vrev64q_s32): Remove.
28611 (vrev64q_u8): Remove.
28612 (vrev64q_u16): Remove.
28613 (vrev64q_u32): Remove.
28614 (vrev32q_u8): Remove.
28615 (vrev32q_u16): Remove.
28616 (vrev16q_u8): Remove.
28617 (vrev64q_m_u8): Remove.
28618 (vrev64q_m_s8): Remove.
28619 (vrev64q_m_u16): Remove.
28620 (vrev64q_m_s16): Remove.
28621 (vrev64q_m_u32): Remove.
28622 (vrev64q_m_s32): Remove.
28623 (vrev16q_m_s8): Remove.
28624 (vrev32q_m_f16): Remove.
28625 (vrev16q_m_u8): Remove.
28626 (vrev32q_m_s8): Remove.
28627 (vrev64q_m_f16): Remove.
28628 (vrev32q_m_u8): Remove.
28629 (vrev32q_m_s16): Remove.
28630 (vrev64q_m_f32): Remove.
28631 (vrev32q_m_u16): Remove.
28632 (vrev16q_x_s8): Remove.
28633 (vrev16q_x_u8): Remove.
28634 (vrev32q_x_s8): Remove.
28635 (vrev32q_x_s16): Remove.
28636 (vrev32q_x_u8): Remove.
28637 (vrev32q_x_u16): Remove.
28638 (vrev64q_x_s8): Remove.
28639 (vrev64q_x_s16): Remove.
28640 (vrev64q_x_s32): Remove.
28641 (vrev64q_x_u8): Remove.
28642 (vrev64q_x_u16): Remove.
28643 (vrev64q_x_u32): Remove.
28644 (vrev32q_x_f16): Remove.
28645 (vrev64q_x_f16): Remove.
28646 (vrev64q_x_f32): Remove.
28647 (__arm_vrev16q_s8): Remove.
28648 (__arm_vrev32q_s8): Remove.
28649 (__arm_vrev32q_s16): Remove.
28650 (__arm_vrev64q_s8): Remove.
28651 (__arm_vrev64q_s16): Remove.
28652 (__arm_vrev64q_s32): Remove.
28653 (__arm_vrev64q_u8): Remove.
28654 (__arm_vrev64q_u16): Remove.
28655 (__arm_vrev64q_u32): Remove.
28656 (__arm_vrev32q_u8): Remove.
28657 (__arm_vrev32q_u16): Remove.
28658 (__arm_vrev16q_u8): Remove.
28659 (__arm_vrev64q_m_u8): Remove.
28660 (__arm_vrev64q_m_s8): Remove.
28661 (__arm_vrev64q_m_u16): Remove.
28662 (__arm_vrev64q_m_s16): Remove.
28663 (__arm_vrev64q_m_u32): Remove.
28664 (__arm_vrev64q_m_s32): Remove.
28665 (__arm_vrev16q_m_s8): Remove.
28666 (__arm_vrev16q_m_u8): Remove.
28667 (__arm_vrev32q_m_s8): Remove.
28668 (__arm_vrev32q_m_u8): Remove.
28669 (__arm_vrev32q_m_s16): Remove.
28670 (__arm_vrev32q_m_u16): Remove.
28671 (__arm_vrev16q_x_s8): Remove.
28672 (__arm_vrev16q_x_u8): Remove.
28673 (__arm_vrev32q_x_s8): Remove.
28674 (__arm_vrev32q_x_s16): Remove.
28675 (__arm_vrev32q_x_u8): Remove.
28676 (__arm_vrev32q_x_u16): Remove.
28677 (__arm_vrev64q_x_s8): Remove.
28678 (__arm_vrev64q_x_s16): Remove.
28679 (__arm_vrev64q_x_s32): Remove.
28680 (__arm_vrev64q_x_u8): Remove.
28681 (__arm_vrev64q_x_u16): Remove.
28682 (__arm_vrev64q_x_u32): Remove.
28683 (__arm_vrev64q_f16): Remove.
28684 (__arm_vrev64q_f32): Remove.
28685 (__arm_vrev32q_f16): Remove.
28686 (__arm_vrev32q_m_f16): Remove.
28687 (__arm_vrev64q_m_f16): Remove.
28688 (__arm_vrev64q_m_f32): Remove.
28689 (__arm_vrev32q_x_f16): Remove.
28690 (__arm_vrev64q_x_f16): Remove.
28691 (__arm_vrev64q_x_f32): Remove.
28692 (__arm_vrev16q): Remove.
28693 (__arm_vrev32q): Remove.
28694 (__arm_vrev64q): Remove.
28695 (__arm_vrev64q_m): Remove.
28696 (__arm_vrev16q_m): Remove.
28697 (__arm_vrev32q_m): Remove.
28698 (__arm_vrev16q_x): Remove.
28699 (__arm_vrev32q_x): Remove.
28700 (__arm_vrev64q_x): Remove.
28702 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28704 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
28705 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
28706 (MVE_FP_M_VREV32Q_ONLY): New iterators.
28707 (mve_insn): Add vrev16q, vrev32q, vrev64q.
28708 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
28709 (@mve_<mve_insn>q_f<mode>): ... this
28710 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
28711 (mve_vrev64q_<supf><mode>): Rename into ...
28712 (@mve_<mve_insn>q_<supf><mode>): ... this.
28713 (mve_vrev32q_<supf><mode>): Rename into
28714 @mve_<mve_insn>q_<supf><mode>.
28715 (mve_vrev16q_<supf>v16qi): Rename into
28716 @mve_<mve_insn>q_<supf><mode>.
28717 (mve_vrev64q_m_<supf><mode>): Rename into
28718 @mve_<mve_insn>q_m_<supf><mode>.
28719 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
28720 (mve_vrev32q_m_<supf><mode>): Rename into
28721 @mve_<mve_insn>q_m_<supf><mode>.
28722 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
28723 (mve_vrev16q_m_<supf>v16qi): Rename into
28724 @mve_<mve_insn>q_m_<supf><mode>.
28726 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
28728 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
28729 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
28730 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
28731 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
28732 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
28733 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
28734 * config/arm/arm-mve-builtins-functions.h (class
28735 unspec_based_mve_function_exact_insn_vcmp): New.
28736 * config/arm/arm-mve-builtins.cc
28737 (function_instance::has_inactive_argument): Handle vcmp.
28738 * config/arm/arm_mve.h (vcmpneq): Remove.
28746 (vcmpneq_m): Remove.
28747 (vcmphiq_m): Remove.
28748 (vcmpeqq_m): Remove.
28749 (vcmpcsq_m): Remove.
28750 (vcmpcsq_m_n): Remove.
28751 (vcmpltq_m): Remove.
28752 (vcmpleq_m): Remove.
28753 (vcmpgtq_m): Remove.
28754 (vcmpgeq_m): Remove.
28755 (vcmpneq_s8): Remove.
28756 (vcmpneq_s16): Remove.
28757 (vcmpneq_s32): Remove.
28758 (vcmpneq_u8): Remove.
28759 (vcmpneq_u16): Remove.
28760 (vcmpneq_u32): Remove.
28761 (vcmpneq_n_u8): Remove.
28762 (vcmphiq_u8): Remove.
28763 (vcmphiq_n_u8): Remove.
28764 (vcmpeqq_u8): Remove.
28765 (vcmpeqq_n_u8): Remove.
28766 (vcmpcsq_u8): Remove.
28767 (vcmpcsq_n_u8): Remove.
28768 (vcmpneq_n_s8): Remove.
28769 (vcmpltq_s8): Remove.
28770 (vcmpltq_n_s8): Remove.
28771 (vcmpleq_s8): Remove.
28772 (vcmpleq_n_s8): Remove.
28773 (vcmpgtq_s8): Remove.
28774 (vcmpgtq_n_s8): Remove.
28775 (vcmpgeq_s8): Remove.
28776 (vcmpgeq_n_s8): Remove.
28777 (vcmpeqq_s8): Remove.
28778 (vcmpeqq_n_s8): Remove.
28779 (vcmpneq_n_u16): Remove.
28780 (vcmphiq_u16): Remove.
28781 (vcmphiq_n_u16): Remove.
28782 (vcmpeqq_u16): Remove.
28783 (vcmpeqq_n_u16): Remove.
28784 (vcmpcsq_u16): Remove.
28785 (vcmpcsq_n_u16): Remove.
28786 (vcmpneq_n_s16): Remove.
28787 (vcmpltq_s16): Remove.
28788 (vcmpltq_n_s16): Remove.
28789 (vcmpleq_s16): Remove.
28790 (vcmpleq_n_s16): Remove.
28791 (vcmpgtq_s16): Remove.
28792 (vcmpgtq_n_s16): Remove.
28793 (vcmpgeq_s16): Remove.
28794 (vcmpgeq_n_s16): Remove.
28795 (vcmpeqq_s16): Remove.
28796 (vcmpeqq_n_s16): Remove.
28797 (vcmpneq_n_u32): Remove.
28798 (vcmphiq_u32): Remove.
28799 (vcmphiq_n_u32): Remove.
28800 (vcmpeqq_u32): Remove.
28801 (vcmpeqq_n_u32): Remove.
28802 (vcmpcsq_u32): Remove.
28803 (vcmpcsq_n_u32): Remove.
28804 (vcmpneq_n_s32): Remove.
28805 (vcmpltq_s32): Remove.
28806 (vcmpltq_n_s32): Remove.
28807 (vcmpleq_s32): Remove.
28808 (vcmpleq_n_s32): Remove.
28809 (vcmpgtq_s32): Remove.
28810 (vcmpgtq_n_s32): Remove.
28811 (vcmpgeq_s32): Remove.
28812 (vcmpgeq_n_s32): Remove.
28813 (vcmpeqq_s32): Remove.
28814 (vcmpeqq_n_s32): Remove.
28815 (vcmpneq_n_f16): Remove.
28816 (vcmpneq_f16): Remove.
28817 (vcmpltq_n_f16): Remove.
28818 (vcmpltq_f16): Remove.
28819 (vcmpleq_n_f16): Remove.
28820 (vcmpleq_f16): Remove.
28821 (vcmpgtq_n_f16): Remove.
28822 (vcmpgtq_f16): Remove.
28823 (vcmpgeq_n_f16): Remove.
28824 (vcmpgeq_f16): Remove.
28825 (vcmpeqq_n_f16): Remove.
28826 (vcmpeqq_f16): Remove.
28827 (vcmpneq_n_f32): Remove.
28828 (vcmpneq_f32): Remove.
28829 (vcmpltq_n_f32): Remove.
28830 (vcmpltq_f32): Remove.
28831 (vcmpleq_n_f32): Remove.
28832 (vcmpleq_f32): Remove.
28833 (vcmpgtq_n_f32): Remove.
28834 (vcmpgtq_f32): Remove.
28835 (vcmpgeq_n_f32): Remove.
28836 (vcmpgeq_f32): Remove.
28837 (vcmpeqq_n_f32): Remove.
28838 (vcmpeqq_f32): Remove.
28839 (vcmpeqq_m_f16): Remove.
28840 (vcmpeqq_m_f32): Remove.
28841 (vcmpneq_m_u8): Remove.
28842 (vcmpneq_m_n_u8): Remove.
28843 (vcmphiq_m_u8): Remove.
28844 (vcmphiq_m_n_u8): Remove.
28845 (vcmpeqq_m_u8): Remove.
28846 (vcmpeqq_m_n_u8): Remove.
28847 (vcmpcsq_m_u8): Remove.
28848 (vcmpcsq_m_n_u8): Remove.
28849 (vcmpneq_m_s8): Remove.
28850 (vcmpneq_m_n_s8): Remove.
28851 (vcmpltq_m_s8): Remove.
28852 (vcmpltq_m_n_s8): Remove.
28853 (vcmpleq_m_s8): Remove.
28854 (vcmpleq_m_n_s8): Remove.
28855 (vcmpgtq_m_s8): Remove.
28856 (vcmpgtq_m_n_s8): Remove.
28857 (vcmpgeq_m_s8): Remove.
28858 (vcmpgeq_m_n_s8): Remove.
28859 (vcmpeqq_m_s8): Remove.
28860 (vcmpeqq_m_n_s8): Remove.
28861 (vcmpneq_m_u16): Remove.
28862 (vcmpneq_m_n_u16): Remove.
28863 (vcmphiq_m_u16): Remove.
28864 (vcmphiq_m_n_u16): Remove.
28865 (vcmpeqq_m_u16): Remove.
28866 (vcmpeqq_m_n_u16): Remove.
28867 (vcmpcsq_m_u16): Remove.
28868 (vcmpcsq_m_n_u16): Remove.
28869 (vcmpneq_m_s16): Remove.
28870 (vcmpneq_m_n_s16): Remove.
28871 (vcmpltq_m_s16): Remove.
28872 (vcmpltq_m_n_s16): Remove.
28873 (vcmpleq_m_s16): Remove.
28874 (vcmpleq_m_n_s16): Remove.
28875 (vcmpgtq_m_s16): Remove.
28876 (vcmpgtq_m_n_s16): Remove.
28877 (vcmpgeq_m_s16): Remove.
28878 (vcmpgeq_m_n_s16): Remove.
28879 (vcmpeqq_m_s16): Remove.
28880 (vcmpeqq_m_n_s16): Remove.
28881 (vcmpneq_m_u32): Remove.
28882 (vcmpneq_m_n_u32): Remove.
28883 (vcmphiq_m_u32): Remove.
28884 (vcmphiq_m_n_u32): Remove.
28885 (vcmpeqq_m_u32): Remove.
28886 (vcmpeqq_m_n_u32): Remove.
28887 (vcmpcsq_m_u32): Remove.
28888 (vcmpcsq_m_n_u32): Remove.
28889 (vcmpneq_m_s32): Remove.
28890 (vcmpneq_m_n_s32): Remove.
28891 (vcmpltq_m_s32): Remove.
28892 (vcmpltq_m_n_s32): Remove.
28893 (vcmpleq_m_s32): Remove.
28894 (vcmpleq_m_n_s32): Remove.
28895 (vcmpgtq_m_s32): Remove.
28896 (vcmpgtq_m_n_s32): Remove.
28897 (vcmpgeq_m_s32): Remove.
28898 (vcmpgeq_m_n_s32): Remove.
28899 (vcmpeqq_m_s32): Remove.
28900 (vcmpeqq_m_n_s32): Remove.
28901 (vcmpeqq_m_n_f16): Remove.
28902 (vcmpgeq_m_f16): Remove.
28903 (vcmpgeq_m_n_f16): Remove.
28904 (vcmpgtq_m_f16): Remove.
28905 (vcmpgtq_m_n_f16): Remove.
28906 (vcmpleq_m_f16): Remove.
28907 (vcmpleq_m_n_f16): Remove.
28908 (vcmpltq_m_f16): Remove.
28909 (vcmpltq_m_n_f16): Remove.
28910 (vcmpneq_m_f16): Remove.
28911 (vcmpneq_m_n_f16): Remove.
28912 (vcmpeqq_m_n_f32): Remove.
28913 (vcmpgeq_m_f32): Remove.
28914 (vcmpgeq_m_n_f32): Remove.
28915 (vcmpgtq_m_f32): Remove.
28916 (vcmpgtq_m_n_f32): Remove.
28917 (vcmpleq_m_f32): Remove.
28918 (vcmpleq_m_n_f32): Remove.
28919 (vcmpltq_m_f32): Remove.
28920 (vcmpltq_m_n_f32): Remove.
28921 (vcmpneq_m_f32): Remove.
28922 (vcmpneq_m_n_f32): Remove.
28923 (__arm_vcmpneq_s8): Remove.
28924 (__arm_vcmpneq_s16): Remove.
28925 (__arm_vcmpneq_s32): Remove.
28926 (__arm_vcmpneq_u8): Remove.
28927 (__arm_vcmpneq_u16): Remove.
28928 (__arm_vcmpneq_u32): Remove.
28929 (__arm_vcmpneq_n_u8): Remove.
28930 (__arm_vcmphiq_u8): Remove.
28931 (__arm_vcmphiq_n_u8): Remove.
28932 (__arm_vcmpeqq_u8): Remove.
28933 (__arm_vcmpeqq_n_u8): Remove.
28934 (__arm_vcmpcsq_u8): Remove.
28935 (__arm_vcmpcsq_n_u8): Remove.
28936 (__arm_vcmpneq_n_s8): Remove.
28937 (__arm_vcmpltq_s8): Remove.
28938 (__arm_vcmpltq_n_s8): Remove.
28939 (__arm_vcmpleq_s8): Remove.
28940 (__arm_vcmpleq_n_s8): Remove.
28941 (__arm_vcmpgtq_s8): Remove.
28942 (__arm_vcmpgtq_n_s8): Remove.
28943 (__arm_vcmpgeq_s8): Remove.
28944 (__arm_vcmpgeq_n_s8): Remove.
28945 (__arm_vcmpeqq_s8): Remove.
28946 (__arm_vcmpeqq_n_s8): Remove.
28947 (__arm_vcmpneq_n_u16): Remove.
28948 (__arm_vcmphiq_u16): Remove.
28949 (__arm_vcmphiq_n_u16): Remove.
28950 (__arm_vcmpeqq_u16): Remove.
28951 (__arm_vcmpeqq_n_u16): Remove.
28952 (__arm_vcmpcsq_u16): Remove.
28953 (__arm_vcmpcsq_n_u16): Remove.
28954 (__arm_vcmpneq_n_s16): Remove.
28955 (__arm_vcmpltq_s16): Remove.
28956 (__arm_vcmpltq_n_s16): Remove.
28957 (__arm_vcmpleq_s16): Remove.
28958 (__arm_vcmpleq_n_s16): Remove.
28959 (__arm_vcmpgtq_s16): Remove.
28960 (__arm_vcmpgtq_n_s16): Remove.
28961 (__arm_vcmpgeq_s16): Remove.
28962 (__arm_vcmpgeq_n_s16): Remove.
28963 (__arm_vcmpeqq_s16): Remove.
28964 (__arm_vcmpeqq_n_s16): Remove.
28965 (__arm_vcmpneq_n_u32): Remove.
28966 (__arm_vcmphiq_u32): Remove.
28967 (__arm_vcmphiq_n_u32): Remove.
28968 (__arm_vcmpeqq_u32): Remove.
28969 (__arm_vcmpeqq_n_u32): Remove.
28970 (__arm_vcmpcsq_u32): Remove.
28971 (__arm_vcmpcsq_n_u32): Remove.
28972 (__arm_vcmpneq_n_s32): Remove.
28973 (__arm_vcmpltq_s32): Remove.
28974 (__arm_vcmpltq_n_s32): Remove.
28975 (__arm_vcmpleq_s32): Remove.
28976 (__arm_vcmpleq_n_s32): Remove.
28977 (__arm_vcmpgtq_s32): Remove.
28978 (__arm_vcmpgtq_n_s32): Remove.
28979 (__arm_vcmpgeq_s32): Remove.
28980 (__arm_vcmpgeq_n_s32): Remove.
28981 (__arm_vcmpeqq_s32): Remove.
28982 (__arm_vcmpeqq_n_s32): Remove.
28983 (__arm_vcmpneq_m_u8): Remove.
28984 (__arm_vcmpneq_m_n_u8): Remove.
28985 (__arm_vcmphiq_m_u8): Remove.
28986 (__arm_vcmphiq_m_n_u8): Remove.
28987 (__arm_vcmpeqq_m_u8): Remove.
28988 (__arm_vcmpeqq_m_n_u8): Remove.
28989 (__arm_vcmpcsq_m_u8): Remove.
28990 (__arm_vcmpcsq_m_n_u8): Remove.
28991 (__arm_vcmpneq_m_s8): Remove.
28992 (__arm_vcmpneq_m_n_s8): Remove.
28993 (__arm_vcmpltq_m_s8): Remove.
28994 (__arm_vcmpltq_m_n_s8): Remove.
28995 (__arm_vcmpleq_m_s8): Remove.
28996 (__arm_vcmpleq_m_n_s8): Remove.
28997 (__arm_vcmpgtq_m_s8): Remove.
28998 (__arm_vcmpgtq_m_n_s8): Remove.
28999 (__arm_vcmpgeq_m_s8): Remove.
29000 (__arm_vcmpgeq_m_n_s8): Remove.
29001 (__arm_vcmpeqq_m_s8): Remove.
29002 (__arm_vcmpeqq_m_n_s8): Remove.
29003 (__arm_vcmpneq_m_u16): Remove.
29004 (__arm_vcmpneq_m_n_u16): Remove.
29005 (__arm_vcmphiq_m_u16): Remove.
29006 (__arm_vcmphiq_m_n_u16): Remove.
29007 (__arm_vcmpeqq_m_u16): Remove.
29008 (__arm_vcmpeqq_m_n_u16): Remove.
29009 (__arm_vcmpcsq_m_u16): Remove.
29010 (__arm_vcmpcsq_m_n_u16): Remove.
29011 (__arm_vcmpneq_m_s16): Remove.
29012 (__arm_vcmpneq_m_n_s16): Remove.
29013 (__arm_vcmpltq_m_s16): Remove.
29014 (__arm_vcmpltq_m_n_s16): Remove.
29015 (__arm_vcmpleq_m_s16): Remove.
29016 (__arm_vcmpleq_m_n_s16): Remove.
29017 (__arm_vcmpgtq_m_s16): Remove.
29018 (__arm_vcmpgtq_m_n_s16): Remove.
29019 (__arm_vcmpgeq_m_s16): Remove.
29020 (__arm_vcmpgeq_m_n_s16): Remove.
29021 (__arm_vcmpeqq_m_s16): Remove.
29022 (__arm_vcmpeqq_m_n_s16): Remove.
29023 (__arm_vcmpneq_m_u32): Remove.
29024 (__arm_vcmpneq_m_n_u32): Remove.
29025 (__arm_vcmphiq_m_u32): Remove.
29026 (__arm_vcmphiq_m_n_u32): Remove.
29027 (__arm_vcmpeqq_m_u32): Remove.
29028 (__arm_vcmpeqq_m_n_u32): Remove.
29029 (__arm_vcmpcsq_m_u32): Remove.
29030 (__arm_vcmpcsq_m_n_u32): Remove.
29031 (__arm_vcmpneq_m_s32): Remove.
29032 (__arm_vcmpneq_m_n_s32): Remove.
29033 (__arm_vcmpltq_m_s32): Remove.
29034 (__arm_vcmpltq_m_n_s32): Remove.
29035 (__arm_vcmpleq_m_s32): Remove.
29036 (__arm_vcmpleq_m_n_s32): Remove.
29037 (__arm_vcmpgtq_m_s32): Remove.
29038 (__arm_vcmpgtq_m_n_s32): Remove.
29039 (__arm_vcmpgeq_m_s32): Remove.
29040 (__arm_vcmpgeq_m_n_s32): Remove.
29041 (__arm_vcmpeqq_m_s32): Remove.
29042 (__arm_vcmpeqq_m_n_s32): Remove.
29043 (__arm_vcmpneq_n_f16): Remove.
29044 (__arm_vcmpneq_f16): Remove.
29045 (__arm_vcmpltq_n_f16): Remove.
29046 (__arm_vcmpltq_f16): Remove.
29047 (__arm_vcmpleq_n_f16): Remove.
29048 (__arm_vcmpleq_f16): Remove.
29049 (__arm_vcmpgtq_n_f16): Remove.
29050 (__arm_vcmpgtq_f16): Remove.
29051 (__arm_vcmpgeq_n_f16): Remove.
29052 (__arm_vcmpgeq_f16): Remove.
29053 (__arm_vcmpeqq_n_f16): Remove.
29054 (__arm_vcmpeqq_f16): Remove.
29055 (__arm_vcmpneq_n_f32): Remove.
29056 (__arm_vcmpneq_f32): Remove.
29057 (__arm_vcmpltq_n_f32): Remove.
29058 (__arm_vcmpltq_f32): Remove.
29059 (__arm_vcmpleq_n_f32): Remove.
29060 (__arm_vcmpleq_f32): Remove.
29061 (__arm_vcmpgtq_n_f32): Remove.
29062 (__arm_vcmpgtq_f32): Remove.
29063 (__arm_vcmpgeq_n_f32): Remove.
29064 (__arm_vcmpgeq_f32): Remove.
29065 (__arm_vcmpeqq_n_f32): Remove.
29066 (__arm_vcmpeqq_f32): Remove.
29067 (__arm_vcmpeqq_m_f16): Remove.
29068 (__arm_vcmpeqq_m_f32): Remove.
29069 (__arm_vcmpeqq_m_n_f16): Remove.
29070 (__arm_vcmpgeq_m_f16): Remove.
29071 (__arm_vcmpgeq_m_n_f16): Remove.
29072 (__arm_vcmpgtq_m_f16): Remove.
29073 (__arm_vcmpgtq_m_n_f16): Remove.
29074 (__arm_vcmpleq_m_f16): Remove.
29075 (__arm_vcmpleq_m_n_f16): Remove.
29076 (__arm_vcmpltq_m_f16): Remove.
29077 (__arm_vcmpltq_m_n_f16): Remove.
29078 (__arm_vcmpneq_m_f16): Remove.
29079 (__arm_vcmpneq_m_n_f16): Remove.
29080 (__arm_vcmpeqq_m_n_f32): Remove.
29081 (__arm_vcmpgeq_m_f32): Remove.
29082 (__arm_vcmpgeq_m_n_f32): Remove.
29083 (__arm_vcmpgtq_m_f32): Remove.
29084 (__arm_vcmpgtq_m_n_f32): Remove.
29085 (__arm_vcmpleq_m_f32): Remove.
29086 (__arm_vcmpleq_m_n_f32): Remove.
29087 (__arm_vcmpltq_m_f32): Remove.
29088 (__arm_vcmpltq_m_n_f32): Remove.
29089 (__arm_vcmpneq_m_f32): Remove.
29090 (__arm_vcmpneq_m_n_f32): Remove.
29091 (__arm_vcmpneq): Remove.
29092 (__arm_vcmphiq): Remove.
29093 (__arm_vcmpeqq): Remove.
29094 (__arm_vcmpcsq): Remove.
29095 (__arm_vcmpltq): Remove.
29096 (__arm_vcmpleq): Remove.
29097 (__arm_vcmpgtq): Remove.
29098 (__arm_vcmpgeq): Remove.
29099 (__arm_vcmpneq_m): Remove.
29100 (__arm_vcmphiq_m): Remove.
29101 (__arm_vcmpeqq_m): Remove.
29102 (__arm_vcmpcsq_m): Remove.
29103 (__arm_vcmpltq_m): Remove.
29104 (__arm_vcmpleq_m): Remove.
29105 (__arm_vcmpgtq_m): Remove.
29106 (__arm_vcmpgeq_m): Remove.
29108 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29110 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
29111 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
29113 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
29115 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
29116 (MVE_CMP_M_N_F, mve_cmp_op1): New.
29119 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
29120 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
29121 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
29122 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
29123 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
29124 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
29125 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
29126 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
29127 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
29128 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
29130 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
29131 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
29132 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
29133 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
29134 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
29136 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
29137 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
29138 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
29139 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
29140 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
29142 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
29144 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
29145 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
29146 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
29149 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
29151 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
29152 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
29153 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
29154 Simplify parity(rotate(x,y)) as parity(x).
29156 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29158 * config/riscv/autovec.md (@vec_series<mode>): New pattern
29159 * config/riscv/riscv-protos.h (expand_vec_series): New function.
29160 * config/riscv/riscv-v.cc (emit_binop): Ditto.
29161 (emit_index_op): Ditto.
29162 (expand_vec_series): Ditto.
29163 (expand_const_vector): Add series vector handling.
29164 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
29166 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
29168 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
29169 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
29170 (*concat<mode><dwi>3_2): Likewise.
29171 (*concat<mode><dwi>3_3): Likewise.
29172 (*concat<mode><dwi>3_4): Likewise.
29173 (*concat<mode><dwi>3_5): Likewise.
29174 (*concat<mode><dwi>3_6): Likewise.
29175 (*concat<mode><dwi>3_7): Likewise.
29177 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
29180 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
29181 (<insn>v4qiv4hi2): New expander.
29182 (<insn>v2hiv2si2): Ditto.
29183 (<insn>v2qiv2si2): Ditto.
29184 (<insn>v2qiv2hi2): Ditto.
29186 2023-05-10 Jeff Law <jlaw@ventanamicro>
29188 * config/h8300/constraints.md (Q): Make this a special memory
29192 2023-05-10 Jakub Jelinek <jakub@redhat.com>
29195 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
29196 if t is void_list_node.
29198 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29200 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
29201 (aarch64_sqmovun<mode>_insn_be): Delete.
29202 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
29203 (aarch64_sqmovun<mode>): Delete expander.
29205 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29208 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
29210 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
29211 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
29212 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
29214 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29217 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
29219 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
29220 (aarch64_<sur>qadd<mode>): Rename to...
29221 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
29223 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29225 * config/aarch64/aarch64-simd.md
29226 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
29227 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
29228 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
29229 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
29231 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29234 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
29235 (aarch64_xtn<mode>_insn_be): Likewise.
29236 (trunc<mode><Vnarrowq>2): Rename to...
29237 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
29238 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
29239 (aarch64_<su>qmovn<mode>): Likewise.
29240 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
29241 (aarch64_<su>qmovn<mode>_insn_le): Delete.
29242 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
29244 2023-05-10 Li Xu <xuli1@eswincomputing.com>
29246 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
29247 intruction replace null avl with (const_int 0).
29249 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29251 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
29254 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29257 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
29258 (source_equal_p): Fix dead loop in vsetvl avl checking.
29260 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
29262 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
29263 of modeadjusted_dccr.
29265 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29267 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
29268 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
29269 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
29270 * config/arm/arm-mve-builtins.cc
29271 (function_instance::has_inactive_argument): Handle vmaxaq and
29273 * config/arm/arm_mve.h (vminaq): Remove.
29275 (vminaq_m): Remove.
29276 (vmaxaq_m): Remove.
29277 (vminaq_s8): Remove.
29278 (vmaxaq_s8): Remove.
29279 (vminaq_s16): Remove.
29280 (vmaxaq_s16): Remove.
29281 (vminaq_s32): Remove.
29282 (vmaxaq_s32): Remove.
29283 (vminaq_m_s8): Remove.
29284 (vmaxaq_m_s8): Remove.
29285 (vminaq_m_s16): Remove.
29286 (vmaxaq_m_s16): Remove.
29287 (vminaq_m_s32): Remove.
29288 (vmaxaq_m_s32): Remove.
29289 (__arm_vminaq_s8): Remove.
29290 (__arm_vmaxaq_s8): Remove.
29291 (__arm_vminaq_s16): Remove.
29292 (__arm_vmaxaq_s16): Remove.
29293 (__arm_vminaq_s32): Remove.
29294 (__arm_vmaxaq_s32): Remove.
29295 (__arm_vminaq_m_s8): Remove.
29296 (__arm_vmaxaq_m_s8): Remove.
29297 (__arm_vminaq_m_s16): Remove.
29298 (__arm_vmaxaq_m_s16): Remove.
29299 (__arm_vminaq_m_s32): Remove.
29300 (__arm_vmaxaq_m_s32): Remove.
29301 (__arm_vminaq): Remove.
29302 (__arm_vmaxaq): Remove.
29303 (__arm_vminaq_m): Remove.
29304 (__arm_vmaxaq_m): Remove.
29306 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29308 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
29310 (mve_insn): Add vmaxa, vmina.
29311 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
29312 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
29314 (@mve_<mve_insn>q_<supf><mode>): ... this.
29315 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
29316 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
29318 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29320 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
29321 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
29323 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29325 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
29326 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
29327 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
29328 * config/arm/arm-mve-builtins.cc
29329 (function_instance::has_inactive_argument): Handle vmaxnmaq and
29331 * config/arm/arm_mve.h (vminnmaq): Remove.
29332 (vmaxnmaq): Remove.
29333 (vmaxnmaq_m): Remove.
29334 (vminnmaq_m): Remove.
29335 (vminnmaq_f16): Remove.
29336 (vmaxnmaq_f16): Remove.
29337 (vminnmaq_f32): Remove.
29338 (vmaxnmaq_f32): Remove.
29339 (vmaxnmaq_m_f16): Remove.
29340 (vminnmaq_m_f16): Remove.
29341 (vmaxnmaq_m_f32): Remove.
29342 (vminnmaq_m_f32): Remove.
29343 (__arm_vminnmaq_f16): Remove.
29344 (__arm_vmaxnmaq_f16): Remove.
29345 (__arm_vminnmaq_f32): Remove.
29346 (__arm_vmaxnmaq_f32): Remove.
29347 (__arm_vmaxnmaq_m_f16): Remove.
29348 (__arm_vminnmaq_m_f16): Remove.
29349 (__arm_vmaxnmaq_m_f32): Remove.
29350 (__arm_vminnmaq_m_f32): Remove.
29351 (__arm_vminnmaq): Remove.
29352 (__arm_vmaxnmaq): Remove.
29353 (__arm_vmaxnmaq_m): Remove.
29354 (__arm_vminnmaq_m): Remove.
29356 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29358 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
29359 (MVE_VMAXNMA_VMINNMAQ_M): New.
29360 (mve_insn): Add vmaxnma, vminnma.
29361 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
29363 (@mve_<mve_insn>q_f<mode>): ... this.
29364 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
29365 (@mve_<mve_insn>q_m_f<mode>): ... this.
29367 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29369 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
29370 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
29371 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
29372 (vminnmavq, vminnmvq): New.
29373 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
29374 (vminnmavq, vminnmvq): New.
29375 * config/arm/arm_mve.h (vminnmvq): Remove.
29376 (vminnmavq): Remove.
29377 (vmaxnmvq): Remove.
29378 (vmaxnmavq): Remove.
29379 (vmaxnmavq_p): Remove.
29380 (vmaxnmvq_p): Remove.
29381 (vminnmavq_p): Remove.
29382 (vminnmvq_p): Remove.
29383 (vminnmvq_f16): Remove.
29384 (vminnmavq_f16): Remove.
29385 (vmaxnmvq_f16): Remove.
29386 (vmaxnmavq_f16): Remove.
29387 (vminnmvq_f32): Remove.
29388 (vminnmavq_f32): Remove.
29389 (vmaxnmvq_f32): Remove.
29390 (vmaxnmavq_f32): Remove.
29391 (vmaxnmavq_p_f16): Remove.
29392 (vmaxnmvq_p_f16): Remove.
29393 (vminnmavq_p_f16): Remove.
29394 (vminnmvq_p_f16): Remove.
29395 (vmaxnmavq_p_f32): Remove.
29396 (vmaxnmvq_p_f32): Remove.
29397 (vminnmavq_p_f32): Remove.
29398 (vminnmvq_p_f32): Remove.
29399 (__arm_vminnmvq_f16): Remove.
29400 (__arm_vminnmavq_f16): Remove.
29401 (__arm_vmaxnmvq_f16): Remove.
29402 (__arm_vmaxnmavq_f16): Remove.
29403 (__arm_vminnmvq_f32): Remove.
29404 (__arm_vminnmavq_f32): Remove.
29405 (__arm_vmaxnmvq_f32): Remove.
29406 (__arm_vmaxnmavq_f32): Remove.
29407 (__arm_vmaxnmavq_p_f16): Remove.
29408 (__arm_vmaxnmvq_p_f16): Remove.
29409 (__arm_vminnmavq_p_f16): Remove.
29410 (__arm_vminnmvq_p_f16): Remove.
29411 (__arm_vmaxnmavq_p_f32): Remove.
29412 (__arm_vmaxnmvq_p_f32): Remove.
29413 (__arm_vminnmavq_p_f32): Remove.
29414 (__arm_vminnmvq_p_f32): Remove.
29415 (__arm_vminnmvq): Remove.
29416 (__arm_vminnmavq): Remove.
29417 (__arm_vmaxnmvq): Remove.
29418 (__arm_vmaxnmavq): Remove.
29419 (__arm_vmaxnmavq_p): Remove.
29420 (__arm_vmaxnmvq_p): Remove.
29421 (__arm_vminnmavq_p): Remove.
29422 (__arm_vminnmvq_p): Remove.
29423 (__arm_vmaxnmavq_m): Remove.
29424 (__arm_vmaxnmvq_m): Remove.
29426 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29428 * config/arm/arm-mve-builtins-functions.h
29429 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
29431 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29433 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
29434 (MVE_VMAXNMxV_MINNMxVQ_P): New.
29435 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
29436 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
29437 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
29438 (@mve_<mve_insn>q_f<mode>): ... this.
29439 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
29440 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
29441 (@mve_<mve_insn>q_p_f<mode>): ... this.
29443 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29445 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
29446 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
29447 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
29448 * config/arm/arm_mve.h (vminnmq): Remove.
29450 (vmaxnmq_m): Remove.
29451 (vminnmq_m): Remove.
29452 (vminnmq_x): Remove.
29453 (vmaxnmq_x): Remove.
29454 (vminnmq_f16): Remove.
29455 (vmaxnmq_f16): Remove.
29456 (vminnmq_f32): Remove.
29457 (vmaxnmq_f32): Remove.
29458 (vmaxnmq_m_f32): Remove.
29459 (vmaxnmq_m_f16): Remove.
29460 (vminnmq_m_f32): Remove.
29461 (vminnmq_m_f16): Remove.
29462 (vminnmq_x_f16): Remove.
29463 (vminnmq_x_f32): Remove.
29464 (vmaxnmq_x_f16): Remove.
29465 (vmaxnmq_x_f32): Remove.
29466 (__arm_vminnmq_f16): Remove.
29467 (__arm_vmaxnmq_f16): Remove.
29468 (__arm_vminnmq_f32): Remove.
29469 (__arm_vmaxnmq_f32): Remove.
29470 (__arm_vmaxnmq_m_f32): Remove.
29471 (__arm_vmaxnmq_m_f16): Remove.
29472 (__arm_vminnmq_m_f32): Remove.
29473 (__arm_vminnmq_m_f16): Remove.
29474 (__arm_vminnmq_x_f16): Remove.
29475 (__arm_vminnmq_x_f32): Remove.
29476 (__arm_vmaxnmq_x_f16): Remove.
29477 (__arm_vmaxnmq_x_f32): Remove.
29478 (__arm_vminnmq): Remove.
29479 (__arm_vmaxnmq): Remove.
29480 (__arm_vmaxnmq_m): Remove.
29481 (__arm_vminnmq_m): Remove.
29482 (__arm_vminnmq_x): Remove.
29483 (__arm_vmaxnmq_x): Remove.
29485 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29487 * config/arm/iterators.md (MAX_MIN_F): New.
29488 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
29489 (mve_insn): Add vmaxnm, vminnm.
29490 (max_min_f_str): New.
29491 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
29493 (@mve_<max_min_f_str>q_f<mode>): ... this.
29494 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
29495 (@mve_<mve_insn>q_m_f<mode>): ... this.
29497 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29499 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
29500 (smax<mode>3): Likewise.
29502 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29504 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
29505 (FUNCTION_PRED_P_S): New.
29506 (vmaxavq, vminavq, vmaxvq, vminvq): New.
29507 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
29509 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
29511 * config/arm/arm_mve.h (vminvq): Remove.
29513 (vminvq_p): Remove.
29514 (vmaxvq_p): Remove.
29515 (vminvq_u8): Remove.
29516 (vmaxvq_u8): Remove.
29517 (vminvq_s8): Remove.
29518 (vmaxvq_s8): Remove.
29519 (vminvq_u16): Remove.
29520 (vmaxvq_u16): Remove.
29521 (vminvq_s16): Remove.
29522 (vmaxvq_s16): Remove.
29523 (vminvq_u32): Remove.
29524 (vmaxvq_u32): Remove.
29525 (vminvq_s32): Remove.
29526 (vmaxvq_s32): Remove.
29527 (vminvq_p_u8): Remove.
29528 (vmaxvq_p_u8): Remove.
29529 (vminvq_p_s8): Remove.
29530 (vmaxvq_p_s8): Remove.
29531 (vminvq_p_u16): Remove.
29532 (vmaxvq_p_u16): Remove.
29533 (vminvq_p_s16): Remove.
29534 (vmaxvq_p_s16): Remove.
29535 (vminvq_p_u32): Remove.
29536 (vmaxvq_p_u32): Remove.
29537 (vminvq_p_s32): Remove.
29538 (vmaxvq_p_s32): Remove.
29539 (__arm_vminvq_u8): Remove.
29540 (__arm_vmaxvq_u8): Remove.
29541 (__arm_vminvq_s8): Remove.
29542 (__arm_vmaxvq_s8): Remove.
29543 (__arm_vminvq_u16): Remove.
29544 (__arm_vmaxvq_u16): Remove.
29545 (__arm_vminvq_s16): Remove.
29546 (__arm_vmaxvq_s16): Remove.
29547 (__arm_vminvq_u32): Remove.
29548 (__arm_vmaxvq_u32): Remove.
29549 (__arm_vminvq_s32): Remove.
29550 (__arm_vmaxvq_s32): Remove.
29551 (__arm_vminvq_p_u8): Remove.
29552 (__arm_vmaxvq_p_u8): Remove.
29553 (__arm_vminvq_p_s8): Remove.
29554 (__arm_vmaxvq_p_s8): Remove.
29555 (__arm_vminvq_p_u16): Remove.
29556 (__arm_vmaxvq_p_u16): Remove.
29557 (__arm_vminvq_p_s16): Remove.
29558 (__arm_vmaxvq_p_s16): Remove.
29559 (__arm_vminvq_p_u32): Remove.
29560 (__arm_vmaxvq_p_u32): Remove.
29561 (__arm_vminvq_p_s32): Remove.
29562 (__arm_vmaxvq_p_s32): Remove.
29563 (__arm_vminvq): Remove.
29564 (__arm_vmaxvq): Remove.
29565 (__arm_vminvq_p): Remove.
29566 (__arm_vmaxvq_p): Remove.
29569 (vminavq_p): Remove.
29570 (vmaxavq_p): Remove.
29571 (vminavq_s8): Remove.
29572 (vmaxavq_s8): Remove.
29573 (vminavq_s16): Remove.
29574 (vmaxavq_s16): Remove.
29575 (vminavq_s32): Remove.
29576 (vmaxavq_s32): Remove.
29577 (vminavq_p_s8): Remove.
29578 (vmaxavq_p_s8): Remove.
29579 (vminavq_p_s16): Remove.
29580 (vmaxavq_p_s16): Remove.
29581 (vminavq_p_s32): Remove.
29582 (vmaxavq_p_s32): Remove.
29583 (__arm_vminavq_s8): Remove.
29584 (__arm_vmaxavq_s8): Remove.
29585 (__arm_vminavq_s16): Remove.
29586 (__arm_vmaxavq_s16): Remove.
29587 (__arm_vminavq_s32): Remove.
29588 (__arm_vmaxavq_s32): Remove.
29589 (__arm_vminavq_p_s8): Remove.
29590 (__arm_vmaxavq_p_s8): Remove.
29591 (__arm_vminavq_p_s16): Remove.
29592 (__arm_vmaxavq_p_s16): Remove.
29593 (__arm_vminavq_p_s32): Remove.
29594 (__arm_vmaxavq_p_s32): Remove.
29595 (__arm_vminavq): Remove.
29596 (__arm_vmaxavq): Remove.
29597 (__arm_vminavq_p): Remove.
29598 (__arm_vmaxavq_p): Remove.
29600 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29602 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
29603 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
29604 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
29605 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
29606 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
29607 (@mve_<mve_insn>q_<supf><mode>): ... this.
29608 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
29609 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
29610 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
29612 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29614 * config/arm/arm-mve-builtins-functions.h (class
29615 unspec_mve_function_exact_insn_pred_p): New.
29617 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29619 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
29620 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
29622 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29624 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
29625 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
29627 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
29629 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
29631 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
29632 (ADJUST_REG_ALLOC_ORDER): Likewise.
29633 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
29635 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
29636 Upa rather than Upl for unpredicated movprfx alternatives.
29638 2023-05-09 Jeff Law <jlaw@ventanamicro>
29640 * config/h8300/testcompare.md: Add peephole2 which uses a memory
29641 load to set flags, thus eliminating a compare against zero.
29643 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29645 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
29646 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
29647 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
29648 * config/arm/arm_mve.h (vshlltq): Remove.
29650 (vshllbq_m): Remove.
29651 (vshlltq_m): Remove.
29652 (vshllbq_x): Remove.
29653 (vshlltq_x): Remove.
29654 (vshlltq_n_u8): Remove.
29655 (vshllbq_n_u8): Remove.
29656 (vshlltq_n_s8): Remove.
29657 (vshllbq_n_s8): Remove.
29658 (vshlltq_n_u16): Remove.
29659 (vshllbq_n_u16): Remove.
29660 (vshlltq_n_s16): Remove.
29661 (vshllbq_n_s16): Remove.
29662 (vshllbq_m_n_s8): Remove.
29663 (vshllbq_m_n_s16): Remove.
29664 (vshllbq_m_n_u8): Remove.
29665 (vshllbq_m_n_u16): Remove.
29666 (vshlltq_m_n_s8): Remove.
29667 (vshlltq_m_n_s16): Remove.
29668 (vshlltq_m_n_u8): Remove.
29669 (vshlltq_m_n_u16): Remove.
29670 (vshllbq_x_n_s8): Remove.
29671 (vshllbq_x_n_s16): Remove.
29672 (vshllbq_x_n_u8): Remove.
29673 (vshllbq_x_n_u16): Remove.
29674 (vshlltq_x_n_s8): Remove.
29675 (vshlltq_x_n_s16): Remove.
29676 (vshlltq_x_n_u8): Remove.
29677 (vshlltq_x_n_u16): Remove.
29678 (__arm_vshlltq_n_u8): Remove.
29679 (__arm_vshllbq_n_u8): Remove.
29680 (__arm_vshlltq_n_s8): Remove.
29681 (__arm_vshllbq_n_s8): Remove.
29682 (__arm_vshlltq_n_u16): Remove.
29683 (__arm_vshllbq_n_u16): Remove.
29684 (__arm_vshlltq_n_s16): Remove.
29685 (__arm_vshllbq_n_s16): Remove.
29686 (__arm_vshllbq_m_n_s8): Remove.
29687 (__arm_vshllbq_m_n_s16): Remove.
29688 (__arm_vshllbq_m_n_u8): Remove.
29689 (__arm_vshllbq_m_n_u16): Remove.
29690 (__arm_vshlltq_m_n_s8): Remove.
29691 (__arm_vshlltq_m_n_s16): Remove.
29692 (__arm_vshlltq_m_n_u8): Remove.
29693 (__arm_vshlltq_m_n_u16): Remove.
29694 (__arm_vshllbq_x_n_s8): Remove.
29695 (__arm_vshllbq_x_n_s16): Remove.
29696 (__arm_vshllbq_x_n_u8): Remove.
29697 (__arm_vshllbq_x_n_u16): Remove.
29698 (__arm_vshlltq_x_n_s8): Remove.
29699 (__arm_vshlltq_x_n_s16): Remove.
29700 (__arm_vshlltq_x_n_u8): Remove.
29701 (__arm_vshlltq_x_n_u16): Remove.
29702 (__arm_vshlltq): Remove.
29703 (__arm_vshllbq): Remove.
29704 (__arm_vshllbq_m): Remove.
29705 (__arm_vshlltq_m): Remove.
29706 (__arm_vshllbq_x): Remove.
29707 (__arm_vshlltq_x): Remove.
29709 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29711 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
29712 (VSHLLBQ_N, VSHLLTQ_N): Remove.
29714 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
29715 (VSHLLxQ_M_N): New.
29716 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
29717 (mve_vshlltq_n_<supf><mode>): Merge into ...
29718 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29719 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
29721 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29723 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29725 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
29726 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
29728 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29730 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
29731 (vqmovntq, vqmovunbq, vqmovuntq): New.
29732 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
29733 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
29734 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
29735 (vqmovntq, vqmovunbq, vqmovuntq): New.
29736 * config/arm/arm-mve-builtins.cc
29737 (function_instance::has_inactive_argument): Handle vmovnbq,
29738 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
29739 * config/arm/arm_mve.h (vqmovntq): Remove.
29740 (vqmovnbq): Remove.
29741 (vqmovnbq_m): Remove.
29742 (vqmovntq_m): Remove.
29743 (vqmovntq_u16): Remove.
29744 (vqmovnbq_u16): Remove.
29745 (vqmovntq_s16): Remove.
29746 (vqmovnbq_s16): Remove.
29747 (vqmovntq_u32): Remove.
29748 (vqmovnbq_u32): Remove.
29749 (vqmovntq_s32): Remove.
29750 (vqmovnbq_s32): Remove.
29751 (vqmovnbq_m_s16): Remove.
29752 (vqmovntq_m_s16): Remove.
29753 (vqmovnbq_m_u16): Remove.
29754 (vqmovntq_m_u16): Remove.
29755 (vqmovnbq_m_s32): Remove.
29756 (vqmovntq_m_s32): Remove.
29757 (vqmovnbq_m_u32): Remove.
29758 (vqmovntq_m_u32): Remove.
29759 (__arm_vqmovntq_u16): Remove.
29760 (__arm_vqmovnbq_u16): Remove.
29761 (__arm_vqmovntq_s16): Remove.
29762 (__arm_vqmovnbq_s16): Remove.
29763 (__arm_vqmovntq_u32): Remove.
29764 (__arm_vqmovnbq_u32): Remove.
29765 (__arm_vqmovntq_s32): Remove.
29766 (__arm_vqmovnbq_s32): Remove.
29767 (__arm_vqmovnbq_m_s16): Remove.
29768 (__arm_vqmovntq_m_s16): Remove.
29769 (__arm_vqmovnbq_m_u16): Remove.
29770 (__arm_vqmovntq_m_u16): Remove.
29771 (__arm_vqmovnbq_m_s32): Remove.
29772 (__arm_vqmovntq_m_s32): Remove.
29773 (__arm_vqmovnbq_m_u32): Remove.
29774 (__arm_vqmovntq_m_u32): Remove.
29775 (__arm_vqmovntq): Remove.
29776 (__arm_vqmovnbq): Remove.
29777 (__arm_vqmovnbq_m): Remove.
29778 (__arm_vqmovntq_m): Remove.
29781 (vmovnbq_m): Remove.
29782 (vmovntq_m): Remove.
29783 (vmovntq_u16): Remove.
29784 (vmovnbq_u16): Remove.
29785 (vmovntq_s16): Remove.
29786 (vmovnbq_s16): Remove.
29787 (vmovntq_u32): Remove.
29788 (vmovnbq_u32): Remove.
29789 (vmovntq_s32): Remove.
29790 (vmovnbq_s32): Remove.
29791 (vmovnbq_m_s16): Remove.
29792 (vmovntq_m_s16): Remove.
29793 (vmovnbq_m_u16): Remove.
29794 (vmovntq_m_u16): Remove.
29795 (vmovnbq_m_s32): Remove.
29796 (vmovntq_m_s32): Remove.
29797 (vmovnbq_m_u32): Remove.
29798 (vmovntq_m_u32): Remove.
29799 (__arm_vmovntq_u16): Remove.
29800 (__arm_vmovnbq_u16): Remove.
29801 (__arm_vmovntq_s16): Remove.
29802 (__arm_vmovnbq_s16): Remove.
29803 (__arm_vmovntq_u32): Remove.
29804 (__arm_vmovnbq_u32): Remove.
29805 (__arm_vmovntq_s32): Remove.
29806 (__arm_vmovnbq_s32): Remove.
29807 (__arm_vmovnbq_m_s16): Remove.
29808 (__arm_vmovntq_m_s16): Remove.
29809 (__arm_vmovnbq_m_u16): Remove.
29810 (__arm_vmovntq_m_u16): Remove.
29811 (__arm_vmovnbq_m_s32): Remove.
29812 (__arm_vmovntq_m_s32): Remove.
29813 (__arm_vmovnbq_m_u32): Remove.
29814 (__arm_vmovntq_m_u32): Remove.
29815 (__arm_vmovntq): Remove.
29816 (__arm_vmovnbq): Remove.
29817 (__arm_vmovnbq_m): Remove.
29818 (__arm_vmovntq_m): Remove.
29819 (vqmovuntq): Remove.
29820 (vqmovunbq): Remove.
29821 (vqmovunbq_m): Remove.
29822 (vqmovuntq_m): Remove.
29823 (vqmovuntq_s16): Remove.
29824 (vqmovunbq_s16): Remove.
29825 (vqmovuntq_s32): Remove.
29826 (vqmovunbq_s32): Remove.
29827 (vqmovunbq_m_s16): Remove.
29828 (vqmovuntq_m_s16): Remove.
29829 (vqmovunbq_m_s32): Remove.
29830 (vqmovuntq_m_s32): Remove.
29831 (__arm_vqmovuntq_s16): Remove.
29832 (__arm_vqmovunbq_s16): Remove.
29833 (__arm_vqmovuntq_s32): Remove.
29834 (__arm_vqmovunbq_s32): Remove.
29835 (__arm_vqmovunbq_m_s16): Remove.
29836 (__arm_vqmovuntq_m_s16): Remove.
29837 (__arm_vqmovunbq_m_s32): Remove.
29838 (__arm_vqmovuntq_m_s32): Remove.
29839 (__arm_vqmovuntq): Remove.
29840 (__arm_vqmovunbq): Remove.
29841 (__arm_vqmovunbq_m): Remove.
29842 (__arm_vqmovuntq_m): Remove.
29844 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29846 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
29847 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
29850 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
29852 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
29853 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
29854 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
29855 (mve_vqmovuntq_s<mode>): Merge into ...
29856 (@mve_<mve_insn>q_<supf><mode>): ... this.
29857 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
29858 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
29859 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
29860 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
29862 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29864 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
29865 (binary_move_narrow_unsigned): New.
29866 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
29867 (binary_move_narrow_unsigned): New.
29869 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29871 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
29872 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
29873 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
29874 (vrndpq, vrndq, vrndxq): New.
29875 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
29876 (vrndpq, vrndq, vrndxq): New.
29877 * config/arm/arm_mve.h (vrndxq): Remove.
29883 (vrndaq_m): Remove.
29884 (vrndmq_m): Remove.
29885 (vrndnq_m): Remove.
29886 (vrndpq_m): Remove.
29888 (vrndxq_m): Remove.
29890 (vrndnq_x): Remove.
29891 (vrndmq_x): Remove.
29892 (vrndpq_x): Remove.
29893 (vrndaq_x): Remove.
29894 (vrndxq_x): Remove.
29895 (vrndxq_f16): Remove.
29896 (vrndxq_f32): Remove.
29897 (vrndq_f16): Remove.
29898 (vrndq_f32): Remove.
29899 (vrndpq_f16): Remove.
29900 (vrndpq_f32): Remove.
29901 (vrndnq_f16): Remove.
29902 (vrndnq_f32): Remove.
29903 (vrndmq_f16): Remove.
29904 (vrndmq_f32): Remove.
29905 (vrndaq_f16): Remove.
29906 (vrndaq_f32): Remove.
29907 (vrndaq_m_f16): Remove.
29908 (vrndmq_m_f16): Remove.
29909 (vrndnq_m_f16): Remove.
29910 (vrndpq_m_f16): Remove.
29911 (vrndq_m_f16): Remove.
29912 (vrndxq_m_f16): Remove.
29913 (vrndaq_m_f32): Remove.
29914 (vrndmq_m_f32): Remove.
29915 (vrndnq_m_f32): Remove.
29916 (vrndpq_m_f32): Remove.
29917 (vrndq_m_f32): Remove.
29918 (vrndxq_m_f32): Remove.
29919 (vrndq_x_f16): Remove.
29920 (vrndq_x_f32): Remove.
29921 (vrndnq_x_f16): Remove.
29922 (vrndnq_x_f32): Remove.
29923 (vrndmq_x_f16): Remove.
29924 (vrndmq_x_f32): Remove.
29925 (vrndpq_x_f16): Remove.
29926 (vrndpq_x_f32): Remove.
29927 (vrndaq_x_f16): Remove.
29928 (vrndaq_x_f32): Remove.
29929 (vrndxq_x_f16): Remove.
29930 (vrndxq_x_f32): Remove.
29931 (__arm_vrndxq_f16): Remove.
29932 (__arm_vrndxq_f32): Remove.
29933 (__arm_vrndq_f16): Remove.
29934 (__arm_vrndq_f32): Remove.
29935 (__arm_vrndpq_f16): Remove.
29936 (__arm_vrndpq_f32): Remove.
29937 (__arm_vrndnq_f16): Remove.
29938 (__arm_vrndnq_f32): Remove.
29939 (__arm_vrndmq_f16): Remove.
29940 (__arm_vrndmq_f32): Remove.
29941 (__arm_vrndaq_f16): Remove.
29942 (__arm_vrndaq_f32): Remove.
29943 (__arm_vrndaq_m_f16): Remove.
29944 (__arm_vrndmq_m_f16): Remove.
29945 (__arm_vrndnq_m_f16): Remove.
29946 (__arm_vrndpq_m_f16): Remove.
29947 (__arm_vrndq_m_f16): Remove.
29948 (__arm_vrndxq_m_f16): Remove.
29949 (__arm_vrndaq_m_f32): Remove.
29950 (__arm_vrndmq_m_f32): Remove.
29951 (__arm_vrndnq_m_f32): Remove.
29952 (__arm_vrndpq_m_f32): Remove.
29953 (__arm_vrndq_m_f32): Remove.
29954 (__arm_vrndxq_m_f32): Remove.
29955 (__arm_vrndq_x_f16): Remove.
29956 (__arm_vrndq_x_f32): Remove.
29957 (__arm_vrndnq_x_f16): Remove.
29958 (__arm_vrndnq_x_f32): Remove.
29959 (__arm_vrndmq_x_f16): Remove.
29960 (__arm_vrndmq_x_f32): Remove.
29961 (__arm_vrndpq_x_f16): Remove.
29962 (__arm_vrndpq_x_f32): Remove.
29963 (__arm_vrndaq_x_f16): Remove.
29964 (__arm_vrndaq_x_f32): Remove.
29965 (__arm_vrndxq_x_f16): Remove.
29966 (__arm_vrndxq_x_f32): Remove.
29967 (__arm_vrndxq): Remove.
29968 (__arm_vrndq): Remove.
29969 (__arm_vrndpq): Remove.
29970 (__arm_vrndnq): Remove.
29971 (__arm_vrndmq): Remove.
29972 (__arm_vrndaq): Remove.
29973 (__arm_vrndaq_m): Remove.
29974 (__arm_vrndmq_m): Remove.
29975 (__arm_vrndnq_m): Remove.
29976 (__arm_vrndpq_m): Remove.
29977 (__arm_vrndq_m): Remove.
29978 (__arm_vrndxq_m): Remove.
29979 (__arm_vrndq_x): Remove.
29980 (__arm_vrndnq_x): Remove.
29981 (__arm_vrndmq_x): Remove.
29982 (__arm_vrndpq_x): Remove.
29983 (__arm_vrndaq_x): Remove.
29984 (__arm_vrndxq_x): Remove.
29986 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
29988 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
29989 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
29990 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
29991 (vclzq, vqabsq, vqnegq): New.
29992 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
29993 (vqabsq, vqnegq): New.
29994 * config/arm/arm_mve.h (vabsq): Remove.
29997 (vabsq_f16): Remove.
29998 (vabsq_f32): Remove.
29999 (vabsq_s8): Remove.
30000 (vabsq_s16): Remove.
30001 (vabsq_s32): Remove.
30002 (vabsq_m_s8): Remove.
30003 (vabsq_m_s16): Remove.
30004 (vabsq_m_s32): Remove.
30005 (vabsq_m_f16): Remove.
30006 (vabsq_m_f32): Remove.
30007 (vabsq_x_s8): Remove.
30008 (vabsq_x_s16): Remove.
30009 (vabsq_x_s32): Remove.
30010 (vabsq_x_f16): Remove.
30011 (vabsq_x_f32): Remove.
30012 (__arm_vabsq_s8): Remove.
30013 (__arm_vabsq_s16): Remove.
30014 (__arm_vabsq_s32): Remove.
30015 (__arm_vabsq_m_s8): Remove.
30016 (__arm_vabsq_m_s16): Remove.
30017 (__arm_vabsq_m_s32): Remove.
30018 (__arm_vabsq_x_s8): Remove.
30019 (__arm_vabsq_x_s16): Remove.
30020 (__arm_vabsq_x_s32): Remove.
30021 (__arm_vabsq_f16): Remove.
30022 (__arm_vabsq_f32): Remove.
30023 (__arm_vabsq_m_f16): Remove.
30024 (__arm_vabsq_m_f32): Remove.
30025 (__arm_vabsq_x_f16): Remove.
30026 (__arm_vabsq_x_f32): Remove.
30027 (__arm_vabsq): Remove.
30028 (__arm_vabsq_m): Remove.
30029 (__arm_vabsq_x): Remove.
30033 (vnegq_f16): Remove.
30034 (vnegq_f32): Remove.
30035 (vnegq_s8): Remove.
30036 (vnegq_s16): Remove.
30037 (vnegq_s32): Remove.
30038 (vnegq_m_s8): Remove.
30039 (vnegq_m_s16): Remove.
30040 (vnegq_m_s32): Remove.
30041 (vnegq_m_f16): Remove.
30042 (vnegq_m_f32): Remove.
30043 (vnegq_x_s8): Remove.
30044 (vnegq_x_s16): Remove.
30045 (vnegq_x_s32): Remove.
30046 (vnegq_x_f16): Remove.
30047 (vnegq_x_f32): Remove.
30048 (__arm_vnegq_s8): Remove.
30049 (__arm_vnegq_s16): Remove.
30050 (__arm_vnegq_s32): Remove.
30051 (__arm_vnegq_m_s8): Remove.
30052 (__arm_vnegq_m_s16): Remove.
30053 (__arm_vnegq_m_s32): Remove.
30054 (__arm_vnegq_x_s8): Remove.
30055 (__arm_vnegq_x_s16): Remove.
30056 (__arm_vnegq_x_s32): Remove.
30057 (__arm_vnegq_f16): Remove.
30058 (__arm_vnegq_f32): Remove.
30059 (__arm_vnegq_m_f16): Remove.
30060 (__arm_vnegq_m_f32): Remove.
30061 (__arm_vnegq_x_f16): Remove.
30062 (__arm_vnegq_x_f32): Remove.
30063 (__arm_vnegq): Remove.
30064 (__arm_vnegq_m): Remove.
30065 (__arm_vnegq_x): Remove.
30069 (vclsq_s8): Remove.
30070 (vclsq_s16): Remove.
30071 (vclsq_s32): Remove.
30072 (vclsq_m_s8): Remove.
30073 (vclsq_m_s16): Remove.
30074 (vclsq_m_s32): Remove.
30075 (vclsq_x_s8): Remove.
30076 (vclsq_x_s16): Remove.
30077 (vclsq_x_s32): Remove.
30078 (__arm_vclsq_s8): Remove.
30079 (__arm_vclsq_s16): Remove.
30080 (__arm_vclsq_s32): Remove.
30081 (__arm_vclsq_m_s8): Remove.
30082 (__arm_vclsq_m_s16): Remove.
30083 (__arm_vclsq_m_s32): Remove.
30084 (__arm_vclsq_x_s8): Remove.
30085 (__arm_vclsq_x_s16): Remove.
30086 (__arm_vclsq_x_s32): Remove.
30087 (__arm_vclsq): Remove.
30088 (__arm_vclsq_m): Remove.
30089 (__arm_vclsq_x): Remove.
30093 (vclzq_s8): Remove.
30094 (vclzq_s16): Remove.
30095 (vclzq_s32): Remove.
30096 (vclzq_u8): Remove.
30097 (vclzq_u16): Remove.
30098 (vclzq_u32): Remove.
30099 (vclzq_m_u8): Remove.
30100 (vclzq_m_s8): Remove.
30101 (vclzq_m_u16): Remove.
30102 (vclzq_m_s16): Remove.
30103 (vclzq_m_u32): Remove.
30104 (vclzq_m_s32): Remove.
30105 (vclzq_x_s8): Remove.
30106 (vclzq_x_s16): Remove.
30107 (vclzq_x_s32): Remove.
30108 (vclzq_x_u8): Remove.
30109 (vclzq_x_u16): Remove.
30110 (vclzq_x_u32): Remove.
30111 (__arm_vclzq_s8): Remove.
30112 (__arm_vclzq_s16): Remove.
30113 (__arm_vclzq_s32): Remove.
30114 (__arm_vclzq_u8): Remove.
30115 (__arm_vclzq_u16): Remove.
30116 (__arm_vclzq_u32): Remove.
30117 (__arm_vclzq_m_u8): Remove.
30118 (__arm_vclzq_m_s8): Remove.
30119 (__arm_vclzq_m_u16): Remove.
30120 (__arm_vclzq_m_s16): Remove.
30121 (__arm_vclzq_m_u32): Remove.
30122 (__arm_vclzq_m_s32): Remove.
30123 (__arm_vclzq_x_s8): Remove.
30124 (__arm_vclzq_x_s16): Remove.
30125 (__arm_vclzq_x_s32): Remove.
30126 (__arm_vclzq_x_u8): Remove.
30127 (__arm_vclzq_x_u16): Remove.
30128 (__arm_vclzq_x_u32): Remove.
30129 (__arm_vclzq): Remove.
30130 (__arm_vclzq_m): Remove.
30131 (__arm_vclzq_x): Remove.
30134 (vqnegq_m): Remove.
30135 (vqabsq_m): Remove.
30136 (vqabsq_s8): Remove.
30137 (vqabsq_s16): Remove.
30138 (vqabsq_s32): Remove.
30139 (vqnegq_s8): Remove.
30140 (vqnegq_s16): Remove.
30141 (vqnegq_s32): Remove.
30142 (vqnegq_m_s8): Remove.
30143 (vqabsq_m_s8): Remove.
30144 (vqnegq_m_s16): Remove.
30145 (vqabsq_m_s16): Remove.
30146 (vqnegq_m_s32): Remove.
30147 (vqabsq_m_s32): Remove.
30148 (__arm_vqabsq_s8): Remove.
30149 (__arm_vqabsq_s16): Remove.
30150 (__arm_vqabsq_s32): Remove.
30151 (__arm_vqnegq_s8): Remove.
30152 (__arm_vqnegq_s16): Remove.
30153 (__arm_vqnegq_s32): Remove.
30154 (__arm_vqnegq_m_s8): Remove.
30155 (__arm_vqabsq_m_s8): Remove.
30156 (__arm_vqnegq_m_s16): Remove.
30157 (__arm_vqabsq_m_s16): Remove.
30158 (__arm_vqnegq_m_s32): Remove.
30159 (__arm_vqabsq_m_s32): Remove.
30160 (__arm_vqabsq): Remove.
30161 (__arm_vqnegq): Remove.
30162 (__arm_vqnegq_m): Remove.
30163 (__arm_vqabsq_m): Remove.
30165 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30167 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
30168 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
30169 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
30170 vrndm, vrndn, vrndp, vrnd, vrndx.
30171 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
30172 VQABSQ_M_S, VQNEGQ_M_S.
30174 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
30175 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
30176 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
30177 (@mve_<mve_insn>q_f<mode>): ... this.
30178 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
30179 (mve_v<absneg_str>q_f<mode>): ... this.
30180 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
30181 (mve_v<absneg_str>q_s<mode>): ... this.
30182 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
30183 (@mve_<mve_insn>q_<supf><mode>): ... this.
30184 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
30185 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
30186 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
30187 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
30188 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
30189 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
30190 (mve_vrndxq_m_f<mode>): Merge into ...
30191 (@mve_<mve_insn>q_m_f<mode>): ... this.
30193 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
30195 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
30196 * config/arm/arm-mve-builtins-shapes.h (unary): New.
30198 2023-05-09 Jakub Jelinek <jakub@redhat.com>
30200 * mux-utils.h: Fix comment typo, avoides -> avoids.
30202 2023-05-09 Jakub Jelinek <jakub@redhat.com>
30204 PR tree-optimization/109778
30205 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
30206 wi::zext (x, width) rather than x if width != precision, rather
30207 than using wi::zext (right, width) after the shift.
30208 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
30209 of wi::lrotate or wi::rrotate.
30211 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
30213 * genmatch.cc (get_out_file): Make static and rename to ...
30214 (choose_output): ... this. Reimplement. Update all uses ...
30215 (decision_tree::gen): ... here and ...
30218 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
30220 * genmatch.cc (showUsage): Reimplement as ...
30221 (usage): ...this. Adjust all uses.
30222 (main): Print usage when no arguments. Add missing 'return 1'.
30224 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
30226 * genmatch.cc (header_file): Make static.
30227 (emit_func): Rename to...
30228 (fp_decl): ... this. Adjust all uses.
30229 (fp_decl_done): New function. Use it...
30230 (decision_tree::gen): ... here and...
30231 (write_predicate): ... here.
30234 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
30236 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
30239 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
30240 Uros Bizjak <ubizjak@gmail.com>
30242 * config/i386/i386.md (any_or_plus): Move definition earlier.
30243 (*insvti_highpart_1): New define_insn_and_split to overwrite
30244 (insv) the highpart of a TImode register/memory.
30246 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
30248 * auto-profile.cc (auto_profile): Check todo from early_inline
30249 to see if cleanup_tree_vfg needs to be called.
30250 (early_inline): Return todo from early_inliner.
30252 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
30254 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
30256 (pass_vsetvl::get_block_info): New.
30257 (pass_vsetvl::update_vector_info): New.
30258 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
30259 (pass_vsetvl::compute_local_backward_infos): Ditto.
30260 (pass_vsetvl::transfer_before): Ditto.
30261 (pass_vsetvl::transfer_after): Ditto.
30262 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
30263 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
30264 (pass_vsetvl::cleanup_insns): Ditto.
30265 (pass_vsetvl::compute_local_backward_infos): Use
30266 update_vector_info.
30268 2023-05-08 Jeff Law <jlaw@ventanamicro>
30270 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
30272 2023-05-08 Richard Biener <rguenther@suse.de>
30273 Michael Meissner <meissner@linux.ibm.com>
30275 PR middle-end/108623
30276 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
30277 Align bit fields > 1 bit to at least an 8-bit boundary.
30279 2023-05-08 Andrew Pinski <apinski@marvell.com>
30281 PR tree-optimization/109424
30282 PR tree-optimization/59424
30283 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
30284 (factor_out_conditional_operation): This and add support for all unary
30286 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
30287 to call factor_out_conditional_operation instead.
30289 2023-05-08 Andrew Pinski <apinski@marvell.com>
30291 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
30292 over factor_out_conditional_conversion.
30294 2023-05-08 Andrew Pinski <apinski@marvell.com>
30296 PR tree-optimization/49959
30297 PR tree-optimization/103771
30298 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
30299 Diamond shapped bb form for factor_out_conditional_conversion.
30301 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30303 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
30304 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
30305 (riscv_vector_get_mask_mode): Ditto.
30306 (get_mask_policy_no_pred): Ditto.
30307 (get_tail_policy_no_pred): Ditto.
30308 (get_mask_mode): New function.
30309 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
30310 (get_tail_policy_no_pred): Ditto.
30311 (riscv_vector_mask_mode_p): Ditto.
30312 (riscv_vector_get_mask_mode): Ditto.
30313 (get_mask_mode): New function.
30314 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
30316 (get_tail_policy_for_pred): Ditto.
30317 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
30318 (get_mask_policy_for_pred): Ditto
30319 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
30321 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
30323 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
30324 (riscv_select_multilib): New.
30325 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
30326 also handle select_by_abi.
30327 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
30328 to select_by_abi_arch_cmodel from 1.
30329 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
30330 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
30332 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
30334 * Makefile.in: (gimple-match-head.o-warn): Remove.
30335 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
30336 gimple-match-exports.cc.
30337 (gimple-match-auto.h): Only depend on s-gimple-match.
30338 (generic-match-auto.h): Likewise.
30340 2023-05-08 Andrew Pinski <apinski@marvell.com>
30342 PR tree-optimization/109691
30343 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
30345 If the removed statement can throw, have need_eh_cleanup
30346 include the bb of that statement.
30347 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
30348 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
30350 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
30351 Initialize dceworklist instead of stmts_to_remove.
30352 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
30353 Destore dceworklist instead of stmts_to_remove.
30354 (substitute_and_fold_dom_walker::before_dom_children):
30355 Set dceworklist instead of adding to stmts_to_remove.
30356 (substitute_and_fold_engine::substitute_and_fold):
30357 Call simple_dce_from_worklist instead of poping
30359 Don't update the stat on removal statements.
30361 2023-05-07 Andrew Pinski <apinski@marvell.com>
30364 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
30365 Change argument type to aarch64_feature_flags.
30366 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
30367 constructor argument type to aarch64_feature_flags.
30368 Change m_old_asm_isa_flags to be aarch64_feature_flags.
30370 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
30372 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
30373 more parallel code if can_create_pseudo_p.
30375 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
30378 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
30379 immediately before moving a multi-word register by parts.
30381 2023-05-06 Jeff Law <jlaw@ventanamicro>
30383 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
30385 2023-05-06 Michael Collison <collison@rivosinc.com>
30387 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
30388 Check that GET_MODE_NUNITS is a multiple of 2.
30390 2023-05-06 Michael Collison <collison@rivosinc.com>
30392 * config/riscv/riscv.cc
30393 (riscv_estimated_poly_value): Implement
30394 TARGET_ESTIMATED_POLY_VALUE.
30395 (riscv_preferred_simd_mode): Implement
30396 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
30397 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
30398 (riscv_empty_mask_is_expensive): Implement
30399 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
30400 (riscv_vectorize_create_costs): Implement
30401 TARGET_VECTORIZE_CREATE_COSTS.
30402 (riscv_support_vector_misalignment): Implement
30403 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
30404 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
30405 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
30406 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
30407 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
30409 2023-05-06 Jeff Law <jlaw@ventanamicro>
30411 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
30412 duplicate definition.
30414 2023-05-06 Michael Collison <collison@rivosinc.com>
30416 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
30417 (riscv_vector_preferred_simd_mode): Ditto.
30418 (get_mask_policy_no_pred): Ditto.
30419 (get_tail_policy_no_pred): Ditto.
30420 (riscv_vector_mask_mode_p): Ditto.
30421 (riscv_vector_get_mask_mode): Ditto.
30423 2023-05-06 Michael Collison <collison@rivosinc.com>
30425 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
30426 Remove static declaration to to make externally visible.
30427 (get_mask_policy_for_pred): Ditto.
30428 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
30429 New external declaration.
30430 (get_mask_policy_for_pred): Ditto.
30432 2023-05-06 Michael Collison <collison@rivosinc.com>
30434 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
30435 (riscv_vector_get_mask_mode): Ditto.
30436 (get_mask_policy_no_pred): Ditto.
30437 (get_tail_policy_no_pred): Ditto.
30439 2023-05-06 Xi Ruoyao <xry111@xry111.site>
30441 * config/loongarch/loongarch.h (struct machine_function): Add
30442 reg_is_wrapped_separately array for register wrapping
30444 * config/loongarch/loongarch.cc
30445 (loongarch_get_separate_components): New function.
30446 (loongarch_components_for_bb): Likewise.
30447 (loongarch_disqualify_components): Likewise.
30448 (loongarch_process_components): Likewise.
30449 (loongarch_emit_prologue_components): Likewise.
30450 (loongarch_emit_epilogue_components): Likewise.
30451 (loongarch_set_handled_components): Likewise.
30452 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
30453 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
30454 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
30455 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
30456 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
30457 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
30458 (loongarch_for_each_saved_reg): Skip registers that are wrapped
30461 2023-05-06 Xi Ruoyao <xry111@xry111.site>
30464 * Makefile.in (s-macro_list): Pass -nostdinc to
30467 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30469 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
30470 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
30471 (preferred_simd_mode): Ditto.
30472 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
30473 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
30474 (riscv_preferred_simd_mode): New function.
30475 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
30476 * config/riscv/vector.md: Add autovec.md.
30477 * config/riscv/autovec.md: New file.
30479 2023-05-06 Jakub Jelinek <jakub@redhat.com>
30481 * real.h (dconst_pi): Define.
30482 (dconst_e_ptr): Formatting fix.
30483 (dconst_pi_ptr): Declare.
30484 * real.cc (dconst_pi_ptr): New function.
30485 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
30486 boundaries range with range computed from sin/cos of the particular
30487 bounds if the argument range is shorter than 2*pi.
30488 (cfn_sincos::op1_range): Take bulps into account when determining
30489 which result ranges are always invalid or behave like known NAN.
30491 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
30493 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
30494 pass type to vrange_storage::equal_p.
30495 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
30496 (irange_storage::equal_p): Same.
30497 (frange_storage::equal_p): Same.
30498 * value-range-storage.h (class frange_storage): Same.
30500 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30503 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
30504 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
30506 2023-05-06 liuhongt <hongtao.liu@intel.com>
30508 * combine.cc (maybe_swap_commutative_operands): Canonicalize
30509 vec_merge when mask is constant.
30510 * doc/md.texi: Document vec_merge canonicalization.
30512 2023-05-06 Jakub Jelinek <jakub@redhat.com>
30514 * value-range.h (frange_arithmetic): Declare.
30515 * range-op-float.cc (frange_arithmetic): No longer static.
30516 * gimple-range-op.cc (frange_mpfr_arg1): New function.
30517 (cfn_sqrt::fold_range): Intersect the generic boundaries range
30518 with range computed from sqrt of the particular bounds.
30519 (cfn_sqrt::op1_range): Intersect the generic boundaries range
30520 with range computed from squared particular bounds.
30522 2023-05-06 Jakub Jelinek <jakub@redhat.com>
30524 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
30525 earlier with helper variables also renamed.
30526 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
30527 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
30528 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
30530 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
30532 * config/cris/cris.md (splitop): Add PLUS.
30533 * config/cris/cris.cc (cris_split_constant): Also handle
30534 PLUS when a split into two insns may be useful.
30536 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
30538 * config/cris/cris.md (movandsplit1): New define_peephole2.
30540 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
30542 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
30544 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
30546 * doc/md.texi (define_peephole2): Document order of scanning.
30548 2023-05-05 Pan Li <pan2.li@intel.com>
30549 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30551 * config/riscv/vector.md: Allow const as the operand of RVV
30552 indexed load/store.
30554 2023-05-05 Pan Li <pan2.li@intel.com>
30556 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
30557 consumed by simplify_rtx.
30559 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30561 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
30562 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
30563 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
30564 * config/arm/arm_mve.h (vshrq): Remove.
30566 (vrshrq_m): Remove.
30568 (vrshrq_x): Remove.
30570 (vshrq_n_s8): Remove.
30571 (vshrq_n_s16): Remove.
30572 (vshrq_n_s32): Remove.
30573 (vshrq_n_u8): Remove.
30574 (vshrq_n_u16): Remove.
30575 (vshrq_n_u32): Remove.
30576 (vrshrq_n_u8): Remove.
30577 (vrshrq_n_s8): Remove.
30578 (vrshrq_n_u16): Remove.
30579 (vrshrq_n_s16): Remove.
30580 (vrshrq_n_u32): Remove.
30581 (vrshrq_n_s32): Remove.
30582 (vrshrq_m_n_s8): Remove.
30583 (vrshrq_m_n_s32): Remove.
30584 (vrshrq_m_n_s16): Remove.
30585 (vrshrq_m_n_u8): Remove.
30586 (vrshrq_m_n_u32): Remove.
30587 (vrshrq_m_n_u16): Remove.
30588 (vshrq_m_n_s8): Remove.
30589 (vshrq_m_n_s32): Remove.
30590 (vshrq_m_n_s16): Remove.
30591 (vshrq_m_n_u8): Remove.
30592 (vshrq_m_n_u32): Remove.
30593 (vshrq_m_n_u16): Remove.
30594 (vrshrq_x_n_s8): Remove.
30595 (vrshrq_x_n_s16): Remove.
30596 (vrshrq_x_n_s32): Remove.
30597 (vrshrq_x_n_u8): Remove.
30598 (vrshrq_x_n_u16): Remove.
30599 (vrshrq_x_n_u32): Remove.
30600 (vshrq_x_n_s8): Remove.
30601 (vshrq_x_n_s16): Remove.
30602 (vshrq_x_n_s32): Remove.
30603 (vshrq_x_n_u8): Remove.
30604 (vshrq_x_n_u16): Remove.
30605 (vshrq_x_n_u32): Remove.
30606 (__arm_vshrq_n_s8): Remove.
30607 (__arm_vshrq_n_s16): Remove.
30608 (__arm_vshrq_n_s32): Remove.
30609 (__arm_vshrq_n_u8): Remove.
30610 (__arm_vshrq_n_u16): Remove.
30611 (__arm_vshrq_n_u32): Remove.
30612 (__arm_vrshrq_n_u8): Remove.
30613 (__arm_vrshrq_n_s8): Remove.
30614 (__arm_vrshrq_n_u16): Remove.
30615 (__arm_vrshrq_n_s16): Remove.
30616 (__arm_vrshrq_n_u32): Remove.
30617 (__arm_vrshrq_n_s32): Remove.
30618 (__arm_vrshrq_m_n_s8): Remove.
30619 (__arm_vrshrq_m_n_s32): Remove.
30620 (__arm_vrshrq_m_n_s16): Remove.
30621 (__arm_vrshrq_m_n_u8): Remove.
30622 (__arm_vrshrq_m_n_u32): Remove.
30623 (__arm_vrshrq_m_n_u16): Remove.
30624 (__arm_vshrq_m_n_s8): Remove.
30625 (__arm_vshrq_m_n_s32): Remove.
30626 (__arm_vshrq_m_n_s16): Remove.
30627 (__arm_vshrq_m_n_u8): Remove.
30628 (__arm_vshrq_m_n_u32): Remove.
30629 (__arm_vshrq_m_n_u16): Remove.
30630 (__arm_vrshrq_x_n_s8): Remove.
30631 (__arm_vrshrq_x_n_s16): Remove.
30632 (__arm_vrshrq_x_n_s32): Remove.
30633 (__arm_vrshrq_x_n_u8): Remove.
30634 (__arm_vrshrq_x_n_u16): Remove.
30635 (__arm_vrshrq_x_n_u32): Remove.
30636 (__arm_vshrq_x_n_s8): Remove.
30637 (__arm_vshrq_x_n_s16): Remove.
30638 (__arm_vshrq_x_n_s32): Remove.
30639 (__arm_vshrq_x_n_u8): Remove.
30640 (__arm_vshrq_x_n_u16): Remove.
30641 (__arm_vshrq_x_n_u32): Remove.
30642 (__arm_vshrq): Remove.
30643 (__arm_vrshrq): Remove.
30644 (__arm_vrshrq_m): Remove.
30645 (__arm_vshrq_m): Remove.
30646 (__arm_vrshrq_x): Remove.
30647 (__arm_vshrq_x): Remove.
30649 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30651 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
30652 (mve_insn): Add vrshr, vshr.
30653 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
30654 (mve_vrshrq_n_<supf><mode>): Merge into ...
30655 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30656 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
30658 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30660 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30662 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
30663 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
30665 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30667 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
30668 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
30669 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
30670 (vqrshrunbq, vqrshruntq): New.
30671 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
30672 (vqrshrunbq, vqrshruntq): New.
30673 * config/arm/arm-mve-builtins.cc
30674 (function_instance::has_inactive_argument): Handle vqshrunbq,
30675 vqshruntq, vqrshrunbq, vqrshruntq.
30676 * config/arm/arm_mve.h (vqrshrunbq): Remove.
30677 (vqrshruntq): Remove.
30678 (vqrshrunbq_m): Remove.
30679 (vqrshruntq_m): Remove.
30680 (vqrshrunbq_n_s16): Remove.
30681 (vqrshrunbq_n_s32): Remove.
30682 (vqrshruntq_n_s16): Remove.
30683 (vqrshruntq_n_s32): Remove.
30684 (vqrshrunbq_m_n_s32): Remove.
30685 (vqrshrunbq_m_n_s16): Remove.
30686 (vqrshruntq_m_n_s32): Remove.
30687 (vqrshruntq_m_n_s16): Remove.
30688 (__arm_vqrshrunbq_n_s16): Remove.
30689 (__arm_vqrshrunbq_n_s32): Remove.
30690 (__arm_vqrshruntq_n_s16): Remove.
30691 (__arm_vqrshruntq_n_s32): Remove.
30692 (__arm_vqrshrunbq_m_n_s32): Remove.
30693 (__arm_vqrshrunbq_m_n_s16): Remove.
30694 (__arm_vqrshruntq_m_n_s32): Remove.
30695 (__arm_vqrshruntq_m_n_s16): Remove.
30696 (__arm_vqrshrunbq): Remove.
30697 (__arm_vqrshruntq): Remove.
30698 (__arm_vqrshrunbq_m): Remove.
30699 (__arm_vqrshruntq_m): Remove.
30700 (vqshrunbq): Remove.
30701 (vqshruntq): Remove.
30702 (vqshrunbq_m): Remove.
30703 (vqshruntq_m): Remove.
30704 (vqshrunbq_n_s16): Remove.
30705 (vqshruntq_n_s16): Remove.
30706 (vqshrunbq_n_s32): Remove.
30707 (vqshruntq_n_s32): Remove.
30708 (vqshrunbq_m_n_s32): Remove.
30709 (vqshrunbq_m_n_s16): Remove.
30710 (vqshruntq_m_n_s32): Remove.
30711 (vqshruntq_m_n_s16): Remove.
30712 (__arm_vqshrunbq_n_s16): Remove.
30713 (__arm_vqshruntq_n_s16): Remove.
30714 (__arm_vqshrunbq_n_s32): Remove.
30715 (__arm_vqshruntq_n_s32): Remove.
30716 (__arm_vqshrunbq_m_n_s32): Remove.
30717 (__arm_vqshrunbq_m_n_s16): Remove.
30718 (__arm_vqshruntq_m_n_s32): Remove.
30719 (__arm_vqshruntq_m_n_s16): Remove.
30720 (__arm_vqshrunbq): Remove.
30721 (__arm_vqshruntq): Remove.
30722 (__arm_vqshrunbq_m): Remove.
30723 (__arm_vqshruntq_m): Remove.
30725 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30727 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
30728 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
30729 (MVE_SHRN_M_N): Likewise.
30730 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
30731 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
30733 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
30734 (mve_vqrshruntq_n_s<mode>): Remove.
30735 (mve_vqshrunbq_n_s<mode>): Remove.
30736 (mve_vqshruntq_n_s<mode>): Remove.
30737 (mve_vqrshrunbq_m_n_s<mode>): Remove.
30738 (mve_vqrshruntq_m_n_s<mode>): Remove.
30739 (mve_vqshrunbq_m_n_s<mode>): Remove.
30740 (mve_vqshruntq_m_n_s<mode>): Remove.
30742 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30744 * config/arm/arm-mve-builtins-shapes.cc
30745 (binary_rshift_narrow_unsigned): New.
30746 * config/arm/arm-mve-builtins-shapes.h
30747 (binary_rshift_narrow_unsigned): New.
30749 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30751 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
30752 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
30753 (vqrshrnbq, vqrshrntq): New.
30754 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
30755 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
30757 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
30758 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
30759 * config/arm/arm-mve-builtins.cc
30760 (function_instance::has_inactive_argument): Handle vshrnbq,
30761 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
30763 * config/arm/arm_mve.h (vshrnbq): Remove.
30765 (vshrnbq_m): Remove.
30766 (vshrntq_m): Remove.
30767 (vshrnbq_n_s16): Remove.
30768 (vshrntq_n_s16): Remove.
30769 (vshrnbq_n_u16): Remove.
30770 (vshrntq_n_u16): Remove.
30771 (vshrnbq_n_s32): Remove.
30772 (vshrntq_n_s32): Remove.
30773 (vshrnbq_n_u32): Remove.
30774 (vshrntq_n_u32): Remove.
30775 (vshrnbq_m_n_s32): Remove.
30776 (vshrnbq_m_n_s16): Remove.
30777 (vshrnbq_m_n_u32): Remove.
30778 (vshrnbq_m_n_u16): Remove.
30779 (vshrntq_m_n_s32): Remove.
30780 (vshrntq_m_n_s16): Remove.
30781 (vshrntq_m_n_u32): Remove.
30782 (vshrntq_m_n_u16): Remove.
30783 (__arm_vshrnbq_n_s16): Remove.
30784 (__arm_vshrntq_n_s16): Remove.
30785 (__arm_vshrnbq_n_u16): Remove.
30786 (__arm_vshrntq_n_u16): Remove.
30787 (__arm_vshrnbq_n_s32): Remove.
30788 (__arm_vshrntq_n_s32): Remove.
30789 (__arm_vshrnbq_n_u32): Remove.
30790 (__arm_vshrntq_n_u32): Remove.
30791 (__arm_vshrnbq_m_n_s32): Remove.
30792 (__arm_vshrnbq_m_n_s16): Remove.
30793 (__arm_vshrnbq_m_n_u32): Remove.
30794 (__arm_vshrnbq_m_n_u16): Remove.
30795 (__arm_vshrntq_m_n_s32): Remove.
30796 (__arm_vshrntq_m_n_s16): Remove.
30797 (__arm_vshrntq_m_n_u32): Remove.
30798 (__arm_vshrntq_m_n_u16): Remove.
30799 (__arm_vshrnbq): Remove.
30800 (__arm_vshrntq): Remove.
30801 (__arm_vshrnbq_m): Remove.
30802 (__arm_vshrntq_m): Remove.
30803 (vrshrnbq): Remove.
30804 (vrshrntq): Remove.
30805 (vrshrnbq_m): Remove.
30806 (vrshrntq_m): Remove.
30807 (vrshrnbq_n_s16): Remove.
30808 (vrshrntq_n_s16): Remove.
30809 (vrshrnbq_n_u16): Remove.
30810 (vrshrntq_n_u16): Remove.
30811 (vrshrnbq_n_s32): Remove.
30812 (vrshrntq_n_s32): Remove.
30813 (vrshrnbq_n_u32): Remove.
30814 (vrshrntq_n_u32): Remove.
30815 (vrshrnbq_m_n_s32): Remove.
30816 (vrshrnbq_m_n_s16): Remove.
30817 (vrshrnbq_m_n_u32): Remove.
30818 (vrshrnbq_m_n_u16): Remove.
30819 (vrshrntq_m_n_s32): Remove.
30820 (vrshrntq_m_n_s16): Remove.
30821 (vrshrntq_m_n_u32): Remove.
30822 (vrshrntq_m_n_u16): Remove.
30823 (__arm_vrshrnbq_n_s16): Remove.
30824 (__arm_vrshrntq_n_s16): Remove.
30825 (__arm_vrshrnbq_n_u16): Remove.
30826 (__arm_vrshrntq_n_u16): Remove.
30827 (__arm_vrshrnbq_n_s32): Remove.
30828 (__arm_vrshrntq_n_s32): Remove.
30829 (__arm_vrshrnbq_n_u32): Remove.
30830 (__arm_vrshrntq_n_u32): Remove.
30831 (__arm_vrshrnbq_m_n_s32): Remove.
30832 (__arm_vrshrnbq_m_n_s16): Remove.
30833 (__arm_vrshrnbq_m_n_u32): Remove.
30834 (__arm_vrshrnbq_m_n_u16): Remove.
30835 (__arm_vrshrntq_m_n_s32): Remove.
30836 (__arm_vrshrntq_m_n_s16): Remove.
30837 (__arm_vrshrntq_m_n_u32): Remove.
30838 (__arm_vrshrntq_m_n_u16): Remove.
30839 (__arm_vrshrnbq): Remove.
30840 (__arm_vrshrntq): Remove.
30841 (__arm_vrshrnbq_m): Remove.
30842 (__arm_vrshrntq_m): Remove.
30843 (vqshrnbq): Remove.
30844 (vqshrntq): Remove.
30845 (vqshrnbq_m): Remove.
30846 (vqshrntq_m): Remove.
30847 (vqshrnbq_n_s16): Remove.
30848 (vqshrntq_n_s16): Remove.
30849 (vqshrnbq_n_u16): Remove.
30850 (vqshrntq_n_u16): Remove.
30851 (vqshrnbq_n_s32): Remove.
30852 (vqshrntq_n_s32): Remove.
30853 (vqshrnbq_n_u32): Remove.
30854 (vqshrntq_n_u32): Remove.
30855 (vqshrnbq_m_n_s32): Remove.
30856 (vqshrnbq_m_n_s16): Remove.
30857 (vqshrnbq_m_n_u32): Remove.
30858 (vqshrnbq_m_n_u16): Remove.
30859 (vqshrntq_m_n_s32): Remove.
30860 (vqshrntq_m_n_s16): Remove.
30861 (vqshrntq_m_n_u32): Remove.
30862 (vqshrntq_m_n_u16): Remove.
30863 (__arm_vqshrnbq_n_s16): Remove.
30864 (__arm_vqshrntq_n_s16): Remove.
30865 (__arm_vqshrnbq_n_u16): Remove.
30866 (__arm_vqshrntq_n_u16): Remove.
30867 (__arm_vqshrnbq_n_s32): Remove.
30868 (__arm_vqshrntq_n_s32): Remove.
30869 (__arm_vqshrnbq_n_u32): Remove.
30870 (__arm_vqshrntq_n_u32): Remove.
30871 (__arm_vqshrnbq_m_n_s32): Remove.
30872 (__arm_vqshrnbq_m_n_s16): Remove.
30873 (__arm_vqshrnbq_m_n_u32): Remove.
30874 (__arm_vqshrnbq_m_n_u16): Remove.
30875 (__arm_vqshrntq_m_n_s32): Remove.
30876 (__arm_vqshrntq_m_n_s16): Remove.
30877 (__arm_vqshrntq_m_n_u32): Remove.
30878 (__arm_vqshrntq_m_n_u16): Remove.
30879 (__arm_vqshrnbq): Remove.
30880 (__arm_vqshrntq): Remove.
30881 (__arm_vqshrnbq_m): Remove.
30882 (__arm_vqshrntq_m): Remove.
30883 (vqrshrnbq): Remove.
30884 (vqrshrntq): Remove.
30885 (vqrshrnbq_m): Remove.
30886 (vqrshrntq_m): Remove.
30887 (vqrshrnbq_n_s16): Remove.
30888 (vqrshrnbq_n_u16): Remove.
30889 (vqrshrnbq_n_s32): Remove.
30890 (vqrshrnbq_n_u32): Remove.
30891 (vqrshrntq_n_s16): Remove.
30892 (vqrshrntq_n_u16): Remove.
30893 (vqrshrntq_n_s32): Remove.
30894 (vqrshrntq_n_u32): Remove.
30895 (vqrshrnbq_m_n_s32): Remove.
30896 (vqrshrnbq_m_n_s16): Remove.
30897 (vqrshrnbq_m_n_u32): Remove.
30898 (vqrshrnbq_m_n_u16): Remove.
30899 (vqrshrntq_m_n_s32): Remove.
30900 (vqrshrntq_m_n_s16): Remove.
30901 (vqrshrntq_m_n_u32): Remove.
30902 (vqrshrntq_m_n_u16): Remove.
30903 (__arm_vqrshrnbq_n_s16): Remove.
30904 (__arm_vqrshrnbq_n_u16): Remove.
30905 (__arm_vqrshrnbq_n_s32): Remove.
30906 (__arm_vqrshrnbq_n_u32): Remove.
30907 (__arm_vqrshrntq_n_s16): Remove.
30908 (__arm_vqrshrntq_n_u16): Remove.
30909 (__arm_vqrshrntq_n_s32): Remove.
30910 (__arm_vqrshrntq_n_u32): Remove.
30911 (__arm_vqrshrnbq_m_n_s32): Remove.
30912 (__arm_vqrshrnbq_m_n_s16): Remove.
30913 (__arm_vqrshrnbq_m_n_u32): Remove.
30914 (__arm_vqrshrnbq_m_n_u16): Remove.
30915 (__arm_vqrshrntq_m_n_s32): Remove.
30916 (__arm_vqrshrntq_m_n_s16): Remove.
30917 (__arm_vqrshrntq_m_n_u32): Remove.
30918 (__arm_vqrshrntq_m_n_u16): Remove.
30919 (__arm_vqrshrnbq): Remove.
30920 (__arm_vqrshrntq): Remove.
30921 (__arm_vqrshrnbq_m): Remove.
30922 (__arm_vqrshrntq_m): Remove.
30924 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30926 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
30927 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
30928 vrshrnt, vshrnb, vshrnt.
30930 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
30931 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
30932 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
30933 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
30934 (mve_vshrntq_n_<supf><mode>): Merge into ...
30935 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
30936 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
30937 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
30938 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
30939 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
30941 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
30943 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30945 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
30947 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
30949 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
30951 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
30952 (vmaxq, vminq): New.
30953 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
30954 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
30955 * config/arm/arm_mve.h (vminq): Remove.
30961 (vminq_u8): Remove.
30962 (vmaxq_u8): Remove.
30963 (vminq_s8): Remove.
30964 (vmaxq_s8): Remove.
30965 (vminq_u16): Remove.
30966 (vmaxq_u16): Remove.
30967 (vminq_s16): Remove.
30968 (vmaxq_s16): Remove.
30969 (vminq_u32): Remove.
30970 (vmaxq_u32): Remove.
30971 (vminq_s32): Remove.
30972 (vmaxq_s32): Remove.
30973 (vmaxq_m_s8): Remove.
30974 (vmaxq_m_s32): Remove.
30975 (vmaxq_m_s16): Remove.
30976 (vmaxq_m_u8): Remove.
30977 (vmaxq_m_u32): Remove.
30978 (vmaxq_m_u16): Remove.
30979 (vminq_m_s8): Remove.
30980 (vminq_m_s32): Remove.
30981 (vminq_m_s16): Remove.
30982 (vminq_m_u8): Remove.
30983 (vminq_m_u32): Remove.
30984 (vminq_m_u16): Remove.
30985 (vminq_x_s8): Remove.
30986 (vminq_x_s16): Remove.
30987 (vminq_x_s32): Remove.
30988 (vminq_x_u8): Remove.
30989 (vminq_x_u16): Remove.
30990 (vminq_x_u32): Remove.
30991 (vmaxq_x_s8): Remove.
30992 (vmaxq_x_s16): Remove.
30993 (vmaxq_x_s32): Remove.
30994 (vmaxq_x_u8): Remove.
30995 (vmaxq_x_u16): Remove.
30996 (vmaxq_x_u32): Remove.
30997 (__arm_vminq_u8): Remove.
30998 (__arm_vmaxq_u8): Remove.
30999 (__arm_vminq_s8): Remove.
31000 (__arm_vmaxq_s8): Remove.
31001 (__arm_vminq_u16): Remove.
31002 (__arm_vmaxq_u16): Remove.
31003 (__arm_vminq_s16): Remove.
31004 (__arm_vmaxq_s16): Remove.
31005 (__arm_vminq_u32): Remove.
31006 (__arm_vmaxq_u32): Remove.
31007 (__arm_vminq_s32): Remove.
31008 (__arm_vmaxq_s32): Remove.
31009 (__arm_vmaxq_m_s8): Remove.
31010 (__arm_vmaxq_m_s32): Remove.
31011 (__arm_vmaxq_m_s16): Remove.
31012 (__arm_vmaxq_m_u8): Remove.
31013 (__arm_vmaxq_m_u32): Remove.
31014 (__arm_vmaxq_m_u16): Remove.
31015 (__arm_vminq_m_s8): Remove.
31016 (__arm_vminq_m_s32): Remove.
31017 (__arm_vminq_m_s16): Remove.
31018 (__arm_vminq_m_u8): Remove.
31019 (__arm_vminq_m_u32): Remove.
31020 (__arm_vminq_m_u16): Remove.
31021 (__arm_vminq_x_s8): Remove.
31022 (__arm_vminq_x_s16): Remove.
31023 (__arm_vminq_x_s32): Remove.
31024 (__arm_vminq_x_u8): Remove.
31025 (__arm_vminq_x_u16): Remove.
31026 (__arm_vminq_x_u32): Remove.
31027 (__arm_vmaxq_x_s8): Remove.
31028 (__arm_vmaxq_x_s16): Remove.
31029 (__arm_vmaxq_x_s32): Remove.
31030 (__arm_vmaxq_x_u8): Remove.
31031 (__arm_vmaxq_x_u16): Remove.
31032 (__arm_vmaxq_x_u32): Remove.
31033 (__arm_vminq): Remove.
31034 (__arm_vmaxq): Remove.
31035 (__arm_vmaxq_m): Remove.
31036 (__arm_vminq_m): Remove.
31037 (__arm_vminq_x): Remove.
31038 (__arm_vmaxq_x): Remove.
31040 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31042 * config/arm/iterators.md (MAX_MIN_SU): New.
31043 (max_min_su_str): New.
31044 (max_min_supf): New.
31045 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
31046 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
31047 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
31049 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31051 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
31052 (vqshlq, vshlq): New.
31053 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
31054 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
31055 * config/arm/arm_mve.h (vshlq): Remove.
31058 (vshlq_m_r): Remove.
31060 (vshlq_m_n): Remove.
31062 (vshlq_x_n): Remove.
31063 (vshlq_s8): Remove.
31064 (vshlq_s16): Remove.
31065 (vshlq_s32): Remove.
31066 (vshlq_u8): Remove.
31067 (vshlq_u16): Remove.
31068 (vshlq_u32): Remove.
31069 (vshlq_r_u8): Remove.
31070 (vshlq_n_u8): Remove.
31071 (vshlq_r_s8): Remove.
31072 (vshlq_n_s8): Remove.
31073 (vshlq_r_u16): Remove.
31074 (vshlq_n_u16): Remove.
31075 (vshlq_r_s16): Remove.
31076 (vshlq_n_s16): Remove.
31077 (vshlq_r_u32): Remove.
31078 (vshlq_n_u32): Remove.
31079 (vshlq_r_s32): Remove.
31080 (vshlq_n_s32): Remove.
31081 (vshlq_m_r_u8): Remove.
31082 (vshlq_m_r_s8): Remove.
31083 (vshlq_m_r_u16): Remove.
31084 (vshlq_m_r_s16): Remove.
31085 (vshlq_m_r_u32): Remove.
31086 (vshlq_m_r_s32): Remove.
31087 (vshlq_m_u8): Remove.
31088 (vshlq_m_s8): Remove.
31089 (vshlq_m_u16): Remove.
31090 (vshlq_m_s16): Remove.
31091 (vshlq_m_u32): Remove.
31092 (vshlq_m_s32): Remove.
31093 (vshlq_m_n_s8): Remove.
31094 (vshlq_m_n_s32): Remove.
31095 (vshlq_m_n_s16): Remove.
31096 (vshlq_m_n_u8): Remove.
31097 (vshlq_m_n_u32): Remove.
31098 (vshlq_m_n_u16): Remove.
31099 (vshlq_x_s8): Remove.
31100 (vshlq_x_s16): Remove.
31101 (vshlq_x_s32): Remove.
31102 (vshlq_x_u8): Remove.
31103 (vshlq_x_u16): Remove.
31104 (vshlq_x_u32): Remove.
31105 (vshlq_x_n_s8): Remove.
31106 (vshlq_x_n_s16): Remove.
31107 (vshlq_x_n_s32): Remove.
31108 (vshlq_x_n_u8): Remove.
31109 (vshlq_x_n_u16): Remove.
31110 (vshlq_x_n_u32): Remove.
31111 (__arm_vshlq_s8): Remove.
31112 (__arm_vshlq_s16): Remove.
31113 (__arm_vshlq_s32): Remove.
31114 (__arm_vshlq_u8): Remove.
31115 (__arm_vshlq_u16): Remove.
31116 (__arm_vshlq_u32): Remove.
31117 (__arm_vshlq_r_u8): Remove.
31118 (__arm_vshlq_n_u8): Remove.
31119 (__arm_vshlq_r_s8): Remove.
31120 (__arm_vshlq_n_s8): Remove.
31121 (__arm_vshlq_r_u16): Remove.
31122 (__arm_vshlq_n_u16): Remove.
31123 (__arm_vshlq_r_s16): Remove.
31124 (__arm_vshlq_n_s16): Remove.
31125 (__arm_vshlq_r_u32): Remove.
31126 (__arm_vshlq_n_u32): Remove.
31127 (__arm_vshlq_r_s32): Remove.
31128 (__arm_vshlq_n_s32): Remove.
31129 (__arm_vshlq_m_r_u8): Remove.
31130 (__arm_vshlq_m_r_s8): Remove.
31131 (__arm_vshlq_m_r_u16): Remove.
31132 (__arm_vshlq_m_r_s16): Remove.
31133 (__arm_vshlq_m_r_u32): Remove.
31134 (__arm_vshlq_m_r_s32): Remove.
31135 (__arm_vshlq_m_u8): Remove.
31136 (__arm_vshlq_m_s8): Remove.
31137 (__arm_vshlq_m_u16): Remove.
31138 (__arm_vshlq_m_s16): Remove.
31139 (__arm_vshlq_m_u32): Remove.
31140 (__arm_vshlq_m_s32): Remove.
31141 (__arm_vshlq_m_n_s8): Remove.
31142 (__arm_vshlq_m_n_s32): Remove.
31143 (__arm_vshlq_m_n_s16): Remove.
31144 (__arm_vshlq_m_n_u8): Remove.
31145 (__arm_vshlq_m_n_u32): Remove.
31146 (__arm_vshlq_m_n_u16): Remove.
31147 (__arm_vshlq_x_s8): Remove.
31148 (__arm_vshlq_x_s16): Remove.
31149 (__arm_vshlq_x_s32): Remove.
31150 (__arm_vshlq_x_u8): Remove.
31151 (__arm_vshlq_x_u16): Remove.
31152 (__arm_vshlq_x_u32): Remove.
31153 (__arm_vshlq_x_n_s8): Remove.
31154 (__arm_vshlq_x_n_s16): Remove.
31155 (__arm_vshlq_x_n_s32): Remove.
31156 (__arm_vshlq_x_n_u8): Remove.
31157 (__arm_vshlq_x_n_u16): Remove.
31158 (__arm_vshlq_x_n_u32): Remove.
31159 (__arm_vshlq): Remove.
31160 (__arm_vshlq_r): Remove.
31161 (__arm_vshlq_n): Remove.
31162 (__arm_vshlq_m_r): Remove.
31163 (__arm_vshlq_m): Remove.
31164 (__arm_vshlq_m_n): Remove.
31165 (__arm_vshlq_x): Remove.
31166 (__arm_vshlq_x_n): Remove.
31168 (vqshlq_r): Remove.
31169 (vqshlq_n): Remove.
31170 (vqshlq_m_r): Remove.
31171 (vqshlq_m_n): Remove.
31172 (vqshlq_m): Remove.
31173 (vqshlq_u8): Remove.
31174 (vqshlq_r_u8): Remove.
31175 (vqshlq_n_u8): Remove.
31176 (vqshlq_s8): Remove.
31177 (vqshlq_r_s8): Remove.
31178 (vqshlq_n_s8): Remove.
31179 (vqshlq_u16): Remove.
31180 (vqshlq_r_u16): Remove.
31181 (vqshlq_n_u16): Remove.
31182 (vqshlq_s16): Remove.
31183 (vqshlq_r_s16): Remove.
31184 (vqshlq_n_s16): Remove.
31185 (vqshlq_u32): Remove.
31186 (vqshlq_r_u32): Remove.
31187 (vqshlq_n_u32): Remove.
31188 (vqshlq_s32): Remove.
31189 (vqshlq_r_s32): Remove.
31190 (vqshlq_n_s32): Remove.
31191 (vqshlq_m_r_u8): Remove.
31192 (vqshlq_m_r_s8): Remove.
31193 (vqshlq_m_r_u16): Remove.
31194 (vqshlq_m_r_s16): Remove.
31195 (vqshlq_m_r_u32): Remove.
31196 (vqshlq_m_r_s32): Remove.
31197 (vqshlq_m_n_s8): Remove.
31198 (vqshlq_m_n_s32): Remove.
31199 (vqshlq_m_n_s16): Remove.
31200 (vqshlq_m_n_u8): Remove.
31201 (vqshlq_m_n_u32): Remove.
31202 (vqshlq_m_n_u16): Remove.
31203 (vqshlq_m_s8): Remove.
31204 (vqshlq_m_s32): Remove.
31205 (vqshlq_m_s16): Remove.
31206 (vqshlq_m_u8): Remove.
31207 (vqshlq_m_u32): Remove.
31208 (vqshlq_m_u16): Remove.
31209 (__arm_vqshlq_u8): Remove.
31210 (__arm_vqshlq_r_u8): Remove.
31211 (__arm_vqshlq_n_u8): Remove.
31212 (__arm_vqshlq_s8): Remove.
31213 (__arm_vqshlq_r_s8): Remove.
31214 (__arm_vqshlq_n_s8): Remove.
31215 (__arm_vqshlq_u16): Remove.
31216 (__arm_vqshlq_r_u16): Remove.
31217 (__arm_vqshlq_n_u16): Remove.
31218 (__arm_vqshlq_s16): Remove.
31219 (__arm_vqshlq_r_s16): Remove.
31220 (__arm_vqshlq_n_s16): Remove.
31221 (__arm_vqshlq_u32): Remove.
31222 (__arm_vqshlq_r_u32): Remove.
31223 (__arm_vqshlq_n_u32): Remove.
31224 (__arm_vqshlq_s32): Remove.
31225 (__arm_vqshlq_r_s32): Remove.
31226 (__arm_vqshlq_n_s32): Remove.
31227 (__arm_vqshlq_m_r_u8): Remove.
31228 (__arm_vqshlq_m_r_s8): Remove.
31229 (__arm_vqshlq_m_r_u16): Remove.
31230 (__arm_vqshlq_m_r_s16): Remove.
31231 (__arm_vqshlq_m_r_u32): Remove.
31232 (__arm_vqshlq_m_r_s32): Remove.
31233 (__arm_vqshlq_m_n_s8): Remove.
31234 (__arm_vqshlq_m_n_s32): Remove.
31235 (__arm_vqshlq_m_n_s16): Remove.
31236 (__arm_vqshlq_m_n_u8): Remove.
31237 (__arm_vqshlq_m_n_u32): Remove.
31238 (__arm_vqshlq_m_n_u16): Remove.
31239 (__arm_vqshlq_m_s8): Remove.
31240 (__arm_vqshlq_m_s32): Remove.
31241 (__arm_vqshlq_m_s16): Remove.
31242 (__arm_vqshlq_m_u8): Remove.
31243 (__arm_vqshlq_m_u32): Remove.
31244 (__arm_vqshlq_m_u16): Remove.
31245 (__arm_vqshlq): Remove.
31246 (__arm_vqshlq_r): Remove.
31247 (__arm_vqshlq_n): Remove.
31248 (__arm_vqshlq_m_r): Remove.
31249 (__arm_vqshlq_m_n): Remove.
31250 (__arm_vqshlq_m): Remove.
31252 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31254 * config/arm/arm-mve-builtins-functions.h (class
31255 unspec_mve_function_exact_insn_vshl): New.
31257 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31259 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
31260 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
31262 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31264 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
31265 (finish_opt_n_resolution): Handle MODE_r.
31266 * config/arm/arm-mve-builtins.def (r): New mode.
31268 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31270 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
31271 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
31273 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31275 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
31277 * config/arm/arm-mve-builtins-base.def (vabdq): New.
31278 * config/arm/arm-mve-builtins-base.h (vabdq): New.
31279 * config/arm/arm_mve.h (vabdq): Remove.
31282 (vabdq_u8): Remove.
31283 (vabdq_s8): Remove.
31284 (vabdq_u16): Remove.
31285 (vabdq_s16): Remove.
31286 (vabdq_u32): Remove.
31287 (vabdq_s32): Remove.
31288 (vabdq_f16): Remove.
31289 (vabdq_f32): Remove.
31290 (vabdq_m_s8): Remove.
31291 (vabdq_m_s32): Remove.
31292 (vabdq_m_s16): Remove.
31293 (vabdq_m_u8): Remove.
31294 (vabdq_m_u32): Remove.
31295 (vabdq_m_u16): Remove.
31296 (vabdq_m_f32): Remove.
31297 (vabdq_m_f16): Remove.
31298 (vabdq_x_s8): Remove.
31299 (vabdq_x_s16): Remove.
31300 (vabdq_x_s32): Remove.
31301 (vabdq_x_u8): Remove.
31302 (vabdq_x_u16): Remove.
31303 (vabdq_x_u32): Remove.
31304 (vabdq_x_f16): Remove.
31305 (vabdq_x_f32): Remove.
31306 (__arm_vabdq_u8): Remove.
31307 (__arm_vabdq_s8): Remove.
31308 (__arm_vabdq_u16): Remove.
31309 (__arm_vabdq_s16): Remove.
31310 (__arm_vabdq_u32): Remove.
31311 (__arm_vabdq_s32): Remove.
31312 (__arm_vabdq_m_s8): Remove.
31313 (__arm_vabdq_m_s32): Remove.
31314 (__arm_vabdq_m_s16): Remove.
31315 (__arm_vabdq_m_u8): Remove.
31316 (__arm_vabdq_m_u32): Remove.
31317 (__arm_vabdq_m_u16): Remove.
31318 (__arm_vabdq_x_s8): Remove.
31319 (__arm_vabdq_x_s16): Remove.
31320 (__arm_vabdq_x_s32): Remove.
31321 (__arm_vabdq_x_u8): Remove.
31322 (__arm_vabdq_x_u16): Remove.
31323 (__arm_vabdq_x_u32): Remove.
31324 (__arm_vabdq_f16): Remove.
31325 (__arm_vabdq_f32): Remove.
31326 (__arm_vabdq_m_f32): Remove.
31327 (__arm_vabdq_m_f16): Remove.
31328 (__arm_vabdq_x_f16): Remove.
31329 (__arm_vabdq_x_f32): Remove.
31330 (__arm_vabdq): Remove.
31331 (__arm_vabdq_m): Remove.
31332 (__arm_vabdq_x): Remove.
31334 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31336 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
31337 (MVE_FP_VABDQ_ONLY): New.
31338 (mve_insn): Add vabd.
31339 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
31340 (@mve_<mve_insn>q_f<mode>): ... this.
31341 (mve_vabdq_m_f<mode>): Remove.
31343 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31345 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
31346 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
31347 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
31348 * config/arm/arm_mve.h (vqrdmulhq): Remove.
31349 (vqrdmulhq_m): Remove.
31350 (vqrdmulhq_s8): Remove.
31351 (vqrdmulhq_n_s8): Remove.
31352 (vqrdmulhq_s16): Remove.
31353 (vqrdmulhq_n_s16): Remove.
31354 (vqrdmulhq_s32): Remove.
31355 (vqrdmulhq_n_s32): Remove.
31356 (vqrdmulhq_m_n_s8): Remove.
31357 (vqrdmulhq_m_n_s32): Remove.
31358 (vqrdmulhq_m_n_s16): Remove.
31359 (vqrdmulhq_m_s8): Remove.
31360 (vqrdmulhq_m_s32): Remove.
31361 (vqrdmulhq_m_s16): Remove.
31362 (__arm_vqrdmulhq_s8): Remove.
31363 (__arm_vqrdmulhq_n_s8): Remove.
31364 (__arm_vqrdmulhq_s16): Remove.
31365 (__arm_vqrdmulhq_n_s16): Remove.
31366 (__arm_vqrdmulhq_s32): Remove.
31367 (__arm_vqrdmulhq_n_s32): Remove.
31368 (__arm_vqrdmulhq_m_n_s8): Remove.
31369 (__arm_vqrdmulhq_m_n_s32): Remove.
31370 (__arm_vqrdmulhq_m_n_s16): Remove.
31371 (__arm_vqrdmulhq_m_s8): Remove.
31372 (__arm_vqrdmulhq_m_s32): Remove.
31373 (__arm_vqrdmulhq_m_s16): Remove.
31374 (__arm_vqrdmulhq): Remove.
31375 (__arm_vqrdmulhq_m): Remove.
31377 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31379 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
31380 (MVE_SHIFT_N, MVE_SHIFT_R): New.
31381 (mve_insn): Add vqshl, vshl.
31382 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
31383 (mve_vshlq_n_<supf><mode>): Merge into ...
31384 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31385 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
31387 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
31388 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
31390 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
31391 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
31393 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31394 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
31396 (@mve_<mve_insn>q_<supf><mode>): ... this.
31398 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31400 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
31401 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
31402 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
31403 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
31405 * config/arm/arm_mve.h (vrshlq): Remove.
31406 (vrshlq_m_n): Remove.
31407 (vrshlq_m): Remove.
31408 (vrshlq_x): Remove.
31409 (vrshlq_u8): Remove.
31410 (vrshlq_n_u8): Remove.
31411 (vrshlq_s8): Remove.
31412 (vrshlq_n_s8): Remove.
31413 (vrshlq_u16): Remove.
31414 (vrshlq_n_u16): Remove.
31415 (vrshlq_s16): Remove.
31416 (vrshlq_n_s16): Remove.
31417 (vrshlq_u32): Remove.
31418 (vrshlq_n_u32): Remove.
31419 (vrshlq_s32): Remove.
31420 (vrshlq_n_s32): Remove.
31421 (vrshlq_m_n_u8): Remove.
31422 (vrshlq_m_n_s8): Remove.
31423 (vrshlq_m_n_u16): Remove.
31424 (vrshlq_m_n_s16): Remove.
31425 (vrshlq_m_n_u32): Remove.
31426 (vrshlq_m_n_s32): Remove.
31427 (vrshlq_m_s8): Remove.
31428 (vrshlq_m_s32): Remove.
31429 (vrshlq_m_s16): Remove.
31430 (vrshlq_m_u8): Remove.
31431 (vrshlq_m_u32): Remove.
31432 (vrshlq_m_u16): Remove.
31433 (vrshlq_x_s8): Remove.
31434 (vrshlq_x_s16): Remove.
31435 (vrshlq_x_s32): Remove.
31436 (vrshlq_x_u8): Remove.
31437 (vrshlq_x_u16): Remove.
31438 (vrshlq_x_u32): Remove.
31439 (__arm_vrshlq_u8): Remove.
31440 (__arm_vrshlq_n_u8): Remove.
31441 (__arm_vrshlq_s8): Remove.
31442 (__arm_vrshlq_n_s8): Remove.
31443 (__arm_vrshlq_u16): Remove.
31444 (__arm_vrshlq_n_u16): Remove.
31445 (__arm_vrshlq_s16): Remove.
31446 (__arm_vrshlq_n_s16): Remove.
31447 (__arm_vrshlq_u32): Remove.
31448 (__arm_vrshlq_n_u32): Remove.
31449 (__arm_vrshlq_s32): Remove.
31450 (__arm_vrshlq_n_s32): Remove.
31451 (__arm_vrshlq_m_n_u8): Remove.
31452 (__arm_vrshlq_m_n_s8): Remove.
31453 (__arm_vrshlq_m_n_u16): Remove.
31454 (__arm_vrshlq_m_n_s16): Remove.
31455 (__arm_vrshlq_m_n_u32): Remove.
31456 (__arm_vrshlq_m_n_s32): Remove.
31457 (__arm_vrshlq_m_s8): Remove.
31458 (__arm_vrshlq_m_s32): Remove.
31459 (__arm_vrshlq_m_s16): Remove.
31460 (__arm_vrshlq_m_u8): Remove.
31461 (__arm_vrshlq_m_u32): Remove.
31462 (__arm_vrshlq_m_u16): Remove.
31463 (__arm_vrshlq_x_s8): Remove.
31464 (__arm_vrshlq_x_s16): Remove.
31465 (__arm_vrshlq_x_s32): Remove.
31466 (__arm_vrshlq_x_u8): Remove.
31467 (__arm_vrshlq_x_u16): Remove.
31468 (__arm_vrshlq_x_u32): Remove.
31469 (__arm_vrshlq): Remove.
31470 (__arm_vrshlq_m_n): Remove.
31471 (__arm_vrshlq_m): Remove.
31472 (__arm_vrshlq_x): Remove.
31474 (vqrshlq_m_n): Remove.
31475 (vqrshlq_m): Remove.
31476 (vqrshlq_u8): Remove.
31477 (vqrshlq_n_u8): Remove.
31478 (vqrshlq_s8): Remove.
31479 (vqrshlq_n_s8): Remove.
31480 (vqrshlq_u16): Remove.
31481 (vqrshlq_n_u16): Remove.
31482 (vqrshlq_s16): Remove.
31483 (vqrshlq_n_s16): Remove.
31484 (vqrshlq_u32): Remove.
31485 (vqrshlq_n_u32): Remove.
31486 (vqrshlq_s32): Remove.
31487 (vqrshlq_n_s32): Remove.
31488 (vqrshlq_m_n_u8): Remove.
31489 (vqrshlq_m_n_s8): Remove.
31490 (vqrshlq_m_n_u16): Remove.
31491 (vqrshlq_m_n_s16): Remove.
31492 (vqrshlq_m_n_u32): Remove.
31493 (vqrshlq_m_n_s32): Remove.
31494 (vqrshlq_m_s8): Remove.
31495 (vqrshlq_m_s32): Remove.
31496 (vqrshlq_m_s16): Remove.
31497 (vqrshlq_m_u8): Remove.
31498 (vqrshlq_m_u32): Remove.
31499 (vqrshlq_m_u16): Remove.
31500 (__arm_vqrshlq_u8): Remove.
31501 (__arm_vqrshlq_n_u8): Remove.
31502 (__arm_vqrshlq_s8): Remove.
31503 (__arm_vqrshlq_n_s8): Remove.
31504 (__arm_vqrshlq_u16): Remove.
31505 (__arm_vqrshlq_n_u16): Remove.
31506 (__arm_vqrshlq_s16): Remove.
31507 (__arm_vqrshlq_n_s16): Remove.
31508 (__arm_vqrshlq_u32): Remove.
31509 (__arm_vqrshlq_n_u32): Remove.
31510 (__arm_vqrshlq_s32): Remove.
31511 (__arm_vqrshlq_n_s32): Remove.
31512 (__arm_vqrshlq_m_n_u8): Remove.
31513 (__arm_vqrshlq_m_n_s8): Remove.
31514 (__arm_vqrshlq_m_n_u16): Remove.
31515 (__arm_vqrshlq_m_n_s16): Remove.
31516 (__arm_vqrshlq_m_n_u32): Remove.
31517 (__arm_vqrshlq_m_n_s32): Remove.
31518 (__arm_vqrshlq_m_s8): Remove.
31519 (__arm_vqrshlq_m_s32): Remove.
31520 (__arm_vqrshlq_m_s16): Remove.
31521 (__arm_vqrshlq_m_u8): Remove.
31522 (__arm_vqrshlq_m_u32): Remove.
31523 (__arm_vqrshlq_m_u16): Remove.
31524 (__arm_vqrshlq): Remove.
31525 (__arm_vqrshlq_m_n): Remove.
31526 (__arm_vqrshlq_m): Remove.
31528 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31530 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
31531 (mve_insn): Add vqrshl, vrshl.
31532 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
31533 (mve_vrshlq_n_<supf><mode>): Merge into ...
31534 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
31535 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
31537 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
31539 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
31541 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
31542 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
31544 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31547 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
31548 denegrate PHI optmization.
31550 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
31552 * config/i386/predicates.md (register_no_SP_operand):
31553 Rename from index_register_operand.
31554 (call_register_operand): Update for rename.
31555 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
31557 2023-05-05 Tamar Christina <tamar.christina@arm.com>
31560 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
31561 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
31562 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
31563 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
31564 (s-match): Split into s-generic-match and s-gimple-match.
31565 * configure.ac (with-matchpd-partitions,
31566 DEFAULT_MATCHPD_PARTITIONS): New.
31567 * configure: Regenerate.
31569 2023-05-05 Tamar Christina <tamar.christina@arm.com>
31572 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
31573 (decision_tree::gen): Accept list of files instead of single and update
31574 to write function definition to header and main file.
31575 (write_predicate): Likewise.
31576 (write_header): Emit pragmas and new includes.
31577 (main): Create file buffers and cleanup.
31578 (showUsage, write_header_includes): New.
31580 2023-05-05 Tamar Christina <tamar.christina@arm.com>
31583 * Makefile.in (OBJS): Add gimple-match-exports.o.
31584 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
31585 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
31586 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
31587 gimple_resimplify5, constant_for_folding, convert_conditional_op,
31588 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
31589 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
31590 do_valueize, try_conditional_simplification, gimple_extract,
31591 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
31592 commutative_ternary_op_p, first_commutative_argument,
31593 associative_binary_op_p, directly_supported_p,
31594 get_conditional_internal_fn): Moved to gimple-match-exports.cc
31595 * gimple-match-exports.cc: New file.
31597 2023-05-05 Tamar Christina <tamar.christina@arm.com>
31600 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
31602 (dt_simplify::gen_1): Use it.
31604 2023-05-05 Tamar Christina <tamar.christina@arm.com>
31607 * genmatch.cc (output_line_directive): Only emit commented directive
31610 2023-05-05 Tamar Christina <tamar.christina@arm.com>
31613 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
31615 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
31617 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
31618 unused in_mode/in_n variables.
31620 2023-05-05 Richard Biener <rguenther@suse.de>
31622 PR tree-optimization/109735
31623 * tree-vect-stmts.cc (vectorizable_operation): Perform
31624 conversion for POINTER_DIFF_EXPR unconditionally.
31626 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
31628 * config/i386/mmx.md (mulv2si3): New expander.
31629 (*mulv2si3): New insn pattern.
31631 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
31632 Thomas Schwinge <thomas@codesourcery.com>
31635 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
31636 alongside reverse-offload function table to prevent NULL values
31637 of the function addresses.
31639 2023-05-05 Jakub Jelinek <jakub@redhat.com>
31641 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
31643 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
31645 2023-05-05 Andrew Pinski <apinski@marvell.com>
31647 PR tree-optimization/109732
31648 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
31649 of the argtrue/argfalse.
31651 2023-05-05 Andrew Pinski <apinski@marvell.com>
31653 PR tree-optimization/109722
31654 * match.pd: Extend the `ABS<a> == 0` pattern
31655 to cover `ABSU<a> == 0` too.
31657 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
31660 * config/i386/predicates.md (index_reg_operand): New predicate.
31661 * config/i386/i386.md (ashift to lea spliter): Use
31662 general_reg_operand and index_reg_operand predicates.
31664 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31666 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
31667 Rename and reimplement with RTL codes to...
31668 (aarch64_<optab>hn2<mode>_insn_le): .. This.
31669 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
31670 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
31672 (aarch64_<optab>hn2<mode>_insn_be): ... This.
31673 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
31674 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
31675 (aarch64_<optab>hn2<mode>): ... This.
31676 (aarch64_r<optab>hn2<mode>): New expander.
31677 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
31678 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
31679 (ADDSUBHN): Delete.
31680 (sur): Remove handling of the above.
31681 (addsub): Likewise.
31683 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31685 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
31687 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
31688 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
31689 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
31690 (aarch64_<sur><addsub>hn<mode>): Delete.
31691 (aarch64_<optab>hn<mode>): New define_expand.
31692 (aarch64_r<optab>hn<mode>): Likewise.
31693 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
31696 2023-05-04 Andrew Pinski <apinski@marvell.com>
31698 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
31699 diamond form bb with forwarder only empty blocks better.
31701 2023-05-04 Andrew Pinski <apinski@marvell.com>
31703 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
31704 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
31705 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
31706 of an inline version of it.
31707 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
31708 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
31710 2023-05-04 Andrew Pinski <apinski@marvell.com>
31712 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
31713 the default argument value for dce_ssa_names to nullptr.
31714 Check to make sure dce_ssa_names is a non-nullptr before
31715 calling simple_dce_from_worklist.
31717 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
31719 * config/i386/predicates.md (index_register_operand): Reject
31720 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
31721 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
31722 (call_register_no_elim_operand): Rewrite as ...
31723 (call_register_operand): ... this.
31724 (call_insn_operand): Use call_register_operand predicate.
31726 2023-05-04 Richard Biener <rguenther@suse.de>
31728 PR tree-optimization/109721
31729 * tree-vect-stmts.cc (vectorizable_operation): Make sure
31730 to test word_mode for all !target_support_p operations.
31732 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31735 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
31736 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
31737 (aarch64_mla<mode>): Rename to...
31738 (aarch64_mla<mode><vczle><vczbe>): ... This.
31739 (*aarch64_mla_elt<mode>): Rename to...
31740 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
31741 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
31742 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
31743 (aarch64_mla_n<mode>): Rename to...
31744 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
31745 (aarch64_mls<mode>): Rename to...
31746 (aarch64_mls<mode><vczle><vczbe>): ... This.
31747 (*aarch64_mls_elt<mode>): Rename to...
31748 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
31749 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
31750 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
31751 (aarch64_mls_n<mode>): Rename to...
31752 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
31753 (fma<mode>4): Rename to...
31754 (fma<mode>4<vczle><vczbe>): ... This.
31755 (*aarch64_fma4_elt<mode>): Rename to...
31756 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
31757 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
31758 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
31759 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
31760 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
31761 (fnma<mode>4): Rename to...
31762 (fnma<mode>4<vczle><vczbe>): ... This.
31763 (*aarch64_fnma4_elt<mode>): Rename to...
31764 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
31765 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
31766 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
31767 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
31768 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
31769 (aarch64_simd_bsl<mode>_internal): Rename to...
31770 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
31771 (*aarch64_simd_bsl<mode>_alt): Rename to...
31772 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
31774 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31777 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
31778 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
31779 (fabd<mode>3): Rename to...
31780 (fabd<mode>3<vczle><vczbe>): ... This.
31781 (aarch64_<optab>p<mode>): Rename to...
31782 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
31783 (aarch64_faddp<mode>): Rename to...
31784 (aarch64_faddp<mode><vczle><vczbe>): ... This.
31786 2023-05-04 Martin Liska <mliska@suse.cz>
31788 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
31789 (print_version): Use it.
31790 (generate_results): Likewise.
31792 2023-05-04 Richard Biener <rguenther@suse.de>
31794 * tree-cfg.h (last_stmt): Rename to ...
31795 (last_nondebug_stmt): ... this.
31796 * tree-cfg.cc (last_stmt): Rename to ...
31797 (last_nondebug_stmt): ... this.
31798 (assign_discriminators): Adjust.
31799 (group_case_labels_stmt): Likewise.
31800 (gimple_can_duplicate_bb_p): Likewise.
31801 (execute_fixup_cfg): Likewise.
31802 * auto-profile.cc (afdo_propagate_circuit): Likewise.
31803 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
31804 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
31805 (determine_parallel_type): Likewise.
31806 (adjust_context_and_scope): Likewise.
31807 (expand_task_call): Likewise.
31808 (remove_exit_barrier): Likewise.
31809 (expand_omp_taskreg): Likewise.
31810 (expand_omp_for_init_counts): Likewise.
31811 (expand_omp_for_init_vars): Likewise.
31812 (expand_omp_for_static_chunk): Likewise.
31813 (expand_omp_simd): Likewise.
31814 (expand_oacc_for): Likewise.
31815 (expand_omp_for): Likewise.
31816 (expand_omp_sections): Likewise.
31817 (expand_omp_atomic_fetch_op): Likewise.
31818 (expand_omp_atomic_cas): Likewise.
31819 (expand_omp_atomic): Likewise.
31820 (expand_omp_target): Likewise.
31821 (expand_omp): Likewise.
31822 (omp_make_gimple_edges): Likewise.
31823 * trans-mem.cc (tm_region_init): Likewise.
31824 * tree-inline.cc (redirect_all_calls): Likewise.
31825 * tree-parloops.cc (gen_parallel_loop): Likewise.
31826 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
31827 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
31829 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
31830 (may_eliminate_iv): Likewise.
31831 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
31832 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
31834 (estimate_numbers_of_iterations): Likewise.
31835 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
31836 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
31837 (set_predicates_for_bb): Likewise.
31838 (init_loop_unswitch_info): Likewise.
31839 (hoist_guard): Likewise.
31840 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
31841 (minmax_replacement): Likewise.
31842 * tree-ssa-reassoc.cc (update_range_test): Likewise.
31843 (optimize_range_tests_to_bit_test): Likewise.
31844 (optimize_range_tests_var_bound): Likewise.
31845 (optimize_range_tests): Likewise.
31846 (no_side_effect_bb): Likewise.
31847 (suitable_cond_bb): Likewise.
31848 (maybe_optimize_range_tests): Likewise.
31849 (reassociate_bb): Likewise.
31850 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
31852 2023-05-04 Jakub Jelinek <jakub@redhat.com>
31855 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
31856 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
31857 for it only if it still has TImode. Don't decide whether to call
31858 fix_debug_reg_uses based on whether SRC is ever set or not.
31860 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
31862 * config/cris/cris.cc (cris_split_constant): New function.
31863 * config/cris/cris.md (splitop): New iterator.
31864 (opsplit1): New define_peephole2.
31865 * config/cris/cris-protos.h (cris_split_constant): Declare.
31866 (cris_splittable_constant_p): New macro.
31868 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
31870 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
31873 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
31875 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
31876 lra_in_progress, not reload_in_progress.
31877 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
31878 * config/cris/constraints.md ("Q"): Ditto.
31880 2023-05-03 Andrew Pinski <apinski@marvell.com>
31882 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
31883 stats on removed number of statements and phis.
31885 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
31887 PR tree-optimization/109711
31888 * value-range.cc (irange::verify_range): Allow types of
31891 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
31894 * calls.cc (can_implement_as_sibling_call_p): Reject calls
31895 to __sanitizer_cov_trace_pc.
31897 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
31900 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
31901 a new ABI break parameter for GCC 14. Set it to the alignment
31902 of enums that have an underlying type. Take the true alignment
31903 of such enums from the TYPE_ALIGN of the underlying type's
31905 (aarch64_function_arg_boundary): Update accordingly.
31906 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
31907 Warn about ABI differences.
31909 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
31912 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
31913 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
31914 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
31915 (aarch64_gimplify_va_arg_expr): Likewise.
31917 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
31919 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
31920 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
31921 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
31923 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
31924 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
31925 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
31926 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
31927 * config/arm/arm_mve.h (vhsubq): Remove.
31929 (vhaddq_m): Remove.
31930 (vhsubq_m): Remove.
31931 (vhaddq_x): Remove.
31932 (vhsubq_x): Remove.
31933 (vhsubq_u8): Remove.
31934 (vhsubq_n_u8): Remove.
31935 (vhaddq_u8): Remove.
31936 (vhaddq_n_u8): Remove.
31937 (vhsubq_s8): Remove.
31938 (vhsubq_n_s8): Remove.
31939 (vhaddq_s8): Remove.
31940 (vhaddq_n_s8): Remove.
31941 (vhsubq_u16): Remove.
31942 (vhsubq_n_u16): Remove.
31943 (vhaddq_u16): Remove.
31944 (vhaddq_n_u16): Remove.
31945 (vhsubq_s16): Remove.
31946 (vhsubq_n_s16): Remove.
31947 (vhaddq_s16): Remove.
31948 (vhaddq_n_s16): Remove.
31949 (vhsubq_u32): Remove.
31950 (vhsubq_n_u32): Remove.
31951 (vhaddq_u32): Remove.
31952 (vhaddq_n_u32): Remove.
31953 (vhsubq_s32): Remove.
31954 (vhsubq_n_s32): Remove.
31955 (vhaddq_s32): Remove.
31956 (vhaddq_n_s32): Remove.
31957 (vhaddq_m_n_s8): Remove.
31958 (vhaddq_m_n_s32): Remove.
31959 (vhaddq_m_n_s16): Remove.
31960 (vhaddq_m_n_u8): Remove.
31961 (vhaddq_m_n_u32): Remove.
31962 (vhaddq_m_n_u16): Remove.
31963 (vhaddq_m_s8): Remove.
31964 (vhaddq_m_s32): Remove.
31965 (vhaddq_m_s16): Remove.
31966 (vhaddq_m_u8): Remove.
31967 (vhaddq_m_u32): Remove.
31968 (vhaddq_m_u16): Remove.
31969 (vhsubq_m_n_s8): Remove.
31970 (vhsubq_m_n_s32): Remove.
31971 (vhsubq_m_n_s16): Remove.
31972 (vhsubq_m_n_u8): Remove.
31973 (vhsubq_m_n_u32): Remove.
31974 (vhsubq_m_n_u16): Remove.
31975 (vhsubq_m_s8): Remove.
31976 (vhsubq_m_s32): Remove.
31977 (vhsubq_m_s16): Remove.
31978 (vhsubq_m_u8): Remove.
31979 (vhsubq_m_u32): Remove.
31980 (vhsubq_m_u16): Remove.
31981 (vhaddq_x_n_s8): Remove.
31982 (vhaddq_x_n_s16): Remove.
31983 (vhaddq_x_n_s32): Remove.
31984 (vhaddq_x_n_u8): Remove.
31985 (vhaddq_x_n_u16): Remove.
31986 (vhaddq_x_n_u32): Remove.
31987 (vhaddq_x_s8): Remove.
31988 (vhaddq_x_s16): Remove.
31989 (vhaddq_x_s32): Remove.
31990 (vhaddq_x_u8): Remove.
31991 (vhaddq_x_u16): Remove.
31992 (vhaddq_x_u32): Remove.
31993 (vhsubq_x_n_s8): Remove.
31994 (vhsubq_x_n_s16): Remove.
31995 (vhsubq_x_n_s32): Remove.
31996 (vhsubq_x_n_u8): Remove.
31997 (vhsubq_x_n_u16): Remove.
31998 (vhsubq_x_n_u32): Remove.
31999 (vhsubq_x_s8): Remove.
32000 (vhsubq_x_s16): Remove.
32001 (vhsubq_x_s32): Remove.
32002 (vhsubq_x_u8): Remove.
32003 (vhsubq_x_u16): Remove.
32004 (vhsubq_x_u32): Remove.
32005 (__arm_vhsubq_u8): Remove.
32006 (__arm_vhsubq_n_u8): Remove.
32007 (__arm_vhaddq_u8): Remove.
32008 (__arm_vhaddq_n_u8): Remove.
32009 (__arm_vhsubq_s8): Remove.
32010 (__arm_vhsubq_n_s8): Remove.
32011 (__arm_vhaddq_s8): Remove.
32012 (__arm_vhaddq_n_s8): Remove.
32013 (__arm_vhsubq_u16): Remove.
32014 (__arm_vhsubq_n_u16): Remove.
32015 (__arm_vhaddq_u16): Remove.
32016 (__arm_vhaddq_n_u16): Remove.
32017 (__arm_vhsubq_s16): Remove.
32018 (__arm_vhsubq_n_s16): Remove.
32019 (__arm_vhaddq_s16): Remove.
32020 (__arm_vhaddq_n_s16): Remove.
32021 (__arm_vhsubq_u32): Remove.
32022 (__arm_vhsubq_n_u32): Remove.
32023 (__arm_vhaddq_u32): Remove.
32024 (__arm_vhaddq_n_u32): Remove.
32025 (__arm_vhsubq_s32): Remove.
32026 (__arm_vhsubq_n_s32): Remove.
32027 (__arm_vhaddq_s32): Remove.
32028 (__arm_vhaddq_n_s32): Remove.
32029 (__arm_vhaddq_m_n_s8): Remove.
32030 (__arm_vhaddq_m_n_s32): Remove.
32031 (__arm_vhaddq_m_n_s16): Remove.
32032 (__arm_vhaddq_m_n_u8): Remove.
32033 (__arm_vhaddq_m_n_u32): Remove.
32034 (__arm_vhaddq_m_n_u16): Remove.
32035 (__arm_vhaddq_m_s8): Remove.
32036 (__arm_vhaddq_m_s32): Remove.
32037 (__arm_vhaddq_m_s16): Remove.
32038 (__arm_vhaddq_m_u8): Remove.
32039 (__arm_vhaddq_m_u32): Remove.
32040 (__arm_vhaddq_m_u16): Remove.
32041 (__arm_vhsubq_m_n_s8): Remove.
32042 (__arm_vhsubq_m_n_s32): Remove.
32043 (__arm_vhsubq_m_n_s16): Remove.
32044 (__arm_vhsubq_m_n_u8): Remove.
32045 (__arm_vhsubq_m_n_u32): Remove.
32046 (__arm_vhsubq_m_n_u16): Remove.
32047 (__arm_vhsubq_m_s8): Remove.
32048 (__arm_vhsubq_m_s32): Remove.
32049 (__arm_vhsubq_m_s16): Remove.
32050 (__arm_vhsubq_m_u8): Remove.
32051 (__arm_vhsubq_m_u32): Remove.
32052 (__arm_vhsubq_m_u16): Remove.
32053 (__arm_vhaddq_x_n_s8): Remove.
32054 (__arm_vhaddq_x_n_s16): Remove.
32055 (__arm_vhaddq_x_n_s32): Remove.
32056 (__arm_vhaddq_x_n_u8): Remove.
32057 (__arm_vhaddq_x_n_u16): Remove.
32058 (__arm_vhaddq_x_n_u32): Remove.
32059 (__arm_vhaddq_x_s8): Remove.
32060 (__arm_vhaddq_x_s16): Remove.
32061 (__arm_vhaddq_x_s32): Remove.
32062 (__arm_vhaddq_x_u8): Remove.
32063 (__arm_vhaddq_x_u16): Remove.
32064 (__arm_vhaddq_x_u32): Remove.
32065 (__arm_vhsubq_x_n_s8): Remove.
32066 (__arm_vhsubq_x_n_s16): Remove.
32067 (__arm_vhsubq_x_n_s32): Remove.
32068 (__arm_vhsubq_x_n_u8): Remove.
32069 (__arm_vhsubq_x_n_u16): Remove.
32070 (__arm_vhsubq_x_n_u32): Remove.
32071 (__arm_vhsubq_x_s8): Remove.
32072 (__arm_vhsubq_x_s16): Remove.
32073 (__arm_vhsubq_x_s32): Remove.
32074 (__arm_vhsubq_x_u8): Remove.
32075 (__arm_vhsubq_x_u16): Remove.
32076 (__arm_vhsubq_x_u32): Remove.
32077 (__arm_vhsubq): Remove.
32078 (__arm_vhaddq): Remove.
32079 (__arm_vhaddq_m): Remove.
32080 (__arm_vhsubq_m): Remove.
32081 (__arm_vhaddq_x): Remove.
32082 (__arm_vhsubq_x): Remove.
32084 (vmulhq_m): Remove.
32085 (vmulhq_x): Remove.
32086 (vmulhq_u8): Remove.
32087 (vmulhq_s8): Remove.
32088 (vmulhq_u16): Remove.
32089 (vmulhq_s16): Remove.
32090 (vmulhq_u32): Remove.
32091 (vmulhq_s32): Remove.
32092 (vmulhq_m_s8): Remove.
32093 (vmulhq_m_s32): Remove.
32094 (vmulhq_m_s16): Remove.
32095 (vmulhq_m_u8): Remove.
32096 (vmulhq_m_u32): Remove.
32097 (vmulhq_m_u16): Remove.
32098 (vmulhq_x_s8): Remove.
32099 (vmulhq_x_s16): Remove.
32100 (vmulhq_x_s32): Remove.
32101 (vmulhq_x_u8): Remove.
32102 (vmulhq_x_u16): Remove.
32103 (vmulhq_x_u32): Remove.
32104 (__arm_vmulhq_u8): Remove.
32105 (__arm_vmulhq_s8): Remove.
32106 (__arm_vmulhq_u16): Remove.
32107 (__arm_vmulhq_s16): Remove.
32108 (__arm_vmulhq_u32): Remove.
32109 (__arm_vmulhq_s32): Remove.
32110 (__arm_vmulhq_m_s8): Remove.
32111 (__arm_vmulhq_m_s32): Remove.
32112 (__arm_vmulhq_m_s16): Remove.
32113 (__arm_vmulhq_m_u8): Remove.
32114 (__arm_vmulhq_m_u32): Remove.
32115 (__arm_vmulhq_m_u16): Remove.
32116 (__arm_vmulhq_x_s8): Remove.
32117 (__arm_vmulhq_x_s16): Remove.
32118 (__arm_vmulhq_x_s32): Remove.
32119 (__arm_vmulhq_x_u8): Remove.
32120 (__arm_vmulhq_x_u16): Remove.
32121 (__arm_vmulhq_x_u32): Remove.
32122 (__arm_vmulhq): Remove.
32123 (__arm_vmulhq_m): Remove.
32124 (__arm_vmulhq_x): Remove.
32127 (vqaddq_m): Remove.
32128 (vqsubq_m): Remove.
32129 (vqsubq_u8): Remove.
32130 (vqsubq_n_u8): Remove.
32131 (vqaddq_u8): Remove.
32132 (vqaddq_n_u8): Remove.
32133 (vqsubq_s8): Remove.
32134 (vqsubq_n_s8): Remove.
32135 (vqaddq_s8): Remove.
32136 (vqaddq_n_s8): Remove.
32137 (vqsubq_u16): Remove.
32138 (vqsubq_n_u16): Remove.
32139 (vqaddq_u16): Remove.
32140 (vqaddq_n_u16): Remove.
32141 (vqsubq_s16): Remove.
32142 (vqsubq_n_s16): Remove.
32143 (vqaddq_s16): Remove.
32144 (vqaddq_n_s16): Remove.
32145 (vqsubq_u32): Remove.
32146 (vqsubq_n_u32): Remove.
32147 (vqaddq_u32): Remove.
32148 (vqaddq_n_u32): Remove.
32149 (vqsubq_s32): Remove.
32150 (vqsubq_n_s32): Remove.
32151 (vqaddq_s32): Remove.
32152 (vqaddq_n_s32): Remove.
32153 (vqaddq_m_n_s8): Remove.
32154 (vqaddq_m_n_s32): Remove.
32155 (vqaddq_m_n_s16): Remove.
32156 (vqaddq_m_n_u8): Remove.
32157 (vqaddq_m_n_u32): Remove.
32158 (vqaddq_m_n_u16): Remove.
32159 (vqaddq_m_s8): Remove.
32160 (vqaddq_m_s32): Remove.
32161 (vqaddq_m_s16): Remove.
32162 (vqaddq_m_u8): Remove.
32163 (vqaddq_m_u32): Remove.
32164 (vqaddq_m_u16): Remove.
32165 (vqsubq_m_n_s8): Remove.
32166 (vqsubq_m_n_s32): Remove.
32167 (vqsubq_m_n_s16): Remove.
32168 (vqsubq_m_n_u8): Remove.
32169 (vqsubq_m_n_u32): Remove.
32170 (vqsubq_m_n_u16): Remove.
32171 (vqsubq_m_s8): Remove.
32172 (vqsubq_m_s32): Remove.
32173 (vqsubq_m_s16): Remove.
32174 (vqsubq_m_u8): Remove.
32175 (vqsubq_m_u32): Remove.
32176 (vqsubq_m_u16): Remove.
32177 (__arm_vqsubq_u8): Remove.
32178 (__arm_vqsubq_n_u8): Remove.
32179 (__arm_vqaddq_u8): Remove.
32180 (__arm_vqaddq_n_u8): Remove.
32181 (__arm_vqsubq_s8): Remove.
32182 (__arm_vqsubq_n_s8): Remove.
32183 (__arm_vqaddq_s8): Remove.
32184 (__arm_vqaddq_n_s8): Remove.
32185 (__arm_vqsubq_u16): Remove.
32186 (__arm_vqsubq_n_u16): Remove.
32187 (__arm_vqaddq_u16): Remove.
32188 (__arm_vqaddq_n_u16): Remove.
32189 (__arm_vqsubq_s16): Remove.
32190 (__arm_vqsubq_n_s16): Remove.
32191 (__arm_vqaddq_s16): Remove.
32192 (__arm_vqaddq_n_s16): Remove.
32193 (__arm_vqsubq_u32): Remove.
32194 (__arm_vqsubq_n_u32): Remove.
32195 (__arm_vqaddq_u32): Remove.
32196 (__arm_vqaddq_n_u32): Remove.
32197 (__arm_vqsubq_s32): Remove.
32198 (__arm_vqsubq_n_s32): Remove.
32199 (__arm_vqaddq_s32): Remove.
32200 (__arm_vqaddq_n_s32): Remove.
32201 (__arm_vqaddq_m_n_s8): Remove.
32202 (__arm_vqaddq_m_n_s32): Remove.
32203 (__arm_vqaddq_m_n_s16): Remove.
32204 (__arm_vqaddq_m_n_u8): Remove.
32205 (__arm_vqaddq_m_n_u32): Remove.
32206 (__arm_vqaddq_m_n_u16): Remove.
32207 (__arm_vqaddq_m_s8): Remove.
32208 (__arm_vqaddq_m_s32): Remove.
32209 (__arm_vqaddq_m_s16): Remove.
32210 (__arm_vqaddq_m_u8): Remove.
32211 (__arm_vqaddq_m_u32): Remove.
32212 (__arm_vqaddq_m_u16): Remove.
32213 (__arm_vqsubq_m_n_s8): Remove.
32214 (__arm_vqsubq_m_n_s32): Remove.
32215 (__arm_vqsubq_m_n_s16): Remove.
32216 (__arm_vqsubq_m_n_u8): Remove.
32217 (__arm_vqsubq_m_n_u32): Remove.
32218 (__arm_vqsubq_m_n_u16): Remove.
32219 (__arm_vqsubq_m_s8): Remove.
32220 (__arm_vqsubq_m_s32): Remove.
32221 (__arm_vqsubq_m_s16): Remove.
32222 (__arm_vqsubq_m_u8): Remove.
32223 (__arm_vqsubq_m_u32): Remove.
32224 (__arm_vqsubq_m_u16): Remove.
32225 (__arm_vqsubq): Remove.
32226 (__arm_vqaddq): Remove.
32227 (__arm_vqaddq_m): Remove.
32228 (__arm_vqsubq_m): Remove.
32229 (vqdmulhq): Remove.
32230 (vqdmulhq_m): Remove.
32231 (vqdmulhq_s8): Remove.
32232 (vqdmulhq_n_s8): Remove.
32233 (vqdmulhq_s16): Remove.
32234 (vqdmulhq_n_s16): Remove.
32235 (vqdmulhq_s32): Remove.
32236 (vqdmulhq_n_s32): Remove.
32237 (vqdmulhq_m_n_s8): Remove.
32238 (vqdmulhq_m_n_s32): Remove.
32239 (vqdmulhq_m_n_s16): Remove.
32240 (vqdmulhq_m_s8): Remove.
32241 (vqdmulhq_m_s32): Remove.
32242 (vqdmulhq_m_s16): Remove.
32243 (__arm_vqdmulhq_s8): Remove.
32244 (__arm_vqdmulhq_n_s8): Remove.
32245 (__arm_vqdmulhq_s16): Remove.
32246 (__arm_vqdmulhq_n_s16): Remove.
32247 (__arm_vqdmulhq_s32): Remove.
32248 (__arm_vqdmulhq_n_s32): Remove.
32249 (__arm_vqdmulhq_m_n_s8): Remove.
32250 (__arm_vqdmulhq_m_n_s32): Remove.
32251 (__arm_vqdmulhq_m_n_s16): Remove.
32252 (__arm_vqdmulhq_m_s8): Remove.
32253 (__arm_vqdmulhq_m_s32): Remove.
32254 (__arm_vqdmulhq_m_s16): Remove.
32255 (__arm_vqdmulhq): Remove.
32256 (__arm_vqdmulhq_m): Remove.
32258 (vrhaddq_m): Remove.
32259 (vrhaddq_x): Remove.
32260 (vrhaddq_u8): Remove.
32261 (vrhaddq_s8): Remove.
32262 (vrhaddq_u16): Remove.
32263 (vrhaddq_s16): Remove.
32264 (vrhaddq_u32): Remove.
32265 (vrhaddq_s32): Remove.
32266 (vrhaddq_m_s8): Remove.
32267 (vrhaddq_m_s32): Remove.
32268 (vrhaddq_m_s16): Remove.
32269 (vrhaddq_m_u8): Remove.
32270 (vrhaddq_m_u32): Remove.
32271 (vrhaddq_m_u16): Remove.
32272 (vrhaddq_x_s8): Remove.
32273 (vrhaddq_x_s16): Remove.
32274 (vrhaddq_x_s32): Remove.
32275 (vrhaddq_x_u8): Remove.
32276 (vrhaddq_x_u16): Remove.
32277 (vrhaddq_x_u32): Remove.
32278 (__arm_vrhaddq_u8): Remove.
32279 (__arm_vrhaddq_s8): Remove.
32280 (__arm_vrhaddq_u16): Remove.
32281 (__arm_vrhaddq_s16): Remove.
32282 (__arm_vrhaddq_u32): Remove.
32283 (__arm_vrhaddq_s32): Remove.
32284 (__arm_vrhaddq_m_s8): Remove.
32285 (__arm_vrhaddq_m_s32): Remove.
32286 (__arm_vrhaddq_m_s16): Remove.
32287 (__arm_vrhaddq_m_u8): Remove.
32288 (__arm_vrhaddq_m_u32): Remove.
32289 (__arm_vrhaddq_m_u16): Remove.
32290 (__arm_vrhaddq_x_s8): Remove.
32291 (__arm_vrhaddq_x_s16): Remove.
32292 (__arm_vrhaddq_x_s32): Remove.
32293 (__arm_vrhaddq_x_u8): Remove.
32294 (__arm_vrhaddq_x_u16): Remove.
32295 (__arm_vrhaddq_x_u32): Remove.
32296 (__arm_vrhaddq): Remove.
32297 (__arm_vrhaddq_m): Remove.
32298 (__arm_vrhaddq_x): Remove.
32300 (vrmulhq_m): Remove.
32301 (vrmulhq_x): Remove.
32302 (vrmulhq_u8): Remove.
32303 (vrmulhq_s8): Remove.
32304 (vrmulhq_u16): Remove.
32305 (vrmulhq_s16): Remove.
32306 (vrmulhq_u32): Remove.
32307 (vrmulhq_s32): Remove.
32308 (vrmulhq_m_s8): Remove.
32309 (vrmulhq_m_s32): Remove.
32310 (vrmulhq_m_s16): Remove.
32311 (vrmulhq_m_u8): Remove.
32312 (vrmulhq_m_u32): Remove.
32313 (vrmulhq_m_u16): Remove.
32314 (vrmulhq_x_s8): Remove.
32315 (vrmulhq_x_s16): Remove.
32316 (vrmulhq_x_s32): Remove.
32317 (vrmulhq_x_u8): Remove.
32318 (vrmulhq_x_u16): Remove.
32319 (vrmulhq_x_u32): Remove.
32320 (__arm_vrmulhq_u8): Remove.
32321 (__arm_vrmulhq_s8): Remove.
32322 (__arm_vrmulhq_u16): Remove.
32323 (__arm_vrmulhq_s16): Remove.
32324 (__arm_vrmulhq_u32): Remove.
32325 (__arm_vrmulhq_s32): Remove.
32326 (__arm_vrmulhq_m_s8): Remove.
32327 (__arm_vrmulhq_m_s32): Remove.
32328 (__arm_vrmulhq_m_s16): Remove.
32329 (__arm_vrmulhq_m_u8): Remove.
32330 (__arm_vrmulhq_m_u32): Remove.
32331 (__arm_vrmulhq_m_u16): Remove.
32332 (__arm_vrmulhq_x_s8): Remove.
32333 (__arm_vrmulhq_x_s16): Remove.
32334 (__arm_vrmulhq_x_s32): Remove.
32335 (__arm_vrmulhq_x_u8): Remove.
32336 (__arm_vrmulhq_x_u16): Remove.
32337 (__arm_vrmulhq_x_u32): Remove.
32338 (__arm_vrmulhq): Remove.
32339 (__arm_vrmulhq_m): Remove.
32340 (__arm_vrmulhq_x): Remove.
32342 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32344 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
32345 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
32346 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
32347 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
32348 * config/arm/mve.md (mve_vabdq_<supf><mode>)
32349 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
32350 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
32351 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
32352 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
32353 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
32354 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
32356 (@mve_<mve_insn>q_<supf><mode>): ... this.
32357 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
32358 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
32359 gen_mve_vhaddq / gen_mve_vrhaddq.
32361 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32363 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
32364 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
32365 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
32366 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
32367 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
32368 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
32369 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
32370 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
32371 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
32372 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
32373 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
32374 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
32375 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32377 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32379 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
32380 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
32382 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
32383 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
32384 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
32385 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
32386 (mve_vqsubq_n_<supf><mode>): Merge into ...
32387 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32389 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32391 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
32392 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
32393 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
32394 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
32395 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
32396 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
32397 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
32398 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
32399 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
32400 (mve_vshlq_m_<supf><mode>): Merged into
32401 @mve_<mve_insn>q_m_<supf><mode>.
32402 (mve_vabdq_m_<supf><mode>): Likewise.
32403 (mve_vhaddq_m_<supf><mode>): Likewise.
32404 (mve_vhsubq_m_<supf><mode>): Likewise.
32405 (mve_vmaxq_m_<supf><mode>): Likewise.
32406 (mve_vminq_m_<supf><mode>): Likewise.
32407 (mve_vmulhq_m_<supf><mode>): Likewise.
32408 (mve_vqaddq_m_<supf><mode>): Likewise.
32409 (mve_vqrshlq_m_<supf><mode>): Likewise.
32410 (mve_vqshlq_m_<supf><mode>): Likewise.
32411 (mve_vqsubq_m_<supf><mode>): Likewise.
32412 (mve_vrhaddq_m_<supf><mode>): Likewise.
32413 (mve_vrmulhq_m_<supf><mode>): Likewise.
32414 (mve_vrshlq_m_<supf><mode>): Likewise.
32415 (mve_vqdmladhq_m_s<mode>): Likewise.
32416 (mve_vqdmladhxq_m_s<mode>): Likewise.
32417 (mve_vqdmlsdhq_m_s<mode>): Likewise.
32418 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
32419 (mve_vqdmulhq_m_s<mode>): Likewise.
32420 (mve_vqrdmladhq_m_s<mode>): Likewise.
32421 (mve_vqrdmladhxq_m_s<mode>): Likewise.
32422 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
32423 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
32424 (mve_vqrdmulhq_m_s<mode>): Likewise.
32426 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32428 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
32429 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
32430 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
32431 * config/arm/arm_mve.h (vcreateq_f16): Remove.
32432 (vcreateq_f32): Remove.
32433 (vcreateq_u8): Remove.
32434 (vcreateq_u16): Remove.
32435 (vcreateq_u32): Remove.
32436 (vcreateq_u64): Remove.
32437 (vcreateq_s8): Remove.
32438 (vcreateq_s16): Remove.
32439 (vcreateq_s32): Remove.
32440 (vcreateq_s64): Remove.
32441 (__arm_vcreateq_u8): Remove.
32442 (__arm_vcreateq_u16): Remove.
32443 (__arm_vcreateq_u32): Remove.
32444 (__arm_vcreateq_u64): Remove.
32445 (__arm_vcreateq_s8): Remove.
32446 (__arm_vcreateq_s16): Remove.
32447 (__arm_vcreateq_s32): Remove.
32448 (__arm_vcreateq_s64): Remove.
32449 (__arm_vcreateq_f16): Remove.
32450 (__arm_vcreateq_f32): Remove.
32452 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32454 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
32455 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
32456 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
32457 (@mve_<mve_insn>q_f<mode>): ... this.
32458 (mve_vcreateq_<supf><mode>): Rename into ...
32459 (@mve_<mve_insn>q_<supf><mode>): ... this.
32461 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32463 * config/arm/arm-mve-builtins-shapes.cc (create): New.
32464 * config/arm/arm-mve-builtins-shapes.h: (create): New.
32466 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32468 * config/arm/arm-mve-builtins-functions.h (class
32469 unspec_mve_function_exact_insn): New.
32471 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32473 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
32475 * config/arm/arm-mve-builtins-base.def (vorrq): New.
32476 * config/arm/arm-mve-builtins-base.h (vorrq): New.
32477 * config/arm/arm-mve-builtins.cc
32478 (function_instance::has_inactive_argument): Handle vorrq.
32479 * config/arm/arm_mve.h (vorrq): Remove.
32480 (vorrq_m_n): Remove.
32483 (vorrq_u8): Remove.
32484 (vorrq_s8): Remove.
32485 (vorrq_u16): Remove.
32486 (vorrq_s16): Remove.
32487 (vorrq_u32): Remove.
32488 (vorrq_s32): Remove.
32489 (vorrq_n_u16): Remove.
32490 (vorrq_f16): Remove.
32491 (vorrq_n_s16): Remove.
32492 (vorrq_n_u32): Remove.
32493 (vorrq_f32): Remove.
32494 (vorrq_n_s32): Remove.
32495 (vorrq_m_n_s16): Remove.
32496 (vorrq_m_n_u16): Remove.
32497 (vorrq_m_n_s32): Remove.
32498 (vorrq_m_n_u32): Remove.
32499 (vorrq_m_s8): Remove.
32500 (vorrq_m_s32): Remove.
32501 (vorrq_m_s16): Remove.
32502 (vorrq_m_u8): Remove.
32503 (vorrq_m_u32): Remove.
32504 (vorrq_m_u16): Remove.
32505 (vorrq_m_f32): Remove.
32506 (vorrq_m_f16): Remove.
32507 (vorrq_x_s8): Remove.
32508 (vorrq_x_s16): Remove.
32509 (vorrq_x_s32): Remove.
32510 (vorrq_x_u8): Remove.
32511 (vorrq_x_u16): Remove.
32512 (vorrq_x_u32): Remove.
32513 (vorrq_x_f16): Remove.
32514 (vorrq_x_f32): Remove.
32515 (__arm_vorrq_u8): Remove.
32516 (__arm_vorrq_s8): Remove.
32517 (__arm_vorrq_u16): Remove.
32518 (__arm_vorrq_s16): Remove.
32519 (__arm_vorrq_u32): Remove.
32520 (__arm_vorrq_s32): Remove.
32521 (__arm_vorrq_n_u16): Remove.
32522 (__arm_vorrq_n_s16): Remove.
32523 (__arm_vorrq_n_u32): Remove.
32524 (__arm_vorrq_n_s32): Remove.
32525 (__arm_vorrq_m_n_s16): Remove.
32526 (__arm_vorrq_m_n_u16): Remove.
32527 (__arm_vorrq_m_n_s32): Remove.
32528 (__arm_vorrq_m_n_u32): Remove.
32529 (__arm_vorrq_m_s8): Remove.
32530 (__arm_vorrq_m_s32): Remove.
32531 (__arm_vorrq_m_s16): Remove.
32532 (__arm_vorrq_m_u8): Remove.
32533 (__arm_vorrq_m_u32): Remove.
32534 (__arm_vorrq_m_u16): Remove.
32535 (__arm_vorrq_x_s8): Remove.
32536 (__arm_vorrq_x_s16): Remove.
32537 (__arm_vorrq_x_s32): Remove.
32538 (__arm_vorrq_x_u8): Remove.
32539 (__arm_vorrq_x_u16): Remove.
32540 (__arm_vorrq_x_u32): Remove.
32541 (__arm_vorrq_f16): Remove.
32542 (__arm_vorrq_f32): Remove.
32543 (__arm_vorrq_m_f32): Remove.
32544 (__arm_vorrq_m_f16): Remove.
32545 (__arm_vorrq_x_f16): Remove.
32546 (__arm_vorrq_x_f32): Remove.
32547 (__arm_vorrq): Remove.
32548 (__arm_vorrq_m_n): Remove.
32549 (__arm_vorrq_m): Remove.
32550 (__arm_vorrq_x): Remove.
32552 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32554 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
32555 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
32556 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
32557 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
32559 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32561 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
32562 (vandq,veorq): New.
32563 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
32564 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
32565 * config/arm/arm_mve.h (vandq): Remove.
32568 (vandq_u8): Remove.
32569 (vandq_s8): Remove.
32570 (vandq_u16): Remove.
32571 (vandq_s16): Remove.
32572 (vandq_u32): Remove.
32573 (vandq_s32): Remove.
32574 (vandq_f16): Remove.
32575 (vandq_f32): Remove.
32576 (vandq_m_s8): Remove.
32577 (vandq_m_s32): Remove.
32578 (vandq_m_s16): Remove.
32579 (vandq_m_u8): Remove.
32580 (vandq_m_u32): Remove.
32581 (vandq_m_u16): Remove.
32582 (vandq_m_f32): Remove.
32583 (vandq_m_f16): Remove.
32584 (vandq_x_s8): Remove.
32585 (vandq_x_s16): Remove.
32586 (vandq_x_s32): Remove.
32587 (vandq_x_u8): Remove.
32588 (vandq_x_u16): Remove.
32589 (vandq_x_u32): Remove.
32590 (vandq_x_f16): Remove.
32591 (vandq_x_f32): Remove.
32592 (__arm_vandq_u8): Remove.
32593 (__arm_vandq_s8): Remove.
32594 (__arm_vandq_u16): Remove.
32595 (__arm_vandq_s16): Remove.
32596 (__arm_vandq_u32): Remove.
32597 (__arm_vandq_s32): Remove.
32598 (__arm_vandq_m_s8): Remove.
32599 (__arm_vandq_m_s32): Remove.
32600 (__arm_vandq_m_s16): Remove.
32601 (__arm_vandq_m_u8): Remove.
32602 (__arm_vandq_m_u32): Remove.
32603 (__arm_vandq_m_u16): Remove.
32604 (__arm_vandq_x_s8): Remove.
32605 (__arm_vandq_x_s16): Remove.
32606 (__arm_vandq_x_s32): Remove.
32607 (__arm_vandq_x_u8): Remove.
32608 (__arm_vandq_x_u16): Remove.
32609 (__arm_vandq_x_u32): Remove.
32610 (__arm_vandq_f16): Remove.
32611 (__arm_vandq_f32): Remove.
32612 (__arm_vandq_m_f32): Remove.
32613 (__arm_vandq_m_f16): Remove.
32614 (__arm_vandq_x_f16): Remove.
32615 (__arm_vandq_x_f32): Remove.
32616 (__arm_vandq): Remove.
32617 (__arm_vandq_m): Remove.
32618 (__arm_vandq_x): Remove.
32621 (veorq_u8): Remove.
32622 (veorq_s8): Remove.
32623 (veorq_u16): Remove.
32624 (veorq_s16): Remove.
32625 (veorq_u32): Remove.
32626 (veorq_s32): Remove.
32627 (veorq_f16): Remove.
32628 (veorq_f32): Remove.
32629 (veorq_m_s8): Remove.
32630 (veorq_m_s32): Remove.
32631 (veorq_m_s16): Remove.
32632 (veorq_m_u8): Remove.
32633 (veorq_m_u32): Remove.
32634 (veorq_m_u16): Remove.
32635 (veorq_m_f32): Remove.
32636 (veorq_m_f16): Remove.
32637 (veorq_x_s8): Remove.
32638 (veorq_x_s16): Remove.
32639 (veorq_x_s32): Remove.
32640 (veorq_x_u8): Remove.
32641 (veorq_x_u16): Remove.
32642 (veorq_x_u32): Remove.
32643 (veorq_x_f16): Remove.
32644 (veorq_x_f32): Remove.
32645 (__arm_veorq_u8): Remove.
32646 (__arm_veorq_s8): Remove.
32647 (__arm_veorq_u16): Remove.
32648 (__arm_veorq_s16): Remove.
32649 (__arm_veorq_u32): Remove.
32650 (__arm_veorq_s32): Remove.
32651 (__arm_veorq_m_s8): Remove.
32652 (__arm_veorq_m_s32): Remove.
32653 (__arm_veorq_m_s16): Remove.
32654 (__arm_veorq_m_u8): Remove.
32655 (__arm_veorq_m_u32): Remove.
32656 (__arm_veorq_m_u16): Remove.
32657 (__arm_veorq_x_s8): Remove.
32658 (__arm_veorq_x_s16): Remove.
32659 (__arm_veorq_x_s32): Remove.
32660 (__arm_veorq_x_u8): Remove.
32661 (__arm_veorq_x_u16): Remove.
32662 (__arm_veorq_x_u32): Remove.
32663 (__arm_veorq_f16): Remove.
32664 (__arm_veorq_f32): Remove.
32665 (__arm_veorq_m_f32): Remove.
32666 (__arm_veorq_m_f16): Remove.
32667 (__arm_veorq_x_f16): Remove.
32668 (__arm_veorq_x_f32): Remove.
32669 (__arm_veorq): Remove.
32670 (__arm_veorq_m): Remove.
32671 (__arm_veorq_x): Remove.
32673 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32675 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
32676 (MVE_FP_M_BINARY_LOGIC): New.
32677 (MVE_INT_M_N_BINARY_LOGIC): New.
32678 (MVE_INT_N_BINARY_LOGIC): New.
32679 (mve_insn): Add vand, veor, vorr, vbic.
32680 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
32681 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
32682 (mve_vbicq_m_<supf><mode>): Merge into ...
32683 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
32684 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
32685 (mve_vbicq_m_f<mode>): Merge into ...
32686 (@mve_<mve_insn>q_m_f<mode>): ... this.
32687 (mve_vorrq_n_<supf><mode>)
32688 (mve_vbicq_n_<supf><mode>): Merge into ...
32689 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
32690 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
32692 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
32694 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32696 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
32697 * config/arm/arm-mve-builtins-shapes.h (binary): New.
32699 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
32701 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
32703 (vaddq, vmulq, vsubq): New.
32704 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
32705 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
32706 * config/arm/arm_mve.h (vaddq): Remove.
32709 (vaddq_n_u8): Remove.
32710 (vaddq_n_s8): Remove.
32711 (vaddq_n_u16): Remove.
32712 (vaddq_n_s16): Remove.
32713 (vaddq_n_u32): Remove.
32714 (vaddq_n_s32): Remove.
32715 (vaddq_n_f16): Remove.
32716 (vaddq_n_f32): Remove.
32717 (vaddq_m_n_s8): Remove.
32718 (vaddq_m_n_s32): Remove.
32719 (vaddq_m_n_s16): Remove.
32720 (vaddq_m_n_u8): Remove.
32721 (vaddq_m_n_u32): Remove.
32722 (vaddq_m_n_u16): Remove.
32723 (vaddq_m_s8): Remove.
32724 (vaddq_m_s32): Remove.
32725 (vaddq_m_s16): Remove.
32726 (vaddq_m_u8): Remove.
32727 (vaddq_m_u32): Remove.
32728 (vaddq_m_u16): Remove.
32729 (vaddq_m_f32): Remove.
32730 (vaddq_m_f16): Remove.
32731 (vaddq_m_n_f32): Remove.
32732 (vaddq_m_n_f16): Remove.
32733 (vaddq_s8): Remove.
32734 (vaddq_s16): Remove.
32735 (vaddq_s32): Remove.
32736 (vaddq_u8): Remove.
32737 (vaddq_u16): Remove.
32738 (vaddq_u32): Remove.
32739 (vaddq_f16): Remove.
32740 (vaddq_f32): Remove.
32741 (vaddq_x_s8): Remove.
32742 (vaddq_x_s16): Remove.
32743 (vaddq_x_s32): Remove.
32744 (vaddq_x_n_s8): Remove.
32745 (vaddq_x_n_s16): Remove.
32746 (vaddq_x_n_s32): Remove.
32747 (vaddq_x_u8): Remove.
32748 (vaddq_x_u16): Remove.
32749 (vaddq_x_u32): Remove.
32750 (vaddq_x_n_u8): Remove.
32751 (vaddq_x_n_u16): Remove.
32752 (vaddq_x_n_u32): Remove.
32753 (vaddq_x_f16): Remove.
32754 (vaddq_x_f32): Remove.
32755 (vaddq_x_n_f16): Remove.
32756 (vaddq_x_n_f32): Remove.
32757 (__arm_vaddq_n_u8): Remove.
32758 (__arm_vaddq_n_s8): Remove.
32759 (__arm_vaddq_n_u16): Remove.
32760 (__arm_vaddq_n_s16): Remove.
32761 (__arm_vaddq_n_u32): Remove.
32762 (__arm_vaddq_n_s32): Remove.
32763 (__arm_vaddq_m_n_s8): Remove.
32764 (__arm_vaddq_m_n_s32): Remove.
32765 (__arm_vaddq_m_n_s16): Remove.
32766 (__arm_vaddq_m_n_u8): Remove.
32767 (__arm_vaddq_m_n_u32): Remove.
32768 (__arm_vaddq_m_n_u16): Remove.
32769 (__arm_vaddq_m_s8): Remove.
32770 (__arm_vaddq_m_s32): Remove.
32771 (__arm_vaddq_m_s16): Remove.
32772 (__arm_vaddq_m_u8): Remove.
32773 (__arm_vaddq_m_u32): Remove.
32774 (__arm_vaddq_m_u16): Remove.
32775 (__arm_vaddq_s8): Remove.
32776 (__arm_vaddq_s16): Remove.
32777 (__arm_vaddq_s32): Remove.
32778 (__arm_vaddq_u8): Remove.
32779 (__arm_vaddq_u16): Remove.
32780 (__arm_vaddq_u32): Remove.
32781 (__arm_vaddq_x_s8): Remove.
32782 (__arm_vaddq_x_s16): Remove.
32783 (__arm_vaddq_x_s32): Remove.
32784 (__arm_vaddq_x_n_s8): Remove.
32785 (__arm_vaddq_x_n_s16): Remove.
32786 (__arm_vaddq_x_n_s32): Remove.
32787 (__arm_vaddq_x_u8): Remove.
32788 (__arm_vaddq_x_u16): Remove.
32789 (__arm_vaddq_x_u32): Remove.
32790 (__arm_vaddq_x_n_u8): Remove.
32791 (__arm_vaddq_x_n_u16): Remove.
32792 (__arm_vaddq_x_n_u32): Remove.
32793 (__arm_vaddq_n_f16): Remove.
32794 (__arm_vaddq_n_f32): Remove.
32795 (__arm_vaddq_m_f32): Remove.
32796 (__arm_vaddq_m_f16): Remove.
32797 (__arm_vaddq_m_n_f32): Remove.
32798 (__arm_vaddq_m_n_f16): Remove.
32799 (__arm_vaddq_f16): Remove.
32800 (__arm_vaddq_f32): Remove.
32801 (__arm_vaddq_x_f16): Remove.
32802 (__arm_vaddq_x_f32): Remove.
32803 (__arm_vaddq_x_n_f16): Remove.
32804 (__arm_vaddq_x_n_f32): Remove.
32805 (__arm_vaddq): Remove.
32806 (__arm_vaddq_m): Remove.
32807 (__arm_vaddq_x): Remove.
32811 (vmulq_u8): Remove.
32812 (vmulq_n_u8): Remove.
32813 (vmulq_s8): Remove.
32814 (vmulq_n_s8): Remove.
32815 (vmulq_u16): Remove.
32816 (vmulq_n_u16): Remove.
32817 (vmulq_s16): Remove.
32818 (vmulq_n_s16): Remove.
32819 (vmulq_u32): Remove.
32820 (vmulq_n_u32): Remove.
32821 (vmulq_s32): Remove.
32822 (vmulq_n_s32): Remove.
32823 (vmulq_n_f16): Remove.
32824 (vmulq_f16): Remove.
32825 (vmulq_n_f32): Remove.
32826 (vmulq_f32): Remove.
32827 (vmulq_m_n_s8): Remove.
32828 (vmulq_m_n_s32): Remove.
32829 (vmulq_m_n_s16): Remove.
32830 (vmulq_m_n_u8): Remove.
32831 (vmulq_m_n_u32): Remove.
32832 (vmulq_m_n_u16): Remove.
32833 (vmulq_m_s8): Remove.
32834 (vmulq_m_s32): Remove.
32835 (vmulq_m_s16): Remove.
32836 (vmulq_m_u8): Remove.
32837 (vmulq_m_u32): Remove.
32838 (vmulq_m_u16): Remove.
32839 (vmulq_m_f32): Remove.
32840 (vmulq_m_f16): Remove.
32841 (vmulq_m_n_f32): Remove.
32842 (vmulq_m_n_f16): Remove.
32843 (vmulq_x_s8): Remove.
32844 (vmulq_x_s16): Remove.
32845 (vmulq_x_s32): Remove.
32846 (vmulq_x_n_s8): Remove.
32847 (vmulq_x_n_s16): Remove.
32848 (vmulq_x_n_s32): Remove.
32849 (vmulq_x_u8): Remove.
32850 (vmulq_x_u16): Remove.
32851 (vmulq_x_u32): Remove.
32852 (vmulq_x_n_u8): Remove.
32853 (vmulq_x_n_u16): Remove.
32854 (vmulq_x_n_u32): Remove.
32855 (vmulq_x_f16): Remove.
32856 (vmulq_x_f32): Remove.
32857 (vmulq_x_n_f16): Remove.
32858 (vmulq_x_n_f32): Remove.
32859 (__arm_vmulq_u8): Remove.
32860 (__arm_vmulq_n_u8): Remove.
32861 (__arm_vmulq_s8): Remove.
32862 (__arm_vmulq_n_s8): Remove.
32863 (__arm_vmulq_u16): Remove.
32864 (__arm_vmulq_n_u16): Remove.
32865 (__arm_vmulq_s16): Remove.
32866 (__arm_vmulq_n_s16): Remove.
32867 (__arm_vmulq_u32): Remove.
32868 (__arm_vmulq_n_u32): Remove.
32869 (__arm_vmulq_s32): Remove.
32870 (__arm_vmulq_n_s32): Remove.
32871 (__arm_vmulq_m_n_s8): Remove.
32872 (__arm_vmulq_m_n_s32): Remove.
32873 (__arm_vmulq_m_n_s16): Remove.
32874 (__arm_vmulq_m_n_u8): Remove.
32875 (__arm_vmulq_m_n_u32): Remove.
32876 (__arm_vmulq_m_n_u16): Remove.
32877 (__arm_vmulq_m_s8): Remove.
32878 (__arm_vmulq_m_s32): Remove.
32879 (__arm_vmulq_m_s16): Remove.
32880 (__arm_vmulq_m_u8): Remove.
32881 (__arm_vmulq_m_u32): Remove.
32882 (__arm_vmulq_m_u16): Remove.
32883 (__arm_vmulq_x_s8): Remove.
32884 (__arm_vmulq_x_s16): Remove.
32885 (__arm_vmulq_x_s32): Remove.
32886 (__arm_vmulq_x_n_s8): Remove.
32887 (__arm_vmulq_x_n_s16): Remove.
32888 (__arm_vmulq_x_n_s32): Remove.
32889 (__arm_vmulq_x_u8): Remove.
32890 (__arm_vmulq_x_u16): Remove.
32891 (__arm_vmulq_x_u32): Remove.
32892 (__arm_vmulq_x_n_u8): Remove.
32893 (__arm_vmulq_x_n_u16): Remove.
32894 (__arm_vmulq_x_n_u32): Remove.
32895 (__arm_vmulq_n_f16): Remove.
32896 (__arm_vmulq_f16): Remove.
32897 (__arm_vmulq_n_f32): Remove.
32898 (__arm_vmulq_f32): Remove.
32899 (__arm_vmulq_m_f32): Remove.
32900 (__arm_vmulq_m_f16): Remove.
32901 (__arm_vmulq_m_n_f32): Remove.
32902 (__arm_vmulq_m_n_f16): Remove.
32903 (__arm_vmulq_x_f16): Remove.
32904 (__arm_vmulq_x_f32): Remove.
32905 (__arm_vmulq_x_n_f16): Remove.
32906 (__arm_vmulq_x_n_f32): Remove.
32907 (__arm_vmulq): Remove.
32908 (__arm_vmulq_m): Remove.
32909 (__arm_vmulq_x): Remove.
32913 (vsubq_n_f16): Remove.
32914 (vsubq_n_f32): Remove.
32915 (vsubq_u8): Remove.
32916 (vsubq_n_u8): Remove.
32917 (vsubq_s8): Remove.
32918 (vsubq_n_s8): Remove.
32919 (vsubq_u16): Remove.
32920 (vsubq_n_u16): Remove.
32921 (vsubq_s16): Remove.
32922 (vsubq_n_s16): Remove.
32923 (vsubq_u32): Remove.
32924 (vsubq_n_u32): Remove.
32925 (vsubq_s32): Remove.
32926 (vsubq_n_s32): Remove.
32927 (vsubq_f16): Remove.
32928 (vsubq_f32): Remove.
32929 (vsubq_m_s8): Remove.
32930 (vsubq_m_u8): Remove.
32931 (vsubq_m_s16): Remove.
32932 (vsubq_m_u16): Remove.
32933 (vsubq_m_s32): Remove.
32934 (vsubq_m_u32): Remove.
32935 (vsubq_m_n_s8): Remove.
32936 (vsubq_m_n_s32): Remove.
32937 (vsubq_m_n_s16): Remove.
32938 (vsubq_m_n_u8): Remove.
32939 (vsubq_m_n_u32): Remove.
32940 (vsubq_m_n_u16): Remove.
32941 (vsubq_m_f32): Remove.
32942 (vsubq_m_f16): Remove.
32943 (vsubq_m_n_f32): Remove.
32944 (vsubq_m_n_f16): Remove.
32945 (vsubq_x_s8): Remove.
32946 (vsubq_x_s16): Remove.
32947 (vsubq_x_s32): Remove.
32948 (vsubq_x_n_s8): Remove.
32949 (vsubq_x_n_s16): Remove.
32950 (vsubq_x_n_s32): Remove.
32951 (vsubq_x_u8): Remove.
32952 (vsubq_x_u16): Remove.
32953 (vsubq_x_u32): Remove.
32954 (vsubq_x_n_u8): Remove.
32955 (vsubq_x_n_u16): Remove.
32956 (vsubq_x_n_u32): Remove.
32957 (vsubq_x_f16): Remove.
32958 (vsubq_x_f32): Remove.
32959 (vsubq_x_n_f16): Remove.
32960 (vsubq_x_n_f32): Remove.
32961 (__arm_vsubq_u8): Remove.
32962 (__arm_vsubq_n_u8): Remove.
32963 (__arm_vsubq_s8): Remove.
32964 (__arm_vsubq_n_s8): Remove.
32965 (__arm_vsubq_u16): Remove.
32966 (__arm_vsubq_n_u16): Remove.
32967 (__arm_vsubq_s16): Remove.
32968 (__arm_vsubq_n_s16): Remove.
32969 (__arm_vsubq_u32): Remove.
32970 (__arm_vsubq_n_u32): Remove.
32971 (__arm_vsubq_s32): Remove.
32972 (__arm_vsubq_n_s32): Remove.
32973 (__arm_vsubq_m_s8): Remove.
32974 (__arm_vsubq_m_u8): Remove.
32975 (__arm_vsubq_m_s16): Remove.
32976 (__arm_vsubq_m_u16): Remove.
32977 (__arm_vsubq_m_s32): Remove.
32978 (__arm_vsubq_m_u32): Remove.
32979 (__arm_vsubq_m_n_s8): Remove.
32980 (__arm_vsubq_m_n_s32): Remove.
32981 (__arm_vsubq_m_n_s16): Remove.
32982 (__arm_vsubq_m_n_u8): Remove.
32983 (__arm_vsubq_m_n_u32): Remove.
32984 (__arm_vsubq_m_n_u16): Remove.
32985 (__arm_vsubq_x_s8): Remove.
32986 (__arm_vsubq_x_s16): Remove.
32987 (__arm_vsubq_x_s32): Remove.
32988 (__arm_vsubq_x_n_s8): Remove.
32989 (__arm_vsubq_x_n_s16): Remove.
32990 (__arm_vsubq_x_n_s32): Remove.
32991 (__arm_vsubq_x_u8): Remove.
32992 (__arm_vsubq_x_u16): Remove.
32993 (__arm_vsubq_x_u32): Remove.
32994 (__arm_vsubq_x_n_u8): Remove.
32995 (__arm_vsubq_x_n_u16): Remove.
32996 (__arm_vsubq_x_n_u32): Remove.
32997 (__arm_vsubq_n_f16): Remove.
32998 (__arm_vsubq_n_f32): Remove.
32999 (__arm_vsubq_f16): Remove.
33000 (__arm_vsubq_f32): Remove.
33001 (__arm_vsubq_m_f32): Remove.
33002 (__arm_vsubq_m_f16): Remove.
33003 (__arm_vsubq_m_n_f32): Remove.
33004 (__arm_vsubq_m_n_f16): Remove.
33005 (__arm_vsubq_x_f16): Remove.
33006 (__arm_vsubq_x_f32): Remove.
33007 (__arm_vsubq_x_n_f16): Remove.
33008 (__arm_vsubq_x_n_f32): Remove.
33009 (__arm_vsubq): Remove.
33010 (__arm_vsubq_m): Remove.
33011 (__arm_vsubq_x): Remove.
33012 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
33014 (vmulq_u, vmulq_s, vmulq_f): Remove.
33015 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
33016 (mve_vmulq_<supf><mode>): Remove.
33018 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33020 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
33021 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
33022 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
33024 * config/arm/mve.md
33025 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
33027 (@mve_<mve_insn>q_n_f<mode>): ... this.
33028 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
33029 (mve_vsubq_n_<supf><mode>): Factorize into ...
33030 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
33031 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
33033 (mve_<mve_addsubmul>q<mode>): ... this.
33034 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
33036 (mve_<mve_addsubmul>q_f<mode>): ... this.
33037 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
33038 (mve_vsubq_m_<supf><mode>): Factorize into ...
33039 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
33040 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
33041 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
33042 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
33043 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
33045 (@mve_<mve_insn>q_m_f<mode>): ... this.
33046 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
33047 (mve_vsubq_m_n_f<mode>): Factorize into ...
33048 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
33050 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33052 * config/arm/arm-mve-builtins-functions.h (class
33053 unspec_based_mve_function_base): New.
33054 (class unspec_based_mve_function_exact_insn): New.
33056 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
33058 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
33059 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
33061 2023-05-03 Murray Steele <murray.steele@arm.com>
33062 Christophe Lyon <christophe.lyon@arm.com>
33064 * config/arm/arm-mve-builtins-base.cc (class
33065 vuninitializedq_impl): New.
33066 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
33067 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
33069 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
33070 * config/arm/arm-mve-builtins-shapes.h (inherent): New
33072 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
33073 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
33074 (__arm_vuninitializedq_u8): Remove.
33075 (__arm_vuninitializedq_u16): Remove.
33076 (__arm_vuninitializedq_u32): Remove.
33077 (__arm_vuninitializedq_u64): Remove.
33078 (__arm_vuninitializedq_s8): Remove.
33079 (__arm_vuninitializedq_s16): Remove.
33080 (__arm_vuninitializedq_s32): Remove.
33081 (__arm_vuninitializedq_s64): Remove.
33082 (__arm_vuninitializedq_f16): Remove.
33083 (__arm_vuninitializedq_f32): Remove.
33085 2023-05-03 Murray Steele <murray.steele@arm.com>
33086 Christophe Lyon <christophe.lyon@arm.com>
33088 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
33089 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
33090 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
33091 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
33092 (parse_type): Likewise.
33093 (parse_signature): Likewise.
33094 (build_one): Likewise.
33095 (build_all): Likewise.
33096 (overloaded_base): New struct.
33097 (unary_convert_def): Likewise.
33098 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
33099 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
33101 (TYPES_reinterpret_unsigned1): Likewise.
33102 (TYPES_reinterpret_integer): Likewise.
33103 (TYPES_reinterpret_integer1): Likewise.
33104 (TYPES_reinterpret_float1): Likewise.
33105 (TYPES_reinterpret_float): Likewise.
33106 (reinterpret_integer): New.
33107 (reinterpret_float): New.
33108 (handle_arm_mve_h): Register builtins.
33109 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
33110 (vreinterpretq_s32): Likewise.
33111 (vreinterpretq_s64): Likewise.
33112 (vreinterpretq_s8): Likewise.
33113 (vreinterpretq_u16): Likewise.
33114 (vreinterpretq_u32): Likewise.
33115 (vreinterpretq_u64): Likewise.
33116 (vreinterpretq_u8): Likewise.
33117 (vreinterpretq_f16): Likewise.
33118 (vreinterpretq_f32): Likewise.
33119 (vreinterpretq_s16_s32): Likewise.
33120 (vreinterpretq_s16_s64): Likewise.
33121 (vreinterpretq_s16_s8): Likewise.
33122 (vreinterpretq_s16_u16): Likewise.
33123 (vreinterpretq_s16_u32): Likewise.
33124 (vreinterpretq_s16_u64): Likewise.
33125 (vreinterpretq_s16_u8): Likewise.
33126 (vreinterpretq_s32_s16): Likewise.
33127 (vreinterpretq_s32_s64): Likewise.
33128 (vreinterpretq_s32_s8): Likewise.
33129 (vreinterpretq_s32_u16): Likewise.
33130 (vreinterpretq_s32_u32): Likewise.
33131 (vreinterpretq_s32_u64): Likewise.
33132 (vreinterpretq_s32_u8): Likewise.
33133 (vreinterpretq_s64_s16): Likewise.
33134 (vreinterpretq_s64_s32): Likewise.
33135 (vreinterpretq_s64_s8): Likewise.
33136 (vreinterpretq_s64_u16): Likewise.
33137 (vreinterpretq_s64_u32): Likewise.
33138 (vreinterpretq_s64_u64): Likewise.
33139 (vreinterpretq_s64_u8): Likewise.
33140 (vreinterpretq_s8_s16): Likewise.
33141 (vreinterpretq_s8_s32): Likewise.
33142 (vreinterpretq_s8_s64): Likewise.
33143 (vreinterpretq_s8_u16): Likewise.
33144 (vreinterpretq_s8_u32): Likewise.
33145 (vreinterpretq_s8_u64): Likewise.
33146 (vreinterpretq_s8_u8): Likewise.
33147 (vreinterpretq_u16_s16): Likewise.
33148 (vreinterpretq_u16_s32): Likewise.
33149 (vreinterpretq_u16_s64): Likewise.
33150 (vreinterpretq_u16_s8): Likewise.
33151 (vreinterpretq_u16_u32): Likewise.
33152 (vreinterpretq_u16_u64): Likewise.
33153 (vreinterpretq_u16_u8): Likewise.
33154 (vreinterpretq_u32_s16): Likewise.
33155 (vreinterpretq_u32_s32): Likewise.
33156 (vreinterpretq_u32_s64): Likewise.
33157 (vreinterpretq_u32_s8): Likewise.
33158 (vreinterpretq_u32_u16): Likewise.
33159 (vreinterpretq_u32_u64): Likewise.
33160 (vreinterpretq_u32_u8): Likewise.
33161 (vreinterpretq_u64_s16): Likewise.
33162 (vreinterpretq_u64_s32): Likewise.
33163 (vreinterpretq_u64_s64): Likewise.
33164 (vreinterpretq_u64_s8): Likewise.
33165 (vreinterpretq_u64_u16): Likewise.
33166 (vreinterpretq_u64_u32): Likewise.
33167 (vreinterpretq_u64_u8): Likewise.
33168 (vreinterpretq_u8_s16): Likewise.
33169 (vreinterpretq_u8_s32): Likewise.
33170 (vreinterpretq_u8_s64): Likewise.
33171 (vreinterpretq_u8_s8): Likewise.
33172 (vreinterpretq_u8_u16): Likewise.
33173 (vreinterpretq_u8_u32): Likewise.
33174 (vreinterpretq_u8_u64): Likewise.
33175 (vreinterpretq_s32_f16): Likewise.
33176 (vreinterpretq_s32_f32): Likewise.
33177 (vreinterpretq_u16_f16): Likewise.
33178 (vreinterpretq_u16_f32): Likewise.
33179 (vreinterpretq_u32_f16): Likewise.
33180 (vreinterpretq_u32_f32): Likewise.
33181 (vreinterpretq_u64_f16): Likewise.
33182 (vreinterpretq_u64_f32): Likewise.
33183 (vreinterpretq_u8_f16): Likewise.
33184 (vreinterpretq_u8_f32): Likewise.
33185 (vreinterpretq_f16_f32): Likewise.
33186 (vreinterpretq_f16_s16): Likewise.
33187 (vreinterpretq_f16_s32): Likewise.
33188 (vreinterpretq_f16_s64): Likewise.
33189 (vreinterpretq_f16_s8): Likewise.
33190 (vreinterpretq_f16_u16): Likewise.
33191 (vreinterpretq_f16_u32): Likewise.
33192 (vreinterpretq_f16_u64): Likewise.
33193 (vreinterpretq_f16_u8): Likewise.
33194 (vreinterpretq_f32_f16): Likewise.
33195 (vreinterpretq_f32_s16): Likewise.
33196 (vreinterpretq_f32_s32): Likewise.
33197 (vreinterpretq_f32_s64): Likewise.
33198 (vreinterpretq_f32_s8): Likewise.
33199 (vreinterpretq_f32_u16): Likewise.
33200 (vreinterpretq_f32_u32): Likewise.
33201 (vreinterpretq_f32_u64): Likewise.
33202 (vreinterpretq_f32_u8): Likewise.
33203 (vreinterpretq_s16_f16): Likewise.
33204 (vreinterpretq_s16_f32): Likewise.
33205 (vreinterpretq_s64_f16): Likewise.
33206 (vreinterpretq_s64_f32): Likewise.
33207 (vreinterpretq_s8_f16): Likewise.
33208 (vreinterpretq_s8_f32): Likewise.
33209 (__arm_vreinterpretq_f16): Likewise.
33210 (__arm_vreinterpretq_f32): Likewise.
33211 (__arm_vreinterpretq_s16): Likewise.
33212 (__arm_vreinterpretq_s32): Likewise.
33213 (__arm_vreinterpretq_s64): Likewise.
33214 (__arm_vreinterpretq_s8): Likewise.
33215 (__arm_vreinterpretq_u16): Likewise.
33216 (__arm_vreinterpretq_u32): Likewise.
33217 (__arm_vreinterpretq_u64): Likewise.
33218 (__arm_vreinterpretq_u8): Likewise.
33219 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
33220 (__arm_vreinterpretq_s16_s64): Likewise.
33221 (__arm_vreinterpretq_s16_s8): Likewise.
33222 (__arm_vreinterpretq_s16_u16): Likewise.
33223 (__arm_vreinterpretq_s16_u32): Likewise.
33224 (__arm_vreinterpretq_s16_u64): Likewise.
33225 (__arm_vreinterpretq_s16_u8): Likewise.
33226 (__arm_vreinterpretq_s32_s16): Likewise.
33227 (__arm_vreinterpretq_s32_s64): Likewise.
33228 (__arm_vreinterpretq_s32_s8): Likewise.
33229 (__arm_vreinterpretq_s32_u16): Likewise.
33230 (__arm_vreinterpretq_s32_u32): Likewise.
33231 (__arm_vreinterpretq_s32_u64): Likewise.
33232 (__arm_vreinterpretq_s32_u8): Likewise.
33233 (__arm_vreinterpretq_s64_s16): Likewise.
33234 (__arm_vreinterpretq_s64_s32): Likewise.
33235 (__arm_vreinterpretq_s64_s8): Likewise.
33236 (__arm_vreinterpretq_s64_u16): Likewise.
33237 (__arm_vreinterpretq_s64_u32): Likewise.
33238 (__arm_vreinterpretq_s64_u64): Likewise.
33239 (__arm_vreinterpretq_s64_u8): Likewise.
33240 (__arm_vreinterpretq_s8_s16): Likewise.
33241 (__arm_vreinterpretq_s8_s32): Likewise.
33242 (__arm_vreinterpretq_s8_s64): Likewise.
33243 (__arm_vreinterpretq_s8_u16): Likewise.
33244 (__arm_vreinterpretq_s8_u32): Likewise.
33245 (__arm_vreinterpretq_s8_u64): Likewise.
33246 (__arm_vreinterpretq_s8_u8): Likewise.
33247 (__arm_vreinterpretq_u16_s16): Likewise.
33248 (__arm_vreinterpretq_u16_s32): Likewise.
33249 (__arm_vreinterpretq_u16_s64): Likewise.
33250 (__arm_vreinterpretq_u16_s8): Likewise.
33251 (__arm_vreinterpretq_u16_u32): Likewise.
33252 (__arm_vreinterpretq_u16_u64): Likewise.
33253 (__arm_vreinterpretq_u16_u8): Likewise.
33254 (__arm_vreinterpretq_u32_s16): Likewise.
33255 (__arm_vreinterpretq_u32_s32): Likewise.
33256 (__arm_vreinterpretq_u32_s64): Likewise.
33257 (__arm_vreinterpretq_u32_s8): Likewise.
33258 (__arm_vreinterpretq_u32_u16): Likewise.
33259 (__arm_vreinterpretq_u32_u64): Likewise.
33260 (__arm_vreinterpretq_u32_u8): Likewise.
33261 (__arm_vreinterpretq_u64_s16): Likewise.
33262 (__arm_vreinterpretq_u64_s32): Likewise.
33263 (__arm_vreinterpretq_u64_s64): Likewise.
33264 (__arm_vreinterpretq_u64_s8): Likewise.
33265 (__arm_vreinterpretq_u64_u16): Likewise.
33266 (__arm_vreinterpretq_u64_u32): Likewise.
33267 (__arm_vreinterpretq_u64_u8): Likewise.
33268 (__arm_vreinterpretq_u8_s16): Likewise.
33269 (__arm_vreinterpretq_u8_s32): Likewise.
33270 (__arm_vreinterpretq_u8_s64): Likewise.
33271 (__arm_vreinterpretq_u8_s8): Likewise.
33272 (__arm_vreinterpretq_u8_u16): Likewise.
33273 (__arm_vreinterpretq_u8_u32): Likewise.
33274 (__arm_vreinterpretq_u8_u64): Likewise.
33275 (__arm_vreinterpretq_s32_f16): Likewise.
33276 (__arm_vreinterpretq_s32_f32): Likewise.
33277 (__arm_vreinterpretq_s16_f16): Likewise.
33278 (__arm_vreinterpretq_s16_f32): Likewise.
33279 (__arm_vreinterpretq_s64_f16): Likewise.
33280 (__arm_vreinterpretq_s64_f32): Likewise.
33281 (__arm_vreinterpretq_s8_f16): Likewise.
33282 (__arm_vreinterpretq_s8_f32): Likewise.
33283 (__arm_vreinterpretq_u16_f16): Likewise.
33284 (__arm_vreinterpretq_u16_f32): Likewise.
33285 (__arm_vreinterpretq_u32_f16): Likewise.
33286 (__arm_vreinterpretq_u32_f32): Likewise.
33287 (__arm_vreinterpretq_u64_f16): Likewise.
33288 (__arm_vreinterpretq_u64_f32): Likewise.
33289 (__arm_vreinterpretq_u8_f16): Likewise.
33290 (__arm_vreinterpretq_u8_f32): Likewise.
33291 (__arm_vreinterpretq_f16_f32): Likewise.
33292 (__arm_vreinterpretq_f16_s16): Likewise.
33293 (__arm_vreinterpretq_f16_s32): Likewise.
33294 (__arm_vreinterpretq_f16_s64): Likewise.
33295 (__arm_vreinterpretq_f16_s8): Likewise.
33296 (__arm_vreinterpretq_f16_u16): Likewise.
33297 (__arm_vreinterpretq_f16_u32): Likewise.
33298 (__arm_vreinterpretq_f16_u64): Likewise.
33299 (__arm_vreinterpretq_f16_u8): Likewise.
33300 (__arm_vreinterpretq_f32_f16): Likewise.
33301 (__arm_vreinterpretq_f32_s16): Likewise.
33302 (__arm_vreinterpretq_f32_s32): Likewise.
33303 (__arm_vreinterpretq_f32_s64): Likewise.
33304 (__arm_vreinterpretq_f32_s8): Likewise.
33305 (__arm_vreinterpretq_f32_u16): Likewise.
33306 (__arm_vreinterpretq_f32_u32): Likewise.
33307 (__arm_vreinterpretq_f32_u64): Likewise.
33308 (__arm_vreinterpretq_f32_u8): Likewise.
33309 (__arm_vreinterpretq_s16): Likewise.
33310 (__arm_vreinterpretq_s32): Likewise.
33311 (__arm_vreinterpretq_s64): Likewise.
33312 (__arm_vreinterpretq_s8): Likewise.
33313 (__arm_vreinterpretq_u16): Likewise.
33314 (__arm_vreinterpretq_u32): Likewise.
33315 (__arm_vreinterpretq_u64): Likewise.
33316 (__arm_vreinterpretq_u8): Likewise.
33317 (__arm_vreinterpretq_f16): Likewise.
33318 (__arm_vreinterpretq_f32): Likewise.
33319 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
33320 * config/arm/unspecs.md: (REINTERPRET): New unspec.
33322 2023-05-03 Murray Steele <murray.steele@arm.com>
33323 Christophe Lyon <christophe.lyon@arm.com>
33324 Christophe Lyon <christophe.lyon@arm.com
33326 * config.gcc: Add arm-mve-builtins-base.o and
33327 arm-mve-builtins-shapes.o to extra_objs.
33328 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
33330 (arm_expand_builtin): Likewise
33331 (arm_check_builtin_call): Likewise
33332 (arm_describe_resolver): Likewise.
33333 * config/arm/arm-builtins.h (enum resolver_ident): Add
33335 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
33336 (arm_resolve_overloaded_builtin): Handle MVE builtins.
33337 (arm_register_target_pragmas): Register arm_check_builtin_call.
33338 * config/arm/arm-mve-builtins.cc (class registered_function): New
33340 (struct registered_function_hasher): New struct.
33341 (pred_suffixes): New table.
33342 (mode_suffixes): New table.
33343 (type_suffix_info): New table.
33344 (TYPES_float16): New.
33345 (TYPES_all_float): New.
33346 (TYPES_integer_8): New.
33347 (TYPES_integer_8_16): New.
33348 (TYPES_integer_16_32): New.
33349 (TYPES_integer_32): New.
33350 (TYPES_signed_16_32): New.
33351 (TYPES_signed_32): New.
33352 (TYPES_all_signed): New.
33353 (TYPES_all_unsigned): New.
33354 (TYPES_all_integer): New.
33355 (TYPES_all_integer_with_64): New.
33356 (DEF_VECTOR_TYPE): New.
33357 (DEF_DOUBLE_TYPE): New.
33358 (DEF_MVE_TYPES_ARRAY): New.
33359 (all_integer): New.
33360 (all_integer_with_64): New.
33364 (all_unsigned): New.
33366 (integer_8_16): New.
33367 (integer_16_32): New.
33369 (signed_16_32): New.
33371 (register_vector_type): Use void_type_node for mve.fp-only types when
33372 mve.fp is not enabled.
33373 (register_builtin_tuple_types): Likewise.
33374 (handle_arm_mve_h): New function..
33375 (matches_type_p): Likewise..
33376 (report_out_of_range): Likewise.
33377 (report_not_enum): Likewise.
33378 (report_missing_float): Likewise.
33379 (report_non_ice): Likewise.
33380 (check_requires_float): Likewise.
33381 (function_instance::hash): Likewise
33382 (function_instance::call_properties): Likewise.
33383 (function_instance::reads_global_state_p): Likewise.
33384 (function_instance::modifies_global_state_p): Likewise.
33385 (function_instance::could_trap_p): Likewise.
33386 (function_instance::has_inactive_argument): Likewise.
33387 (registered_function_hasher::hash): Likewise.
33388 (registered_function_hasher::equal): Likewise.
33389 (function_builder::function_builder): Likewise.
33390 (function_builder::~function_builder): Likewise.
33391 (function_builder::append_name): Likewise.
33392 (function_builder::finish_name): Likewise.
33393 (function_builder::get_name): Likewise.
33394 (add_attribute): Likewise.
33395 (function_builder::get_attributes): Likewise.
33396 (function_builder::add_function): Likewise.
33397 (function_builder::add_unique_function): Likewise.
33398 (function_builder::add_overloaded_function): Likewise.
33399 (function_builder::add_overloaded_functions): Likewise.
33400 (function_builder::register_function_group): Likewise.
33401 (function_call_info::function_call_info): Likewise.
33402 (function_resolver::function_resolver): Likewise.
33403 (function_resolver::get_vector_type): Likewise.
33404 (function_resolver::get_scalar_type_name): Likewise.
33405 (function_resolver::get_argument_type): Likewise.
33406 (function_resolver::scalar_argument_p): Likewise.
33407 (function_resolver::report_no_such_form): Likewise.
33408 (function_resolver::lookup_form): Likewise.
33409 (function_resolver::resolve_to): Likewise.
33410 (function_resolver::infer_vector_or_tuple_type): Likewise.
33411 (function_resolver::infer_vector_type): Likewise.
33412 (function_resolver::require_vector_or_scalar_type): Likewise.
33413 (function_resolver::require_vector_type): Likewise.
33414 (function_resolver::require_matching_vector_type): Likewise.
33415 (function_resolver::require_derived_vector_type): Likewise.
33416 (function_resolver::require_derived_scalar_type): Likewise.
33417 (function_resolver::require_integer_immediate): Likewise.
33418 (function_resolver::require_scalar_type): Likewise.
33419 (function_resolver::check_num_arguments): Likewise.
33420 (function_resolver::check_gp_argument): Likewise.
33421 (function_resolver::finish_opt_n_resolution): Likewise.
33422 (function_resolver::resolve_unary): Likewise.
33423 (function_resolver::resolve_unary_n): Likewise.
33424 (function_resolver::resolve_uniform): Likewise.
33425 (function_resolver::resolve_uniform_opt_n): Likewise.
33426 (function_resolver::resolve): Likewise.
33427 (function_checker::function_checker): Likewise.
33428 (function_checker::argument_exists_p): Likewise.
33429 (function_checker::require_immediate): Likewise.
33430 (function_checker::require_immediate_enum): Likewise.
33431 (function_checker::require_immediate_range): Likewise.
33432 (function_checker::check): Likewise.
33433 (gimple_folder::gimple_folder): Likewise.
33434 (gimple_folder::fold): Likewise.
33435 (function_expander::function_expander): Likewise.
33436 (function_expander::direct_optab_handler): Likewise.
33437 (function_expander::get_fallback_value): Likewise.
33438 (function_expander::get_reg_target): Likewise.
33439 (function_expander::add_output_operand): Likewise.
33440 (function_expander::add_input_operand): Likewise.
33441 (function_expander::add_integer_operand): Likewise.
33442 (function_expander::generate_insn): Likewise.
33443 (function_expander::use_exact_insn): Likewise.
33444 (function_expander::use_unpred_insn): Likewise.
33445 (function_expander::use_pred_x_insn): Likewise.
33446 (function_expander::use_cond_insn): Likewise.
33447 (function_expander::map_to_rtx_codes): Likewise.
33448 (function_expander::expand): Likewise.
33449 (resolve_overloaded_builtin): Likewise.
33450 (check_builtin_call): Likewise.
33451 (gimple_fold_builtin): Likewise.
33452 (expand_builtin): Likewise.
33453 (gt_ggc_mx): Likewise.
33454 (gt_pch_nx): Likewise.
33455 (gt_pch_nx): Likewise.
33456 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
33467 (offset): New mode.
33468 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
33469 (CP_READ_FPCR): Likewise.
33470 (CP_RAISE_FP_EXCEPTIONS): Likewise.
33471 (CP_READ_MEMORY): Likewise.
33472 (CP_WRITE_MEMORY): Likewise.
33473 (enum units_index): New enum.
33474 (enum predication_index): New.
33475 (enum type_class_index): New.
33476 (enum mode_suffix_index): New enum.
33477 (enum type_suffix_index): New.
33478 (struct mode_suffix_info): New struct.
33479 (struct type_suffix_info): New.
33480 (struct function_group_info): Likewise.
33481 (class function_instance): Likewise.
33482 (class registered_function): Likewise.
33483 (class function_builder): Likewise.
33484 (class function_call_info): Likewise.
33485 (class function_resolver): Likewise.
33486 (class function_checker): Likewise.
33487 (class gimple_folder): Likewise.
33488 (class function_expander): Likewise.
33489 (get_mve_pred16_t): Likewise.
33490 (find_mode_suffix): New function.
33491 (class function_base): Likewise.
33492 (class function_shape): Likewise.
33493 (function_instance::operator==): New function.
33494 (function_instance::operator!=): Likewise.
33495 (function_instance::vectors_per_tuple): Likewise.
33496 (function_instance::mode_suffix): Likewise.
33497 (function_instance::type_suffix): Likewise.
33498 (function_instance::scalar_type): Likewise.
33499 (function_instance::vector_type): Likewise.
33500 (function_instance::tuple_type): Likewise.
33501 (function_instance::vector_mode): Likewise.
33502 (function_call_info::function_returns_void_p): Likewise.
33503 (function_base::call_properties): Likewise.
33504 * config/arm/arm-protos.h (enum arm_builtin_class): Add
33506 (handle_arm_mve_h): New.
33507 (resolve_overloaded_builtin): New.
33508 (check_builtin_call): New.
33509 (gimple_fold_builtin): New.
33510 (expand_builtin): New.
33511 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
33512 arm_gimple_fold_builtin.
33513 (arm_gimple_fold_builtin): New function.
33514 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
33515 * config/arm/predicates.md (arm_any_register_operand): New predicate.
33516 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
33517 (arm-mve-builtins-shapes.o): New target.
33518 (arm-mve-builtins-base.o): New target.
33519 * config/arm/arm-mve-builtins-base.cc: New file.
33520 * config/arm/arm-mve-builtins-base.def: New file.
33521 * config/arm/arm-mve-builtins-base.h: New file.
33522 * config/arm/arm-mve-builtins-functions.h: New file.
33523 * config/arm/arm-mve-builtins-shapes.cc: New file.
33524 * config/arm/arm-mve-builtins-shapes.h: New file.
33526 2023-05-03 Murray Steele <murray.steele@arm.com>
33527 Christophe Lyon <christophe.lyon@arm.com>
33528 Christophe Lyon <christophe.lyon@arm.com>
33530 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
33532 (arm_init_builtin): Use arm_general_add_builtin_function instead
33533 of arm_add_builtin_function.
33534 (arm_init_acle_builtins): Likewise.
33535 (arm_init_mve_builtins): Likewise.
33536 (arm_init_crypto_builtins): Likewise.
33537 (arm_init_builtins): Likewise.
33538 (arm_general_builtin_decl): New function.
33539 (arm_builtin_decl): Defer to numberspace-specialized functions.
33540 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
33541 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
33542 (arm_general_expand_builtin_1): ... specialize for general builtins.
33543 (arm_expand_acle_builtin): Use arm_general_expand_builtin
33544 instead of arm_expand_builtin.
33545 (arm_expand_mve_builtin): Likewise.
33546 (arm_expand_neon_builtin): Likewise.
33547 (arm_expand_vfp_builtin): Likewise.
33548 (arm_general_expand_builtin): New function.
33549 (arm_expand_builtin): Specialize for general builtins.
33550 (arm_general_check_builtin_call): New function.
33551 (arm_check_builtin_call): Specialize for general builtins.
33552 (arm_describe_resolver): Validate numberspace.
33553 (arm_cde_end_args): Likewise.
33554 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
33555 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
33557 2023-05-03 Martin Liska <mliska@suse.cz>
33560 * config/riscv/sync.md: Add gcc_unreachable to a switch.
33562 2023-05-03 Richard Biener <rguenther@suse.de>
33564 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
33565 (patch_loop_exit): Likewise.
33566 (connect_loops): Likewise.
33567 (split_loop): Likewise.
33568 (control_dep_semi_invariant_p): Likewise.
33569 (do_split_loop_on_cond): Likewise.
33570 (split_loop_on_cond): Likewise.
33571 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
33573 (simplify_loop_version): Likewise.
33574 (evaluate_bbs): Likewise.
33575 (find_loop_guard): Likewise.
33576 (clean_up_after_unswitching): Likewise.
33577 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
33579 (optimize_spaceship): Take a gcond * argument, avoid
33581 (math_opts_dom_walker::after_dom_children): Adjust call to
33582 optimize_spaceship.
33583 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
33584 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
33587 2023-05-03 Andreas Schwab <schwab@suse.de>
33589 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
33591 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33593 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
33595 (class vlseg): New class.
33596 (class vsseg): Ditto.
33597 (class vlsseg): Ditto.
33598 (class vssseg): Ditto.
33599 (class seg_indexed_load): Ditto.
33600 (class seg_indexed_store): Ditto.
33601 (class vlsegff): Ditto.
33603 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33604 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
33614 * config/riscv/riscv-vector-builtins-shapes.cc (struct
33615 seg_loadstore_def): Ditto.
33616 (struct seg_indexed_loadstore_def): Ditto.
33617 (struct seg_fault_load_def): Ditto.
33619 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33620 * config/riscv/riscv-vector-builtins.cc
33621 (function_builder::append_nf): New function.
33622 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
33623 Change ptr from double into float.
33624 (vfloat32m1x3_t): Ditto.
33625 (vfloat32m1x4_t): Ditto.
33626 (vfloat32m1x5_t): Ditto.
33627 (vfloat32m1x6_t): Ditto.
33628 (vfloat32m1x7_t): Ditto.
33629 (vfloat32m1x8_t): Ditto.
33630 (vfloat32m2x2_t): Ditto.
33631 (vfloat32m2x3_t): Ditto.
33632 (vfloat32m2x4_t): Ditto.
33633 (vfloat32m4x2_t): Ditto.
33634 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
33635 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
33637 * config/riscv/riscv.md: Add segment instructions.
33638 * config/riscv/vector-iterators.md: Support segment intrinsics.
33639 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
33641 (@pred_unit_strided_store<mode>): Ditto.
33642 (@pred_strided_load<mode>): Ditto.
33643 (@pred_strided_store<mode>): Ditto.
33644 (@pred_fault_load<mode>): Ditto.
33645 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
33646 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
33647 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
33648 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
33649 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
33650 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
33651 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
33652 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
33653 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
33654 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
33655 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
33656 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
33657 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
33658 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
33660 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33662 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
33663 tuple type support.
33665 (floattype): Ditto.
33667 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
33668 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
33670 (vget): Add tuple type vget.
33671 * config/riscv/riscv-vector-builtins-types.def
33672 (DEF_RVV_TUPLE_OPS): New macro.
33673 (vint8mf8x2_t): Ditto.
33674 (vuint8mf8x2_t): Ditto.
33675 (vint8mf8x3_t): Ditto.
33676 (vuint8mf8x3_t): Ditto.
33677 (vint8mf8x4_t): Ditto.
33678 (vuint8mf8x4_t): Ditto.
33679 (vint8mf8x5_t): Ditto.
33680 (vuint8mf8x5_t): Ditto.
33681 (vint8mf8x6_t): Ditto.
33682 (vuint8mf8x6_t): Ditto.
33683 (vint8mf8x7_t): Ditto.
33684 (vuint8mf8x7_t): Ditto.
33685 (vint8mf8x8_t): Ditto.
33686 (vuint8mf8x8_t): Ditto.
33687 (vint8mf4x2_t): Ditto.
33688 (vuint8mf4x2_t): Ditto.
33689 (vint8mf4x3_t): Ditto.
33690 (vuint8mf4x3_t): Ditto.
33691 (vint8mf4x4_t): Ditto.
33692 (vuint8mf4x4_t): Ditto.
33693 (vint8mf4x5_t): Ditto.
33694 (vuint8mf4x5_t): Ditto.
33695 (vint8mf4x6_t): Ditto.
33696 (vuint8mf4x6_t): Ditto.
33697 (vint8mf4x7_t): Ditto.
33698 (vuint8mf4x7_t): Ditto.
33699 (vint8mf4x8_t): Ditto.
33700 (vuint8mf4x8_t): Ditto.
33701 (vint8mf2x2_t): Ditto.
33702 (vuint8mf2x2_t): Ditto.
33703 (vint8mf2x3_t): Ditto.
33704 (vuint8mf2x3_t): Ditto.
33705 (vint8mf2x4_t): Ditto.
33706 (vuint8mf2x4_t): Ditto.
33707 (vint8mf2x5_t): Ditto.
33708 (vuint8mf2x5_t): Ditto.
33709 (vint8mf2x6_t): Ditto.
33710 (vuint8mf2x6_t): Ditto.
33711 (vint8mf2x7_t): Ditto.
33712 (vuint8mf2x7_t): Ditto.
33713 (vint8mf2x8_t): Ditto.
33714 (vuint8mf2x8_t): Ditto.
33715 (vint8m1x2_t): Ditto.
33716 (vuint8m1x2_t): Ditto.
33717 (vint8m1x3_t): Ditto.
33718 (vuint8m1x3_t): Ditto.
33719 (vint8m1x4_t): Ditto.
33720 (vuint8m1x4_t): Ditto.
33721 (vint8m1x5_t): Ditto.
33722 (vuint8m1x5_t): Ditto.
33723 (vint8m1x6_t): Ditto.
33724 (vuint8m1x6_t): Ditto.
33725 (vint8m1x7_t): Ditto.
33726 (vuint8m1x7_t): Ditto.
33727 (vint8m1x8_t): Ditto.
33728 (vuint8m1x8_t): Ditto.
33729 (vint8m2x2_t): Ditto.
33730 (vuint8m2x2_t): Ditto.
33731 (vint8m2x3_t): Ditto.
33732 (vuint8m2x3_t): Ditto.
33733 (vint8m2x4_t): Ditto.
33734 (vuint8m2x4_t): Ditto.
33735 (vint8m4x2_t): Ditto.
33736 (vuint8m4x2_t): Ditto.
33737 (vint16mf4x2_t): Ditto.
33738 (vuint16mf4x2_t): Ditto.
33739 (vint16mf4x3_t): Ditto.
33740 (vuint16mf4x3_t): Ditto.
33741 (vint16mf4x4_t): Ditto.
33742 (vuint16mf4x4_t): Ditto.
33743 (vint16mf4x5_t): Ditto.
33744 (vuint16mf4x5_t): Ditto.
33745 (vint16mf4x6_t): Ditto.
33746 (vuint16mf4x6_t): Ditto.
33747 (vint16mf4x7_t): Ditto.
33748 (vuint16mf4x7_t): Ditto.
33749 (vint16mf4x8_t): Ditto.
33750 (vuint16mf4x8_t): Ditto.
33751 (vint16mf2x2_t): Ditto.
33752 (vuint16mf2x2_t): Ditto.
33753 (vint16mf2x3_t): Ditto.
33754 (vuint16mf2x3_t): Ditto.
33755 (vint16mf2x4_t): Ditto.
33756 (vuint16mf2x4_t): Ditto.
33757 (vint16mf2x5_t): Ditto.
33758 (vuint16mf2x5_t): Ditto.
33759 (vint16mf2x6_t): Ditto.
33760 (vuint16mf2x6_t): Ditto.
33761 (vint16mf2x7_t): Ditto.
33762 (vuint16mf2x7_t): Ditto.
33763 (vint16mf2x8_t): Ditto.
33764 (vuint16mf2x8_t): Ditto.
33765 (vint16m1x2_t): Ditto.
33766 (vuint16m1x2_t): Ditto.
33767 (vint16m1x3_t): Ditto.
33768 (vuint16m1x3_t): Ditto.
33769 (vint16m1x4_t): Ditto.
33770 (vuint16m1x4_t): Ditto.
33771 (vint16m1x5_t): Ditto.
33772 (vuint16m1x5_t): Ditto.
33773 (vint16m1x6_t): Ditto.
33774 (vuint16m1x6_t): Ditto.
33775 (vint16m1x7_t): Ditto.
33776 (vuint16m1x7_t): Ditto.
33777 (vint16m1x8_t): Ditto.
33778 (vuint16m1x8_t): Ditto.
33779 (vint16m2x2_t): Ditto.
33780 (vuint16m2x2_t): Ditto.
33781 (vint16m2x3_t): Ditto.
33782 (vuint16m2x3_t): Ditto.
33783 (vint16m2x4_t): Ditto.
33784 (vuint16m2x4_t): Ditto.
33785 (vint16m4x2_t): Ditto.
33786 (vuint16m4x2_t): Ditto.
33787 (vint32mf2x2_t): Ditto.
33788 (vuint32mf2x2_t): Ditto.
33789 (vint32mf2x3_t): Ditto.
33790 (vuint32mf2x3_t): Ditto.
33791 (vint32mf2x4_t): Ditto.
33792 (vuint32mf2x4_t): Ditto.
33793 (vint32mf2x5_t): Ditto.
33794 (vuint32mf2x5_t): Ditto.
33795 (vint32mf2x6_t): Ditto.
33796 (vuint32mf2x6_t): Ditto.
33797 (vint32mf2x7_t): Ditto.
33798 (vuint32mf2x7_t): Ditto.
33799 (vint32mf2x8_t): Ditto.
33800 (vuint32mf2x8_t): Ditto.
33801 (vint32m1x2_t): Ditto.
33802 (vuint32m1x2_t): Ditto.
33803 (vint32m1x3_t): Ditto.
33804 (vuint32m1x3_t): Ditto.
33805 (vint32m1x4_t): Ditto.
33806 (vuint32m1x4_t): Ditto.
33807 (vint32m1x5_t): Ditto.
33808 (vuint32m1x5_t): Ditto.
33809 (vint32m1x6_t): Ditto.
33810 (vuint32m1x6_t): Ditto.
33811 (vint32m1x7_t): Ditto.
33812 (vuint32m1x7_t): Ditto.
33813 (vint32m1x8_t): Ditto.
33814 (vuint32m1x8_t): Ditto.
33815 (vint32m2x2_t): Ditto.
33816 (vuint32m2x2_t): Ditto.
33817 (vint32m2x3_t): Ditto.
33818 (vuint32m2x3_t): Ditto.
33819 (vint32m2x4_t): Ditto.
33820 (vuint32m2x4_t): Ditto.
33821 (vint32m4x2_t): Ditto.
33822 (vuint32m4x2_t): Ditto.
33823 (vint64m1x2_t): Ditto.
33824 (vuint64m1x2_t): Ditto.
33825 (vint64m1x3_t): Ditto.
33826 (vuint64m1x3_t): Ditto.
33827 (vint64m1x4_t): Ditto.
33828 (vuint64m1x4_t): Ditto.
33829 (vint64m1x5_t): Ditto.
33830 (vuint64m1x5_t): Ditto.
33831 (vint64m1x6_t): Ditto.
33832 (vuint64m1x6_t): Ditto.
33833 (vint64m1x7_t): Ditto.
33834 (vuint64m1x7_t): Ditto.
33835 (vint64m1x8_t): Ditto.
33836 (vuint64m1x8_t): Ditto.
33837 (vint64m2x2_t): Ditto.
33838 (vuint64m2x2_t): Ditto.
33839 (vint64m2x3_t): Ditto.
33840 (vuint64m2x3_t): Ditto.
33841 (vint64m2x4_t): Ditto.
33842 (vuint64m2x4_t): Ditto.
33843 (vint64m4x2_t): Ditto.
33844 (vuint64m4x2_t): Ditto.
33845 (vfloat32mf2x2_t): Ditto.
33846 (vfloat32mf2x3_t): Ditto.
33847 (vfloat32mf2x4_t): Ditto.
33848 (vfloat32mf2x5_t): Ditto.
33849 (vfloat32mf2x6_t): Ditto.
33850 (vfloat32mf2x7_t): Ditto.
33851 (vfloat32mf2x8_t): Ditto.
33852 (vfloat32m1x2_t): Ditto.
33853 (vfloat32m1x3_t): Ditto.
33854 (vfloat32m1x4_t): Ditto.
33855 (vfloat32m1x5_t): Ditto.
33856 (vfloat32m1x6_t): Ditto.
33857 (vfloat32m1x7_t): Ditto.
33858 (vfloat32m1x8_t): Ditto.
33859 (vfloat32m2x2_t): Ditto.
33860 (vfloat32m2x3_t): Ditto.
33861 (vfloat32m2x4_t): Ditto.
33862 (vfloat32m4x2_t): Ditto.
33863 (vfloat64m1x2_t): Ditto.
33864 (vfloat64m1x3_t): Ditto.
33865 (vfloat64m1x4_t): Ditto.
33866 (vfloat64m1x5_t): Ditto.
33867 (vfloat64m1x6_t): Ditto.
33868 (vfloat64m1x7_t): Ditto.
33869 (vfloat64m1x8_t): Ditto.
33870 (vfloat64m2x2_t): Ditto.
33871 (vfloat64m2x3_t): Ditto.
33872 (vfloat64m2x4_t): Ditto.
33873 (vfloat64m4x2_t): Ditto.
33874 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
33876 (DEF_RVV_TYPE_INDEX): Ditto.
33877 (rvv_arg_type_info::get_tuple_subpart_type): New function.
33878 (DEF_RVV_TUPLE_TYPE): New macro.
33879 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
33880 Adapt for tuple vget/vset support.
33881 (vint8mf4_t): Ditto.
33882 (vuint8mf4_t): Ditto.
33883 (vint8mf2_t): Ditto.
33884 (vuint8mf2_t): Ditto.
33885 (vint8m1_t): Ditto.
33886 (vuint8m1_t): Ditto.
33887 (vint8m2_t): Ditto.
33888 (vuint8m2_t): Ditto.
33889 (vint8m4_t): Ditto.
33890 (vuint8m4_t): Ditto.
33891 (vint8m8_t): Ditto.
33892 (vuint8m8_t): Ditto.
33893 (vint16mf4_t): Ditto.
33894 (vuint16mf4_t): Ditto.
33895 (vint16mf2_t): Ditto.
33896 (vuint16mf2_t): Ditto.
33897 (vint16m1_t): Ditto.
33898 (vuint16m1_t): Ditto.
33899 (vint16m2_t): Ditto.
33900 (vuint16m2_t): Ditto.
33901 (vint16m4_t): Ditto.
33902 (vuint16m4_t): Ditto.
33903 (vint16m8_t): Ditto.
33904 (vuint16m8_t): Ditto.
33905 (vint32mf2_t): Ditto.
33906 (vuint32mf2_t): Ditto.
33907 (vint32m1_t): Ditto.
33908 (vuint32m1_t): Ditto.
33909 (vint32m2_t): Ditto.
33910 (vuint32m2_t): Ditto.
33911 (vint32m4_t): Ditto.
33912 (vuint32m4_t): Ditto.
33913 (vint32m8_t): Ditto.
33914 (vuint32m8_t): Ditto.
33915 (vint64m1_t): Ditto.
33916 (vuint64m1_t): Ditto.
33917 (vint64m2_t): Ditto.
33918 (vuint64m2_t): Ditto.
33919 (vint64m4_t): Ditto.
33920 (vuint64m4_t): Ditto.
33921 (vint64m8_t): Ditto.
33922 (vuint64m8_t): Ditto.
33923 (vfloat32mf2_t): Ditto.
33924 (vfloat32m1_t): Ditto.
33925 (vfloat32m2_t): Ditto.
33926 (vfloat32m4_t): Ditto.
33927 (vfloat32m8_t): Ditto.
33928 (vfloat64m1_t): Ditto.
33929 (vfloat64m2_t): Ditto.
33930 (vfloat64m4_t): Ditto.
33931 (vfloat64m8_t): Ditto.
33932 (tuple_subpart): Add tuple subpart base type.
33933 * config/riscv/riscv-vector-builtins.h (struct
33934 rvv_arg_type_info): Ditto.
33935 (tuple_type_field): New function.
33937 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33939 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
33940 (RVV_TUPLE_PARTIAL_MODES): Ditto.
33941 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
33944 (get_subpart_mode): Ditto.
33945 (get_tuple_mode): Ditto.
33946 (expand_tuple_move): Ditto.
33947 * config/riscv/riscv-v.cc (ENTRY): New macro.
33948 (TUPLE_ENTRY): Ditto.
33949 (get_nf): New function.
33950 (get_subpart_mode): Ditto.
33951 (get_tuple_mode): Ditto.
33952 (expand_tuple_move): Ditto.
33953 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
33955 (register_tuple_type): New function
33956 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
33958 (vint8mf8x2_t): New macro.
33959 (vuint8mf8x2_t): Ditto.
33960 (vint8mf8x3_t): Ditto.
33961 (vuint8mf8x3_t): Ditto.
33962 (vint8mf8x4_t): Ditto.
33963 (vuint8mf8x4_t): Ditto.
33964 (vint8mf8x5_t): Ditto.
33965 (vuint8mf8x5_t): Ditto.
33966 (vint8mf8x6_t): Ditto.
33967 (vuint8mf8x6_t): Ditto.
33968 (vint8mf8x7_t): Ditto.
33969 (vuint8mf8x7_t): Ditto.
33970 (vint8mf8x8_t): Ditto.
33971 (vuint8mf8x8_t): Ditto.
33972 (vint8mf4x2_t): Ditto.
33973 (vuint8mf4x2_t): Ditto.
33974 (vint8mf4x3_t): Ditto.
33975 (vuint8mf4x3_t): Ditto.
33976 (vint8mf4x4_t): Ditto.
33977 (vuint8mf4x4_t): Ditto.
33978 (vint8mf4x5_t): Ditto.
33979 (vuint8mf4x5_t): Ditto.
33980 (vint8mf4x6_t): Ditto.
33981 (vuint8mf4x6_t): Ditto.
33982 (vint8mf4x7_t): Ditto.
33983 (vuint8mf4x7_t): Ditto.
33984 (vint8mf4x8_t): Ditto.
33985 (vuint8mf4x8_t): Ditto.
33986 (vint8mf2x2_t): Ditto.
33987 (vuint8mf2x2_t): Ditto.
33988 (vint8mf2x3_t): Ditto.
33989 (vuint8mf2x3_t): Ditto.
33990 (vint8mf2x4_t): Ditto.
33991 (vuint8mf2x4_t): Ditto.
33992 (vint8mf2x5_t): Ditto.
33993 (vuint8mf2x5_t): Ditto.
33994 (vint8mf2x6_t): Ditto.
33995 (vuint8mf2x6_t): Ditto.
33996 (vint8mf2x7_t): Ditto.
33997 (vuint8mf2x7_t): Ditto.
33998 (vint8mf2x8_t): Ditto.
33999 (vuint8mf2x8_t): Ditto.
34000 (vint8m1x2_t): Ditto.
34001 (vuint8m1x2_t): Ditto.
34002 (vint8m1x3_t): Ditto.
34003 (vuint8m1x3_t): Ditto.
34004 (vint8m1x4_t): Ditto.
34005 (vuint8m1x4_t): Ditto.
34006 (vint8m1x5_t): Ditto.
34007 (vuint8m1x5_t): Ditto.
34008 (vint8m1x6_t): Ditto.
34009 (vuint8m1x6_t): Ditto.
34010 (vint8m1x7_t): Ditto.
34011 (vuint8m1x7_t): Ditto.
34012 (vint8m1x8_t): Ditto.
34013 (vuint8m1x8_t): Ditto.
34014 (vint8m2x2_t): Ditto.
34015 (vuint8m2x2_t): Ditto.
34016 (vint8m2x3_t): Ditto.
34017 (vuint8m2x3_t): Ditto.
34018 (vint8m2x4_t): Ditto.
34019 (vuint8m2x4_t): Ditto.
34020 (vint8m4x2_t): Ditto.
34021 (vuint8m4x2_t): Ditto.
34022 (vint16mf4x2_t): Ditto.
34023 (vuint16mf4x2_t): Ditto.
34024 (vint16mf4x3_t): Ditto.
34025 (vuint16mf4x3_t): Ditto.
34026 (vint16mf4x4_t): Ditto.
34027 (vuint16mf4x4_t): Ditto.
34028 (vint16mf4x5_t): Ditto.
34029 (vuint16mf4x5_t): Ditto.
34030 (vint16mf4x6_t): Ditto.
34031 (vuint16mf4x6_t): Ditto.
34032 (vint16mf4x7_t): Ditto.
34033 (vuint16mf4x7_t): Ditto.
34034 (vint16mf4x8_t): Ditto.
34035 (vuint16mf4x8_t): Ditto.
34036 (vint16mf2x2_t): Ditto.
34037 (vuint16mf2x2_t): Ditto.
34038 (vint16mf2x3_t): Ditto.
34039 (vuint16mf2x3_t): Ditto.
34040 (vint16mf2x4_t): Ditto.
34041 (vuint16mf2x4_t): Ditto.
34042 (vint16mf2x5_t): Ditto.
34043 (vuint16mf2x5_t): Ditto.
34044 (vint16mf2x6_t): Ditto.
34045 (vuint16mf2x6_t): Ditto.
34046 (vint16mf2x7_t): Ditto.
34047 (vuint16mf2x7_t): Ditto.
34048 (vint16mf2x8_t): Ditto.
34049 (vuint16mf2x8_t): Ditto.
34050 (vint16m1x2_t): Ditto.
34051 (vuint16m1x2_t): Ditto.
34052 (vint16m1x3_t): Ditto.
34053 (vuint16m1x3_t): Ditto.
34054 (vint16m1x4_t): Ditto.
34055 (vuint16m1x4_t): Ditto.
34056 (vint16m1x5_t): Ditto.
34057 (vuint16m1x5_t): Ditto.
34058 (vint16m1x6_t): Ditto.
34059 (vuint16m1x6_t): Ditto.
34060 (vint16m1x7_t): Ditto.
34061 (vuint16m1x7_t): Ditto.
34062 (vint16m1x8_t): Ditto.
34063 (vuint16m1x8_t): Ditto.
34064 (vint16m2x2_t): Ditto.
34065 (vuint16m2x2_t): Ditto.
34066 (vint16m2x3_t): Ditto.
34067 (vuint16m2x3_t): Ditto.
34068 (vint16m2x4_t): Ditto.
34069 (vuint16m2x4_t): Ditto.
34070 (vint16m4x2_t): Ditto.
34071 (vuint16m4x2_t): Ditto.
34072 (vint32mf2x2_t): Ditto.
34073 (vuint32mf2x2_t): Ditto.
34074 (vint32mf2x3_t): Ditto.
34075 (vuint32mf2x3_t): Ditto.
34076 (vint32mf2x4_t): Ditto.
34077 (vuint32mf2x4_t): Ditto.
34078 (vint32mf2x5_t): Ditto.
34079 (vuint32mf2x5_t): Ditto.
34080 (vint32mf2x6_t): Ditto.
34081 (vuint32mf2x6_t): Ditto.
34082 (vint32mf2x7_t): Ditto.
34083 (vuint32mf2x7_t): Ditto.
34084 (vint32mf2x8_t): Ditto.
34085 (vuint32mf2x8_t): Ditto.
34086 (vint32m1x2_t): Ditto.
34087 (vuint32m1x2_t): Ditto.
34088 (vint32m1x3_t): Ditto.
34089 (vuint32m1x3_t): Ditto.
34090 (vint32m1x4_t): Ditto.
34091 (vuint32m1x4_t): Ditto.
34092 (vint32m1x5_t): Ditto.
34093 (vuint32m1x5_t): Ditto.
34094 (vint32m1x6_t): Ditto.
34095 (vuint32m1x6_t): Ditto.
34096 (vint32m1x7_t): Ditto.
34097 (vuint32m1x7_t): Ditto.
34098 (vint32m1x8_t): Ditto.
34099 (vuint32m1x8_t): Ditto.
34100 (vint32m2x2_t): Ditto.
34101 (vuint32m2x2_t): Ditto.
34102 (vint32m2x3_t): Ditto.
34103 (vuint32m2x3_t): Ditto.
34104 (vint32m2x4_t): Ditto.
34105 (vuint32m2x4_t): Ditto.
34106 (vint32m4x2_t): Ditto.
34107 (vuint32m4x2_t): Ditto.
34108 (vint64m1x2_t): Ditto.
34109 (vuint64m1x2_t): Ditto.
34110 (vint64m1x3_t): Ditto.
34111 (vuint64m1x3_t): Ditto.
34112 (vint64m1x4_t): Ditto.
34113 (vuint64m1x4_t): Ditto.
34114 (vint64m1x5_t): Ditto.
34115 (vuint64m1x5_t): Ditto.
34116 (vint64m1x6_t): Ditto.
34117 (vuint64m1x6_t): Ditto.
34118 (vint64m1x7_t): Ditto.
34119 (vuint64m1x7_t): Ditto.
34120 (vint64m1x8_t): Ditto.
34121 (vuint64m1x8_t): Ditto.
34122 (vint64m2x2_t): Ditto.
34123 (vuint64m2x2_t): Ditto.
34124 (vint64m2x3_t): Ditto.
34125 (vuint64m2x3_t): Ditto.
34126 (vint64m2x4_t): Ditto.
34127 (vuint64m2x4_t): Ditto.
34128 (vint64m4x2_t): Ditto.
34129 (vuint64m4x2_t): Ditto.
34130 (vfloat32mf2x2_t): Ditto.
34131 (vfloat32mf2x3_t): Ditto.
34132 (vfloat32mf2x4_t): Ditto.
34133 (vfloat32mf2x5_t): Ditto.
34134 (vfloat32mf2x6_t): Ditto.
34135 (vfloat32mf2x7_t): Ditto.
34136 (vfloat32mf2x8_t): Ditto.
34137 (vfloat32m1x2_t): Ditto.
34138 (vfloat32m1x3_t): Ditto.
34139 (vfloat32m1x4_t): Ditto.
34140 (vfloat32m1x5_t): Ditto.
34141 (vfloat32m1x6_t): Ditto.
34142 (vfloat32m1x7_t): Ditto.
34143 (vfloat32m1x8_t): Ditto.
34144 (vfloat32m2x2_t): Ditto.
34145 (vfloat32m2x3_t): Ditto.
34146 (vfloat32m2x4_t): Ditto.
34147 (vfloat32m4x2_t): Ditto.
34148 (vfloat64m1x2_t): Ditto.
34149 (vfloat64m1x3_t): Ditto.
34150 (vfloat64m1x4_t): Ditto.
34151 (vfloat64m1x5_t): Ditto.
34152 (vfloat64m1x6_t): Ditto.
34153 (vfloat64m1x7_t): Ditto.
34154 (vfloat64m1x8_t): Ditto.
34155 (vfloat64m2x2_t): Ditto.
34156 (vfloat64m2x3_t): Ditto.
34157 (vfloat64m2x4_t): Ditto.
34158 (vfloat64m4x2_t): Ditto.
34159 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
34161 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
34162 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
34164 (TUPLE_ENTRY): Ditto.
34165 (riscv_v_ext_mode_p): New function.
34166 (riscv_v_adjust_nunits): Add tuple mode adjustment.
34167 (riscv_classify_address): Ditto.
34168 (riscv_binary_cost): Ditto.
34169 (riscv_rtx_costs): Ditto.
34170 (riscv_secondary_memory_needed): Ditto.
34171 (riscv_hard_regno_nregs): Ditto.
34172 (riscv_hard_regno_mode_ok): Ditto.
34173 (riscv_vector_mode_supported_p): Ditto.
34174 (riscv_regmode_natural_size): Ditto.
34175 (riscv_array_mode): New function.
34176 (TARGET_ARRAY_MODE): New target hook.
34177 * config/riscv/riscv.md: Add tuple modes.
34178 * config/riscv/vector-iterators.md: Ditto.
34179 * config/riscv/vector.md (mov<mode>): Add tuple modes data
34181 (*mov<VT:mode>_<P:mode>): Ditto.
34183 2023-05-03 Richard Biener <rguenther@suse.de>
34185 * cse.cc (cse_insn): Track an equivalence to the destination
34186 separately and delay using src_related for it.
34188 2023-05-03 Richard Biener <rguenther@suse.de>
34190 * cse.cc (HASH): Turn into inline function and mix
34191 in another HASH_SHIFT bits.
34192 (SAFE_HASH): Likewise.
34194 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34197 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
34198 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
34200 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34203 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
34204 (add<mode>3<vczle><vczbe>): ... This.
34205 (sub<mode>3): Rename to...
34206 (sub<mode>3<vczle><vczbe>): ... This.
34207 (mul<mode>3): Rename to...
34208 (mul<mode>3<vczle><vczbe>): ... This.
34209 (*div<mode>3): Rename to...
34210 (*div<mode>3<vczle><vczbe>): ... This.
34211 (neg<mode>2): Rename to...
34212 (neg<mode>2<vczle><vczbe>): ... This.
34213 (abs<mode>2): Rename to...
34214 (abs<mode>2<vczle><vczbe>): ... This.
34215 (<frint_pattern><mode>2): Rename to...
34216 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
34217 (<fmaxmin><mode>3): Rename to...
34218 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
34219 (*sqrt<mode>2): Rename to...
34220 (*sqrt<mode>2<vczle><vczbe>): ... This.
34222 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
34224 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
34226 2023-05-03 Martin Liska <mliska@suse.cz>
34228 PR tree-optimization/109693
34229 * value-range-storage.cc (vrange_allocator::vrange_allocator):
34230 Remove unused field.
34231 * value-range-storage.h: Likewise.
34233 2023-05-02 Andrew Pinski <apinski@marvell.com>
34235 * tree-ssa-phiopt.cc (move_stmt): New function.
34236 (match_simplify_replacement): Use move_stmt instead
34237 of the inlined version.
34239 2023-05-02 Andrew Pinski <apinski@marvell.com>
34241 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
34244 2023-05-02 Andrew Pinski <apinski@marvell.com>
34246 PR tree-optimization/109702
34247 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
34248 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
34250 2023-05-02 Andrew Pinski <apinski@marvell.com>
34253 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
34254 insn_and_split pattern.
34256 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34258 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
34261 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34263 * config/riscv/sync.md (mem_thread_fence_1): Change fence
34264 depending on the given memory model.
34266 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34268 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
34269 riscv_union_memmodels function to sync.md.
34270 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
34271 get the union of two memmodels in sync.md.
34272 (riscv_print_operand): Add %I and %J flags that output the
34273 optimal LR/SC flag bits for a given memory model.
34274 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
34275 bits on SC op and replace with optimized %I, %J flags.
34277 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34279 * config/riscv/riscv.cc
34280 (riscv_memmodel_needs_amo_release): Change function name.
34281 (riscv_print_operand): Remove unneeded %F case.
34282 * config/riscv/sync.md: Remove unneeded fences.
34284 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34287 * config/riscv/sync.md (atomic_store<mode>): Use simple store
34288 instruction in combination with fence(s).
34290 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34292 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
34293 of %A to include release bits.
34295 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34297 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
34298 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
34301 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34303 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
34304 sequentially consistent LR.aqrl/SC.rl pairs.
34306 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
34308 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
34309 sanitize memmodel input with memmodel_base.
34311 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
34312 Pan Li <pan2.li@intel.com>
34315 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
34317 2023-05-02 Romain Naour <romain.naour@gmail.com>
34319 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
34322 2023-05-02 Martin Liska <mliska@suse.cz>
34324 * doc/invoke.texi: Update documentation based on param.opt file.
34326 2023-05-02 Richard Biener <rguenther@suse.de>
34328 PR tree-optimization/109672
34329 * tree-vect-stmts.cc (vectorizable_operation): For plus,
34330 minus and negate always check the vector mode is word mode.
34332 2023-05-01 Andrew Pinski <apinski@marvell.com>
34334 * tree-ssa-phiopt.cc: Update comment about
34335 how the transformation are implemented.
34337 2023-05-01 Jeff Law <jlaw@ventanamicro>
34339 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
34341 2023-05-01 Jeff Law <jlaw@ventanamicro>
34343 * config/cris/cris.cc (TARGET_LRA_P): Remove.
34344 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
34345 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
34346 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
34347 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
34348 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
34350 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
34352 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
34353 * print-tree.cc (print_decl_identifier): Implement it.
34354 * toplev.cc (output_stack_usage_1): Use it.
34356 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34358 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
34361 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34363 * value-range.h (irange::set_nonzero): Inline.
34365 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34367 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
34369 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
34370 invalid_range, as it is an inverse range.
34371 * tree-vrp.cc (find_case_label_range): Avoid trees.
34372 * value-range.cc (irange::irange_set): Delete.
34373 (irange::irange_set_1bit_anti_range): Delete.
34374 (irange::irange_set_anti_range): Delete.
34375 (irange::set): Cleanup.
34376 * value-range.h (class irange): Remove irange_set,
34377 irange_set_anti_range, irange_set_1bit_anti_range.
34378 (irange::set_undefined): Remove set to m_type.
34380 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34382 * range-op.cc (update_known_bitmask): Adjust for irange containing
34383 wide_ints internally.
34384 * tree-ssanames.cc (set_nonzero_bits): Same.
34385 * tree-ssanames.h (set_nonzero_bits): Same.
34386 * value-range-storage.cc (irange_storage::set_irange): Same.
34387 (irange_storage::get_irange): Same.
34388 * value-range.cc (irange::operator=): Same.
34389 (irange::irange_set): Same.
34390 (irange::irange_set_1bit_anti_range): Same.
34391 (irange::irange_set_anti_range): Same.
34392 (irange::set): Same.
34393 (irange::verify_range): Same.
34394 (irange::contains_p): Same.
34395 (irange::irange_single_pair_union): Same.
34396 (irange::union_): Same.
34397 (irange::irange_contains_p): Same.
34398 (irange::intersect): Same.
34399 (irange::invert): Same.
34400 (irange::set_range_from_nonzero_bits): Same.
34401 (irange::set_nonzero_bits): Same.
34402 (mask_to_wi): Same.
34403 (irange::intersect_nonzero_bits): Same.
34404 (irange::union_nonzero_bits): Same.
34407 (tree_range): Same.
34408 (range_tests_strict_enum): Same.
34409 (range_tests_misc): Same.
34410 (range_tests_nonzero_bits): Same.
34411 * value-range.h (irange::type): Same.
34412 (irange::varying_compatible_p): Same.
34413 (irange::irange): Same.
34414 (int_range::int_range): Same.
34415 (irange::set_undefined): Same.
34416 (irange::set_varying): Same.
34417 (irange::lower_bound): Same.
34418 (irange::upper_bound): Same.
34420 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34422 * gimple-range-fold.cc (tree_lower_bound): Delete.
34423 (tree_upper_bound): Delete.
34424 (vrp_val_max): Delete.
34425 (vrp_val_min): Delete.
34426 (fold_using_range::range_of_ssa_name_with_loop_info): Call
34427 range_of_var_in_loop.
34428 * vr-values.cc (valid_value_p): Delete.
34429 (fix_overflow): Delete.
34430 (get_scev_info): New.
34431 (bounds_of_var_in_loop): Refactor into...
34432 (induction_variable_may_overflow_p): ...this,
34433 (range_from_loop_direction): ...and this,
34434 (range_of_var_in_loop): ...and this.
34435 * vr-values.h (bounds_of_var_in_loop): Delete.
34436 (range_of_var_in_loop): New.
34438 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34440 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
34442 (vrp_val_max): New.
34443 (vrp_val_min): New.
34444 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
34445 * range-op.cc (max_limit): Same.
34447 (plus_minus_ranges): Same.
34448 (operator_rshift::op1_range): Same.
34449 (operator_cast::inside_domain_p): Same.
34450 * value-range.cc (vrp_val_is_max): Delete.
34451 (vrp_val_is_min): Delete.
34452 (range_tests_misc): Use irange_val_*.
34453 * value-range.h (vrp_val_is_min): Delete.
34454 (vrp_val_is_max): Delete.
34455 (vrp_val_max): Delete.
34456 (irange_val_min): New.
34457 (vrp_val_min): Delete.
34458 (irange_val_max): New.
34459 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
34461 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34463 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
34464 * gimple-fold.cc (size_must_be_zero_p): Same.
34465 * gimple-loop-versioning.cc
34466 (loop_versioning::prune_loop_conditions): Same.
34467 * gimple-range-edge.cc (gcond_edge_range): Same.
34468 (gimple_outgoing_range::calc_switch_ranges): Same.
34469 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
34470 (adjust_realpart_expr): Same.
34471 (fold_using_range::range_of_address): Same.
34472 (fold_using_range::relation_fold_and_or): Same.
34473 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
34474 (range_is_either_true_or_false): Same.
34475 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
34476 (cfn_clz::fold_range): Same.
34477 (cfn_ctz::fold_range): Same.
34478 * gimple-range-tests.cc (class test_expr_eval): Same.
34479 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
34480 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
34481 (propagate_vr_across_jump_function): Same.
34482 (decide_whether_version_node): Same.
34483 * ipa-prop.cc (ipa_get_value_range): Same.
34484 * ipa-prop.h (ipa_range_set_and_normalize): Same.
34485 * range-op.cc (get_shift_range): Same.
34486 (value_range_from_overflowed_bounds): Same.
34487 (value_range_with_overflow): Same.
34488 (create_possibly_reversed_range): Same.
34489 (equal_op1_op2_relation): Same.
34490 (not_equal_op1_op2_relation): Same.
34491 (lt_op1_op2_relation): Same.
34492 (le_op1_op2_relation): Same.
34493 (gt_op1_op2_relation): Same.
34494 (ge_op1_op2_relation): Same.
34495 (operator_mult::op1_range): Same.
34496 (operator_exact_divide::op1_range): Same.
34497 (operator_lshift::op1_range): Same.
34498 (operator_rshift::op1_range): Same.
34499 (operator_cast::op1_range): Same.
34500 (operator_logical_and::fold_range): Same.
34501 (set_nonzero_range_from_mask): Same.
34502 (operator_bitwise_or::op1_range): Same.
34503 (operator_bitwise_xor::op1_range): Same.
34504 (operator_addr_expr::fold_range): Same.
34505 (pointer_plus_operator::wi_fold): Same.
34506 (pointer_or_operator::op1_range): Same.
34513 (range_op_cast_tests): Same.
34514 (range_op_lshift_tests): Same.
34515 (range_op_rshift_tests): Same.
34516 (range_op_bitwise_and_tests): Same.
34517 (range_relational_tests): Same.
34518 * range.cc (range_zero): Same.
34519 (range_nonzero): Same.
34520 * range.h (range_true): Same.
34521 (range_false): Same.
34522 (range_true_and_false): Same.
34523 * tree-data-ref.cc (split_constant_offset_1): Same.
34524 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
34525 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
34526 (find_unswitching_predicates_for_bb): Same.
34527 * tree-ssa-phiopt.cc (value_replacement): Same.
34528 * tree-ssa-threadbackward.cc
34529 (back_threader::find_taken_edge_cond): Same.
34530 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
34531 * tree-vrp.cc (find_case_label_range): Same.
34532 * value-query.cc (range_query::get_tree_range): Same.
34533 * value-range.cc (irange::set_nonnegative): Same.
34534 (frange::contains_p): Same.
34535 (frange::singleton_p): Same.
34536 (frange::internal_singleton_p): Same.
34537 (irange::irange_set): Same.
34538 (irange::irange_set_1bit_anti_range): Same.
34539 (irange::irange_set_anti_range): Same.
34540 (irange::set): Same.
34541 (irange::operator==): Same.
34542 (irange::singleton_p): Same.
34543 (irange::contains_p): Same.
34544 (irange::set_range_from_nonzero_bits): Same.
34545 (DEFINE_INT_RANGE_INSTANCE): Same.
34555 (range_uint128): New.
34556 (range_uchar): New.
34558 (build_range3): Convert to irange wide_int API.
34559 (range_tests_irange3): Same.
34560 (range_tests_int_range_max): Same.
34561 (range_tests_strict_enum): Same.
34562 (range_tests_misc): Same.
34563 (range_tests_nonzero_bits): Same.
34564 (range_tests_nan): Same.
34565 (range_tests_signed_zeros): Same.
34566 * value-range.h (Value_Range::Value_Range): Same.
34567 (irange::set): Same.
34568 (irange::nonzero_p): Same.
34569 (irange::contains_p): Same.
34570 (range_includes_zero_p): Same.
34571 (irange::set_nonzero): Same.
34572 (irange::set_zero): Same.
34573 (contains_zero_p): Same.
34574 (frange::contains_p): Same.
34576 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
34577 (bounds_of_var_in_loop): Same.
34578 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
34580 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34582 * value-range.cc (irange::irange_union): Rename to...
34583 (irange::union_): ...this.
34584 (irange::irange_intersect): Rename to...
34585 (irange::intersect): ...this.
34586 * value-range.h (irange::union_): Delete.
34587 (irange::intersect): Delete.
34589 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34591 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
34593 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34595 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
34597 (compare_ranges): Delete.
34598 (compare_range_with_value): Delete.
34599 (bounds_of_var_in_loop): Tidy up by using ranger API.
34600 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
34601 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
34602 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
34603 strict_overflow_p and only_ranges.
34604 (simplify_using_ranges::legacy_fold_cond): Adjust call to
34605 legacy_fold_cond_overflow.
34606 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
34608 (range_fits_type_p): Rename value_range to irange.
34609 * vr-values.h (range_fits_type_p): Adjust prototype.
34611 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34613 * value-range.cc (irange::irange_set_anti_range): Remove uses of
34614 tree_lower_bound and tree_upper_bound.
34615 (irange::verify_range): Same.
34616 (irange::operator==): Same.
34617 (irange::singleton_p): Same.
34618 * value-range.h (irange::tree_lower_bound): Delete.
34619 (irange::tree_upper_bound): Delete.
34620 (irange::lower_bound): Delete.
34621 (irange::upper_bound): Delete.
34622 (irange::zero_p): Remove uses of tree_lower_bound and
34625 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34627 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
34629 (determine_value_range): Same.
34630 (record_nonwrapping_iv): Same.
34631 (infer_loop_bounds_from_signedness): Same.
34632 (scev_var_range_cant_overflow): Same.
34633 * tree-vrp.cc (operand_less_p): Delete.
34634 * tree-vrp.h (operand_less_p): Delete.
34635 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
34636 (irange::value_inside_range): Delete.
34637 * value-range.h (vrange::kind): Delete.
34638 (irange::num_pairs): Remove check of m_kind.
34639 (irange::min): Delete.
34640 (irange::max): Delete.
34642 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
34644 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
34645 for vrange_storage.
34646 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
34647 (sbr_vector::grow): Same.
34648 (sbr_vector::set_bb_range): Same.
34649 (sbr_vector::get_bb_range): Same.
34650 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
34651 (sbr_sparse_bitmap::set_bb_range): Same.
34652 (sbr_sparse_bitmap::get_bb_range): Same.
34653 (block_range_cache::block_range_cache): Same.
34654 (ssa_global_cache::ssa_global_cache): Same.
34655 (ssa_global_cache::get_global_range): Same.
34656 (ssa_global_cache::set_global_range): Same.
34657 * gimple-range-cache.h: Same.
34658 * gimple-range-edge.cc
34659 (gimple_outgoing_range::gimple_outgoing_range): Same.
34660 (gimple_outgoing_range::switch_edge_range): Same.
34661 (gimple_outgoing_range::calc_switch_ranges): Same.
34662 * gimple-range-edge.h: Same.
34663 * gimple-range-infer.cc
34664 (infer_range_manager::infer_range_manager): Same.
34665 (infer_range_manager::get_nonzero): Same.
34666 (infer_range_manager::maybe_adjust_range): Same.
34667 (infer_range_manager::add_range): Same.
34668 * gimple-range-infer.h: Rename obstack_vrange_allocator to
34670 * tree-core.h (struct irange_storage_slot): Remove.
34671 (struct tree_ssa_name): Remove irange_info and frange_info. Make
34672 range_info a pointer to vrange_storage.
34673 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
34674 (range_info_alloc): Same.
34675 (range_info_free): Same.
34676 (range_info_get_range): Same.
34677 (range_info_set_range): Same.
34678 (get_nonzero_bits): Same.
34679 * value-query.cc (get_ssa_name_range_info): Same.
34680 * value-range-storage.cc (class vrange_internal_alloc): New.
34681 (class vrange_obstack_alloc): New.
34682 (class vrange_ggc_alloc): New.
34683 (vrange_allocator::vrange_allocator): New.
34684 (vrange_allocator::~vrange_allocator): New.
34685 (vrange_storage::alloc_slot): New.
34686 (vrange_allocator::alloc): New.
34687 (vrange_allocator::free): New.
34688 (vrange_allocator::clone): New.
34689 (vrange_allocator::clone_varying): New.
34690 (vrange_allocator::clone_undefined): New.
34691 (vrange_storage::alloc): New.
34692 (vrange_storage::set_vrange): Remove slot argument.
34693 (vrange_storage::get_vrange): Same.
34694 (vrange_storage::fits_p): Same.
34695 (vrange_storage::equal_p): New.
34696 (irange_storage::write_lengths_address): New.
34697 (irange_storage::lengths_address): New.
34698 (irange_storage_slot::alloc_slot): Remove.
34699 (irange_storage::alloc): New.
34700 (irange_storage_slot::irange_storage_slot): Remove.
34701 (irange_storage::irange_storage): New.
34702 (write_wide_int): New.
34703 (irange_storage_slot::set_irange): Remove.
34704 (irange_storage::set_irange): New.
34705 (read_wide_int): New.
34706 (irange_storage_slot::get_irange): Remove.
34707 (irange_storage::get_irange): New.
34708 (irange_storage_slot::size): Remove.
34709 (irange_storage::equal_p): New.
34710 (irange_storage_slot::num_wide_ints_needed): Remove.
34711 (irange_storage::size): New.
34712 (irange_storage_slot::fits_p): Remove.
34713 (irange_storage::fits_p): New.
34714 (irange_storage_slot::dump): Remove.
34715 (irange_storage::dump): New.
34716 (frange_storage_slot::alloc_slot): Remove.
34717 (frange_storage::alloc): New.
34718 (frange_storage_slot::set_frange): Remove.
34719 (frange_storage::set_frange): New.
34720 (frange_storage_slot::get_frange): Remove.
34721 (frange_storage::get_frange): New.
34722 (frange_storage_slot::fits_p): Remove.
34723 (frange_storage::equal_p): New.
34724 (frange_storage::fits_p): New.
34725 (ggc_vrange_allocator): New.
34726 (ggc_alloc_vrange_storage): New.
34727 * value-range-storage.h (class vrange_storage): Rewrite.
34728 (class irange_storage): Rewrite.
34729 (class frange_storage): Rewrite.
34730 (class obstack_vrange_allocator): Remove.
34731 (class ggc_vrange_allocator): Remove.
34732 (vrange_allocator::alloc_vrange): Remove.
34733 (vrange_allocator::alloc_irange): Remove.
34734 (vrange_allocator::alloc_frange): Remove.
34735 (ggc_alloc_vrange_storage): New.
34736 * value-range.h (class irange): Rename vrange_allocator to
34738 (class frange): Same.
34740 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
34742 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
34743 inc to avoid clobbering the carry flag.
34745 2023-04-30 Andrew Pinski <apinski@marvell.com>
34747 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
34748 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
34750 2023-04-30 Andrew Pinski <apinski@marvell.com>
34752 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
34753 Allow some builtin/internal function calls which
34754 are known not to trap/throw.
34755 (phiopt_worker::match_simplify_replacement):
34756 Use name instead of getting the lhs again.
34758 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
34760 * configure: Regenerate.
34761 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
34763 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
34765 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
34766 emit_insn_if_valid_for_reload.
34767 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
34768 to be recognized, also try emitting a parallel that clobbers
34769 TARGET_FLAGS_REGNUM, as applicable.
34771 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
34773 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
34775 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
34776 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
34778 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
34780 * config/stormy16/stormy16.md (any_lshift): New code iterator.
34781 (any_or_plus): Likewise.
34782 (any_rotate): Likewise.
34783 (*<any_lshift>_and_internal): New define_insn_and_split to
34784 recognize a logical shift followed by an AND, and split it
34785 again after reload.
34786 (*swpn): New define_insn matching xstormy16's swpn.
34787 (*swpn_zext): New define_insn recognizing swpn followed by
34788 zero_extendqihi2, i.e. with the high byte set to zero.
34789 (*swpn_sext): Likewise, for swpn followed by cbw.
34790 (*swpn_sext_2): Likewise, for an alternate RTL form.
34791 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
34792 sequence is split in the correct place to recognize the *swpn_zext
34793 followed by any_or_plus (ior, xor or plus) instruction.
34795 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
34798 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
34799 (lm32-*-uclinux*): Likewise.
34801 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
34803 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
34804 for riscv_use_save_libcall.
34805 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
34806 (riscv_compute_frame_info): restructure to decouple stack allocation
34807 for rv32e w/o save-restore.
34809 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
34811 * doc/install.texi: Fix documentation typo
34813 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
34815 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
34816 (u): Add div/udiv cases.
34817 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
34818 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
34820 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
34821 (thead_c906_tune_info): Likewise.
34822 (optimize_size_tune_info): Likewise.
34823 (riscv_use_divmod_expander): New function.
34824 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
34826 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
34828 * config/riscv/bitmanip.md: Added clmulr instruction.
34829 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
34830 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
34832 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
34833 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
34834 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
34835 functions to riscv-cmo.def.
34836 * config/riscv/generic.md: Add clmul to list of instructions
34837 using the generic_imul reservation.
34839 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
34841 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
34843 2023-04-28 Andrew Pinski <apinski@marvell.com>
34845 PR tree-optimization/100958
34846 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
34847 (pass_phiopt::execute): Don't call two_value_replacement.
34848 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
34849 handle what two_value_replacement did.
34851 2023-04-28 Andrew Pinski <apinski@marvell.com>
34853 * match.pd: Add patterns for
34854 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
34856 2023-04-28 Andrew Pinski <apinski@marvell.com>
34858 * match.pd: Factor out the deciding the min/max from
34859 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
34861 * fold-const.cc (minmax_from_comparison): this new function.
34862 * fold-const.h (minmax_from_comparison): New prototype.
34864 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
34866 PR rtl-optimization/109476
34867 * lower-subreg.cc: Include explow.h for force_reg.
34868 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
34869 If decomposing a suitable LSHIFTRT and we're not splitting
34870 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
34871 instead of setting a high part SUBREG to zero, which helps combine.
34872 (decompose_multiword_subregs): Update call to resolve_shift_zext.
34874 2023-04-28 Richard Biener <rguenther@suse.de>
34876 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
34878 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
34879 gather-scatter info and cost emulated scatters accordingly.
34880 (get_load_store_type): Support emulated scatters.
34881 (vectorizable_store): Likewise. Emulate them by extracting
34882 scalar offsets and data, doing scalar stores.
34884 2023-04-28 Richard Biener <rguenther@suse.de>
34886 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
34887 Tame down element extracts and scalar loads for gather/scatter
34888 similar to elementwise strided accesses.
34890 2023-04-28 Pan Li <pan2.li@intel.com>
34891 kito-cheng <kito.cheng@sifive.com>
34893 * config/riscv/vector.md: Add new define split to perform
34894 the simplification.
34896 2023-04-28 Richard Biener <rguenther@suse.de>
34899 * ipa-param-manipulation.cc
34900 (ipa_param_body_adjustments::modify_expression): Allow
34901 conversion of a register to a non-register type. Elide
34902 conversions inside BIT_FIELD_REFs.
34904 2023-04-28 Richard Biener <rguenther@suse.de>
34906 PR tree-optimization/109644
34907 * tree-cfg.cc (verify_types_in_gimple_reference): Check
34908 register constraints on the outermost VIEW_CONVERT_EXPR
34909 only. Do not allow register or invariant bases on
34910 multi-level or possibly variable index handled components.
34912 2023-04-28 Richard Biener <rguenther@suse.de>
34914 * gimplify.cc (gimplify_compound_lval): When there's a
34915 non-register type produced by one of the handled component
34916 operations make sure we get a non-register base.
34918 2023-04-28 Richard Biener <rguenther@suse.de>
34920 PR tree-optimization/108752
34921 * tree-vect-generic.cc (build_replicated_const): Rename
34922 to build_replicated_int_cst and move to tree.{h,cc}.
34923 (do_plus_minus): Adjust.
34924 (do_negate): Likewise.
34925 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
34926 arithmetic vector operations in lowered form.
34927 * tree.h (build_replicated_int_cst): Declare.
34928 * tree.cc (build_replicated_int_cst): Moved from
34929 tree-vect-generic.cc build_replicated_const.
34931 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
34934 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
34935 (aarch64_rbit<mode><vczle><vczbe>): ... This.
34936 (neg<mode>2): Rename to...
34937 (neg<mode>2<vczle><vczbe>): ... This.
34938 (abs<mode>2): Rename to...
34939 (abs<mode>2<vczle><vczbe>): ... This.
34940 (aarch64_abs<mode>): Rename to...
34941 (aarch64_abs<mode><vczle><vczbe>): ... This.
34942 (one_cmpl<mode>2): Rename to...
34943 (one_cmpl<mode>2<vczle><vczbe>): ... This.
34944 (clrsb<mode>2): Rename to...
34945 (clrsb<mode>2<vczle><vczbe>): ... This.
34946 (clz<mode>2): Rename to...
34947 (clz<mode>2<vczle><vczbe>): ... This.
34948 (popcount<mode>2): Rename to...
34949 (popcount<mode>2<vczle><vczbe>): ... This.
34951 2023-04-28 Jakub Jelinek <jakub@redhat.com>
34953 * gimple-range-op.cc (class cfn_sqrt): New type.
34954 (op_cfn_sqrt): New variable.
34955 (gimple_range_op_handler::maybe_builtin_call): Handle
34956 CASE_CFN_SQRT{,_FN}.
34958 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
34959 Jakub Jelinek <jakub@redhat.com>
34961 * value-range.h (frange_nextafter): Declare.
34962 * gimple-range-op.cc (class cfn_sincos): New.
34963 (op_cfn_sin, op_cfn_cos): New variables.
34964 (gimple_range_op_handler::maybe_builtin_call): Handle
34965 CASE_CFN_{SIN,COS}{,_FN}.
34967 2023-04-28 Jakub Jelinek <jakub@redhat.com>
34969 * target.def (libm_function_max_error): New target hook.
34970 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
34971 * doc/tm.texi: Regenerated.
34972 * targhooks.h (default_libm_function_max_error,
34973 glibc_linux_libm_function_max_error): Declare.
34974 * targhooks.cc: Include case-cfn-macros.h.
34975 (default_libm_function_max_error,
34976 glibc_linux_libm_function_max_error): New functions.
34977 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
34978 * config/linux-protos.h (linux_libm_function_max_error): Declare.
34979 * config/linux.cc: Include target.h and targhooks.h.
34980 (linux_libm_function_max_error): New function.
34981 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
34982 (arc_libm_function_max_error): New function.
34983 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
34984 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
34985 (ix86_libm_function_max_error): New function.
34986 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
34987 * config/rs6000/rs6000-protos.h
34988 (rs6000_linux_libm_function_max_error): Declare.
34989 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
34990 and case-cfn-macros.h.
34991 (rs6000_linux_libm_function_max_error): New function.
34992 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
34993 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
34994 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
34995 (or1k_libm_function_max_error): New function.
34996 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
34998 2023-04-28 Alexandre Oliva <oliva@adacore.com>
35000 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
35001 Move detach value calls...
35002 (pass_harden_conditional_branches::execute): ... here.
35003 (pass_harden_compares::execute): Detach values before
35006 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
35008 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
35009 (cml<addsub_as><mode>4): Likewise.
35010 (vec_addsub<mode>3): Likewise.
35011 (cadd<rot><mode>3): Likewise.
35012 (vec_fmaddsub<mode>4): Likewise.
35013 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
35015 2023-04-27 Andrew Pinski <apinski@marvell.com>
35017 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
35018 up to 2 min/max expressions in the sequence/match code.
35020 2023-04-27 Andrew Pinski <apinski@marvell.com>
35022 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
35024 * tree-eh.cc (operation_could_trap_helper_p): Treate
35025 MIN_EXPR/MAX_EXPR similar as other comparisons.
35027 2023-04-27 Andrew Pinski <apinski@marvell.com>
35029 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
35031 (cond_if_else_store_replacement): Likewise.
35032 (get_non_trapping): Likewise.
35033 (store_elim_worker): Move into ...
35034 (pass_cselim::execute): This.
35036 2023-04-27 Andrew Pinski <apinski@marvell.com>
35038 * tree-ssa-phiopt.cc (two_value_replacement): Remove
35040 (match_simplify_replacement): Likewise.
35041 (factor_out_conditional_conversion): Likewise.
35042 (value_replacement): Likewise.
35043 (minmax_replacement): Likewise.
35044 (spaceship_replacement): Likewise.
35045 (cond_removal_in_builtin_zero_pattern): Likewise.
35046 (hoist_adjacent_loads): Likewise.
35047 (tree_ssa_phiopt_worker): Move into ...
35048 (pass_phiopt::execute): this.
35050 2023-04-27 Andrew Pinski <apinski@marvell.com>
35052 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
35053 do_store_elim argument and split that part out to ...
35054 (store_elim_worker): This new function.
35055 (pass_cselim::execute): Call store_elim_worker.
35056 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
35058 2023-04-27 Jan Hubicka <jh@suse.cz>
35060 * cfgloopmanip.h (unloop_loops): Export.
35061 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
35062 that no longer loop.
35063 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
35064 vectors of loops to unloop.
35065 (canonicalize_induction_variables): Free vectors here.
35066 (tree_unroll_loops_completely): Free vectors here.
35068 2023-04-27 Richard Biener <rguenther@suse.de>
35070 PR tree-optimization/109170
35071 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
35072 Handle __builtin_expect and similar via cfn_pass_through_arg1
35073 and inspecting the calls fnspec.
35074 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
35075 and BUILT_IN_EXPECT_WITH_PROBABILITY.
35077 2023-04-27 Alexandre Oliva <oliva@adacore.com>
35079 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
35081 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
35083 PR tree-optimization/109639
35084 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
35085 (propagate_vr_across_jump_function): Same.
35086 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
35087 * ipa-prop.h (ipa_range_set_and_normalize): New.
35088 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
35090 2023-04-27 Richard Biener <rguenther@suse.de>
35092 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
35093 create a CTOR operand in the result when simplifying GIMPLE.
35095 2023-04-27 Richard Biener <rguenther@suse.de>
35097 * gimplify.cc (gimplify_compound_lval): When the base
35098 gimplified to a register make sure to split up chains
35101 2023-04-27 Richard Biener <rguenther@suse.de>
35104 * ipa-param-manipulation.h
35105 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
35107 * ipa-param-manipulation.cc
35108 (ipa_param_body_adjustments::modify_expression): Likewise.
35109 When we need a conversion and the replacement is a register
35110 split the conversion out.
35111 (ipa_param_body_adjustments::modify_assignment): Pass
35112 extra_stmts to RHS modify_expression.
35114 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
35116 * doc/extend.texi (Zero Length): Describe example.
35118 2023-04-27 Richard Biener <rguenther@suse.de>
35120 PR tree-optimization/109594
35121 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
35122 what we rewrite to a register based on the above.
35124 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
35126 * config/riscv/riscv.cc: Fix whitespace.
35127 * config/riscv/sync.md: Fix whitespace.
35129 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
35131 PR tree-optimization/108697
35132 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
35133 not clear the vector on an out of range query.
35134 (ssa_cache::dump): Use dump_range_query instead of get_range.
35135 (ssa_cache::dump_range_query): New.
35136 (ssa_lazy_cache::dump_range_query): New.
35137 (ssa_lazy_cache::set_range): New.
35138 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
35139 (class ssa_lazy_cache): New.
35140 (ssa_lazy_cache::ssa_lazy_cache): New.
35141 (ssa_lazy_cache::~ssa_lazy_cache): New.
35142 (ssa_lazy_cache::get_range): New.
35143 (ssa_lazy_cache::clear_range): New.
35144 (ssa_lazy_cache::clear): New.
35145 (ssa_lazy_cache::dump): New.
35146 * gimple-range-path.cc (path_range_query::path_range_query): Do
35147 not allocate a ssa_cache object nor has_cache bitmap.
35148 (path_range_query::~path_range_query): Do not free objects.
35149 (path_range_query::clear_cache): Remove.
35150 (path_range_query::get_cache): Adjust.
35151 (path_range_query::set_cache): Remove.
35152 (path_range_query::dump): Don't call through a pointer.
35153 (path_range_query::internal_range_of_expr): Set cache directly.
35154 (path_range_query::reset_path): Clear cache directly.
35155 (path_range_query::ssa_range_in_phi): Fold with globals only.
35156 (path_range_query::compute_ranges_in_phis): Simply set range.
35157 (path_range_query::compute_ranges_in_block): Call cache directly.
35158 * gimple-range-path.h (class path_range_query): Replace bitmap
35159 and cache pointer with lazy cache object.
35160 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
35162 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
35164 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
35165 (ssa_cache::~ssa_cache): Rename.
35166 (ssa_cache::has_range): New.
35167 (ssa_cache::get_range): Rename.
35168 (ssa_cache::set_range): Rename.
35169 (ssa_cache::clear_range): Rename.
35170 (ssa_cache::clear): Rename.
35171 (ssa_cache::dump): Rename and use get_range.
35172 (ranger_cache::get_global_range): Use get_range and set_range.
35173 (ranger_cache::range_of_def): Use get_range.
35174 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
35175 (class ranger_cache): Use ssa_cache.
35176 * gimple-range-path.cc (path_range_query::path_range_query): Use
35178 (path_range_query::get_cache): Use get_range.
35179 (path_range_query::set_cache): Use set_range.
35180 * gimple-range-path.h (class path_range_query): Use ssa_cache.
35181 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
35182 (assume_query::range_of_expr): Use get_range.
35183 (assume_query::assume_query): Use set_range.
35184 (assume_query::calculate_op): Use get_range and set_range.
35185 * gimple-range.h (class assume_query): Use ssa_cache.
35187 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
35189 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
35190 and local to optionally zero memory.
35191 (br_vector::grow): Only zero memory if flag is set.
35192 (class sbr_lazy_vector): New.
35193 (sbr_lazy_vector::sbr_lazy_vector): New.
35194 (sbr_lazy_vector::set_bb_range): New.
35195 (sbr_lazy_vector::get_bb_range): New.
35196 (sbr_lazy_vector::bb_range_p): New.
35197 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
35198 * gimple-range-gori.cc (gori_map::calculate_gori): Use
35199 param_vrp_switch_limit.
35200 (gori_compute::gori_compute): Use param_vrp_switch_limit.
35201 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
35202 (vrp_switch_limit): Rename from evrp_switch_limit.
35203 (vrp_vector_threshold): New.
35205 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
35207 * value-relation.cc (dom_oracle::query_relation): Check early for lack
35209 * value-relation.h (equiv_oracle::has_equiv_p): New.
35211 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
35213 PR tree-optimization/109417
35214 * gimple-range-gori.cc (range_def_chain::register_dependency):
35215 Save the ssa version number, not the pointer.
35216 (gori_compute::may_recompute_p): No need to check if a dependency
35217 is in the free list.
35218 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
35219 fields to be unsigned int instead of trees.
35220 (ange_def_chain::depend1): Adjust.
35221 (ange_def_chain::depend2): Adjust.
35222 * gimple-range.h: Include "ssa.h" to inline ssa_name().
35224 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
35226 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
35227 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
35228 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
35230 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
35233 * config/riscv/riscv-protos.h: Add helper function stubs.
35234 * config/riscv/riscv.cc: Add helper functions for subword masking.
35235 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
35236 -mno-inline-atomics.
35237 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
35238 fetch_and_nand, CAS, and exchange ops.
35239 * doc/invoke.texi: Add blurb regarding new command-line flags
35240 -minline-atomics and -mno-inline-atomics.
35242 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35244 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
35245 Reimplement using standard RTL codes instead of unspec.
35246 (aarch64_rshrn2<mode>_insn_be): Likewise.
35247 (aarch64_rshrn2<mode>): Adjust for the above.
35248 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
35250 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35252 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
35253 with standard RTL codes instead of an UNSPEC.
35254 (aarch64_rshrn<mode>_insn_be): Likewise.
35255 (aarch64_rshrn<mode>): Adjust for the above.
35256 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
35258 2023-04-26 Pan Li <pan2.li@intel.com>
35259 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35261 * config/riscv/riscv.cc (riscv_classify_address): Allow
35262 const0_rtx for the RVV load/store.
35264 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35266 * range-op.cc (range_op_cast_tests): Remove legacy support.
35267 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
35268 * value-range.cc (irange::operator=): Same.
35269 (get_legacy_range): Same.
35270 (irange::copy_legacy_to_multi_range): Delete.
35271 (irange::copy_to_legacy): Delete.
35272 (irange::irange_set_anti_range): Delete.
35273 (irange::set): Remove legacy support.
35274 (irange::verify_range): Same.
35275 (irange::legacy_lower_bound): Delete.
35276 (irange::legacy_upper_bound): Delete.
35277 (irange::legacy_equal_p): Delete.
35278 (irange::operator==): Remove legacy support.
35279 (irange::singleton_p): Same.
35280 (irange::value_inside_range): Same.
35281 (irange::contains_p): Same.
35282 (intersect_ranges): Delete.
35283 (irange::legacy_intersect): Delete.
35284 (union_ranges): Delete.
35285 (irange::legacy_union): Delete.
35286 (irange::legacy_verbose_union_): Delete.
35287 (irange::legacy_verbose_intersect): Delete.
35288 (irange::irange_union): Remove legacy support.
35289 (irange::irange_intersect): Same.
35290 (irange::intersect): Same.
35291 (irange::invert): Same.
35292 (ranges_from_anti_range): Delete.
35293 (gt_pch_nx): Adjust for legacy removal.
35295 (range_tests_legacy): Delete.
35296 (range_tests_misc): Adjust for legacy removal.
35297 (range_tests): Same.
35298 * value-range.h (class irange): Same.
35299 (irange::legacy_mode_p): Delete.
35300 (ranges_from_anti_range): Delete.
35301 (irange::nonzero_p): Adjust for legacy removal.
35302 (irange::lower_bound): Same.
35303 (irange::upper_bound): Same.
35304 (irange::union_): Same.
35305 (irange::intersect): Same.
35306 (irange::set_nonzero): Same.
35307 (irange::set_zero): Same.
35308 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
35310 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35312 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
35313 of range_has_numeric_bounds_p with irange API.
35314 (range_has_numeric_bounds_p): Delete.
35315 * value-range.h (range_has_numeric_bounds_p): Delete.
35317 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35319 * tree-data-ref.cc (compute_distributive_range): Replace uses of
35320 range_int_cst_p with irange API.
35321 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
35322 * tree-vrp.h (range_int_cst_p): Delete.
35323 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
35324 range_int_cst_p with irange API.
35325 (vr_set_zero_nonzero_bits): Same.
35326 (range_fits_type_p): Same.
35327 (simplify_using_ranges::simplify_casted_cond): Same.
35328 * tree-vrp.cc (range_int_cst_p): Remove.
35330 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35332 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
35334 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35336 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
35337 API uses to new API.
35338 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
35339 * internal-fn.cc (get_min_precision): Same.
35341 * tree-affine.cc (expr_to_aff_combination): Same.
35342 * tree-data-ref.cc (dr_step_indicator): Same.
35343 * tree-dfa.cc (get_ref_base_and_extent): Same.
35344 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
35345 * tree-ssa-phiopt.cc (two_value_replacement): Same.
35346 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
35347 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
35348 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
35349 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
35350 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
35351 * tree.cc (get_range_pos_neg): Same.
35353 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35355 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
35356 vrange::dump instead of ad-hoc dumper.
35357 * tree-ssa-strlen.cc (dump_strlen_info): Same.
35358 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
35361 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35363 * range-op.cc (operator_cast::op1_range): Use
35364 create_possibly_reversed_range.
35365 (operator_bitwise_and::simple_op1_range_solver): Same.
35366 * value-range.cc (swap_out_of_order_endpoints): Delete.
35367 (irange::set): Remove call to swap_out_of_order_endpoints.
35369 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35371 * builtins.cc (determine_block_size): Convert use of legacy API to
35373 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
35374 (array_bounds_checker::check_array_ref): Same.
35375 * gimple-ssa-warn-restrict.cc
35376 (builtin_memref::extend_offset_range): Same.
35377 * ipa-cp.cc (ipcp_store_vr_results): Same.
35378 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
35379 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
35380 (ipa_write_jump_function): Same.
35381 * pointer-query.cc (get_size_range): Same.
35382 * tree-data-ref.cc (split_constant_offset): Same.
35383 * tree-ssa-strlen.cc (get_range): Same.
35384 (maybe_diag_stxncpy_trunc): Same.
35385 (strlen_pass::get_len_or_size): Same.
35386 (strlen_pass::count_nonzero_bytes_addr): Same.
35387 * tree-vect-patterns.cc (vect_get_range_info): Same.
35388 * value-range.cc (irange::maybe_anti_range): Remove.
35389 (get_legacy_range): New.
35390 (irange::copy_to_legacy): Use get_legacy_range.
35391 (ranges_from_anti_range): Same.
35392 * value-range.h (class irange): Remove maybe_anti_range.
35393 (get_legacy_range): New.
35394 * vr-values.cc (check_for_binary_op_overflow): Convert use of
35395 legacy API to get_legacy_range.
35396 (compare_ranges): Same.
35397 (compare_range_with_value): Same.
35398 (bounds_of_var_in_loop): Same.
35399 (find_case_label_ranges): Same.
35400 (simplify_using_ranges::simplify_switch_using_ranges): Same.
35402 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35404 * value-range-pretty-print.cc (vrange_printer::visit): Remove
35406 * value-range.cc (irange::constant_p): Remove.
35407 (irange::get_nonzero_bits_from_range): Remove constant_p use.
35408 * value-range.h (class irange): Remove constant_p.
35409 (irange::num_pairs): Remove constant_p use.
35411 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35413 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
35415 (irange::set): Same.
35416 (irange::legacy_lower_bound): Same.
35417 (irange::legacy_upper_bound): Same.
35418 (irange::contains_p): Same.
35419 (range_tests_legacy): Same.
35420 (irange::normalize_addresses): Remove.
35421 (irange::normalize_symbolics): Remove.
35422 (irange::symbolic_p): Remove.
35423 * value-range.h (class irange): Remove symbolic_p,
35424 normalize_symbolics, and normalize_addresses.
35425 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
35426 Remove symbolics support.
35428 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35430 * value-range.cc (irange::may_contain_p): Remove.
35431 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
35432 usage with contains_p.
35433 * vr-values.cc (compare_range_with_value): Same.
35435 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35437 * tree-vrp.cc (supported_types_p): Remove.
35438 (defined_ranges_p): Remove.
35439 (range_fold_binary_expr): Remove.
35440 (range_fold_unary_expr): Remove.
35441 * tree-vrp.h (range_fold_unary_expr): Remove.
35442 (range_fold_binary_expr): Remove.
35444 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35446 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
35447 (ipa_value_range_from_jfunc): Same.
35448 (propagate_vr_across_jump_function): Same.
35449 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
35450 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
35451 * vr-values.cc (bounds_of_var_in_loop): Same.
35453 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35455 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
35456 Add irange argument.
35457 (check_out_of_bounds_and_warn): Remove check for vr.
35458 (array_bounds_checker::check_array_ref): Remove pointer qualifier
35459 for vr and adjust accordingly.
35460 * gimple-array-bounds.h (get_value_range): Add irange argument.
35461 * value-query.cc (class equiv_allocator): Delete.
35462 (range_query::get_value_range): Delete.
35463 (range_query::range_query): Remove allocator access.
35464 (range_query::~range_query): Same.
35465 * value-query.h (get_value_range): Delete.
35467 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
35468 call to get_value_range.
35469 (check_for_binary_op_overflow): Same.
35470 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
35471 (simplify_using_ranges::simplify_abs_using_ranges): Same.
35472 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
35473 (simplify_using_ranges::simplify_casted_cond): Same.
35474 (simplify_using_ranges::simplify_switch_using_ranges): Same.
35475 (simplify_using_ranges::two_valued_val_range_p): Same.
35477 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35480 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
35482 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
35483 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
35484 (simplify_using_ranges::legacy_fold_cond): ...this.
35485 (simplify_using_ranges::fold_cond): Rename
35486 vrp_evaluate_conditional_warnv_with_ops to
35487 legacy_fold_cond_overflow.
35488 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
35489 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
35490 legacy_fold_cond_overflow respectively.
35492 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
35494 * vr-values.cc (get_vr_for_comparison): Remove.
35495 (compare_name_with_value): Same.
35496 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
35497 compare_name_with_value.
35498 * vr-values.h: Remove compare_name_with_value.
35499 Remove get_vr_for_comparison.
35501 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
35503 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
35504 (bswapsi2): New define_insn.
35505 (swaphi): New define_insn to exchange two registers (swpw).
35506 (define_peephole2): Recognize exchange of registers as swaphi.
35508 2023-04-26 Richard Biener <rguenther@suse.de>
35510 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
35512 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
35513 * predict.cc (apply_return_prediction): Likewise.
35514 * sese.cc (set_ifsese_condition): Likewise. Simplify.
35515 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
35516 (make_edges_bb): Likewise.
35517 (make_cond_expr_edges): Likewise.
35518 (end_recording_case_labels): Likewise.
35519 (make_gimple_asm_edges): Likewise.
35520 (cleanup_dead_labels): Likewise.
35521 (group_case_labels): Likewise.
35522 (gimple_can_merge_blocks_p): Likewise.
35523 (gimple_merge_blocks): Likewise.
35524 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
35525 (gimple_duplicate_sese_tail): Avoid last_stmt.
35526 (find_loop_dist_alias): Likewise.
35527 (gimple_block_ends_with_condjump_p): Likewise.
35528 (gimple_purge_dead_eh_edges): Likewise.
35529 (gimple_purge_dead_abnormal_call_edges): Likewise.
35530 (pass_warn_function_return::execute): Likewise.
35531 (execute_fixup_cfg): Likewise.
35532 * tree-eh.cc (redirect_eh_edge_1): Likewise.
35533 (pass_lower_resx::execute): Likewise.
35534 (pass_lower_eh_dispatch::execute): Likewise.
35535 (cleanup_empty_eh): Likewise.
35536 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
35537 (predicate_bbs): Likewise.
35538 (ifcvt_split_critical_edges): Likewise.
35539 * tree-loop-distribution.cc (create_edge_for_control_dependence):
35541 (loop_distribution::transform_reduction_loop): Likewise.
35542 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
35543 (try_transform_to_exit_first_loop_alt): Likewise.
35544 (transform_to_exit_first_loop): Likewise.
35545 (create_parallel_loop): Likewise.
35546 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
35547 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
35548 (eliminate_unnecessary_stmts): Likewise.
35550 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
35552 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
35553 (pass_tree_ifcombine::execute): Likewise.
35554 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
35555 (should_duplicate_loop_header_p): Likewise.
35556 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
35557 (tree_estimate_loop_size): Likewise.
35558 (try_unroll_loop_completely): Likewise.
35559 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
35560 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
35561 (canonicalize_loop_ivs): Likewise.
35562 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
35563 (bound_difference): Likewise.
35564 (number_of_iterations_popcount): Likewise.
35565 (number_of_iterations_cltz): Likewise.
35566 (number_of_iterations_cltz_complement): Likewise.
35567 (simplify_using_initial_conditions): Likewise.
35568 (number_of_iterations_exit_assumptions): Likewise.
35569 (loop_niter_by_eval): Likewise.
35570 (estimate_numbers_of_iterations): Likewise.
35572 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35574 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
35576 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
35579 * config/rs6000/rs6000-builtins.def
35580 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
35581 __builtin_vsx_scalar_cmp_exp_qp_lt,
35582 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
35585 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
35588 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
35589 easy_vector_constant with const_vector_each_byte_same, add
35590 handlings in preparation for !easy_vector_constant, and update
35591 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
35592 * config/rs6000/predicates.md (const_vector_each_byte_same): New
35595 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35597 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
35598 (*pred_ltge<mode>_merge_tie_mask): Ditto.
35599 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
35600 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
35601 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
35602 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
35603 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
35605 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35607 * config/riscv/vector.md: Fix redundant vmv1r.v.
35609 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35611 * config/riscv/vector.md: Fix RA constraint.
35613 2023-04-26 Pan Li <pan2.li@intel.com>
35616 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
35617 check for vn_reference equal.
35619 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35621 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
35622 auto-vectorization preference.
35623 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
35624 auto-vectorization.
35625 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
35627 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
35629 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
35630 and bclridisi_nottwobits patterns.
35631 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
35632 predicate to avoid splitting arith constants.
35633 (const_nottwobits_not_arith_operand): New predicate.
35635 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
35637 * recog.cc (peep2_attempt, peep2_update_life): Correct
35638 head-comment description of parameter match_len.
35640 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
35642 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
35643 riscv_split_symbol() drop in_splitter arg.
35644 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
35645 riscv_split_symbol() drop in_splitter arg.
35646 riscv_force_temporary() drop in_splitter arg.
35647 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
35648 riscv_split_symbol() drop in_splitter arg.
35650 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
35652 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
35653 superfluous debug temporaries for single GIMPLE assignments.
35655 2023-04-25 Richard Biener <rguenther@suse.de>
35657 PR tree-optimization/109609
35658 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
35660 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
35661 the size given by arg_max_access_size_given_by_arg_p as
35662 maximum, not exact, size.
35664 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35667 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
35668 (orn<mode>3<vczle><vczbe>): ... This.
35669 (bic<mode>3): Rename to...
35670 (bic<mode>3<vczle><vczbe>): ... This.
35671 (<su><maxmin><mode>3): Rename to...
35672 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
35674 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35676 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
35677 * config/aarch64/iterators.md (VQDIV): New mode iterator.
35678 (vnx2di): New mode attribute.
35680 2023-04-25 Richard Biener <rguenther@suse.de>
35682 PR rtl-optimization/109585
35683 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
35685 2023-04-25 Jakub Jelinek <jakub@redhat.com>
35688 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
35689 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
35690 is larger than signed int maximum.
35692 2023-04-25 Martin Liska <mliska@suse.cz>
35694 * doc/gcov.texi: Document the new "calls" field and document
35695 the API bump. Mention also "block_ids" for lines.
35696 * gcov.cc (output_intermediate_json_line): Output info about
35697 calls and extend branches as well.
35698 (generate_results): Bump version to 2.
35699 (output_line_details): Use block ID instead of a non-sensual
35702 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
35704 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
35705 length attribute for the first (memory operand) alternative.
35707 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
35709 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
35710 * config/aarch64/constraints.md: Make "Umn" relaxed memory
35712 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
35714 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
35716 * value-range.cc (frange::set): Adjust constructor.
35717 * value-range.h (nan_state::nan_state): Replace default
35718 constructor with one taking an argument.
35720 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
35722 * ipa-cp.cc (ipa_range_contains_p): New.
35723 (decide_whether_version_node): Use it.
35725 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
35727 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
35728 simplify two successive VEC_PERM_EXPRs with same VLA mask,
35729 where mask chooses elements in reverse order.
35731 2023-04-24 Andrew Pinski <apinski@marvell.com>
35733 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
35734 and support diamond shaped basic block form.
35735 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
35737 2023-04-24 Andrew Pinski <apinski@marvell.com>
35739 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
35740 Instead of calling last_and_only_stmt, look for the last statement
35743 2023-04-24 Andrew Pinski <apinski@marvell.com>
35745 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
35747 (match_simplify_replacement): Call
35748 empty_bb_or_one_feeding_into_p instead of doing it inline.
35750 2023-04-24 Andrew Pinski <apinski@marvell.com>
35752 PR tree-optimization/68894
35753 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
35754 continue for the do_hoist_loads diamond case.
35756 2023-04-24 Andrew Pinski <apinski@marvell.com>
35758 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
35759 code for better code readability.
35761 2023-04-24 Andrew Pinski <apinski@marvell.com>
35763 PR tree-optimization/109604
35764 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
35765 diamond form check from ...
35766 (minmax_replacement): Here.
35768 2023-04-24 Patrick Palka <ppalka@redhat.com>
35770 * tree.cc (strip_array_types): Don't define here.
35771 (is_typedef_decl): Don't define here.
35772 (typedef_variant_p): Don't define here.
35773 * tree.h (strip_array_types): Define here.
35774 (is_typedef_decl): Define here.
35775 (typedef_variant_p): Define here.
35777 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
35779 * doc/generic.texi (OpenMP): Add != to allowed
35780 conditions and state that vars can be unsigned.
35781 * tree.def (OMP_FOR): Likewise.
35783 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35785 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
35787 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
35789 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
35790 Remove explicit Solaris 11 references.
35792 (Options specification, --with-gnu-as): as and gas always differ
35794 Remove /usr/ccs/bin reference.
35795 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
35796 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
35797 (*-*-solaris2*): ... here.
35798 Update bundled GCC versions.
35799 Don't refer to pre-built binaries.
35800 Remove /bin/sh warning.
35801 Update assembler, linker recommendations.
35802 Document GNAT bootstrap compiler.
35803 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
35804 (sparc64-*-solaris2*): Move content...
35805 (sparcv9-*-solaris2*): ...here.
35806 Add GDC for 64-bit bootstrap compilers.
35808 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35811 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
35813 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
35816 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35818 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
35819 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
35820 (aarch64_<su>abal2<mode>): New define_expand.
35821 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
35822 (aarch64_rtx_costs): Handle ABD rtxes.
35823 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
35824 * config/aarch64/iterators.md (ABAL2): Delete.
35825 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
35827 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35829 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
35830 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
35831 (<sur>sadv16qi): Rename to...
35832 (<su>sadv16qi): ... This. Adjust for the above.
35833 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
35834 (<su>sad<vsi2qi>): ... This. Adjust for the above.
35835 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
35836 * config/aarch64/iterators.md (ABAL): Delete.
35837 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
35839 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35841 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
35842 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
35843 (aarch64_<su>abdl2<mode>): New define_expand.
35844 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
35845 * config/aarch64/iterators.md (ABDL2): Delete.
35846 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
35848 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35850 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
35851 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
35853 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
35854 * config/aarch64/iterators.md (ABDL): Delete.
35855 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
35857 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35859 * config/aarch64/aarch64-simd.md
35860 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
35862 2023-04-24 Richard Biener <rguenther@suse.de>
35864 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
35866 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
35868 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
35869 (set_switch_stmt_execution_predicate): Likewise.
35870 (phi_result_unknown_predicate): Likewise.
35871 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
35872 (ipa_analyze_indirect_call_uses): Likewise.
35873 * predict.cc (predict_iv_comparison): Likewise.
35874 (predict_extra_loop_exits): Likewise.
35875 (predict_loops): Likewise.
35876 (tree_predict_by_opcode): Likewise.
35877 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
35879 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
35880 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
35881 (replace_phi_edge_with_variable): Likewise.
35882 (two_value_replacement): Likewise.
35883 (value_replacement): Likewise.
35884 (minmax_replacement): Likewise.
35885 (spaceship_replacement): Likewise.
35886 (cond_removal_in_builtin_zero_pattern): Likewise.
35887 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
35888 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
35889 (vn_phi_lookup): Likewise.
35890 (vn_phi_insert): Likewise.
35891 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
35892 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
35894 (back_threader_profitability::possibly_profitable_path_p):
35896 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
35898 * tree-switch-conversion.cc (pass_convert_switch::execute):
35900 (pass_lower_switch<O0>::execute): Likewise.
35901 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
35902 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
35903 * tree-vect-slp.cc (vect_slp_function): Likewise.
35904 * tree-vect-stmts.cc (cfun_returns): Likewise.
35905 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
35906 (vect_loop_dist_alias_call): Likewise.
35908 2023-04-24 Richard Biener <rguenther@suse.de>
35910 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
35912 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35914 * config/riscv/riscv-vsetvl.cc
35915 (vector_infos_manager::all_avail_in_compatible_p): New function.
35916 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
35917 * config/riscv/riscv-vsetvl.h: New function.
35919 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35921 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
35922 comment for cleanup_insns.
35924 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
35926 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
35927 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
35928 with the fault first load property.
35930 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35932 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
35933 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
35935 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
35938 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
35939 (aarch64_addp<mode><vczle><vczbe>): ... This.
35941 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
35943 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
35944 provide reasonable values for common arithmetic operations and
35945 immediate operands (in several machine modes).
35947 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
35949 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
35950 format specifier to output high_part register name of SImode reg.
35951 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
35952 (zero_extendqihi2): Fix lengths, consistent formatting and add
35953 "and Rx,#255" alternative, for documentation purposes.
35954 (zero_extendhisi2): New define_insn.
35956 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
35958 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
35959 SImode shifts by two by performing a single bit SImode shift twice.
35961 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
35963 PR tree-optimization/109593
35964 * value-range.cc (frange::operator==): Handle NANs.
35966 2023-04-23 liuhongt <hongtao.liu@intel.com>
35968 PR rtl-optimization/108707
35969 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
35970 GENERAL_REGS when preferred reg_class is not known.
35972 2023-04-22 Andrew Pinski <apinski@marvell.com>
35974 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
35975 Change the code around slightly to move diamond
35976 handling for do_store_elim/do_hoist_loads out of
35979 2023-04-22 Andrew Pinski <apinski@marvell.com>
35981 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
35982 Remove check on empty_block_p.
35984 2023-04-22 Jakub Jelinek <jakub@redhat.com>
35986 PR bootstrap/109589
35987 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
35988 * realmpfr.h (class auto_mpfr): Likewise.
35990 2023-04-22 Jakub Jelinek <jakub@redhat.com>
35992 PR tree-optimization/109583
35993 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
35994 if vec_mode is not VECTOR_MODE_P.
35996 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
35997 Ondrej Kubanek <kubanek0ondrej@gmail.com>
35999 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
36000 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
36001 loop profile and bounds after header duplication.
36002 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
36003 Break out from try_peel_loop; fix handling of 0 iterations.
36004 (try_peel_loop): Use adjust_loop_info_after_peeling.
36006 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
36008 PR tree-optimization/109546
36009 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
36010 not fold conditions with ADDR_EXPR early.
36012 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36014 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
36015 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
36017 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
36018 (*aarch64_<optab><mode>3_zero): Define.
36019 (*aarch64_<optab><mode>3_cssc): Likewise.
36020 * config/aarch64/iterators.md (maxminand): New code attribute.
36022 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36025 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
36026 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
36028 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
36029 (aarch64_override_options_internal): Handle the above.
36030 (aarch64_output_load_tp): New function.
36031 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
36032 aarch64_output_load_tp.
36033 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
36034 (mtp=): New option.
36035 * doc/invoke.texi (AArch64 Options): Document -mtp=.
36037 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36040 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
36041 (add_vec_concat_subst_be): Likewise.
36044 (add<mode>3): Rename to...
36045 (add<mode>3<vczle><vczbe>): ... This.
36046 (sub<mode>3): Rename to...
36047 (sub<mode>3<vczle><vczbe>): ... This.
36048 (mul<mode>3): Rename to...
36049 (mul<mode>3<vczle><vczbe>): ... This.
36050 (and<mode>3): Rename to...
36051 (and<mode>3<vczle><vczbe>): ... This.
36052 (ior<mode>3): Rename to...
36053 (ior<mode>3<vczle><vczbe>): ... This.
36054 (xor<mode>3): Rename to...
36055 (xor<mode>3<vczle><vczbe>): ... This.
36056 * config/aarch64/iterators.md (VDZ): Define.
36058 2023-04-21 Patrick Palka <ppalka@redhat.com>
36060 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
36063 2023-04-21 Jan Hubicka <jh@suse.cz>
36065 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
36068 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
36070 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
36071 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
36073 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36075 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
36076 force_reg instead of copy_to_mode_reg.
36077 (aarch64_expand_vector_init): Likewise.
36079 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
36081 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
36082 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
36083 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
36084 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
36085 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
36086 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
36087 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
36088 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
36089 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
36090 * config/i386/predicates.md (index_register_operand):
36091 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
36092 * config/i386/i386.cc (ix86_legitimate_address_p): Use
36093 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
36094 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
36096 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
36097 Ondrej Kubanek <kubanek0ondrej@gmail.com>
36099 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
36102 2023-04-21 Richard Biener <rguenther@suse.de>
36104 * is-a.h (safe_is_a): New.
36106 2023-04-21 Richard Biener <rguenther@suse.de>
36108 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
36109 (gphi_iterator::operator*): Likewise.
36111 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
36112 Michal Jires <michal@jires.eu>
36114 * ipa-inline.cc (class inline_badness): New class.
36115 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
36117 (update_edge_key): Update.
36118 (lookup_recursive_calls): Likewise.
36119 (recursive_inlining): Likewise.
36120 (add_new_edges_to_heap): Likewise.
36121 (inline_small_functions): Likewise.
36123 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
36125 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
36127 2023-04-21 Richard Biener <rguenther@suse.de>
36129 PR tree-optimization/109573
36130 * tree-vect-loop.cc (vectorizable_live_operation): Allow
36131 unhandled SSA copy as well. Demote assert to checking only.
36133 2023-04-21 Richard Biener <rguenther@suse.de>
36135 * df-core.cc (df_analyze): Compute RPO on the reverse graph
36136 for DF_BACKWARD problems.
36137 (loop_post_order_compute): Rename to ...
36138 (loop_rev_post_order_compute): ... this, compute a RPO.
36139 (loop_inverted_post_order_compute): Rename to ...
36140 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
36141 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
36142 problems, RPO on the inverted graph for DF_BACKWARD.
36144 2023-04-21 Richard Biener <rguenther@suse.de>
36146 * cfganal.h (inverted_rev_post_order_compute): Rename
36148 (inverted_post_order_compute): ... this. Add struct function
36149 argument, change allocation to a C array.
36150 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
36151 * lcm.cc (compute_antinout_edge): Adjust.
36152 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
36153 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
36154 * tree-ssa-pre.cc (compute_antic): Likewise.
36156 2023-04-21 Richard Biener <rguenther@suse.de>
36158 * df.h (df_d::postorder_inverted): Change back to int *,
36160 * df-core.cc (rest_of_handle_df_finish): Adjust.
36161 (df_analyze_1): Likewise.
36162 (df_analyze): For DF_FORWARD problems use RPO on the forward
36164 (loop_inverted_post_order_compute): Adjust API.
36165 (df_analyze_loop): Adjust.
36166 (df_get_n_blocks): Likewise.
36167 (df_get_postorder): Likewise.
36169 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36172 * config/riscv/riscv-vsetvl.cc
36173 (vector_infos_manager::all_empty_predecessor_p): New function.
36174 (pass_vsetvl::backward_demand_fusion): Ditto.
36175 * config/riscv/riscv-vsetvl.h: Ditto.
36177 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
36180 * config/riscv/generic.md: Change standard names to insn names.
36182 2023-04-21 Richard Biener <rguenther@suse.de>
36184 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
36185 (compute_laterin): Use RPO.
36186 (compute_available): Likewise.
36188 2023-04-21 Peng Fan <fanpeng@loongson.cn>
36190 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
36192 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36195 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
36196 (vector_insn_info::skip_avl_compatible_p): Ditto.
36197 (vector_insn_info::merge): Remove default value.
36198 (pass_vsetvl::compute_local_backward_infos): Ditto.
36199 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
36200 * config/riscv/riscv-vsetvl.h: Ditto.
36202 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
36204 * doc/extend.texi (Common Function Attributes): Remove duplicate
36207 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
36209 PR tree-optimization/109564
36210 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
36211 UNDEFINED range names when deciding if all PHI arguments are the same,
36213 2023-04-20 Jakub Jelinek <jakub@redhat.com>
36215 PR tree-optimization/109011
36216 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
36217 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
36218 .CTZ (X) = PREC - .POPCOUNT (X | -X).
36220 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
36222 * lra-constraints.cc (match_reload): Exclude some hard regs for
36223 multi-reg inout reload pseudos used in asm in different mode.
36225 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
36227 * config/arm/arm.cc (thumb1_legitimate_address_p):
36228 Use VIRTUAL_REGISTER_P predicate.
36229 (arm_eliminable_register): Ditto.
36230 * config/avr/avr.md (push<mode>_1): Ditto.
36231 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
36232 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
36233 * config/i386/predicates.md (register_no_elim_operand): Ditto.
36234 * config/iq2000/predicates.md (call_insn_operand): Ditto.
36235 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
36237 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
36240 * config/i386/predicates.md (extract_operator): New predicate.
36241 * config/i386/i386.md (any_extract): Remove code iterator.
36242 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
36243 (*cmpqi_ext<mode>_1): Ditto.
36244 (*cmpqi_ext<mode>_2): Ditto.
36245 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
36246 (*cmpqi_ext<mode>_3): Ditto.
36247 (*cmpqi_ext<mode>_4): Ditto.
36248 (*extzvqi_mem_rex64): Ditto.
36250 (*insvqi_2): Ditto.
36251 (*extendqi<SWI24:mode>_ext_1): Ditto.
36252 (*addqi_ext<mode>_0): Ditto.
36253 (*addqi_ext<mode>_1): Ditto.
36254 (*addqi_ext<mode>_2): Ditto.
36255 (*subqi_ext<mode>_0): Ditto.
36256 (*subqi_ext<mode>_2): Ditto.
36257 (*testqi_ext<mode>_1): Ditto.
36258 (*testqi_ext<mode>_2): Ditto.
36259 (*andqi_ext<mode>_0): Ditto.
36260 (*andqi_ext<mode>_1): Ditto.
36261 (*andqi_ext<mode>_1_cc): Ditto.
36262 (*andqi_ext<mode>_2): Ditto.
36263 (*<any_or:code>qi_ext<mode>_0): Ditto.
36264 (*<any_or:code>qi_ext<mode>_1): Ditto.
36265 (*<any_or:code>qi_ext<mode>_2): Ditto.
36266 (*xorqi_ext<mode>_1_cc): Ditto.
36267 (*negqi_ext<mode>_2): Ditto.
36268 (*ashlqi_ext<mode>_2): Ditto.
36269 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
36271 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
36274 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
36275 <bitmanip_insn> as the type to allow for fine grained control of
36276 scheduling these insns.
36277 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
36279 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
36280 pcnt, signed and unsigned min/max.
36282 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36283 kito-cheng <kito.cheng@sifive.com>
36285 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
36287 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36288 kito-cheng <kito.cheng@sifive.com>
36291 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
36292 (pass_vsetvl::cleanup_insns): Fix bug.
36294 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
36296 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
36297 (ldexp<mode>3): Delete.
36298 (ldexp<mode>3<exec>): Change "B" to "A".
36300 2023-04-20 Jakub Jelinek <jakub@redhat.com>
36301 Jonathan Wakely <jwakely@redhat.com>
36303 * tree.h (built_in_function_equal_p): New helper function.
36304 (fndecl_built_in_p): Turn into variadic template to support
36305 1 or more built_in_function arguments.
36306 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
36307 * gimplify.cc (goa_stabilize_expr): Likewise.
36308 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
36309 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
36310 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
36311 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
36312 cgraph_update_edges_for_call_stmt_node,
36313 cgraph_edge::verify_corresponds_to_fndecl,
36314 cgraph_node::verify_node): Likewise.
36315 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
36316 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
36317 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
36319 2023-04-20 Jakub Jelinek <jakub@redhat.com>
36321 PR tree-optimization/109011
36322 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
36323 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
36324 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
36325 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
36326 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
36328 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
36330 2023-04-20 Richard Biener <rguenther@suse.de>
36332 * df-core.cc (rest_of_handle_df_initialize): Remove
36333 computation of df->postorder, df->postorder_inverted and
36336 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
36338 * common/config/i386/i386-common.cc
36339 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
36340 (ix86_handle_option): Set AVX flag for VAES.
36341 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
36342 Add OPTION_MASK_ISA2_VAES_UNSET.
36343 (def_builtin): Share builtin between AES and VAES.
36344 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
36346 * config/i386/i386.md (aes): New isa attribute.
36347 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
36348 (aesenclast): Ditto.
36350 (aesdeclast): Ditto.
36351 * config/i386/vaesintrin.h: Remove redundant avx target push.
36352 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
36353 (_mm_aesdeclast_si128): Ditto.
36354 (_mm_aesenc_si128): Ditto.
36355 (_mm_aesenclast_si128): Ditto.
36357 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
36359 * config/i386/avx2intrin.h
36360 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
36361 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
36362 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
36363 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
36364 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
36365 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
36366 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
36367 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
36368 (_mm_reduce_add_epi16): New instrinsics.
36369 (_mm_reduce_mul_epi16): Ditto.
36370 (_mm_reduce_and_epi16): Ditto.
36371 (_mm_reduce_or_epi16): Ditto.
36372 (_mm_reduce_max_epi16): Ditto.
36373 (_mm_reduce_max_epu16): Ditto.
36374 (_mm_reduce_min_epi16): Ditto.
36375 (_mm_reduce_min_epu16): Ditto.
36376 (_mm256_reduce_add_epi16): Ditto.
36377 (_mm256_reduce_mul_epi16): Ditto.
36378 (_mm256_reduce_and_epi16): Ditto.
36379 (_mm256_reduce_or_epi16): Ditto.
36380 (_mm256_reduce_max_epi16): Ditto.
36381 (_mm256_reduce_max_epu16): Ditto.
36382 (_mm256_reduce_min_epi16): Ditto.
36383 (_mm256_reduce_min_epu16): Ditto.
36384 (_mm_reduce_add_epi8): Ditto.
36385 (_mm_reduce_mul_epi8): Ditto.
36386 (_mm_reduce_and_epi8): Ditto.
36387 (_mm_reduce_or_epi8): Ditto.
36388 (_mm_reduce_max_epi8): Ditto.
36389 (_mm_reduce_max_epu8): Ditto.
36390 (_mm_reduce_min_epi8): Ditto.
36391 (_mm_reduce_min_epu8): Ditto.
36392 (_mm256_reduce_add_epi8): Ditto.
36393 (_mm256_reduce_mul_epi8): Ditto.
36394 (_mm256_reduce_and_epi8): Ditto.
36395 (_mm256_reduce_or_epi8): Ditto.
36396 (_mm256_reduce_max_epi8): Ditto.
36397 (_mm256_reduce_max_epu8): Ditto.
36398 (_mm256_reduce_min_epi8): Ditto.
36399 (_mm256_reduce_min_epu8): Ditto.
36400 * config/i386/avx512vlbwintrin.h:
36401 (_mm_mask_reduce_add_epi16): Ditto.
36402 (_mm_mask_reduce_mul_epi16): Ditto.
36403 (_mm_mask_reduce_and_epi16): Ditto.
36404 (_mm_mask_reduce_or_epi16): Ditto.
36405 (_mm_mask_reduce_max_epi16): Ditto.
36406 (_mm_mask_reduce_max_epu16): Ditto.
36407 (_mm_mask_reduce_min_epi16): Ditto.
36408 (_mm_mask_reduce_min_epu16): Ditto.
36409 (_mm256_mask_reduce_add_epi16): Ditto.
36410 (_mm256_mask_reduce_mul_epi16): Ditto.
36411 (_mm256_mask_reduce_and_epi16): Ditto.
36412 (_mm256_mask_reduce_or_epi16): Ditto.
36413 (_mm256_mask_reduce_max_epi16): Ditto.
36414 (_mm256_mask_reduce_max_epu16): Ditto.
36415 (_mm256_mask_reduce_min_epi16): Ditto.
36416 (_mm256_mask_reduce_min_epu16): Ditto.
36417 (_mm_mask_reduce_add_epi8): Ditto.
36418 (_mm_mask_reduce_mul_epi8): Ditto.
36419 (_mm_mask_reduce_and_epi8): Ditto.
36420 (_mm_mask_reduce_or_epi8): Ditto.
36421 (_mm_mask_reduce_max_epi8): Ditto.
36422 (_mm_mask_reduce_max_epu8): Ditto.
36423 (_mm_mask_reduce_min_epi8): Ditto.
36424 (_mm_mask_reduce_min_epu8): Ditto.
36425 (_mm256_mask_reduce_add_epi8): Ditto.
36426 (_mm256_mask_reduce_mul_epi8): Ditto.
36427 (_mm256_mask_reduce_and_epi8): Ditto.
36428 (_mm256_mask_reduce_or_epi8): Ditto.
36429 (_mm256_mask_reduce_max_epi8): Ditto.
36430 (_mm256_mask_reduce_max_epu8): Ditto.
36431 (_mm256_mask_reduce_min_epi8): Ditto.
36432 (_mm256_mask_reduce_min_epu8): Ditto.
36434 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
36436 * common/config/i386/i386-common.cc
36437 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
36438 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
36439 (OPTION_MASK_ISA_AVX_UNSET):
36440 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
36441 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
36442 * config/i386/i386.md (vpclmulqdqvl): New.
36443 * config/i386/sse.md (pclmulqdq): Add evex encoding.
36444 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
36447 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
36449 * config/i386/avx512vlbwintrin.h
36450 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
36451 (_mm_mask_blend_epi8): Ditto.
36452 (_mm256_mask_blend_epi16): Ditto.
36453 (_mm256_mask_blend_epi8): Ditto.
36454 * config/i386/avx512vlintrin.h
36455 (_mm256_mask_blend_pd): Ditto.
36456 (_mm256_mask_blend_ps): Ditto.
36457 (_mm256_mask_blend_epi64): Ditto.
36458 (_mm256_mask_blend_epi32): Ditto.
36459 (_mm_mask_blend_pd): Ditto.
36460 (_mm_mask_blend_ps): Ditto.
36461 (_mm_mask_blend_epi64): Ditto.
36462 (_mm_mask_blend_epi32): Ditto.
36463 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
36464 (VF_AVX512HFBFVL): Move it before the first usage.
36465 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
36466 to VF_AVX512HFBFVL.
36468 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
36470 * common/config/i386/i386-common.cc
36471 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
36472 to OPTION_MASK_ISA_AVX512BW_SET.
36473 (OPTION_MASK_ISA_AVX512F_UNSET):
36474 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
36475 (OPTION_MASK_ISA_AVX512BW_UNSET):
36476 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
36477 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
36478 * config/i386/avx512vbmi2vlintrin.h: Ditto.
36479 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
36480 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
36481 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
36482 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
36484 (compressstore<mode>_mask): Ditto.
36485 (expand<mode>_mask): Ditto.
36486 (expand<mode>_maskz): Ditto.
36487 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
36488 VI12_VI48F_AVX512VL.
36490 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
36492 * common/config/i386/i386-common.cc
36493 (OPTION_MASK_ISA_AVX512BITALG_SET):
36494 Change OPTION_MASK_ISA_AVX512F_SET
36495 to OPTION_MASK_ISA_AVX512BW_SET.
36496 (OPTION_MASK_ISA_AVX512F_UNSET):
36497 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
36498 (OPTION_MASK_ISA_AVX512BW_UNSET):
36499 Add OPTION_MASK_ISA_AVX512BITALG_SET.
36500 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
36501 * config/i386/i386-builtin.def:
36502 Remove redundant OPTION_MASK_ISA_AVX512BW.
36503 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
36504 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
36505 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
36507 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
36509 * config/i386/i386-expand.cc
36510 (ix86_check_builtin_isa_match): Correct wrong comments.
36511 Add a new macro SHARE_BUILTIN and refactor the current if
36514 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
36516 * config/i386/cpuid.h: Open a new section for Extended Features
36517 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
36520 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
36522 * config/i386/sse.md: Modify insn vperm{i,f}
36525 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
36527 * config/xtensa/xtensa-opts.h: New header.
36528 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
36529 xtensa_strict_align.
36530 * config/xtensa/xtensa.cc (xtensa_option_override): When
36531 -m[no-]strict-align is not specified in the command line set
36532 xtensa_strict_align to 0 if the hardware supports both unaligned
36533 loads and stores or to 1 otherwise.
36534 * config/xtensa/xtensa.opt (mstrict-align): New option.
36535 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
36537 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
36539 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
36542 2023-04-19 Andrew Pinski <apinski@marvell.com>
36544 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
36546 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
36548 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
36549 (VECTOR_BOOL_MODE): Ditto.
36550 (ADJUST_NUNITS): Ditto.
36551 (ADJUST_ALIGNMENT): Ditto.
36552 (ADJUST_BYTESIZE): Ditto.
36553 (ADJUST_PRECISION): Ditto.
36554 (RVV_MODES): Ditto.
36555 (VECTOR_MODE_WITH_PREFIX): Ditto.
36556 * config/riscv/riscv-v.cc (ENTRY): Ditto.
36557 (get_vlmul): Ditto.
36558 (get_ratio): Ditto.
36559 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
36560 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
36561 (vbool64_t): Ditto.
36562 (vbool32_t): Ditto.
36563 (vbool16_t): Ditto.
36568 (vint8mf8_t): Ditto.
36569 (vuint8mf8_t): Ditto.
36570 (vint8mf4_t): Ditto.
36571 (vuint8mf4_t): Ditto.
36572 (vint8mf2_t): Ditto.
36573 (vuint8mf2_t): Ditto.
36574 (vint8m1_t): Ditto.
36575 (vuint8m1_t): Ditto.
36576 (vint8m2_t): Ditto.
36577 (vuint8m2_t): Ditto.
36578 (vint8m4_t): Ditto.
36579 (vuint8m4_t): Ditto.
36580 (vint8m8_t): Ditto.
36581 (vuint8m8_t): Ditto.
36582 (vint16mf4_t): Ditto.
36583 (vuint16mf4_t): Ditto.
36584 (vint16mf2_t): Ditto.
36585 (vuint16mf2_t): Ditto.
36586 (vint16m1_t): Ditto.
36587 (vuint16m1_t): Ditto.
36588 (vint16m2_t): Ditto.
36589 (vuint16m2_t): Ditto.
36590 (vint16m4_t): Ditto.
36591 (vuint16m4_t): Ditto.
36592 (vint16m8_t): Ditto.
36593 (vuint16m8_t): Ditto.
36594 (vint32mf2_t): Ditto.
36595 (vuint32mf2_t): Ditto.
36596 (vint32m1_t): Ditto.
36597 (vuint32m1_t): Ditto.
36598 (vint32m2_t): Ditto.
36599 (vuint32m2_t): Ditto.
36600 (vint32m4_t): Ditto.
36601 (vuint32m4_t): Ditto.
36602 (vint32m8_t): Ditto.
36603 (vuint32m8_t): Ditto.
36604 (vint64m1_t): Ditto.
36605 (vuint64m1_t): Ditto.
36606 (vint64m2_t): Ditto.
36607 (vuint64m2_t): Ditto.
36608 (vint64m4_t): Ditto.
36609 (vuint64m4_t): Ditto.
36610 (vint64m8_t): Ditto.
36611 (vuint64m8_t): Ditto.
36612 (vfloat32mf2_t): Ditto.
36613 (vfloat32m1_t): Ditto.
36614 (vfloat32m2_t): Ditto.
36615 (vfloat32m4_t): Ditto.
36616 (vfloat32m8_t): Ditto.
36617 (vfloat64m1_t): Ditto.
36618 (vfloat64m2_t): Ditto.
36619 (vfloat64m4_t): Ditto.
36620 (vfloat64m8_t): Ditto.
36621 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
36622 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
36623 (riscv_convert_vector_bits): Ditto.
36624 * config/riscv/riscv.md:
36625 * config/riscv/vector-iterators.md:
36626 * config/riscv/vector.md
36627 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
36628 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
36629 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
36630 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
36631 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
36632 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
36633 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
36634 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
36635 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
36637 2023-04-19 Pan Li <pan2.li@intel.com>
36639 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
36640 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
36642 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
36646 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
36647 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
36648 for operand 0. Use any_extract code iterator.
36649 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
36650 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
36651 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
36652 (*cmpqi_ext<mode>_1): Use general_operand predicate
36653 for operand 1. Use any_extract code iterator.
36654 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
36655 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
36657 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36659 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
36660 (aarch64_uaddw2<mode>): Delete.
36661 (aarch64_ssubw2<mode>): Delete.
36662 (aarch64_usubw2<mode>): Delete.
36663 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
36665 2023-04-19 Richard Biener <rguenther@suse.de>
36667 * tree-ssa-structalias.cc (do_ds_constraint): Use
36668 solve_add_graph_edge.
36670 2023-04-19 Richard Biener <rguenther@suse.de>
36672 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
36674 (do_sd_constraint): ... here.
36676 2023-04-19 Richard Biener <rguenther@suse.de>
36678 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
36679 rejecting the merge when A contains only a non-local label.
36681 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
36683 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
36684 (VIRTUAL_REGISTER_NUM_P): Ditto.
36685 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
36686 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
36687 * function.cc (instantiate_decl_rtl): Ditto.
36688 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
36689 (nonzero_address_p): Ditto.
36690 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
36692 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
36694 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
36696 2023-04-19 Richard Biener <rguenther@suse.de>
36698 * system.h (auto_mpz::operator->()): New.
36699 * realmpfr.h (auto_mpfr::operator->()): New.
36700 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
36701 * real.cc (real_from_string): Likewise.
36702 (dconst_e_ptr): Likewise.
36703 (dconst_sqrt2_ptr): Likewise.
36704 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
36706 (bound_difference_of_offsetted_base): Likewise.
36707 (number_of_iterations_ne): Likewise.
36708 (number_of_iterations_lt_to_ne): Likewise.
36709 * ubsan.cc: Include realmpfr.h.
36710 (ubsan_instrument_float_cast): Use auto_mpfr.
36712 2023-04-19 Richard Biener <rguenther@suse.de>
36714 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
36715 edges, remove edges from escaped after special-casing them.
36717 2023-04-19 Richard Biener <rguenther@suse.de>
36719 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
36722 2023-04-19 Richard Biener <rguenther@suse.de>
36724 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
36725 to the LHS varinfo solution member.
36727 2023-04-19 Richard Biener <rguenther@suse.de>
36729 * tree-ssa-structalias.cc (topo_visit): Look at the real
36730 destination of edges.
36732 2023-04-19 Richard Biener <rguenther@suse.de>
36734 PR tree-optimization/44794
36735 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
36736 If an epilogue loop is required set its iteration upper bound.
36738 2023-04-19 Xi Ruoyao <xry111@xry111.site>
36741 * config/loongarch/loongarch-protos.h
36742 (loongarch_expand_block_move): Add a parameter as alignment RTX.
36743 * config/loongarch/loongarch.h:
36744 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
36745 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
36746 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
36747 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
36748 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
36749 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
36750 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
36751 Take the alignment from the parameter, but set it to
36752 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
36753 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
36754 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
36755 (loongarch_block_move_straight): When there are left-over bytes,
36756 half the mode size instead of falling back to byte mode at once.
36757 (loongarch_block_move_loop): Limit the length of loop body with
36758 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
36759 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
36760 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
36761 to loongarch_expand_block_move.
36763 2023-04-19 Xi Ruoyao <xry111@xry111.site>
36765 * config/loongarch/loongarch.cc
36766 (loongarch_setup_incoming_varargs): Don't save more GARs than
36767 cfun->va_list_gpr_size / UNITS_PER_WORD.
36769 2023-04-19 Richard Biener <rguenther@suse.de>
36771 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
36772 no epilogue condition.
36774 2023-04-19 Richard Biener <rguenther@suse.de>
36776 * gimple.h (gimple_assign_load): Outline...
36777 * gimple.cc (gimple_assign_load): ... here. Avoid
36778 get_base_address and instead just strip the outermost
36779 handled component, treating a remaining handled component
36782 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36784 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
36786 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
36788 2023-04-19 Jakub Jelinek <jakub@redhat.com>
36790 PR tree-optimization/109011
36791 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
36792 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
36793 CLZ, CTZ and FFS. Remove vargs variable, use
36794 gimple_build_call_internal rather than gimple_build_call_internal_vec.
36795 (vect_vect_recog_func_ptrs): Adjust popcount entry.
36797 2023-04-19 Jakub Jelinek <jakub@redhat.com>
36800 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
36801 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
36802 a new REG rather than the SUBREG.
36804 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36806 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
36809 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36812 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
36813 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
36815 2023-04-19 Richard Biener <rguenther@suse.de>
36817 PR rtl-optimization/109237
36818 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
36819 TREE_VISITED on INSN_VAR_LOCATION_DECL.
36820 (delete_trivially_dead_insns): Maintain TREE_VISITED on
36821 active debug bind INSN_VAR_LOCATION_DECL.
36823 2023-04-19 Richard Biener <rguenther@suse.de>
36825 PR rtl-optimization/109237
36826 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
36828 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
36830 * doc/install.texi (enable-decimal-float): Add AArch64.
36832 2023-04-19 liuhongt <hongtao.liu@intel.com>
36834 PR rtl-optimization/109351
36835 * ira.cc (setup_class_subset_and_memory_move_costs): Check
36836 hard_regno_mode_ok before setting lowest memory move cost for
36837 the mode with different reg classes.
36839 2023-04-18 Jason Merrill <jason@redhat.com>
36841 * doc/invoke.texi: Remove stray @gol.
36843 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36845 * ifcvt.cc (cond_move_process_if_block): Consider the result of
36846 targetm.noce_conversion_profitable_p() when replacing the original
36847 sequence with the converted one.
36849 2023-04-18 Mark Harmstone <mark@harmstone.com>
36851 * common.opt (gcodeview): Add new option.
36852 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
36853 * opts.cc (command_handle_option): Similarly.
36854 * doc/invoke.texi: Add documentation for -gcodeview.
36856 2023-04-18 Andrew Pinski <apinski@marvell.com>
36858 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
36859 (make_pass_phiopt): Make execute out of line.
36860 (tree_ssa_cs_elim): Move code into ...
36861 (pass_cselim::execute): here.
36863 2023-04-18 Sam James <sam@gentoo.org>
36865 * system.h: Drop unused INCLUDE_PTHREAD_H.
36867 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
36869 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
36872 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
36874 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
36875 (bswapdi2, bswapsi2): Similarly.
36877 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
36880 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
36881 Use CODE_FOR_sse4_1_insertps_v4sf.
36882 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
36883 (expand_vec_perm_1): Call expand_vec_per_insertps.
36884 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
36885 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
36886 (@sse4_1_insertps_<mode>): New insn pattern.
36887 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
36888 pattern from sse4_1_insertps using VI4F_128 mode iterator.
36890 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
36892 * value-range.cc (gt_ggc_mx): New.
36894 * value-range.h (class vrange): Add GTY marker.
36895 (class frange): Same.
36896 (gt_ggc_mx): Remove.
36897 (gt_pch_nx): Remove.
36899 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
36901 * lra-constraints.cc (constraint_unique): New.
36902 (process_address_1): Apply constraint_unique test.
36903 * recog.cc (constrain_operands): Allow relaxed memory
36906 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
36908 * doc/extend.texi (Target Builtins): Add RISC-V Vector
36910 (RISC-V Vector Intrinsics): Document GCC implemented which
36911 version of RISC-V vector intrinsics and its reference.
36913 2023-04-18 Richard Biener <rguenther@suse.de>
36915 PR middle-end/108786
36916 * bitmap.h (bitmap_clear_first_set_bit): New.
36917 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
36918 bitmap_first_set_bit and add optional clearing of the bit.
36919 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
36920 (bitmap_clear_first_set_bit): Likewise.
36921 * df-core.cc (df_worklist_dataflow_doublequeue): Use
36922 bitmap_clear_first_set_bit.
36923 * graphite-scop-detection.cc (scop_detection::merge_sese):
36925 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
36926 (sanitize_asan_mark_poison): Likewise.
36927 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
36928 * tree-into-ssa.cc (rewrite_blocks): Likewise.
36929 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
36930 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
36932 2023-04-18 Richard Biener <rguenther@suse.de>
36934 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
36935 (dump_sa_points_to_info): ... this function.
36936 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
36937 and call dump_sa_stats guarded with TDF_STATS.
36938 (ipa_pta_execute): Likewise.
36939 (compute_may_aliases): Guard dump_alias_info with
36940 TDF_DETAILS|TDF_ALIAS.
36942 2023-04-18 Andrew Pinski <apinski@marvell.com>
36944 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
36945 the expression that is being tried when TDF_FOLDING
36947 (phiopt_worker::match_simplify_replacement): Dump
36948 the sequence which was created by gimple_simplify_phiopt
36949 when TDF_FOLDING is true.
36951 2023-04-18 Andrew Pinski <apinski@marvell.com>
36953 * tree-ssa-phiopt.cc (match_simplify_replacement):
36954 Simplify code that does the movement slightly.
36956 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36958 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
36960 (rev16<mode>2): Rename to...
36961 (aarch64_rev16<mode>2_alt1): ... This.
36962 (rev16<mode>2_alt): Rename to...
36963 (*aarch64_rev16<mode>2_alt2): ... This.
36965 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
36967 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
36968 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
36970 * range-op-float.cc (zero_range): Use dconstm0.
36971 (zero_to_inf_range): Same.
36972 * real.h (dconstm0): New.
36973 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
36974 (frange::set_zero): Do not declare dconstm0.
36976 2023-04-18 Richard Biener <rguenther@suse.de>
36978 * system.h (class auto_mpz): New,
36979 * realmpfr.h (class auto_mpfr): Likewise.
36980 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
36981 (do_mpfr_arg2): Likewise.
36982 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
36984 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36986 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
36987 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
36989 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
36991 * value-range.cc (frange::operator==): Adjust for NAN.
36992 (range_tests_nan): Remove some NAN tests.
36994 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
36996 * inchash.cc (hash::add_real_value): New.
36997 * inchash.h (class hash): Add add_real_value.
36998 * value-range.cc (add_vrange): New.
36999 * value-range.h (inchash::add_vrange): New.
37001 2023-04-18 Richard Biener <rguenther@suse.de>
37003 PR tree-optimization/109539
37004 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
37005 Re-implement pointer relatedness for PHIs.
37007 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
37009 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
37010 (SV_FP): New iterator.
37011 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
37012 (recip<mode>2): Unify the two patterns using SV_FP.
37013 (div_scale<mode><exec_vcc>): New insn.
37014 (div_fmas<mode><exec>): New insn.
37015 (div_fixup<mode><exec>): New insn.
37016 (div<mode>3): Unify the two expanders and rewrite using hardfp.
37017 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
37018 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
37019 and UNSPEC_DIV_FIXUP.
37020 (vccwait): New attribute.
37022 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37024 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
37025 if the argument matches that.
37027 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
37029 * config/aarch64/atomics.md
37030 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
37031 Use SD_HSDI for destination mode iterator.
37033 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
37035 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
37036 of z-extensions and s-extensions.
37037 (riscv_subset_list::parse): Likewise.
37039 2023-04-18 Jakub Jelinek <jakub@redhat.com>
37041 PR tree-optimization/109240
37042 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
37043 first vec_perm operand and minus as second using fneg/fadd and
37044 minus as first vec_perm operand and plus as second using fneg/fsub.
37046 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
37048 * data-streamer.cc (bp_pack_real_value): New.
37049 (bp_unpack_real_value): New.
37050 * data-streamer.h (bp_pack_real_value): New.
37051 (bp_unpack_real_value): New.
37052 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
37053 bp_unpack_real_value.
37054 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
37055 bp_pack_real_value.
37057 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
37059 * wide-int.h (WIDE_INT_MAX_HWIS): New.
37060 (class fixed_wide_int_storage): Use it.
37061 (trailing_wide_ints <N>::set_precision): Use it.
37062 (trailing_wide_ints <N>::extra_size): Use it.
37064 2023-04-18 Xi Ruoyao <xry111@xry111.site>
37066 * config/loongarch/loongarch-protos.h
37067 (loongarch_addu16i_imm12_operand_p): New function prototype.
37068 (loongarch_split_plus_constant): Likewise.
37069 * config/loongarch/loongarch.cc
37070 (loongarch_addu16i_imm12_operand_p): New function.
37071 (loongarch_split_plus_constant): Likewise.
37072 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
37073 (DUAL_IMM12_OPERAND): Likewise.
37074 (DUAL_ADDU16I_OPERAND): Likewise.
37075 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
37077 * config/loongarch/predicates.md (const_dual_imm12_operand): New
37079 (const_addu16i_operand): Likewise.
37080 (const_addu16i_imm12_di_operand): Likewise.
37081 (const_addu16i_imm12_si_operand): Likewise.
37082 (plus_di_operand): Likewise.
37083 (plus_si_operand): Likewise.
37084 (plus_si_extend_operand): Likewise.
37085 * config/loongarch/loongarch.md (add<mode>3): Convert to
37086 define_insn_and_split. Use plus_<mode>_operand predicate
37087 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
37088 and Le constraints.
37089 (*addsi3_extended): Convert to define_insn_and_split. Use
37090 plus_si_extend_operand instead of arith_operand. Add
37091 alternatives for La and Le alternatives.
37093 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
37095 * value-range.h (Value_Range::Value_Range): New.
37096 (Value_Range::contains_p): New.
37098 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
37100 * value-range.h (class vrange): Make m_discriminator const.
37101 (class irange): Make m_max_ranges const. Adjust constructors
37103 (class unsupported_range): Construct vrange appropriately.
37104 (class frange): Same.
37106 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
37108 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
37111 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
37113 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
37115 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
37117 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
37119 (riscv_expand_epilogue): Likewise.
37121 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
37123 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
37125 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
37127 2023-04-17 Andrew Pinski <apinski@marvell.com>
37129 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
37132 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
37134 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
37137 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
37139 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
37140 parameter remaining_size.
37141 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
37142 (riscv_expand_prologue): Likewise.
37143 (riscv_expand_epilogue): Likewise.
37145 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
37147 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
37148 roriw for constant counts.
37149 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
37150 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
37151 (simplify_context::simplify_binary_operation_1): Use it.
37152 * expmed.cc (expand_shift_1): Likewise.
37154 2023-04-17 Martin Jambor <mjambor@suse.cz>
37158 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
37159 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
37160 (ipa_zap_jf_refdesc): New function.
37161 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
37162 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
37163 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
37164 the new parameter of find_reference.
37165 (adjust_references_in_caller): Likewise. Make sure the constant jump
37166 function is not used to decrement a refdec counter again. Only
37167 decrement refdesc counters when the pass_through jump function allows
37168 it. Added a detailed dump when decrementing refdesc counters.
37169 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
37170 (ipa_set_jf_simple_pass_through): Initialize the new flag.
37171 (ipa_set_jf_unary_pass_through): Likewise.
37172 (ipa_set_jf_arith_pass_through): Likewise.
37173 (remove_described_reference): Provide a value for the new parameter of
37175 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
37176 the previous pass_through had a flag mandating that we do so.
37177 (propagate_controlled_uses): Likewise. Only decrement refdesc
37178 counters when the pass_through jump function allows it.
37179 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
37180 parameter of find_reference.
37181 (ipa_write_jump_function): Assert the new flag does not have to be
37183 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
37186 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
37187 Di Zhao <di.zhao@amperecomputing.com>
37189 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
37190 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
37191 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
37192 Check for the above tuning option when processing loads.
37194 2023-04-17 Richard Biener <rguenther@suse.de>
37196 PR tree-optimization/109524
37197 * tree-vrp.cc (remove_unreachable::m_list): Change to a
37198 vector of pairs of block indices.
37199 (remove_unreachable::maybe_register_block): Adjust.
37200 (remove_unreachable::remove_and_update_globals): Likewise.
37201 Deal with removed blocks.
37203 2023-04-16 Jeff Law <jlaw@ventanamicro>
37206 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
37207 TARGET_SFB_ALU, force the true arm into a register.
37209 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
37212 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
37213 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
37215 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
37216 (pa_function_arg_size): Change return type to int. Return zero
37217 for arguments larger than 1 GB. Update comments.
37219 2023-04-15 Jakub Jelinek <jakub@redhat.com>
37221 PR tree-optimization/109154
37222 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
37223 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
37225 2023-04-15 Jason Merrill <jason@redhat.com>
37228 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
37229 Overhaul lhs_ref.ref analysis.
37231 2023-04-14 Richard Biener <rguenther@suse.de>
37233 PR tree-optimization/109502
37234 * tree-vect-stmts.cc (vectorizable_assignment): Fix
37235 check for conversion between mask and non-mask types.
37237 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
37238 Jakub Jelinek <jakub@redhat.com>
37242 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
37243 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
37244 smaller than word_mode.
37245 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
37246 <case AND>: Likewise.
37248 2023-04-14 Jakub Jelinek <jakub@redhat.com>
37250 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
37253 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
37255 PR tree-optimization/108139
37256 PR tree-optimization/109462
37257 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
37258 equivalency check for PHI nodes.
37259 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
37260 does not dominate single-arg equivalency edges.
37262 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
37265 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
37266 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
37268 2023-04-13 Richard Biener <rguenther@suse.de>
37270 PR tree-optimization/109491
37271 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
37272 NULL operands test.
37274 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37277 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
37278 (vint16mf4_t): Ditto.
37279 (vint32mf2_t): Ditto.
37280 (vint64m1_t): Ditto.
37281 (vint64m2_t): Ditto.
37282 (vint64m4_t): Ditto.
37283 (vint64m8_t): Ditto.
37284 (vuint8mf8_t): Ditto.
37285 (vuint16mf4_t): Ditto.
37286 (vuint32mf2_t): Ditto.
37287 (vuint64m1_t): Ditto.
37288 (vuint64m2_t): Ditto.
37289 (vuint64m4_t): Ditto.
37290 (vuint64m8_t): Ditto.
37291 (vfloat32mf2_t): Ditto.
37292 (vbool64_t): Ditto.
37293 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
37294 (register_vector_type): Ditto.
37295 (check_required_extensions): Fix condition.
37296 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
37297 (RVV_REQUIRE_ELEN_64): New define.
37298 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
37299 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
37300 (TARGET_VECTOR_FP64): Ditto.
37301 (ENTRY): Fix predicate.
37302 * config/riscv/vector-iterators.md: Fix predicate.
37304 2023-04-12 Jakub Jelinek <jakub@redhat.com>
37306 PR tree-optimization/109410
37307 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
37308 block if first statement of the function is a call to returns_twice
37311 2023-04-12 Jakub Jelinek <jakub@redhat.com>
37314 * config/i386/i386.cc: Include rtl-error.h.
37315 (ix86_print_operand): For z modifier warning, use warning_for_asm
37316 if this_is_asm_operands. For Z modifier errors, use %c and code
37317 instead of hardcoded Z.
37319 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
37321 * config/i386/x-mingw32-utf8: Remove extrataneous $@
37323 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
37325 PR tree-optimization/109462
37326 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
37327 check for equivalences if NAME is a phi node.
37329 2023-04-12 Richard Biener <rguenther@suse.de>
37331 PR tree-optimization/109473
37332 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
37333 Convert scalar result to the computation type before performing
37334 the reduction adjustment.
37336 2023-04-12 Richard Biener <rguenther@suse.de>
37338 PR tree-optimization/109469
37339 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
37340 a returns-twice call.
37342 2023-04-12 Richard Biener <rguenther@suse.de>
37344 PR tree-optimization/109434
37345 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
37346 handle possibly throwing calls when processing the LHS
37347 and may-defs are not OK.
37349 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
37351 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
37352 predicate to avoid splitting arith constants.
37354 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
37355 Pan Li <pan2.li@intel.com>
37356 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37357 Kito Cheng <kito.cheng@sifive.com>
37360 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
37361 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
37362 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
37363 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
37364 (riscv_zero_call_used_regs): New.
37365 (TARGET_ZERO_CALL_USED_REGS): New.
37367 2023-04-11 Martin Liska <mliska@suse.cz>
37370 * opts.cc (finish_options): Drop also
37371 x_flag_var_tracking_assignments.
37373 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
37375 PR tree-optimization/108888
37376 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
37378 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
37381 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
37382 (vsx_sign_extend_v16qi_<mode>): ... this.
37383 (vsx_sign_extend_hi_<mode>): Rename to...
37384 (vsx_sign_extend_v8hi_<mode>): ... this.
37385 (vsx_sign_extend_si_v2di): Rename to...
37386 (vsx_sign_extend_v4si_v2di): ... this.
37387 (vsignextend_qi_<mode>): Remove.
37388 (vsignextend_hi_<mode>): Remove.
37389 (vsignextend_si_v2di): Remove.
37390 (vsignextend_v2di_v1ti): Remove.
37391 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
37392 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
37393 with gen_vsx_sign_extend_v16qi_v4si.
37394 * config/rs6000/rs6000.md (split for DI constant generation):
37395 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
37396 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
37397 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
37398 with gen_vsx_sign_extend_v16qi_si.
37399 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
37400 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
37401 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
37402 vsx_sign_extend_v16qi_v4si.
37403 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
37404 vsx_sign_extend_v8hi_v2di.
37405 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
37406 vsx_sign_extend_v8hi_v4si.
37407 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
37408 vsx_sign_extend_si_v2di.
37409 (__builtin_altivec_vsignext): Set bif-pattern to
37410 vsx_sign_extend_v2di_v1ti.
37411 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
37412 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
37413 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
37414 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
37416 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
37419 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
37420 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
37422 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
37424 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
37426 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
37428 * common/config/i386/cpuinfo.h (get_available_features):
37429 Detect AMX-COMPLEX.
37430 * common/config/i386/i386-common.cc
37431 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
37432 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
37433 (ix86_handle_option): Handle -mamx-complex.
37434 * common/config/i386/i386-cpuinfo.h (enum processor_features):
37435 Add FEATURE_AMX_COMPLEX.
37436 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
37438 * config.gcc: Add amxcomplexintrin.h.
37439 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
37440 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
37442 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
37443 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
37444 Handle amx-complex.
37445 * config/i386/i386.opt: Add option -mamx-complex.
37446 * config/i386/immintrin.h: Include amxcomplexintrin.h.
37447 * doc/extend.texi: Document amx-complex.
37448 * doc/invoke.texi: Document -mamx-complex.
37449 * doc/sourcebuild.texi: Document target amx-complex.
37450 * config/i386/amxcomplexintrin.h: New file.
37452 2023-04-08 Jakub Jelinek <jakub@redhat.com>
37454 PR tree-optimization/109392
37455 * tree-vect-generic.cc (tree_vec_extract): Handle failure
37456 of maybe_push_res_to_seq better.
37458 2023-04-08 Jakub Jelinek <jakub@redhat.com>
37460 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
37462 (SYSTEM_H): Depend on $(HASHTAB_H).
37463 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
37464 dependency on $(RTL_BASE_H), remove redundant dependency on
37467 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
37470 * config/arm/arm.cc (arm_effective_regno): New function.
37471 (mve_vector_mem_operand): Use it.
37473 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
37475 PR tree-optimization/109417
37476 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
37477 dependency is in SSA_NAME_FREE_LIST.
37479 2023-04-06 Andrew Pinski <apinski@marvell.com>
37481 PR tree-optimization/109427
37482 * params.opt (-param=vect-induction-float=):
37483 Fix option attribute typo for IntegerRange.
37485 2023-04-05 Jeff Law <jlaw@ventanamicro>
37488 * combine.cc (combine_instructions): Force re-recognition when
37489 after restoring the body of an insn to its original form.
37491 2023-04-05 Martin Jambor <mjambor@suse.cz>
37494 * ipa-sra.cc (zap_useless_ipcp_results): New function.
37495 (process_isra_node_results): Call it.
37497 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37499 * config/riscv/vector.md: Fix incorrect operand order.
37501 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37503 * config/riscv/riscv-vsetvl.cc
37504 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
37507 2023-04-05 Li Xu <xuli1@eswincomputing.com>
37509 * config/riscv/riscv-vector-builtins.def: Fix typo.
37510 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
37511 * config/riscv/vector-iterators.md: Ditto.
37513 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
37515 * doc/md.texi (Including Patterns): Fix page break.
37517 2023-04-04 Jakub Jelinek <jakub@redhat.com>
37519 PR tree-optimization/109386
37520 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
37521 foperator_le::op1_range, foperator_le::op2_range,
37522 foperator_gt::op1_range, foperator_gt::op2_range,
37523 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
37524 BRS_FALSE case even if the other op is maybe_isnan, not just
37526 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
37527 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
37528 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
37529 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
37530 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
37531 not just known_isnan.
37533 2023-04-04 Marek Polacek <polacek@redhat.com>
37535 PR sanitizer/109107
37536 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
37538 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
37540 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
37542 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
37543 (mve_vcreateq_f<mode>): Swap operands.
37545 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
37547 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
37549 2023-04-04 Jakub Jelinek <jakub@redhat.com>
37552 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
37553 Reword diagnostics about zfinx conflict with f, formatting fixes.
37555 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
37557 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
37559 2023-04-04 Richard Biener <rguenther@suse.de>
37561 PR tree-optimization/109304
37562 * tree-profile.cc (tree_profiling): Use symtab node
37563 availability to decide whether to skip adjusting calls.
37564 Do not adjust calls to internal functions.
37566 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
37569 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
37570 function for permutation control vector by considering big endianness.
37572 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
37575 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
37576 (rs6000_vprtyb<mode>2): ... this.
37577 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
37578 rs6000_vprtybv2di2.
37579 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
37580 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
37581 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
37582 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
37584 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
37585 Sandra Loosemore <sandra@codesourcery.com>
37587 * doc/md.texi (Insn Splitting): Tweak wording for readability.
37589 2023-04-03 Martin Jambor <mjambor@suse.cz>
37592 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
37593 offset + size will be representable in unsigned int.
37595 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
37597 * configure.ac (ZSTD_LIB): Move before zstd.h check.
37598 Unset gcc_cv_header_zstd_h without libzstd.
37599 * configure: Regenerate.
37601 2023-04-03 Martin Liska <mliska@suse.cz>
37603 * doc/invoke.texi: Document new param.
37605 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
37607 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
37608 new check_effective_target function.
37610 2023-04-03 Li Xu <xuli1@eswincomputing.com>
37612 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
37613 (vfloat32m8_t): Likewise
37615 2023-04-03 liuhongt <hongtao.liu@intel.com>
37617 * doc/md.texi: Document signbitm2.
37619 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37620 kito-cheng <kito.cheng@sifive.com>
37622 * config/riscv/vector.md: Fix RA constraint.
37624 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37626 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
37627 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
37628 * config/riscv/vector.md: Fix scalar move bug.
37630 2023-04-01 Jakub Jelinek <jakub@redhat.com>
37632 * range-op-float.cc (foperator_equal::fold_range): If at least
37633 one of the op ranges is not singleton and neither is NaN and all
37634 4 bounds are zero, return [1, 1].
37635 (foperator_not_equal::fold_range): In the same case return [0, 0].
37637 2023-04-01 Jakub Jelinek <jakub@redhat.com>
37639 * range-op-float.cc (foperator_equal::fold_range): Perform the
37640 non-singleton handling regardless of maybe_isnan (op1, op2).
37641 (foperator_not_equal::fold_range): Likewise.
37642 (foperator_lt::fold_range, foperator_le::fold_range,
37643 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
37644 real_* comparison check which results in range_false (type)
37645 even if maybe_isnan (op1, op2). Simplify.
37646 (foperator_ltgt): New class.
37647 (fop_ltgt): New variable.
37648 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
37651 2023-04-01 Jakub Jelinek <jakub@redhat.com>
37654 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
37655 returns VOIDmode, handle it like if the register isn't used for
37656 passing arguments at all.
37657 (apply_result_size): If targetm.calls.get_raw_result_mode returns
37658 VOIDmode, handle it like if the register isn't used for returning
37660 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
37661 means to return VOIDmode.
37662 * doc/tm.texi: Regenerated.
37663 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
37664 TARGET_SVE for P0_REGNUM.
37665 (aarch64_function_arg_regno_p): Also return true for p0-p3.
37666 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
37668 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
37670 * lra-constraints.cc: (combine_reload_insn): New function.
37672 2023-03-31 Jakub Jelinek <jakub@redhat.com>
37674 PR tree-optimization/91645
37675 * range-op-float.cc (foperator_unordered_lt::fold_range,
37676 foperator_unordered_le::fold_range,
37677 foperator_unordered_gt::fold_range,
37678 foperator_unordered_ge::fold_range,
37679 foperator_unordered_equal::fold_range): Call the ordered
37680 fold_range on ranges with cleared NaNs.
37681 * value-query.cc (range_query::get_tree_range): Handle also
37682 COMPARISON_CLASS_P trees.
37684 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
37685 Andrew Pinski <pinskia@gmail.com>
37688 * config/riscv/t-riscv: Add missing dependencies.
37690 2023-03-31 liuhongt <hongtao.liu@intel.com>
37692 * config/i386/i386.cc (inline_memory_move_cost): Return 100
37693 for MASK_REGS when MODE_SIZE > 8.
37695 2023-03-31 liuhongt <hongtao.liu@intel.com>
37698 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
37699 ufloat/ufix to floatuns/fixuns.
37700 * config/i386/i386-expand.cc
37701 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
37702 * config/i386/sse.md
37703 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
37705 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
37706 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
37708 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
37710 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
37712 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
37713 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
37714 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
37715 (ufloatv2siv2df2<mask_name>): Renamed to ..
37716 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
37717 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
37719 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
37721 (ufix_notruncv2dfv2si2): Renamed to ..
37722 (fixuns_notruncv2dfv2si2):.. this.
37723 (ufix_notruncv2dfv2si2_mask): Renamed to ..
37724 (fixuns_notruncv2dfv2si2_mask): .. this.
37725 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
37726 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
37727 (ufix_truncv2dfv2si2): Renamed to ..
37728 (*fixuns_truncv2dfv2si2): .. this.
37729 (ufix_truncv2dfv2si2_mask): Renamed to ..
37730 (fixuns_truncv2dfv2si2_mask): .. this.
37731 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
37732 (*fixuns_truncv2dfv2si2_mask_1): .. this.
37733 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
37734 (fixuns_truncv4dfv4si2<mask_name>): .. this.
37735 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
37737 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
37739 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
37740 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
37743 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
37745 PR tree-optimization/109154
37746 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
37747 * gimple-range-gori.h (may_recompute_p): Add depth param.
37748 * params.opt (ranger-recompute-depth): New param.
37750 2023-03-30 Jason Merrill <jason@redhat.com>
37754 * cgraph.h: Move reset() from cgraph_node to symtab_node.
37755 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
37756 remove_from_same_comdat_group.
37758 2023-03-30 Richard Biener <rguenther@suse.de>
37760 PR tree-optimization/107561
37761 * gimple-ssa-warn-access.cc (get_size_range): Add flags
37762 argument and pass it on.
37763 (check_access): When querying for the size range pass
37764 SR_ALLOW_ZERO when the known destination size is zero.
37766 2023-03-30 Richard Biener <rguenther@suse.de>
37768 PR tree-optimization/109342
37769 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
37770 overload for edge. When that edge is a backedge use
37771 dominated_by_p directly.
37773 2023-03-30 liuhongt <hongtao.liu@intel.com>
37775 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
37776 vpblendd instead of vpblendw for V4SI under avx2.
37778 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
37780 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
37781 for many quick operands, for register-sized modes.
37783 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
37785 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
37788 2023-03-29 Martin Liska <mliska@suse.cz>
37790 PR bootstrap/109310
37791 * configure.ac: Emit a warning for deprecated option
37792 --enable-link-mutex.
37793 * configure: Regenerate.
37795 2023-03-29 Richard Biener <rguenther@suse.de>
37797 PR tree-optimization/109331
37798 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
37799 discover a taken edge make sure to cleanup the CFG.
37801 2023-03-29 Richard Biener <rguenther@suse.de>
37803 PR tree-optimization/109327
37804 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
37805 already removed stmts when draining to_remove.
37807 2023-03-29 Richard Biener <rguenther@suse.de>
37810 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
37811 so we can re-create the DIE for the type if required.
37813 2023-03-29 Jakub Jelinek <jakub@redhat.com>
37814 Richard Biener <rguenther@suse.de>
37816 PR tree-optimization/109301
37817 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
37818 properties_provided from PROP_gimple_opt_math to 0.
37819 (pass_data_expand_powcabs): Change properties_provided from 0 to
37820 PROP_gimple_opt_math.
37822 2023-03-29 Richard Biener <rguenther@suse.de>
37824 PR tree-optimization/109154
37825 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
37826 inverted condition specially by inverting at the caller.
37827 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
37829 2023-03-28 David Malcolm <dmalcolm@redhat.com>
37832 * diagnostic-show-locus.cc (column_range::column_range): Factor
37833 out assertion conditional into...
37834 (column_range::valid_p): ...this new function.
37835 (line_corrections::add_hint): Don't attempt to consolidate hints
37836 if it would lead to invalid column_range instances.
37838 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
37841 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
37842 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
37845 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
37847 PR rtl-optimization/109187
37848 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
37849 subtraction in three-way comparison.
37851 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
37853 PR tree-optimization/109265
37854 PR tree-optimization/109274
37855 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
37856 not create a relation record is op1 and op2 are the same symbol.
37857 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
37858 handler for this stmt, but create a new record only if this statement
37859 generates a relation based on the ranges.
37860 (gori_compute::compute_operand2_range): Ditto.
37861 * value-relation.h (value_relation::set_relation): Always create the
37862 record that is requested.
37864 2023-03-28 Richard Biener <rguenther@suse.de>
37866 PR tree-optimization/107087
37867 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
37868 executable regions to avoid useless work and to better
37869 propagate degenerate PHIs.
37871 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
37873 * config/i386/x-mingw32-utf8: update comments.
37875 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
37878 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
37879 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
37881 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
37883 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
37884 after inlining. Record which decls are loaded from. Fix handling
37885 of vops for loads and stores.
37886 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
37887 (aarch64_accesses_vector_load_decl_p): Likewise.
37888 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
37890 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
37891 that loads from a decl, treat vector stores to those decls as
37893 (aarch64_vector_costs::finish_cost): ...and in that case,
37894 if the vector code does nothing more than a store, give the
37895 prologue a zero cost as well.
37897 2023-03-28 Richard Biener <rguenther@suse.de>
37900 PR tree-optimization/108129
37901 * genmatch.cc (lower_for): For (match ...) delay
37902 substituting into the match operator if possible.
37903 (dt_operand::gen_gimple_expr): For user_id look at the
37904 first substitute for determining how to access operands.
37905 (dt_operand::gen_generic_expr): Likewise.
37906 (dt_node::gen_kids): Properly sort user_ids according
37907 to their substitutes.
37908 (dt_node::gen_kids_1): Code-generate user_id matching.
37910 2023-03-28 Jakub Jelinek <jakub@redhat.com>
37911 Jonathan Wakely <jwakely@redhat.com>
37913 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
37914 Use subcommand rather than sub-command in function comments.
37916 2023-03-28 Jakub Jelinek <jakub@redhat.com>
37918 PR tree-optimization/109154
37919 * value-range.h (frange::flush_denormals_to_zero): Make it public
37920 rather than private.
37921 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
37923 * range-op-float.cc (range_operator_float::fold_range): Call
37924 flush_denormals_to_zero.
37926 2023-03-28 Jakub Jelinek <jakub@redhat.com>
37928 PR middle-end/106190
37929 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
37930 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
37932 2023-03-28 Jakub Jelinek <jakub@redhat.com>
37934 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
37935 as 4th argument to set to avoid clear_nan and union_ calls.
37937 2023-03-28 Jakub Jelinek <jakub@redhat.com>
37940 * config/i386/i386.cc (assign_386_stack_local): For DImode
37941 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
37942 align 32 rather than 0 to assign_stack_local.
37944 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
37947 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
37948 on operand #3 to get the final condition code. Use std::swap.
37949 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
37950 (fucmp<gcond:code>8<P:mode>_vis): Move around.
37951 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
37952 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
37954 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
37956 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
37957 top-level sections.
37959 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
37961 * config.host: Pull in i386/x-mingw32-utf8 Makefile
37962 fragment and reference utf8rc-mingw32.o explicitly
37964 * config/i386/sym-mingw32.cc: prevent name mangling of
37966 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
37967 depend on manifest file explicitly.
37969 2023-03-28 Richard Biener <rguenther@suse.de>
37972 2023-03-27 Richard Biener <rguenther@suse.de>
37974 PR rtl-optimization/109237
37975 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
37977 2023-03-28 Richard Biener <rguenther@suse.de>
37979 * common.opt (gdwarf): Remove Negative(gdwarf-).
37981 2023-03-28 Richard Biener <rguenther@suse.de>
37983 * common.opt (gdwarf): Add RejectNegative.
37984 (gdwarf-): Likewise.
37988 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
37990 * config/cris/constraints.md ("T"): Correct to
37991 define_memory_constraint.
37993 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
37995 * config/cris/cris.md (BW2): New mode-iterator.
37996 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
37999 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
38001 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
38002 for possible eliminable compares.
38004 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
38006 * config/cris/constraints.md ("R"): Remove unused constraint.
38008 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
38010 PR gcov-profile/109297
38011 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
38012 (merge_stream_usage): Likewise.
38013 (overlap_usage): Likewise.
38015 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
38018 * config/riscv/thead.md: Add missing mode specifiers.
38020 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
38021 Jiangning Liu <jiangning.liu@amperecomputing.com>
38022 Manolis Tsamis <manolis.tsamis@vrull.eu>
38024 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
38026 2023-03-27 Richard Biener <rguenther@suse.de>
38028 PR rtl-optimization/109237
38029 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
38031 2023-03-27 Richard Biener <rguenther@suse.de>
38034 * lto-wrapper.cc (run_gcc): Parse alternate debug options
38035 as well, they always enable debug.
38037 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
38040 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
38042 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
38044 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
38047 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
38048 than zero when calling vec_sld.
38049 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
38050 zero when calling vec_sld.
38051 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
38052 than zero when calling vec_sld.
38054 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
38056 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
38057 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
38058 loops are represented and which fields are vectors. Add
38059 documentation for OMP_FOR_PRE_BODY field. Document internal
38060 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
38061 * tree.def (OMP_FOR): Make documentation consistent with the
38062 Texinfo manual, to fill some gaps and correct errors.
38064 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
38067 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
38068 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
38069 (handle_move_double): Call it before handle_movsi.
38070 * config/m68k/m68k-protos.h: Declare it.
38072 2023-03-26 Jakub Jelinek <jakub@redhat.com>
38074 PR tree-optimization/109230
38075 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
38077 2023-03-26 Jakub Jelinek <jakub@redhat.com>
38080 * predict.cc (compute_function_frequency): Don't call
38081 warn_function_cold if function already has cold attribute.
38083 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
38085 * doc/install.texi: Remove anachronistic note
38086 related to languages built and separate source tarballs.
38088 2023-03-25 David Malcolm <dmalcolm@redhat.com>
38091 * diagnostic-format-sarif.cc (read_until_eof): Delete.
38092 (maybe_read_file): Delete.
38093 (sarif_builder::maybe_make_artifact_content_object): Use
38094 get_source_file_content rather than maybe_read_file.
38095 Reject it if it's not valid UTF-8.
38096 * input.cc (file_cache_slot::get_full_file_content): New.
38097 (get_source_file_content): New.
38098 (selftest::check_cpp_valid_utf8_p): New.
38099 (selftest::test_cpp_valid_utf8_p): New.
38100 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
38101 * input.h (get_source_file_content): New prototype.
38103 2023-03-24 David Malcolm <dmalcolm@redhat.com>
38105 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
38107 (Special Functions for Debugging the Analyzer): Convert to a
38108 table, and rewrite in places.
38109 (Other Debugging Techniques): Add notes on how to compare two
38110 different exploded graphs.
38112 2023-03-24 David Malcolm <dmalcolm@redhat.com>
38115 * json.cc: Update comments to indicate that we now preserve
38116 insertion order of keys within objects.
38117 (object::print): Traverse keys in insertion order.
38118 (object::set): Preserve insertion order of keys.
38119 (selftest::test_writing_objects): Add an additional key to verify
38120 that we preserve insertion order.
38121 * json.h (object::m_keys): New field.
38123 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
38125 PR tree-optimization/109238
38126 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
38127 predecessors which this block dominates.
38129 2023-03-24 Richard Biener <rguenther@suse.de>
38131 PR tree-optimization/106912
38132 * tree-profile.cc (tree_profiling): Update stmts only when
38133 profiling or testing coverage. Make sure to update calls
38134 fntype, stripping 'const' there.
38136 2023-03-24 Jakub Jelinek <jakub@redhat.com>
38138 PR middle-end/109258
38139 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
38140 if target == const0_rtx.
38142 2023-03-24 Alexandre Oliva <oliva@adacore.com>
38144 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
38145 Document options and effective targets.
38147 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
38149 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
38152 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
38154 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
38155 non-earlyclobber alternative.
38157 2023-03-23 Andrew Pinski <apinski@marvell.com>
38160 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
38163 2023-03-23 Richard Biener <rguenther@suse.de>
38165 PR tree-optimization/107569
38166 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
38167 Do not push SSA names with zero uses as available leader.
38168 (process_bb): Likewise.
38170 2023-03-23 Richard Biener <rguenther@suse.de>
38172 PR tree-optimization/109262
38173 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
38174 combining a piecewise complex load avoid touching loads
38175 that throw internally. Use fun, not cfun throughout.
38177 2023-03-23 Jakub Jelinek <jakub@redhat.com>
38179 * value-range.cc (irange::irange_union, irange::intersect): Fix
38180 comment spelling bugs.
38181 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
38182 * gimple-range-trace.h: Likewise.
38183 * gimple-range-edge.cc: Likewise.
38184 (gimple_outgoing_range_stmt_p,
38185 gimple_outgoing_range::switch_edge_range,
38186 gimple_outgoing_range::edge_range_p): Likewise.
38187 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
38188 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
38189 assume_query::assume_query, assume_query::calculate_phi): Likewise.
38190 * gimple-range-edge.h: Likewise.
38191 * value-range.h (Value_Range::set, Value_Range::lower_bound,
38192 Value_Range::upper_bound, frange::set_undefined): Likewise.
38193 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
38194 gori_compute): Likewise.
38195 * gimple-range-fold.h (fold_using_range): Likewise.
38196 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
38198 * gimple-range-gori.cc (range_def_chain::in_chain_p,
38199 range_def_chain::dump, gori_map::calculate_gori,
38200 gori_compute::compute_operand_range_switch,
38201 gori_compute::logical_combine, gori_compute::refine_using_relation,
38202 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
38204 * gimple-range.h: Likewise.
38205 (enable_ranger): Likewise.
38206 * range-op.h (empty_range_varying): Likewise.
38207 * value-query.h (value_query): Likewise.
38208 * gimple-range-cache.cc (block_range_cache::set_bb_range,
38209 block_range_cache::dump, ssa_global_cache::clear_global_range,
38210 temporal_cache::temporal_value, temporal_cache::current_p,
38211 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
38212 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
38214 * gimple-range-fold.cc (fur_edge::get_phi_operand,
38215 fur_stmt::get_operand, gimple_range_adjustment,
38216 fold_using_range::range_of_phi,
38217 fold_using_range::relation_fold_and_or): Likewise.
38218 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
38219 * value-query.cc (range_query::value_of_expr,
38220 range_query::value_on_edge, range_query::query_relation): Likewise.
38221 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
38222 intersect_range_with_nonzero_bits): Likewise.
38223 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
38224 exit_range): Likewise.
38225 * value-relation.h: Likewise.
38226 (equiv_oracle, relation_trio::relation_trio, value_relation,
38227 value_relation::value_relation, pe_min): Likewise.
38228 * range-op-float.cc (range_operator_float::rv_fold,
38229 frange_arithmetic, foperator_unordered_equal::op1_range,
38230 foperator_div::rv_fold): Likewise.
38231 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
38232 * value-relation.cc (equiv_oracle::query_relation,
38233 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
38234 value_relation::apply_transitive, relation_chain_head::find_relation,
38235 dom_oracle::query_relation, dom_oracle::find_relation_block,
38236 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
38237 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
38238 create_possibly_reversed_range, adjust_op1_for_overflow,
38239 operator_mult::wi_fold, operator_exact_divide::op1_range,
38240 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
38241 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
38242 range_op_lshift_tests): Likewise.
38244 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
38246 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
38247 (move_callee_saved_registers): Detect the bug condition early.
38249 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
38251 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
38252 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
38254 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
38255 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
38256 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
38257 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
38258 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
38260 2023-03-23 Jakub Jelinek <jakub@redhat.com>
38262 PR tree-optimization/109176
38263 * tree-vect-generic.cc (expand_vector_condition): If a has
38264 vector boolean type and is a comparison, also check if both
38265 the comparison and VEC_COND_EXPR could be successfully expanded
38268 2023-03-23 Pan Li <pan2.li@intel.com>
38269 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38273 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
38274 for vector mask modes.
38275 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
38276 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
38278 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
38280 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
38282 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38285 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
38286 (emit_vlmax_op): Ditto.
38287 * config/riscv/riscv-v.cc (get_sew): New function.
38288 (emit_vlmax_vsetvl): Adapt function.
38289 (emit_pred_op): Ditto.
38290 (emit_vlmax_op): Ditto.
38291 (emit_nonvlmax_op): Ditto.
38292 (legitimize_move): Fix LRA ICE.
38293 (gen_no_side_effects_vsetvl_rtx): Adapt function.
38294 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
38295 (@mov<VB:mode><P:mode>_lra): Ditto.
38296 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
38297 (*mov<VB:mode><P:mode>_lra): Ditto.
38299 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38302 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
38303 __riscv_vlenb support.
38305 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38306 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
38307 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
38309 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38310 * config/riscv/riscv-vector-builtins.cc: Ditto.
38312 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38313 kito-cheng <kito.cheng@sifive.com>
38315 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
38316 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
38317 (pass_vsetvl::need_vsetvl): Fix bugs.
38318 (pass_vsetvl::backward_demand_fusion): Fix bugs.
38319 (pass_vsetvl::demand_fusion): Fix bugs.
38320 (eliminate_insn): Fix bugs.
38321 (insert_vsetvl): Ditto.
38322 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
38323 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
38324 * config/riscv/vector.md: Ditto.
38326 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38327 kito-cheng <kito.cheng@sifive.com>
38329 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
38330 * config/riscv/vector-iterators.md (nmsac): Ditto.
38336 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
38337 (@pred_mul_plus<mode>): Ditto.
38338 (*pred_madd<mode>): Ditto.
38339 (*pred_macc<mode>): Ditto.
38340 (*pred_mul_plus<mode>): Ditto.
38341 (@pred_mul_plus<mode>_scalar): Ditto.
38342 (*pred_madd<mode>_scalar): Ditto.
38343 (*pred_macc<mode>_scalar): Ditto.
38344 (*pred_mul_plus<mode>_scalar): Ditto.
38345 (*pred_madd<mode>_extended_scalar): Ditto.
38346 (*pred_macc<mode>_extended_scalar): Ditto.
38347 (*pred_mul_plus<mode>_extended_scalar): Ditto.
38348 (@pred_minus_mul<mode>): Ditto.
38349 (*pred_<madd_nmsub><mode>): Ditto.
38350 (*pred_nmsub<mode>): Ditto.
38351 (*pred_<macc_nmsac><mode>): Ditto.
38352 (*pred_nmsac<mode>): Ditto.
38353 (*pred_mul_<optab><mode>): Ditto.
38354 (*pred_minus_mul<mode>): Ditto.
38355 (@pred_mul_<optab><mode>_scalar): Ditto.
38356 (@pred_minus_mul<mode>_scalar): Ditto.
38357 (*pred_<madd_nmsub><mode>_scalar): Ditto.
38358 (*pred_nmsub<mode>_scalar): Ditto.
38359 (*pred_<macc_nmsac><mode>_scalar): Ditto.
38360 (*pred_nmsac<mode>_scalar): Ditto.
38361 (*pred_mul_<optab><mode>_scalar): Ditto.
38362 (*pred_minus_mul<mode>_scalar): Ditto.
38363 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
38364 (*pred_nmsub<mode>_extended_scalar): Ditto.
38365 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
38366 (*pred_nmsac<mode>_extended_scalar): Ditto.
38367 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
38368 (*pred_minus_mul<mode>_extended_scalar): Ditto.
38369 (*pred_<madd_msub><mode>): Ditto.
38370 (*pred_<macc_msac><mode>): Ditto.
38371 (*pred_<madd_msub><mode>_scalar): Ditto.
38372 (*pred_<macc_msac><mode>_scalar): Ditto.
38373 (@pred_neg_mul_<optab><mode>): Ditto.
38374 (@pred_mul_neg_<optab><mode>): Ditto.
38375 (*pred_<nmadd_msub><mode>): Ditto.
38376 (*pred_<nmsub_nmadd><mode>): Ditto.
38377 (*pred_<nmacc_msac><mode>): Ditto.
38378 (*pred_<nmsac_nmacc><mode>): Ditto.
38379 (*pred_neg_mul_<optab><mode>): Ditto.
38380 (*pred_mul_neg_<optab><mode>): Ditto.
38381 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
38382 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
38383 (*pred_<nmadd_msub><mode>_scalar): Ditto.
38384 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
38385 (*pred_<nmacc_msac><mode>_scalar): Ditto.
38386 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
38387 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
38388 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
38389 (@pred_widen_neg_mul_<optab><mode>): Ditto.
38390 (@pred_widen_mul_neg_<optab><mode>): Ditto.
38391 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
38392 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
38394 2023-03-23 liuhongt <hongtao.liu@intel.com>
38396 * builtins.cc (builtin_memset_read_str): Replace
38397 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
38398 (builtin_memset_gen_str): Ditto.
38399 * config/i386/i386-expand.cc
38400 (ix86_convert_const_wide_int_to_broadcast): Replace
38401 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
38402 (ix86_expand_vector_move): Ditto.
38403 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
38405 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
38406 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
38407 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
38408 * doc/tm.texi.in: Ditto.
38409 * target.def: Ditto.
38411 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
38413 * lra.cc (lra): Do not repeat inheritance and live range splitting
38414 when asm error is found.
38416 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
38418 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
38419 (gcn_expand_dpp_distribute_even_insn)
38420 (gcn_expand_dpp_distribute_odd_insn): Declare.
38421 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
38422 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
38423 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
38424 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
38425 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
38426 (fms<mode>4_negop2): New patterns.
38427 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
38428 (gcn_expand_dpp_distribute_even_insn)
38429 (gcn_expand_dpp_distribute_odd_insn): New functions.
38430 * config/gcn/gcn.md: Add entries to unspec enum.
38432 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
38434 PR tree-optimization/109008
38435 * value-range.cc (frange::set): Add nan_state argument.
38436 * value-range.h (class nan_state): New.
38437 (frange::get_nan_state): New.
38439 2023-03-22 Martin Liska <mliska@suse.cz>
38441 * configure: Regenerate.
38443 2023-03-21 Joseph Myers <joseph@codesourcery.com>
38445 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
38448 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
38450 PR tree-optimization/109192
38451 * gimple-range-gori.cc (gori_compute::compute_operand_range):
38452 Terminate gori calculations if a relation is not relevant.
38453 * value-relation.h (value_relation::set_relation): Allow
38454 equality between op1 and op2 if they are the same.
38456 2023-03-21 Richard Biener <rguenther@suse.de>
38458 PR tree-optimization/109219
38459 * tree-vect-loop.cc (vectorizable_reduction): Check
38460 slp_node, not STMT_SLP_TYPE.
38461 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
38462 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
38463 Remove assertion on STMT_SLP_TYPE.
38465 2023-03-21 Jakub Jelinek <jakub@redhat.com>
38467 PR tree-optimization/109215
38468 * tree.h (enum special_array_member): Adjust comments for int_0
38470 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
38471 has zero sized element type and the array has variable number of
38472 elements or constant one or more elements.
38473 (component_ref_size): Adjust comments, formatting fix.
38475 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38477 * configure.ac: Add check for the Texinfo 6.8
38478 CONTENTS_OUTPUT_LOCATION customization variable and set it if
38480 * configure: Regenerate.
38481 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
38482 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
38483 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
38484 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
38486 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38488 * doc/extend.texi: Associate use_hazard_barrier_return index
38489 entry with its attribute.
38490 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
38493 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38495 * doc/implement-c.texi: Remove usage of @gol.
38496 * doc/invoke.texi: Ditto.
38497 * doc/sourcebuild.texi: Ditto.
38498 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
38499 texinfo.tex versions, the bug it was working around appears to
38502 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38504 * doc/include/texinfo.tex: Update to 2023-01-17.19.
38506 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38508 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
38509 @enddefbuiltin for defining built-in functions.
38510 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
38511 places where it should be used.
38513 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38515 * doc/extend.texi (Formatted Output Function Checking): New
38516 subsection for grouping together printf et al.
38517 (Exception handling) Fix missing @ sign before copyright
38518 header, which lead to the copyright line leaking into
38519 '(gcc)Exception handling'.
38520 * doc/gcc.texi: Set document language to en_US.
38521 (@copying): Wrap front cover texts in quotations, move in manual
38524 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
38526 * doc/gcc.texi: Add the Indices appendix, to make texinfo
38527 generate nice indices overview page.
38529 2023-03-21 Richard Biener <rguenther@suse.de>
38531 PR tree-optimization/109170
38532 * gimple-range-op.cc (cfn_pass_through_arg1): New.
38533 (gimple_range_op_handler::maybe_builtin_call): Handle
38534 __builtin_expect via cfn_pass_through_arg1.
38536 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
38539 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
38540 (init_float128_ieee): Delete code to switch complex multiply and divide
38542 (complex_multiply_builtin_code): New helper function.
38543 (complex_divide_builtin_code): Likewise.
38544 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
38545 of complex 128-bit multiply and divide built-in functions.
38547 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
38550 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
38552 2023-03-19 Jonny Grant <jg@jguk.org>
38554 * doc/extend.texi (Common Function Attributes) <nonnull>:
38557 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
38559 PR rtl-optimization/109179
38560 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
38561 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
38563 2023-03-17 Jakub Jelinek <jakub@redhat.com>
38566 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
38568 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
38569 to allocate_struct_function instead of false.
38570 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
38571 nor DECL_RESULT here. Pass true as ABSTRACT_P to
38572 push_struct_function. Call targetm.target_option.relayout_function
38574 (tree_function_versioning): Formatting fix.
38576 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
38578 * lra-constraints.cc: Include hooks.h.
38579 (combine_reload_insn): New function.
38580 (lra_constraints): Call it.
38582 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38583 kito-cheng <kito.cheng@sifive.com>
38585 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
38586 as legitimate value.
38587 * config/riscv/riscv-vector-builtins.cc
38588 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
38589 (function_expander::use_widen_ternop_insn): Ditto.
38590 * config/riscv/vector.md (@vundefined<mode>): New pattern.
38591 (pred_mul_<optab><mode>_undef_merge): Remove.
38592 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
38593 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
38594 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
38595 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
38597 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38600 * config/riscv/riscv.md: Fix subreg bug.
38602 2023-03-17 Jakub Jelinek <jakub@redhat.com>
38604 PR middle-end/108685
38605 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
38606 use its loop_father rather than BODY_BB's loop_father.
38607 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
38608 If broken_loop with ordered > collapse and at least one of those
38609 extra loops aren't guaranteed to have at least one iteration, change
38610 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
38611 loop_father to l0_bb's loop_father rather than l1_bb's.
38613 2023-03-17 Jakub Jelinek <jakub@redhat.com>
38616 * gdbhooks.py (TreePrinter.to_string): Wrap
38617 gdb.parse_and_eval('tree_code_type') in a try block, parse
38618 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
38619 raises exception. Update comments for the recent tree_code_type
38622 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
38624 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
38625 issues. Add more line breaks to example so it doesn't overflow
38628 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
38630 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
38631 line breaks in examples.
38632 <malloc>: Fix bad line breaks in running text, also copy-edit
38634 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
38635 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
38637 (C++ Dialect Options) <-fcontracts>: Add line break in example.
38638 <-Wctad-maybe-unsupported>: Likewise.
38639 <-Winvalid-constexpr>: Likewise.
38640 (Warning Options) <-Wdangling-pointer>: Likewise.
38641 <-Winterference-size>: Likewise.
38642 <-Wvla-parameter>: Likewise.
38643 (Static Analyzer Options): Fix bad line breaks in running text,
38644 plus add some missing markup.
38645 (Optimize Options) <openacc-privatization>: Fix more bad line
38646 breaks in running text.
38648 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
38650 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
38651 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
38652 (expand_vec_perm_2perm_pblendv): Ditto.
38654 2023-03-16 Martin Liska <mliska@suse.cz>
38656 PR middle-end/106133
38657 * gcc.cc (driver_handle_option): Use x_main_input_basename
38658 if x_dump_base_name is null.
38659 * opts.cc (common_handle_option): Likewise.
38661 2023-03-16 Richard Biener <rguenther@suse.de>
38663 PR tree-optimization/109123
38664 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
38665 Do not emit -Wuse-after-free late.
38666 (pass_waccess::check_call): Always check call pointer uses.
38668 2023-03-16 Richard Biener <rguenther@suse.de>
38670 PR tree-optimization/109141
38671 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
38672 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
38674 (renumber_gimple_stmt_uids): ... here and
38675 (renumber_gimple_stmt_uids_in_blocks): ... here.
38676 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
38677 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
38679 (pass_waccess::check_pointer_uses): Process all PHIs.
38681 2023-03-15 David Malcolm <dmalcolm@redhat.com>
38684 * diagnostic-format-sarif.cc (class sarif_invocation): New.
38685 (class sarif_ice_notification): New.
38686 (sarif_builder::m_invocation_obj): New field.
38687 (sarif_invocation::add_notification_for_ice): New.
38688 (sarif_invocation::prepare_to_flush): New.
38689 (sarif_ice_notification::sarif_ice_notification): New.
38690 (sarif_builder::sarif_builder): Add m_invocation_obj.
38691 (sarif_builder::end_diagnostic): Special-case DK_ICE and
38693 (sarif_builder::flush_to_file): Call prepare_to_flush on
38694 m_invocation_obj. Pass the latter to make_top_level_object.
38695 (sarif_builder::make_result_object): Move creation of "locations"
38697 (sarif_builder::make_locations_arr): ...this new function.
38698 (sarif_builder::make_top_level_object): Add "invocation_obj" param
38699 and pass it to make_run_object.
38700 (sarif_builder::make_run_object): Add "invocation_obj" param and
38702 (sarif_ice_handler): New callback.
38703 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
38704 * diagnostic.cc (diagnostic_initialize): Initialize new field
38706 (diagnostic_action_after_output): If it is set, make one attempt
38707 to call ice_handler_cb.
38708 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
38710 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
38712 * config/i386/i386-expand.cc (expand_vec_perm_blend):
38713 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
38714 and fix V2HImode handling.
38715 (expand_vec_perm_1): Try to emit BLEND instruction
38716 before MOVSS/MOVSD.
38717 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
38719 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
38721 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
38723 2023-03-15 Richard Biener <rguenther@suse.de>
38725 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
38726 Do not diagnose clobbers.
38728 2023-03-15 Richard Biener <rguenther@suse.de>
38730 PR tree-optimization/109139
38731 * tree-ssa-live.cc (remove_unused_locals): Look at the
38732 base address for unused decls on the LHS of .DEFERRED_INIT.
38734 2023-03-15 Xi Ruoyao <xry111@xry111.site>
38737 * builtins.cc (inline_string_cmp): Force the character
38738 difference into "result" pseudo-register, instead of reassign
38739 the pseudo-register.
38741 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38743 * config.gcc: Add thead.o to RISC-V extra_objs.
38744 * config/riscv/peephole.md: Add mempair peephole passes.
38745 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
38747 (th_mempair_operands_p): Likewise.
38748 (th_mempair_order_operands): Likewise.
38749 (th_mempair_prepare_save_restore_operands): Likewise.
38750 (th_mempair_save_restore_regs): Likewise.
38751 (th_mempair_output_move): Likewise.
38752 * config/riscv/riscv.cc (riscv_save_reg): Move code.
38753 (riscv_restore_reg): Move code.
38754 (riscv_for_each_saved_reg): Add code to emit mempair insns.
38755 * config/riscv/t-riscv: Add thead.cc.
38756 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
38758 (*th_mempair_store_<GPR:mode>2): Likewise.
38759 (*th_mempair_load_extendsidi2): Likewise.
38760 (*th_mempair_load_zero_extendsidi2): Likewise.
38761 * config/riscv/thead.cc: New file.
38763 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38765 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
38766 New constraint "th_f_fmv".
38767 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
38769 * config/riscv/riscv.cc (riscv_split_doubleword_move):
38770 Add split code for XTheadFmv.
38771 (riscv_secondary_memory_needed): XTheadFmv does not need
38773 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
38774 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
38775 movdf_hardfloat_rv32.
38776 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
38777 (th_fmv_x_w): New INSN.
38778 (th_fmv_x_hw): New INSN.
38780 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38782 * config/riscv/riscv.md (maddhisi4): New expand.
38783 (msubhisi4): New expand.
38784 * config/riscv/thead.md (*th_mula<mode>): New pattern.
38785 (*th_mulawsi): New pattern.
38786 (*th_mulawsi2): New pattern.
38787 (*th_maddhisi4): New pattern.
38788 (*th_sextw_maddhisi4): New pattern.
38789 (*th_muls<mode>): New pattern.
38790 (*th_mulswsi): New pattern.
38791 (*th_mulswsi2): New pattern.
38792 (*th_msubhisi4): New pattern.
38793 (*th_sextw_msubhisi4): New pattern.
38795 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38797 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
38798 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
38800 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
38802 (riscv_expand_conditional_move): New function.
38803 (riscv_expand_conditional_move_onesided): New function.
38804 * config/riscv/riscv.md: Add support for XTheadCondMov.
38805 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
38806 support for XTheadCondMov.
38807 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
38809 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38811 * config/riscv/bitmanip.md (clzdi2): New expand.
38812 (clzsi2): New expand.
38813 (ctz<mode>2): New expand.
38814 (popcount<mode>2): New expand.
38815 (<bitmanip_optab>si2): Rename INSN.
38816 (*<bitmanip_optab>si2): Hide INSN name.
38817 (<bitmanip_optab>di2): Rename INSN.
38818 (*<bitmanip_optab>di2): Hide INSN name.
38819 (rotrsi3): Remove INSN.
38820 (rotr<mode>3): Add expand.
38821 (*rotrsi3): New INSN.
38822 (rotrdi3): Rename INSN.
38823 (*rotrdi3): Hide INSN name.
38824 (rotrsi3_sext): Rename INSN.
38825 (*rotrsi3_sext): Hide INSN name.
38826 (bswap<mode>2): Remove INSN.
38827 (bswapdi2): Add expand.
38828 (bswapsi2): Add expand.
38829 (*bswap<mode>2): Hide INSN name.
38830 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
38832 * config/riscv/riscv.md (extv<mode>): New expand.
38833 (extzv<mode>): New expand.
38834 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
38835 (*th_ext<mode>): New INSN.
38836 (*th_extu<mode>): New INSN.
38837 (*th_clz<mode>2): New INSN.
38838 (*th_rev<mode>2): New INSN.
38840 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38842 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
38843 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
38845 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38847 * config/riscv/riscv.md: Include thead.md
38848 * config/riscv/thead.md: New file.
38850 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38852 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
38854 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
38856 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
38857 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
38858 (MASK_XTHEADBB): New.
38859 (MASK_XTHEADBS): New.
38860 (MASK_XTHEADCMO): New.
38861 (MASK_XTHEADCONDMOV): New.
38862 (MASK_XTHEADFMEMIDX): New.
38863 (MASK_XTHEADFMV): New.
38864 (MASK_XTHEADINT): New.
38865 (MASK_XTHEADMAC): New.
38866 (MASK_XTHEADMEMIDX): New.
38867 (MASK_XTHEADMEMPAIR): New.
38868 (MASK_XTHEADSYNC): New.
38869 (TARGET_XTHEADBA): New.
38870 (TARGET_XTHEADBB): New.
38871 (TARGET_XTHEADBS): New.
38872 (TARGET_XTHEADCMO): New.
38873 (TARGET_XTHEADCONDMOV): New.
38874 (TARGET_XTHEADFMEMIDX): New.
38875 (TARGET_XTHEADFMV): New.
38876 (TARGET_XTHEADINT): New.
38877 (TARGET_XTHEADMAC): New.
38878 (TARGET_XTHEADMEMIDX): New.
38879 (TARGET_XTHEADMEMPAIR): new.
38880 (TARGET_XTHEADSYNC): New.
38881 * config/riscv/riscv.opt: Add riscv_xthead_subext.
38883 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
38886 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
38887 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
38888 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
38890 2023-03-14 Jakub Jelinek <jakub@redhat.com>
38893 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
38894 when lo is equal to dhi and hi is a MEM which uses dlo register.
38896 2023-03-14 Martin Jambor <mjambor@suse.cz>
38899 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
38900 global0 instead of zeroing when it does not have as many counts as
38903 2023-03-14 Martin Jambor <mjambor@suse.cz>
38906 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
38907 ipa count, remove assert, lenient_count_portion_handling, dump
38908 also orig_node_count.
38910 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
38912 * config/i386/i386-expand.cc (expand_vec_perm_movs):
38913 Handle V2SImode for TARGET_MMX_WITH_SSE.
38914 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
38915 using V2FI mode iterator to handle both V2SI and V2SF modes.
38917 2023-03-14 Sam James <sam@gentoo.org>
38919 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
38920 including <sstream> earlier.
38921 * system.h: Add INCLUDE_SSTREAM.
38923 2023-03-14 Richard Biener <rguenther@suse.de>
38925 * tree-ssa-live.cc (remove_unused_locals): Do not treat
38926 the .DEFERRED_INIT of a variable as use, instead remove
38927 that if it is the only use.
38929 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
38931 PR rtl-optimization/107762
38932 * expr.cc (emit_group_store): Revert latest change.
38934 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
38936 PR tree-optimization/109005
38937 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
38938 aggregate type check.
38940 2023-03-14 Jakub Jelinek <jakub@redhat.com>
38942 PR tree-optimization/109115
38943 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
38944 r.upper_bound () on r.undefined_p () range.
38946 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
38948 PR tree-optimization/106896
38949 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
38950 implementatoin with probability_in; avoid some asserts.
38952 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
38954 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
38956 2023-03-13 Sean Bright <sean@seanbright.com>
38958 * doc/invoke.texi (Warning Options): Remove errant 'See'
38961 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
38963 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
38964 REG_OK_FOR_BASE_P): Remove.
38966 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38968 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
38969 (=vd,vd,vr,vr): Ditto.
38970 * config/riscv/vector.md: Ditto.
38972 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38974 * config/riscv/riscv-vector-builtins.cc
38975 (function_expander::use_compare_insn): Add operand predicate check.
38977 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38979 * config/riscv/vector.md: Fine tune RA constraints.
38981 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
38983 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
38984 hsaco assemble/link.
38986 2023-03-13 Richard Biener <rguenther@suse.de>
38988 PR tree-optimization/109046
38989 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
38990 piecewise complex loads.
38992 2023-03-12 Jakub Jelinek <jakub@redhat.com>
38994 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
38995 (aarch64_bf16_ptr_type_node): Adjust comment.
38996 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
38997 bfloat16_type_node rather than aarch64_bf16_type_node.
38998 (aarch64_libgcc_floating_mode_supported_p,
38999 aarch64_scalar_mode_supported_p): Also support BFmode.
39000 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
39001 (aarch64_invalid_binary_op): Remove BFmode related rejections.
39002 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
39003 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
39004 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
39005 aarch64_bf16_type_node.
39006 (aarch64_init_simd_builtin_types): Likewise.
39007 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
39008 which is created in tree.cc already.
39009 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
39011 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
39013 PR middle-end/109031
39014 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
39015 ensure that the type of x is as wide or wider than the type of a.
39017 2023-03-12 Tamar Christina <tamar.christina@arm.com>
39020 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
39021 (*bitmask_shift_plus<mode>): New.
39022 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
39023 (@aarch64_bitmask_udiv<mode>3): Remove.
39024 * config/aarch64/aarch64.cc
39025 (aarch64_vectorize_can_special_div_by_constant,
39026 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
39027 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
39028 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
39030 2023-03-12 Tamar Christina <tamar.christina@arm.com>
39033 * target.def (preferred_div_as_shifts_over_mult): New.
39034 * doc/tm.texi.in: Document it.
39035 * doc/tm.texi: Regenerate.
39036 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
39037 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
39038 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
39040 2023-03-12 Tamar Christina <tamar.christina@arm.com>
39041 Richard Sandiford <richard.sandiford@arm.com>
39044 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
39047 2023-03-12 Tamar Christina <tamar.christina@arm.com>
39048 Andrew MacLeod <amacleod@redhat.com>
39051 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
39052 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
39054 (gimple_range_op_handler::maybe_non_standard): New.
39055 * range-op.cc (class operator_widen_plus_signed,
39056 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
39057 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
39058 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
39059 operator_widen_mult_unsigned::wi_fold,
39060 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
39061 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
39062 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
39063 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
39065 2023-03-12 Tamar Christina <tamar.christina@arm.com>
39068 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
39069 * doc/tm.texi.in: Likewise.
39070 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
39071 * expmed.cc (expand_divmod): Likewise.
39072 * expmed.h (expand_divmod): Likewise.
39073 * expr.cc (force_operand, expand_expr_divmod): Likewise.
39074 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
39075 * target.def (can_special_div_by_const): Remove.
39076 * target.h: Remove tree-core.h include
39077 * targhooks.cc (default_can_special_div_by_const): Remove.
39078 * targhooks.h (default_can_special_div_by_const): Remove.
39079 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
39080 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
39081 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
39083 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
39085 * doc/install.texi2html: Fix issue number typo in comment.
39087 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
39089 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
39092 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
39094 * doc/invoke.texi (Optimize Options): Add markup to
39095 description of asan-kernel-mem-intrinsic-prefix, and clarify
39098 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
39100 * doc/extend.texi (Named Address Spaces): Drop a redundant link
39103 2023-03-11 Jeff Law <jlaw@ventanamicro>
39106 * doc/extend.texi: Clarify Attribute Syntax a bit.
39108 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
39110 * doc/install.texi (Prerequisites): Suggest using newer versions
39112 (Final install): Clean up and modernize discussion of how to
39113 build or obtain the GCC manuals.
39114 * doc/install.texi2html: Update comment to point to the PR instead
39115 of "makeinfo 4.7 brokenness" (it's not specific to that version).
39117 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39120 * optabs.cc (expand_fix): For conversions from BFmode to integral,
39121 use shifts to convert it to SFmode first and then convert SFmode
39124 2023-03-10 Andrew Pinski <apinski@marvell.com>
39126 * config/aarch64/aarch64.md: Add a new define_split
39129 2023-03-10 Richard Biener <rguenther@suse.de>
39131 * tree-ssa-structalias.cc (solve_graph): Immediately
39132 iterate self-cycles.
39134 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39136 PR tree-optimization/109008
39137 * range-op-float.cc (float_widen_lhs_range): If not
39138 -frounding-math and not IBM double double format, extend lhs
39139 range just by 0.5ulp rather than 1ulp in each direction.
39141 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39144 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
39146 * config/i386/t-cygwin-w64: Remove.
39148 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39151 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
39152 C++14, don't declare as extern const arrays.
39153 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
39154 static constexpr member arrays for C++11 or C++14.
39155 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
39156 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
39157 (TREE_CODE_LENGTH): For C++11 or C++14 use
39158 tree_code_length_tmpl <0>::tree_code_length instead of
39160 * tree.cc (tree_code_type, tree_code_length): Remove.
39162 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39165 * common.opt (fcanon-prefix-map): New option.
39166 * opts.cc: Include file-prefix-map.h.
39167 (flag_canon_prefix_map): New variable.
39168 (common_handle_option): Handle OPT_fcanon_prefix_map.
39169 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
39170 * file-prefix-map.h (flag_canon_prefix_map): Declare.
39171 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
39173 (add_prefix_map): Initialize canonicalize member from
39174 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
39175 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
39176 use lrealpath result only for map->canonicalize map entries.
39177 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
39178 * opts-global.cc (handle_common_deferred_options): Clear
39179 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
39180 * doc/invoke.texi (-fcanon-prefix-map): Document.
39181 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
39182 see also for -fcanon-prefix-map.
39183 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
39185 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39188 * cgraphunit.cc (check_global_declaration): Don't warn for unused
39189 variables which have OPT_Wunused_variable warning suppressed.
39191 2023-03-10 Jakub Jelinek <jakub@redhat.com>
39193 PR tree-optimization/109008
39194 * range-op-float.cc (float_widen_lhs_range): If lb is
39195 minimum representable finite number or ub is maximum
39196 representable finite number, instead of widening it to
39197 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
39198 Temporarily clear flag_finite_math_only when canonicalizing
39201 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39203 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
39204 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
39205 (gimple_fold_builtin): Ditto.
39206 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
39207 (class vleff): Ditto.
39209 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39210 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
39212 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
39213 (struct fault_load_def): Ditto.
39215 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
39216 * config/riscv/riscv-vector-builtins.cc
39217 (rvv_arg_type_info::get_tree_type): Add size_ptr.
39218 (gimple_folder::gimple_folder): New class.
39219 (gimple_folder::fold): Ditto.
39220 (gimple_fold_builtin): New function.
39221 (get_read_vl_instance): Ditto.
39222 (get_read_vl_decl): Ditto.
39223 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
39224 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
39225 (get_read_vl_instance): New function.
39226 (get_read_vl_decl): Ditto.
39227 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
39228 (read_vl_insn_p): Ditto.
39229 (available_occurrence_p): Ditto.
39230 (backward_propagate_worthwhile_p): Ditto.
39231 (gen_vsetvl_pat): Adapt for vleff support.
39232 (get_forward_read_vl_insn): New function.
39233 (get_backward_fault_first_load_insn): Ditto.
39234 (source_equal_p): Adapt for vleff support.
39235 (first_ratio_invalid_for_second_sew_p): Remove.
39236 (first_ratio_invalid_for_second_lmul_p): Ditto.
39237 (first_lmul_less_than_second_lmul_p): Ditto.
39238 (first_ratio_less_than_second_ratio_p): Ditto.
39239 (support_relaxed_compatible_p): New function.
39240 (vector_insn_info::operator>): Remove.
39241 (vector_insn_info::operator>=): Refine.
39242 (vector_insn_info::parse_insn): Adapt for vleff support.
39243 (vector_insn_info::compatible_p): Ditto.
39244 (vector_insn_info::update_fault_first_load_avl): New function.
39245 (pass_vsetvl::transfer_after): Adapt for vleff support.
39246 (pass_vsetvl::demand_fusion): Ditto.
39247 (pass_vsetvl::cleanup_insns): Ditto.
39248 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
39249 redundant condtions.
39250 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
39251 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
39252 * config/riscv/riscv.md: Adapt for vleff support.
39253 * config/riscv/t-riscv: Ditto.
39254 * config/riscv/vector-iterators.md: New iterator.
39255 * config/riscv/vector.md (read_vlsi): New pattern.
39256 (read_vldi_zero_extend): Ditto.
39257 (@pred_fault_load<mode>): Ditto.
39259 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39261 * config/riscv/riscv-vector-builtins.cc
39262 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
39263 (function_expander::use_widen_ternop_insn): Ditto.
39264 * optabs.cc (maybe_gen_insn): Extend nops handling.
39266 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39268 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
39269 patterns according to RVV ISA.
39270 * config/riscv/vector-iterators.md: New iterators.
39271 * config/riscv/vector.md
39272 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
39273 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
39274 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
39275 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
39276 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
39277 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
39278 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
39279 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
39280 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
39281 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
39282 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
39283 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
39284 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39285 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39287 2023-03-10 Michael Collison <collison@rivosinc.com>
39289 * tree-vect-loop-manip.cc (vect_do_peeling): Use
39290 result of constant_lower_bound instead of vf for the lower
39291 bound of the epilog loop trip count.
39293 2023-03-09 Tamar Christina <tamar.christina@arm.com>
39295 * passes.cc (emergency_dump_function): Finish graph generation.
39297 2023-03-09 Tamar Christina <tamar.christina@arm.com>
39299 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
39300 and bottom bit only.
39302 2023-03-09 Andrew Pinski <apinski@marvell.com>
39304 PR tree-optimization/108980
39305 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
39306 Reorgnize the call to warning for not strict flexible arrays
39307 to be before the check of warned.
39309 2023-03-09 Jason Merrill <jason@redhat.com>
39311 * doc/extend.texi: Comment out __is_deducible docs.
39313 2023-03-09 Jason Merrill <jason@redhat.com>
39316 * doc/extend.texi (Type Traits):: Document __is_deducible.
39318 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
39321 * config.host: add object for x86_64-*-mingw*.
39322 * config/i386/sym-mingw32.cc: dummy file to attach
39324 * config/i386/utf8-mingw32.rc: windres resource file.
39325 * config/i386/winnt-utf8.manifest: XML manifest to
39327 * config/i386/x-mingw32: reference to x-mingw32-utf8.
39328 * config/i386/x-mingw32-utf8: Makefile fragment to
39329 embed UTF-8 manifest.
39331 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
39333 * lra-constraints.cc (process_alt_operands): Use operand modes for
39334 clobbered regs instead of the biggest access mode.
39336 2023-03-09 Richard Biener <rguenther@suse.de>
39338 PR middle-end/108995
39339 * fold-const.cc (extract_muldiv_1): Avoid folding
39340 (CST * b) / CST2 when sanitizing overflow and we rely on
39341 overflow being undefined.
39343 2023-03-09 Jakub Jelinek <jakub@redhat.com>
39344 Richard Biener <rguenther@suse.de>
39346 PR tree-optimization/109008
39347 * range-op-float.cc (float_widen_lhs_range): New function.
39348 (foperator_plus::op1_range, foperator_minus::op1_range,
39349 foperator_minus::op2_range, foperator_mult::op1_range,
39350 foperator_div::op1_range, foperator_div::op2_range): Use it.
39352 2023-03-07 Jonathan Grant <jg@jguk.org>
39355 * doc/invoke.texi (Instrumentation Options): Clarify
39356 LeakSanitizer behavior.
39358 2023-03-07 Benson Muite <benson_muite@emailplus.org>
39360 * doc/install.texi (Prerequisites): Add link to gmplib.org.
39362 2023-03-07 Pan Li <pan2.li@intel.com>
39363 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39367 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
39369 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
39370 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
39371 * genmodes.cc (adj_precision): New.
39372 (ADJUST_PRECISION): New.
39373 (emit_mode_adjustments): Handle ADJUST_PRECISION.
39375 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
39377 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
39379 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
39381 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
39382 {s|u}{max|min} in QI, HI and DI modes.
39383 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
39384 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
39385 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
39386 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
39389 2023-03-06 Richard Biener <rguenther@suse.de>
39391 PR tree-optimization/109025
39392 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
39393 the inner LC PHI use is the inner loop PHI latch definition
39394 before classifying an outer PHI as double reduction.
39396 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
39399 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
39401 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
39402 (X86_TUNE_USE_SCATTER): Likewise.
39404 2023-03-06 Xi Ruoyao <xry111@xry111.site>
39407 * config/loongarch/loongarch.h (FP_RETURN): Use
39408 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
39409 (UNITS_PER_FP_ARG): Likewise.
39411 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39413 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
39414 (pass_vsetvl::backward_demand_fusion): Ditto.
39416 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
39417 SiYu Wu <siyu@isrc.iscas.ac.cn>
39419 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
39421 (riscv_sm3p1_<mode>): New.
39422 (riscv_sm4ed_<mode>): New.
39423 (riscv_sm4ks_<mode>): New.
39424 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
39425 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
39426 ZKSH's built-in functions.
39428 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
39429 SiYu Wu <siyu@isrc.iscas.ac.cn>
39431 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
39432 (riscv_sha256sig1_<mode>): New.
39433 (riscv_sha256sum0_<mode>): New.
39434 (riscv_sha256sum1_<mode>): New.
39435 (riscv_sha512sig0h): New.
39436 (riscv_sha512sig0l): New.
39437 (riscv_sha512sig1h): New.
39438 (riscv_sha512sig1l): New.
39439 (riscv_sha512sum0r): New.
39440 (riscv_sha512sum1r): New.
39441 (riscv_sha512sig0): New.
39442 (riscv_sha512sig1): New.
39443 (riscv_sha512sum0): New.
39444 (riscv_sha512sum1): New.
39445 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
39446 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
39447 built-in functions.
39448 (DIRECT_BUILTIN): Add new.
39450 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
39451 SiYu Wu <siyu@isrc.iscas.ac.cn>
39453 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
39455 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
39456 (riscv_aes32dsmi): New.
39457 (riscv_aes64ds): New.
39458 (riscv_aes64dsm): New.
39459 (riscv_aes64im): New.
39460 (riscv_aes64ks1i): New.
39461 (riscv_aes64ks2): New.
39462 (riscv_aes32esi): New.
39463 (riscv_aes32esmi): New.
39464 (riscv_aes64es): New.
39465 (riscv_aes64esm): New.
39466 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
39467 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
39468 ZKNE's built-in functions.
39470 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
39471 SiYu Wu <siyu@isrc.iscas.ac.cn>
39473 * config/riscv/bitmanip.md: Add ZBKB's instructions.
39474 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
39475 * config/riscv/riscv.md: Add new type for crypto instructions.
39476 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
39478 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
39479 extension's built-in function file.
39481 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
39482 SiYu Wu <siyu@isrc.iscas.ac.cn>
39484 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
39485 (RISCV_FTYPE_NAME3): New.
39486 (RISCV_ATYPE_QI): New.
39487 (RISCV_ATYPE_HI): New.
39488 (RISCV_FTYPE_ATYPES2): New.
39489 (RISCV_FTYPE_ATYPES3): New.
39490 * config/riscv/riscv-ftypes.def (2): New.
39493 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
39495 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
39498 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39499 kito-cheng <kito.cheng@sifive.com>
39501 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
39502 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
39503 (riscv_register_pragmas): Add builtin function check call.
39504 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
39505 (check_builtin_call): New function.
39506 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
39507 (class vreinterpret): Ditto.
39508 (class vlmul_ext): Ditto.
39509 (class vlmul_trunc): Ditto.
39510 (class vset): Ditto.
39511 (class vget): Ditto.
39513 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39514 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
39530 (vundefined): Add new intrinsic.
39531 (vreinterpret): Ditto.
39532 (vlmul_ext): Ditto.
39533 (vlmul_trunc): Ditto.
39536 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
39537 (struct narrow_alu_def): Ditto.
39538 (struct reduc_alu_def): Ditto.
39539 (struct vundefined_def): Ditto.
39540 (struct misc_def): Ditto.
39541 (struct vset_def): Ditto.
39542 (struct vget_def): Ditto.
39544 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
39545 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
39546 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
39547 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
39548 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
39549 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
39550 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
39551 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
39552 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
39553 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
39554 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
39555 (DEF_RVV_LMUL1_OPS): Ditto.
39556 (DEF_RVV_LMUL2_OPS): Ditto.
39557 (DEF_RVV_LMUL4_OPS): Ditto.
39558 (vint16mf4_t): Ditto.
39559 (vint16mf2_t): Ditto.
39560 (vint16m1_t): Ditto.
39561 (vint16m2_t): Ditto.
39562 (vint16m4_t): Ditto.
39563 (vint16m8_t): Ditto.
39564 (vint32mf2_t): Ditto.
39565 (vint32m1_t): Ditto.
39566 (vint32m2_t): Ditto.
39567 (vint32m4_t): Ditto.
39568 (vint32m8_t): Ditto.
39569 (vint64m1_t): Ditto.
39570 (vint64m2_t): Ditto.
39571 (vint64m4_t): Ditto.
39572 (vint64m8_t): Ditto.
39573 (vuint16mf4_t): Ditto.
39574 (vuint16mf2_t): Ditto.
39575 (vuint16m1_t): Ditto.
39576 (vuint16m2_t): Ditto.
39577 (vuint16m4_t): Ditto.
39578 (vuint16m8_t): Ditto.
39579 (vuint32mf2_t): Ditto.
39580 (vuint32m1_t): Ditto.
39581 (vuint32m2_t): Ditto.
39582 (vuint32m4_t): Ditto.
39583 (vuint32m8_t): Ditto.
39584 (vuint64m1_t): Ditto.
39585 (vuint64m2_t): Ditto.
39586 (vuint64m4_t): Ditto.
39587 (vuint64m8_t): Ditto.
39588 (vint8mf4_t): Ditto.
39589 (vint8mf2_t): Ditto.
39590 (vint8m1_t): Ditto.
39591 (vint8m2_t): Ditto.
39592 (vint8m4_t): Ditto.
39593 (vint8m8_t): Ditto.
39594 (vuint8mf4_t): Ditto.
39595 (vuint8mf2_t): Ditto.
39596 (vuint8m1_t): Ditto.
39597 (vuint8m2_t): Ditto.
39598 (vuint8m4_t): Ditto.
39599 (vuint8m8_t): Ditto.
39600 (vint8mf8_t): Ditto.
39601 (vuint8mf8_t): Ditto.
39602 (vfloat32mf2_t): Ditto.
39603 (vfloat32m1_t): Ditto.
39604 (vfloat32m2_t): Ditto.
39605 (vfloat32m4_t): Ditto.
39606 (vfloat64m1_t): Ditto.
39607 (vfloat64m2_t): Ditto.
39608 (vfloat64m4_t): Ditto.
39609 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
39610 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
39611 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
39612 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
39613 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
39614 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
39615 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
39616 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
39617 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
39618 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
39619 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
39620 (DEF_RVV_LMUL1_OPS): Ditto.
39621 (DEF_RVV_LMUL2_OPS): Ditto.
39622 (DEF_RVV_LMUL4_OPS): Ditto.
39623 (DEF_RVV_TYPE_INDEX): Ditto.
39624 (required_extensions_p): Adapt for new intrinsic support/
39625 (get_required_extensions): New function.
39626 (check_required_extensions): Ditto.
39627 (unsigned_base_type_p): Remove.
39628 (rvv_arg_type_info::get_scalar_ptr_type): New function.
39629 (get_mode_for_bitsize): Remove.
39630 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
39631 (rvv_arg_type_info::get_base_vector_type): Ditto.
39632 (rvv_arg_type_info::get_function_type_index): Ditto.
39633 (DEF_RVV_BASE_TYPE): New def.
39634 (function_builder::apply_predication): New class.
39635 (function_expander::mask_mode): Ditto.
39636 (function_checker::function_checker): Ditto.
39637 (function_checker::report_non_ice): Ditto.
39638 (function_checker::report_out_of_range): Ditto.
39639 (function_checker::require_immediate): Ditto.
39640 (function_checker::require_immediate_range): Ditto.
39641 (function_checker::check): Ditto.
39642 (check_builtin_call): Ditto.
39643 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
39644 (DEF_RVV_BASE_TYPE): Ditto.
39645 (DEF_RVV_TYPE_INDEX): Ditto.
39646 (vbool64_t): Ditto.
39647 (vbool32_t): Ditto.
39648 (vbool16_t): Ditto.
39653 (vuint8mf8_t): Ditto.
39654 (vuint8mf4_t): Ditto.
39655 (vuint8mf2_t): Ditto.
39656 (vuint8m1_t): Ditto.
39657 (vuint8m2_t): Ditto.
39658 (vint8m4_t): Ditto.
39659 (vuint8m4_t): Ditto.
39660 (vint8m8_t): Ditto.
39661 (vuint8m8_t): Ditto.
39662 (vint16mf4_t): Ditto.
39663 (vuint16mf2_t): Ditto.
39664 (vuint16m1_t): Ditto.
39665 (vuint16m2_t): Ditto.
39666 (vuint16m4_t): Ditto.
39667 (vuint16m8_t): Ditto.
39668 (vint32mf2_t): Ditto.
39669 (vuint32m1_t): Ditto.
39670 (vuint32m2_t): Ditto.
39671 (vuint32m4_t): Ditto.
39672 (vuint32m8_t): Ditto.
39673 (vuint64m1_t): Ditto.
39674 (vuint64m2_t): Ditto.
39675 (vuint64m4_t): Ditto.
39676 (vuint64m8_t): Ditto.
39677 (vfloat32mf2_t): Ditto.
39678 (vfloat32m1_t): Ditto.
39679 (vfloat32m2_t): Ditto.
39680 (vfloat32m4_t): Ditto.
39681 (vfloat32m8_t): Ditto.
39682 (vfloat64m1_t): Ditto.
39683 (vfloat64m4_t): Ditto.
39684 (vector): Move it def.
39687 (signed_vector): Ditto.
39688 (unsigned_vector): Ditto.
39689 (unsigned_scalar): Ditto.
39690 (vector_ptr): Ditto.
39691 (scalar_ptr): Ditto.
39692 (scalar_const_ptr): Ditto.
39696 (unsigned_long): Ditto.
39698 (eew8_index): Ditto.
39699 (eew16_index): Ditto.
39700 (eew32_index): Ditto.
39701 (eew64_index): Ditto.
39702 (shift_vector): Ditto.
39703 (double_trunc_vector): Ditto.
39704 (quad_trunc_vector): Ditto.
39705 (oct_trunc_vector): Ditto.
39706 (double_trunc_scalar): Ditto.
39707 (double_trunc_signed_vector): Ditto.
39708 (double_trunc_unsigned_vector): Ditto.
39709 (double_trunc_unsigned_scalar): Ditto.
39710 (double_trunc_float_vector): Ditto.
39711 (float_vector): Ditto.
39712 (lmul1_vector): Ditto.
39713 (widen_lmul1_vector): Ditto.
39714 (eew8_interpret): Ditto.
39715 (eew16_interpret): Ditto.
39716 (eew32_interpret): Ditto.
39717 (eew64_interpret): Ditto.
39718 (vlmul_ext_x2): Ditto.
39719 (vlmul_ext_x4): Ditto.
39720 (vlmul_ext_x8): Ditto.
39721 (vlmul_ext_x16): Ditto.
39722 (vlmul_ext_x32): Ditto.
39723 (vlmul_ext_x64): Ditto.
39724 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
39725 (struct function_type_info): New function.
39726 (struct rvv_arg_type_info): Ditto.
39727 (class function_checker): New class.
39728 (rvv_arg_type_info::get_scalar_type): New function.
39729 (rvv_arg_type_info::get_vector_type): Ditto.
39730 (function_expander::ret_mode): New function.
39731 (function_checker::arg_mode): Ditto.
39732 (function_checker::ret_mode): Ditto.
39733 * config/riscv/t-riscv: Add generator.
39734 * config/riscv/vector-iterators.md: New iterators.
39735 * config/riscv/vector.md (vundefined<mode>): New pattern.
39736 (@vundefined<mode>): Ditto.
39737 (@vreinterpret<mode>): Ditto.
39738 (@vlmul_extx2<mode>): Ditto.
39739 (@vlmul_extx4<mode>): Ditto.
39740 (@vlmul_extx8<mode>): Ditto.
39741 (@vlmul_extx16<mode>): Ditto.
39742 (@vlmul_extx32<mode>): Ditto.
39743 (@vlmul_extx64<mode>): Ditto.
39744 (*vlmul_extx2<mode>): Ditto.
39745 (*vlmul_extx4<mode>): Ditto.
39746 (*vlmul_extx8<mode>): Ditto.
39747 (*vlmul_extx16<mode>): Ditto.
39748 (*vlmul_extx32<mode>): Ditto.
39749 (*vlmul_extx64<mode>): Ditto.
39750 * config/riscv/genrvv-type-indexer.cc: New file.
39752 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39754 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
39755 (slide1_sew64_helper): New function.
39756 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
39757 (get_unknown_min_value): Ditto.
39758 (force_vector_length_operand): Ditto.
39759 (gen_no_side_effects_vsetvl_rtx): Ditto.
39760 (get_vl_x2_rtx): Ditto.
39761 (slide1_sew64_helper): Ditto.
39762 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
39763 (class vrgather): Ditto.
39764 (class vrgatherei16): Ditto.
39765 (class vcompress): Ditto.
39767 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39768 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
39769 (vslidedown): Ditto.
39770 (vslide1up): Ditto.
39771 (vslide1down): Ditto.
39772 (vfslide1up): Ditto.
39773 (vfslide1down): Ditto.
39775 (vrgatherei16): Ditto.
39776 (vcompress): Ditto.
39777 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
39778 (vint8mf8_t): Ditto.
39779 (vint8mf4_t): Ditto.
39780 (vint8mf2_t): Ditto.
39781 (vint8m1_t): Ditto.
39782 (vint8m2_t): Ditto.
39783 (vint8m4_t): Ditto.
39784 (vint16mf4_t): Ditto.
39785 (vint16mf2_t): Ditto.
39786 (vint16m1_t): Ditto.
39787 (vint16m2_t): Ditto.
39788 (vint16m4_t): Ditto.
39789 (vint16m8_t): Ditto.
39790 (vint32mf2_t): Ditto.
39791 (vint32m1_t): Ditto.
39792 (vint32m2_t): Ditto.
39793 (vint32m4_t): Ditto.
39794 (vint32m8_t): Ditto.
39795 (vint64m1_t): Ditto.
39796 (vint64m2_t): Ditto.
39797 (vint64m4_t): Ditto.
39798 (vint64m8_t): Ditto.
39799 (vuint8mf8_t): Ditto.
39800 (vuint8mf4_t): Ditto.
39801 (vuint8mf2_t): Ditto.
39802 (vuint8m1_t): Ditto.
39803 (vuint8m2_t): Ditto.
39804 (vuint8m4_t): Ditto.
39805 (vuint16mf4_t): Ditto.
39806 (vuint16mf2_t): Ditto.
39807 (vuint16m1_t): Ditto.
39808 (vuint16m2_t): Ditto.
39809 (vuint16m4_t): Ditto.
39810 (vuint16m8_t): Ditto.
39811 (vuint32mf2_t): Ditto.
39812 (vuint32m1_t): Ditto.
39813 (vuint32m2_t): Ditto.
39814 (vuint32m4_t): Ditto.
39815 (vuint32m8_t): Ditto.
39816 (vuint64m1_t): Ditto.
39817 (vuint64m2_t): Ditto.
39818 (vuint64m4_t): Ditto.
39819 (vuint64m8_t): Ditto.
39820 (vfloat32mf2_t): Ditto.
39821 (vfloat32m1_t): Ditto.
39822 (vfloat32m2_t): Ditto.
39823 (vfloat32m4_t): Ditto.
39824 (vfloat32m8_t): Ditto.
39825 (vfloat64m1_t): Ditto.
39826 (vfloat64m2_t): Ditto.
39827 (vfloat64m4_t): Ditto.
39828 (vfloat64m8_t): Ditto.
39829 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
39830 * config/riscv/riscv.md: Adjust RVV instruction types.
39831 * config/riscv/vector-iterators.md (down): New iterator.
39832 (=vd,vr): New attribute.
39833 (UNSPEC_VSLIDE1UP): New unspec.
39834 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
39835 (*pred_slide<ud><mode>): Ditto.
39836 (*pred_slide<ud><mode>_extended): Ditto.
39837 (@pred_gather<mode>): Ditto.
39838 (@pred_gather<mode>_scalar): Ditto.
39839 (@pred_gatherei16<mode>): Ditto.
39840 (@pred_compress<mode>): Ditto.
39842 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39844 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
39846 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39848 * config/riscv/constraints.md (Wb1): New constraint.
39849 * config/riscv/predicates.md
39850 (vector_least_significant_set_mask_operand): New predicate.
39851 (vector_broadcast_mask_operand): Ditto.
39852 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
39853 (gen_scalar_move_mask): New function.
39854 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
39855 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
39856 (class vmv_s): Ditto.
39858 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39859 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
39863 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
39865 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
39866 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
39867 (function_expander::use_exact_insn): New function.
39868 (function_expander::use_contiguous_load_insn): New function.
39869 (function_expander::use_contiguous_store_insn): New function.
39870 (function_expander::use_ternop_insn): New function.
39871 (function_expander::use_widen_ternop_insn): New function.
39872 (function_expander::use_scalar_move_insn): New function.
39873 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
39874 * config/riscv/riscv-vector-builtins.h
39875 (function_expander::add_scalar_move_mask_operand): New class.
39876 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
39877 (scalar_move_insn_p): Ditto.
39878 (has_vsetvl_killed_avl_p): Ditto.
39879 (anticipatable_occurrence_p): Ditto.
39880 (insert_vsetvl): Ditto.
39881 (get_vl_vtype_info): Ditto.
39882 (calculate_sew): Ditto.
39883 (calculate_vlmul): Ditto.
39884 (incompatible_avl_p): Ditto.
39885 (different_sew_p): Ditto.
39886 (different_lmul_p): Ditto.
39887 (different_ratio_p): Ditto.
39888 (different_tail_policy_p): Ditto.
39889 (different_mask_policy_p): Ditto.
39890 (possible_zero_avl_p): Ditto.
39891 (first_ratio_invalid_for_second_sew_p): Ditto.
39892 (first_ratio_invalid_for_second_lmul_p): Ditto.
39893 (second_ratio_invalid_for_first_sew_p): Ditto.
39894 (second_ratio_invalid_for_first_lmul_p): Ditto.
39895 (second_sew_less_than_first_sew_p): Ditto.
39896 (first_sew_less_than_second_sew_p): Ditto.
39897 (compare_lmul): Ditto.
39898 (second_lmul_less_than_first_lmul_p): Ditto.
39899 (first_lmul_less_than_second_lmul_p): Ditto.
39900 (first_ratio_less_than_second_ratio_p): Ditto.
39901 (second_ratio_less_than_first_ratio_p): Ditto.
39902 (DEF_INCOMPATIBLE_COND): Ditto.
39903 (greatest_sew): Ditto.
39904 (first_sew): Ditto.
39905 (second_sew): Ditto.
39906 (first_vlmul): Ditto.
39907 (second_vlmul): Ditto.
39908 (first_ratio): Ditto.
39909 (second_ratio): Ditto.
39910 (vlmul_for_first_sew_second_ratio): Ditto.
39911 (ratio_for_second_sew_first_vlmul): Ditto.
39912 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
39913 (always_unavailable): Ditto.
39914 (avl_unavailable_p): Ditto.
39915 (sew_unavailable_p): Ditto.
39916 (lmul_unavailable_p): Ditto.
39917 (ge_sew_unavailable_p): Ditto.
39918 (ge_sew_lmul_unavailable_p): Ditto.
39919 (ge_sew_ratio_unavailable_p): Ditto.
39920 (DEF_UNAVAILABLE_COND): Ditto.
39921 (same_sew_lmul_demand_p): Ditto.
39922 (propagate_avl_across_demands_p): Ditto.
39923 (reg_available_p): Ditto.
39924 (avl_info::has_non_zero_avl): Ditto.
39925 (vl_vtype_info::has_non_zero_avl): Ditto.
39926 (vector_insn_info::operator>=): Refactor.
39927 (vector_insn_info::parse_insn): Adjust for scalar move.
39928 (vector_insn_info::demand_vl_vtype): Remove.
39929 (vector_insn_info::compatible_p): New function.
39930 (vector_insn_info::compatible_avl_p): Ditto.
39931 (vector_insn_info::compatible_vtype_p): Ditto.
39932 (vector_insn_info::available_p): Ditto.
39933 (vector_insn_info::merge): Ditto.
39934 (vector_insn_info::fuse_avl): Ditto.
39935 (vector_insn_info::fuse_sew_lmul): Ditto.
39936 (vector_insn_info::fuse_tail_policy): Ditto.
39937 (vector_insn_info::fuse_mask_policy): Ditto.
39938 (vector_insn_info::dump): Ditto.
39939 (vector_infos_manager::release): Ditto.
39940 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
39941 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
39942 (pass_vsetvl::hard_empty_block_p): Ditto.
39943 (pass_vsetvl::backward_demand_fusion): Ditto.
39944 (pass_vsetvl::forward_demand_fusion): Ditto.
39945 (pass_vsetvl::refine_vsetvls): Ditto.
39946 (pass_vsetvl::cleanup_vsetvls): Ditto.
39947 (pass_vsetvl::commit_vsetvls): Ditto.
39948 (pass_vsetvl::propagate_avl): Ditto.
39949 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
39950 (struct demands_pair): Ditto.
39951 (struct demands_cond): Ditto.
39952 (struct demands_fuse_rule): Ditto.
39953 * config/riscv/vector-iterators.md: New iterator.
39954 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
39955 (*pred_broadcast<mode>): Ditto.
39956 (*pred_broadcast<mode>_extended_scalar): Ditto.
39957 (@pred_extract_first<mode>): Ditto.
39958 (*pred_extract_first<mode>): Ditto.
39959 (@pred_extract_first_trunc<mode>): Ditto.
39960 * config/riscv/riscv-vsetvl.def: New file.
39962 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
39964 * config/riscv/bitmanip.md: allow 0 constant in max/min
39967 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
39969 * config/riscv/bitmanip.md: Fix wrong index in the check.
39971 2023-03-04 Jakub Jelinek <jakub@redhat.com>
39973 PR middle-end/109006
39974 * vec.cc (test_auto_alias): Adjust comment for removal of
39976 * read-rtl-function.cc (function_reader::parse_block): Likewise.
39977 * gdbhooks.py: Likewise.
39979 2023-03-04 Jakub Jelinek <jakub@redhat.com>
39981 PR testsuite/108973
39982 * selftest-diagnostic.cc
39983 (test_diagnostic_context::test_diagnostic_context): Set
39984 caret_max_width to 80.
39986 2023-03-03 Alexandre Oliva <oliva@adacore.com>
39988 * gimple-ssa-warn-access.cc
39989 (pass_waccess::check_dangling_stores): Skip non-stores.
39991 2023-03-03 Alexandre Oliva <oliva@adacore.com>
39993 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
39994 after vmsr and vmrs, and lower the case of P0.
39996 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
39998 PR middle-end/109006
39999 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
40001 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
40003 PR middle-end/109006
40004 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
40006 2023-03-03 Jakub Jelinek <jakub@redhat.com>
40009 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
40010 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
40011 suppressed on stmt. For [static %E] warning, print access_nelts
40012 rather than access_size. Fix up comment wording.
40014 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
40016 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
40017 arch14 instead of z16.
40019 2023-03-03 Anthony Green <green@moxielogic.com>
40021 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
40023 2023-03-03 Anthony Green <green@moxielogic.com>
40025 * config/moxie/constraints.md (A, B, W): Change
40026 define_constraint to define_memory_constraint.
40028 2023-03-03 Xi Ruoyao <xry111@xry111.site>
40030 * toplev.cc (process_options): Fix the spelling of
40031 "-fstack-clash-protection".
40033 2023-03-03 Richard Biener <rguenther@suse.de>
40035 PR tree-optimization/109002
40036 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
40037 PHI-translate ANTIC_IN.
40039 2023-03-03 Jakub Jelinek <jakub@redhat.com>
40041 PR tree-optimization/108988
40042 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
40043 size_type_node before passing it as argument to fwrite. Formatting
40046 2023-03-03 Richard Biener <rguenther@suse.de>
40049 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
40050 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
40051 * config/i386/i386-features.h (scalar_chain::max_visits): New.
40052 (scalar_chain::build): Add bitmap parameter, return boolean.
40053 (scalar_chain::add_insn): Likewise.
40054 (scalar_chain::analyze_register_chain): Likewise.
40055 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
40056 Initialize max_visits.
40057 (scalar_chain::analyze_register_chain): When we exhaust
40058 max_visits, abort. Also abort when running into any
40060 (scalar_chain::add_insn): Propagate abort.
40061 (scalar_chain::build): Likewise. When aborting amend
40062 the set of disallowed insn with the insns set.
40063 (convert_scalars_to_vector): Adjust. Do not convert aborted
40066 2023-03-03 Richard Biener <rguenther@suse.de>
40069 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
40070 generate a DIE for a function scope static.
40072 2023-03-03 Alexandre Oliva <oliva@adacore.com>
40074 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
40076 2023-03-02 Jakub Jelinek <jakub@redhat.com>
40079 * target.h (emit_support_tinfos_callback): New typedef.
40080 * targhooks.h (default_emit_support_tinfos): Declare.
40081 * targhooks.cc (default_emit_support_tinfos): New function.
40082 * target.def (emit_support_tinfos): New target hook.
40083 * doc/tm.texi.in (emit_support_tinfos): Document it.
40084 * doc/tm.texi: Regenerated.
40085 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
40086 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
40088 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
40090 * ira-costs.cc: Include print-rtl.h.
40091 (record_reg_classes, scan_one_insn): Add code to print debug info.
40092 (record_operand_costs): Find and use smaller cost for hard reg
40095 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
40096 Paul-Antoine Arras <pa@codesourcery.com>
40098 * builtins.cc (mathfn_built_in_explicit): New.
40099 * config/gcn/gcn.cc: Include case-cfn-macros.h.
40100 (mathfn_built_in_explicit): Add prototype.
40101 (gcn_vectorize_builtin_vectorized_function): New.
40102 (gcn_libc_has_function): New.
40103 (TARGET_LIBC_HAS_FUNCTION): Define.
40104 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
40106 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
40108 PR tree-optimization/108979
40109 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
40110 operations on invariants.
40112 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
40114 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
40115 * config/s390/s390.cc (s390_option_override_internal): Make
40116 partial vector usage the default from z13 on.
40117 * config/s390/vector.md (len_load_v16qi): Add.
40118 (len_store_v16qi): Add.
40120 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
40122 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
40123 of constant 0 offset.
40125 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
40127 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
40129 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
40131 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
40133 * config.gcc: add -with-{no-}msa build option.
40134 * config/mips/mips.h: Likewise.
40135 * doc/install.texi: Likewise.
40137 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
40139 PR tree-optimization/108603
40140 * explow.cc (convert_memory_address_addr_space_1): Only wrap
40141 the result of a recursive call in a CONST if no instructions
40144 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
40146 PR tree-optimization/108430
40147 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
40148 of inverted condition.
40150 2023-03-02 Jakub Jelinek <jakub@redhat.com>
40153 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
40154 comparison copy the bytes from ptr to a temporary buffer and clearing
40155 padding bits in there.
40157 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
40159 PR middle-end/108545
40160 * gimplify.cc (struct tree_operand_hash_no_se): New.
40161 (omp_index_mapping_groups_1, omp_index_mapping_groups,
40162 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
40163 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
40164 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
40165 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
40166 of tree_operand_hash.
40168 2023-03-01 LIU Hao <lh_mouse@126.com>
40171 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
40172 Remove the size limit `pch_VA_max_size`
40174 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
40176 PR middle-end/108546
40177 * omp-low.cc (lower_omp_target): Remove optional handling
40178 on the receiver side, i.e. inside target (data), for
40181 2023-03-01 Jakub Jelinek <jakub@redhat.com>
40184 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
40185 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
40187 2023-03-01 Richard Biener <rguenther@suse.de>
40189 PR tree-optimization/108970
40190 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
40191 Check we can copy the BBs.
40192 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
40194 (vect_do_peeling): Streamline error handling.
40196 2023-03-01 Richard Biener <rguenther@suse.de>
40198 PR tree-optimization/108950
40199 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
40200 Check oprnd0 is defined in the loop.
40201 * tree-vect-loop.cc (vectorizable_reduction): Record all
40202 operands vector types, compute that of invariants and
40203 properly update their SLP nodes.
40205 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
40208 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
40209 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
40211 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
40213 PR middle-end/107411
40214 PR middle-end/107411
40215 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
40217 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
40218 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
40220 2023-02-28 Jakub Jelinek <jakub@redhat.com>
40222 PR sanitizer/108894
40223 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
40224 comparison rather than index > bound.
40225 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
40226 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
40227 * doc/invoke.texi (-fsanitize=bounds): Document that whether
40228 flexible array member-like arrays are instrumented or not depends
40229 on -fstrict-flex-arrays* options of strict_flex_array attributes.
40230 (-fsanitize=bounds-strict): Document that flexible array members
40231 are not instrumented.
40233 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
40237 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
40238 (fmod<mode>3): Ditto.
40239 (fpremxf4_i387): Ditto.
40240 (reminderxf3): Ditto.
40241 (reminder<mode>3): Ditto.
40242 (fprem1xf4_i387): Ditto.
40244 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
40246 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
40247 generating FFS with mismatched operand and result modes, by using
40248 an explicit SIGN_EXTEND/ZERO_EXTEND.
40249 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
40250 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
40252 2023-02-27 Patrick Palka <ppalka@redhat.com>
40254 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
40255 * lra-int.h (lra_change_class): Likewise.
40256 * recog.h (which_op_alt): Likewise.
40257 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
40260 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40262 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
40264 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
40266 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
40267 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
40269 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
40271 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
40272 (xtensa_get_config_v3): New functions.
40274 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40276 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
40278 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
40280 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
40281 the macro to 0x1000000000.
40283 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
40286 * doc/gm2.texi (-fm2-pathname): New option documented.
40287 (-fm2-pathnameI): New option documented.
40288 (-fm2-prefix=): New option documented.
40289 (-fruntime-modules=): Update default module list.
40291 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
40294 * config/xtensa/xtensa-protos.h
40295 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
40296 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
40297 to xtensa_expand_call.
40298 (xtensa_expand_call): Emit the call and add a clobber expression
40299 for the static chain to it in case of windowed ABI.
40300 * config/xtensa/xtensa.md (call, call_value, sibcall)
40301 (sibcall_value): Call xtensa_expand_call and complete expansion
40302 right after that call.
40304 2023-02-24 Richard Biener <rguenther@suse.de>
40306 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
40307 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
40308 changing alignment of vec<T, A, vl_embed> and simplifying
40310 (vec<T, A, vl_embed>::address): Compute as this + 1.
40311 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
40312 vector instead of the offset of the m_vecdata member.
40313 (auto_vec<T, N>::m_data): Turn storage into
40314 uninitialized unsigned char.
40315 (auto_vec<T, N>::auto_vec): Allow allocation of one
40316 stack member. Initialize m_vec in a special way to
40317 avoid later stringop overflow diagnostics.
40318 * vec.cc (test_auto_alias): New.
40319 (vec_cc_tests): Call it.
40321 2023-02-24 Richard Biener <rguenther@suse.de>
40323 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
40324 take a const reference to the object, use address to
40326 (vec<T, A, vl_embed>::contains): Use address to access data.
40327 (vec<T, A, vl_embed>::operator[]): Use address instead of
40328 m_vecdata to access data.
40329 (vec<T, A, vl_embed>::iterate): Likewise.
40330 (vec<T, A, vl_embed>::copy): Likewise.
40331 (vec<T, A, vl_embed>::quick_push): Likewise.
40332 (vec<T, A, vl_embed>::pop): Likewise.
40333 (vec<T, A, vl_embed>::quick_insert): Likewise.
40334 (vec<T, A, vl_embed>::ordered_remove): Likewise.
40335 (vec<T, A, vl_embed>::unordered_remove): Likewise.
40336 (vec<T, A, vl_embed>::block_remove): Likewise.
40337 (vec<T, A, vl_heap>::address): Likewise.
40339 2023-02-24 Martin Liska <mliska@suse.cz>
40341 PR sanitizer/108834
40342 * asan.cc (asan_add_global): Use proper TU name for normal
40343 global variables (and aux_base_name for the artificial one).
40345 2023-02-24 Jakub Jelinek <jakub@redhat.com>
40347 * config/i386/i386-builtin.def: Update description of BDESC
40348 and BDESC_FIRST in file comment to include mask2.
40350 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40352 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
40354 2023-02-24 Jakub Jelinek <jakub@redhat.com>
40356 PR middle-end/108854
40357 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
40358 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
40359 nodes and adjust their DECL_CONTEXT.
40361 2023-02-24 Jakub Jelinek <jakub@redhat.com>
40364 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
40365 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
40366 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
40367 __builtin_ia32_cvtne2ps2bf16_v8bf,
40368 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
40369 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
40370 __builtin_ia32_cvtneps2bf16_v8sf_mask,
40371 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
40372 __builtin_ia32_cvtneps2bf16_v4sf_mask,
40373 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
40374 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
40375 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
40376 __builtin_ia32_dpbf16ps_v4sf_mask,
40377 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
40378 OPTION_MASK_ISA_AVX512VL.
40380 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
40382 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
40383 Add non-compact 32-bit multilibs.
40385 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
40387 * config/mips/mips.md (*clo<mode>2): New pattern.
40389 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
40391 * config/mips/mips.h (machine_function): New variable
40392 use_hazard_barrier_return_p.
40393 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
40394 (mips_hb_return_internal): New insn pattern.
40395 * config/mips/mips.cc (mips_attribute_table): Add attribute
40396 use_hazard_barrier_return.
40397 (mips_use_hazard_barrier_return_p): New static function.
40398 (mips_function_attr_inlinable_p): Likewise.
40399 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
40400 Emit error for unsupported architecture choice.
40401 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
40402 Return false for use_hazard_barrier_return.
40403 (mips_expand_epilogue): Emit hazard barrier return.
40404 * doc/extend.texi: Document use_hazard_barrier_return.
40406 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
40408 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
40409 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
40410 for the gcc-internal headers.
40412 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
40414 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
40415 and $(POSTCOMPILE) instead of manual dependency listing.
40416 * config/xtensa/xtensa-dynconfig.c: Rename to ...
40417 * config/xtensa/xtensa-dynconfig.cc: ... this.
40419 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
40421 * doc/cfg.texi: Reorder index entries around @items.
40422 * doc/cpp.texi: Ditto.
40423 * doc/cppenv.texi: Ditto.
40424 * doc/cppopts.texi: Ditto.
40425 * doc/generic.texi: Ditto.
40426 * doc/install.texi: Ditto.
40427 * doc/extend.texi: Ditto.
40428 * doc/invoke.texi: Ditto.
40429 * doc/md.texi: Ditto.
40430 * doc/rtl.texi: Ditto.
40431 * doc/tm.texi.in: Ditto.
40432 * doc/trouble.texi: Ditto.
40433 * doc/tm.texi: Regenerate.
40435 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40437 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
40438 the occurrence of general-purpose register used only once and for
40439 transferring intermediate value.
40441 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40443 * config/xtensa/xtensa.cc (machine_function): Add new member
40444 'eliminated_callee_saved_bmp'.
40445 (xtensa_can_eliminate_callee_saved_reg_p): New function to
40446 determine whether the register can be eliminated or not.
40447 (xtensa_expand_prologue): Add invoking the above function and
40448 elimination the use of callee-saved register by using its stack
40449 slot through the stack pointer (or the frame pointer if needed)
40451 (xtensa_expand_prologue): Modify to not emit register restoration
40452 insn from its stack slot if the register is already eliminated.
40454 2023-02-23 Jakub Jelinek <jakub@redhat.com>
40456 PR translation/108890
40457 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
40458 around fatal_error format strings.
40460 2023-02-23 Richard Biener <rguenther@suse.de>
40462 * tree-ssa-structalias.cc (handle_lhs_call): Do not
40463 re-create rhsc, only truncate it.
40465 2023-02-23 Jakub Jelinek <jakub@redhat.com>
40467 PR middle-end/106258
40468 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
40469 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
40471 2023-02-23 Richard Biener <rguenther@suse.de>
40473 * tree-if-conv.cc (tree_if_conversion): Properly manage
40474 memory of refs and the contained data references.
40476 2023-02-23 Richard Biener <rguenther@suse.de>
40478 PR tree-optimization/108888
40479 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
40480 calls to predicate.
40481 (predicate_statements): Only predicate calls with PLF_2.
40483 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40485 * config/xtensa/xtensa.md
40486 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
40487 Add missing "SI:" to PLUS RTXes.
40489 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
40492 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
40493 Emit (use (reg:SI A0_REG)) at the end in the sibling call
40494 (i.e. the same place as (return) in the normal call).
40496 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
40499 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
40502 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
40504 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
40505 (sibcall_value, sibcall_value_internal): Add 'use' expression
40508 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
40510 * doc/cppdiropts.texi: Reorder @opindex commands to precede
40511 @items they relate to.
40512 * doc/cppopts.texi: Ditto.
40513 * doc/cppwarnopts.texi: Ditto.
40514 * doc/invoke.texi: Ditto.
40515 * doc/lto.texi: Ditto.
40517 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
40519 * internal-fn.cc (expand_MASK_CALL): New.
40520 * internal-fn.def (MASK_CALL): New.
40521 * internal-fn.h (expand_MASK_CALL): New prototype.
40522 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
40523 for mask arguments also.
40524 * tree-if-conv.cc: Include cgraph.h.
40525 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
40526 (predicate_statements): Convert functions to IFN_MASK_CALL.
40527 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
40528 IFN_MASK_CALL as a SIMD function call.
40529 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
40530 IFN_MASK_CALL as an inbranch SIMD function call.
40531 Generate the mask vector arguments.
40533 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40535 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
40536 (class widen_reducop): Ditto.
40537 (class freducop): Ditto.
40538 (class widen_freducop): Ditto.
40540 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
40541 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
40550 (vwredsumu): Ditto.
40551 (vfredusum): Ditto.
40552 (vfredosum): Ditto.
40555 (vfwredosum): Ditto.
40556 (vfwredusum): Ditto.
40557 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
40559 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
40560 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
40561 (DEF_RVV_WU_OPS): Ditto.
40562 (DEF_RVV_WF_OPS): Ditto.
40563 (vint8mf8_t): Ditto.
40564 (vint8mf4_t): Ditto.
40565 (vint8mf2_t): Ditto.
40566 (vint8m1_t): Ditto.
40567 (vint8m2_t): Ditto.
40568 (vint8m4_t): Ditto.
40569 (vint8m8_t): Ditto.
40570 (vint16mf4_t): Ditto.
40571 (vint16mf2_t): Ditto.
40572 (vint16m1_t): Ditto.
40573 (vint16m2_t): Ditto.
40574 (vint16m4_t): Ditto.
40575 (vint16m8_t): Ditto.
40576 (vint32mf2_t): Ditto.
40577 (vint32m1_t): Ditto.
40578 (vint32m2_t): Ditto.
40579 (vint32m4_t): Ditto.
40580 (vint32m8_t): Ditto.
40581 (vuint8mf8_t): Ditto.
40582 (vuint8mf4_t): Ditto.
40583 (vuint8mf2_t): Ditto.
40584 (vuint8m1_t): Ditto.
40585 (vuint8m2_t): Ditto.
40586 (vuint8m4_t): Ditto.
40587 (vuint8m8_t): Ditto.
40588 (vuint16mf4_t): Ditto.
40589 (vuint16mf2_t): Ditto.
40590 (vuint16m1_t): Ditto.
40591 (vuint16m2_t): Ditto.
40592 (vuint16m4_t): Ditto.
40593 (vuint16m8_t): Ditto.
40594 (vuint32mf2_t): Ditto.
40595 (vuint32m1_t): Ditto.
40596 (vuint32m2_t): Ditto.
40597 (vuint32m4_t): Ditto.
40598 (vuint32m8_t): Ditto.
40599 (vfloat32mf2_t): Ditto.
40600 (vfloat32m1_t): Ditto.
40601 (vfloat32m2_t): Ditto.
40602 (vfloat32m4_t): Ditto.
40603 (vfloat32m8_t): Ditto.
40604 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
40605 (DEF_RVV_WU_OPS): Ditto.
40606 (DEF_RVV_WF_OPS): Ditto.
40607 (required_extensions_p): Add reduction support.
40608 (rvv_arg_type_info::get_base_vector_type): Ditto.
40609 (rvv_arg_type_info::get_tree_type): Ditto.
40610 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
40611 * config/riscv/riscv.md: Ditto.
40612 * config/riscv/vector-iterators.md (minu): Ditto.
40613 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
40614 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
40615 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
40616 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
40617 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
40618 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
40619 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
40621 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
40623 * config/riscv/iterators.md: New iterator.
40624 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
40625 (enum ternop_type): New enum.
40626 (class vmacc): New class.
40627 (class imac): Ditto.
40628 (class vnmsac): Ditto.
40629 (enum widen_ternop_type): New enum.
40630 (class vmadd): Ditto.
40631 (class vnmsub): Ditto.
40632 (class iwmac): Ditto.
40633 (class vwmacc): Ditto.
40634 (class vwmaccu): Ditto.
40635 (class vwmaccsu): Ditto.
40636 (class vwmaccus): Ditto.
40637 (class reverse_binop): Ditto.
40638 (class vfmacc): Ditto.
40639 (class vfnmsac): Ditto.
40640 (class vfmadd): Ditto.
40641 (class vfnmsub): Ditto.
40642 (class vfnmacc): Ditto.
40643 (class vfmsac): Ditto.
40644 (class vfnmadd): Ditto.
40645 (class vfmsub): Ditto.
40646 (class vfwmacc): Ditto.
40647 (class vfwnmacc): Ditto.
40648 (class vfwmsac): Ditto.
40649 (class vfwnmsac): Ditto.
40650 (class float_misc): Ditto.
40651 (class fcmp): Ditto.
40652 (class vfclass): Ditto.
40653 (class vfcvt_x): Ditto.
40654 (class vfcvt_rtz_x): Ditto.
40655 (class vfcvt_f): Ditto.
40656 (class vfwcvt_x): Ditto.
40657 (class vfwcvt_rtz_x): Ditto.
40658 (class vfwcvt_f): Ditto.
40659 (class vfncvt_x): Ditto.
40660 (class vfncvt_rtz_x): Ditto.
40661 (class vfncvt_f): Ditto.
40662 (class vfncvt_rod_f): Ditto.
40664 * config/riscv/riscv-vector-builtins-bases.h:
40665 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
40709 (vfcvt_rtz_x): Ditto.
40710 (vfcvt_rtz_xu): Ditto.
40713 (vfwcvt_xu): Ditto.
40714 (vfwcvt_rtz_x): Ditto.
40715 (vfwcvt_rtz_xu): Ditto.
40718 (vfncvt_xu): Ditto.
40719 (vfncvt_rtz_x): Ditto.
40720 (vfncvt_rtz_xu): Ditto.
40722 (vfncvt_rod_f): Ditto.
40723 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
40724 (struct move_def): Ditto.
40725 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
40726 (DEF_RVV_CONVERT_I_OPS): Ditto.
40727 (DEF_RVV_CONVERT_U_OPS): Ditto.
40728 (DEF_RVV_WCONVERT_I_OPS): Ditto.
40729 (DEF_RVV_WCONVERT_U_OPS): Ditto.
40730 (DEF_RVV_WCONVERT_F_OPS): Ditto.
40731 (vfloat64m1_t): Ditto.
40732 (vfloat64m2_t): Ditto.
40733 (vfloat64m4_t): Ditto.
40734 (vfloat64m8_t): Ditto.
40735 (vint32mf2_t): Ditto.
40736 (vint32m1_t): Ditto.
40737 (vint32m2_t): Ditto.
40738 (vint32m4_t): Ditto.
40739 (vint32m8_t): Ditto.
40740 (vint64m1_t): Ditto.
40741 (vint64m2_t): Ditto.
40742 (vint64m4_t): Ditto.
40743 (vint64m8_t): Ditto.
40744 (vuint32mf2_t): Ditto.
40745 (vuint32m1_t): Ditto.
40746 (vuint32m2_t): Ditto.
40747 (vuint32m4_t): Ditto.
40748 (vuint32m8_t): Ditto.
40749 (vuint64m1_t): Ditto.
40750 (vuint64m2_t): Ditto.
40751 (vuint64m4_t): Ditto.
40752 (vuint64m8_t): Ditto.
40753 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
40754 (DEF_RVV_CONVERT_U_OPS): Ditto.
40755 (DEF_RVV_WCONVERT_I_OPS): Ditto.
40756 (DEF_RVV_WCONVERT_U_OPS): Ditto.
40757 (DEF_RVV_WCONVERT_F_OPS): Ditto.
40758 (DEF_RVV_F_OPS): Ditto.
40759 (DEF_RVV_WEXTF_OPS): Ditto.
40760 (required_extensions_p): Adjust for floating-point support.
40761 (check_required_extensions): Ditto.
40762 (unsigned_base_type_p): Ditto.
40763 (get_mode_for_bitsize): Ditto.
40764 (rvv_arg_type_info::get_base_vector_type): Ditto.
40765 (rvv_arg_type_info::get_tree_type): Ditto.
40766 * config/riscv/riscv-vector-builtins.def (v_f): New define.
40769 (xu_v): New define.
40771 (xu_w): New define.
40772 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
40773 (function_expander::arg_mode): New function.
40774 * config/riscv/vector-iterators.md (sof): New iterator.
40780 (fixuns_trunc): Ditto.
40782 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
40783 (@pred_<optab><mode>): Ditto.
40784 (@pred_<optab><mode>_scalar): Ditto.
40785 (@pred_<optab><mode>_reverse_scalar): Ditto.
40786 (@pred_<copysign><mode>): Ditto.
40787 (@pred_<copysign><mode>_scalar): Ditto.
40788 (@pred_mul_<optab><mode>): Ditto.
40789 (pred_mul_<optab><mode>_undef_merge): Ditto.
40790 (*pred_<madd_nmsub><mode>): Ditto.
40791 (*pred_<macc_nmsac><mode>): Ditto.
40792 (*pred_mul_<optab><mode>): Ditto.
40793 (@pred_mul_<optab><mode>_scalar): Ditto.
40794 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
40795 (*pred_<madd_nmsub><mode>_scalar): Ditto.
40796 (*pred_<macc_nmsac><mode>_scalar): Ditto.
40797 (*pred_mul_<optab><mode>_scalar): Ditto.
40798 (@pred_neg_mul_<optab><mode>): Ditto.
40799 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
40800 (*pred_<nmadd_msub><mode>): Ditto.
40801 (*pred_<nmacc_msac><mode>): Ditto.
40802 (*pred_neg_mul_<optab><mode>): Ditto.
40803 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
40804 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
40805 (*pred_<nmadd_msub><mode>_scalar): Ditto.
40806 (*pred_<nmacc_msac><mode>_scalar): Ditto.
40807 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
40808 (@pred_<misc_op><mode>): Ditto.
40809 (@pred_class<mode>): Ditto.
40810 (@pred_dual_widen_<optab><mode>): Ditto.
40811 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
40812 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
40813 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
40814 (@pred_widen_mul_<optab><mode>): Ditto.
40815 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
40816 (@pred_widen_neg_mul_<optab><mode>): Ditto.
40817 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
40818 (@pred_cmp<mode>): Ditto.
40819 (*pred_cmp<mode>): Ditto.
40820 (*pred_cmp<mode>_narrow): Ditto.
40821 (@pred_cmp<mode>_scalar): Ditto.
40822 (*pred_cmp<mode>_scalar): Ditto.
40823 (*pred_cmp<mode>_scalar_narrow): Ditto.
40824 (@pred_eqne<mode>_scalar): Ditto.
40825 (*pred_eqne<mode>_scalar): Ditto.
40826 (*pred_eqne<mode>_scalar_narrow): Ditto.
40827 (@pred_merge<mode>_scalar): Ditto.
40828 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
40829 (@pred_<fix_cvt><mode>): Ditto.
40830 (@pred_<float_cvt><mode>): Ditto.
40831 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
40832 (@pred_widen_<fix_cvt><mode>): Ditto.
40833 (@pred_widen_<float_cvt><mode>): Ditto.
40834 (@pred_extend<mode>): Ditto.
40835 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
40836 (@pred_narrow_<fix_cvt><mode>): Ditto.
40837 (@pred_narrow_<float_cvt><mode>): Ditto.
40838 (@pred_trunc<mode>): Ditto.
40839 (@pred_rod_trunc<mode>): Ditto.
40841 2023-02-22 Jakub Jelinek <jakub@redhat.com>
40843 PR middle-end/106258
40844 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
40845 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
40846 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
40847 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
40849 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
40851 * common.opt (-Wcomplain-wrong-lang): New.
40852 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
40853 * opts-common.cc (prune_options): Handle it.
40854 * opts-global.cc (complain_wrong_lang): Use it.
40856 2023-02-21 David Malcolm <dmalcolm@redhat.com>
40859 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
40861 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
40864 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
40866 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
40867 (sibcall_value, sibcall_value_internal): Add 'use' expression
40870 2023-02-21 Richard Biener <rguenther@suse.de>
40872 PR tree-optimization/108691
40873 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
40874 assert about calls_setjmp not becoming true when it was false.
40876 2023-02-21 Richard Biener <rguenther@suse.de>
40878 PR tree-optimization/108793
40879 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
40880 Use convert operands to niter_type when computing num.
40882 2023-02-21 Richard Biener <rguenther@suse.de>
40885 2023-02-13 Richard Biener <rguenther@suse.de>
40887 PR tree-optimization/108691
40888 * tree-cfg.cc (notice_special_calls): When the CFG is built
40889 honor gimple_call_ctrl_altering_p.
40890 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
40891 temporarily if the call is not control-altering.
40892 * calls.cc (emit_call_1): Do not add REG_SETJMP if
40893 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
40895 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40897 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
40898 true if register A0 (return address register) when -Og is specified.
40900 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
40902 * config/i386/predicates.md
40903 (general_x64constmem_operand): New predicate.
40904 * config/i386/i386.md (*cmpqi_ext<mode>_1):
40905 Use nonimm_x64constmem_operand.
40906 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
40907 (*addqi_ext<mode>_1): Ditto.
40908 (*testqi_ext<mode>_1): Ditto.
40909 (*andqi_ext<mode>_1): Ditto.
40910 (*andqi_ext<mode>_1_cc): Ditto.
40911 (*<any_or:code>qi_ext<mode>_1): Ditto.
40912 (*xorqi_ext<mode>_1_cc): Ditto.
40914 2023-02-20 Jakub Jelinek <jakub2redhat.com>
40917 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
40918 gen_umadddi4_highpart{,_le}.
40920 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
40922 * config/riscv/riscv.md (prefetch): Use r instead of p for the
40924 (riscv_prefetchi_<mode>): Ditto.
40926 2023-02-20 Richard Biener <rguenther@suse.de>
40928 PR tree-optimization/108816
40929 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
40930 versioning condition split prerequesite, assert required
40933 2023-02-20 Richard Biener <rguenther@suse.de>
40935 PR tree-optimization/108825
40936 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
40937 loop-local verfication only verify there's no pending SSA
40940 2023-02-20 Richard Biener <rguenther@suse.de>
40942 PR tree-optimization/108819
40943 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
40944 we have an SSA name as iv_2 as expected.
40946 2023-02-18 Jakub Jelinek <jakub@redhat.com>
40948 PR tree-optimization/108819
40949 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
40951 2023-02-18 Jakub Jelinek <jakub@redhat.com>
40954 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
40955 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
40957 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
40958 with ix86_replace_reg_with_reg.
40960 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
40962 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
40964 2023-02-18 Xi Ruoyao <xry111@xry111.site>
40966 * config.gcc (triplet_abi): Set its value based on $with_abi,
40967 instead of $target.
40968 (la_canonical_triplet): Set it after $triplet_abi is set
40970 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
40971 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
40974 2023-02-18 Andrew Pinski <apinski@marvell.com>
40976 * match.pd: Remove #if GIMPLE around the
40979 2023-02-18 Andrew Pinski <apinski@marvell.com>
40981 * value-query.h (get_range_query): Return the global ranges
40982 for a nullptr func.
40984 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
40986 * doc/invoke.texi (@item -Wall): Fix typo in
40989 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
40992 * config/i386/predicates.md
40993 (nonimm_x64constmem_operand): New predicate.
40994 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
40995 (*subqi_ext<mode>_0): Ditto.
40996 (*andqi_ext<mode>_0): Ditto.
40997 (*<any_or:code>qi_ext<mode>_0): Ditto.
40999 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
41002 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
41003 int_outermode instead of GET_MODE (tem) to prevent
41004 VOIDmode from entering simplify_gen_subreg.
41006 2023-02-17 Richard Biener <rguenther@suse.de>
41008 PR tree-optimization/108821
41009 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
41010 move volatile accesses.
41012 2023-02-17 Richard Biener <rguenther@suse.de>
41014 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
41015 called on virtual operands.
41016 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
41017 ssa_undefined_value_p calls.
41018 (vn_phi_insert): Likewise.
41019 (set_ssa_val_to): Likewise.
41020 (visit_phi): Avoid extra work with equivalences for
41021 virtual operand PHIs.
41023 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41025 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
41027 (class mask_nlogic): Ditto.
41028 (class mask_notlogic): Ditto.
41029 (class vmmv): Ditto.
41030 (class vmclr): Ditto.
41031 (class vmset): Ditto.
41032 (class vmnot): Ditto.
41033 (class vcpop): Ditto.
41034 (class vfirst): Ditto.
41035 (class mask_misc): Ditto.
41036 (class viota): Ditto.
41037 (class vid): Ditto.
41039 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41040 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
41059 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
41060 (struct mask_alu_def): Ditto.
41062 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41063 * config/riscv/riscv-vector-builtins.cc: Ditto.
41064 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
41065 for dest it scalar RVV intrinsics.
41066 * config/riscv/vector-iterators.md (sof): New iterator.
41067 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
41068 (@pred_<optab>not<mode>): New pattern.
41069 (@pred_popcount<VB:mode><P:mode>): New pattern.
41070 (@pred_ffs<VB:mode><P:mode>): New pattern.
41071 (@pred_<misc_op><mode>): New pattern.
41072 (@pred_iota<mode>): New pattern.
41073 (@pred_series<mode>): New pattern.
41075 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41077 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
41081 * config/riscv/riscv-vector-builtins.cc: Ditto.
41083 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41084 kito-cheng <kito.cheng@sifive.com>
41086 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
41087 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
41088 (sew64_scalar_helper): New function.
41089 * config/riscv/vector.md: Normalization.
41091 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41093 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
41155 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41157 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
41158 (@pred_<optab><mode>_scalar): Ditto.
41159 (*pred_<optab><mode>_scalar): Ditto.
41160 (*pred_<optab><mode>_extended_scalar): Ditto.
41162 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41164 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
41165 (init_builtins): Ditto.
41166 (mangle_builtin_type): Ditto.
41167 (verify_type_context): Ditto.
41168 (handle_pragma_vector): Ditto.
41169 (builtin_decl): Ditto.
41170 (expand_builtin): Ditto.
41171 (const_vec_all_same_in_range_p): Ditto.
41172 (legitimize_move): Ditto.
41173 (emit_vlmax_op): Ditto.
41174 (emit_nonvlmax_op): Ditto.
41175 (get_vlmul): Ditto.
41176 (get_ratio): Ditto.
41179 (get_avl_type): Ditto.
41180 (calculate_ratio): Ditto.
41181 (enum vlmul_type): Ditto.
41183 (neg_simm5_p): Ditto.
41184 (has_vi_variant_p): Ditto.
41186 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41188 * config/riscv/riscv-protos.h (simm32_p): Remove.
41189 * config/riscv/riscv-v.cc (simm32_p): Ditto.
41190 * config/riscv/vector.md: Use immediate_operand
41191 instead of riscv_vector::simm32_p.
41193 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
41195 * doc/invoke.texi (Optimize Options): Reword the explanation
41196 getting minimal, maximal and default values of a parameter.
41198 2023-02-16 Patrick Palka <ppalka@redhat.com>
41200 * addresses.h: Mechanically drop 'static' from 'static inline'
41201 functions via s/^static inline/inline/g.
41202 * asan.h: Likewise.
41203 * attribs.h: Likewise.
41204 * basic-block.h: Likewise.
41205 * bitmap.h: Likewise.
41206 * cfghooks.h: Likewise.
41207 * cfgloop.h: Likewise.
41208 * cgraph.h: Likewise.
41209 * cselib.h: Likewise.
41210 * data-streamer.h: Likewise.
41211 * debug.h: Likewise.
41213 * diagnostic.h: Likewise.
41214 * dominance.h: Likewise.
41215 * dumpfile.h: Likewise.
41216 * emit-rtl.h: Likewise.
41217 * except.h: Likewise.
41218 * expmed.h: Likewise.
41219 * expr.h: Likewise.
41220 * fixed-value.h: Likewise.
41221 * gengtype.h: Likewise.
41222 * gimple-expr.h: Likewise.
41223 * gimple-iterator.h: Likewise.
41224 * gimple-predict.h: Likewise.
41225 * gimple-range-fold.h: Likewise.
41226 * gimple-ssa.h: Likewise.
41227 * gimple.h: Likewise.
41228 * graphite.h: Likewise.
41229 * hard-reg-set.h: Likewise.
41230 * hash-map.h: Likewise.
41231 * hash-set.h: Likewise.
41232 * hash-table.h: Likewise.
41233 * hwint.h: Likewise.
41234 * input.h: Likewise.
41235 * insn-addr.h: Likewise.
41236 * internal-fn.h: Likewise.
41237 * ipa-fnsummary.h: Likewise.
41238 * ipa-icf-gimple.h: Likewise.
41239 * ipa-inline.h: Likewise.
41240 * ipa-modref.h: Likewise.
41241 * ipa-prop.h: Likewise.
41242 * ira-int.h: Likewise.
41244 * lra-int.h: Likewise.
41246 * lto-streamer.h: Likewise.
41247 * memmodel.h: Likewise.
41248 * omp-general.h: Likewise.
41249 * optabs-query.h: Likewise.
41250 * optabs.h: Likewise.
41251 * plugin.h: Likewise.
41252 * pretty-print.h: Likewise.
41253 * range.h: Likewise.
41254 * read-md.h: Likewise.
41255 * recog.h: Likewise.
41256 * regs.h: Likewise.
41257 * rtl-iter.h: Likewise.
41259 * sbitmap.h: Likewise.
41260 * sched-int.h: Likewise.
41261 * sel-sched-ir.h: Likewise.
41262 * sese.h: Likewise.
41263 * sparseset.h: Likewise.
41264 * ssa-iterators.h: Likewise.
41265 * system.h: Likewise.
41266 * target-globals.h: Likewise.
41267 * target.h: Likewise.
41268 * timevar.h: Likewise.
41269 * tree-chrec.h: Likewise.
41270 * tree-data-ref.h: Likewise.
41271 * tree-iterator.h: Likewise.
41272 * tree-outof-ssa.h: Likewise.
41273 * tree-phinodes.h: Likewise.
41274 * tree-scalar-evolution.h: Likewise.
41275 * tree-sra.h: Likewise.
41276 * tree-ssa-alias.h: Likewise.
41277 * tree-ssa-live.h: Likewise.
41278 * tree-ssa-loop-manip.h: Likewise.
41279 * tree-ssa-loop.h: Likewise.
41280 * tree-ssa-operands.h: Likewise.
41281 * tree-ssa-propagate.h: Likewise.
41282 * tree-ssa-sccvn.h: Likewise.
41283 * tree-ssa.h: Likewise.
41284 * tree-ssanames.h: Likewise.
41285 * tree-streamer.h: Likewise.
41286 * tree-switch-conversion.h: Likewise.
41287 * tree-vectorizer.h: Likewise.
41288 * tree.h: Likewise.
41289 * wide-int.h: Likewise.
41291 2023-02-16 Jakub Jelinek <jakub@redhat.com>
41293 PR tree-optimization/108657
41294 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
41295 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
41296 is a call to internal or builtin function.
41298 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
41300 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
41301 using-declaration to unhide functions.
41303 2023-02-16 Jakub Jelinek <jakub@redhat.com>
41305 PR tree-optimization/108783
41306 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
41307 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
41308 t to curr->op. Otherwise, punt if either newop1 or newop2 are
41309 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
41311 2023-02-16 Richard Biener <rguenther@suse.de>
41313 PR tree-optimization/108791
41314 * tree-ssa-forwprop.cc (optimize_vector_load): Build
41315 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
41318 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
41321 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
41322 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
41323 (ix86_expand_prologue): Likewise.
41325 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
41327 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
41329 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
41331 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
41332 int248_register_operand predicate in zero_extract sub-RTX.
41333 (*cmpqi_ext<mode>_2): Ditto.
41334 (*cmpqi_ext<mode>_3): Ditto.
41335 (*cmpqi_ext<mode>_4): Ditto.
41336 (*extzvqi_mem_rex64): Ditto.
41338 (*insvqi_1_mem_rex64): Ditto.
41339 (@insv<mode>_1): Ditto.
41340 (*insvqi_1): Ditto.
41341 (*insvqi_2): Ditto.
41342 (*insvqi_3): Ditto.
41343 (*extendqi<SWI24:mode>_ext_1): Ditto.
41344 (*addqi_ext<mode>_1): Ditto.
41345 (*addqi_ext<mode>_2): Ditto.
41346 (*subqi_ext<mode>_2): Ditto.
41347 (*testqi_ext<mode>_1): Ditto.
41348 (*testqi_ext<mode>_2): Ditto.
41349 (*andqi_ext<mode>_1): Ditto.
41350 (*andqi_ext<mode>_1_cc): Ditto.
41351 (*andqi_ext<mode>_2): Ditto.
41352 (*<any_or:code>qi_ext<mode>_1): Ditto.
41353 (*<any_or:code>qi_ext<mode>_2): Ditto.
41354 (*xorqi_ext<mode>_1_cc): Ditto.
41355 (*negqi_ext<mode>_2): Ditto.
41356 (*ashlqi_ext<mode>_2): Ditto.
41357 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
41359 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
41361 * config/i386/predicates.md (int248_register_operand):
41362 Rename from extr_register_operand.
41363 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
41364 (*extzx<mode>): Ditto.
41365 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
41366 (*ashl<mode>3_mask): Ditto.
41367 (*<any_shiftrt:insn><mode>3_mask): Ditto.
41368 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
41369 (*<any_rotate:insn><mode>3_mask): Ditto.
41370 (*<btsc><mode>_mask): Ditto.
41371 (*btr<mode>_mask): Ditto.
41372 (*jcc_bt<mode>_mask_1): Ditto.
41374 2023-02-15 Richard Biener <rguenther@suse.de>
41376 PR middle-end/26854
41377 * df-core.cc (df_worklist_propagate_forward): Put later
41378 blocks on worklist and only earlier blocks on pending.
41379 (df_worklist_propagate_backward): Likewise.
41380 (df_worklist_dataflow_doublequeue): Change the iteration
41381 to process new blocks in the same iteration if that
41382 maintains the iteration order.
41384 2023-02-15 Marek Polacek <polacek@redhat.com>
41386 PR middle-end/106080
41387 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
41390 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41392 * config/riscv/predicates.md: Refine codes.
41393 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
41394 * config/riscv/riscv-v.cc: Refine codes.
41395 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
41397 (class imac): New class.
41398 (enum widen_ternop_type): New enum.
41399 (class iwmac): New class.
41401 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41402 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
41410 * config/riscv/riscv-vector-builtins.cc
41411 (function_builder::apply_predication): Adjust for multiply-add support.
41412 (function_expander::add_vundef_operand): Refine codes.
41413 (function_expander::use_ternop_insn): New function.
41414 (function_expander::use_widen_ternop_insn): Ditto.
41415 * config/riscv/riscv-vector-builtins.h: New function.
41416 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
41417 (pred_mul_<optab><mode>_undef_merge): Ditto.
41418 (*pred_<madd_nmsub><mode>): Ditto.
41419 (*pred_<macc_nmsac><mode>): Ditto.
41420 (*pred_mul_<optab><mode>): Ditto.
41421 (@pred_mul_<optab><mode>_scalar): Ditto.
41422 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
41423 (*pred_<madd_nmsub><mode>_scalar): Ditto.
41424 (*pred_<macc_nmsac><mode>_scalar): Ditto.
41425 (*pred_mul_<optab><mode>_scalar): Ditto.
41426 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
41427 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
41428 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
41429 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
41430 (@pred_widen_mul_plus<su><mode>): Ditto.
41431 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
41432 (@pred_widen_mul_plussu<mode>): Ditto.
41433 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
41434 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
41436 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41438 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
41439 (vector_all_trues_mask_operand): New predicate.
41440 (vector_undef_operand): New predicate.
41441 (ltge_operator): New predicate.
41442 (comparison_except_ltge_operator): New predicate.
41443 (comparison_except_eqge_operator): New predicate.
41444 (ge_operator): New predicate.
41445 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
41446 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
41448 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41449 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
41459 * config/riscv/riscv-vector-builtins-shapes.cc
41460 (struct return_mask_def): Adjust for compare support.
41461 * config/riscv/riscv-vector-builtins.cc
41462 (function_expander::use_compare_insn): New function.
41463 * config/riscv/riscv-vector-builtins.h
41464 (function_expander::add_integer_operand): Ditto.
41465 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
41466 * config/riscv/riscv.md: Add vector min/max attributes.
41467 * config/riscv/vector-iterators.md (xnor): New iterator.
41468 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
41469 (*pred_cmp<mode>): Ditto.
41470 (*pred_cmp<mode>_narrow): Ditto.
41471 (@pred_ltge<mode>): Ditto.
41472 (*pred_ltge<mode>): Ditto.
41473 (*pred_ltge<mode>_narrow): Ditto.
41474 (@pred_cmp<mode>_scalar): Ditto.
41475 (*pred_cmp<mode>_scalar): Ditto.
41476 (*pred_cmp<mode>_scalar_narrow): Ditto.
41477 (@pred_eqne<mode>_scalar): Ditto.
41478 (*pred_eqne<mode>_scalar): Ditto.
41479 (*pred_eqne<mode>_scalar_narrow): Ditto.
41480 (*pred_cmp<mode>_extended_scalar): Ditto.
41481 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
41482 (*pred_eqne<mode>_extended_scalar): Ditto.
41483 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
41484 (@pred_ge<mode>_scalar): Ditto.
41485 (@pred_<optab><mode>): Ditto.
41486 (@pred_n<optab><mode>): Ditto.
41487 (@pred_<optab>n<mode>): Ditto.
41488 (@pred_not<mode>): Ditto.
41490 2023-02-15 Martin Jambor <mjambor@suse.cz>
41493 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
41494 creation of non-scalar replacements even if IPA-CP knows their
41497 2023-02-15 Jakub Jelinek <jakub@redhat.com>
41501 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
41502 expander, change operand 3 to be TImode, emit maddlddi4 and
41503 umadddi4_highpart{,_le} with its low half and finally add the high
41504 half to the result.
41506 2023-02-15 Martin Liska <mliska@suse.cz>
41508 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
41510 2023-02-15 Richard Biener <rguenther@suse.de>
41512 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
41513 for with_poison and alias worklist to it.
41514 (sanitize_asan_mark_poison): Likewise.
41516 2023-02-15 Richard Biener <rguenther@suse.de>
41519 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
41520 Combine bitmap test and set.
41521 (scalar_chain::add_insn): Likewise.
41522 (scalar_chain::analyze_register_chain): Remove redundant
41523 attempt to add to queue and instead strengthen assert.
41524 Sink common attempts to mark the def dual-mode.
41525 (scalar_chain::add_to_queue): Remove redundant insn bitmap
41528 2023-02-15 Richard Biener <rguenther@suse.de>
41531 * config/i386/i386-features.cc (convert_scalars_to_vector):
41532 Switch candidates bitmaps to tree view before building the chains.
41534 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
41536 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
41537 "failure trying to reload" call.
41539 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
41541 * gdbinit.in (phrs): New command.
41542 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
41543 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
41545 2023-02-14 David Faust <david.faust@oracle.com>
41548 * config/bpf/constraints.md (q): New memory constraint.
41549 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
41550 (zero_extendqidi2): Likewise.
41551 (zero_extendsidi2): Likewise.
41552 (*mov<MM:mode>): Likewise.
41554 2023-02-14 Andrew Pinski <apinski@marvell.com>
41556 PR tree-optimization/108355
41557 PR tree-optimization/96921
41558 * match.pd: Add pattern for "1 - bool_val".
41560 2023-02-14 Richard Biener <rguenther@suse.de>
41562 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
41563 basic block index hashing on the availability of ->cclhs.
41564 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
41565 rely on ->cclhs availability.
41566 (vn_phi_lookup): Set ->cclhs only when we are eventually
41567 going to CSE the PHI.
41568 (vn_phi_insert): Likewise.
41570 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
41572 * gimplify.cc (gimplify_save_expr): Add missing guard.
41574 2023-02-14 Richard Biener <rguenther@suse.de>
41576 PR tree-optimization/108782
41577 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
41578 Make sure we're not vectorizing an inner loop.
41580 2023-02-14 Jakub Jelinek <jakub@redhat.com>
41582 PR sanitizer/108777
41583 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
41584 * asan.h (asan_memfn_rtl): Declare.
41585 * asan.cc (asan_memfn_rtls): New variable.
41586 (asan_memfn_rtl): New function.
41587 * builtins.cc (expand_builtin): If
41588 param_asan_kernel_mem_intrinsic_prefix and function is
41589 kernel-{,hw}address sanitized, emit calls to
41590 __{,hw}asan_{memcpy,memmove,memset} rather than
41591 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
41592 instead of flag_sanitize & SANITIZE_ADDRESS to check if
41593 asan_intercepted_p functions shouldn't be expanded inline.
41595 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
41597 PR tree-optimization/96373
41598 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
41599 operations on the loop mask. Reject partial vectors if this isn't
41602 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
41604 PR rtl-optimization/108681
41605 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
41606 code to handle bare uses and clobbers.
41608 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
41610 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
41611 caller_save_p flag when clearing defined_p flag.
41612 (setup_reg_equiv): Ditto.
41613 * lra-constraints.cc (lra_constraints): Ditto.
41615 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
41618 * config/i386/predicates.md (extr_register_operand):
41619 New special predicate.
41620 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
41621 as operand 1 predicate.
41622 (*exzv<mode>): Ditto.
41623 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
41625 2023-02-13 Richard Biener <rguenther@suse.de>
41627 PR tree-optimization/28614
41628 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
41629 walking all edges in most cases.
41630 (vn_nary_op_insert_pieces_predicated): Avoid repeated
41631 calls to can_track_predicate_on_edge unless checking is
41633 (process_bb): Instead call it once here for each edge
41634 we register possibly multiple predicates on.
41636 2023-02-13 Richard Biener <rguenther@suse.de>
41638 PR tree-optimization/108691
41639 * tree-cfg.cc (notice_special_calls): When the CFG is built
41640 honor gimple_call_ctrl_altering_p.
41641 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
41642 temporarily if the call is not control-altering.
41643 * calls.cc (emit_call_1): Do not add REG_SETJMP if
41644 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
41646 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
41649 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
41650 (struct s390_sched_state): Initialise to zero.
41651 (s390_sched_variable_issue): For better debuggability also emit
41653 (s390_sched_init): Unconditionally reset scheduler state.
41655 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
41657 * ifcvt.h (noce_if_info::cond_inverted): New field.
41658 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
41659 values when cond_inverted is true.
41660 (noce_find_if_block): Allow the condition to be inverted when
41661 handling conditional moves.
41663 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
41665 * config/s390/predicates.md (execute_operation): Use
41666 constrain_operands instead of extract_constrain_insn in order to
41667 determine wheter there exists a valid alternative.
41669 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
41671 * common/config/arc/arc-common.cc (arc_option_optimization_table):
41672 Remove millicode from list.
41674 2023-02-13 Martin Liska <mliska@suse.cz>
41676 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
41678 2023-02-13 Richard Biener <rguenther@suse.de>
41680 PR tree-optimization/106722
41681 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
41682 whether we marked a stmt.
41683 (mark_control_dependent_edges_necessary): When
41684 mark_last_stmt_necessary didn't mark any stmt make sure
41685 to mark its control dependent edges.
41686 (propagate_necessity): Likewise.
41688 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
41690 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
41691 (DWARF_FRAME_REGISTERS): New.
41692 (DWARF_REG_TO_UNWIND_COLUMN): New.
41694 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
41696 * doc/sourcebuild.texi: Remove (broken) direct reference to
41697 "The GNU configure and build system".
41699 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
41701 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
41702 gen_add3_insn to gen_rtx_SET.
41703 (riscv_adjust_libcall_cfi_epilogue): Likewise.
41705 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41707 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
41708 (class vnclip): Ditto.
41710 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41711 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
41720 * config/riscv/vector-iterators.md (su): Add instruction.
41723 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
41724 (@pred_<sat_op><mode>_scalar): Ditto.
41725 (*pred_<sat_op><mode>_scalar): Ditto.
41726 (*pred_<sat_op><mode>_extended_scalar): Ditto.
41727 (@pred_narrow_clip<v_su><mode>): Ditto.
41728 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
41730 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41732 * config/riscv/constraints.md (Wbr): Remove unused constraint.
41733 * config/riscv/predicates.md: Fix move operand predicate.
41734 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
41735 (class vncvt_x): Ditto.
41736 (class vmerge): Ditto.
41737 (class vmv_v): Ditto.
41739 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41740 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
41747 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
41748 (struct move_def): Ditto.
41750 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41751 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
41752 (DEF_RVV_WEXTU_OPS): Ditto
41753 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
41758 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
41759 * config/riscv/vector-iterators.md (nmsac):New iterator.
41760 (nmsub): New iterator.
41761 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
41762 (@pred_merge<mode>_scalar): New pattern.
41763 (*pred_merge<mode>_scalar): New pattern.
41764 (*pred_merge<mode>_extended_scalar): New pattern.
41765 (@pred_narrow_<optab><mode>): New pattern.
41766 (@pred_narrow_<optab><mode>_scalar): New pattern.
41767 (@pred_trunc<mode>): New pattern.
41769 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41771 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
41772 (class vmsbc): Ditto.
41773 (BASE): Define new class.
41774 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41775 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
41777 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
41780 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41781 * config/riscv/riscv-vector-builtins.cc
41782 (function_expander::use_exact_insn): Adjust for new support
41783 * config/riscv/riscv-vector-builtins.h
41784 (function_base::has_merge_operand_p): New function.
41785 * config/riscv/vector-iterators.md: New iterator.
41786 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
41787 (@pred_msbc<mode>): Ditto.
41788 (@pred_madc<mode>_scalar): Ditto.
41789 (@pred_msbc<mode>_scalar): Ditto.
41790 (*pred_madc<mode>_scalar): Ditto.
41791 (*pred_madc<mode>_extended_scalar): Ditto.
41792 (*pred_msbc<mode>_scalar): Ditto.
41793 (*pred_msbc<mode>_extended_scalar): Ditto.
41794 (@pred_madc<mode>_overflow): Ditto.
41795 (@pred_msbc<mode>_overflow): Ditto.
41796 (@pred_madc<mode>_overflow_scalar): Ditto.
41797 (@pred_msbc<mode>_overflow_scalar): Ditto.
41798 (*pred_madc<mode>_overflow_scalar): Ditto.
41799 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
41800 (*pred_msbc<mode>_overflow_scalar): Ditto.
41801 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
41803 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41805 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
41806 * config/riscv/riscv-v.cc (simm32_p): Ditto.
41807 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
41808 (class vsbc): Ditto.
41810 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41811 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
41813 * config/riscv/riscv-vector-builtins-shapes.cc
41814 (struct no_mask_policy_def): Ditto.
41816 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
41817 * config/riscv/riscv-vector-builtins.cc
41818 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
41819 (rvv_arg_type_info::get_tree_type): Ditto.
41820 (function_expander::use_exact_insn): Ditto.
41821 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
41822 (function_base::use_mask_predication_p): New function.
41823 * config/riscv/vector-iterators.md: New iterator.
41824 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
41825 (@pred_sbc<mode>): Ditto.
41826 (@pred_adc<mode>_scalar): Ditto.
41827 (@pred_sbc<mode>_scalar): Ditto.
41828 (*pred_adc<mode>_scalar): Ditto.
41829 (*pred_adc<mode>_extended_scalar): Ditto.
41830 (*pred_sbc<mode>_scalar): Ditto.
41831 (*pred_sbc<mode>_extended_scalar): Ditto.
41833 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41835 * config/riscv/vector.md: use "zero" reg.
41837 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41839 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
41841 (class vwmulsu): Ditto.
41842 (class vwcvt): Ditto.
41843 (BASE): Add integer widening support.
41844 * config/riscv/riscv-vector-builtins-bases.h: Ditto
41845 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
41846 (vwsub): New class.
41847 (vwmul): New class.
41848 (vwmulu): New class.
41849 (vwmulsu): New class.
41850 (vwaddu): New class.
41851 (vwsubu): New class.
41852 (vwcvt_x): New class.
41853 (vwcvtu_x): New class.
41854 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
41856 (struct widen_alu_def): New class.
41857 (SHAPE): New class.
41858 * config/riscv/riscv-vector-builtins-shapes.h: New class.
41859 * config/riscv/riscv-vector-builtins.cc
41860 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
41861 (rvv_arg_type_info::get_tree_type): Ditto.
41862 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
41864 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
41866 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
41867 * config/riscv/riscv.h (X0_REGNUM): New constant.
41868 * config/riscv/vector-iterators.md: New iterators.
41869 * config/riscv/vector.md
41870 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
41872 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
41874 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
41875 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
41877 (@pred_widen_mulsu<mode>): Ditto.
41878 (@pred_widen_mulsu<mode>_scalar): Ditto.
41879 (@pred_<optab><mode>): Ditto.
41881 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41882 kito-cheng <kito.cheng@sifive.com>
41884 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
41885 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
41887 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
41888 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
41892 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
41894 (DEF_RVV_FULL_V_U_OPS): Ditto.
41895 (vint8mf8_t): Ditto.
41896 (vint8mf4_t): Ditto.
41897 (vint8mf2_t): Ditto.
41898 (vint8m1_t): Ditto.
41899 (vint8m2_t): Ditto.
41900 (vint8m4_t): Ditto.
41901 (vint8m8_t): Ditto.
41902 (vint16mf4_t): Ditto.
41903 (vint16mf2_t): Ditto.
41904 (vint16m1_t): Ditto.
41905 (vint16m2_t): Ditto.
41906 (vint16m4_t): Ditto.
41907 (vint16m8_t): Ditto.
41908 (vint32mf2_t): Ditto.
41909 (vint32m1_t): Ditto.
41910 (vint32m2_t): Ditto.
41911 (vint32m4_t): Ditto.
41912 (vint32m8_t): Ditto.
41913 (vint64m1_t): Ditto.
41914 (vint64m2_t): Ditto.
41915 (vint64m4_t): Ditto.
41916 (vint64m8_t): Ditto.
41917 (vuint8mf8_t): Ditto.
41918 (vuint8mf4_t): Ditto.
41919 (vuint8mf2_t): Ditto.
41920 (vuint8m1_t): Ditto.
41921 (vuint8m2_t): Ditto.
41922 (vuint8m4_t): Ditto.
41923 (vuint8m8_t): Ditto.
41924 (vuint16mf4_t): Ditto.
41925 (vuint16mf2_t): Ditto.
41926 (vuint16m1_t): Ditto.
41927 (vuint16m2_t): Ditto.
41928 (vuint16m4_t): Ditto.
41929 (vuint16m8_t): Ditto.
41930 (vuint32mf2_t): Ditto.
41931 (vuint32m1_t): Ditto.
41932 (vuint32m2_t): Ditto.
41933 (vuint32m4_t): Ditto.
41934 (vuint32m8_t): Ditto.
41935 (vuint64m1_t): Ditto.
41936 (vuint64m2_t): Ditto.
41937 (vuint64m4_t): Ditto.
41938 (vuint64m8_t): Ditto.
41939 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
41940 (DEF_RVV_FULL_V_U_OPS): Ditto.
41941 (check_required_extensions): Add vmulh support.
41942 (rvv_arg_type_info::get_tree_type): Ditto.
41943 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
41944 (enum rvv_base_type): Ditto.
41945 * config/riscv/riscv.opt: Add 'V' extension flag.
41946 * config/riscv/vector-iterators.md (su): New iterator.
41947 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
41948 (@pred_mulh<v_su><mode>_scalar): Ditto.
41949 (*pred_mulh<v_su><mode>_scalar): Ditto.
41950 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
41952 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
41954 * config/riscv/iterators.md: Add sign_extend/zero_extend.
41955 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
41957 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
41958 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
41961 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
41962 for vsext/vzext support.
41963 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
41965 (DEF_RVV_QEXTI_OPS): Ditto.
41966 (DEF_RVV_OEXTI_OPS): Ditto.
41967 (DEF_RVV_WEXTU_OPS): Ditto.
41968 (DEF_RVV_QEXTU_OPS): Ditto.
41969 (DEF_RVV_OEXTU_OPS): Ditto.
41970 (vint16mf4_t): Ditto.
41971 (vint16mf2_t): Ditto.
41972 (vint16m1_t): Ditto.
41973 (vint16m2_t): Ditto.
41974 (vint16m4_t): Ditto.
41975 (vint16m8_t): Ditto.
41976 (vint32mf2_t): Ditto.
41977 (vint32m1_t): Ditto.
41978 (vint32m2_t): Ditto.
41979 (vint32m4_t): Ditto.
41980 (vint32m8_t): Ditto.
41981 (vint64m1_t): Ditto.
41982 (vint64m2_t): Ditto.
41983 (vint64m4_t): Ditto.
41984 (vint64m8_t): Ditto.
41985 (vuint16mf4_t): Ditto.
41986 (vuint16mf2_t): Ditto.
41987 (vuint16m1_t): Ditto.
41988 (vuint16m2_t): Ditto.
41989 (vuint16m4_t): Ditto.
41990 (vuint16m8_t): Ditto.
41991 (vuint32mf2_t): Ditto.
41992 (vuint32m1_t): Ditto.
41993 (vuint32m2_t): Ditto.
41994 (vuint32m4_t): Ditto.
41995 (vuint32m8_t): Ditto.
41996 (vuint64m1_t): Ditto.
41997 (vuint64m2_t): Ditto.
41998 (vuint64m4_t): Ditto.
41999 (vuint64m8_t): Ditto.
42000 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
42001 (DEF_RVV_QEXTI_OPS): Ditto.
42002 (DEF_RVV_OEXTI_OPS): Ditto.
42003 (DEF_RVV_WEXTU_OPS): Ditto.
42004 (DEF_RVV_QEXTU_OPS): Ditto.
42005 (DEF_RVV_OEXTU_OPS): Ditto.
42006 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
42008 (rvv_arg_type_info::get_tree_type): Ditto.
42009 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
42010 * config/riscv/vector-iterators.md (z): New attribute.
42011 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
42012 (@pred_<optab><mode>_vf4): Ditto.
42013 (@pred_<optab><mode>_vf8): Ditto.
42015 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42017 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
42018 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
42019 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
42020 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42021 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
42025 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
42030 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
42031 (@pred_<optab><mode>_scalar): New pattern.
42032 (*pred_<optab><mode>_scalar): New pattern.
42033 (*pred_<optab><mode>_extended_scalar): New pattern.
42035 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42037 * config/riscv/iterators.md: Add neg and not.
42038 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
42040 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42041 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
42062 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
42063 (struct alu_def): Ditto.
42065 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42066 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
42067 * config/riscv/vector-iterators.md: New iterator.
42068 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
42070 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42072 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
42074 2023-02-11 Jakub Jelinek <jakub@redhat.com>
42077 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
42078 item->offset bit position is too large to be representable as
42079 unsigned int byte position.
42081 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
42083 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
42085 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
42087 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
42088 valid_combine only when ira_use_lra_p is true.
42090 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
42092 * params.opt (ira-simple-lra-insn-threshold): Add new param.
42093 * ira.cc (ira): Use the param to switch on simple LRA.
42095 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
42097 PR tree-optimization/108687
42098 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
42099 back to RFD_NONE mode for calculations.
42100 (ranger_cache::propagate_cache): Call the internal edge range API
42101 with RFD_READ_ONLY instead of changing the external routine.
42103 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
42105 PR tree-optimization/108520
42106 * gimple-range-infer.cc (check_assume_func): Invoke
42107 gimple_range_global directly instead using global_range_query.
42108 * value-query.cc (get_range_global): Add function context and
42109 avoid calling nonnull_arg_p if not cfun.
42110 (gimple_range_global): Add function context pointer.
42111 * value-query.h (imple_range_global): Add function context.
42113 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42115 * config/riscv/constraints.md (Wdm): Adjust constraint.
42116 (Wbr): New constraint.
42117 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
42118 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
42119 (emit_vlmax_op): New function.
42120 (emit_nonvlmax_op): Ditto.
42122 (neg_simm5_p): Ditto.
42123 (has_vi_variant_p): Ditto.
42124 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
42125 (emit_vlmax_op): New function.
42126 (emit_nonvlmax_op): Ditto.
42127 (expand_const_vector): Adjust function.
42128 (legitimize_move): Ditto.
42129 (simm32_p): New function.
42131 (neg_simm5_p): Ditto.
42132 (has_vi_variant_p): Ditto.
42133 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
42135 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
42136 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
42139 (vminu): Remove signed cases.
42141 (vdiv): Remove unsigned cases.
42143 (vdivu): Remove signed cases.
42147 (vrsub): New class.
42152 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
42153 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
42154 * config/riscv/vector-iterators.md: New iterators.
42155 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
42157 (@pred_<optab><mode>_scalar): New pattern.
42158 (@pred_sub<mode>_reverse_scalar): Ditto.
42159 (*pred_<optab><mode>_scalar): Ditto.
42160 (*pred_<optab><mode>_extended_scalar): Ditto.
42161 (*pred_sub<mode>_reverse_scalar): Ditto.
42162 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
42164 2023-02-10 Richard Biener <rguenther@suse.de>
42166 PR tree-optimization/108724
42167 * tree-vect-stmts.cc (vectorizable_operation): Avoid
42168 using word_mode vectors when vector lowering will
42169 decompose them to elementwise operations.
42171 2023-02-10 Jakub Jelinek <jakub@redhat.com>
42174 2023-02-09 Martin Liska <mliska@suse.cz>
42177 * doc/extend.texi: Document that the function
42178 does not work correctly for old VIA processors.
42180 2023-02-10 Andrew Pinski <apinski@marvell.com>
42181 Andrew Macleod <amacleod@redhat.com>
42183 PR tree-optimization/108684
42184 * tree-ssa-dce.cc (simple_dce_from_worklist):
42185 Check all ssa names and not just non-vdef ones
42186 before accepting the inline-asm.
42187 Call unlink_stmt_vdef on the statement before
42190 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
42192 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
42193 * ira.cc (validate_equiv_mem): Check memref address variance.
42194 (no_equiv): Clear caller_save_p flag.
42195 (update_equiv_regs): Define caller save equivalence for
42197 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
42198 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
42199 call_save_p. Use caller save equivalence depending on the arg.
42200 (split_reg): Adjust the call.
42202 2023-02-09 Jakub Jelinek <jakub@redhat.com>
42205 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
42206 (cpu_indicator_init): Call get_available_features for all CPUs with
42207 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
42210 2023-02-09 Jakub Jelinek <jakub@redhat.com>
42212 PR tree-optimization/108688
42213 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
42214 of BIT_INSERT_EXPR extracting exactly all inserted bits even
42215 when without mode precision. Formatting fixes.
42217 2023-02-09 Andrew Pinski <apinski@marvell.com>
42219 PR tree-optimization/108688
42220 * match.pd (bit_field_ref [bit_insert]): Avoid generating
42221 BIT_FIELD_REFs of non-mode-precision integral operands.
42223 2023-02-09 Martin Liska <mliska@suse.cz>
42226 * doc/extend.texi: Document that the function
42227 does not work correctly for old VIA processors.
42229 2023-02-09 Andreas Schwab <schwab@suse.de>
42231 * lto-wrapper.cc (merge_and_complain): Handle
42232 -funwind-tables and -fasynchronous-unwind-tables.
42233 (append_compiler_options): Likewise.
42235 2023-02-09 Richard Biener <rguenther@suse.de>
42237 PR tree-optimization/26854
42238 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
42239 view around insert_updated_phi_nodes_for.
42240 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
42242 (walk_aliased_vdefs_1): Likewise.
42244 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
42246 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
42248 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
42251 * config.gcc (tm_mlib_file): Define new variable.
42253 2023-02-08 Jakub Jelinek <jakub@redhat.com>
42255 PR tree-optimization/108692
42256 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
42257 widened_code which is different from code, don't call
42258 vect_look_through_possible_promotion but instead just check op is
42259 SSA_NAME with integral type for which vect_is_simple_use is true
42260 and call set_op on this_unprom.
42262 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
42264 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
42266 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
42268 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
42269 to 'aarch_ra_sign_key'.
42270 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
42272 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
42273 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
42274 * config/arm/arm.opt: Define.
42276 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
42278 PR tree-optimization/108316
42279 * tree-vect-stmts.cc (get_load_store_type): When using
42280 internal functions for gather/scatter, make sure that the type
42281 of the offset argument is consistent with the offset vector type.
42283 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
42286 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
42288 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
42289 * ira.cc (validate_equiv_mem): Check memref address variance.
42290 (update_equiv_regs): Define caller save equivalence for
42292 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
42293 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
42294 call_save_p. Use caller save equivalence depending on the arg.
42295 (split_reg): Adjust the call.
42297 2023-02-08 Jakub Jelinek <jakub@redhat.com>
42299 * tree.def (SAD_EXPR): Remove outdated comment about missing
42302 2023-02-07 Marek Polacek <polacek@redhat.com>
42304 * doc/invoke.texi: Update -fchar8_t documentation.
42306 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
42308 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
42309 * ira.cc (validate_equiv_mem): Check memref address variance.
42310 (update_equiv_regs): Define caller save equivalence for
42312 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
42313 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
42314 call_save_p. Use caller save equivalence depending on the arg.
42315 (split_reg): Adjust the call.
42317 2023-02-07 Richard Biener <rguenther@suse.de>
42319 PR tree-optimization/26854
42320 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
42321 instead of immediate uses.
42323 2023-02-07 Jakub Jelinek <jakub@redhat.com>
42325 PR tree-optimization/106923
42326 * ipa-split.cc (execute_split_functions): Don't split returns_twice
42329 2023-02-07 Jakub Jelinek <jakub@redhat.com>
42331 PR tree-optimization/106433
42332 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
42333 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
42335 2023-02-07 Jan Hubicka <jh@suse.cz>
42337 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
42340 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
42342 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
42343 (process_asm): Create a constructor for GCN_STACK_SIZE.
42344 (main): Parse the -mstack-size option.
42346 2023-02-06 Alex Coplan <alex.coplan@arm.com>
42349 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
42350 Use correct constraint for operand 3.
42352 2023-02-06 Martin Jambor <mjambor@suse.cz>
42354 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
42356 2023-02-06 Xi Ruoyao <xry111@xry111.site>
42358 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
42359 New define_int_iterator.
42360 (bytepick_d_ashift_amount): Likewise.
42361 (bytepick_imm): New define_int_attr.
42362 (bytepick_w_lshiftrt_amount): Likewise.
42363 (bytepick_d_lshiftrt_amount): Likewise.
42364 (bytepick_w_<bytepick_imm>): New define_insn template.
42365 (bytepick_w_<bytepick_imm>_extend): Likewise.
42366 (bytepick_d_<bytepick_imm>): Likewise.
42367 (bytepick_w): Remove unused define_insn.
42368 (bytepick_d): Likewise.
42369 (UNSPEC_BYTEPICK_W): Remove unused unspec.
42370 (UNSPEC_BYTEPICK_D): Likewise.
42371 * config/loongarch/predicates.md (const_0_to_3_operand):
42372 Remove unused define_predicate.
42373 (const_0_to_7_operand): Likewise.
42375 2023-02-06 Jakub Jelinek <jakub@redhat.com>
42377 PR tree-optimization/108655
42378 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
42379 or -fsanitize=unreachable -fsanitize-trap=unreachable return
42380 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
42382 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
42384 * doc/install.texi (Specific): Remove PW32.
42386 2023-02-03 Jakub Jelinek <jakub@redhat.com>
42388 PR tree-optimization/108647
42389 * range-op.cc (operator_equal::op1_range,
42390 operator_not_equal::op1_range): Don't test op2 bound
42391 equality if op2.undefined_p (), instead set_varying.
42392 (operator_lt::op1_range, operator_le::op1_range,
42393 operator_gt::op1_range, operator_ge::op1_range): Return false if
42394 op2.undefined_p ().
42395 (operator_lt::op2_range, operator_le::op2_range,
42396 operator_gt::op2_range, operator_ge::op2_range): Return false if
42397 op1.undefined_p ().
42399 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
42401 PR tree-optimization/108639
42402 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
42404 (irange::operator==): Same.
42406 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
42408 PR tree-optimization/108647
42409 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
42410 (foperator_lt::op2_range): Same.
42411 (foperator_le::op1_range): Same.
42412 (foperator_le::op2_range): Same.
42413 (foperator_gt::op1_range): Same.
42414 (foperator_gt::op2_range): Same.
42415 (foperator_ge::op1_range): Same.
42416 (foperator_ge::op2_range): Same.
42417 (foperator_unordered_lt::op1_range): Same.
42418 (foperator_unordered_lt::op2_range): Same.
42419 (foperator_unordered_le::op1_range): Same.
42420 (foperator_unordered_le::op2_range): Same.
42421 (foperator_unordered_gt::op1_range): Same.
42422 (foperator_unordered_gt::op2_range): Same.
42423 (foperator_unordered_ge::op1_range): Same.
42424 (foperator_unordered_ge::op2_range): Same.
42426 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
42428 PR tree-optimization/107570
42429 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
42431 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
42433 * doc/gm2.texi (Internals): Remove from menu.
42434 (Using): Comment out ifnohtml conditional.
42435 (Documentation): Use gcc url.
42436 (License): Node simplified.
42437 (Copying): New node. Include gpl_v3_without_node.
42438 (Contributing): Node simplified.
42439 (Internals): Commented out.
42440 (Libraries): Node simplified.
42443 (Functions): Ditto.
42445 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
42447 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
42449 (mve_vqshluq_m_n_s<mode>): Likewise.
42450 (mve_vshlq_m_<supf><mode>): Likewise.
42451 (mve_vsriq_m_n_<supf><mode>): Likewise.
42452 (mve_vsubq_m_<supf><mode>): Likewise.
42454 2023-02-03 Martin Jambor <mjambor@suse.cz>
42457 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
42458 when comparing to an IPA-CP value.
42459 (dump_list_of_param_indices): New function.
42460 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
42461 Dump removed candidates using dump_list_of_param_indices.
42462 * ipa-param-manipulation.cc
42463 (ipa_param_body_adjustments::modify_expression): Add assert checking
42464 sizes of a VIEW_CONVERT_EXPR will match.
42465 (ipa_param_body_adjustments::modify_assignment): Likewise.
42467 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
42469 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
42470 * config/riscv/riscv.cc: Ditto.
42472 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42474 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
42478 * config/riscv/vector.md: Ditto.
42480 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42482 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
42483 * config/riscv/riscv-vector-builtins-bases.cc: New class.
42484 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
42487 * config/riscv/riscv-vector-builtins.cc: Ditto.
42488 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
42490 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
42492 * toplev.cc (toplev::main): Only print the version information header
42493 from toplevel main().
42495 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
42497 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
42498 cond_{ashl|ashr|lshr}
42500 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
42502 PR rtl-optimization/108086
42503 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
42504 Adjust size-related commentary accordingly.
42506 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
42508 PR rtl-optimization/108508
42509 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
42510 the splay tree search gives the first clobber in the second group,
42511 make sure that the root of the first clobber group is updated
42512 correctly. Enter the new clobber group into the definition splay
42515 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
42517 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
42518 Fix finding best match score.
42520 2023-02-02 Jakub Jelinek <jakub@redhat.com>
42523 PR rtl-optimization/108463
42525 * cselib.cc (cselib_current_insn): Move declaration earlier.
42526 (cselib_hasher::equal): For debug only locs, temporarily override
42527 cselib_current_insn to their l->setting_insn for the
42528 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
42529 promote some debug locs.
42530 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
42531 when using cselib call cselib_lookup_from_insn on the address but
42532 don't substitute it.
42534 2023-02-02 Richard Biener <rguenther@suse.de>
42536 PR middle-end/108625
42537 * genmatch.cc (expr::gen_transform): Also disallow resimplification
42538 from pushing to lseq with force_leaf.
42539 (dt_simplify::gen_1): Likewise.
42541 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
42543 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
42544 (struct kernargs): Replace the common content with kernargs_abi.
42545 (struct heap): Delete.
42546 (main): Read GCN_STACK_SIZE envvar.
42547 Allocate space for the device stacks.
42548 Write the new kernargs fields.
42549 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
42550 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
42551 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
42552 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
42553 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
42554 Set up the stacks from the values in the kernargs, not private.
42555 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
42556 (gcn_hsa_declare_function_name): Turn off the private segment.
42557 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
42558 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
42559 * config/gcn/gcn.opt (mstack-size): Change the description.
42561 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
42564 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
42565 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
42566 addressing MVE predicate modes.
42567 (mve_bool_vec_to_const): Change to represent correct MVE predicate
42569 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
42571 (arm_vector_mode_supported_p): Likewise.
42572 (arm_mode_to_pred_mode): Add V2QI.
42573 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
42575 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
42576 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
42577 (v2qi_UP): New macro.
42578 (v4bi_UP): New macro.
42579 (v8bi_UP): New macro.
42580 (v16bi_UP): New macro.
42581 (arm_expand_builtin_args): Make it able to expand the new predicate
42583 * config/arm/arm-modes.def (V2QI): New mode.
42584 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
42585 Pred4x4_t): Remove unused predicate builtin types.
42586 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
42587 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
42588 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
42589 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
42590 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
42591 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
42592 of MODE_VECTOR_BOOL.
42593 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
42594 (MVE_VPRED): Likewise.
42595 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
42596 (MVE_vctp): New mode attribute.
42600 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
42601 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
42603 (mve_vpnothi): Rename this...
42604 (mve_vpnotv16bi): ... to this.
42605 (mve_vctp<mode1>q_mhi): Rename this...
42606 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
42607 (mve_vldrdq_gather_base_z_<supf>v2di,
42608 mve_vldrdq_gather_offset_z_<supf>v2di,
42609 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
42610 mve_vstrdq_scatter_base_p_<supf>v2di,
42611 mve_vstrdq_scatter_offset_p_<supf>v2di,
42612 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
42613 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
42614 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
42615 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
42616 mve_vldrdq_gather_base_wb_z_<supf>v2di,
42617 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
42618 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
42620 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
42622 (VCTP): ... with this.
42623 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
42624 (VCTP_M): ... with this.
42625 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
42626 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
42628 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
42631 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
42632 (arm_modes_tieable_p): Make MVE predicate modes tieable.
42633 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
42634 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
42635 simplify_subreg to simplify subregs where the outermode is not scalar.
42637 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
42640 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
42641 new qualifiers parameter and use unsigned short type for MVE predicate.
42642 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
42644 (arm_init_crypto_builtins): Likewise.
42646 2023-02-02 Jakub Jelinek <jakub@redhat.com>
42649 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
42650 * internal-fn.def (TRAP): Remove.
42651 * internal-fn.cc (expand_TRAP): Remove.
42652 * tree.cc (build_common_builtin_nodes): Define
42653 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
42654 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
42655 instead of BUILT_IN_TRAP.
42656 * gimple.cc (gimple_build_builtin_unreachable): Remove
42657 emitting internal function for BUILT_IN_TRAP.
42658 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
42659 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
42660 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
42661 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
42662 BUILT_IN_UNREACHABLE_TRAP.
42663 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
42664 * tree-cfg.cc (verify_gimple_call,
42665 pass_warn_function_return::execute): Likewise.
42666 * attribs.cc (decl_attributes): Don't report exclusions on
42667 BUILT_IN_UNREACHABLE_TRAP either.
42669 2023-02-02 liuhongt <hongtao.liu@intel.com>
42671 PR tree-optimization/108601
42672 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
42673 * tree-vect-loop.cc
42674 (vectorizable_nonlinear_induction): Remove
42675 vect_can_peel_nonlinear_iv_p.
42676 (vect_can_peel_nonlinear_iv_p): Don't peel
42677 nonlinear iv(mult or shift) for epilog when vf is not
42678 constant and moved the defination to ..
42679 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
42682 2023-02-02 Jakub Jelinek <jakub@redhat.com>
42684 PR middle-end/108435
42685 * tree-nested.cc (convert_nonlocal_omp_clauses)
42686 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
42687 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
42688 before calling declare_vars.
42689 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
42690 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
42691 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
42692 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
42694 2023-02-01 Tamar Christina <tamar.christina@arm.com>
42696 * common/config/aarch64/aarch64-common.cc
42697 (struct aarch64_option_extension): Add native_detect and document struct
42699 (all_extensions): Set new field native_detect.
42700 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
42703 2023-02-01 Martin Liska <mliska@suse.cz>
42705 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
42708 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
42710 PR tree-optimization/108356
42711 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
42712 do a search of the DOM tree for a range.
42714 2023-02-01 Martin Liska <mliska@suse.cz>
42717 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
42718 ony non-null values.
42719 * ipa.cc (walk_polymorphic_call_targets): Likewise.
42721 2023-02-01 Martin Liska <mliska@suse.cz>
42724 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
42727 2023-02-01 Jakub Jelinek <jakub@redhat.com>
42730 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
42731 subregs in DEBUG_INSNs.
42733 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
42735 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
42737 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
42739 * config/s390/s390.cc (s390_restore_gpr_p): New function.
42740 (s390_preserve_gpr_arg_in_range_p): New function.
42741 (s390_preserve_gpr_arg_p): New function.
42742 (s390_preserve_fpr_arg_p): New function.
42743 (s390_register_info_stdarg_fpr): Rename to ...
42744 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
42745 (s390_register_info_stdarg_gpr): Rename to ...
42746 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
42747 (s390_register_info): Use the renamed functions above.
42748 (s390_optimize_register_info): Likewise.
42749 (save_fpr): Generate CFI for -mpreserve-args.
42750 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
42751 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
42752 (s390_optimize_prologue): Likewise.
42753 * config/s390/s390.opt: New option -mpreserve-args
42755 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
42757 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
42758 (restore_gprs): Likewise.
42759 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
42760 frame pointer if a frame-pointer is used.
42761 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
42762 * config/s390/s390.md (stack_tie): Add a register operand and
42764 (@stack_tie<mode>): ... this.
42766 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
42768 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
42769 EMIT_CFI parameter.
42770 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
42771 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
42773 2023-02-01 Richard Biener <rguenther@suse.de>
42775 PR middle-end/108500
42776 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
42777 with tree traversal algorithm.
42779 2023-02-01 Jason Merrill <jason@redhat.com>
42781 * doc/invoke.texi: Document -Wno-changes-meaning.
42783 2023-02-01 David Malcolm <dmalcolm@redhat.com>
42785 * doc/invoke.texi (Static Analyzer Options): Add notes about
42786 limitations of -fanalyzer.
42788 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42790 * config/riscv/constraints.md (vj): New.
42792 * config/riscv/iterators.md: Add more opcode.
42793 * config/riscv/predicates.md (vector_arith_operand): New.
42794 (vector_neg_arith_operand): New.
42795 (vector_shift_operand): New.
42796 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
42797 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
42814 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
42831 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
42832 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
42833 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
42834 (DEF_RVV_U_OPS): New.
42835 (rvv_arg_type_info::get_base_vector_type): Handle
42836 RVV_BASE_shift_vector.
42837 (rvv_arg_type_info::get_tree_type): Ditto.
42838 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
42839 RVV_BASE_shift_vector.
42840 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
42841 * config/riscv/vector-iterators.md: Handle more opcode.
42842 * config/riscv/vector.md (@pred_<optab><mode>): New.
42844 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
42847 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
42850 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
42852 PR tree-optimization/108608
42853 * tree-vect-loop.cc (vect_transform_reduction): Handle single
42854 def-use cycles that involve function calls rather than tree codes.
42856 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
42858 PR tree-optimization/108385
42859 * gimple-range-gori.cc (gori_compute::compute_operand_range):
42860 Allow VARYING computations to continue if there is a relation.
42861 * range-op.cc (pointer_plus_operator::op2_range): New.
42863 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
42865 PR tree-optimization/108359
42866 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
42867 (range_operator::fold_range): If op1 is equivalent to op2 then
42868 invoke new fold_in_parts_equiv to operate on sub-components.
42869 * range-op.h (wi_fold_in_parts_equiv): New prototype.
42871 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
42873 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
42874 not abort calculations if there is a valid relation available.
42875 (gori_compute::refine_using_relation): Pass correct relation trio.
42876 (gori_compute::compute_operand1_range): Create trio and use it.
42877 (gori_compute::compute_operand2_range): Ditto.
42878 * range-op.cc (operator_plus::op1_range): Use correct trio member.
42879 (operator_minus::op1_range): Use correct trio member.
42880 * value-relation.cc (value_relation::create_trio): New.
42881 * value-relation.h (value_relation::create_trio): New prototype.
42883 2023-01-31 Jakub Jelinek <jakub@redhat.com>
42886 * config/i386/i386-expand.cc
42887 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
42888 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
42889 equal to bitsize of mode.
42891 2023-01-31 Jakub Jelinek <jakub@redhat.com>
42893 PR rtl-optimization/108596
42894 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
42895 ends with asm goto and has a crossing fallthrough edge to the same bb
42896 that contains at least one of its labels by restoring EDGE_CROSSING
42897 flag even on possible edge from cur_bb to new_bb successor.
42899 2023-01-31 Jakub Jelinek <jakub@redhat.com>
42902 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
42903 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
42904 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
42905 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
42906 uninitialized automatic variable __W.
42908 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
42910 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
42912 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
42914 * config/riscv/riscv-protos.h (get_vector_mode): New function.
42915 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
42916 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
42917 (class loadstore): Adjust for indexed loads/stores support.
42919 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
42920 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
42936 * config/riscv/riscv-vector-builtins-shapes.cc
42937 (struct indexed_loadstore_def): New class.
42939 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
42940 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
42941 for indexed loads/stores support.
42942 (check_required_extensions): Ditto.
42943 (rvv_arg_type_info::get_base_vector_type): New function.
42944 (rvv_arg_type_info::get_tree_type): Ditto.
42945 (function_builder::add_unique_function): Adjust for indexed loads/stores
42947 (function_expander::use_exact_insn): New function.
42948 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
42949 indexed loads/stores support.
42950 (struct rvv_arg_type_info): Ditto.
42951 (function_expander::index_mode): New function.
42952 (function_base::apply_tail_policy_p): Ditto.
42953 (function_base::apply_mask_policy_p): Ditto.
42954 * config/riscv/vector-iterators.md (unspec): New unspec.
42955 * config/riscv/vector.md (unspec): Ditto.
42956 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
42958 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
42959 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
42960 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
42961 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
42962 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
42963 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
42964 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
42965 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
42966 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
42967 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
42968 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
42969 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
42970 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
42972 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
42974 * config.gcc: Recognize x86_64-*-gnu* targets and include
42976 * config/i386/gnu64.h: Define configuration for new target
42977 including ld.so location.
42979 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
42981 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
42982 ampere1a to include SM4.
42984 2023-01-30 Andrew Pinski <apinski@marvell.com>
42986 PR tree-optimization/108582
42987 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
42988 for middlebb to have no phi nodes.
42990 2023-01-30 Richard Biener <rguenther@suse.de>
42992 PR tree-optimization/108574
42993 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
42994 sameval and def, ignore the equivalence if there's the
42995 danger of oscillating between two values.
42997 2023-01-30 Andreas Schwab <schwab@suse.de>
42999 * common/config/riscv/riscv-common.cc
43000 (riscv_option_optimization_table)
43001 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
43002 -fasynchronous-unwind-tables and -funwind-tables.
43003 * config.gcc (riscv*-*-linux*): Define
43004 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
43006 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
43008 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
43009 value of includedir.
43011 2023-01-30 Richard Biener <rguenther@suse.de>
43014 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
43017 2023-01-30 liuhongt <hongtao.liu@intel.com>
43019 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
43020 * doc/invoke.texi: Ditto.
43022 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
43024 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
43025 (stmt_may_terminate_function_p): If assuming return or EH
43026 volatile asm is safe.
43027 (find_always_executed_bbs): Fix handling of terminating BBS and
43028 infinite loops; add debug output.
43029 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
43031 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
43033 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
43034 off-by-one in checking the permissible shift-amount.
43036 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
43038 * doc/extend.texi (Named Address Spaces): Update link to the
43041 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
43043 * doc/standards.texi (Standards): Fix markup.
43045 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
43047 * doc/standards.texi (Standards): Update link to Objective-C book.
43049 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
43051 * doc/invoke.texi (Instrumentation Options): Update reference to
43054 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
43056 * doc/standards.texi: Update Go1 link.
43058 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43060 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
43061 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
43064 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43065 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
43067 * config/riscv/riscv-vector-builtins.cc
43068 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
43069 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
43070 (@pred_strided_store<mode>): Ditto.
43072 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43074 * config/riscv/vector.md (tail_policy_op_idx): Remove.
43075 (mask_policy_op_idx): Remove.
43076 (avl_type_op_idx): Remove.
43078 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
43080 PR tree-optimization/96373
43081 * tree.h (sign_mask_for): Declare.
43082 * tree.cc (sign_mask_for): New function.
43083 (signed_or_unsigned_type_for): For vector types, try to use the
43084 related_int_vector_mode.
43085 * genmatch.cc (commutative_op): Handle conditional internal functions.
43086 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
43088 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
43090 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
43091 Use the likely minimum VF when bounding the denominators to
43092 the estimated number of iterations.
43094 2023-01-27 Richard Biener <rguenther@suse.de>
43097 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
43098 and -Ofast FP environment side-effects.
43100 2023-01-27 Richard Biener <rguenther@suse.de>
43103 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
43104 Don't add crtfastmath.o for -shared.
43106 2023-01-27 Richard Biener <rguenther@suse.de>
43109 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
43112 2023-01-27 Richard Biener <rguenther@suse.de>
43115 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
43116 crtfastmath.o for -shared.
43118 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
43120 PR tree-optimization/108306
43121 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
43122 varying for shifts that are always out of void range.
43123 (operator_rshift::fold_range): Return [0, 0] not
43124 varying for shifts that are always out of void range.
43126 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
43128 PR tree-optimization/108447
43129 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
43130 Do not attempt to fold HONOR_NAN types.
43132 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43134 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
43135 Remove _m suffix for "vop_m" C++ overloaded API name.
43137 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43139 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
43140 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
43141 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
43143 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
43144 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
43145 (vbool64_t): Ditto.
43146 (vbool32_t): Ditto.
43147 (vbool16_t): Ditto.
43152 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
43153 (rvv_arg_type_info::get_tree_type): Ditto.
43154 (function_expander::use_contiguous_load_insn): Ditto.
43155 * config/riscv/vector.md (@pred_store<mode>): Ditto.
43157 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43159 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
43160 (vsetvl_discard_result_insn_p): New function.
43161 (reg_killed_by_bb_p): rename to find_reg_killed_by.
43162 (find_reg_killed_by): New name.
43163 (get_vl): allow it to be called by more functions.
43164 (has_vsetvl_killed_avl_p): Add condition.
43165 (get_avl): allow it to be called by more functions.
43166 (insn_should_be_added_p): New function.
43167 (get_all_nonphi_defs): Refine function.
43168 (get_all_sets): Ditto.
43169 (get_same_bb_set): New function.
43170 (any_insn_in_bb_p): Ditto.
43171 (any_set_in_bb_p): Ditto.
43172 (get_vl_vtype_info): Add VLMAX forward optimization.
43173 (source_equal_p): Fix issues.
43174 (extract_single_source): Refine.
43175 (avl_info::multiple_source_equal_p): New function.
43176 (avl_info::operator==): Adjust for final version.
43177 (vl_vtype_info::operator==): Ditto.
43178 (vl_vtype_info::same_avl_p): Ditto.
43179 (vector_insn_info::parse_insn): Ditto.
43180 (vector_insn_info::available_p): New function.
43181 (vector_insn_info::merge): Adjust for final version.
43182 (vector_insn_info::dump): Add hard_empty.
43183 (pass_vsetvl::hard_empty_block_p): New function.
43184 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
43185 (pass_vsetvl::forward_demand_fusion): Ditto.
43186 (pass_vsetvl::demand_fusion): Ditto.
43187 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
43188 (pass_vsetvl::compute_local_properties): Adjust for final version.
43189 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
43190 (pass_vsetvl::refine_vsetvls): Ditto.
43191 (pass_vsetvl::commit_vsetvls): Ditto.
43192 (pass_vsetvl::propagate_avl): New function.
43193 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
43194 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
43196 2023-01-27 Jakub Jelinek <jakub@redhat.com>
43199 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
43200 from size_t to int.
43202 2023-01-27 Jakub Jelinek <jakub@redhat.com>
43205 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
43206 redirection of calls to __builtin_trap in addition to redirection
43207 to __builtin_unreachable.
43209 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43211 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
43213 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43215 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
43216 (emit_vsetvl_insn): Ditto.
43218 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43220 * config/riscv/vector.md: Fix constraints.
43222 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43224 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
43226 2023-01-27 Patrick Palka <ppalka@redhat.com>
43227 Jakub Jelinek <jakub@redhat.com>
43229 * tree-core.h (tree_code_type, tree_code_length): For
43230 C++17 and later, add inline keyword, otherwise don't define
43231 the arrays, but declare extern arrays.
43232 * tree.cc (tree_code_type, tree_code_length): Define these
43233 arrays for C++14 and older.
43235 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43237 * config/riscv/riscv-vsetvl.h: Change it into public.
43239 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43241 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
43244 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43246 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
43248 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43250 * config/riscv/vector.md: Fix incorrect attributes.
43252 2023-01-27 Richard Biener <rguenther@suse.de>
43255 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
43256 Don't add crtfastmath.o for -shared.
43258 2023-01-27 Alexandre Oliva <oliva@gnu.org>
43260 * doc/options.texi (option, RejectNegative): Mention that
43261 -g-started options are also implicitly negatable.
43263 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
43265 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
43266 Use get_typenode_from_name to get fixed-width integer type
43268 * config/riscv/riscv-vector-builtins.def: Update define with
43269 fixed-width integer type nodes.
43271 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43273 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
43274 (real_insn_and_same_bb_p): New function.
43275 (same_bb_and_after_or_equal_p): Remove it.
43276 (before_p): New function.
43277 (reg_killed_by_bb_p): Ditto.
43278 (has_vsetvl_killed_avl_p): Ditto.
43279 (get_vl): Move location so that we can call it.
43280 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
43281 (available_occurrence_p): Ditto.
43282 (dominate_probability_p): Remove it.
43283 (can_backward_propagate_p): Remove it.
43284 (get_all_nonphi_defs): New function.
43285 (get_all_predecessors): Ditto.
43286 (any_insn_in_bb_p): Ditto.
43287 (insert_vsetvl): Adjust AVL REG.
43288 (source_equal_p): New function.
43289 (extract_single_source): Ditto.
43290 (avl_info::single_source_equal_p): Ditto.
43291 (avl_info::operator==): Adjust for AVL=REG.
43292 (vl_vtype_info::same_avl_p): Ditto.
43293 (vector_insn_info::set_demand_info): Remove it.
43294 (vector_insn_info::compatible_p): Adjust for AVL=REG.
43295 (vector_insn_info::compatible_avl_p): New function.
43296 (vector_insn_info::merge): Adjust AVL=REG.
43297 (vector_insn_info::dump): Ditto.
43298 (pass_vsetvl::merge_successors): Remove it.
43299 (enum fusion_type): New enum.
43300 (pass_vsetvl::get_backward_fusion_type): New function.
43301 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
43302 (pass_vsetvl::forward_demand_fusion): Ditto.
43303 (pass_vsetvl::demand_fusion): Ditto.
43304 (pass_vsetvl::prune_expressions): Ditto.
43305 (pass_vsetvl::compute_local_properties): Ditto.
43306 (pass_vsetvl::cleanup_vsetvls): Ditto.
43307 (pass_vsetvl::commit_vsetvls): Ditto.
43308 (pass_vsetvl::init): Ditto.
43309 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
43310 (enum merge_type): New enum.
43312 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43314 * config/riscv/riscv-vsetvl.cc
43315 (vector_infos_manager::vector_infos_manager): Add probability.
43316 (vector_infos_manager::dump): Ditto.
43317 (pass_vsetvl::compute_probabilities): Ditto.
43318 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
43320 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43322 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
43323 (vector_insn_info::merge): Ditto.
43324 (vector_insn_info::dump): Ditto.
43325 (pass_vsetvl::merge_successors): Ditto.
43326 (pass_vsetvl::backward_demand_fusion): Ditto.
43327 (pass_vsetvl::forward_demand_fusion): Ditto.
43328 (pass_vsetvl::commit_vsetvls): Ditto.
43329 * config/riscv/riscv-vsetvl.h: Ditto.
43331 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43333 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
43336 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43338 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
43340 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43342 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
43343 Add pre-check for redundant flow.
43345 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43347 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
43348 (vector_infos_manager::free_bitmap_vectors): Ditto.
43349 (pass_vsetvl::pre_vsetvl): Adjust codes.
43350 * config/riscv/riscv-vsetvl.h: New function declaration.
43352 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43354 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
43355 (vector_insn_info::set_demand_info): New function.
43356 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
43357 (pass_vsetvl::merge_successors): Ditto.
43358 (pass_vsetvl::compute_global_backward_infos): Ditto.
43359 (pass_vsetvl::backward_demand_fusion): Ditto.
43360 (pass_vsetvl::forward_demand_fusion): Ditto.
43361 (pass_vsetvl::demand_fusion): New function.
43362 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
43363 * config/riscv/riscv-vsetvl.h: New function declaration.
43365 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43367 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
43369 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43371 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
43372 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
43374 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43376 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
43377 (backward_propagate_worthwhile_p): Fix non-worthwhile.
43379 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43381 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
43383 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43385 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
43386 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
43387 (pass_vsetvl::commit_vsetvls): Ditto.
43388 * config/riscv/riscv-vsetvl.h: New function declaration.
43390 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43392 * config/riscv/vector.md:
43394 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43396 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
43397 pred_store for vse.
43398 * config/riscv/riscv-vector-builtins.cc
43399 (function_expander::add_mem_operand): Refine function.
43400 (function_expander::use_contiguous_load_insn): Adjust new
43402 (function_expander::use_contiguous_store_insn): Ditto.
43403 * config/riscv/riscv-vector-builtins.h: Refine function.
43404 * config/riscv/vector.md (@pred_store<mode>): New pattern.
43406 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
43408 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
43410 2023-01-26 Marek Polacek <polacek@redhat.com>
43412 PR middle-end/108543
43413 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
43414 if it was previously set.
43416 2023-01-26 Jakub Jelinek <jakub@redhat.com>
43418 PR tree-optimization/108540
43419 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
43420 are singletons, use range_true even if op1 != op2
43421 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
43422 even if intersection of the ranges is empty and one has
43423 zero low bound and another zero high bound, use range_true_and_false
43424 rather than range_false.
43425 (foperator_not_equal::fold_range): If both op1 and op2
43426 are singletons, use range_false even if op1 != op2
43427 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
43428 even if intersection of the ranges is empty and one has
43429 zero low bound and another zero high bound, use range_true_and_false
43430 rather than range_true.
43432 2023-01-26 Jakub Jelinek <jakub@redhat.com>
43434 * value-relation.cc (kind_string): Add const.
43435 (rr_negate_table, rr_swap_table, rr_intersect_table,
43436 rr_union_table, rr_transitive_table): Add static const, change
43437 element type from relation_kind to unsigned char.
43438 (relation_negate, relation_swap, relation_intersect, relation_union,
43439 relation_transitive): Cast rr_*_table element to relation_kind.
43440 (relation_to_code): Add static const.
43441 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
43443 2023-01-26 Richard Biener <rguenther@suse.de>
43445 PR tree-optimization/108547
43446 * gimple-predicate-analysis.cc (value_sat_pred_p):
43449 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
43451 PR tree-optimization/108522
43452 * tree-object-size.cc (compute_object_offset): Make EXPR
43453 argument non-const. Call component_ref_field_offset.
43455 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
43457 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
43458 FEATURE_STRING field.
43460 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
43462 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
43464 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
43468 * gcc.cc: Provide default specs for Modula-2 so that when the
43469 language is not built-in better diagnostics are emitted for
43470 attempts to use .mod or .m2i file extensions.
43472 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
43474 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
43476 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
43478 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
43480 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
43482 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
43485 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
43487 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
43489 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
43491 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
43493 2023-01-25 Richard Biener <rguenther@suse.de>
43495 PR tree-optimization/108523
43496 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
43497 backedge value for the result when using predication to
43500 2023-01-25 Richard Biener <rguenther@suse.de>
43502 * doc/lto.texi (Command line options): Reword and update reference
43503 to removed lto_read_all_file_options.
43505 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
43507 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
43510 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
43512 * doc/contrib.texi: Add Jose E. Marchesi.
43514 2023-01-25 Jakub Jelinek <jakub@redhat.com>
43516 PR tree-optimization/108498
43517 * gimple-ssa-store-merging.cc (class store_operand_info):
43518 End coment with full stop rather than comma.
43519 (split_group): Likewise.
43520 (merged_store_group::apply_stores): Clear string_concatenation if
43521 start or end aren't on a byte boundary.
43523 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
43524 Jakub Jelinek <jakub@redhat.com>
43526 PR tree-optimization/108522
43527 * tree-object-size.cc (compute_object_offset): Use
43528 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
43530 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43532 * config/xtensa/xtensa.md:
43533 Fix exit from loops detecting references before overwriting in the
43536 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
43538 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
43539 do elimination but only for hard register.
43540 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
43541 calls of get_hard_regno.
43543 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
43545 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
43548 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
43551 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
43552 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
43555 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
43557 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
43558 and only include 'csky/t-csky-linux' when enable multilib.
43559 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
43560 define it when disable multilib.
43562 2023-01-24 Richard Biener <rguenther@suse.de>
43564 PR tree-optimization/108500
43565 * dominance.h (calculate_dominance_info): Add parameter
43566 to indicate fast-query compute, defaulted to true.
43567 * dominance.cc (calculate_dominance_info): Honor
43568 fast-query compute parameter.
43569 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
43570 not compute the dominator fast-query DFS numbers.
43572 2023-01-24 Eric Biggers <ebiggers@google.com>
43575 * optc-save-gen.awk: Fix copy-and-paste error.
43577 2023-01-24 Jakub Jelinek <jakub@redhat.com>
43580 * cgraphbuild.cc: Include gimplify.h.
43581 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
43582 their corresponding DECL_VALUE_EXPR expressions after unsharing.
43584 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43587 * config.gcc (tm_file): Move the variable out of loop.
43589 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
43590 Yang Yujie <yangyujie@loongson.cn>
43593 * config/loongarch/loongarch.cc (loongarch_classify_address):
43594 Add precessint for CONST_INT.
43595 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
43596 (loongarch_print_operand): Increase the processing of '%c'.
43597 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
43598 And port the public operand modifiers information to this document.
43600 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43602 * doc/invoke.texi (-mbranch-protection): Update documentation.
43604 2023-01-23 Richard Biener <rguenther@suse.de>
43607 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
43609 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
43610 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
43611 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
43612 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
43614 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43616 * config/arm/aout.h (ra_auth_code): Add entry in enum.
43617 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
43618 to dwarf frame expression.
43619 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
43620 (arm_expand_prologue): Update frame related information and reg notes
43621 for pac/pacbit insn.
43622 (arm_regno_class): Check for pac pseudo reigster.
43623 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
43624 (arm_init_machine_status): Set pacspval_needed to zero.
43625 (arm_debugger_regno): Check for PAC register.
43626 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
43628 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
43629 (arm_unwind_emit): Update REG_CFA_REGISTER case._
43630 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
43631 (DWARF_PAC_REGNUM): Define.
43632 (IS_PAC_REGNUM): Likewise.
43633 (enum reg_class): Add PAC_REG entry.
43634 (machine_function): Add pacbti_needed state to structure.
43635 * config/arm/arm.md (RA_AUTH_CODE): Define.
43637 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43639 * config.gcc ($tm_file): Update variable.
43640 * config/arm/arm-mlib.h: Create new header file.
43641 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
43642 multilib arch directory.
43643 (MULTILIB_REUSE): Add multilib reuse rules.
43644 (MULTILIB_MATCHES): Add multilib match rules.
43646 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43648 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
43649 * config/arm/arm-tables.opt: Regenerate.
43650 * config/arm/arm-tune.md: Likewise.
43651 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
43652 * (-mfix-cmse-cve-2021-35465): Likewise.
43654 2023-01-23 Richard Biener <rguenther@suse.de>
43656 PR tree-optimization/108482
43657 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
43658 .LOOP_DIST_ALIAS calls.
43660 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43662 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
43663 * config/arm/arm-protos.h: Update.
43664 * config/arm/aarch-common-protos.h: Declare
43665 'aarch_bti_arch_check'.
43666 * config/arm/arm.cc (aarch_bti_enabled) Update.
43667 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
43668 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
43669 * config/arm/arm.md (bti_nop): New insn.
43670 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
43671 (aarch-bti-insert.o): New target.
43672 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
43673 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
43675 (gate): Make use of 'aarch_bti_arch_check'.
43676 * config/arm/arm-passes.def: New file.
43677 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
43679 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43681 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
43682 'aarch-bti-insert.o'.
43683 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
43685 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
43686 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
43687 (aarch64_output_mi_thunk)
43688 (aarch64_print_patchable_function_entry)
43689 (aarch64_file_end_indicate_exec_stack): Update renamed function
43690 calls to renamed functions.
43691 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
43692 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
43694 * config/aarch64/aarch64-bti-insert.cc: Delete.
43695 * config/arm/aarch-bti-insert.cc: New file including and
43696 generalizing code from aarch64-bti-insert.cc.
43697 * config/arm/aarch-common-protos.h: Update.
43699 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43701 * config/arm/arm.h (arm_arch8m_main): Declare it.
43702 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
43704 * config/arm/arm.cc (arm_arch8m_main): Define it.
43705 (arm_option_reconfigure_globals): Set arm_arch8m_main.
43706 (arm_compute_frame_layout, arm_expand_prologue)
43707 (thumb2_expand_return, arm_expand_epilogue)
43708 (arm_conditional_register_usage): Update for pac codegen.
43709 (arm_current_function_pac_enabled_p): New function.
43710 (aarch_bti_enabled) New function.
43711 (use_return_insn): Return zero when pac is enabled.
43712 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
43714 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
43715 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
43717 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43719 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
43720 mbranch-protection.
43722 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43723 Tejas Belagod <tbelagod@arm.com>
43725 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
43726 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
43728 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43729 Tejas Belagod <tbelagod@arm.com>
43730 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
43732 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
43733 new pseudo register class _UVRSC_PAC.
43735 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43736 Tejas Belagod <tbelagod@arm.com>
43738 * config/arm/arm-c.cc (arm_cpu_builtins): Define
43739 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
43740 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
43742 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43743 Tejas Belagod <tbelagod@arm.com>
43745 * doc/sourcebuild.texi: Document arm_pacbti_hw.
43747 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43748 Tejas Belagod <tbelagod@arm.com>
43749 Richard Earnshaw <Richard.Earnshaw@arm.com>
43751 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
43752 -mbranch-protection option and initialize appropriate data structures.
43753 * config/arm/arm.opt (-mbranch-protection): New option.
43754 * doc/invoke.texi (Arm Options): Document it.
43756 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43757 Tejas Belagod <tbelagod@arm.com>
43759 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
43760 * config/arm/arm-cpus.in (pacbti): New feature.
43761 * doc/invoke.texi (Arm Options): Document it.
43763 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
43764 Tejas Belagod <tbelagod@arm.com>
43766 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
43767 (all_architectures): Fix comment.
43768 (aarch64_parse_extension): Rename return type, enum value names.
43769 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
43770 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
43771 Also rename corresponding enum values.
43772 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
43773 out aarch64_function_type and move it to common code as
43774 aarch_function_type in aarch-common.h.
43775 * config/aarch64/aarch64-protos.h: Include common types header,
43776 move out types aarch64_parse_opt_result and aarch64_key_type to
43778 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
43779 and functions out into aarch-common.h and aarch-common.cc. Fix up
43780 all the name changes resulting from the move.
43781 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
43783 * config/aarch64/aarch64.opt: Include aarch-common.h to import
43784 type move. Fix up name changes from factoring out common code and
43786 * config/arm/aarch-common-protos.h: Export factored out routines to both
43788 * config/arm/aarch-common.cc: Include newly factored out types.
43789 Move all mbranch-protection code and data structures from
43791 * config/arm/aarch-common.h: New header that declares types shared
43792 between aarch32 and aarch64 backends.
43793 * config/arm/arm-protos.h: Declare types and variables that are
43794 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
43795 aarch_ra_sign_scope and aarch_enable_bti.
43796 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
43797 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
43798 * config/arm/arm.cc: Add missing includes.
43800 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
43802 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
43804 2023-01-23 Richard Biener <rguenther@suse.de>
43806 PR tree-optimization/108449
43807 * cgraphunit.cc (check_global_declaration): Do not turn
43808 undefined statics into externs.
43810 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
43812 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
43813 and HI input modes.
43814 * config/pru/pru.md (clz): Fix generated code for QI and HI
43817 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
43819 * config/v850/v850.cc (v850_select_section): Put const volatile
43820 objects into read-only sections.
43822 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
43824 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
43825 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
43826 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
43828 2023-01-20 Jakub Jelinek <jakub@redhat.com>
43830 PR tree-optimization/108457
43831 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
43832 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
43833 argument instead of a temporary. Formatting fixes.
43835 2023-01-19 Jakub Jelinek <jakub@redhat.com>
43837 PR tree-optimization/108447
43838 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
43839 (relation_tests): Add self-tests for relation_{intersect,union}
43841 * selftest.h (relation_tests): Declare.
43842 * function-tests.cc (test_ranges): Call it.
43844 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
43847 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
43848 invalid third argument to __builtin_ia32_prefetch.
43850 2023-01-19 Jakub Jelinek <jakub@redhat.com>
43852 PR middle-end/108459
43853 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
43854 than fold_unary for NEGATE_EXPR.
43856 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
43859 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
43860 comment. Move assert about alignment a bit later.
43862 2023-01-19 Jakub Jelinek <jakub@redhat.com>
43864 PR tree-optimization/108440
43865 * tree-ssa-forwprop.cc: Include gimple-range.h.
43866 (simplify_rotate): For the forms with T2 wider than T and shift counts of
43867 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
43868 to B. For the forms with T2 wider than T and shift counts of
43869 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
43870 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
43871 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
43872 pass specific ranger instead of get_global_range_query.
43873 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
43876 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
43878 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
43879 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
43881 (aarch64_simd_vec_copy_lane<mode>): Likewise.
43882 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
43884 2023-01-19 Alexandre Oliva <oliva@adacore.com>
43887 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
43888 within debug insns.
43890 2023-01-18 Martin Jambor <mjambor@suse.cz>
43893 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
43894 lcone_of chain also do not need the body.
43896 2023-01-18 Richard Biener <rguenther@suse.de>
43899 2022-12-16 Richard Biener <rguenther@suse.de>
43901 PR middle-end/108086
43902 * tree-inline.cc (remap_ssa_name): Do not unshare the
43903 result from the decl_map.
43905 2023-01-18 Murray Steele <murray.steele@arm.com>
43908 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
43910 (__arm_vst1q_p_s8): Likewise.
43911 (__arm_vld1q_z_u8): Likewise.
43912 (__arm_vld1q_z_s8): Likewise.
43913 (__arm_vst1q_p_u16): Likewise.
43914 (__arm_vst1q_p_s16): Likewise.
43915 (__arm_vld1q_z_u16): Likewise.
43916 (__arm_vld1q_z_s16): Likewise.
43917 (__arm_vst1q_p_u32): Likewise.
43918 (__arm_vst1q_p_s32): Likewise.
43919 (__arm_vld1q_z_u32): Likewise.
43920 (__arm_vld1q_z_s32): Likewise.
43921 (__arm_vld1q_z_f16): Likewise.
43922 (__arm_vst1q_p_f16): Likewise.
43923 (__arm_vld1q_z_f32): Likewise.
43924 (__arm_vst1q_p_f32): Likewise.
43926 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
43928 * config/xtensa/xtensa.md (xorsi3_internal):
43929 Rename from the original of "xorsi3".
43930 (xorsi3): New expansion pattern that emits addition rather than
43931 bitwise-XOR when the second source is a constant of -2147483648
43934 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
43935 Andrew Pinski <apinski@marvell.com>
43938 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
43939 vec_vsubcuqP with vec_vsubcuq.
43941 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
43944 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
43945 support for invalid uses of MMA opaque type in function arguments.
43947 2023-01-18 liuhongt <hongtao.liu@intel.com>
43950 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
43951 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
43952 -share or -mno-daz-ftz is specified.
43953 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
43954 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
43956 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
43958 * config/bpf/bpf.cc (bpf_option_override): Disable
43961 2023-01-17 Jakub Jelinek <jakub@redhat.com>
43963 PR tree-optimization/106523
43964 * tree-ssa-forwprop.cc (simplify_rotate): For the
43965 patterns with (-Y) & (B - 1) in one operand's shift
43966 count and Y in another, if T2 has wider precision than T,
43967 punt if Y could have a value in [B, B2 - 1] range.
43969 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
43972 * config/i386/i386.cc (x86_output_mi_thunk): Disable
43973 -mforce-indirect-call for PIC in 32-bit mode.
43975 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
43978 * ipa-modref.cc (modref_access_analysis::analyze): Use
43979 find_always_executed_bbs.
43980 * ipa-sra.cc (process_scan_results): Likewise.
43981 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
43982 (find_always_executed_bbs): New function.
43983 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
43984 (find_always_executed_bbs): Declare.
43986 2023-01-16 Jan Hubicka <jh@suse.cz>
43988 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
43989 by TARGET_USE_SCATTER.
43990 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
43991 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
43992 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
43993 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
43994 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
43995 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
43997 2023-01-16 Richard Biener <rguenther@suse.de>
44000 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
44002 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
44006 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
44007 (__ARM_mve_coerce3): Likewise.
44009 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
44011 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
44013 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
44015 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
44016 (number_of_iterations_bitcount): Add call to the above.
44017 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
44018 c[lt]z idiom recognition.
44020 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
44022 * doc/sourcebuild.texi: Add missing target attributes.
44024 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
44026 PR tree-optimization/94793
44027 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
44029 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
44030 (number_of_iterations_cltz_complement): New.
44031 (number_of_iterations_bitcount): Add call to the above.
44033 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
44035 * doc/extend.texi (Common Function Attributes): Fix grammar.
44037 2023-01-16 Jakub Jelinek <jakub@redhat.com>
44040 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
44041 * config/riscv/riscv-vsetvl.cc: Likewise.
44043 2023-01-16 Jakub Jelinek <jakub@redhat.com>
44046 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
44047 disable -Winit-self using pragma GCC diagnostic ignored.
44048 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
44050 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
44051 _mm256_undefined_si256): Likewise.
44052 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
44053 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
44054 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
44055 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
44057 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
44060 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
44061 support for invalid uses in inline asm, factor out the checking and
44062 erroring to lambda function check_and_error_invalid_use.
44064 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
44066 PR tree-optimization/107608
44067 * range-op-float.cc (range_operator_float::fold_range): Avoid
44068 folding into INF when flag_trapping_math.
44069 * value-range.h (frange::known_isinf): Return false for possible NANs.
44071 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44073 * config.gcc (csky-*-*): Support --with-float=softfp.
44075 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44077 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
44078 Rename to xtensa_adjust_reg_alloc_order.
44079 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
44080 Ditto. And also remove code to reorder register numbers for
44081 leaf functions, rename the tables, and adjust the allocation
44082 order for the call0 ABI to use register A0 more.
44083 (xtensa_leaf_regs): Remove.
44084 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
44085 (order_regs_for_local_alloc): Rename as the above.
44086 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
44088 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
44090 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
44091 Change to define_insn_and_split to fold ldr+dup to ld1rq.
44092 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
44094 2023-01-14 Alexandre Oliva <oliva@adacore.com>
44096 * hash-table.h (is_deleted): Precheck !is_empty.
44097 (mark_deleted): Postcheck !is_empty.
44098 (copy constructor): Test is_empty before is_deleted.
44100 2023-01-14 Alexandre Oliva <oliva@adacore.com>
44103 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
44106 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
44108 PR rtl-optimization/108274
44109 * function.cc (thread_prologue_and_epilogue_insns): Also update the
44110 DF information for calls in a few more cases.
44112 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
44114 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
44115 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
44117 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
44118 (MAX_SYNC_LIBFUNC_SIZE): Define.
44119 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
44121 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
44122 libcall when sync libcalls are disabled.
44123 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
44124 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
44125 are disabled on 32-bit target.
44126 * config/pa/pa.opt (matomic-libcalls): New option.
44127 * doc/invoke.texi (HPPA Options): Update.
44129 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
44131 PR rtl-optimization/108117
44132 PR rtl-optimization/108132
44133 * sched-deps.cc (deps_analyze_insn): Do not schedule across
44134 calls before reload.
44136 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
44138 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
44139 options for -mlibarch.
44140 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
44141 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
44143 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
44145 * attribs.cc (strict_flex_array_level_of): Move this function to ...
44146 * attribs.h (strict_flex_array_level_of): Remove the declaration.
44147 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
44148 replace the referece to strict_flex_array_level_of with
44149 DECL_NOT_FLEXARRAY.
44150 * tree.cc (component_ref_size): Likewise.
44152 2023-01-13 Richard Biener <rguenther@suse.de>
44155 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
44156 crtfastmath.o for -shared.
44157 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
44159 2023-01-13 Richard Biener <rguenther@suse.de>
44162 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
44163 crtfastmath.o for -shared.
44164 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
44166 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
44169 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
44171 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
44173 (TARGET_DWARF_FRAME_REG_MODE): Define.
44175 2023-01-13 Richard Biener <rguenther@suse.de>
44178 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
44179 update EH info on the fly.
44181 2023-01-13 Richard Biener <rguenther@suse.de>
44183 PR tree-optimization/108387
44184 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
44185 value before inserting expression into the tables.
44187 2023-01-12 Andrew Pinski <apinski@marvell.com>
44188 Roger Sayle <roger@nextmovesoftware.com>
44190 PR tree-optimization/92342
44191 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
44192 Use tcc_comparison and :c for the multiply.
44193 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
44195 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
44196 Richard Sandiford <richard.sandiford@arm.com>
44199 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
44200 Check DECL_PACKED for bitfield.
44201 (aarch64_layout_arg): Warn when parameter passing ABI changes.
44202 (aarch64_function_arg_boundary): Do not warn here.
44203 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
44206 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
44207 Richard Sandiford <richard.sandiford@arm.com>
44209 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
44211 (aarch64_layout_arg): Factorize warning conditions.
44212 (aarch64_function_arg_boundary): Fix typo.
44213 * function.cc (currently_expanding_function_start): New variable.
44214 (expand_function_start): Handle
44215 currently_expanding_function_start.
44216 * function.h (currently_expanding_function_start): Declare.
44218 2023-01-12 Richard Biener <rguenther@suse.de>
44220 PR tree-optimization/99412
44221 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
44222 (swap_ops_for_binary_stmt): Remove reduction handling.
44223 (rewrite_expr_tree_parallel): Adjust.
44224 (reassociate_bb): Likewise.
44225 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
44227 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44229 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
44230 Rearrange the emitting codes.
44232 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44234 * config/xtensa/xtensa.md (*btrue):
44235 Correct value of the attribute "length" that depends on
44236 TARGET_DENSITY and operands, and add '?' character to the register
44237 constraint of the compared operand.
44239 2023-01-12 Alexandre Oliva <oliva@adacore.com>
44241 * hash-table.h (expand): Check elements and deleted counts.
44242 (verify): Likewise.
44244 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
44246 PR tree-optimization/71343
44247 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
44248 the value number of the expression X << C the same as the value
44249 number for the multiplication X * (1<<C).
44251 2023-01-11 David Faust <david.faust@oracle.com>
44254 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
44255 floating point modes.
44257 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
44259 PR tree-optimization/108199
44260 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
44261 for bit-field references.
44263 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
44265 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
44266 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
44267 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
44268 OPTION_MASK_P10_FUSION.
44270 2023-01-11 Richard Biener <rguenther@suse.de>
44272 PR tree-optimization/107767
44273 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
44274 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
44275 * tree-switch-conversion.cc (switch_conversion::collect):
44276 Count unique non-default targets accounting for later
44277 merging opportunities.
44279 2023-01-11 Martin Liska <mliska@suse.cz>
44281 PR middle-end/107976
44282 * params.opt: Limit JT params.
44283 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
44285 2023-01-11 Richard Biener <rguenther@suse.de>
44287 PR tree-optimization/108352
44288 * tree-ssa-threadbackward.cc
44289 (back_threader_profitability::profitable_path_p): Adjust
44290 heuristic that allows non-multi-way branch threads creating
44292 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
44293 (--param fsm-scale-path-stmts): Adjust.
44294 * params.opt (--param=fsm-scale-path-blocks=): Remove.
44295 (-param=fsm-scale-path-stmts=): Adjust description.
44297 2023-01-11 Richard Biener <rguenther@suse.de>
44299 PR tree-optimization/108353
44300 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
44302 (add_ssa_edge): Simplify.
44303 (add_control_edge): Likewise.
44304 (ssa_prop_init): Likewise.
44305 (ssa_prop_fini): Likewise.
44306 (ssa_propagation_engine::ssa_propagate): Likewise.
44308 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
44310 * config/s390/s390.md (*not<mode>): New pattern.
44312 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44314 * config/xtensa/xtensa.cc (xtensa_insn_cost):
44315 Let insn cost for size be obtained by applying COSTS_N_INSNS()
44316 to instruction length and then dividing by 3.
44318 2023-01-10 Richard Biener <rguenther@suse.de>
44320 PR tree-optimization/106293
44321 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
44322 process degenerate PHI defs.
44324 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
44326 PR rtl-optimization/106421
44327 * cprop.cc (bypass_block): Check that DEST is local to this
44328 function (non-NULL) before calling find_edge.
44330 2023-01-10 Martin Jambor <mjambor@suse.cz>
44333 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
44334 sort_replacements, lookup_first_base_replacement and
44335 m_sorted_replacements_p.
44336 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
44337 (ipa_param_body_adjustments::register_replacement): Set
44338 m_sorted_replacements_p to false.
44339 (compare_param_body_replacement): New function.
44340 (ipa_param_body_adjustments::sort_replacements): Likewise.
44341 (ipa_param_body_adjustments::common_initialization): Call
44343 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
44344 m_sorted_replacements_p.
44345 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
44347 (ipa_param_body_adjustments::lookup_first_base_replacement): New
44349 (ipa_param_body_adjustments::modify_call_stmt): Use
44350 lookup_first_base_replacement.
44351 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
44352 adjustments->sort_replacements.
44354 2023-01-10 Richard Biener <rguenther@suse.de>
44356 PR tree-optimization/108314
44357 * tree-vect-stmts.cc (vectorizable_condition): Do not
44358 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
44360 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44362 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
44364 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44366 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
44368 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44370 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
44371 defines for soft float abi.
44373 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44375 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
44376 (smart_bclri): Likewise.
44377 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
44378 (fast_bclri): Likewise.
44379 (fast_cmpnesi_i): Likewise.
44380 (*fast_cmpltsi_i): Likewise.
44381 (*fast_cmpgeusi_i): Likewise.
44383 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
44385 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
44386 flag_fp_int_builtin_inexact || !flag_trapping_math.
44387 (<frm_pattern><mode>2): Likewise.
44389 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
44391 * config/s390/s390.cc (s390_register_info): Check call_used_regs
44392 instead of hard-coding the register numbers for call saved
44394 (s390_optimize_register_info): Likewise.
44396 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
44398 * doc/gm2.texi (Overview): Fix @node markers.
44399 (Using): Likewise. Remove subsections that were moved to Overview
44400 from the menu and move others around.
44402 2023-01-09 Richard Biener <rguenther@suse.de>
44404 PR middle-end/108209
44405 * genmatch.cc (commutative_op): Fix return value for
44406 user-id with non-commutative first replacement.
44408 2023-01-09 Jakub Jelinek <jakub@redhat.com>
44411 * calls.cc (expand_call): For calls with
44412 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
44415 2023-01-09 Richard Biener <rguenther@suse.de>
44417 PR middle-end/69482
44418 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
44419 qualified accesses also force objects to memory.
44421 2023-01-09 Martin Liska <mliska@suse.cz>
44424 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
44425 NULL (deleleted value) to a hash_set.
44427 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44429 * config/xtensa/xtensa.md (*splice_bits):
44430 New insn_and_split pattern.
44432 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
44434 * config/xtensa/xtensa.cc
44435 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
44436 New helper functions.
44437 (xtensa_set_return_address, xtensa_output_mi_thunk):
44438 Change to use the helper function.
44439 (xtensa_emit_adjust_stack_ptr): Ditto.
44440 And also change to try reusing the content of scratch register
44441 A9 if the register is not modified in the function body.
44443 2023-01-07 LIU Hao <lh_mouse@126.com>
44445 PR middle-end/108300
44446 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
44447 before <windows.h>.
44448 * diagnostic-color.cc: Likewise.
44449 * plugin.cc: Likewise.
44450 * prefix.cc: Likewise.
44452 2023-01-06 Joseph Myers <joseph@codesourcery.com>
44454 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
44455 for handling real integer types.
44457 2023-01-06 Tamar Christina <tamar.christina@arm.com>
44460 2022-12-12 Tamar Christina <tamar.christina@arm.com>
44462 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
44463 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
44464 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
44465 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
44466 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
44467 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
44468 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
44469 (aarch64_simd_dupv2hf): New.
44470 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
44472 * config/aarch64/iterators.md (VHSDF_P): New.
44473 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
44474 Vel, q, vp): Add V2HF.
44475 * config/arm/types.md (neon_fp_reduc_add_h): New.
44477 2023-01-06 Martin Liska <mliska@suse.cz>
44479 PR middle-end/107966
44480 * doc/options.texi: Fix Var documentation in internal manual.
44482 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
44485 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
44487 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
44488 RTL expansion to allow condition (mask) to be shared/reused,
44489 by avoiding overwriting pseudos and adding REG_EQUAL notes.
44491 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
44493 * common.opt: Add -static-libgm2.
44494 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
44495 * doc/gm2.texi: Document static-libgm2.
44496 * gcc.cc (driver_handle_option): Allow static-libgm2.
44498 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
44500 * common/config/i386/i386-common.cc (processor_alias_table):
44501 Use CPU_ZNVER4 for znver4.
44502 * config/i386/i386.md: Add znver4.md.
44503 * config/i386/znver4.md: New.
44505 2023-01-04 Jakub Jelinek <jakub@redhat.com>
44507 PR tree-optimization/108253
44508 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
44511 2023-01-04 Jakub Jelinek <jakub@redhat.com>
44513 PR middle-end/108237
44514 * generic-match-head.cc: Include tree-pass.h.
44515 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
44516 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
44517 resp. PROP_gimple_lvec property set.
44519 2023-01-04 Jakub Jelinek <jakub@redhat.com>
44521 PR sanitizer/108256
44522 * convert.cc (do_narrow): Punt for MULT_EXPR if original
44523 type doesn't wrap around and -fsanitize=signed-integer-overflow
44525 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
44527 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
44529 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
44530 * common/config/i386/i386-common.cc: Add Emeraldrapids.
44532 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
44534 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
44537 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
44539 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
44540 default constructor to initialize it.
44541 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
44542 for last and iterate to handle recursive calls. Delete leftover
44543 candidates at the end.
44544 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
44546 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
44547 gc_candidate bit when a clone is used.
44549 2023-01-03 Florian Weimer <fweimer@redhat.com>
44552 2023-01-02 Florian Weimer <fweimer@redhat.com>
44554 * dwarf2cfi.cc (init_return_column_size): Remove.
44555 (init_one_dwarf_reg_size): Adjust.
44556 (generate_dwarf_reg_sizes): New function. Extracted
44557 from expand_builtin_init_dwarf_reg_sizes.
44558 (expand_builtin_init_dwarf_reg_sizes): Call
44559 generate_dwarf_reg_sizes.
44560 * target.def (init_dwarf_reg_sizes_extra): Adjust
44562 * config/msp430/msp430.cc
44563 (msp430_init_dwarf_reg_sizes_extra): Adjust.
44564 * config/rs6000/rs6000.cc
44565 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
44566 * doc/tm.texi: Update.
44568 2023-01-03 Florian Weimer <fweimer@redhat.com>
44571 2023-01-02 Florian Weimer <fweimer@redhat.com>
44573 * debug.h (dwarf_reg_sizes_constant): Declare.
44574 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
44576 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
44578 PR tree-optimization/105043
44579 * doc/extend.texi (Object Size Checking): Split out into two
44580 subsections and mention _FORTIFY_SOURCE.
44582 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
44584 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
44585 RTL expansion to allow condition (mask) to be shared/reused,
44586 by avoiding overwriting pseudos and adding REG_EQUAL notes.
44588 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
44591 * config/i386/i386-features.cc
44592 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
44593 the gain/cost of converting a MEM operand.
44595 2023-01-03 Jakub Jelinek <jakub@redhat.com>
44597 PR middle-end/108264
44598 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
44599 from source which doesn't have scalar integral mode first convert
44602 2023-01-03 Jakub Jelinek <jakub@redhat.com>
44604 PR rtl-optimization/108263
44605 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
44608 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
44611 * config/i386/lujiazui.md (lujiazui_div): New automaton.
44612 (lua_div): New unit.
44613 (lua_idiv_qi): Correct unit in the reservation.
44614 (lua_idiv_qi_load): Ditto.
44615 (lua_idiv_hi): Ditto.
44616 (lua_idiv_hi_load): Ditto.
44617 (lua_idiv_si): Ditto.
44618 (lua_idiv_si_load): Ditto.
44619 (lua_idiv_di): Ditto.
44620 (lua_idiv_di_load): Ditto.
44621 (lua_fdiv_SF): Ditto.
44622 (lua_fdiv_SF_load): Ditto.
44623 (lua_fdiv_DF): Ditto.
44624 (lua_fdiv_DF_load): Ditto.
44625 (lua_fdiv_XF): Ditto.
44626 (lua_fdiv_XF_load): Ditto.
44627 (lua_ssediv_SF): Ditto.
44628 (lua_ssediv_load_SF): Ditto.
44629 (lua_ssediv_V4SF): Ditto.
44630 (lua_ssediv_load_V4SF): Ditto.
44631 (lua_ssediv_V8SF): Ditto.
44632 (lua_ssediv_load_V8SF): Ditto.
44633 (lua_ssediv_SD): Ditto.
44634 (lua_ssediv_load_SD): Ditto.
44635 (lua_ssediv_V2DF): Ditto.
44636 (lua_ssediv_load_V2DF): Ditto.
44637 (lua_ssediv_V4DF): Ditto.
44638 (lua_ssediv_load_V4DF): Ditto.
44640 2023-01-02 Florian Weimer <fweimer@redhat.com>
44642 * debug.h (dwarf_reg_sizes_constant): Declare.
44643 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
44645 2023-01-02 Florian Weimer <fweimer@redhat.com>
44647 * dwarf2cfi.cc (init_return_column_size): Remove.
44648 (init_one_dwarf_reg_size): Adjust.
44649 (generate_dwarf_reg_sizes): New function. Extracted
44650 from expand_builtin_init_dwarf_reg_sizes.
44651 (expand_builtin_init_dwarf_reg_sizes): Call
44652 generate_dwarf_reg_sizes.
44653 * target.def (init_dwarf_reg_sizes_extra): Adjust
44655 * config/msp430/msp430.cc
44656 (msp430_init_dwarf_reg_sizes_extra): Adjust.
44657 * config/rs6000/rs6000.cc
44658 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
44659 * doc/tm.texi: Update.
44661 2023-01-02 Jakub Jelinek <jakub@redhat.com>
44663 * gcc.cc (process_command): Update copyright notice dates.
44664 * gcov-dump.cc (print_version): Ditto.
44665 * gcov.cc (print_version): Ditto.
44666 * gcov-tool.cc (print_version): Ditto.
44667 * gengtype.cc (create_file): Ditto.
44668 * doc/cpp.texi: Bump @copying's copyright year.
44669 * doc/cppinternals.texi: Ditto.
44670 * doc/gcc.texi: Ditto.
44671 * doc/gccint.texi: Ditto.
44672 * doc/gcov.texi: Ditto.
44673 * doc/install.texi: Ditto.
44674 * doc/invoke.texi: Ditto.
44676 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
44677 Uroš Bizjak <ubizjak@gmail.com>
44679 * config/i386/i386.md (extendditi2): New define_insn.
44680 (define_split): Use DWIH mode iterator to treat new extendditi2
44681 identically to existing extendsidi2_1.
44682 (define_peephole2): Likewise.
44683 (define_peephole2): Likewise.
44684 (define_Split): Likewise.
44687 Copyright (C) 2023 Free Software Foundation, Inc.
44689 Copying and distribution of this file, with or without modification,
44690 are permitted in any medium without royalty provided the copyright
44691 notice and this notice are preserved.