1 /* Expected instruction selection as characterized by
2 scan-assembler-times directives below is only relevant to
3 little-endian targets. */
4 /* { dg-do compile { target { powerpc64le-*-* } } } */
5 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
6 /* { dg-require-effective-target powerpc_vsx_ok } */
7 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
8 /* { dg-options "-O2 -mcpu=power7 -mabi=altivec" } */
9 /* { dg-final { scan-assembler-times "lvx" 1 } } */
10 /* { dg-final { scan-assembler-times "stvx" 1 } } */
11 /* { dg-final { scan-assembler-not "ld" } } */
12 /* { dg-final { scan-assembler-not "lwz" } } */
13 /* { dg-final { scan-assembler-not "stw" } } */
14 /* { dg-final { scan-assembler-not "addi" } } */
16 typedef vector
long long v2di_type
;
19 return_v2di (v2di_type
*ptr
)
21 /* As of pr48857, should generate lxvd2x 34,0,3
22 followed by xxpermdi 34,34,34,2. Subsequent optimization
23 recognizes that ptr refers to an aligned vector and replaces
24 this with lvx 2,0,3. */
29 pass_v2di (v2di_type arg
, v2di_type
*ptr
)
31 /* As of pr48857, should generate xxpermdi 34,34,34,2 followed by
32 stxvd2x 34,0,5. Subsequent optimization recognizes that ptr
33 refers to an aligned vector and replaces this with stvx 2,0,5. */