gcc/testsuite/gcc.target/powerpc/p9-extract-3.c

   1 /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
   2 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
   3 /* { dg-require-effective-target powerpc_p9vector_ok } */
   4 /* { dg-options "-mcpu=power9 -O2" } */
   5
   6 /* Test that under ISA 3.0 (-mcpu=power9), the compiler optimizes conversion to
   7    double after a vec_extract to use the VEXTRACTU{B,H} or XXEXTRACTUW
   8    instructions (which leaves the result in a vector register), and not the
   9    VEXTU{B,H,W}{L,R}X instructions (which needs a direct move to do the floating
  10    point conversion).  */
  11
  12 #include <altivec.h>
  13
  14 double
  15 fpcvt_int_0 (vector int a)
  16 {
  17   int c = 0;
  18   int b = vec_extract (a, c);
  19   return (double)b;
  20 }
  21
  22 double
  23 fpcvt_int_3 (vector int a)
  24 {
  25   int c = 3;
  26   int b = vec_extract (a, c);
  27   return (double)b;
  28 }
  29
  30 double
  31 fpcvt_uint_0 (vector unsigned int a)
  32 {
  33   int c = 0;
  34   unsigned int b = vec_extract (a, c);
  35   return (double)b;
  36 }
  37
  38 double
  39 fpcvt_uint_3 (vector unsigned int a)
  40 {
  41   int c = 3;
  42   unsigned int b = vec_extract (a, c);
  43   return (double)b;
  44 }
  45
  46 double
  47 fpcvt_short_0 (vector short a)
  48 {
  49   int c = 0;
  50   short b = vec_extract (a, c);
  51   return (double)b;
  52 }
  53
  54 double
  55 fpcvt_short_7 (vector short a)
  56 {
  57   int c = 7;
  58   short b = vec_extract (a, c);
  59   return (double)b;
  60 }
  61
  62 double
  63 fpcvt_ushort_0 (vector unsigned short a)
  64 {
  65   int c = 0;
  66   unsigned short b = vec_extract (a, c);
  67   return (double)b;
  68 }
  69
  70 double
  71 fpcvt_ushort_7 (vector unsigned short a)
  72 {
  73   int c = 7;
  74   unsigned short b = vec_extract (a, c);
  75   return (double)b;
  76 }
  77
  78 double
  79 fpcvt_schar_0 (vector signed char a)
  80 {
  81   int c = 0;
  82   signed char b = vec_extract (a, c);
  83   return (double)b;
  84 }
  85
  86 double
  87 fpcvt_schar_15 (vector signed char a)
  88 {
  89   int c = 15;
  90   signed char b = vec_extract (a, c);
  91   return (double)b;
  92 }
  93
  94 double
  95 fpcvt_uchar_0 (vector unsigned char a)
  96 {
  97   int c = 0;
  98   unsigned char b = vec_extract (a, c);
  99   return (double)b;
 100 }
 101
 102 double
 103 fpcvt_uchar_15 (vector unsigned char a)
 104 {
 105   int c = 15;
 106   signed char b = vec_extract (a, c);
 107   return (double)b;
 108 }
 109
 110 /* { dg-final { scan-assembler     "vextractu\[bh\] "    } } */
 111 /* { dg-final { scan-assembler     "vexts\[bh\]2d "      } } */
 112 /* { dg-final { scan-assembler     "vspltw "             } } */
 113 /* { dg-final { scan-assembler     "xscvsxddp "          } } */
 114 /* { dg-final { scan-assembler     "xvcvsxwdp "          } } */
 115 /* { dg-final { scan-assembler     "xvcvuxwdp "          } } */
 116 /* { dg-final { scan-assembler-not "exts\[bhw\] "        } } */
 117 /* { dg-final { scan-assembler-not "stxv"                } } */
 118 /* { dg-final { scan-assembler-not "m\[ft\]vsrd "        } } */
 119 /* { dg-final { scan-assembler-not "m\[ft\]vsrw\[az\] "  } } */
 120 /* { dg-final { scan-assembler-not "l\[hw\]\[az\] "      } } */