gcc/testsuite/gcc.target/aarch64/sve/tls_1.c

   1 /* { dg-options "-O2 -fPIC -msve-vector-bits=256" } */
   2
   3 typedef unsigned int v8si __attribute__((vector_size(32)));
   4
   5 extern __thread int y;
   6
   7 void
   8 f (int *a)
   9 {
  10   v8si x;
  11   asm volatile ("dup %0.s, #0x11" : "=w" (x) :: "memory");
  12   if (*a)
  13     asm volatile ("insr %0.s, %w2" : "=w" (x) : "0" (x), "r" (y));
  14 }
  15
  16 /* { dg-final { scan-assembler {\tst(r|1.)\tz[0-9]} } } */
  17 /* { dg-final { scan-assembler {\tld(r|1.)\tz[0-9]} } } */