gcc/testsuite/gcc.target/aarch64/fp16/f16_convs_2.c

   1 /* { dg-do run } */
   2 /* { dg-options "-O2" } */
   3 /* { dg-additional-options "-mfp16-format=ieee" {target "arm*-*-*"} } */
   4
   5 extern void abort (void);
   6
   7 #define EPSILON 0.0001
   8
   9 int
  10 main (int argc, char **argv)
  11 {
  12   int i1 = 3;
  13   int i2 = 2;
  14   /*  This 'assembler' should be portable across ARM and AArch64.  */
  15   asm volatile ("" : : : "memory");
  16
  17   __fp16 in1 = i1;
  18   __fp16 in2 = i2;
  19
  20   /* Do the addition on __fp16's (implicitly converts both operands to
  21      float32, adds, converts back to f16, then we convert to int).  */
  22   __fp16 res1 = in1 + in2;
  23   asm volatile ("" : : : "memory");
  24   int result1 = res1;
  25
  26   /* Do the addition on int's (we convert both operands directly to int, add,
  27      and we're done).  */
  28   int result2 = ((int) in1) + ((int) in2);
  29
  30   if (__builtin_abs (result2 - result1) > EPSILON)
  31     abort ();
  32   return 0;
  33 }