1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
104 #ifndef REGISTER_MOVE_COST
105 #define REGISTER_MOVE_COST(x, y) 2
108 #ifndef REGNO_MODE_OK_FOR_BASE_P
109 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
112 #ifndef REG_MODE_OK_FOR_BASE_P
113 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
116 /* The variables set up by `find_reloads' are:
118 n_reloads number of distinct reloads needed; max reload # + 1
119 tables indexed by reload number
120 reload_in rtx for value to reload from
121 reload_out rtx for where to store reload-reg afterward if nec
122 (often the same as reload_in)
123 reload_reg_class enum reg_class, saying what regs to reload into
124 reload_inmode enum machine_mode; mode this operand should have
125 when reloaded, on input.
126 reload_outmode enum machine_mode; mode this operand should have
127 when reloaded, on output.
128 reload_optional char, nonzero for an optional reload.
129 Optional reloads are ignored unless the
130 value is already sitting in a register.
131 reload_inc int, positive amount to increment or decrement by if
132 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
133 Ignored otherwise (don't assume it is zero).
134 reload_in_reg rtx. A reg for which reload_in is the equivalent.
135 If reload_in is a symbol_ref which came from
136 reg_equiv_constant, then this is the pseudo
137 which has that symbol_ref as equivalent.
138 reload_reg_rtx rtx. This is the register to reload into.
139 If it is zero when `find_reloads' returns,
140 you must find a suitable register in the class
141 specified by reload_reg_class, and store here
142 an rtx for that register with mode from
143 reload_inmode or reload_outmode.
144 reload_nocombine char, nonzero if this reload shouldn't be
145 combined with another reload.
146 reload_opnum int, operand number being reloaded. This is
147 used to group related reloads and need not always
148 be equal to the actual operand number in the insn,
149 though it current will be; for in-out operands, it
150 is one of the two operand numbers.
151 reload_when_needed enum, classifies reload as needed either for
152 addressing an input reload, addressing an output,
153 for addressing a non-reloaded mem ref,
154 or for unspecified purposes (i.e., more than one
156 reload_secondary_p int, 1 if this is a secondary register for one
158 reload_secondary_in_reload
159 reload_secondary_out_reload
160 int, gives the reload number of a secondary
161 reload, when needed; otherwise -1
162 reload_secondary_in_icode
163 reload_secondary_out_icode
164 enum insn_code, if a secondary reload is required,
165 gives the INSN_CODE that uses the secondary
166 reload as a scratch register, or CODE_FOR_nothing
167 if the secondary reload register is to be an
168 intermediate register. */
171 rtx reload_in
[MAX_RELOADS
];
172 rtx reload_out
[MAX_RELOADS
];
173 enum reg_class reload_reg_class
[MAX_RELOADS
];
174 enum machine_mode reload_inmode
[MAX_RELOADS
];
175 enum machine_mode reload_outmode
[MAX_RELOADS
];
176 rtx reload_reg_rtx
[MAX_RELOADS
];
177 char reload_optional
[MAX_RELOADS
];
178 int reload_inc
[MAX_RELOADS
];
179 rtx reload_in_reg
[MAX_RELOADS
];
180 char reload_nocombine
[MAX_RELOADS
];
181 int reload_opnum
[MAX_RELOADS
];
182 enum reload_type reload_when_needed
[MAX_RELOADS
];
183 int reload_secondary_p
[MAX_RELOADS
];
184 int reload_secondary_in_reload
[MAX_RELOADS
];
185 int reload_secondary_out_reload
[MAX_RELOADS
];
186 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
187 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
189 /* All the "earlyclobber" operands of the current insn
190 are recorded here. */
192 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
194 int reload_n_operands
;
196 /* Replacing reloads.
198 If `replace_reloads' is nonzero, then as each reload is recorded
199 an entry is made for it in the table `replacements'.
200 Then later `subst_reloads' can look through that table and
201 perform all the replacements needed. */
203 /* Nonzero means record the places to replace. */
204 static int replace_reloads
;
206 /* Each replacement is recorded with a structure like this. */
209 rtx
*where
; /* Location to store in */
210 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
211 a SUBREG; 0 otherwise. */
212 int what
; /* which reload this is for */
213 enum machine_mode mode
; /* mode it must have */
216 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
218 /* Number of replacements currently recorded. */
219 static int n_replacements
;
221 /* Used to track what is modified by an operand. */
224 int reg_flag
; /* Nonzero if referencing a register. */
225 int safe
; /* Nonzero if this can't conflict with anything. */
226 rtx base
; /* Base address for MEM. */
227 HOST_WIDE_INT start
; /* Starting offset or register number. */
228 HOST_WIDE_INT end
; /* Ending offset or register number. */
231 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
232 (see reg_equiv_address). */
233 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
234 static int n_memlocs
;
236 #ifdef SECONDARY_MEMORY_NEEDED
238 /* Save MEMs needed to copy from one class of registers to another. One MEM
239 is used per mode, but normally only one or two modes are ever used.
241 We keep two versions, before and after register elimination. The one
242 after register elimination is record separately for each operand. This
243 is done in case the address is not valid to be sure that we separately
246 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
247 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
250 /* The instruction we are doing reloads for;
251 so we can test whether a register dies in it. */
252 static rtx this_insn
;
254 /* Nonzero if this instruction is a user-specified asm with operands. */
255 static int this_insn_is_asm
;
257 /* If hard_regs_live_known is nonzero,
258 we can tell which hard regs are currently live,
259 at least enough to succeed in choosing dummy reloads. */
260 static int hard_regs_live_known
;
262 /* Indexed by hard reg number,
263 element is nonnegative if hard reg has been spilled.
264 This vector is passed to `find_reloads' as an argument
265 and is not changed here. */
266 static short *static_reload_reg_p
;
268 /* Set to 1 in subst_reg_equivs if it changes anything. */
269 static int subst_reg_equivs_changed
;
271 /* On return from push_reload, holds the reload-number for the OUT
272 operand, which can be different for that from the input operand. */
273 static int output_reloadnum
;
275 /* Compare two RTX's. */
276 #define MATCHES(x, y) \
277 (x == y || (x != 0 && (GET_CODE (x) == REG \
278 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
279 : rtx_equal_p (x, y) && ! side_effects_p (x))))
281 /* Indicates if two reloads purposes are for similar enough things that we
282 can merge their reloads. */
283 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
284 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
285 || ((when1) == (when2) && (op1) == (op2)) \
286 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
287 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
288 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
289 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
290 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
292 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
293 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
294 ((when1) != (when2) \
295 || ! ((op1) == (op2) \
296 || (when1) == RELOAD_FOR_INPUT \
297 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
298 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
300 /* If we are going to reload an address, compute the reload type to
302 #define ADDR_TYPE(type) \
303 ((type) == RELOAD_FOR_INPUT_ADDRESS \
304 ? RELOAD_FOR_INPADDR_ADDRESS \
305 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
306 ? RELOAD_FOR_OUTADDR_ADDRESS \
309 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
310 enum machine_mode
, enum reload_type
,
312 static enum reg_class find_valid_class
PROTO((enum machine_mode
, int));
313 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
314 enum machine_mode
, enum machine_mode
,
315 int, int, int, enum reload_type
));
316 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
317 static void combine_reloads
PROTO((void));
318 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
319 enum machine_mode
, enum machine_mode
,
320 enum reg_class
, int, int));
321 static int earlyclobber_operand_p
PROTO((rtx
));
322 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
323 static struct decomposition decompose
PROTO((rtx
));
324 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
325 static int alternative_allows_memconst
PROTO((char *, int));
326 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
327 static rtx make_memloc
PROTO((rtx
, int));
328 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
329 int, enum reload_type
, int, rtx
));
330 static rtx subst_reg_equivs
PROTO((rtx
));
331 static rtx subst_indexed_address
PROTO((rtx
));
332 static int find_reloads_address_1
PROTO((enum machine_mode
, rtx
, int, rtx
*,
333 int, enum reload_type
,int, rtx
));
334 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
335 enum machine_mode
, int,
336 enum reload_type
, int));
337 static int find_inc_amount
PROTO((rtx
, rtx
));
339 #ifdef HAVE_SECONDARY_RELOADS
341 /* Determine if any secondary reloads are needed for loading (if IN_P is
342 non-zero) or storing (if IN_P is zero) X to or from a reload register of
343 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
344 are needed, push them.
346 Return the reload number of the secondary reload we made, or -1 if
347 we didn't need one. *PICODE is set to the insn_code to use if we do
348 need a secondary reload. */
351 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
357 enum reg_class reload_class
;
358 enum machine_mode reload_mode
;
359 enum reload_type type
;
360 enum insn_code
*picode
;
362 enum reg_class
class = NO_REGS
;
363 enum machine_mode mode
= reload_mode
;
364 enum insn_code icode
= CODE_FOR_nothing
;
365 enum reg_class t_class
= NO_REGS
;
366 enum machine_mode t_mode
= VOIDmode
;
367 enum insn_code t_icode
= CODE_FOR_nothing
;
368 enum reload_type secondary_type
;
370 int s_reload
, t_reload
= -1;
372 if (type
== RELOAD_FOR_INPUT_ADDRESS
373 || type
== RELOAD_FOR_OUTPUT_ADDRESS
374 || type
== RELOAD_FOR_INPADDR_ADDRESS
375 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
376 secondary_type
= type
;
378 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
380 *picode
= CODE_FOR_nothing
;
382 /* If X is a paradoxical SUBREG, use the inner value to determine both the
383 mode and object being reloaded. */
384 if (GET_CODE (x
) == SUBREG
385 && (GET_MODE_SIZE (GET_MODE (x
))
386 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
389 reload_mode
= GET_MODE (x
);
392 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
393 is still a pseudo-register by now, it *must* have an equivalent MEM
394 but we don't want to assume that), use that equivalent when seeing if
395 a secondary reload is needed since whether or not a reload is needed
396 might be sensitive to the form of the MEM. */
398 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
399 && reg_equiv_mem
[REGNO (x
)] != 0)
400 x
= reg_equiv_mem
[REGNO (x
)];
402 #ifdef SECONDARY_INPUT_RELOAD_CLASS
404 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
407 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
409 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
412 /* If we don't need any secondary registers, done. */
413 if (class == NO_REGS
)
416 /* Get a possible insn to use. If the predicate doesn't accept X, don't
419 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
420 : reload_out_optab
[(int) reload_mode
]);
422 if (icode
!= CODE_FOR_nothing
423 && insn_operand_predicate
[(int) icode
][in_p
]
424 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
425 icode
= CODE_FOR_nothing
;
427 /* If we will be using an insn, see if it can directly handle the reload
428 register we will be using. If it can, the secondary reload is for a
429 scratch register. If it can't, we will use the secondary reload for
430 an intermediate register and require a tertiary reload for the scratch
433 if (icode
!= CODE_FOR_nothing
)
435 /* If IN_P is non-zero, the reload register will be the output in
436 operand 0. If IN_P is zero, the reload register will be the input
437 in operand 1. Outputs should have an initial "=", which we must
440 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
441 enum reg_class insn_class
442 = (insn_letter
== 'r' ? GENERAL_REGS
443 : REG_CLASS_FROM_LETTER (insn_letter
));
445 if (insn_class
== NO_REGS
446 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
447 /* The scratch register's constraint must start with "=&". */
448 || insn_operand_constraint
[(int) icode
][2][0] != '='
449 || insn_operand_constraint
[(int) icode
][2][1] != '&')
452 if (reg_class_subset_p (reload_class
, insn_class
))
453 mode
= insn_operand_mode
[(int) icode
][2];
456 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
458 t_mode
= insn_operand_mode
[(int) icode
][2];
459 t_class
= (t_letter
== 'r' ? GENERAL_REGS
460 : REG_CLASS_FROM_LETTER (t_letter
));
462 icode
= CODE_FOR_nothing
;
466 /* This case isn't valid, so fail. Reload is allowed to use the same
467 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
468 in the case of a secondary register, we actually need two different
469 registers for correct code. We fail here to prevent the possibility of
470 silently generating incorrect code later.
472 The convention is that secondary input reloads are valid only if the
473 secondary_class is different from class. If you have such a case, you
474 can not use secondary reloads, you must work around the problem some
477 Allow this when MODE is not reload_mode and assume that the generated
478 code handles this case (it does on the Alpha, which is the only place
479 this currently happens). */
481 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
484 /* If we need a tertiary reload, see if we have one we can reuse or else
487 if (t_class
!= NO_REGS
)
489 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
490 if (reload_secondary_p
[t_reload
]
491 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
492 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
493 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
494 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
495 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
496 == CODE_FOR_nothing
))
497 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
498 == CODE_FOR_nothing
)))
499 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
500 && MERGABLE_RELOADS (secondary_type
,
501 reload_when_needed
[t_reload
],
502 opnum
, reload_opnum
[t_reload
]))
505 reload_inmode
[t_reload
] = t_mode
;
507 reload_outmode
[t_reload
] = t_mode
;
509 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
510 reload_reg_class
[t_reload
] = t_class
;
512 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
513 reload_optional
[t_reload
] &= optional
;
514 reload_secondary_p
[t_reload
] = 1;
515 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
516 opnum
, reload_opnum
[t_reload
]))
517 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
520 if (t_reload
== n_reloads
)
522 /* We need to make a new tertiary reload for this register class. */
523 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
524 reload_reg_class
[t_reload
] = t_class
;
525 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
526 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
527 reload_reg_rtx
[t_reload
] = 0;
528 reload_optional
[t_reload
] = optional
;
529 reload_inc
[t_reload
] = 0;
530 /* Maybe we could combine these, but it seems too tricky. */
531 reload_nocombine
[t_reload
] = 1;
532 reload_in_reg
[t_reload
] = 0;
533 reload_opnum
[t_reload
] = opnum
;
534 reload_when_needed
[t_reload
] = secondary_type
;
535 reload_secondary_in_reload
[t_reload
] = -1;
536 reload_secondary_out_reload
[t_reload
] = -1;
537 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
538 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
539 reload_secondary_p
[t_reload
] = 1;
545 /* See if we can reuse an existing secondary reload. */
546 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
547 if (reload_secondary_p
[s_reload
]
548 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
549 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
550 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
551 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
552 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
553 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
554 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
555 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
556 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
557 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
558 opnum
, reload_opnum
[s_reload
]))
561 reload_inmode
[s_reload
] = mode
;
563 reload_outmode
[s_reload
] = mode
;
565 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
566 reload_reg_class
[s_reload
] = class;
568 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
569 reload_optional
[s_reload
] &= optional
;
570 reload_secondary_p
[s_reload
] = 1;
571 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
572 opnum
, reload_opnum
[s_reload
]))
573 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
576 if (s_reload
== n_reloads
)
578 #ifdef SECONDARY_MEMORY_NEEDED
579 /* If we need a memory location to copy between the two reload regs,
580 set it up now. Note that we do the input case before making
581 the reload and the output case after. This is due to the
582 way reloads are output. */
584 if (in_p
&& icode
== CODE_FOR_nothing
585 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
586 get_secondary_mem (x
, reload_mode
, opnum
, type
);
589 /* We need to make a new secondary reload for this register class. */
590 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
591 reload_reg_class
[s_reload
] = class;
593 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
594 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
595 reload_reg_rtx
[s_reload
] = 0;
596 reload_optional
[s_reload
] = optional
;
597 reload_inc
[s_reload
] = 0;
598 /* Maybe we could combine these, but it seems too tricky. */
599 reload_nocombine
[s_reload
] = 1;
600 reload_in_reg
[s_reload
] = 0;
601 reload_opnum
[s_reload
] = opnum
;
602 reload_when_needed
[s_reload
] = secondary_type
;
603 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
604 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
605 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
606 reload_secondary_out_icode
[s_reload
]
607 = ! in_p
? t_icode
: CODE_FOR_nothing
;
608 reload_secondary_p
[s_reload
] = 1;
612 #ifdef SECONDARY_MEMORY_NEEDED
613 if (! in_p
&& icode
== CODE_FOR_nothing
614 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
615 get_secondary_mem (x
, mode
, opnum
, type
);
622 #endif /* HAVE_SECONDARY_RELOADS */
624 #ifdef SECONDARY_MEMORY_NEEDED
626 /* Return a memory location that will be used to copy X in mode MODE.
627 If we haven't already made a location for this mode in this insn,
628 call find_reloads_address on the location being returned. */
631 get_secondary_mem (x
, mode
, opnum
, type
)
633 enum machine_mode mode
;
635 enum reload_type type
;
640 /* By default, if MODE is narrower than a word, widen it to a word.
641 This is required because most machines that require these memory
642 locations do not support short load and stores from all registers
643 (e.g., FP registers). */
645 #ifdef SECONDARY_MEMORY_NEEDED_MODE
646 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
648 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
649 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
652 /* If we already have made a MEM for this operand in MODE, return it. */
653 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
654 return secondary_memlocs_elim
[(int) mode
][opnum
];
656 /* If this is the first time we've tried to get a MEM for this mode,
657 allocate a new one. `something_changed' in reload will get set
658 by noticing that the frame size has changed. */
660 if (secondary_memlocs
[(int) mode
] == 0)
662 #ifdef SECONDARY_MEMORY_NEEDED_RTX
663 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
665 secondary_memlocs
[(int) mode
]
666 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
670 /* Get a version of the address doing any eliminations needed. If that
671 didn't give us a new MEM, make a new one if it isn't valid. */
673 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
, 0);
674 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
676 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
677 loc
= copy_rtx (loc
);
679 /* The only time the call below will do anything is if the stack
680 offset is too large. In that case IND_LEVELS doesn't matter, so we
681 can just pass a zero. Adjust the type to be the address of the
682 corresponding object. If the address was valid, save the eliminated
683 address. If it wasn't valid, we need to make a reload each time, so
688 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
689 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
692 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
696 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
700 /* Clear any secondary memory locations we've made. */
703 clear_secondary_mem ()
705 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
707 #endif /* SECONDARY_MEMORY_NEEDED */
709 /* Find the largest class for which every register number plus N is valid in
710 M1 (if in range). Abort if no such class exists. */
712 static enum reg_class
713 find_valid_class (m1
, n
)
714 enum machine_mode m1
;
719 enum reg_class best_class
;
722 for (class = 1; class < N_REG_CLASSES
; class++)
725 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
726 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
727 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
728 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
731 if (! bad
&& reg_class_size
[class] > best_size
)
732 best_class
= class, best_size
= reg_class_size
[class];
741 /* Record one reload that needs to be performed.
742 IN is an rtx saying where the data are to be found before this instruction.
743 OUT says where they must be stored after the instruction.
744 (IN is zero for data not read, and OUT is zero for data not written.)
745 INLOC and OUTLOC point to the places in the instructions where
746 IN and OUT were found.
747 If IN and OUT are both non-zero, it means the same register must be used
748 to reload both IN and OUT.
750 CLASS is a register class required for the reloaded data.
751 INMODE is the machine mode that the instruction requires
752 for the reg that replaces IN and OUTMODE is likewise for OUT.
754 If IN is zero, then OUT's location and mode should be passed as
757 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
759 OPTIONAL nonzero means this reload does not need to be performed:
760 it can be discarded if that is more convenient.
762 OPNUM and TYPE say what the purpose of this reload is.
764 The return value is the reload-number for this reload.
766 If both IN and OUT are nonzero, in some rare cases we might
767 want to make two separate reloads. (Actually we never do this now.)
768 Therefore, the reload-number for OUT is stored in
769 output_reloadnum when we return; the return value applies to IN.
770 Usually (presently always), when IN and OUT are nonzero,
771 the two reload-numbers are equal, but the caller should be careful to
775 push_reload (in
, out
, inloc
, outloc
, class,
776 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
777 register rtx in
, out
;
779 enum reg_class
class;
780 enum machine_mode inmode
, outmode
;
784 enum reload_type type
;
788 int dont_remove_subreg
= 0;
789 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
790 int secondary_in_reload
= -1, secondary_out_reload
= -1;
791 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
792 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
794 /* INMODE and/or OUTMODE could be VOIDmode if no mode
795 has been specified for the operand. In that case,
796 use the operand's mode as the mode to reload. */
797 if (inmode
== VOIDmode
&& in
!= 0)
798 inmode
= GET_MODE (in
);
799 if (outmode
== VOIDmode
&& out
!= 0)
800 outmode
= GET_MODE (out
);
802 /* If IN is a pseudo register everywhere-equivalent to a constant, and
803 it is not in a hard register, reload straight from the constant,
804 since we want to get rid of such pseudo registers.
805 Often this is done earlier, but not always in find_reloads_address. */
806 if (in
!= 0 && GET_CODE (in
) == REG
)
808 register int regno
= REGNO (in
);
810 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
811 && reg_equiv_constant
[regno
] != 0)
812 in
= reg_equiv_constant
[regno
];
815 /* Likewise for OUT. Of course, OUT will never be equivalent to
816 an actual constant, but it might be equivalent to a memory location
817 (in the case of a parameter). */
818 if (out
!= 0 && GET_CODE (out
) == REG
)
820 register int regno
= REGNO (out
);
822 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
823 && reg_equiv_constant
[regno
] != 0)
824 out
= reg_equiv_constant
[regno
];
827 /* If we have a read-write operand with an address side-effect,
828 change either IN or OUT so the side-effect happens only once. */
829 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
831 if (GET_CODE (XEXP (in
, 0)) == POST_INC
832 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
833 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
834 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
835 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
836 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
839 /* If we are reloading a (SUBREG constant ...), really reload just the
840 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
841 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
842 a pseudo and hence will become a MEM) with M1 wider than M2 and the
843 register is a pseudo, also reload the inside expression.
844 For machines that extend byte loads, do this for any SUBREG of a pseudo
845 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
846 M2 is an integral mode that gets extended when loaded.
847 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
848 either M1 is not valid for R or M2 is wider than a word but we only
849 need one word to store an M2-sized quantity in R.
850 (However, if OUT is nonzero, we need to reload the reg *and*
851 the subreg, so do nothing here, and let following statement handle it.)
853 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
854 we can't handle it here because CONST_INT does not indicate a mode.
856 Similarly, we must reload the inside expression if we have a
857 STRICT_LOW_PART (presumably, in == out in the cas).
859 Also reload the inner expression if it does not require a secondary
860 reload but the SUBREG does.
862 Finally, reload the inner expression if it is a register that is in
863 the class whose registers cannot be referenced in a different size
864 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
865 cannot reload just the inside since we might end up with the wrong
868 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& SUBREG_WORD (in
) == 0
869 #ifdef CLASS_CANNOT_CHANGE_SIZE
870 && class != CLASS_CANNOT_CHANGE_SIZE
872 && (CONSTANT_P (SUBREG_REG (in
))
873 || GET_CODE (SUBREG_REG (in
)) == PLUS
875 || (((GET_CODE (SUBREG_REG (in
)) == REG
876 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
877 || GET_CODE (SUBREG_REG (in
)) == MEM
)
878 && ((GET_MODE_SIZE (inmode
)
879 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
880 #ifdef LOAD_EXTEND_OP
881 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
882 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
884 && (GET_MODE_SIZE (inmode
)
885 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
886 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
887 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
890 || (GET_CODE (SUBREG_REG (in
)) == REG
891 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
892 /* The case where out is nonzero
893 is handled differently in the following statement. */
894 && (out
== 0 || SUBREG_WORD (in
) == 0)
895 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
896 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
898 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
900 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
901 GET_MODE (SUBREG_REG (in
)))))
902 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
905 #ifdef SECONDARY_INPUT_RELOAD_CLASS
906 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
907 && (SECONDARY_INPUT_RELOAD_CLASS (class,
908 GET_MODE (SUBREG_REG (in
)),
912 #ifdef CLASS_CANNOT_CHANGE_SIZE
913 || (GET_CODE (SUBREG_REG (in
)) == REG
914 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
915 && (TEST_HARD_REG_BIT
916 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
917 REGNO (SUBREG_REG (in
))))
918 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
919 != GET_MODE_SIZE (inmode
)))
923 in_subreg_loc
= inloc
;
924 inloc
= &SUBREG_REG (in
);
926 #ifndef LOAD_EXTEND_OP
927 if (GET_CODE (in
) == MEM
)
928 /* This is supposed to happen only for paradoxical subregs made by
929 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
930 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
933 inmode
= GET_MODE (in
);
936 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
937 either M1 is not valid for R or M2 is wider than a word but we only
938 need one word to store an M2-sized quantity in R.
940 However, we must reload the inner reg *as well as* the subreg in
943 /* Similar issue for (SUBREG constant ...) if it was not handled by the
944 code above. This can happen if SUBREG_WORD != 0. */
946 if (in
!= 0 && GET_CODE (in
) == SUBREG
947 && (CONSTANT_P (SUBREG_REG (in
))
948 || (GET_CODE (SUBREG_REG (in
)) == REG
949 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
950 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
953 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
954 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
956 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
958 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
959 GET_MODE (SUBREG_REG (in
)))))))))
961 /* This relies on the fact that emit_reload_insns outputs the
962 instructions for input reloads of type RELOAD_OTHER in the same
963 order as the reloads. Thus if the outer reload is also of type
964 RELOAD_OTHER, we are guaranteed that this inner reload will be
965 output before the outer reload. */
966 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
967 find_valid_class (inmode
, SUBREG_WORD (in
)),
968 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
969 dont_remove_subreg
= 1;
972 /* Similarly for paradoxical and problematical SUBREGs on the output.
973 Note that there is no reason we need worry about the previous value
974 of SUBREG_REG (out); even if wider than out,
975 storing in a subreg is entitled to clobber it all
976 (except in the case of STRICT_LOW_PART,
977 and in that case the constraint should label it input-output.) */
978 if (out
!= 0 && GET_CODE (out
) == SUBREG
&& SUBREG_WORD (out
) == 0
979 #ifdef CLASS_CANNOT_CHANGE_SIZE
980 && class != CLASS_CANNOT_CHANGE_SIZE
982 && (CONSTANT_P (SUBREG_REG (out
))
984 || (((GET_CODE (SUBREG_REG (out
)) == REG
985 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
986 || GET_CODE (SUBREG_REG (out
)) == MEM
)
987 && ((GET_MODE_SIZE (outmode
)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
989 || (GET_CODE (SUBREG_REG (out
)) == REG
990 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
991 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
992 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
994 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
996 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
997 GET_MODE (SUBREG_REG (out
)))))
998 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
999 + SUBREG_WORD (out
)),
1001 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1002 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1003 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1004 GET_MODE (SUBREG_REG (out
)),
1008 #ifdef CLASS_CANNOT_CHANGE_SIZE
1009 || (GET_CODE (SUBREG_REG (out
)) == REG
1010 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1011 && (TEST_HARD_REG_BIT
1012 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1013 REGNO (SUBREG_REG (out
))))
1014 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1015 != GET_MODE_SIZE (outmode
)))
1019 out_subreg_loc
= outloc
;
1020 outloc
= &SUBREG_REG (out
);
1022 #ifndef LOAD_EXTEND_OP
1023 if (GET_CODE (out
) == MEM
1024 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1027 outmode
= GET_MODE (out
);
1030 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1031 either M1 is not valid for R or M2 is wider than a word but we only
1032 need one word to store an M2-sized quantity in R.
1034 However, we must reload the inner reg *as well as* the subreg in
1035 that case. In this case, the inner reg is an in-out reload. */
1037 if (out
!= 0 && GET_CODE (out
) == SUBREG
1038 && GET_CODE (SUBREG_REG (out
)) == REG
1039 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1040 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1042 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1043 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1045 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1047 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1048 GET_MODE (SUBREG_REG (out
)))))))
1050 /* This relies on the fact that emit_reload_insns outputs the
1051 instructions for output reloads of type RELOAD_OTHER in reverse
1052 order of the reloads. Thus if the outer reload is also of type
1053 RELOAD_OTHER, we are guaranteed that this inner reload will be
1054 output after the outer reload. */
1055 dont_remove_subreg
= 1;
1056 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1058 find_valid_class (outmode
, SUBREG_WORD (out
)),
1059 VOIDmode
, VOIDmode
, 0, 0,
1060 opnum
, RELOAD_OTHER
);
1063 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1064 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1065 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1066 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1069 /* If IN is a SUBREG of a hard register, make a new REG. This
1070 simplifies some of the cases below. */
1072 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1073 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1074 && ! dont_remove_subreg
)
1075 in
= gen_rtx (REG
, GET_MODE (in
),
1076 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1078 /* Similarly for OUT. */
1079 if (out
!= 0 && GET_CODE (out
) == SUBREG
1080 && GET_CODE (SUBREG_REG (out
)) == REG
1081 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1082 && ! dont_remove_subreg
)
1083 out
= gen_rtx (REG
, GET_MODE (out
),
1084 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1086 /* Narrow down the class of register wanted if that is
1087 desirable on this machine for efficiency. */
1089 class = PREFERRED_RELOAD_CLASS (in
, class);
1091 /* Output reloads may need analogous treatment, different in detail. */
1092 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1094 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1097 /* Make sure we use a class that can handle the actual pseudo
1098 inside any subreg. For example, on the 386, QImode regs
1099 can appear within SImode subregs. Although GENERAL_REGS
1100 can handle SImode, QImode needs a smaller class. */
1101 #ifdef LIMIT_RELOAD_CLASS
1103 class = LIMIT_RELOAD_CLASS (inmode
, class);
1104 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1105 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1108 class = LIMIT_RELOAD_CLASS (outmode
, class);
1109 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1110 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1113 /* Verify that this class is at least possible for the mode that
1115 if (this_insn_is_asm
)
1117 enum machine_mode mode
;
1118 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1122 if (mode
== VOIDmode
)
1124 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1129 outmode
= word_mode
;
1131 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1132 if (HARD_REGNO_MODE_OK (i
, mode
)
1133 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1135 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1138 for (j
= 1; j
< nregs
; j
++)
1139 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1144 if (i
== FIRST_PSEUDO_REGISTER
)
1146 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1151 if (class == NO_REGS
)
1154 /* We can use an existing reload if the class is right
1155 and at least one of IN and OUT is a match
1156 and the other is at worst neutral.
1157 (A zero compared against anything is neutral.)
1159 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1160 for the same thing since that can cause us to need more reload registers
1161 than we otherwise would. */
1163 for (i
= 0; i
< n_reloads
; i
++)
1164 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1165 || reg_class_subset_p (reload_reg_class
[i
], class))
1166 /* If the existing reload has a register, it must fit our class. */
1167 && (reload_reg_rtx
[i
] == 0
1168 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1169 true_regnum (reload_reg_rtx
[i
])))
1170 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1171 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1173 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1174 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1175 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
1176 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1177 opnum
, reload_opnum
[i
]))
1180 /* Reloading a plain reg for input can match a reload to postincrement
1181 that reg, since the postincrement's value is the right value.
1182 Likewise, it can match a preincrement reload, since we regard
1183 the preincrementation as happening before any ref in this insn
1184 to that register. */
1186 for (i
= 0; i
< n_reloads
; i
++)
1187 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1188 || reg_class_subset_p (reload_reg_class
[i
], class))
1189 /* If the existing reload has a register, it must fit our class. */
1190 && (reload_reg_rtx
[i
] == 0
1191 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1192 true_regnum (reload_reg_rtx
[i
])))
1193 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1194 && ((GET_CODE (in
) == REG
1195 && (GET_CODE (reload_in
[i
]) == POST_INC
1196 || GET_CODE (reload_in
[i
]) == POST_DEC
1197 || GET_CODE (reload_in
[i
]) == PRE_INC
1198 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1199 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1201 (GET_CODE (reload_in
[i
]) == REG
1202 && (GET_CODE (in
) == POST_INC
1203 || GET_CODE (in
) == POST_DEC
1204 || GET_CODE (in
) == PRE_INC
1205 || GET_CODE (in
) == PRE_DEC
)
1206 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1207 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
1208 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1209 opnum
, reload_opnum
[i
]))
1211 /* Make sure reload_in ultimately has the increment,
1212 not the plain register. */
1213 if (GET_CODE (in
) == REG
)
1220 /* See if we need a secondary reload register to move between CLASS
1221 and IN or CLASS and OUT. Get the icode and push any required reloads
1222 needed for each of them if so. */
1224 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1227 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1228 &secondary_in_icode
);
1231 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1232 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1233 secondary_out_reload
1234 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1235 type
, &secondary_out_icode
);
1238 /* We found no existing reload suitable for re-use.
1239 So add an additional reload. */
1241 #ifdef SECONDARY_MEMORY_NEEDED
1242 /* If a memory location is needed for the copy, make one. */
1243 if (in
!= 0 && GET_CODE (in
) == REG
1244 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1245 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1247 get_secondary_mem (in
, inmode
, opnum
, type
);
1252 reload_out
[i
] = out
;
1253 reload_reg_class
[i
] = class;
1254 reload_inmode
[i
] = inmode
;
1255 reload_outmode
[i
] = outmode
;
1256 reload_reg_rtx
[i
] = 0;
1257 reload_optional
[i
] = optional
;
1259 reload_nocombine
[i
] = 0;
1260 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1261 reload_opnum
[i
] = opnum
;
1262 reload_when_needed
[i
] = type
;
1263 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1264 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1265 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1266 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1267 reload_secondary_p
[i
] = 0;
1271 #ifdef SECONDARY_MEMORY_NEEDED
1272 if (out
!= 0 && GET_CODE (out
) == REG
1273 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1274 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1276 get_secondary_mem (out
, outmode
, opnum
, type
);
1281 /* We are reusing an existing reload,
1282 but we may have additional information for it.
1283 For example, we may now have both IN and OUT
1284 while the old one may have just one of them. */
1286 /* The modes can be different. If they are, we want to reload in
1287 the larger mode, so that the value is valid for both modes. */
1288 if (inmode
!= VOIDmode
1289 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (reload_inmode
[i
]))
1290 reload_inmode
[i
] = inmode
;
1291 if (outmode
!= VOIDmode
1292 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (reload_outmode
[i
]))
1293 reload_outmode
[i
] = outmode
;
1297 reload_out
[i
] = out
;
1298 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1299 reload_reg_class
[i
] = class;
1300 reload_optional
[i
] &= optional
;
1301 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1302 opnum
, reload_opnum
[i
]))
1303 reload_when_needed
[i
] = RELOAD_OTHER
;
1304 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1307 /* If the ostensible rtx being reload differs from the rtx found
1308 in the location to substitute, this reload is not safe to combine
1309 because we cannot reliably tell whether it appears in the insn. */
1311 if (in
!= 0 && in
!= *inloc
)
1312 reload_nocombine
[i
] = 1;
1315 /* This was replaced by changes in find_reloads_address_1 and the new
1316 function inc_for_reload, which go with a new meaning of reload_inc. */
1318 /* If this is an IN/OUT reload in an insn that sets the CC,
1319 it must be for an autoincrement. It doesn't work to store
1320 the incremented value after the insn because that would clobber the CC.
1321 So we must do the increment of the value reloaded from,
1322 increment it, store it back, then decrement again. */
1323 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1327 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1328 /* If we did not find a nonzero amount-to-increment-by,
1329 that contradicts the belief that IN is being incremented
1330 in an address in this insn. */
1331 if (reload_inc
[i
] == 0)
1336 /* If we will replace IN and OUT with the reload-reg,
1337 record where they are located so that substitution need
1338 not do a tree walk. */
1340 if (replace_reloads
)
1344 register struct replacement
*r
= &replacements
[n_replacements
++];
1346 r
->subreg_loc
= in_subreg_loc
;
1350 if (outloc
!= 0 && outloc
!= inloc
)
1352 register struct replacement
*r
= &replacements
[n_replacements
++];
1355 r
->subreg_loc
= out_subreg_loc
;
1360 /* If this reload is just being introduced and it has both
1361 an incoming quantity and an outgoing quantity that are
1362 supposed to be made to match, see if either one of the two
1363 can serve as the place to reload into.
1365 If one of them is acceptable, set reload_reg_rtx[i]
1368 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1370 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1372 reload_reg_class
[i
], i
,
1373 earlyclobber_operand_p (out
));
1375 /* If the outgoing register already contains the same value
1376 as the incoming one, we can dispense with loading it.
1377 The easiest way to tell the caller that is to give a phony
1378 value for the incoming operand (same as outgoing one). */
1379 if (reload_reg_rtx
[i
] == out
1380 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1381 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1382 static_reload_reg_p
, i
, inmode
))
1386 /* If this is an input reload and the operand contains a register that
1387 dies in this insn and is used nowhere else, see if it is the right class
1388 to be used for this reload. Use it if so. (This occurs most commonly
1389 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1390 this if it is also an output reload that mentions the register unless
1391 the output is a SUBREG that clobbers an entire register.
1393 Note that the operand might be one of the spill regs, if it is a
1394 pseudo reg and we are in a block where spilling has not taken place.
1395 But if there is no spilling in this block, that is OK.
1396 An explicitly used hard reg cannot be a spill reg. */
1398 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1403 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1404 if (REG_NOTE_KIND (note
) == REG_DEAD
1405 && GET_CODE (XEXP (note
, 0)) == REG
1406 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1407 && reg_mentioned_p (XEXP (note
, 0), in
)
1408 && ! refers_to_regno_for_reload_p (regno
,
1410 + HARD_REGNO_NREGS (regno
,
1412 PATTERN (this_insn
), inloc
)
1413 /* If this is also an output reload, IN cannot be used as
1414 the reload register if it is set in this insn unless IN
1416 && (out
== 0 || in
== out
1417 || ! hard_reg_set_here_p (regno
,
1419 + HARD_REGNO_NREGS (regno
,
1421 PATTERN (this_insn
)))
1422 /* ??? Why is this code so different from the previous?
1423 Is there any simple coherent way to describe the two together?
1424 What's going on here. */
1426 || (GET_CODE (in
) == SUBREG
1427 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1429 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1430 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1431 /* Make sure the operand fits in the reg that dies. */
1432 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1433 && HARD_REGNO_MODE_OK (regno
, inmode
)
1434 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1435 && HARD_REGNO_MODE_OK (regno
, outmode
)
1436 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1437 && !fixed_regs
[regno
])
1439 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1445 output_reloadnum
= i
;
1450 /* Record an additional place we must replace a value
1451 for which we have already recorded a reload.
1452 RELOADNUM is the value returned by push_reload
1453 when the reload was recorded.
1454 This is used in insn patterns that use match_dup. */
1457 push_replacement (loc
, reloadnum
, mode
)
1460 enum machine_mode mode
;
1462 if (replace_reloads
)
1464 register struct replacement
*r
= &replacements
[n_replacements
++];
1465 r
->what
= reloadnum
;
1472 /* Transfer all replacements that used to be in reload FROM to be in
1476 transfer_replacements (to
, from
)
1481 for (i
= 0; i
< n_replacements
; i
++)
1482 if (replacements
[i
].what
== from
)
1483 replacements
[i
].what
= to
;
1486 /* If there is only one output reload, and it is not for an earlyclobber
1487 operand, try to combine it with a (logically unrelated) input reload
1488 to reduce the number of reload registers needed.
1490 This is safe if the input reload does not appear in
1491 the value being output-reloaded, because this implies
1492 it is not needed any more once the original insn completes.
1494 If that doesn't work, see we can use any of the registers that
1495 die in this insn as a reload register. We can if it is of the right
1496 class and does not appear in the value being output-reloaded. */
1502 int output_reload
= -1;
1503 int secondary_out
= -1;
1506 /* Find the output reload; return unless there is exactly one
1507 and that one is mandatory. */
1509 for (i
= 0; i
< n_reloads
; i
++)
1510 if (reload_out
[i
] != 0)
1512 if (output_reload
>= 0)
1517 if (output_reload
< 0 || reload_optional
[output_reload
])
1520 /* An input-output reload isn't combinable. */
1522 if (reload_in
[output_reload
] != 0)
1525 /* If this reload is for an earlyclobber operand, we can't do anything. */
1526 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1529 /* Check each input reload; can we combine it? */
1531 for (i
= 0; i
< n_reloads
; i
++)
1532 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1533 /* Life span of this reload must not extend past main insn. */
1534 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1535 && reload_when_needed
[i
] != RELOAD_FOR_OUTADDR_ADDRESS
1536 && reload_when_needed
[i
] != RELOAD_OTHER
1537 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1538 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1539 reload_outmode
[output_reload
]))
1540 && reload_inc
[i
] == 0
1541 && reload_reg_rtx
[i
] == 0
1542 #ifdef SECONDARY_MEMORY_NEEDED
1543 /* Don't combine two reloads with different secondary
1544 memory locations. */
1545 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1546 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1547 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1548 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1550 && (SMALL_REGISTER_CLASSES
1551 ? (reload_reg_class
[i
] == reload_reg_class
[output_reload
])
1552 : (reg_class_subset_p (reload_reg_class
[i
],
1553 reload_reg_class
[output_reload
])
1554 || reg_class_subset_p (reload_reg_class
[output_reload
],
1555 reload_reg_class
[i
])))
1556 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1557 /* Args reversed because the first arg seems to be
1558 the one that we imagine being modified
1559 while the second is the one that might be affected. */
1560 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1562 /* However, if the input is a register that appears inside
1563 the output, then we also can't share.
1564 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1565 If the same reload reg is used for both reg 69 and the
1566 result to be stored in memory, then that result
1567 will clobber the address of the memory ref. */
1568 && ! (GET_CODE (reload_in
[i
]) == REG
1569 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1570 reload_out
[output_reload
]))))
1571 && (reg_class_size
[(int) reload_reg_class
[i
]]
1572 || SMALL_REGISTER_CLASSES
)
1573 /* We will allow making things slightly worse by combining an
1574 input and an output, but no worse than that. */
1575 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1576 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1580 /* We have found a reload to combine with! */
1581 reload_out
[i
] = reload_out
[output_reload
];
1582 reload_outmode
[i
] = reload_outmode
[output_reload
];
1583 /* Mark the old output reload as inoperative. */
1584 reload_out
[output_reload
] = 0;
1585 /* The combined reload is needed for the entire insn. */
1586 reload_when_needed
[i
] = RELOAD_OTHER
;
1587 /* If the output reload had a secondary reload, copy it. */
1588 if (reload_secondary_out_reload
[output_reload
] != -1)
1590 reload_secondary_out_reload
[i
]
1591 = reload_secondary_out_reload
[output_reload
];
1592 reload_secondary_out_icode
[i
]
1593 = reload_secondary_out_icode
[output_reload
];
1596 #ifdef SECONDARY_MEMORY_NEEDED
1597 /* Copy any secondary MEM. */
1598 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1599 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1600 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1602 /* If required, minimize the register class. */
1603 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1604 reload_reg_class
[i
]))
1605 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1607 /* Transfer all replacements from the old reload to the combined. */
1608 for (j
= 0; j
< n_replacements
; j
++)
1609 if (replacements
[j
].what
== output_reload
)
1610 replacements
[j
].what
= i
;
1615 /* If this insn has only one operand that is modified or written (assumed
1616 to be the first), it must be the one corresponding to this reload. It
1617 is safe to use anything that dies in this insn for that output provided
1618 that it does not occur in the output (we already know it isn't an
1619 earlyclobber. If this is an asm insn, give up. */
1621 if (INSN_CODE (this_insn
) == -1)
1624 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1625 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1626 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1629 /* See if some hard register that dies in this insn and is not used in
1630 the output is the right class. Only works if the register we pick
1631 up can fully hold our output reload. */
1632 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1633 if (REG_NOTE_KIND (note
) == REG_DEAD
1634 && GET_CODE (XEXP (note
, 0)) == REG
1635 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1636 reload_out
[output_reload
])
1637 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1638 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1639 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1640 REGNO (XEXP (note
, 0)))
1641 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1642 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1643 /* Ensure that a secondary or tertiary reload for this output
1644 won't want this register. */
1645 && ((secondary_out
= reload_secondary_out_reload
[output_reload
]) == -1
1646 || (! (TEST_HARD_REG_BIT
1647 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1648 REGNO (XEXP (note
, 0))))
1649 && ((secondary_out
= reload_secondary_out_reload
[secondary_out
]) == -1
1650 || ! (TEST_HARD_REG_BIT
1651 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1652 REGNO (XEXP (note
, 0)))))))
1653 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1655 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1656 reload_outmode
[output_reload
],
1657 REGNO (XEXP (note
, 0)));
1662 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1663 See if one of IN and OUT is a register that may be used;
1664 this is desirable since a spill-register won't be needed.
1665 If so, return the register rtx that proves acceptable.
1667 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1668 CLASS is the register class required for the reload.
1670 If FOR_REAL is >= 0, it is the number of the reload,
1671 and in some cases when it can be discovered that OUT doesn't need
1672 to be computed, clear out reload_out[FOR_REAL].
1674 If FOR_REAL is -1, this should not be done, because this call
1675 is just to see if a register can be found, not to find and install it.
1677 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1678 puts an additional constraint on being able to use IN for OUT since
1679 IN must not appear elsewhere in the insn (it is assumed that IN itself
1680 is safe from the earlyclobber). */
1683 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1684 inmode
, outmode
, class, for_real
, earlyclobber
)
1685 rtx real_in
, real_out
;
1686 rtx
*inloc
, *outloc
;
1687 enum machine_mode inmode
, outmode
;
1688 enum reg_class
class;
1698 /* If operands exceed a word, we can't use either of them
1699 unless they have the same size. */
1700 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1701 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1702 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1705 /* Find the inside of any subregs. */
1706 while (GET_CODE (out
) == SUBREG
)
1708 out_offset
= SUBREG_WORD (out
);
1709 out
= SUBREG_REG (out
);
1711 while (GET_CODE (in
) == SUBREG
)
1713 in_offset
= SUBREG_WORD (in
);
1714 in
= SUBREG_REG (in
);
1717 /* Narrow down the reg class, the same way push_reload will;
1718 otherwise we might find a dummy now, but push_reload won't. */
1719 class = PREFERRED_RELOAD_CLASS (in
, class);
1721 /* See if OUT will do. */
1722 if (GET_CODE (out
) == REG
1723 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1725 register int regno
= REGNO (out
) + out_offset
;
1726 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1729 /* When we consider whether the insn uses OUT,
1730 ignore references within IN. They don't prevent us
1731 from copying IN into OUT, because those refs would
1732 move into the insn that reloads IN.
1734 However, we only ignore IN in its role as this reload.
1735 If the insn uses IN elsewhere and it contains OUT,
1736 that counts. We can't be sure it's the "same" operand
1737 so it might not go through this reload. */
1739 *inloc
= const0_rtx
;
1741 if (regno
< FIRST_PSEUDO_REGISTER
1742 /* A fixed reg that can overlap other regs better not be used
1743 for reloading in any way. */
1744 #ifdef OVERLAPPING_REGNO_P
1745 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1747 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1748 PATTERN (this_insn
), outloc
))
1751 for (i
= 0; i
< nwords
; i
++)
1752 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1758 if (GET_CODE (real_out
) == REG
)
1761 value
= gen_rtx (REG
, outmode
, regno
);
1768 /* Consider using IN if OUT was not acceptable
1769 or if OUT dies in this insn (like the quotient in a divmod insn).
1770 We can't use IN unless it is dies in this insn,
1771 which means we must know accurately which hard regs are live.
1772 Also, the result can't go in IN if IN is used within OUT,
1773 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1774 if (hard_regs_live_known
1775 && GET_CODE (in
) == REG
1776 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1778 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1779 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1780 && !fixed_regs
[REGNO (in
)]
1781 && HARD_REGNO_MODE_OK (REGNO (in
),
1782 /* The only case where out and real_out might
1783 have different modes is where real_out
1784 is a subreg, and in that case, out
1786 (GET_MODE (out
) != VOIDmode
1787 ? GET_MODE (out
) : outmode
)))
1789 register int regno
= REGNO (in
) + in_offset
;
1790 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1792 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1793 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1794 PATTERN (this_insn
))
1796 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1797 PATTERN (this_insn
), inloc
)))
1800 for (i
= 0; i
< nwords
; i
++)
1801 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1807 /* If we were going to use OUT as the reload reg
1808 and changed our mind, it means OUT is a dummy that
1809 dies here. So don't bother copying value to it. */
1810 if (for_real
>= 0 && value
== real_out
)
1811 reload_out
[for_real
] = 0;
1812 if (GET_CODE (real_in
) == REG
)
1815 value
= gen_rtx (REG
, inmode
, regno
);
1823 /* This page contains subroutines used mainly for determining
1824 whether the IN or an OUT of a reload can serve as the
1827 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1830 earlyclobber_operand_p (x
)
1835 for (i
= 0; i
< n_earlyclobbers
; i
++)
1836 if (reload_earlyclobbers
[i
] == x
)
1842 /* Return 1 if expression X alters a hard reg in the range
1843 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1844 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1845 X should be the body of an instruction. */
1848 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1849 register int beg_regno
, end_regno
;
1852 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1854 register rtx op0
= SET_DEST (x
);
1855 while (GET_CODE (op0
) == SUBREG
)
1856 op0
= SUBREG_REG (op0
);
1857 if (GET_CODE (op0
) == REG
)
1859 register int r
= REGNO (op0
);
1860 /* See if this reg overlaps range under consideration. */
1862 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1866 else if (GET_CODE (x
) == PARALLEL
)
1868 register int i
= XVECLEN (x
, 0) - 1;
1870 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1877 /* Return 1 if ADDR is a valid memory address for mode MODE,
1878 and check that each pseudo reg has the proper kind of
1882 strict_memory_address_p (mode
, addr
)
1883 enum machine_mode mode
;
1886 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1893 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1894 if they are the same hard reg, and has special hacks for
1895 autoincrement and autodecrement.
1896 This is specifically intended for find_reloads to use
1897 in determining whether two operands match.
1898 X is the operand whose number is the lower of the two.
1900 The value is 2 if Y contains a pre-increment that matches
1901 a non-incrementing address in X. */
1903 /* ??? To be completely correct, we should arrange to pass
1904 for X the output operand and for Y the input operand.
1905 For now, we assume that the output operand has the lower number
1906 because that is natural in (SET output (... input ...)). */
1909 operands_match_p (x
, y
)
1913 register RTX_CODE code
= GET_CODE (x
);
1919 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1920 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1921 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1927 i
= REGNO (SUBREG_REG (x
));
1928 if (i
>= FIRST_PSEUDO_REGISTER
)
1930 i
+= SUBREG_WORD (x
);
1935 if (GET_CODE (y
) == SUBREG
)
1937 j
= REGNO (SUBREG_REG (y
));
1938 if (j
>= FIRST_PSEUDO_REGISTER
)
1940 j
+= SUBREG_WORD (y
);
1945 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1946 multiple hard register group, so that for example (reg:DI 0) and
1947 (reg:SI 1) will be considered the same register. */
1948 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1949 && i
< FIRST_PSEUDO_REGISTER
)
1950 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1951 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1952 && j
< FIRST_PSEUDO_REGISTER
)
1953 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1957 /* If two operands must match, because they are really a single
1958 operand of an assembler insn, then two postincrements are invalid
1959 because the assembler insn would increment only once.
1960 On the other hand, an postincrement matches ordinary indexing
1961 if the postincrement is the output operand. */
1962 if (code
== POST_DEC
|| code
== POST_INC
)
1963 return operands_match_p (XEXP (x
, 0), y
);
1964 /* Two preincrements are invalid
1965 because the assembler insn would increment only once.
1966 On the other hand, an preincrement matches ordinary indexing
1967 if the preincrement is the input operand.
1968 In this case, return 2, since some callers need to do special
1969 things when this happens. */
1970 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1971 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1975 /* Now we have disposed of all the cases
1976 in which different rtx codes can match. */
1977 if (code
!= GET_CODE (y
))
1979 if (code
== LABEL_REF
)
1980 return XEXP (x
, 0) == XEXP (y
, 0);
1981 if (code
== SYMBOL_REF
)
1982 return XSTR (x
, 0) == XSTR (y
, 0);
1984 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1986 if (GET_MODE (x
) != GET_MODE (y
))
1989 /* Compare the elements. If any pair of corresponding elements
1990 fail to match, return 0 for the whole things. */
1993 fmt
= GET_RTX_FORMAT (code
);
1994 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2000 if (XWINT (x
, i
) != XWINT (y
, i
))
2005 if (XINT (x
, i
) != XINT (y
, i
))
2010 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2013 /* If any subexpression returns 2,
2014 we should return 2 if we are successful. */
2022 /* It is believed that rtx's at this level will never
2023 contain anything but integers and other rtx's,
2024 except for within LABEL_REFs and SYMBOL_REFs. */
2029 return 1 + success_2
;
2032 /* Return the number of times character C occurs in string S. */
2035 n_occurrences (c
, s
)
2045 /* Describe the range of registers or memory referenced by X.
2046 If X is a register, set REG_FLAG and put the first register
2047 number into START and the last plus one into END.
2048 If X is a memory reference, put a base address into BASE
2049 and a range of integer offsets into START and END.
2050 If X is pushing on the stack, we can assume it causes no trouble,
2051 so we set the SAFE field. */
2053 static struct decomposition
2057 struct decomposition val
;
2062 if (GET_CODE (x
) == MEM
)
2064 rtx base
, offset
= 0;
2065 rtx addr
= XEXP (x
, 0);
2067 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2068 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2070 val
.base
= XEXP (addr
, 0);
2071 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2072 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2073 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2077 if (GET_CODE (addr
) == CONST
)
2079 addr
= XEXP (addr
, 0);
2082 if (GET_CODE (addr
) == PLUS
)
2084 if (CONSTANT_P (XEXP (addr
, 0)))
2086 base
= XEXP (addr
, 1);
2087 offset
= XEXP (addr
, 0);
2089 else if (CONSTANT_P (XEXP (addr
, 1)))
2091 base
= XEXP (addr
, 0);
2092 offset
= XEXP (addr
, 1);
2099 offset
= const0_rtx
;
2101 if (GET_CODE (offset
) == CONST
)
2102 offset
= XEXP (offset
, 0);
2103 if (GET_CODE (offset
) == PLUS
)
2105 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2107 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
2108 offset
= XEXP (offset
, 0);
2110 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2112 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
2113 offset
= XEXP (offset
, 1);
2117 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2118 offset
= const0_rtx
;
2121 else if (GET_CODE (offset
) != CONST_INT
)
2123 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2124 offset
= const0_rtx
;
2127 if (all_const
&& GET_CODE (base
) == PLUS
)
2128 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2130 if (GET_CODE (offset
) != CONST_INT
)
2133 val
.start
= INTVAL (offset
);
2134 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2138 else if (GET_CODE (x
) == REG
)
2141 val
.start
= true_regnum (x
);
2144 /* A pseudo with no hard reg. */
2145 val
.start
= REGNO (x
);
2146 val
.end
= val
.start
+ 1;
2150 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2152 else if (GET_CODE (x
) == SUBREG
)
2154 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2155 /* This could be more precise, but it's good enough. */
2156 return decompose (SUBREG_REG (x
));
2158 val
.start
= true_regnum (x
);
2160 return decompose (SUBREG_REG (x
));
2163 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2165 else if (CONSTANT_P (x
)
2166 /* This hasn't been assigned yet, so it can't conflict yet. */
2167 || GET_CODE (x
) == SCRATCH
)
2174 /* Return 1 if altering Y will not modify the value of X.
2175 Y is also described by YDATA, which should be decompose (Y). */
2178 immune_p (x
, y
, ydata
)
2180 struct decomposition ydata
;
2182 struct decomposition xdata
;
2185 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2189 if (GET_CODE (y
) != MEM
)
2191 /* If Y is memory and X is not, Y can't affect X. */
2192 if (GET_CODE (x
) != MEM
)
2195 xdata
= decompose (x
);
2197 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2199 /* If bases are distinct symbolic constants, there is no overlap. */
2200 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2202 /* Constants and stack slots never overlap. */
2203 if (CONSTANT_P (xdata
.base
)
2204 && (ydata
.base
== frame_pointer_rtx
2205 || ydata
.base
== hard_frame_pointer_rtx
2206 || ydata
.base
== stack_pointer_rtx
))
2208 if (CONSTANT_P (ydata
.base
)
2209 && (xdata
.base
== frame_pointer_rtx
2210 || xdata
.base
== hard_frame_pointer_rtx
2211 || xdata
.base
== stack_pointer_rtx
))
2213 /* If either base is variable, we don't know anything. */
2218 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2221 /* Similar, but calls decompose. */
2224 safe_from_earlyclobber (op
, clobber
)
2227 struct decomposition early_data
;
2229 early_data
= decompose (clobber
);
2230 return immune_p (op
, clobber
, early_data
);
2233 /* Main entry point of this file: search the body of INSN
2234 for values that need reloading and record them with push_reload.
2235 REPLACE nonzero means record also where the values occur
2236 so that subst_reloads can be used.
2238 IND_LEVELS says how many levels of indirection are supported by this
2239 machine; a value of zero means that a memory reference is not a valid
2242 LIVE_KNOWN says we have valid information about which hard
2243 regs are live at each point in the program; this is true when
2244 we are called from global_alloc but false when stupid register
2245 allocation has been done.
2247 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2248 which is nonnegative if the reg has been commandeered for reloading into.
2249 It is copied into STATIC_RELOAD_REG_P and referenced from there
2250 by various subroutines. */
2253 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2255 int replace
, ind_levels
;
2257 short *reload_reg_p
;
2259 #ifdef REGISTER_CONSTRAINTS
2261 register int insn_code_number
;
2264 /* These are the constraints for the insn. We don't change them. */
2265 char *constraints1
[MAX_RECOG_OPERANDS
];
2266 /* These start out as the constraints for the insn
2267 and they are chewed up as we consider alternatives. */
2268 char *constraints
[MAX_RECOG_OPERANDS
];
2269 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2271 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2272 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2273 /* Nonzero for a MEM operand whose entire address needs a reload. */
2274 int address_reloaded
[MAX_RECOG_OPERANDS
];
2275 /* Value of enum reload_type to use for operand. */
2276 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2277 /* Value of enum reload_type to use within address of operand. */
2278 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2279 /* Save the usage of each operand. */
2280 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2281 int no_input_reloads
= 0, no_output_reloads
= 0;
2283 int this_alternative
[MAX_RECOG_OPERANDS
];
2284 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2285 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2286 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2287 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2289 int goal_alternative
[MAX_RECOG_OPERANDS
];
2290 int this_alternative_number
;
2291 int goal_alternative_number
;
2292 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2293 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2294 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2295 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2296 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2297 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2298 int goal_alternative_swapped
;
2301 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2302 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2303 rtx body
= PATTERN (insn
);
2304 rtx set
= single_set (insn
);
2305 int goal_earlyclobber
, this_earlyclobber
;
2306 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2309 this_insn_is_asm
= 0; /* Tentative. */
2313 n_earlyclobbers
= 0;
2314 replace_reloads
= replace
;
2315 hard_regs_live_known
= live_known
;
2316 static_reload_reg_p
= reload_reg_p
;
2318 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2319 neither are insns that SET cc0. Insns that use CC0 are not allowed
2320 to have any input reloads. */
2321 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2322 no_output_reloads
= 1;
2325 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2326 no_input_reloads
= 1;
2327 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2328 no_output_reloads
= 1;
2331 #ifdef SECONDARY_MEMORY_NEEDED
2332 /* The eliminated forms of any secondary memory locations are per-insn, so
2333 clear them out here. */
2335 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2338 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2339 Make OPERANDS point to a vector of operand values.
2340 Make OPERAND_LOCS point to a vector of pointers to
2341 where the operands were found.
2342 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2343 constraint-strings for this insn.
2344 Return if the insn needs no reload processing. */
2346 switch (GET_CODE (body
))
2356 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2357 is cheap to move between them. If it is not, there may not be an insn
2358 to do the copy, so we may need a reload. */
2359 if (GET_CODE (SET_DEST (body
)) == REG
2360 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2361 && GET_CODE (SET_SRC (body
)) == REG
2362 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2363 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2364 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2368 reload_n_operands
= noperands
= asm_noperands (body
);
2371 /* This insn is an `asm' with operands. */
2373 insn_code_number
= -1;
2374 this_insn_is_asm
= 1;
2376 /* expand_asm_operands makes sure there aren't too many operands. */
2377 if (noperands
> MAX_RECOG_OPERANDS
)
2380 /* Now get the operand values and constraints out of the insn. */
2382 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2383 constraints
, operand_mode
);
2386 bcopy ((char *) constraints
, (char *) constraints1
,
2387 noperands
* sizeof (char *));
2388 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2389 for (i
= 1; i
< noperands
; i
++)
2390 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2392 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2393 /* Avoid further trouble with this insn. */
2394 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2403 /* Ordinary insn: recognize it, get the operands via insn_extract
2404 and get the constraints. */
2406 insn_code_number
= recog_memoized (insn
);
2407 if (insn_code_number
< 0)
2408 fatal_insn_not_found (insn
);
2410 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2411 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2412 /* Just return "no reloads" if insn has no operands with constraints. */
2413 if (n_alternatives
== 0)
2415 insn_extract (insn
);
2416 for (i
= 0; i
< noperands
; i
++)
2418 constraints
[i
] = constraints1
[i
]
2419 = insn_operand_constraint
[insn_code_number
][i
];
2420 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2429 /* If we will need to know, later, whether some pair of operands
2430 are the same, we must compare them now and save the result.
2431 Reloading the base and index registers will clobber them
2432 and afterward they will fail to match. */
2434 for (i
= 0; i
< noperands
; i
++)
2439 substed_operand
[i
] = recog_operand
[i
];
2442 modified
[i
] = RELOAD_READ
;
2444 /* Scan this operand's constraint to see if it is an output operand,
2445 an in-out operand, is commutative, or should match another. */
2450 modified
[i
] = RELOAD_WRITE
;
2452 modified
[i
] = RELOAD_READ_WRITE
;
2455 /* The last operand should not be marked commutative. */
2456 if (i
== noperands
- 1)
2458 if (this_insn_is_asm
)
2459 warning_for_asm (this_insn
,
2460 "`%%' constraint used with last operand");
2467 else if (c
>= '0' && c
<= '9')
2470 operands_match
[c
][i
]
2471 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2473 /* An operand may not match itself. */
2476 if (this_insn_is_asm
)
2477 warning_for_asm (this_insn
,
2478 "operand %d has constraint %d", i
, c
);
2483 /* If C can be commuted with C+1, and C might need to match I,
2484 then C+1 might also need to match I. */
2485 if (commutative
>= 0)
2487 if (c
== commutative
|| c
== commutative
+ 1)
2489 int other
= c
+ (c
== commutative
? 1 : -1);
2490 operands_match
[other
][i
]
2491 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2493 if (i
== commutative
|| i
== commutative
+ 1)
2495 int other
= i
+ (i
== commutative
? 1 : -1);
2496 operands_match
[c
][other
]
2497 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2499 /* Note that C is supposed to be less than I.
2500 No need to consider altering both C and I because in
2501 that case we would alter one into the other. */
2507 /* Examine each operand that is a memory reference or memory address
2508 and reload parts of the addresses into index registers.
2509 Also here any references to pseudo regs that didn't get hard regs
2510 but are equivalent to constants get replaced in the insn itself
2511 with those constants. Nobody will ever see them again.
2513 Finally, set up the preferred classes of each operand. */
2515 for (i
= 0; i
< noperands
; i
++)
2517 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2519 address_reloaded
[i
] = 0;
2520 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2521 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2524 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2525 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2528 if (*constraints
[i
] == 0)
2529 /* Ignore things like match_operator operands. */
2531 else if (constraints
[i
][0] == 'p')
2533 find_reloads_address (VOIDmode
, NULL_PTR
,
2534 recog_operand
[i
], recog_operand_loc
[i
],
2535 i
, operand_type
[i
], ind_levels
, insn
);
2537 /* If we now have a simple operand where we used to have a
2538 PLUS or MULT, re-recognize and try again. */
2539 if ((GET_RTX_CLASS (GET_CODE (*recog_operand_loc
[i
])) == 'o'
2540 || GET_CODE (*recog_operand_loc
[i
]) == SUBREG
)
2541 && (GET_CODE (recog_operand
[i
]) == MULT
2542 || GET_CODE (recog_operand
[i
]) == PLUS
))
2544 INSN_CODE (insn
) = -1;
2545 find_reloads (insn
, replace
, ind_levels
, live_known
,
2550 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2552 else if (code
== MEM
)
2554 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2555 recog_operand_loc
[i
],
2556 XEXP (recog_operand
[i
], 0),
2557 &XEXP (recog_operand
[i
], 0),
2558 i
, address_type
[i
], ind_levels
, insn
))
2559 address_reloaded
[i
] = 1;
2560 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2562 else if (code
== SUBREG
)
2563 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2564 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2567 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2568 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2569 /* We can get a PLUS as an "operand" as a result of register
2570 elimination. See eliminate_regs and gen_reload. We handle
2571 a unary operator by reloading the operand. */
2572 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2573 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2575 else if (code
== REG
)
2577 /* This is equivalent to calling find_reloads_toplev.
2578 The code is duplicated for speed.
2579 When we find a pseudo always equivalent to a constant,
2580 we replace it by the constant. We must be sure, however,
2581 that we don't try to replace it in the insn in which it
2583 register int regno
= REGNO (recog_operand
[i
]);
2584 if (reg_equiv_constant
[regno
] != 0
2585 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2586 substed_operand
[i
] = recog_operand
[i
]
2587 = reg_equiv_constant
[regno
];
2588 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2589 that feeds this insn. */
2590 if (reg_equiv_mem
[regno
] != 0)
2591 substed_operand
[i
] = recog_operand
[i
]
2592 = reg_equiv_mem
[regno
];
2594 if (reg_equiv_address
[regno
] != 0)
2596 /* If reg_equiv_address is not a constant address, copy it,
2597 since it may be shared. */
2598 /* We must rerun eliminate_regs, in case the elimination
2599 offsets have changed. */
2600 rtx address
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
],
2604 if (rtx_varies_p (address
))
2605 address
= copy_rtx (address
);
2607 /* If this is an output operand, we must output a CLOBBER
2608 after INSN so find_equiv_reg knows REGNO is being written.
2609 Mark this insn specially, do we can put our output reloads
2612 if (modified
[i
] != RELOAD_READ
)
2613 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2618 *recog_operand_loc
[i
] = recog_operand
[i
]
2619 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2620 RTX_UNCHANGING_P (recog_operand
[i
])
2621 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2622 find_reloads_address (GET_MODE (recog_operand
[i
]),
2623 recog_operand_loc
[i
],
2624 XEXP (recog_operand
[i
], 0),
2625 &XEXP (recog_operand
[i
], 0),
2626 i
, address_type
[i
], ind_levels
, insn
);
2627 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2630 /* If the operand is still a register (we didn't replace it with an
2631 equivalent), get the preferred class to reload it into. */
2632 code
= GET_CODE (recog_operand
[i
]);
2634 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2635 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2637 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2638 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2641 /* If this is simply a copy from operand 1 to operand 0, merge the
2642 preferred classes for the operands. */
2643 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2644 && recog_operand
[1] == SET_SRC (set
))
2646 preferred_class
[0] = preferred_class
[1]
2647 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2648 pref_or_nothing
[0] |= pref_or_nothing
[1];
2649 pref_or_nothing
[1] |= pref_or_nothing
[0];
2652 /* Now see what we need for pseudo-regs that didn't get hard regs
2653 or got the wrong kind of hard reg. For this, we must consider
2654 all the operands together against the register constraints. */
2656 best
= MAX_RECOG_OPERANDS
+ 300;
2659 goal_alternative_swapped
= 0;
2662 /* The constraints are made of several alternatives.
2663 Each operand's constraint looks like foo,bar,... with commas
2664 separating the alternatives. The first alternatives for all
2665 operands go together, the second alternatives go together, etc.
2667 First loop over alternatives. */
2669 for (this_alternative_number
= 0;
2670 this_alternative_number
< n_alternatives
;
2671 this_alternative_number
++)
2673 /* Loop over operands for one constraint alternative. */
2674 /* LOSERS counts those that don't fit this alternative
2675 and would require loading. */
2677 /* BAD is set to 1 if it some operand can't fit this alternative
2678 even after reloading. */
2680 /* REJECT is a count of how undesirable this alternative says it is
2681 if any reloading is required. If the alternative matches exactly
2682 then REJECT is ignored, but otherwise it gets this much
2683 counted against it in addition to the reloading needed. Each
2684 ? counts three times here since we want the disparaging caused by
2685 a bad register class to only count 1/3 as much. */
2688 this_earlyclobber
= 0;
2690 for (i
= 0; i
< noperands
; i
++)
2692 register char *p
= constraints
[i
];
2693 register int win
= 0;
2694 /* 0 => this operand can be reloaded somehow for this alternative */
2696 /* 0 => this operand can be reloaded if the alternative allows regs. */
2699 register rtx operand
= recog_operand
[i
];
2701 /* Nonzero means this is a MEM that must be reloaded into a reg
2702 regardless of what the constraint says. */
2703 int force_reload
= 0;
2705 /* Nonzero if a constant forced into memory would be OK for this
2708 int earlyclobber
= 0;
2710 /* If the predicate accepts a unary operator, it means that
2711 we need to reload the operand. */
2712 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1')
2713 operand
= XEXP (operand
, 0);
2715 /* If the operand is a SUBREG, extract
2716 the REG or MEM (or maybe even a constant) within.
2717 (Constants can occur as a result of reg_equiv_constant.) */
2719 while (GET_CODE (operand
) == SUBREG
)
2721 offset
+= SUBREG_WORD (operand
);
2722 operand
= SUBREG_REG (operand
);
2723 /* Force reload if this is a constant or PLUS or if there may may
2724 be a problem accessing OPERAND in the outer mode. */
2725 if (CONSTANT_P (operand
)
2726 || GET_CODE (operand
) == PLUS
2727 /* We must force a reload of paradoxical SUBREGs
2728 of a MEM because the alignment of the inner value
2729 may not be enough to do the outer reference. On
2730 big-endian machines, it may also reference outside
2733 On machines that extend byte operations and we have a
2734 SUBREG where both the inner and outer modes are no wider
2735 than a word and the inner mode is narrower, is integral,
2736 and gets extended when loaded from memory, combine.c has
2737 made assumptions about the behavior of the machine in such
2738 register access. If the data is, in fact, in memory we
2739 must always load using the size assumed to be in the
2740 register and let the insn do the different-sized
2742 || ((GET_CODE (operand
) == MEM
2743 || (GET_CODE (operand
)== REG
2744 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2745 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2746 < BIGGEST_ALIGNMENT
)
2747 && (GET_MODE_SIZE (operand_mode
[i
])
2748 > GET_MODE_SIZE (GET_MODE (operand
))))
2749 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2750 #ifdef LOAD_EXTEND_OP
2751 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2752 && (GET_MODE_SIZE (GET_MODE (operand
))
2754 && (GET_MODE_SIZE (operand_mode
[i
])
2755 > GET_MODE_SIZE (GET_MODE (operand
)))
2756 && INTEGRAL_MODE_P (GET_MODE (operand
))
2757 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2760 /* Subreg of a hard reg which can't handle the subreg's mode
2761 or which would handle that mode in the wrong number of
2762 registers for subregging to work. */
2763 || (GET_CODE (operand
) == REG
2764 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2765 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2766 && (GET_MODE_SIZE (GET_MODE (operand
))
2768 && ((GET_MODE_SIZE (GET_MODE (operand
))
2770 != HARD_REGNO_NREGS (REGNO (operand
),
2771 GET_MODE (operand
))))
2772 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2777 this_alternative
[i
] = (int) NO_REGS
;
2778 this_alternative_win
[i
] = 0;
2779 this_alternative_offmemok
[i
] = 0;
2780 this_alternative_earlyclobber
[i
] = 0;
2781 this_alternative_matches
[i
] = -1;
2783 /* An empty constraint or empty alternative
2784 allows anything which matched the pattern. */
2785 if (*p
== 0 || *p
== ',')
2788 /* Scan this alternative's specs for this operand;
2789 set WIN if the operand fits any letter in this alternative.
2790 Otherwise, clear BADOP if this operand could
2791 fit some letter after reloads,
2792 or set WINREG if this operand could fit after reloads
2793 provided the constraint allows some registers. */
2795 while (*p
&& (c
= *p
++) != ',')
2804 /* The last operand should not be marked commutative. */
2805 if (i
!= noperands
- 1)
2818 /* Ignore rest of this alternative as far as
2819 reloading is concerned. */
2820 while (*p
&& *p
!= ',') p
++;
2829 this_alternative_matches
[i
] = c
;
2830 /* We are supposed to match a previous operand.
2831 If we do, we win if that one did.
2832 If we do not, count both of the operands as losers.
2833 (This is too conservative, since most of the time
2834 only a single reload insn will be needed to make
2835 the two operands win. As a result, this alternative
2836 may be rejected when it is actually desirable.) */
2837 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2838 /* If we are matching as if two operands were swapped,
2839 also pretend that operands_match had been computed
2841 But if I is the second of those and C is the first,
2842 don't exchange them, because operands_match is valid
2843 only on one side of its diagonal. */
2845 [(c
== commutative
|| c
== commutative
+ 1)
2846 ? 2*commutative
+ 1 - c
: c
]
2847 [(i
== commutative
|| i
== commutative
+ 1)
2848 ? 2*commutative
+ 1 - i
: i
])
2849 : operands_match
[c
][i
])
2851 /* If we are matching a non-offsettable address where an
2852 offsettable address was expected, then we must reject
2853 this combination, because we can't reload it. */
2854 if (this_alternative_offmemok
[c
]
2855 && GET_CODE (recog_operand
[c
]) == MEM
2856 && this_alternative
[c
] == (int) NO_REGS
2857 && ! this_alternative_win
[c
])
2860 win
= this_alternative_win
[c
];
2864 /* Operands don't match. */
2866 /* Retroactively mark the operand we had to match
2867 as a loser, if it wasn't already. */
2868 if (this_alternative_win
[c
])
2870 this_alternative_win
[c
] = 0;
2871 if (this_alternative
[c
] == (int) NO_REGS
)
2873 /* But count the pair only once in the total badness of
2874 this alternative, if the pair can be a dummy reload. */
2876 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2877 recog_operand_loc
[i
], recog_operand_loc
[c
],
2878 operand_mode
[i
], operand_mode
[c
],
2879 this_alternative
[c
], -1,
2880 this_alternative_earlyclobber
[c
]);
2885 /* This can be fixed with reloads if the operand
2886 we are supposed to match can be fixed with reloads. */
2888 this_alternative
[i
] = this_alternative
[c
];
2890 /* If we have to reload this operand and some previous
2891 operand also had to match the same thing as this
2892 operand, we don't know how to do that. So reject this
2894 if (! win
|| force_reload
)
2895 for (j
= 0; j
< i
; j
++)
2896 if (this_alternative_matches
[j
]
2897 == this_alternative_matches
[i
])
2903 /* All necessary reloads for an address_operand
2904 were handled in find_reloads_address. */
2905 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2912 if (GET_CODE (operand
) == MEM
2913 || (GET_CODE (operand
) == REG
2914 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2915 && reg_renumber
[REGNO (operand
)] < 0))
2917 if (CONSTANT_P (operand
))
2923 if (GET_CODE (operand
) == MEM
2924 && ! address_reloaded
[i
]
2925 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2926 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2931 if (GET_CODE (operand
) == MEM
2932 && ! address_reloaded
[i
]
2933 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2934 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2938 /* Memory operand whose address is not offsettable. */
2942 if (GET_CODE (operand
) == MEM
2943 && ! (ind_levels
? offsettable_memref_p (operand
)
2944 : offsettable_nonstrict_memref_p (operand
))
2945 /* Certain mem addresses will become offsettable
2946 after they themselves are reloaded. This is important;
2947 we don't want our own handling of unoffsettables
2948 to override the handling of reg_equiv_address. */
2949 && !(GET_CODE (XEXP (operand
, 0)) == REG
2951 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2955 /* Memory operand whose address is offsettable. */
2959 if ((GET_CODE (operand
) == MEM
2960 /* If IND_LEVELS, find_reloads_address won't reload a
2961 pseudo that didn't get a hard reg, so we have to
2962 reject that case. */
2963 && (ind_levels
? offsettable_memref_p (operand
)
2964 : offsettable_nonstrict_memref_p (operand
)))
2965 /* A reloaded auto-increment address is offsettable,
2966 because it is now just a simple register indirect. */
2967 || (GET_CODE (operand
) == MEM
2968 && address_reloaded
[i
]
2969 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2970 || GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2971 || GET_CODE (XEXP (operand
, 0)) == POST_INC
2972 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2973 /* Certain mem addresses will become offsettable
2974 after they themselves are reloaded. This is important;
2975 we don't want our own handling of unoffsettables
2976 to override the handling of reg_equiv_address. */
2977 || (GET_CODE (operand
) == MEM
2978 && GET_CODE (XEXP (operand
, 0)) == REG
2980 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2981 || (GET_CODE (operand
) == REG
2982 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2983 && reg_renumber
[REGNO (operand
)] < 0
2984 /* If reg_equiv_address is nonzero, we will be
2985 loading it into a register; hence it will be
2986 offsettable, but we cannot say that reg_equiv_mem
2987 is offsettable without checking. */
2988 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2989 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2990 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2992 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2999 /* Output operand that is stored before the need for the
3000 input operands (and their index registers) is over. */
3001 earlyclobber
= 1, this_earlyclobber
= 1;
3005 #ifndef REAL_ARITHMETIC
3006 /* Match any floating double constant, but only if
3007 we can examine the bits of it reliably. */
3008 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3009 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3010 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3013 if (GET_CODE (operand
) == CONST_DOUBLE
)
3018 if (GET_CODE (operand
) == CONST_DOUBLE
)
3024 if (GET_CODE (operand
) == CONST_DOUBLE
3025 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3030 if (GET_CODE (operand
) == CONST_INT
3031 || (GET_CODE (operand
) == CONST_DOUBLE
3032 && GET_MODE (operand
) == VOIDmode
))
3035 if (CONSTANT_P (operand
)
3036 #ifdef LEGITIMATE_PIC_OPERAND_P
3037 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3044 if (GET_CODE (operand
) == CONST_INT
3045 || (GET_CODE (operand
) == CONST_DOUBLE
3046 && GET_MODE (operand
) == VOIDmode
))
3058 if (GET_CODE (operand
) == CONST_INT
3059 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3069 /* A PLUS is never a valid operand, but reload can make
3070 it from a register when eliminating registers. */
3071 && GET_CODE (operand
) != PLUS
3072 /* A SCRATCH is not a valid operand. */
3073 && GET_CODE (operand
) != SCRATCH
3074 #ifdef LEGITIMATE_PIC_OPERAND_P
3075 && (! CONSTANT_P (operand
)
3077 || LEGITIMATE_PIC_OPERAND_P (operand
))
3079 && (GENERAL_REGS
== ALL_REGS
3080 || GET_CODE (operand
) != REG
3081 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3082 && reg_renumber
[REGNO (operand
)] < 0)))
3084 /* Drop through into 'r' case */
3088 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3091 #ifdef EXTRA_CONSTRAINT
3097 if (EXTRA_CONSTRAINT (operand
, c
))
3104 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3107 if (GET_MODE (operand
) == BLKmode
)
3110 if (GET_CODE (operand
) == REG
3111 && reg_fits_class_p (operand
, this_alternative
[i
],
3112 offset
, GET_MODE (recog_operand
[i
])))
3119 /* If this operand could be handled with a reg,
3120 and some reg is allowed, then this operand can be handled. */
3121 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3124 /* Record which operands fit this alternative. */
3125 this_alternative_earlyclobber
[i
] = earlyclobber
;
3126 if (win
&& ! force_reload
)
3127 this_alternative_win
[i
] = 1;
3130 int const_to_mem
= 0;
3132 this_alternative_offmemok
[i
] = offmemok
;
3136 /* Alternative loses if it has no regs for a reg operand. */
3137 if (GET_CODE (operand
) == REG
3138 && this_alternative
[i
] == (int) NO_REGS
3139 && this_alternative_matches
[i
] < 0)
3142 /* If this is a constant that is reloaded into the desired
3143 class by copying it to memory first, count that as another
3144 reload. This is consistent with other code and is
3145 required to avoid choosing another alternative when
3146 the constant is moved into memory by this function on
3147 an early reload pass. Note that the test here is
3148 precisely the same as in the code below that calls
3150 if (CONSTANT_P (operand
)
3151 /* force_const_mem does not accept HIGH. */
3152 && GET_CODE (operand
) != HIGH
3153 && ((PREFERRED_RELOAD_CLASS (operand
,
3154 (enum reg_class
) this_alternative
[i
])
3156 || no_input_reloads
)
3157 && operand_mode
[i
] != VOIDmode
)
3160 if (this_alternative
[i
] != (int) NO_REGS
)
3164 /* If we can't reload this value at all, reject this
3165 alternative. Note that we could also lose due to
3166 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3169 if (! CONSTANT_P (operand
)
3170 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3171 && (PREFERRED_RELOAD_CLASS (operand
,
3172 (enum reg_class
) this_alternative
[i
])
3176 /* Alternative loses if it requires a type of reload not
3177 permitted for this insn. We can always reload SCRATCH
3178 and objects with a REG_UNUSED note. */
3179 else if (GET_CODE (operand
) != SCRATCH
3180 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3181 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3183 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3188 /* We prefer to reload pseudos over reloading other things,
3189 since such reloads may be able to be eliminated later.
3190 If we are reloading a SCRATCH, we won't be generating any
3191 insns, just using a register, so it is also preferred.
3192 So bump REJECT in other cases. Don't do this in the
3193 case where we are forcing a constant into memory and
3194 it will then win since we don't want to have a different
3195 alternative match then. */
3196 if (! (GET_CODE (operand
) == REG
3197 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3198 && GET_CODE (operand
) != SCRATCH
3199 && ! (const_to_mem
&& constmemok
))
3203 /* If this operand is a pseudo register that didn't get a hard
3204 reg and this alternative accepts some register, see if the
3205 class that we want is a subset of the preferred class for this
3206 register. If not, but it intersects that class, use the
3207 preferred class instead. If it does not intersect the preferred
3208 class, show that usage of this alternative should be discouraged;
3209 it will be discouraged more still if the register is `preferred
3210 or nothing'. We do this because it increases the chance of
3211 reusing our spill register in a later insn and avoiding a pair
3212 of memory stores and loads.
3214 Don't bother with this if this alternative will accept this
3217 Don't do this for a multiword operand, since it is only a
3218 small win and has the risk of requiring more spill registers,
3219 which could cause a large loss.
3221 Don't do this if the preferred class has only one register
3222 because we might otherwise exhaust the class. */
3225 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3226 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3227 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3229 if (! reg_class_subset_p (this_alternative
[i
],
3230 preferred_class
[i
]))
3232 /* Since we don't have a way of forming the intersection,
3233 we just do something special if the preferred class
3234 is a subset of the class we have; that's the most
3235 common case anyway. */
3236 if (reg_class_subset_p (preferred_class
[i
],
3237 this_alternative
[i
]))
3238 this_alternative
[i
] = (int) preferred_class
[i
];
3240 reject
+= (1 + pref_or_nothing
[i
]);
3245 /* Now see if any output operands that are marked "earlyclobber"
3246 in this alternative conflict with any input operands
3247 or any memory addresses. */
3249 for (i
= 0; i
< noperands
; i
++)
3250 if (this_alternative_earlyclobber
[i
]
3251 && this_alternative_win
[i
])
3253 struct decomposition early_data
;
3255 early_data
= decompose (recog_operand
[i
]);
3257 if (modified
[i
] == RELOAD_READ
)
3259 if (this_insn_is_asm
)
3260 warning_for_asm (this_insn
,
3261 "`&' constraint used with input operand");
3267 if (this_alternative
[i
] == NO_REGS
)
3269 this_alternative_earlyclobber
[i
] = 0;
3270 if (this_insn_is_asm
)
3271 error_for_asm (this_insn
,
3272 "`&' constraint used with no register class");
3277 for (j
= 0; j
< noperands
; j
++)
3278 /* Is this an input operand or a memory ref? */
3279 if ((GET_CODE (recog_operand
[j
]) == MEM
3280 || modified
[j
] != RELOAD_WRITE
)
3282 /* Ignore things like match_operator operands. */
3283 && *constraints1
[j
] != 0
3284 /* Don't count an input operand that is constrained to match
3285 the early clobber operand. */
3286 && ! (this_alternative_matches
[j
] == i
3287 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3288 /* Is it altered by storing the earlyclobber operand? */
3289 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3291 /* If the output is in a single-reg class,
3292 it's costly to reload it, so reload the input instead. */
3293 if (reg_class_size
[this_alternative
[i
]] == 1
3294 && (GET_CODE (recog_operand
[j
]) == REG
3295 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3298 this_alternative_win
[j
] = 0;
3303 /* If an earlyclobber operand conflicts with something,
3304 it must be reloaded, so request this and count the cost. */
3308 this_alternative_win
[i
] = 0;
3309 for (j
= 0; j
< noperands
; j
++)
3310 if (this_alternative_matches
[j
] == i
3311 && this_alternative_win
[j
])
3313 this_alternative_win
[j
] = 0;
3319 /* If one alternative accepts all the operands, no reload required,
3320 choose that alternative; don't consider the remaining ones. */
3323 /* Unswap these so that they are never swapped at `finish'. */
3324 if (commutative
>= 0)
3326 recog_operand
[commutative
] = substed_operand
[commutative
];
3327 recog_operand
[commutative
+ 1]
3328 = substed_operand
[commutative
+ 1];
3330 for (i
= 0; i
< noperands
; i
++)
3332 goal_alternative_win
[i
] = 1;
3333 goal_alternative
[i
] = this_alternative
[i
];
3334 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3335 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3336 goal_alternative_earlyclobber
[i
]
3337 = this_alternative_earlyclobber
[i
];
3339 goal_alternative_number
= this_alternative_number
;
3340 goal_alternative_swapped
= swapped
;
3341 goal_earlyclobber
= this_earlyclobber
;
3345 /* REJECT, set by the ! and ? constraint characters and when a register
3346 would be reloaded into a non-preferred class, discourages the use of
3347 this alternative for a reload goal. REJECT is incremented by three
3348 for each ? and one for each non-preferred class. */
3349 losers
= losers
* 3 + reject
;
3351 /* If this alternative can be made to work by reloading,
3352 and it needs less reloading than the others checked so far,
3353 record it as the chosen goal for reloading. */
3354 if (! bad
&& best
> losers
)
3356 for (i
= 0; i
< noperands
; i
++)
3358 goal_alternative
[i
] = this_alternative
[i
];
3359 goal_alternative_win
[i
] = this_alternative_win
[i
];
3360 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3361 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3362 goal_alternative_earlyclobber
[i
]
3363 = this_alternative_earlyclobber
[i
];
3365 goal_alternative_swapped
= swapped
;
3367 goal_alternative_number
= this_alternative_number
;
3368 goal_earlyclobber
= this_earlyclobber
;
3372 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3373 then we need to try each alternative twice,
3374 the second time matching those two operands
3375 as if we had exchanged them.
3376 To do this, really exchange them in operands.
3378 If we have just tried the alternatives the second time,
3379 return operands to normal and drop through. */
3381 if (commutative
>= 0)
3386 register enum reg_class tclass
;
3389 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3390 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3392 tclass
= preferred_class
[commutative
];
3393 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3394 preferred_class
[commutative
+ 1] = tclass
;
3396 t
= pref_or_nothing
[commutative
];
3397 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3398 pref_or_nothing
[commutative
+ 1] = t
;
3400 bcopy ((char *) constraints1
, (char *) constraints
,
3401 noperands
* sizeof (char *));
3406 recog_operand
[commutative
] = substed_operand
[commutative
];
3407 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3411 /* The operands don't meet the constraints.
3412 goal_alternative describes the alternative
3413 that we could reach by reloading the fewest operands.
3414 Reload so as to fit it. */
3416 if (best
== MAX_RECOG_OPERANDS
+ 300)
3418 /* No alternative works with reloads?? */
3419 if (insn_code_number
>= 0)
3421 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3422 /* Avoid further trouble with this insn. */
3423 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3428 /* Jump to `finish' from above if all operands are valid already.
3429 In that case, goal_alternative_win is all 1. */
3432 /* Right now, for any pair of operands I and J that are required to match,
3434 goal_alternative_matches[J] is I.
3435 Set up goal_alternative_matched as the inverse function:
3436 goal_alternative_matched[I] = J. */
3438 for (i
= 0; i
< noperands
; i
++)
3439 goal_alternative_matched
[i
] = -1;
3441 for (i
= 0; i
< noperands
; i
++)
3442 if (! goal_alternative_win
[i
]
3443 && goal_alternative_matches
[i
] >= 0)
3444 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3446 /* If the best alternative is with operands 1 and 2 swapped,
3447 consider them swapped before reporting the reloads. Update the
3448 operand numbers of any reloads already pushed. */
3450 if (goal_alternative_swapped
)
3454 tem
= substed_operand
[commutative
];
3455 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3456 substed_operand
[commutative
+ 1] = tem
;
3457 tem
= recog_operand
[commutative
];
3458 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3459 recog_operand
[commutative
+ 1] = tem
;
3461 for (i
= 0; i
< n_reloads
; i
++)
3463 if (reload_opnum
[i
] == commutative
)
3464 reload_opnum
[i
] = commutative
+ 1;
3465 else if (reload_opnum
[i
] == commutative
+ 1)
3466 reload_opnum
[i
] = commutative
;
3470 /* Perform whatever substitutions on the operands we are supposed
3471 to make due to commutativity or replacement of registers
3472 with equivalent constants or memory slots. */
3474 for (i
= 0; i
< noperands
; i
++)
3476 *recog_operand_loc
[i
] = substed_operand
[i
];
3477 /* While we are looping on operands, initialize this. */
3478 operand_reloadnum
[i
] = -1;
3480 /* If this is an earlyclobber operand, we need to widen the scope.
3481 The reload must remain valid from the start of the insn being
3482 reloaded until after the operand is stored into its destination.
3483 We approximate this with RELOAD_OTHER even though we know that we
3484 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3486 One special case that is worth checking is when we have an
3487 output that is earlyclobber but isn't used past the insn (typically
3488 a SCRATCH). In this case, we only need have the reload live
3489 through the insn itself, but not for any of our input or output
3492 In any case, anything needed to address this operand can remain
3493 however they were previously categorized. */
3495 if (goal_alternative_earlyclobber
[i
])
3497 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3498 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3501 /* Any constants that aren't allowed and can't be reloaded
3502 into registers are here changed into memory references. */
3503 for (i
= 0; i
< noperands
; i
++)
3504 if (! goal_alternative_win
[i
]
3505 && CONSTANT_P (recog_operand
[i
])
3506 /* force_const_mem does not accept HIGH. */
3507 && GET_CODE (recog_operand
[i
]) != HIGH
3508 && ((PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3509 (enum reg_class
) goal_alternative
[i
])
3511 || no_input_reloads
)
3512 && operand_mode
[i
] != VOIDmode
)
3514 *recog_operand_loc
[i
] = recog_operand
[i
]
3515 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3517 i
, address_type
[i
], ind_levels
, 0);
3518 if (alternative_allows_memconst (constraints1
[i
],
3519 goal_alternative_number
))
3520 goal_alternative_win
[i
] = 1;
3523 /* Record the values of the earlyclobber operands for the caller. */
3524 if (goal_earlyclobber
)
3525 for (i
= 0; i
< noperands
; i
++)
3526 if (goal_alternative_earlyclobber
[i
])
3527 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3529 /* Now record reloads for all the operands that need them. */
3530 for (i
= 0; i
< noperands
; i
++)
3531 if (! goal_alternative_win
[i
])
3533 /* Operands that match previous ones have already been handled. */
3534 if (goal_alternative_matches
[i
] >= 0)
3536 /* Handle an operand with a nonoffsettable address
3537 appearing where an offsettable address will do
3538 by reloading the address into a base register.
3540 ??? We can also do this when the operand is a register and
3541 reg_equiv_mem is not offsettable, but this is a bit tricky,
3542 so we don't bother with it. It may not be worth doing. */
3543 else if (goal_alternative_matched
[i
] == -1
3544 && goal_alternative_offmemok
[i
]
3545 && GET_CODE (recog_operand
[i
]) == MEM
)
3547 operand_reloadnum
[i
]
3548 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3549 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3550 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3551 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3552 reload_inc
[operand_reloadnum
[i
]]
3553 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3555 /* If this operand is an output, we will have made any
3556 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3557 now we are treating part of the operand as an input, so
3558 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3560 if (modified
[i
] == RELOAD_WRITE
)
3562 for (j
= 0; j
< n_reloads
; j
++)
3564 if (reload_opnum
[j
] == i
)
3566 if (reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3567 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3568 else if (reload_when_needed
[j
]
3569 == RELOAD_FOR_OUTADDR_ADDRESS
)
3570 reload_when_needed
[j
] = RELOAD_FOR_INPADDR_ADDRESS
;
3575 else if (goal_alternative_matched
[i
] == -1)
3576 operand_reloadnum
[i
]
3577 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3578 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3579 (modified
[i
] != RELOAD_WRITE
3580 ? recog_operand_loc
[i
] : 0),
3581 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3582 (enum reg_class
) goal_alternative
[i
],
3583 (modified
[i
] == RELOAD_WRITE
3584 ? VOIDmode
: operand_mode
[i
]),
3585 (modified
[i
] == RELOAD_READ
3586 ? VOIDmode
: operand_mode
[i
]),
3587 (insn_code_number
< 0 ? 0
3588 : insn_operand_strict_low
[insn_code_number
][i
]),
3589 0, i
, operand_type
[i
]);
3590 /* In a matching pair of operands, one must be input only
3591 and the other must be output only.
3592 Pass the input operand as IN and the other as OUT. */
3593 else if (modified
[i
] == RELOAD_READ
3594 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3596 operand_reloadnum
[i
]
3597 = push_reload (recog_operand
[i
],
3598 recog_operand
[goal_alternative_matched
[i
]],
3599 recog_operand_loc
[i
],
3600 recog_operand_loc
[goal_alternative_matched
[i
]],
3601 (enum reg_class
) goal_alternative
[i
],
3603 operand_mode
[goal_alternative_matched
[i
]],
3604 0, 0, i
, RELOAD_OTHER
);
3605 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3607 else if (modified
[i
] == RELOAD_WRITE
3608 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3610 operand_reloadnum
[goal_alternative_matched
[i
]]
3611 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3613 recog_operand_loc
[goal_alternative_matched
[i
]],
3614 recog_operand_loc
[i
],
3615 (enum reg_class
) goal_alternative
[i
],
3616 operand_mode
[goal_alternative_matched
[i
]],
3618 0, 0, i
, RELOAD_OTHER
);
3619 operand_reloadnum
[i
] = output_reloadnum
;
3621 else if (insn_code_number
>= 0)
3625 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3626 /* Avoid further trouble with this insn. */
3627 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3632 else if (goal_alternative_matched
[i
] < 0
3633 && goal_alternative_matches
[i
] < 0
3636 /* For each non-matching operand that's a MEM or a pseudo-register
3637 that didn't get a hard register, make an optional reload.
3638 This may get done even if the insn needs no reloads otherwise. */
3640 rtx operand
= recog_operand
[i
];
3642 while (GET_CODE (operand
) == SUBREG
)
3643 operand
= XEXP (operand
, 0);
3644 if ((GET_CODE (operand
) == MEM
3645 || (GET_CODE (operand
) == REG
3646 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3647 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3648 && ! no_input_reloads
3649 /* Optional output reloads don't do anything and we mustn't
3650 make in-out reloads on insns that are not permitted output
3652 && (modified
[i
] == RELOAD_READ
3653 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3654 operand_reloadnum
[i
]
3655 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3656 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3657 (modified
[i
] != RELOAD_WRITE
3658 ? recog_operand_loc
[i
] : 0),
3659 (modified
[i
] != RELOAD_READ
3660 ? recog_operand_loc
[i
] : 0),
3661 (enum reg_class
) goal_alternative
[i
],
3662 (modified
[i
] == RELOAD_WRITE
3663 ? VOIDmode
: operand_mode
[i
]),
3664 (modified
[i
] == RELOAD_READ
3665 ? VOIDmode
: operand_mode
[i
]),
3666 (insn_code_number
< 0 ? 0
3667 : insn_operand_strict_low
[insn_code_number
][i
]),
3668 1, i
, operand_type
[i
]);
3670 else if (goal_alternative_matches
[i
] >= 0
3671 && goal_alternative_win
[goal_alternative_matches
[i
]]
3672 && modified
[i
] == RELOAD_READ
3673 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3674 && ! no_input_reloads
&& ! no_output_reloads
3677 /* Similarly, make an optional reload for a pair of matching
3678 objects that are in MEM or a pseudo that didn't get a hard reg. */
3680 rtx operand
= recog_operand
[i
];
3682 while (GET_CODE (operand
) == SUBREG
)
3683 operand
= XEXP (operand
, 0);
3684 if ((GET_CODE (operand
) == MEM
3685 || (GET_CODE (operand
) == REG
3686 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3687 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3689 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3690 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3692 recog_operand_loc
[goal_alternative_matches
[i
]],
3693 recog_operand_loc
[i
],
3694 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3695 operand_mode
[goal_alternative_matches
[i
]],
3697 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3700 /* If this insn pattern contains any MATCH_DUP's, make sure that
3701 they will be substituted if the operands they match are substituted.
3702 Also do now any substitutions we already did on the operands.
3704 Don't do this if we aren't making replacements because we might be
3705 propagating things allocated by frame pointer elimination into places
3706 it doesn't expect. */
3708 if (insn_code_number
>= 0 && replace
)
3709 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3711 int opno
= recog_dup_num
[i
];
3712 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3713 if (operand_reloadnum
[opno
] >= 0)
3714 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3715 insn_operand_mode
[insn_code_number
][opno
]);
3719 /* This loses because reloading of prior insns can invalidate the equivalence
3720 (or at least find_equiv_reg isn't smart enough to find it any more),
3721 causing this insn to need more reload regs than it needed before.
3722 It may be too late to make the reload regs available.
3723 Now this optimization is done safely in choose_reload_regs. */
3725 /* For each reload of a reg into some other class of reg,
3726 search for an existing equivalent reg (same value now) in the right class.
3727 We can use it as long as we don't need to change its contents. */
3728 for (i
= 0; i
< n_reloads
; i
++)
3729 if (reload_reg_rtx
[i
] == 0
3730 && reload_in
[i
] != 0
3731 && GET_CODE (reload_in
[i
]) == REG
3732 && reload_out
[i
] == 0)
3735 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3736 static_reload_reg_p
, 0, reload_inmode
[i
]);
3737 /* Prevent generation of insn to load the value
3738 because the one we found already has the value. */
3739 if (reload_reg_rtx
[i
])
3740 reload_in
[i
] = reload_reg_rtx
[i
];
3744 /* Perhaps an output reload can be combined with another
3745 to reduce needs by one. */
3746 if (!goal_earlyclobber
)
3749 /* If we have a pair of reloads for parts of an address, they are reloading
3750 the same object, the operands themselves were not reloaded, and they
3751 are for two operands that are supposed to match, merge the reloads and
3752 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3754 for (i
= 0; i
< n_reloads
; i
++)
3758 for (j
= i
+ 1; j
< n_reloads
; j
++)
3759 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3760 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3761 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
3762 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3763 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3764 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
3765 || reload_when_needed
[j
] == RELOAD_FOR_INPADDR_ADDRESS
3766 || reload_when_needed
[j
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3767 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3768 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3769 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3770 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3771 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3772 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3773 || (goal_alternative_matches
[reload_opnum
[j
]]
3774 == reload_opnum
[i
])))
3776 for (k
= 0; k
< n_replacements
; k
++)
3777 if (replacements
[k
].what
== j
)
3778 replacements
[k
].what
= i
;
3780 if (reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
3781 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3782 reload_when_needed
[i
] = RELOAD_FOR_OPADDR_ADDR
;
3784 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3789 /* Scan all the reloads and update their type.
3790 If a reload is for the address of an operand and we didn't reload
3791 that operand, change the type. Similarly, change the operand number
3792 of a reload when two operands match. If a reload is optional, treat it
3793 as though the operand isn't reloaded.
3795 ??? This latter case is somewhat odd because if we do the optional
3796 reload, it means the object is hanging around. Thus we need only
3797 do the address reload if the optional reload was NOT done.
3799 Change secondary reloads to be the address type of their operand, not
3802 If an operand's reload is now RELOAD_OTHER, change any
3803 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3804 RELOAD_FOR_OTHER_ADDRESS. */
3806 for (i
= 0; i
< n_reloads
; i
++)
3808 if (reload_secondary_p
[i
]
3809 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3810 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3812 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3813 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3814 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
3815 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3816 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3817 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3819 /* If we have a secondary reload to go along with this reload,
3820 change its type to RELOAD_FOR_OPADDR_ADDR. */
3822 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3823 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
)
3824 && reload_secondary_in_reload
[i
] != -1)
3826 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3828 reload_when_needed
[secondary_in_reload
]
3829 = RELOAD_FOR_OPADDR_ADDR
;
3831 /* If there's a tertiary reload we have to change it also. */
3832 if (secondary_in_reload
> 0
3833 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3834 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3835 = RELOAD_FOR_OPADDR_ADDR
;
3838 if ((reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3839 || reload_when_needed
[i
] == RELOAD_FOR_OUTADDR_ADDRESS
)
3840 && reload_secondary_out_reload
[i
] != -1)
3842 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3844 reload_when_needed
[secondary_out_reload
]
3845 = RELOAD_FOR_OPADDR_ADDR
;
3847 /* If there's a tertiary reload we have to change it also. */
3848 if (secondary_out_reload
3849 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3850 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3851 = RELOAD_FOR_OPADDR_ADDR
;
3854 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3857 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3858 || reload_when_needed
[i
] == RELOAD_FOR_INPADDR_ADDRESS
)
3859 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3860 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3862 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3864 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3865 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3868 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3869 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3870 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3872 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3873 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3874 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3875 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3876 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3877 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3878 This is complicated by the fact that a single operand can have more
3879 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3880 choose_reload_regs without affecting code quality, and cases that
3881 actually fail are extremely rare, so it turns out to be better to fix
3882 the problem here by not generating cases that choose_reload_regs will
3886 int op_addr_reloads
= 0;
3887 for (i
= 0; i
< n_reloads
; i
++)
3888 if (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
)
3891 if (op_addr_reloads
> 1)
3892 for (i
= 0; i
< n_reloads
; i
++)
3893 if (reload_when_needed
[i
] == RELOAD_FOR_OPADDR_ADDR
)
3894 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3897 /* See if we have any reloads that are now allowed to be merged
3898 because we've changed when the reload is needed to
3899 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3900 check for the most common cases. */
3902 for (i
= 0; i
< n_reloads
; i
++)
3903 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3904 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3905 || reload_when_needed
[i
] == RELOAD_FOR_OPADDR_ADDR
3906 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3907 for (j
= 0; j
< n_reloads
; j
++)
3908 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3909 && reload_when_needed
[j
] == reload_when_needed
[i
]
3910 && MATCHES (reload_in
[i
], reload_in
[j
])
3911 && reload_reg_class
[i
] == reload_reg_class
[j
]
3912 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3913 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3915 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3916 transfer_replacements (i
, j
);
3920 #else /* no REGISTER_CONSTRAINTS */
3922 int insn_code_number
;
3923 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3925 rtx body
= PATTERN (insn
);
3929 n_earlyclobbers
= 0;
3930 replace_reloads
= replace
;
3933 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3934 Store the operand values in RECOG_OPERAND and the locations
3935 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3936 Return if the insn needs no reload processing. */
3938 switch (GET_CODE (body
))
3949 noperands
= asm_noperands (body
);
3952 /* This insn is an `asm' with operands.
3953 First, find out how many operands, and allocate space. */
3955 insn_code_number
= -1;
3956 /* ??? This is a bug! ???
3957 Give up and delete this insn if it has too many operands. */
3958 if (noperands
> MAX_RECOG_OPERANDS
)
3961 /* Now get the operand values out of the insn. */
3963 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3964 NULL_PTR
, NULL_PTR
);
3969 /* Ordinary insn: recognize it, allocate space for operands and
3970 constraints, and get them out via insn_extract. */
3972 insn_code_number
= recog_memoized (insn
);
3973 noperands
= insn_n_operands
[insn_code_number
];
3974 insn_extract (insn
);
3980 for (i
= 0; i
< noperands
; i
++)
3982 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3983 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3985 if (insn_code_number
>= 0)
3986 if (insn_operand_address_p
[insn_code_number
][i
])
3987 find_reloads_address (VOIDmode
, NULL_PTR
,
3988 recog_operand
[i
], recog_operand_loc
[i
],
3989 i
, RELOAD_FOR_INPUT
, ind_levels
, insn
);
3991 /* In these cases, we can't tell if the operand is an input
3992 or an output, so be conservative. In practice it won't be
3996 find_reloads_address (GET_MODE (recog_operand
[i
]),
3997 recog_operand_loc
[i
],
3998 XEXP (recog_operand
[i
], 0),
3999 &XEXP (recog_operand
[i
], 0),
4000 i
, RELOAD_OTHER
, ind_levels
, insn
);
4002 recog_operand
[i
] = *recog_operand_loc
[i
]
4003 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
4004 ind_levels
, is_set_dest
);
4007 register int regno
= REGNO (recog_operand
[i
]);
4008 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4009 recog_operand
[i
] = *recog_operand_loc
[i
]
4010 = reg_equiv_constant
[regno
];
4011 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4012 that feeds this insn. */
4013 if (reg_equiv_mem
[regno
] != 0)
4014 recog_operand
[i
] = *recog_operand_loc
[i
]
4015 = reg_equiv_mem
[regno
];
4020 /* Perhaps an output reload can be combined with another
4021 to reduce needs by one. */
4022 if (!goal_earlyclobber
)
4024 #endif /* no REGISTER_CONSTRAINTS */
4027 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4028 accepts a memory operand with constant address. */
4031 alternative_allows_memconst (constraint
, altnum
)
4036 /* Skip alternatives before the one requested. */
4039 while (*constraint
++ != ',');
4042 /* Scan the requested alternative for 'm' or 'o'.
4043 If one of them is present, this alternative accepts memory constants. */
4044 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4045 if (c
== 'm' || c
== 'o')
4050 /* Scan X for memory references and scan the addresses for reloading.
4051 Also checks for references to "constant" regs that we want to eliminate
4052 and replaces them with the values they stand for.
4053 We may alter X destructively if it contains a reference to such.
4054 If X is just a constant reg, we return the equivalent value
4057 IND_LEVELS says how many levels of indirect addressing this machine
4060 OPNUM and TYPE identify the purpose of the reload.
4062 IS_SET_DEST is true if X is the destination of a SET, which is not
4063 appropriate to be replaced by a constant. */
4066 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
4069 enum reload_type type
;
4073 register RTX_CODE code
= GET_CODE (x
);
4075 register char *fmt
= GET_RTX_FORMAT (code
);
4080 /* This code is duplicated for speed in find_reloads. */
4081 register int regno
= REGNO (x
);
4082 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4083 x
= reg_equiv_constant
[regno
];
4085 /* This creates (subreg (mem...)) which would cause an unnecessary
4086 reload of the mem. */
4087 else if (reg_equiv_mem
[regno
] != 0)
4088 x
= reg_equiv_mem
[regno
];
4090 else if (reg_equiv_address
[regno
] != 0)
4092 /* If reg_equiv_address varies, it may be shared, so copy it. */
4093 /* We must rerun eliminate_regs, in case the elimination
4094 offsets have changed. */
4095 rtx addr
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0,
4099 if (rtx_varies_p (addr
))
4100 addr
= copy_rtx (addr
);
4102 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
4103 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4104 find_reloads_address (GET_MODE (x
), NULL_PTR
,
4106 &XEXP (x
, 0), opnum
, type
, ind_levels
, 0);
4113 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4114 opnum
, type
, ind_levels
, 0);
4118 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4120 /* Check for SUBREG containing a REG that's equivalent to a constant.
4121 If the constant has a known value, truncate it right now.
4122 Similarly if we are extracting a single-word of a multi-word
4123 constant. If the constant is symbolic, allow it to be substituted
4124 normally. push_reload will strip the subreg later. If the
4125 constant is VOIDmode, abort because we will lose the mode of
4126 the register (this should never happen because one of the cases
4127 above should handle it). */
4129 register int regno
= REGNO (SUBREG_REG (x
));
4132 if (subreg_lowpart_p (x
)
4133 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4134 && reg_equiv_constant
[regno
] != 0
4135 && (tem
= gen_lowpart_common (GET_MODE (x
),
4136 reg_equiv_constant
[regno
])) != 0)
4139 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4140 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4141 && reg_equiv_constant
[regno
] != 0
4142 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4144 GET_MODE (SUBREG_REG (x
)))) != 0)
4147 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4148 && reg_equiv_constant
[regno
] != 0
4149 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4152 /* If the subreg contains a reg that will be converted to a mem,
4153 convert the subreg to a narrower memref now.
4154 Otherwise, we would get (subreg (mem ...) ...),
4155 which would force reload of the mem.
4157 We also need to do this if there is an equivalent MEM that is
4158 not offsettable. In that case, alter_subreg would produce an
4159 invalid address on big-endian machines.
4161 For machines that extend byte loads, we must not reload using
4162 a wider mode if we have a paradoxical SUBREG. find_reloads will
4163 force a reload in that case. So we should not do anything here. */
4165 else if (regno
>= FIRST_PSEUDO_REGISTER
4166 #ifdef LOAD_EXTEND_OP
4167 && (GET_MODE_SIZE (GET_MODE (x
))
4168 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4170 && (reg_equiv_address
[regno
] != 0
4171 || (reg_equiv_mem
[regno
] != 0
4172 && (! strict_memory_address_p (GET_MODE (x
),
4173 XEXP (reg_equiv_mem
[regno
], 0))
4174 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
4176 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
4177 /* We must rerun eliminate_regs, in case the elimination
4178 offsets have changed. */
4179 rtx addr
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0,
4182 if (BYTES_BIG_ENDIAN
)
4185 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
4186 offset
+= MIN (size
, UNITS_PER_WORD
);
4187 size
= GET_MODE_SIZE (GET_MODE (x
));
4188 offset
-= MIN (size
, UNITS_PER_WORD
);
4190 addr
= plus_constant (addr
, offset
);
4191 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
4192 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4193 find_reloads_address (GET_MODE (x
), NULL_PTR
,
4195 &XEXP (x
, 0), opnum
, type
, ind_levels
, 0);
4200 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4203 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4204 ind_levels
, is_set_dest
);
4209 /* Return a mem ref for the memory equivalent of reg REGNO.
4210 This mem ref is not shared with anything. */
4213 make_memloc (ad
, regno
)
4218 /* We must rerun eliminate_regs, in case the elimination
4219 offsets have changed. */
4220 rtx tem
= XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
, 0),
4223 #if 0 /* We cannot safely reuse a memloc made here;
4224 if the pseudo appears twice, and its mem needs a reload,
4225 it gets two separate reloads assigned, but it only
4226 gets substituted with the second of them;
4227 then it can get used before that reload reg gets loaded up. */
4228 for (i
= 0; i
< n_memlocs
; i
++)
4229 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
4233 /* If TEM might contain a pseudo, we must copy it to avoid
4234 modifying it when we do the substitution for the reload. */
4235 if (rtx_varies_p (tem
))
4236 tem
= copy_rtx (tem
);
4238 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
4239 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4240 memlocs
[n_memlocs
++] = tem
;
4244 /* Record all reloads needed for handling memory address AD
4245 which appears in *LOC in a memory reference to mode MODE
4246 which itself is found in location *MEMREFLOC.
4247 Note that we take shortcuts assuming that no multi-reg machine mode
4248 occurs as part of an address.
4250 OPNUM and TYPE specify the purpose of this reload.
4252 IND_LEVELS says how many levels of indirect addressing this machine
4255 INSN, if nonzero, is the insn in which we do the reload. It is used
4256 to determine if we may generate output reloads.
4258 Value is nonzero if this address is reloaded or replaced as a whole.
4259 This is interesting to the caller if the address is an autoincrement.
4261 Note that there is no verification that the address will be valid after
4262 this routine does its work. Instead, we rely on the fact that the address
4263 was valid when reload started. So we need only undo things that reload
4264 could have broken. These are wrong register types, pseudos not allocated
4265 to a hard register, and frame pointer elimination. */
4268 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4269 enum machine_mode mode
;
4274 enum reload_type type
;
4281 /* If the address is a register, see if it is a legitimate address and
4282 reload if not. We first handle the cases where we need not reload
4283 or where we must reload in a non-standard way. */
4285 if (GET_CODE (ad
) == REG
)
4289 if (reg_equiv_constant
[regno
] != 0
4290 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4292 *loc
= ad
= reg_equiv_constant
[regno
];
4296 else if (reg_equiv_address
[regno
] != 0)
4298 tem
= make_memloc (ad
, regno
);
4299 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4300 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4302 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4303 reload_address_base_reg_class
,
4304 GET_MODE (ad
), VOIDmode
, 0, 0,
4309 /* We can avoid a reload if the register's equivalent memory expression
4310 is valid as an indirect memory address.
4311 But not all addresses are valid in a mem used as an indirect address:
4312 only reg or reg+constant. */
4314 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4315 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4316 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4317 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4318 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4319 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 1)))))
4322 /* The only remaining case where we can avoid a reload is if this is a
4323 hard register that is valid as a base register and which is not the
4324 subject of a CLOBBER in this insn. */
4326 else if (regno
< FIRST_PSEUDO_REGISTER
4327 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4328 && ! regno_clobbered_p (regno
, this_insn
))
4331 /* If we do not have one of the cases above, we must do the reload. */
4332 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, reload_address_base_reg_class
,
4333 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4337 if (strict_memory_address_p (mode
, ad
))
4339 /* The address appears valid, so reloads are not needed.
4340 But the address may contain an eliminable register.
4341 This can happen because a machine with indirect addressing
4342 may consider a pseudo register by itself a valid address even when
4343 it has failed to get a hard reg.
4344 So do a tree-walk to find and eliminate all such regs. */
4346 /* But first quickly dispose of a common case. */
4347 if (GET_CODE (ad
) == PLUS
4348 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4349 && GET_CODE (XEXP (ad
, 0)) == REG
4350 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4353 subst_reg_equivs_changed
= 0;
4354 *loc
= subst_reg_equivs (ad
);
4356 if (! subst_reg_equivs_changed
)
4359 /* Check result for validity after substitution. */
4360 if (strict_memory_address_p (mode
, ad
))
4364 /* The address is not valid. We have to figure out why. One possibility
4365 is that it is itself a MEM. This can happen when the frame pointer is
4366 being eliminated, a pseudo is not allocated to a hard register, and the
4367 offset between the frame and stack pointers is not its initial value.
4368 In that case the pseudo will have been replaced by a MEM referring to
4369 the stack pointer. */
4370 if (GET_CODE (ad
) == MEM
)
4372 /* First ensure that the address in this MEM is valid. Then, unless
4373 indirect addresses are valid, reload the MEM into a register. */
4375 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4376 opnum
, ADDR_TYPE (type
),
4377 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4379 /* If tem was changed, then we must create a new memory reference to
4380 hold it and store it back into memrefloc. */
4381 if (tem
!= ad
&& memrefloc
)
4383 *memrefloc
= copy_rtx (*memrefloc
);
4384 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4385 loc
= &XEXP (*memrefloc
, 0);
4388 /* Check similar cases as for indirect addresses as above except
4389 that we can allow pseudos and a MEM since they should have been
4390 taken care of above. */
4393 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4394 || GET_CODE (XEXP (tem
, 0)) == MEM
4395 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4396 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4397 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4398 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4400 /* Must use TEM here, not AD, since it is the one that will
4401 have any subexpressions reloaded, if needed. */
4402 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4403 reload_address_base_reg_class
, GET_MODE (tem
),
4412 /* If we have address of a stack slot but it's not valid because the
4413 displacement is too large, compute the sum in a register.
4414 Handle all base registers here, not just fp/ap/sp, because on some
4415 targets (namely SH) we can also get too large displacements from
4416 big-endian corrections. */
4417 else if (GET_CODE (ad
) == PLUS
4418 && GET_CODE (XEXP (ad
, 0)) == REG
4419 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4420 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4421 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4423 /* Unshare the MEM rtx so we can safely alter it. */
4426 *memrefloc
= copy_rtx (*memrefloc
);
4427 loc
= &XEXP (*memrefloc
, 0);
4429 if (double_reg_address_ok
)
4431 /* Unshare the sum as well. */
4432 *loc
= ad
= copy_rtx (ad
);
4433 /* Reload the displacement into an index reg.
4434 We assume the frame pointer or arg pointer is a base reg. */
4435 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4436 reload_address_index_reg_class
,
4437 GET_MODE (ad
), opnum
, type
, ind_levels
);
4441 /* If the sum of two regs is not necessarily valid,
4442 reload the sum into a base reg.
4443 That will at least work. */
4444 find_reloads_address_part (ad
, loc
, reload_address_base_reg_class
,
4445 Pmode
, opnum
, type
, ind_levels
);
4450 /* If we have an indexed stack slot, there are three possible reasons why
4451 it might be invalid: The index might need to be reloaded, the address
4452 might have been made by frame pointer elimination and hence have a
4453 constant out of range, or both reasons might apply.
4455 We can easily check for an index needing reload, but even if that is the
4456 case, we might also have an invalid constant. To avoid making the
4457 conservative assumption and requiring two reloads, we see if this address
4458 is valid when not interpreted strictly. If it is, the only problem is
4459 that the index needs a reload and find_reloads_address_1 will take care
4462 There is still a case when we might generate an extra reload,
4463 however. In certain cases eliminate_regs will return a MEM for a REG
4464 (see the code there for details). In those cases, memory_address_p
4465 applied to our address will return 0 so we will think that our offset
4466 must be too large. But it might indeed be valid and the only problem
4467 is that a MEM is present where a REG should be. This case should be
4468 very rare and there doesn't seem to be any way to avoid it.
4470 If we decide to do something here, it must be that
4471 `double_reg_address_ok' is true and that this address rtl was made by
4472 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4473 rework the sum so that the reload register will be added to the index.
4474 This is safe because we know the address isn't shared.
4476 We check for fp/ap/sp as both the first and second operand of the
4479 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4480 && GET_CODE (XEXP (ad
, 0)) == PLUS
4481 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4482 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4483 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4485 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4486 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4488 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4489 && ! memory_address_p (mode
, ad
))
4491 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4492 plus_constant (XEXP (XEXP (ad
, 0), 0),
4493 INTVAL (XEXP (ad
, 1))),
4494 XEXP (XEXP (ad
, 0), 1));
4495 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4496 reload_address_base_reg_class
,
4497 GET_MODE (ad
), opnum
, type
, ind_levels
);
4498 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4504 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4505 && GET_CODE (XEXP (ad
, 0)) == PLUS
4506 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4507 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4508 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4510 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4511 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4513 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4514 && ! memory_address_p (mode
, ad
))
4516 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4517 XEXP (XEXP (ad
, 0), 0),
4518 plus_constant (XEXP (XEXP (ad
, 0), 1),
4519 INTVAL (XEXP (ad
, 1))));
4520 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4521 reload_address_base_reg_class
,
4522 GET_MODE (ad
), opnum
, type
, ind_levels
);
4523 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4529 /* See if address becomes valid when an eliminable register
4530 in a sum is replaced. */
4533 if (GET_CODE (ad
) == PLUS
)
4534 tem
= subst_indexed_address (ad
);
4535 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4537 /* Ok, we win that way. Replace any additional eliminable
4540 subst_reg_equivs_changed
= 0;
4541 tem
= subst_reg_equivs (tem
);
4543 /* Make sure that didn't make the address invalid again. */
4545 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4552 /* If constants aren't valid addresses, reload the constant address
4554 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4556 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4557 Unshare it so we can safely alter it. */
4558 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4559 && CONSTANT_POOL_ADDRESS_P (ad
))
4561 *memrefloc
= copy_rtx (*memrefloc
);
4562 loc
= &XEXP (*memrefloc
, 0);
4565 find_reloads_address_part (ad
, loc
, reload_address_base_reg_class
,
4571 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4575 /* Find all pseudo regs appearing in AD
4576 that are eliminable in favor of equivalent values
4577 and do not have hard regs; replace them by their equivalents. */
4580 subst_reg_equivs (ad
)
4583 register RTX_CODE code
= GET_CODE (ad
);
4601 register int regno
= REGNO (ad
);
4603 if (reg_equiv_constant
[regno
] != 0)
4605 subst_reg_equivs_changed
= 1;
4606 return reg_equiv_constant
[regno
];
4612 /* Quickly dispose of a common case. */
4613 if (XEXP (ad
, 0) == frame_pointer_rtx
4614 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4622 fmt
= GET_RTX_FORMAT (code
);
4623 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4625 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4629 /* Compute the sum of X and Y, making canonicalizations assumed in an
4630 address, namely: sum constant integers, surround the sum of two
4631 constants with a CONST, put the constant as the second operand, and
4632 group the constant on the outermost sum.
4634 This routine assumes both inputs are already in canonical form. */
4641 enum machine_mode mode
= GET_MODE (x
);
4643 if (mode
== VOIDmode
)
4644 mode
= GET_MODE (y
);
4646 if (mode
== VOIDmode
)
4649 if (GET_CODE (x
) == CONST_INT
)
4650 return plus_constant (y
, INTVAL (x
));
4651 else if (GET_CODE (y
) == CONST_INT
)
4652 return plus_constant (x
, INTVAL (y
));
4653 else if (CONSTANT_P (x
))
4654 tem
= x
, x
= y
, y
= tem
;
4656 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4657 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4659 /* Note that if the operands of Y are specified in the opposite
4660 order in the recursive calls below, infinite recursion will occur. */
4661 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4662 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4664 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4665 constant will have been placed second. */
4666 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4668 if (GET_CODE (x
) == CONST
)
4670 if (GET_CODE (y
) == CONST
)
4673 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4676 return gen_rtx (PLUS
, mode
, x
, y
);
4679 /* If ADDR is a sum containing a pseudo register that should be
4680 replaced with a constant (from reg_equiv_constant),
4681 return the result of doing so, and also apply the associative
4682 law so that the result is more likely to be a valid address.
4683 (But it is not guaranteed to be one.)
4685 Note that at most one register is replaced, even if more are
4686 replaceable. Also, we try to put the result into a canonical form
4687 so it is more likely to be a valid address.
4689 In all other cases, return ADDR. */
4692 subst_indexed_address (addr
)
4695 rtx op0
= 0, op1
= 0, op2
= 0;
4699 if (GET_CODE (addr
) == PLUS
)
4701 /* Try to find a register to replace. */
4702 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4703 if (GET_CODE (op0
) == REG
4704 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4705 && reg_renumber
[regno
] < 0
4706 && reg_equiv_constant
[regno
] != 0)
4707 op0
= reg_equiv_constant
[regno
];
4708 else if (GET_CODE (op1
) == REG
4709 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4710 && reg_renumber
[regno
] < 0
4711 && reg_equiv_constant
[regno
] != 0)
4712 op1
= reg_equiv_constant
[regno
];
4713 else if (GET_CODE (op0
) == PLUS
4714 && (tem
= subst_indexed_address (op0
)) != op0
)
4716 else if (GET_CODE (op1
) == PLUS
4717 && (tem
= subst_indexed_address (op1
)) != op1
)
4722 /* Pick out up to three things to add. */
4723 if (GET_CODE (op1
) == PLUS
)
4724 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4725 else if (GET_CODE (op0
) == PLUS
)
4726 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4728 /* Compute the sum. */
4730 op1
= form_sum (op1
, op2
);
4732 op0
= form_sum (op0
, op1
);
4739 /* Record the pseudo registers we must reload into hard registers in a
4740 subexpression of a would-be memory address, X referring to a value
4741 in mode MODE. (This function is not called if the address we find
4744 CONTEXT = 1 means we are considering regs as index regs,
4745 = 0 means we are considering them as base regs.
4747 OPNUM and TYPE specify the purpose of any reloads made.
4749 IND_LEVELS says how many levels of indirect addressing are
4750 supported at this point in the address.
4752 INSN, if nonzero, is the insn in which we do the reload. It is used
4753 to determine if we may generate output reloads.
4755 We return nonzero if X, as a whole, is reloaded or replaced. */
4757 /* Note that we take shortcuts assuming that no multi-reg machine mode
4758 occurs as part of an address.
4759 Also, this is not fully machine-customizable; it works for machines
4760 such as vaxes and 68000's and 32000's, but other possible machines
4761 could have addressing modes that this does not handle right. */
4764 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
4765 enum machine_mode mode
;
4770 enum reload_type type
;
4774 register RTX_CODE code
= GET_CODE (x
);
4780 register rtx orig_op0
= XEXP (x
, 0);
4781 register rtx orig_op1
= XEXP (x
, 1);
4782 register RTX_CODE code0
= GET_CODE (orig_op0
);
4783 register RTX_CODE code1
= GET_CODE (orig_op1
);
4784 register rtx op0
= orig_op0
;
4785 register rtx op1
= orig_op1
;
4787 if (GET_CODE (op0
) == SUBREG
)
4789 op0
= SUBREG_REG (op0
);
4790 code0
= GET_CODE (op0
);
4791 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
4792 op0
= gen_rtx (REG
, word_mode
,
4793 REGNO (op0
) + SUBREG_WORD (orig_op0
));
4796 if (GET_CODE (op1
) == SUBREG
)
4798 op1
= SUBREG_REG (op1
);
4799 code1
= GET_CODE (op1
);
4800 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
4801 op1
= gen_rtx (REG
, GET_MODE (op1
),
4802 REGNO (op1
) + SUBREG_WORD (orig_op1
));
4805 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4806 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4808 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4809 type
, ind_levels
, insn
);
4810 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4811 type
, ind_levels
, insn
);
4814 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4815 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4817 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4818 type
, ind_levels
, insn
);
4819 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4820 type
, ind_levels
, insn
);
4823 else if (code0
== CONST_INT
|| code0
== CONST
4824 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4825 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4826 type
, ind_levels
, insn
);
4828 else if (code1
== CONST_INT
|| code1
== CONST
4829 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4830 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4831 type
, ind_levels
, insn
);
4833 else if (code0
== REG
&& code1
== REG
)
4835 if (REG_OK_FOR_INDEX_P (op0
)
4836 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
4838 else if (REG_OK_FOR_INDEX_P (op1
)
4839 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
4841 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
4842 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4843 type
, ind_levels
, insn
);
4844 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
4845 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4846 type
, ind_levels
, insn
);
4847 else if (REG_OK_FOR_INDEX_P (op1
))
4848 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4849 type
, ind_levels
, insn
);
4850 else if (REG_OK_FOR_INDEX_P (op0
))
4851 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4852 type
, ind_levels
, insn
);
4855 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4856 type
, ind_levels
, insn
);
4857 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4858 type
, ind_levels
, insn
);
4862 else if (code0
== REG
)
4864 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
4865 type
, ind_levels
, insn
);
4866 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
4867 type
, ind_levels
, insn
);
4870 else if (code1
== REG
)
4872 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
4873 type
, ind_levels
, insn
);
4874 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
4875 type
, ind_levels
, insn
);
4885 if (GET_CODE (XEXP (x
, 0)) == REG
)
4887 register int regno
= REGNO (XEXP (x
, 0));
4891 /* A register that is incremented cannot be constant! */
4892 if (regno
>= FIRST_PSEUDO_REGISTER
4893 && reg_equiv_constant
[regno
] != 0)
4896 /* Handle a register that is equivalent to a memory location
4897 which cannot be addressed directly. */
4898 if (reg_equiv_address
[regno
] != 0)
4900 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4901 /* First reload the memory location's address.
4902 We can't use ADDR_TYPE (type) here, because we need to
4903 write back the value after reading it, hence we actually
4904 need two registers. */
4905 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4906 &XEXP (tem
, 0), opnum
, type
,
4908 /* Put this inside a new increment-expression. */
4909 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4910 /* Proceed to reload that, as if it contained a register. */
4913 /* If we have a hard register that is ok as an index,
4914 don't make a reload. If an autoincrement of a nice register
4915 isn't "valid", it must be that no autoincrement is "valid".
4916 If that is true and something made an autoincrement anyway,
4917 this must be a special context where one is allowed.
4918 (For example, a "push" instruction.)
4919 We can't improve this address, so leave it alone. */
4921 /* Otherwise, reload the autoincrement into a suitable hard reg
4922 and record how much to increment by. */
4924 if (reg_renumber
[regno
] >= 0)
4925 regno
= reg_renumber
[regno
];
4926 if ((regno
>= FIRST_PSEUDO_REGISTER
4927 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4928 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
4933 /* If we can output the register afterwards, do so, this
4934 saves the extra update.
4935 We can do so if we have an INSN - i.e. no JUMP_INSN nor
4936 CALL_INSN - and it does not set CC0.
4937 But don't do this if we cannot directly address the
4938 memory location, since this will make it harder to
4939 reuse address reloads, and increases register pressure.
4940 Also don't do this if we can probably update x directly. */
4941 rtx equiv
= reg_equiv_mem
[regno
];
4942 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
4943 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
4945 && ! sets_cc0_p (PATTERN (insn
))
4947 && ! (icode
!= CODE_FOR_nothing
4948 && (*insn_operand_predicate
[icode
][0]) (equiv
, Pmode
)
4949 && (*insn_operand_predicate
[icode
][1]) (equiv
, Pmode
)))
4954 = push_reload (x
, x
, loc
, loc
,
4956 ? reload_address_index_reg_class
4957 : reload_address_base_reg_class
),
4958 GET_MODE (x
), GET_MODE (x
), 0, 0,
4959 opnum
, RELOAD_OTHER
);
4964 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4966 ? reload_address_index_reg_class
4967 : reload_address_base_reg_class
),
4968 GET_MODE (x
), GET_MODE (x
), 0, 0,
4970 reload_inc
[reloadnum
]
4971 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4977 /* Update the REG_INC notes. */
4979 for (link
= REG_NOTES (this_insn
);
4980 link
; link
= XEXP (link
, 1))
4981 if (REG_NOTE_KIND (link
) == REG_INC
4982 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4983 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4989 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4991 /* This is probably the result of a substitution, by eliminate_regs,
4992 of an equivalent address for a pseudo that was not allocated to a
4993 hard register. Verify that the specified address is valid and
4994 reload it into a register. */
4995 rtx tem
= XEXP (x
, 0);
4999 /* Since we know we are going to reload this item, don't decrement
5000 for the indirection level.
5002 Note that this is actually conservative: it would be slightly
5003 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5005 /* We can't use ADDR_TYPE (type) here, because we need to
5006 write back the value after reading it, hence we actually
5007 need two registers. */
5008 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5009 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5010 opnum
, type
, ind_levels
, insn
);
5012 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5014 ? reload_address_index_reg_class
5015 : reload_address_base_reg_class
),
5016 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5017 reload_inc
[reloadnum
]
5018 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5020 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5022 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5029 /* This is probably the result of a substitution, by eliminate_regs, of
5030 an equivalent address for a pseudo that was not allocated to a hard
5031 register. Verify that the specified address is valid and reload it
5034 Since we know we are going to reload this item, don't decrement for
5035 the indirection level.
5037 Note that this is actually conservative: it would be slightly more
5038 efficient to use the value of SPILL_INDIRECT_LEVELS from
5041 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5042 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5043 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5044 (context
? reload_address_index_reg_class
5045 : reload_address_base_reg_class
),
5046 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5051 register int regno
= REGNO (x
);
5053 if (reg_equiv_constant
[regno
] != 0)
5055 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5057 ? reload_address_index_reg_class
5058 : reload_address_base_reg_class
),
5059 GET_MODE (x
), opnum
, type
, ind_levels
);
5063 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5064 that feeds this insn. */
5065 if (reg_equiv_mem
[regno
] != 0)
5067 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5069 ? reload_address_index_reg_class
5070 : reload_address_base_reg_class
),
5071 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5076 if (reg_equiv_address
[regno
] != 0)
5078 x
= make_memloc (x
, regno
);
5079 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
5080 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5083 if (reg_renumber
[regno
] >= 0)
5084 regno
= reg_renumber
[regno
];
5086 if ((regno
>= FIRST_PSEUDO_REGISTER
5087 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5088 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5090 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5092 ? reload_address_index_reg_class
5093 : reload_address_base_reg_class
),
5094 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5098 /* If a register appearing in an address is the subject of a CLOBBER
5099 in this insn, reload it into some other register to be safe.
5100 The CLOBBER is supposed to make the register unavailable
5101 from before this insn to after it. */
5102 if (regno_clobbered_p (regno
, this_insn
))
5104 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5106 ? reload_address_index_reg_class
5107 : reload_address_base_reg_class
),
5108 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5115 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5117 /* If this is a SUBREG of a hard register and the resulting register
5118 is of the wrong class, reload the whole SUBREG. This avoids
5119 needless copies if SUBREG_REG is multi-word. */
5120 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5122 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5124 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5125 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5127 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5129 ? reload_address_index_reg_class
5130 : reload_address_base_reg_class
),
5131 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5135 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5136 is larger than the class size, then reload the whole SUBREG. */
5139 enum reg_class
class = (context
5140 ? reload_address_index_reg_class
5141 : reload_address_base_reg_class
);
5142 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5143 > reg_class_size
[class])
5145 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5146 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5158 register char *fmt
= GET_RTX_FORMAT (code
);
5161 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5164 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5165 opnum
, type
, ind_levels
, insn
);
5172 /* X, which is found at *LOC, is a part of an address that needs to be
5173 reloaded into a register of class CLASS. If X is a constant, or if
5174 X is a PLUS that contains a constant, check that the constant is a
5175 legitimate operand and that we are supposed to be able to load
5176 it into the register.
5178 If not, force the constant into memory and reload the MEM instead.
5180 MODE is the mode to use, in case X is an integer constant.
5182 OPNUM and TYPE describe the purpose of any reloads made.
5184 IND_LEVELS says how many levels of indirect addressing this machine
5188 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5191 enum reg_class
class;
5192 enum machine_mode mode
;
5194 enum reload_type type
;
5198 && (! LEGITIMATE_CONSTANT_P (x
)
5199 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5201 rtx tem
= x
= force_const_mem (mode
, x
);
5202 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5203 opnum
, type
, ind_levels
, 0);
5206 else if (GET_CODE (x
) == PLUS
5207 && CONSTANT_P (XEXP (x
, 1))
5208 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5209 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5211 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5213 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
5214 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5215 opnum
, type
, ind_levels
, 0);
5218 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5219 mode
, VOIDmode
, 0, 0, opnum
, type
);
5222 /* Substitute into the current INSN the registers into which we have reloaded
5223 the things that need reloading. The array `replacements'
5224 says contains the locations of all pointers that must be changed
5225 and says what to replace them with.
5227 Return the rtx that X translates into; usually X, but modified. */
5234 for (i
= 0; i
< n_replacements
; i
++)
5236 register struct replacement
*r
= &replacements
[i
];
5237 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
5240 /* Encapsulate RELOADREG so its machine mode matches what
5241 used to be there. Note that gen_lowpart_common will
5242 do the wrong thing if RELOADREG is multi-word. RELOADREG
5243 will always be a REG here. */
5244 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5245 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
5247 /* If we are putting this into a SUBREG and RELOADREG is a
5248 SUBREG, we would be making nested SUBREGs, so we have to fix
5249 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5251 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5253 if (GET_MODE (*r
->subreg_loc
)
5254 == GET_MODE (SUBREG_REG (reloadreg
)))
5255 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5258 *r
->where
= SUBREG_REG (reloadreg
);
5259 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5263 *r
->where
= reloadreg
;
5265 /* If reload got no reg and isn't optional, something's wrong. */
5266 else if (! reload_optional
[r
->what
])
5271 /* Make a copy of any replacements being done into X and move those copies
5272 to locations in Y, a copy of X. We only look at the highest level of
5276 copy_replacements (x
, y
)
5281 enum rtx_code code
= GET_CODE (x
);
5282 char *fmt
= GET_RTX_FORMAT (code
);
5283 struct replacement
*r
;
5285 /* We can't support X being a SUBREG because we might then need to know its
5286 location if something inside it was replaced. */
5290 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5292 for (j
= 0; j
< n_replacements
; j
++)
5294 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5296 r
= &replacements
[n_replacements
++];
5297 r
->where
= replacements
[j
].where
;
5298 r
->subreg_loc
= &XEXP (y
, i
);
5299 r
->what
= replacements
[j
].what
;
5300 r
->mode
= replacements
[j
].mode
;
5302 else if (replacements
[j
].where
== &XEXP (x
, i
))
5304 r
= &replacements
[n_replacements
++];
5305 r
->where
= &XEXP (y
, i
);
5307 r
->what
= replacements
[j
].what
;
5308 r
->mode
= replacements
[j
].mode
;
5313 /* If LOC was scheduled to be replaced by something, return the replacement.
5314 Otherwise, return *LOC. */
5317 find_replacement (loc
)
5320 struct replacement
*r
;
5322 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5324 rtx reloadreg
= reload_reg_rtx
[r
->what
];
5326 if (reloadreg
&& r
->where
== loc
)
5328 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5329 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
5333 else if (reloadreg
&& r
->subreg_loc
== loc
)
5335 /* RELOADREG must be either a REG or a SUBREG.
5337 ??? Is it actually still ever a SUBREG? If so, why? */
5339 if (GET_CODE (reloadreg
) == REG
)
5340 return gen_rtx (REG
, GET_MODE (*loc
),
5341 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5342 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5345 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5346 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5350 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5351 what's inside and make a new rtl if so. */
5352 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5353 || GET_CODE (*loc
) == MULT
)
5355 rtx x
= find_replacement (&XEXP (*loc
, 0));
5356 rtx y
= find_replacement (&XEXP (*loc
, 1));
5358 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5359 return gen_rtx (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5365 /* Return nonzero if register in range [REGNO, ENDREGNO)
5366 appears either explicitly or implicitly in X
5367 other than being stored into (except for earlyclobber operands).
5369 References contained within the substructure at LOC do not count.
5370 LOC may be zero, meaning don't ignore anything.
5372 This is similar to refers_to_regno_p in rtlanal.c except that we
5373 look at equivalences for pseudos that didn't get hard registers. */
5376 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5377 int regno
, endregno
;
5382 register RTX_CODE code
;
5389 code
= GET_CODE (x
);
5396 /* If this is a pseudo, a hard register must not have been allocated.
5397 X must therefore either be a constant or be in memory. */
5398 if (i
>= FIRST_PSEUDO_REGISTER
)
5400 if (reg_equiv_memory_loc
[i
])
5401 return refers_to_regno_for_reload_p (regno
, endregno
,
5402 reg_equiv_memory_loc
[i
],
5405 if (reg_equiv_constant
[i
])
5411 return (endregno
> i
5412 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5413 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5417 /* If this is a SUBREG of a hard reg, we can see exactly which
5418 registers are being modified. Otherwise, handle normally. */
5419 if (GET_CODE (SUBREG_REG (x
)) == REG
5420 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5422 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5424 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5425 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5427 return endregno
> inner_regno
&& regno
< inner_endregno
;
5433 if (&SET_DEST (x
) != loc
5434 /* Note setting a SUBREG counts as referring to the REG it is in for
5435 a pseudo but not for hard registers since we can
5436 treat each word individually. */
5437 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5438 && loc
!= &SUBREG_REG (SET_DEST (x
))
5439 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5440 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5441 && refers_to_regno_for_reload_p (regno
, endregno
,
5442 SUBREG_REG (SET_DEST (x
)),
5444 /* If the output is an earlyclobber operand, this is
5446 || ((GET_CODE (SET_DEST (x
)) != REG
5447 || earlyclobber_operand_p (SET_DEST (x
)))
5448 && refers_to_regno_for_reload_p (regno
, endregno
,
5449 SET_DEST (x
), loc
))))
5452 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5461 /* X does not match, so try its subexpressions. */
5463 fmt
= GET_RTX_FORMAT (code
);
5464 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5466 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5474 if (refers_to_regno_for_reload_p (regno
, endregno
,
5478 else if (fmt
[i
] == 'E')
5481 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5482 if (loc
!= &XVECEXP (x
, i
, j
)
5483 && refers_to_regno_for_reload_p (regno
, endregno
,
5484 XVECEXP (x
, i
, j
), loc
))
5491 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5492 we check if any register number in X conflicts with the relevant register
5493 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5494 contains a MEM (we don't bother checking for memory addresses that can't
5495 conflict because we expect this to be a rare case.
5497 This function is similar to reg_overlap_mention_p in rtlanal.c except
5498 that we look at equivalences for pseudos that didn't get hard registers. */
5501 reg_overlap_mentioned_for_reload_p (x
, in
)
5504 int regno
, endregno
;
5506 if (GET_CODE (x
) == SUBREG
)
5508 regno
= REGNO (SUBREG_REG (x
));
5509 if (regno
< FIRST_PSEUDO_REGISTER
)
5510 regno
+= SUBREG_WORD (x
);
5512 else if (GET_CODE (x
) == REG
)
5516 /* If this is a pseudo, it must not have been assigned a hard register.
5517 Therefore, it must either be in memory or be a constant. */
5519 if (regno
>= FIRST_PSEUDO_REGISTER
)
5521 if (reg_equiv_memory_loc
[regno
])
5522 return refers_to_mem_for_reload_p (in
);
5523 else if (reg_equiv_constant
[regno
])
5528 else if (CONSTANT_P (x
))
5530 else if (GET_CODE (x
) == MEM
)
5531 return refers_to_mem_for_reload_p (in
);
5532 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5533 || GET_CODE (x
) == CC0
)
5534 return reg_mentioned_p (x
, in
);
5538 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5539 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5541 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5544 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5548 refers_to_mem_for_reload_p (x
)
5554 if (GET_CODE (x
) == MEM
)
5557 if (GET_CODE (x
) == REG
)
5558 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5559 && reg_equiv_memory_loc
[REGNO (x
)]);
5561 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5562 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5564 && (GET_CODE (XEXP (x
, i
)) == MEM
5565 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5571 /* Check the insns before INSN to see if there is a suitable register
5572 containing the same value as GOAL.
5573 If OTHER is -1, look for a register in class CLASS.
5574 Otherwise, just see if register number OTHER shares GOAL's value.
5576 Return an rtx for the register found, or zero if none is found.
5578 If RELOAD_REG_P is (short *)1,
5579 we reject any hard reg that appears in reload_reg_rtx
5580 because such a hard reg is also needed coming into this insn.
5582 If RELOAD_REG_P is any other nonzero value,
5583 it is a vector indexed by hard reg number
5584 and we reject any hard reg whose element in the vector is nonnegative
5585 as well as any that appears in reload_reg_rtx.
5587 If GOAL is zero, then GOALREG is a register number; we look
5588 for an equivalent for that register.
5590 MODE is the machine mode of the value we want an equivalence for.
5591 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5593 This function is used by jump.c as well as in the reload pass.
5595 If GOAL is the sum of the stack pointer and a constant, we treat it
5596 as if it were a constant except that sp is required to be unchanging. */
5599 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5602 enum reg_class
class;
5604 short *reload_reg_p
;
5606 enum machine_mode mode
;
5608 register rtx p
= insn
;
5609 rtx goaltry
, valtry
, value
, where
;
5611 register int regno
= -1;
5615 int goal_mem_addr_varies
= 0;
5616 int need_stable_sp
= 0;
5622 else if (GET_CODE (goal
) == REG
)
5623 regno
= REGNO (goal
);
5624 else if (GET_CODE (goal
) == MEM
)
5626 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5627 if (MEM_VOLATILE_P (goal
))
5629 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5631 /* An address with side effects must be reexecuted. */
5644 else if (CONSTANT_P (goal
))
5646 else if (GET_CODE (goal
) == PLUS
5647 && XEXP (goal
, 0) == stack_pointer_rtx
5648 && CONSTANT_P (XEXP (goal
, 1)))
5649 goal_const
= need_stable_sp
= 1;
5653 /* On some machines, certain regs must always be rejected
5654 because they don't behave the way ordinary registers do. */
5656 #ifdef OVERLAPPING_REGNO_P
5657 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5658 && OVERLAPPING_REGNO_P (regno
))
5662 /* Scan insns back from INSN, looking for one that copies
5663 a value into or out of GOAL.
5664 Stop and give up if we reach a label. */
5669 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5671 if (GET_CODE (p
) == INSN
5672 /* If we don't want spill regs ... */
5673 && (! (reload_reg_p
!= 0
5674 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5675 /* ... then ignore insns introduced by reload; they aren't useful
5676 and can cause results in reload_as_needed to be different
5677 from what they were when calculating the need for spills.
5678 If we notice an input-reload insn here, we will reject it below,
5679 but it might hide a usable equivalent. That makes bad code.
5680 It may even abort: perhaps no reg was spilled for this insn
5681 because it was assumed we would find that equivalent. */
5682 || INSN_UID (p
) < reload_first_uid
))
5685 pat
= single_set (p
);
5686 /* First check for something that sets some reg equal to GOAL. */
5689 && true_regnum (SET_SRC (pat
)) == regno
5690 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5693 && true_regnum (SET_DEST (pat
)) == regno
5694 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5696 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5697 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5699 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5700 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5702 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5703 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5704 /* If we are looking for a constant,
5705 and something equivalent to that constant was copied
5706 into a reg, we can use that reg. */
5707 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5709 && rtx_equal_p (XEXP (tem
, 0), goal
)
5710 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5711 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5713 && GET_CODE (SET_DEST (pat
)) == REG
5714 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5715 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5716 && GET_CODE (goal
) == CONST_INT
5717 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5719 && rtx_equal_p (goal
, goaltry
)
5720 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5722 && (valueno
= true_regnum (valtry
)) >= 0)
5723 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5725 && GET_CODE (SET_DEST (pat
)) == REG
5726 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5727 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5728 && GET_CODE (goal
) == CONST_INT
5729 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5731 && rtx_equal_p (goal
, goaltry
)
5733 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5734 && (valueno
= true_regnum (valtry
)) >= 0)))
5737 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5738 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5748 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5749 (or copying VALUE into GOAL, if GOAL is also a register).
5750 Now verify that VALUE is really valid. */
5752 /* VALUENO is the register number of VALUE; a hard register. */
5754 /* Don't try to re-use something that is killed in this insn. We want
5755 to be able to trust REG_UNUSED notes. */
5756 if (find_reg_note (where
, REG_UNUSED
, value
))
5759 /* If we propose to get the value from the stack pointer or if GOAL is
5760 a MEM based on the stack pointer, we need a stable SP. */
5761 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
5762 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5766 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5767 if (GET_MODE (value
) != mode
)
5770 /* Reject VALUE if it was loaded from GOAL
5771 and is also a register that appears in the address of GOAL. */
5773 if (goal_mem
&& value
== SET_DEST (single_set (where
))
5774 && refers_to_regno_for_reload_p (valueno
,
5776 + HARD_REGNO_NREGS (valueno
, mode
)),
5780 /* Reject registers that overlap GOAL. */
5782 if (!goal_mem
&& !goal_const
5783 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5784 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5787 /* Reject VALUE if it is one of the regs reserved for reloads.
5788 Reload1 knows how to reuse them anyway, and it would get
5789 confused if we allocated one without its knowledge.
5790 (Now that insns introduced by reload are ignored above,
5791 this case shouldn't happen, but I'm not positive.) */
5793 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5794 && reload_reg_p
[valueno
] >= 0)
5797 /* On some machines, certain regs must always be rejected
5798 because they don't behave the way ordinary registers do. */
5800 #ifdef OVERLAPPING_REGNO_P
5801 if (OVERLAPPING_REGNO_P (valueno
))
5805 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5806 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5808 /* Reject VALUE if it is a register being used for an input reload
5809 even if it is not one of those reserved. */
5811 if (reload_reg_p
!= 0)
5814 for (i
= 0; i
< n_reloads
; i
++)
5815 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5817 int regno1
= REGNO (reload_reg_rtx
[i
]);
5818 int nregs1
= HARD_REGNO_NREGS (regno1
,
5819 GET_MODE (reload_reg_rtx
[i
]));
5820 if (regno1
< valueno
+ valuenregs
5821 && regno1
+ nregs1
> valueno
)
5827 /* We must treat frame pointer as varying here,
5828 since it can vary--in a nonlocal goto as generated by expand_goto. */
5829 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5831 /* Now verify that the values of GOAL and VALUE remain unaltered
5832 until INSN is reached. */
5841 /* Don't trust the conversion past a function call
5842 if either of the two is in a call-clobbered register, or memory. */
5843 if (GET_CODE (p
) == CALL_INSN
5844 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5845 && call_used_regs
[regno
])
5847 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5848 && call_used_regs
[valueno
])
5854 #ifdef NON_SAVING_SETJMP
5855 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
5856 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
5860 #ifdef INSN_CLOBBERS_REGNO_P
5861 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5862 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5863 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5864 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5868 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5870 /* If this insn P stores in either GOAL or VALUE, return 0.
5871 If GOAL is a memory ref and this insn writes memory, return 0.
5872 If GOAL is a memory ref and its address is not constant,
5873 and this insn P changes a register used in GOAL, return 0. */
5876 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5878 register rtx dest
= SET_DEST (pat
);
5879 while (GET_CODE (dest
) == SUBREG
5880 || GET_CODE (dest
) == ZERO_EXTRACT
5881 || GET_CODE (dest
) == SIGN_EXTRACT
5882 || GET_CODE (dest
) == STRICT_LOW_PART
)
5883 dest
= XEXP (dest
, 0);
5884 if (GET_CODE (dest
) == REG
)
5886 register int xregno
= REGNO (dest
);
5888 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5889 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5892 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5894 if (xregno
< valueno
+ valuenregs
5895 && xregno
+ xnregs
> valueno
)
5897 if (goal_mem_addr_varies
5898 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5901 else if (goal_mem
&& GET_CODE (dest
) == MEM
5902 && ! push_operand (dest
, GET_MODE (dest
)))
5904 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
5905 && reg_equiv_memory_loc
[regno
] != 0)
5907 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5910 else if (GET_CODE (pat
) == PARALLEL
)
5913 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5915 register rtx v1
= XVECEXP (pat
, 0, i
);
5916 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5918 register rtx dest
= SET_DEST (v1
);
5919 while (GET_CODE (dest
) == SUBREG
5920 || GET_CODE (dest
) == ZERO_EXTRACT
5921 || GET_CODE (dest
) == SIGN_EXTRACT
5922 || GET_CODE (dest
) == STRICT_LOW_PART
)
5923 dest
= XEXP (dest
, 0);
5924 if (GET_CODE (dest
) == REG
)
5926 register int xregno
= REGNO (dest
);
5928 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5929 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5932 if (xregno
< regno
+ nregs
5933 && xregno
+ xnregs
> regno
)
5935 if (xregno
< valueno
+ valuenregs
5936 && xregno
+ xnregs
> valueno
)
5938 if (goal_mem_addr_varies
5939 && reg_overlap_mentioned_for_reload_p (dest
,
5943 else if (goal_mem
&& GET_CODE (dest
) == MEM
5944 && ! push_operand (dest
, GET_MODE (dest
)))
5946 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
5947 && reg_equiv_memory_loc
[regno
] != 0)
5949 else if (need_stable_sp
5950 && push_operand (dest
, GET_MODE (dest
)))
5956 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
5960 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
5961 link
= XEXP (link
, 1))
5963 pat
= XEXP (link
, 0);
5964 if (GET_CODE (pat
) == CLOBBER
)
5966 register rtx dest
= SET_DEST (pat
);
5967 while (GET_CODE (dest
) == SUBREG
5968 || GET_CODE (dest
) == ZERO_EXTRACT
5969 || GET_CODE (dest
) == SIGN_EXTRACT
5970 || GET_CODE (dest
) == STRICT_LOW_PART
)
5971 dest
= XEXP (dest
, 0);
5972 if (GET_CODE (dest
) == REG
)
5974 register int xregno
= REGNO (dest
);
5976 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5977 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5980 if (xregno
< regno
+ nregs
5981 && xregno
+ xnregs
> regno
)
5983 if (xregno
< valueno
+ valuenregs
5984 && xregno
+ xnregs
> valueno
)
5986 if (goal_mem_addr_varies
5987 && reg_overlap_mentioned_for_reload_p (dest
,
5991 else if (goal_mem
&& GET_CODE (dest
) == MEM
5992 && ! push_operand (dest
, GET_MODE (dest
)))
5994 else if (need_stable_sp
5995 && push_operand (dest
, GET_MODE (dest
)))
6002 /* If this insn auto-increments or auto-decrements
6003 either regno or valueno, return 0 now.
6004 If GOAL is a memory ref and its address is not constant,
6005 and this insn P increments a register used in GOAL, return 0. */
6009 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6010 if (REG_NOTE_KIND (link
) == REG_INC
6011 && GET_CODE (XEXP (link
, 0)) == REG
)
6013 register int incno
= REGNO (XEXP (link
, 0));
6014 if (incno
< regno
+ nregs
&& incno
>= regno
)
6016 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6018 if (goal_mem_addr_varies
6019 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6029 /* Find a place where INCED appears in an increment or decrement operator
6030 within X, and return the amount INCED is incremented or decremented by.
6031 The value is always positive. */
6034 find_inc_amount (x
, inced
)
6037 register enum rtx_code code
= GET_CODE (x
);
6043 register rtx addr
= XEXP (x
, 0);
6044 if ((GET_CODE (addr
) == PRE_DEC
6045 || GET_CODE (addr
) == POST_DEC
6046 || GET_CODE (addr
) == PRE_INC
6047 || GET_CODE (addr
) == POST_INC
)
6048 && XEXP (addr
, 0) == inced
)
6049 return GET_MODE_SIZE (GET_MODE (x
));
6052 fmt
= GET_RTX_FORMAT (code
);
6053 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6057 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6064 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6066 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6076 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6079 regno_clobbered_p (regno
, insn
)
6083 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6084 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6085 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6087 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6089 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6093 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6094 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6095 && REGNO (XEXP (elt
, 0)) == regno
)
6103 static char *reload_when_needed_name
[] =
6106 "RELOAD_FOR_OUTPUT",
6108 "RELOAD_FOR_INPUT_ADDRESS",
6109 "RELOAD_FOR_INPADDR_ADDRESS",
6110 "RELOAD_FOR_OUTPUT_ADDRESS",
6111 "RELOAD_FOR_OUTADDR_ADDRESS",
6112 "RELOAD_FOR_OPERAND_ADDRESS",
6113 "RELOAD_FOR_OPADDR_ADDR",
6115 "RELOAD_FOR_OTHER_ADDRESS"
6118 static char *reg_class_names
[] = REG_CLASS_NAMES
;
6120 /* This function is used to print the variables set by 'find_reloads' */
6128 for (r
= 0; r
< n_reloads
; r
++)
6130 fprintf (stderr
, "Reload %d: ", r
);
6132 if (reload_in
[r
] != 0)
6134 fprintf (stderr
, "reload_in (%s) = ",
6135 GET_MODE_NAME (reload_inmode
[r
]));
6136 print_inline_rtx (stderr
, reload_in
[r
], 24);
6137 fprintf (stderr
, "\n\t");
6140 if (reload_out
[r
] != 0)
6142 fprintf (stderr
, "reload_out (%s) = ",
6143 GET_MODE_NAME (reload_outmode
[r
]));
6144 print_inline_rtx (stderr
, reload_out
[r
], 24);
6145 fprintf (stderr
, "\n\t");
6148 fprintf (stderr
, "%s, ", reg_class_names
[(int) reload_reg_class
[r
]]);
6150 fprintf (stderr
, "%s (opnum = %d)",
6151 reload_when_needed_name
[(int) reload_when_needed
[r
]],
6154 if (reload_optional
[r
])
6155 fprintf (stderr
, ", optional");
6157 if (reload_inc
[r
] != 0)
6158 fprintf (stderr
, ", inc by %d", reload_inc
[r
]);
6160 if (reload_nocombine
[r
])
6161 fprintf (stderr
, ", can't combine");
6163 if (reload_secondary_p
[r
])
6164 fprintf (stderr
, ", secondary_reload_p");
6166 if (reload_in_reg
[r
] != 0)
6168 fprintf (stderr
, "\n\treload_in_reg: ");
6169 print_inline_rtx (stderr
, reload_in_reg
[r
], 24);
6172 if (reload_reg_rtx
[r
] != 0)
6174 fprintf (stderr
, "\n\treload_reg_rtx: ");
6175 print_inline_rtx (stderr
, reload_reg_rtx
[r
], 24);
6179 if (reload_secondary_in_reload
[r
] != -1)
6181 fprintf (stderr
, "%ssecondary_in_reload = %d",
6182 prefix
, reload_secondary_in_reload
[r
]);
6186 if (reload_secondary_out_reload
[r
] != -1)
6187 fprintf (stderr
, "%ssecondary_out_reload = %d\n",
6188 prefix
, reload_secondary_out_reload
[r
]);
6191 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
6193 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6194 insn_name
[reload_secondary_in_icode
[r
]]);
6198 if (reload_secondary_out_icode
[r
] != CODE_FOR_nothing
)
6199 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6200 insn_name
[reload_secondary_out_icode
[r
]]);
6202 fprintf (stderr
, "\n");