1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
97 #include "hard-reg-set.h"
101 #include "function.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(m, x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* All reloads of the current insn are recorded here. See reload.h for
120 struct reload rld
[MAX_RELOADS
];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
125 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
127 int reload_n_operands
;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads
;
139 /* Each replacement is recorded with a structure like this. */
142 rtx
*where
; /* Location to store in */
143 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what
; /* which reload this is for */
146 enum machine_mode mode
; /* mode it must have */
149 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements
;
154 /* Used to track what is modified by an operand. */
157 int reg_flag
; /* Nonzero if referencing a register. */
158 int safe
; /* Nonzero if this can't conflict with anything. */
159 rtx base
; /* Base address for MEM. */
160 HOST_WIDE_INT start
; /* Starting offset or register number. */
161 HOST_WIDE_INT end
; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
174 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
175 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
178 /* The instruction we are doing reloads for;
179 so we can test whether a register dies in it. */
180 static rtx this_insn
;
182 /* Nonzero if this instruction is a user-specified asm with operands. */
183 static int this_insn_is_asm
;
185 /* If hard_regs_live_known is nonzero,
186 we can tell which hard regs are currently live,
187 at least enough to succeed in choosing dummy reloads. */
188 static int hard_regs_live_known
;
190 /* Indexed by hard reg number,
191 element is nonnegative if hard reg has been spilled.
192 This vector is passed to `find_reloads' as an argument
193 and is not changed here. */
194 static short *static_reload_reg_p
;
196 /* Set to 1 in subst_reg_equivs if it changes anything. */
197 static int subst_reg_equivs_changed
;
199 /* On return from push_reload, holds the reload-number for the OUT
200 operand, which can be different for that from the input operand. */
201 static int output_reloadnum
;
203 /* Compare two RTX's. */
204 #define MATCHES(x, y) \
205 (x == y || (x != 0 && (GET_CODE (x) == REG \
206 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
207 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209 /* Indicates if two reloads purposes are for similar enough things that we
210 can merge their reloads. */
211 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
212 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
213 || ((when1) == (when2) && (op1) == (op2)) \
214 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
215 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
216 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
217 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
218 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
221 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
222 ((when1) != (when2) \
223 || ! ((op1) == (op2) \
224 || (when1) == RELOAD_FOR_INPUT \
225 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228 /* If we are going to reload an address, compute the reload type to
230 #define ADDR_TYPE(type) \
231 ((type) == RELOAD_FOR_INPUT_ADDRESS \
232 ? RELOAD_FOR_INPADDR_ADDRESS \
233 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
234 ? RELOAD_FOR_OUTADDR_ADDRESS \
237 #ifdef HAVE_SECONDARY_RELOADS
238 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
239 enum machine_mode
, enum reload_type
,
242 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
243 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
244 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
245 enum machine_mode
, enum machine_mode
,
246 int, int, int, enum reload_type
));
247 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
248 static void combine_reloads
PARAMS ((void));
249 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
250 enum reload_type
, int, int));
251 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
252 enum machine_mode
, enum machine_mode
,
253 enum reg_class
, int, int));
254 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
255 static struct decomposition decompose
PARAMS ((rtx
));
256 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
257 static int alternative_allows_memconst
PARAMS ((const char *, int));
258 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
260 static rtx make_memloc
PARAMS ((rtx
, int));
261 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
262 int, enum reload_type
, int, rtx
));
263 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
264 static rtx subst_indexed_address
PARAMS ((rtx
));
265 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
376 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
381 if (insn_class
== NO_REGS
383 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
384 /* The scratch register's constraint must start with "=&". */
385 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
386 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
389 if (reg_class_subset_p (reload_class
, insn_class
))
390 mode
= insn_data
[(int) icode
].operand
[2].mode
;
393 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
395 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 t_class
= (t_letter
== 'r' ? GENERAL_REGS
397 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
399 icode
= CODE_FOR_nothing
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 can not use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
418 && t_icode
== CODE_FOR_nothing
)
421 /* If we need a tertiary reload, see if we have one we can reuse or else
424 if (t_class
!= NO_REGS
)
426 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
427 if (rld
[t_reload
].secondary_p
428 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
429 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
430 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
431 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
432 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
433 == CODE_FOR_nothing
))
434 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
435 == CODE_FOR_nothing
)))
436 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
437 && MERGABLE_RELOADS (secondary_type
,
438 rld
[t_reload
].when_needed
,
439 opnum
, rld
[t_reload
].opnum
))
442 rld
[t_reload
].inmode
= t_mode
;
444 rld
[t_reload
].outmode
= t_mode
;
446 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
447 rld
[t_reload
].class = t_class
;
449 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
450 rld
[t_reload
].optional
&= optional
;
451 rld
[t_reload
].secondary_p
= 1;
452 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
453 opnum
, rld
[t_reload
].opnum
))
454 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
457 if (t_reload
== n_reloads
)
459 /* We need to make a new tertiary reload for this register class. */
460 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
461 rld
[t_reload
].class = t_class
;
462 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
463 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
464 rld
[t_reload
].reg_rtx
= 0;
465 rld
[t_reload
].optional
= optional
;
466 rld
[t_reload
].inc
= 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld
[t_reload
].nocombine
= 1;
469 rld
[t_reload
].in_reg
= 0;
470 rld
[t_reload
].out_reg
= 0;
471 rld
[t_reload
].opnum
= opnum
;
472 rld
[t_reload
].when_needed
= secondary_type
;
473 rld
[t_reload
].secondary_in_reload
= -1;
474 rld
[t_reload
].secondary_out_reload
= -1;
475 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
476 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
477 rld
[t_reload
].secondary_p
= 1;
483 /* See if we can reuse an existing secondary reload. */
484 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
485 if (rld
[s_reload
].secondary_p
486 && (reg_class_subset_p (class, rld
[s_reload
].class)
487 || reg_class_subset_p (rld
[s_reload
].class, class))
488 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
489 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
490 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
491 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
492 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
493 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
494 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
495 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
496 opnum
, rld
[s_reload
].opnum
))
499 rld
[s_reload
].inmode
= mode
;
501 rld
[s_reload
].outmode
= mode
;
503 if (reg_class_subset_p (class, rld
[s_reload
].class))
504 rld
[s_reload
].class = class;
506 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
507 rld
[s_reload
].optional
&= optional
;
508 rld
[s_reload
].secondary_p
= 1;
509 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
510 opnum
, rld
[s_reload
].opnum
))
511 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
514 if (s_reload
== n_reloads
)
516 #ifdef SECONDARY_MEMORY_NEEDED
517 /* If we need a memory location to copy between the two reload regs,
518 set it up now. Note that we do the input case before making
519 the reload and the output case after. This is due to the
520 way reloads are output. */
522 if (in_p
&& icode
== CODE_FOR_nothing
523 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
525 get_secondary_mem (x
, reload_mode
, opnum
, type
);
527 /* We may have just added new reloads. Make sure we add
528 the new reload at the end. */
529 s_reload
= n_reloads
;
533 /* We need to make a new secondary reload for this register class. */
534 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
535 rld
[s_reload
].class = class;
537 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
538 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
539 rld
[s_reload
].reg_rtx
= 0;
540 rld
[s_reload
].optional
= optional
;
541 rld
[s_reload
].inc
= 0;
542 /* Maybe we could combine these, but it seems too tricky. */
543 rld
[s_reload
].nocombine
= 1;
544 rld
[s_reload
].in_reg
= 0;
545 rld
[s_reload
].out_reg
= 0;
546 rld
[s_reload
].opnum
= opnum
;
547 rld
[s_reload
].when_needed
= secondary_type
;
548 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
549 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
550 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_out_icode
552 = ! in_p
? t_icode
: CODE_FOR_nothing
;
553 rld
[s_reload
].secondary_p
= 1;
557 #ifdef SECONDARY_MEMORY_NEEDED
558 if (! in_p
&& icode
== CODE_FOR_nothing
559 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
560 get_secondary_mem (x
, mode
, opnum
, type
);
567 #endif /* HAVE_SECONDARY_RELOADS */
569 #ifdef SECONDARY_MEMORY_NEEDED
571 /* Return a memory location that will be used to copy X in mode MODE.
572 If we haven't already made a location for this mode in this insn,
573 call find_reloads_address on the location being returned. */
576 get_secondary_mem (x
, mode
, opnum
, type
)
577 rtx x ATTRIBUTE_UNUSED
;
578 enum machine_mode mode
;
580 enum reload_type type
;
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
593 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
594 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
599 return secondary_memlocs_elim
[(int) mode
][opnum
];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs
[(int) mode
] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
610 secondary_memlocs
[(int) mode
]
611 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
619 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
621 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
622 loc
= copy_rtx (loc
);
624 /* The only time the call below will do anything is if the stack
625 offset is too large. In that case IND_LEVELS doesn't matter, so we
626 can just pass a zero. Adjust the type to be the address of the
627 corresponding object. If the address was valid, save the eliminated
628 address. If it wasn't valid, we need to make a reload each time, so
633 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
634 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
637 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
641 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
645 /* Clear any secondary memory locations we've made. */
648 clear_secondary_mem ()
650 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
652 #endif /* SECONDARY_MEMORY_NEEDED */
654 /* Find the largest class for which every register number plus N is valid in
655 M1 (if in range). Abort if no such class exists. */
657 static enum reg_class
658 find_valid_class (m1
, n
)
659 enum machine_mode m1 ATTRIBUTE_UNUSED
;
664 enum reg_class best_class
= NO_REGS
;
665 unsigned int best_size
= 0;
667 for (class = 1; class < N_REG_CLASSES
; class++)
670 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
671 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
672 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
673 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
676 if (! bad
&& reg_class_size
[class] > best_size
)
677 best_class
= class, best_size
= reg_class_size
[class];
686 /* Return the number of a previously made reload that can be combined with
687 a new one, or n_reloads if none of the existing reloads can be used.
688 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
689 push_reload, they determine the kind of the new reload that we try to
690 combine. P_IN points to the corresponding value of IN, which can be
691 modified by this function.
692 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
694 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
696 enum reg_class
class;
697 enum reload_type type
;
698 int opnum
, dont_share
;
702 /* We can't merge two reloads if the output of either one is
705 if (earlyclobber_operand_p (out
))
708 /* We can use an existing reload if the class is right
709 and at least one of IN and OUT is a match
710 and the other is at worst neutral.
711 (A zero compared against anything is neutral.)
713 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
714 for the same thing since that can cause us to need more reload registers
715 than we otherwise would. */
717 for (i
= 0; i
< n_reloads
; i
++)
718 if ((reg_class_subset_p (class, rld
[i
].class)
719 || reg_class_subset_p (rld
[i
].class, class))
720 /* If the existing reload has a register, it must fit our class. */
721 && (rld
[i
].reg_rtx
== 0
722 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
723 true_regnum (rld
[i
].reg_rtx
)))
724 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
725 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
726 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
727 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
728 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
729 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
730 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
733 /* Reloading a plain reg for input can match a reload to postincrement
734 that reg, since the postincrement's value is the right value.
735 Likewise, it can match a preincrement reload, since we regard
736 the preincrementation as happening before any ref in this insn
738 for (i
= 0; i
< n_reloads
; i
++)
739 if ((reg_class_subset_p (class, rld
[i
].class)
740 || reg_class_subset_p (rld
[i
].class, class))
741 /* If the existing reload has a register, it must fit our
743 && (rld
[i
].reg_rtx
== 0
744 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
745 true_regnum (rld
[i
].reg_rtx
)))
746 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
747 && ((GET_CODE (in
) == REG
748 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
750 || (GET_CODE (rld
[i
].in
) == REG
751 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
752 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
753 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
754 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
755 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
756 opnum
, rld
[i
].opnum
))
758 /* Make sure reload_in ultimately has the increment,
759 not the plain register. */
760 if (GET_CODE (in
) == REG
)
767 /* Return nonzero if X is a SUBREG which will require reloading of its
768 SUBREG_REG expression. */
771 reload_inner_reg_of_subreg (x
, mode
)
773 enum machine_mode mode
;
777 /* Only SUBREGs are problematical. */
778 if (GET_CODE (x
) != SUBREG
)
781 inner
= SUBREG_REG (x
);
783 /* If INNER is a constant, then INNER must be reloaded. */
784 if (CONSTANT_P (inner
))
787 /* If INNER is not a hard register, then INNER will not need to
789 if (GET_CODE (inner
) != REG
790 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
793 /* If INNER is not ok for MODE, then INNER will need reloading. */
794 if (! HARD_REGNO_MODE_OK (REGNO (inner
) + SUBREG_WORD (x
), mode
))
797 /* If the outer part is a word or smaller, INNER larger than a
798 word and the number of regs for INNER is not the same as the
799 number of words in INNER, then INNER will need reloading. */
800 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
801 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
802 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
803 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
806 /* Record one reload that needs to be performed.
807 IN is an rtx saying where the data are to be found before this instruction.
808 OUT says where they must be stored after the instruction.
809 (IN is zero for data not read, and OUT is zero for data not written.)
810 INLOC and OUTLOC point to the places in the instructions where
811 IN and OUT were found.
812 If IN and OUT are both non-zero, it means the same register must be used
813 to reload both IN and OUT.
815 CLASS is a register class required for the reloaded data.
816 INMODE is the machine mode that the instruction requires
817 for the reg that replaces IN and OUTMODE is likewise for OUT.
819 If IN is zero, then OUT's location and mode should be passed as
822 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
824 OPTIONAL nonzero means this reload does not need to be performed:
825 it can be discarded if that is more convenient.
827 OPNUM and TYPE say what the purpose of this reload is.
829 The return value is the reload-number for this reload.
831 If both IN and OUT are nonzero, in some rare cases we might
832 want to make two separate reloads. (Actually we never do this now.)
833 Therefore, the reload-number for OUT is stored in
834 output_reloadnum when we return; the return value applies to IN.
835 Usually (presently always), when IN and OUT are nonzero,
836 the two reload-numbers are equal, but the caller should be careful to
840 push_reload (in
, out
, inloc
, outloc
, class,
841 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
844 enum reg_class
class;
845 enum machine_mode inmode
, outmode
;
849 enum reload_type type
;
853 int dont_remove_subreg
= 0;
854 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
855 int secondary_in_reload
= -1, secondary_out_reload
= -1;
856 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
857 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
859 /* INMODE and/or OUTMODE could be VOIDmode if no mode
860 has been specified for the operand. In that case,
861 use the operand's mode as the mode to reload. */
862 if (inmode
== VOIDmode
&& in
!= 0)
863 inmode
= GET_MODE (in
);
864 if (outmode
== VOIDmode
&& out
!= 0)
865 outmode
= GET_MODE (out
);
867 /* If IN is a pseudo register everywhere-equivalent to a constant, and
868 it is not in a hard register, reload straight from the constant,
869 since we want to get rid of such pseudo registers.
870 Often this is done earlier, but not always in find_reloads_address. */
871 if (in
!= 0 && GET_CODE (in
) == REG
)
873 register int regno
= REGNO (in
);
875 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
876 && reg_equiv_constant
[regno
] != 0)
877 in
= reg_equiv_constant
[regno
];
880 /* Likewise for OUT. Of course, OUT will never be equivalent to
881 an actual constant, but it might be equivalent to a memory location
882 (in the case of a parameter). */
883 if (out
!= 0 && GET_CODE (out
) == REG
)
885 register int regno
= REGNO (out
);
887 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
888 && reg_equiv_constant
[regno
] != 0)
889 out
= reg_equiv_constant
[regno
];
892 /* If we have a read-write operand with an address side-effect,
893 change either IN or OUT so the side-effect happens only once. */
894 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
896 if (GET_CODE (XEXP (in
, 0)) == POST_INC
897 || GET_CODE (XEXP (in
, 0)) == POST_DEC
898 || GET_CODE (XEXP (in
, 0)) == POST_MODIFY
)
900 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
902 MEM_COPY_ATTRIBUTES (new, in
);
905 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
906 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
907 || GET_CODE (XEXP (in
, 0)) == PRE_MODIFY
)
909 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
911 MEM_COPY_ATTRIBUTES (new, out
);
916 /* If we are reloading a (SUBREG constant ...), really reload just the
917 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
918 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
919 a pseudo and hence will become a MEM) with M1 wider than M2 and the
920 register is a pseudo, also reload the inside expression.
921 For machines that extend byte loads, do this for any SUBREG of a pseudo
922 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
923 M2 is an integral mode that gets extended when loaded.
924 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
925 either M1 is not valid for R or M2 is wider than a word but we only
926 need one word to store an M2-sized quantity in R.
927 (However, if OUT is nonzero, we need to reload the reg *and*
928 the subreg, so do nothing here, and let following statement handle it.)
930 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
931 we can't handle it here because CONST_INT does not indicate a mode.
933 Similarly, we must reload the inside expression if we have a
934 STRICT_LOW_PART (presumably, in == out in the cas).
936 Also reload the inner expression if it does not require a secondary
937 reload but the SUBREG does.
939 Finally, reload the inner expression if it is a register that is in
940 the class whose registers cannot be referenced in a different size
941 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
942 cannot reload just the inside since we might end up with the wrong
943 register class. But if it is inside a STRICT_LOW_PART, we have
944 no choice, so we hope we do get the right register class there. */
946 if (in
!= 0 && GET_CODE (in
) == SUBREG
947 && (SUBREG_WORD (in
) == 0 || strict_low
)
948 #ifdef CLASS_CANNOT_CHANGE_MODE
949 && (class != CLASS_CANNOT_CHANGE_MODE
950 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
952 && (CONSTANT_P (SUBREG_REG (in
))
953 || GET_CODE (SUBREG_REG (in
)) == PLUS
955 || (((GET_CODE (SUBREG_REG (in
)) == REG
956 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
957 || GET_CODE (SUBREG_REG (in
)) == MEM
)
958 && ((GET_MODE_SIZE (inmode
)
959 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
960 #ifdef LOAD_EXTEND_OP
961 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
962 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
964 && (GET_MODE_SIZE (inmode
)
965 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
966 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
967 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
969 #ifdef WORD_REGISTER_OPERATIONS
970 || ((GET_MODE_SIZE (inmode
)
971 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
972 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
973 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
977 || (GET_CODE (SUBREG_REG (in
)) == REG
978 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
979 /* The case where out is nonzero
980 is handled differently in the following statement. */
981 && (out
== 0 || SUBREG_WORD (in
) == 0)
982 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
983 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
985 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
987 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
988 GET_MODE (SUBREG_REG (in
)))))
989 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
992 #ifdef SECONDARY_INPUT_RELOAD_CLASS
993 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
994 && (SECONDARY_INPUT_RELOAD_CLASS (class,
995 GET_MODE (SUBREG_REG (in
)),
999 #ifdef CLASS_CANNOT_CHANGE_MODE
1000 || (GET_CODE (SUBREG_REG (in
)) == REG
1001 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1002 && (TEST_HARD_REG_BIT
1003 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1004 REGNO (SUBREG_REG (in
))))
1005 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1010 in_subreg_loc
= inloc
;
1011 inloc
= &SUBREG_REG (in
);
1013 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1014 if (GET_CODE (in
) == MEM
)
1015 /* This is supposed to happen only for paradoxical subregs made by
1016 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1017 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1020 inmode
= GET_MODE (in
);
1023 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1024 either M1 is not valid for R or M2 is wider than a word but we only
1025 need one word to store an M2-sized quantity in R.
1027 However, we must reload the inner reg *as well as* the subreg in
1030 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1031 code above. This can happen if SUBREG_WORD != 0. */
1033 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1035 /* This relies on the fact that emit_reload_insns outputs the
1036 instructions for input reloads of type RELOAD_OTHER in the same
1037 order as the reloads. Thus if the outer reload is also of type
1038 RELOAD_OTHER, we are guaranteed that this inner reload will be
1039 output before the outer reload. */
1040 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1041 find_valid_class (inmode
, SUBREG_WORD (in
)),
1042 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1043 dont_remove_subreg
= 1;
1046 /* Similarly for paradoxical and problematical SUBREGs on the output.
1047 Note that there is no reason we need worry about the previous value
1048 of SUBREG_REG (out); even if wider than out,
1049 storing in a subreg is entitled to clobber it all
1050 (except in the case of STRICT_LOW_PART,
1051 and in that case the constraint should label it input-output.) */
1052 if (out
!= 0 && GET_CODE (out
) == SUBREG
1053 && (SUBREG_WORD (out
) == 0 || strict_low
)
1054 #ifdef CLASS_CANNOT_CHANGE_MODE
1055 && (class != CLASS_CANNOT_CHANGE_MODE
1056 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1059 && (CONSTANT_P (SUBREG_REG (out
))
1061 || (((GET_CODE (SUBREG_REG (out
)) == REG
1062 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1063 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1064 && ((GET_MODE_SIZE (outmode
)
1065 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1066 #ifdef WORD_REGISTER_OPERATIONS
1067 || ((GET_MODE_SIZE (outmode
)
1068 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1069 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1070 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1074 || (GET_CODE (SUBREG_REG (out
)) == REG
1075 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1076 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1077 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1079 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1081 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1082 GET_MODE (SUBREG_REG (out
)))))
1083 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1084 + SUBREG_WORD (out
)),
1086 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1087 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1088 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1089 GET_MODE (SUBREG_REG (out
)),
1093 #ifdef CLASS_CANNOT_CHANGE_MODE
1094 || (GET_CODE (SUBREG_REG (out
)) == REG
1095 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1096 && (TEST_HARD_REG_BIT
1097 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1098 REGNO (SUBREG_REG (out
))))
1099 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1104 out_subreg_loc
= outloc
;
1105 outloc
= &SUBREG_REG (out
);
1107 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1108 if (GET_CODE (out
) == MEM
1109 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1112 outmode
= GET_MODE (out
);
1115 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1116 either M1 is not valid for R or M2 is wider than a word but we only
1117 need one word to store an M2-sized quantity in R.
1119 However, we must reload the inner reg *as well as* the subreg in
1120 that case. In this case, the inner reg is an in-out reload. */
1122 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1124 /* This relies on the fact that emit_reload_insns outputs the
1125 instructions for output reloads of type RELOAD_OTHER in reverse
1126 order of the reloads. Thus if the outer reload is also of type
1127 RELOAD_OTHER, we are guaranteed that this inner reload will be
1128 output after the outer reload. */
1129 dont_remove_subreg
= 1;
1130 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1132 find_valid_class (outmode
, SUBREG_WORD (out
)),
1133 VOIDmode
, VOIDmode
, 0, 0,
1134 opnum
, RELOAD_OTHER
);
1137 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1138 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1139 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1140 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1143 /* If IN is a SUBREG of a hard register, make a new REG. This
1144 simplifies some of the cases below. */
1146 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1147 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1148 && ! dont_remove_subreg
)
1149 in
= gen_rtx_REG (GET_MODE (in
),
1150 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1152 /* Similarly for OUT. */
1153 if (out
!= 0 && GET_CODE (out
) == SUBREG
1154 && GET_CODE (SUBREG_REG (out
)) == REG
1155 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1156 && ! dont_remove_subreg
)
1157 out
= gen_rtx_REG (GET_MODE (out
),
1158 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1160 /* Narrow down the class of register wanted if that is
1161 desirable on this machine for efficiency. */
1163 class = PREFERRED_RELOAD_CLASS (in
, class);
1165 /* Output reloads may need analogous treatment, different in detail. */
1166 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1168 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1171 /* Make sure we use a class that can handle the actual pseudo
1172 inside any subreg. For example, on the 386, QImode regs
1173 can appear within SImode subregs. Although GENERAL_REGS
1174 can handle SImode, QImode needs a smaller class. */
1175 #ifdef LIMIT_RELOAD_CLASS
1177 class = LIMIT_RELOAD_CLASS (inmode
, class);
1178 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1179 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1182 class = LIMIT_RELOAD_CLASS (outmode
, class);
1183 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1184 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1187 /* Verify that this class is at least possible for the mode that
1189 if (this_insn_is_asm
)
1191 enum machine_mode mode
;
1192 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1196 if (mode
== VOIDmode
)
1198 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1203 outmode
= word_mode
;
1205 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1206 if (HARD_REGNO_MODE_OK (i
, mode
)
1207 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1209 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1212 for (j
= 1; j
< nregs
; j
++)
1213 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1218 if (i
== FIRST_PSEUDO_REGISTER
)
1220 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1225 /* Optional output reloads are always OK even if we have no register class,
1226 since the function of these reloads is only to have spill_reg_store etc.
1227 set, so that the storing insn can be deleted later. */
1228 if (class == NO_REGS
1229 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1232 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1236 /* See if we need a secondary reload register to move between CLASS
1237 and IN or CLASS and OUT. Get the icode and push any required reloads
1238 needed for each of them if so. */
1240 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1243 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1244 &secondary_in_icode
);
1247 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1248 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1249 secondary_out_reload
1250 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1251 type
, &secondary_out_icode
);
1254 /* We found no existing reload suitable for re-use.
1255 So add an additional reload. */
1257 #ifdef SECONDARY_MEMORY_NEEDED
1258 /* If a memory location is needed for the copy, make one. */
1259 if (in
!= 0 && GET_CODE (in
) == REG
1260 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1261 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1263 get_secondary_mem (in
, inmode
, opnum
, type
);
1269 rld
[i
].class = class;
1270 rld
[i
].inmode
= inmode
;
1271 rld
[i
].outmode
= outmode
;
1273 rld
[i
].optional
= optional
;
1275 rld
[i
].nocombine
= 0;
1276 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1277 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1278 rld
[i
].opnum
= opnum
;
1279 rld
[i
].when_needed
= type
;
1280 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1281 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1282 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1283 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1284 rld
[i
].secondary_p
= 0;
1288 #ifdef SECONDARY_MEMORY_NEEDED
1289 if (out
!= 0 && GET_CODE (out
) == REG
1290 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1291 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1293 get_secondary_mem (out
, outmode
, opnum
, type
);
1298 /* We are reusing an existing reload,
1299 but we may have additional information for it.
1300 For example, we may now have both IN and OUT
1301 while the old one may have just one of them. */
1303 /* The modes can be different. If they are, we want to reload in
1304 the larger mode, so that the value is valid for both modes. */
1305 if (inmode
!= VOIDmode
1306 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1307 rld
[i
].inmode
= inmode
;
1308 if (outmode
!= VOIDmode
1309 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1310 rld
[i
].outmode
= outmode
;
1313 rtx in_reg
= inloc
? *inloc
: 0;
1314 /* If we merge reloads for two distinct rtl expressions that
1315 are identical in content, there might be duplicate address
1316 reloads. Remove the extra set now, so that if we later find
1317 that we can inherit this reload, we can get rid of the
1318 address reloads altogether.
1320 Do not do this if both reloads are optional since the result
1321 would be an optional reload which could potentially leave
1322 unresolved address replacements.
1324 It is not sufficient to call transfer_replacements since
1325 choose_reload_regs will remove the replacements for address
1326 reloads of inherited reloads which results in the same
1328 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1329 && ! (rld
[i
].optional
&& optional
))
1331 /* We must keep the address reload with the lower operand
1333 if (opnum
> rld
[i
].opnum
)
1335 remove_address_replacements (in
);
1337 in_reg
= rld
[i
].in_reg
;
1340 remove_address_replacements (rld
[i
].in
);
1343 rld
[i
].in_reg
= in_reg
;
1348 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1350 if (reg_class_subset_p (class, rld
[i
].class))
1351 rld
[i
].class = class;
1352 rld
[i
].optional
&= optional
;
1353 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1354 opnum
, rld
[i
].opnum
))
1355 rld
[i
].when_needed
= RELOAD_OTHER
;
1356 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1359 /* If the ostensible rtx being reload differs from the rtx found
1360 in the location to substitute, this reload is not safe to combine
1361 because we cannot reliably tell whether it appears in the insn. */
1363 if (in
!= 0 && in
!= *inloc
)
1364 rld
[i
].nocombine
= 1;
1367 /* This was replaced by changes in find_reloads_address_1 and the new
1368 function inc_for_reload, which go with a new meaning of reload_inc. */
1370 /* If this is an IN/OUT reload in an insn that sets the CC,
1371 it must be for an autoincrement. It doesn't work to store
1372 the incremented value after the insn because that would clobber the CC.
1373 So we must do the increment of the value reloaded from,
1374 increment it, store it back, then decrement again. */
1375 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1379 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1380 /* If we did not find a nonzero amount-to-increment-by,
1381 that contradicts the belief that IN is being incremented
1382 in an address in this insn. */
1383 if (rld
[i
].inc
== 0)
1388 /* If we will replace IN and OUT with the reload-reg,
1389 record where they are located so that substitution need
1390 not do a tree walk. */
1392 if (replace_reloads
)
1396 register struct replacement
*r
= &replacements
[n_replacements
++];
1398 r
->subreg_loc
= in_subreg_loc
;
1402 if (outloc
!= 0 && outloc
!= inloc
)
1404 register struct replacement
*r
= &replacements
[n_replacements
++];
1407 r
->subreg_loc
= out_subreg_loc
;
1412 /* If this reload is just being introduced and it has both
1413 an incoming quantity and an outgoing quantity that are
1414 supposed to be made to match, see if either one of the two
1415 can serve as the place to reload into.
1417 If one of them is acceptable, set rld[i].reg_rtx
1420 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1422 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1425 earlyclobber_operand_p (out
));
1427 /* If the outgoing register already contains the same value
1428 as the incoming one, we can dispense with loading it.
1429 The easiest way to tell the caller that is to give a phony
1430 value for the incoming operand (same as outgoing one). */
1431 if (rld
[i
].reg_rtx
== out
1432 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1433 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1434 static_reload_reg_p
, i
, inmode
))
1438 /* If this is an input reload and the operand contains a register that
1439 dies in this insn and is used nowhere else, see if it is the right class
1440 to be used for this reload. Use it if so. (This occurs most commonly
1441 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1442 this if it is also an output reload that mentions the register unless
1443 the output is a SUBREG that clobbers an entire register.
1445 Note that the operand might be one of the spill regs, if it is a
1446 pseudo reg and we are in a block where spilling has not taken place.
1447 But if there is no spilling in this block, that is OK.
1448 An explicitly used hard reg cannot be a spill reg. */
1450 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1454 enum machine_mode rel_mode
= inmode
;
1456 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1459 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1460 if (REG_NOTE_KIND (note
) == REG_DEAD
1461 && GET_CODE (XEXP (note
, 0)) == REG
1462 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1463 && reg_mentioned_p (XEXP (note
, 0), in
)
1464 && ! refers_to_regno_for_reload_p (regno
,
1466 + HARD_REGNO_NREGS (regno
,
1468 PATTERN (this_insn
), inloc
)
1469 /* If this is also an output reload, IN cannot be used as
1470 the reload register if it is set in this insn unless IN
1472 && (out
== 0 || in
== out
1473 || ! hard_reg_set_here_p (regno
,
1475 + HARD_REGNO_NREGS (regno
,
1477 PATTERN (this_insn
)))
1478 /* ??? Why is this code so different from the previous?
1479 Is there any simple coherent way to describe the two together?
1480 What's going on here. */
1482 || (GET_CODE (in
) == SUBREG
1483 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1485 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1486 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1487 /* Make sure the operand fits in the reg that dies. */
1488 && (GET_MODE_SIZE (rel_mode
)
1489 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1490 && HARD_REGNO_MODE_OK (regno
, inmode
)
1491 && HARD_REGNO_MODE_OK (regno
, outmode
))
1494 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1495 HARD_REGNO_NREGS (regno
, outmode
));
1497 for (offs
= 0; offs
< nregs
; offs
++)
1498 if (fixed_regs
[regno
+ offs
]
1499 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1505 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1512 output_reloadnum
= i
;
1517 /* Record an additional place we must replace a value
1518 for which we have already recorded a reload.
1519 RELOADNUM is the value returned by push_reload
1520 when the reload was recorded.
1521 This is used in insn patterns that use match_dup. */
1524 push_replacement (loc
, reloadnum
, mode
)
1527 enum machine_mode mode
;
1529 if (replace_reloads
)
1531 register struct replacement
*r
= &replacements
[n_replacements
++];
1532 r
->what
= reloadnum
;
1539 /* Transfer all replacements that used to be in reload FROM to be in
1543 transfer_replacements (to
, from
)
1548 for (i
= 0; i
< n_replacements
; i
++)
1549 if (replacements
[i
].what
== from
)
1550 replacements
[i
].what
= to
;
1553 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1554 or a subpart of it. If we have any replacements registered for IN_RTX,
1555 cancel the reloads that were supposed to load them.
1556 Return non-zero if we canceled any reloads. */
1558 remove_address_replacements (in_rtx
)
1562 char reload_flags
[MAX_RELOADS
];
1563 int something_changed
= 0;
1565 memset (reload_flags
, 0, sizeof reload_flags
);
1566 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1568 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1569 reload_flags
[replacements
[i
].what
] |= 1;
1572 replacements
[j
++] = replacements
[i
];
1573 reload_flags
[replacements
[i
].what
] |= 2;
1576 /* Note that the following store must be done before the recursive calls. */
1579 for (i
= n_reloads
- 1; i
>= 0; i
--)
1581 if (reload_flags
[i
] == 1)
1583 deallocate_reload_reg (i
);
1584 remove_address_replacements (rld
[i
].in
);
1586 something_changed
= 1;
1589 return something_changed
;
1592 /* If there is only one output reload, and it is not for an earlyclobber
1593 operand, try to combine it with a (logically unrelated) input reload
1594 to reduce the number of reload registers needed.
1596 This is safe if the input reload does not appear in
1597 the value being output-reloaded, because this implies
1598 it is not needed any more once the original insn completes.
1600 If that doesn't work, see we can use any of the registers that
1601 die in this insn as a reload register. We can if it is of the right
1602 class and does not appear in the value being output-reloaded. */
1608 int output_reload
= -1;
1609 int secondary_out
= -1;
1612 /* Find the output reload; return unless there is exactly one
1613 and that one is mandatory. */
1615 for (i
= 0; i
< n_reloads
; i
++)
1616 if (rld
[i
].out
!= 0)
1618 if (output_reload
>= 0)
1623 if (output_reload
< 0 || rld
[output_reload
].optional
)
1626 /* An input-output reload isn't combinable. */
1628 if (rld
[output_reload
].in
!= 0)
1631 /* If this reload is for an earlyclobber operand, we can't do anything. */
1632 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1635 /* Check each input reload; can we combine it? */
1637 for (i
= 0; i
< n_reloads
; i
++)
1638 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1639 /* Life span of this reload must not extend past main insn. */
1640 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1641 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1642 && rld
[i
].when_needed
!= RELOAD_OTHER
1643 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1644 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1645 rld
[output_reload
].outmode
))
1647 && rld
[i
].reg_rtx
== 0
1648 #ifdef SECONDARY_MEMORY_NEEDED
1649 /* Don't combine two reloads with different secondary
1650 memory locations. */
1651 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1652 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1653 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1654 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1656 && (SMALL_REGISTER_CLASSES
1657 ? (rld
[i
].class == rld
[output_reload
].class)
1658 : (reg_class_subset_p (rld
[i
].class,
1659 rld
[output_reload
].class)
1660 || reg_class_subset_p (rld
[output_reload
].class,
1662 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1663 /* Args reversed because the first arg seems to be
1664 the one that we imagine being modified
1665 while the second is the one that might be affected. */
1666 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1668 /* However, if the input is a register that appears inside
1669 the output, then we also can't share.
1670 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1671 If the same reload reg is used for both reg 69 and the
1672 result to be stored in memory, then that result
1673 will clobber the address of the memory ref. */
1674 && ! (GET_CODE (rld
[i
].in
) == REG
1675 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1676 rld
[output_reload
].out
))))
1677 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1678 && (reg_class_size
[(int) rld
[i
].class]
1679 || SMALL_REGISTER_CLASSES
)
1680 /* We will allow making things slightly worse by combining an
1681 input and an output, but no worse than that. */
1682 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1683 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1687 /* We have found a reload to combine with! */
1688 rld
[i
].out
= rld
[output_reload
].out
;
1689 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1690 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1691 /* Mark the old output reload as inoperative. */
1692 rld
[output_reload
].out
= 0;
1693 /* The combined reload is needed for the entire insn. */
1694 rld
[i
].when_needed
= RELOAD_OTHER
;
1695 /* If the output reload had a secondary reload, copy it. */
1696 if (rld
[output_reload
].secondary_out_reload
!= -1)
1698 rld
[i
].secondary_out_reload
1699 = rld
[output_reload
].secondary_out_reload
;
1700 rld
[i
].secondary_out_icode
1701 = rld
[output_reload
].secondary_out_icode
;
1704 #ifdef SECONDARY_MEMORY_NEEDED
1705 /* Copy any secondary MEM. */
1706 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1707 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1708 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1710 /* If required, minimize the register class. */
1711 if (reg_class_subset_p (rld
[output_reload
].class,
1713 rld
[i
].class = rld
[output_reload
].class;
1715 /* Transfer all replacements from the old reload to the combined. */
1716 for (j
= 0; j
< n_replacements
; j
++)
1717 if (replacements
[j
].what
== output_reload
)
1718 replacements
[j
].what
= i
;
1723 /* If this insn has only one operand that is modified or written (assumed
1724 to be the first), it must be the one corresponding to this reload. It
1725 is safe to use anything that dies in this insn for that output provided
1726 that it does not occur in the output (we already know it isn't an
1727 earlyclobber. If this is an asm insn, give up. */
1729 if (INSN_CODE (this_insn
) == -1)
1732 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1733 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1734 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1737 /* See if some hard register that dies in this insn and is not used in
1738 the output is the right class. Only works if the register we pick
1739 up can fully hold our output reload. */
1740 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1741 if (REG_NOTE_KIND (note
) == REG_DEAD
1742 && GET_CODE (XEXP (note
, 0)) == REG
1743 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1744 rld
[output_reload
].out
)
1745 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1746 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1747 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1748 REGNO (XEXP (note
, 0)))
1749 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1750 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1751 /* Ensure that a secondary or tertiary reload for this output
1752 won't want this register. */
1753 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1754 || (! (TEST_HARD_REG_BIT
1755 (reg_class_contents
[(int) rld
[secondary_out
].class],
1756 REGNO (XEXP (note
, 0))))
1757 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1758 || ! (TEST_HARD_REG_BIT
1759 (reg_class_contents
[(int) rld
[secondary_out
].class],
1760 REGNO (XEXP (note
, 0)))))))
1761 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1763 rld
[output_reload
].reg_rtx
1764 = gen_rtx_REG (rld
[output_reload
].outmode
,
1765 REGNO (XEXP (note
, 0)));
1770 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1771 See if one of IN and OUT is a register that may be used;
1772 this is desirable since a spill-register won't be needed.
1773 If so, return the register rtx that proves acceptable.
1775 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1776 CLASS is the register class required for the reload.
1778 If FOR_REAL is >= 0, it is the number of the reload,
1779 and in some cases when it can be discovered that OUT doesn't need
1780 to be computed, clear out rld[FOR_REAL].out.
1782 If FOR_REAL is -1, this should not be done, because this call
1783 is just to see if a register can be found, not to find and install it.
1785 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1786 puts an additional constraint on being able to use IN for OUT since
1787 IN must not appear elsewhere in the insn (it is assumed that IN itself
1788 is safe from the earlyclobber). */
1791 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1792 inmode
, outmode
, class, for_real
, earlyclobber
)
1793 rtx real_in
, real_out
;
1794 rtx
*inloc
, *outloc
;
1795 enum machine_mode inmode
, outmode
;
1796 enum reg_class
class;
1806 /* If operands exceed a word, we can't use either of them
1807 unless they have the same size. */
1808 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1809 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1810 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1813 /* Find the inside of any subregs. */
1814 while (GET_CODE (out
) == SUBREG
)
1816 out_offset
= SUBREG_WORD (out
);
1817 out
= SUBREG_REG (out
);
1819 while (GET_CODE (in
) == SUBREG
)
1821 in_offset
= SUBREG_WORD (in
);
1822 in
= SUBREG_REG (in
);
1825 /* Narrow down the reg class, the same way push_reload will;
1826 otherwise we might find a dummy now, but push_reload won't. */
1827 class = PREFERRED_RELOAD_CLASS (in
, class);
1829 /* See if OUT will do. */
1830 if (GET_CODE (out
) == REG
1831 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1833 unsigned int regno
= REGNO (out
) + out_offset
;
1834 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1837 /* When we consider whether the insn uses OUT,
1838 ignore references within IN. They don't prevent us
1839 from copying IN into OUT, because those refs would
1840 move into the insn that reloads IN.
1842 However, we only ignore IN in its role as this reload.
1843 If the insn uses IN elsewhere and it contains OUT,
1844 that counts. We can't be sure it's the "same" operand
1845 so it might not go through this reload. */
1847 *inloc
= const0_rtx
;
1849 if (regno
< FIRST_PSEUDO_REGISTER
1850 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1851 PATTERN (this_insn
), outloc
))
1855 for (i
= 0; i
< nwords
; i
++)
1856 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1862 if (GET_CODE (real_out
) == REG
)
1865 value
= gen_rtx_REG (outmode
, regno
);
1872 /* Consider using IN if OUT was not acceptable
1873 or if OUT dies in this insn (like the quotient in a divmod insn).
1874 We can't use IN unless it is dies in this insn,
1875 which means we must know accurately which hard regs are live.
1876 Also, the result can't go in IN if IN is used within OUT,
1877 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1878 if (hard_regs_live_known
1879 && GET_CODE (in
) == REG
1880 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1882 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1883 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1884 && !fixed_regs
[REGNO (in
)]
1885 && HARD_REGNO_MODE_OK (REGNO (in
),
1886 /* The only case where out and real_out might
1887 have different modes is where real_out
1888 is a subreg, and in that case, out
1890 (GET_MODE (out
) != VOIDmode
1891 ? GET_MODE (out
) : outmode
)))
1893 unsigned int regno
= REGNO (in
) + in_offset
;
1894 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1896 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1897 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1898 PATTERN (this_insn
))
1900 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1901 PATTERN (this_insn
), inloc
)))
1905 for (i
= 0; i
< nwords
; i
++)
1906 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1912 /* If we were going to use OUT as the reload reg
1913 and changed our mind, it means OUT is a dummy that
1914 dies here. So don't bother copying value to it. */
1915 if (for_real
>= 0 && value
== real_out
)
1916 rld
[for_real
].out
= 0;
1917 if (GET_CODE (real_in
) == REG
)
1920 value
= gen_rtx_REG (inmode
, regno
);
1928 /* This page contains subroutines used mainly for determining
1929 whether the IN or an OUT of a reload can serve as the
1932 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1935 earlyclobber_operand_p (x
)
1940 for (i
= 0; i
< n_earlyclobbers
; i
++)
1941 if (reload_earlyclobbers
[i
] == x
)
1947 /* Return 1 if expression X alters a hard reg in the range
1948 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1949 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1950 X should be the body of an instruction. */
1953 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1954 unsigned int beg_regno
, end_regno
;
1957 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1959 register rtx op0
= SET_DEST (x
);
1961 while (GET_CODE (op0
) == SUBREG
)
1962 op0
= SUBREG_REG (op0
);
1963 if (GET_CODE (op0
) == REG
)
1965 unsigned int r
= REGNO (op0
);
1967 /* See if this reg overlaps range under consideration. */
1969 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1973 else if (GET_CODE (x
) == PARALLEL
)
1975 register int i
= XVECLEN (x
, 0) - 1;
1978 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1985 /* Return 1 if ADDR is a valid memory address for mode MODE,
1986 and check that each pseudo reg has the proper kind of
1990 strict_memory_address_p (mode
, addr
)
1991 enum machine_mode mode ATTRIBUTE_UNUSED
;
1994 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2001 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2002 if they are the same hard reg, and has special hacks for
2003 autoincrement and autodecrement.
2004 This is specifically intended for find_reloads to use
2005 in determining whether two operands match.
2006 X is the operand whose number is the lower of the two.
2008 The value is 2 if Y contains a pre-increment that matches
2009 a non-incrementing address in X. */
2011 /* ??? To be completely correct, we should arrange to pass
2012 for X the output operand and for Y the input operand.
2013 For now, we assume that the output operand has the lower number
2014 because that is natural in (SET output (... input ...)). */
2017 operands_match_p (x
, y
)
2021 register RTX_CODE code
= GET_CODE (x
);
2022 register const char *fmt
;
2027 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2028 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2029 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2035 i
= REGNO (SUBREG_REG (x
));
2036 if (i
>= FIRST_PSEUDO_REGISTER
)
2038 i
+= SUBREG_WORD (x
);
2043 if (GET_CODE (y
) == SUBREG
)
2045 j
= REGNO (SUBREG_REG (y
));
2046 if (j
>= FIRST_PSEUDO_REGISTER
)
2048 j
+= SUBREG_WORD (y
);
2053 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2054 multiple hard register group, so that for example (reg:DI 0) and
2055 (reg:SI 1) will be considered the same register. */
2056 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2057 && i
< FIRST_PSEUDO_REGISTER
)
2058 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2059 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2060 && j
< FIRST_PSEUDO_REGISTER
)
2061 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2065 /* If two operands must match, because they are really a single
2066 operand of an assembler insn, then two postincrements are invalid
2067 because the assembler insn would increment only once.
2068 On the other hand, an postincrement matches ordinary indexing
2069 if the postincrement is the output operand. */
2070 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2071 return operands_match_p (XEXP (x
, 0), y
);
2072 /* Two preincrements are invalid
2073 because the assembler insn would increment only once.
2074 On the other hand, an preincrement matches ordinary indexing
2075 if the preincrement is the input operand.
2076 In this case, return 2, since some callers need to do special
2077 things when this happens. */
2078 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2079 || GET_CODE (y
) == PRE_MODIFY
)
2080 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2084 /* Now we have disposed of all the cases
2085 in which different rtx codes can match. */
2086 if (code
!= GET_CODE (y
))
2088 if (code
== LABEL_REF
)
2089 return XEXP (x
, 0) == XEXP (y
, 0);
2090 if (code
== SYMBOL_REF
)
2091 return XSTR (x
, 0) == XSTR (y
, 0);
2093 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2095 if (GET_MODE (x
) != GET_MODE (y
))
2098 /* Compare the elements. If any pair of corresponding elements
2099 fail to match, return 0 for the whole things. */
2102 fmt
= GET_RTX_FORMAT (code
);
2103 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2109 if (XWINT (x
, i
) != XWINT (y
, i
))
2114 if (XINT (x
, i
) != XINT (y
, i
))
2119 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2122 /* If any subexpression returns 2,
2123 we should return 2 if we are successful. */
2132 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2134 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2136 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2144 /* It is believed that rtx's at this level will never
2145 contain anything but integers and other rtx's,
2146 except for within LABEL_REFs and SYMBOL_REFs. */
2151 return 1 + success_2
;
2154 /* Describe the range of registers or memory referenced by X.
2155 If X is a register, set REG_FLAG and put the first register
2156 number into START and the last plus one into END.
2157 If X is a memory reference, put a base address into BASE
2158 and a range of integer offsets into START and END.
2159 If X is pushing on the stack, we can assume it causes no trouble,
2160 so we set the SAFE field. */
2162 static struct decomposition
2166 struct decomposition val
;
2172 if (GET_CODE (x
) == MEM
)
2174 rtx base
= NULL_RTX
, offset
= 0;
2175 rtx addr
= XEXP (x
, 0);
2177 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2178 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2180 val
.base
= XEXP (addr
, 0);
2181 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2182 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2183 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2187 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2189 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2190 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2191 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2193 val
.base
= XEXP (addr
, 0);
2194 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2195 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2196 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2201 if (GET_CODE (addr
) == CONST
)
2203 addr
= XEXP (addr
, 0);
2206 if (GET_CODE (addr
) == PLUS
)
2208 if (CONSTANT_P (XEXP (addr
, 0)))
2210 base
= XEXP (addr
, 1);
2211 offset
= XEXP (addr
, 0);
2213 else if (CONSTANT_P (XEXP (addr
, 1)))
2215 base
= XEXP (addr
, 0);
2216 offset
= XEXP (addr
, 1);
2223 offset
= const0_rtx
;
2225 if (GET_CODE (offset
) == CONST
)
2226 offset
= XEXP (offset
, 0);
2227 if (GET_CODE (offset
) == PLUS
)
2229 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2231 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2232 offset
= XEXP (offset
, 0);
2234 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2236 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2237 offset
= XEXP (offset
, 1);
2241 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2242 offset
= const0_rtx
;
2245 else if (GET_CODE (offset
) != CONST_INT
)
2247 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2248 offset
= const0_rtx
;
2251 if (all_const
&& GET_CODE (base
) == PLUS
)
2252 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2254 if (GET_CODE (offset
) != CONST_INT
)
2257 val
.start
= INTVAL (offset
);
2258 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2262 else if (GET_CODE (x
) == REG
)
2265 val
.start
= true_regnum (x
);
2268 /* A pseudo with no hard reg. */
2269 val
.start
= REGNO (x
);
2270 val
.end
= val
.start
+ 1;
2274 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2276 else if (GET_CODE (x
) == SUBREG
)
2278 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2279 /* This could be more precise, but it's good enough. */
2280 return decompose (SUBREG_REG (x
));
2282 val
.start
= true_regnum (x
);
2284 return decompose (SUBREG_REG (x
));
2287 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2289 else if (CONSTANT_P (x
)
2290 /* This hasn't been assigned yet, so it can't conflict yet. */
2291 || GET_CODE (x
) == SCRATCH
)
2298 /* Return 1 if altering Y will not modify the value of X.
2299 Y is also described by YDATA, which should be decompose (Y). */
2302 immune_p (x
, y
, ydata
)
2304 struct decomposition ydata
;
2306 struct decomposition xdata
;
2309 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2313 if (GET_CODE (y
) != MEM
)
2315 /* If Y is memory and X is not, Y can't affect X. */
2316 if (GET_CODE (x
) != MEM
)
2319 xdata
= decompose (x
);
2321 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2323 /* If bases are distinct symbolic constants, there is no overlap. */
2324 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2326 /* Constants and stack slots never overlap. */
2327 if (CONSTANT_P (xdata
.base
)
2328 && (ydata
.base
== frame_pointer_rtx
2329 || ydata
.base
== hard_frame_pointer_rtx
2330 || ydata
.base
== stack_pointer_rtx
))
2332 if (CONSTANT_P (ydata
.base
)
2333 && (xdata
.base
== frame_pointer_rtx
2334 || xdata
.base
== hard_frame_pointer_rtx
2335 || xdata
.base
== stack_pointer_rtx
))
2337 /* If either base is variable, we don't know anything. */
2341 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2344 /* Similar, but calls decompose. */
2347 safe_from_earlyclobber (op
, clobber
)
2350 struct decomposition early_data
;
2352 early_data
= decompose (clobber
);
2353 return immune_p (op
, clobber
, early_data
);
2356 /* Main entry point of this file: search the body of INSN
2357 for values that need reloading and record them with push_reload.
2358 REPLACE nonzero means record also where the values occur
2359 so that subst_reloads can be used.
2361 IND_LEVELS says how many levels of indirection are supported by this
2362 machine; a value of zero means that a memory reference is not a valid
2365 LIVE_KNOWN says we have valid information about which hard
2366 regs are live at each point in the program; this is true when
2367 we are called from global_alloc but false when stupid register
2368 allocation has been done.
2370 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2371 which is nonnegative if the reg has been commandeered for reloading into.
2372 It is copied into STATIC_RELOAD_REG_P and referenced from there
2373 by various subroutines.
2375 Return TRUE if some operands need to be changed, because of swapping
2376 commutative operands, reg_equiv_address substitution, or whatever. */
2379 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2381 int replace
, ind_levels
;
2383 short *reload_reg_p
;
2385 register int insn_code_number
;
2388 /* These start out as the constraints for the insn
2389 and they are chewed up as we consider alternatives. */
2390 char *constraints
[MAX_RECOG_OPERANDS
];
2391 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2393 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2394 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2395 /* Nonzero for a MEM operand whose entire address needs a reload. */
2396 int address_reloaded
[MAX_RECOG_OPERANDS
];
2397 /* Value of enum reload_type to use for operand. */
2398 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2399 /* Value of enum reload_type to use within address of operand. */
2400 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2401 /* Save the usage of each operand. */
2402 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2403 int no_input_reloads
= 0, no_output_reloads
= 0;
2405 int this_alternative
[MAX_RECOG_OPERANDS
];
2406 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2407 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2408 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2409 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2410 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2412 int goal_alternative
[MAX_RECOG_OPERANDS
];
2413 int this_alternative_number
;
2414 int goal_alternative_number
= 0;
2415 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2416 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2417 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2418 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2419 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2420 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2421 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2422 int goal_alternative_swapped
;
2425 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2426 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2427 rtx body
= PATTERN (insn
);
2428 rtx set
= single_set (insn
);
2429 int goal_earlyclobber
= 0, this_earlyclobber
;
2430 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2436 n_earlyclobbers
= 0;
2437 replace_reloads
= replace
;
2438 hard_regs_live_known
= live_known
;
2439 static_reload_reg_p
= reload_reg_p
;
2441 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2442 neither are insns that SET cc0. Insns that use CC0 are not allowed
2443 to have any input reloads. */
2444 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2445 no_output_reloads
= 1;
2448 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2449 no_input_reloads
= 1;
2450 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2451 no_output_reloads
= 1;
2454 #ifdef SECONDARY_MEMORY_NEEDED
2455 /* The eliminated forms of any secondary memory locations are per-insn, so
2456 clear them out here. */
2458 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2461 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2462 is cheap to move between them. If it is not, there may not be an insn
2463 to do the copy, so we may need a reload. */
2464 if (GET_CODE (body
) == SET
2465 && GET_CODE (SET_DEST (body
)) == REG
2466 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2467 && GET_CODE (SET_SRC (body
)) == REG
2468 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2469 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2470 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2471 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2474 extract_insn (insn
);
2476 noperands
= reload_n_operands
= recog_data
.n_operands
;
2477 n_alternatives
= recog_data
.n_alternatives
;
2479 /* Just return "no reloads" if insn has no operands with constraints. */
2480 if (noperands
== 0 || n_alternatives
== 0)
2483 insn_code_number
= INSN_CODE (insn
);
2484 this_insn_is_asm
= insn_code_number
< 0;
2486 memcpy (operand_mode
, recog_data
.operand_mode
,
2487 noperands
* sizeof (enum machine_mode
));
2488 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2492 /* If we will need to know, later, whether some pair of operands
2493 are the same, we must compare them now and save the result.
2494 Reloading the base and index registers will clobber them
2495 and afterward they will fail to match. */
2497 for (i
= 0; i
< noperands
; i
++)
2502 substed_operand
[i
] = recog_data
.operand
[i
];
2505 modified
[i
] = RELOAD_READ
;
2507 /* Scan this operand's constraint to see if it is an output operand,
2508 an in-out operand, is commutative, or should match another. */
2513 modified
[i
] = RELOAD_WRITE
;
2515 modified
[i
] = RELOAD_READ_WRITE
;
2518 /* The last operand should not be marked commutative. */
2519 if (i
== noperands
- 1)
2524 else if (c
>= '0' && c
<= '9')
2527 operands_match
[c
][i
]
2528 = operands_match_p (recog_data
.operand
[c
],
2529 recog_data
.operand
[i
]);
2531 /* An operand may not match itself. */
2535 /* If C can be commuted with C+1, and C might need to match I,
2536 then C+1 might also need to match I. */
2537 if (commutative
>= 0)
2539 if (c
== commutative
|| c
== commutative
+ 1)
2541 int other
= c
+ (c
== commutative
? 1 : -1);
2542 operands_match
[other
][i
]
2543 = operands_match_p (recog_data
.operand
[other
],
2544 recog_data
.operand
[i
]);
2546 if (i
== commutative
|| i
== commutative
+ 1)
2548 int other
= i
+ (i
== commutative
? 1 : -1);
2549 operands_match
[c
][other
]
2550 = operands_match_p (recog_data
.operand
[c
],
2551 recog_data
.operand
[other
]);
2553 /* Note that C is supposed to be less than I.
2554 No need to consider altering both C and I because in
2555 that case we would alter one into the other. */
2561 /* Examine each operand that is a memory reference or memory address
2562 and reload parts of the addresses into index registers.
2563 Also here any references to pseudo regs that didn't get hard regs
2564 but are equivalent to constants get replaced in the insn itself
2565 with those constants. Nobody will ever see them again.
2567 Finally, set up the preferred classes of each operand. */
2569 for (i
= 0; i
< noperands
; i
++)
2571 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2573 address_reloaded
[i
] = 0;
2574 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2575 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2578 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2579 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2582 if (*constraints
[i
] == 0)
2583 /* Ignore things like match_operator operands. */
2585 else if (constraints
[i
][0] == 'p')
2587 find_reloads_address (VOIDmode
, NULL_PTR
,
2588 recog_data
.operand
[i
],
2589 recog_data
.operand_loc
[i
],
2590 i
, operand_type
[i
], ind_levels
, insn
);
2592 /* If we now have a simple operand where we used to have a
2593 PLUS or MULT, re-recognize and try again. */
2594 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2595 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2596 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2597 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2599 INSN_CODE (insn
) = -1;
2600 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2605 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2606 substed_operand
[i
] = recog_data
.operand
[i
];
2608 else if (code
== MEM
)
2611 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2612 recog_data
.operand_loc
[i
],
2613 XEXP (recog_data
.operand
[i
], 0),
2614 &XEXP (recog_data
.operand
[i
], 0),
2615 i
, address_type
[i
], ind_levels
, insn
);
2616 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2617 substed_operand
[i
] = recog_data
.operand
[i
];
2619 else if (code
== SUBREG
)
2621 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2623 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2626 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2628 &address_reloaded
[i
]);
2630 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2631 that didn't get a hard register, emit a USE with a REG_EQUAL
2632 note in front so that we might inherit a previous, possibly
2636 && GET_CODE (op
) == MEM
2637 && GET_CODE (reg
) == REG
2638 && (GET_MODE_SIZE (GET_MODE (reg
))
2639 >= GET_MODE_SIZE (GET_MODE (op
))))
2640 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2641 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2642 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2644 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2646 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2647 /* We can get a PLUS as an "operand" as a result of register
2648 elimination. See eliminate_regs and gen_reload. We handle
2649 a unary operator by reloading the operand. */
2650 substed_operand
[i
] = recog_data
.operand
[i
]
2651 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2652 ind_levels
, 0, insn
,
2653 &address_reloaded
[i
]);
2654 else if (code
== REG
)
2656 /* This is equivalent to calling find_reloads_toplev.
2657 The code is duplicated for speed.
2658 When we find a pseudo always equivalent to a constant,
2659 we replace it by the constant. We must be sure, however,
2660 that we don't try to replace it in the insn in which it
2662 register int regno
= REGNO (recog_data
.operand
[i
]);
2663 if (reg_equiv_constant
[regno
] != 0
2664 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2666 /* Record the existing mode so that the check if constants are
2667 allowed will work when operand_mode isn't specified. */
2669 if (operand_mode
[i
] == VOIDmode
)
2670 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2672 substed_operand
[i
] = recog_data
.operand
[i
]
2673 = reg_equiv_constant
[regno
];
2675 if (reg_equiv_memory_loc
[regno
] != 0
2676 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2677 /* We need not give a valid is_set_dest argument since the case
2678 of a constant equivalence was checked above. */
2679 substed_operand
[i
] = recog_data
.operand
[i
]
2680 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2681 ind_levels
, 0, insn
,
2682 &address_reloaded
[i
]);
2684 /* If the operand is still a register (we didn't replace it with an
2685 equivalent), get the preferred class to reload it into. */
2686 code
= GET_CODE (recog_data
.operand
[i
]);
2688 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2689 >= FIRST_PSEUDO_REGISTER
)
2690 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2694 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2695 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2698 /* If this is simply a copy from operand 1 to operand 0, merge the
2699 preferred classes for the operands. */
2700 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2701 && recog_data
.operand
[1] == SET_SRC (set
))
2703 preferred_class
[0] = preferred_class
[1]
2704 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2705 pref_or_nothing
[0] |= pref_or_nothing
[1];
2706 pref_or_nothing
[1] |= pref_or_nothing
[0];
2709 /* Now see what we need for pseudo-regs that didn't get hard regs
2710 or got the wrong kind of hard reg. For this, we must consider
2711 all the operands together against the register constraints. */
2713 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2716 goal_alternative_swapped
= 0;
2719 /* The constraints are made of several alternatives.
2720 Each operand's constraint looks like foo,bar,... with commas
2721 separating the alternatives. The first alternatives for all
2722 operands go together, the second alternatives go together, etc.
2724 First loop over alternatives. */
2726 for (this_alternative_number
= 0;
2727 this_alternative_number
< n_alternatives
;
2728 this_alternative_number
++)
2730 /* Loop over operands for one constraint alternative. */
2731 /* LOSERS counts those that don't fit this alternative
2732 and would require loading. */
2734 /* BAD is set to 1 if it some operand can't fit this alternative
2735 even after reloading. */
2737 /* REJECT is a count of how undesirable this alternative says it is
2738 if any reloading is required. If the alternative matches exactly
2739 then REJECT is ignored, but otherwise it gets this much
2740 counted against it in addition to the reloading needed. Each
2741 ? counts three times here since we want the disparaging caused by
2742 a bad register class to only count 1/3 as much. */
2745 this_earlyclobber
= 0;
2747 for (i
= 0; i
< noperands
; i
++)
2749 register char *p
= constraints
[i
];
2750 register int win
= 0;
2752 /* 0 => this operand can be reloaded somehow for this alternative */
2754 /* 0 => this operand can be reloaded if the alternative allows regs. */
2757 register rtx operand
= recog_data
.operand
[i
];
2759 /* Nonzero means this is a MEM that must be reloaded into a reg
2760 regardless of what the constraint says. */
2761 int force_reload
= 0;
2763 /* Nonzero if a constant forced into memory would be OK for this
2766 int earlyclobber
= 0;
2768 /* If the predicate accepts a unary operator, it means that
2769 we need to reload the operand, but do not do this for
2770 match_operator and friends. */
2771 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2772 operand
= XEXP (operand
, 0);
2774 /* If the operand is a SUBREG, extract
2775 the REG or MEM (or maybe even a constant) within.
2776 (Constants can occur as a result of reg_equiv_constant.) */
2778 while (GET_CODE (operand
) == SUBREG
)
2780 offset
+= SUBREG_WORD (operand
);
2781 operand
= SUBREG_REG (operand
);
2782 /* Force reload if this is a constant or PLUS or if there may
2783 be a problem accessing OPERAND in the outer mode. */
2784 if (CONSTANT_P (operand
)
2785 || GET_CODE (operand
) == PLUS
2786 /* We must force a reload of paradoxical SUBREGs
2787 of a MEM because the alignment of the inner value
2788 may not be enough to do the outer reference. On
2789 big-endian machines, it may also reference outside
2792 On machines that extend byte operations and we have a
2793 SUBREG where both the inner and outer modes are no wider
2794 than a word and the inner mode is narrower, is integral,
2795 and gets extended when loaded from memory, combine.c has
2796 made assumptions about the behavior of the machine in such
2797 register access. If the data is, in fact, in memory we
2798 must always load using the size assumed to be in the
2799 register and let the insn do the different-sized
2802 This is doubly true if WORD_REGISTER_OPERATIONS. In
2803 this case eliminate_regs has left non-paradoxical
2804 subregs for push_reloads to see. Make sure it does
2805 by forcing the reload.
2807 ??? When is it right at this stage to have a subreg
2808 of a mem that is _not_ to be handled specialy? IMO
2809 those should have been reduced to just a mem. */
2810 || ((GET_CODE (operand
) == MEM
2811 || (GET_CODE (operand
)== REG
2812 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2813 #ifndef WORD_REGISTER_OPERATIONS
2814 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2815 < BIGGEST_ALIGNMENT
)
2816 && (GET_MODE_SIZE (operand_mode
[i
])
2817 > GET_MODE_SIZE (GET_MODE (operand
))))
2818 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2819 #ifdef LOAD_EXTEND_OP
2820 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2821 && (GET_MODE_SIZE (GET_MODE (operand
))
2823 && (GET_MODE_SIZE (operand_mode
[i
])
2824 > GET_MODE_SIZE (GET_MODE (operand
)))
2825 && INTEGRAL_MODE_P (GET_MODE (operand
))
2826 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2831 /* Subreg of a hard reg which can't handle the subreg's mode
2832 or which would handle that mode in the wrong number of
2833 registers for subregging to work. */
2834 || (GET_CODE (operand
) == REG
2835 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2836 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2837 && (GET_MODE_SIZE (GET_MODE (operand
))
2839 && ((GET_MODE_SIZE (GET_MODE (operand
))
2841 != HARD_REGNO_NREGS (REGNO (operand
),
2842 GET_MODE (operand
))))
2843 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2848 this_alternative
[i
] = (int) NO_REGS
;
2849 this_alternative_win
[i
] = 0;
2850 this_alternative_match_win
[i
] = 0;
2851 this_alternative_offmemok
[i
] = 0;
2852 this_alternative_earlyclobber
[i
] = 0;
2853 this_alternative_matches
[i
] = -1;
2855 /* An empty constraint or empty alternative
2856 allows anything which matched the pattern. */
2857 if (*p
== 0 || *p
== ',')
2860 /* Scan this alternative's specs for this operand;
2861 set WIN if the operand fits any letter in this alternative.
2862 Otherwise, clear BADOP if this operand could
2863 fit some letter after reloads,
2864 or set WINREG if this operand could fit after reloads
2865 provided the constraint allows some registers. */
2867 while (*p
&& (c
= *p
++) != ',')
2870 case '=': case '+': case '*':
2874 /* The last operand should not be marked commutative. */
2875 if (i
!= noperands
- 1)
2888 /* Ignore rest of this alternative as far as
2889 reloading is concerned. */
2890 while (*p
&& *p
!= ',')
2894 case '0': case '1': case '2': case '3': case '4':
2895 case '5': case '6': case '7': case '8': case '9':
2898 this_alternative_matches
[i
] = c
;
2899 /* We are supposed to match a previous operand.
2900 If we do, we win if that one did.
2901 If we do not, count both of the operands as losers.
2902 (This is too conservative, since most of the time
2903 only a single reload insn will be needed to make
2904 the two operands win. As a result, this alternative
2905 may be rejected when it is actually desirable.) */
2906 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2907 /* If we are matching as if two operands were swapped,
2908 also pretend that operands_match had been computed
2910 But if I is the second of those and C is the first,
2911 don't exchange them, because operands_match is valid
2912 only on one side of its diagonal. */
2914 [(c
== commutative
|| c
== commutative
+ 1)
2915 ? 2 * commutative
+ 1 - c
: c
]
2916 [(i
== commutative
|| i
== commutative
+ 1)
2917 ? 2 * commutative
+ 1 - i
: i
])
2918 : operands_match
[c
][i
])
2920 /* If we are matching a non-offsettable address where an
2921 offsettable address was expected, then we must reject
2922 this combination, because we can't reload it. */
2923 if (this_alternative_offmemok
[c
]
2924 && GET_CODE (recog_data
.operand
[c
]) == MEM
2925 && this_alternative
[c
] == (int) NO_REGS
2926 && ! this_alternative_win
[c
])
2929 did_match
= this_alternative_win
[c
];
2933 /* Operands don't match. */
2935 /* Retroactively mark the operand we had to match
2936 as a loser, if it wasn't already. */
2937 if (this_alternative_win
[c
])
2939 this_alternative_win
[c
] = 0;
2940 if (this_alternative
[c
] == (int) NO_REGS
)
2942 /* But count the pair only once in the total badness of
2943 this alternative, if the pair can be a dummy reload. */
2945 = find_dummy_reload (recog_data
.operand
[i
],
2946 recog_data
.operand
[c
],
2947 recog_data
.operand_loc
[i
],
2948 recog_data
.operand_loc
[c
],
2949 operand_mode
[i
], operand_mode
[c
],
2950 this_alternative
[c
], -1,
2951 this_alternative_earlyclobber
[c
]);
2956 /* This can be fixed with reloads if the operand
2957 we are supposed to match can be fixed with reloads. */
2959 this_alternative
[i
] = this_alternative
[c
];
2961 /* If we have to reload this operand and some previous
2962 operand also had to match the same thing as this
2963 operand, we don't know how to do that. So reject this
2965 if (! did_match
|| force_reload
)
2966 for (j
= 0; j
< i
; j
++)
2967 if (this_alternative_matches
[j
]
2968 == this_alternative_matches
[i
])
2973 /* All necessary reloads for an address_operand
2974 were handled in find_reloads_address. */
2975 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2982 if (GET_CODE (operand
) == MEM
2983 || (GET_CODE (operand
) == REG
2984 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2985 && reg_renumber
[REGNO (operand
)] < 0))
2987 if (CONSTANT_P (operand
)
2988 /* force_const_mem does not accept HIGH. */
2989 && GET_CODE (operand
) != HIGH
)
2995 if (GET_CODE (operand
) == MEM
2996 && ! address_reloaded
[i
]
2997 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2998 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3003 if (GET_CODE (operand
) == MEM
3004 && ! address_reloaded
[i
]
3005 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3006 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3010 /* Memory operand whose address is not offsettable. */
3014 if (GET_CODE (operand
) == MEM
3015 && ! (ind_levels
? offsettable_memref_p (operand
)
3016 : offsettable_nonstrict_memref_p (operand
))
3017 /* Certain mem addresses will become offsettable
3018 after they themselves are reloaded. This is important;
3019 we don't want our own handling of unoffsettables
3020 to override the handling of reg_equiv_address. */
3021 && !(GET_CODE (XEXP (operand
, 0)) == REG
3023 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3027 /* Memory operand whose address is offsettable. */
3031 if ((GET_CODE (operand
) == MEM
3032 /* If IND_LEVELS, find_reloads_address won't reload a
3033 pseudo that didn't get a hard reg, so we have to
3034 reject that case. */
3035 && ((ind_levels
? offsettable_memref_p (operand
)
3036 : offsettable_nonstrict_memref_p (operand
))
3037 /* A reloaded address is offsettable because it is now
3038 just a simple register indirect. */
3039 || address_reloaded
[i
]))
3040 || (GET_CODE (operand
) == REG
3041 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3042 && reg_renumber
[REGNO (operand
)] < 0
3043 /* If reg_equiv_address is nonzero, we will be
3044 loading it into a register; hence it will be
3045 offsettable, but we cannot say that reg_equiv_mem
3046 is offsettable without checking. */
3047 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3048 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3049 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3051 /* force_const_mem does not accept HIGH. */
3052 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3053 || GET_CODE (operand
) == MEM
)
3060 /* Output operand that is stored before the need for the
3061 input operands (and their index registers) is over. */
3062 earlyclobber
= 1, this_earlyclobber
= 1;
3066 #ifndef REAL_ARITHMETIC
3067 /* Match any floating double constant, but only if
3068 we can examine the bits of it reliably. */
3069 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3070 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3071 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3074 if (GET_CODE (operand
) == CONST_DOUBLE
)
3079 if (GET_CODE (operand
) == CONST_DOUBLE
)
3085 if (GET_CODE (operand
) == CONST_DOUBLE
3086 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3091 if (GET_CODE (operand
) == CONST_INT
3092 || (GET_CODE (operand
) == CONST_DOUBLE
3093 && GET_MODE (operand
) == VOIDmode
))
3096 if (CONSTANT_P (operand
)
3097 #ifdef LEGITIMATE_PIC_OPERAND_P
3098 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3105 if (GET_CODE (operand
) == CONST_INT
3106 || (GET_CODE (operand
) == CONST_DOUBLE
3107 && GET_MODE (operand
) == VOIDmode
))
3119 if (GET_CODE (operand
) == CONST_INT
3120 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3130 /* A PLUS is never a valid operand, but reload can make
3131 it from a register when eliminating registers. */
3132 && GET_CODE (operand
) != PLUS
3133 /* A SCRATCH is not a valid operand. */
3134 && GET_CODE (operand
) != SCRATCH
3135 #ifdef LEGITIMATE_PIC_OPERAND_P
3136 && (! CONSTANT_P (operand
)
3138 || LEGITIMATE_PIC_OPERAND_P (operand
))
3140 && (GENERAL_REGS
== ALL_REGS
3141 || GET_CODE (operand
) != REG
3142 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3143 && reg_renumber
[REGNO (operand
)] < 0)))
3145 /* Drop through into 'r' case */
3149 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3153 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3155 #ifdef EXTRA_CONSTRAINT
3156 if (EXTRA_CONSTRAINT (operand
, c
))
3163 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3165 if (GET_MODE (operand
) == BLKmode
)
3168 if (GET_CODE (operand
) == REG
3169 && reg_fits_class_p (operand
, this_alternative
[i
],
3170 offset
, GET_MODE (recog_data
.operand
[i
])))
3177 /* If this operand could be handled with a reg,
3178 and some reg is allowed, then this operand can be handled. */
3179 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3182 /* Record which operands fit this alternative. */
3183 this_alternative_earlyclobber
[i
] = earlyclobber
;
3184 if (win
&& ! force_reload
)
3185 this_alternative_win
[i
] = 1;
3186 else if (did_match
&& ! force_reload
)
3187 this_alternative_match_win
[i
] = 1;
3190 int const_to_mem
= 0;
3192 this_alternative_offmemok
[i
] = offmemok
;
3196 /* Alternative loses if it has no regs for a reg operand. */
3197 if (GET_CODE (operand
) == REG
3198 && this_alternative
[i
] == (int) NO_REGS
3199 && this_alternative_matches
[i
] < 0)
3202 /* If this is a constant that is reloaded into the desired
3203 class by copying it to memory first, count that as another
3204 reload. This is consistent with other code and is
3205 required to avoid choosing another alternative when
3206 the constant is moved into memory by this function on
3207 an early reload pass. Note that the test here is
3208 precisely the same as in the code below that calls
3210 if (CONSTANT_P (operand
)
3211 /* force_const_mem does not accept HIGH. */
3212 && GET_CODE (operand
) != HIGH
3213 && ((PREFERRED_RELOAD_CLASS (operand
,
3214 (enum reg_class
) this_alternative
[i
])
3216 || no_input_reloads
)
3217 && operand_mode
[i
] != VOIDmode
)
3220 if (this_alternative
[i
] != (int) NO_REGS
)
3224 /* If we can't reload this value at all, reject this
3225 alternative. Note that we could also lose due to
3226 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3229 if (! CONSTANT_P (operand
)
3230 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3231 && (PREFERRED_RELOAD_CLASS (operand
,
3232 (enum reg_class
) this_alternative
[i
])
3236 /* Alternative loses if it requires a type of reload not
3237 permitted for this insn. We can always reload SCRATCH
3238 and objects with a REG_UNUSED note. */
3239 else if (GET_CODE (operand
) != SCRATCH
3240 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3241 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3243 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3247 /* We prefer to reload pseudos over reloading other things,
3248 since such reloads may be able to be eliminated later.
3249 If we are reloading a SCRATCH, we won't be generating any
3250 insns, just using a register, so it is also preferred.
3251 So bump REJECT in other cases. Don't do this in the
3252 case where we are forcing a constant into memory and
3253 it will then win since we don't want to have a different
3254 alternative match then. */
3255 if (! (GET_CODE (operand
) == REG
3256 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3257 && GET_CODE (operand
) != SCRATCH
3258 && ! (const_to_mem
&& constmemok
))
3261 /* Input reloads can be inherited more often than output
3262 reloads can be removed, so penalize output reloads. */
3263 if (operand_type
[i
] != RELOAD_FOR_INPUT
3264 && GET_CODE (operand
) != SCRATCH
)
3268 /* If this operand is a pseudo register that didn't get a hard
3269 reg and this alternative accepts some register, see if the
3270 class that we want is a subset of the preferred class for this
3271 register. If not, but it intersects that class, use the
3272 preferred class instead. If it does not intersect the preferred
3273 class, show that usage of this alternative should be discouraged;
3274 it will be discouraged more still if the register is `preferred
3275 or nothing'. We do this because it increases the chance of
3276 reusing our spill register in a later insn and avoiding a pair
3277 of memory stores and loads.
3279 Don't bother with this if this alternative will accept this
3282 Don't do this for a multiword operand, since it is only a
3283 small win and has the risk of requiring more spill registers,
3284 which could cause a large loss.
3286 Don't do this if the preferred class has only one register
3287 because we might otherwise exhaust the class. */
3289 if (! win
&& ! did_match
3290 && this_alternative
[i
] != (int) NO_REGS
3291 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3292 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3294 if (! reg_class_subset_p (this_alternative
[i
],
3295 preferred_class
[i
]))
3297 /* Since we don't have a way of forming the intersection,
3298 we just do something special if the preferred class
3299 is a subset of the class we have; that's the most
3300 common case anyway. */
3301 if (reg_class_subset_p (preferred_class
[i
],
3302 this_alternative
[i
]))
3303 this_alternative
[i
] = (int) preferred_class
[i
];
3305 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3310 /* Now see if any output operands that are marked "earlyclobber"
3311 in this alternative conflict with any input operands
3312 or any memory addresses. */
3314 for (i
= 0; i
< noperands
; i
++)
3315 if (this_alternative_earlyclobber
[i
]
3316 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3318 struct decomposition early_data
;
3320 early_data
= decompose (recog_data
.operand
[i
]);
3322 if (modified
[i
] == RELOAD_READ
)
3325 if (this_alternative
[i
] == NO_REGS
)
3327 this_alternative_earlyclobber
[i
] = 0;
3328 if (this_insn_is_asm
)
3329 error_for_asm (this_insn
,
3330 "`&' constraint used with no register class");
3335 for (j
= 0; j
< noperands
; j
++)
3336 /* Is this an input operand or a memory ref? */
3337 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3338 || modified
[j
] != RELOAD_WRITE
)
3340 /* Ignore things like match_operator operands. */
3341 && *recog_data
.constraints
[j
] != 0
3342 /* Don't count an input operand that is constrained to match
3343 the early clobber operand. */
3344 && ! (this_alternative_matches
[j
] == i
3345 && rtx_equal_p (recog_data
.operand
[i
],
3346 recog_data
.operand
[j
]))
3347 /* Is it altered by storing the earlyclobber operand? */
3348 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3351 /* If the output is in a single-reg class,
3352 it's costly to reload it, so reload the input instead. */
3353 if (reg_class_size
[this_alternative
[i
]] == 1
3354 && (GET_CODE (recog_data
.operand
[j
]) == REG
3355 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3358 this_alternative_win
[j
] = 0;
3359 this_alternative_match_win
[j
] = 0;
3364 /* If an earlyclobber operand conflicts with something,
3365 it must be reloaded, so request this and count the cost. */
3369 this_alternative_win
[i
] = 0;
3370 this_alternative_match_win
[j
] = 0;
3371 for (j
= 0; j
< noperands
; j
++)
3372 if (this_alternative_matches
[j
] == i
3373 && this_alternative_match_win
[j
])
3375 this_alternative_win
[j
] = 0;
3376 this_alternative_match_win
[j
] = 0;
3382 /* If one alternative accepts all the operands, no reload required,
3383 choose that alternative; don't consider the remaining ones. */
3386 /* Unswap these so that they are never swapped at `finish'. */
3387 if (commutative
>= 0)
3389 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3390 recog_data
.operand
[commutative
+ 1]
3391 = substed_operand
[commutative
+ 1];
3393 for (i
= 0; i
< noperands
; i
++)
3395 goal_alternative_win
[i
] = this_alternative_win
[i
];
3396 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3397 goal_alternative
[i
] = this_alternative
[i
];
3398 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3399 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3400 goal_alternative_earlyclobber
[i
]
3401 = this_alternative_earlyclobber
[i
];
3403 goal_alternative_number
= this_alternative_number
;
3404 goal_alternative_swapped
= swapped
;
3405 goal_earlyclobber
= this_earlyclobber
;
3409 /* REJECT, set by the ! and ? constraint characters and when a register
3410 would be reloaded into a non-preferred class, discourages the use of
3411 this alternative for a reload goal. REJECT is incremented by six
3412 for each ? and two for each non-preferred class. */
3413 losers
= losers
* 6 + reject
;
3415 /* If this alternative can be made to work by reloading,
3416 and it needs less reloading than the others checked so far,
3417 record it as the chosen goal for reloading. */
3418 if (! bad
&& best
> losers
)
3420 for (i
= 0; i
< noperands
; i
++)
3422 goal_alternative
[i
] = this_alternative
[i
];
3423 goal_alternative_win
[i
] = this_alternative_win
[i
];
3424 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3425 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3426 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3427 goal_alternative_earlyclobber
[i
]
3428 = this_alternative_earlyclobber
[i
];
3430 goal_alternative_swapped
= swapped
;
3432 goal_alternative_number
= this_alternative_number
;
3433 goal_earlyclobber
= this_earlyclobber
;
3437 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3438 then we need to try each alternative twice,
3439 the second time matching those two operands
3440 as if we had exchanged them.
3441 To do this, really exchange them in operands.
3443 If we have just tried the alternatives the second time,
3444 return operands to normal and drop through. */
3446 if (commutative
>= 0)
3451 register enum reg_class tclass
;
3454 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3455 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3457 tclass
= preferred_class
[commutative
];
3458 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3459 preferred_class
[commutative
+ 1] = tclass
;
3461 t
= pref_or_nothing
[commutative
];
3462 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3463 pref_or_nothing
[commutative
+ 1] = t
;
3465 memcpy (constraints
, recog_data
.constraints
,
3466 noperands
* sizeof (char *));
3471 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3472 recog_data
.operand
[commutative
+ 1]
3473 = substed_operand
[commutative
+ 1];
3477 /* The operands don't meet the constraints.
3478 goal_alternative describes the alternative
3479 that we could reach by reloading the fewest operands.
3480 Reload so as to fit it. */
3482 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3484 /* No alternative works with reloads?? */
3485 if (insn_code_number
>= 0)
3486 fatal_insn ("Unable to generate reloads for:", insn
);
3487 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3488 /* Avoid further trouble with this insn. */
3489 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3494 /* Jump to `finish' from above if all operands are valid already.
3495 In that case, goal_alternative_win is all 1. */
3498 /* Right now, for any pair of operands I and J that are required to match,
3500 goal_alternative_matches[J] is I.
3501 Set up goal_alternative_matched as the inverse function:
3502 goal_alternative_matched[I] = J. */
3504 for (i
= 0; i
< noperands
; i
++)
3505 goal_alternative_matched
[i
] = -1;
3507 for (i
= 0; i
< noperands
; i
++)
3508 if (! goal_alternative_win
[i
]
3509 && goal_alternative_matches
[i
] >= 0)
3510 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3512 for (i
= 0; i
< noperands
; i
++)
3513 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3515 /* If the best alternative is with operands 1 and 2 swapped,
3516 consider them swapped before reporting the reloads. Update the
3517 operand numbers of any reloads already pushed. */
3519 if (goal_alternative_swapped
)
3523 tem
= substed_operand
[commutative
];
3524 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3525 substed_operand
[commutative
+ 1] = tem
;
3526 tem
= recog_data
.operand
[commutative
];
3527 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3528 recog_data
.operand
[commutative
+ 1] = tem
;
3529 tem
= *recog_data
.operand_loc
[commutative
];
3530 *recog_data
.operand_loc
[commutative
]
3531 = *recog_data
.operand_loc
[commutative
+ 1];
3532 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3534 for (i
= 0; i
< n_reloads
; i
++)
3536 if (rld
[i
].opnum
== commutative
)
3537 rld
[i
].opnum
= commutative
+ 1;
3538 else if (rld
[i
].opnum
== commutative
+ 1)
3539 rld
[i
].opnum
= commutative
;
3543 for (i
= 0; i
< noperands
; i
++)
3545 operand_reloadnum
[i
] = -1;
3547 /* If this is an earlyclobber operand, we need to widen the scope.
3548 The reload must remain valid from the start of the insn being
3549 reloaded until after the operand is stored into its destination.
3550 We approximate this with RELOAD_OTHER even though we know that we
3551 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3553 One special case that is worth checking is when we have an
3554 output that is earlyclobber but isn't used past the insn (typically
3555 a SCRATCH). In this case, we only need have the reload live
3556 through the insn itself, but not for any of our input or output
3558 But we must not accidentally narrow the scope of an existing
3559 RELOAD_OTHER reload - leave these alone.
3561 In any case, anything needed to address this operand can remain
3562 however they were previously categorized. */
3564 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3566 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3567 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3570 /* Any constants that aren't allowed and can't be reloaded
3571 into registers are here changed into memory references. */
3572 for (i
= 0; i
< noperands
; i
++)
3573 if (! goal_alternative_win
[i
]
3574 && CONSTANT_P (recog_data
.operand
[i
])
3575 /* force_const_mem does not accept HIGH. */
3576 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3577 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3578 (enum reg_class
) goal_alternative
[i
])
3580 || no_input_reloads
)
3581 && operand_mode
[i
] != VOIDmode
)
3583 substed_operand
[i
] = recog_data
.operand
[i
]
3584 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3585 recog_data
.operand
[i
]),
3586 i
, address_type
[i
], ind_levels
, 0, insn
,
3588 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3589 goal_alternative_number
))
3590 goal_alternative_win
[i
] = 1;
3593 /* Record the values of the earlyclobber operands for the caller. */
3594 if (goal_earlyclobber
)
3595 for (i
= 0; i
< noperands
; i
++)
3596 if (goal_alternative_earlyclobber
[i
])
3597 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3599 /* Now record reloads for all the operands that need them. */
3600 for (i
= 0; i
< noperands
; i
++)
3601 if (! goal_alternative_win
[i
])
3603 /* Operands that match previous ones have already been handled. */
3604 if (goal_alternative_matches
[i
] >= 0)
3606 /* Handle an operand with a nonoffsettable address
3607 appearing where an offsettable address will do
3608 by reloading the address into a base register.
3610 ??? We can also do this when the operand is a register and
3611 reg_equiv_mem is not offsettable, but this is a bit tricky,
3612 so we don't bother with it. It may not be worth doing. */
3613 else if (goal_alternative_matched
[i
] == -1
3614 && goal_alternative_offmemok
[i
]
3615 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3617 operand_reloadnum
[i
]
3618 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3619 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3621 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3622 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3623 rld
[operand_reloadnum
[i
]].inc
3624 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3626 /* If this operand is an output, we will have made any
3627 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3628 now we are treating part of the operand as an input, so
3629 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3631 if (modified
[i
] == RELOAD_WRITE
)
3633 for (j
= 0; j
< n_reloads
; j
++)
3635 if (rld
[j
].opnum
== i
)
3637 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3638 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3639 else if (rld
[j
].when_needed
3640 == RELOAD_FOR_OUTADDR_ADDRESS
)
3641 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3646 else if (goal_alternative_matched
[i
] == -1)
3648 operand_reloadnum
[i
]
3649 = push_reload ((modified
[i
] != RELOAD_WRITE
3650 ? recog_data
.operand
[i
] : 0),
3651 (modified
[i
] != RELOAD_READ
3652 ? recog_data
.operand
[i
] : 0),
3653 (modified
[i
] != RELOAD_WRITE
3654 ? recog_data
.operand_loc
[i
] : 0),
3655 (modified
[i
] != RELOAD_READ
3656 ? recog_data
.operand_loc
[i
] : 0),
3657 (enum reg_class
) goal_alternative
[i
],
3658 (modified
[i
] == RELOAD_WRITE
3659 ? VOIDmode
: operand_mode
[i
]),
3660 (modified
[i
] == RELOAD_READ
3661 ? VOIDmode
: operand_mode
[i
]),
3662 (insn_code_number
< 0 ? 0
3663 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3664 0, i
, operand_type
[i
]);
3666 /* In a matching pair of operands, one must be input only
3667 and the other must be output only.
3668 Pass the input operand as IN and the other as OUT. */
3669 else if (modified
[i
] == RELOAD_READ
3670 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3672 operand_reloadnum
[i
]
3673 = push_reload (recog_data
.operand
[i
],
3674 recog_data
.operand
[goal_alternative_matched
[i
]],
3675 recog_data
.operand_loc
[i
],
3676 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3677 (enum reg_class
) goal_alternative
[i
],
3679 operand_mode
[goal_alternative_matched
[i
]],
3680 0, 0, i
, RELOAD_OTHER
);
3681 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3683 else if (modified
[i
] == RELOAD_WRITE
3684 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3686 operand_reloadnum
[goal_alternative_matched
[i
]]
3687 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3688 recog_data
.operand
[i
],
3689 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3690 recog_data
.operand_loc
[i
],
3691 (enum reg_class
) goal_alternative
[i
],
3692 operand_mode
[goal_alternative_matched
[i
]],
3694 0, 0, i
, RELOAD_OTHER
);
3695 operand_reloadnum
[i
] = output_reloadnum
;
3697 else if (insn_code_number
>= 0)
3701 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3702 /* Avoid further trouble with this insn. */
3703 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3708 else if (goal_alternative_matched
[i
] < 0
3709 && goal_alternative_matches
[i
] < 0
3712 /* For each non-matching operand that's a MEM or a pseudo-register
3713 that didn't get a hard register, make an optional reload.
3714 This may get done even if the insn needs no reloads otherwise. */
3716 rtx operand
= recog_data
.operand
[i
];
3718 while (GET_CODE (operand
) == SUBREG
)
3719 operand
= XEXP (operand
, 0);
3720 if ((GET_CODE (operand
) == MEM
3721 || (GET_CODE (operand
) == REG
3722 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3723 /* If this is only for an output, the optional reload would not
3724 actually cause us to use a register now, just note that
3725 something is stored here. */
3726 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3727 || modified
[i
] == RELOAD_WRITE
)
3728 && ! no_input_reloads
3729 /* An optional output reload might allow to delete INSN later.
3730 We mustn't make in-out reloads on insns that are not permitted
3732 If this is an asm, we can't delete it; we must not even call
3733 push_reload for an optional output reload in this case,
3734 because we can't be sure that the constraint allows a register,
3735 and push_reload verifies the constraints for asms. */
3736 && (modified
[i
] == RELOAD_READ
3737 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3738 operand_reloadnum
[i
]
3739 = push_reload ((modified
[i
] != RELOAD_WRITE
3740 ? recog_data
.operand
[i
] : 0),
3741 (modified
[i
] != RELOAD_READ
3742 ? recog_data
.operand
[i
] : 0),
3743 (modified
[i
] != RELOAD_WRITE
3744 ? recog_data
.operand_loc
[i
] : 0),
3745 (modified
[i
] != RELOAD_READ
3746 ? recog_data
.operand_loc
[i
] : 0),
3747 (enum reg_class
) goal_alternative
[i
],
3748 (modified
[i
] == RELOAD_WRITE
3749 ? VOIDmode
: operand_mode
[i
]),
3750 (modified
[i
] == RELOAD_READ
3751 ? VOIDmode
: operand_mode
[i
]),
3752 (insn_code_number
< 0 ? 0
3753 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3754 1, i
, operand_type
[i
]);
3755 /* If a memory reference remains (either as a MEM or a pseudo that
3756 did not get a hard register), yet we can't make an optional
3757 reload, check if this is actually a pseudo register reference;
3758 we then need to emit a USE and/or a CLOBBER so that reload
3759 inheritance will do the right thing. */
3761 && (GET_CODE (operand
) == MEM
3762 || (GET_CODE (operand
) == REG
3763 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3764 && reg_renumber
[REGNO (operand
)] < 0)))
3766 operand
= *recog_data
.operand_loc
[i
];
3768 while (GET_CODE (operand
) == SUBREG
)
3769 operand
= XEXP (operand
, 0);
3770 if (GET_CODE (operand
) == REG
)
3772 if (modified
[i
] != RELOAD_WRITE
)
3773 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3774 if (modified
[i
] != RELOAD_READ
)
3775 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3779 else if (goal_alternative_matches
[i
] >= 0
3780 && goal_alternative_win
[goal_alternative_matches
[i
]]
3781 && modified
[i
] == RELOAD_READ
3782 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3783 && ! no_input_reloads
&& ! no_output_reloads
3786 /* Similarly, make an optional reload for a pair of matching
3787 objects that are in MEM or a pseudo that didn't get a hard reg. */
3789 rtx operand
= recog_data
.operand
[i
];
3791 while (GET_CODE (operand
) == SUBREG
)
3792 operand
= XEXP (operand
, 0);
3793 if ((GET_CODE (operand
) == MEM
3794 || (GET_CODE (operand
) == REG
3795 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3796 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3798 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3799 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3800 recog_data
.operand
[i
],
3801 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3802 recog_data
.operand_loc
[i
],
3803 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3804 operand_mode
[goal_alternative_matches
[i
]],
3806 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3809 /* Perform whatever substitutions on the operands we are supposed
3810 to make due to commutativity or replacement of registers
3811 with equivalent constants or memory slots. */
3813 for (i
= 0; i
< noperands
; i
++)
3815 /* We only do this on the last pass through reload, because it is
3816 possible for some data (like reg_equiv_address) to be changed during
3817 later passes. Moreover, we loose the opportunity to get a useful
3818 reload_{in,out}_reg when we do these replacements. */
3822 rtx substitution
= substed_operand
[i
];
3824 *recog_data
.operand_loc
[i
] = substitution
;
3826 /* If we're replacing an operand with a LABEL_REF, we need
3827 to make sure that there's a REG_LABEL note attached to
3828 this instruction. */
3829 if (GET_CODE (insn
) != JUMP_INSN
3830 && GET_CODE (substitution
) == LABEL_REF
3831 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3832 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3833 XEXP (substitution
, 0),
3837 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3840 /* If this insn pattern contains any MATCH_DUP's, make sure that
3841 they will be substituted if the operands they match are substituted.
3842 Also do now any substitutions we already did on the operands.
3844 Don't do this if we aren't making replacements because we might be
3845 propagating things allocated by frame pointer elimination into places
3846 it doesn't expect. */
3848 if (insn_code_number
>= 0 && replace
)
3849 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3851 int opno
= recog_data
.dup_num
[i
];
3852 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3853 if (operand_reloadnum
[opno
] >= 0)
3854 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3855 insn_data
[insn_code_number
].operand
[opno
].mode
);
3859 /* This loses because reloading of prior insns can invalidate the equivalence
3860 (or at least find_equiv_reg isn't smart enough to find it any more),
3861 causing this insn to need more reload regs than it needed before.
3862 It may be too late to make the reload regs available.
3863 Now this optimization is done safely in choose_reload_regs. */
3865 /* For each reload of a reg into some other class of reg,
3866 search for an existing equivalent reg (same value now) in the right class.
3867 We can use it as long as we don't need to change its contents. */
3868 for (i
= 0; i
< n_reloads
; i
++)
3869 if (rld
[i
].reg_rtx
== 0
3871 && GET_CODE (rld
[i
].in
) == REG
3875 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3876 static_reload_reg_p
, 0, rld
[i
].inmode
);
3877 /* Prevent generation of insn to load the value
3878 because the one we found already has the value. */
3880 rld
[i
].in
= rld
[i
].reg_rtx
;
3884 /* Perhaps an output reload can be combined with another
3885 to reduce needs by one. */
3886 if (!goal_earlyclobber
)
3889 /* If we have a pair of reloads for parts of an address, they are reloading
3890 the same object, the operands themselves were not reloaded, and they
3891 are for two operands that are supposed to match, merge the reloads and
3892 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3894 for (i
= 0; i
< n_reloads
; i
++)
3898 for (j
= i
+ 1; j
< n_reloads
; j
++)
3899 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3900 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3901 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3902 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3903 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3904 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3905 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3906 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3907 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3908 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3909 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3910 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3911 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3912 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3913 || (goal_alternative_matches
[rld
[j
].opnum
]
3916 for (k
= 0; k
< n_replacements
; k
++)
3917 if (replacements
[k
].what
== j
)
3918 replacements
[k
].what
= i
;
3920 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3921 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3922 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3924 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3929 /* Scan all the reloads and update their type.
3930 If a reload is for the address of an operand and we didn't reload
3931 that operand, change the type. Similarly, change the operand number
3932 of a reload when two operands match. If a reload is optional, treat it
3933 as though the operand isn't reloaded.
3935 ??? This latter case is somewhat odd because if we do the optional
3936 reload, it means the object is hanging around. Thus we need only
3937 do the address reload if the optional reload was NOT done.
3939 Change secondary reloads to be the address type of their operand, not
3942 If an operand's reload is now RELOAD_OTHER, change any
3943 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3944 RELOAD_FOR_OTHER_ADDRESS. */
3946 for (i
= 0; i
< n_reloads
; i
++)
3948 if (rld
[i
].secondary_p
3949 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3950 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3952 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3953 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3954 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3955 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3956 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3957 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3959 /* If we have a secondary reload to go along with this reload,
3960 change its type to RELOAD_FOR_OPADDR_ADDR. */
3962 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3963 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3964 && rld
[i
].secondary_in_reload
!= -1)
3966 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3968 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3970 /* If there's a tertiary reload we have to change it also. */
3971 if (secondary_in_reload
> 0
3972 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3973 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3974 = RELOAD_FOR_OPADDR_ADDR
;
3977 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3978 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3979 && rld
[i
].secondary_out_reload
!= -1)
3981 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3983 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3985 /* If there's a tertiary reload we have to change it also. */
3986 if (secondary_out_reload
3987 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3988 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3989 = RELOAD_FOR_OPADDR_ADDR
;
3992 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3993 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3994 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3996 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3999 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4000 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4001 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4002 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4004 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4006 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4007 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4010 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4011 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4012 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4014 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4015 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4016 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4017 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4018 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4019 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4020 This is complicated by the fact that a single operand can have more
4021 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4022 choose_reload_regs without affecting code quality, and cases that
4023 actually fail are extremely rare, so it turns out to be better to fix
4024 the problem here by not generating cases that choose_reload_regs will
4026 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4027 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4029 We can reduce the register pressure by exploiting that a
4030 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4031 does not conflict with any of them, if it is only used for the first of
4032 the RELOAD_FOR_X_ADDRESS reloads. */
4034 int first_op_addr_num
= -2;
4035 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4036 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4037 int need_change
= 0;
4038 /* We use last_op_addr_reload and the contents of the above arrays
4039 first as flags - -2 means no instance encountered, -1 means exactly
4040 one instance encountered.
4041 If more than one instance has been encountered, we store the reload
4042 number of the first reload of the kind in question; reload numbers
4043 are known to be non-negative. */
4044 for (i
= 0; i
< noperands
; i
++)
4045 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4046 for (i
= n_reloads
- 1; i
>= 0; i
--)
4048 switch (rld
[i
].when_needed
)
4050 case RELOAD_FOR_OPERAND_ADDRESS
:
4051 if (++first_op_addr_num
>= 0)
4053 first_op_addr_num
= i
;
4057 case RELOAD_FOR_INPUT_ADDRESS
:
4058 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4060 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4064 case RELOAD_FOR_OUTPUT_ADDRESS
:
4065 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4067 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4078 for (i
= 0; i
< n_reloads
; i
++)
4081 enum reload_type type
;
4083 switch (rld
[i
].when_needed
)
4085 case RELOAD_FOR_OPADDR_ADDR
:
4086 first_num
= first_op_addr_num
;
4087 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4089 case RELOAD_FOR_INPADDR_ADDRESS
:
4090 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4091 type
= RELOAD_FOR_INPUT_ADDRESS
;
4093 case RELOAD_FOR_OUTADDR_ADDRESS
:
4094 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4095 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4102 else if (i
> first_num
)
4103 rld
[i
].when_needed
= type
;
4106 /* Check if the only TYPE reload that uses reload I is
4107 reload FIRST_NUM. */
4108 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4110 if (rld
[j
].when_needed
== type
4111 && (rld
[i
].secondary_p
4112 ? rld
[j
].secondary_in_reload
== i
4113 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4115 rld
[i
].when_needed
= type
;
4124 /* See if we have any reloads that are now allowed to be merged
4125 because we've changed when the reload is needed to
4126 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4127 check for the most common cases. */
4129 for (i
= 0; i
< n_reloads
; i
++)
4130 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4131 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4132 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4133 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4134 for (j
= 0; j
< n_reloads
; j
++)
4135 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4136 && rld
[j
].when_needed
== rld
[i
].when_needed
4137 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4138 && rld
[i
].class == rld
[j
].class
4139 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4140 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4142 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4143 transfer_replacements (i
, j
);
4148 /* If we made any reloads for addresses, see if they violate a
4149 "no input reloads" requirement for this insn. But loads that we
4150 do after the insn (such as for output addresses) are fine. */
4151 if (no_input_reloads
)
4152 for (i
= 0; i
< n_reloads
; i
++)
4154 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4155 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4159 /* Compute reload_mode and reload_nregs. */
4160 for (i
= 0; i
< n_reloads
; i
++)
4163 = (rld
[i
].inmode
== VOIDmode
4164 || (GET_MODE_SIZE (rld
[i
].outmode
)
4165 > GET_MODE_SIZE (rld
[i
].inmode
)))
4166 ? rld
[i
].outmode
: rld
[i
].inmode
;
4168 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4174 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4175 accepts a memory operand with constant address. */
4178 alternative_allows_memconst (constraint
, altnum
)
4179 const char *constraint
;
4183 /* Skip alternatives before the one requested. */
4186 while (*constraint
++ != ',');
4189 /* Scan the requested alternative for 'm' or 'o'.
4190 If one of them is present, this alternative accepts memory constants. */
4191 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4192 if (c
== 'm' || c
== 'o')
4197 /* Scan X for memory references and scan the addresses for reloading.
4198 Also checks for references to "constant" regs that we want to eliminate
4199 and replaces them with the values they stand for.
4200 We may alter X destructively if it contains a reference to such.
4201 If X is just a constant reg, we return the equivalent value
4204 IND_LEVELS says how many levels of indirect addressing this machine
4207 OPNUM and TYPE identify the purpose of the reload.
4209 IS_SET_DEST is true if X is the destination of a SET, which is not
4210 appropriate to be replaced by a constant.
4212 INSN, if nonzero, is the insn in which we do the reload. It is used
4213 to determine if we may generate output reloads, and where to put USEs
4214 for pseudos that we have to replace with stack slots.
4216 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4217 result of find_reloads_address. */
4220 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4224 enum reload_type type
;
4228 int *address_reloaded
;
4230 register RTX_CODE code
= GET_CODE (x
);
4232 register const char *fmt
= GET_RTX_FORMAT (code
);
4238 /* This code is duplicated for speed in find_reloads. */
4239 register int regno
= REGNO (x
);
4240 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4241 x
= reg_equiv_constant
[regno
];
4243 /* This creates (subreg (mem...)) which would cause an unnecessary
4244 reload of the mem. */
4245 else if (reg_equiv_mem
[regno
] != 0)
4246 x
= reg_equiv_mem
[regno
];
4248 else if (reg_equiv_memory_loc
[regno
]
4249 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4251 rtx mem
= make_memloc (x
, regno
);
4252 if (reg_equiv_address
[regno
]
4253 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4255 /* If this is not a toplevel operand, find_reloads doesn't see
4256 this substitution. We have to emit a USE of the pseudo so
4257 that delete_output_reload can see it. */
4258 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4259 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4261 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4262 opnum
, type
, ind_levels
, insn
);
4263 if (address_reloaded
)
4264 *address_reloaded
= i
;
4273 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4274 opnum
, type
, ind_levels
, insn
);
4275 if (address_reloaded
)
4276 *address_reloaded
= i
;
4281 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4283 /* Check for SUBREG containing a REG that's equivalent to a constant.
4284 If the constant has a known value, truncate it right now.
4285 Similarly if we are extracting a single-word of a multi-word
4286 constant. If the constant is symbolic, allow it to be substituted
4287 normally. push_reload will strip the subreg later. If the
4288 constant is VOIDmode, abort because we will lose the mode of
4289 the register (this should never happen because one of the cases
4290 above should handle it). */
4292 register int regno
= REGNO (SUBREG_REG (x
));
4295 if (subreg_lowpart_p (x
)
4296 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4297 && reg_equiv_constant
[regno
] != 0
4298 && (tem
= gen_lowpart_common (GET_MODE (x
),
4299 reg_equiv_constant
[regno
])) != 0)
4302 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4303 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4304 && reg_equiv_constant
[regno
] != 0
4305 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4307 GET_MODE (SUBREG_REG (x
)))) != 0)
4309 /* TEM is now a word sized constant for the bits from X that
4310 we wanted. However, TEM may be the wrong representation.
4312 Use gen_lowpart_common to convert a CONST_INT into a
4313 CONST_DOUBLE and vice versa as needed according to by the mode
4315 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4321 /* If the SUBREG is wider than a word, the above test will fail.
4322 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4323 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4324 a 32 bit target. We still can - and have to - handle this
4325 for non-paradoxical subregs of CONST_INTs. */
4326 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4327 && reg_equiv_constant
[regno
] != 0
4328 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4329 && (GET_MODE_SIZE (GET_MODE (x
))
4330 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4332 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4333 if (WORDS_BIG_ENDIAN
)
4334 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4335 - GET_MODE_BITSIZE (GET_MODE (x
))
4337 /* Here we use the knowledge that CONST_INTs have a
4338 HOST_WIDE_INT field. */
4339 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4340 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4341 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4344 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4345 && reg_equiv_constant
[regno
] != 0
4346 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4349 /* If the subreg contains a reg that will be converted to a mem,
4350 convert the subreg to a narrower memref now.
4351 Otherwise, we would get (subreg (mem ...) ...),
4352 which would force reload of the mem.
4354 We also need to do this if there is an equivalent MEM that is
4355 not offsettable. In that case, alter_subreg would produce an
4356 invalid address on big-endian machines.
4358 For machines that extend byte loads, we must not reload using
4359 a wider mode if we have a paradoxical SUBREG. find_reloads will
4360 force a reload in that case. So we should not do anything here. */
4362 else if (regno
>= FIRST_PSEUDO_REGISTER
4363 #ifdef LOAD_EXTEND_OP
4364 && (GET_MODE_SIZE (GET_MODE (x
))
4365 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4367 && (reg_equiv_address
[regno
] != 0
4368 || (reg_equiv_mem
[regno
] != 0
4369 && (! strict_memory_address_p (GET_MODE (x
),
4370 XEXP (reg_equiv_mem
[regno
], 0))
4371 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4372 || num_not_at_initial_offset
))))
4373 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4376 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4377 && (GET_MODE_SIZE (GET_MODE (x
))
4378 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4379 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4381 /* A paradoxical subreg will simply have the mode of the access
4382 changed, so we need to reload such a memory operand to stabilize
4383 the meaning of the memory access. */
4384 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4387 push_reload (NULL_RTX
, SUBREG_REG (x
), NULL_PTR
, &SUBREG_REG (x
),
4388 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4389 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4391 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), NULL_PTR
,
4392 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4393 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4396 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4400 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4401 ind_levels
, is_set_dest
, insn
,
4403 /* If we have replaced a reg with it's equivalent memory loc -
4404 that can still be handled here e.g. if it's in a paradoxical
4405 subreg - we must make the change in a copy, rather than using
4406 a destructive change. This way, find_reloads can still elect
4407 not to do the change. */
4408 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4410 x
= shallow_copy_rtx (x
);
4413 XEXP (x
, i
) = new_part
;
4419 /* Return a mem ref for the memory equivalent of reg REGNO.
4420 This mem ref is not shared with anything. */
4423 make_memloc (ad
, regno
)
4427 /* We must rerun eliminate_regs, in case the elimination
4428 offsets have changed. */
4430 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4432 /* If TEM might contain a pseudo, we must copy it to avoid
4433 modifying it when we do the substitution for the reload. */
4434 if (rtx_varies_p (tem
, 0))
4435 tem
= copy_rtx (tem
);
4437 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4438 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4442 /* Record all reloads needed for handling memory address AD
4443 which appears in *LOC in a memory reference to mode MODE
4444 which itself is found in location *MEMREFLOC.
4445 Note that we take shortcuts assuming that no multi-reg machine mode
4446 occurs as part of an address.
4448 OPNUM and TYPE specify the purpose of this reload.
4450 IND_LEVELS says how many levels of indirect addressing this machine
4453 INSN, if nonzero, is the insn in which we do the reload. It is used
4454 to determine if we may generate output reloads, and where to put USEs
4455 for pseudos that we have to replace with stack slots.
4457 Value is nonzero if this address is reloaded or replaced as a whole.
4458 This is interesting to the caller if the address is an autoincrement.
4460 Note that there is no verification that the address will be valid after
4461 this routine does its work. Instead, we rely on the fact that the address
4462 was valid when reload started. So we need only undo things that reload
4463 could have broken. These are wrong register types, pseudos not allocated
4464 to a hard register, and frame pointer elimination. */
4467 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4468 enum machine_mode mode
;
4473 enum reload_type type
;
4478 int removed_and
= 0;
4481 /* If the address is a register, see if it is a legitimate address and
4482 reload if not. We first handle the cases where we need not reload
4483 or where we must reload in a non-standard way. */
4485 if (GET_CODE (ad
) == REG
)
4489 /* If the register is equivalent to an invariant expression, substitute
4490 the invariant, and eliminate any eliminable register references. */
4491 tem
= reg_equiv_constant
[regno
];
4493 && (tem
= eliminate_regs (tem
, mode
, insn
))
4494 && strict_memory_address_p (mode
, tem
))
4500 tem
= reg_equiv_memory_loc
[regno
];
4503 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4505 tem
= make_memloc (ad
, regno
);
4506 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4508 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4509 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4512 /* We can avoid a reload if the register's equivalent memory
4513 expression is valid as an indirect memory address.
4514 But not all addresses are valid in a mem used as an indirect
4515 address: only reg or reg+constant. */
4518 && strict_memory_address_p (mode
, tem
)
4519 && (GET_CODE (XEXP (tem
, 0)) == REG
4520 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4521 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4522 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4524 /* TEM is not the same as what we'll be replacing the
4525 pseudo with after reload, put a USE in front of INSN
4526 in the final reload pass. */
4528 && num_not_at_initial_offset
4529 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4532 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4533 /* This doesn't really count as replacing the address
4534 as a whole, since it is still a memory access. */
4542 /* The only remaining case where we can avoid a reload is if this is a
4543 hard register that is valid as a base register and which is not the
4544 subject of a CLOBBER in this insn. */
4546 else if (regno
< FIRST_PSEUDO_REGISTER
4547 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4548 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4551 /* If we do not have one of the cases above, we must do the reload. */
4552 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4553 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4557 if (strict_memory_address_p (mode
, ad
))
4559 /* The address appears valid, so reloads are not needed.
4560 But the address may contain an eliminable register.
4561 This can happen because a machine with indirect addressing
4562 may consider a pseudo register by itself a valid address even when
4563 it has failed to get a hard reg.
4564 So do a tree-walk to find and eliminate all such regs. */
4566 /* But first quickly dispose of a common case. */
4567 if (GET_CODE (ad
) == PLUS
4568 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4569 && GET_CODE (XEXP (ad
, 0)) == REG
4570 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4573 subst_reg_equivs_changed
= 0;
4574 *loc
= subst_reg_equivs (ad
, insn
);
4576 if (! subst_reg_equivs_changed
)
4579 /* Check result for validity after substitution. */
4580 if (strict_memory_address_p (mode
, ad
))
4584 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4589 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4594 *memrefloc
= copy_rtx (*memrefloc
);
4595 XEXP (*memrefloc
, 0) = ad
;
4596 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4602 /* The address is not valid. We have to figure out why. First see if
4603 we have an outer AND and remove it if so. Then analyze what's inside. */
4605 if (GET_CODE (ad
) == AND
)
4608 loc
= &XEXP (ad
, 0);
4612 /* One possibility for why the address is invalid is that it is itself
4613 a MEM. This can happen when the frame pointer is being eliminated, a
4614 pseudo is not allocated to a hard register, and the offset between the
4615 frame and stack pointers is not its initial value. In that case the
4616 pseudo will have been replaced by a MEM referring to the
4618 if (GET_CODE (ad
) == MEM
)
4620 /* First ensure that the address in this MEM is valid. Then, unless
4621 indirect addresses are valid, reload the MEM into a register. */
4623 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4624 opnum
, ADDR_TYPE (type
),
4625 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4627 /* If tem was changed, then we must create a new memory reference to
4628 hold it and store it back into memrefloc. */
4629 if (tem
!= ad
&& memrefloc
)
4631 *memrefloc
= copy_rtx (*memrefloc
);
4632 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4633 loc
= &XEXP (*memrefloc
, 0);
4635 loc
= &XEXP (*loc
, 0);
4638 /* Check similar cases as for indirect addresses as above except
4639 that we can allow pseudos and a MEM since they should have been
4640 taken care of above. */
4643 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4644 || GET_CODE (XEXP (tem
, 0)) == MEM
4645 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4646 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4647 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4648 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4650 /* Must use TEM here, not AD, since it is the one that will
4651 have any subexpressions reloaded, if needed. */
4652 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4653 BASE_REG_CLASS
, GET_MODE (tem
),
4656 return ! removed_and
;
4662 /* If we have address of a stack slot but it's not valid because the
4663 displacement is too large, compute the sum in a register.
4664 Handle all base registers here, not just fp/ap/sp, because on some
4665 targets (namely SH) we can also get too large displacements from
4666 big-endian corrections. */
4667 else if (GET_CODE (ad
) == PLUS
4668 && GET_CODE (XEXP (ad
, 0)) == REG
4669 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4670 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4671 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4673 /* Unshare the MEM rtx so we can safely alter it. */
4676 *memrefloc
= copy_rtx (*memrefloc
);
4677 loc
= &XEXP (*memrefloc
, 0);
4679 loc
= &XEXP (*loc
, 0);
4682 if (double_reg_address_ok
)
4684 /* Unshare the sum as well. */
4685 *loc
= ad
= copy_rtx (ad
);
4687 /* Reload the displacement into an index reg.
4688 We assume the frame pointer or arg pointer is a base reg. */
4689 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4690 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4696 /* If the sum of two regs is not necessarily valid,
4697 reload the sum into a base reg.
4698 That will at least work. */
4699 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4700 Pmode
, opnum
, type
, ind_levels
);
4702 return ! removed_and
;
4705 /* If we have an indexed stack slot, there are three possible reasons why
4706 it might be invalid: The index might need to be reloaded, the address
4707 might have been made by frame pointer elimination and hence have a
4708 constant out of range, or both reasons might apply.
4710 We can easily check for an index needing reload, but even if that is the
4711 case, we might also have an invalid constant. To avoid making the
4712 conservative assumption and requiring two reloads, we see if this address
4713 is valid when not interpreted strictly. If it is, the only problem is
4714 that the index needs a reload and find_reloads_address_1 will take care
4717 If we decide to do something here, it must be that
4718 `double_reg_address_ok' is true and that this address rtl was made by
4719 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4720 rework the sum so that the reload register will be added to the index.
4721 This is safe because we know the address isn't shared.
4723 We check for fp/ap/sp as both the first and second operand of the
4726 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4727 && GET_CODE (XEXP (ad
, 0)) == PLUS
4728 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4729 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4730 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4732 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4733 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4735 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4736 && ! memory_address_p (mode
, ad
))
4738 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4739 plus_constant (XEXP (XEXP (ad
, 0), 0),
4740 INTVAL (XEXP (ad
, 1))),
4741 XEXP (XEXP (ad
, 0), 1));
4742 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4743 GET_MODE (ad
), opnum
, type
, ind_levels
);
4744 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4750 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4751 && GET_CODE (XEXP (ad
, 0)) == PLUS
4752 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4753 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4754 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4756 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4757 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4759 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4760 && ! memory_address_p (mode
, ad
))
4762 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4763 XEXP (XEXP (ad
, 0), 0),
4764 plus_constant (XEXP (XEXP (ad
, 0), 1),
4765 INTVAL (XEXP (ad
, 1))));
4766 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4767 GET_MODE (ad
), opnum
, type
, ind_levels
);
4768 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4774 /* See if address becomes valid when an eliminable register
4775 in a sum is replaced. */
4778 if (GET_CODE (ad
) == PLUS
)
4779 tem
= subst_indexed_address (ad
);
4780 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4782 /* Ok, we win that way. Replace any additional eliminable
4785 subst_reg_equivs_changed
= 0;
4786 tem
= subst_reg_equivs (tem
, insn
);
4788 /* Make sure that didn't make the address invalid again. */
4790 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4797 /* If constants aren't valid addresses, reload the constant address
4799 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4801 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4802 Unshare it so we can safely alter it. */
4803 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4804 && CONSTANT_POOL_ADDRESS_P (ad
))
4806 *memrefloc
= copy_rtx (*memrefloc
);
4807 loc
= &XEXP (*memrefloc
, 0);
4809 loc
= &XEXP (*loc
, 0);
4812 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4814 return ! removed_and
;
4817 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4821 /* Find all pseudo regs appearing in AD
4822 that are eliminable in favor of equivalent values
4823 and do not have hard regs; replace them by their equivalents.
4824 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4825 front of it for pseudos that we have to replace with stack slots. */
4828 subst_reg_equivs (ad
, insn
)
4832 register RTX_CODE code
= GET_CODE (ad
);
4834 register const char *fmt
;
4850 register int regno
= REGNO (ad
);
4852 if (reg_equiv_constant
[regno
] != 0)
4854 subst_reg_equivs_changed
= 1;
4855 return reg_equiv_constant
[regno
];
4857 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4859 rtx mem
= make_memloc (ad
, regno
);
4860 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4862 subst_reg_equivs_changed
= 1;
4863 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4871 /* Quickly dispose of a common case. */
4872 if (XEXP (ad
, 0) == frame_pointer_rtx
4873 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4881 fmt
= GET_RTX_FORMAT (code
);
4882 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4884 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4888 /* Compute the sum of X and Y, making canonicalizations assumed in an
4889 address, namely: sum constant integers, surround the sum of two
4890 constants with a CONST, put the constant as the second operand, and
4891 group the constant on the outermost sum.
4893 This routine assumes both inputs are already in canonical form. */
4900 enum machine_mode mode
= GET_MODE (x
);
4902 if (mode
== VOIDmode
)
4903 mode
= GET_MODE (y
);
4905 if (mode
== VOIDmode
)
4908 if (GET_CODE (x
) == CONST_INT
)
4909 return plus_constant (y
, INTVAL (x
));
4910 else if (GET_CODE (y
) == CONST_INT
)
4911 return plus_constant (x
, INTVAL (y
));
4912 else if (CONSTANT_P (x
))
4913 tem
= x
, x
= y
, y
= tem
;
4915 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4916 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4918 /* Note that if the operands of Y are specified in the opposite
4919 order in the recursive calls below, infinite recursion will occur. */
4920 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4921 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4923 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4924 constant will have been placed second. */
4925 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4927 if (GET_CODE (x
) == CONST
)
4929 if (GET_CODE (y
) == CONST
)
4932 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4935 return gen_rtx_PLUS (mode
, x
, y
);
4938 /* If ADDR is a sum containing a pseudo register that should be
4939 replaced with a constant (from reg_equiv_constant),
4940 return the result of doing so, and also apply the associative
4941 law so that the result is more likely to be a valid address.
4942 (But it is not guaranteed to be one.)
4944 Note that at most one register is replaced, even if more are
4945 replaceable. Also, we try to put the result into a canonical form
4946 so it is more likely to be a valid address.
4948 In all other cases, return ADDR. */
4951 subst_indexed_address (addr
)
4954 rtx op0
= 0, op1
= 0, op2
= 0;
4958 if (GET_CODE (addr
) == PLUS
)
4960 /* Try to find a register to replace. */
4961 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4962 if (GET_CODE (op0
) == REG
4963 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4964 && reg_renumber
[regno
] < 0
4965 && reg_equiv_constant
[regno
] != 0)
4966 op0
= reg_equiv_constant
[regno
];
4967 else if (GET_CODE (op1
) == REG
4968 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4969 && reg_renumber
[regno
] < 0
4970 && reg_equiv_constant
[regno
] != 0)
4971 op1
= reg_equiv_constant
[regno
];
4972 else if (GET_CODE (op0
) == PLUS
4973 && (tem
= subst_indexed_address (op0
)) != op0
)
4975 else if (GET_CODE (op1
) == PLUS
4976 && (tem
= subst_indexed_address (op1
)) != op1
)
4981 /* Pick out up to three things to add. */
4982 if (GET_CODE (op1
) == PLUS
)
4983 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4984 else if (GET_CODE (op0
) == PLUS
)
4985 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4987 /* Compute the sum. */
4989 op1
= form_sum (op1
, op2
);
4991 op0
= form_sum (op0
, op1
);
4998 /* Update the REG_INC notes for an insn. It updates all REG_INC
4999 notes for the instruction which refer to REGNO the to refer
5000 to the reload number.
5002 INSN is the insn for which any REG_INC notes need updating.
5004 REGNO is the register number which has been reloaded.
5006 RELOADNUM is the reload number. */
5009 update_auto_inc_notes (insn
, regno
, reloadnum
)
5010 rtx insn ATTRIBUTE_UNUSED
;
5011 int regno ATTRIBUTE_UNUSED
;
5012 int reloadnum ATTRIBUTE_UNUSED
;
5017 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5018 if (REG_NOTE_KIND (link
) == REG_INC
5019 && REGNO (XEXP (link
, 0)) == regno
)
5020 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5024 /* Record the pseudo registers we must reload into hard registers in a
5025 subexpression of a would-be memory address, X referring to a value
5026 in mode MODE. (This function is not called if the address we find
5029 CONTEXT = 1 means we are considering regs as index regs,
5030 = 0 means we are considering them as base regs.
5032 OPNUM and TYPE specify the purpose of any reloads made.
5034 IND_LEVELS says how many levels of indirect addressing are
5035 supported at this point in the address.
5037 INSN, if nonzero, is the insn in which we do the reload. It is used
5038 to determine if we may generate output reloads.
5040 We return nonzero if X, as a whole, is reloaded or replaced. */
5042 /* Note that we take shortcuts assuming that no multi-reg machine mode
5043 occurs as part of an address.
5044 Also, this is not fully machine-customizable; it works for machines
5045 such as vaxes and 68000's and 32000's, but other possible machines
5046 could have addressing modes that this does not handle right. */
5049 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5050 enum machine_mode mode
;
5055 enum reload_type type
;
5059 register RTX_CODE code
= GET_CODE (x
);
5065 register rtx orig_op0
= XEXP (x
, 0);
5066 register rtx orig_op1
= XEXP (x
, 1);
5067 register RTX_CODE code0
= GET_CODE (orig_op0
);
5068 register RTX_CODE code1
= GET_CODE (orig_op1
);
5069 register rtx op0
= orig_op0
;
5070 register rtx op1
= orig_op1
;
5072 if (GET_CODE (op0
) == SUBREG
)
5074 op0
= SUBREG_REG (op0
);
5075 code0
= GET_CODE (op0
);
5076 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5077 op0
= gen_rtx_REG (word_mode
,
5078 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5081 if (GET_CODE (op1
) == SUBREG
)
5083 op1
= SUBREG_REG (op1
);
5084 code1
= GET_CODE (op1
);
5085 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5086 op1
= gen_rtx_REG (GET_MODE (op1
),
5087 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5090 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5091 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5093 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5094 type
, ind_levels
, insn
);
5095 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5096 type
, ind_levels
, insn
);
5099 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5100 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5102 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5103 type
, ind_levels
, insn
);
5104 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5105 type
, ind_levels
, insn
);
5108 else if (code0
== CONST_INT
|| code0
== CONST
5109 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5110 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5111 type
, ind_levels
, insn
);
5113 else if (code1
== CONST_INT
|| code1
== CONST
5114 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5115 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5116 type
, ind_levels
, insn
);
5118 else if (code0
== REG
&& code1
== REG
)
5120 if (REG_OK_FOR_INDEX_P (op0
)
5121 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5123 else if (REG_OK_FOR_INDEX_P (op1
)
5124 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5126 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5127 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5128 type
, ind_levels
, insn
);
5129 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5130 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5131 type
, ind_levels
, insn
);
5132 else if (REG_OK_FOR_INDEX_P (op1
))
5133 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5134 type
, ind_levels
, insn
);
5135 else if (REG_OK_FOR_INDEX_P (op0
))
5136 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5137 type
, ind_levels
, insn
);
5140 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5141 type
, ind_levels
, insn
);
5142 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5143 type
, ind_levels
, insn
);
5147 else if (code0
== REG
)
5149 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5150 type
, ind_levels
, insn
);
5151 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5152 type
, ind_levels
, insn
);
5155 else if (code1
== REG
)
5157 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5158 type
, ind_levels
, insn
);
5159 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5160 type
, ind_levels
, insn
);
5169 rtx op0
= XEXP (x
, 0);
5170 rtx op1
= XEXP (x
, 1);
5172 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5175 /* Currently, we only support {PRE,POST}_MODIFY constructs
5176 where a base register is {inc,dec}remented by the contents
5177 of another register or by a constant value. Thus, these
5178 operands must match. */
5179 if (op0
!= XEXP (op1
, 0))
5182 /* Require index register (or constant). Let's just handle the
5183 register case in the meantime... If the target allows
5184 auto-modify by a constant then we could try replacing a pseudo
5185 register with its equivalent constant where applicable. */
5186 if (REG_P (XEXP (op1
, 1)))
5187 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5188 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5189 opnum
, type
, ind_levels
, insn
);
5191 if (REG_P (XEXP (op1
, 0)))
5193 int regno
= REGNO (XEXP (op1
, 0));
5196 /* A register that is incremented cannot be constant! */
5197 if (regno
>= FIRST_PSEUDO_REGISTER
5198 && reg_equiv_constant
[regno
] != 0)
5201 /* Handle a register that is equivalent to a memory location
5202 which cannot be addressed directly. */
5203 if (reg_equiv_memory_loc
[regno
] != 0
5204 && (reg_equiv_address
[regno
] != 0
5205 || num_not_at_initial_offset
))
5207 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5209 if (reg_equiv_address
[regno
]
5210 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5212 /* First reload the memory location's address.
5213 We can't use ADDR_TYPE (type) here, because we need to
5214 write back the value after reading it, hence we actually
5215 need two registers. */
5216 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5217 &XEXP (tem
, 0), opnum
,
5221 /* Then reload the memory location into a base
5223 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5224 &XEXP (op1
, 0), BASE_REG_CLASS
,
5225 GET_MODE (x
), GET_MODE (x
), 0,
5226 0, opnum
, RELOAD_OTHER
);
5228 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5233 if (reg_renumber
[regno
] >= 0)
5234 regno
= reg_renumber
[regno
];
5236 /* We require a base register here... */
5237 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5239 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5240 &XEXP (op1
, 0), &XEXP (x
, 0),
5242 GET_MODE (x
), GET_MODE (x
), 0, 0,
5243 opnum
, RELOAD_OTHER
);
5245 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5258 if (GET_CODE (XEXP (x
, 0)) == REG
)
5260 register int regno
= REGNO (XEXP (x
, 0));
5264 /* A register that is incremented cannot be constant! */
5265 if (regno
>= FIRST_PSEUDO_REGISTER
5266 && reg_equiv_constant
[regno
] != 0)
5269 /* Handle a register that is equivalent to a memory location
5270 which cannot be addressed directly. */
5271 if (reg_equiv_memory_loc
[regno
] != 0
5272 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5274 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5275 if (reg_equiv_address
[regno
]
5276 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5278 /* First reload the memory location's address.
5279 We can't use ADDR_TYPE (type) here, because we need to
5280 write back the value after reading it, hence we actually
5281 need two registers. */
5282 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5283 &XEXP (tem
, 0), opnum
, type
,
5285 /* Put this inside a new increment-expression. */
5286 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5287 /* Proceed to reload that, as if it contained a register. */
5291 /* If we have a hard register that is ok as an index,
5292 don't make a reload. If an autoincrement of a nice register
5293 isn't "valid", it must be that no autoincrement is "valid".
5294 If that is true and something made an autoincrement anyway,
5295 this must be a special context where one is allowed.
5296 (For example, a "push" instruction.)
5297 We can't improve this address, so leave it alone. */
5299 /* Otherwise, reload the autoincrement into a suitable hard reg
5300 and record how much to increment by. */
5302 if (reg_renumber
[regno
] >= 0)
5303 regno
= reg_renumber
[regno
];
5304 if ((regno
>= FIRST_PSEUDO_REGISTER
5305 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5306 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5310 /* If we can output the register afterwards, do so, this
5311 saves the extra update.
5312 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5313 CALL_INSN - and it does not set CC0.
5314 But don't do this if we cannot directly address the
5315 memory location, since this will make it harder to
5316 reuse address reloads, and increases register pressure.
5317 Also don't do this if we can probably update x directly. */
5318 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5320 : reg_equiv_mem
[regno
]);
5321 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5322 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5323 && memory_operand (equiv
, GET_MODE (equiv
))
5325 && ! sets_cc0_p (PATTERN (insn
))
5327 && ! (icode
!= CODE_FOR_nothing
5328 && ((*insn_data
[icode
].operand
[0].predicate
)
5330 && ((*insn_data
[icode
].operand
[1].predicate
)
5333 /* We use the original pseudo for loc, so that
5334 emit_reload_insns() knows which pseudo this
5335 reload refers to and updates the pseudo rtx, not
5336 its equivalent memory location, as well as the
5337 corresponding entry in reg_last_reload_reg. */
5338 loc
= &XEXP (x_orig
, 0);
5341 = push_reload (x
, x
, loc
, loc
,
5342 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5343 GET_MODE (x
), GET_MODE (x
), 0, 0,
5344 opnum
, RELOAD_OTHER
);
5349 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5350 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5351 GET_MODE (x
), GET_MODE (x
), 0, 0,
5354 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5359 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5365 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5367 /* This is probably the result of a substitution, by eliminate_regs,
5368 of an equivalent address for a pseudo that was not allocated to a
5369 hard register. Verify that the specified address is valid and
5370 reload it into a register. */
5371 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5372 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5376 /* Since we know we are going to reload this item, don't decrement
5377 for the indirection level.
5379 Note that this is actually conservative: it would be slightly
5380 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5382 /* We can't use ADDR_TYPE (type) here, because we need to
5383 write back the value after reading it, hence we actually
5384 need two registers. */
5385 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5386 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5387 opnum
, type
, ind_levels
, insn
);
5389 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5390 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5391 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5393 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5395 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5397 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5404 /* This is probably the result of a substitution, by eliminate_regs, of
5405 an equivalent address for a pseudo that was not allocated to a hard
5406 register. Verify that the specified address is valid and reload it
5409 Since we know we are going to reload this item, don't decrement for
5410 the indirection level.
5412 Note that this is actually conservative: it would be slightly more
5413 efficient to use the value of SPILL_INDIRECT_LEVELS from
5416 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5417 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5418 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5419 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5420 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5425 register int regno
= REGNO (x
);
5427 if (reg_equiv_constant
[regno
] != 0)
5429 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5430 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5431 GET_MODE (x
), opnum
, type
, ind_levels
);
5435 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5436 that feeds this insn. */
5437 if (reg_equiv_mem
[regno
] != 0)
5439 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5440 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5441 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5446 if (reg_equiv_memory_loc
[regno
]
5447 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5449 rtx tem
= make_memloc (x
, regno
);
5450 if (reg_equiv_address
[regno
] != 0
5451 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5454 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5455 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5460 if (reg_renumber
[regno
] >= 0)
5461 regno
= reg_renumber
[regno
];
5463 if ((regno
>= FIRST_PSEUDO_REGISTER
5464 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5465 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5467 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5468 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5469 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5473 /* If a register appearing in an address is the subject of a CLOBBER
5474 in this insn, reload it into some other register to be safe.
5475 The CLOBBER is supposed to make the register unavailable
5476 from before this insn to after it. */
5477 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5479 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5480 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5481 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5488 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5490 /* If this is a SUBREG of a hard register and the resulting register
5491 is of the wrong class, reload the whole SUBREG. This avoids
5492 needless copies if SUBREG_REG is multi-word. */
5493 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5495 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5497 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5498 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5500 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5501 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5502 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5506 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5507 is larger than the class size, then reload the whole SUBREG. */
5510 enum reg_class
class = (context
? INDEX_REG_CLASS
5512 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5513 > reg_class_size
[class])
5515 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5517 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5518 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5530 register const char *fmt
= GET_RTX_FORMAT (code
);
5533 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5536 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5537 opnum
, type
, ind_levels
, insn
);
5544 /* X, which is found at *LOC, is a part of an address that needs to be
5545 reloaded into a register of class CLASS. If X is a constant, or if
5546 X is a PLUS that contains a constant, check that the constant is a
5547 legitimate operand and that we are supposed to be able to load
5548 it into the register.
5550 If not, force the constant into memory and reload the MEM instead.
5552 MODE is the mode to use, in case X is an integer constant.
5554 OPNUM and TYPE describe the purpose of any reloads made.
5556 IND_LEVELS says how many levels of indirect addressing this machine
5560 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5563 enum reg_class
class;
5564 enum machine_mode mode
;
5566 enum reload_type type
;
5570 && (! LEGITIMATE_CONSTANT_P (x
)
5571 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5575 tem
= x
= force_const_mem (mode
, x
);
5576 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5577 opnum
, type
, ind_levels
, 0);
5580 else if (GET_CODE (x
) == PLUS
5581 && CONSTANT_P (XEXP (x
, 1))
5582 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5583 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5587 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5588 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5589 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5590 opnum
, type
, ind_levels
, 0);
5593 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5594 mode
, VOIDmode
, 0, 0, opnum
, type
);
5597 /* X, a subreg of a pseudo, is a part of an address that needs to be
5600 If the pseudo is equivalent to a memory location that cannot be directly
5601 addressed, make the necessary address reloads.
5603 If address reloads have been necessary, or if the address is changed
5604 by register elimination, return the rtx of the memory location;
5605 otherwise, return X.
5607 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5610 OPNUM and TYPE identify the purpose of the reload.
5612 IND_LEVELS says how many levels of indirect addressing are
5613 supported at this point in the address.
5615 INSN, if nonzero, is the insn in which we do the reload. It is used
5616 to determine where to put USEs for pseudos that we have to replace with
5620 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5625 enum reload_type type
;
5629 int regno
= REGNO (SUBREG_REG (x
));
5631 if (reg_equiv_memory_loc
[regno
])
5633 /* If the address is not directly addressable, or if the address is not
5634 offsettable, then it must be replaced. */
5636 && (reg_equiv_address
[regno
]
5637 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5640 if (force_replace
|| num_not_at_initial_offset
)
5642 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5644 /* If the address changes because of register elimination, then
5645 it must be replaced. */
5647 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5649 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5650 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5651 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5653 if (BYTES_BIG_ENDIAN
)
5655 offset
+= MIN (inner_size
, UNITS_PER_WORD
);
5656 offset
-= MIN (outer_size
, UNITS_PER_WORD
);
5658 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5659 PUT_MODE (tem
, GET_MODE (x
));
5661 /* If this was a paradoxical subreg that we replaced, the
5662 resulting memory must be sufficiently aligned to allow
5663 us to widen the mode of the memory. */
5664 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5668 base
= XEXP (tem
, 0);
5669 if (GET_CODE (base
) == PLUS
)
5671 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5672 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5674 base
= XEXP (base
, 0);
5676 if (GET_CODE (base
) != REG
5677 || (REGNO_POINTER_ALIGN (REGNO (base
))
5678 < outer_size
* BITS_PER_UNIT
))
5682 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5683 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5686 /* If this is not a toplevel operand, find_reloads doesn't see
5687 this substitution. We have to emit a USE of the pseudo so
5688 that delete_output_reload can see it. */
5689 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5690 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5698 /* Substitute into the current INSN the registers into which we have reloaded
5699 the things that need reloading. The array `replacements'
5700 contains the locations of all pointers that must be changed
5701 and says what to replace them with.
5703 Return the rtx that X translates into; usually X, but modified. */
5706 subst_reloads (insn
)
5711 for (i
= 0; i
< n_replacements
; i
++)
5713 register struct replacement
*r
= &replacements
[i
];
5714 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5717 /* If we're replacing a LABEL_REF with a register, add a
5718 REG_LABEL note to indicate to flow which label this
5719 register refers to. */
5720 if (GET_CODE (*r
->where
) == LABEL_REF
5721 && GET_CODE (insn
) == JUMP_INSN
)
5722 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
5723 XEXP (*r
->where
, 0),
5726 /* Encapsulate RELOADREG so its machine mode matches what
5727 used to be there. Note that gen_lowpart_common will
5728 do the wrong thing if RELOADREG is multi-word. RELOADREG
5729 will always be a REG here. */
5730 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5731 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5733 /* If we are putting this into a SUBREG and RELOADREG is a
5734 SUBREG, we would be making nested SUBREGs, so we have to fix
5735 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5737 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5739 if (GET_MODE (*r
->subreg_loc
)
5740 == GET_MODE (SUBREG_REG (reloadreg
)))
5741 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5744 *r
->where
= SUBREG_REG (reloadreg
);
5745 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5749 *r
->where
= reloadreg
;
5751 /* If reload got no reg and isn't optional, something's wrong. */
5752 else if (! rld
[r
->what
].optional
)
5757 /* Make a copy of any replacements being done into X and move those copies
5758 to locations in Y, a copy of X. We only look at the highest level of
5762 copy_replacements (x
, y
)
5767 enum rtx_code code
= GET_CODE (x
);
5768 const char *fmt
= GET_RTX_FORMAT (code
);
5769 struct replacement
*r
;
5771 /* We can't support X being a SUBREG because we might then need to know its
5772 location if something inside it was replaced. */
5776 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5778 for (j
= 0; j
< n_replacements
; j
++)
5780 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5782 r
= &replacements
[n_replacements
++];
5783 r
->where
= replacements
[j
].where
;
5784 r
->subreg_loc
= &XEXP (y
, i
);
5785 r
->what
= replacements
[j
].what
;
5786 r
->mode
= replacements
[j
].mode
;
5788 else if (replacements
[j
].where
== &XEXP (x
, i
))
5790 r
= &replacements
[n_replacements
++];
5791 r
->where
= &XEXP (y
, i
);
5793 r
->what
= replacements
[j
].what
;
5794 r
->mode
= replacements
[j
].mode
;
5799 /* Change any replacements being done to *X to be done to *Y */
5802 move_replacements (x
, y
)
5808 for (i
= 0; i
< n_replacements
; i
++)
5809 if (replacements
[i
].subreg_loc
== x
)
5810 replacements
[i
].subreg_loc
= y
;
5811 else if (replacements
[i
].where
== x
)
5813 replacements
[i
].where
= y
;
5814 replacements
[i
].subreg_loc
= 0;
5818 /* If LOC was scheduled to be replaced by something, return the replacement.
5819 Otherwise, return *LOC. */
5822 find_replacement (loc
)
5825 struct replacement
*r
;
5827 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5829 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5831 if (reloadreg
&& r
->where
== loc
)
5833 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5834 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5838 else if (reloadreg
&& r
->subreg_loc
== loc
)
5840 /* RELOADREG must be either a REG or a SUBREG.
5842 ??? Is it actually still ever a SUBREG? If so, why? */
5844 if (GET_CODE (reloadreg
) == REG
)
5845 return gen_rtx_REG (GET_MODE (*loc
),
5846 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5847 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5850 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5851 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5855 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5856 what's inside and make a new rtl if so. */
5857 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5858 || GET_CODE (*loc
) == MULT
)
5860 rtx x
= find_replacement (&XEXP (*loc
, 0));
5861 rtx y
= find_replacement (&XEXP (*loc
, 1));
5863 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5864 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5870 /* Return nonzero if register in range [REGNO, ENDREGNO)
5871 appears either explicitly or implicitly in X
5872 other than being stored into (except for earlyclobber operands).
5874 References contained within the substructure at LOC do not count.
5875 LOC may be zero, meaning don't ignore anything.
5877 This is similar to refers_to_regno_p in rtlanal.c except that we
5878 look at equivalences for pseudos that didn't get hard registers. */
5881 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5882 unsigned int regno
, endregno
;
5895 code
= GET_CODE (x
);
5902 /* If this is a pseudo, a hard register must not have been allocated.
5903 X must therefore either be a constant or be in memory. */
5904 if (r
>= FIRST_PSEUDO_REGISTER
)
5906 if (reg_equiv_memory_loc
[r
])
5907 return refers_to_regno_for_reload_p (regno
, endregno
,
5908 reg_equiv_memory_loc
[r
],
5911 if (reg_equiv_constant
[r
])
5917 return (endregno
> r
5918 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5919 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5923 /* If this is a SUBREG of a hard reg, we can see exactly which
5924 registers are being modified. Otherwise, handle normally. */
5925 if (GET_CODE (SUBREG_REG (x
)) == REG
5926 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5928 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5929 unsigned int inner_endregno
5930 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5931 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5933 return endregno
> inner_regno
&& regno
< inner_endregno
;
5939 if (&SET_DEST (x
) != loc
5940 /* Note setting a SUBREG counts as referring to the REG it is in for
5941 a pseudo but not for hard registers since we can
5942 treat each word individually. */
5943 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5944 && loc
!= &SUBREG_REG (SET_DEST (x
))
5945 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5946 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5947 && refers_to_regno_for_reload_p (regno
, endregno
,
5948 SUBREG_REG (SET_DEST (x
)),
5950 /* If the output is an earlyclobber operand, this is
5952 || ((GET_CODE (SET_DEST (x
)) != REG
5953 || earlyclobber_operand_p (SET_DEST (x
)))
5954 && refers_to_regno_for_reload_p (regno
, endregno
,
5955 SET_DEST (x
), loc
))))
5958 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5967 /* X does not match, so try its subexpressions. */
5969 fmt
= GET_RTX_FORMAT (code
);
5970 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5972 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5980 if (refers_to_regno_for_reload_p (regno
, endregno
,
5984 else if (fmt
[i
] == 'E')
5987 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5988 if (loc
!= &XVECEXP (x
, i
, j
)
5989 && refers_to_regno_for_reload_p (regno
, endregno
,
5990 XVECEXP (x
, i
, j
), loc
))
5997 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5998 we check if any register number in X conflicts with the relevant register
5999 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6000 contains a MEM (we don't bother checking for memory addresses that can't
6001 conflict because we expect this to be a rare case.
6003 This function is similar to reg_overlap_mention_p in rtlanal.c except
6004 that we look at equivalences for pseudos that didn't get hard registers. */
6007 reg_overlap_mentioned_for_reload_p (x
, in
)
6010 int regno
, endregno
;
6012 /* Overly conservative. */
6013 if (GET_CODE (x
) == STRICT_LOW_PART
)
6016 /* If either argument is a constant, then modifying X can not affect IN. */
6017 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6019 else if (GET_CODE (x
) == SUBREG
)
6021 regno
= REGNO (SUBREG_REG (x
));
6022 if (regno
< FIRST_PSEUDO_REGISTER
)
6023 regno
+= SUBREG_WORD (x
);
6025 else if (GET_CODE (x
) == REG
)
6029 /* If this is a pseudo, it must not have been assigned a hard register.
6030 Therefore, it must either be in memory or be a constant. */
6032 if (regno
>= FIRST_PSEUDO_REGISTER
)
6034 if (reg_equiv_memory_loc
[regno
])
6035 return refers_to_mem_for_reload_p (in
);
6036 else if (reg_equiv_constant
[regno
])
6041 else if (GET_CODE (x
) == MEM
)
6042 return refers_to_mem_for_reload_p (in
);
6043 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6044 || GET_CODE (x
) == CC0
)
6045 return reg_mentioned_p (x
, in
);
6049 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6050 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6052 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
6055 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6059 refers_to_mem_for_reload_p (x
)
6065 if (GET_CODE (x
) == MEM
)
6068 if (GET_CODE (x
) == REG
)
6069 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6070 && reg_equiv_memory_loc
[REGNO (x
)]);
6072 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6073 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6075 && (GET_CODE (XEXP (x
, i
)) == MEM
6076 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6082 /* Check the insns before INSN to see if there is a suitable register
6083 containing the same value as GOAL.
6084 If OTHER is -1, look for a register in class CLASS.
6085 Otherwise, just see if register number OTHER shares GOAL's value.
6087 Return an rtx for the register found, or zero if none is found.
6089 If RELOAD_REG_P is (short *)1,
6090 we reject any hard reg that appears in reload_reg_rtx
6091 because such a hard reg is also needed coming into this insn.
6093 If RELOAD_REG_P is any other nonzero value,
6094 it is a vector indexed by hard reg number
6095 and we reject any hard reg whose element in the vector is nonnegative
6096 as well as any that appears in reload_reg_rtx.
6098 If GOAL is zero, then GOALREG is a register number; we look
6099 for an equivalent for that register.
6101 MODE is the machine mode of the value we want an equivalence for.
6102 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6104 This function is used by jump.c as well as in the reload pass.
6106 If GOAL is the sum of the stack pointer and a constant, we treat it
6107 as if it were a constant except that sp is required to be unchanging. */
6110 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6113 enum reg_class
class;
6115 short *reload_reg_p
;
6117 enum machine_mode mode
;
6119 register rtx p
= insn
;
6120 rtx goaltry
, valtry
, value
, where
;
6122 register int regno
= -1;
6126 int goal_mem_addr_varies
= 0;
6127 int need_stable_sp
= 0;
6133 else if (GET_CODE (goal
) == REG
)
6134 regno
= REGNO (goal
);
6135 else if (GET_CODE (goal
) == MEM
)
6137 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6138 if (MEM_VOLATILE_P (goal
))
6140 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6142 /* An address with side effects must be reexecuted. */
6157 else if (CONSTANT_P (goal
))
6159 else if (GET_CODE (goal
) == PLUS
6160 && XEXP (goal
, 0) == stack_pointer_rtx
6161 && CONSTANT_P (XEXP (goal
, 1)))
6162 goal_const
= need_stable_sp
= 1;
6163 else if (GET_CODE (goal
) == PLUS
6164 && XEXP (goal
, 0) == frame_pointer_rtx
6165 && CONSTANT_P (XEXP (goal
, 1)))
6170 /* Scan insns back from INSN, looking for one that copies
6171 a value into or out of GOAL.
6172 Stop and give up if we reach a label. */
6177 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6180 if (GET_CODE (p
) == INSN
6181 /* If we don't want spill regs ... */
6182 && (! (reload_reg_p
!= 0
6183 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6184 /* ... then ignore insns introduced by reload; they aren't
6185 useful and can cause results in reload_as_needed to be
6186 different from what they were when calculating the need for
6187 spills. If we notice an input-reload insn here, we will
6188 reject it below, but it might hide a usable equivalent.
6189 That makes bad code. It may even abort: perhaps no reg was
6190 spilled for this insn because it was assumed we would find
6192 || INSN_UID (p
) < reload_first_uid
))
6195 pat
= single_set (p
);
6197 /* First check for something that sets some reg equal to GOAL. */
6200 && true_regnum (SET_SRC (pat
)) == regno
6201 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6204 && true_regnum (SET_DEST (pat
)) == regno
6205 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6207 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6208 /* When looking for stack pointer + const,
6209 make sure we don't use a stack adjust. */
6210 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6211 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6213 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6214 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6216 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6217 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6218 /* If we are looking for a constant,
6219 and something equivalent to that constant was copied
6220 into a reg, we can use that reg. */
6221 || (goal_const
&& REG_NOTES (p
) != 0
6222 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6223 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6225 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6226 || (GET_CODE (SET_DEST (pat
)) == REG
6227 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6228 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6230 && GET_CODE (goal
) == CONST_INT
6232 = operand_subword (XEXP (tem
, 0), 0, 0,
6234 && rtx_equal_p (goal
, goaltry
)
6236 = operand_subword (SET_DEST (pat
), 0, 0,
6238 && (valueno
= true_regnum (valtry
)) >= 0)))
6239 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6241 && GET_CODE (SET_DEST (pat
)) == REG
6242 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6243 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6245 && GET_CODE (goal
) == CONST_INT
6246 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6248 && rtx_equal_p (goal
, goaltry
)
6250 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6251 && (valueno
= true_regnum (valtry
)) >= 0)))
6255 if (valueno
!= other
)
6258 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6264 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6265 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6278 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6279 (or copying VALUE into GOAL, if GOAL is also a register).
6280 Now verify that VALUE is really valid. */
6282 /* VALUENO is the register number of VALUE; a hard register. */
6284 /* Don't try to re-use something that is killed in this insn. We want
6285 to be able to trust REG_UNUSED notes. */
6286 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6289 /* If we propose to get the value from the stack pointer or if GOAL is
6290 a MEM based on the stack pointer, we need a stable SP. */
6291 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6292 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6296 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6297 if (GET_MODE (value
) != mode
)
6300 /* Reject VALUE if it was loaded from GOAL
6301 and is also a register that appears in the address of GOAL. */
6303 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6304 && refers_to_regno_for_reload_p (valueno
,
6306 + HARD_REGNO_NREGS (valueno
, mode
)),
6310 /* Reject registers that overlap GOAL. */
6312 if (!goal_mem
&& !goal_const
6313 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6314 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6317 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6318 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6320 /* Reject VALUE if it is one of the regs reserved for reloads.
6321 Reload1 knows how to reuse them anyway, and it would get
6322 confused if we allocated one without its knowledge.
6323 (Now that insns introduced by reload are ignored above,
6324 this case shouldn't happen, but I'm not positive.) */
6326 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6329 for (i
= 0; i
< valuenregs
; ++i
)
6330 if (reload_reg_p
[valueno
+ i
] >= 0)
6334 /* Reject VALUE if it is a register being used for an input reload
6335 even if it is not one of those reserved. */
6337 if (reload_reg_p
!= 0)
6340 for (i
= 0; i
< n_reloads
; i
++)
6341 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6343 int regno1
= REGNO (rld
[i
].reg_rtx
);
6344 int nregs1
= HARD_REGNO_NREGS (regno1
,
6345 GET_MODE (rld
[i
].reg_rtx
));
6346 if (regno1
< valueno
+ valuenregs
6347 && regno1
+ nregs1
> valueno
)
6353 /* We must treat frame pointer as varying here,
6354 since it can vary--in a nonlocal goto as generated by expand_goto. */
6355 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6357 /* Now verify that the values of GOAL and VALUE remain unaltered
6358 until INSN is reached. */
6367 /* Don't trust the conversion past a function call
6368 if either of the two is in a call-clobbered register, or memory. */
6369 if (GET_CODE (p
) == CALL_INSN
)
6373 if (goal_mem
|| need_stable_sp
)
6376 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6377 for (i
= 0; i
< nregs
; ++i
)
6378 if (call_used_regs
[regno
+ i
])
6381 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6382 for (i
= 0; i
< valuenregs
; ++i
)
6383 if (call_used_regs
[valueno
+ i
])
6387 #ifdef NON_SAVING_SETJMP
6388 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6389 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6397 /* Watch out for unspec_volatile, and volatile asms. */
6398 if (volatile_insn_p (pat
))
6401 /* If this insn P stores in either GOAL or VALUE, return 0.
6402 If GOAL is a memory ref and this insn writes memory, return 0.
6403 If GOAL is a memory ref and its address is not constant,
6404 and this insn P changes a register used in GOAL, return 0. */
6406 if (GET_CODE (pat
) == COND_EXEC
)
6407 pat
= COND_EXEC_CODE (pat
);
6408 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6410 register rtx dest
= SET_DEST (pat
);
6411 while (GET_CODE (dest
) == SUBREG
6412 || GET_CODE (dest
) == ZERO_EXTRACT
6413 || GET_CODE (dest
) == SIGN_EXTRACT
6414 || GET_CODE (dest
) == STRICT_LOW_PART
)
6415 dest
= XEXP (dest
, 0);
6416 if (GET_CODE (dest
) == REG
)
6418 register int xregno
= REGNO (dest
);
6420 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6421 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6424 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6426 if (xregno
< valueno
+ valuenregs
6427 && xregno
+ xnregs
> valueno
)
6429 if (goal_mem_addr_varies
6430 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6432 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6435 else if (goal_mem
&& GET_CODE (dest
) == MEM
6436 && ! push_operand (dest
, GET_MODE (dest
)))
6438 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6439 && reg_equiv_memory_loc
[regno
] != 0)
6441 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6444 else if (GET_CODE (pat
) == PARALLEL
)
6447 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6449 register rtx v1
= XVECEXP (pat
, 0, i
);
6450 if (GET_CODE (v1
) == COND_EXEC
)
6451 v1
= COND_EXEC_CODE (v1
);
6452 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6454 register rtx dest
= SET_DEST (v1
);
6455 while (GET_CODE (dest
) == SUBREG
6456 || GET_CODE (dest
) == ZERO_EXTRACT
6457 || GET_CODE (dest
) == SIGN_EXTRACT
6458 || GET_CODE (dest
) == STRICT_LOW_PART
)
6459 dest
= XEXP (dest
, 0);
6460 if (GET_CODE (dest
) == REG
)
6462 register int xregno
= REGNO (dest
);
6464 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6465 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6468 if (xregno
< regno
+ nregs
6469 && xregno
+ xnregs
> regno
)
6471 if (xregno
< valueno
+ valuenregs
6472 && xregno
+ xnregs
> valueno
)
6474 if (goal_mem_addr_varies
6475 && reg_overlap_mentioned_for_reload_p (dest
,
6478 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6481 else if (goal_mem
&& GET_CODE (dest
) == MEM
6482 && ! push_operand (dest
, GET_MODE (dest
)))
6484 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6485 && reg_equiv_memory_loc
[regno
] != 0)
6487 else if (need_stable_sp
6488 && push_operand (dest
, GET_MODE (dest
)))
6494 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6498 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6499 link
= XEXP (link
, 1))
6501 pat
= XEXP (link
, 0);
6502 if (GET_CODE (pat
) == CLOBBER
)
6504 register rtx dest
= SET_DEST (pat
);
6506 if (GET_CODE (dest
) == REG
)
6508 register int xregno
= REGNO (dest
);
6510 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6512 if (xregno
< regno
+ nregs
6513 && xregno
+ xnregs
> regno
)
6515 else if (xregno
< valueno
+ valuenregs
6516 && xregno
+ xnregs
> valueno
)
6518 else if (goal_mem_addr_varies
6519 && reg_overlap_mentioned_for_reload_p (dest
,
6524 else if (goal_mem
&& GET_CODE (dest
) == MEM
6525 && ! push_operand (dest
, GET_MODE (dest
)))
6527 else if (need_stable_sp
6528 && push_operand (dest
, GET_MODE (dest
)))
6535 /* If this insn auto-increments or auto-decrements
6536 either regno or valueno, return 0 now.
6537 If GOAL is a memory ref and its address is not constant,
6538 and this insn P increments a register used in GOAL, return 0. */
6542 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6543 if (REG_NOTE_KIND (link
) == REG_INC
6544 && GET_CODE (XEXP (link
, 0)) == REG
)
6546 register int incno
= REGNO (XEXP (link
, 0));
6547 if (incno
< regno
+ nregs
&& incno
>= regno
)
6549 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6551 if (goal_mem_addr_varies
6552 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6562 /* Find a place where INCED appears in an increment or decrement operator
6563 within X, and return the amount INCED is incremented or decremented by.
6564 The value is always positive. */
6567 find_inc_amount (x
, inced
)
6570 register enum rtx_code code
= GET_CODE (x
);
6571 register const char *fmt
;
6576 register rtx addr
= XEXP (x
, 0);
6577 if ((GET_CODE (addr
) == PRE_DEC
6578 || GET_CODE (addr
) == POST_DEC
6579 || GET_CODE (addr
) == PRE_INC
6580 || GET_CODE (addr
) == POST_INC
)
6581 && XEXP (addr
, 0) == inced
)
6582 return GET_MODE_SIZE (GET_MODE (x
));
6583 else if ((GET_CODE (addr
) == PRE_MODIFY
6584 || GET_CODE (addr
) == POST_MODIFY
)
6585 && GET_CODE (XEXP (addr
, 1)) == PLUS
6586 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6587 && XEXP (addr
, 0) == inced
6588 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6590 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6591 return i
< 0 ? -i
: i
;
6595 fmt
= GET_RTX_FORMAT (code
);
6596 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6600 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6607 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6609 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6619 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6620 If SETS is nonzero, also consider SETs. */
6623 regno_clobbered_p (regno
, insn
, mode
, sets
)
6626 enum machine_mode mode
;
6629 int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6630 int endregno
= regno
+ nregs
;
6632 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6633 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6634 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6636 int test
= REGNO (XEXP (PATTERN (insn
), 0));
6638 return test
>= regno
&& test
< endregno
;
6641 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6643 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6647 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6648 if ((GET_CODE (elt
) == CLOBBER
6649 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6650 && GET_CODE (XEXP (elt
, 0)) == REG
)
6652 int test
= REGNO (XEXP (elt
, 0));
6654 if (test
>= regno
&& test
< endregno
)
6663 static const char *reload_when_needed_name
[] =
6666 "RELOAD_FOR_OUTPUT",
6668 "RELOAD_FOR_INPUT_ADDRESS",
6669 "RELOAD_FOR_INPADDR_ADDRESS",
6670 "RELOAD_FOR_OUTPUT_ADDRESS",
6671 "RELOAD_FOR_OUTADDR_ADDRESS",
6672 "RELOAD_FOR_OPERAND_ADDRESS",
6673 "RELOAD_FOR_OPADDR_ADDR",
6675 "RELOAD_FOR_OTHER_ADDRESS"
6678 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6680 /* These functions are used to print the variables set by 'find_reloads' */
6683 debug_reload_to_stream (f
)
6691 for (r
= 0; r
< n_reloads
; r
++)
6693 fprintf (f
, "Reload %d: ", r
);
6697 fprintf (f
, "reload_in (%s) = ",
6698 GET_MODE_NAME (rld
[r
].inmode
));
6699 print_inline_rtx (f
, rld
[r
].in
, 24);
6700 fprintf (f
, "\n\t");
6703 if (rld
[r
].out
!= 0)
6705 fprintf (f
, "reload_out (%s) = ",
6706 GET_MODE_NAME (rld
[r
].outmode
));
6707 print_inline_rtx (f
, rld
[r
].out
, 24);
6708 fprintf (f
, "\n\t");
6711 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6713 fprintf (f
, "%s (opnum = %d)",
6714 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6717 if (rld
[r
].optional
)
6718 fprintf (f
, ", optional");
6720 if (rld
[r
].nongroup
)
6721 fprintf (f
, ", nongroup");
6723 if (rld
[r
].inc
!= 0)
6724 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6726 if (rld
[r
].nocombine
)
6727 fprintf (f
, ", can't combine");
6729 if (rld
[r
].secondary_p
)
6730 fprintf (f
, ", secondary_reload_p");
6732 if (rld
[r
].in_reg
!= 0)
6734 fprintf (f
, "\n\treload_in_reg: ");
6735 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6738 if (rld
[r
].out_reg
!= 0)
6740 fprintf (f
, "\n\treload_out_reg: ");
6741 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6744 if (rld
[r
].reg_rtx
!= 0)
6746 fprintf (f
, "\n\treload_reg_rtx: ");
6747 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6751 if (rld
[r
].secondary_in_reload
!= -1)
6753 fprintf (f
, "%ssecondary_in_reload = %d",
6754 prefix
, rld
[r
].secondary_in_reload
);
6758 if (rld
[r
].secondary_out_reload
!= -1)
6759 fprintf (f
, "%ssecondary_out_reload = %d\n",
6760 prefix
, rld
[r
].secondary_out_reload
);
6763 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6765 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6766 insn_data
[rld
[r
].secondary_in_icode
].name
);
6770 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6771 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6772 insn_data
[rld
[r
].secondary_out_icode
].name
);
6781 debug_reload_to_stream (stderr
);