1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
159 #include "function.h"
160 #include "insn-config.h"
162 #include "hard-reg-set.h"
167 #include "basic-block.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top
; /* index to top stack element */
186 HARD_REG_SET reg_set
; /* set of live registers */
187 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
190 /* This is used to carry information about basic blocks. It is
191 attached to the AUX field of the standard CFG block. */
193 typedef struct block_info_def
195 struct stack_def stack_in
; /* Input stack configuration. */
196 HARD_REG_SET out_reg_set
; /* Stack regs live on output. */
197 int done
; /* True if block already converted. */
200 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202 /* Passed to change_stack to indicate where to emit insns. */
209 /* We use this array to cache info about insns, because otherwise we
210 spend too much time in stack_regs_mentioned_p.
212 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
213 the insn uses stack registers, two indicates the insn does not use
215 static varray_type stack_regs_mentioned_data
;
217 /* The block we're currently working on. */
218 static basic_block current_block
;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Used to initialize uninitialized registers. */
230 /* Forward declarations */
232 static int stack_regs_mentioned_p
PARAMS ((rtx pat
));
233 static void straighten_stack
PARAMS ((rtx
, stack
));
234 static void pop_stack
PARAMS ((stack
, int));
235 static rtx
*get_true_reg
PARAMS ((rtx
*));
237 static int check_asm_stack_operands
PARAMS ((rtx
));
238 static int get_asm_operand_n_inputs
PARAMS ((rtx
));
239 static rtx stack_result
PARAMS ((tree
));
240 static void replace_reg
PARAMS ((rtx
*, int));
241 static void remove_regno_note
PARAMS ((rtx
, enum reg_note
, int));
242 static int get_hard_regnum
PARAMS ((stack
, rtx
));
243 static void delete_insn_for_stacker
PARAMS ((rtx
));
244 static rtx emit_pop_insn
PARAMS ((rtx
, stack
, rtx
,
246 static void emit_swap_insn
PARAMS ((rtx
, stack
, rtx
));
247 static void move_for_stack_reg
PARAMS ((rtx
, stack
, rtx
));
248 static int swap_rtx_condition_1
PARAMS ((rtx
));
249 static int swap_rtx_condition
PARAMS ((rtx
));
250 static void compare_for_stack_reg
PARAMS ((rtx
, stack
, rtx
));
251 static void subst_stack_regs_pat
PARAMS ((rtx
, stack
, rtx
));
252 static void subst_asm_stack_regs
PARAMS ((rtx
, stack
));
253 static void subst_stack_regs
PARAMS ((rtx
, stack
));
254 static void change_stack
PARAMS ((rtx
, stack
, stack
,
256 static int convert_regs_entry
PARAMS ((void));
257 static void convert_regs_exit
PARAMS ((void));
258 static int convert_regs_1
PARAMS ((FILE *, basic_block
));
259 static int convert_regs_2
PARAMS ((FILE *, basic_block
));
260 static int convert_regs
PARAMS ((FILE *));
261 static void print_stack
PARAMS ((FILE *, stack
));
262 static rtx next_flags_user
PARAMS ((rtx
));
263 static void record_label_references
PARAMS ((rtx
, rtx
));
265 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
268 stack_regs_mentioned_p (pat
)
271 register const char *fmt
;
274 if (STACK_REG_P (pat
))
277 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
278 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
284 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
285 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
288 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
295 /* Return nonzero if INSN mentions stacked registers, else return zero. */
298 stack_regs_mentioned (insn
)
301 unsigned int uid
, max
;
307 uid
= INSN_UID (insn
);
308 max
= VARRAY_SIZE (stack_regs_mentioned_data
);
311 /* Allocate some extra size to avoid too many reallocs, but
312 do not grow too quickly. */
313 max
= uid
+ uid
/ 20;
314 VARRAY_GROW (stack_regs_mentioned_data
, max
);
317 test
= VARRAY_CHAR (stack_regs_mentioned_data
, uid
);
320 /* This insn has yet to be examined. Do so now. */
321 test
= stack_regs_mentioned_p (PATTERN (insn
)) ? 1 : 2;
322 VARRAY_CHAR (stack_regs_mentioned_data
, uid
) = test
;
328 static rtx ix86_flags_rtx
;
331 next_flags_user (insn
)
334 /* Search forward looking for the first use of this value.
335 Stop at block boundaries. */
337 while (insn
!= current_block
->end
)
339 insn
= NEXT_INSN (insn
);
341 if (INSN_P (insn
) && reg_mentioned_p (ix86_flags_rtx
, PATTERN (insn
)))
344 if (GET_CODE (insn
) == CALL_INSN
)
350 /* Reorganise the stack into ascending numbers,
354 straighten_stack (insn
, regstack
)
358 struct stack_def temp_stack
;
361 /* If there is only a single register on the stack, then the stack is
362 already in increasing order and no reorganization is needed.
364 Similarly if the stack is empty. */
365 if (regstack
->top
<= 0)
368 COPY_HARD_REG_SET (temp_stack
.reg_set
, regstack
->reg_set
);
370 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
371 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
373 change_stack (insn
, regstack
, &temp_stack
, EMIT_AFTER
);
376 /* Pop a register from the stack */
379 pop_stack (regstack
, regno
)
383 int top
= regstack
->top
;
385 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
387 /* If regno was not at the top of stack then adjust stack */
388 if (regstack
->reg
[top
] != regno
)
391 for (i
= regstack
->top
; i
>= 0; i
--)
392 if (regstack
->reg
[i
] == regno
)
395 for (j
= i
; j
< top
; j
++)
396 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
402 /* Convert register usage from "flat" register file usage to a "stack
403 register file. FIRST is the first insn in the function, FILE is the
406 Construct a CFG and run life analysis. Then convert each insn one
407 by one. Run a last jump_optimize pass, if optimizing, to eliminate
408 code duplication created when the converter inserts pop insns on
412 reg_to_stack (first
, file
)
420 /* See if there is something to do. Flow analysis is quite
421 expensive so we might save some compilation time. */
422 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
423 if (regs_ever_live
[i
])
425 if (i
> LAST_STACK_REG
)
428 /* Ok, floating point instructions exist. If not optimizing,
429 build the CFG and run life analysis. */
430 find_basic_blocks (first
, max_reg_num (), file
);
431 count_or_remove_death_notes (NULL
, 1);
432 life_analysis (first
, file
, PROP_DEATH_NOTES
);
434 /* Set up block info for each basic block. */
435 bi
= (block_info
) xcalloc ((n_basic_blocks
+ 1), sizeof (*bi
));
436 for (i
= n_basic_blocks
- 1; i
>= 0; --i
)
437 BASIC_BLOCK (i
)->aux
= bi
+ i
;
438 EXIT_BLOCK_PTR
->aux
= bi
+ n_basic_blocks
;
440 /* Create the replacement registers up front. */
441 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
443 enum machine_mode mode
;
444 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
446 mode
= GET_MODE_WIDER_MODE (mode
))
447 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
448 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
450 mode
= GET_MODE_WIDER_MODE (mode
))
451 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
454 ix86_flags_rtx
= gen_rtx_REG (CCmode
, FLAGS_REG
);
456 /* A QNaN for initializing uninitialized variables.
458 ??? We can't load from constant memory in PIC mode, because
459 we're insertting these instructions before the prologue and
460 the PIC register hasn't been set up. In that case, fall back
461 on zero, which we can get from `ldz'. */
464 nan
= CONST0_RTX (SFmode
);
467 nan
= gen_lowpart (SFmode
, GEN_INT (0x7fc00000));
468 nan
= force_const_mem (SFmode
, nan
);
471 /* Allocate a cache for stack_regs_mentioned. */
472 max_uid
= get_max_uid ();
473 VARRAY_CHAR_INIT (stack_regs_mentioned_data
, max_uid
+ 1,
474 "stack_regs_mentioned cache");
476 if (convert_regs (file
) && optimize
)
478 jump_optimize (first
, JUMP_CROSS_JUMP_DEATH_MATTERS
,
479 !JUMP_NOOP_MOVES
, !JUMP_AFTER_REGSCAN
);
483 VARRAY_FREE (stack_regs_mentioned_data
);
487 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
488 label's chain of references, and note which insn contains each
492 record_label_references (insn
, pat
)
495 register enum rtx_code code
= GET_CODE (pat
);
497 register const char *fmt
;
499 if (code
== LABEL_REF
)
501 register rtx label
= XEXP (pat
, 0);
504 if (GET_CODE (label
) != CODE_LABEL
)
507 /* If this is an undefined label, LABEL_REFS (label) contains
509 if (INSN_UID (label
) == 0)
512 /* Don't make a duplicate in the code_label's chain. */
514 for (ref
= LABEL_REFS (label
);
516 ref
= LABEL_NEXTREF (ref
))
517 if (CONTAINING_INSN (ref
) == insn
)
520 CONTAINING_INSN (pat
) = insn
;
521 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
522 LABEL_REFS (label
) = pat
;
527 fmt
= GET_RTX_FORMAT (code
);
528 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
531 record_label_references (insn
, XEXP (pat
, i
));
535 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
536 record_label_references (insn
, XVECEXP (pat
, i
, j
));
541 /* Return a pointer to the REG expression within PAT. If PAT is not a
542 REG, possible enclosed by a conversion rtx, return the inner part of
543 PAT that stopped the search. */
550 switch (GET_CODE (*pat
))
553 /* Eliminate FP subregister accesses in favour of the
554 actual FP register in use. */
557 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
559 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
568 pat
= & XEXP (*pat
, 0);
572 /* There are many rules that an asm statement for stack-like regs must
573 follow. Those rules are explained at the top of this file: the rule
574 numbers below refer to that explanation. */
577 check_asm_stack_operands (insn
)
582 int malformed_asm
= 0;
583 rtx body
= PATTERN (insn
);
585 char reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
586 char implicitly_dies
[FIRST_PSEUDO_REGISTER
];
589 rtx
*clobber_reg
= 0;
590 int n_inputs
, n_outputs
;
592 /* Find out what the constraints require. If no constraint
593 alternative matches, this asm is malformed. */
595 constrain_operands (1);
596 alt
= which_alternative
;
598 preprocess_constraints ();
600 n_inputs
= get_asm_operand_n_inputs (body
);
601 n_outputs
= recog_data
.n_operands
- n_inputs
;
606 /* Avoid further trouble with this insn. */
607 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
611 /* Strip SUBREGs here to make the following code simpler. */
612 for (i
= 0; i
< recog_data
.n_operands
; i
++)
613 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
614 && GET_CODE (SUBREG_REG (recog_data
.operand
[i
])) == REG
)
615 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
617 /* Set up CLOBBER_REG. */
621 if (GET_CODE (body
) == PARALLEL
)
623 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
));
625 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
626 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
628 rtx clobber
= XVECEXP (body
, 0, i
);
629 rtx reg
= XEXP (clobber
, 0);
631 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
632 reg
= SUBREG_REG (reg
);
634 if (STACK_REG_P (reg
))
636 clobber_reg
[n_clobbers
] = reg
;
642 /* Enforce rule #4: Output operands must specifically indicate which
643 reg an output appears in after an asm. "=f" is not allowed: the
644 operand constraints must select a class with a single reg.
646 Also enforce rule #5: Output operands must start at the top of
647 the reg-stack: output operands may not "skip" a reg. */
649 memset (reg_used_as_output
, 0, sizeof (reg_used_as_output
));
650 for (i
= 0; i
< n_outputs
; i
++)
651 if (STACK_REG_P (recog_data
.operand
[i
]))
653 if (reg_class_size
[(int) recog_op_alt
[i
][alt
].class] != 1)
655 error_for_asm (insn
, "Output constraint %d must specify a single register", i
);
659 reg_used_as_output
[REGNO (recog_data
.operand
[i
])] = 1;
663 /* Search for first non-popped reg. */
664 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
665 if (! reg_used_as_output
[i
])
668 /* If there are any other popped regs, that's an error. */
669 for (; i
< LAST_STACK_REG
+ 1; i
++)
670 if (reg_used_as_output
[i
])
673 if (i
!= LAST_STACK_REG
+ 1)
675 error_for_asm (insn
, "Output regs must be grouped at top of stack");
679 /* Enforce rule #2: All implicitly popped input regs must be closer
680 to the top of the reg-stack than any input that is not implicitly
683 memset (implicitly_dies
, 0, sizeof (implicitly_dies
));
684 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
685 if (STACK_REG_P (recog_data
.operand
[i
]))
687 /* An input reg is implicitly popped if it is tied to an
688 output, or if there is a CLOBBER for it. */
691 for (j
= 0; j
< n_clobbers
; j
++)
692 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
695 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
696 implicitly_dies
[REGNO (recog_data
.operand
[i
])] = 1;
699 /* Search for first non-popped reg. */
700 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
701 if (! implicitly_dies
[i
])
704 /* If there are any other popped regs, that's an error. */
705 for (; i
< LAST_STACK_REG
+ 1; i
++)
706 if (implicitly_dies
[i
])
709 if (i
!= LAST_STACK_REG
+ 1)
712 "Implicitly popped regs must be grouped at top of stack");
716 /* Enfore rule #3: If any input operand uses the "f" constraint, all
717 output constraints must use the "&" earlyclobber.
719 ??? Detect this more deterministically by having constrain_asm_operands
720 record any earlyclobber. */
722 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
723 if (recog_op_alt
[i
][alt
].matches
== -1)
727 for (j
= 0; j
< n_outputs
; j
++)
728 if (operands_match_p (recog_data
.operand
[j
], recog_data
.operand
[i
]))
731 "Output operand %d must use `&' constraint", j
);
738 /* Avoid further trouble with this insn. */
739 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
746 /* Calculate the number of inputs and outputs in BODY, an
747 asm_operands. N_OPERANDS is the total number of operands, and
748 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
752 get_asm_operand_n_inputs (body
)
755 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
756 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
758 else if (GET_CODE (body
) == ASM_OPERANDS
)
759 return ASM_OPERANDS_INPUT_LENGTH (body
);
761 else if (GET_CODE (body
) == PARALLEL
762 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
763 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
765 else if (GET_CODE (body
) == PARALLEL
766 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
767 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
772 /* If current function returns its result in an fp stack register,
773 return the REG. Otherwise, return 0. */
781 /* If the value is supposed to be returned in memory, then clearly
782 it is not returned in a stack register. */
783 if (aggregate_value_p (DECL_RESULT (decl
)))
786 result
= DECL_RTL_IF_SET (DECL_RESULT (decl
));
789 #ifdef FUNCTION_OUTGOING_VALUE
791 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
793 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
797 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
802 * This section deals with stack register substitution, and forms the second
806 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
807 the desired hard REGNO. */
810 replace_reg (reg
, regno
)
814 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
815 || ! STACK_REG_P (*reg
))
818 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
822 case MODE_COMPLEX_FLOAT
:;
825 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
828 /* Remove a note of type NOTE, which must be found, for register
829 number REGNO from INSN. Remove only one such note. */
832 remove_regno_note (insn
, note
, regno
)
837 register rtx
*note_link
, this;
839 note_link
= ®_NOTES(insn
);
840 for (this = *note_link
; this; this = XEXP (this, 1))
841 if (REG_NOTE_KIND (this) == note
842 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
844 *note_link
= XEXP (this, 1);
848 note_link
= &XEXP (this, 1);
853 /* Find the hard register number of virtual register REG in REGSTACK.
854 The hard register number is relative to the top of the stack. -1 is
855 returned if the register is not found. */
858 get_hard_regnum (regstack
, reg
)
864 if (! STACK_REG_P (reg
))
867 for (i
= regstack
->top
; i
>= 0; i
--)
868 if (regstack
->reg
[i
] == REGNO (reg
))
871 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
874 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
875 the chain of insns. Doing so could confuse block_begin and block_end
876 if this were the only insn in the block. */
879 delete_insn_for_stacker (insn
)
882 PUT_CODE (insn
, NOTE
);
883 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
884 NOTE_SOURCE_FILE (insn
) = 0;
887 /* Emit an insn to pop virtual register REG before or after INSN.
888 REGSTACK is the stack state after INSN and is updated to reflect this
889 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
890 is represented as a SET whose destination is the register to be popped
891 and source is the top of stack. A death note for the top of stack
892 cases the movdf pattern to pop. */
895 emit_pop_insn (insn
, regstack
, reg
, where
)
899 enum emit_where where
;
901 rtx pop_insn
, pop_rtx
;
904 hard_regno
= get_hard_regnum (regstack
, reg
);
906 if (hard_regno
< FIRST_STACK_REG
)
909 pop_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
910 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
912 if (where
== EMIT_AFTER
)
913 pop_insn
= emit_block_insn_after (pop_rtx
, insn
, current_block
);
915 pop_insn
= emit_block_insn_before (pop_rtx
, insn
, current_block
);
918 = gen_rtx_EXPR_LIST (REG_DEAD
, FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
919 REG_NOTES (pop_insn
));
921 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
922 = regstack
->reg
[regstack
->top
];
924 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
929 /* Emit an insn before or after INSN to swap virtual register REG with
930 the top of stack. REGSTACK is the stack state before the swap, and
931 is updated to reflect the swap. A swap insn is represented as a
932 PARALLEL of two patterns: each pattern moves one reg to the other.
934 If REG is already at the top of the stack, no insn is emitted. */
937 emit_swap_insn (insn
, regstack
, reg
)
944 int tmp
, other_reg
; /* swap regno temps */
945 rtx i1
; /* the stack-reg insn prior to INSN */
946 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
948 hard_regno
= get_hard_regnum (regstack
, reg
);
950 if (hard_regno
< FIRST_STACK_REG
)
952 if (hard_regno
== FIRST_STACK_REG
)
955 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
957 tmp
= regstack
->reg
[other_reg
];
958 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
959 regstack
->reg
[regstack
->top
] = tmp
;
961 /* Find the previous insn involving stack regs, but don't pass a
964 if (current_block
&& insn
!= current_block
->head
)
966 rtx tmp
= PREV_INSN (insn
);
967 rtx limit
= PREV_INSN (current_block
->head
);
970 if (GET_CODE (tmp
) == CODE_LABEL
971 || NOTE_INSN_BASIC_BLOCK_P (tmp
)
972 || (GET_CODE (tmp
) == INSN
973 && stack_regs_mentioned (tmp
)))
978 tmp
= PREV_INSN (tmp
);
983 && (i1set
= single_set (i1
)) != NULL_RTX
)
985 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
986 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
988 /* If the previous register stack push was from the reg we are to
989 swap with, omit the swap. */
991 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
992 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
993 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
996 /* If the previous insn wrote to the reg we are to swap with,
999 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1000 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1001 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1005 swap_rtx
= gen_swapxf (FP_MODE_REG (hard_regno
, XFmode
),
1006 FP_MODE_REG (FIRST_STACK_REG
, XFmode
));
1009 emit_block_insn_after (swap_rtx
, i1
, current_block
);
1010 else if (current_block
)
1011 emit_block_insn_before (swap_rtx
, current_block
->head
, current_block
);
1013 emit_insn_before (swap_rtx
, insn
);
1016 /* Handle a move to or from a stack register in PAT, which is in INSN.
1017 REGSTACK is the current stack. */
1020 move_for_stack_reg (insn
, regstack
, pat
)
1025 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1026 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1030 src
= *psrc
; dest
= *pdest
;
1032 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1034 /* Write from one stack reg to another. If SRC dies here, then
1035 just change the register mapping and delete the insn. */
1037 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1042 /* If this is a no-op move, there must not be a REG_DEAD note. */
1043 if (REGNO (src
) == REGNO (dest
))
1046 for (i
= regstack
->top
; i
>= 0; i
--)
1047 if (regstack
->reg
[i
] == REGNO (src
))
1050 /* The source must be live, and the dest must be dead. */
1051 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1054 /* It is possible that the dest is unused after this insn.
1055 If so, just pop the src. */
1057 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1059 emit_pop_insn (insn
, regstack
, src
, EMIT_AFTER
);
1061 delete_insn_for_stacker (insn
);
1065 regstack
->reg
[i
] = REGNO (dest
);
1067 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1068 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1070 delete_insn_for_stacker (insn
);
1075 /* The source reg does not die. */
1077 /* If this appears to be a no-op move, delete it, or else it
1078 will confuse the machine description output patterns. But if
1079 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1080 for REG_UNUSED will not work for deleted insns. */
1082 if (REGNO (src
) == REGNO (dest
))
1084 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1085 emit_pop_insn (insn
, regstack
, dest
, EMIT_AFTER
);
1087 delete_insn_for_stacker (insn
);
1091 /* The destination ought to be dead */
1092 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1095 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1097 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1098 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1099 replace_reg (pdest
, FIRST_STACK_REG
);
1101 else if (STACK_REG_P (src
))
1103 /* Save from a stack reg to MEM, or possibly integer reg. Since
1104 only top of stack may be saved, emit an exchange first if
1107 emit_swap_insn (insn
, regstack
, src
);
1109 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1112 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1114 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1116 else if ((GET_MODE (src
) == XFmode
|| GET_MODE (src
) == TFmode
)
1117 && regstack
->top
< REG_STACK_SIZE
- 1)
1119 /* A 387 cannot write an XFmode value to a MEM without
1120 clobbering the source reg. The output code can handle
1121 this by reading back the value from the MEM.
1122 But it is more efficient to use a temp register if one is
1123 available. Push the source value here if the register
1124 stack is not full, and then write the value to memory via
1126 rtx push_rtx
, push_insn
;
1127 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1129 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1130 push_insn
= emit_insn_before (push_rtx
, insn
);
1131 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, top_stack_reg
,
1135 replace_reg (psrc
, FIRST_STACK_REG
);
1137 else if (STACK_REG_P (dest
))
1139 /* Load from MEM, or possibly integer REG or constant, into the
1140 stack regs. The actual target is always the top of the
1141 stack. The stack mapping is changed to reflect that DEST is
1142 now at top of stack. */
1144 /* The destination ought to be dead */
1145 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1148 if (regstack
->top
>= REG_STACK_SIZE
)
1151 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1152 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1153 replace_reg (pdest
, FIRST_STACK_REG
);
1159 /* Swap the condition on a branch, if there is one. Return true if we
1160 found a condition to swap. False if the condition was not used as
1164 swap_rtx_condition_1 (pat
)
1167 register const char *fmt
;
1168 register int i
, r
= 0;
1170 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1172 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1177 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1178 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1184 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1185 r
|= swap_rtx_condition_1 (XVECEXP (pat
, i
, j
));
1187 else if (fmt
[i
] == 'e')
1188 r
|= swap_rtx_condition_1 (XEXP (pat
, i
));
1196 swap_rtx_condition (insn
)
1199 rtx pat
= PATTERN (insn
);
1201 /* We're looking for a single set to cc0 or an HImode temporary. */
1203 if (GET_CODE (pat
) == SET
1204 && GET_CODE (SET_DEST (pat
)) == REG
1205 && REGNO (SET_DEST (pat
)) == FLAGS_REG
)
1207 insn
= next_flags_user (insn
);
1208 if (insn
== NULL_RTX
)
1210 pat
= PATTERN (insn
);
1213 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1214 not doing anything with the cc value right now. We may be able to
1215 search for one though. */
1217 if (GET_CODE (pat
) == SET
1218 && GET_CODE (SET_SRC (pat
)) == UNSPEC
1219 && XINT (SET_SRC (pat
), 1) == 9)
1221 rtx dest
= SET_DEST (pat
);
1223 /* Search forward looking for the first use of this value.
1224 Stop at block boundaries. */
1225 while (insn
!= current_block
->end
)
1227 insn
= NEXT_INSN (insn
);
1228 if (INSN_P (insn
) && reg_mentioned_p (dest
, insn
))
1230 if (GET_CODE (insn
) == CALL_INSN
)
1234 /* So we've found the insn using this value. If it is anything
1235 other than sahf, aka unspec 10, or the value does not die
1236 (meaning we'd have to search further), then we must give up. */
1237 pat
= PATTERN (insn
);
1238 if (GET_CODE (pat
) != SET
1239 || GET_CODE (SET_SRC (pat
)) != UNSPEC
1240 || XINT (SET_SRC (pat
), 1) != 10
1241 || ! dead_or_set_p (insn
, dest
))
1244 /* Now we are prepared to handle this as a normal cc0 setter. */
1245 insn
= next_flags_user (insn
);
1246 if (insn
== NULL_RTX
)
1248 pat
= PATTERN (insn
);
1251 if (swap_rtx_condition_1 (pat
))
1254 INSN_CODE (insn
) = -1;
1255 if (recog_memoized (insn
) == -1)
1257 /* In case the flags don't die here, recurse to try fix
1258 following user too. */
1259 else if (! dead_or_set_p (insn
, ix86_flags_rtx
))
1261 insn
= next_flags_user (insn
);
1262 if (!insn
|| !swap_rtx_condition (insn
))
1267 swap_rtx_condition_1 (pat
);
1275 /* Handle a comparison. Special care needs to be taken to avoid
1276 causing comparisons that a 387 cannot do correctly, such as EQ.
1278 Also, a pop insn may need to be emitted. The 387 does have an
1279 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1280 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1284 compare_for_stack_reg (insn
, regstack
, pat_src
)
1290 rtx src1_note
, src2_note
;
1293 src1
= get_true_reg (&XEXP (pat_src
, 0));
1294 src2
= get_true_reg (&XEXP (pat_src
, 1));
1295 flags_user
= next_flags_user (insn
);
1297 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1298 registers that die in this insn - move those to stack top first. */
1299 if ((! STACK_REG_P (*src1
)
1300 || (STACK_REG_P (*src2
)
1301 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1302 && swap_rtx_condition (insn
))
1305 temp
= XEXP (pat_src
, 0);
1306 XEXP (pat_src
, 0) = XEXP (pat_src
, 1);
1307 XEXP (pat_src
, 1) = temp
;
1309 src1
= get_true_reg (&XEXP (pat_src
, 0));
1310 src2
= get_true_reg (&XEXP (pat_src
, 1));
1312 INSN_CODE (insn
) = -1;
1315 /* We will fix any death note later. */
1317 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1319 if (STACK_REG_P (*src2
))
1320 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1322 src2_note
= NULL_RTX
;
1324 emit_swap_insn (insn
, regstack
, *src1
);
1326 replace_reg (src1
, FIRST_STACK_REG
);
1328 if (STACK_REG_P (*src2
))
1329 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1333 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
1334 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1337 /* If the second operand dies, handle that. But if the operands are
1338 the same stack register, don't bother, because only one death is
1339 needed, and it was just handled. */
1342 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1343 && REGNO (*src1
) == REGNO (*src2
)))
1345 /* As a special case, two regs may die in this insn if src2 is
1346 next to top of stack and the top of stack also dies. Since
1347 we have already popped src1, "next to top of stack" is really
1348 at top (FIRST_STACK_REG) now. */
1350 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1353 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
1354 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1358 /* The 386 can only represent death of the first operand in
1359 the case handled above. In all other cases, emit a separate
1360 pop and remove the death note from here. */
1362 /* link_cc0_insns (insn); */
1364 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1366 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1372 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1373 is the current register layout. */
1376 subst_stack_regs_pat (insn
, regstack
, pat
)
1383 switch (GET_CODE (pat
))
1386 /* Deaths in USE insns can happen in non optimizing compilation.
1387 Handle them by popping the dying register. */
1388 src
= get_true_reg (&XEXP (pat
, 0));
1389 if (STACK_REG_P (*src
)
1390 && find_regno_note (insn
, REG_DEAD
, REGNO (*src
)))
1392 emit_pop_insn (insn
, regstack
, *src
, EMIT_AFTER
);
1395 /* ??? Uninitialized USE should not happen. */
1396 else if (get_hard_regnum (regstack
, *src
) == -1)
1404 dest
= get_true_reg (&XEXP (pat
, 0));
1405 if (STACK_REG_P (*dest
))
1407 note
= find_reg_note (insn
, REG_DEAD
, *dest
);
1409 if (pat
!= PATTERN (insn
))
1411 /* The fix_truncdi_1 pattern wants to be able to allocate
1412 it's own scratch register. It does this by clobbering
1413 an fp reg so that it is assured of an empty reg-stack
1414 register. If the register is live, kill it now.
1415 Remove the DEAD/UNUSED note so we don't try to kill it
1419 emit_pop_insn (insn
, regstack
, *dest
, EMIT_BEFORE
);
1422 note
= find_reg_note (insn
, REG_UNUSED
, *dest
);
1426 remove_note (insn
, note
);
1427 replace_reg (dest
, LAST_STACK_REG
);
1431 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1432 indicates an uninitialized value. Because reload removed
1433 all other clobbers, this must be due to a function
1434 returning without a value. Load up a NaN. */
1437 && get_hard_regnum (regstack
, *dest
) == -1)
1439 pat
= gen_rtx_SET (VOIDmode
,
1440 FP_MODE_REG (REGNO (*dest
), SFmode
),
1442 PATTERN (insn
) = pat
;
1443 move_for_stack_reg (insn
, regstack
, pat
);
1452 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
1453 rtx src1_note
, src2_note
;
1456 dest
= get_true_reg (&SET_DEST (pat
));
1457 src
= get_true_reg (&SET_SRC (pat
));
1458 pat_src
= SET_SRC (pat
);
1460 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1461 if (STACK_REG_P (*src
)
1462 || (STACK_REG_P (*dest
)
1463 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
1464 || GET_CODE (*src
) == CONST_DOUBLE
)))
1466 move_for_stack_reg (insn
, regstack
, pat
);
1470 switch (GET_CODE (pat_src
))
1473 compare_for_stack_reg (insn
, regstack
, pat_src
);
1479 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
1482 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
1483 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
1486 replace_reg (dest
, FIRST_STACK_REG
);
1490 /* This is a `tstM2' case. */
1491 if (*dest
!= cc0_rtx
)
1497 case FLOAT_TRUNCATE
:
1501 /* These insns only operate on the top of the stack. DEST might
1502 be cc0_rtx if we're processing a tstM pattern. Also, it's
1503 possible that the tstM case results in a REG_DEAD note on the
1507 src1
= get_true_reg (&XEXP (pat_src
, 0));
1509 emit_swap_insn (insn
, regstack
, *src1
);
1511 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1513 if (STACK_REG_P (*dest
))
1514 replace_reg (dest
, FIRST_STACK_REG
);
1518 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1520 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1523 replace_reg (src1
, FIRST_STACK_REG
);
1528 /* On i386, reversed forms of subM3 and divM3 exist for
1529 MODE_FLOAT, so the same code that works for addM3 and mulM3
1533 /* These insns can accept the top of stack as a destination
1534 from a stack reg or mem, or can use the top of stack as a
1535 source and some other stack register (possibly top of stack)
1536 as a destination. */
1538 src1
= get_true_reg (&XEXP (pat_src
, 0));
1539 src2
= get_true_reg (&XEXP (pat_src
, 1));
1541 /* We will fix any death note later. */
1543 if (STACK_REG_P (*src1
))
1544 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1546 src1_note
= NULL_RTX
;
1547 if (STACK_REG_P (*src2
))
1548 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1550 src2_note
= NULL_RTX
;
1552 /* If either operand is not a stack register, then the dest
1553 must be top of stack. */
1555 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1556 emit_swap_insn (insn
, regstack
, *dest
);
1559 /* Both operands are REG. If neither operand is already
1560 at the top of stack, choose to make the one that is the dest
1561 the new top of stack. */
1563 int src1_hard_regnum
, src2_hard_regnum
;
1565 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1566 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1567 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
1570 if (src1_hard_regnum
!= FIRST_STACK_REG
1571 && src2_hard_regnum
!= FIRST_STACK_REG
)
1572 emit_swap_insn (insn
, regstack
, *dest
);
1575 if (STACK_REG_P (*src1
))
1576 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1577 if (STACK_REG_P (*src2
))
1578 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1582 rtx src1_reg
= XEXP (src1_note
, 0);
1584 /* If the register that dies is at the top of stack, then
1585 the destination is somewhere else - merely substitute it.
1586 But if the reg that dies is not at top of stack, then
1587 move the top of stack to the dead reg, as though we had
1588 done the insn and then a store-with-pop. */
1590 if (REGNO (src1_reg
) == regstack
->reg
[regstack
->top
])
1592 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1593 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1597 int regno
= get_hard_regnum (regstack
, src1_reg
);
1599 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1600 replace_reg (dest
, regno
);
1602 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1603 = regstack
->reg
[regstack
->top
];
1606 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1607 REGNO (XEXP (src1_note
, 0)));
1608 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1613 rtx src2_reg
= XEXP (src2_note
, 0);
1614 if (REGNO (src2_reg
) == regstack
->reg
[regstack
->top
])
1616 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1617 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1621 int regno
= get_hard_regnum (regstack
, src2_reg
);
1623 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1624 replace_reg (dest
, regno
);
1626 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1627 = regstack
->reg
[regstack
->top
];
1630 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1631 REGNO (XEXP (src2_note
, 0)));
1632 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1637 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1638 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1641 /* Keep operand 1 maching with destination. */
1642 if (GET_RTX_CLASS (GET_CODE (pat_src
)) == 'c'
1643 && REG_P (*src1
) && REG_P (*src2
)
1644 && REGNO (*src1
) != REGNO (*dest
))
1646 int tmp
= REGNO (*src1
);
1647 replace_reg (src1
, REGNO (*src2
));
1648 replace_reg (src2
, tmp
);
1653 switch (XINT (pat_src
, 1))
1657 /* These insns only operate on the top of the stack. */
1659 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1661 emit_swap_insn (insn
, regstack
, *src1
);
1663 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1665 if (STACK_REG_P (*dest
))
1666 replace_reg (dest
, FIRST_STACK_REG
);
1670 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1672 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1675 replace_reg (src1
, FIRST_STACK_REG
);
1679 /* (unspec [(unspec [(compare ..)] 9)] 10)
1680 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1681 matches the PPRO fcomi instruction. */
1683 pat_src
= XVECEXP (pat_src
, 0, 0);
1684 if (GET_CODE (pat_src
) != UNSPEC
1685 || XINT (pat_src
, 1) != 9)
1690 /* (unspec [(compare ..)] 9) */
1691 /* Combined fcomp+fnstsw generated for doing well with
1692 CSE. When optimizing this would have been broken
1695 pat_src
= XVECEXP (pat_src
, 0, 0);
1696 if (GET_CODE (pat_src
) != COMPARE
)
1699 compare_for_stack_reg (insn
, regstack
, pat_src
);
1708 /* This insn requires the top of stack to be the destination. */
1710 /* If the comparison operator is an FP comparison operator,
1711 it is handled correctly by compare_for_stack_reg () who
1712 will move the destination to the top of stack. But if the
1713 comparison operator is not an FP comparison operator, we
1714 have to handle it here. */
1715 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
1716 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
1717 emit_swap_insn (insn
, regstack
, *dest
);
1719 src1
= get_true_reg (&XEXP (pat_src
, 1));
1720 src2
= get_true_reg (&XEXP (pat_src
, 2));
1722 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1723 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1730 src_note
[1] = src1_note
;
1731 src_note
[2] = src2_note
;
1733 if (STACK_REG_P (*src1
))
1734 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1735 if (STACK_REG_P (*src2
))
1736 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1738 for (i
= 1; i
<= 2; i
++)
1741 int regno
= REGNO (XEXP (src_note
[i
], 0));
1743 /* If the register that dies is not at the top of
1744 stack, then move the top of stack to the dead reg */
1745 if (regno
!= regstack
->reg
[regstack
->top
])
1747 remove_regno_note (insn
, REG_DEAD
, regno
);
1748 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
1753 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
1754 replace_reg (&XEXP (src_note
[i
], 0), FIRST_STACK_REG
);
1760 /* Make dest the top of stack. Add dest to regstack if
1762 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
1763 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1764 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1765 replace_reg (dest
, FIRST_STACK_REG
);
1779 /* Substitute hard regnums for any stack regs in INSN, which has
1780 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1781 before the insn, and is updated with changes made here.
1783 There are several requirements and assumptions about the use of
1784 stack-like regs in asm statements. These rules are enforced by
1785 record_asm_stack_regs; see comments there for details. Any
1786 asm_operands left in the RTL at this point may be assume to meet the
1787 requirements, since record_asm_stack_regs removes any problem asm. */
1790 subst_asm_stack_regs (insn
, regstack
)
1794 rtx body
= PATTERN (insn
);
1797 rtx
*note_reg
; /* Array of note contents */
1798 rtx
**note_loc
; /* Address of REG field of each note */
1799 enum reg_note
*note_kind
; /* The type of each note */
1801 rtx
*clobber_reg
= 0;
1802 rtx
**clobber_loc
= 0;
1804 struct stack_def temp_stack
;
1809 int n_inputs
, n_outputs
;
1811 if (! check_asm_stack_operands (insn
))
1814 /* Find out what the constraints required. If no constraint
1815 alternative matches, that is a compiler bug: we should have caught
1816 such an insn in check_asm_stack_operands. */
1817 extract_insn (insn
);
1818 constrain_operands (1);
1819 alt
= which_alternative
;
1821 preprocess_constraints ();
1823 n_inputs
= get_asm_operand_n_inputs (body
);
1824 n_outputs
= recog_data
.n_operands
- n_inputs
;
1829 /* Strip SUBREGs here to make the following code simpler. */
1830 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1831 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
1832 && GET_CODE (SUBREG_REG (recog_data
.operand
[i
])) == REG
)
1834 recog_data
.operand_loc
[i
] = & SUBREG_REG (recog_data
.operand
[i
]);
1835 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
1838 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1840 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1843 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
1844 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
1845 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
1848 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1850 rtx reg
= XEXP (note
, 0);
1851 rtx
*loc
= & XEXP (note
, 0);
1853 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
1855 loc
= & SUBREG_REG (reg
);
1856 reg
= SUBREG_REG (reg
);
1859 if (STACK_REG_P (reg
)
1860 && (REG_NOTE_KIND (note
) == REG_DEAD
1861 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1863 note_reg
[n_notes
] = reg
;
1864 note_loc
[n_notes
] = loc
;
1865 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
1870 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1874 if (GET_CODE (body
) == PARALLEL
)
1876 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
));
1877 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
1879 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1880 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
1882 rtx clobber
= XVECEXP (body
, 0, i
);
1883 rtx reg
= XEXP (clobber
, 0);
1884 rtx
*loc
= & XEXP (clobber
, 0);
1886 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
1888 loc
= & SUBREG_REG (reg
);
1889 reg
= SUBREG_REG (reg
);
1892 if (STACK_REG_P (reg
))
1894 clobber_reg
[n_clobbers
] = reg
;
1895 clobber_loc
[n_clobbers
] = loc
;
1901 temp_stack
= *regstack
;
1903 /* Put the input regs into the desired place in TEMP_STACK. */
1905 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1906 if (STACK_REG_P (recog_data
.operand
[i
])
1907 && reg_class_subset_p (recog_op_alt
[i
][alt
].class,
1909 && recog_op_alt
[i
][alt
].class != FLOAT_REGS
)
1911 /* If an operand needs to be in a particular reg in
1912 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1913 these constraints are for single register classes, and
1914 reload guaranteed that operand[i] is already in that class,
1915 we can just use REGNO (recog_data.operand[i]) to know which
1916 actual reg this operand needs to be in. */
1918 int regno
= get_hard_regnum (&temp_stack
, recog_data
.operand
[i
]);
1923 if (regno
!= REGNO (recog_data
.operand
[i
]))
1925 /* recog_data.operand[i] is not in the right place. Find
1926 it and swap it with whatever is already in I's place.
1927 K is where recog_data.operand[i] is now. J is where it
1931 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
1933 - (REGNO (recog_data
.operand
[i
]) - FIRST_STACK_REG
));
1935 temp
= temp_stack
.reg
[k
];
1936 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
1937 temp_stack
.reg
[j
] = temp
;
1941 /* Emit insns before INSN to make sure the reg-stack is in the right
1944 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
1946 /* Make the needed input register substitutions. Do death notes and
1947 clobbers too, because these are for inputs, not outputs. */
1949 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1950 if (STACK_REG_P (recog_data
.operand
[i
]))
1952 int regnum
= get_hard_regnum (regstack
, recog_data
.operand
[i
]);
1957 replace_reg (recog_data
.operand_loc
[i
], regnum
);
1960 for (i
= 0; i
< n_notes
; i
++)
1961 if (note_kind
[i
] == REG_DEAD
)
1963 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
1968 replace_reg (note_loc
[i
], regnum
);
1971 for (i
= 0; i
< n_clobbers
; i
++)
1973 /* It's OK for a CLOBBER to reference a reg that is not live.
1974 Don't try to replace it in that case. */
1975 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
1979 /* Sigh - clobbers always have QImode. But replace_reg knows
1980 that these regs can't be MODE_INT and will abort. Just put
1981 the right reg there without calling replace_reg. */
1983 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
1987 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
1989 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
1990 if (STACK_REG_P (recog_data
.operand
[i
]))
1992 /* An input reg is implicitly popped if it is tied to an
1993 output, or if there is a CLOBBER for it. */
1996 for (j
= 0; j
< n_clobbers
; j
++)
1997 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
2000 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
2002 /* recog_data.operand[i] might not be at the top of stack.
2003 But that's OK, because all we need to do is pop the
2004 right number of regs off of the top of the reg-stack.
2005 record_asm_stack_regs guaranteed that all implicitly
2006 popped regs were grouped at the top of the reg-stack. */
2008 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2009 regstack
->reg
[regstack
->top
]);
2014 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2015 Note that there isn't any need to substitute register numbers.
2016 ??? Explain why this is true. */
2018 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2020 /* See if there is an output for this hard reg. */
2023 for (j
= 0; j
< n_outputs
; j
++)
2024 if (STACK_REG_P (recog_data
.operand
[j
])
2025 && REGNO (recog_data
.operand
[j
]) == i
)
2027 regstack
->reg
[++regstack
->top
] = i
;
2028 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2033 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2034 input that the asm didn't implicitly pop. If the asm didn't
2035 implicitly pop an input reg, that reg will still be live.
2037 Note that we can't use find_regno_note here: the register numbers
2038 in the death notes have already been substituted. */
2040 for (i
= 0; i
< n_outputs
; i
++)
2041 if (STACK_REG_P (recog_data
.operand
[i
]))
2045 for (j
= 0; j
< n_notes
; j
++)
2046 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2047 && note_kind
[j
] == REG_UNUSED
)
2049 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2055 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2056 if (STACK_REG_P (recog_data
.operand
[i
]))
2060 for (j
= 0; j
< n_notes
; j
++)
2061 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2062 && note_kind
[j
] == REG_DEAD
2063 && TEST_HARD_REG_BIT (regstack
->reg_set
,
2064 REGNO (recog_data
.operand
[i
])))
2066 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2073 /* Substitute stack hard reg numbers for stack virtual registers in
2074 INSN. Non-stack register numbers are not changed. REGSTACK is the
2075 current stack content. Insns may be emitted as needed to arrange the
2076 stack for the 387 based on the contents of the insn. */
2079 subst_stack_regs (insn
, regstack
)
2083 register rtx
*note_link
, note
;
2086 if (GET_CODE (insn
) == CALL_INSN
)
2088 int top
= regstack
->top
;
2090 /* If there are any floating point parameters to be passed in
2091 registers for this call, make sure they are in the right
2096 straighten_stack (PREV_INSN (insn
), regstack
);
2098 /* Now mark the arguments as dead after the call. */
2100 while (regstack
->top
>= 0)
2102 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2108 /* Do the actual substitution if any stack regs are mentioned.
2109 Since we only record whether entire insn mentions stack regs, and
2110 subst_stack_regs_pat only works for patterns that contain stack regs,
2111 we must check each pattern in a parallel here. A call_value_pop could
2114 if (stack_regs_mentioned (insn
))
2116 int n_operands
= asm_noperands (PATTERN (insn
));
2117 if (n_operands
>= 0)
2119 /* This insn is an `asm' with operands. Decode the operands,
2120 decide how many are inputs, and do register substitution.
2121 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2123 subst_asm_stack_regs (insn
, regstack
);
2127 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2128 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2130 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2131 subst_stack_regs_pat (insn
, regstack
,
2132 XVECEXP (PATTERN (insn
), 0, i
));
2135 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2138 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2139 REG_UNUSED will already have been dealt with, so just return. */
2141 if (GET_CODE (insn
) == NOTE
)
2144 /* If there is a REG_UNUSED note on a stack register on this insn,
2145 the indicated reg must be popped. The REG_UNUSED note is removed,
2146 since the form of the newly emitted pop insn references the reg,
2147 making it no longer `unset'. */
2149 note_link
= ®_NOTES(insn
);
2150 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2151 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2153 *note_link
= XEXP (note
, 1);
2154 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), EMIT_AFTER
);
2157 note_link
= &XEXP (note
, 1);
2160 /* Change the organization of the stack so that it fits a new basic
2161 block. Some registers might have to be popped, but there can never be
2162 a register live in the new block that is not now live.
2164 Insert any needed insns before or after INSN, as indicated by
2165 WHERE. OLD is the original stack layout, and NEW is the desired
2166 form. OLD is updated to reflect the code emitted, ie, it will be
2167 the same as NEW upon return.
2169 This function will not preserve block_end[]. But that information
2170 is no longer needed once this has executed. */
2173 change_stack (insn
, old
, new, where
)
2177 enum emit_where where
;
2182 /* We will be inserting new insns "backwards". If we are to insert
2183 after INSN, find the next insn, and insert before it. */
2185 if (where
== EMIT_AFTER
)
2187 if (current_block
&& current_block
->end
== insn
)
2189 insn
= NEXT_INSN (insn
);
2192 /* Pop any registers that are not needed in the new block. */
2194 for (reg
= old
->top
; reg
>= 0; reg
--)
2195 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2196 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2201 /* If the new block has never been processed, then it can inherit
2202 the old stack order. */
2204 new->top
= old
->top
;
2205 memcpy (new->reg
, old
->reg
, sizeof (new->reg
));
2209 /* This block has been entered before, and we must match the
2210 previously selected stack order. */
2212 /* By now, the only difference should be the order of the stack,
2213 not their depth or liveliness. */
2215 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2218 if (old
->top
!= new->top
)
2221 /* If the stack is not empty (new->top != -1), loop here emitting
2222 swaps until the stack is correct.
2224 The worst case number of swaps emitted is N + 2, where N is the
2225 depth of the stack. In some cases, the reg at the top of
2226 stack may be correct, but swapped anyway in order to fix
2227 other regs. But since we never swap any other reg away from
2228 its correct slot, this algorithm will converge. */
2233 /* Swap the reg at top of stack into the position it is
2234 supposed to be in, until the correct top of stack appears. */
2236 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2238 for (reg
= new->top
; reg
>= 0; reg
--)
2239 if (new->reg
[reg
] == old
->reg
[old
->top
])
2245 emit_swap_insn (insn
, old
,
2246 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2249 /* See if any regs remain incorrect. If so, bring an
2250 incorrect reg to the top of stack, and let the while loop
2253 for (reg
= new->top
; reg
>= 0; reg
--)
2254 if (new->reg
[reg
] != old
->reg
[reg
])
2256 emit_swap_insn (insn
, old
,
2257 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2262 /* At this point there must be no differences. */
2264 for (reg
= old
->top
; reg
>= 0; reg
--)
2265 if (old
->reg
[reg
] != new->reg
[reg
])
2270 current_block
->end
= PREV_INSN (insn
);
2273 /* Print stack configuration. */
2276 print_stack (file
, s
)
2284 fprintf (file
, "uninitialized\n");
2285 else if (s
->top
== -1)
2286 fprintf (file
, "empty\n");
2291 for (i
= 0; i
<= s
->top
; ++i
)
2292 fprintf (file
, "%d ", s
->reg
[i
]);
2293 fputs ("]\n", file
);
2297 /* This function was doing life analysis. We now let the regular live
2298 code do it's job, so we only need to check some extra invariants
2299 that reg-stack expects. Primary among these being that all registers
2300 are initialized before use.
2302 The function returns true when code was emitted to CFG edges and
2303 commit_edge_insertions needs to be called. */
2306 convert_regs_entry ()
2308 int inserted
= 0, i
;
2311 for (i
= n_basic_blocks
- 1; i
>= 0; --i
)
2313 basic_block block
= BASIC_BLOCK (i
);
2314 block_info bi
= BLOCK_INFO (block
);
2317 /* Set current register status at last instruction `uninitialized'. */
2318 bi
->stack_in
.top
= -2;
2320 /* Copy live_at_end and live_at_start into temporaries. */
2321 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
2323 if (REGNO_REG_SET_P (block
->global_live_at_end
, reg
))
2324 SET_HARD_REG_BIT (bi
->out_reg_set
, reg
);
2325 if (REGNO_REG_SET_P (block
->global_live_at_start
, reg
))
2326 SET_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
);
2330 /* Load something into each stack register live at function entry.
2331 Such live registers can be caused by uninitialized variables or
2332 functions not returning values on all paths. In order to keep
2333 the push/pop code happy, and to not scrog the register stack, we
2334 must put something in these registers. Use a QNaN.
2336 Note that we are insertting converted code here. This code is
2337 never seen by the convert_regs pass. */
2339 for (e
= ENTRY_BLOCK_PTR
->succ
; e
; e
= e
->succ_next
)
2341 basic_block block
= e
->dest
;
2342 block_info bi
= BLOCK_INFO (block
);
2345 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2346 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2350 bi
->stack_in
.reg
[++top
] = reg
;
2352 init
= gen_rtx_SET (VOIDmode
,
2353 FP_MODE_REG (FIRST_STACK_REG
, SFmode
),
2355 insert_insn_on_edge (init
, e
);
2359 bi
->stack_in
.top
= top
;
2365 /* Construct the desired stack for function exit. This will either
2366 be `empty', or the function return value at top-of-stack. */
2369 convert_regs_exit ()
2371 int value_reg_low
, value_reg_high
;
2375 retvalue
= stack_result (current_function_decl
);
2376 value_reg_low
= value_reg_high
= -1;
2379 value_reg_low
= REGNO (retvalue
);
2380 value_reg_high
= value_reg_low
2381 + HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
2384 output_stack
= &BLOCK_INFO (EXIT_BLOCK_PTR
)->stack_in
;
2385 if (value_reg_low
== -1)
2386 output_stack
->top
= -1;
2391 output_stack
->top
= value_reg_high
- value_reg_low
;
2392 for (reg
= value_reg_low
; reg
<= value_reg_high
; ++reg
)
2394 output_stack
->reg
[reg
- value_reg_low
] = reg
;
2395 SET_HARD_REG_BIT (output_stack
->reg_set
, reg
);
2400 /* Convert stack register references in one block. */
2403 convert_regs_1 (file
, block
)
2407 struct stack_def regstack
, tmpstack
;
2408 block_info bi
= BLOCK_INFO (block
);
2413 current_block
= block
;
2417 fprintf (file
, "\nBasic block %d\nInput stack: ", block
->index
);
2418 print_stack (file
, &bi
->stack_in
);
2421 /* Process all insns in this block. Keep track of NEXT so that we
2422 don't process insns emitted while substituting in INSN. */
2424 regstack
= bi
->stack_in
;
2428 next
= NEXT_INSN (insn
);
2430 /* Ensure we have not missed a block boundary. */
2433 if (insn
== block
->end
)
2436 /* Don't bother processing unless there is a stack reg
2437 mentioned or if it's a CALL_INSN. */
2438 if (stack_regs_mentioned (insn
)
2439 || GET_CODE (insn
) == CALL_INSN
)
2443 fprintf (file
, " insn %d input stack: ",
2445 print_stack (file
, ®stack
);
2447 subst_stack_regs (insn
, ®stack
);
2454 fprintf (file
, "Expected live registers [");
2455 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2456 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
))
2457 fprintf (file
, " %d", reg
);
2458 fprintf (file
, " ]\nOutput stack: ");
2459 print_stack (file
, ®stack
);
2463 if (GET_CODE (insn
) == JUMP_INSN
)
2464 insn
= PREV_INSN (insn
);
2466 /* If the function is declared to return a value, but it returns one
2467 in only some cases, some registers might come live here. Emit
2468 necessary moves for them. */
2470 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2472 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
)
2473 && ! TEST_HARD_REG_BIT (regstack
.reg_set
, reg
))
2479 fprintf (file
, "Emitting insn initializing reg %d\n",
2483 set
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (reg
, SFmode
),
2485 insn
= emit_block_insn_after (set
, insn
, block
);
2486 subst_stack_regs (insn
, ®stack
);
2490 /* Something failed if the stack lives don't match. */
2491 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, bi
->out_reg_set
, win
);
2495 /* Adjust the stack of this block on exit to match the stack of the
2496 target block, or copy stack info into the stack of the successor
2497 of the successor hasn't been processed yet. */
2499 for (e
= block
->succ
; e
; e
= e
->succ_next
)
2501 basic_block target
= e
->dest
;
2502 stack target_stack
= &BLOCK_INFO (target
)->stack_in
;
2505 fprintf (file
, "Edge to block %d: ", target
->index
);
2507 if (target_stack
->top
== -2)
2509 /* The target block hasn't had a stack order selected.
2510 We need merely ensure that no pops are needed. */
2511 for (reg
= regstack
.top
; reg
>= 0; --reg
)
2512 if (! TEST_HARD_REG_BIT (target_stack
->reg_set
,
2519 fprintf (file
, "new block; copying stack position\n");
2521 /* change_stack kills values in regstack. */
2522 tmpstack
= regstack
;
2524 change_stack (block
->end
, &tmpstack
,
2525 target_stack
, EMIT_AFTER
);
2530 fprintf (file
, "new block; pops needed\n");
2534 if (target_stack
->top
== regstack
.top
)
2536 for (reg
= target_stack
->top
; reg
>= 0; --reg
)
2537 if (target_stack
->reg
[reg
] != regstack
.reg
[reg
])
2543 fprintf (file
, "no changes needed\n");
2550 fprintf (file
, "correcting stack to ");
2551 print_stack (file
, target_stack
);
2555 /* Care for non-call EH edges specially. The normal return path have
2556 values in registers. These will be popped en masse by the unwind
2558 if ((e
->flags
& (EDGE_EH
| EDGE_ABNORMAL_CALL
)) == EDGE_EH
)
2559 target_stack
->top
= -1;
2561 /* Other calls may appear to have values live in st(0), but the
2562 abnormal return path will not have actually loaded the values. */
2563 else if (e
->flags
& EDGE_ABNORMAL_CALL
)
2565 /* Assert that the lifetimes are as we expect -- one value
2566 live at st(0) on the end of the source block, and no
2567 values live at the beginning of the destination block. */
2570 CLEAR_HARD_REG_SET (tmp
);
2571 GO_IF_HARD_REG_EQUAL (target_stack
->reg_set
, tmp
, eh1
);
2575 SET_HARD_REG_BIT (tmp
, FIRST_STACK_REG
);
2576 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, tmp
, eh2
);
2580 target_stack
->top
= -1;
2583 /* It is better to output directly to the end of the block
2584 instead of to the edge, because emit_swap can do minimal
2585 insn scheduling. We can do this when there is only one
2586 edge out, and it is not abnormal. */
2587 else if (block
->succ
->succ_next
== NULL
2588 && ! (e
->flags
& EDGE_ABNORMAL
))
2590 /* change_stack kills values in regstack. */
2591 tmpstack
= regstack
;
2593 change_stack (block
->end
, &tmpstack
, target_stack
,
2594 (GET_CODE (block
->end
) == JUMP_INSN
2595 ? EMIT_BEFORE
: EMIT_AFTER
));
2601 /* We don't support abnormal edges. Global takes care to
2602 avoid any live register across them, so we should never
2603 have to insert instructions on such edges. */
2604 if (e
->flags
& EDGE_ABNORMAL
)
2607 current_block
= NULL
;
2610 /* ??? change_stack needs some point to emit insns after.
2611 Also needed to keep gen_sequence from returning a
2612 pattern as opposed to a sequence, which would lose
2614 after
= emit_note (NULL
, NOTE_INSN_DELETED
);
2616 tmpstack
= regstack
;
2617 change_stack (after
, &tmpstack
, target_stack
, EMIT_BEFORE
);
2619 seq
= gen_sequence ();
2622 insert_insn_on_edge (seq
, e
);
2624 current_block
= block
;
2631 /* Convert registers in all blocks reachable from BLOCK. */
2634 convert_regs_2 (file
, block
)
2638 basic_block
*stack
, *sp
;
2641 stack
= (basic_block
*) xmalloc (sizeof (*stack
) * n_basic_blocks
);
2645 BLOCK_INFO (block
)->done
= 1;
2653 inserted
|= convert_regs_1 (file
, block
);
2655 for (e
= block
->succ
; e
; e
= e
->succ_next
)
2656 if (! BLOCK_INFO (e
->dest
)->done
)
2659 BLOCK_INFO (e
->dest
)->done
= 1;
2662 while (sp
!= stack
);
2667 /* Traverse all basic blocks in a function, converting the register
2668 references in each insn from the "flat" register file that gcc uses,
2669 to the stack-like registers the 387 uses. */
2678 /* Initialize uninitialized registers on function entry. */
2679 inserted
= convert_regs_entry ();
2681 /* Construct the desired stack for function exit. */
2682 convert_regs_exit ();
2683 BLOCK_INFO (EXIT_BLOCK_PTR
)->done
= 1;
2685 /* ??? Future: process inner loops first, and give them arbitrary
2686 initial stacks which emit_swap_insn can modify. This ought to
2687 prevent double fxch that aften appears at the head of a loop. */
2689 /* Process all blocks reachable from all entry points. */
2690 for (e
= ENTRY_BLOCK_PTR
->succ
; e
; e
= e
->succ_next
)
2691 inserted
|= convert_regs_2 (file
, e
->dest
);
2693 /* ??? Process all unreachable blocks. Though there's no excuse
2694 for keeping these even when not optimizing. */
2695 for (i
= 0; i
< n_basic_blocks
; ++i
)
2697 basic_block b
= BASIC_BLOCK (i
);
2698 block_info bi
= BLOCK_INFO (b
);
2704 /* Create an arbitrary input stack. */
2705 bi
->stack_in
.top
= -1;
2706 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2707 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2708 bi
->stack_in
.reg
[++bi
->stack_in
.top
] = reg
;
2710 inserted
|= convert_regs_2 (file
, b
);
2715 commit_edge_insertions ();
2722 #endif /* STACK_REGS */