1 2023-10-18 Andrew Pinski <pinskia@gmail.com>
4 * expr.cc (do_store_flag): Don't over write arg0
5 when stripping off `& POW2`.
7 2023-10-18 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
9 PR tree-optimization/111648
10 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): If a1
11 chooses base element from arg, ensure that it's a natural stepped
13 (build_vec_cst_rand): New param natural_stepped and use it to
14 construct a naturally stepped sequence.
15 (test_nunits_min_2): Add new unit tests Case 6 and Case 7.
17 2023-10-18 Dimitar Dimitrov <dimitar@dinux.eu>
19 * config/pru/pru.cc (pru_insn_cost): New function.
20 (TARGET_INSN_COST): Define for PRU.
22 2023-10-18 Andrew Carlotti <andrew.carlotti@arm.com>
24 * config/aarch64/aarch64.cc (aarch64_test_fractional_cost):
25 Test <= instead of testing < twice.
27 2023-10-18 Jakub Jelinek <jakub@redhat.com>
30 * cse.cc (cse_insn): Add workaround for GCC 4.8-4.9, instead of
31 using rtx_def type for memory_extend_buf, use unsigned char
32 arrayy with size of rtx_def and its alignment.
34 2023-10-18 Jason Merrill <jason@redhat.com>
36 * doc/invoke.texi: Move -fpermissive to Warning Options.
37 * diagnostic.cc (update_effective_level_from_pragmas): Remove
38 redundant system header check.
39 (diagnostic_report_diagnostic): Move down syshdr/-w check.
40 (diagnostic_impl): Handle DK_PERMERROR with an option number.
41 (permerror): Add new overloads.
42 * diagnostic-core.h (permerror): Declare them.
44 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
46 * gimplify.cc (gimplify_bind_expr): Remove "omp allocate" attribute
47 to avoid that auxillary statement list reaches LTO.
49 2023-10-18 Jakub Jelinek <jakub@redhat.com>
51 PR tree-optimization/111845
52 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember temporary
53 statements for the 4 operand addition or subtraction of 3 operands
54 from 1 operand cases and remove them when successful. Look for
55 nested additions even from rhs[2], not just rhs[1].
57 2023-10-18 Tobias Burnus <tobias@codesourcery.com>
60 * config/nvptx/nvptx.cc (nvptx_option_override): Issue fatal error
61 instead of an assert ICE when no -march= has been specified.
63 2023-10-18 Iain Sandoe <iain@sandoe.co.uk>
65 * config.in: Regenerate.
66 * config/darwin.cc (darwin_file_start): Add assembler directives
67 for the target OS version, where these are supported by the
69 (darwin_override_options): Check for building >= macOS 10.14.
70 * configure: Regenerate.
71 * configure.ac: Check for assembler support of .build_version
74 2023-10-18 Tamar Christina <tamar.christina@arm.com>
76 PR tree-optimization/109154
77 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
78 (typedef struct ifcvt_arg_entry): New.
80 (gen_phi_arg_condition, gen_phi_nest_statement,
81 predicate_scalar_phi): Use them.
83 2023-10-18 Tamar Christina <tamar.christina@arm.com>
85 PR tree-optimization/109154
86 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
87 Rewrite to new syntax.
88 (*aarch64_simd_mov<VQMOV:mode): Rewrite to new syntax and merge in
91 2023-10-18 Tamar Christina <tamar.christina@arm.com>
93 PR tree-optimization/109154
94 * tree-if-conv.cc (if_convertible_stmt_p): Allow any const IFN.
96 2023-10-18 Tamar Christina <tamar.christina@arm.com>
98 PR tree-optimization/109154
99 * match.pd: Add new cond_op rule.
101 2023-10-18 Xi Ruoyao <xry111@xry111.site>
103 * config/loongarch/loongarch.md (movfcc): Use fcmp.caf.s for
106 2023-10-18 Richard Biener <rguenther@suse.de>
108 * tree-vect-stmts.cc (vectorizable_simd_clone_call):
109 Relax check to again allow passing integer mode masks
110 as traditional vectors.
112 2023-10-18 Tamar Christina <tamar.christina@arm.com>
114 * tree-loop-distribution.cc (copy_loop_before): Request no LCSSA.
115 * tree-vect-loop-manip.cc (adjust_phi_and_debug_stmts): Add additional
117 (slpeel_tree_duplicate_loop_to_edge_cfg): Keep LCSSA during peeling.
118 (find_guard_arg): Look value up through explicit edge and original defs.
119 (vect_do_peeling): Use it.
120 (slpeel_update_phi_nodes_for_guard2): Take explicit exit edge.
121 (slpeel_update_phi_nodes_for_lcssa, slpeel_update_phi_nodes_for_loops):
123 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Initialize phi.
124 * tree-vectorizer.h (slpeel_tree_duplicate_loop_to_edge_cfg): Add
125 optional param to turn off LCSSA mode.
127 2023-10-18 Tamar Christina <tamar.christina@arm.com>
129 * tree-if-conv.cc (tree_if_conversion): Record exits in aux.
130 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
132 * tree-vect-loop.cc (vect_get_loop_niters): Determine main exit.
133 (vec_init_loop_exit_info): Extend analysis when multiple exits.
134 (vect_analyze_loop_form): Record conds and determine main cond.
135 (vect_create_loop_vinfo): Extend bookkeeping of conds.
136 (vect_analyze_loop): Release conds.
137 * tree-vectorizer.h (LOOP_VINFO_LOOP_CONDS,
138 LOOP_VINFO_LOOP_IV_COND): New.
139 (struct vect_loop_form_info): Add conds, alt_loop_conds;
140 (struct loop_vec_info): Add conds, loop_iv_cond.
142 2023-10-18 Tamar Christina <tamar.christina@arm.com>
144 * tree-loop-distribution.cc (copy_loop_before): Pass exit explicitly.
145 (loop_distribution::distribute_loop): Bail out of not single exit.
146 * tree-scalar-evolution.cc (get_loop_exit_condition): New.
147 * tree-scalar-evolution.h (get_loop_exit_condition): New.
148 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Pass exit
150 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors,
151 vect_set_loop_condition_partial_vectors_avx512,
152 vect_set_loop_condition_normal, vect_set_loop_condition): Explicitly
154 (slpeel_tree_duplicate_loop_to_edge_cfg): Explicitly take exit and
155 return new peeled corresponding peeled exit.
156 (slpeel_can_duplicate_loop_p): Explicitly take exit.
157 (find_loop_location): Handle not knowing an explicit exit.
158 (vect_update_ivs_after_vectorizer, vect_gen_vector_loop_niters_mult_vf,
159 find_guard_arg, slpeel_update_phi_nodes_for_loops,
160 slpeel_update_phi_nodes_for_guard2): Use new exits.
161 (vect_do_peeling): Update bookkeeping to keep track of exits.
162 * tree-vect-loop.cc (vect_get_loop_niters): Explicitly take exit to
164 (vec_init_loop_exit_info): New.
165 (_loop_vec_info::_loop_vec_info): Initialize vec_loop_iv,
166 vec_epilogue_loop_iv, scalar_loop_iv.
167 (vect_analyze_loop_form): Initialize exits.
168 (vect_create_loop_vinfo): Set main exit.
169 (vect_create_epilog_for_reduction, vectorizable_live_operation,
170 vect_transform_loop): Use it.
171 (scale_profile_for_vect_loop): Explicitly take exit to scale.
172 * tree-vectorizer.cc (set_uid_loop_bbs): Initialize loop exit.
173 * tree-vectorizer.h (LOOP_VINFO_IV_EXIT, LOOP_VINFO_EPILOGUE_IV_EXIT,
174 LOOP_VINFO_SCALAR_IV_EXIT): New.
175 (struct loop_vec_info): Add vec_loop_iv, vec_epilogue_loop_iv,
177 (vect_set_loop_condition, slpeel_can_duplicate_loop_p,
178 slpeel_tree_duplicate_loop_to_edge_cfg): Take explicit exits.
179 (vec_init_loop_exit_info): New.
180 (struct vect_loop_form_info): Add loop_exit.
182 2023-10-18 Tamar Christina <tamar.christina@arm.com>
184 * tree-vect-stmts.cc (vectorizable_comparison): Refactor, splitting body
186 (vectorizable_comparison_1): ...This.
188 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
190 * config/riscv/riscv-v.cc (shuffle_consecutive_patterns): New function.
191 (expand_vec_perm_const_1): Add consecutive pattern recognition.
193 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
195 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Panther
197 * common/config/i386/i386-common.cc (processor_name):
199 (processor_alias_table): Ditto.
200 * common/config/i386/i386-cpuinfo.h (enum processor_types):
201 Add INTEL_PANTHERLAKE.
202 * config.gcc: Add -march=pantherlake.
203 * config/i386/driver-i386.cc (host_detect_local_cpu): Refactor
204 the if clause. Handle pantherlake.
205 * config/i386/i386-c.cc (ix86_target_macros_internal):
207 * config/i386/i386-options.cc (processor_cost_table): Ditto.
208 (m_PANTHERLAKE): New.
209 (m_CORE_HYBRID): Add pantherlake.
210 * config/i386/i386.h (enum processor_type): Ditto.
211 * doc/extend.texi: Ditto.
212 * doc/invoke.texi: Ditto.
214 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
216 * config/i386/i386-options.cc (m_CORE_HYBRID): New.
217 * config/i386/x86-tune.def: Replace hybrid client tune to
220 2023-10-18 Haochen Jiang <haochen.jiang@intel.com>
222 * common/config/i386/cpuinfo.h
223 (get_intel_cpu): Handle Clearwater Forest.
224 * common/config/i386/i386-common.cc (processor_name):
225 Add Clearwater Forest.
226 (processor_alias_table): Ditto.
227 * common/config/i386/i386-cpuinfo.h (enum processor_types):
228 Add INTEL_CLEARWATERFOREST.
229 * config.gcc: Add -march=clearwaterforest.
230 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
232 * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
233 * config/i386/i386-options.cc (processor_cost_table): Ditto.
234 (m_CLEARWATERFOREST): New.
235 (m_CORE_ATOM): Add clearwaterforest.
236 * config/i386/i386.h (enum processor_type): Ditto.
237 * doc/extend.texi: Ditto.
238 * doc/invoke.texi: Ditto.
240 2023-10-18 liuhongt <hongtao.liu@intel.com>
242 * config/i386/mmx.md (fma<mode>4): New expander.
244 (fnma<mode>4): Ditto.
245 (fnms<mode>4): Ditto.
246 (vec_fmaddsubv4hf4): Ditto.
247 (vec_fmsubaddv4hf4): Ditto.
249 2023-10-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
252 * config/riscv/riscv-vector-costs.cc (get_biggest_mode): New function.
254 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
256 * config/aarch64/aarch64.cc (aarch64_layout_frame): Don't make
257 the position of the LR save slot dependent on stack clash
258 protection unless shadow call stacks are enabled.
260 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
262 * config/aarch64/aarch64.h (aarch64_frame): Add vectors that
263 store the list saved GPRs, FPRs and predicate registers.
264 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize
265 the lists of saved registers. Use them to choose push candidates.
266 Invalidate pop candidates if we're not going to do a pop.
267 (aarch64_next_callee_save): Delete.
268 (aarch64_save_callee_saves): Take a list of registers,
269 rather than a range. Make !skip_wb select only write-back
271 (aarch64_expand_prologue): Update calls accordingly.
272 (aarch64_restore_callee_saves): Take a list of registers,
273 rather than a range. Always skip pop candidates. Also skip
274 LR if shadow call stacks are enabled.
275 (aarch64_expand_epilogue): Update calls accordingly.
277 2023-10-17 Richard Sandiford <richard.sandiford@arm.com>
279 * cfgbuild.h (find_sub_basic_blocks): Declare.
280 * cfgbuild.cc (update_profile_for_new_sub_basic_block): New function,
282 (find_many_sub_basic_blocks): ...here.
283 (find_sub_basic_blocks): New function.
284 * function.cc (thread_prologue_and_epilogue_insns): Handle
285 epilogues that contain jumps.
287 2023-10-17 Andrew Pinski <apinski@marvell.com>
289 PR tree-optimization/110817
290 * tree-ssanames.cc (ssa_name_has_boolean_range): Remove the
291 check for boolean type as they don't have "[0,1]" range.
293 2023-10-17 Andrew Pinski <pinskia@gmail.com>
295 PR tree-optimization/111432
296 * match.pd (`a & (x | CST)`): New pattern.
298 2023-10-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
300 * tree-cfg.cc (move_sese_region_to_fn): Initialize profile_count for
303 2023-10-17 Richard Biener <rguenther@suse.de>
305 PR tree-optimization/111846
306 * tree-vectorizer.h (_slp_tree::simd_clone_info): Add.
307 (SLP_TREE_SIMD_CLONE_INFO): New.
308 * tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize
309 SLP_TREE_SIMD_CLONE_INFO.
310 (_slp_tree::~_slp_tree): Release it.
311 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
312 SLP_TREE_SIMD_CLONE_INFO or STMT_VINFO_SIMD_CLONE_INFO
313 dependent on if we're doing SLP.
315 2023-10-17 Jakub Jelinek <jakub@redhat.com>
317 * wide-int-print.h (print_dec_buf_size): For length, divide number
318 of bits by 3 and add 3 instead of division by 4 and adding 4.
319 * wide-int-print.cc (print_decs): Remove superfluous ()s. Don't call
320 print_hex, instead call print_decu on either negated value after
321 printing - or on wi itself.
322 (print_decu): Don't call print_hex, instead print even large numbers
324 (pp_wide_int_large): Assume len from print_dec_buf_size is big enough
325 even if it returns false.
326 * pretty-print.h (pp_wide_int): Use print_dec_buf_size to check if
327 pp_wide_int_large should be used.
328 * tree-pretty-print.cc (dump_generic_node): Use print_hex_buf_size
329 to compute needed buffer size.
331 2023-10-17 Richard Biener <rguenther@suse.de>
334 * tree-ssa.cc (maybe_optimize_var): When clearing
335 DECL_NOT_GIMPLE_REG_P always rewrite into SSA.
337 2023-10-17 Richard Biener <rguenther@suse.de>
339 PR tree-optimization/111807
340 * tree-sra.cc (build_ref_for_model): Only call
341 build_reconstructed_reference when the offsets are the same.
343 2023-10-17 Vineet Gupta <vineetg@rivosinc.com>
346 * expr.cc (expand_expr_real_2): Do not clear SUBREG_PROMOTED_VAR_P.
348 2023-10-17 Chenghui Pan <panchenghui@loongson.cn>
350 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
351 fix impl related to vec_initv32qiv16qi template to avoid ICE.
353 2023-10-17 Lulu Cheng <chenglulu@loongson.cn>
354 Chenghua Xu <xuchenghua@loongson.cn>
356 * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP):
359 2023-10-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
361 * config/riscv/riscv-vector-costs.cc (max_number_of_live_regs): Fix big LMUL issue.
362 (get_store_value): New function.
364 2023-10-16 Jeff Law <jlaw@ventanamicro.com>
366 * explow.cc (probe_stack_range): Handle case when expand_binop
367 does not construct its result in the expected location.
369 2023-10-16 David Malcolm <dmalcolm@redhat.com>
371 * diagnostic.cc (diagnostic_initialize): When LANG=C, update
372 default for -fdiagnostics-text-art-charset from emoji to ascii.
373 * doc/invoke.texi (fdiagnostics-text-art-charset): Document the above.
375 2023-10-16 David Malcolm <dmalcolm@redhat.com>
377 * diagnostic.cc (diagnostic_initialize): Ensure
378 context->extra_output_kind is initialized.
380 2023-10-16 Uros Bizjak <ubizjak@gmail.com>
382 * config/i386/i386.cc (ix86_can_inline_p):
383 Handle CM_LARGE and CM_LARGE_PIC.
384 (x86_elf_aligned_decl_common): Ditto.
385 (x86_output_aligned_bss): Ditto.
386 * config/i386/i386.opt: Update doc for -mlarge-data-threshold=.
387 * doc/invoke.texi: Update doc for -mlarge-data-threshold=.
389 2023-10-16 Christoph Müllner <christoph.muellner@vrull.eu>
391 * config/riscv/riscv-protos.h (emit_block_move): Remove redundant
392 prototype. Improve comment.
393 * config/riscv/riscv.cc (riscv_block_move_straight): Move from riscv.cc
394 into riscv-string.cc.
395 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
396 (riscv_expand_block_move): Likewise.
397 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add moved
399 (riscv_adjust_block_mem, riscv_block_move_loop): Likewise.
400 (riscv_expand_block_move): Likewise.
402 2023-10-16 Manolis Tsamis <manolis.tsamis@vrull.eu>
404 * Makefile.in: Add fold-mem-offsets.o.
405 * passes.def: Schedule a new pass.
406 * tree-pass.h (make_pass_fold_mem_offsets): Declare.
407 * common.opt: New options.
408 * doc/invoke.texi: Document new option.
409 * fold-mem-offsets.cc: New file.
411 2023-10-16 Andrew Pinski <pinskia@gmail.com>
413 PR tree-optimization/101541
414 * match.pd (A CMP 0 ? A : -A): Improve
415 using bitwise_equal_p.
417 2023-10-16 Andrew Pinski <pinskia@gmail.com>
419 PR tree-optimization/31531
420 * match.pd (~X op ~Y): Allow for an optional nop convert.
423 2023-10-16 Roger Sayle <roger@nextmovesoftware.com>
425 * config/arc/arc.md (*ashlsi3_1): New pre-reload splitter to
426 use bset dst,0,src to implement 1<<x on !TARGET_BARREL_SHIFTER.
428 2023-10-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
430 * config/s390/vector.md (popcountv8hi2_vx): Sign extend each
431 unsigned vector element.
433 2023-10-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
435 * config/riscv/riscv-vector-costs.cc (costs::preferred_new_lmul_p): Use VLS modes.
437 2023-10-16 Jiufu Guo <guojiufu@linux.ibm.com>
439 * fold-const.cc (expr_not_equal_to): Replace get_global_range_query
441 * gimple-fold.cc (size_must_be_zero_p): Likewise.
442 * gimple-range-fold.cc (fur_source::fur_source): Likewise.
443 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Likewise.
444 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
446 2023-10-16 liuhongt <hongtao.liu@intel.com>
448 * config/i386/mmx.md (V2FI_32): New mode iterator
449 (movd_v2hf_to_sse): Rename to ..
450 (movd_<mode>_to_sse): .. this.
451 (movd_v2hf_to_sse_reg): Rename to ..
452 (movd_<mode>_to_sse_reg): .. this.
453 (fix<fixunssuffix>_trunc<mode><mmxintvecmodelower>2): New
455 (fix<fixunssuffix>_truncv2hfv2si2): Ditto.
456 (float<floatunssuffix><mmxintvecmodelower><mode>2): Ditto.
457 (float<floatunssuffix>v2siv2hf2): Ditto.
458 (extendv2hfv2sf2): Ditto.
459 (truncv2sfv2hf2): Ditto.
460 * config/i386/sse.md (*vec_concatv8hf_movss): Rename to ..
461 (*vec_concat<mode>_movss): .. this.
463 2023-10-16 liuhongt <hongtao.liu@intel.com>
465 * config/i386/i386-expand.cc (ix86_sse_copysign_to_positive):
467 (ix86_expand_round_sse4): Ditto.
468 * config/i386/i386.md (roundhf2): New expander.
469 (lroundhf<mode>2): Ditto.
470 (lrinthf<mode>2): Ditto.
471 (l<rounding_insn>hf<mode>2): Ditto.
472 * config/i386/mmx.md (sqrt<mode>2): Ditto.
473 (btrunc<mode>2): Ditto.
474 (nearbyint<mode>2): Ditto.
475 (rint<mode>2): Ditto.
476 (lrint<mode><mmxintvecmodelower>2): Ditto.
477 (floor<mode>2): Ditto.
478 (lfloor<mode><mmxintvecmodelower>2): Ditto.
479 (ceil<mode>2): Ditto.
480 (lceil<mode><mmxintvecmodelower>2): Ditto.
481 (round<mode>2): Ditto.
482 (lround<mode><mmxintvecmodelower>2): Ditto.
483 * config/i386/sse.md (lrint<mode><sseintvecmodelower>2): Ditto.
484 (lfloor<mode><sseintvecmodelower>2): Ditto.
485 (lceil<mode><sseintvecmodelower>2): Ditto.
486 (lround<mode><sseintvecmodelower>2): Ditto.
487 (sse4_1_round<ssescalarmodesuffix>): Extend to V8HF.
488 (round<mode>2): Extend to V8HF/V16HF/V32HF.
490 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
492 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
493 @code; document more completely the supported Fortran sentinels.
495 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
497 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
498 instead of expand_binop. Optimize cases (i.e. avoid generating
499 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
500 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
502 2023-10-15 Jakub Jelinek <jakub@redhat.com>
504 PR tree-optimization/111800
505 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
506 print_decu_buf_size, print_hex_buf_size): New inline functions.
507 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
508 (assert_hexeq): Use print_hex_buf_size.
509 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
510 (print_decu): Use print_decu_buf_size.
511 (print_hex): Use print_hex_buf_size.
512 (pp_wide_int_large): Use print_dec_buf_size.
513 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
514 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
516 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
517 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
519 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
521 * combine.cc (simplify_compare_const): Fix handling of unsigned
524 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
526 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
528 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
530 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
531 'omp allocate' for stack variables.
533 2023-10-14 Jakub Jelinek <jakub@redhat.com>
536 * tree-core.h (struct tree_base): Remove int_length.offset
537 member, change type of int_length.unextended and int_length.extended
538 from unsigned char to unsigned short.
539 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
540 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
541 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
543 * tree.cc (wide_int_to_tree_1): Don't assert
544 TREE_INT_CST_OFFSET_NUNITS value.
545 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
546 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
547 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
548 (trailing_wide_int_storage): Change m_len type from unsigned char *
550 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
551 argument from unsigned char * to unsigned short *.
552 (trailing_wide_ints): Change m_max_len type from unsigned char to
553 unsigned short. Change m_len element type from
554 struct{unsigned char len;} to unsigned short.
555 (trailing_wide_ints <N>::operator []): Remove .len from m_len
557 * value-range-storage.h (irange_storage::lengths_address): Change
558 return type from const unsigned char * to const unsigned short *.
559 (irange_storage::write_lengths_address): Change return type from
560 unsigned char * to unsigned short *.
561 * value-range-storage.cc (irange_storage::write_lengths_address):
563 (irange_storage::lengths_address): Change return type from
564 const unsigned char * to const unsigned short *.
565 (write_wide_int): Change len argument type from unsigned char *&
566 to unsigned short *&.
567 (irange_storage::set_irange): Change len variable type from
568 unsigned char * to unsigned short *.
569 (read_wide_int): Change len argument type from unsigned char to
570 unsigned short. Use trailing_wide_int_storage <unsigned short>
571 instead of trailing_wide_int_storage and
572 trailing_wide_int <unsigned short> instead of trailing_wide_int.
573 (irange_storage::get_irange): Change len variable type from
574 unsigned char * to unsigned short *.
575 (irange_storage::size): Multiply n by sizeof (unsigned short)
576 in len_size variable initialization.
577 (irange_storage::dump): Change len variable type from
578 unsigned char * to unsigned short *.
580 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
582 * config/riscv/vector-iterators.md: Remove redundant iterators.
584 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
586 PR tree-optimization/111622
587 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
588 register a partial equivalence if an operand has no uses.
590 2023-10-13 Richard Biener <rguenther@suse.de>
592 PR tree-optimization/111795
593 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
594 integer mode mask arguments.
596 2023-10-13 Richard Biener <rguenther@suse.de>
598 * tree-vect-slp.cc (mask_call_maps): New.
599 (vect_get_operand_map): Handle IFN_MASK_CALL.
600 (vect_build_slp_tree_1): Likewise.
601 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
604 2023-10-13 Richard Biener <rguenther@suse.de>
606 PR tree-optimization/111779
607 * tree-sra.cc (sra_handled_bf_read_p): New function.
608 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
609 (sra_modify_expr): Likewise.
610 (make_fancy_name_1): Skip over BIT_FIELD_REF.
612 2023-10-13 Richard Biener <rguenther@suse.de>
614 PR tree-optimization/111773
615 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
616 not elide noreturn calls that are reflected to the IL.
618 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
620 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
622 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
624 2023-10-13 Pan Li <pan2.li@intel.com>
626 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
627 pattern for lfloor/lfloorf.
628 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
629 (expand_vec_lfloor): New func decl for expanding lfloor.
630 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
631 for expanding lfloor.
633 2023-10-13 Pan Li <pan2.li@intel.com>
635 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
636 pattern] for lceil/lceilf.
637 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
638 (expand_vec_lceil): New func decl for expanding lceil.
639 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
642 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
645 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
646 code from shifts that are undefined.
647 (can_be_built_by_li_lis_and_rldicr): Likewise.
648 (can_be_built_by_li_and_rldic): Protect code from shifts that
649 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
651 2023-10-12 Alex Coplan <alex.coplan@arm.com>
653 * reg-notes.def (NOALIAS): Correct comment.
655 2023-10-12 Jakub Jelinek <jakub@redhat.com>
658 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
660 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
661 (wi::ints_for): Provide separate partial specializations for
662 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
663 and CONST_PRECISION, rather than using
664 int_traits <extended_tree <N> >::precision_type as the second template
666 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
668 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
671 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
674 * doc/extend.texi: Change subsubsection to subsection for
677 2023-10-12 Tamar Christina <tamar.christina@arm.com>
679 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
681 2023-10-12 Jakub Jelinek <jakub@redhat.com>
683 * wide-int.h (widest_int_storage <N>::write_val): If l is small
684 and there is space in u.val array, store a canary value at the
686 (widest_int_storage <N>::set_len): Check the canary hasn't been
689 2023-10-12 Jakub Jelinek <jakub@redhat.com>
692 * wide-int.h: Adjust file comment.
693 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
694 (WIDE_INT_MAX_INL_PRECISION): Define.
695 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
696 is smaller than WIDE_INT_MAX_ELTS.
697 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
698 WIDEST_INT_MAX_PRECISION): Define.
699 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
700 to pass 0 as a new argument.
701 (class widest_int_storage): Likewise.
702 (widest_int, widest2_int): Change typedefs to use widest_int_storage
703 rather than fixed_wide_int_storage.
704 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
705 (struct binary_traits): Add partial specializations for
707 (generic_wide_int): Add needs_write_val_arg static data member.
708 (int_traits): Likewise.
709 (wide_int_storage): Replace val non-static data member with a union
710 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
711 assignment operator and destructor. Add unsigned int argument to
713 (wide_int_storage::wide_int_storage): Initialize precision to 0
714 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
715 Assert in non-default ctor T's precision_type is not
716 INL_CONST_PRECISION and allocate u.valp for large precision. Add
718 (wide_int_storage::~wide_int_storage): New.
719 (wide_int_storage::operator=): Add copy assignment operator. In
720 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
721 assert ctor T's precision_type is not INL_CONST_PRECISION and
722 if precision changes, deallocate and/or allocate u.valp.
723 (wide_int_storage::get_val): Return u.valp rather than u.val for
725 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
727 (wide_int_storage::set_len): Use write_val instead of writing val
729 (wide_int_storage::from, wide_int_storage::from_array): Adjust
731 (wide_int_storage::create): Allocate u.valp for large precisions.
732 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
733 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
735 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
736 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
737 Adjust write_val callers.
738 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
739 (WIDEST_INT): Define.
740 (widest_int_storage): New template class.
741 (wi::int_traits <widest_int_storage>): New.
742 (trailing_wide_int_storage::write_val): Add unused unsigned int
744 (wi::get_binary_precision): Use
745 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
746 rather than get_precision on get_binary_result.
747 (wi::copy): Adjust write_val callers. Don't call set_len if
749 (wi::bit_not): If result.needs_write_val_arg, call write_val
750 again with upper bound estimate of len.
751 (wi::sext, wi::zext, wi::set_bit): Likewise.
752 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
753 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
754 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
755 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
756 wi::lshift, wi::lrshift, wi::arshift): Likewise.
757 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
759 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
760 generic_wide_int, instead add functions and templates for each
761 storage of generic_wide_int. Make functions for
762 generic_wide_int <wide_int_storage> and templates for
763 generic_wide_int <widest_int_storage <N>> deleted.
764 (wi::mask, wi::shifted_mask): Adjust write_val calls.
765 * wide-int.cc (zeros): Decrease array size to 1.
766 (BLOCKS_NEEDED): Use CEIL.
767 (canonize): Use HOST_WIDE_INT_M1.
768 (wi::from_buffer): Pass 0 to write_val.
769 (wi::to_mpz): Use CEIL.
770 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
771 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
772 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
773 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
774 above WIDE_INT_MAX_INL_PRECISION estimate precision from
775 lengths of operands. Use XALLOCAVEC allocated buffers for
776 prec above WIDE_INT_MAX_INL_PRECISION.
777 (wi::divmod_internal): Likewise.
778 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
779 it from xlen and skip.
780 (rshift_large_common): Remove xprecision argument, add len
781 argument with len computed in caller. Don't return anything.
782 (wi::lrshift_large, wi::arshift_large): Compute len here
783 and pass it to rshift_large_common, for lengths above
784 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
785 (assert_deceq, assert_hexeq): For lengths above
786 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
787 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
788 WIDE_INT_MAX_PRECISION.
789 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
790 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
791 * wide-int-print.cc (print_decs, print_decu, print_hex): For
792 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
793 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
794 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
795 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
796 WIDE_INT_MAX_PRECISION.
797 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
798 instead of hard coded CONST_PRECISION.
799 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
800 WIDE_INT_MAX_PRECISION.
801 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
802 than WIDE_INT_MAX_PRECISION.
803 (wi::ints_for::zero): Use
804 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
806 * tree.cc (build_replicated_int_cst): Formatting fix. Use
807 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
808 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
809 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
810 * double-int.h (wi::int_traits <double_int>::precision_type): Change
811 to INL_CONST_PRECISION from CONST_PRECISION.
812 * poly-int.h (struct poly_coeff_traits): Add partial specialization
813 for wi::INL_CONST_PRECISION.
814 * cfgloop.h (bound_wide_int): New typedef.
815 (struct nb_iter_bound): Change bound type from widest_int to
817 (struct loop): Change nb_iterations_upper_bound,
818 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
819 widest_int to bound_wide_int.
820 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
821 of i_bound is too large for bound_wide_int. Adjustments for the
822 widest_int to bound_wide_int type change in non-static data members.
823 (get_estimated_loop_iterations, get_max_loop_iterations,
824 get_likely_max_loop_iterations): Adjustments for the widest_int to
825 bound_wide_int type change in non-static data members.
826 * tree-vect-loop.cc (vect_transform_loop): Likewise.
827 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
828 XALLOCAVEC allocated buffer for i_bound len above
829 WIDE_INT_MAX_INL_ELTS.
830 (record_estimate): Return early if wi::min_precision of i_bound is too
831 large for bound_wide_int. Adjustments for the widest_int to
832 bound_wide_int type change in non-static data members.
833 (wide_int_cmp): Use bound_wide_int instead of widest_int.
834 (bound_index): Use bound_wide_int instead of widest_int.
835 (discover_iteration_bound_by_body_walk): Likewise. Use
836 widest_int::from to convert it to widest_int when passed to
838 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
839 widest_int when passed to record_niter_bound.
840 (estimate_numbers_of_iteration): Don't record upper bound if
841 loop->nb_iterations has too large precision for bound_wide_int.
842 (n_of_executions_at_most): Use widest_int::from.
843 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
844 the widest_int to bound_wide_int changes.
845 * match.pd (fold_sign_changed_comparison simplification): Use
846 wide_int::from on wi::to_wide instead of wi::to_widest.
847 * value-range.h (irange::maybe_resize): Avoid using memcpy on
848 non-trivially copyable elements.
849 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
850 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
851 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
852 Use wide_int::from on wi::to_wide instead of wi::to_widest.
853 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
854 before calling wi::udiv_trunc.
855 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
856 bound_wide_int type change in non-static data members.
857 * lto-streamer-in.cc (input_cfg): Likewise.
858 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
859 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
860 XALLOCAVEC allocated buffer. Formatting fix.
861 * data-streamer-in.cc (streamer_read_wide_int,
862 streamer_read_widest_int): Likewise.
863 * tree-affine.cc (aff_combination_expand): Use placement new to
864 construct name_expansion.
865 (free_name_expansion): Destruct name_expansion.
866 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
867 index type from widest_int to offset_int.
868 (class incr_info_d): Change incr type from widest_int to offset_int.
869 (alloc_cand_and_find_basis, backtrace_base_for_ref,
870 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
871 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
872 slsr_process_add, cand_abs_increment, replace_mult_candidate,
873 replace_unconditional_candidate, incr_vec_index,
874 create_add_on_incoming_edge, create_phi_basis_1,
875 replace_conditional_candidate, record_increment,
876 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
877 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
878 nearest_common_dominator_for_cands, insert_initializers,
879 all_phi_incrs_profitable_1, replace_one_candidate,
880 replace_profitable_candidates): Use offset_int rather than widest_int
881 and wi::to_offset rather than wi::to_widest.
882 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
883 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
885 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
886 to construct tree_niter_desc and destruct it on failure.
887 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
888 * gengtype.cc (main): Remove widest_int handling.
889 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
890 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
891 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
892 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
893 assert get_len () fits into it.
894 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
895 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
897 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
898 wide_int::from on wi::to_wide instead of wi::to_widest.
899 * omp-general.cc (score_wide_int): New typedef.
900 (omp_context_compute_score): Use score_wide_int instead of widest_int
901 and adjust for those changes.
902 (struct omp_declare_variant_entry): Change score and
903 score_in_declare_simd_clone non-static data member type from widest_int
905 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
906 score_wide_int instead of widest_int and adjust for those changes.
907 (omp_lto_output_declare_variant_alt): Likewise.
908 (omp_lto_input_declare_variant_alt): Likewise.
909 * godump.cc (go_output_typedef): Assert get_len () is smaller than
910 WIDE_INT_MAX_INL_ELTS.
912 2023-10-12 Pan Li <pan2.li@intel.com>
914 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
915 pattern for lround/lroundf.
916 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
917 (expand_vec_lround): New func decl for expanding lround.
918 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
919 for expanding lround.
921 2023-10-12 Jakub Jelinek <jakub@redhat.com>
923 * dwarf2out.h (wide_int_ptr): Remove.
924 (dw_wide_int_ptr): New typedef.
925 (struct dw_val_node): Change type of val_wide from wide_int_ptr
927 (struct dw_wide_int): New type.
928 (dw_wide_int::elt): New method.
929 (dw_wide_int::operator ==): Likewise.
930 * dwarf2out.cc (get_full_len): Change argument type to
931 const dw_wide_int & from const wide_int &. Use CEIL. Call
932 get_precision method instead of calling wi::get_precision.
933 (alloc_dw_wide_int): New function.
934 (add_AT_wide): Change w argument type to const wide_int_ref &
935 from const wide_int &. Use alloc_dw_wide_int.
936 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
937 (insert_wide_int): Change val argument type to const wide_int_ref &
938 from const wide_int &.
939 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
940 add_AT_wide instead of using a temporary variable.
942 2023-10-12 Richard Biener <rguenther@suse.de>
944 PR tree-optimization/111764
945 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
946 to allow x + x via special-casing of assigns.
948 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
950 * common/config/i386/cpuinfo.h (get_available_features):
952 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
953 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
954 (ix86_handle_option): Handle -musermsr.
955 * common/config/i386/i386-cpuinfo.h (enum processor_features):
956 Add FEATURE_USER_MSR.
957 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
958 * config.gcc: Add usermsrintrin.h
959 * config/i386/cpuid.h (bit_USER_MSR): New.
960 * config/i386/i386-builtin-types.def:
961 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
962 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
963 Add __builtin_urdmsr and __builtin_uwrmsr.
964 * config/i386/i386-builtins.h (ix86_builtins):
965 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
966 * config/i386/i386-c.cc (ix86_target_macros_internal):
968 * config/i386/i386-expand.cc (ix86_expand_builtin):
970 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
971 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
973 * config/i386/i386.md (urdmsr): New define_insn.
975 * config/i386/i386.opt: Add option -musermsr.
976 * config/i386/x86gprintrin.h: Include usermsrintrin.h
977 * doc/extend.texi: Document usermsr.
978 * doc/invoke.texi: Document -musermsr.
979 * doc/sourcebuild.texi: Document target usermsr.
980 * config/i386/usermsrintrin.h: New file.
982 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
984 * config.gcc: Add loongarch-driver.h to tm_files.
985 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
986 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
987 instead of $(TM_H) for building generator programs.
989 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
992 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
993 instruction emission and incorporate to stack_protect_set<mode>.
994 (stack_protect_setdi): Rename to ...
995 (stack_protect_set<mode>): ... this, adjust constraint.
996 (stack_protect_testsi): Support prefixed instruction emission and
997 incorporate to stack_protect_test<mode>.
998 (stack_protect_testdi): Rename to ...
999 (stack_protect_test<mode>): ... this, adjust constraint.
1001 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1003 * tree-vect-stmts.cc (vectorizable_store): Consider generated
1004 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
1007 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1009 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
1010 (vectorizable_store): Adjust the costing for the remaining memory
1011 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
1013 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1015 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
1016 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
1018 (vectorizable_store): Adjust the cost handling on
1019 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
1021 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1023 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
1024 get VMAT_LOAD_STORE_LANES.
1025 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
1026 without calling vect_model_store_cost. Factor out new lambda function
1027 update_prologue_cost.
1029 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1031 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
1032 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
1034 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
1035 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
1037 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1039 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
1040 vectorizable_scan_store without calling vect_model_store_cost
1043 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1045 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
1046 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
1047 handlings and the related parameter gs_info.
1048 (vect_build_scatter_store_calls): Add the handlings on costing with
1049 one more argument cost_vec.
1050 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
1051 without calling vect_model_store_cost any more.
1053 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1055 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
1056 to vect_model_store_cost down to some different transform paths
1057 according to the handlings of different vect_memory_access_types
1058 or some special handling need.
1060 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
1062 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
1063 vector store for some case of VMAT_ELEMENTWISE is supported.
1065 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
1066 Hu Lin1 <lin1.hu@intel.com>
1067 Hongyu Wang <hongyu.wang@intel.com>
1069 * config/i386/i386.cc (gen_push2): New function to emit push2
1070 and adjust cfa offset.
1071 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
1072 determine whether push2/pop2 can be used.
1073 (ix86_compute_frame_layout): Adjust preferred stack boundary
1074 and stack alignment needed for push2/pop2.
1075 (ix86_emit_save_regs): Emit push2 when available.
1076 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
1077 and adjust cfa info.
1078 (ix86_emit_restore_regs_using_pop2): New function to loop
1079 through the saved regs and call above.
1080 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
1081 when push2pop2 available.
1082 * config/i386/i386.md (push2_di): New pattern for push2.
1083 (pop2_di): Likewise for pop2.
1085 2023-10-12 Pan Li <pan2.li@intel.com>
1087 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
1088 (lrint<mode><v_i_l_ll_convert>2): Rename to.
1089 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
1091 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
1093 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
1095 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
1097 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
1098 pseudo op instead of a "call" pseudo op.
1100 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
1102 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
1104 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
1105 (riscv_subset_list::clone): Ditto.
1106 (riscv_subset_list::parse_single_ext): Ditto.
1107 (riscv_subset_list::set_loc): Ditto.
1108 (riscv_set_arch_by_subset_list): Ditto.
1109 * common/config/riscv/riscv-common.cc
1110 (riscv_subset_list::parse_single_std_ext): New.
1111 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
1112 (riscv_subset_list::clone): Ditto.
1113 (riscv_subset_list::parse_single_ext): Ditto.
1114 (riscv_subset_list::set_loc): Ditto.
1115 (riscv_set_arch_by_subset_list): Ditto.
1117 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
1119 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
1120 from argument rather than get setting from global setting.
1121 (riscv_override_options_internal): New, splited from
1122 riscv_override_options, also take a gcc_options argument.
1123 (riscv_option_override): Splited most part to
1124 riscv_override_options_internal.
1126 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
1128 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
1129 TARGET_<NAME>_OPTS_P.
1130 (InverseMask): Ditto.
1131 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
1132 TARGET_<NAME>_OPTS_P macro.
1133 (InverseMask): Ditto.
1135 2023-10-11 Andrew Pinski <pinskia@gmail.com>
1137 PR tree-optimization/111282
1138 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
1139 `a & ((~a) ^ b)`): New patterns.
1141 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
1143 * common/config/riscv/riscv-common.cc: Add the XCValu
1145 * config/riscv/constraints.md: Add builtins for the XCValu
1147 * config/riscv/predicates.md (immediate_register_operand):
1149 * config/riscv/corev.def: Likewise.
1150 * config/riscv/corev.md: Likewise.
1151 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
1152 (RISCV_ATYPE_UHI): Likewise.
1153 * config/riscv/riscv-ftypes.def: Likewise.
1154 * config/riscv/riscv.opt: Likewise.
1155 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
1156 * doc/extend.texi: Add XCValu documentation.
1157 * doc/sourcebuild.texi: Likewise.
1159 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
1161 * common/config/riscv/riscv-common.cc: Add XCVmac.
1162 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
1163 * config/riscv/riscv-builtins.cc: Likewise.
1164 * config/riscv/riscv.md: Likewise.
1165 * config/riscv/riscv.opt: Likewise.
1166 * doc/extend.texi: Add XCVmac builtin documentation.
1167 * doc/sourcebuild.texi: Likewise.
1168 * config/riscv/corev.def: New file.
1169 * config/riscv/corev.md: New file.
1171 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1173 * config/riscv/autovec.md: Fix index bug.
1174 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
1175 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
1176 (gather_scatter_valid_offset_mode_p): New function.
1178 2023-10-11 Pan Li <pan2.li@intel.com>
1180 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
1182 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
1184 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
1186 (expand_vec_lrint): New function impl for expanding lint.
1187 * config/riscv/vector-iterators.md: New mode attr and iterator.
1189 2023-10-11 Richard Biener <rguenther@suse.de>
1190 Jakub Jelinek <jakub@redhat.com>
1192 PR tree-optimization/111519
1193 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
1194 argument and pass it through to recursive calls and
1195 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
1196 change stmt for gimple_assign_single_p statements for which we don't
1198 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
1199 it through to recursive calls and count_nonzero_bytes calls. Don't
1200 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
1201 shadow the stmt argument.
1203 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
1205 PR middle-end/101955
1206 PR tree-optimization/106245
1207 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
1208 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
1210 2023-10-11 liuhongt <hongtao.liu@intel.com>
1213 * config/i386/mmx.md (divv4hf3): Refine predicate of
1214 operands[2] with register_operand.
1216 2023-10-10 Andrew Waterman <andrew@sifive.com>
1217 Philipp Tomsich <philipp.tomsich@vrull.eu>
1218 Jeff Law <jlaw@ventanamicro.com>
1220 * config/riscv/riscv.cc (struct machine_function): Track if a
1221 far-branch/jump is used within a function (and $ra needs to be
1223 (riscv_print_operand): Implement 'N' (inverse integer branch).
1224 (riscv_far_jump_used_p): Implement.
1225 (riscv_save_return_addr_reg_p): New function.
1226 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
1227 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
1228 (CALL_USED_REGISTERS): Update $ra.
1229 * config/riscv/riscv.md: Add new types "ret" and "jalr".
1230 (length attribute): Handle long conditional and unconditional
1232 (conditional branch pattern): Handle case where jump can not
1233 reach the intended target.
1234 (indirect_jump, tablejump): Use new "jalr" type.
1235 (simple_return): Use new "ret" type.
1236 (simple_return_internal, eh_return_internal): Likewise.
1237 (gpr_restore_return, riscv_mret): Likewise.
1238 (riscv_uret, riscv_sret): Likewise.
1239 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
1241 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
1243 2023-10-10 Andrew Pinski <pinskia@gmail.com>
1245 PR tree-optimization/111679
1246 * match.pd (`a | ((~a) ^ b)`): New pattern.
1248 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1251 * config/riscv/autovec.md: Add VLS BOOL modes.
1253 2023-10-10 Richard Biener <rguenther@suse.de>
1255 PR tree-optimization/111751
1256 * fold-const.cc (fold_view_convert_expr): Up the buffer size
1258 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
1259 constants, giving up when re-interpretation to the target type
1262 2023-10-10 Richard Biener <rguenther@suse.de>
1264 PR tree-optimization/111751
1265 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
1266 BLKmode result from the padding bits check.
1268 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
1270 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
1272 * config/arc/arc.md (addsi_compare): Make pattern canonical.
1273 (addsi_compare_2): Fix identation, constraint letters.
1274 (addsi_compare_3): Likewise.
1276 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
1278 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
1279 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
1280 when scaling loop profile
1282 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
1284 PR tree-optimization/111694
1285 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
1287 * value-relation.cc (adjust_equivalence_range): New.
1288 * value-relation.h (adjust_equivalence_range): New prototype.
1290 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
1292 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
1293 not call get_identity_relation.
1294 (gori_compute::compute_operand2_range): Ditto.
1295 * value-relation.cc (get_identity_relation): Remove.
1296 * value-relation.h (get_identity_relation): Remove protyotype.
1298 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
1300 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
1301 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
1303 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
1305 (TARGET_SCHED_ADJUST_COST): Define.
1306 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
1307 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
1308 * config/riscv/generic-ooo.md: New file.
1309 * config/riscv/vector.md: Add vsetvl_pre.
1311 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1313 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
1314 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
1315 * config/riscv/vector.md (movmisalign<mode>): New pattern.
1317 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
1319 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
1320 directives for store-pair instruction.
1322 2023-10-09 Richard Biener <rguenther@suse.de>
1324 PR tree-optimization/111715
1325 * alias.cc (reference_alias_ptr_type_1): When we have
1326 a type-punning ref at the base search for the access
1327 path part that's still semantically valid.
1329 2023-10-09 Pan Li <pan2.li@intel.com>
1331 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
1333 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
1335 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
1337 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
1338 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
1340 (ix86_split_lshr): Likewise, split shifts by one bit into
1341 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
1342 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
1343 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
1344 (rcrdi2): New define_insn for rcrq.
1345 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
1346 set the carry flag from the least significant bit, modelled using
1348 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
1349 controlling use of rcr 1 vs. shrd, which is significantly faster on
1352 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1354 * config/i386/i386.opt: Allow -mno-evex512.
1356 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1357 Hu, Lin1 <lin1.hu@intel.com>
1359 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
1362 (VFH_AVX512VL): Ditto.
1364 (VHF_AVX512VL): Ditto.
1365 (VI2H_AVX512VL): Ditto.
1366 (VI2F_256_512): Ditto.
1367 (VF48_I1248): Remove unused iterator.
1368 (VF48H_AVX512VL): Add TARGET_EVEX512.
1369 (VF_AVX512): Remove unused iterator.
1370 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
1371 (REDUC_SMINMAX_MODE): Ditto.
1373 (VFH_SF_AVX512VL): Ditto.
1374 (VEC_PERM_AVX2): Ditto.
1376 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1377 Hu, Lin1 <lin1.hu@intel.com>
1379 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
1381 (VI1_AVX512F): Ditto.
1382 (VI1_AVX512VNNI): Ditto.
1383 (VI1_AVX512VL_F): Ditto.
1384 (VI12_VI48F_AVX512VL): Ditto.
1385 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
1386 (sdot_prod<mode>): Ditto.
1387 (VEC_PERM_AVX2): Ditto.
1390 (vpmadd52<vpmadd52type>v8di): Ditto.
1391 (usdot_prod<mode>): Ditto.
1392 (vpdpbusd_v16si): Ditto.
1393 (vpdpbusds_v16si): Ditto.
1394 (vpdpwssd_v16si): Ditto.
1395 (vpdpwssds_v16si): Ditto.
1396 (VI48_AVX512VP2VL): Ditto.
1397 (avx512vp2intersect_2intersectv16si): Ditto.
1398 (VF_AVX512BF16VL): Ditto.
1399 (VF1_AVX512_256): Ditto.
1401 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1403 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
1404 Make sure there is EVEX512 enabled.
1405 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
1406 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
1407 when !TARGET_EVEX512.
1408 * config/i386/i386.md (avx512bw_512): New.
1409 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
1410 (*zero_extendsidi2): Change isa to avx512bw_512.
1413 (*andn<mode>_1): Change isa to kmov_isa.
1414 (*<code><mode>_1): Ditto.
1415 (*notxor<mode>_1): Ditto.
1416 (*one_cmpl<mode>2_1): Ditto.
1417 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
1418 (*ashl<mode>3_1): Change isa to kmov_isa.
1419 (*lshr<mode>3_1): Ditto.
1420 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
1421 (VI1248_AVX512VLBW): Ditto.
1422 (VHFBF_AVX512VL): Ditto.
1426 (VI1_AVX512): Ditto.
1427 (VI12_256_512_AVX512VL): Ditto.
1428 (VI2_AVX2_AVX512BW): Ditto.
1429 (VI2_AVX512VNNIBW): Ditto.
1430 (VI2_AVX512VL): Ditto.
1431 (VI2HFBF_AVX512VL): Ditto.
1432 (VI8_AVX2_AVX512BW): Ditto.
1433 (VIMAX_AVX2_AVX512BW): Ditto.
1434 (VIMAX_AVX512VL): Ditto.
1435 (VI12_AVX2_AVX512BW): Ditto.
1436 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
1437 (VI248_AVX512VL): Ditto.
1438 (VI248_AVX512VLBW): Ditto.
1439 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
1440 (VI248_AVX512BW): Ditto.
1441 (VI248_AVX512BW_AVX512VL): Ditto.
1443 (VI124_256_AVX512F_AVX512BW): Ditto.
1444 (VI_AVX512BW): Ditto.
1445 (VIHFBF_AVX512BW): Ditto.
1446 (SWI1248_AVX512BWDQ): Ditto.
1447 (SWI1248_AVX512BW): Ditto.
1448 (SWI1248_AVX512BWDQ2): Ditto.
1449 (*knotsi_1_zext): Ditto.
1450 (define_split for zero_extend + not): Ditto.
1452 (REDUC_SMINMAX_MODE): Ditto.
1453 (VEC_EXTRACT_MODE): Ditto.
1454 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
1455 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
1456 (truncv32hiv32qi2): Ditto.
1457 (avx512bw_<code>v32hiv32qi2): Ditto.
1458 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
1459 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
1461 (VEC_PERM_AVX2): Ditto.
1462 (AVX512ZEXTMASK): Ditto.
1464 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
1465 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
1466 (avx512bw_packssdw<mask_name>): Ditto.
1467 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
1468 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
1469 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
1470 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
1471 (vec_unpacks_lo_di): Ditto.
1473 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
1474 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
1475 (VI1248_AVX512VL_AVX512BW): Ditto.
1476 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
1477 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
1478 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
1479 (<insn>v32qiv32hi2): Ditto.
1480 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
1481 (VPERMI2): Add TARGET_EVEX512.
1484 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1486 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
1487 Add TARGET_EVEX512 for 512 bit usage.
1488 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
1489 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
1490 (VF1_128_256VL): Ditto.
1491 (VF2_AVX512VL): Ditto.
1492 (VI8_256_512): Ditto.
1493 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
1495 (AVX512_VEC): Ditto.
1496 (AVX512_VEC_2): Ditto.
1497 (VI4F_BRCST32x2): Ditto.
1498 (VI8F_BRCST64x2): Ditto.
1500 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1502 * config/i386/i386-builtins.cc
1503 (ix86_vectorize_builtin_gather): Disable 512 bit gather
1504 when !TARGET_EVEX512.
1505 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
1507 (ix86_expand_int_sse_cmp): Ditto.
1508 (ix86_expand_vector_init_one_nonzero): Disable subroutine
1509 when !TARGET_EVEX512.
1510 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
1511 (ix86_vectorize_vec_perm_const): Disable subroutine when
1513 * config/i386/i386.cc
1514 (standard_sse_constant_p): Add TARGET_EVEX512.
1515 (standard_sse_constant_opcode): Ditto.
1516 (ix86_get_ssemov): Ditto.
1517 (ix86_legitimate_constant_p): Ditto.
1518 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
1519 when !TARGET_EVEX512.
1520 * config/i386/i386.md (avx512f_512): New.
1521 (movxi): Add TARGET_EVEX512.
1522 (*movxi_internal_avx512f): Ditto.
1523 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
1525 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
1527 (*movhi_internal): Change alternative 11 to *Yv.
1528 (*movdf_internal): Change alternative 12 to Yv.
1529 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
1530 alternative 5 and 6.
1531 (*mov<mode>_internal): Change alternative 4 to Yv.
1532 (define_split for convert SF to DF): Add TARGET_EVEX512.
1533 (extendbfsf2_1): Ditto.
1534 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
1535 for 512 bit when !TARGET_EVEX512.
1536 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
1537 (V48_AVX512VL): Ditto.
1538 (V48_256_512_AVX512VL): Ditto.
1539 (V48H_AVX512VL): Ditto.
1540 (VI12_AVX512VL): Ditto.
1545 (VF1_VF2_AVX512DQ): Ditto.
1552 (VF2_512_256): Ditto.
1553 (VF2_512_256VL): Ditto.
1556 (VI48_AVX512VL): Ditto.
1557 (VI1248_AVX512VLBW): Ditto.
1558 (VF_AVX512VL): Ditto.
1559 (VFH_AVX512VL): Ditto.
1560 (VF1_AVX512VL): Ditto.
1565 (VI8_AVX512VL): Ditto.
1566 (VI2_AVX512F): Ditto.
1567 (VI4_AVX512F): Ditto.
1568 (VI4_AVX512VL): Ditto.
1569 (VI48_AVX512F_AVX512VL): Ditto.
1570 (VI8_AVX2_AVX512F): Ditto.
1571 (VI8_AVX_AVX512F): Ditto.
1574 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
1575 (VI248_AVX512VLBW): Ditto.
1576 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
1577 (VI248_AVX512BW): Ditto.
1578 (VI248_AVX512BW_AVX512VL): Ditto.
1579 (VI48_AVX512F): Ditto.
1580 (VI48_AVX_AVX512F): Ditto.
1581 (VI12_AVX_AVX512F): Ditto.
1583 (VI124_256_AVX512F_AVX512BW): Ditto.
1585 (VI_AVX512BW): Ditto.
1586 (VIHFBF_AVX512BW): Ditto.
1587 (VI4F_256_512): Ditto.
1588 (VI48F_256_512): Ditto.
1590 (VI12_VI48F_AVX512VL): Ditto.
1592 (AVX512MODE2P): Ditto.
1593 (STORENT_MODE): Ditto.
1594 (REDUC_PLUS_MODE): Ditto.
1595 (REDUC_SMINMAX_MODE): Ditto.
1596 (*andnot<mode>3): Change isa attribute to avx512f_512.
1597 (*andnot<mode>3): Ditto.
1598 (<code><mode>3): Ditto.
1600 (FMAMODEM): Add TARGET_EVEX512.
1601 (FMAMODE_AVX512): Ditto.
1602 (VFH_SF_AVX512VL): Ditto.
1603 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
1604 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
1606 (avx512f_cvtdq2pd512_2): Ditto.
1607 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
1608 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
1610 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
1611 (vec_unpacks_lo_v16sf): Ditto.
1612 (vec_unpacks_hi_v16sf): Ditto.
1613 (vec_unpacks_float_hi_v16si): Ditto.
1614 (vec_unpacks_float_lo_v16si): Ditto.
1615 (vec_unpacku_float_hi_v16si): Ditto.
1616 (vec_unpacku_float_lo_v16si): Ditto.
1617 (vec_pack_sfix_trunc_v8df): Ditto.
1618 (avx512f_vec_pack_sfix_v8df): Ditto.
1619 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
1620 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
1621 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
1622 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
1623 (AVX512_VEC): Ditto.
1624 (AVX512_VEC_2): Ditto.
1625 (vec_extract_lo_v64qi): Ditto.
1626 (vec_extract_hi_v64qi): Ditto.
1627 (VEC_EXTRACT_MODE): Ditto.
1628 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
1629 (avx512f_movddup512<mask_name>): Ditto.
1630 (avx512f_unpcklpd512<mask_name>): Ditto.
1631 (*<avx512>_vternlog<mode>_all): Ditto.
1632 (*<avx512>_vpternlog<mode>_1): Ditto.
1633 (*<avx512>_vpternlog<mode>_2): Ditto.
1634 (*<avx512>_vpternlog<mode>_3): Ditto.
1635 (avx512f_shufps512_mask): Ditto.
1636 (avx512f_shufps512_1<mask_name>): Ditto.
1637 (avx512f_shufpd512_mask): Ditto.
1638 (avx512f_shufpd512_1<mask_name>): Ditto.
1639 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
1640 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
1641 (vec_dupv2df<mask_name>): Ditto.
1642 (trunc<pmov_src_lower><mode>2): Ditto.
1643 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
1644 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
1645 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
1646 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
1647 (truncv8div8qi2): Ditto.
1648 (avx512f_<code>v8div16qi2): Ditto.
1649 (*avx512f_<code>v8div16qi2_store_1): Ditto.
1650 (*avx512f_<code>v8div16qi2_store_2): Ditto.
1651 (avx512f_<code>v8div16qi2_mask): Ditto.
1652 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
1653 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
1654 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
1655 (vec_widen_umult_even_v16si<mask_name>): Ditto.
1656 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
1657 (vec_widen_smult_even_v16si<mask_name>): Ditto.
1658 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
1659 (VEC_PERM_AVX2): Ditto.
1660 (one_cmpl<mode>2): Ditto.
1661 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
1662 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
1663 (define_split to xor): Ditto.
1664 (*andnot<mode>3): Ditto.
1665 (define_split for ior): Ditto.
1666 (*iornot<mode>3): Ditto.
1667 (*xnor<mode>3): Ditto.
1668 (*<nlogic><mode>3): Ditto.
1669 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
1670 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
1671 (avx512f_pshufdv3_mask): Ditto.
1672 (avx512f_pshufd_1<mask_name>): Ditto.
1673 (*vec_extractv4ti): Ditto.
1674 (VEXTRACTI128_MODE): Ditto.
1675 (define_split to vec_extract): Ditto.
1676 (VI1248_AVX512VL_AVX512BW): Ditto.
1677 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
1678 (<insn>v16qiv16si2): Ditto.
1679 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
1680 (<insn>v16hiv16si2): Ditto.
1681 (avx512f_zero_extendv16hiv16si2_1): Ditto.
1682 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
1683 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
1684 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
1685 (<insn>v8qiv8di2): Ditto.
1686 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
1687 (<insn>v8hiv8di2): Ditto.
1688 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
1689 (*avx512f_zero_extendv8siv8di2_1): Ditto.
1690 (*avx512f_zero_extendv8siv8di2_2): Ditto.
1691 (<insn>v8siv8di2): Ditto.
1692 (avx512f_roundps512_sfix): Ditto.
1693 (vashrv8di3): Ditto.
1694 (vashrv16si3): Ditto.
1695 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
1696 (vec_dupv4sf): Add TARGET_EVEX512.
1697 (*vec_dupv4si): Ditto.
1698 (*vec_dupv2di): Ditto.
1699 (vec_dup<mode>): Change isa attribute to avx512f_512.
1700 (VPERMI2): Add TARGET_EVEX512.
1702 (VEC_INIT_MODE): Ditto.
1703 (VEC_INIT_HALF_MODE): Ditto.
1704 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
1706 (avx512f_vcvtps2ph512_mask_sae): Ditto.
1707 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
1709 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
1710 (INT_BROADCAST_MODE): Ditto.
1712 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1714 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
1715 Disable zmm broadcast for !TARGET_EVEX512.
1716 * config/i386/i386-options.cc (ix86_option_override_internal):
1717 Do not use PVW_512 when no-evex512.
1718 (ix86_simd_clone_adjust): Add evex512 target into string.
1719 * config/i386/i386.cc (type_natural_mode): Report ABI warning
1720 when using zmm register w/o evex512.
1721 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
1722 (ix86_hard_regno_mode_ok): Ditto.
1723 (ix86_set_reg_reg_cost): Ditto.
1724 (ix86_rtx_costs): Ditto.
1725 (ix86_vector_mode_supported_p): Ditto.
1726 (ix86_preferred_simd_mode): Ditto.
1727 (ix86_get_mask_mode): Ditto.
1728 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
1729 libmvec call when !TARGET_EVEX512.
1730 (ix86_simd_clone_usable): Ditto.
1731 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
1732 when !TARGET_EVEX512
1733 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
1734 (STORE_MAX_PIECES): Ditto.
1736 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1738 * config/i386/i386-builtin.def (BDESC): Add
1739 OPTION_MASK_ISA2_EVEX512.
1741 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1743 * config/i386/i386-builtin.def (BDESC): Add
1744 OPTION_MASK_ISA2_EVEX512.
1746 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1748 * config/i386/i386-builtin.def (BDESC): Add
1749 OPTION_MASK_ISA2_EVEX512.
1751 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1753 * config/i386/i386-builtin.def (BDESC): Add
1754 OPTION_MASK_ISA2_EVEX512.
1756 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1758 * config/i386/i386-builtin.def (BDESC): Add
1759 OPTION_MASK_ISA2_EVEX512.
1760 * config/i386/i386-builtins.cc
1761 (ix86_init_mmx_sse_builtins): Ditto.
1763 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1764 Hu, Lin1 <lin1.hu@intel.com>
1766 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
1769 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1771 * config.gcc: Add avx512bitalgvlintrin.h.
1772 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
1774 * config/i386/avx5124vnniwintrin.h: Ditto.
1775 * config/i386/avx512bf16intrin.h: Ditto.
1776 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
1777 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
1778 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
1780 * config/i386/avx512ifmaintrin.h: Ditto
1781 * config/i386/avx512pfintrin.h: Ditto
1782 * config/i386/avx512vbmi2intrin.h: Ditto.
1783 * config/i386/avx512vbmiintrin.h: Ditto.
1784 * config/i386/avx512vnniintrin.h: Ditto.
1785 * config/i386/avx512vp2intersectintrin.h: Ditto.
1786 * config/i386/avx512vpopcntdqintrin.h: Ditto.
1787 * config/i386/gfniintrin.h: Ditto.
1788 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
1789 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
1790 * config/i386/vpclmulqdqintrin.h: Ditto.
1791 * config/i386/avx512bitalgvlintrin.h: New.
1793 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1795 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
1798 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1800 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
1803 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1805 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
1807 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1809 * common/config/i386/i386-common.cc
1810 (OPTION_MASK_ISA2_EVEX512_SET): New.
1811 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
1812 (ix86_handle_option): Handle EVEX512.
1813 * config/i386/i386-c.cc
1814 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
1815 when AVX512VL is set.
1816 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
1817 (ix86_valid_target_attribute_inner_p): Ditto.
1818 (ix86_option_override_internal): Set EVEX512 target if it is not
1819 explicitly set when AVX512 is enabled. Disable
1820 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
1821 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
1823 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
1826 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
1827 from insn condition.
1828 (lrint<mode>si2): New insn pattern for 32bit lrint.
1830 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
1833 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
1834 Enable SImode on FP registers for P7.
1835 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
1836 move between FP registers. Set attribute isa of stfiwx to "*"
1837 and attribute of stxsiwx to "p7".
1839 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1841 * config/s390/s390.md: Make use of new copysign RTL.
1843 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
1845 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
1846 with "jm" for alternative 0 and 1 of operand 2.
1847 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
1848 "ja" for alternative 0 and 1 of operand2.
1850 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1853 * text-art/table.cc (table::maybe_set_cell_span): New.
1854 (table::add_other_table): New.
1855 * text-art/table.h (class table::cell_placement): Add class table
1857 (table::add_rows): New.
1858 (table::add_row): Reimplement in terms of add_rows.
1859 (table::maybe_set_cell_span): New decl.
1860 (table::add_other_table): New decl.
1861 * text-art/types.h (operator+): New operator for rect + coord.
1863 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1865 * genmatch.cc (main): Update for "m_" prefix of some fields of
1867 * input.cc (make_location): Update for removal of
1868 COMBINE_LOCATION_DATA.
1869 (dump_line_table_statistics): Update for "m_" prefix of some
1870 fields of line_maps.
1871 (location_with_discriminator): Update for removal of
1872 COMBINE_LOCATION_DATA.
1873 (line_table_test::line_table_test): Update for "m_" prefix of some
1874 fields of line_maps.
1875 * toplev.cc (general_init): Likewise.
1876 * tree.cc (set_block): Update for removal of
1877 COMBINE_LOCATION_DATA.
1878 (set_source_range): Likewise.
1880 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1882 * input.cc (make_location): Move implementation to
1883 line_maps::make_location.
1885 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1888 * input.cc (file_cache::add_file): Update leading comment to
1889 clarify that it can fail.
1890 (file_cache::lookup_or_add_file): Likewise.
1891 (file_cache::get_source_file_content): Gracefully handle
1892 lookup_or_add_file failing.
1894 2023-10-08 liuhongt <hongtao.liu@intel.com>
1896 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
1898 (ix86_build_signbit_mask): Ditto.
1899 * config/i386/mmx.md (mmxintvecmode): Ditto.
1900 (<code><mode>2): New define_expand.
1901 (*mmx_<code><mode>): New define_insn_and_split.
1902 (*mmx_nabs<mode>2): Ditto.
1903 (*mmx_andnot<mode>3): New define_insn.
1904 (<code><mode>3): Ditto.
1905 (copysign<mode>3): New define_expand.
1906 (xorsign<mode>3): Ditto.
1907 (signbit<mode>2): Ditto.
1909 2023-10-08 liuhongt <hongtao.liu@intel.com>
1911 * config/i386/mmx.md (VHF_32_64): New mode iterator.
1912 (<insn><mode>3): New define_expand, merged from ..
1913 (<insn>v4hf3): .. this and
1914 (<insn>v2hf3): .. this.
1915 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
1916 (movd_v2hf_to_sse): .. this.
1917 (<code><mode>3): New define_expand.
1919 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1921 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
1922 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
1924 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1926 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
1928 (can_be_built_by_li_lis_and_rldicr): New function.
1929 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
1930 can_be_built_by_li_lis_and_rldicl.
1932 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1934 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
1936 (can_be_built_by_li_and_rotldi): Rename to ...
1937 (can_be_built_by_li_lis_and_rotldi): ... this function.
1938 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
1940 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1942 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
1943 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
1945 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
1947 * config/riscv/linux.h: Pass the static-pie specific options to
1950 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
1952 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
1954 * config/aarch64/aarch64-tune.md: Regenerated.
1955 * doc/invoke.texi: Add command-line option for cortex-x4 core.
1957 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1958 Hongyu Wang <hongyu.wang@intel.com>
1959 Hongtao Liu <hongtao.liu@intel.com>
1961 * config/i386/constraints.md (jb): New constraint for vsib memory
1962 that does not allow gpr32.
1963 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
1964 alternative and set attr_gpr32 to 0.
1965 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
1967 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
1968 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
1969 (*rsqrtsf2_sse): Likewise.
1970 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
1971 avx/noavx and assign jr/r constraint to dest.
1972 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
1973 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
1974 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
1975 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
1976 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
1977 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
1978 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
1979 (<sse2_avx2>_pmovmskb): Likewise.
1980 (*<sse2_avx2>_pmovmskb_zext): Likewise.
1981 (*sse2_pmovmskb_ext): Likewise.
1982 (*<sse2_avx2>_pmovmskb_lt): Likewise.
1983 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
1984 (*sse2_pmovmskb_ext_lt): Likewise.
1985 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
1986 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
1987 (sse_vmrcpv4sf2): Likewise.
1988 (*sse_vmrcpv4sf2): Likewise.
1989 (rsqrt<mode>2): Likewise.
1990 (sse_vmrsqrtv4sf2): Likewise.
1991 (*sse_vmrsqrtv4sf2): Likewise.
1992 (avx_h<insn>v4df3): Likewise.
1993 (sse3_hsubv2df3): Likewise.
1994 (avx_h<insn>v8sf3): Likewise.
1995 (sse3_h<insn>v4sf3): Likewise.
1996 (<sse3>_lddqu<avxsizesuffix>): Likewise.
1997 (avx_cmp<mode>3): Likewise.
1998 (avx_vmcmp<mode>3): Likewise.
1999 (*sse2_gt<mode>3): Likewise.
2000 (sse_ldmxcsr): Likewise.
2001 (sse_stmxcsr): Likewise.
2002 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
2003 avx alternative and set attr_gpr32 to 0.
2004 (avx2_permv2ti): Likewise.
2005 (*avx_vperm2f128<mode>_full): Likewise.
2006 (*avx_vperm2f128<mode>_nozero): Likewise.
2007 (vec_set_lo_v32qi): Likewise.
2008 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
2009 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
2010 (avx_cmp<mode>3): Likewise.
2011 (avx_vmcmp<mode>3): Likewise.
2012 (*<sse>_maskcmp<mode>3_comm): Likewise.
2013 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
2015 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
2016 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
2017 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
2018 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
2019 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
2020 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
2021 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
2022 (vec_set_lo_<mode><mask_name>): Likewise.
2023 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
2024 (vec_set_hi_<mode><mask_name>): Likewise.
2025 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
2026 (vec_set_hi_<mode>): Likewise.
2027 (vec_set_lo_<mode>): Likewise.
2028 (avx2_set_hi_v32qi): Likewise.
2030 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2031 Hongyu Wang <hongyu.wang@intel.com>
2032 Hongtao Liu <hongtao.liu@intel.com>
2034 * config/i386/i386.md (*movhi_internal): Split out non-gpr
2035 supported pextrw with mem constraint to avx/noavx alternatives,
2036 set jm and attr gpr32 0 to the noavx alternative.
2037 (*mov<mode>_internal): Likewise.
2038 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
2039 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
2040 (mmx_pshufbv4qi3): Likewise.
2041 (*mmx_pinsrd): Likewise.
2042 (*mmx_pinsrb): Likewise.
2043 (*pinsrb): Likewise.
2044 (mmx_pshufbv8qi3): Likewise.
2045 (mmx_pshufbv4qi3): Likewise.
2046 (@sse4_1_insertps_<mode>): Likewise.
2047 (*mmx_pextrw): Split altrenatives and map non-EGPR
2048 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
2049 (*movv2qi_internal): Likewise.
2050 (*pextrw): Likewise.
2051 (*mmx_pextrb): Likewise.
2052 (*mmx_pextrb_zext): Likewise.
2053 (*pextrb): Likewise.
2054 (*pextrb_zext): Likewise.
2055 (vec_extractv2si_1): Likewise.
2056 (vec_extractv2si_1_zext): Likewise.
2057 * config/i386/sse.md: (vi128_h_r): New mode attr for
2058 pinsr{bw}/pextr{bw} with reg operand.
2059 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
2060 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
2061 (*vec_extract<mode>): Likewise.
2062 (*vec_extract<mode>): Likewise for HFBF pattern.
2063 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
2064 (*vec_extractv4si_1): Likewise.
2065 (*vec_extractv4si_zext): Likewise.
2066 (*vec_extractv2di_1): Likewise.
2067 (*vec_concatv2si_sse4_1): Likewise.
2068 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
2069 (vec_concatv2di): Likewise.
2070 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
2071 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
2072 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
2073 %v for avx/noavx alternatives if necessary.
2074 (*vec_concatv2sf_sse4_1): Likewise.
2075 (*sse4_1_extractps): Likewise.
2076 (vec_set<mode>_0): Likewise for VI4F_128.
2077 (*vec_setv4sf_sse4_1): Likewise.
2078 (@sse4_1_insertps<mode>): Likewise.
2079 (ssse3_pmaddubsw128): Likewise.
2080 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
2081 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
2082 (<ssse3_avx2>_palignr<mode>): Likewise.
2083 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
2084 (<sse4_1_avx2>_mpsadbw): Likewise.
2085 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
2086 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
2087 (*sse4_1_<code><mode>3<mask_name>): Likewise.
2088 (*<code>v8hi3): Likewise.
2089 (*<code>v16qi3): Likewise.
2090 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
2091 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
2092 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
2093 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
2094 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
2095 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
2096 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
2097 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
2098 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
2099 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
2100 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
2102 (aesdeclast): Likewise.
2104 (aesenclast): Likewise.
2105 (pclmulqdq): Likewise.
2106 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
2107 (vgf2p8affineqb_<mode><mask_name>): Likewise.
2108 (vgf2p8mulb_<mode><mask_name>): Likewise.
2110 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2111 Hongyu Wang <hongyu.wang@intel.com>
2112 Hongtao Liu <hongtao.liu@intel.com>
2114 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
2116 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
2118 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
2119 and constraint jm to all non-evex alternatives, adjust
2120 alternative outputs if evex reg is mentioned.
2121 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
2122 and constraint jm/ja to all non-evex alternatives.
2123 (ptesttf2): Likewise.
2124 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
2125 (sse4_1_round<ssescalarmodesuffix>): Likewise.
2126 (sse4_2_pcmpestri): Likewise.
2127 (sse4_2_pcmpestrm): Likewise.
2128 (sse4_2_pcmpestr_cconly): Likewise.
2129 (sse4_2_pcmpistr): Likewise.
2130 (sse4_2_pcmpistri): Likewise.
2131 (sse4_2_pcmpistrm): Likewise.
2132 (sse4_2_pcmpistr_cconly): Likewise.
2134 (aeskeygenassist): Likewise.
2136 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2137 Hongyu Wang <hongyu.wang@intel.com>
2138 Hongtao Liu <hongtao.liu@intel.com>
2140 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
2141 attr gpr32 0 and constraint jm/ja to all mem alternatives.
2142 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
2143 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
2144 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
2145 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
2146 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
2147 (<ssse3_avx2>_psign<mode>3): Likewise.
2148 (ssse3_psign<mode>3): Likewise.
2149 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
2150 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
2151 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
2152 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
2153 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
2154 (<sse4_1_avx2>_mpsadbw): Likewise.
2155 (<sse4_1_avx2>_pblendvb): Likewise.
2156 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
2157 (sse4_1_pblend<ssemodesuffix>): Likewise.
2158 (*avx2_pblend<ssemodesuffix>): Likewise.
2159 (avx2_permv2ti): Likewise.
2160 (*avx_vperm2f128<mode>_nozero): Likewise.
2161 (*avx2_eq<mode>3): Likewise.
2162 (*sse4_1_eqv2di3): Likewise.
2163 (sse4_2_gtv2di3): Likewise.
2164 (avx2_gt<mode>3): Likewise.
2166 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2167 Hongyu Wang <hongyu.wang@intel.com>
2168 Hongtao Liu <hongtao.liu@intel.com>
2170 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
2172 (<xsave>_rex64): Likewise.
2173 (<xrstor>_rex64): Likewise.
2174 (<xrstor>64): Likewise.
2175 (fxsave64): Likewise.
2176 (fxstore64): Likewise.
2178 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
2179 Kong Lingling <lingling.kong@intel.com>
2180 Hongtao Liu <hongtao.liu@intel.com>
2182 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
2183 adjust mnemonic for vmovduq/vmovdqa.
2184 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
2185 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
2186 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
2189 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2190 Hongyu Wang <hongyu.wang@intel.com>
2191 Hongtao Liu <hongtao.liu@intel.com>
2193 * config/i386/i386.cc (map_egpr_constraints): New funciton to
2194 map common constraints to EGPR prohibited constraints.
2195 (ix86_md_asm_adjust): Calls map_egpr_constraints.
2196 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
2198 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2199 Hongyu Wang <hongyu.wang@intel.com>
2200 Hongtao Liu <hongtao.liu@intel.com>
2202 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
2204 (ix86_regno_ok_for_insn_base_p): Likewise.
2205 (ix86_insn_index_reg_class): Likewise.
2206 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
2207 New helper function to scan the insn.
2208 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
2209 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
2210 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
2211 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
2212 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
2213 (INSN_INDEX_REG_CLASS): Likewise.
2214 (enum reg_class): Add INDEX_GPR16.
2215 (GENERAL_GPR16_REGNO_P): Define.
2216 * config/i386/i386.md (gpr32): New attribute.
2218 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2219 Hongyu Wang <hongyu.wang@intel.com>
2220 Hongtao Liu <hongtao.liu@intel.com>
2222 * config/i386/constraints.md (jr): New register constraint
2223 that prohibits EGPR.
2224 (jR): Constraint that force usage of EGPR.
2225 (jm): New memory constraint that prohibits EGPR.
2226 (ja): Likewise for Bm constraint.
2227 (jb): Likewise for Tv constraint.
2228 (j<): New auto-dec memory constraint that prohibits EGPR.
2229 (j>): Likewise for ">" constraint.
2230 (jo): Likewise for "o" constraint.
2231 (jv): Likewise for "V" constraint.
2232 (jp): Likewise for "p" constraint.
2233 * config/i386/i386.h (enum reg_class): Add new reg class
2236 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2237 Hongyu Wang <hongyu.wang@intel.com>
2238 Hongtao Liu <hongtao.liu@intel.com>
2240 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
2241 New function prototype.
2242 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
2244 (debugger64_register_map): Likewise.
2245 (ix86_conditional_register_usage): Clear REX2 register when APX
2247 (ix86_code_end): Add handling for REX2 reg.
2248 (print_reg): Likewise.
2249 (ix86_output_jmp_thunk_or_indirect): Likewise.
2250 (ix86_output_indirect_branch_via_reg): Likewise.
2251 (ix86_attr_length_vex_default): Likewise.
2252 (ix86_emit_save_regs): Adjust to allow saving r31.
2253 (ix86_register_priority): Set REX2 reg priority same as REX.
2254 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
2255 (x86_extended_rex2reg_mentioned_p): New function.
2256 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
2258 (REG_ALLOC_ORDER): Likewise.
2259 (FIRST_REX2_INT_REG): Define.
2260 (LAST_REX2_INT_REG): Ditto.
2261 (GENERAL_REGS): Add 16 new registers.
2262 (INT_SSE_REGS): Likewise.
2263 (FLOAT_INT_REGS): Likewise.
2264 (FLOAT_INT_SSE_REGS): Likewise.
2265 (INT_MASK_REGS): Likewise.
2266 (ALL_REGS):Likewise.
2267 (REX2_INT_REG_P): Define.
2268 (REX2_INT_REGNO_P): Ditto.
2269 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
2270 (REGNO_OK_FOR_INDEX_P): Ditto.
2271 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
2272 * config/i386/i386.md: Add 16 new integer general
2275 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2276 Hongyu Wang <hongyu.wang@intel.com>
2277 Hongtao Liu <hongtao.liu@intel.com>
2279 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
2280 (XCR_APX_F_ENABLED_MASK): Likewise.
2281 (get_available_features): Detect APX_F under
2282 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
2283 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
2284 (ix86_handle_option): Handle -mapxf.
2285 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
2286 * common/config/i386/i386-isas.h: Add entry for APX_F.
2287 * config/i386/cpuid.h (bit_APX_F): New.
2288 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
2289 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
2290 * config/i386/i386-opts.h (enum apx_features): New enum.
2291 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
2292 * config/i386/i386-options.cc (ix86_function_specific_save):
2293 Save ix86_apx_features.
2294 (ix86_function_specific_restore): Restore it.
2295 (ix86_valid_target_attribute_inner_p): Add mapxf.
2296 (ix86_option_override_internal): Set ix86_apx_features for PTA
2297 and TARGET_APX_F. Also reports error when APX_F is set but not
2298 having TARGET_64BIT.
2299 * config/i386/i386.opt: (-mapxf): New ISA flag option.
2300 (-mapx=): New enumeration option.
2301 (apx_features): New enum type.
2302 (apx_none): New enum value.
2303 (apx_egpr): Likewise.
2304 (apx_push2pop2): Likewise.
2305 (apx_ndd): Likewise.
2306 (apx_all): Likewise.
2307 * doc/invoke.texi: Document mapxf.
2309 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
2310 Kong Lingling <lingling.kong@intel.com>
2311 Hongtao Liu <hongtao.liu@intel.com>
2313 * addresses.h (index_reg_class): New wrapper function like
2315 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
2316 * doc/tm.texi.in: Ditto.
2317 * lra-constraints.cc (index_part_to_reg): Pass index_class.
2318 (process_address_1): Calls index_reg_class with curr_insn and
2319 replace INDEX_REG_CLASS with its return value index_cl.
2320 * reload.cc (find_reloads_address): Likewise.
2321 (find_reloads_address_1): Likewise.
2323 2023-10-07 Kong Lingling <lingling.kong@intel.com>
2324 Hongyu Wang <hongyu.wang@intel.com>
2325 Hongtao Liu <hongtao.liu@intel.com>
2327 * addresses.h (base_reg_class): Add insn argument and new macro
2328 INSN_BASE_REG_CLASS.
2329 (regno_ok_for_base_p_1): Add insn argument and new macro
2330 REGNO_OK_FOR_INSN_BASE_P.
2331 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
2332 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
2333 REGNO_OK_FOR_INSN_BASE_P.
2334 * doc/tm.texi.in: Ditto.
2335 * lra-constraints.cc (process_address_1): Pass insn to
2337 (curr_insn_transform): Ditto.
2338 * reload.cc (find_reloads): Ditto.
2339 (find_reloads_address): Ditto.
2340 (find_reloads_address_1): Ditto.
2341 (find_reloads_subreg_address): Ditto.
2342 * reload1.cc (maybe_fix_stack_asms): Ditto.
2344 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
2347 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
2350 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
2353 * config/rs6000/predicates.md (lowpart_subreg_operator): New
2355 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
2356 (movsf_from_si2): Rename to ...
2357 (movsf_from_si2_<code>): ... this.
2359 2023-10-07 Pan Li <pan2.li@intel.com>
2362 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
2363 object is a REG before extracting its' REGNO.
2365 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
2367 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
2368 one into add3_cc_overflow_1 followed by add3_carry.
2369 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
2370 "*add<mode>3_cc_overflow_1" to provide generator function.
2372 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
2373 Uros Bizjak <ubizjak@gmail.com>
2375 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
2376 to perform left shifts into shorter instructions with -Oz.
2378 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
2380 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
2382 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
2384 * doc/extend.texi (Function Attributes): Mention standard attribute
2386 (Variable Attributes): Likewise.
2387 (Type Attributes): Likewise.
2388 (Attribute Syntax): Likewise.
2390 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
2392 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
2393 (mov<mode>_exec): Likewise.
2394 (mov<mode>_sgprbase): Likewise.
2395 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
2396 (*movti_insn): Likewise.
2398 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
2400 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
2402 2023-10-06 Andrew Pinski <pinskia@gmail.com>
2404 PR middle-end/111699
2405 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
2406 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
2408 2023-10-06 Jakub Jelinek <jakub@redhat.com>
2410 * ipa-prop.h (ipa_bits): Remove.
2411 (struct ipa_jump_func): Remove bits member.
2412 (struct ipcp_transformation): Remove bits member, adjust
2414 (ipa_get_ipa_bits_for_value): Remove.
2415 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
2416 (ipa_bits_hash_table): Remove.
2417 (ipa_print_node_jump_functions_for_edge): Don't print bits.
2418 (ipa_get_ipa_bits_for_value): Remove.
2419 (ipa_set_jfunc_bits): Remove.
2420 (ipa_compute_jump_functions_for_edge): For pointers query
2421 pointer alignment before ipa_set_jfunc_vr and update_bitmask
2422 in there. For integral types, just rely on bitmask already
2423 being handled in value ranges.
2424 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
2425 (ipcp_transformation_initialize): Neither here.
2426 (ipcp_transformation_t::duplicate): Don't copy bits vector.
2427 (ipa_write_jump_function): Don't stream bits here.
2428 (ipa_read_jump_function): Neither here.
2429 (useful_ipcp_transformation_info_p): Don't test bits vec.
2430 (write_ipcp_transformation_info): Don't stream bits here.
2431 (read_ipcp_transformation_info): Neither here.
2432 (ipcp_get_parm_bits): Get mask and value from m_vr rather
2434 (ipcp_update_bits): Remove.
2435 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
2436 bitmask stored in value range.
2437 (ipcp_transform_function): Don't test bits vector, don't call
2439 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
2440 jfunc->bits, instead get mask and value from jfunc->m_vr.
2441 (ipcp_store_bits_results): Remove.
2442 (ipcp_store_vr_results): Incorporate parts of
2443 ipcp_store_bits_results here, merge the bitmasks with value
2444 range if both are supplied.
2445 (ipcp_driver): Don't call ipcp_store_bits_results.
2446 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
2449 2023-10-06 Pan Li <pan2.li@intel.com>
2451 * config/riscv/autovec.md: Update comments.
2453 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
2455 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
2457 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
2459 * timevar.def (TV_TREE_FAST_VRP): New.
2460 * tree-pass.h (make_pass_fast_vrp): New prototype.
2461 * tree-vrp.cc (class fvrp_folder): New.
2462 (fvrp_folder::fvrp_folder): New.
2463 (fvrp_folder::~fvrp_folder): New.
2464 (fvrp_folder::value_of_expr): New.
2465 (fvrp_folder::value_on_edge): New.
2466 (fvrp_folder::value_of_stmt): New.
2467 (fvrp_folder::pre_fold_bb): New.
2468 (fvrp_folder::post_fold_bb): New.
2469 (fvrp_folder::pre_fold_stmt): New.
2470 (fvrp_folder::fold_stmt): New.
2471 (execute_fast_vrp): New.
2472 (pass_data_fast_vrp): New.
2473 (pass_vrp:execute): Check for fast VRP pass.
2474 (make_pass_fast_vrp): New.
2476 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
2478 * gimple-range.cc (dom_ranger::dom_ranger): New.
2479 (dom_ranger::~dom_ranger): New.
2480 (dom_ranger::range_of_expr): New.
2481 (dom_ranger::edge_range): New.
2482 (dom_ranger::range_on_edge): New.
2483 (dom_ranger::range_in_bb): New.
2484 (dom_ranger::range_of_stmt): New.
2485 (dom_ranger::maybe_push_edge): New.
2486 (dom_ranger::pre_bb): New.
2487 (dom_ranger::post_bb): New.
2488 * gimple-range.h (class dom_ranger): New.
2490 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
2492 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
2493 (gori_calc_operands): New.
2494 (gori_on_edge): New.
2495 (gori_name_helper): New.
2496 (gori_name_on_edge): New.
2497 * gimple-range-gori.h (gori_on_edge): New prototype.
2498 (gori_name_on_edge): New prototype.
2500 2023-10-05 Sergei Trofimovich <siarheit@google.com>
2503 PR gcov-profile/111559
2504 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
2505 uninitialized probabilities when merging counters with zero
2508 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
2511 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
2512 strategy for non-default address spaces.
2513 (decide_alg): Use loop strategy as a fallback strategy for
2514 non-default address spaces.
2516 2023-10-05 Jakub Jelinek <jakub@redhat.com>
2518 * sreal.cc (verify_aritmetics): Rename to ...
2519 (verify_arithmetics): ... this.
2520 (sreal_verify_arithmetics): Adjust caller.
2522 2023-10-05 Martin Jambor <mjambor@suse.cz>
2525 2023-10-03 Martin Jambor <mjambor@suse.cz>
2528 * cgraph.h (cgraph_edge): Add a parameter to
2529 redirect_call_stmt_to_callee.
2530 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
2531 parameter to modify_call.
2532 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
2533 parameter killed_ssas, pass it to padjs->modify_call.
2534 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
2535 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
2536 Instead of substituting uses, invoke purge_transitive_uses. If
2537 hash of killed SSAs has not been provided, create a temporary one
2538 and release SSAs that have been added to it.
2539 * tree-inline.cc (redirect_all_calls): Create
2540 id->killed_new_ssa_names earlier, pass it to edge redirection,
2542 (copy_body): Release SSAs in id->killed_new_ssa_names.
2544 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2546 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
2547 (vec_series<mode>): Ditto.
2548 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
2549 (shuffle_decompress_patterns): Ditto.
2551 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
2553 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
2554 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
2555 (arc_ccfsm_record_branch_deleted): Likewise.
2556 (arc_ccfsm_cond_exec_p): Likewise.
2557 (arc_ccfsm): Likewise.
2558 (arc_ccfsm_record_condition): Likewise.
2559 (make_pass_arc_ifcvt): Likewise.
2560 * config/arc/arc.cc (arc_ccfsm): Remove.
2561 (arc_ccfsm_current): Likewise.
2562 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
2563 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
2564 (ARC_CCFSM_COND_EXEC_P): Likewise.
2565 (CCFSM_ISCOMPACT): Likewise.
2566 (CCFSM_DBR_ISCOMPACT): Likewise.
2567 (machine_function): Remove ccfsm related fields.
2568 (arc_ifcvt): Remove pass.
2569 (arc_print_operand): Remove `#` punct operand and other ccfsm
2571 (arc_ccfsm_advance): Remove.
2572 (arc_ccfsm_at_label): Likewise.
2573 (arc_ccfsm_record_condition): Likewise.
2574 (arc_ccfsm_post_advance): Likewise.
2575 (arc_ccfsm_branch_deleted_p): Likewise.
2576 (arc_ccfsm_record_branch_deleted): Likewise.
2577 (arc_ccfsm_cond_exec_p): Likewise.
2578 (arc_get_ccfsm_cond): Likewise.
2579 (arc_final_prescan_insn): Remove ccfsm references.
2580 (arc_internal_label): Likewise.
2581 (arc_reorg): Likewise.
2582 (arc_output_libcall): Likewise.
2583 * config/arc/arc.md: Remove ccfsm references and update related
2584 instruction patterns.
2586 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
2588 * config/arc/arc.cc (arc_init): Remove '^' punct char.
2589 (arc_print_operand): Remove related code.
2590 * config/arc/arc.md: Update patterns which uses '%&'.
2592 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
2594 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
2595 (arc_toggle_unalign): Likewise.
2596 * config/arc/arc.cc (machine_function) Remove unalign.
2597 (arc_init): Remove `&` punct character.
2598 (arc_print_operand): Remove `&` related functions.
2599 (arc_verify_short): Update function's number of parameters.
2600 (output_short_suffix): Update function.
2601 (arc_short_long): Likewise.
2602 (arc_clear_unalign): Remove.
2603 (arc_toggle_unalign): Likewise.
2604 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
2605 (ASM_OUTPUT_ALIGN): Update.
2606 * config/arc/arc.md: Remove all `%&` references.
2607 * config/arc/arc.opt (mannotate-align): Ignore option.
2608 * doc/invoke.texi (mannotate-align): Update description.
2610 2023-10-05 Richard Biener <rguenther@suse.de>
2612 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
2613 ask for internal_fn_p (CFN_LAST).
2615 2023-10-05 Richard Biener <rguenther@suse.de>
2617 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
2618 visited value numbers are available itself.
2620 2023-10-05 Richard Biener <rguenther@suse.de>
2623 * doc/extend.texi (attribute flatten): Clarify.
2625 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2627 * config/arc/arc-protos.h (emit_shift): Delete prototype.
2628 (arc_pre_reload_split): New function prototype.
2629 * config/arc/arc.cc (emit_shift): Delete function.
2630 (arc_pre_reload_split): New predicate function, copied from i386,
2631 to schedule define_insn_and_split splitters to the split1 pass.
2632 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
2633 (ashrsi3): Likewise.
2634 (lshrsi3): Likewise.
2635 (shift_si3): Move after other shift patterns, and disable when
2636 operands[2] is one (which is handled by its own define_insn).
2637 Use shiftr4_operator, instead of shift4_operator, as this is no
2638 longer used for left shifts.
2639 (shift_si3_loop): Likewise. Additionally remove match_scratch.
2640 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
2641 (*ashrsi3_nobs): Likewise.
2642 (*lshrsi3_nobs): Likewise.
2643 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
2644 (add_shift): Rename define_insn from *add_shift.
2645 * config/arc/predicates.md (shiftl4_operator): Delete.
2646 (shift4_operator): Delete.
2648 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2650 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
2651 Change type attribute to "unary", as this doesn't have operands[2].
2652 Change length attribute to "*,4" to allow compact representation.
2653 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
2654 insn type attribute to "unary", as this doesn't have operands[2].
2655 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
2656 insn type attribute to "unary", as this doesn't have operands[2].
2658 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2660 PR rtl-optimization/110701
2661 * combine.cc (record_dead_and_set_regs_1): Split comment into
2662 pieces placed before the relevant clauses. When the SET_DEST
2663 is a partial_subreg_p, mark the bits outside of the updated
2664 portion of the destination as undefined.
2666 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
2669 * opt-read.awk: Drop multidimensional arrays.
2670 * opth-gen.awk: Ditto.
2672 2023-10-04 Xi Ruoyao <xry111@xry111.site>
2674 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
2675 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
2677 2023-10-04 Jakub Jelinek <jakub@redhat.com>
2679 PR middle-end/111369
2680 * match.pd (x == cstN ? cst4 : cst3): Use
2681 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
2682 Fix comment typo. Formatting fix.
2683 (a?~t:t -> (-(a))^t): Always convert to type rather
2684 than using build_nonstandard_integer_type. Perform negation
2685 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
2687 2023-10-04 Jakub Jelinek <jakub@redhat.com>
2689 PR tree-optimization/111668
2690 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
2691 a ? 0 : -1 cases before the powerof2cst cases and differentiate
2692 between 1-bit precision types, larger precision boolean types
2693 and other integral types. Fix comment pastos and formatting.
2695 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2697 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
2698 pointers rather than range_info_get_range.
2700 2023-10-03 Martin Jambor <mjambor@suse.cz>
2702 * ipa-modref.h (modref_summary::dump): Make const.
2703 * ipa-modref.cc (modref_summary::dump): Likewise.
2704 (dump_lto_records): Dump to out instead of dump_file.
2706 2023-10-03 Martin Jambor <mjambor@suse.cz>
2709 * ipa-param-manipulation.cc
2710 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
2711 return uses of PARAM will be removed.
2712 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
2713 * ipa-sra.cc (isra_param_desc): New fields
2714 remove_only_when_retval_removed and split_only_when_retval_removed.
2715 (struct gensum_param_desc): Likewise. Fix comment long line.
2716 (ipa_sra_function_summaries::duplicate): Copy the new flags.
2717 (dump_gensum_param_descriptor): Dump the new flags.
2718 (dump_isra_param_descriptor): Likewise.
2719 (isra_track_scalar_value_uses): New parameter desc. Set its flag
2720 remove_only_when_retval_removed when encountering a simple return.
2721 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
2722 with desc. Pass it to isra_track_scalar_value_uses and set its
2724 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
2725 parameter. If there is a direct return use, mark any..
2726 (create_parameter_descriptors): Pass the whole parameter descriptor to
2727 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
2728 (process_scan_results): Copy the new flags.
2729 (isra_write_node_summary): Stream the new flags.
2730 (isra_read_node_info): Likewise.
2731 (adjust_parameter_descriptions): Check that transformations
2732 requring return removal only happen when return value is removed.
2733 Restructure main loop. Adjust dump message.
2735 2023-10-03 Martin Jambor <mjambor@suse.cz>
2738 * cgraph.h (cgraph_edge): Add a parameter to
2739 redirect_call_stmt_to_callee.
2740 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
2741 parameter to modify_call.
2742 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
2743 parameter killed_ssas, pass it to padjs->modify_call.
2744 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
2745 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
2746 Instead of substituting uses, invoke purge_transitive_uses. If
2747 hash of killed SSAs has not been provided, create a temporary one
2748 and release SSAs that have been added to it.
2749 * tree-inline.cc (redirect_all_calls): Create
2750 id->killed_new_ssa_names earlier, pass it to edge redirection,
2752 (copy_body): Release SSAs in id->killed_new_ssa_names.
2754 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2756 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
2757 * tree-vrp.cc (vrp_pass_num): Remove.
2758 (pass_vrp::my_pass): Remove.
2759 (pass_vrp::pass_vrp): Add warn_p as a parameter.
2760 (pass_vrp::final_p): New.
2761 (pass_vrp::set_pass_param): Set final_p param.
2762 (pass_vrp::execute): Call execute_range_vrp with no conditions.
2763 (make_pass_vrp): Pass additional parameter.
2764 (make_pass_early_vrp): Ditto.
2766 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2768 * tree-ssanames.cc (set_range_info): Return true only if the
2769 current value changes.
2771 2023-10-03 David Malcolm <dmalcolm@redhat.com>
2773 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
2774 prefixes to text_info fields.
2775 (diagnostic_report_diagnostic): Likewise.
2776 (verbatim): Use text_info ctor.
2777 (simple_diagnostic_path::add_event): Likewise.
2778 (simple_diagnostic_path::add_thread_event): Likewise.
2779 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
2780 "m_" prefixes to text_info fields.
2781 (dump_context::dump_printf_va): Use text_info ctor.
2782 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
2783 (graphviz_out::print): Likewise.
2784 * opt-problem.cc (opt_problem::opt_problem): Likewise.
2785 * pretty-print.cc (pp_format): Update for "m_" prefixes to
2787 (pp_printf): Use text_info ctor.
2788 (pp_verbatim): Likewise.
2789 (assert_pp_format_va): Likewise.
2790 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
2792 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
2794 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
2795 prefixes to text_info fields.
2796 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
2798 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
2800 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
2801 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
2802 (*scc_insn): Don't split to a conditional move sequence for LTU.
2804 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
2806 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
2807 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
2808 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
2809 (load_pair_dw_<DX:mode><DX2:mode>)
2810 (store_pair_sw_<SX:mode><SX2:mode>)
2811 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
2812 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
2813 (*extend<SHORT:mode><GPI:mode>2_aarch64)
2814 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
2815 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
2816 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
2817 (add<mode>3_compare0, *addsi3_compare0_uxtw)
2818 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
2819 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
2820 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
2821 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
2822 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
2823 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
2824 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
2825 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
2826 (*aarch64_ashl_sisd_or_int_<mode>3)
2827 (*aarch64_lshr_sisd_or_int_<mode>3)
2828 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
2829 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
2830 (<optab><fcvt_target><GPF:mode>2)
2831 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
2832 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
2833 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
2835 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
2836 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
2837 (*aarch64_mul_unpredicated_<mode>)
2838 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
2839 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
2840 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
2841 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
2842 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
2843 (@aarch64_sve_<sve_int_op>_lane_<mode>)
2844 (@aarch64_sve_add_mul_lane_<mode>)
2845 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
2846 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
2847 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
2848 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
2849 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
2850 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
2851 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
2852 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
2853 (@aarch64_sve_qadd_<sve_int_op><mode>)
2854 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
2855 (@aarch64_sve_sub_<sve_int_op><mode>)
2856 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
2857 (@aarch64_sve_qsub_<sve_int_op><mode>)
2858 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
2859 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
2860 (@aarch64_pred_<sve_int_op><mode>)
2861 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
2862 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
2863 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
2864 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
2865 (*cond_<sve_fp_op><mode>_any_relaxed)
2866 (*cond_<sve_fp_op><mode>_any_strict)
2867 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
2868 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
2869 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
2870 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
2871 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
2872 (*aarch64_sve_mov<mode>, aarch64_wrffr)
2873 (mask_scatter_store<mode><v_int_container>)
2874 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
2875 (*mask_scatter_store<mode><v_int_container>_sxtw)
2876 (*mask_scatter_store<mode><v_int_container>_uxtw)
2877 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
2878 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
2879 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
2880 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
2881 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
2882 (vec_series<mode>, @extract_<last_op>_<mode>)
2883 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
2884 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
2885 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
2886 (@cond_<optab><mode>)
2887 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
2888 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
2889 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
2890 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
2891 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
2892 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
2893 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
2894 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
2895 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
2896 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
2897 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
2898 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
2899 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
2900 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
2901 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
2902 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
2903 (*cond_bic<mode>_2, *cond_bic<mode>_any)
2904 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
2905 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
2906 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
2907 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
2908 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
2909 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
2910 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
2911 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2912 (*cond_<optab><mode>_2_const_relaxed)
2913 (*cond_<optab><mode>_2_const_strict)
2914 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
2915 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2916 (*cond_<optab><mode>_any_const_relaxed)
2917 (*cond_<optab><mode>_any_const_strict)
2918 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
2919 (*cond_add<mode>_2_const_strict)
2920 (*cond_add<mode>_any_const_relaxed)
2921 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
2922 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2923 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2924 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
2925 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
2926 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
2927 (*aarch64_pred_abd<mode>_strict)
2928 (*aarch64_cond_abd<mode>_2_relaxed)
2929 (*aarch64_cond_abd<mode>_2_strict)
2930 (*aarch64_cond_abd<mode>_3_relaxed)
2931 (*aarch64_cond_abd<mode>_3_strict)
2932 (*aarch64_cond_abd<mode>_any_relaxed)
2933 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
2934 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
2935 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
2936 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
2937 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
2938 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
2939 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
2940 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2941 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
2942 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2943 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
2944 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
2945 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2946 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
2947 (@aarch64_sve_<sve_fp_op>vnx4sf)
2948 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
2949 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
2950 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
2951 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
2952 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
2953 (@aarch64_fold_extract_vector_<last_op>_<mode>)
2954 (@aarch64_sve_splice<mode>)
2955 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
2956 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
2957 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
2958 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
2959 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
2960 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
2961 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
2962 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
2963 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
2964 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
2965 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
2966 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
2967 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
2968 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
2969 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
2970 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
2971 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
2973 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
2974 (load_pair<DREG:mode><DREG2:mode>)
2975 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
2976 (aarch64_simd_mov_from_<mode>low)
2977 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
2978 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
2979 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
2980 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
2981 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
2982 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
2983 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
2984 (*aarch64_combinez_be<mode>)
2985 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
2986 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
2987 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
2989 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
2991 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
2992 in new compact pattern syntax.
2994 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
2996 * gensupport.cc (convert_syntax): Updated to support unordered
2997 constraints in compact syntax.
2999 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
3001 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
3002 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
3003 (copysign<mode>3_hard): Likewise.
3004 (copysign<mode>3_soft): Likewise.
3005 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
3007 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
3010 2023-10-02 David Malcolm <dmalcolm@redhat.com>
3012 * diagnostic-format-json.cc (toplevel_array): Remove global in
3013 favor of json_output_format::m_top_level_array.
3014 (cur_group): Likewise, for json_output_format::m_cur_group.
3015 (cur_children_array): Likewise, for
3016 json_output_format::m_cur_children_array.
3017 (class json_output_format): New.
3018 (json_begin_diagnostic): Remove, in favor of
3019 json_output_format::on_begin_diagnostic.
3020 (json_end_diagnostic): Convert to...
3021 (json_output_format::on_end_diagnostic): ...this.
3022 (json_begin_group): Remove, in favor of
3023 json_output_format::on_begin_group.
3024 (json_end_group): Remove, in favor of
3025 json_output_format::on_end_group.
3026 (json_flush_to_file): Remove, in favor of
3027 json_output_format::flush_to_file.
3028 (json_stderr_final_cb): Remove, in favor of json_output_format
3030 (json_output_base_file_name): Remove global.
3031 (class json_stderr_output_format): New.
3032 (json_file_final_cb): Remove.
3033 (class json_file_output_format): New.
3034 (json_emit_diagram): Remove.
3035 (diagnostic_output_format_init_json): Update.
3036 (diagnostic_output_format_init_json_file): Update.
3037 * diagnostic-format-sarif.cc (the_builder): Remove this global,
3038 moving to a field of the sarif_output_format.
3039 (sarif_builder::maybe_make_artifact_content_object): Use the
3040 context's m_file_cache.
3041 (get_source_lines): Convert to...
3042 (sarif_builder::get_source_lines): ...this, using context's
3044 (sarif_begin_diagnostic): Remove, in favor of
3045 sarif_output_format::on_begin_diagnostic.
3046 (sarif_end_diagnostic): Remove, in favor of
3047 sarif_output_format::on_end_diagnostic.
3048 (sarif_begin_group): Remove, in favor of
3049 sarif_output_format::on_begin_group.
3050 (sarif_end_group): Remove, in favor of
3051 sarif_output_format::on_end_group.
3052 (sarif_flush_to_file): Delete.
3053 (sarif_stderr_final_cb): Delete.
3054 (sarif_output_base_file_name): Delete.
3055 (sarif_file_final_cb): Delete.
3056 (class sarif_output_format): New.
3057 (sarif_emit_diagram): Delete.
3058 (class sarif_stream_output_format): New.
3059 (class sarif_file_output_format): New.
3060 (diagnostic_output_format_init_sarif): Update.
3061 (diagnostic_output_format_init_sarif_stderr): Update.
3062 (diagnostic_output_format_init_sarif_file): Update.
3063 (diagnostic_output_format_init_sarif_stream): Update.
3064 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
3065 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
3066 diagnostic_text_output_format's dtor.
3067 (diagnostic_initialize): Update, making a new instance of
3068 diagnostic_text_output_format.
3069 (diagnostic_finish): Delete m_output_format, rather than calling
3071 (diagnostic_report_diagnostic): Assert that m_output_format is
3072 non-NULL. Replace call to begin_group_cb with call to
3073 m_output_format->on_begin_group. Replace call to
3074 diagnostic_starter with call to
3075 m_output_format->on_begin_diagnostic. Replace call to
3076 diagnostic_finalizer with call to
3077 m_output_format->on_end_diagnostic.
3078 (diagnostic_emit_diagram): Replace both optional call to
3079 m_diagrams.m_emission_cb and default implementation with call to
3080 m_output_format->on_diagram. Move default implementation to
3081 diagnostic_text_output_format::on_diagram.
3082 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
3083 end_group_cb with call to m_output_format->on_end_group.
3084 (diagnostic_text_output_format::~diagnostic_text_output_format):
3085 New, based on default_diagnostic_final_cb.
3086 (diagnostic_text_output_format::on_begin_diagnostic): New, based
3087 on code from diagnostic_report_diagnostic.
3088 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
3089 (diagnostic_text_output_format::on_diagram): New, based on code
3090 from diagnostic_emit_diagram.
3091 * diagnostic.h (class diagnostic_output_format): New.
3092 (class diagnostic_text_output_format): New.
3093 (diagnostic_context::begin_diagnostic): Move to...
3094 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
3095 (diagnostic_context::start_span): Move to...
3096 (diagnostic_context::m_text_callbacks::start_span): ...here.
3097 (diagnostic_context::end_diagnostic): Move to...
3098 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
3099 (diagnostic_context::begin_group_cb): Remove, in favor of
3100 m_output_format->on_begin_group.
3101 (diagnostic_context::end_group_cb): Remove, in favor of
3102 m_output_format->on_end_group.
3103 (diagnostic_context::final_cb): Remove, in favor of
3104 m_output_format's dtor.
3105 (diagnostic_context::m_output_format): New field.
3106 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
3107 of m_output_format->on_diagram.
3108 (diagnostic_starter): Update.
3109 (diagnostic_finalizer): Update.
3110 (diagnostic_output_format_init_sarif_stream): New.
3111 * input.cc (location_get_source_line): Move implementation apart from
3112 call to diagnostic_file_cache_init to...
3113 (file_cache::get_source_line): ...this new function...
3114 (location_get_source_line): ...and reintroduce, rewritten in terms of
3115 file_cache::get_source_line.
3116 (get_source_file_content): Likewise, refactor into...
3117 (file_cache::get_source_file_content): ...this new function.
3118 * input.h (file_cache::get_source_line): New decl.
3119 (file_cache::get_source_file_content): New decl.
3120 * selftest-diagnostic.cc
3121 (test_diagnostic_context::test_diagnostic_context): Update.
3122 * tree-diagnostic-path.cc (event_range::print): Update for
3123 change to diagnostic_context's start_span callback.
3125 2023-10-02 David Malcolm <dmalcolm@redhat.com>
3127 * diagnostic-show-locus.cc: Update for reorganization of
3128 source-printing fields of diagnostic_context.
3129 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
3130 (diagnostic_initialize): Likewise.
3131 * diagnostic.h (diagnostic_context::show_caret): Move to...
3132 (diagnostic_context::m_source_printing::enabled): ...here.
3133 (diagnostic_context::caret_max_width): Move to...
3134 (diagnostic_context::m_source_printing::max_width): ...here.
3135 (diagnostic_context::caret_chars): Move to...
3136 (diagnostic_context::m_source_printing::caret_chars): ...here.
3137 (diagnostic_context::colorize_source_p): Move to...
3138 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
3139 (diagnostic_context::show_labels_p): Move to...
3140 (diagnostic_context::m_source_printing::show_labels_p): ...here.
3141 (diagnostic_context::show_line_numbers_p): Move to...
3142 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
3143 (diagnostic_context::min_margin_width): Move to...
3144 (diagnostic_context::m_source_printing::min_margin_width): ...here.
3145 (diagnostic_context::show_ruler_p): Move to...
3146 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
3147 (diagnostic_same_line): Update for above changes.
3148 * opts.cc (common_handle_option): Update for reorganization of
3149 source-printing fields of diagnostic_context.
3150 * selftest-diagnostic.cc
3151 (test_diagnostic_context::test_diagnostic_context): Likewise.
3152 * toplev.cc (general_init): Likewise.
3153 * tree-diagnostic-path.cc (struct event_range): Likewise.
3155 2023-10-02 David Malcolm <dmalcolm@redhat.com>
3157 * diagnostic.cc (diagnostic_initialize): Initialize
3158 set_locations_cb to nullptr.
3160 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
3163 * config/arm/constraints.md: Remove Pf constraint.
3164 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
3165 (arm_atomic_load_acquire<mode>): Likewise.
3166 (arm_atomic_store<mode>): Likewise.
3167 (arm_atomic_store_release<mode>): Likewise.
3168 (atomic_load<mode>): Switch patterns to define_expand.
3169 (atomic_store<mode>): Likewise.
3170 (arm_atomic_loaddi2_ldrd): Remove predication.
3171 (arm_load_exclusive<mode>): Likewise.
3172 (arm_load_acquire_exclusive<mode>): Likewise.
3173 (arm_load_exclusivesi): Likewise.
3174 (arm_load_acquire_exclusivesi): Likewise.
3175 (arm_load_exclusivedi): Likewise.
3176 (arm_load_acquire_exclusivedi): Likewise.
3177 (arm_store_exclusive<mode>): Likewise.
3178 (arm_store_release_exclusivedi): Likewise.
3179 (arm_store_release_exclusive<mode>): Likewise.
3180 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
3182 2023-10-02 Tamar Christina <tamar.christina@arm.com>
3185 2023-10-02 Tamar Christina <tamar.christina@arm.com>
3187 PR tree-optimization/109154
3188 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
3189 (cmp_arg_entry): New.
3190 (predicate_scalar_phi): Use it.
3192 2023-10-02 Tamar Christina <tamar.christina@arm.com>
3194 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
3195 (@xorsign<mode>3): ...This.
3196 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
3197 (@xorsign<mode>3): ..This and emit vectors directly
3198 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
3200 2023-10-02 Tamar Christina <tamar.christina@arm.com>
3202 * emit-rtl.cc (validate_subreg): Relax subreg rule.
3204 2023-10-02 Tamar Christina <tamar.christina@arm.com>
3206 PR tree-optimization/109154
3207 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
3208 (cmp_arg_entry): New.
3209 (predicate_scalar_phi): Use it.
3211 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
3214 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
3216 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
3218 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
3219 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3221 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
3223 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
3225 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
3227 (cpymem<P:mode>) .. this.
3229 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3231 * combine.cc (simplify_compare_const): Properly handle unsigned
3232 constants while narrowing comparison of memory and constants.
3234 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
3236 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
3237 (MASK_ZIFENCEI): Delete;
3238 (MASK_ZIHINTNTL): Ditto.
3239 (MASK_ZIHINTPAUSE): Ditto.
3240 (TARGET_ZICSR): Ditto.
3241 (TARGET_ZIFENCEI): Ditto.
3242 (TARGET_ZIHINTNTL): Ditto.
3243 (TARGET_ZIHINTPAUSE): Ditto.
3244 (MASK_ZAWRS): Ditto.
3245 (TARGET_ZAWRS): Ditto.
3250 (TARGET_ZBA): Ditto.
3251 (TARGET_ZBB): Ditto.
3252 (TARGET_ZBC): Ditto.
3253 (TARGET_ZBS): Ditto.
3254 (MASK_ZFINX): Ditto.
3255 (MASK_ZDINX): Ditto.
3256 (MASK_ZHINX): Ditto.
3257 (MASK_ZHINXMIN): Ditto.
3258 (TARGET_ZFINX): Ditto.
3259 (TARGET_ZDINX): Ditto.
3260 (TARGET_ZHINX): Ditto.
3261 (TARGET_ZHINXMIN): Ditto.
3269 (MASK_ZKSED): Ditto.
3272 (TARGET_ZBKB): Ditto.
3273 (TARGET_ZBKC): Ditto.
3274 (TARGET_ZBKX): Ditto.
3275 (TARGET_ZKNE): Ditto.
3276 (TARGET_ZKND): Ditto.
3277 (TARGET_ZKNH): Ditto.
3278 (TARGET_ZKR): Ditto.
3279 (TARGET_ZKSED): Ditto.
3280 (TARGET_ZKSH): Ditto.
3281 (TARGET_ZKT): Ditto.
3283 (TARGET_ZTSO): Ditto.
3284 (MASK_VECTOR_ELEN_32): Ditto.
3285 (MASK_VECTOR_ELEN_64): Ditto.
3286 (MASK_VECTOR_ELEN_FP_32): Ditto.
3287 (MASK_VECTOR_ELEN_FP_64): Ditto.
3288 (MASK_VECTOR_ELEN_FP_16): Ditto.
3289 (TARGET_VECTOR_ELEN_32): Ditto.
3290 (TARGET_VECTOR_ELEN_64): Ditto.
3291 (TARGET_VECTOR_ELEN_FP_32): Ditto.
3292 (TARGET_VECTOR_ELEN_FP_64): Ditto.
3293 (TARGET_VECTOR_ELEN_FP_16): Ditto.
3296 (TARGET_ZVBB): Ditto.
3297 (TARGET_ZVBC): Ditto.
3299 (MASK_ZVKNED): Ditto.
3300 (MASK_ZVKNHA): Ditto.
3301 (MASK_ZVKNHB): Ditto.
3302 (MASK_ZVKSED): Ditto.
3303 (MASK_ZVKSH): Ditto.
3305 (MASK_ZVKNC): Ditto.
3306 (MASK_ZVKNG): Ditto.
3308 (MASK_ZVKSC): Ditto.
3309 (MASK_ZVKSG): Ditto.
3311 (TARGET_ZVKG): Ditto.
3312 (TARGET_ZVKNED): Ditto.
3313 (TARGET_ZVKNHA): Ditto.
3314 (TARGET_ZVKNHB): Ditto.
3315 (TARGET_ZVKSED): Ditto.
3316 (TARGET_ZVKSH): Ditto.
3317 (TARGET_ZVKN): Ditto.
3318 (TARGET_ZVKNC): Ditto.
3319 (TARGET_ZVKNG): Ditto.
3320 (TARGET_ZVKS): Ditto.
3321 (TARGET_ZVKSC): Ditto.
3322 (TARGET_ZVKSG): Ditto.
3323 (TARGET_ZVKT): Ditto.
3324 (MASK_ZVL32B): Ditto.
3325 (MASK_ZVL64B): Ditto.
3326 (MASK_ZVL128B): Ditto.
3327 (MASK_ZVL256B): Ditto.
3328 (MASK_ZVL512B): Ditto.
3329 (MASK_ZVL1024B): Ditto.
3330 (MASK_ZVL2048B): Ditto.
3331 (MASK_ZVL4096B): Ditto.
3332 (MASK_ZVL8192B): Ditto.
3333 (MASK_ZVL16384B): Ditto.
3334 (MASK_ZVL32768B): Ditto.
3335 (MASK_ZVL65536B): Ditto.
3336 (TARGET_ZVL32B): Ditto.
3337 (TARGET_ZVL64B): Ditto.
3338 (TARGET_ZVL128B): Ditto.
3339 (TARGET_ZVL256B): Ditto.
3340 (TARGET_ZVL512B): Ditto.
3341 (TARGET_ZVL1024B): Ditto.
3342 (TARGET_ZVL2048B): Ditto.
3343 (TARGET_ZVL4096B): Ditto.
3344 (TARGET_ZVL8192B): Ditto.
3345 (TARGET_ZVL16384B): Ditto.
3346 (TARGET_ZVL32768B): Ditto.
3347 (TARGET_ZVL65536B): Ditto.
3348 (MASK_ZICBOZ): Ditto.
3349 (MASK_ZICBOM): Ditto.
3350 (MASK_ZICBOP): Ditto.
3351 (TARGET_ZICBOZ): Ditto.
3352 (TARGET_ZICBOM): Ditto.
3353 (TARGET_ZICBOP): Ditto.
3354 (MASK_ZICOND): Ditto.
3355 (TARGET_ZICOND): Ditto.
3357 (TARGET_ZFA): Ditto.
3358 (MASK_ZFHMIN): Ditto.
3360 (MASK_ZVFHMIN): Ditto.
3362 (TARGET_ZFHMIN): Ditto.
3363 (TARGET_ZFH): Ditto.
3364 (TARGET_ZVFHMIN): Ditto.
3365 (TARGET_ZVFH): Ditto.
3366 (MASK_ZMMUL): Ditto.
3367 (TARGET_ZMMUL): Ditto.
3375 (TARGET_ZCA): Ditto.
3376 (TARGET_ZCB): Ditto.
3377 (TARGET_ZCE): Ditto.
3378 (TARGET_ZCF): Ditto.
3379 (TARGET_ZCD): Ditto.
3380 (TARGET_ZCMP): Ditto.
3381 (TARGET_ZCMT): Ditto.
3382 (MASK_SVINVAL): Ditto.
3383 (MASK_SVNAPOT): Ditto.
3384 (TARGET_SVINVAL): Ditto.
3385 (TARGET_SVNAPOT): Ditto.
3386 (MASK_XTHEADBA): Ditto.
3387 (MASK_XTHEADBB): Ditto.
3388 (MASK_XTHEADBS): Ditto.
3389 (MASK_XTHEADCMO): Ditto.
3390 (MASK_XTHEADCONDMOV): Ditto.
3391 (MASK_XTHEADFMEMIDX): Ditto.
3392 (MASK_XTHEADFMV): Ditto.
3393 (MASK_XTHEADINT): Ditto.
3394 (MASK_XTHEADMAC): Ditto.
3395 (MASK_XTHEADMEMIDX): Ditto.
3396 (MASK_XTHEADMEMPAIR): Ditto.
3397 (MASK_XTHEADSYNC): Ditto.
3398 (TARGET_XTHEADBA): Ditto.
3399 (TARGET_XTHEADBB): Ditto.
3400 (TARGET_XTHEADBS): Ditto.
3401 (TARGET_XTHEADCMO): Ditto.
3402 (TARGET_XTHEADCONDMOV): Ditto.
3403 (TARGET_XTHEADFMEMIDX): Ditto.
3404 (TARGET_XTHEADFMV): Ditto.
3405 (TARGET_XTHEADINT): Ditto.
3406 (TARGET_XTHEADMAC): Ditto.
3407 (TARGET_XTHEADMEMIDX): Ditto.
3408 (TARGET_XTHEADMEMPAIR): Ditto.
3409 (TARGET_XTHEADSYNC): Ditto.
3410 (MASK_XVENTANACONDOPS): Ditto.
3411 (TARGET_XVENTANACONDOPS): Ditto.
3412 * config/riscv/riscv.opt: Add new Mask defination.
3413 * doc/options.texi: Add explanation for this new usage.
3414 * opt-functions.awk: Add new function to find the index
3415 of target variable from extra_target_vars.
3416 * opt-read.awk: Add new function to store the Mask flags.
3417 * opth-gen.awk: Add new function to output the defination of
3418 Mask Macro and Target Macro.
3420 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
3421 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3422 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3425 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
3426 Change second parameter to rtx *.
3427 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
3428 * config/riscv/vector.md: Changed callers of
3429 riscv_vector::legitimize_move.
3430 (*mov<mode>_mem_to_mem): Remove.
3432 2023-09-30 Jakub Jelinek <jakub@redhat.com>
3435 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
3436 Replace safe_grow with safe_grow_cleared.
3438 2023-09-30 Jakub Jelinek <jakub@redhat.com>
3440 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
3441 in function comment.
3443 2023-09-30 Jakub Jelinek <jakub@redhat.com>
3445 PR middle-end/111625
3446 PR middle-end/111637
3447 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
3449 (bitint_large_huge::handle_operand_addr): For uninitialized operands
3450 use limb_prec or -limb_prec precision.
3452 2023-09-30 Jakub Jelinek <jakub@redhat.com>
3454 * vec.h (quick_grow): Uncomment static_assert.
3456 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
3458 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
3460 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
3462 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
3463 SETs when the outer code is INSN.
3465 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
3467 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
3470 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
3472 * poly-int.h (poly_int_pod): Delete.
3473 (poly_coeff_traits::init_cast): New type.
3474 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
3475 (poly_int): Replace constructors that take 1 and 2 coefficients with
3476 a general one that takes an arbitrary number of coefficients.
3477 Delegate initialization to two new private constructors, one of
3478 which uses the coefficients as-is and one of which adds an extra
3479 zero of the appropriate type (and precision, where applicable).
3480 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
3481 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
3482 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
3483 * gengtype.cc (main): Don't register poly_int64_pod.
3484 * calls.cc (initialize_argument_information): Use poly_int rather
3486 (combine_pending_stack_adjustment_and_call): Likewise.
3487 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
3488 * data-streamer.h (bp_unpack_poly_value): Likewise.
3489 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
3490 (struct queued_reg_save): Likewise.
3491 * dwarf2out.h (struct dw_cfa_location): Likewise.
3492 * emit-rtl.h (struct incoming_args): Likewise.
3493 (struct rtl_data): Likewise.
3494 * expr.cc (get_bit_range): Likewise.
3495 (get_inner_reference): Likewise.
3496 * expr.h (get_bit_range): Likewise.
3497 * fold-const.cc (split_address_to_core_and_offset): Likewise.
3498 (ptr_difference_const): Likewise.
3499 * fold-const.h (ptr_difference_const): Likewise.
3500 * function.cc (try_fit_stack_local): Likewise.
3501 (instantiate_new_reg): Likewise.
3502 * function.h (struct expr_status): Likewise.
3503 (struct args_size): Likewise.
3504 * genmodes.cc (ZERO_COEFFS): Likewise.
3505 (mode_size_inline): Likewise.
3506 (mode_nunits_inline): Likewise.
3507 (emit_mode_precision): Likewise.
3508 (emit_mode_size): Likewise.
3509 (emit_mode_nunits): Likewise.
3510 * gimple-fold.cc (get_base_constructor): Likewise.
3511 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
3512 * inchash.h (class hash): Likewise.
3513 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
3514 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
3516 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
3517 * lra-eliminations.cc (self_elim_offsets): Likewise.
3518 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
3519 * omp-low.cc (omplow_simd_context): Likewise.
3520 * pretty-print.cc (pp_wide_integer): Likewise.
3521 * pretty-print.h (pp_wide_integer): Likewise.
3522 * reload.cc (struct decomposition): Likewise.
3523 * reload.h (struct reload): Likewise.
3524 * reload1.cc (spill_stack_slot_width): Likewise.
3525 (struct elim_table): Likewise.
3526 (offsets_at): Likewise.
3527 (init_eliminable_invariants): Likewise.
3528 * rtl.h (union rtunion): Likewise.
3529 (poly_int_rtx_p): Likewise.
3530 (strip_offset): Likewise.
3531 (strip_offset_and_add): Likewise.
3532 * rtlanal.cc (strip_offset): Likewise.
3533 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
3534 (get_addr_base_and_unit_offset_1): Likewise.
3535 (get_addr_base_and_unit_offset): Likewise.
3536 * tree-dfa.h (get_ref_base_and_extent): Likewise.
3537 (get_addr_base_and_unit_offset_1): Likewise.
3538 (get_addr_base_and_unit_offset): Likewise.
3539 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
3540 (strip_offset): Likewise.
3541 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
3542 * tree.cc (ptrdiff_tree_p): Likewise.
3543 * tree.h (poly_int_tree_p): Likewise.
3544 (ptrdiff_tree_p): Likewise.
3545 (get_inner_reference): Likewise.
3547 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
3549 * config/pa/pa.md (memory_barrier): Revise comment.
3550 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
3551 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
3553 2023-09-29 Jakub Jelinek <jakub@redhat.com>
3555 * vec.h (quick_insert, ordered_remove, unordered_remove,
3556 block_remove, qsort, sort, stablesort, quick_grow): Guard
3557 std::is_trivially_{copyable,default_constructible} and
3558 vec_detail::is_trivially_copyable_or_pair static assertions
3559 with GCC_VERSION >= 5000.
3560 (vec_detail::is_trivially_copyable_or_pair): Guard definition
3561 with GCC_VERSION >= 5000.
3563 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
3565 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
3566 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
3567 and aarch64_stp_policy to aarch64_ldp_stp_policy.
3568 (enum aarch64_stp_policy): Removed.
3569 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
3570 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
3571 and left only the definitions to the aarch64-opts one.
3572 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
3573 (aarch64_parse_stp_policy): Removed.
3574 (aarch64_override_options_internal): Removed calls to parsing
3575 functions and added obvious direct assignments.
3576 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
3577 code quality based on the new changes.
3578 * config/aarch64/aarch64.opt: Use single enum type
3579 aarch64_ldp_stp_policy for both ldp and stp options.
3581 2023-09-29 Richard Biener <rguenther@suse.de>
3583 PR tree-optimization/111583
3584 * tree-loop-distribution.cc (find_single_drs): Ensure the
3585 load/store are always executed.
3587 2023-09-29 Jakub Jelinek <jakub@redhat.com>
3589 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
3590 quick_grow_cleared method on unprom rather than quick_grow.
3592 2023-09-29 Sergei Trofimovich <siarheit@google.com>
3594 PR middle-end/111505
3595 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
3596 Add new helper. Use helper instead of memset() to wipe out pointers.
3598 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
3600 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
3602 * builtins.cc (c_readstr): Likewise. Build a local array of
3603 bytes and use native_decode_rtx to get the rtx image.
3604 (builtin_memcpy_read_str): Simplify accordingly.
3605 (builtin_strncpy_read_str): Likewise.
3606 (builtin_memset_read_str): Likewise.
3607 (builtin_memset_gen_str): Likewise.
3608 * expr.cc (string_cst_read_str): Likewise.
3610 2023-09-29 Jakub Jelinek <jakub@redhat.com>
3612 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
3613 instead of quick_grow on vec<bitmap_head> members.
3614 * cfganal.cc (control_dependences::control_dependences): Likewise.
3615 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
3616 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
3617 on auto_vec<bitmap_head> vars.
3618 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
3619 of quick_grow on vec<bitmap_head> var.
3621 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
3624 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
3626 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
3629 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
3632 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
3633 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
3634 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
3636 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
3639 2023-09-28 Pan Li <pan2.li@intel.com>
3642 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
3644 * config/riscv/vector-iterators.md: New iterator.
3646 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
3648 * rtl.h (lra_in_progress): Change type to bool.
3649 (ira_in_progress): Add new extern.
3650 * ira.cc (ira_in_progress): New global.
3651 (pass_ira::execute): Set up ira_in_progress.
3652 * lra.cc: (lra_in_progress): Change type to bool and initialize.
3653 (lra): Use bool values for lra_in_progress.
3654 * lra-eliminations.cc (init_elim_table): Ditto.
3656 2023-09-28 Richard Biener <rguenther@suse.de>
3659 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
3660 Use a heap allocated worklist for CFG traversal instead of
3663 2023-09-28 Jakub Jelinek <jakub@redhat.com>
3664 Jonathan Wakely <jwakely@redhat.com>
3666 * vec.h: Mention in file comment limited support for non-POD types
3668 (vec_destruct): New function template.
3669 (release): Use it for non-trivially destructible T.
3670 (truncate): Likewise.
3671 (quick_push): Perform a placement new into slot
3672 instead of assignment.
3673 (pop): For non-trivially destructible T return void
3674 rather than T & and destruct the popped element.
3675 (quick_insert, ordered_remove): Note that they aren't suitable
3676 for non-trivially copyable types. Add static_asserts for that.
3677 (block_remove): Assert T is trivially copyable.
3678 (vec_detail::is_trivially_copyable_or_pair): New trait.
3679 (qsort, sort, stablesort): Assert T is trivially copyable or
3680 std::pair with both trivally copyable types.
3681 (quick_grow): Add assert T is trivially default constructible,
3682 for now commented out.
3683 (quick_grow_cleared): Don't call quick_grow, instead inline it
3684 by hand except for the new static_assert.
3685 (gt_ggc_mx): Assert T is trivially destructable.
3686 (auto_vec::operator=): Formatting fixes.
3687 (auto_vec::auto_vec): Likewise.
3688 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
3689 it manually and call quick_grow_cleared method rather than quick_grow.
3690 (safe_grow_cleared): Likewise.
3691 * edit-context.cc (class line_event): Move definition earlier.
3692 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
3694 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
3695 safe_grow_cleared instead of safe_grow followed by placement new
3696 constructing the elements.
3698 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
3700 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
3701 * tree-affine.cc (expr_to_aff_combination): Likewise.
3703 2023-09-28 Richard Biener <rguenther@suse.de>
3705 PR tree-optimization/111614
3706 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
3707 convert the first vector when required.
3709 2023-09-28 xuli <xuli1@eswincomputing.com>
3712 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
3713 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
3715 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
3717 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
3719 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
3722 * configure: Regenerate.
3723 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
3725 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
3726 Philipp Tomsich <philipp.tomsich@vrull.eu>
3727 Manolis Tsamis <manolis.tsamis@vrull.eu>
3729 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
3731 (enum aarch64_stp_policy): New enum type.
3732 * config/aarch64/aarch64-protos.h (struct tune_params): Add
3733 appropriate enums for the policies.
3734 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
3735 * config/aarch64/aarch64-tuning-flags.def
3736 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
3738 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
3739 function to parse ldp-policy parameter.
3740 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
3741 (aarch64_override_options_internal): Call parsing functions.
3742 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
3743 (aarch64_operands_ok_for_ldpstp): Add call to
3744 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
3745 check and alignment check and remove superseded ones.
3746 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
3747 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
3748 check and alignment check and remove superseded ones.
3749 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
3750 (aarch64-stp-policy): New param.
3751 * doc/invoke.texi: Document the parameters accordingly.
3753 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
3755 * tree-data-ref.cc (include calls.h): Add new include.
3756 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
3758 2023-09-27 Richard Biener <rguenther@suse.de>
3760 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
3762 2023-09-27 Jakub Jelinek <jakub@redhat.com>
3765 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
3766 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
3768 * function.cc (assign_parm_find_data_types): Likewise.
3770 2023-09-27 Pan Li <pan2.li@intel.com>
3772 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
3773 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3774 (enum insn_type): Ditto.
3775 (expand_vec_roundeven): New func decl.
3776 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
3778 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3781 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
3783 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3785 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
3787 2023-09-27 Pan Li <pan2.li@intel.com>
3789 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
3790 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
3791 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
3792 (expand_vec_trunc): Ditto.
3794 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
3798 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
3799 Handle failure from expand_builtin_atomic_test_and_set.
3800 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
3801 generate atomic code through target support, return NULL
3802 instead of emitting non-atomic code. Also, for code handling
3803 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
3804 from calling emit_store_flag_force instead of returning NULL.
3806 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
3808 PR tree-optimization/111599
3809 * value-relation.cc (relation_oracle::valid_equivs): Ensure
3812 2023-09-26 Andrew Pinski <apinski@marvell.com>
3814 PR tree-optimization/106164
3815 PR tree-optimization/111456
3816 * match.pd (`(A ==/!= B) & (A CMP C)`):
3817 Support an optional cast on the second A.
3818 (`(A ==/!= B) | (A CMP C)`): Likewise.
3820 2023-09-26 Andrew Pinski <apinski@marvell.com>
3822 PR tree-optimization/111469
3823 * tree-ssa-phiopt.cc (minmax_replacement): Fix
3824 the assumption for the `non-diamond` handling cases
3827 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3829 * match.pd: Optimize COND_ADD reduction pattern.
3831 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3833 PR tree-optimization/111594
3834 PR tree-optimization/110660
3835 * match.pd: Optimize COND_LEN_ADD reduction.
3837 2023-09-26 Pan Li <pan2.li@intel.com>
3839 * config/riscv/autovec.md (round<mode>2): New pattern.
3840 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3841 (enum insn_type): Ditto.
3842 (expand_vec_round): New function decl.
3843 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
3845 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
3847 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
3849 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
3851 PR middle-end/111547
3852 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
3853 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
3855 2023-09-26 Pan Li <pan2.li@intel.com>
3857 * config/riscv/autovec.md (rint<mode>2): New pattern.
3858 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
3859 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
3861 2023-09-26 Pan Li <pan2.li@intel.com>
3863 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
3864 * config/riscv/riscv-protos.h (enum insn_type): New enum.
3865 (expand_vec_nearbyint): New function decl.
3866 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
3868 2023-09-26 Pan Li <pan2.li@intel.com>
3870 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
3871 (get_fp_rounding_coefficient): Rename.
3872 (gen_floor_const_fp): Remove.
3873 (expand_vec_ceil): Take renamed func.
3874 (expand_vec_floor): Ditto.
3876 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
3878 PR middle-end/111497
3879 * lra-constraints.cc (lra_constraints): Copy substituted
3881 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
3883 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
3885 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
3886 return statement in the varying case.
3888 2023-09-25 Xi Ruoyao <xry111@xry111.site>
3890 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
3892 2023-09-25 Andrew Pinski <apinski@marvell.com>
3894 PR tree-optimization/110386
3895 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
3897 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3900 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
3902 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
3905 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
3908 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
3911 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
3912 target_option_default_node when the callee has no option
3913 attributes, also simplify the existing code accordingly.
3915 2023-09-25 Guo Jie <guojie@loongson.cn>
3917 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
3918 pattern for vector construction.
3919 (vec_set<mode>_internal): Ditto.
3920 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
3921 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
3922 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
3923 Optimized the implementation of vector construction.
3924 (loongarch_expand_vector_init_same): New function.
3925 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
3926 pattern for vector construction.
3927 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
3929 (vec_concatv2df): Ditto.
3930 (vec_concatv4sf): Ditto.
3932 2023-09-24 Pan Li <pan2.li@intel.com>
3935 * config/riscv/riscv-v.cc
3936 (expand_vector_init_merge_repeating_sequence): Bugfix
3938 2023-09-24 Andrew Pinski <apinski@marvell.com>
3940 PR tree-optimization/111543
3941 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
3943 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3945 * config/riscv/autovec-opt.md: Extend VLS modes
3946 * config/riscv/vector-iterators.md: Ditto.
3948 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3950 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
3952 2023-09-23 Pan Li <pan2.li@intel.com>
3954 * config/riscv/autovec.md (floor<mode>2): New pattern.
3955 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3956 (enum insn_type): Ditto.
3957 (expand_vec_floor): New function decl.
3958 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
3959 (expand_vec_floor): Ditto.
3961 2023-09-22 Pan Li <pan2.li@intel.com>
3963 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
3964 (emit_vec_float_cmp_mask): Rename.
3965 (expand_vec_copysign): Ditto.
3966 (emit_vec_copysign): Ditto.
3967 (emit_vec_abs): New function impl.
3968 (emit_vec_cvt_x_f): Ditto.
3969 (emit_vec_cvt_f_x): Ditto.
3970 (expand_vec_ceil): Ditto.
3972 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3974 * config/riscv/vector-iterators.md: Extend VLS modes.
3976 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3978 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
3979 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
3980 (vec_duplicate<mode>): Ditto.
3982 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3984 * config/riscv/autovec.md: Add VLS conditional patterns.
3985 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
3986 (expand_cond_binop): Ditto.
3987 (expand_cond_ternop): Ditto.
3988 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
3989 (expand_cond_binop): Ditto.
3990 (expand_cond_ternop): Ditto.
3992 2023-09-22 xuli <xuli1@eswincomputing.com>
3995 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
3996 into vrgatherei16.vv.
3998 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
4000 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
4001 New combine patterns.
4002 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
4004 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
4006 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
4007 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
4009 2023-09-22 Pan Li <pan2.li@intel.com>
4011 * config/riscv/autovec.md (ceil<mode>2): New pattern.
4012 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
4013 (enum insn_type): Ditto.
4014 (expand_vec_ceil): New function decl.
4015 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
4016 (expand_vec_float_cmp_mask): Ditto.
4017 (expand_vec_copysign): Ditto.
4018 (expand_vec_ceil): Ditto.
4019 * config/riscv/vector.md: Add VLS mode support.
4021 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4023 * config/riscv/autovec.md: Extend VLS modes.
4025 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4027 * config/riscv/vector-iterators.md: Extend VLS modes.
4029 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
4030 Robin Dapp <rdapp.gcc@gmail.com>
4032 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
4033 (emit_nonvlmax_insn): Adjust comments.
4034 (emit_vlmax_insn_lra): Adjust comments.
4036 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4038 * config.gcc (*linux*): Set rust target_objs, and
4039 target_has_targetrustm,
4040 * config/t-linux (linux-rust.o): New rule.
4041 * config/linux-rust.cc: New file.
4043 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4045 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
4046 rust_target_objs and target_has_targetrustm.
4047 * config/t-winnt (winnt-rust.o): New rule.
4048 * config/winnt-rust.cc: New file.
4050 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4052 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
4053 and target_has_targetrustm.
4054 * config/fuchsia-rust.cc: New file.
4055 * config/t-fuchsia: New file.
4057 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4059 * config.gcc (*-*-vxworks*): Set rust_target_objs and
4060 target_has_targetrustm.
4061 * config/t-vxworks (vxworks-rust.o): New rule.
4062 * config/vxworks-rust.cc: New file.
4064 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4066 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
4067 target_has_targetrustm.
4068 * config/t-dragonfly (dragonfly-rust.o): New rule.
4069 * config/dragonfly-rust.cc: New file.
4071 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4073 * config.gcc (*-*-solaris2*): Set rust_target_objs and
4074 target_has_targetrustm.
4075 * config/t-sol2 (sol2-rust.o): New rule.
4076 * config/sol2-rust.cc: New file.
4078 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4080 * config.gcc (*-*-openbsd*): Set rust_target_objs and
4081 target_has_targetrustm.
4082 * config/t-openbsd (openbsd-rust.o): New rule.
4083 * config/openbsd-rust.cc: New file.
4085 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4087 * config.gcc (*-*-netbsd*): Set rust_target_objs and
4088 target_has_targetrustm.
4089 * config/t-netbsd (netbsd-rust.o): New rule.
4090 * config/netbsd-rust.cc: New file.
4092 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4094 * config.gcc (*-*-freebsd*): Set rust_target_objs and
4095 target_has_targetrustm.
4096 * config/t-freebsd (freebsd-rust.o): New rule.
4097 * config/freebsd-rust.cc: New file.
4099 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4101 * config.gcc (*-*-darwin*): Set rust_target_objs and
4102 target_has_targetrustm.
4103 * config/t-darwin (darwin-rust.o): New rule.
4104 * config/darwin-rust.cc: New file.
4106 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4108 * config/i386/t-i386 (i386-rust.o): New rule.
4109 * config/i386/i386-rust.cc: New file.
4110 * config/i386/i386-rust.h: New file.
4112 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4114 * doc/tm.texi: Regenerate.
4115 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
4117 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4119 * doc/tm.texi: Regenerate.
4120 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
4121 TARGET_RUST_CPU_INFO.
4123 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
4125 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
4126 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
4127 (tm_rust.h, cs-tm_rust.h, default-rust.o,
4128 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
4129 (s-tm-texi): Also check timestamp on rust-target.def.
4130 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
4131 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
4132 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
4134 * configure: Regenerate.
4135 * configure.ac (tm_rust_file_list, tm_rust_include_list,
4136 rust_target_objs): Add substitutes.
4137 * doc/tm.texi: Regenerate.
4138 * doc/tm.texi.in (targetrustm): Document.
4139 (target_has_targetrustm): Document.
4140 * genhooks.cc: Include rust/rust-target.def.
4141 * config/default-rust.cc: New file.
4143 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4146 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
4147 * config/riscv/predicates.md (autovec_else_operand): New predicate.
4148 * config/riscv/riscv-v.cc (get_else_operand): New function.
4149 (expand_cond_len_unop): Adapt ELSE value.
4150 (expand_cond_len_binop): Ditto.
4151 (expand_cond_len_ternop): Ditto.
4152 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
4153 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
4155 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4158 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
4160 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
4162 PR tree-optimization/111355
4163 * match.pd ((X + C) / N): Update pattern.
4165 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
4167 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
4169 2023-09-21 xuli <xuli1@eswincomputing.com>
4172 * config/riscv/constraints.md (c01): const_int 1.
4176 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
4177 (vector_eew16_stride_operand): Ditto.
4178 (vector_eew32_stride_operand): Ditto.
4179 (vector_eew64_stride_operand): Ditto.
4180 * config/riscv/vector-iterators.md: New iterator for stride operand.
4181 * config/riscv/vector.md: Add stride = element width constraint.
4183 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
4185 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
4186 (const_1_or_4_operand): Ditto.
4187 (vector_gs_scale_operand_16): Ditto.
4188 (vector_gs_scale_operand_32): Ditto.
4189 * config/riscv/vector-iterators.md: Adjust.
4191 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4193 * config/riscv/autovec.md: Extend VLS modes.
4194 * config/riscv/vector-iterators.md: Ditto.
4195 * config/riscv/vector.md: Ditto.
4197 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
4199 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
4200 of the return value.
4201 (ssa_cache::dump): Don't print GLOBAL RANGE header.
4202 (ssa_lazy_cache::merge_range): Adjust return value meaning.
4203 (ranger_cache::dump): Print GLOBAL RANGE header.
4205 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
4207 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
4209 (foperator_unordered_gt::fold_range): Same.
4210 (foperator_unordered_lt::fold_range): Same.
4211 (foperator_unordered_le::fold_range): Same.
4213 2023-09-20 Jakub Jelinek <jakub@redhat.com>
4215 * builtins.h (type_to_class): Declare.
4216 * builtins.cc (type_to_class): No longer static. Return
4217 int rather than enum.
4218 * doc/extend.texi (__builtin_classify_type): Document.
4220 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4223 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
4224 * optabs.cc (maybe_legitimize_operand): Ditto.
4225 (can_reuse_operands_p): Ditto.
4226 * optabs.h (enum expand_operand_type): Ditto.
4227 (create_undefined_input_operand): Ditto.
4229 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
4231 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
4232 'omp allocate' variables; move stack cleanup after other
4234 (omp_notice_variable): Process original decl when decl
4235 of the value-expression for a 'omp allocate' variable is passed.
4236 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
4238 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
4240 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
4241 support simplifying vector int not only scalar int.
4243 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4245 * config/riscv/vector-iterators.md: Extend VLS floating-point.
4247 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4249 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
4251 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
4254 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
4255 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
4257 2023-09-20 Richard Biener <rguenther@suse.de>
4259 PR tree-optimization/111489
4260 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
4262 2023-09-20 Richard Biener <rguenther@suse.de>
4264 PR tree-optimization/111489
4265 * doc/invoke.texi (--param uninit-max-chain-len): Document.
4266 (--param uninit-max-num-chains): Likewise.
4267 * params.opt (-param=uninit-max-chain-len=): New.
4268 (-param=uninit-max-num-chains=): Likewise.
4269 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
4270 param_uninit_max_num_chains.
4271 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
4272 (uninit_analysis::init_use_preds): Avoid VLA.
4273 (uninit_analysis::init_from_phi_def): Likewise.
4274 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
4277 2023-09-20 Jakub Jelinek <jakub@redhat.com>
4279 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
4280 GET_MODE_PRECISION of TImode or DImode depending on whether
4281 TImode is supported scalar mode.
4282 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
4283 * expr.cc (expand_expr_real_1): Likewise.
4284 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
4285 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
4287 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
4289 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
4290 (*n<optab><mode>): Ditto.
4291 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
4292 (*<any_shiftrt:optab>trunc<mode>): Ditto.
4293 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
4294 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
4295 (*single_widen_mult<any_extend:su><mode>): Ditto.
4296 (*single_widen_mul<any_extend:su><mode>): Ditto.
4297 (*single_widen_mult<mode>): Ditto.
4298 (*single_widen_mul<mode>): Ditto.
4299 (*dual_widen_fma<mode>): Ditto.
4300 (*dual_widen_fma<su><mode>): Ditto.
4301 (*single_widen_fma<mode>): Ditto.
4302 (*single_widen_fma<su><mode>): Ditto.
4303 (*dual_fma<mode>): Ditto.
4304 (*single_fma<mode>): Ditto.
4305 (*dual_fnma<mode>): Ditto.
4306 (*dual_widen_fnma<mode>): Ditto.
4307 (*single_fnma<mode>): Ditto.
4308 (*single_widen_fnma<mode>): Ditto.
4309 (*dual_fms<mode>): Ditto.
4310 (*dual_widen_fms<mode>): Ditto.
4311 (*single_fms<mode>): Ditto.
4312 (*single_widen_fms<mode>): Ditto.
4313 (*dual_fnms<mode>): Ditto.
4314 (*dual_widen_fnms<mode>): Ditto.
4315 (*single_fnms<mode>): Ditto.
4316 (*single_widen_fnms<mode>): Ditto.
4318 2023-09-20 Jakub Jelinek <jakub@redhat.com>
4321 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
4322 on vars or function decls if -fopenmp or -fopenmp-simd.
4324 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
4327 * config/riscv/autovec-opt.md: Add missed operand.
4329 2023-09-20 Omar Sandoval <osandov@osandov.com>
4332 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
4333 dwarf_split_debug_info.
4335 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4337 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
4338 (vectorize_related_mode): Add VLS related modes.
4339 * config/riscv/vector-iterators.md: Extend VLS modes.
4341 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
4343 PR rtl-optimization/110071
4344 * ira-color.cc (improve_allocation): Consider cost of callee
4347 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
4348 Xi Ruoyao <xry111@xry111.site>
4350 * configure: Regenerate.
4351 * configure.ac: Checking assembler for -mno-relax support.
4352 Disable relaxation when probing leb128 support.
4354 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
4356 * config.in: Regenerate.
4357 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
4358 mrelax. And set the initial value of explicit-relocs according to the
4360 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
4361 --no-relax option to the linker.
4362 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
4363 -mno-relax, pass the -mno-relax option to the assembler.
4364 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
4365 * config/loongarch/loongarch.opt: Regenerate.
4366 * configure: Regenerate.
4367 * configure.ac: Add detection of support for binutils relax function.
4369 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
4371 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
4372 -fdeps-target= flags.
4373 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
4374 only -fdeps-format= is specified.
4375 * json.h: Add a TODO item to refactor out to share with
4378 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
4379 Jason Merrill <jason@redhat.com>
4381 * gcc.cc (join_spec_func): Add a spec function to join all
4384 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
4386 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
4387 src_op_0 var to avoid rtl check error.
4389 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
4391 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
4393 (operator_not_equal::fold_range): Handle VREL_EQ.
4394 (operator_lt::fold_range): Remove special casing for VREL_EQ.
4395 (operator_gt::fold_range): Same.
4396 (foperator_unordered_equal::fold_range): Same.
4398 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
4400 * doc/extend.texi: Document attributes hot, cold on C++ types.
4402 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
4404 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
4405 modulo instruction is disabled.
4406 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
4407 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
4408 (define_expand umod<mode>3): New.
4409 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
4410 instruction is disabled.
4411 (umodti3, modti3): Check if the modulo instruction is disabled.
4413 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
4415 * doc/gm2.texi (fdebug-builtins): Correct description.
4417 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
4419 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
4420 * config/iq2000/iq2000.md (rotrsi3): Use it.
4422 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
4424 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
4425 (operator_lt::op2_range): Same.
4426 (operator_le::op1_range): Same.
4427 (operator_le::op2_range): Same.
4428 (operator_gt::op1_range): Same.
4429 (operator_gt::op2_range): Same.
4430 (operator_ge::op1_range): Same.
4431 (operator_ge::op2_range): Same.
4432 (foperator_unordered_lt::op1_range): Same.
4433 (foperator_unordered_lt::op2_range): Same.
4434 (foperator_unordered_le::op1_range): Same.
4435 (foperator_unordered_le::op2_range): Same.
4436 (foperator_unordered_gt::op1_range): Same.
4437 (foperator_unordered_gt::op2_range): Same.
4438 (foperator_unordered_ge::op1_range): Same.
4439 (foperator_unordered_ge::op2_range): Same.
4441 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
4443 * value-range.h (frange::update_nan): New.
4445 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
4447 * range-op-float.cc (operator_not_equal::op2_range): New.
4448 * range-op-mixed.h: Add operator_not_equal::op2_range.
4450 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
4452 PR tree-optimization/110080
4453 PR tree-optimization/110249
4454 * tree-vrp.cc (remove_unreachable::final_p): New.
4455 (remove_unreachable::maybe_register): Rename from
4456 maybe_register_block and call early or final routine.
4457 (fully_replaceable): New.
4458 (remove_unreachable::handle_early): New.
4459 (remove_unreachable::remove_and_update_globals): Remove
4460 non-final processing.
4461 (rvrp_folder::rvrp_folder): Add final flag to constructor.
4462 (rvrp_folder::post_fold_bb): Remove unreachable registration.
4463 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
4464 (execute_ranger_vrp): Adjust some call parameters.
4466 2023-09-19 Richard Biener <rguenther@suse.de>
4469 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
4471 * tree-pretty-print.cc (op_symbol): Likewise.
4472 (op_symbol_code): Print TDF_GIMPLE variant if requested.
4473 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
4475 (dump_gimple_cond): Likewise.
4477 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
4478 Pan Li <pan2.li@intel.com>
4480 * tree-streamer.h (bp_unpack_machine_mode): If
4481 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
4483 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4485 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
4487 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4489 * config/riscv/autovec.md: Extend VLS modes.
4490 * config/riscv/vector.md: Ditto.
4492 2023-09-19 Richard Biener <rguenther@suse.de>
4494 PR tree-optimization/111465
4495 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
4496 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
4498 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4500 * config/riscv/autovec.md: Extend VLS floating-point modes.
4501 * config/riscv/vector.md: Ditto.
4503 2023-09-19 Jakub Jelinek <jakub@redhat.com>
4505 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
4506 nor check type_has_mode_precision_p for width larger than [TD]Imode
4508 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
4509 to type. Use boolean_true_node instead of
4510 constant_boolean_node (true, boolean_type_node). Formatting fixes.
4512 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4514 * config/riscv/autovec.md: Add VLS modes.
4515 * config/riscv/vector.md: Ditto.
4517 2023-09-19 Jakub Jelinek <jakub@redhat.com>
4519 * tree.cc (build_bitint_type): Assert precision is not 0, or
4521 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
4522 of unsigned _BitInt(1).
4524 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
4526 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
4527 Removed old combine patterns.
4528 (*single_<optab>mult_plus<mode>): Ditto.
4529 (*double_<optab>mult_plus<mode>): Ditto.
4530 (*sign_zero_extend_fma): Ditto.
4531 (*zero_sign_extend_fma): Ditto.
4532 (*double_widen_fma<mode>): Ditto.
4533 (*single_widen_fma<mode>): Ditto.
4534 (*double_widen_fnma<mode>): Ditto.
4535 (*single_widen_fnma<mode>): Ditto.
4536 (*double_widen_fms<mode>): Ditto.
4537 (*single_widen_fms<mode>): Ditto.
4538 (*double_widen_fnms<mode>): Ditto.
4539 (*single_widen_fnms<mode>): Ditto.
4540 (*reduc_plus_scal_<mode>): Adjust name.
4541 (*widen_reduc_plus_scal_<mode>): Adjust name.
4542 (*dual_widen_fma<mode>): New combine pattern.
4543 (*dual_widen_fmasu<mode>): Ditto.
4544 (*dual_widen_fmaus<mode>): Ditto.
4545 (*dual_fma<mode>): Ditto.
4546 (*single_fma<mode>): Ditto.
4547 (*dual_fnma<mode>): Ditto.
4548 (*single_fnma<mode>): Ditto.
4549 (*dual_fms<mode>): Ditto.
4550 (*single_fms<mode>): Ditto.
4551 (*dual_fnms<mode>): Ditto.
4552 (*single_fnms<mode>): Ditto.
4553 * config/riscv/autovec.md (fma<mode>4):
4554 Reafctor fma pattern.
4555 (*fma<VI:mode><P:mode>): Removed.
4556 (fnma<mode>4): Reafctor.
4557 (*fnma<VI:mode><P:mode>): Removed.
4558 (*fma<VF:mode><P:mode>): Removed.
4559 (*fnma<VF:mode><P:mode>): Removed.
4560 (fms<mode>4): Reafctor.
4561 (*fms<VF:mode><P:mode>): Removed.
4562 (fnms<mode>4): Reafctor.
4563 (*fnms<VF:mode><P:mode>): Removed.
4564 * config/riscv/riscv-protos.h (prepare_ternary_operands):
4566 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
4567 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
4568 (*pred_mul_plus<mode>): Removed.
4569 (*pred_mul_plus<mode>_scalar): Removed.
4570 (*pred_mul_plus<mode>_extended_scalar): Removed.
4571 (*pred_minus_mul<mode>_undef): New pattern.
4572 (*pred_minus_mul<mode>): Removed.
4573 (*pred_minus_mul<mode>_scalar): Removed.
4574 (*pred_minus_mul<mode>_extended_scalar): Removed.
4575 (*pred_mul_<optab><mode>_undef): New pattern.
4576 (*pred_mul_<optab><mode>): Removed.
4577 (*pred_mul_<optab><mode>_scalar): Removed.
4578 (*pred_mul_neg_<optab><mode>_undef): New pattern.
4579 (*pred_mul_neg_<optab><mode>): Removed.
4580 (*pred_mul_neg_<optab><mode>_scalar): Removed.
4582 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
4584 * config/riscv/riscv-vector-builtins.cc
4585 (builtin_decl, expand_builtin): Replace SVE with RVV.
4587 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
4589 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
4590 riscv-cmo.def and riscv-scalar-crypto.def.
4592 2023-09-18 Pan Li <pan2.li@intel.com>
4594 * config/riscv/autovec.md: Extend to vls mode.
4596 2023-09-18 Pan Li <pan2.li@intel.com>
4598 * config/riscv/autovec.md: Bugfix.
4599 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
4601 2023-09-18 Andrew Pinski <apinski@marvell.com>
4603 PR tree-optimization/111442
4604 * match.pd (zero_one_valued_p): Have the bit_and match not be
4607 2023-09-18 Andrew Pinski <apinski@marvell.com>
4609 PR tree-optimization/111435
4610 * match.pd (zero_one_valued_p): Don't do recursion
4613 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
4615 * config/darwin-protos.h (enum darwin_external_toolchain): New.
4616 * config/darwin.cc (DSYMUTIL_VERSION): New.
4617 (darwin_override_options): Choose the default debug DWARF version
4618 depending on the configured dsymutil version.
4620 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
4622 * configure: Regenerate.
4623 * configure.ac: Handle explict disable of stdlib option, set
4624 defaults for Darwin.
4626 2023-09-18 Andrew Pinski <apinski@marvell.com>
4628 PR tree-optimization/111431
4629 * match.pd (`(a == CST) & a`): New pattern.
4631 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4633 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
4634 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
4636 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
4639 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
4640 Add support for immediates using shifted ORR/BIC.
4641 (aarch64_split_dimode_const_store): Apply if we save one instruction.
4642 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
4643 Make pattern global.
4645 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
4647 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
4648 (neoverse-v1): Place before zeus.
4649 (neoverse-v2): Place before demeter.
4650 * config/aarch64/aarch64-tune.md: Regenerate.
4652 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4654 * config/riscv/autovec.md: Add VLS modes.
4655 * config/riscv/vector-iterators.md: Ditto.
4656 * config/riscv/vector.md: Ditto.
4658 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4660 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
4661 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
4663 2023-09-18 Richard Biener <rguenther@suse.de>
4665 PR tree-optimization/111294
4666 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
4668 (back_threader::find_paths_to_names): Adjust.
4669 (back_threader::maybe_thread_block): Likewise.
4670 (back_threader_profitability::possibly_profitable_path_p): Remove
4671 code applying extra costs to copies PHIs.
4673 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4675 * config/riscv/autovec.md: Extend VLS modes.
4676 * config/riscv/vector.md: Ditto.
4678 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4680 * config/riscv/vector.md (mov<mode>): New pattern.
4681 (*mov<mode>_mem_to_mem): Ditto.
4682 (*mov<mode>): Ditto.
4683 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
4684 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
4685 (*mov<mode>_vls): Ditto.
4686 (movmisalign<mode>): Ditto.
4687 (@vec_duplicate<mode>): Ditto.
4688 * config/riscv/autovec-vls.md: Removed.
4690 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4693 * config/riscv/autovec.md: Add VLS modes.
4695 2023-09-18 Jason Merrill <jason@redhat.com>
4697 * doc/gty.texi: Add discussion of cache vs. deletable.
4699 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4701 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
4702 (copysign<mode>3): Ditto.
4703 (xorsign<mode>3): Ditto.
4704 (<optab><mode>2): Ditto.
4705 * config/riscv/autovec.md: Extend VLS modes.
4707 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
4709 PR middle-end/111303
4710 * match.pd ((t * 2) / 2): Update pattern.
4712 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
4714 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
4716 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4719 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
4720 (vec_extract<mode><vel>): Ditto.
4721 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
4722 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
4723 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
4725 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
4727 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
4728 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
4729 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
4730 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
4731 new insn/expansions.
4732 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
4733 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
4734 (*riscv_<sha256_op>_si): New raw instruction for RV32.
4735 (*riscv_<sm3_op>_si): Ditto.
4736 (*riscv_<sm4_op>_si): Ditto.
4737 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
4738 (riscv_<sm3_op>_di_extended): Ditto.
4739 (riscv_<sm4_op>_di_extended): Ditto.
4740 (riscv_<sha256_op>_si): New common instruction expansion.
4741 (riscv_<sm3_op>_si): Ditto.
4742 (riscv_<sm4_op>_si): Ditto.
4743 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
4744 "crypto_zksh" and "crypto_zksed". Remove availability
4745 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
4746 * config/riscv/riscv-ftypes.def: Remove unused function type.
4747 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
4748 intrinsics to operate on uint32_t.
4750 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
4752 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
4753 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
4754 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
4755 Removed as no longer used.
4756 (RISCV_ATYPE_UDI): New for uint64_t.
4757 * config/riscv/riscv-cmo.def: Make types unsigned for not working
4758 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
4759 argument/return types.
4760 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
4761 number and shift amount types unsigned.
4762 * config/riscv/riscv-scalar-crypto.def: Ditto.
4764 2023-09-16 Pan Li <pan2.li@intel.com>
4766 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
4768 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
4770 * config/riscv/predicates.md: Restrict predicate
4771 to allow 'reg' only.
4773 2023-09-15 Andrew Pinski <apinski@marvell.com>
4775 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
4776 Also match `a & zero_one_valued_p` too.
4778 2023-09-15 Andrew Pinski <apinski@marvell.com>
4780 PR tree-optimization/111414
4781 * match.pd (`(1 >> X) != 0`): Check to see if
4782 the integer_onep was an integral type (not a vector type).
4784 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
4786 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
4787 run phi analysis, and do it before loop analysis.
4789 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
4791 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
4794 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
4796 PR tree-optimization/111407
4797 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
4798 when one of the operands is subject to abnormal coalescing.
4800 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4802 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
4803 (enum insn_type): Ditto.
4804 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
4805 (emit_vlmax_insn): Adjust.
4806 (emit_nonvlmax_insn): Adjust.
4807 (emit_vlmax_insn_lra): Adjust.
4809 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4811 * config/riscv/autovec-opt.md: Adjust.
4812 * config/riscv/autovec.md: Ditto.
4813 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
4814 (expand_reduction): Adjust expand_reduction prototype.
4815 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
4816 (expand_reduction): Refactor expand_reduction.
4818 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
4821 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
4822 the lower memory access to a mem-pair operand.
4824 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
4826 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
4827 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
4828 before the driver canonicalization routines.
4829 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
4830 to loongarch-driver.h
4831 * config/loongarch/t-linux: Move multilib-related definitions to
4833 * config/loongarch/t-multilib: New file. Inject library build
4834 options obtained from --with-multilib-list.
4835 * config/loongarch/t-loongarch: Same.
4837 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4840 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
4841 New combine pattern.
4842 (*fold_left_widen_plus_<mode>): Ditto.
4843 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
4844 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
4845 Change from define_expand to define_insn_and_split.
4846 (fold_left_plus_<mode>): Ditto.
4847 (mask_len_fold_left_plus_<mode>): Ditto.
4848 * config/riscv/riscv-v.cc (expand_reduction):
4849 Support widen reduction.
4850 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
4851 Add new iterators and attrs.
4853 2023-09-14 David Malcolm <dmalcolm@redhat.com>
4855 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
4856 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
4857 (sarif_thread_flow::sarif_thread_flow): New.
4858 (sarif_builder::make_code_flow_object): Reimplement, creating
4859 per-thread threadFlow objects, populating them with the relevant
4861 (sarif_builder::make_thread_flow_object): Delete, moving the
4862 code into sarif_builder::make_code_flow_object.
4863 (sarif_builder::make_thread_flow_location_object): Add
4864 "path_event_idx" param. Use it to set "executionOrder"
4866 * diagnostic-path.h (diagnostic_event::get_thread_id): New
4868 (class diagnostic_thread): New.
4869 (diagnostic_path::num_threads): New pure-virtual vfunc.
4870 (diagnostic_path::get_thread): New pure-virtual vfunc.
4871 (diagnostic_path::multithreaded_p): New decl.
4872 (simple_diagnostic_event::simple_diagnostic_event): Add optional
4874 (simple_diagnostic_event::get_thread_id): New accessor.
4875 (simple_diagnostic_event::m_thread_id): New.
4876 (class simple_diagnostic_thread): New.
4877 (simple_diagnostic_path::simple_diagnostic_path): Move definition
4879 (simple_diagnostic_path::num_threads): New.
4880 (simple_diagnostic_path::get_thread): New.
4881 (simple_diagnostic_path::add_thread): New.
4882 (simple_diagnostic_path::add_thread_event): New.
4883 (simple_diagnostic_path::m_threads): New.
4884 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
4885 param for overriding the context's printer.
4886 (diagnostic_show_locus): Likwise.
4887 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
4888 Move here from diagnostic-path.h. Add main thread.
4889 (simple_diagnostic_path::num_threads): New.
4890 (simple_diagnostic_path::get_thread): New.
4891 (simple_diagnostic_path::add_thread): New.
4892 (simple_diagnostic_path::add_thread_event): New.
4893 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
4894 param and use it to initialize m_thread_id. Reformat.
4895 * diagnostic.h: Add pretty_printer param for overriding the
4897 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
4898 (can_consolidate_events): Compare thread ids.
4899 (class per_thread_summary): New.
4900 (event_range::event_range): Add per_thread_summary arg.
4901 (event_range::print): Add "pp" param and use it rather than dc's
4903 (event_range::m_thread_id): New field.
4904 (event_range::m_per_thread_summary): New field.
4905 (path_summary::multithreaded_p): New.
4906 (path_summary::get_events_for_thread_id): New.
4907 (path_summary::m_per_thread_summary): New field.
4908 (path_summary::m_thread_id_to_events): New field.
4909 (path_summary::get_or_create_events_for_thread_id): New.
4910 (path_summary::path_summary): Create per_thread_summary instances
4911 as needed and associate the event_range instances with them.
4912 (base_indent): Move here from print_path_summary_as_text.
4913 (per_frame_indent): Likewise.
4914 (class thread_event_printer): New, adapted from parts of
4915 print_path_summary_as_text.
4916 (print_path_summary_as_text): Make static. Reimplement to
4917 moving most of existing code to class thread_event_printer,
4918 capturing state as per-thread as appropriate.
4919 (default_tree_diagnostic_path_printer): Add missing 'break' on
4922 2023-09-14 David Malcolm <dmalcolm@redhat.com>
4924 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
4925 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
4926 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
4927 clearing the deletable gcc_root_tab_t.
4928 (ggc_common_finalize): New.
4929 * ggc.h (ggc_common_finalize): New decl.
4930 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
4931 ggc_common_finalize.
4933 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
4935 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
4936 unsigned comparisons.
4937 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
4938 generation of salt/saltu instructions.
4939 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
4940 * config/xtensa/xtensa.md (salt, saltu): New instruction
4943 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
4945 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
4948 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
4950 * config/riscv/autovec.md: Change rtx code to unspec.
4951 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
4952 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
4953 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
4955 (class widen_freducop): Removed.
4956 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
4957 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
4958 (@pred_<reduc_op><mode>): New name.
4959 (@pred_widen_reduc_plus<v_su><mode>): Change name.
4960 (@pred_reduc_plus<order><mode>): Change name.
4961 (@pred_widen_reduc_plus<order><mode>): Change name.
4963 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
4965 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
4966 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
4967 * config/riscv/vector-iterators.md: New iterators and attrs.
4968 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
4970 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
4971 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
4972 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
4973 (@pred_reduc_<reduc><mode>): Added.
4974 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
4975 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
4976 (@pred_widen_reduc_plus<v_su><mode>): Added.
4977 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
4978 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
4979 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
4980 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
4981 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
4982 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
4983 (@pred_reduc_plus<order><mode>): Added.
4984 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
4985 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
4986 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
4987 (@pred_widen_reduc_plus<order><mode>): Added.
4989 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
4991 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
4992 Move WHILELO handling to...
4993 (aarch64_vector_costs::finish_cost): ...here. Check whether the
4994 vectorizer has decided to use a predicated loop.
4996 2023-09-14 Andrew Pinski <apinski@marvell.com>
4998 PR tree-optimization/106164
4999 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
5000 Expand to support constants that are off by one.
5002 2023-09-14 Andrew Pinski <apinski@marvell.com>
5004 * genmatch.cc (parser::parse_result): For an else clause
5005 of an if statement inside a switch, error out explictly.
5007 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5009 * config/riscv/autovec-opt.md: Add VLS mask modes.
5010 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
5011 (vcond_mask_<mode><vm>): Add VLS mask modes.
5012 * config/riscv/vector.md: Ditto.
5014 2023-09-14 Richard Biener <rguenther@suse.de>
5016 PR tree-optimization/111294
5017 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
5018 operands that eventually become dead and use simple_dce_from_worklist
5019 to remove their definitions if they did so.
5021 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
5023 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
5024 Accept all nonimmediate_operands, but keep the existing constraints.
5025 If the instruction is split before RA, load invalid addresses into
5026 a temporary register.
5027 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
5029 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5032 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
5033 (vector_insn_info::global_merge): Ditto.
5034 (vector_insn_info::get_avl_or_vl_reg): Ditto.
5036 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5038 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
5040 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
5042 * config/loongarch/loongarch-def.c: Modify the default value of
5045 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
5047 * config/xtensa/xtensa.cc (xtensa_expand_scc):
5048 Revert the changes from the last patch, as the work in the RTL
5049 expansion pass is too far to determine the physical registers.
5050 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
5051 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
5053 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
5056 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
5058 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5060 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
5061 (@vec_extract<mode><vel>): Ditto.
5062 * config/riscv/vector.md: Ditto
5064 2023-09-13 Andrew Pinski <apinski@marvell.com>
5066 * match.pd (`X <= MAX(X, Y)`):
5067 Move before `MIN (X, C1) < C2` pattern.
5069 2023-09-13 Andrew Pinski <apinski@marvell.com>
5071 PR tree-optimization/111364
5072 * match.pd (`MIN (X, Y) == X`): Extend
5073 to min/lt, min/ge, max/gt, max/le.
5075 2023-09-13 Andrew Pinski <apinski@marvell.com>
5077 PR tree-optimization/111345
5078 * match.pd (`Y > (X % Y)`): Merge
5080 (`(X % Y) < Y`): Pattern by adding `:c`
5083 2023-09-13 Richard Biener <rguenther@suse.de>
5085 PR tree-optimization/111387
5086 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
5087 EDGE_DFS_BACK when doing BB vectorization.
5088 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
5089 to compute RPO and mark backedges.
5091 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
5093 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
5094 New combine pattern.
5095 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
5096 (<mulh_table><mode>3_highpart): Merged pattern.
5097 (umul<mode>3_highpart): Mrege smul and umul.
5098 * config/riscv/vector-iterators.md (umul): New iterators.
5099 (UNSPEC_VMULHU): New iterators.
5101 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
5103 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
5104 New combine pattern.
5105 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
5107 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
5109 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
5110 (*cond_copysign<mode>): New combine pattern.
5111 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
5113 2023-09-13 Richard Biener <rguenther@suse.de>
5115 PR tree-optimization/111397
5116 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
5117 argument to specify whether the PHI destination doesn't flow in
5118 from an abnormal PHI.
5119 (propagate_value): Adjust.
5120 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
5122 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
5124 (process_bb): Likewise.
5126 2023-09-13 Pan Li <pan2.li@intel.com>
5129 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
5131 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
5133 PR tree-optimization/111303
5134 * match.pd ((X - N * M) / N): Add undefined_p checking.
5135 ((X + N * M) / N): Likewise.
5136 ((X + C) div_rshift N): Likewise.
5138 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5141 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
5143 2023-09-12 Martin Jambor <mjambor@suse.cz>
5145 * dbgcnt.def (form_fma): New.
5146 * tree-ssa-math-opts.cc: Include dbgcnt.h.
5147 (convert_mult_to_fma): Bail out if the debug counter say so.
5149 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
5151 * config/riscv/autovec-opt.md: Update type
5152 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
5154 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5156 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
5158 (aarch64_layout_frame): Use it to decide whether locals should
5159 go above or below the saved registers.
5160 (aarch64_expand_prologue): Update stack layout comment.
5161 Emit a stack tie after the final adjustment.
5163 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5165 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
5166 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
5167 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
5169 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5171 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
5172 (aarch64_frame::hard_fp_save_and_probe): New fields.
5173 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
5174 Rather than asserting that a leaf function saves LR, instead assert
5175 that a leaf function saves something.
5176 (aarch64_get_separate_components): Prevent the chosen probe
5177 registers from being individually shrink-wrapped.
5178 (aarch64_allocate_and_probe_stack_space): Remove workaround for
5179 probe registers that aren't at the bottom of the previous allocation.
5181 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5183 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
5184 Always probe the residual allocation at offset 1024, asserting
5185 that that is in range.
5187 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5189 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
5190 the LR save slot is in the first 16 bytes of the register save area.
5191 Only form STP/LDP push/pop candidates if both registers are valid.
5192 (aarch64_allocate_and_probe_stack_space): Remove workaround for
5193 when LR was not in the first 16 bytes.
5195 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5197 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
5198 Don't probe final allocations that are exactly 1KiB in size (after
5199 unprobed space above the final allocation has been deducted).
5201 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5203 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
5204 calculation of initial_adjust for frames in which all saves
5207 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5209 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
5210 the allocation of the top of the frame.
5212 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5214 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
5216 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
5217 from the bottom of the frame, rather than the bottom of the saved
5218 register area. Measure reg_offset from the bottom of the frame
5219 rather than the bottom of the saved register area.
5220 (aarch64_save_callee_saves): Update accordingly.
5221 (aarch64_restore_callee_saves): Likewise.
5222 (aarch64_get_separate_components): Likewise.
5223 (aarch64_process_components): Likewise.
5225 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5227 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
5229 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5231 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
5233 (aarch64_frame::bytes_above_hard_fp): ...this.
5234 * config/aarch64/aarch64.cc (aarch64_layout_frame)
5235 (aarch64_expand_prologue): Update accordingly.
5236 (aarch64_initial_elimination_offset): Likewise.
5238 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5240 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
5241 (aarch64_frame::bytes_above_locals): ...this.
5242 * config/aarch64/aarch64.cc (aarch64_layout_frame)
5243 (aarch64_initial_elimination_offset): Update accordingly.
5245 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5247 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
5248 calculation of chain_offset into the emit_frame_chain block.
5250 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5252 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
5253 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
5254 callee_offset handling.
5255 (aarch64_save_callee_saves): Replace the start_offset parameter
5256 with a bytes_below_sp parameter.
5257 (aarch64_restore_callee_saves): Likewise.
5258 (aarch64_expand_prologue): Update accordingly.
5259 (aarch64_expand_epilogue): Likewise.
5261 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5263 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
5265 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
5266 (aarch64_expand_epilogue): Use it instead of
5267 below_hard_fp_saved_regs_size.
5269 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5271 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
5273 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
5274 and use it instead of crtl->outgoing_args_size.
5275 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
5276 of outgoing_args_size.
5277 (aarch64_process_components): Likewise.
5279 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5281 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
5282 allocate the frame in one go if there are no saved registers.
5284 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5286 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
5287 chain_offset rather than callee_offset.
5289 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
5291 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
5292 a local shorthand for cfun->machine->frame.
5293 (aarch64_restore_callee_saves, aarch64_get_separate_components):
5294 (aarch64_process_components): Likewise.
5295 (aarch64_allocate_and_probe_stack_space): Likewise.
5296 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
5297 (aarch64_layout_frame): Use existing shorthand for one more case.
5299 2023-09-12 Andrew Pinski <apinski@marvell.com>
5301 PR tree-optimization/107881
5302 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
5303 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
5305 2023-09-12 Pan Li <pan2.li@intel.com>
5307 * config/riscv/riscv-vector-costs.h (struct range): Removed.
5309 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5311 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
5312 (compute_nregs_for_mode): Ditto.
5313 (live_range_conflict_p): Ditto.
5314 (max_number_of_live_regs): Ditto.
5315 (compute_lmul): Ditto.
5316 (costs::prefer_new_lmul_p): Ditto.
5317 (costs::better_main_loop_than_p): Ditto.
5318 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
5319 (struct var_live_range): Ditto.
5320 (struct autovec_info): Ditto.
5321 * config/riscv/t-riscv: Update makefile for COST model.
5323 2023-09-12 Jakub Jelinek <jakub@redhat.com>
5325 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
5328 2023-09-12 Jakub Jelinek <jakub@redhat.com>
5330 PR middle-end/111338
5331 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
5333 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
5334 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
5335 optimization if type's precision is too large for
5336 vn_walk_cb_data::bufsize.
5338 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
5340 * doc/gm2.texi (Compiler options): Document new option
5343 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
5345 * doc/sourcebuild.texi (stack_size): Update.
5347 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
5349 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
5350 (<optab>_not<mode>3): Likewise.
5351 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
5353 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
5355 (GEN_EMIT_HELPER2): Likewise.
5356 (emit_strcmp_scalar_compare_byte): New function.
5357 (emit_strcmp_scalar_compare_subword): Likewise.
5358 (emit_strcmp_scalar_compare_word): Likewise.
5359 (emit_strcmp_scalar_load_and_compare): Likewise.
5360 (emit_strcmp_scalar_call_to_libc): Likewise.
5361 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
5362 (emit_strcmp_scalar_result_calculation): Likewise.
5363 (riscv_expand_strcmp_scalar): Likewise.
5364 (riscv_expand_strcmp): Likewise.
5365 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
5367 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
5368 (cmpstrnsi): Invoke expansion function for str(n)cmp.
5369 (cmpstrsi): Likewise.
5370 * config/riscv/riscv.opt: Add new parameter
5371 '-mstring-compare-inline-limit'.
5372 * doc/invoke.texi: Document new parameter
5373 '-mstring-compare-inline-limit'.
5375 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
5377 * config.gcc: Add new object riscv-string.o.
5379 * config/riscv/riscv-protos.h (riscv_expand_strlen):
5381 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
5382 * config/riscv/riscv.opt: New flag 'minline-strlen'.
5383 * config/riscv/t-riscv: Add new object riscv-string.o.
5384 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
5385 (th_rev<mode>2): Likewise.
5386 (th_tstnbz<mode>2): New INSN.
5387 * doc/invoke.texi: Document '-minline-strlen'.
5388 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
5389 (emit_unlikely_jump_insn): Likewise.
5390 * rtl.h (emit_likely_jump_insn): New prototype.
5391 (emit_unlikely_jump_insn): Likewise.
5392 * config/riscv/riscv-string.cc: New file.
5394 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
5396 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
5397 (TARGET_SUPPORTS_ALIASES): Define.
5399 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
5401 * doc/sourcebuild.texi (check-function-bodies): Update.
5403 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
5405 * gimplify.cc (gimplify_bind_expr): Check for
5406 insertion after variable cleanup. Convert 'omp allocate'
5407 var-decl attribute to GOMP_alloc/GOMP_free calls.
5409 2023-09-12 xuli <xuli1@eswincomputing.com>
5411 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
5412 parameter e and replace NULL_RTX with gcc_unreachable.
5414 2023-09-12 xuli <xuli1@eswincomputing.com>
5416 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
5418 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5419 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
5420 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
5422 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5423 * config/riscv/riscv-vector-builtins.cc: Add args type.
5425 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
5427 * config/riscv/riscv.cc
5428 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
5429 riscv_avoid_shrink_wrapping_separate.
5430 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
5432 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
5434 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
5436 * shrink-wrap.cc (try_shrink_wrapping_separate):call
5437 use_shrink_wrapping_separate.
5438 (use_shrink_wrapping_separate): wrap the condition
5439 check in use_shrink_wrapping_separate.
5440 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
5442 2023-09-11 Andrew Pinski <apinski@marvell.com>
5444 PR tree-optimization/111348
5445 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
5446 the cmp part of the pattern.
5448 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
5451 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
5452 Call output_addr_const for CASE_CONST_SCALAR_INT.
5454 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
5456 * config/riscv/thead.md: Update types
5458 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
5460 * config/riscv/riscv.md: Update types
5462 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
5464 * config/riscv/riscv.md: Add "zicond" type
5465 * config/riscv/zicond.md: Update types
5467 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
5469 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
5470 * config/riscv/zc.md: Update types
5472 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
5474 * config/riscv/autovec-opt.md: Update types
5475 * config/riscv/autovec.md: likewise
5477 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5479 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
5481 (s390_vec_unsigned_flt): Ditto.
5482 (s390_vec_revb_flt): Ditto.
5483 (s390_vec_reve_flt): Ditto.
5484 (s390_vclfnhs): Fix operand flags.
5485 (s390_vclfnls): Ditto.
5486 (s390_vcrnfs): Ditto.
5490 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5492 * config/s390/s390-builtins.def (O_U64): New.
5497 (O_M12): Change bit position.
5508 (OB_DEF_VAR): Add operand constraints.
5510 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
5513 2023-09-11 Andrew Pinski <apinski@marvell.com>
5515 PR tree-optimization/111349
5516 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
5517 the cmp part of the pattern.
5519 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5522 * config/riscv/riscv.opt: Set default as scalable vectorization.
5524 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5526 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
5527 (get_all_successors): Ditto.
5528 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
5529 (get_all_successors): Ditto.
5531 2023-09-11 Jakub Jelinek <jakub@redhat.com>
5533 PR middle-end/111329
5534 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
5535 function. For printing values which don't fit into digit_buffer
5536 use out-of-line function.
5537 * wide-int-print.h (pp_wide_int_large): Declare.
5538 * wide-int-print.cc: Include pretty-print.h.
5539 (pp_wide_int_large): Define.
5541 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5543 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
5544 Use dominance analysis.
5545 (pass_vsetvl::init): Ditto.
5546 (pass_vsetvl::done): Ditto.
5548 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5551 * config/riscv/autovec.md: Add VLS modes.
5552 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
5553 (cmp_lmul_gt_one): Ditto.
5554 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
5555 (cmp_lmul_gt_one): Ditto.
5556 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
5557 (riscv_vectorize_vec_perm_const): Ditto.
5558 * config/riscv/vector-iterators.md: Ditto.
5559 * config/riscv/vector.md: Ditto.
5561 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5563 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
5564 * config/riscv/vector-iterators.md: New iterator
5566 2023-09-11 Andrew Pinski <apinski@marvell.com>
5568 PR tree-optimization/111346
5569 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
5572 2023-09-11 liuhongt <hongtao.liu@intel.com>
5576 * config/i386/sse.md (int_comm): New int_attr.
5577 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
5578 Remove % for Complex conjugate operations since they're not
5580 (fma_<complexpairopname>_<mode>_pair): Ditto.
5581 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
5582 (cmul<conj_op><mode>3): Ditto.
5584 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5586 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
5587 fixed-vlmax/vls vector permutation.
5589 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5591 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
5593 2023-09-10 Andrew Pinski <apinski@marvell.com>
5595 PR tree-optimization/111331
5596 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
5597 Fix the LE/GE comparison to the correct value.
5598 * tree-ssa-phiopt.cc (minmax_replacement):
5599 Fix the LE/GE comparison for the
5600 `(a CMP CST1) ? max<a,CST2> : a` optimization.
5602 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
5604 * config/darwin.cc (darwin_function_section): Place unlikely
5605 executed global init code into the standard cold section.
5607 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5610 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
5611 (pass_vsetvl::pre_vsetvl): Ditto.
5612 (pass_vsetvl::init): Ditto.
5613 (pass_vsetvl::lazy_vsetvl): Ditto.
5615 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
5617 * config/loongarch/loongarch.md (mulsidi3_64bit):
5618 Field unsigned extension support.
5619 (<u>muldi3_highpart): Modify template name.
5620 (<u>mulsi3_highpart): Likewise.
5621 (<u>mulsidi3_64bit): Field unsigned extension support.
5622 (<su>muldi3_highpart): Modify muldi3_highpart to
5624 (<su>mulsi3_highpart): Modify mulsi3_highpart to
5627 2023-09-09 Xi Ruoyao <xry111@xry111.site>
5629 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
5630 Check precondition (delta must be a power of 2) and use
5631 popcount_hwi instead of a homebrew loop.
5633 2023-09-09 Xi Ruoyao <xry111@xry111.site>
5635 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
5636 Define to the maximum amount of bytes able to be loaded or
5637 stored with one machine instruction.
5638 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
5639 New static function.
5640 (loongarch_block_move_straight): Call
5641 loongarch_mode_for_move_size for machine_mode to be moved.
5642 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
5643 instead of UNITS_PER_WORD.
5645 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5647 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
5649 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
5651 * fold-const.cc (can_min_p): New function.
5652 (poly_int_binop): Try fold MIN_EXPR.
5654 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
5656 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
5657 case VREL_EQ nor call frelop_early_resolve.
5659 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5661 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
5663 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
5664 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
5666 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5668 * config/riscv/thead.md: Use more appropriate mode attributes
5671 2023-09-08 Guo Jie <guojie@loongson.cn>
5673 * common/config/loongarch/loongarch-common.cc:
5674 (default_options loongarch_option_optimization_table):
5675 Default to -fsched-pressure.
5677 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
5679 * config.gcc: remove non-POSIX syntax "<<<".
5681 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5683 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
5684 Rename postfix to _bitmanip.
5685 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
5686 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
5688 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5690 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
5692 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5694 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
5696 2023-09-07 liuhongt <hongtao.liu@intel.com>
5698 * config/i386/sse.md
5699 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
5700 (VHFBF_AVX512VL): New mode iterator.
5701 (VI2HFBF_AVX512VL): New mode iterator.
5703 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
5705 * value-range.h (contains_zero_p): Return false for undefined ranges.
5706 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
5707 contains_zero_p change above.
5708 (operator_ge::op1_op2_relation): Same.
5709 (operator_equal::op1_op2_relation): Same.
5710 (operator_not_equal::op1_op2_relation): Same.
5711 (operator_lt::op1_op2_relation): Same.
5712 (operator_le::op1_op2_relation): Same.
5713 (operator_ge::op1_op2_relation): Same.
5714 * range-op.cc (operator_equal::op1_op2_relation): Same.
5715 (operator_not_equal::op1_op2_relation): Same.
5716 (operator_lt::op1_op2_relation): Same.
5717 (operator_le::op1_op2_relation): Same.
5718 (operator_cast::op1_range): Same.
5719 (set_nonzero_range_from_mask): Same.
5720 (operator_bitwise_xor::op1_range): Same.
5721 (operator_addr_expr::fold_range): Same.
5722 (operator_addr_expr::op1_range): Same.
5724 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
5726 PR tree-optimization/110875
5727 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
5728 cache-prefilling routine when the ssa-name has no global value.
5730 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
5733 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
5734 (process_alt_operands): Set up the flag. Clear flag for chosen
5735 alternative with special memory constraints.
5736 (process_alt_operands): Set up used insn alternative depending on the flag.
5738 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5740 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
5741 * config/riscv/riscv.md: Ditto.
5742 * config/riscv/vector-iterators.md: Ditto.
5743 * config/riscv/vector.md: Ditto.
5745 2023-09-07 David Malcolm <dmalcolm@redhat.com>
5747 * diagnostic-core.h (error_meta): New decl.
5748 * diagnostic.cc (error_meta): New.
5750 2023-09-07 Jakub Jelinek <jakub@redhat.com>
5753 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
5754 inside gcc_assert, as later code relies on it filling info variable.
5755 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
5756 clear_padding_type): Likewise.
5757 * varasm.cc (output_constant): Likewise.
5758 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
5759 * stor-layout.cc (finish_bitfield_representative, layout_type):
5761 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
5763 2023-09-07 Xi Ruoyao <xry111@xry111.site>
5766 * config/loongarch/loongarch-protos.h
5767 (loongarch_pre_reload_split): Declare new function.
5768 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
5769 * config/loongarch/loongarch.cc
5770 (loongarch_pre_reload_split): Implement.
5771 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
5772 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
5774 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
5775 New define_insn_and_split.
5776 (bstrins_<mode>_for_ior_mask): Likewise.
5777 (define_peephole2): Further optimize code sequence produced by
5778 bstrins_<mode>_for_ior_mask if possible.
5780 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
5782 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
5783 rather than gen_rtx_PLUS.
5785 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5788 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
5789 (pass_vsetvl::df_post_optimization): Remove incorrect function.
5791 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
5793 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
5794 Parse 'XVentanaCondOps' extension.
5795 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
5796 (TARGET_XVENTANACONDOPS): Ditto.
5797 (TARGET_ZICOND_LIKE): New to represent targets with conditional
5798 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
5799 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
5800 with TARGET_ZICOND_LIKE.
5801 (riscv_expand_conditional_move): Ditto.
5802 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
5804 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
5805 * config/riscv/zicond.md: Modify description.
5806 (eqz_ventana): New to match corresponding czero instructions.
5807 (nez_ventana): Ditto.
5808 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
5809 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
5810 (*czero.<eqz>.<GPR><X>): Ditto.
5811 (*czero.eqz.<GPR><X>.opt1): Ditto.
5812 (*czero.nez.<GPR><X>.opt2): Ditto.
5814 2023-09-06 Ian Lance Taylor <iant@golang.org>
5817 * godump.cc (go_format_type): Handle BITINT_TYPE.
5819 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5822 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
5825 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5828 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
5829 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
5830 rather than make_edge, initialize bb->count.
5832 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5835 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
5836 Document general rules for _BitInt support library functions
5837 and document __mulbitint3 and __divmodbitint4.
5838 (Conversion functions): Document __fix{s,d,x,t}fbitint,
5839 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
5840 __bid_floatbitint{s,d,t}d.
5842 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5845 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
5848 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5851 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
5852 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
5853 check if all padding bits up to mode precision are zeros or sign
5854 bit copies and if not, jump to DO_ERROR.
5855 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
5856 Adjust expand_ubsan_result_store callers.
5857 * ubsan.cc: Include target.h and langhooks.h.
5858 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
5859 size converted to pointer sized integer, pass BITINT_TYPE values
5860 which fit into TImode (if supported) or DImode as those integer types
5861 or otherwise for now punt (pass 0).
5862 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
5863 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
5864 TImode/DImode precision rather than TK_Unknown used otherwise for
5865 large/huge BITINT_TYPEs.
5866 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
5867 they don't have mode precision.
5868 * ubsan.h (enum ubsan_print_style): New enumerator.
5870 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5873 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
5874 (ix86_bitint_type_info): New function.
5875 (TARGET_C_BITINT_TYPE_INFO): Redefine.
5877 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5880 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
5881 * passes.def: Add pass_lower_bitint after pass_lower_complex and
5882 pass_lower_bitint_O0 after pass_lower_complex_O0.
5883 * tree-pass.h (PROP_gimple_lbitint): Define.
5884 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
5885 * gimple-lower-bitint.h: New file.
5886 * tree-ssa-live.h (struct _var_map): Add bitint member.
5887 (init_var_map): Adjust declaration.
5888 (region_contains_p): Handle map->bitint like map->outofssa_p.
5889 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
5890 map->bitint and set map->outofssa_p to false if it is non-NULL.
5891 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
5892 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
5894 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
5895 not in that bitmap, and allow res without default def.
5896 (compute_optimized_partition_bases): In map->bitint mode try hard to
5897 coalesce any SSA_NAMEs with the same size.
5898 (coalesce_bitint): New function.
5899 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
5900 used_in_copies and call coalesce_bitint.
5901 * gimple-lower-bitint.cc: New file.
5903 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5906 * tree.def (BITINT_TYPE): New type.
5907 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
5908 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
5910 (BITINT_TYPE_P): Define.
5911 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
5912 they have BITINT_TYPE type.
5913 (tree_check6, tree_not_check6): New inline functions.
5914 (any_integral_type_check): Include BITINT_TYPE.
5915 (build_bitint_type): Declare.
5916 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
5917 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
5918 type_hash_canon): Handle BITINT_TYPE.
5919 (bitint_type_cache): New variable.
5920 (build_bitint_type): New function.
5921 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
5923 (tree_cc_finalize): Free bitint_type_cache.
5924 * builtins.cc (type_to_class): Handle BITINT_TYPE.
5925 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
5926 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
5928 * convert.cc (convert_to_pointer_1, convert_to_real_1,
5929 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
5930 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
5931 GET_MODE_PRECISION (TYPE_MODE (type)).
5932 * doc/generic.texi (BITINT_TYPE): Document.
5933 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
5934 * doc/tm.texi: Regenerated.
5935 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
5936 gen_type_die_with_usage): Handle BITINT_TYPE.
5937 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
5938 handle those which fit into shwi.
5939 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
5940 to bitfield precision reads from BITINT_TYPE vars, parameters or
5941 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
5943 * fold-const.cc (fold_convert_loc, make_range_step): Handle
5945 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
5946 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
5947 (native_encode_int, native_interpret_int, native_interpret_expr):
5949 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
5950 to some other integral type or vice versa conversions non-useless.
5951 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
5952 (clear_padding_unit): Mention in comment that _BitInt types don't need
5954 (clear_padding_bitint_needs_padding_p): New function.
5955 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
5956 (clear_padding_type): Likewise.
5957 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
5958 precision operands force pos_neg? to 1.
5959 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
5960 expand_BITINTTOFLOAT): New functions.
5961 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
5962 BITINTTOFLOAT): New internal functions.
5963 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
5964 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
5965 * match.pd (non-equality compare simplifications from fold_binary):
5966 Punt if TYPE_MODE (arg1_type) is BLKmode.
5967 * pretty-print.h (pp_wide_int): Handle printing of large precision
5968 wide_ints which would buffer overflow digit_buffer.
5969 * stor-layout.cc (finish_bitfield_representative): For bit-fields
5970 with BITINT_TYPE, prefer representatives with precisions in
5971 multiple of limb precision.
5972 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
5973 element type and assert it is BITINT_TYPE.
5974 * target.def (bitint_type_info): New C target hook.
5975 * target.h (struct bitint_info): New type.
5976 * targhooks.cc (default_bitint_type_info): New function.
5977 * targhooks.h (default_bitint_type_info): Declare.
5978 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
5979 Handle printing large wide_ints which would buffer overflow
5981 * tree-ssa-sccvn.cc: Include target.h.
5982 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
5984 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
5985 64-bit BITINT_TYPE subtract low bound from expression and cast to
5986 64-bit integer type both the controlling expression and case labels.
5987 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
5988 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
5989 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
5991 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
5992 unsigned_type_for rather than build_nonstandard_integer_type.
5994 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5997 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
5998 tieable for RVV modes.
6000 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6003 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
6005 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6007 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
6009 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
6011 * config/xtensa/xtensa.cc (xtensa_expand_scc):
6012 Add code for particular constants (only 0 and INT_MIN for now)
6013 for EQ/NE boolean evaluation in SImode.
6014 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
6015 implementation has been integrated into the above.
6017 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
6020 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
6022 (*pred_widen_mulsu<mode>): Delete.
6023 (*pred_single_widen_mul<mode>): Delete.
6024 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
6025 Add new combine patterns.
6026 (*single_widen_sub<any_extend:su><mode>): Ditto.
6027 (*single_widen_add<any_extend:su><mode>): Ditto.
6028 (*single_widen_mult<any_extend:su><mode>): Ditto.
6029 (*dual_widen_mulsu<mode>): Ditto.
6030 (*dual_widen_mulus<mode>): Ditto.
6031 (*dual_widen_<optab><mode>): Ditto.
6032 (*single_widen_add<mode>): Ditto.
6033 (*single_widen_sub<mode>): Ditto.
6034 (*single_widen_mult<mode>): Ditto.
6035 * config/riscv/autovec.md (<optab><mode>3):
6036 Change define_expand to define_insn_and_split.
6037 (<optab><mode>2): Ditto.
6038 (abs<mode>2): Ditto.
6039 (smul<mode>3_highpart): Ditto.
6040 (umul<mode>3_highpart): Ditto.
6042 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
6044 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
6045 (riscv_asm_output_alias): Ditto.
6046 (riscv_asm_output_external): Ditto.
6047 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
6048 Output .variant_cc directive for vector function.
6049 (riscv_declare_function_name): Ditto.
6050 (riscv_asm_output_alias): Ditto.
6051 (riscv_asm_output_external): Ditto.
6052 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
6053 Implement ASM_DECLARE_FUNCTION_NAME.
6054 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
6055 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
6057 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
6059 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
6060 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
6061 (riscv_frame_info::reset): Reset new fileds.
6062 (riscv_call_tls_get_addr): Pass riscv_cc.
6063 (riscv_function_arg): Return riscv_cc for call patterm.
6064 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
6065 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
6066 (riscv_save_reg_p): Add vector callee-saved check.
6067 (riscv_stack_align): Add vector save area comment.
6068 (riscv_compute_frame_info): Ditto.
6069 (riscv_restore_reg): Update for type change.
6070 (riscv_for_each_saved_v_reg): New function save vector registers.
6071 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
6072 (riscv_expand_prologue): Ditto.
6073 (riscv_expand_epilogue): Ditto.
6074 (riscv_output_mi_thunk): Pass riscv_cc.
6075 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
6076 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
6077 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
6079 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
6081 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
6082 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
6083 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
6084 (riscv_init_cumulative_args): Setup variant_cc field.
6085 (riscv_vector_type_p): New function for checking vector type.
6086 (riscv_hard_regno_nregs): Hoist declare.
6087 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
6088 (riscv_get_arg_info): Support vector cc.
6089 (riscv_function_arg_advance): Update cum.
6090 (riscv_pass_by_reference): Handle vector args.
6091 (riscv_v_abi): New function return vector abi.
6092 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
6093 (riscv_arguments_is_vector_type_p): New function for check vector returns.
6094 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
6095 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
6096 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
6097 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
6098 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
6099 (V_ARG_FIRST): Ditto.
6100 (V_ARG_LAST): Ditto.
6101 (enum riscv_cc): Define all RISCV_CC variants.
6102 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
6104 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
6106 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
6107 Add sqrt + vcond_mask combine pattern.
6108 * config/riscv/autovec.md (<optab><mode>2):
6109 Change define_expand to define_insn_and_split.
6111 2023-09-06 Jason Merrill <jason@redhat.com>
6113 * common.opt: Update -fabi-version=19.
6115 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
6117 * config/riscv/zicond.md: Add closing parent to a comment.
6119 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
6121 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
6122 large constant cons/alt into a register.
6124 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
6126 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
6127 require one zero bit in the upper 32 bits for LI+RORI synthesis.
6129 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
6131 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
6133 2023-09-05 Andrew Pinski <apinski@marvell.com>
6135 PR tree-optimization/98710
6136 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
6137 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
6139 2023-09-05 Andrew Pinski <apinski@marvell.com>
6141 PR tree-optimization/103536
6142 * match.pd (`(x | y) & (x & z)`,
6143 `(x & y) | (x | z)`): New patterns.
6145 2023-09-05 Andrew Pinski <apinski@marvell.com>
6147 PR tree-optimization/107137
6148 * match.pd (`(nop_convert)-(convert)a`): New pattern.
6150 2023-09-05 Andrew Pinski <apinski@marvell.com>
6152 PR tree-optimization/96694
6153 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
6155 2023-09-05 Andrew Pinski <apinski@marvell.com>
6157 PR tree-optimization/105832
6158 * match.pd (`(1 >> X) != 0`): New pattern
6160 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
6162 * config/riscv/riscv.md: Update/Add types
6164 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
6166 * config/riscv/pic.md: Update types
6168 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
6170 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
6171 synthesis with rotate-right for XTheadBb.
6173 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
6175 * config/riscv/zicond.md: Fix op2 pattern.
6177 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
6179 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
6181 2023-09-05 Xi Ruoyao <xry111@xry111.site>
6183 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
6184 Define to 0 if not defined yet.
6186 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
6188 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
6189 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
6191 2023-09-05 Pan Li <pan2.li@intel.com>
6193 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
6194 * config/riscv/vector.md: Extend iterator for VLS.
6196 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6198 * config.gcc: Export the header file lasxintrin.h.
6199 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
6200 Add Loongson ASX builtin functions support.
6202 (LASX_BUILTIN): Ditto.
6203 (LASX_NO_TARGET_BUILTIN): Ditto.
6204 (LASX_BUILTIN_TEST_BRANCH): Ditto.
6205 (CODE_FOR_lasx_xvsadd_b): Ditto.
6206 (CODE_FOR_lasx_xvsadd_h): Ditto.
6207 (CODE_FOR_lasx_xvsadd_w): Ditto.
6208 (CODE_FOR_lasx_xvsadd_d): Ditto.
6209 (CODE_FOR_lasx_xvsadd_bu): Ditto.
6210 (CODE_FOR_lasx_xvsadd_hu): Ditto.
6211 (CODE_FOR_lasx_xvsadd_wu): Ditto.
6212 (CODE_FOR_lasx_xvsadd_du): Ditto.
6213 (CODE_FOR_lasx_xvadd_b): Ditto.
6214 (CODE_FOR_lasx_xvadd_h): Ditto.
6215 (CODE_FOR_lasx_xvadd_w): Ditto.
6216 (CODE_FOR_lasx_xvadd_d): Ditto.
6217 (CODE_FOR_lasx_xvaddi_bu): Ditto.
6218 (CODE_FOR_lasx_xvaddi_hu): Ditto.
6219 (CODE_FOR_lasx_xvaddi_wu): Ditto.
6220 (CODE_FOR_lasx_xvaddi_du): Ditto.
6221 (CODE_FOR_lasx_xvand_v): Ditto.
6222 (CODE_FOR_lasx_xvandi_b): Ditto.
6223 (CODE_FOR_lasx_xvbitsel_v): Ditto.
6224 (CODE_FOR_lasx_xvseqi_b): Ditto.
6225 (CODE_FOR_lasx_xvseqi_h): Ditto.
6226 (CODE_FOR_lasx_xvseqi_w): Ditto.
6227 (CODE_FOR_lasx_xvseqi_d): Ditto.
6228 (CODE_FOR_lasx_xvslti_b): Ditto.
6229 (CODE_FOR_lasx_xvslti_h): Ditto.
6230 (CODE_FOR_lasx_xvslti_w): Ditto.
6231 (CODE_FOR_lasx_xvslti_d): Ditto.
6232 (CODE_FOR_lasx_xvslti_bu): Ditto.
6233 (CODE_FOR_lasx_xvslti_hu): Ditto.
6234 (CODE_FOR_lasx_xvslti_wu): Ditto.
6235 (CODE_FOR_lasx_xvslti_du): Ditto.
6236 (CODE_FOR_lasx_xvslei_b): Ditto.
6237 (CODE_FOR_lasx_xvslei_h): Ditto.
6238 (CODE_FOR_lasx_xvslei_w): Ditto.
6239 (CODE_FOR_lasx_xvslei_d): Ditto.
6240 (CODE_FOR_lasx_xvslei_bu): Ditto.
6241 (CODE_FOR_lasx_xvslei_hu): Ditto.
6242 (CODE_FOR_lasx_xvslei_wu): Ditto.
6243 (CODE_FOR_lasx_xvslei_du): Ditto.
6244 (CODE_FOR_lasx_xvdiv_b): Ditto.
6245 (CODE_FOR_lasx_xvdiv_h): Ditto.
6246 (CODE_FOR_lasx_xvdiv_w): Ditto.
6247 (CODE_FOR_lasx_xvdiv_d): Ditto.
6248 (CODE_FOR_lasx_xvdiv_bu): Ditto.
6249 (CODE_FOR_lasx_xvdiv_hu): Ditto.
6250 (CODE_FOR_lasx_xvdiv_wu): Ditto.
6251 (CODE_FOR_lasx_xvdiv_du): Ditto.
6252 (CODE_FOR_lasx_xvfadd_s): Ditto.
6253 (CODE_FOR_lasx_xvfadd_d): Ditto.
6254 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
6255 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
6256 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
6257 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
6258 (CODE_FOR_lasx_xvffint_s_w): Ditto.
6259 (CODE_FOR_lasx_xvffint_d_l): Ditto.
6260 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
6261 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
6262 (CODE_FOR_lasx_xvfsub_s): Ditto.
6263 (CODE_FOR_lasx_xvfsub_d): Ditto.
6264 (CODE_FOR_lasx_xvfmul_s): Ditto.
6265 (CODE_FOR_lasx_xvfmul_d): Ditto.
6266 (CODE_FOR_lasx_xvfdiv_s): Ditto.
6267 (CODE_FOR_lasx_xvfdiv_d): Ditto.
6268 (CODE_FOR_lasx_xvfmax_s): Ditto.
6269 (CODE_FOR_lasx_xvfmax_d): Ditto.
6270 (CODE_FOR_lasx_xvfmin_s): Ditto.
6271 (CODE_FOR_lasx_xvfmin_d): Ditto.
6272 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
6273 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
6274 (CODE_FOR_lasx_xvflogb_s): Ditto.
6275 (CODE_FOR_lasx_xvflogb_d): Ditto.
6276 (CODE_FOR_lasx_xvmax_b): Ditto.
6277 (CODE_FOR_lasx_xvmax_h): Ditto.
6278 (CODE_FOR_lasx_xvmax_w): Ditto.
6279 (CODE_FOR_lasx_xvmax_d): Ditto.
6280 (CODE_FOR_lasx_xvmaxi_b): Ditto.
6281 (CODE_FOR_lasx_xvmaxi_h): Ditto.
6282 (CODE_FOR_lasx_xvmaxi_w): Ditto.
6283 (CODE_FOR_lasx_xvmaxi_d): Ditto.
6284 (CODE_FOR_lasx_xvmax_bu): Ditto.
6285 (CODE_FOR_lasx_xvmax_hu): Ditto.
6286 (CODE_FOR_lasx_xvmax_wu): Ditto.
6287 (CODE_FOR_lasx_xvmax_du): Ditto.
6288 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
6289 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
6290 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
6291 (CODE_FOR_lasx_xvmaxi_du): Ditto.
6292 (CODE_FOR_lasx_xvmin_b): Ditto.
6293 (CODE_FOR_lasx_xvmin_h): Ditto.
6294 (CODE_FOR_lasx_xvmin_w): Ditto.
6295 (CODE_FOR_lasx_xvmin_d): Ditto.
6296 (CODE_FOR_lasx_xvmini_b): Ditto.
6297 (CODE_FOR_lasx_xvmini_h): Ditto.
6298 (CODE_FOR_lasx_xvmini_w): Ditto.
6299 (CODE_FOR_lasx_xvmini_d): Ditto.
6300 (CODE_FOR_lasx_xvmin_bu): Ditto.
6301 (CODE_FOR_lasx_xvmin_hu): Ditto.
6302 (CODE_FOR_lasx_xvmin_wu): Ditto.
6303 (CODE_FOR_lasx_xvmin_du): Ditto.
6304 (CODE_FOR_lasx_xvmini_bu): Ditto.
6305 (CODE_FOR_lasx_xvmini_hu): Ditto.
6306 (CODE_FOR_lasx_xvmini_wu): Ditto.
6307 (CODE_FOR_lasx_xvmini_du): Ditto.
6308 (CODE_FOR_lasx_xvmod_b): Ditto.
6309 (CODE_FOR_lasx_xvmod_h): Ditto.
6310 (CODE_FOR_lasx_xvmod_w): Ditto.
6311 (CODE_FOR_lasx_xvmod_d): Ditto.
6312 (CODE_FOR_lasx_xvmod_bu): Ditto.
6313 (CODE_FOR_lasx_xvmod_hu): Ditto.
6314 (CODE_FOR_lasx_xvmod_wu): Ditto.
6315 (CODE_FOR_lasx_xvmod_du): Ditto.
6316 (CODE_FOR_lasx_xvmul_b): Ditto.
6317 (CODE_FOR_lasx_xvmul_h): Ditto.
6318 (CODE_FOR_lasx_xvmul_w): Ditto.
6319 (CODE_FOR_lasx_xvmul_d): Ditto.
6320 (CODE_FOR_lasx_xvclz_b): Ditto.
6321 (CODE_FOR_lasx_xvclz_h): Ditto.
6322 (CODE_FOR_lasx_xvclz_w): Ditto.
6323 (CODE_FOR_lasx_xvclz_d): Ditto.
6324 (CODE_FOR_lasx_xvnor_v): Ditto.
6325 (CODE_FOR_lasx_xvor_v): Ditto.
6326 (CODE_FOR_lasx_xvori_b): Ditto.
6327 (CODE_FOR_lasx_xvnori_b): Ditto.
6328 (CODE_FOR_lasx_xvpcnt_b): Ditto.
6329 (CODE_FOR_lasx_xvpcnt_h): Ditto.
6330 (CODE_FOR_lasx_xvpcnt_w): Ditto.
6331 (CODE_FOR_lasx_xvpcnt_d): Ditto.
6332 (CODE_FOR_lasx_xvxor_v): Ditto.
6333 (CODE_FOR_lasx_xvxori_b): Ditto.
6334 (CODE_FOR_lasx_xvsll_b): Ditto.
6335 (CODE_FOR_lasx_xvsll_h): Ditto.
6336 (CODE_FOR_lasx_xvsll_w): Ditto.
6337 (CODE_FOR_lasx_xvsll_d): Ditto.
6338 (CODE_FOR_lasx_xvslli_b): Ditto.
6339 (CODE_FOR_lasx_xvslli_h): Ditto.
6340 (CODE_FOR_lasx_xvslli_w): Ditto.
6341 (CODE_FOR_lasx_xvslli_d): Ditto.
6342 (CODE_FOR_lasx_xvsra_b): Ditto.
6343 (CODE_FOR_lasx_xvsra_h): Ditto.
6344 (CODE_FOR_lasx_xvsra_w): Ditto.
6345 (CODE_FOR_lasx_xvsra_d): Ditto.
6346 (CODE_FOR_lasx_xvsrai_b): Ditto.
6347 (CODE_FOR_lasx_xvsrai_h): Ditto.
6348 (CODE_FOR_lasx_xvsrai_w): Ditto.
6349 (CODE_FOR_lasx_xvsrai_d): Ditto.
6350 (CODE_FOR_lasx_xvsrl_b): Ditto.
6351 (CODE_FOR_lasx_xvsrl_h): Ditto.
6352 (CODE_FOR_lasx_xvsrl_w): Ditto.
6353 (CODE_FOR_lasx_xvsrl_d): Ditto.
6354 (CODE_FOR_lasx_xvsrli_b): Ditto.
6355 (CODE_FOR_lasx_xvsrli_h): Ditto.
6356 (CODE_FOR_lasx_xvsrli_w): Ditto.
6357 (CODE_FOR_lasx_xvsrli_d): Ditto.
6358 (CODE_FOR_lasx_xvsub_b): Ditto.
6359 (CODE_FOR_lasx_xvsub_h): Ditto.
6360 (CODE_FOR_lasx_xvsub_w): Ditto.
6361 (CODE_FOR_lasx_xvsub_d): Ditto.
6362 (CODE_FOR_lasx_xvsubi_bu): Ditto.
6363 (CODE_FOR_lasx_xvsubi_hu): Ditto.
6364 (CODE_FOR_lasx_xvsubi_wu): Ditto.
6365 (CODE_FOR_lasx_xvsubi_du): Ditto.
6366 (CODE_FOR_lasx_xvpackod_d): Ditto.
6367 (CODE_FOR_lasx_xvpackev_d): Ditto.
6368 (CODE_FOR_lasx_xvpickod_d): Ditto.
6369 (CODE_FOR_lasx_xvpickev_d): Ditto.
6370 (CODE_FOR_lasx_xvrepli_b): Ditto.
6371 (CODE_FOR_lasx_xvrepli_h): Ditto.
6372 (CODE_FOR_lasx_xvrepli_w): Ditto.
6373 (CODE_FOR_lasx_xvrepli_d): Ditto.
6374 (CODE_FOR_lasx_xvandn_v): Ditto.
6375 (CODE_FOR_lasx_xvorn_v): Ditto.
6376 (CODE_FOR_lasx_xvneg_b): Ditto.
6377 (CODE_FOR_lasx_xvneg_h): Ditto.
6378 (CODE_FOR_lasx_xvneg_w): Ditto.
6379 (CODE_FOR_lasx_xvneg_d): Ditto.
6380 (CODE_FOR_lasx_xvbsrl_v): Ditto.
6381 (CODE_FOR_lasx_xvbsll_v): Ditto.
6382 (CODE_FOR_lasx_xvfmadd_s): Ditto.
6383 (CODE_FOR_lasx_xvfmadd_d): Ditto.
6384 (CODE_FOR_lasx_xvfmsub_s): Ditto.
6385 (CODE_FOR_lasx_xvfmsub_d): Ditto.
6386 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
6387 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
6388 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
6389 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
6390 (CODE_FOR_lasx_xvpermi_q): Ditto.
6391 (CODE_FOR_lasx_xvpermi_d): Ditto.
6392 (CODE_FOR_lasx_xbnz_v): Ditto.
6393 (CODE_FOR_lasx_xbz_v): Ditto.
6394 (CODE_FOR_lasx_xvssub_b): Ditto.
6395 (CODE_FOR_lasx_xvssub_h): Ditto.
6396 (CODE_FOR_lasx_xvssub_w): Ditto.
6397 (CODE_FOR_lasx_xvssub_d): Ditto.
6398 (CODE_FOR_lasx_xvssub_bu): Ditto.
6399 (CODE_FOR_lasx_xvssub_hu): Ditto.
6400 (CODE_FOR_lasx_xvssub_wu): Ditto.
6401 (CODE_FOR_lasx_xvssub_du): Ditto.
6402 (CODE_FOR_lasx_xvabsd_b): Ditto.
6403 (CODE_FOR_lasx_xvabsd_h): Ditto.
6404 (CODE_FOR_lasx_xvabsd_w): Ditto.
6405 (CODE_FOR_lasx_xvabsd_d): Ditto.
6406 (CODE_FOR_lasx_xvabsd_bu): Ditto.
6407 (CODE_FOR_lasx_xvabsd_hu): Ditto.
6408 (CODE_FOR_lasx_xvabsd_wu): Ditto.
6409 (CODE_FOR_lasx_xvabsd_du): Ditto.
6410 (CODE_FOR_lasx_xvavg_b): Ditto.
6411 (CODE_FOR_lasx_xvavg_h): Ditto.
6412 (CODE_FOR_lasx_xvavg_w): Ditto.
6413 (CODE_FOR_lasx_xvavg_d): Ditto.
6414 (CODE_FOR_lasx_xvavg_bu): Ditto.
6415 (CODE_FOR_lasx_xvavg_hu): Ditto.
6416 (CODE_FOR_lasx_xvavg_wu): Ditto.
6417 (CODE_FOR_lasx_xvavg_du): Ditto.
6418 (CODE_FOR_lasx_xvavgr_b): Ditto.
6419 (CODE_FOR_lasx_xvavgr_h): Ditto.
6420 (CODE_FOR_lasx_xvavgr_w): Ditto.
6421 (CODE_FOR_lasx_xvavgr_d): Ditto.
6422 (CODE_FOR_lasx_xvavgr_bu): Ditto.
6423 (CODE_FOR_lasx_xvavgr_hu): Ditto.
6424 (CODE_FOR_lasx_xvavgr_wu): Ditto.
6425 (CODE_FOR_lasx_xvavgr_du): Ditto.
6426 (CODE_FOR_lasx_xvmuh_b): Ditto.
6427 (CODE_FOR_lasx_xvmuh_h): Ditto.
6428 (CODE_FOR_lasx_xvmuh_w): Ditto.
6429 (CODE_FOR_lasx_xvmuh_d): Ditto.
6430 (CODE_FOR_lasx_xvmuh_bu): Ditto.
6431 (CODE_FOR_lasx_xvmuh_hu): Ditto.
6432 (CODE_FOR_lasx_xvmuh_wu): Ditto.
6433 (CODE_FOR_lasx_xvmuh_du): Ditto.
6434 (CODE_FOR_lasx_xvssran_b_h): Ditto.
6435 (CODE_FOR_lasx_xvssran_h_w): Ditto.
6436 (CODE_FOR_lasx_xvssran_w_d): Ditto.
6437 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
6438 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
6439 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
6440 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
6441 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
6442 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
6443 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
6444 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
6445 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
6446 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
6447 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
6448 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
6449 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
6450 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
6451 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
6452 (CODE_FOR_lasx_xvftint_w_s): Ditto.
6453 (CODE_FOR_lasx_xvftint_l_d): Ditto.
6454 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
6455 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
6456 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
6457 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
6458 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
6459 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
6460 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
6461 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
6462 (CODE_FOR_lasx_xvsat_b): Ditto.
6463 (CODE_FOR_lasx_xvsat_h): Ditto.
6464 (CODE_FOR_lasx_xvsat_w): Ditto.
6465 (CODE_FOR_lasx_xvsat_d): Ditto.
6466 (CODE_FOR_lasx_xvsat_bu): Ditto.
6467 (CODE_FOR_lasx_xvsat_hu): Ditto.
6468 (CODE_FOR_lasx_xvsat_wu): Ditto.
6469 (CODE_FOR_lasx_xvsat_du): Ditto.
6470 (loongarch_builtin_vectorized_function): Ditto.
6471 (loongarch_expand_builtin_insn): Ditto.
6472 (loongarch_expand_builtin): Ditto.
6473 * config/loongarch/loongarch-ftypes.def (1): Ditto.
6477 * config/loongarch/lasxintrin.h: New file.
6479 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6481 * config/loongarch/loongarch-modes.def
6482 (VECTOR_MODES): Add Loongson ASX instruction support.
6483 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
6484 (loongarch_split_256bit_move_p): Ditto.
6485 (loongarch_expand_vector_group_init): Ditto.
6486 (loongarch_expand_vec_perm_1): Ditto.
6487 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
6488 (loongarch_valid_offset_p): Ditto.
6489 (loongarch_address_insns): Ditto.
6490 (loongarch_const_insns): Ditto.
6491 (loongarch_legitimize_move): Ditto.
6492 (loongarch_builtin_vectorization_cost): Ditto.
6493 (loongarch_split_move_p): Ditto.
6494 (loongarch_split_move): Ditto.
6495 (loongarch_output_move_index_float): Ditto.
6496 (loongarch_split_256bit_move_p): Ditto.
6497 (loongarch_split_256bit_move): Ditto.
6498 (loongarch_output_move): Ditto.
6499 (loongarch_print_operand_reloc): Ditto.
6500 (loongarch_print_operand): Ditto.
6501 (loongarch_hard_regno_mode_ok_uncached): Ditto.
6502 (loongarch_hard_regno_nregs): Ditto.
6503 (loongarch_class_max_nregs): Ditto.
6504 (loongarch_can_change_mode_class): Ditto.
6505 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
6506 (loongarch_vector_mode_supported_p): Ditto.
6507 (loongarch_preferred_simd_mode): Ditto.
6508 (loongarch_autovectorize_vector_modes): Ditto.
6509 (loongarch_lsx_output_division): Ditto.
6510 (loongarch_expand_lsx_shuffle): Ditto.
6511 (loongarch_expand_vec_perm): Ditto.
6512 (loongarch_expand_vec_perm_interleave): Ditto.
6513 (loongarch_try_expand_lsx_vshuf_const): Ditto.
6514 (loongarch_expand_vec_perm_even_odd_1): Ditto.
6515 (loongarch_expand_vec_perm_even_odd): Ditto.
6516 (loongarch_expand_vec_perm_1): Ditto.
6517 (loongarch_expand_vec_perm_const_2): Ditto.
6518 (loongarch_is_quad_duplicate): Ditto.
6519 (loongarch_is_double_duplicate): Ditto.
6520 (loongarch_is_odd_extraction): Ditto.
6521 (loongarch_is_even_extraction): Ditto.
6522 (loongarch_is_extraction_permutation): Ditto.
6523 (loongarch_is_center_extraction): Ditto.
6524 (loongarch_is_reversing_permutation): Ditto.
6525 (loongarch_is_di_misalign_extract): Ditto.
6526 (loongarch_is_si_misalign_extract): Ditto.
6527 (loongarch_is_lasx_lowpart_interleave): Ditto.
6528 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
6529 (COMPARE_SELECTOR): Ditto.
6530 (loongarch_is_lasx_lowpart_extract): Ditto.
6531 (loongarch_is_lasx_highpart_interleave): Ditto.
6532 (loongarch_is_lasx_highpart_interleave_2): Ditto.
6533 (loongarch_is_elem_duplicate): Ditto.
6534 (loongarch_is_op_reverse_perm): Ditto.
6535 (loongarch_is_single_op_perm): Ditto.
6536 (loongarch_is_divisible_perm): Ditto.
6537 (loongarch_is_triple_stride_extract): Ditto.
6538 (loongarch_vectorize_vec_perm_const): Ditto.
6539 (loongarch_cpu_sched_reassociation_width): Ditto.
6540 (loongarch_expand_vector_extract): Ditto.
6541 (emit_reduc_half): Ditto.
6542 (loongarch_expand_vec_unpack): Ditto.
6543 (loongarch_expand_vector_group_init): Ditto.
6544 (loongarch_expand_vector_init): Ditto.
6545 (loongarch_expand_lsx_cmp): Ditto.
6546 (loongarch_builtin_support_vector_misalignment): Ditto.
6547 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
6548 (BITS_PER_LASX_REG): Ditto.
6549 (STRUCTURE_SIZE_BOUNDARY): Ditto.
6550 (LASX_REG_FIRST): Ditto.
6551 (LASX_REG_LAST): Ditto.
6552 (LASX_REG_NUM): Ditto.
6553 (LASX_REG_P): Ditto.
6554 (LASX_REG_RTX_P): Ditto.
6555 (LASX_SUPPORTED_MODE_P): Ditto.
6556 * config/loongarch/loongarch.md: Ditto.
6557 * config/loongarch/lasx.md: New file.
6559 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6561 * config.gcc: Export the header file lsxintrin.h.
6562 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
6563 (enum loongarch_builtin_type): Ditto.
6565 (LARCH_BUILTIN): Ditto.
6566 (LSX_BUILTIN): Ditto.
6567 (LSX_BUILTIN_TEST_BRANCH): Ditto.
6568 (LSX_NO_TARGET_BUILTIN): Ditto.
6569 (CODE_FOR_lsx_vsadd_b): Ditto.
6570 (CODE_FOR_lsx_vsadd_h): Ditto.
6571 (CODE_FOR_lsx_vsadd_w): Ditto.
6572 (CODE_FOR_lsx_vsadd_d): Ditto.
6573 (CODE_FOR_lsx_vsadd_bu): Ditto.
6574 (CODE_FOR_lsx_vsadd_hu): Ditto.
6575 (CODE_FOR_lsx_vsadd_wu): Ditto.
6576 (CODE_FOR_lsx_vsadd_du): Ditto.
6577 (CODE_FOR_lsx_vadd_b): Ditto.
6578 (CODE_FOR_lsx_vadd_h): Ditto.
6579 (CODE_FOR_lsx_vadd_w): Ditto.
6580 (CODE_FOR_lsx_vadd_d): Ditto.
6581 (CODE_FOR_lsx_vaddi_bu): Ditto.
6582 (CODE_FOR_lsx_vaddi_hu): Ditto.
6583 (CODE_FOR_lsx_vaddi_wu): Ditto.
6584 (CODE_FOR_lsx_vaddi_du): Ditto.
6585 (CODE_FOR_lsx_vand_v): Ditto.
6586 (CODE_FOR_lsx_vandi_b): Ditto.
6587 (CODE_FOR_lsx_bnz_v): Ditto.
6588 (CODE_FOR_lsx_bz_v): Ditto.
6589 (CODE_FOR_lsx_vbitsel_v): Ditto.
6590 (CODE_FOR_lsx_vseqi_b): Ditto.
6591 (CODE_FOR_lsx_vseqi_h): Ditto.
6592 (CODE_FOR_lsx_vseqi_w): Ditto.
6593 (CODE_FOR_lsx_vseqi_d): Ditto.
6594 (CODE_FOR_lsx_vslti_b): Ditto.
6595 (CODE_FOR_lsx_vslti_h): Ditto.
6596 (CODE_FOR_lsx_vslti_w): Ditto.
6597 (CODE_FOR_lsx_vslti_d): Ditto.
6598 (CODE_FOR_lsx_vslti_bu): Ditto.
6599 (CODE_FOR_lsx_vslti_hu): Ditto.
6600 (CODE_FOR_lsx_vslti_wu): Ditto.
6601 (CODE_FOR_lsx_vslti_du): Ditto.
6602 (CODE_FOR_lsx_vslei_b): Ditto.
6603 (CODE_FOR_lsx_vslei_h): Ditto.
6604 (CODE_FOR_lsx_vslei_w): Ditto.
6605 (CODE_FOR_lsx_vslei_d): Ditto.
6606 (CODE_FOR_lsx_vslei_bu): Ditto.
6607 (CODE_FOR_lsx_vslei_hu): Ditto.
6608 (CODE_FOR_lsx_vslei_wu): Ditto.
6609 (CODE_FOR_lsx_vslei_du): Ditto.
6610 (CODE_FOR_lsx_vdiv_b): Ditto.
6611 (CODE_FOR_lsx_vdiv_h): Ditto.
6612 (CODE_FOR_lsx_vdiv_w): Ditto.
6613 (CODE_FOR_lsx_vdiv_d): Ditto.
6614 (CODE_FOR_lsx_vdiv_bu): Ditto.
6615 (CODE_FOR_lsx_vdiv_hu): Ditto.
6616 (CODE_FOR_lsx_vdiv_wu): Ditto.
6617 (CODE_FOR_lsx_vdiv_du): Ditto.
6618 (CODE_FOR_lsx_vfadd_s): Ditto.
6619 (CODE_FOR_lsx_vfadd_d): Ditto.
6620 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
6621 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
6622 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
6623 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
6624 (CODE_FOR_lsx_vffint_s_w): Ditto.
6625 (CODE_FOR_lsx_vffint_d_l): Ditto.
6626 (CODE_FOR_lsx_vffint_s_wu): Ditto.
6627 (CODE_FOR_lsx_vffint_d_lu): Ditto.
6628 (CODE_FOR_lsx_vfsub_s): Ditto.
6629 (CODE_FOR_lsx_vfsub_d): Ditto.
6630 (CODE_FOR_lsx_vfmul_s): Ditto.
6631 (CODE_FOR_lsx_vfmul_d): Ditto.
6632 (CODE_FOR_lsx_vfdiv_s): Ditto.
6633 (CODE_FOR_lsx_vfdiv_d): Ditto.
6634 (CODE_FOR_lsx_vfmax_s): Ditto.
6635 (CODE_FOR_lsx_vfmax_d): Ditto.
6636 (CODE_FOR_lsx_vfmin_s): Ditto.
6637 (CODE_FOR_lsx_vfmin_d): Ditto.
6638 (CODE_FOR_lsx_vfsqrt_s): Ditto.
6639 (CODE_FOR_lsx_vfsqrt_d): Ditto.
6640 (CODE_FOR_lsx_vflogb_s): Ditto.
6641 (CODE_FOR_lsx_vflogb_d): Ditto.
6642 (CODE_FOR_lsx_vmax_b): Ditto.
6643 (CODE_FOR_lsx_vmax_h): Ditto.
6644 (CODE_FOR_lsx_vmax_w): Ditto.
6645 (CODE_FOR_lsx_vmax_d): Ditto.
6646 (CODE_FOR_lsx_vmaxi_b): Ditto.
6647 (CODE_FOR_lsx_vmaxi_h): Ditto.
6648 (CODE_FOR_lsx_vmaxi_w): Ditto.
6649 (CODE_FOR_lsx_vmaxi_d): Ditto.
6650 (CODE_FOR_lsx_vmax_bu): Ditto.
6651 (CODE_FOR_lsx_vmax_hu): Ditto.
6652 (CODE_FOR_lsx_vmax_wu): Ditto.
6653 (CODE_FOR_lsx_vmax_du): Ditto.
6654 (CODE_FOR_lsx_vmaxi_bu): Ditto.
6655 (CODE_FOR_lsx_vmaxi_hu): Ditto.
6656 (CODE_FOR_lsx_vmaxi_wu): Ditto.
6657 (CODE_FOR_lsx_vmaxi_du): Ditto.
6658 (CODE_FOR_lsx_vmin_b): Ditto.
6659 (CODE_FOR_lsx_vmin_h): Ditto.
6660 (CODE_FOR_lsx_vmin_w): Ditto.
6661 (CODE_FOR_lsx_vmin_d): Ditto.
6662 (CODE_FOR_lsx_vmini_b): Ditto.
6663 (CODE_FOR_lsx_vmini_h): Ditto.
6664 (CODE_FOR_lsx_vmini_w): Ditto.
6665 (CODE_FOR_lsx_vmini_d): Ditto.
6666 (CODE_FOR_lsx_vmin_bu): Ditto.
6667 (CODE_FOR_lsx_vmin_hu): Ditto.
6668 (CODE_FOR_lsx_vmin_wu): Ditto.
6669 (CODE_FOR_lsx_vmin_du): Ditto.
6670 (CODE_FOR_lsx_vmini_bu): Ditto.
6671 (CODE_FOR_lsx_vmini_hu): Ditto.
6672 (CODE_FOR_lsx_vmini_wu): Ditto.
6673 (CODE_FOR_lsx_vmini_du): Ditto.
6674 (CODE_FOR_lsx_vmod_b): Ditto.
6675 (CODE_FOR_lsx_vmod_h): Ditto.
6676 (CODE_FOR_lsx_vmod_w): Ditto.
6677 (CODE_FOR_lsx_vmod_d): Ditto.
6678 (CODE_FOR_lsx_vmod_bu): Ditto.
6679 (CODE_FOR_lsx_vmod_hu): Ditto.
6680 (CODE_FOR_lsx_vmod_wu): Ditto.
6681 (CODE_FOR_lsx_vmod_du): Ditto.
6682 (CODE_FOR_lsx_vmul_b): Ditto.
6683 (CODE_FOR_lsx_vmul_h): Ditto.
6684 (CODE_FOR_lsx_vmul_w): Ditto.
6685 (CODE_FOR_lsx_vmul_d): Ditto.
6686 (CODE_FOR_lsx_vclz_b): Ditto.
6687 (CODE_FOR_lsx_vclz_h): Ditto.
6688 (CODE_FOR_lsx_vclz_w): Ditto.
6689 (CODE_FOR_lsx_vclz_d): Ditto.
6690 (CODE_FOR_lsx_vnor_v): Ditto.
6691 (CODE_FOR_lsx_vor_v): Ditto.
6692 (CODE_FOR_lsx_vori_b): Ditto.
6693 (CODE_FOR_lsx_vnori_b): Ditto.
6694 (CODE_FOR_lsx_vpcnt_b): Ditto.
6695 (CODE_FOR_lsx_vpcnt_h): Ditto.
6696 (CODE_FOR_lsx_vpcnt_w): Ditto.
6697 (CODE_FOR_lsx_vpcnt_d): Ditto.
6698 (CODE_FOR_lsx_vxor_v): Ditto.
6699 (CODE_FOR_lsx_vxori_b): Ditto.
6700 (CODE_FOR_lsx_vsll_b): Ditto.
6701 (CODE_FOR_lsx_vsll_h): Ditto.
6702 (CODE_FOR_lsx_vsll_w): Ditto.
6703 (CODE_FOR_lsx_vsll_d): Ditto.
6704 (CODE_FOR_lsx_vslli_b): Ditto.
6705 (CODE_FOR_lsx_vslli_h): Ditto.
6706 (CODE_FOR_lsx_vslli_w): Ditto.
6707 (CODE_FOR_lsx_vslli_d): Ditto.
6708 (CODE_FOR_lsx_vsra_b): Ditto.
6709 (CODE_FOR_lsx_vsra_h): Ditto.
6710 (CODE_FOR_lsx_vsra_w): Ditto.
6711 (CODE_FOR_lsx_vsra_d): Ditto.
6712 (CODE_FOR_lsx_vsrai_b): Ditto.
6713 (CODE_FOR_lsx_vsrai_h): Ditto.
6714 (CODE_FOR_lsx_vsrai_w): Ditto.
6715 (CODE_FOR_lsx_vsrai_d): Ditto.
6716 (CODE_FOR_lsx_vsrl_b): Ditto.
6717 (CODE_FOR_lsx_vsrl_h): Ditto.
6718 (CODE_FOR_lsx_vsrl_w): Ditto.
6719 (CODE_FOR_lsx_vsrl_d): Ditto.
6720 (CODE_FOR_lsx_vsrli_b): Ditto.
6721 (CODE_FOR_lsx_vsrli_h): Ditto.
6722 (CODE_FOR_lsx_vsrli_w): Ditto.
6723 (CODE_FOR_lsx_vsrli_d): Ditto.
6724 (CODE_FOR_lsx_vsub_b): Ditto.
6725 (CODE_FOR_lsx_vsub_h): Ditto.
6726 (CODE_FOR_lsx_vsub_w): Ditto.
6727 (CODE_FOR_lsx_vsub_d): Ditto.
6728 (CODE_FOR_lsx_vsubi_bu): Ditto.
6729 (CODE_FOR_lsx_vsubi_hu): Ditto.
6730 (CODE_FOR_lsx_vsubi_wu): Ditto.
6731 (CODE_FOR_lsx_vsubi_du): Ditto.
6732 (CODE_FOR_lsx_vpackod_d): Ditto.
6733 (CODE_FOR_lsx_vpackev_d): Ditto.
6734 (CODE_FOR_lsx_vpickod_d): Ditto.
6735 (CODE_FOR_lsx_vpickev_d): Ditto.
6736 (CODE_FOR_lsx_vrepli_b): Ditto.
6737 (CODE_FOR_lsx_vrepli_h): Ditto.
6738 (CODE_FOR_lsx_vrepli_w): Ditto.
6739 (CODE_FOR_lsx_vrepli_d): Ditto.
6740 (CODE_FOR_lsx_vsat_b): Ditto.
6741 (CODE_FOR_lsx_vsat_h): Ditto.
6742 (CODE_FOR_lsx_vsat_w): Ditto.
6743 (CODE_FOR_lsx_vsat_d): Ditto.
6744 (CODE_FOR_lsx_vsat_bu): Ditto.
6745 (CODE_FOR_lsx_vsat_hu): Ditto.
6746 (CODE_FOR_lsx_vsat_wu): Ditto.
6747 (CODE_FOR_lsx_vsat_du): Ditto.
6748 (CODE_FOR_lsx_vavg_b): Ditto.
6749 (CODE_FOR_lsx_vavg_h): Ditto.
6750 (CODE_FOR_lsx_vavg_w): Ditto.
6751 (CODE_FOR_lsx_vavg_d): Ditto.
6752 (CODE_FOR_lsx_vavg_bu): Ditto.
6753 (CODE_FOR_lsx_vavg_hu): Ditto.
6754 (CODE_FOR_lsx_vavg_wu): Ditto.
6755 (CODE_FOR_lsx_vavg_du): Ditto.
6756 (CODE_FOR_lsx_vavgr_b): Ditto.
6757 (CODE_FOR_lsx_vavgr_h): Ditto.
6758 (CODE_FOR_lsx_vavgr_w): Ditto.
6759 (CODE_FOR_lsx_vavgr_d): Ditto.
6760 (CODE_FOR_lsx_vavgr_bu): Ditto.
6761 (CODE_FOR_lsx_vavgr_hu): Ditto.
6762 (CODE_FOR_lsx_vavgr_wu): Ditto.
6763 (CODE_FOR_lsx_vavgr_du): Ditto.
6764 (CODE_FOR_lsx_vssub_b): Ditto.
6765 (CODE_FOR_lsx_vssub_h): Ditto.
6766 (CODE_FOR_lsx_vssub_w): Ditto.
6767 (CODE_FOR_lsx_vssub_d): Ditto.
6768 (CODE_FOR_lsx_vssub_bu): Ditto.
6769 (CODE_FOR_lsx_vssub_hu): Ditto.
6770 (CODE_FOR_lsx_vssub_wu): Ditto.
6771 (CODE_FOR_lsx_vssub_du): Ditto.
6772 (CODE_FOR_lsx_vabsd_b): Ditto.
6773 (CODE_FOR_lsx_vabsd_h): Ditto.
6774 (CODE_FOR_lsx_vabsd_w): Ditto.
6775 (CODE_FOR_lsx_vabsd_d): Ditto.
6776 (CODE_FOR_lsx_vabsd_bu): Ditto.
6777 (CODE_FOR_lsx_vabsd_hu): Ditto.
6778 (CODE_FOR_lsx_vabsd_wu): Ditto.
6779 (CODE_FOR_lsx_vabsd_du): Ditto.
6780 (CODE_FOR_lsx_vftint_w_s): Ditto.
6781 (CODE_FOR_lsx_vftint_l_d): Ditto.
6782 (CODE_FOR_lsx_vftint_wu_s): Ditto.
6783 (CODE_FOR_lsx_vftint_lu_d): Ditto.
6784 (CODE_FOR_lsx_vandn_v): Ditto.
6785 (CODE_FOR_lsx_vorn_v): Ditto.
6786 (CODE_FOR_lsx_vneg_b): Ditto.
6787 (CODE_FOR_lsx_vneg_h): Ditto.
6788 (CODE_FOR_lsx_vneg_w): Ditto.
6789 (CODE_FOR_lsx_vneg_d): Ditto.
6790 (CODE_FOR_lsx_vshuf4i_d): Ditto.
6791 (CODE_FOR_lsx_vbsrl_v): Ditto.
6792 (CODE_FOR_lsx_vbsll_v): Ditto.
6793 (CODE_FOR_lsx_vfmadd_s): Ditto.
6794 (CODE_FOR_lsx_vfmadd_d): Ditto.
6795 (CODE_FOR_lsx_vfmsub_s): Ditto.
6796 (CODE_FOR_lsx_vfmsub_d): Ditto.
6797 (CODE_FOR_lsx_vfnmadd_s): Ditto.
6798 (CODE_FOR_lsx_vfnmadd_d): Ditto.
6799 (CODE_FOR_lsx_vfnmsub_s): Ditto.
6800 (CODE_FOR_lsx_vfnmsub_d): Ditto.
6801 (CODE_FOR_lsx_vmuh_b): Ditto.
6802 (CODE_FOR_lsx_vmuh_h): Ditto.
6803 (CODE_FOR_lsx_vmuh_w): Ditto.
6804 (CODE_FOR_lsx_vmuh_d): Ditto.
6805 (CODE_FOR_lsx_vmuh_bu): Ditto.
6806 (CODE_FOR_lsx_vmuh_hu): Ditto.
6807 (CODE_FOR_lsx_vmuh_wu): Ditto.
6808 (CODE_FOR_lsx_vmuh_du): Ditto.
6809 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
6810 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
6811 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
6812 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
6813 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
6814 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
6815 (CODE_FOR_lsx_vssran_b_h): Ditto.
6816 (CODE_FOR_lsx_vssran_h_w): Ditto.
6817 (CODE_FOR_lsx_vssran_w_d): Ditto.
6818 (CODE_FOR_lsx_vssran_bu_h): Ditto.
6819 (CODE_FOR_lsx_vssran_hu_w): Ditto.
6820 (CODE_FOR_lsx_vssran_wu_d): Ditto.
6821 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
6822 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
6823 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
6824 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
6825 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
6826 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
6827 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
6828 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
6829 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
6830 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
6831 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
6832 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
6833 (loongarch_builtin_vector_type): Ditto.
6834 (loongarch_build_cvpointer_type): Ditto.
6835 (LARCH_ATYPE_CVPOINTER): Ditto.
6836 (LARCH_ATYPE_BOOLEAN): Ditto.
6837 (LARCH_ATYPE_V2SF): Ditto.
6838 (LARCH_ATYPE_V2HI): Ditto.
6839 (LARCH_ATYPE_V2SI): Ditto.
6840 (LARCH_ATYPE_V4QI): Ditto.
6841 (LARCH_ATYPE_V4HI): Ditto.
6842 (LARCH_ATYPE_V8QI): Ditto.
6843 (LARCH_ATYPE_V2DI): Ditto.
6844 (LARCH_ATYPE_V4SI): Ditto.
6845 (LARCH_ATYPE_V8HI): Ditto.
6846 (LARCH_ATYPE_V16QI): Ditto.
6847 (LARCH_ATYPE_V2DF): Ditto.
6848 (LARCH_ATYPE_V4SF): Ditto.
6849 (LARCH_ATYPE_V4DI): Ditto.
6850 (LARCH_ATYPE_V8SI): Ditto.
6851 (LARCH_ATYPE_V16HI): Ditto.
6852 (LARCH_ATYPE_V32QI): Ditto.
6853 (LARCH_ATYPE_V4DF): Ditto.
6854 (LARCH_ATYPE_V8SF): Ditto.
6855 (LARCH_ATYPE_UV2DI): Ditto.
6856 (LARCH_ATYPE_UV4SI): Ditto.
6857 (LARCH_ATYPE_UV8HI): Ditto.
6858 (LARCH_ATYPE_UV16QI): Ditto.
6859 (LARCH_ATYPE_UV4DI): Ditto.
6860 (LARCH_ATYPE_UV8SI): Ditto.
6861 (LARCH_ATYPE_UV16HI): Ditto.
6862 (LARCH_ATYPE_UV32QI): Ditto.
6863 (LARCH_ATYPE_UV2SI): Ditto.
6864 (LARCH_ATYPE_UV4HI): Ditto.
6865 (LARCH_ATYPE_UV8QI): Ditto.
6866 (loongarch_builtin_vectorized_function): Ditto.
6867 (LARCH_GET_BUILTIN): Ditto.
6868 (loongarch_expand_builtin_insn): Ditto.
6869 (loongarch_expand_builtin_lsx_test_branch): Ditto.
6870 (loongarch_expand_builtin): Ditto.
6871 * config/loongarch/loongarch-ftypes.def (1): Ditto.
6875 * config/loongarch/lsxintrin.h: New file.
6877 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6879 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
6899 * config/loongarch/genopts/loongarch.opt.in: Ditto.
6900 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
6901 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
6902 (VECTOR_MODE): Ditto.
6904 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
6905 (loongarch_split_move_insn): Ditto.
6906 (loongarch_split_128bit_move): Ditto.
6907 (loongarch_split_128bit_move_p): Ditto.
6908 (loongarch_split_lsx_copy_d): Ditto.
6909 (loongarch_split_lsx_insert_d): Ditto.
6910 (loongarch_split_lsx_fill_d): Ditto.
6911 (loongarch_expand_vec_cmp): Ditto.
6912 (loongarch_const_vector_same_val_p): Ditto.
6913 (loongarch_const_vector_same_bytes_p): Ditto.
6914 (loongarch_const_vector_same_int_p): Ditto.
6915 (loongarch_const_vector_shuffle_set_p): Ditto.
6916 (loongarch_const_vector_bitimm_set_p): Ditto.
6917 (loongarch_const_vector_bitimm_clr_p): Ditto.
6918 (loongarch_lsx_vec_parallel_const_half): Ditto.
6919 (loongarch_gen_const_int_vector): Ditto.
6920 (loongarch_lsx_output_division): Ditto.
6921 (loongarch_expand_vector_init): Ditto.
6922 (loongarch_expand_vec_unpack): Ditto.
6923 (loongarch_expand_vec_perm): Ditto.
6924 (loongarch_expand_vector_extract): Ditto.
6925 (loongarch_expand_vector_reduc): Ditto.
6926 (loongarch_ldst_scaled_shift): Ditto.
6927 (loongarch_expand_vec_cond_expr): Ditto.
6928 (loongarch_expand_vec_cond_mask_expr): Ditto.
6929 (loongarch_builtin_vectorized_function): Ditto.
6930 (loongarch_gen_const_int_vector_shuffle): Ditto.
6931 (loongarch_build_signbit_mask): Ditto.
6932 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
6933 (loongarch_setup_incoming_varargs): Ditto.
6934 (loongarch_emit_move): Ditto.
6935 (loongarch_const_vector_bitimm_set_p): Ditto.
6936 (loongarch_const_vector_bitimm_clr_p): Ditto.
6937 (loongarch_const_vector_same_val_p): Ditto.
6938 (loongarch_const_vector_same_bytes_p): Ditto.
6939 (loongarch_const_vector_same_int_p): Ditto.
6940 (loongarch_const_vector_shuffle_set_p): Ditto.
6941 (loongarch_symbol_insns): Ditto.
6942 (loongarch_cannot_force_const_mem): Ditto.
6943 (loongarch_valid_offset_p): Ditto.
6944 (loongarch_valid_index_p): Ditto.
6945 (loongarch_classify_address): Ditto.
6946 (loongarch_address_insns): Ditto.
6947 (loongarch_ldst_scaled_shift): Ditto.
6948 (loongarch_const_insns): Ditto.
6949 (loongarch_split_move_insn_p): Ditto.
6950 (loongarch_subword_at_byte): Ditto.
6951 (loongarch_legitimize_move): Ditto.
6952 (loongarch_builtin_vectorization_cost): Ditto.
6953 (loongarch_split_move_p): Ditto.
6954 (loongarch_split_move): Ditto.
6955 (loongarch_split_move_insn): Ditto.
6956 (loongarch_output_move_index_float): Ditto.
6957 (loongarch_split_128bit_move_p): Ditto.
6958 (loongarch_split_128bit_move): Ditto.
6959 (loongarch_split_lsx_copy_d): Ditto.
6960 (loongarch_split_lsx_insert_d): Ditto.
6961 (loongarch_split_lsx_fill_d): Ditto.
6962 (loongarch_output_move): Ditto.
6963 (loongarch_extend_comparands): Ditto.
6964 (loongarch_print_operand_reloc): Ditto.
6965 (loongarch_print_operand): Ditto.
6966 (loongarch_hard_regno_mode_ok_uncached): Ditto.
6967 (loongarch_hard_regno_call_part_clobbered): Ditto.
6968 (loongarch_hard_regno_nregs): Ditto.
6969 (loongarch_class_max_nregs): Ditto.
6970 (loongarch_can_change_mode_class): Ditto.
6971 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
6972 (loongarch_secondary_reload): Ditto.
6973 (loongarch_vector_mode_supported_p): Ditto.
6974 (loongarch_preferred_simd_mode): Ditto.
6975 (loongarch_autovectorize_vector_modes): Ditto.
6976 (loongarch_lsx_output_division): Ditto.
6977 (loongarch_option_override_internal): Ditto.
6978 (loongarch_hard_regno_caller_save_mode): Ditto.
6979 (MAX_VECT_LEN): Ditto.
6980 (loongarch_spill_class): Ditto.
6981 (struct expand_vec_perm_d): Ditto.
6982 (loongarch_promote_function_mode): Ditto.
6983 (loongarch_expand_vselect): Ditto.
6984 (loongarch_starting_frame_offset): Ditto.
6985 (loongarch_expand_vselect_vconcat): Ditto.
6986 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
6987 (TARGET_OPTION_OVERRIDE): Ditto.
6988 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
6989 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
6990 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
6991 (loongarch_expand_lsx_shuffle): Ditto.
6992 (TARGET_SCHED_INIT): Ditto.
6993 (TARGET_SCHED_REORDER): Ditto.
6994 (TARGET_SCHED_REORDER2): Ditto.
6995 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
6996 (TARGET_SCHED_ADJUST_COST): Ditto.
6997 (TARGET_SCHED_ISSUE_RATE): Ditto.
6998 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
6999 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
7000 (TARGET_VALID_POINTER_MODE): Ditto.
7001 (TARGET_REGISTER_MOVE_COST): Ditto.
7002 (TARGET_MEMORY_MOVE_COST): Ditto.
7003 (TARGET_RTX_COSTS): Ditto.
7004 (TARGET_ADDRESS_COST): Ditto.
7005 (TARGET_IN_SMALL_DATA_P): Ditto.
7006 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
7007 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
7008 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
7009 (loongarch_expand_vec_perm): Ditto.
7010 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
7011 (TARGET_RETURN_IN_MEMORY): Ditto.
7012 (TARGET_FUNCTION_VALUE): Ditto.
7013 (TARGET_LIBCALL_VALUE): Ditto.
7014 (loongarch_try_expand_lsx_vshuf_const): Ditto.
7015 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
7016 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
7017 (TARGET_PRINT_OPERAND): Ditto.
7018 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
7019 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
7020 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
7021 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
7022 (TARGET_MUST_PASS_IN_STACK): Ditto.
7023 (TARGET_PASS_BY_REFERENCE): Ditto.
7024 (TARGET_ARG_PARTIAL_BYTES): Ditto.
7025 (TARGET_FUNCTION_ARG): Ditto.
7026 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
7027 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
7028 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
7029 (TARGET_INIT_BUILTINS): Ditto.
7030 (loongarch_expand_vec_perm_const_1): Ditto.
7031 (loongarch_expand_vec_perm_const_2): Ditto.
7032 (loongarch_vectorize_vec_perm_const): Ditto.
7033 (loongarch_cpu_sched_reassociation_width): Ditto.
7034 (loongarch_sched_reassociation_width): Ditto.
7035 (loongarch_expand_vector_extract): Ditto.
7036 (emit_reduc_half): Ditto.
7037 (loongarch_expand_vector_reduc): Ditto.
7038 (loongarch_expand_vec_unpack): Ditto.
7039 (loongarch_lsx_vec_parallel_const_half): Ditto.
7040 (loongarch_constant_elt_p): Ditto.
7041 (loongarch_gen_const_int_vector_shuffle): Ditto.
7042 (loongarch_expand_vector_init): Ditto.
7043 (loongarch_expand_lsx_cmp): Ditto.
7044 (loongarch_expand_vec_cond_expr): Ditto.
7045 (loongarch_expand_vec_cond_mask_expr): Ditto.
7046 (loongarch_expand_vec_cmp): Ditto.
7047 (loongarch_case_values_threshold): Ditto.
7048 (loongarch_build_const_vector): Ditto.
7049 (loongarch_build_signbit_mask): Ditto.
7050 (loongarch_builtin_support_vector_misalignment): Ditto.
7051 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
7052 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
7053 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
7054 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
7055 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
7056 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
7057 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
7058 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
7059 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
7060 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
7061 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
7062 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
7063 (UNITS_PER_LSX_REG): Ditto.
7064 (BITS_PER_LSX_REG): Ditto.
7065 (BIGGEST_ALIGNMENT): Ditto.
7066 (LSX_REG_FIRST): Ditto.
7067 (LSX_REG_LAST): Ditto.
7068 (LSX_REG_NUM): Ditto.
7070 (LSX_REG_RTX_P): Ditto.
7071 (IMM13_OPERAND): Ditto.
7072 (LSX_SUPPORTED_MODE_P): Ditto.
7073 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
7074 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
7075 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
7082 * config/loongarch/loongarch.opt: Ditto.
7083 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
7084 (const_uimm3_operand): Ditto.
7085 (const_8_to_11_operand): Ditto.
7086 (const_12_to_15_operand): Ditto.
7087 (const_uimm4_operand): Ditto.
7088 (const_uimm6_operand): Ditto.
7089 (const_uimm7_operand): Ditto.
7090 (const_uimm8_operand): Ditto.
7091 (const_imm5_operand): Ditto.
7092 (const_imm10_operand): Ditto.
7093 (const_imm13_operand): Ditto.
7094 (reg_imm10_operand): Ditto.
7095 (aq8b_operand): Ditto.
7096 (aq8h_operand): Ditto.
7097 (aq8w_operand): Ditto.
7098 (aq8d_operand): Ditto.
7099 (aq10b_operand): Ditto.
7100 (aq10h_operand): Ditto.
7101 (aq10w_operand): Ditto.
7102 (aq10d_operand): Ditto.
7103 (aq12b_operand): Ditto.
7104 (aq12h_operand): Ditto.
7105 (aq12w_operand): Ditto.
7106 (aq12d_operand): Ditto.
7107 (const_m1_operand): Ditto.
7108 (reg_or_m1_operand): Ditto.
7109 (const_exp_2_operand): Ditto.
7110 (const_exp_4_operand): Ditto.
7111 (const_exp_8_operand): Ditto.
7112 (const_exp_16_operand): Ditto.
7113 (const_exp_32_operand): Ditto.
7114 (const_0_or_1_operand): Ditto.
7115 (const_0_to_3_operand): Ditto.
7116 (const_0_to_7_operand): Ditto.
7117 (const_2_or_3_operand): Ditto.
7118 (const_4_to_7_operand): Ditto.
7119 (const_8_to_15_operand): Ditto.
7120 (const_16_to_31_operand): Ditto.
7121 (qi_mask_operand): Ditto.
7122 (hi_mask_operand): Ditto.
7123 (si_mask_operand): Ditto.
7125 (db4_operand): Ditto.
7126 (db7_operand): Ditto.
7127 (db8_operand): Ditto.
7128 (ib3_operand): Ditto.
7129 (sb4_operand): Ditto.
7130 (sb5_operand): Ditto.
7131 (sb8_operand): Ditto.
7132 (sd8_operand): Ditto.
7133 (ub4_operand): Ditto.
7134 (ub8_operand): Ditto.
7135 (uh4_operand): Ditto.
7136 (uw4_operand): Ditto.
7137 (uw5_operand): Ditto.
7138 (uw6_operand): Ditto.
7139 (uw8_operand): Ditto.
7140 (addiur2_operand): Ditto.
7141 (addiusp_operand): Ditto.
7142 (andi16_operand): Ditto.
7143 (movep_src_register): Ditto.
7144 (movep_src_operand): Ditto.
7145 (fcc_reload_operand): Ditto.
7146 (muldiv_target_operand): Ditto.
7147 (const_vector_same_val_operand): Ditto.
7148 (const_vector_same_simm5_operand): Ditto.
7149 (const_vector_same_uimm5_operand): Ditto.
7150 (const_vector_same_ximm5_operand): Ditto.
7151 (const_vector_same_uimm6_operand): Ditto.
7152 (par_const_vector_shf_set_operand): Ditto.
7153 (reg_or_vector_same_val_operand): Ditto.
7154 (reg_or_vector_same_simm5_operand): Ditto.
7155 (reg_or_vector_same_uimm5_operand): Ditto.
7156 (reg_or_vector_same_ximm5_operand): Ditto.
7157 (reg_or_vector_same_uimm6_operand): Ditto.
7158 * doc/md.texi: Ditto.
7159 * config/loongarch/lsx.md: New file.
7161 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7163 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
7164 (get_all_predecessors): New function.
7165 (get_all_successors): Ditto.
7166 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
7167 (get_all_successors): Ditto.
7168 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
7169 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
7171 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
7173 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
7174 (split_addsi): Likewise.
7175 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
7176 'N', 'x', and 'J' code letters.
7177 (arc_output_addsi): Make it static.
7178 (split_addsi): Remove it.
7179 * config/arc/arc.h (UNSIGNED_INT*): New defines.
7180 (SINNED_INT*): Likewise.
7181 * config/arc/arc.md (type): Add add, sub, bxor types.
7182 (tst_movb): Change code letter from 's' to 'x'.
7183 (andsi3_i): Likewise.
7184 (addsi3_mixed): Refurbish the pattern.
7185 (call_i): Change code letter from 'S' to 'J'.
7186 * config/arc/arc700.md: Add newly introduced types.
7187 * config/arc/arcHS.md: Likewsie.
7188 * config/arc/arcHS4x.md: Likewise.
7189 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
7190 (CM4): Update description.
7191 (CP4, C6u, C6n, CIs, C4p): New constraint.
7193 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
7195 * common/config/arc/arc-common.cc (arc_option_optimization_table):
7196 Remove mbbit_peephole.
7197 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
7198 (store_direct): Likewise.
7199 (BBIT peephole2): Likewise.
7200 * config/arc/arc.opt (mbbit-peephole): Ignore option.
7201 * doc/invoke.texi (mbbit-peephole): Update document.
7203 2023-09-05 Jakub Jelinek <jakub@redhat.com>
7205 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
7208 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
7210 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
7211 options passed from driver to gnat1 as explicit for multilib.
7213 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
7215 * config.gcc: add loongarch*-elf target.
7216 * config/loongarch/elf.h: New file.
7217 Link against newlib by default.
7219 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
7221 * config.gcc: use -mstrict-align for building libraries
7222 if --with-strict-align-lib is given.
7223 * doc/install.texi: likewise.
7225 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
7227 * config/loongarch/loongarch-c.cc: Export macros
7228 "__loongarch_{arch,tune}" in the preprocessor.
7230 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
7232 * config.gcc: Make --with-abi= obsolete, decide the default ABI
7233 with target triplet. Allow specifying multilib library build
7234 options with --with-multilib-list and --with-multilib-default.
7235 * config/loongarch/t-linux: Likewise.
7236 * config/loongarch/genopts/loongarch-strings: Likewise.
7237 * config/loongarch/loongarch-str.h: Likewise.
7238 * doc/install.texi: Likewise.
7239 * config/loongarch/genopts/loongarch.opt.in: Introduce
7240 -m[no-]l[a]sx options. Only process -m*-float and
7241 -m[no-]l[a]sx in the GCC driver.
7242 * config/loongarch/loongarch.opt: Likewise.
7243 * config/loongarch/la464.md: Likewise.
7244 * config/loongarch/loongarch-c.cc: Likewise.
7245 * config/loongarch/loongarch-cpu.cc: Likewise.
7246 * config/loongarch/loongarch-cpu.h: Likewise.
7247 * config/loongarch/loongarch-def.c: Likewise.
7248 * config/loongarch/loongarch-def.h: Likewise.
7249 * config/loongarch/loongarch-driver.cc: Likewise.
7250 * config/loongarch/loongarch-driver.h: Likewise.
7251 * config/loongarch/loongarch-opts.cc: Likewise.
7252 * config/loongarch/loongarch-opts.h: Likewise.
7253 * config/loongarch/loongarch.cc: Likewise.
7254 * doc/invoke.texi: Likewise.
7256 2023-09-05 liuhongt <hongtao.liu@intel.com>
7258 * config/i386/sse.md: (V8BFH_128): Renamed to ..
7259 (VHFBF_128): .. this.
7260 (V16BFH_256): Renamed to ..
7261 (VHFBF_256): .. this.
7262 (avx512f_mov<mode>): Extend to V_128.
7263 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
7264 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
7265 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
7266 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
7267 * config/i386/i386-expand.cc (expand_vec_perm_blend):
7268 Canonicalize vec_merge.
7270 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7272 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
7273 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
7274 (autovectorize_vector_modes): Ditto.
7275 (vectorize_related_mode): Ditto.
7277 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
7279 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
7280 all 32b Darwin PowerPC cases.
7282 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
7284 * config/darwin-sections.def (static_init_section): Add the
7285 __TEXT,__StaticInit section.
7286 * config/darwin.cc (darwin_function_section): Use the static init
7287 section for global initializers, to match other platform toolchains.
7289 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
7291 * config/darwin-sections.def (darwin_exception_section): Move to
7293 * config/darwin.cc (darwin_emit_except_table_label): Align before
7294 the exception table label.
7295 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
7296 relative 4byte relocs.
7298 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
7300 * config/darwin.cc (dump_machopic_symref_flags): New.
7301 (debug_machopic_symref_flags): New.
7303 2023-09-04 Pan Li <pan2.li@intel.com>
7305 * config/riscv/riscv-vector-builtins-types.def
7306 (vfloat16mf4_t): Add FP16 intrinsic def.
7307 (vfloat16mf2_t): Ditto.
7308 (vfloat16m1_t): Ditto.
7309 (vfloat16m2_t): Ditto.
7310 (vfloat16m4_t): Ditto.
7311 (vfloat16m8_t): Ditto.
7313 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
7315 PR tree-optimization/108757
7316 * match.pd ((X - N * M) / N): New pattern.
7317 ((X + N * M) / N): New pattern.
7318 ((X + C) div_rshift N): New pattern.
7320 2023-09-04 Guo Jie <guojie@loongson.cn>
7322 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
7323 movsf_hardfloat and movdf_hardfloat.
7325 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
7327 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
7328 In unsigned QImode test, check for sign extended subreg and/or
7329 constant operands, and do a sign extension in that case.
7330 * config/loongarch/loongarch.md (TARGET_64BIT): Define
7331 template cbranchqi4.
7333 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
7335 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
7336 from memory into floating-point registers.
7338 2023-09-03 Pan Li <pan2.li@intel.com>
7340 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
7342 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
7344 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
7346 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
7347 pointer before overwriting it.
7349 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
7351 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
7352 Associate the __float128 type to float128_type_node so that it can
7353 be recognized by the compiler.
7354 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
7355 Add the flag "FLOAT128_TYPE" to gcc and associate a function
7356 with the suffix "q" to "f128".
7357 * doc/extend.texi:Added support for 128-bit floating-point functions on
7358 the LoongArch architecture.
7360 2023-09-01 Jakub Jelinek <jakub@redhat.com>
7363 * common.opt (fabi-version=): Document version 19.
7364 * doc/invoke.texi (-fabi-version=): Likewise.
7366 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
7368 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
7369 New combine pattern.
7370 (*cond_<float_cvt><vconvert><mode>): Ditto.
7371 (*cond_<optab><vnconvert><mode>): Ditto.
7372 (*cond_<float_cvt><vnconvert><mode>): Ditto.
7373 (*cond_<optab><mode><vnconvert>): Ditto.
7374 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
7375 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
7376 (<float_cvt><vconvert><mode>2): Adjust.
7377 (<optab><vnconvert><mode>2): Adjust.
7378 (<float_cvt><vnconvert><mode>2): Adjust.
7379 (<optab><mode><vnconvert>2): Adjust.
7380 (<float_cvt><mode><vnconvert>2): Adjust.
7381 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
7383 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
7385 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
7386 New combine pattern.
7387 (*cond_trunc<mode><v_double_trunc>): Ditto.
7388 * config/riscv/autovec.md: Adjust.
7389 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
7391 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
7393 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
7394 New combine pattern.
7395 (*cond_<optab><v_quad_trunc><mode>): Ditto.
7396 (*cond_<optab><v_oct_trunc><mode>): Ditto.
7397 (*cond_trunc<mode><v_double_trunc>): Ditto.
7398 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
7399 (<optab><v_oct_trunc><mode>2): Ditto.
7401 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
7403 * config/riscv/autovec.md: Adjust.
7404 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
7405 (expand_cond_len_binop): Ditto.
7406 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
7407 (expand_cond_len_op): Ditto.
7408 (expand_cond_len_unop): Ditto.
7409 (expand_cond_len_binop): Ditto.
7410 (expand_cond_len_ternop): Ditto.
7412 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7414 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
7415 VECT_COMPARE_COSTS by default.
7417 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
7419 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
7421 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7423 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
7425 * config/riscv/riscv.opt: Add dynamic compile option.
7427 2023-09-01 Pan Li <pan2.li@intel.com>
7429 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
7430 vls floating-point autovec.
7431 * config/riscv/vector-iterators.md: New iterator for
7432 floating-point V and VLS.
7433 * config/riscv/vector.md: Add VLS to floating-point binop.
7435 2023-09-01 Andrew Pinski <apinski@marvell.com>
7437 PR tree-optimization/19832
7438 * match.pd: Add pattern to optimize
7439 `(a != b) ? a OP b : c`.
7441 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
7442 Guo Jie <guojie@loongson.cn>
7445 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
7446 frame_pointer_needed to determine whether to use the $fp register.
7448 2023-08-31 Andrew Pinski <apinski@marvell.com>
7450 PR tree-optimization/110915
7451 * match.pd (min_value, max_value): Extend to vector constants.
7453 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
7455 * config.in: Regenerate.
7456 * config/darwin-c.cc: Change spelling to macOS.
7457 * config/darwin-driver.cc: Likewise.
7458 * config/darwin.h: Likewise.
7459 * configure.ac: Likewise.
7460 * doc/contrib.texi: Likewise.
7461 * doc/extend.texi: Likewise.
7462 * doc/invoke.texi: Likewise.
7463 * doc/plugins.texi: Likewise.
7464 * doc/tm.texi: Regenerate.
7465 * doc/tm.texi.in: Change spelling to macOS.
7466 * plugin.cc: Likewise.
7468 2023-08-31 Pan Li <pan2.li@intel.com>
7470 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
7471 * config/riscv/autovec.md: Ditto.
7473 2023-08-31 Pan Li <pan2.li@intel.com>
7475 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
7476 * config/riscv/autovec.md: Ditto.
7478 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
7480 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
7481 rather than a call. List each possible destination register
7482 in the call pattern.
7484 2023-08-31 Pan Li <pan2.li@intel.com>
7486 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
7487 * config/riscv/autovec.md: Ditto.
7489 2023-08-31 Pan Li <pan2.li@intel.com>
7490 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7492 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
7493 * config/riscv/autovec.md: Ditto.
7494 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
7496 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
7498 * config/riscv/autovec.md (shifts): Use
7499 vector_scalar_shift_operand.
7500 * config/riscv/predicates.md (vector_scalar_shift_operand): New
7503 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7505 * config.gcc: Add vector cost model framework for RVV.
7506 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
7507 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
7508 * config/riscv/t-riscv: Ditto.
7509 * config/riscv/riscv-vector-costs.cc: New file.
7510 * config/riscv/riscv-vector-costs.h: New file.
7512 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
7515 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
7516 AltiVec address operands.
7517 (define_insn_and_split movxo): Likewise.
7518 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
7519 redundant mode size check.
7521 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7523 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
7524 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
7525 Change to default policy.
7526 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
7527 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
7528 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
7530 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7532 * config/riscv/autovec-opt.md: Adjust.
7533 * config/riscv/autovec-vls.md: Ditto.
7534 * config/riscv/autovec.md: Ditto.
7535 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
7536 (enum insn_flags): Add insn flags.
7537 (emit_vlmax_insn): Adjust.
7538 (emit_vlmax_fp_insn): Delete.
7539 (emit_vlmax_ternary_insn): Delete.
7540 (emit_vlmax_fp_ternary_insn): Delete.
7541 (emit_nonvlmax_insn): Adjust.
7542 (emit_vlmax_slide_insn): Delete.
7543 (emit_nonvlmax_slide_tu_insn): Delete.
7544 (emit_vlmax_merge_insn): Delete.
7545 (emit_vlmax_cmp_insn): Delete.
7546 (emit_vlmax_cmp_mu_insn): Delete.
7547 (emit_vlmax_masked_mu_insn): Delete.
7548 (emit_scalar_move_insn): Delete.
7549 (emit_nonvlmax_integer_move_insn): Delete.
7550 (emit_vlmax_insn_lra): Add.
7551 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
7552 (emit_vlmax_insn): Adjust.
7553 (emit_nonvlmax_insn): Adjust.
7554 (emit_vlmax_insn_lra): Add.
7555 (emit_vlmax_fp_insn): Delete.
7556 (emit_vlmax_ternary_insn): Delete.
7557 (emit_vlmax_fp_ternary_insn): Delete.
7558 (emit_vlmax_slide_insn): Delete.
7559 (emit_nonvlmax_slide_tu_insn): Delete.
7560 (emit_nonvlmax_slide_insn): Delete.
7561 (emit_vlmax_merge_insn): Delete.
7562 (emit_vlmax_cmp_insn): Delete.
7563 (emit_vlmax_cmp_mu_insn): Delete.
7564 (emit_vlmax_masked_insn): Delete.
7565 (emit_nonvlmax_masked_insn): Delete.
7566 (emit_vlmax_masked_store_insn): Delete.
7567 (emit_nonvlmax_masked_store_insn): Delete.
7568 (emit_vlmax_masked_mu_insn): Delete.
7569 (emit_vlmax_masked_fp_mu_insn): Delete.
7570 (emit_nonvlmax_tu_insn): Delete.
7571 (emit_nonvlmax_fp_tu_insn): Delete.
7572 (emit_nonvlmax_tumu_insn): Delete.
7573 (emit_nonvlmax_fp_tumu_insn): Delete.
7574 (emit_scalar_move_insn): Delete.
7575 (emit_cpop_insn): Delete.
7576 (emit_vlmax_integer_move_insn): Delete.
7577 (emit_nonvlmax_integer_move_insn): Delete.
7578 (emit_vlmax_gather_insn): Delete.
7579 (emit_vlmax_masked_gather_mu_insn): Delete.
7580 (emit_vlmax_compress_insn): Delete.
7581 (emit_nonvlmax_compress_insn): Delete.
7582 (emit_vlmax_reduction_insn): Delete.
7583 (emit_vlmax_fp_reduction_insn): Delete.
7584 (emit_nonvlmax_fp_reduction_insn): Delete.
7585 (expand_vec_series): Adjust.
7586 (expand_const_vector): Adjust.
7587 (legitimize_move): Adjust.
7588 (sew64_scalar_helper): Adjust.
7589 (expand_tuple_move): Adjust.
7590 (expand_vector_init_insert_elems): Adjust.
7591 (expand_vector_init_merge_repeating_sequence): Adjust.
7592 (expand_vec_cmp): Adjust.
7593 (expand_vec_cmp_float): Adjust.
7594 (expand_vec_perm): Adjust.
7595 (shuffle_merge_patterns): Adjust.
7596 (shuffle_compress_patterns): Adjust.
7597 (shuffle_decompress_patterns): Adjust.
7598 (expand_load_store): Adjust.
7599 (expand_cond_len_op): Adjust.
7600 (expand_cond_len_unop): Adjust.
7601 (expand_cond_len_binop): Adjust.
7602 (expand_gather_scatter): Adjust.
7603 (expand_cond_len_ternop): Adjust.
7604 (expand_reduction): Adjust.
7605 (expand_lanes_load_store): Adjust.
7606 (expand_fold_extract_last): Adjust.
7607 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
7608 * config/riscv/vector.md: Adjust.
7610 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
7613 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
7614 load/store with length only on 64-bit Power10.
7616 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
7618 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
7619 SWAP option is enabled.
7620 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
7622 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
7624 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
7625 Use common insn for signed and unsigned front-end definitions.
7626 * config/arm/arm_mve_builtins.def
7627 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
7628 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
7629 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
7632 (mve_rot): Likewise.
7634 (VxCADDQ_M): Likewise.
7635 * config/arm/unspecs.md (unspec): Likewise.
7636 * config/arm/mve.md: Fix minor typo.
7638 2023-08-31 liuhongt <hongtao.liu@intel.com>
7640 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
7641 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
7642 (VF_AVX512HFBF16): Renamed to VHFBF.
7643 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
7644 (VF_AVX512FP16): Removed.
7645 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
7646 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
7647 (rsqrt<mode>2): Ditto.
7648 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
7649 (vcond<mode><code>): Ditto.
7650 (vcond<sseintvecmodelower><mode>): Ditto.
7651 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
7652 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
7653 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
7654 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
7655 (cmla<conj_op><mode>4): Ditto.
7656 (fma_<mode>_fadd_fmul): Ditto.
7657 (fma_<mode>_fadd_fcmul): Ditto.
7658 (fma_<complexopname>_<mode>_fma_zero): Ditto.
7659 (fma_<mode>_fmaddc_bcst): Ditto.
7660 (fma_<mode>_fcmaddc_bcst): Ditto.
7661 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
7662 (cmul<conj_op><mode>3): Ditto.
7663 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
7665 (vec_unpacks_lo_<mode>): Ditto.
7666 (vec_unpacks_hi_<mode>): Ditto.
7667 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7668 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7669 (*vec_extract<mode>_0): Ditto.
7670 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
7672 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7675 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
7677 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
7679 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
7680 (operator_minus::overflow_free_p): New declare.
7681 (operator_mult::overflow_free_p): New declare.
7682 * range-op.cc (range_op_handler::overflow_free_p): New function.
7683 (range_operator::overflow_free_p): New default function.
7684 (operator_plus::overflow_free_p): New function.
7685 (operator_minus::overflow_free_p): New function.
7686 (operator_mult::overflow_free_p): New function.
7687 * range-op.h (range_op_handler::overflow_free_p): New declare.
7688 (range_operator::overflow_free_p): New declare.
7689 * value-range.cc (irange::nonnegative_p): New function.
7690 (irange::nonpositive_p): New function.
7691 * value-range.h (irange::nonnegative_p): New declare.
7692 (irange::nonpositive_p): New declare.
7694 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
7697 * config/pru/predicates.md (const_0_operand): New predicate.
7698 (pru_cstore_comparison_operator): Ditto.
7699 * config/pru/pru.md (cstore<mode>4): New pattern.
7702 2023-08-30 Richard Biener <rguenther@suse.de>
7704 PR tree-optimization/111228
7705 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
7706 New simplifications.
7708 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7710 * config/riscv/autovec.md (movmisalign<mode>): Delete.
7712 2023-08-30 Die Li <lidie@eswincomputing.com>
7713 Fei Gao <gaofei@eswincomputing.com>
7715 * config/riscv/peephole.md: New pattern.
7716 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
7717 (zcmp_mv_sreg_operand): New predicate.
7718 * config/riscv/riscv.md: New predicate.
7719 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
7720 (*mvsa01<X:mode>): New pattern.
7722 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
7724 * config/riscv/riscv.cc
7725 (riscv_zcmp_can_use_popretz): true if popretz can be used
7726 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
7727 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
7728 * config/riscv/riscv.md: define A0_REGNUM
7729 * config/riscv/zc.md
7730 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
7731 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
7732 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
7733 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
7734 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
7735 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
7736 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
7737 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
7738 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
7739 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
7740 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
7741 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
7743 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
7745 * config/riscv/iterators.md
7746 (slot0_offset): slot 0 offset in stack GPRs area in bytes
7747 (slot1_offset): slot 1 offset in stack GPRs area in bytes
7748 (slot2_offset): likewise
7749 (slot3_offset): likewise
7750 (slot4_offset): likewise
7751 (slot5_offset): likewise
7752 (slot6_offset): likewise
7753 (slot7_offset): likewise
7754 (slot8_offset): likewise
7755 (slot9_offset): likewise
7756 (slot10_offset): likewise
7757 (slot11_offset): likewise
7758 (slot12_offset): likewise
7759 * config/riscv/predicates.md
7760 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
7761 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
7762 (stack_push_up_to_s1_operand): likewise
7763 (stack_push_up_to_s2_operand): likewise
7764 (stack_push_up_to_s3_operand): likewise
7765 (stack_push_up_to_s4_operand): likewise
7766 (stack_push_up_to_s5_operand): likewise
7767 (stack_push_up_to_s6_operand): likewise
7768 (stack_push_up_to_s7_operand): likewise
7769 (stack_push_up_to_s8_operand): likewise
7770 (stack_push_up_to_s9_operand): likewise
7771 (stack_push_up_to_s11_operand): likewise
7772 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
7773 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
7774 (stack_pop_up_to_s1_operand): likewise
7775 (stack_pop_up_to_s2_operand): likewise
7776 (stack_pop_up_to_s3_operand): likewise
7777 (stack_pop_up_to_s4_operand): likewise
7778 (stack_pop_up_to_s5_operand): likewise
7779 (stack_pop_up_to_s6_operand): likewise
7780 (stack_pop_up_to_s7_operand): likewise
7781 (stack_pop_up_to_s8_operand): likewise
7782 (stack_pop_up_to_s9_operand): likewise
7783 (stack_pop_up_to_s11_operand): likewise
7784 * config/riscv/riscv-protos.h
7785 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
7786 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
7787 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
7788 (riscv_use_multi_push): true if multi push is used
7789 (riscv_multi_push_sregs_count): num of sregs in multi-push
7790 (riscv_multi_push_regs_count): num of regs in multi-push
7791 (riscv_16bytes_align): align to 16 bytes
7792 (riscv_stack_align): moved to a better place
7793 (riscv_save_libcall_count): no functional change
7794 (riscv_compute_frame_info): add zcmp frame info
7795 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
7796 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
7797 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
7798 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
7799 (riscv_expand_prologue): allocate stack by cm.push
7800 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
7801 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
7802 (zcmp_base_adj): calculate stack adjustment base size
7803 (zcmp_additional_adj): calculate stack adjustment additional size
7804 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
7805 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
7816 (S10_MASK): likewise
7817 (S11_MASK): likewise
7818 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
7819 (ZCMP_MAX_SPIMM): max spimm value
7820 (ZCMP_SP_INC_STEP): zcmp sp increment step
7821 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
7822 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
7823 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
7824 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
7825 * config/riscv/riscv.md: include zc.md
7826 * config/riscv/zc.md: New file. machine description for zcmp
7828 2023-08-30 Jakub Jelinek <jakub@redhat.com>
7830 PR tree-optimization/110914
7831 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
7832 adjust_last_stmt unless len is known constant.
7834 2023-08-30 Jakub Jelinek <jakub@redhat.com>
7836 PR tree-optimization/111015
7837 * gimple-ssa-store-merging.cc
7838 (imm_store_chain_info::output_merged_store): Use wi::mask and
7839 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
7840 build_int_cst to build BIT_AND_EXPR mask.
7842 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7844 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
7845 (call_may_clobber_ref_p_1): Ditto.
7846 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
7847 (get_alias_ptr_type_for_ptr_address): Ditto.
7849 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7851 * config/riscv/riscv-vsetvl.cc
7852 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
7854 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7856 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
7857 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
7860 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
7862 * config/riscv/zicond.md: New splitters to rewrite single bit
7863 sign extension as the condition to a czero in the desired form.
7865 2023-08-29 David Malcolm <dmalcolm@redhat.com>
7868 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
7870 2023-08-29 David Malcolm <dmalcolm@redhat.com>
7873 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
7875 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
7877 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
7878 zvfh can generate zfa extended instruction fli.h, just like zfh.
7880 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
7881 Vineet Gupta <vineetg@rivosinc.com>
7883 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
7884 __riscv_unaligned_avoid with value 1 or
7885 __riscv_unaligned_slow with value 1 or
7886 __riscv_unaligned_fast with value 1
7887 * config/riscv/riscv.cc (riscv_option_override): Define
7888 riscv_user_wants_strict_align. Set
7889 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
7890 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
7892 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
7894 * config/riscv/autovec-vls.md: Update types
7895 * config/riscv/riscv.md: Add vector placeholder type
7896 * config/riscv/vector.md: Update types
7898 2023-08-29 Carl Love <cel@us.ibm.com>
7900 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
7901 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
7902 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
7903 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
7904 New buit-in definitions.
7905 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
7906 overloaded definition.
7907 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
7909 2023-08-29 Pan Li <pan2.li@intel.com>
7910 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7912 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
7913 (riscv_legitimize_const_move): Handle ref plus const poly.
7915 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7917 * common/config/riscv/riscv-common.cc
7918 (riscv_implied_info): Add implications from unprivileged extensions.
7919 (riscv_ext_version_table): Add stub support for all unprivileged
7920 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
7922 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7924 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7925 Add stub support for all vendor extensions supported by Binutils.
7927 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7929 * common/config/riscv/riscv-common.cc
7930 (riscv_implied_info): Add implications from privileged extensions.
7931 (riscv_ext_version_table): Add stub support for all privileged
7932 extensions supported by Binutils.
7934 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
7936 * config/riscv/autovec.md: Adjust
7937 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
7938 (get_vlmax_rtx): Exported.
7939 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
7940 (emit_vlmax_masked_gather_mu_insn): Adjust.
7941 (get_vlmax_rtx): New func.
7942 (expand_load_store): Adjust.
7943 (expand_cond_len_unop): Call expand_cond_len_op.
7944 (expand_cond_len_op): New subroutine.
7945 (expand_cond_len_binop): Call expand_cond_len_op.
7946 (expand_cond_len_ternop): Call expand_cond_len_op.
7947 (expand_lanes_load_store): Adjust.
7949 2023-08-29 Jakub Jelinek <jakub@redhat.com>
7952 PR middle-end/111209
7953 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
7954 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
7955 carry-out on higher limb. Don't match it though if it could be
7956 matched later on 4 argument addition/subtraction.
7958 2023-08-29 Andrew Pinski <apinski@marvell.com>
7960 PR tree-optimization/111147
7961 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
7962 instead of matching bit_not.
7964 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
7966 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
7969 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7971 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
7972 (pass_vsetvl::compute_local_properties): Fix bug.
7973 (pass_vsetvl::commit_vsetvls): Ditto.
7974 * config/riscv/riscv-vsetvl.h: New function.
7976 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
7979 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
7981 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
7982 force_reg mem target operand.
7983 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
7984 (*pred_mov<mode>): Remove imm -> reg pattern.
7985 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
7987 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
7989 * common/config/loongarch/loongarch-common.cc:
7990 Enable '-free' on O2 and above.
7991 * doc/invoke.texi: Modify the description information
7992 of the '-free' compilation option and add the LoongArch
7995 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
7997 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
7999 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
8001 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
8002 Implement the 'Zihintpause' extension, version 2.0.
8003 (riscv_ext_flag_table) Add 'Zihintpause' handling.
8004 * config/riscv/riscv-builtins.cc: Remove availability predicate
8005 "always" and add "hint_pause".
8006 (riscv_builtins) : Add "pause" extension.
8007 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
8008 * config/riscv/riscv.md (riscv_pause): Adjust output based on
8011 2023-08-28 Andrew Pinski <apinski@marvell.com>
8013 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
8014 instead of specifically checking for ~X.
8016 2023-08-28 Andrew Pinski <apinski@marvell.com>
8018 PR tree-optimization/111146
8019 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
8022 2023-08-28 Andrew Pinski <apinski@marvell.com>
8024 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
8025 when resimplify returns true.
8026 (match_simplify_replacement): Print only if accepted the match-and-simplify
8027 result rather than the full sequence.
8029 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8031 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
8033 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
8035 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8037 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
8039 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8041 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
8042 (vmulltq_poly): New.
8043 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
8044 (vmulltq_poly): New.
8045 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
8046 (vmulltq_poly): New.
8047 * config/arm/arm_mve.h (vmulltq_poly): Remove.
8048 (vmullbq_poly): Remove.
8049 (vmullbq_poly_m): Remove.
8050 (vmulltq_poly_m): Remove.
8051 (vmullbq_poly_x): Remove.
8052 (vmulltq_poly_x): Remove.
8053 (vmulltq_poly_p8): Remove.
8054 (vmullbq_poly_p8): Remove.
8055 (vmulltq_poly_p16): Remove.
8056 (vmullbq_poly_p16): Remove.
8057 (vmullbq_poly_m_p8): Remove.
8058 (vmullbq_poly_m_p16): Remove.
8059 (vmulltq_poly_m_p8): Remove.
8060 (vmulltq_poly_m_p16): Remove.
8061 (vmullbq_poly_x_p8): Remove.
8062 (vmullbq_poly_x_p16): Remove.
8063 (vmulltq_poly_x_p8): Remove.
8064 (vmulltq_poly_x_p16): Remove.
8065 (__arm_vmulltq_poly_p8): Remove.
8066 (__arm_vmullbq_poly_p8): Remove.
8067 (__arm_vmulltq_poly_p16): Remove.
8068 (__arm_vmullbq_poly_p16): Remove.
8069 (__arm_vmullbq_poly_m_p8): Remove.
8070 (__arm_vmullbq_poly_m_p16): Remove.
8071 (__arm_vmulltq_poly_m_p8): Remove.
8072 (__arm_vmulltq_poly_m_p16): Remove.
8073 (__arm_vmullbq_poly_x_p8): Remove.
8074 (__arm_vmullbq_poly_x_p16): Remove.
8075 (__arm_vmulltq_poly_x_p8): Remove.
8076 (__arm_vmulltq_poly_x_p16): Remove.
8077 (__arm_vmulltq_poly): Remove.
8078 (__arm_vmullbq_poly): Remove.
8079 (__arm_vmullbq_poly_m): Remove.
8080 (__arm_vmulltq_poly_m): Remove.
8081 (__arm_vmullbq_poly_x): Remove.
8082 (__arm_vmulltq_poly_x): Remove.
8084 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8086 * config/arm/arm-mve-builtins-functions.h (class
8087 unspec_mve_function_exact_insn_vmull_poly): New.
8089 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8091 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
8092 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
8094 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8096 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
8097 support for 'U' and 'p' format specifiers.
8099 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8101 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
8103 (TYPES_poly_8_16): New.
8105 * config/arm/arm-mve-builtins.def (p8): New type suffix.
8107 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
8109 (struct type_suffix_info): Add poly_p field.
8111 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8113 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
8115 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
8117 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
8119 * config/arm/arm_mve.h (vmulltq_int): Remove.
8120 (vmullbq_int): Remove.
8121 (vmullbq_int_m): Remove.
8122 (vmulltq_int_m): Remove.
8123 (vmullbq_int_x): Remove.
8124 (vmulltq_int_x): Remove.
8125 (vmulltq_int_u8): Remove.
8126 (vmullbq_int_u8): Remove.
8127 (vmulltq_int_s8): Remove.
8128 (vmullbq_int_s8): Remove.
8129 (vmulltq_int_u16): Remove.
8130 (vmullbq_int_u16): Remove.
8131 (vmulltq_int_s16): Remove.
8132 (vmullbq_int_s16): Remove.
8133 (vmulltq_int_u32): Remove.
8134 (vmullbq_int_u32): Remove.
8135 (vmulltq_int_s32): Remove.
8136 (vmullbq_int_s32): Remove.
8137 (vmullbq_int_m_s8): Remove.
8138 (vmullbq_int_m_s32): Remove.
8139 (vmullbq_int_m_s16): Remove.
8140 (vmullbq_int_m_u8): Remove.
8141 (vmullbq_int_m_u32): Remove.
8142 (vmullbq_int_m_u16): Remove.
8143 (vmulltq_int_m_s8): Remove.
8144 (vmulltq_int_m_s32): Remove.
8145 (vmulltq_int_m_s16): Remove.
8146 (vmulltq_int_m_u8): Remove.
8147 (vmulltq_int_m_u32): Remove.
8148 (vmulltq_int_m_u16): Remove.
8149 (vmullbq_int_x_s8): Remove.
8150 (vmullbq_int_x_s16): Remove.
8151 (vmullbq_int_x_s32): Remove.
8152 (vmullbq_int_x_u8): Remove.
8153 (vmullbq_int_x_u16): Remove.
8154 (vmullbq_int_x_u32): Remove.
8155 (vmulltq_int_x_s8): Remove.
8156 (vmulltq_int_x_s16): Remove.
8157 (vmulltq_int_x_s32): Remove.
8158 (vmulltq_int_x_u8): Remove.
8159 (vmulltq_int_x_u16): Remove.
8160 (vmulltq_int_x_u32): Remove.
8161 (__arm_vmulltq_int_u8): Remove.
8162 (__arm_vmullbq_int_u8): Remove.
8163 (__arm_vmulltq_int_s8): Remove.
8164 (__arm_vmullbq_int_s8): Remove.
8165 (__arm_vmulltq_int_u16): Remove.
8166 (__arm_vmullbq_int_u16): Remove.
8167 (__arm_vmulltq_int_s16): Remove.
8168 (__arm_vmullbq_int_s16): Remove.
8169 (__arm_vmulltq_int_u32): Remove.
8170 (__arm_vmullbq_int_u32): Remove.
8171 (__arm_vmulltq_int_s32): Remove.
8172 (__arm_vmullbq_int_s32): Remove.
8173 (__arm_vmullbq_int_m_s8): Remove.
8174 (__arm_vmullbq_int_m_s32): Remove.
8175 (__arm_vmullbq_int_m_s16): Remove.
8176 (__arm_vmullbq_int_m_u8): Remove.
8177 (__arm_vmullbq_int_m_u32): Remove.
8178 (__arm_vmullbq_int_m_u16): Remove.
8179 (__arm_vmulltq_int_m_s8): Remove.
8180 (__arm_vmulltq_int_m_s32): Remove.
8181 (__arm_vmulltq_int_m_s16): Remove.
8182 (__arm_vmulltq_int_m_u8): Remove.
8183 (__arm_vmulltq_int_m_u32): Remove.
8184 (__arm_vmulltq_int_m_u16): Remove.
8185 (__arm_vmullbq_int_x_s8): Remove.
8186 (__arm_vmullbq_int_x_s16): Remove.
8187 (__arm_vmullbq_int_x_s32): Remove.
8188 (__arm_vmullbq_int_x_u8): Remove.
8189 (__arm_vmullbq_int_x_u16): Remove.
8190 (__arm_vmullbq_int_x_u32): Remove.
8191 (__arm_vmulltq_int_x_s8): Remove.
8192 (__arm_vmulltq_int_x_s16): Remove.
8193 (__arm_vmulltq_int_x_s32): Remove.
8194 (__arm_vmulltq_int_x_u8): Remove.
8195 (__arm_vmulltq_int_x_u16): Remove.
8196 (__arm_vmulltq_int_x_u32): Remove.
8197 (__arm_vmulltq_int): Remove.
8198 (__arm_vmullbq_int): Remove.
8199 (__arm_vmullbq_int_m): Remove.
8200 (__arm_vmulltq_int_m): Remove.
8201 (__arm_vmullbq_int_x): Remove.
8202 (__arm_vmulltq_int_x): Remove.
8204 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8206 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
8207 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
8209 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8211 * config/arm/arm-mve-builtins-functions.h (class
8212 unspec_mve_function_exact_insn_vmull): New.
8214 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8216 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
8217 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
8219 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
8221 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
8222 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
8223 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
8224 (mve_vmulltq_int_<supf><mode>): Merge into ...
8225 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
8226 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
8227 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
8228 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
8229 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
8230 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
8231 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
8233 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8235 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
8238 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
8240 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
8241 (binary_acca_int64): Likewise.
8243 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
8245 * range-op-float.cc (fold_range): Handle relations.
8247 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
8249 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
8250 Optimize the function implementation.
8252 2023-08-28 liuhongt <hongtao.liu@intel.com>
8255 * config/i386/sse.md (V48_AVX2): Rename to ..
8256 (V48_128_256): .. this.
8257 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
8258 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
8259 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
8260 integral modes when TARGET_AVX2 is not available.
8261 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
8262 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
8264 (maskstore<mode><sseintvecmodelower>): Ditto.
8266 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8268 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
8270 (after_or_same_p): Ditto.
8271 (find_reg_killed_by): Delete.
8272 (has_vsetvl_killed_avl_p): Ditto.
8273 (anticipatable_occurrence_p): Refactor.
8274 (any_set_in_bb_p): Delete.
8275 (count_regno_occurrences): Ditto.
8276 (backward_propagate_worthwhile_p): Ditto.
8277 (demands_can_be_fused_p): Ditto.
8278 (earliest_pred_can_be_fused_p): New function.
8279 (vsetvl_dominated_by_p): Ditto.
8280 (vector_insn_info::parse_insn): Refactor.
8281 (vector_insn_info::merge): Refactor.
8282 (vector_insn_info::dump): Refactor.
8283 (vector_infos_manager::vector_infos_manager): Refactor.
8284 (vector_infos_manager::all_empty_predecessor_p): Delete.
8285 (vector_infos_manager::all_same_avl_p): Ditto.
8286 (vector_infos_manager::create_bitmap_vectors): Refactor.
8287 (vector_infos_manager::free_bitmap_vectors): Refactor.
8288 (vector_infos_manager::dump): Refactor.
8289 (pass_vsetvl::update_block_info): New function.
8290 (enum fusion_type): Ditto.
8291 (pass_vsetvl::get_backward_fusion_type): Delete.
8292 (pass_vsetvl::hard_empty_block_p): Ditto.
8293 (pass_vsetvl::backward_demand_fusion): Ditto.
8294 (pass_vsetvl::forward_demand_fusion): Ditto.
8295 (pass_vsetvl::demand_fusion): Ditto.
8296 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
8297 (pass_vsetvl::compute_local_properties): Ditto.
8298 (pass_vsetvl::earliest_fusion): New function.
8299 (pass_vsetvl::vsetvl_fusion): Ditto.
8300 (pass_vsetvl::commit_vsetvls): Refactor.
8301 (get_first_vsetvl_before_rvv_insns): Ditto.
8302 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
8303 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
8304 (pass_vsetvl::df_post_optimization): Refactor.
8305 (pass_vsetvl::lazy_vsetvl): Ditto.
8306 * config/riscv/riscv-vsetvl.h: Ditto.
8308 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8310 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
8311 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8312 (expand_fold_extract_last): New function.
8313 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
8314 (emit_cpop_insn): Ditto.
8315 (emit_nonvlmax_compress_insn): Ditto.
8316 (expand_fold_extract_last): Ditto.
8317 * config/riscv/vector.md: Fix vcpop.m ratio demand.
8319 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
8321 * config/riscv/sync-rvwmo.md: updated types to "multi" or
8322 "atomic" based on number of assembly lines generated
8323 * config/riscv/sync-ztso.md: likewise
8324 * config/riscv/sync.md: likewise
8326 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
8328 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
8330 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
8331 instructions FLI.H/S/D can load.
8332 * config/riscv/iterators.md (ceil): New.
8333 * config/riscv/riscv-opts.h (MASK_ZFA): New.
8335 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
8336 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
8337 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
8339 (riscv_const_insns): Likewise.
8340 (riscv_legitimize_const_move): Likewise.
8341 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
8343 (riscv_split_doubleword_move): Likewise.
8344 (riscv_output_move): Output the mov instructions in zfa extension.
8345 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
8347 (riscv_secondary_memory_needed): Likewise.
8348 * config/riscv/riscv.md (fminm<mode>3): New.
8349 (fmaxm<mode>3): New.
8350 (movsidf2_low_rv32): New.
8351 (movsidf2_high_rv32): New.
8352 (movdfsisi3_rv32): New.
8353 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
8354 * config/riscv/riscv.opt: New.
8356 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
8359 * omp-general.cc (omp_runtime_api_procname): New.
8360 (omp_runtime_api_call): Moved here from omp-low.cc, and make
8362 * omp-general.h: Include omp-api.h.
8363 * omp-low.cc (omp_runtime_api_call): Delete this copy.
8365 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
8367 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
8368 * doc/gimple.texi (GIMPLE instruction set): Add
8369 GIMPLE_OMP_STRUCTURED_BLOCK.
8370 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
8371 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
8372 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
8373 GIMPLE_OMP_STRUCTURED_BLOCK.
8374 (pp_gimple_stmt_1): Likewise.
8375 * gimple-walk.cc (walk_gimple_stmt): Likewise.
8376 * gimple.cc (gimple_build_omp_structured_block): New.
8377 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
8378 * gimple.h (gimple_build_omp_structured_block): Declare.
8379 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
8380 (CASE_GIMPLE_OMP): Likewise.
8381 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
8382 (gimplify_expr): Likewise.
8383 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
8384 GIMPLE_OMP_STRUCTURED_BLOCK.
8385 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
8386 (lower_omp_1): Likewise.
8387 (diagnose_sb_1): Likewise.
8388 (diagnose_sb_2): Likewise.
8389 * tree-inline.cc (remap_gimple_stmt): Handle
8390 GIMPLE_OMP_STRUCTURED_BLOCK.
8391 (estimate_num_insns): Likewise.
8392 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
8393 (convert_local_reference_stmt): Likewise.
8394 (convert_gimple_call): Likewise.
8395 * tree-pretty-print.cc (dump_generic_node): Handle
8396 OMP_STRUCTURED_BLOCK.
8397 * tree.def (OMP_STRUCTURED_BLOCK): New.
8398 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
8400 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
8402 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
8403 cost. Add some comments about different constants handling.
8405 2023-08-25 Andrew Pinski <apinski@marvell.com>
8407 * match.pd (`a ? one_zero : one_zero`): Move
8408 below detection of minmax.
8410 2023-08-25 Andrew Pinski <apinski@marvell.com>
8412 * match.pd (`a | C -> C`): New pattern.
8414 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
8416 * caller-save.cc (new_saved_hard_reg):
8417 Rename TRUE/FALSE to true/false.
8418 (setup_save_areas): Ditto.
8419 * gcc.cc (set_collect_gcc_options): Ditto.
8420 (driver::build_multilib_strings): Ditto.
8421 (print_multilib_info): Ditto.
8422 * genautomata.cc (gen_cpu_unit): Ditto.
8423 (gen_query_cpu_unit): Ditto.
8424 (gen_bypass): Ditto.
8425 (gen_excl_set): Ditto.
8426 (gen_presence_absence_set): Ditto.
8427 (gen_presence_set): Ditto.
8428 (gen_final_presence_set): Ditto.
8429 (gen_absence_set): Ditto.
8430 (gen_final_absence_set): Ditto.
8431 (gen_automaton): Ditto.
8432 (gen_regexp_repeat): Ditto.
8433 (gen_regexp_allof): Ditto.
8434 (gen_regexp_oneof): Ditto.
8435 (gen_regexp_sequence): Ditto.
8436 (process_decls): Ditto.
8437 (reserv_sets_are_intersected): Ditto.
8438 (initiate_excl_sets): Ditto.
8439 (form_reserv_sets_list): Ditto.
8440 (check_presence_pattern_sets): Ditto.
8441 (check_absence_pattern_sets): Ditto.
8442 (check_regexp_units_distribution): Ditto.
8443 (check_unit_distributions_to_automata): Ditto.
8444 (create_ainsns): Ditto.
8445 (output_insn_code_cases): Ditto.
8446 (output_internal_dead_lock_func): Ditto.
8447 (form_important_insn_automata_lists): Ditto.
8448 * gengtype-state.cc (read_state_files_list): Ditto.
8449 * gengtype.cc (main): Ditto.
8450 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
8452 * gimple.cc (gimple_build_call_from_tree): Ditto.
8453 (preprocess_case_label_vec_for_gimple): Ditto.
8454 * gimplify.cc (gimplify_call_expr): Ditto.
8455 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
8457 2023-08-25 Richard Biener <rguenther@suse.de>
8459 PR tree-optimization/111137
8460 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
8461 Properly handle grouped stores from other SLP instances.
8463 2023-08-25 Richard Biener <rguenther@suse.de>
8465 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
8466 Split out from vect_slp_analyze_node_dependences, remove
8468 (vect_slp_analyze_load_dependences): Split out from
8469 vect_slp_analyze_node_dependences, adjust comments. Process
8470 queued stores before any disambiguation.
8471 (vect_slp_analyze_node_dependences): Remove.
8472 (vect_slp_analyze_instance_dependence): Adjust.
8474 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
8476 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
8478 (operator_not_equal::fold_range): Adjust for relations.
8479 (operator_lt::fold_range): Same.
8480 (operator_gt::fold_range): Same.
8481 (foperator_unordered_equal::fold_range): Same.
8482 (foperator_unordered_lt::fold_range): Same.
8483 (foperator_unordered_le::fold_range): Same.
8484 (foperator_unordered_gt::fold_range): Same.
8485 (foperator_unordered_ge::fold_range): Same.
8487 2023-08-25 Richard Biener <rguenther@suse.de>
8489 PR tree-optimization/111136
8490 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
8491 stores force STMT_VINFO_STRIDED_P and also duplicate that
8494 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8496 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
8499 2023-08-25 liuhongt <hongtao.liu@intel.com>
8501 * config/i386/sse.md (vec_set<mode>): Removed.
8502 (V_128H): Merge into ..
8504 (V_256H): Merge into ..
8506 (V_512): Add V32HF, V32BF.
8507 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
8509 (vcond<mode><sseintvecmodelower>): Removed
8510 (vcondu<mode><sseintvecmodelower>): Removed.
8511 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
8513 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
8516 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
8517 Adjust paramter order.
8519 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
8522 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
8524 2023-08-24 David Malcolm <dmalcolm@redhat.com>
8527 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
8528 list of functions known to the analyzer.
8530 2023-08-24 Richard Biener <rguenther@suse.de>
8532 PR tree-optimization/111123
8533 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
8534 remove indirect clobbers here ...
8535 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
8536 (remove_indirect_clobbers): New function.
8538 2023-08-24 Jan Hubicka <jh@suse.cz>
8540 * cfg.h (struct control_flow_graph): New field full_profile.
8541 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
8542 * cfg.cc (init_flow): Set full_profile to false.
8543 * graphite.cc (graphite_transform_loops): Set full_profile to false.
8544 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
8545 * predict.cc (pass_profile::execute): Set full_profile to true.
8546 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
8547 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
8548 if full_profile is set.
8549 * tree-inline.cc (initialize_cfun): Initialize full_profile.
8550 (expand_call_inline): Combine full_profile.
8552 2023-08-24 Richard Biener <rguenther@suse.de>
8554 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
8555 load_p to ldst_p, fix mistakes and rely on
8556 STMT_VINFO_DATA_REF.
8558 2023-08-24 Jan Hubicka <jh@suse.cz>
8560 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
8561 of newly build trap bb.
8563 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8565 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
8566 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
8567 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
8569 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
8571 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
8572 * config/riscv/riscv.cc (riscv_option_override): Set sched
8575 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
8577 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
8579 2023-08-24 Richard Biener <rguenther@suse.de>
8581 PR tree-optimization/111125
8582 * tree-vect-slp.cc (vect_slp_function): Split at novector
8583 loop entry, do not push blocks in novector loops.
8585 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
8587 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
8589 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8591 * genmatch.cc (decision_tree::gen): Support
8592 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
8593 * gimple-match-exports.cc (gimple_simplify): Ditto.
8594 (gimple_resimplify6): New function.
8595 (gimple_resimplify7): New function.
8596 (gimple_match_op::resimplify): Support
8597 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
8598 (convert_conditional_op): Ditto.
8599 (build_call_internal): Ditto.
8600 (try_conditional_simplification): Ditto.
8601 (gimple_extract): Ditto.
8602 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
8603 * internal-fn.cc (CASE): Ditto.
8605 2023-08-24 Richard Biener <rguenther@suse.de>
8607 PR tree-optimization/111115
8608 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
8609 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
8611 * tree-vect-slp.cc (arg3_arg2_map): New.
8612 (vect_get_operand_map): Handle IFN_MASK_STORE.
8613 (vect_slp_child_index_for_operand): New function.
8614 (vect_build_slp_tree_1): Handle statements with no LHS,
8616 (vect_remove_slp_scalar_calls): Likewise.
8617 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
8618 SLP child corresponding to the ifn value index.
8619 (vectorizable_store): Likewise for the mask index. Support
8621 (vectorizable_load): Lookup the SLP child corresponding to the
8624 2023-08-24 Richard Biener <rguenther@suse.de>
8626 PR tree-optimization/111125
8627 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
8628 for the remain_defs processing.
8630 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
8632 * config/aarch64/aarch64.cc: Include ssa.h.
8633 (aarch64_multiply_add_p): Require the second operand of an
8634 Advanced SIMD subtraction to be a multiplication. Assume that
8635 such an operation won't be fused if the second operand is used
8636 multiple times and if the first operand is also a multiplication.
8638 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8640 * tree-vect-loop.cc (vectorizable_reduction): Apply
8641 LEN_FOLD_EXTRACT_LAST.
8642 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
8644 2023-08-24 Richard Biener <rguenther@suse.de>
8646 PR tree-optimization/111128
8647 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8648 Emit external shift operand inline if we promoted it with
8649 another pattern stmt.
8651 2023-08-24 Pan Li <pan2.li@intel.com>
8653 * config/riscv/autovec.md: Fix typo.
8655 2023-08-24 Pan Li <pan2.li@intel.com>
8657 * config/riscv/riscv-vector-builtins-bases.cc
8658 (class binop_frm): Removed.
8659 (class reverse_binop_frm): Ditto.
8660 (class widen_binop_frm): Ditto.
8661 (class vfmacc_frm): Ditto.
8662 (class vfnmacc_frm): Ditto.
8663 (class vfmsac_frm): Ditto.
8664 (class vfnmsac_frm): Ditto.
8665 (class vfmadd_frm): Ditto.
8666 (class vfnmadd_frm): Ditto.
8667 (class vfmsub_frm): Ditto.
8668 (class vfnmsub_frm): Ditto.
8669 (class vfwmacc_frm): Ditto.
8670 (class vfwnmacc_frm): Ditto.
8671 (class vfwmsac_frm): Ditto.
8672 (class vfwnmsac_frm): Ditto.
8673 (class unop_frm): Ditto.
8674 (class vfrec7_frm): Ditto.
8675 (class binop): Add frm_op_type template arg.
8676 (class unop): Ditto.
8677 (class widen_binop): Ditto.
8678 (class widen_binop_fp): Ditto.
8679 (class reverse_binop): Ditto.
8680 (class vfmacc): Ditto.
8681 (class vfnmsac): Ditto.
8682 (class vfmadd): Ditto.
8683 (class vfnmsub): Ditto.
8684 (class vfnmacc): Ditto.
8685 (class vfmsac): Ditto.
8686 (class vfnmadd): Ditto.
8687 (class vfmsub): Ditto.
8688 (class vfwmacc): Ditto.
8689 (class vfwnmacc): Ditto.
8690 (class vfwmsac): Ditto.
8691 (class vfwnmsac): Ditto.
8692 (class float_misc): Ditto.
8694 2023-08-24 Andrew Pinski <apinski@marvell.com>
8696 PR tree-optimization/111109
8697 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
8698 Add check to make sure cmp and icmp are inverse.
8700 2023-08-24 Andrew Pinski <apinski@marvell.com>
8702 PR tree-optimization/95929
8703 * match.pd (convert?(-a)): New pattern
8704 for 1bit integer types.
8706 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8709 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8711 * common/config/i386/cpuinfo.h (get_available_features):
8712 Add avx10_set and version and detect avx10.1.
8713 (cpu_indicator_init): Handle avx10.1-512.
8714 * common/config/i386/i386-common.cc
8715 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
8716 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
8717 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
8718 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
8719 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
8720 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
8722 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8723 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
8724 FEATURE_AVX10_512BIT.
8725 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8726 AVX10_512BIT, AVX10_1 and AVX10_1_512.
8727 * config/i386/constraints.md (Yk): Add AVX10_1.
8730 * config/i386/cpuid.h (bit_AVX10): New.
8731 (bit_AVX10_256): Ditto.
8732 (bit_AVX10_512): Ditto.
8733 * config/i386/i386-c.cc (ix86_target_macros_internal):
8734 Define AVX10_512BIT and AVX10_1.
8735 * config/i386/i386-isa.def
8736 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
8737 (AVX10_1): Add DEF_PTA(AVX10_1).
8738 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
8739 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
8741 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
8742 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
8743 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
8744 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
8745 (ix86_conditional_register_usage): Ditto.
8746 (ix86_hard_regno_mode_ok): Ditto.
8747 (ix86_rtx_costs): Ditto.
8748 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
8749 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
8751 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
8752 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
8753 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
8756 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8759 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8761 * common/config/i386/i386-common.cc
8762 (ix86_check_avx10): New function to check isa_flags and
8763 isa_flags_explicit to emit warning when AVX10 is enabled
8765 (ix86_check_avx512): New function to check isa_flags and
8766 isa_flags_explicit to emit warning when AVX512 is enabled
8768 (ix86_handle_option): Do not change the flags when warning
8770 * config/i386/driver-i386.cc (host_detect_local_cpu):
8771 Do not append -mno-avx10.1 for -march=native.
8773 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8776 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8778 * common/config/i386/i386-common.cc
8779 (ix86_check_avx10_vector_width): New function to check isa_flags
8780 to emit a warning when there is a conflict in AVX10 options for
8782 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
8783 * config/i386/driver-i386.cc (host_detect_local_cpu):
8784 Do not append -mno-avx10-max-512bit for -march=native.
8786 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8789 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8791 * config/i386/avx512vldqintrin.h: Remove target attribute.
8792 * config/i386/i386-builtin.def (BDESC):
8793 Add OPTION_MASK_ISA2_AVX10_1.
8794 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
8795 * config/i386/i386-expand.cc
8796 (ix86_check_builtin_isa_match): Ditto.
8797 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
8798 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
8799 and avx10_1_or_avx512vl.
8800 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
8801 (VF1_128_256VLDQ_AVX10_1): Ditto.
8802 (VI8_AVX512VLDQ_AVX10_1): Ditto.
8803 (<sse>_andnot<mode>3<mask_name>):
8804 Add TARGET_AVX10_1 and change isa attr from avx512dq to
8805 avx10_1_or_avx512dq.
8806 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
8807 avx512vl to avx10_1_or_avx512vl.
8808 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
8809 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8810 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8812 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8814 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
8815 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8816 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8818 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8819 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
8820 Remove target check.
8821 (avx512dq_mul<mode>3<mask_name>): Ditto.
8822 (*avx512dq_mul<mode>3<mask_name>): Ditto.
8823 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8824 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
8825 Remove target check.
8826 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8827 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
8828 Remove target check.
8829 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
8830 (mask_avx512vl_condition): Ditto.
8833 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8836 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8838 * config/i386/avx512vldqintrin.h: Remove target attribute.
8839 * config/i386/i386-builtin.def (BDESC):
8840 Add OPTION_MASK_ISA2_AVX10_1.
8841 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
8842 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
8843 (VI48_AVX512VLDQ_AVX10_1): Ditto.
8844 (VF2_AVX512VL): Remove.
8845 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
8847 (*<code><mode>3<mask_name>): Change isa attribute to
8848 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
8849 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
8850 to avx10_1_or_avx512vl.
8851 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
8852 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8853 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
8855 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
8856 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8857 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
8859 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
8860 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8861 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
8862 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8863 (float<floatunssuffix>v4div4sf2<mask_name>):
8865 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8866 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8867 (float<floatunssuffix>v2div2sf2): Ditto.
8868 (float<floatunssuffix>v2div2sf2_mask): Ditto.
8869 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
8870 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
8871 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
8872 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
8873 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8874 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
8875 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
8876 Change when constraint is enabled.
8878 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8881 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8883 * config/i386/avx512vldqintrin.h: Remove target attribute.
8884 * config/i386/i386-builtin.def (BDESC):
8885 Add OPTION_MASK_ISA2_AVX10_1.
8886 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
8887 (VFH_AVX512VLDQ_AVX10_1): Ditto.
8888 (VF1_AVX512VLDQ_AVX10_1): Ditto.
8889 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
8890 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8891 (vec_pack<floatprefix>_float_<mode>): Change iterator to
8892 VI8_AVX512VLDQ_AVX10_1. Remove target check.
8893 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
8894 VF1_AVX512VLDQ_AVX10_1. Remove target check.
8895 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8896 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
8897 (avx512vl_vextractf128<mode>): Change iterator to
8898 VI48F_256_DQVL_AVX10_1. Remove target check.
8899 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
8900 (vec_extract_hi_<mode>): Ditto.
8901 (avx512vl_vinsert<mode>): Ditto.
8902 (vec_set_lo_<mode><mask_name>): Ditto.
8903 (vec_set_hi_<mode><mask_name>): Ditto.
8904 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
8905 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
8906 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
8907 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8908 * config/i386/subst.md (mask_avx512dq_condition): Add
8910 (mask_scalar_merge): Ditto.
8912 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8915 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
8918 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
8921 2023-08-24 Richard Biener <rguenther@suse.de>
8924 * dwarf2out.cc (prune_unused_types_walk): Handle
8925 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
8926 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
8927 and DW_TAG_dynamic_type as to only output them when referenced.
8929 2023-08-24 liuhongt <hongtao.liu@intel.com>
8931 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
8934 2023-08-24 liuhongt <hongtao.liu@intel.com>
8936 * common/config/i386/i386-common.cc (processor_names): Add new
8937 member graniterapids-s and arrowlake-s.
8938 * config/i386/i386-options.cc (processor_alias_table): Update
8939 table with PROCESSOR_ARROWLAKE_S and
8940 PROCESSOR_GRANITERAPIDS_D.
8941 (m_GRANITERAPID_D): New macro.
8942 (m_ARROWLAKE_S): Ditto.
8943 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
8944 (processor_cost_table): Add icelake_cost for
8945 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
8946 PROCESSOR_ARROWLAKE_S.
8947 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
8949 * config/i386/i386.h (enum processor_type): Add new member
8950 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
8951 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
8952 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
8954 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
8956 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
8957 to help simplify code further.
8959 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
8961 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
8962 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
8963 Initialize using a range instead of value and edge.
8964 (phi_group::calculate_using_modifier): Use initializer value and
8965 process for relations after trying for iteration convergence.
8966 (phi_group::refine_using_relation): Use initializer range.
8967 (phi_group::dump): Rework the dump output.
8968 (phi_analyzer::process_phi): Allow multiple constant initilizers.
8969 Dump groups immediately as created.
8970 (phi_analyzer::dump): Tweak output.
8971 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
8972 (phi_group::initial_value): Delete.
8973 (phi_group::refine_using_relation): Adjust prototype.
8974 (phi_group::m_initial_value): Delete.
8975 (phi_group::m_initial_edge): Delete.
8976 (phi_group::m_vr): Use int_range_max.
8977 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
8979 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
8981 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
8982 no group was created.
8983 (phi_analyzer::process_phi): Do not create groups of one phi node.
8985 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
8987 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
8988 CODE, CMP_CODE and BIT_CODE arguments.
8989 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
8990 (aarch64_gen_ccmp_next): Likewise.
8991 * doc/tm.texi: Regenerated.
8993 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
8995 * coretypes.h (rtx_code): Add forward declaration.
8996 * rtl.h (rtx_code): Make compatible with forward declaration.
8998 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
9001 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
9002 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
9003 DWIH mode iterator. Disable (=&r,m,m) alternative for
9005 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
9006 alternative for 32-bit targets.
9008 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
9010 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
9011 appropriate type attribute.
9013 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
9015 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
9016 (*copysign<mode>_neg): Ditto.
9017 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
9018 (<optab><mode>2): Ditto.
9019 (cond_<optab><mode>): New.
9020 (cond_len_<optab><mode>): Ditto.
9021 * config/riscv/riscv-protos.h (enum insn_type): New.
9022 (expand_cond_len_unop): New helper func.
9023 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
9024 (expand_cond_len_unop): New helper func.
9026 2023-08-23 Jan Hubicka <jh@suse.cz>
9028 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
9029 (should_duplicate_loop_header_p): Fix return value for static exits.
9030 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
9032 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
9034 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
9035 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
9036 and update the final nest accordingly.
9038 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
9040 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
9041 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
9042 and update the final nest accordingly.
9044 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
9046 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
9047 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
9048 gvec_oprnds with auto_delete_vec.
9050 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9052 * config/riscv/riscv-vsetvl.cc
9053 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
9055 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9057 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
9059 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
9061 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9063 * config/riscv/vector.md: Add attribute.
9065 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9067 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
9068 (vector_infos_manager::all_same_ratio_p): Ditto.
9069 (vector_infos_manager::all_same_avl_p): Ditto.
9070 (pass_vsetvl::refine_vsetvls): Ditto.
9071 (pass_vsetvl::cleanup_vsetvls): Ditto.
9072 (pass_vsetvl::commit_vsetvls): Ditto.
9073 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
9074 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
9075 (pass_vsetvl::compute_probabilities): Ditto.
9077 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9079 * config/riscv/t-riscv: Add riscv-vsetvl.def
9081 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
9083 * config/riscv/riscv.opt: Add --param names
9084 riscv-autovec-preference and riscv-autovec-lmul
9086 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
9088 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
9090 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
9092 * tree-core.h (enum omp_clause_defaultmap_kind): Add
9093 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
9094 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
9095 * tree-pretty-print.cc (dump_omp_clause): Likewise.
9097 2023-08-22 Jakub Jelinek <jakub@redhat.com>
9100 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
9101 types aren't supported in C++.
9103 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9105 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
9106 * internal-fn.cc (fold_len_extract_direct): Ditto.
9107 (expand_fold_len_extract_optab_fn): Ditto.
9108 (direct_fold_len_extract_optab_supported_p): Ditto.
9109 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
9110 * optabs.def (OPTAB_D): Ditto.
9112 2023-08-22 Richard Biener <rguenther@suse.de>
9114 * tree-vect-stmts.cc (vectorizable_store): Do not bump
9115 DR_GROUP_STORE_COUNT here. Remove early out.
9116 (vect_transform_stmt): Only call vectorizable_store on
9117 the last element of an interleaving chain.
9119 2023-08-22 Richard Biener <rguenther@suse.de>
9121 PR tree-optimization/94864
9122 PR tree-optimization/94865
9123 PR tree-optimization/93080
9124 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
9125 for vector insertion from vector extraction.
9127 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9128 Kewen.Lin <linkw@linux.ibm.com>
9130 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
9131 (vectorizable_live_operation): Add live vectorization for length loop
9134 2023-08-22 David Malcolm <dmalcolm@redhat.com>
9137 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
9139 2023-08-22 Pan Li <pan2.li@intel.com>
9141 * config/riscv/riscv-vector-builtins-bases.cc
9142 (vfwredusum_frm_obj): New declaration.
9144 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9145 * config/riscv/riscv-vector-builtins-functions.def
9146 (vfwredusum_frm): New intrinsic function def.
9148 2023-08-21 David Faust <david.faust@oracle.com>
9150 * config/bpf/bpf.md (neg): Second operand must be a register.
9152 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
9154 * config/riscv/bitmanip.md: Added bitmanip type to insns
9155 that are missing types.
9157 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
9159 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
9162 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
9164 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
9165 Fix format specifier.
9167 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
9169 * value-range.cc (frange::union_nans): Return false if nothing
9171 (range_tests_floats): New test.
9173 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
9175 PR tree-optimization/111048
9176 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
9178 (fold_vec_perm_cst): Remove workaround and again call
9179 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
9180 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
9182 2023-08-21 Richard Biener <rguenther@suse.de>
9184 PR tree-optimization/111082
9185 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
9186 pun operations that can overflow.
9188 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9190 * lcm.cc (compute_antinout_edge): Export as global use.
9191 (compute_earliest): Ditto.
9192 (compute_rev_insert_delete): Ditto.
9193 * lcm.h (compute_antinout_edge): Ditto.
9194 (compute_earliest): Ditto.
9196 2023-08-21 Richard Biener <rguenther@suse.de>
9198 PR tree-optimization/111070
9199 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
9200 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
9202 2023-08-21 Andrew Pinski <apinski@marvell.com>
9204 PR tree-optimization/111002
9205 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
9207 2023-08-21 liuhongt <hongtao.liu@intel.com>
9209 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
9211 * common/config/i386/i386-common.cc (alias_table): Support
9212 -march=gracemont as an alias of -march=alderlake.
9214 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
9216 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
9217 instead of src in the call to ix86_expand_sse_cmp.
9218 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
9219 force operands[1] to a register.
9220 (<any_extend:insn>v4hiv4si2): Ditto.
9221 (<any_extend:insn>v2siv2di2): Ditto.
9223 2023-08-20 Andrew Pinski <apinski@marvell.com>
9225 PR tree-optimization/111006
9226 PR tree-optimization/110986
9227 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
9229 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
9232 * Makefile.in: improve error message when /usr/include is
9235 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
9237 PR middle-end/111017
9238 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
9239 to expand_omp_build_cond for 'factor != 0' condition, resulting
9240 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
9242 2023-08-19 Guo Jie <guojie@loongson.cn>
9243 Lulu Cheng <chenglulu@loongson.cn>
9245 * config/loongarch/t-loongarch: Add loongarch-driver.h into
9246 TM_H. Add loongarch-def.h and loongarch-tune.h into
9249 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
9252 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
9253 Also handle V2QImode.
9254 (ix86_expand_sse_extend): New function.
9255 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
9256 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
9257 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
9258 (<any_extend:insn>v2hiv2si2): Ditto.
9259 (<any_extend:insn>v2qiv2hi2): Ditto.
9260 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
9261 (<any_extend:insn>v4hiv4si2): Ditto.
9262 (<any_extend:insn>v2siv2di2): Ditto.
9264 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
9267 * value-range.cc (irange::union_bitmask): Return FALSE if updated
9268 bitmask is semantically equivalent to the original mask.
9269 (irange::intersect_bitmask): Same.
9270 (irange::get_bitmask): Add comment.
9272 2023-08-18 Richard Biener <rguenther@suse.de>
9274 PR tree-optimization/111019
9275 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
9276 also scrap base and offset in case the ref is indirect.
9278 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
9280 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
9282 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
9285 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
9287 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
9289 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
9291 (vectorizable_store): ... here.
9293 2023-08-18 Richard Biener <rguenther@suse.de>
9295 PR tree-optimization/111048
9296 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
9299 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
9302 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
9305 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
9307 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
9308 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
9309 and update the final nest accordingly.
9311 2023-08-18 Andrew Pinski <apinski@marvell.com>
9313 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
9314 cond_len_neg and cond_len_one_cmpl.
9316 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
9318 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
9319 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
9320 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
9321 (*local_pic_load_32d<ANYF:mode>): Ditto.
9322 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
9323 (*local_pic_store<ANYF:mode>): Ditto.
9324 (*local_pic_store<ANYLSF:mode>): Ditto.
9325 (*local_pic_store_32d<ANYF:mode>): Ditto.
9326 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
9328 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
9329 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9331 * config/riscv/predicates.md (vector_const_0_operand): New.
9332 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
9334 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
9336 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
9339 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
9341 PR tree-optimization/111009
9342 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
9344 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
9346 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
9347 slots_num initialization from here ...
9348 (lra_spill): ... to here before the 1st call of
9349 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
9352 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
9355 * doc/invoke.texi (Option Summary): Mention
9356 -Wcompare-distinct-pointer-types under `Warning Options'.
9357 (Warning Options): Document -Wcompare-distinct-pointer-types.
9359 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
9361 * recog.cc (memory_address_addr_space_p): Mark possibly unused
9364 2023-08-17 Richard Biener <rguenther@suse.de>
9366 PR tree-optimization/111039
9367 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
9368 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
9370 2023-08-17 Alex Coplan <alex.coplan@arm.com>
9372 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
9374 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
9377 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
9378 `naked' function attribute.
9379 (bpf_warn_func_return): New function.
9380 (TARGET_WARN_FUNC_RETURN): Define.
9381 (bpf_expand_prologue): Add preventive comment.
9382 (bpf_expand_epilogue): Likewise.
9383 * doc/extend.texi (BPF Function Attributes): Document the `naked'
9386 2023-08-17 Richard Biener <rguenther@suse.de>
9388 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
9389 !needs_fold_left_reduction_p to decide whether we can
9390 handle the reduction with association.
9391 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
9392 reductions perform all arithmetic in an unsigned type.
9394 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
9396 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
9398 * configure: Regenerate.
9400 2023-08-17 Pan Li <pan2.li@intel.com>
9402 * config/riscv/riscv-vector-builtins-bases.cc
9403 (widen_freducop): Add frm_opt_type template arg.
9404 (vfwredosum_frm_obj): New declaration.
9406 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9407 * config/riscv/riscv-vector-builtins-functions.def
9408 (vfwredosum_frm): New intrinsic function def.
9410 2023-08-17 Pan Li <pan2.li@intel.com>
9412 * config/riscv/riscv-vector-builtins-bases.cc
9413 (vfredosum_frm_obj): New declaration.
9415 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9416 * config/riscv/riscv-vector-builtins-functions.def
9417 (vfredosum_frm): New intrinsic function def.
9419 2023-08-17 Pan Li <pan2.li@intel.com>
9421 * config/riscv/riscv-vector-builtins-bases.cc
9422 (class freducop): Add frm_op_type template arg.
9423 (vfredusum_frm_obj): New declaration.
9425 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9426 * config/riscv/riscv-vector-builtins-functions.def
9427 (vfredusum_frm): New intrinsic function def.
9428 * config/riscv/riscv-vector-builtins-shapes.cc
9429 (struct reduc_alu_frm_def): New class for frm shape.
9430 (SHAPE): New declaration.
9431 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
9433 2023-08-17 Pan Li <pan2.li@intel.com>
9435 * config/riscv/riscv-vector-builtins-bases.cc
9436 (class vfncvt_f): Add frm_op_type template arg.
9437 (vfncvt_f_frm_obj): New declaration.
9439 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9440 * config/riscv/riscv-vector-builtins-functions.def
9441 (vfncvt_f_frm): New intrinsic function def.
9443 2023-08-17 Pan Li <pan2.li@intel.com>
9445 * config/riscv/riscv-vector-builtins-bases.cc
9446 (vfncvt_xu_frm_obj): New declaration.
9448 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9449 * config/riscv/riscv-vector-builtins-functions.def
9450 (vfncvt_xu_frm): New intrinsic function def.
9452 2023-08-17 Pan Li <pan2.li@intel.com>
9454 * config/riscv/riscv-vector-builtins-bases.cc
9455 (class vfncvt_x): Add frm_op_type template arg.
9456 (BASE): New declaration.
9457 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9458 * config/riscv/riscv-vector-builtins-functions.def
9459 (vfncvt_x_frm): New intrinsic function def.
9460 * config/riscv/riscv-vector-builtins-shapes.cc
9461 (struct narrow_alu_frm_def): New shape function for frm.
9462 (SHAPE): New declaration.
9463 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
9465 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9467 * config/i386/avx512vldqintrin.h: Remove target attribute.
9468 * config/i386/i386-builtin.def (BDESC):
9469 Add OPTION_MASK_ISA2_AVX10_1.
9470 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
9471 (VFH_AVX512VLDQ_AVX10_1): Ditto.
9472 (VF1_AVX512VLDQ_AVX10_1): Ditto.
9473 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
9474 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
9475 (vec_pack<floatprefix>_float_<mode>): Change iterator to
9476 VI8_AVX512VLDQ_AVX10_1. Remove target check.
9477 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
9478 VF1_AVX512VLDQ_AVX10_1. Remove target check.
9479 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
9480 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
9481 (avx512vl_vextractf128<mode>): Change iterator to
9482 VI48F_256_DQVL_AVX10_1. Remove target check.
9483 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
9484 (vec_extract_hi_<mode>): Ditto.
9485 (avx512vl_vinsert<mode>): Ditto.
9486 (vec_set_lo_<mode><mask_name>): Ditto.
9487 (vec_set_hi_<mode><mask_name>): Ditto.
9488 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
9489 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
9490 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
9491 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
9492 * config/i386/subst.md (mask_avx512dq_condition): Add
9494 (mask_scalar_merge): Ditto.
9496 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9498 * config/i386/avx512vldqintrin.h: Remove target attribute.
9499 * config/i386/i386-builtin.def (BDESC):
9500 Add OPTION_MASK_ISA2_AVX10_1.
9501 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
9502 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
9503 (VI48_AVX512VLDQ_AVX10_1): Ditto.
9504 (VF2_AVX512VL): Remove.
9505 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
9507 (*<code><mode>3<mask_name>): Change isa attribute to
9508 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
9509 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
9510 to avx10_1_or_avx512vl.
9511 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
9512 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
9513 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
9515 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
9516 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
9517 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
9519 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
9520 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
9521 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
9522 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
9523 (float<floatunssuffix>v4div4sf2<mask_name>):
9525 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
9526 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
9527 (float<floatunssuffix>v2div2sf2): Ditto.
9528 (float<floatunssuffix>v2div2sf2_mask): Ditto.
9529 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
9530 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
9531 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
9532 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
9533 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
9534 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
9535 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
9536 Change when constraint is enabled.
9538 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9541 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
9542 (second_sew_less_than_first_sew_p): Fix bug.
9543 (first_sew_less_than_second_sew_p): Ditto.
9545 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9547 * config/i386/avx512vldqintrin.h: Remove target attribute.
9548 * config/i386/i386-builtin.def (BDESC):
9549 Add OPTION_MASK_ISA2_AVX10_1.
9550 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
9551 * config/i386/i386-expand.cc
9552 (ix86_check_builtin_isa_match): Ditto.
9553 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
9554 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
9555 and avx10_1_or_avx512vl.
9556 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
9557 (VF1_128_256VLDQ_AVX10_1): Ditto.
9558 (VI8_AVX512VLDQ_AVX10_1): Ditto.
9559 (<sse>_andnot<mode>3<mask_name>):
9560 Add TARGET_AVX10_1 and change isa attr from avx512dq to
9561 avx10_1_or_avx512dq.
9562 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
9563 avx512vl to avx10_1_or_avx512vl.
9564 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
9565 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
9566 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
9568 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
9570 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
9571 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
9572 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
9574 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
9575 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
9576 Remove target check.
9577 (avx512dq_mul<mode>3<mask_name>): Ditto.
9578 (*avx512dq_mul<mode>3<mask_name>): Ditto.
9579 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
9580 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
9581 Remove target check.
9582 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
9583 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
9584 Remove target check.
9585 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
9586 (mask_avx512vl_condition): Ditto.
9589 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9591 * common/config/i386/i386-common.cc
9592 (ix86_check_avx10_vector_width): New function to check isa_flags
9593 to emit a warning when there is a conflict in AVX10 options for
9595 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
9596 * config/i386/driver-i386.cc (host_detect_local_cpu):
9597 Do not append -mno-avx10-max-512bit for -march=native.
9599 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9601 * common/config/i386/i386-common.cc
9602 (ix86_check_avx10): New function to check isa_flags and
9603 isa_flags_explicit to emit warning when AVX10 is enabled
9605 (ix86_check_avx512): New function to check isa_flags and
9606 isa_flags_explicit to emit warning when AVX512 is enabled
9608 (ix86_handle_option): Do not change the flags when warning
9610 * config/i386/driver-i386.cc (host_detect_local_cpu):
9611 Do not append -mno-avx10.1 for -march=native.
9613 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9615 * common/config/i386/cpuinfo.h (get_available_features):
9616 Add avx10_set and version and detect avx10.1.
9617 (cpu_indicator_init): Handle avx10.1-512.
9618 * common/config/i386/i386-common.cc
9619 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
9620 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
9621 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
9622 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
9623 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
9624 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
9626 * common/config/i386/i386-cpuinfo.h (enum processor_features):
9627 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
9628 FEATURE_AVX10_512BIT.
9629 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
9630 AVX10_512BIT, AVX10_1 and AVX10_1_512.
9631 * config/i386/constraints.md (Yk): Add AVX10_1.
9634 * config/i386/cpuid.h (bit_AVX10): New.
9635 (bit_AVX10_256): Ditto.
9636 (bit_AVX10_512): Ditto.
9637 * config/i386/i386-c.cc (ix86_target_macros_internal):
9638 Define AVX10_512BIT and AVX10_1.
9639 * config/i386/i386-isa.def
9640 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
9641 (AVX10_1): Add DEF_PTA(AVX10_1).
9642 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
9643 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
9645 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
9646 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
9647 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
9648 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
9649 (ix86_conditional_register_usage): Ditto.
9650 (ix86_hard_regno_mode_ok): Ditto.
9651 (ix86_rtx_costs): Ditto.
9652 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
9653 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
9655 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
9656 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
9657 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
9660 2023-08-17 Sergei Trofimovich <siarheit@google.com>
9662 * flag-types.h (vrp_mode): Remove unused.
9664 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
9666 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
9669 2023-08-17 Andrew Pinski <apinski@marvell.com>
9671 * internal-fn.def (COND_NOT): New internal function.
9672 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
9674 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
9675 into conditional not.
9676 * optabs.def (cond_one_cmpl): New optab.
9677 (cond_len_one_cmpl): Likewise.
9679 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
9681 PR rtl-optimization/110254
9682 * ira-color.cc (improve_allocation): Update array
9683 allocated_hard_reg_p.
9685 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
9687 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
9688 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
9689 (lra_update_fp2sp_elimination): Ditto.
9690 (update_reg_eliminate): Adjust spill_pseudos call.
9691 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
9692 in lra_update_fp2sp_elimination.
9694 2023-08-16 Richard Ball <richard.ball@arm.com>
9696 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
9697 * config/aarch64/aarch64-tune.md: Regenerate.
9698 * doc/invoke.texi: Document Cortex-A720 CPU.
9700 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
9702 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
9704 (<u>avg<v_double_trunc>3_ceil): Ditto.
9705 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
9708 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
9710 * internal-fn.cc (vec_extract_direct): Change type argument
9712 (expand_vec_extract_optab_fn): Call convert_optab_fn.
9713 (direct_vec_extract_optab_supported_p): Use
9714 convert_optab_supported_p.
9716 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
9717 Richard Sandiford <richard.sandiford@arm.com>
9719 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
9720 (valid_mask_for_fold_vec_perm_cst_p): New function.
9721 (fold_vec_perm_cst): Likewise.
9722 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
9723 (test_fold_vec_perm_cst): New namespace.
9724 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
9725 (test_fold_vec_perm_cst::validate_res): Likewise.
9726 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
9727 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
9728 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
9729 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
9730 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
9731 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
9732 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
9733 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
9734 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
9735 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
9736 (test_fold_vec_perm_cst::test): Likewise.
9737 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
9739 2023-08-16 Pan Li <pan2.li@intel.com>
9741 * config/riscv/riscv-vector-builtins-bases.cc
9742 (BASE): New declaration.
9743 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9744 * config/riscv/riscv-vector-builtins-functions.def
9745 (vfwcvt_xu_frm): New intrinsic function def.
9747 2023-08-16 Pan Li <pan2.li@intel.com>
9749 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
9751 2023-08-16 Pan Li <pan2.li@intel.com>
9753 * config/riscv/riscv-vector-builtins-bases.cc
9754 (BASE): New declaration.
9755 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9756 * config/riscv/riscv-vector-builtins-functions.def
9757 (vfwcvt_x_frm): New intrinsic function def.
9759 2023-08-16 Pan Li <pan2.li@intel.com>
9761 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
9762 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9763 * config/riscv/riscv-vector-builtins-functions.def
9764 (vfcvt_f_frm): New intrinsic function def.
9766 2023-08-16 Pan Li <pan2.li@intel.com>
9768 * config/riscv/riscv-vector-builtins-bases.cc
9769 (BASE): New declaration.
9770 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9771 * config/riscv/riscv-vector-builtins-functions.def
9772 (vfcvt_xu_frm): New intrinsic function def..
9774 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
9777 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
9778 extract when the element is 7 on BE while 8 on LE for byte or 3 on
9779 BE while 4 on LE for halfword.
9781 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
9784 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
9786 (vsx_extract_v4si): New expand for V4SI extraction.
9787 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
9788 word 1 from BE order.
9789 (*mfvsrwz): New insn pattern for mfvsrwz.
9790 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
9791 word 1 from BE order.
9792 (*vsx_extract_si): Remove.
9793 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
9796 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9798 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
9800 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
9801 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
9802 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
9803 (expand_lanes_load_store): New function.
9804 * config/riscv/vector-iterators.md: New iterator.
9806 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9808 * internal-fn.cc (internal_load_fn_p): Apply
9809 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
9810 (internal_store_fn_p): Ditto.
9811 (internal_fn_len_index): Ditto.
9812 (internal_fn_mask_index): Ditto.
9813 (internal_fn_stored_value_index): Ditto.
9814 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
9815 (vect_load_lanes_supported): Ditto.
9816 * tree-vect-loop.cc: Ditto.
9817 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
9818 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9819 (get_group_load_store_type): Ditto.
9820 (vectorizable_store): Ditto.
9821 (vectorizable_load): Ditto.
9822 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
9823 (vect_load_lanes_supported): Ditto.
9825 2023-08-16 Pan Li <pan2.li@intel.com>
9827 * config/riscv/riscv-vector-builtins-bases.cc
9828 (enum frm_op_type): New type for frm.
9829 (BASE): New declaration.
9830 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9831 * config/riscv/riscv-vector-builtins-functions.def
9832 (vfcvt_x_frm): New intrinsic function def.
9834 2023-08-16 liuhongt <hongtao.liu@intel.com>
9836 * config/i386/i386-builtins.cc
9837 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
9838 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
9839 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
9840 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
9841 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
9842 for use_scatter_8parts
9843 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
9844 (TARGET_USE_GATHER_8PARTS): .. this.
9845 (TARGET_USE_SCATTER): Rename to ..
9846 (TARGET_USE_SCATTER_8PARTS): .. this.
9847 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
9848 (X86_TUNE_USE_GATHER_8PARTS): .. this.
9849 (X86_TUNE_USE_SCATTER): Rename to
9850 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
9851 * config/i386/i386.opt: Add new options mgather, mscatter.
9853 2023-08-16 liuhongt <hongtao.liu@intel.com>
9855 * config/i386/i386-options.cc (m_GDS): New macro.
9856 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
9858 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
9859 (X86_TUNE_USE_GATHER): Ditto.
9861 2023-08-16 liuhongt <hongtao.liu@intel.com>
9863 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
9864 vmovsd when moving DFmode between SSE_REGS.
9865 (movhi_internal): Generate vmovdqa instead of vmovsh when
9866 moving HImode between SSE_REGS.
9867 (mov<mode>_internal): Use vmovaps instead of vmovsh when
9868 moving HF/BFmode between SSE_REGS.
9870 2023-08-15 David Faust <david.faust@oracle.com>
9872 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
9874 2023-08-15 David Faust <david.faust@oracle.com>
9877 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
9878 for any mode 32-bits or smaller, not just SImode.
9880 2023-08-15 Martin Jambor <mjambor@suse.cz>
9884 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
9885 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
9886 (ipcp_transform_function): Do not deallocate transformation info.
9887 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
9889 (vn_reference_lookup_2): When hitting default-def vuse, query
9890 IPA-CP transformation info for any known constants.
9892 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
9893 Thomas Schwinge <thomas@codesourcery.com>
9895 * gimplify.cc (oacc_region_type_name): New function.
9896 (oacc_default_clause): If no 'default' clause appears on this
9897 compute construct, see if one appears on a lexically containing
9899 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
9900 ctx->oacc_default_clause_ctx to current context.
9902 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9905 * config/riscv/predicates.md: Fix predicate.
9907 2023-08-15 Richard Biener <rguenther@suse.de>
9909 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
9910 slp_inst_kind_ctor handling.
9911 (vect_analyze_slp): Simplify.
9912 (vect_build_slp_instance): Dump when we analyze a CTOR.
9913 (vect_slp_check_for_constructors): Rename to ...
9914 (vect_slp_check_for_roots): ... this. Register a
9915 slp_root for CONSTRUCTORs instead of shoving them to
9916 the set of grouped stores.
9917 (vect_slp_analyze_bb_1): Adjust.
9919 2023-08-15 Richard Biener <rguenther@suse.de>
9921 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
9923 (_slp_instance::remain_defs): ... this.
9924 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
9925 (SLP_INSTANCE_REMAIN_DEFS): ... this.
9926 (slp_root::remain): New.
9927 (slp_root::slp_root): Adjust.
9928 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
9929 (vect_build_slp_instance): Get extra remain parameter,
9930 adjust former handling of a cut off stmt.
9931 (vect_analyze_slp_instance): Adjust.
9932 (vect_analyze_slp): Likewise.
9933 (_bb_vec_info::~_bb_vec_info): Likewise.
9934 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
9935 (vect_slp_check_for_constructors): Handle non-internal
9936 defs as remain defs of a reduction.
9937 (vectorize_slp_instance_root_stmt): Adjust.
9939 2023-08-15 Richard Biener <rguenther@suse.de>
9941 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
9942 (canonicalize_loop_induction_variables): Use find_loop_location.
9944 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
9947 * config/cris/cris-protos.h: Revert recent change.
9948 * config/cris/cris.cc (cris_legitimate_address_p): Remove
9949 code_helper unused parameter.
9950 (cris_legitimate_address_p_hook): New wrapper function.
9951 (TARGET_LEGITIMATE_ADDRESS_P): Change to
9952 cris_legitimate_address_p_hook.
9954 2023-08-15 Richard Biener <rguenther@suse.de>
9956 PR tree-optimization/110963
9957 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
9958 a PHI node when the expression is available on all edges
9959 and we insert at most one copy from a constant.
9961 2023-08-15 Richard Biener <rguenther@suse.de>
9963 PR tree-optimization/110991
9964 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
9965 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
9966 that will end up constant.
9968 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9971 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
9973 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9975 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
9976 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
9977 and update the final nest accordingly.
9979 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9981 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
9984 2023-08-15 Pan Li <pan2.li@intel.com>
9986 * mode-switching.cc (create_pre_exit): Add SET insn check.
9988 2023-08-15 Pan Li <pan2.li@intel.com>
9990 * config/riscv/riscv-vector-builtins-bases.cc
9991 (class vfrec7_frm): New class for frm.
9992 (vfrec7_frm_obj): New declaration.
9994 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9995 * config/riscv/riscv-vector-builtins-functions.def
9996 (vfrec7_frm): New intrinsic function definition.
9997 * config/riscv/vector-iterators.md
9998 (VFMISC): Remove VFREC7.
10000 (float_insn_type): Ditto.
10001 (VFMISC_FRM): New int iterator.
10002 (misc_frm_op): New op for frm.
10003 (float_frm_insn_type): New type for frm.
10004 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
10005 New pattern for misc frm.
10007 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
10009 * lra-constraints.cc (curr_insn_transform): Process output stack
10010 pointer reloads before emitting reload insns.
10012 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
10015 * doc/invoke.texi: Add documentation of
10016 fanalyzer-show-events-in-system-headers
10018 2023-08-14 Jan Hubicka <jh@suse.cz>
10020 PR gcov-profile/110988
10021 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
10023 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
10025 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
10026 Enable compressed builtins when ZC* extensions enabled.
10027 * config/riscv/riscv-shorten-memrefs.cc:
10028 Enable shorten_memrefs pass when ZC* extensions enabled.
10029 * config/riscv/riscv.cc (riscv_compressed_reg_p):
10030 Enable compressible registers when ZC* extensions enabled.
10031 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
10032 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
10033 (riscv_first_stack_step): Allow compression of the register saves
10034 without adding extra instructions.
10035 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
10036 to 16 bits when ZC* extensions enabled.
10038 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
10040 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
10041 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
10046 (MASK_ZCMP): Ditto.
10047 (MASK_ZCMT): Ditto.
10048 (TARGET_ZCA): New target.
10049 (TARGET_ZCB): Ditto.
10050 (TARGET_ZCE): Ditto.
10051 (TARGET_ZCF): Ditto.
10052 (TARGET_ZCD): Ditto.
10053 (TARGET_ZCMP): Ditto.
10054 (TARGET_ZCMT): Ditto.
10055 * config/riscv/riscv.opt: New target variable.
10057 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10060 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
10062 * genrecog.cc (print_nonbool_test): Fix type error of
10063 switch (SUBREG_BYTE (op))'.
10065 2023-08-14 Richard Biener <rguenther@suse.de>
10067 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
10069 2023-08-14 Pan Li <pan2.li@intel.com>
10071 * config/riscv/riscv-vector-builtins-bases.cc
10072 (class unop_frm): New class for frm.
10073 (vfsqrt_frm_obj): New declaration.
10075 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10076 * config/riscv/riscv-vector-builtins-functions.def
10077 (vfsqrt_frm): New intrinsic function definition.
10079 2023-08-14 Pan Li <pan2.li@intel.com>
10081 * config/riscv/riscv-vector-builtins-bases.cc
10082 (class vfwnmsac_frm): New class for frm.
10083 (vfwnmsac_frm_obj): New declaration.
10085 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10086 * config/riscv/riscv-vector-builtins-functions.def
10087 (vfwnmsac_frm): New intrinsic function definition.
10089 2023-08-14 Pan Li <pan2.li@intel.com>
10091 * config/riscv/riscv-vector-builtins-bases.cc
10092 (class vfwmsac_frm): New class for frm.
10093 (vfwmsac_frm_obj): New declaration.
10095 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10096 * config/riscv/riscv-vector-builtins-functions.def
10097 (vfwmsac_frm): New intrinsic function definition.
10099 2023-08-14 Pan Li <pan2.li@intel.com>
10101 * config/riscv/riscv-vector-builtins-bases.cc
10102 (class vfwnmacc_frm): New class for frm.
10103 (vfwnmacc_frm_obj): New declaration.
10105 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10106 * config/riscv/riscv-vector-builtins-functions.def
10107 (vfwnmacc_frm): New intrinsic function definition.
10109 2023-08-14 Cui, Lili <lili.cui@intel.com>
10111 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
10114 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
10116 * config/mmix/predicates.md (mmix_address_operand): Use
10117 lra_in_progress, not reload_in_progress.
10119 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
10121 * config/mmix/mmix.cc: Re-enable LRA.
10123 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
10125 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
10126 when lra_in_progress.
10128 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
10130 * config/mmix/mmix.cc: Disable LRA for MMIX.
10132 2023-08-14 Pan Li <pan2.li@intel.com>
10134 * config/riscv/riscv-vector-builtins-bases.cc
10135 (class vfwmacc_frm): New class for vfwmacc frm.
10136 (vfwmacc_frm_obj): New declaration.
10138 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10139 * config/riscv/riscv-vector-builtins-functions.def
10140 (vfwmacc_frm): Function definition for vfwmacc.
10141 * config/riscv/riscv-vector-builtins.cc
10142 (function_expander::use_widen_ternop_insn): Add frm support.
10144 2023-08-14 Pan Li <pan2.li@intel.com>
10146 * config/riscv/riscv-vector-builtins-bases.cc
10147 (class vfnmsub_frm): New class for vfnmsub frm.
10148 (vfnmsub_frm): New declaration.
10150 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10151 * config/riscv/riscv-vector-builtins-functions.def
10152 (vfnmsub_frm): New function declaration.
10154 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
10156 * lra-constraints.cc (curr_insn_transform): Set done_p up and
10157 check it on true after processing output stack pointer reload.
10159 2023-08-12 Jakub Jelinek <jakub@redhat.com>
10161 * Makefile.in (USER_H): Add stdckdint.h.
10162 * ginclude/stdckdint.h: New file.
10164 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10167 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
10169 2023-08-12 Patrick Palka <ppalka@redhat.com>
10171 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
10172 Delimit output with braces.
10174 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10177 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
10179 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10181 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
10182 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
10183 * config/riscv/vector.md: Ditto.
10185 2023-08-11 David Malcolm <dmalcolm@redhat.com>
10188 * doc/analyzer.texi (__analyzer_get_strlen): New.
10189 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
10191 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
10193 * config/rx/rx.md (subdi3): Fix test for borrow.
10195 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10197 PR middle-end/110989
10198 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
10199 (vectorizable_load): Ditto.
10201 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
10203 * config/bpf/bpf.md (allocate_stack): Define.
10204 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
10205 stack pointer register.
10206 (FIXED_REGISTERS): Adjust accordingly.
10207 (CALL_USED_REGISTERS): Likewise.
10208 (REG_CLASS_CONTENTS): Likewise.
10209 (REGISTER_NAMES): Likewise.
10210 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
10211 space for callee-saved registers.
10212 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
10213 (bpf_expand_epilogue): Do not restore callee-saved registers in
10216 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
10218 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
10219 about too many arguments if function is always inlined.
10221 2023-08-11 Patrick Palka <ppalka@redhat.com>
10223 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
10224 Don't call component_ref_field_offset if the RHS isn't a decl.
10226 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
10228 PR bootstrap/110646
10229 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
10231 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
10233 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
10234 (process_alt_operands): Set the flag.
10235 (curr_insn_transform): Modify stack pointer offsets if output
10236 stack pointer reload is generated.
10238 2023-08-11 Joseph Myers <joseph@codesourcery.com>
10240 * configure: Regenerate.
10242 2023-08-11 Richard Biener <rguenther@suse.de>
10244 PR tree-optimization/110979
10245 * tree-vect-loop.cc (vectorizable_reduction): For
10246 FOLD_LEFT_REDUCTION without target support make sure
10247 we don't need to honor signed zeros and sign dependent rounding.
10249 2023-08-11 Richard Biener <rguenther@suse.de>
10251 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
10252 subgraph entries. Dump the used vector size based on the
10253 SLP subgraph entry root vector type.
10255 2023-08-11 Pan Li <pan2.li@intel.com>
10257 * config/riscv/riscv-vector-builtins-bases.cc
10258 (class vfmsub_frm): New class for vfmsub frm.
10259 (vfmsub_frm): New declaration.
10261 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10262 * config/riscv/riscv-vector-builtins-functions.def
10263 (vfmsub_frm): New function declaration.
10265 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10267 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
10268 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
10269 (expand_partial_store_optab_fn): Ditto.
10270 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
10271 (MASK_LEN_STORE_LANES): Ditto.
10272 * optabs.def (OPTAB_CD): Ditto.
10274 2023-08-11 Pan Li <pan2.li@intel.com>
10276 * config/riscv/riscv-vector-builtins-bases.cc
10277 (class vfnmadd_frm): New class for vfnmadd frm.
10278 (vfnmadd_frm): New declaration.
10280 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10281 * config/riscv/riscv-vector-builtins-functions.def
10282 (vfnmadd_frm): New function declaration.
10284 2023-08-11 Drew Ross <drross@redhat.com>
10285 Jakub Jelinek <jakub@redhat.com>
10287 PR tree-optimization/109938
10288 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
10290 2023-08-11 Pan Li <pan2.li@intel.com>
10292 * config/riscv/riscv-vector-builtins-bases.cc
10293 (class vfmadd_frm): New class for vfmadd frm.
10294 (vfmadd_frm_obj): New declaration.
10296 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10297 * config/riscv/riscv-vector-builtins-functions.def
10298 (vfmadd_frm): New function definition.
10300 2023-08-11 Pan Li <pan2.li@intel.com>
10302 * config/riscv/riscv-vector-builtins-bases.cc
10303 (class vfnmsac_frm): New class for vfnmsac frm.
10304 (vfnmsac_frm_obj): New declaration.
10306 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10307 * config/riscv/riscv-vector-builtins-functions.def
10308 (vfnmsac_frm): New function definition.
10310 2023-08-11 Jakub Jelinek <jakub@redhat.com>
10312 * doc/extend.texi (Typeof): Document typeof_unqual
10313 and __typeof_unqual__.
10315 2023-08-11 Andrew Pinski <apinski@marvell.com>
10317 PR tree-optimization/110954
10318 * generic-match-head.cc (bitwise_inverted_equal_p): Add
10319 wascmp argument and set it accordingly.
10320 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
10321 wascmp argument to the macro.
10322 (gimple_bitwise_inverted_equal_p): Add
10323 wascmp argument and set it accordingly.
10324 * match.pd (`a & ~a`, `a ^| ~a`): Update call
10325 to bitwise_inverted_equal_p and handle wascmp case.
10326 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
10327 call to bitwise_inverted_equal_p and check to see
10328 if was !wascmp or if precision was 1.
10330 2023-08-11 Martin Uecker <uecker@tugraz.at>
10333 * doc/invoke.texi: Update.
10335 2023-08-11 Pan Li <pan2.li@intel.com>
10337 * config/riscv/riscv-vector-builtins-bases.cc
10338 (class vfmsac_frm): New class for vfmsac frm.
10339 (vfmsac_frm_obj): New declaration.
10341 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10342 * config/riscv/riscv-vector-builtins-functions.def
10343 (vfmsac_frm): New function definition
10345 2023-08-10 Jan Hubicka <jh@suse.cz>
10347 PR middle-end/110923
10348 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
10350 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
10352 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
10353 dependent on 'a' extension.
10354 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
10355 (TARGET_ZTSO): New target.
10356 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
10358 (riscv_memmodel_needs_amo_release): Add Ztso case.
10359 (riscv_print_operand): Add Ztso case for LR/SC annotations.
10360 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
10361 * config/riscv/riscv.opt: Add Ztso target variable.
10362 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
10363 Ztso specific insn.
10364 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
10365 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
10366 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
10367 specific load/store/fence mappings.
10368 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
10369 specific load/store/fence mappings.
10371 2023-08-10 Jan Hubicka <jh@suse.cz>
10373 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
10376 2023-08-10 Jan Hubicka <jh@suse.cz>
10378 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
10380 2023-08-10 Jan Hubicka <jh@suse.cz>
10382 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
10383 handling of undefined values.
10385 2023-08-10 Jakub Jelinek <jakub@redhat.com>
10388 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
10389 return virtual phis and return NULL if there is a virtual phi
10390 where the arguments from E0 and E1 edges aren't equal.
10392 2023-08-10 Richard Biener <rguenther@suse.de>
10394 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
10395 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
10397 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10400 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
10402 2023-08-10 Pan Li <pan2.li@intel.com>
10404 * config/riscv/riscv-vector-builtins-bases.cc
10405 (class vfnmacc_frm): New class for vfnmacc.
10406 (vfnmacc_frm_obj): New declaration.
10408 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10409 * config/riscv/riscv-vector-builtins-functions.def
10410 (vfnmacc_frm): New function definition.
10412 2023-08-10 Pan Li <pan2.li@intel.com>
10414 * config/riscv/riscv-vector-builtins-bases.cc
10415 (class vfmacc_frm): New class for vfmacc frm.
10416 (vfmacc_frm_obj): New declaration.
10418 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10419 * config/riscv/riscv-vector-builtins-functions.def
10420 (vfmacc_frm): New function definition.
10422 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10425 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
10427 2023-08-10 Richard Biener <rguenther@suse.de>
10429 * tree-vectorizer.h (vectorizable_live_operation): Remove
10430 gimple_stmt_iterator * argument.
10431 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
10432 Adjust plumbing around vect_get_loop_mask.
10433 (vect_analyze_loop_operations): Adjust.
10434 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
10435 (vect_bb_slp_mark_live_stmts): Likewise.
10436 (vect_schedule_slp_node): Likewise.
10437 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
10438 Remove gimple_stmt_iterator * argument.
10439 (vect_transform_stmt): Adjust.
10441 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10443 * config/riscv/vector-iterators.md: Add missing modes.
10445 2023-08-10 Jakub Jelinek <jakub@redhat.com>
10448 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
10449 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
10451 2023-08-10 Jakub Jelinek <jakub@redhat.com>
10454 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
10455 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
10458 2023-08-10 liuhongt <hongtao.liu@intel.com>
10461 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
10462 sanitize upper part of V4HFmode register with
10463 -fno-trapping-math.
10464 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
10465 (<divv4hf3): Ditto.
10466 (<insn>v2hf3): Ditto.
10468 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
10469 register with -fno-trapping-math.
10471 2023-08-10 Pan Li <pan2.li@intel.com>
10472 Kito Cheng <kito.cheng@sifive.com>
10474 * config/riscv/riscv-protos.h
10475 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
10476 (get_frm_mode): New declaration.
10477 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
10478 * config/riscv/riscv-vector-builtins.cc
10479 (function_expander::use_ternop_insn): Take care of frm reg.
10480 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
10481 (riscv_emit_frm_mode_set): Ditto.
10482 (riscv_emit_mode_set): Ditto.
10483 (riscv_frm_adjust_mode_after_call): Ditto.
10484 (riscv_frm_mode_needed): Ditto.
10485 (riscv_frm_mode_after): Ditto.
10486 (riscv_mode_entry): Ditto.
10487 (riscv_mode_exit): Ditto.
10488 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
10489 * config/riscv/vector.md
10490 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
10491 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
10493 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10495 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
10496 incorrect anticipate info.
10498 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
10500 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
10501 Remove 'Zve32d' from the version list.
10503 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
10505 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
10506 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
10507 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
10508 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10510 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
10512 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
10513 (mem_shadd_or_shadd_rtx_p): New function.
10515 2023-08-09 Andrew Pinski <apinski@marvell.com>
10517 PR tree-optimization/110937
10518 PR tree-optimization/100798
10519 * match.pd (`a ? ~b : b`): Handle this
10522 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
10524 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
10526 2023-08-09 Richard Ball <richard.ball@arm.com>
10528 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
10529 * config/aarch64/aarch64-tune.md: Regenerate.
10530 * doc/invoke.texi: Document Cortex-A520 CPU.
10532 2023-08-09 Carl Love <cel@us.ibm.com>
10534 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
10535 Move definitions to Altivec stanza.
10536 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
10539 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10542 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
10543 stepped vector support.
10545 2023-08-09 liuhongt <hongtao.liu@intel.com>
10547 * common/config/i386/cpuinfo.h (get_available_features):
10548 Rename local variable subleaf_level to max_subleaf_level.
10550 2023-08-09 Richard Biener <rguenther@suse.de>
10552 PR rtl-optimization/110587
10553 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
10555 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
10557 PR tree-optimization/110248
10558 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
10559 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
10560 legitimate when outer code is PLUS.
10562 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
10564 PR tree-optimization/110248
10565 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
10566 type code_helper and pass it to targetm.addr_space.legitimate_address_p
10567 instead of ERROR_MARK.
10568 (offsettable_address_addr_space_p): Update one function pointer with
10569 one more argument of type code_helper as its assignees
10570 memory_address_addr_space_p and strict_memory_address_addr_space_p
10571 have been adjusted, and adjust some call sites with ERROR_MARK.
10572 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
10573 (memory_address_addr_space_p): Adjust with one more unnamed argument
10574 of type code_helper with default ERROR_MARK.
10575 (strict_memory_address_addr_space_p): Likewise.
10576 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
10577 argument of type code_helper.
10578 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
10579 type code_helper and pass it to memory_address_addr_space_p.
10580 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
10581 one more unnamed argument of type code_helper with default value
10583 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
10584 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
10585 pass it to all valid_mem_ref_p calls.
10587 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
10589 PR tree-optimization/110248
10590 * coretypes.h (class code_helper): Add forward declaration.
10591 * doc/tm.texi: Regenerate.
10592 * lra-constraints.cc (valid_address_p): Call target hook
10593 targetm.addr_space.legitimate_address_p with an extra parameter
10594 ERROR_MARK as its prototype changes.
10595 * recog.cc (memory_address_addr_space_p): Likewise.
10596 * reload.cc (strict_memory_address_addr_space_p): Likewise.
10597 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
10598 Extend with one more argument of type code_helper, update the
10599 documentation accordingly.
10600 * targhooks.cc (default_legitimate_address_p): Adjust for the
10601 new code_helper argument.
10602 (default_addr_space_legitimate_address_p): Likewise.
10603 * targhooks.h (default_legitimate_address_p): Likewise.
10604 (default_addr_space_legitimate_address_p): Likewise.
10605 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
10606 with extra unnamed code_helper argument with default ERROR_MARK.
10607 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
10608 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
10609 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
10610 (tree.h): New include for tree_code ERROR_MARK.
10611 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
10612 unnamed code_helper argument with default ERROR_MARK.
10613 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
10614 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
10615 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
10616 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
10617 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
10618 (tree.h): New include for tree_code ERROR_MARK.
10619 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
10620 unnamed code_helper argument with default ERROR_MARK.
10621 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
10622 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
10624 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
10625 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
10626 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
10627 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
10628 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
10629 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
10630 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
10631 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
10632 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
10634 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
10635 (m32c_addr_space_legitimate_address_p): Likewise.
10636 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
10637 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
10638 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
10639 * config/microblaze/microblaze-protos.h (tree.h): New include for
10640 tree_code ERROR_MARK.
10641 (microblaze_legitimate_address_p): Adjust with extra unnamed
10642 code_helper argument with default ERROR_MARK.
10643 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
10645 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
10646 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
10647 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
10648 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
10649 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
10650 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
10651 argument with default ERROR_MARK and adjust the call to function
10652 msp430_legitimate_address_p.
10653 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
10654 unnamed code_helper argument with default ERROR_MARK.
10655 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
10656 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
10657 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
10658 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
10659 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
10660 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
10661 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
10662 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
10663 (tree.h): New include for tree_code ERROR_MARK.
10664 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
10665 extra unnamed code_helper argument with default ERROR_MARK.
10666 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
10667 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
10668 argument and adjust the call to function rs6000_legitimate_address_p.
10669 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
10670 unnamed code_helper argument with default ERROR_MARK.
10671 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
10672 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
10673 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
10674 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
10675 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
10676 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
10677 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
10678 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
10680 (tree.h): New include for tree_code ERROR_MARK.
10681 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
10682 Adjust with extra unnamed code_helper argument with default
10685 2023-08-09 liuhongt <hongtao.liu@intel.com>
10687 * common/config/i386/cpuinfo.h (get_available_features): Check
10688 EAX for valid subleaf before use CPUID.
10690 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
10692 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
10693 for the temporary when canonicalizing the condition.
10695 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
10697 * config/bpf/core-builtins.cc: Cleaned include headers.
10698 (struct cr_builtins): Added GTY.
10699 (cr_builtins_ref): Created.
10700 (builtins_data) Changed to GC root.
10701 (allocate_builtin_data): Changed.
10702 Included gt-core-builtins.h.
10703 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
10704 (bpf_core_extra_ref): Created.
10705 (bpf_comment_info): Changed to GC root.
10706 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
10708 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
10711 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
10712 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
10713 upper part of V2SFmode register with -fno-trapping-math.
10714 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
10716 (<smaxmin:code>v2sf3): Ditto.
10717 (sqrtv2sf2): Ditto.
10718 (*mmx_haddv2sf3_low): Ditto.
10719 (*mmx_hsubv2sf3_low): Ditto.
10720 (vec_addsubv2sf3): Ditto.
10721 (vec_cmpv2sfv2si): Ditto.
10722 (vcond<V2FI:mode>v2sf): Ditto.
10725 (fnmav2sf4): Ditto.
10726 (fnmsv2sf4): Ditto.
10727 (fix_truncv2sfv2si2): Ditto.
10728 (fixuns_truncv2sfv2si2): Ditto.
10729 (floatv2siv2sf2): Ditto.
10730 (floatunsv2siv2sf2): Ditto.
10731 (nearbyintv2sf2): Ditto.
10732 (rintv2sf2): Ditto.
10733 (lrintv2sfv2si2): Ditto.
10734 (ceilv2sf2): Ditto.
10735 (lceilv2sfv2si2): Ditto.
10736 (floorv2sf2): Ditto.
10737 (lfloorv2sfv2si2): Ditto.
10738 (btruncv2sf2): Ditto.
10739 (roundv2sf2): Ditto.
10740 (lroundv2sfv2si2): Ditto.
10741 * doc/invoke.texi (x86 Options): Document
10742 -mpartial-vector-fp-math option.
10744 2023-08-08 Andrew Pinski <apinski@marvell.com>
10746 PR tree-optimization/103281
10747 PR tree-optimization/28794
10748 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
10750 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
10751 (simplify_using_ranges::simplify_casted_cond): Rename to ...
10752 (simplify_using_ranges::simplify_casted_compare): This
10753 and change arguments to take op0 and op1.
10754 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
10755 (simplify_using_ranges::simplify): For tcc_comparison assignments call
10756 simplify_compare_assign_using_ranges_1.
10757 * vr-values.h (simplify_using_ranges): Add
10758 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
10759 Rename simplify_casted_cond and simplify_casted_compare and
10760 update argument types.
10762 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10764 * genmatch.cc: Log line numbers indirectly.
10766 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10768 * genmatch.cc: Make sinfo map ordered.
10769 * Makefile.in: Require the ordered map header for genmatch.o.
10771 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10773 * ordered-hash-map.h: Add get_or_insert.
10774 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
10776 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10778 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
10779 (cond_len_<optab><mode>): Ditto.
10780 (cond_fma<mode>): Ditto.
10781 (cond_len_fma<mode>): Ditto.
10782 (cond_fnma<mode>): Ditto.
10783 (cond_len_fnma<mode>): Ditto.
10784 (cond_fms<mode>): Ditto.
10785 (cond_len_fms<mode>): Ditto.
10786 (cond_fnms<mode>): Ditto.
10787 (cond_len_fnms<mode>): Ditto.
10788 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
10790 (enum insn_type): Add new enum type.
10791 (prepare_ternary_operands): New function.
10792 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
10793 (emit_nonvlmax_tumu_insn): Ditto.
10794 (emit_nonvlmax_fp_tumu_insn): Ditto.
10795 (expand_cond_len_binop): Add condtional operations.
10796 (expand_cond_len_ternop): Ditto.
10797 (prepare_ternary_operands): New function.
10798 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
10799 riscv_get_v_regno_alignment as global scope.
10800 * config/riscv/vector.md: Fix ternary bugs.
10802 2023-08-08 Richard Biener <rguenther@suse.de>
10804 PR tree-optimization/49955
10805 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
10806 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
10807 * tree-vect-slp.cc (vect_free_slp_instance): Release
10808 SLP_INSTANCE_REMAIN_STMTS.
10809 (vect_build_slp_instance): Make the number of lanes of
10810 a BB reduction even.
10811 (vectorize_slp_instance_root_stmt): Handle unvectorized
10812 defs of a BB reduction.
10814 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10816 * internal-fn.cc (get_len_internal_fn): New function.
10817 (DEF_INTERNAL_COND_FN): Ditto.
10818 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
10819 * internal-fn.h (get_len_internal_fn): Ditto.
10820 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
10822 2023-08-08 Richard Biener <rguenther@suse.de>
10824 PR tree-optimization/110924
10825 * tree-ssa-live.h (virtual_operand_live): Update comment.
10826 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
10827 optimization, look at each predecessor.
10828 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
10830 2023-08-08 yulong <shiyulong@iscas.ac.cn>
10832 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
10834 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10836 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
10837 * config/riscv/vector.md: Ditto.
10839 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10841 * config/riscv/autovec.md: Add VLS shift.
10843 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10845 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
10846 * config/riscv/vector-iterators.md: Ditto.
10847 * config/riscv/vector.md: Ditto.
10849 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
10851 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
10853 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10855 * configure: Regenerate.
10857 2023-08-07 John Ericson <git@JohnEricson.me>
10859 * configure: Regenerate.
10861 2023-08-07 Alan Modra <amodra@gmail.com>
10863 * configure: Regenerate.
10865 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
10867 * configure: Regenerate.
10869 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10871 * configure: Regenerate.
10873 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10875 * configure: Regenerate.
10877 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
10879 * configure: Regenerate.
10881 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
10883 * configure: Regenerate.
10885 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
10887 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
10888 VOIDmode operands to conditional before canonicalization.
10890 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
10892 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
10893 (find_oldest_value_reg): Inline stack_pointer_rtx check.
10894 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
10896 2023-08-07 Martin Jambor <mjambor@suse.cz>
10899 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
10900 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
10901 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
10902 (ptr_parm_has_nonarg_uses): Likewise.
10903 * ipa-param-manipulation.cc
10904 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
10905 (ipa_param_body_adjustments::mark_dead_statements): Move initial
10906 checks to get_ddef_if_exists_and_is_used.
10907 (ipa_param_body_adjustments::mark_clobbers_dead): New.
10908 (ipa_param_body_adjustments::common_initialization): Call
10909 mark_clobbers_dead when splitting.
10911 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
10913 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
10914 as an argument and pass it to riscv_emit_int_order_test.
10915 (riscv_expand_conditional_move): Handle cases where the condition
10916 is not EQ/NE or the second argument to the conditional is not
10918 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
10919 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10921 2023-08-07 Andrew Pinski <apinski@marvell.com>
10923 PR tree-optimization/109959
10924 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
10927 2023-08-07 Richard Biener <rguenther@suse.de>
10929 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
10930 calculate post-dominators. Calculate RPO on the inverted
10931 graph and process blocks in that order.
10933 2023-08-07 liuhongt <hongtao.liu@intel.com>
10936 * config/i386/i386-protos.h
10937 (vpternlog_redundant_operand_mask): Adjust parameter type.
10938 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
10939 INTVAL instead of XINT, also adjust parameter type from rtx*
10940 to rtx since the function only needs operands[4] in vpternlog
10942 (substitute_vpternlog_operands): Pass operands[4] instead of
10943 operands to vpternlog_redundant_operand_mask.
10944 * config/i386/sse.md: Ditto.
10946 2023-08-07 Richard Biener <rguenther@suse.de>
10948 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
10949 around dumping code.
10951 2023-08-07 liuhongt <hongtao.liu@intel.com>
10954 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
10955 to define_expand and break into ..
10956 (<insn>v4hf3): .. this.
10957 (divv4hf3): .. this.
10958 (<insn>v2hf3): .. this.
10959 (divv2hf3): .. this.
10960 (movd_v2hf_to_sse): New define_expand.
10961 (movq_<mode>_to_sse): Extend to V4HFmode.
10962 (mmxdoublevecmode): Ditto.
10963 (V2FI_V4HF): New mode iterator.
10964 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
10965 by using mode iterator V4SF_V8HF, renamed to ..
10966 (*vec_concat<mode>): .. this.
10967 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
10968 iterator V4SF_V8HF, renamed to ..
10969 (*vec_concat<mode>_0): .. this.
10970 (*vec_concatv8hf_movss): New define_insn.
10971 (V4SF_V8HF): New mode iterator.
10973 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10975 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
10977 2023-08-07 Jan Beulich <jbeulich@suse.com>
10979 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
10980 (*mmx_pinsrb): Likewise.
10981 (*mmx_pextrb): Likewise.
10982 (*mmx_pextrb_zext): Likewise.
10983 (mmx_pshufbv8qi3): Likewise.
10984 (mmx_pshufbv4qi3): Likewise.
10985 (mmx_pswapdv2si2): Likewise.
10986 (*pinsrb): Likewise.
10987 (*pextrb): Likewise.
10988 (*pextrb_zext): Likewise.
10989 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
10990 (*sse2_eq<mode>3): Likewise.
10991 (*sse2_gt<mode>3): Likewise.
10992 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
10993 (*vec_extract<mode>): Likewise.
10994 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
10995 (*vec_extractv16qi_zext): Likewise.
10996 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
10997 (ssse3_pmaddubsw128): Likewise.
10998 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
10999 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
11000 (<ssse3_avx2>_psign<mode>3): Likewise.
11001 (<ssse3_avx2>_palignr<mode>): Likewise.
11002 (*abs<mode>2): Likewise.
11003 (sse4_2_pcmpestr): Likewise.
11004 (sse4_2_pcmpestri): Likewise.
11005 (sse4_2_pcmpestrm): Likewise.
11006 (sse4_2_pcmpestr_cconly): Likewise.
11007 (sse4_2_pcmpistr): Likewise.
11008 (sse4_2_pcmpistri): Likewise.
11009 (sse4_2_pcmpistrm): Likewise.
11010 (sse4_2_pcmpistr_cconly): Likewise.
11011 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
11012 (vgf2p8affineqb_<mode><mask_name>): Likewise.
11013 (vgf2p8mulb_<mode><mask_name>): Likewise.
11014 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
11016 (*<code>v16qi3 [umaxmin]): Likewise.
11018 2023-08-07 Jan Beulich <jbeulich@suse.com>
11020 * config/i386/i386.md (sse4_1_round<mode>2): Make
11021 "length_immediate" uniformly 1.
11022 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
11023 (mmx_pblendvb_<mode>): Likewise.
11025 2023-08-07 Jan Beulich <jbeulich@suse.com>
11027 * config/i386/sse.md
11028 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
11029 "prefix" attribute.
11030 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
11033 2023-08-07 Jan Beulich <jbeulich@suse.com>
11035 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
11036 "prefix_extra", and "mode" attributes.
11037 (xop_phadd<u>bd): Likewise.
11038 (xop_phadd<u>bq): Likewise.
11039 (xop_phadd<u>wd): Likewise.
11040 (xop_phadd<u>wq): Likewise.
11041 (xop_phadd<u>dq): Likewise.
11042 (xop_phsubbw): Likewise.
11043 (xop_phsubwd): Likewise.
11044 (xop_phsubdq): Likewise.
11045 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
11046 (xop_rotr<mode>3): Likewise.
11047 (xop_frcz<mode>2): Likewise.
11048 (*xop_vmfrcz<mode>2): Likewise.
11049 (xop_vrotl<mode>3): Add "prefix" attribute. Change
11050 "prefix_extra" to 1.
11051 (xop_sha<mode>3): Likewise.
11052 (xop_shl<mode>3): Likewise.
11054 2023-08-07 Jan Beulich <jbeulich@suse.com>
11056 * config/i386/sse.md
11057 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
11059 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
11060 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
11061 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
11062 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
11063 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
11064 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
11065 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
11066 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
11067 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
11068 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
11069 (vec_extract_lo_v64qi): Likewise.
11070 (vec_extract_hi_v64qi): Likewise.
11071 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
11072 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
11073 (*avx512f_<code><mode>3<mask_name>): Likewise.
11074 (*vec_extractv4ti): Likewise.
11075 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
11076 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
11077 Add "length_immediate".
11079 2023-08-07 Jan Beulich <jbeulich@suse.com>
11081 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
11083 (@rdseed<mode>): Likewise.
11084 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
11085 Adjust "prefix_extra".
11086 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
11087 (*sse4_1_<code><mode>3<mask_name>): Likewise.
11088 (*avx2_eq<mode>3): Likewise.
11089 (avx2_gt<mode>3): Likewise.
11090 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
11091 (*vec_extract<mode>): Likewise.
11092 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
11094 2023-08-07 Jan Beulich <jbeulich@suse.com>
11096 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
11097 "prefix_rep". Drop "prefix_extra".
11098 (wr<fsgs>base<mode>): Likewise.
11099 (ptwrite<mode>): Likewise.
11101 2023-08-07 Jan Beulich <jbeulich@suse.com>
11103 * config/i386/i386.md (isa): Move up.
11104 (length_immediate): Handle "fma4".
11105 (prefix): Handle "ssemuladd".
11106 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
11107 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
11109 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
11110 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
11111 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
11113 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
11114 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
11115 (*fma_fnmadd_<mode>): Likewise.
11116 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
11118 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
11119 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
11120 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
11122 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
11123 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
11124 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
11126 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
11127 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
11128 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
11130 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
11131 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
11132 (*fmai_fmadd_<mode>): Likewise.
11133 (*fmai_fmsub_<mode>): Likewise.
11134 (*fmai_fnmadd_<mode><round_name>): Likewise.
11135 (*fmai_fnmsub_<mode><round_name>): Likewise.
11136 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
11137 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
11138 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
11139 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
11140 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
11141 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
11142 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
11143 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
11144 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
11145 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
11146 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
11147 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
11148 (*fma4i_vmfmadd_<mode>): Likewise.
11149 (*fma4i_vmfmsub_<mode>): Likewise.
11150 (*fma4i_vmfnmadd_<mode>): Likewise.
11151 (*fma4i_vmfnmsub_<mode>): Likewise.
11152 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
11153 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
11154 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
11156 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
11157 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
11158 (xop_p<macs>dql): Likewise.
11159 (xop_p<macs>dqh): Likewise.
11160 (xop_p<macs>wd): Likewise.
11161 (xop_p<madcs>wd): Likewise.
11162 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
11164 2023-08-07 Jan Beulich <jbeulich@suse.com>
11166 * config/i386/i386.md (length_immediate): Handle "sse4arg".
11167 (prefix): Likewise.
11168 (*xop_pcmov_<mode>): Add "mode" attribute.
11169 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
11170 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
11171 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
11172 (*xop_pcmov_<mode>): Add "mode" attribute.
11173 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
11175 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
11176 "prefix_extra", and "length_immediate" attributes.
11177 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
11178 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
11179 and "length_immediate" attributes. Switch "type" to "sse4arg".
11180 (xop_pcom_tf<mode>3): Likewise.
11181 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
11183 2023-08-07 Jan Beulich <jbeulich@suse.com>
11185 * config/i386/i386.md (prefix_extra): Correct comment. Fold
11186 cases yielding 2 into ones yielding 1.
11188 2023-08-07 Jan Hubicka <jh@suse.cz>
11190 PR tree-optimization/106293
11191 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
11192 * tree-vect-loop.cc (vect_transform_loop): Likewise.
11194 2023-08-07 Andrew Pinski <apinski@marvell.com>
11196 PR tree-optimization/96695
11197 * match.pd (min_value, max_value): Extend to
11200 2023-08-06 Jan Hubicka <jh@suse.cz>
11202 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
11203 __builtin_expect that CPU likely supports cpuid.
11205 2023-08-06 Jan Hubicka <jh@suse.cz>
11207 * tree-loop-distribution.cc (loop_distribution::execute): Disable
11208 distribution for loops with estimated iterations 0.
11210 2023-08-06 Jan Hubicka <jh@suse.cz>
11212 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
11214 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
11216 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
11217 more Zicond patterns. Fix whitespace typo.
11218 (riscv_rtx_costs): Remove accidental code duplication.
11219 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
11221 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
11224 * config/i386/i386-protos.h
11225 (vpternlog_redundant_operand_mask): Declare.
11226 (substitute_vpternlog_operands): Declare.
11227 * config/i386/i386.cc
11228 (vpternlog_redundant_operand_mask): New helper.
11229 (substitute_vpternlog_operands): New function. Use them...
11230 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
11232 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
11234 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
11235 value of -1 is equivalent to don't care.
11236 (extract_integral_bit_field): Indicate that we don't require
11237 the most significant word to be zero extended, if we're about
11239 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
11240 of -1 is equivalent to don't care. Don't clear the most
11241 significant bits with AND mask when UNSIGNEDP is -1.
11243 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
11245 * config/i386/sse.md (define_split): Convert highpart:DF extract
11246 from V2DFmode register into a sse2_storehpd instruction.
11247 (define_split): Likewise, convert lowpart:DF extract from V2DF
11248 register into a sse2_storelpd instruction.
11250 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
11252 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
11255 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
11257 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
11258 against early clobber hard regs.
11260 2023-08-04 Tamar Christina <tamar.christina@arm.com>
11262 * doc/extend.texi: Document it.
11264 2023-08-04 Tamar Christina <tamar.christina@arm.com>
11267 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
11268 vec_widen_<sur>shiftl_hi_<mode>): Remove.
11269 (aarch64_<sur>shll<mode>_internal): Renamed to...
11270 (aarch64_<su>shll<mode>): .. This.
11271 (aarch64_<sur>shll2<mode>_internal): Renamed to...
11272 (aarch64_<su>shll2<mode>): .. This.
11273 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
11275 * config/aarch64/constraints.md (D2, DL): New.
11276 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
11278 2023-08-04 Tamar Christina <tamar.christina@arm.com>
11280 * gensupport.cc (conlist): Support length 0 attribute.
11282 2023-08-04 Tamar Christina <tamar.christina@arm.com>
11284 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
11285 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
11287 2023-08-04 Tamar Christina <tamar.christina@arm.com>
11289 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
11291 (aarch64_adjust_stmt_cost): Use it.
11292 (aarch64_vector_costs::count_ops): Likewise.
11293 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
11294 aarch64_adjust_stmt_cost.
11296 2023-08-04 Richard Biener <rguenther@suse.de>
11298 PR tree-optimization/110838
11299 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
11300 Fix right-shift value sanitizing. Properly emit external
11301 def mangling in the preheader rather than in the pattern
11302 def sequence where it will fail vectorizing.
11304 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
11306 PR middle-end/110316
11308 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
11309 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
11310 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
11311 (timer::validate_phases): Use integral arithmetic to check
11313 (timer::print_row, timer::print): Convert from integral
11314 nanoseconds to floating point seconds before printing.
11315 (timer::all_zero): Change limit to nanosec count instead of
11316 fractional count of seconds.
11317 (make_json_for_timevar_time_def): Convert from integral
11318 nanoseconds to floating point seconds before recording.
11319 * timevar.h (struct timevar_time_def): Update all measurements
11320 to use uint64_t nanoseconds rather than seconds stored in a
11323 2023-08-04 Richard Biener <rguenther@suse.de>
11325 PR tree-optimization/110838
11326 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
11327 the arithmetic right-shift case to non-negative operands.
11329 2023-08-04 Pan Li <pan2.li@intel.com>
11332 2023-08-04 Pan Li <pan2.li@intel.com>
11334 * config/riscv/riscv-vector-builtins-bases.cc
11335 (class vfmacc_frm): New class for vfmacc frm.
11336 (vfmacc_frm_obj): New declaration.
11338 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11339 * config/riscv/riscv-vector-builtins-functions.def
11340 (vfmacc_frm): New function definition.
11341 * config/riscv/riscv-vector-builtins.cc
11342 (function_expander::use_ternop_insn): Add frm operand support.
11343 * config/riscv/vector.md: Add vfmuladd to frm_mode.
11345 2023-08-04 Pan Li <pan2.li@intel.com>
11348 2023-08-04 Pan Li <pan2.li@intel.com>
11350 * config/riscv/riscv-vector-builtins-bases.cc
11351 (class vfnmacc_frm): New class for vfnmacc.
11352 (vfnmacc_frm_obj): New declaration.
11354 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11355 * config/riscv/riscv-vector-builtins-functions.def
11356 (vfnmacc_frm): New function definition.
11358 2023-08-04 Pan Li <pan2.li@intel.com>
11361 2023-08-04 Pan Li <pan2.li@intel.com>
11363 * config/riscv/riscv-vector-builtins-bases.cc
11364 (class vfmsac_frm): New class for vfmsac frm.
11365 (vfmsac_frm_obj): New declaration.
11367 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11368 * config/riscv/riscv-vector-builtins-functions.def
11369 (vfmsac_frm): New function definition.
11371 2023-08-04 Pan Li <pan2.li@intel.com>
11374 2023-08-04 Pan Li <pan2.li@intel.com>
11376 * config/riscv/riscv-vector-builtins-bases.cc
11377 (class vfnmsac_frm): New class for vfnmsac frm.
11378 (vfnmsac_frm_obj): New declaration.
11380 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11381 * config/riscv/riscv-vector-builtins-functions.def
11382 (vfnmsac_frm): New function definition.
11384 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
11386 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
11387 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
11388 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
11389 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
11390 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
11391 (attiny102, attiny104): New devices.
11392 * doc/avr-mmcu.texi: Regenerate.
11394 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
11396 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
11397 and PM_OFFSET entries.
11399 2023-08-04 Andrew Pinski <apinski@marvell.com>
11401 PR tree-optimization/110874
11402 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
11403 (gimple_maybe_cmp): Likewise.
11404 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
11405 and gimple_maybe_cmp instead of being recursive.
11406 * match.pd (bit_not_with_nop): New match pattern.
11407 (maybe_cmp): Likewise.
11409 2023-08-04 Drew Ross <drross@redhat.com>
11411 PR middle-end/101955
11412 * match.pd ((signed x << c) >> c): New canonicalization.
11414 2023-08-04 Pan Li <pan2.li@intel.com>
11416 * config/riscv/riscv-vector-builtins-bases.cc
11417 (class vfnmsac_frm): New class for vfnmsac frm.
11418 (vfnmsac_frm_obj): New declaration.
11420 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11421 * config/riscv/riscv-vector-builtins-functions.def
11422 (vfnmsac_frm): New function definition.
11424 2023-08-04 Pan Li <pan2.li@intel.com>
11426 * config/riscv/riscv-vector-builtins-bases.cc
11427 (class vfmsac_frm): New class for vfmsac frm.
11428 (vfmsac_frm_obj): New declaration.
11430 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11431 * config/riscv/riscv-vector-builtins-functions.def
11432 (vfmsac_frm): New function definition.
11434 2023-08-04 Pan Li <pan2.li@intel.com>
11436 * config/riscv/riscv-vector-builtins-bases.cc
11437 (class vfnmacc_frm): New class for vfnmacc.
11438 (vfnmacc_frm_obj): New declaration.
11440 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11441 * config/riscv/riscv-vector-builtins-functions.def
11442 (vfnmacc_frm): New function definition.
11444 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
11447 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
11448 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
11450 2023-08-04 Pan Li <pan2.li@intel.com>
11452 * config/riscv/riscv-vector-builtins-bases.cc
11453 (class vfmacc_frm): New class for vfmacc frm.
11454 (vfmacc_frm_obj): New declaration.
11456 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
11457 * config/riscv/riscv-vector-builtins-functions.def
11458 (vfmacc_frm): New function definition.
11459 * config/riscv/riscv-vector-builtins.cc
11460 (function_expander::use_ternop_insn): Add frm operand support.
11461 * config/riscv/vector.md: Add vfmuladd to frm_mode.
11463 2023-08-04 Pan Li <pan2.li@intel.com>
11465 * config/riscv/riscv-vector-builtins-bases.cc
11466 (vfwmul_frm_obj): New declaration.
11467 (vfwmul_frm): Ditto.
11468 * config/riscv/riscv-vector-builtins-bases.h:
11469 (vfwmul_frm): Ditto.
11470 * config/riscv/riscv-vector-builtins-functions.def
11471 (vfwmul_frm): New function definition.
11472 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
11474 2023-08-04 Pan Li <pan2.li@intel.com>
11476 * config/riscv/riscv-vector-builtins-bases.cc
11477 (binop_frm): New declaration.
11478 (reverse_binop_frm): Likewise.
11480 * config/riscv/riscv-vector-builtins-bases.h:
11481 (vfdiv_frm): New extern declaration.
11482 (vfrdiv_frm): Likewise.
11483 * config/riscv/riscv-vector-builtins-functions.def
11484 (vfdiv_frm): New function definition.
11485 (vfrdiv_frm): Likewise.
11486 * config/riscv/vector.md: Add vfdiv to frm_mode.
11488 2023-08-03 Jan Hubicka <jh@suse.cz>
11490 * tree-cfg.cc (print_loop_info): Print entry count.
11492 2023-08-03 Jan Hubicka <jh@suse.cz>
11494 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
11496 2023-08-03 Jan Hubicka <jh@suse.cz>
11498 PR bootstrap/110857
11499 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
11500 unadjusted_exit_count.
11502 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
11504 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
11507 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
11509 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
11510 various Zicond patterns.
11511 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
11512 sfb_alu_operand for both arms of the conditional move.
11513 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
11515 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
11521 * config.gcc: Added core-builtins.cc and .o files.
11522 * config/bpf/bpf-passes.def: Removed file.
11523 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
11524 bpf_replace_core_move_operands): New prototypes.
11525 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
11526 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
11527 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
11528 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
11529 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
11531 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
11532 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
11533 (mov_reloc_core<mode>): Added.
11534 * config/bpf/core-builtins.cc (struct cr_builtin, enum
11535 cr_decision struct cr_local, struct cr_final, struct
11536 core_builtin_helpers, enum bpf_plugin_states): Added types.
11537 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
11539 (allocate_builtin_data, get_builtin-data, search_builtin_data,
11540 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
11541 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
11542 bpf_core_get_index, compute_field_expr,
11543 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
11544 process_field_expr, pack_enum_value, process_enum_value, pack_type,
11545 process_type, bpf_require_core_support, make_core_relo, read_kind,
11546 kind_access_index, kind_preserve_field_info, kind_enum_value,
11547 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
11548 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
11549 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
11550 bpf_expand_core_builtin, bpf_add_core_reloc,
11551 bpf_replace_core_move_operands): Added functions.
11552 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
11553 (bpf_init_core_builtins, bpf_expand_core_builtin,
11554 bpf_resolve_overloaded_core_builtin): Added functions.
11555 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
11556 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
11557 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
11558 * config/bpf/t-bpf: Added core-builtins.o.
11559 * doc/extend.texi: Added documentation for new BPF builtins.
11561 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
11563 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
11564 ranges to the call to relation_fold_and_or.
11565 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
11566 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
11567 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
11568 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
11569 a varying op1 and op2 to call.
11570 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
11571 (operator_equal::op1_op2_relation): New float version.
11572 (operator_not_equal::op1_op2_relation): Ditto.
11573 (operator_lt::op1_op2_relation): Ditto.
11574 (operator_le::op1_op2_relation): Ditto.
11575 (operator_gt::op1_op2_relation): Ditto.
11576 (operator_ge::op1_op2_relation) Ditto.
11577 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
11579 (operator_not_equal::op1_op2_relation): Ditto.
11580 (operator_lt::op1_op2_relation): Ditto.
11581 (operator_le::op1_op2_relation): Ditto.
11582 (operator_gt::op1_op2_relation): Ditto.
11583 (operator_ge::op1_op2_relation): Ditto.
11584 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
11586 (range_operator::op1_op2_relation): Add extra params.
11587 (operator_equal::op1_op2_relation): Ditto.
11588 (operator_not_equal::op1_op2_relation): Ditto.
11589 (operator_lt::op1_op2_relation): Ditto.
11590 (operator_le::op1_op2_relation): Ditto.
11591 (operator_gt::op1_op2_relation): Ditto.
11592 (operator_ge::op1_op2_relation): Ditto.
11593 * range-op.h (range_operator): New prototypes.
11594 (range_op_handler): Ditto.
11596 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
11598 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
11599 Use identity relation.
11600 (gori_compute::compute_operand2_range): Ditto.
11601 * value-relation.cc (get_identity_relation): New.
11602 * value-relation.h (get_identity_relation): New prototype.
11604 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
11606 * value-range.h (Value_Range::set_varying): Set the type.
11607 (Value_Range::set_zero): Ditto.
11608 (Value_Range::set_nonzero): Ditto.
11610 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
11612 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
11615 2023-08-03 Pan Li <pan2.li@intel.com>
11617 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
11619 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
11621 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
11623 2023-08-03 Richard Biener <rguenther@suse.de>
11625 PR tree-optimization/110838
11626 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
11627 Adjust the shift operand of RSHIFT_EXPRs.
11629 2023-08-03 Richard Biener <rguenther@suse.de>
11631 PR tree-optimization/110702
11632 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
11633 we created a NULL pointer based access rewrite that to
11636 2023-08-03 Richard Biener <rguenther@suse.de>
11638 * tree-ssa-sink.cc: Include tree-ssa-live.h.
11639 (pass_sink_code::execute): Instantiate virtual_operand_live
11641 (sink_code_in_bb): Pass down virtual_operand_live.
11642 (statement_sink_location): Get virtual_operand_live and
11643 verify we are not sinking loads across stores by looking up
11644 the live virtual operand at the sink location.
11646 2023-08-03 Richard Biener <rguenther@suse.de>
11648 * tree-ssa-live.h (class virtual_operand_live): New.
11649 * tree-ssa-live.cc (virtual_operand_live::init): New.
11650 (virtual_operand_live::get_live_in): Likewise.
11651 (virtual_operand_live::get_live_out): Likewise.
11653 2023-08-03 Richard Biener <rguenther@suse.de>
11655 * passes.def: Exchange loop splitting and final value
11656 replacement passes.
11658 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11660 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
11661 New function which handles bswap patterns for vec_perm_const.
11662 (vectorize_vec_perm_const_1): Call new function.
11663 * config/s390/vector.md (*bswap<mode>): Fix operands in output
11665 (*vstbr<mode>): New insn.
11667 2023-08-03 Alexandre Oliva <oliva@adacore.com>
11669 * config/vxworks-smp.opt: New. Introduce -msmp.
11670 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
11671 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
11672 lib_smp when -msmp is present in the command line.
11673 * doc/invoke.texi: Document it.
11675 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
11677 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
11678 when enabling -mno-omit-leaf-frame-pointer
11679 (riscv_option_override): Override omit-frame-pointer.
11680 (riscv_frame_pointer_required): Save s0 for non-leaf function
11681 (TARGET_FRAME_POINTER_REQUIRED): Override defination
11682 * config/riscv/riscv.opt: Add option support.
11684 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
11687 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
11688 place operand in a register before gen_<insn>64ti2_doubleword.
11689 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
11690 operand in a register before gen_<insn>32di2_doubleword.
11691 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
11692 (<any_rotate>64ti2_doubleword): Likewise.
11694 2023-08-03 Pan Li <pan2.li@intel.com>
11696 * config/riscv/riscv-vector-builtins-bases.cc
11697 (vfmul_frm_obj): New declaration.
11699 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
11700 * config/riscv/riscv-vector-builtins-functions.def
11701 (vfmul_frm): New function definition.
11702 * config/riscv/vector.md: Add vfmul to frm_mode.
11704 2023-08-03 Andrew Pinski <apinski@marvell.com>
11706 * match.pd (`~X & X`): Check that the types match.
11707 (`~x | x`, `~x ^ x`): Likewise.
11709 2023-08-03 Pan Li <pan2.li@intel.com>
11711 * config/riscv/riscv-vector-builtins-bases.h: Remove
11712 redudant declaration.
11714 2023-08-03 Pan Li <pan2.li@intel.com>
11716 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
11718 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
11719 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
11720 Add vfwsub function definitions.
11722 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11724 PR rtl-optimization/110867
11725 * combine.cc (simplify_compare_const): Try the optimization only
11726 in case the constant fits into the comparison mode.
11728 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
11730 * config/riscv/zicond.md: Remove incorrect zicond patterns and
11731 renumber/rename them.
11732 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
11734 2023-08-02 Richard Biener <rguenther@suse.de>
11736 * tree-phinodes.h (add_phi_node_to_bb): Remove.
11737 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
11739 2023-08-02 Jan Beulich <jbeulich@suse.com>
11741 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
11742 two of the alternatives.
11744 2023-08-02 Richard Biener <rguenther@suse.de>
11746 PR tree-optimization/92335
11747 * tree-ssa-sink.cc (select_best_block): Before loop
11748 optimizations avoid sinking unconditional loads/stores
11749 in innermost loops to conditional executed places.
11751 2023-08-02 Andrew Pinski <apinski@marvell.com>
11753 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
11754 the comparison operands before comparing them.
11756 2023-08-02 Andrew Pinski <apinski@marvell.com>
11758 * match.pd (`~X & X`, `~X | X`): Move over to
11759 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
11760 handles that already.
11761 Remove range test simplifications to true/false as they
11762 are now handled by these patterns.
11764 2023-08-02 Andrew Pinski <apinski@marvell.com>
11766 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
11767 statement's lhs and rhs to check if trivial dead.
11768 Rename inserted_exprs to exprs_maybe_dce; also move it so
11769 bitmap is not allocated if not needed.
11771 2023-08-02 Pan Li <pan2.li@intel.com>
11773 * config/riscv/riscv-vector-builtins-bases.cc
11774 (class widen_binop_frm): New class for binop frm.
11775 (BASE): Add vfwadd_frm.
11776 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
11777 * config/riscv/riscv-vector-builtins-functions.def
11778 (vfwadd_frm): New function definition.
11779 * config/riscv/riscv-vector-builtins-shapes.cc
11780 (BASE_NAME_MAX_LEN): New macro.
11781 (struct alu_frm_def): Leverage new base class.
11782 (struct build_frm_base): New build base for frm.
11783 (struct widen_alu_frm_def): New struct for widen alu frm.
11784 (SHAPE): Add widen_alu_frm shape.
11785 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
11786 * config/riscv/vector.md (frm_mode): Add vfwalu type.
11788 2023-08-02 Jan Hubicka <jh@suse.cz>
11790 * cfgloop.h (loop_count_in): Declare.
11791 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
11792 (loop_count_in): Move here from ...
11793 * cfgloopmanip.cc (loop_count_in): ... here.
11794 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
11796 2023-08-02 Jan Hubicka <jh@suse.cz>
11798 * cfg.cc (scale_strictly_dominated_blocks): New function.
11799 * cfg.h (scale_strictly_dominated_blocks): Declare.
11800 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
11802 2023-08-02 Richard Biener <rguenther@suse.de>
11804 PR rtl-optimization/110587
11805 * lra-spills.cc (return_regno_p): Remove.
11806 (regno_in_use_p): Likewise.
11807 (lra_final_code_change): Do not remove noop moves
11808 between hard registers.
11810 2023-08-02 liuhongt <hongtao.liu@intel.com>
11813 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
11814 HFmode, use mode iterator VFH instead.
11815 (vec_fmsubadd<mode>4): Ditto.
11816 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
11817 Remove scalar mode from iterator, use VFH_AVX512VL instead.
11818 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
11821 2023-08-02 liuhongt <hongtao.liu@intel.com>
11823 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
11824 pre_reload define_insn_and_split.
11826 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
11828 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
11829 using Zicond to implement some conditional moves.
11831 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
11833 * config/riscv/zicond.md: Use the X iterator instead of ANYI
11834 on the comparison input operands.
11836 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
11838 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
11840 (case SET): For INSNs that just set a REG, take the cost from the
11842 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
11844 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
11846 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
11847 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
11848 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
11849 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
11850 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
11851 (OPTION_MASK_ISA_ABM_SET):
11852 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
11854 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
11856 * config/s390/s390.cc (s390_encode_section_info): Assume external
11857 symbols without explicit alignment to be unaligned if
11858 -munaligned-symbols has been specified.
11859 * config/s390/s390.opt (-munaligned-symbols): New option.
11861 2023-08-01 Richard Ball <richard.ball@arm.com>
11863 * gimple-fold.cc (fold_ctor_reference):
11864 Add support for poly_int.
11866 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
11869 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
11870 LABEL_NUSES of new conditional branch instruction.
11872 2023-08-01 Jan Hubicka <jh@suse.cz>
11874 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
11875 constant prologue peeling.
11877 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
11879 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
11881 2023-08-01 Pan Li <pan2.li@intel.com>
11882 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11884 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
11885 (STATIC_FRM_P): Ditto.
11886 (struct mode_switching_info): New struct for mode switching.
11887 (struct machine_function): Add new field mode switching.
11888 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
11889 (riscv_frm_adjust_mode_after_call): New function for call mode.
11890 (riscv_frm_emit_after_call_in_bb_end): New function for emit
11891 insn when call as the end of bb.
11892 (riscv_frm_mode_needed): New function for frm mode needed.
11893 (frm_unknown_dynamic_p): Remove call check.
11894 (riscv_mode_needed): Extrac function for frm.
11895 (riscv_frm_mode_after): Add DYN_CALL after.
11896 (riscv_mode_entry): Remove backup rtl initialization.
11897 * config/riscv/vector.md (frm_mode): Add dyn_call.
11898 (fsrmsi_restore_exit): Rename to _volatile.
11899 (fsrmsi_restore_volatile): Likewise.
11901 2023-08-01 Pan Li <pan2.li@intel.com>
11903 * config/riscv/riscv-vector-builtins-bases.cc
11904 (class reverse_binop_frm): Add new template for reversed frm.
11905 (vfsub_frm_obj): New obj.
11906 (vfrsub_frm_obj): Likewise.
11907 * config/riscv/riscv-vector-builtins-bases.h:
11908 (vfsub_frm): New declaration.
11909 (vfrsub_frm): Likewise.
11910 * config/riscv/riscv-vector-builtins-functions.def
11911 (vfsub_frm): New function define.
11912 (vfrsub_frm): Likewise.
11914 2023-08-01 Andrew Pinski <apinski@marvell.com>
11916 PR tree-optimization/93044
11917 * match.pd (nested int casts): A truncation (to the same size or smaller)
11918 can always remove the inner cast.
11920 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
11923 * doc/invoke.texi (-Wmissing-variable-declarations): Document
11926 2023-07-31 Andrew Pinski <apinski@marvell.com>
11928 PR tree-optimization/106164
11929 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
11930 `a == b | a < b`, `a == b | a > b`): Handle these cases
11933 2023-07-31 Andrew Pinski <apinski@marvell.com>
11935 PR tree-optimization/106164
11936 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
11937 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
11939 2023-07-31 Andrew Pinski <apinski@marvell.com>
11941 PR tree-optimization/100864
11942 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
11943 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
11944 (gimple_bitwise_inverted_equal_p): New function.
11945 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
11946 instead of direct matching bit_not.
11948 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
11951 * gcc-ar.cc (main): Expand argv and use
11952 temporary response file to call ar if any
11953 expansions were made.
11955 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
11957 PR tree-optimization/110582
11958 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
11959 range vector for non-ssa names.
11961 2023-07-31 David Malcolm <dmalcolm@redhat.com>
11964 * diagnostic-client-data-hooks.h (class sarif_object): New forward
11966 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
11968 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
11969 (class sarif_invocation): Inherit from sarif_object rather than
11971 (class sarif_result): Likewise.
11972 (class sarif_ice_notification): Likewise.
11973 (sarif_object::get_or_create_properties): New.
11974 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
11975 to call the context's add_sarif_invocation_properties hook.
11976 (sarif_builder::flush_to_file): Pass m_context to
11977 sarif_invocation::prepare_to_flush.
11978 * diagnostic-format-sarif.h: New header.
11979 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
11980 writes to stderr. Document that if SARIF diagnostic output is
11981 requested then any timing information is written in JSON form as
11982 part of the SARIF output, rather than to stderr.
11983 * timevar.cc: Include "json.h".
11984 (timer::named_items::m_hash_map): Split out type into...
11985 (timer::named_items::hash_map_t): ...this new typedef.
11986 (timer::named_items::make_json): New function.
11987 (timevar_diff): New function.
11988 (make_json_for_timevar_time_def): New function.
11989 (timer::timevar_def::make_json): New function.
11990 (timer::make_json): New function.
11991 * timevar.h (class json::value): New forward decl.
11992 (timer::make_json): New decl.
11993 (timer::timevar_def::make_json): New decl.
11994 * tree-diagnostic-client-data-hooks.cc: Include
11995 "diagnostic-format-sarif.h" and "timevar.h".
11996 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
11999 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
12001 * combine.cc (simplify_compare_const): Narrow comparison of
12002 memory and constant.
12003 (try_combine): Adapt new function signature.
12004 (simplify_comparison): Adapt new function signature.
12006 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
12008 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
12010 (expand_vector_init_insert_elems): Ditto.
12012 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
12015 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
12016 single_defuse_cycle while counting reduction_latency.
12018 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12020 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
12021 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
12022 (COND_ADD): Remove.
12027 (COND_RDIV): Ditto.
12030 (COND_FMIN): Ditto.
12031 (COND_FMAX): Ditto.
12039 (COND_FNMA): Ditto.
12040 (COND_FNMS): Ditto.
12042 (COND_LEN_ADD): Ditto.
12043 (COND_LEN_SUB): Ditto.
12044 (COND_LEN_MUL): Ditto.
12045 (COND_LEN_DIV): Ditto.
12046 (COND_LEN_MOD): Ditto.
12047 (COND_LEN_RDIV): Ditto.
12048 (COND_LEN_MIN): Ditto.
12049 (COND_LEN_MAX): Ditto.
12050 (COND_LEN_FMIN): Ditto.
12051 (COND_LEN_FMAX): Ditto.
12052 (COND_LEN_AND): Ditto.
12053 (COND_LEN_IOR): Ditto.
12054 (COND_LEN_XOR): Ditto.
12055 (COND_LEN_SHL): Ditto.
12056 (COND_LEN_SHR): Ditto.
12057 (COND_LEN_FMA): Ditto.
12058 (COND_LEN_FMS): Ditto.
12059 (COND_LEN_FNMA): Ditto.
12060 (COND_LEN_FNMS): Ditto.
12061 (COND_LEN_NEG): Ditto.
12062 (ADD): New macro define.
12083 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
12086 * config/i386/i386-features.cc (compute_convert_gain): Check
12087 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
12088 and V4SImode rotates in STV.
12089 (general_scalar_chain::convert_rotate): Likewise.
12091 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
12093 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
12094 * config/riscv/riscv-protos.h (get_mask_mode): Update return
12096 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
12098 (emit_vlmax_insn): Ditto.
12099 (emit_vlmax_fp_insn): Ditto.
12100 (emit_vlmax_ternary_insn): Ditto.
12101 (emit_vlmax_fp_ternary_insn): Ditto.
12102 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
12103 (emit_nonvlmax_insn): Ditto.
12104 (emit_vlmax_slide_insn): Ditto.
12105 (emit_nonvlmax_slide_tu_insn): Ditto.
12106 (emit_vlmax_merge_insn): Ditto.
12107 (emit_vlmax_masked_insn): Ditto.
12108 (emit_nonvlmax_masked_insn): Ditto.
12109 (emit_vlmax_masked_store_insn): Ditto.
12110 (emit_nonvlmax_masked_store_insn): Ditto.
12111 (emit_vlmax_masked_mu_insn): Ditto.
12112 (emit_nonvlmax_tu_insn): Ditto.
12113 (emit_nonvlmax_fp_tu_insn): Ditto.
12114 (emit_scalar_move_insn): Ditto.
12115 (emit_vlmax_compress_insn): Ditto.
12116 (emit_vlmax_reduction_insn): Ditto.
12117 (emit_vlmax_fp_reduction_insn): Ditto.
12118 (emit_nonvlmax_fp_reduction_insn): Ditto.
12119 (expand_vec_series): Ditto.
12120 (expand_vector_init_merge_repeating_sequence): Ditto.
12121 (expand_vec_perm): Ditto.
12122 (shuffle_merge_patterns): Ditto.
12123 (shuffle_compress_patterns): Ditto.
12124 (shuffle_decompress_patterns): Ditto.
12125 (expand_reduction): Ditto.
12126 (get_mask_mode): Update return type.
12127 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
12128 is valid, and use new get_mask_mode interface.
12130 2023-07-31 Pan Li <pan2.li@intel.com>
12132 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
12133 Move rm suffix before mask.
12135 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12137 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
12138 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
12141 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
12144 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12145 (extzv<mode>): Likewise.
12146 (insv<mode>): Likewise.
12147 (*testqi_ext_3): Likewise.
12148 (*btr<mode>_2): Likewise.
12149 (define_split): Likewise.
12150 (*btsq_imm): Likewise.
12151 (*btrq_imm): Likewise.
12152 (*btcq_imm): Likewise.
12153 (define_peephole2 x3): Likewise.
12154 (*bt<mode>): Likewise
12155 (*bt<mode>_mask): New define_insn_and_split.
12156 (*jcc_bt<mode>): Use QImode for offsets.
12157 (*jcc_bt<mode>_1): Delete obsolete pattern.
12158 (*jcc_bt<mode>_mask): Use QImode offsets.
12159 (*jcc_bt<mode>_mask_1): Likewise.
12160 (define_split): Likewise.
12161 (*bt<mode>_setcqi): Likewise.
12162 (*bt<mode>_setncqi): Likewise.
12163 (*bt<mode>_setnc<mode>): Likewise.
12164 (*bt<mode>_setncqi_2): Likewise.
12165 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12166 (bmi2_bzhi_<mode>3): Use QImode offsets.
12167 (*bmi2_bzhi_<mode>3): Likewise.
12168 (*bmi2_bzhi_<mode>3_1): Likewise.
12169 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12170 (@tbm_bextri_<mode>): Likewise.
12172 2023-07-29 Jan Hubicka <jh@suse.cz>
12174 * profile-count.cc (profile_probability::sqrt): New member function.
12175 (profile_probability::pow): Likewise.
12176 * profile-count.h: (profile_probability::sqrt): Declare
12177 (profile_probability::pow): Likewise.
12178 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
12180 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
12182 * gimple-range-cache.cc (ssa_cache::merge_range): New.
12183 (ssa_lazy_cache::merge_range): New.
12184 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
12185 (class ssa_lazy_cache): Ditto.
12186 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
12188 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
12190 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
12191 Move from value-query.cc.
12192 (substitute_and_fold_engine::value_of_stmt): Ditto.
12193 (substitute_and_fold_engine::range_of_expr): New.
12194 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
12195 range_query. New prototypes.
12196 * value-query.cc (value_query::value_on_edge): Relocate.
12197 (value_query::value_of_stmt): Ditto.
12198 * value-query.h (class value_query): Remove.
12199 (class range_query): Remove base class. Adjust prototypes.
12201 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
12203 PR tree-optimization/110205
12204 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
12205 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
12206 Add final override.
12207 * range-op.cc (operator_lshift): Add missing final overrides.
12208 (operator_rshift): Ditto.
12210 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
12212 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
12213 optimizations in BPF target.
12215 2023-07-28 Honza <jh@ryzen4.suse.cz>
12217 * cfgloopmanip.cc (loop_count_in): Break out from ...
12218 (loop_exit_for_scaling): Break out from ...
12219 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
12220 add more sanity check and debug info.
12221 (scale_loop_profile): ... here.
12222 (create_empty_loop_on_edge): Fix whitespac.
12223 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
12224 * loop-unroll.cc (unroll_loop_constant_iterations): Use
12225 update_loop_exit_probability_scale_dom_bbs.
12226 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
12227 (tree_transform_and_unroll_loop): Use
12228 update_loop_exit_probability_scale_dom_bbs.
12229 * tree-ssa-loop-split.cc (split_loop): Use
12230 update_loop_exit_probability_scale_dom_bbs.
12232 2023-07-28 Jan Hubicka <jh@suse.cz>
12234 PR middle-end/77689
12235 * tree-ssa-loop-split.cc: Include value-query.h.
12236 (split_at_bb_p): Analyze cases where EQ/NE can be turned
12237 into LT/LE/GT/GE; return updated guard code.
12238 (split_loop): Use guard code.
12240 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
12241 Richard Biener <rguenther@suse.de>
12243 PR middle-end/28071
12244 PR rtl-optimization/110587
12245 * expr.cc (emit_group_load_1): Simplify logic for calling
12246 force_reg on ORIG_SRC, to avoid making a copy if the source
12247 is already in a pseudo register.
12249 2023-07-28 Jan Hubicka <jh@suse.cz>
12251 PR middle-end/106923
12252 * tree-ssa-loop-split.cc (connect_loops): Change probability
12253 of the test preconditioning second loop to very_likely.
12254 (fix_loop_bb_probability): Handle correctly case where
12255 on of the arms of the conditional is empty.
12256 (split_loop): Fold the test guarding first condition to
12257 see if it is constant true; Set correct entry block
12258 probabilities of the split loops; determine correct loop
12259 eixt probabilities.
12261 2023-07-28 xuli <xuli1@eswincomputing.com>
12263 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
12264 vsadd[u] and vssub[u].
12265 * config/riscv/vector.md: Ditto.
12267 2023-07-28 Jan Hubicka <jh@suse.cz>
12269 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
12270 loops when IV test is not overflowing.
12272 2023-07-28 liuhongt <hongtao.liu@intel.com>
12275 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
12277 (avx512cd_maskw_vec_dup<mode>): Ditto.
12279 2023-07-27 David Faust <david.faust@oracle.com>
12283 * config/bpf/bpf.opt (msmov): New option.
12284 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
12285 * config/bpf/bpf.md (*extendsidi2): New.
12286 (extendhidi2): New.
12287 (extendqidi2): New.
12288 (extendsisi2): New.
12289 (extendhisi2): New.
12290 (extendqisi2): New.
12291 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
12292 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
12293 also enables -msmov.
12295 2023-07-27 David Faust <david.faust@oracle.com>
12297 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
12298 Add -mbswap and -msdiv eBPF options.
12299 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
12300 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
12303 2023-07-27 David Faust <david.faust@oracle.com>
12305 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
12306 in pseudo-C dialect output template.
12307 (sub<AM:mode>3): Likewise.
12309 2023-07-27 Jan Hubicka <jh@suse.cz>
12311 * tree-vect-loop.cc (optimize_mask_stores): Make store
12314 2023-07-27 Jan Hubicka <jh@suse.cz>
12316 * cfgloop.h (single_dom_exit): Declare.
12317 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
12318 * cfgrtl.cc (struct cfg_hooks): Fix comment.
12319 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
12320 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
12321 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
12323 (tree_transform_and_unroll_loop): ... here;
12325 2023-07-27 Jan Hubicka <jh@suse.cz>
12327 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
12328 tree-ssa-loop-manip.cc and avoid recursion.
12329 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
12330 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
12332 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
12333 (scale_dominated_blocks_in_loop): Declare.
12334 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
12335 (change_edge_frequency): Remove.
12336 * predict.h (change_edge_frequency): Remove.
12337 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
12339 (niter_for_unrolled_loop): Remove.
12340 (tree_transform_and_unroll_loop): Fix profile update.
12342 2023-07-27 Jan Hubicka <jh@suse.cz>
12344 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
12345 to guessed; fix count of new_bb.
12347 2023-07-27 Jan Hubicka <jh@suse.cz>
12349 * profile-count.h (profile_count::apply_probability): Fix
12350 handling of uninitialized probabilities, optimize scaling
12353 2023-07-27 Richard Biener <rguenther@suse.de>
12355 PR tree-optimization/91838
12356 * gimple-match-head.cc: Include attribs.h and asan.h.
12357 * generic-match-head.cc: Likewise.
12358 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
12360 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12362 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
12363 (ADJUST_ALIGNMENT): Ditto.
12364 (ADJUST_PRECISION): Ditto.
12365 (VLS_MODES): Ditto.
12366 (VECTOR_MODE_WITH_PREFIX): Ditto.
12367 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
12368 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
12369 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
12370 (legitimize_move): Enable basic VLS modes support.
12371 (get_vlmul): Ditto.
12372 (get_ratio): Ditto.
12373 (get_vector_mode): Ditto.
12374 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
12375 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
12376 (VLS_ENTRY): New macro.
12377 (riscv_v_ext_mode_p): Add vls modes.
12378 (riscv_get_v_regno_alignment): New function.
12379 (riscv_print_operand): Add vls modes.
12380 (riscv_hard_regno_nregs): Ditto.
12381 (riscv_hard_regno_mode_ok): Ditto.
12382 (riscv_regmode_natural_size): Ditto.
12383 (riscv_vectorize_preferred_vector_alignment): Ditto.
12384 * config/riscv/riscv.md: Ditto.
12385 * config/riscv/vector-iterators.md: Ditto.
12386 * config/riscv/vector.md: Ditto.
12387 * config/riscv/autovec-vls.md: New file.
12389 2023-07-27 Pan Li <pan2.li@intel.com>
12391 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
12392 (vread_csr): Ditto.
12393 (vwrite_csr): Ditto.
12395 2023-07-27 demin.han <demin.han@starfivetech.com>
12397 * config/riscv/autovec.md: Delete which_alternative use in split
12399 2023-07-27 Richard Biener <rguenther@suse.de>
12401 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
12403 (pass_sink_code::execute): ... in the caller.
12405 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
12406 Richard Biener <rguenther@suse.de>
12408 PR tree-optimization/110776
12409 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
12412 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
12414 * config/riscv/riscv.md: Include zicond.md
12415 * config/riscv/zicond.md: New file.
12417 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
12419 * common/config/riscv/riscv-common.cc: New extension.
12420 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
12421 (TARGET_ZICOND): New target.
12423 2023-07-26 Carl Love <cel@us.ibm.com>
12425 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
12426 specifies the number of built-in arguments to check.
12427 (altivec_resolve_overloaded_builtin): Update calls to find_instance
12428 to pass the number of built-in arguments to be checked.
12430 2023-07-26 David Faust <david.faust@oracle.com>
12432 * config/bpf/bpf.opt (mv3-atomics): New option.
12433 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
12434 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
12435 (REG_CLASS_NAMES): Likewise.
12436 (REG_CLASS_CONTENTS): Likewise.
12437 (REGNO_REG_CLASS): Handle R0.
12438 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
12439 (UNSPEC_AAND): New unspec.
12440 (UNSPEC_AOR): Likewise.
12441 (UNSPEC_AXOR): Likewise.
12442 (UNSPEC_AFADD): Likewise.
12443 (UNSPEC_AFAND): Likewise.
12444 (UNSPEC_AFOR): Likewise.
12445 (UNSPEC_AFXOR): Likewise.
12446 (UNSPEC_AXCHG): Likewise.
12447 (UNSPEC_ACMPX): Likewise.
12448 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
12450 * config/bpf/atomic.md: ...Here. New file.
12451 * config/bpf/constraints.md (t): New constraint for R0.
12452 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
12454 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
12456 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
12459 2023-07-26 Carl Love <cel@us.ibm.com>
12461 * config/rs6000/rs6000-builtins.def: Rename
12462 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
12463 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
12464 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
12465 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
12466 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
12467 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
12468 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
12469 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
12470 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
12471 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
12472 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
12473 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
12474 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
12475 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
12476 * config/rs6000/rs6000-c.cc (find_instance): Add case
12477 RS6000_OVLD_VEC_REPLACE_UN.
12478 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
12479 Fix first argument type. Rename VREPLACE_UN_UV4SI as
12480 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
12481 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
12482 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
12483 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
12484 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
12485 REPLACE_ELT_V for vector modes.
12486 (REPLACE_ELT): New scalar mode iterator.
12487 (REPLACE_ELT_char): Add scalar attributes.
12488 (vreplace_un_<mode>): Change iterator and mode attribute.
12490 2023-07-26 David Malcolm <dmalcolm@redhat.com>
12493 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
12495 2023-07-26 Richard Biener <rguenther@suse.de>
12497 PR tree-optimization/106081
12498 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
12499 Assign layout -1 to splats.
12501 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12503 * range-op-mixed.h (class operator_cast): Add update_bitmask.
12504 * range-op.cc (operator_cast::update_bitmask): New.
12505 (operator_cast::fold_range): Call update_bitmask.
12507 2023-07-26 Li Xu <xuli1@eswincomputing.com>
12509 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
12510 scalar type to float16, eliminate warning.
12511 (vfloat16mf4x3_t): Ditto.
12512 (vfloat16mf4x4_t): Ditto.
12513 (vfloat16mf4x5_t): Ditto.
12514 (vfloat16mf4x6_t): Ditto.
12515 (vfloat16mf4x7_t): Ditto.
12516 (vfloat16mf4x8_t): Ditto.
12517 (vfloat16mf2x2_t): Ditto.
12518 (vfloat16mf2x3_t): Ditto.
12519 (vfloat16mf2x4_t): Ditto.
12520 (vfloat16mf2x5_t): Ditto.
12521 (vfloat16mf2x6_t): Ditto.
12522 (vfloat16mf2x7_t): Ditto.
12523 (vfloat16mf2x8_t): Ditto.
12524 (vfloat16m1x2_t): Ditto.
12525 (vfloat16m1x3_t): Ditto.
12526 (vfloat16m1x4_t): Ditto.
12527 (vfloat16m1x5_t): Ditto.
12528 (vfloat16m1x6_t): Ditto.
12529 (vfloat16m1x7_t): Ditto.
12530 (vfloat16m1x8_t): Ditto.
12531 (vfloat16m2x2_t): Ditto.
12532 (vfloat16m2x3_t): Ditto.
12533 (vfloat16m2x4_t): Ditto.
12534 (vfloat16m4x2_t): Ditto.
12535 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
12536 * config/riscv/vector.md: add tuple mode in attr sew.
12538 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
12541 * config/i386/i386.md (plusminusmult): New code iterator.
12542 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
12543 (movq_<mode>_to_sse): New expander.
12544 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
12545 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
12546 as a wrapper around V4SFmode operation.
12547 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
12548 nonimmediate_operand.
12549 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
12550 operand 2 predicates to nonimmediate_operand.
12551 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
12552 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
12553 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
12554 operand 2 predicates to nonimmediate_operand.
12555 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
12556 nonimmediate_operand.
12557 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
12558 operand 2 predicates to nonimmediate_operand.
12559 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
12560 (<smaxmin:code>v2sf3): Ditto.
12561 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
12562 predicates to nonimmediate_operand.
12563 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
12564 operand 1 and operand 2 predicates to nonimmediate_operand.
12565 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
12566 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
12567 (*mmx_haddv2sf3_low): Ditto.
12568 (*mmx_hsubv2sf3_low): Ditto.
12569 (vec_addsubv2sf3): Ditto.
12570 (*mmx_maskcmpv2sf3_comm): Remove.
12571 (*mmx_maskcmpv2sf3): Remove.
12572 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
12573 (vcond<V2FI:mode>v2sf): Ditto.
12576 (fnmav2sf4): Ditto.
12577 (fnmsv2sf4): Ditto.
12578 (fix_truncv2sfv2si2): Ditto.
12579 (fixuns_truncv2sfv2si2): Ditto.
12580 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
12581 Change operand 1 predicate to nonimmediate_operand.
12582 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
12583 (floatunsv2siv2sf2): Ditto.
12584 (mmx_floatv2siv2sf2): Remove SSE alternatives.
12585 Change operand 1 predicate to nonimmediate_operand.
12586 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
12587 (rintv2sf2): Ditto.
12588 (lrintv2sfv2si2): Ditto.
12589 (ceilv2sf2): Ditto.
12590 (lceilv2sfv2si2): Ditto.
12591 (floorv2sf2): Ditto.
12592 (lfloorv2sfv2si2): Ditto.
12593 (btruncv2sf2): Ditto.
12594 (roundv2sf2): Ditto.
12595 (lroundv2sfv2si2): Ditto.
12596 (*mmx_roundv2sf2): Remove.
12598 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
12600 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
12602 2023-07-26 Richard Biener <rguenther@suse.de>
12604 PR tree-optimization/110799
12605 * tree-ssa-pre.cc (compute_avail): More thoroughly match
12606 up TBAA behavior of redundant loads.
12608 2023-07-26 Jakub Jelinek <jakub@redhat.com>
12610 PR tree-optimization/110755
12611 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
12612 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
12613 it is exact op1 + (-op1) or op1 - op1.
12615 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
12618 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
12619 operands output with "x".
12621 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12623 * range-op.cc (class operator_absu): Add update_bitmask.
12624 (operator_absu::update_bitmask): New.
12626 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12628 * range-op-mixed.h (class operator_abs): Add update_bitmask.
12629 * range-op.cc (operator_abs::update_bitmask): New.
12631 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12633 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
12634 * range-op.cc (operator_bitwise_not::update_bitmask): New.
12636 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12638 * range-op.cc (update_known_bitmask): Handle unary operators.
12640 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12642 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
12644 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
12646 * config/riscv/riscv.md: Likewise.
12648 2023-07-26 Jan Hubicka <jh@suse.cz>
12650 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
12651 if we divide by zero.
12653 2023-07-25 David Faust <david.faust@oracle.com>
12655 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
12656 enclosing parentheses for pseudo-C dialect.
12657 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
12658 operands of pseudo-C dialect output templates where needed.
12659 (zero_extendqidi2): Likewise.
12660 (zero_extendsidi2): Likewise.
12661 (*mov<MM:mode>): Likewise.
12663 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
12665 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
12666 (bit_value_mult_const): Same.
12667 (get_individual_bits): Same.
12669 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
12672 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
12673 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
12674 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
12675 (minmax_op): New int attribute.
12676 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
12677 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
12678 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
12679 pattern to fmaxdf3.
12680 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
12682 2023-07-24 David Faust <david.faust@oracle.com>
12684 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
12686 2023-07-24 Drew Ross <drross@redhat.com>
12687 Jakub Jelinek <jakub@redhat.com>
12689 PR middle-end/109986
12690 * generic-match-head.cc (bitwise_equal_p): New macro.
12691 * gimple-match-head.cc (bitwise_equal_p): New macro.
12692 (gimple_nop_convert): Declare.
12693 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
12694 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
12696 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
12698 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
12699 single quote rather than backquote in diagnostic.
12701 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12704 * config/bpf/bpf.opt: New command-line option -msdiv.
12705 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
12706 * config/bpf/bpf.cc (bpf_option_override): Initialize
12708 * doc/invoke.texi (eBPF Options): Document -msdiv.
12710 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
12712 * config/riscv/riscv.cc (riscv_option_override): Spell out
12713 greater than and use cannot in diagnostic string.
12715 2023-07-24 Richard Biener <rguenther@suse.de>
12717 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
12718 (_slp_tree::vec_stmts): Remove.
12719 (SLP_TREE_VEC_STMTS): Remove.
12720 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
12721 (_slp_tree::_slp_tree): Adjust.
12722 (_slp_tree::~_slp_tree): Likewise.
12723 (vect_get_slp_vect_def): Simplify.
12724 (vect_get_slp_defs): Likewise.
12725 (vect_transform_slp_perm_load_1): Adjust.
12726 (vect_add_slp_permutation): Likewise.
12727 (vect_schedule_slp_node): Likewise.
12728 (vectorize_slp_instance_root_stmt): Likewise.
12729 (vect_schedule_scc): Likewise.
12730 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
12731 (vectorizable_call): Likewise.
12732 (vectorizable_call): Likewise.
12733 (vect_create_vectorized_demotion_stmts): Likewise.
12734 (vectorizable_conversion): Likewise.
12735 (vectorizable_assignment): Likewise.
12736 (vectorizable_shift): Likewise.
12737 (vectorizable_operation): Likewise.
12738 (vectorizable_load): Likewise.
12739 (vectorizable_condition): Likewise.
12740 (vectorizable_comparison): Likewise.
12741 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
12742 (vectorize_fold_left_reduction): Use push_vec_def.
12743 (vect_transform_reduction): Likewise.
12744 (vect_transform_cycle_phi): Likewise.
12745 (vectorizable_lc_phi): Likewise.
12746 (vectorizable_phi): Likewise.
12747 (vectorizable_recurr): Likewise.
12748 (vectorizable_induction): Likewise.
12749 (vectorizable_live_operation): Likewise.
12751 2023-07-24 Richard Biener <rguenther@suse.de>
12753 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
12755 2023-07-24 Richard Biener <rguenther@suse.de>
12757 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
12758 * config/i386/i386-expand.cc: Likewise.
12759 * config/i386/i386-features.cc: Likewise.
12760 * config/i386/i386-options.cc: Likewise.
12762 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
12764 * tree-vect-stmts.cc (vectorizable_conversion): Handle
12765 more demotion/promotion for modifier == NONE.
12767 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
12772 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12773 (extzv<mode>): Likewise.
12774 (insv<mode>): Likewise.
12775 (*testqi_ext_3): Likewise.
12776 (*btr<mode>_2): Likewise.
12777 (define_split): Likewise.
12778 (*btsq_imm): Likewise.
12779 (*btrq_imm): Likewise.
12780 (*btcq_imm): Likewise.
12781 (define_peephole2 x3): Likewise.
12782 (*bt<mode>): Likewise
12783 (*bt<mode>_mask): New define_insn_and_split.
12784 (*jcc_bt<mode>): Use QImode for offsets.
12785 (*jcc_bt<mode>_1): Delete obsolete pattern.
12786 (*jcc_bt<mode>_mask): Use QImode offsets.
12787 (*jcc_bt<mode>_mask_1): Likewise.
12788 (define_split): Likewise.
12789 (*bt<mode>_setcqi): Likewise.
12790 (*bt<mode>_setncqi): Likewise.
12791 (*bt<mode>_setnc<mode>): Likewise.
12792 (*bt<mode>_setncqi_2): Likewise.
12793 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12794 (bmi2_bzhi_<mode>3): Use QImode offsets.
12795 (*bmi2_bzhi_<mode>3): Likewise.
12796 (*bmi2_bzhi_<mode>3_1): Likewise.
12797 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12798 (@tbm_bextri_<mode>): Likewise.
12800 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12802 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
12803 * config/bpf/bpf.opt (mkernel): Remove option.
12804 * config/bpf/bpf.cc (bpf_target_macros): Do not define
12805 BPF_KERNEL_VERSION_CODE.
12807 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12810 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
12811 (mbswap): New option.
12812 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
12813 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
12814 * config/bpf/bpf.md: Use bswap instructions if available for
12815 bswap* insn, and fix constraint.
12816 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
12818 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12820 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
12821 (mask_len_fold_left_plus_<mode>): Ditto.
12822 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12823 (enum reduction_type): Ditto.
12824 (expand_reduction): Add in-order reduction.
12825 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
12826 (expand_reduction): Add in-order reduction.
12828 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12830 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
12831 (vectorize_fold_left_reduction): Ditto.
12832 (vectorizable_reduction): Ditto.
12833 (vect_transform_reduction): Ditto.
12835 2023-07-24 Richard Biener <rguenther@suse.de>
12837 PR tree-optimization/110777
12838 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
12839 Avoid propagating abnormals.
12841 2023-07-24 Richard Biener <rguenther@suse.de>
12843 PR tree-optimization/110766
12844 * tree-scalar-evolution.cc
12845 (analyze_and_compute_bitwise_induction_effect): Check the PHI
12846 is defined in the loop header.
12848 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
12850 PR tree-optimization/110740
12851 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
12852 loop with a single scalar iteration.
12854 2023-07-24 Pan Li <pan2.li@intel.com>
12856 * config/riscv/riscv-vector-builtins-shapes.cc
12857 (struct alu_frm_def): Take range check.
12859 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
12862 * config/riscv/predicates.md (const_0_operand): Add back
12865 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
12867 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
12868 64-bit insertions into TImode optimizations with -O0, unless
12869 the function has the "naked" attribute (for PR target/110533).
12871 2023-07-22 Andrew Pinski <apinski@marvell.com>
12874 * rtl.h (extended_count): Change last argument type
12877 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
12879 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12880 (extzv<mode>): Likewise.
12881 (insv<mode>): Likewise.
12882 (*testqi_ext_3): Likewise.
12883 (*btr<mode>_2): Likewise.
12884 (define_split): Likewise.
12885 (*btsq_imm): Likewise.
12886 (*btrq_imm): Likewise.
12887 (*btcq_imm): Likewise.
12888 (define_peephole2 x3): Likewise.
12889 (*bt<mode>): Likewise
12890 (*bt<mode>_mask): New define_insn_and_split.
12891 (*jcc_bt<mode>): Use QImode for offsets.
12892 (*jcc_bt<mode>_1): Delete obsolete pattern.
12893 (*jcc_bt<mode>_mask): Use QImode offsets.
12894 (*jcc_bt<mode>_mask_1): Likewise.
12895 (define_split): Likewise.
12896 (*bt<mode>_setcqi): Likewise.
12897 (*bt<mode>_setncqi): Likewise.
12898 (*bt<mode>_setnc<mode>): Likewise.
12899 (*bt<mode>_setncqi_2): Likewise.
12900 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12901 (bmi2_bzhi_<mode>3): Use QImode offsets.
12902 (*bmi2_bzhi_<mode>3): Likewise.
12903 (*bmi2_bzhi_<mode>3_1): Likewise.
12904 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12905 (@tbm_bextri_<mode>): Likewise.
12907 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
12909 * config/bfin/bfin.md (ones): Fix length computation.
12911 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
12913 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
12914 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
12915 instead of FRAME_POINTER_REGNUM to spill pseudos.
12917 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
12918 Richard Biener <rguenther@suse.de>
12921 * gimplify.cc (gimplify_compound_lval): If the array's type
12922 is error_mark_node then return GS_ERROR.
12924 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
12927 * config/bpf/bpf.opt: Added option -masm=<dialect>.
12928 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
12929 * config/bpf/bpf.cc (bpf_print_register): New function.
12930 (bpf_print_register): Support pseudo-c syntax for registers.
12931 (bpf_print_operand_address): Likewise.
12932 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
12933 (ASSEMBLER_DIALECT): Define.
12934 * config/bpf/bpf.md: Added pseudo-c templates.
12935 * doc/invoke.texi (-masm=): New eBPF option item.
12937 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
12939 * config/bpf/bpf.md: fixed template for neg instruction.
12941 2023-07-21 Jan Hubicka <jh@suse.cz>
12944 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
12945 profiles by vectorization factor.
12946 (vect_transform_loop): Check for flat profiles.
12948 2023-07-21 Jan Hubicka <jh@suse.cz>
12950 * cfgloop.h (maybe_flat_loop_profile): Declare
12951 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
12952 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
12954 2023-07-21 Jan Hubicka <jh@suse.cz>
12956 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
12957 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
12958 * predict.cc (estimate_bb_frequencies): Likewise.
12959 * profile.cc (branch_prob): Likewise.
12960 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
12962 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
12964 * config.in: Regenerate.
12965 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
12966 (LINK_COMMAND_SPEC_A): Add demangle handling.
12967 * configure: Regenerate.
12968 * configure.ac: Detect linker support for '-demangle'.
12970 2023-07-21 Jan Hubicka <jh@suse.cz>
12972 * sreal.cc (sreal::to_nearest_int): New.
12973 (sreal_verify_basics): Verify also to_nearest_int.
12974 (verify_aritmetics): Likewise.
12975 (sreal_verify_conversions): New.
12976 (sreal_cc_tests): Call sreal_verify_conversions.
12977 * sreal.h: (sreal::to_nearest_int): Declare
12979 2023-07-21 Jan Hubicka <jh@suse.cz>
12981 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
12982 (should_duplicate_loop_header_p): Return info on profitability.
12983 (do_while_loop_p): Watch for constant conditionals.
12984 (update_profile_after_ch): Do not sanity check that all
12985 static exits are taken.
12986 (ch_base::copy_headers): Run on all loops.
12987 (pass_ch::process_loop_p): Improve heuristics by handling also
12988 do_while loop and duplicating shortest sequence containing all
12991 2023-07-21 Jan Hubicka <jh@suse.cz>
12993 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
12994 tests first; update finite_p flag.
12996 2023-07-21 Jan Hubicka <jh@suse.cz>
12998 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
12999 * cfgloop.h (print_loop_info): Declare.
13000 * tree-cfg.cc (print_loop_info): Break out from ...; add
13001 printing of missing fields and profile
13002 (print_loop): ... here.
13004 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13006 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
13008 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13010 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
13011 (vectorizable_operation): Ditto.
13013 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13015 * config/riscv/autovec.md: Align order of mask and len.
13016 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
13017 (expand_gather_scatter): Ditto.
13018 * doc/md.texi: Ditto.
13019 * internal-fn.cc (add_len_and_mask_args): Ditto.
13020 (add_mask_and_len_args): Ditto.
13021 (expand_partial_load_optab_fn): Ditto.
13022 (expand_partial_store_optab_fn): Ditto.
13023 (expand_scatter_store_optab_fn): Ditto.
13024 (expand_gather_load_optab_fn): Ditto.
13025 (internal_fn_len_index): Ditto.
13026 (internal_fn_mask_index): Ditto.
13027 (internal_len_load_store_bias): Ditto.
13028 * tree-vect-stmts.cc (vectorizable_store): Ditto.
13029 (vectorizable_load): Ditto.
13031 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13033 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
13034 (mask_len_load<mode><vm>): Ditto.
13035 (len_maskstore<mode><vm>): Ditto.
13036 (mask_len_store<mode><vm>): Ditto.
13037 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
13038 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
13039 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
13040 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
13041 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
13042 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
13043 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
13044 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
13045 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
13046 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
13047 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
13048 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
13049 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
13050 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
13051 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
13052 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
13053 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
13054 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
13055 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
13056 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
13057 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
13058 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
13059 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
13060 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
13061 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
13062 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
13063 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
13064 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
13065 * doc/md.texi: Ditto.
13066 * genopinit.cc (main): Ditto.
13067 (CMP_NAME): Ditto. Ditto.
13068 * gimple-fold.cc (arith_overflowed_p): Ditto.
13069 (gimple_fold_partial_load_store_mem_ref): Ditto.
13070 (gimple_fold_call): Ditto.
13071 * internal-fn.cc (len_maskload_direct): Ditto.
13072 (mask_len_load_direct): Ditto.
13073 (len_maskstore_direct): Ditto.
13074 (mask_len_store_direct): Ditto.
13075 (expand_call_mem_ref): Ditto.
13076 (expand_len_maskload_optab_fn): Ditto.
13077 (expand_mask_len_load_optab_fn): Ditto.
13078 (expand_len_maskstore_optab_fn): Ditto.
13079 (expand_mask_len_store_optab_fn): Ditto.
13080 (direct_len_maskload_optab_supported_p): Ditto.
13081 (direct_mask_len_load_optab_supported_p): Ditto.
13082 (direct_len_maskstore_optab_supported_p): Ditto.
13083 (direct_mask_len_store_optab_supported_p): Ditto.
13084 (internal_load_fn_p): Ditto.
13085 (internal_store_fn_p): Ditto.
13086 (internal_gather_scatter_fn_p): Ditto.
13087 (internal_fn_len_index): Ditto.
13088 (internal_fn_mask_index): Ditto.
13089 (internal_fn_stored_value_index): Ditto.
13090 (internal_len_load_store_bias): Ditto.
13091 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
13092 (MASK_LEN_GATHER_LOAD): Ditto.
13093 (LEN_MASK_LOAD): Ditto.
13094 (MASK_LEN_LOAD): Ditto.
13095 (LEN_MASK_SCATTER_STORE): Ditto.
13096 (MASK_LEN_SCATTER_STORE): Ditto.
13097 (LEN_MASK_STORE): Ditto.
13098 (MASK_LEN_STORE): Ditto.
13099 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
13100 (supports_vec_scatter_store_p): Ditto.
13101 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
13102 (target_supports_len_load_store_p): Ditto.
13103 * optabs.def (OPTAB_CD): Ditto.
13104 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
13105 (call_may_clobber_ref_p_1): Ditto.
13106 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
13107 (dse_optimize_stmt): Ditto.
13108 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
13109 (get_alias_ptr_type_for_ptr_address): Ditto.
13110 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
13111 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
13112 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
13113 (vect_get_strided_load_store_ops): Ditto.
13114 (vectorizable_store): Ditto.
13115 (vectorizable_load): Ditto.
13117 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
13119 * config/i386/i386.opt: Fix a typo.
13121 2023-07-21 Richard Biener <rguenther@suse.de>
13123 PR tree-optimization/88540
13124 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
13125 with NaNs but handle the simple case by if-converting to a
13128 2023-07-21 Andrew Pinski <apinski@marvell.com>
13130 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
13133 2023-07-21 Richard Biener <rguenther@suse.de>
13135 PR tree-optimization/110742
13136 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
13137 Do not materialize an edge permutation in an external node with
13139 (vect_slp_analyze_node_operations_1): Guard purely internal
13142 2023-07-21 Jan Hubicka <jh@suse.cz>
13144 * cfgloop.cc: Include sreal.h.
13145 (flow_loop_dump): Dump sreal iteration exsitmate.
13146 (get_estimated_loop_iterations): Update.
13147 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
13148 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
13149 (expected_loop_iterations_unbounded): Use new API.
13150 * cfgloopmanip.cc (scale_loop_profile): Use
13151 expected_loop_iterations_by_profile
13152 * predict.cc (pass_profile::execute): Likewise.
13153 * profile.cc (branch_prob): Likewise.
13154 * tree-ssa-loop-niter.cc: Include sreal.h.
13155 (estimate_numbers_of_iterations): Likewise
13157 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
13159 PR tree-optimization/110744
13160 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
13161 operand for ifn IFN_LEN_STORE.
13163 2023-07-21 liuhongt <hongtao.liu@intel.com>
13166 * common.opt: (fcf-protection=): Add EnumSet attribute to
13167 support combination of params.
13169 2023-07-21 David Malcolm <dmalcolm@redhat.com>
13171 PR middle-end/110612
13172 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
13174 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
13175 (table_geometry::table_y_to_canvas_y): Likewise.
13176 * text-art/table.h (table_geometry::m_table): Drop unused field.
13177 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
13180 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
13183 * config/i386/i386-features.cc
13184 (general_scalar_chain::compute_convert_gain): Calculate gain
13185 for extend higpart case.
13186 (general_scalar_chain::convert_op): Handle
13187 ASHIFTRT/ASHIFT combined RTX.
13188 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
13189 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
13190 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
13191 New define_insn_and_split pattern.
13192 (*extendv2di2_highpart_stv): Ditto.
13194 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
13196 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
13199 2023-07-20 Andrew Pinski <apinski@marvell.com>
13201 * combine.cc (dump_combine_stats): Remove.
13202 (dump_combine_total_stats): Remove.
13203 (total_attempts, total_merges, total_extras,
13204 total_successes): Remove.
13205 (combine_instructions): Don't increment total stats
13206 instead use statistics_counter_event.
13207 * dumpfile.cc (print_combine_total_stats): Remove.
13208 * dumpfile.h (print_combine_total_stats): Remove.
13209 (dump_combine_total_stats): Remove.
13210 * passes.cc (finish_optimization_passes):
13211 Don't call print_combine_total_stats.
13212 * rtl.h (dump_combine_total_stats): Remove.
13213 (dump_combine_stats): Remove.
13215 2023-07-20 Jan Hubicka <jh@suse.cz>
13217 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
13220 2023-07-20 Martin Jambor <mjambor@suse.cz>
13222 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
13223 (analyzer-text-art-ideal-canvas-width): Likewise.
13224 (analyzer-text-art-string-ellipsis-head-len): Likewise.
13225 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
13227 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13229 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
13230 Refine code structure.
13232 2023-07-20 Jan Hubicka <jh@suse.cz>
13234 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
13235 (get_range_query): ... this one; do
13236 (static_loop_exit): Add query parametr, turn ranger to reference.
13237 (loop_static_stmt_p): New function.
13238 (loop_static_op_p): New function.
13239 (loop_iv_derived_p): Remove.
13240 (loop_combined_static_and_iv_p): New function.
13241 (should_duplicate_loop_header_p): Discover combined onditionals;
13242 do not track iv derived; improve dumps.
13243 (pass_ch::execute): Fix whitespace.
13245 2023-07-20 Richard Biener <rguenther@suse.de>
13247 PR tree-optimization/110204
13248 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
13249 Look through copies generated by PRE.
13251 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
13253 * tree-vect-stmts.cc (get_group_load_store_type): Account for
13254 `gap` when checking if need to peel twice.
13256 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
13258 PR middle-end/77928
13259 * doc/extend.texi: Document iseqsig builtin.
13260 * builtins.cc (fold_builtin_iseqsig): New function.
13261 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
13262 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
13263 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
13265 2023-07-20 Pan Li <pan2.li@intel.com>
13267 * config/riscv/vector.md: Fix incorrect match_operand.
13269 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
13271 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
13272 force_reg, to use SUBREG rather than create a new pseudo when
13273 inserting DFmode fields into TImode with insvti_{high,low}part.
13274 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
13275 define_insn_and_split...
13276 (*concatditi3_3): 64-bit implementation. Provide alternative
13277 that allows register allocation to use SSE registers that is
13278 split into vec_concatv2di after reload.
13279 (*concatsidi3_3): 32-bit implementation.
13281 2023-07-20 Richard Biener <rguenther@suse.de>
13283 PR middle-end/61747
13284 * internal-fn.cc (expand_vec_cond_optab_fn): When the
13285 value operands are equal to the original comparison operands
13286 preserve that equality by re-using the comparison expansion.
13287 * optabs.cc (emit_conditional_move): When the value operands
13288 are equal to the comparison operands and would be forced to
13289 a register by prepare_cmp_insn do so earlier, preserving the
13292 2023-07-20 Pan Li <pan2.li@intel.com>
13294 * config/riscv/vector.md: Align pattern format.
13296 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
13298 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
13299 Granite Rapids{, D} from documentation.
13301 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13303 * config/riscv/autovec.md
13304 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
13305 Refactor RVV machine modes.
13306 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
13307 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
13308 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
13309 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
13310 (len_mask_gather_load<mode><mode>): Ditto.
13311 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
13312 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
13313 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
13314 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
13315 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
13316 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
13317 (len_mask_scatter_store<mode><mode>): Ditto.
13318 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
13319 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
13320 (ADJUST_NUNITS): Ditto.
13321 (ADJUST_ALIGNMENT): Ditto.
13322 (ADJUST_BYTESIZE): Ditto.
13323 (ADJUST_PRECISION): Ditto.
13324 (RVV_MODES): Ditto.
13325 (RVV_WHOLE_MODES): Ditto.
13326 (RVV_FRACT_MODE): Ditto.
13327 (RVV_NF8_MODES): Ditto.
13328 (RVV_NF4_MODES): Ditto.
13329 (VECTOR_MODES_WITH_PREFIX): Ditto.
13330 (VECTOR_MODE_WITH_PREFIX): Ditto.
13331 (RVV_TUPLE_MODES): Ditto.
13332 (RVV_NF2_MODES): Ditto.
13333 (RVV_TUPLE_PARTIAL_MODES): Ditto.
13334 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
13336 (TUPLE_ENTRY): Ditto.
13337 (get_vlmul): Ditto.
13339 (get_ratio): Ditto.
13340 (preferred_simd_mode): Ditto.
13341 (autovectorize_vector_modes): Ditto.
13342 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
13343 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
13344 (vbool64_t): Ditto.
13345 (vbool32_t): Ditto.
13346 (vbool16_t): Ditto.
13351 (vint8mf8_t): Ditto.
13352 (vuint8mf8_t): Ditto.
13353 (vint8mf4_t): Ditto.
13354 (vuint8mf4_t): Ditto.
13355 (vint8mf2_t): Ditto.
13356 (vuint8mf2_t): Ditto.
13357 (vint8m1_t): Ditto.
13358 (vuint8m1_t): Ditto.
13359 (vint8m2_t): Ditto.
13360 (vuint8m2_t): Ditto.
13361 (vint8m4_t): Ditto.
13362 (vuint8m4_t): Ditto.
13363 (vint8m8_t): Ditto.
13364 (vuint8m8_t): Ditto.
13365 (vint16mf4_t): Ditto.
13366 (vuint16mf4_t): Ditto.
13367 (vint16mf2_t): Ditto.
13368 (vuint16mf2_t): Ditto.
13369 (vint16m1_t): Ditto.
13370 (vuint16m1_t): Ditto.
13371 (vint16m2_t): Ditto.
13372 (vuint16m2_t): Ditto.
13373 (vint16m4_t): Ditto.
13374 (vuint16m4_t): Ditto.
13375 (vint16m8_t): Ditto.
13376 (vuint16m8_t): Ditto.
13377 (vint32mf2_t): Ditto.
13378 (vuint32mf2_t): Ditto.
13379 (vint32m1_t): Ditto.
13380 (vuint32m1_t): Ditto.
13381 (vint32m2_t): Ditto.
13382 (vuint32m2_t): Ditto.
13383 (vint32m4_t): Ditto.
13384 (vuint32m4_t): Ditto.
13385 (vint32m8_t): Ditto.
13386 (vuint32m8_t): Ditto.
13387 (vint64m1_t): Ditto.
13388 (vuint64m1_t): Ditto.
13389 (vint64m2_t): Ditto.
13390 (vuint64m2_t): Ditto.
13391 (vint64m4_t): Ditto.
13392 (vuint64m4_t): Ditto.
13393 (vint64m8_t): Ditto.
13394 (vuint64m8_t): Ditto.
13395 (vfloat16mf4_t): Ditto.
13396 (vfloat16mf2_t): Ditto.
13397 (vfloat16m1_t): Ditto.
13398 (vfloat16m2_t): Ditto.
13399 (vfloat16m4_t): Ditto.
13400 (vfloat16m8_t): Ditto.
13401 (vfloat32mf2_t): Ditto.
13402 (vfloat32m1_t): Ditto.
13403 (vfloat32m2_t): Ditto.
13404 (vfloat32m4_t): Ditto.
13405 (vfloat32m8_t): Ditto.
13406 (vfloat64m1_t): Ditto.
13407 (vfloat64m2_t): Ditto.
13408 (vfloat64m4_t): Ditto.
13409 (vfloat64m8_t): Ditto.
13410 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
13411 (TUPLE_ENTRY): Ditto.
13412 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
13413 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
13414 (riscv_v_adjust_nunits): Ditto.
13415 (riscv_v_adjust_bytesize): Ditto.
13416 (riscv_v_adjust_precision): Ditto.
13417 (riscv_convert_vector_bits): Ditto.
13418 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
13419 * config/riscv/riscv.md: Ditto.
13420 * config/riscv/vector-iterators.md: Ditto.
13421 * config/riscv/vector.md
13422 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
13423 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
13424 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
13425 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
13426 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
13427 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
13428 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
13429 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
13430 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
13431 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
13432 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
13433 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
13434 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
13435 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
13436 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
13437 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
13438 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
13439 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
13440 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
13441 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
13442 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
13443 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
13444 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
13445 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
13446 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
13447 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
13448 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
13449 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
13450 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
13451 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
13452 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
13453 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
13454 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
13456 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
13458 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
13459 (lra_asm_insn_error): New prototype.
13460 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
13462 (lra_spill): Call lra_update_fp2sp_elimination.
13463 * lra-eliminations.cc: Remove trailing spaces.
13464 (elimination_fp2sp_occured_p): New static flag.
13465 (lra_eliminate_regs_1): Set the flag up.
13466 (update_reg_eliminate): Modify the assert for stack to frame
13467 pointer elimination.
13468 (lra_update_fp2sp_elimination): New function.
13469 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
13471 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
13473 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
13475 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
13476 dependencies from target pragmas.
13477 * config/aarch64/arm_fp16.h (target): Likewise.
13478 * config/aarch64/arm_neon.h (target): Likewise.
13480 2023-07-19 Andrew Pinski <apinski@marvell.com>
13482 PR tree-optimization/110252
13483 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
13484 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
13485 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
13486 (match_simplify_replacement): Temporarily
13487 remove the flow sensitive info on the two statements that might
13490 2023-07-19 Andrew Pinski <apinski@marvell.com>
13492 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
13493 with flow_sensitive_info_storage.
13494 (follow_outer_ssa_edges): Update how to save off the flow
13496 (maybe_fold_comparisons_from_match_pd): Update restoring
13497 of flow sensitive info.
13498 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
13499 (flow_sensitive_info_storage::restore): New method.
13500 (flow_sensitive_info_storage::save_and_clear): New method.
13501 (flow_sensitive_info_storage::clear_storage): New method.
13502 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
13504 2023-07-19 Andrew Pinski <apinski@marvell.com>
13506 PR tree-optimization/110726
13507 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
13508 Add checks to make sure the type was one bit precision
13511 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13513 * doc/md.texi: Add mask_len_fold_left_plus.
13514 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
13515 (expand_mask_len_fold_left_optab_fn): Ditto.
13516 (direct_mask_len_fold_left_optab_supported_p): Ditto.
13517 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
13518 * optabs.def (OPTAB_D): Ditto.
13520 2023-07-19 Jakub Jelinek <jakub@redhat.com>
13522 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
13524 2023-07-19 Jakub Jelinek <jakub@redhat.com>
13526 PR tree-optimization/110731
13527 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
13528 divisor as UNSIGNED regardless of sgn.
13530 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
13532 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
13533 (standard_extensions_p): Add check.
13534 (riscv_subset_list::add): Just return NULL if it failed before.
13535 (riscv_subset_list::parse_std_ext): Continue parse when find a error
13536 (riscv_subset_list::parse): Just return NULL if it failed before.
13537 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
13539 2023-07-19 Jan Beulich <jbeulich@suse.com>
13541 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
13543 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
13544 gen_vec_extract_hi.
13545 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
13546 gen_vec_interleave_low. Rename local variable.
13548 2023-07-19 Jan Beulich <jbeulich@suse.com>
13550 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
13551 alternative. Move AVX512VL part of condition to new "enabled"
13554 2023-07-19 liuhongt <hongtao.liu@intel.com>
13557 * config/i386/i386-builtins.cc
13558 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
13559 (ix86_register_bf16_builtin_type): Ditto.
13560 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
13561 isn't available, undef the macros which are used to check the
13562 backend support of the _Float16/__bf16 types when building
13563 libstdc++ and libgcc.
13564 * config/i386/i386.cc (construct_container): Issue errors for
13565 HFmode/BFmode when TARGET_SSE2 is not available.
13566 (function_value_32): Ditto.
13567 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
13568 (ix86_libgcc_floating_mode_supported_p): Ditto.
13569 (ix86_emit_support_tinfos): Adjust codes.
13570 (ix86_invalid_conversion): Return diagnostic message string
13571 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
13572 (ix86_invalid_unary_op): New function.
13573 (ix86_invalid_binary_op): Ditto.
13574 (TARGET_INVALID_UNARY_OP): Define.
13575 (TARGET_INVALID_BINARY_OP): Define.
13576 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
13577 related instrinsics header files.
13578 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
13580 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
13582 * dwarf2asm.cc: Change FALSE to false.
13583 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
13584 * dwarf2out.cc (matches_main_base): Change return type from
13585 int to bool. Change "last_match" variable to bool.
13586 (dump_struct_debug): Change return type from int to bool.
13587 Change "matches" and "result" function arguments to bool.
13588 (is_pseudo_reg): Change return type from int to bool.
13589 (is_tagged_type): Ditto.
13590 (same_loc_p): Ditto.
13591 (same_dw_val_p): Change return type from int to bool and adjust
13592 function body accordingly.
13593 (same_attr_p): Ditto.
13594 (same_die_p): Ditto.
13595 (is_type_die): Ditto.
13596 (is_declaration_die): Ditto.
13597 (should_move_die_to_comdat): Ditto.
13598 (is_base_type): Ditto.
13599 (is_based_loc): Ditto.
13600 (local_scope_p): Ditto.
13601 (class_scope_p): Ditto.
13602 (class_or_namespace_scope_p): Ditto.
13603 (is_tagged_type): Ditto.
13604 (is_rust): Use void argument.
13605 (is_nested_in_subprogram): Change return type from int to bool.
13606 (contains_subprogram_definition): Ditto.
13607 (gen_struct_or_union_type_die): Change "nested", "complete"
13608 and "ns_decl" variables to bool.
13609 (is_naming_typedef_decl): Change FALSE to false.
13611 2023-07-18 Jan Hubicka <jh@suse.cz>
13613 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
13614 for queries not in headers.
13615 (static_loop_exit): Add basic blck parameter; update use of
13617 (should_duplicate_loop_header_p): Add ranger and static_exits
13618 parameter. Do not account statements that will be optimized
13619 out after duplicaiton in overall size. Add ranger query to
13621 (update_profile_after_ch): Take static_exits has set instead of
13622 single eliminated_edge.
13623 (ch_base::copy_headers): Do all analysis in the first pass;
13624 remember invariant_exits and static_exits.
13626 2023-07-18 Jason Merrill <jason@redhat.com>
13628 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
13630 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
13632 * doc/gm2.texi (Semantic checking): Change example testwithptr
13635 2023-07-18 Richard Biener <rguenther@suse.de>
13637 PR middle-end/105715
13638 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
13639 (pass_gimple_isel::execute): ... this. Duplicate
13640 comparison defs of COND_EXPRs.
13642 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13644 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
13645 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
13646 (riscv_convert_vector_bits): Ditto.
13648 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13650 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
13651 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
13653 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
13655 * config/s390/vx-builtins.md: New vsel pattern.
13657 2023-07-18 liuhongt <hongtao.liu@intel.com>
13660 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
13661 Remove # from assemble output.
13663 2023-07-18 liuhongt <hongtao.liu@intel.com>
13666 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
13667 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
13668 3 define_peephole2 after the pattern.
13670 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13672 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
13674 2023-07-18 Pan Li <pan2.li@intel.com>
13675 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13677 * config/riscv/riscv.cc (struct machine_function): Add new field.
13678 (riscv_static_frm_mode_p): New function.
13679 (riscv_emit_frm_mode_set): New function for emit FRM.
13680 (riscv_emit_mode_set): Extract function for FRM.
13681 (riscv_mode_needed): Fix the TODO.
13682 (riscv_mode_entry): Initial dynamic frm RTL.
13683 (riscv_mode_exit): Return DYN_EXIT.
13684 * config/riscv/riscv.md: Add rdfrm.
13685 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
13686 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
13688 (fsrmsi_backup): New pattern for swap.
13689 (fsrmsi_restore): New pattern for restore.
13690 (fsrmsi_restore_exit): New pattern for restore exit.
13691 (frrmsi): New pattern for backup.
13693 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
13695 * doc/extend.texi: Add @cindex on __auto_type.
13697 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
13699 * combine-stack-adj.cc (stack_memref_p): Change return type from
13700 int to bool and adjust function body accordingly.
13701 (rest_of_handle_stack_adjustments): Change return type to void.
13703 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
13705 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
13706 (cant_combine_insn_p): Change return type from int to bool and adjust
13707 function body accordingly.
13708 (can_combine_p): Ditto.
13709 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
13710 function arguments from int to bool.
13711 (contains_muldiv): Change return type from int to bool and adjust
13712 function body accordingly.
13713 (try_combine): Ditto. Change "new_direct_jump" pointer function
13714 argument from int to bool. Change "substed_i2", "substed_i1",
13715 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
13716 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
13717 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
13718 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
13719 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
13720 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
13722 (subst): Change "in_dest", "in_cond" and "unique_copy" function
13723 arguments from int to bool.
13724 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
13725 arguments from int to bool.
13726 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
13727 function argument from int to bool.
13728 (force_int_to_mode): Change "just_select" function argument
13729 from int to bool. Change "next_select" variable to bool.
13730 (rtx_equal_for_field_assignment_p): Change return type from
13731 int to bool and adjust function body accordingly.
13732 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
13733 argument from int to bool.
13734 (get_last_value_validate): Change return type from int to bool
13735 and adjust function body accordingly.
13736 (reg_dead_at_p): Ditto.
13737 (reg_bitfield_target_p): Ditto.
13738 (combine_instructions): Ditto. Change "new_direct_jump"
13740 (can_combine_p): Change return type from int to bool
13741 and adjust function body accordingly.
13742 (likely_spilled_retval_p): Ditto.
13743 (can_change_dest_mode): Change "added_sets" function argument
13745 (find_split_point): Change "unsignedp" variable to bool.
13746 (simplify_if_then_else): Change "comparison_p" and "swapped"
13748 (simplify_set): Change "other_changed" variable to bool.
13749 (expand_compound_operation): Change "unsignedp" variable to bool.
13750 (force_to_mode): Change "just_select" function argument
13751 from int to bool. Change "next_select" variable to bool.
13752 (extended_count): Change "unsignedp" function argument to bool.
13753 (simplify_shift_const_1): Change "complement_p" variable to bool.
13754 (simplify_comparison): Change "changed" variable to bool.
13755 (rest_of_handle_combine): Change return type to void.
13757 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13760 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
13762 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
13764 * ira.cc (setup_reg_class_relations): Continue
13765 if regclass cl3 is hard_reg_set_empty_p.
13767 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13769 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
13771 2023-07-17 Martin Jambor <mjambor@suse.cz>
13773 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
13776 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13778 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
13780 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
13783 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
13784 recur add all implied extensions.
13785 (riscv_subset_list::check_implied_ext): Add new method.
13786 (riscv_subset_list::parse): Call checker check_implied_ext.
13787 * config/riscv/riscv-subset.h: Add new method.
13789 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13791 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
13792 (reduc_smax_scal_<mode>): Ditto.
13793 (reduc_umax_scal_<mode>): Ditto.
13794 (reduc_smin_scal_<mode>): Ditto.
13795 (reduc_umin_scal_<mode>): Ditto.
13796 (reduc_and_scal_<mode>): Ditto.
13797 (reduc_ior_scal_<mode>): Ditto.
13798 (reduc_xor_scal_<mode>): Ditto.
13799 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
13800 (expand_reduction): New function.
13801 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
13802 (emit_vlmax_fp_reduction_insn): Ditto.
13803 (get_m1_mode): Ditto.
13804 (expand_cond_len_binop): Fix name.
13805 (expand_reduction): New function
13806 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
13807 (validate_change_or_fail): New function.
13808 (change_insn): Fix VSETVL BUG.
13809 (change_vsetvl_insn): Ditto.
13810 (pass_vsetvl::backward_demand_fusion): Ditto.
13811 (pass_vsetvl::df_post_optimization): Ditto.
13813 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13815 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
13817 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
13819 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
13820 Remove parameter name from declaration of unused parameter.
13822 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
13824 PR tree-optimization/110652
13825 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
13828 2023-07-17 Richard Biener <rguenther@suse.de>
13830 PR tree-optimization/110669
13831 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
13832 Check we matched a header PHI.
13834 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13836 * tree-ssanames.cc (set_bitmask): New.
13837 * tree-ssanames.h (set_bitmask): New.
13839 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13841 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
13843 * value-range.h (irange_bitmask::union_): Normalize beforehand.
13844 (irange_bitmask::intersect): Same.
13846 2023-07-17 Andrew Pinski <apinski@marvell.com>
13848 PR tree-optimization/95923
13849 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
13851 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
13853 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
13854 to the std::sort comparison lambda function const.
13856 2023-07-17 Andrew Pinski <apinski@marvell.com>
13858 PR tree-optimization/110666
13859 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
13861 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
13863 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
13864 Arrow Lake and Arrow Lake S.
13865 * common/config/i386/i386-common.cc:
13866 (processor_name): Add arrowlake.
13867 (processor_alias_table): Add arrow lake, arrow lake s and lunar
13869 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
13870 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
13871 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
13872 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
13874 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
13876 * config/i386/i386-options.cc (m_ARROWLAKE): New.
13877 (processor_cost_table): Add arrowlake.
13878 * config/i386/i386.h (enum processor_type):
13879 Add PROCESSOR_ARROWLAKE.
13880 * config/i386/x86-tune.def: Add m_ARROWLAKE.
13881 * doc/extend.texi: Add arrowlake and arrowlake-s.
13882 * doc/invoke.texi: Ditto.
13884 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13886 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
13887 have the same iterator. Also renaming all the occurence to
13889 (usdot_prod<mode>): New define_expand.
13890 (udot_prod<mode>): Ditto.
13892 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13894 * common/config/i386/cpuinfo.h (get_available_features):
13896 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
13897 OPTION_MASK_ISA2_SM4_UNSET): New.
13898 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
13899 (ix86_handle_option): Handle -msm4.
13900 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13902 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13904 * config.gcc: Add sm4intrin.h.
13905 * config/i386/cpuid.h (bit_SM4): New.
13906 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13907 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13909 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
13910 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
13911 (ix86_valid_target_attribute_inner_p): Handle sm4.
13912 * config/i386/i386.opt: Add option -msm4.
13913 * config/i386/immintrin.h: Include sm4intrin.h
13914 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
13915 (vsm4rnds4_<mode>): Ditto.
13916 * doc/extend.texi: Document sm4.
13917 * doc/invoke.texi: Document -msm4.
13918 * doc/sourcebuild.texi: Document target sm4.
13919 * config/i386/sm4intrin.h: New file.
13921 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13923 * common/config/i386/cpuinfo.h (get_available_features):
13925 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
13926 OPTION_MASK_ISA2_SHA512_UNSET): New.
13927 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
13928 (ix86_handle_option): Handle -msha512.
13929 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13930 Add FEATURE_SHA512.
13931 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13933 * config.gcc: Add sha512intrin.h.
13934 * config/i386/cpuid.h (bit_SHA512): New.
13935 * config/i386/i386-builtin-types.def:
13936 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
13937 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13938 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13940 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
13941 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
13942 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
13943 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
13944 (ix86_valid_target_attribute_inner_p): Handle sha512.
13945 * config/i386/i386.opt: Add option -msha512.
13946 * config/i386/immintrin.h: Include sha512intrin.h.
13947 * config/i386/sse.md (vsha512msg1): New define insn.
13948 (vsha512msg2): Ditto.
13949 (vsha512rnds2): Ditto.
13950 * doc/extend.texi: Document sha512.
13951 * doc/invoke.texi: Document -msha512.
13952 * doc/sourcebuild.texi: Document target sha512.
13953 * config/i386/sha512intrin.h: New file.
13955 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13957 * common/config/i386/cpuinfo.h (get_available_features):
13959 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
13960 OPTION_MASK_ISA2_SM3_UNSET): New.
13961 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
13962 (ix86_handle_option): Handle -msm3.
13963 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13965 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13967 * config.gcc: Add sm3intrin.h
13968 * config/i386/cpuid.h (bit_SM3): New.
13969 * config/i386/i386-builtin-types.def:
13970 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
13971 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13972 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13974 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
13975 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
13976 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
13977 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
13978 (ix86_valid_target_attribute_inner_p): Handle sm3.
13979 * config/i386/i386.opt: Add option -msm3.
13980 * config/i386/immintrin.h: Include sm3intrin.h.
13981 * config/i386/sse.md (vsm3msg1): New define insn.
13983 (vsm3rnds2): Ditto.
13984 * doc/extend.texi: Document sm3.
13985 * doc/invoke.texi: Document -msm3.
13986 * doc/sourcebuild.texi: Document target sm3.
13987 * config/i386/sm3intrin.h: New file.
13989 2023-07-17 Kong Lingling <lingling.kong@intel.com>
13990 Haochen Jiang <haochen.jiang@intel.com>
13992 * common/config/i386/cpuinfo.h (get_available_features): Detect
13994 * common/config/i386/i386-common.cc
13995 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
13996 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
13997 (ix86_handle_option): Handle -mavxvnniint16.
13998 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13999 Add FEATURE_AVXVNNIINT16.
14000 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
14002 * config.gcc: Add avxvnniint16.h.
14003 * config/i386/avxvnniint16intrin.h: New file.
14004 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
14005 * config/i386/i386-builtin.def: Add new builtins.
14006 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
14008 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
14009 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
14010 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
14011 * config/i386/i386.opt: Add option -mavxvnniint16.
14012 * config/i386/immintrin.h: Include avxvnniint16.h.
14013 * config/i386/sse.md
14014 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
14015 * doc/extend.texi: Document avxvnniint16.
14016 * doc/invoke.texi: Document -mavxvnniint16.
14017 * doc/sourcebuild.texi: Document target avxvnniint16.
14019 2023-07-16 Jan Hubicka <jh@suse.cz>
14021 PR middle-end/110649
14022 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
14023 (vect_transform_loop): Move scale_profile_for_vect_loop after
14024 upper bound updates.
14026 2023-07-16 Jan Hubicka <jh@suse.cz>
14028 PR tree-optimization/110649
14029 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
14030 probability of the if-then-else construct.
14032 2023-07-16 Jan Hubicka <jh@suse.cz>
14034 PR middle-end/110649
14035 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
14037 2023-07-15 Andrew Pinski <apinski@marvell.com>
14039 * doc/contrib.texi: Update my entry.
14041 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
14043 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
14045 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
14046 (tld_load): Likewise.
14047 (tgd_load_pic): Change to expander.
14048 (tld_load_pic, tld_offset_load, tp_load): Likewise.
14049 (tie_load_pic, tle_load): Likewise.
14050 (tgd_load_picsi, tgd_load_picdi): New.
14051 (tld_load_picsi, tld_load_picdi): New.
14052 (tld_offset_load<P:mode>): New.
14053 (tp_load<P:mode>): New.
14054 (tie_load_picsi, tie_load_picdi): New.
14055 (tle_load<P:mode>): New.
14057 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
14059 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
14060 (vcmlaq_rot180, vcmlaq_rot270): New.
14061 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
14062 (vcmlaq_rot180, vcmlaq_rot270): New.
14063 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
14064 (vcmlaq_rot180, vcmlaq_rot270): New.
14065 * config/arm/arm-mve-builtins.cc
14066 (function_instance::has_inactive_argument): Handle vcmlaq,
14067 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
14068 * config/arm/arm_mve.h (vcmlaq): Delete.
14069 (vcmlaq_rot180): Delete.
14070 (vcmlaq_rot270): Delete.
14071 (vcmlaq_rot90): Delete.
14072 (vcmlaq_m): Delete.
14073 (vcmlaq_rot180_m): Delete.
14074 (vcmlaq_rot270_m): Delete.
14075 (vcmlaq_rot90_m): Delete.
14076 (vcmlaq_f16): Delete.
14077 (vcmlaq_rot180_f16): Delete.
14078 (vcmlaq_rot270_f16): Delete.
14079 (vcmlaq_rot90_f16): Delete.
14080 (vcmlaq_f32): Delete.
14081 (vcmlaq_rot180_f32): Delete.
14082 (vcmlaq_rot270_f32): Delete.
14083 (vcmlaq_rot90_f32): Delete.
14084 (vcmlaq_m_f32): Delete.
14085 (vcmlaq_m_f16): Delete.
14086 (vcmlaq_rot180_m_f32): Delete.
14087 (vcmlaq_rot180_m_f16): Delete.
14088 (vcmlaq_rot270_m_f32): Delete.
14089 (vcmlaq_rot270_m_f16): Delete.
14090 (vcmlaq_rot90_m_f32): Delete.
14091 (vcmlaq_rot90_m_f16): Delete.
14092 (__arm_vcmlaq_f16): Delete.
14093 (__arm_vcmlaq_rot180_f16): Delete.
14094 (__arm_vcmlaq_rot270_f16): Delete.
14095 (__arm_vcmlaq_rot90_f16): Delete.
14096 (__arm_vcmlaq_f32): Delete.
14097 (__arm_vcmlaq_rot180_f32): Delete.
14098 (__arm_vcmlaq_rot270_f32): Delete.
14099 (__arm_vcmlaq_rot90_f32): Delete.
14100 (__arm_vcmlaq_m_f32): Delete.
14101 (__arm_vcmlaq_m_f16): Delete.
14102 (__arm_vcmlaq_rot180_m_f32): Delete.
14103 (__arm_vcmlaq_rot180_m_f16): Delete.
14104 (__arm_vcmlaq_rot270_m_f32): Delete.
14105 (__arm_vcmlaq_rot270_m_f16): Delete.
14106 (__arm_vcmlaq_rot90_m_f32): Delete.
14107 (__arm_vcmlaq_rot90_m_f16): Delete.
14108 (__arm_vcmlaq): Delete.
14109 (__arm_vcmlaq_rot180): Delete.
14110 (__arm_vcmlaq_rot270): Delete.
14111 (__arm_vcmlaq_rot90): Delete.
14112 (__arm_vcmlaq_m): Delete.
14113 (__arm_vcmlaq_rot180_m): Delete.
14114 (__arm_vcmlaq_rot270_m): Delete.
14115 (__arm_vcmlaq_rot90_m): Delete.
14117 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
14119 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
14120 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
14121 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
14122 (mve_insn): Add vcmla.
14123 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
14125 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
14127 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
14128 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
14129 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
14130 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
14132 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
14134 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
14136 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
14137 (vcmulq_rot180, vcmulq_rot270): New.
14138 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
14139 (vcmulq_rot180, vcmulq_rot270): New.
14140 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
14141 (vcmulq_rot180, vcmulq_rot270): New.
14142 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
14143 (vcmulq_rot270): Delete.
14144 (vcmulq_rot180): Delete.
14146 (vcmulq_m): Delete.
14147 (vcmulq_rot180_m): Delete.
14148 (vcmulq_rot270_m): Delete.
14149 (vcmulq_rot90_m): Delete.
14150 (vcmulq_x): Delete.
14151 (vcmulq_rot90_x): Delete.
14152 (vcmulq_rot180_x): Delete.
14153 (vcmulq_rot270_x): Delete.
14154 (vcmulq_rot90_f16): Delete.
14155 (vcmulq_rot270_f16): Delete.
14156 (vcmulq_rot180_f16): Delete.
14157 (vcmulq_f16): Delete.
14158 (vcmulq_rot90_f32): Delete.
14159 (vcmulq_rot270_f32): Delete.
14160 (vcmulq_rot180_f32): Delete.
14161 (vcmulq_f32): Delete.
14162 (vcmulq_m_f32): Delete.
14163 (vcmulq_m_f16): Delete.
14164 (vcmulq_rot180_m_f32): Delete.
14165 (vcmulq_rot180_m_f16): Delete.
14166 (vcmulq_rot270_m_f32): Delete.
14167 (vcmulq_rot270_m_f16): Delete.
14168 (vcmulq_rot90_m_f32): Delete.
14169 (vcmulq_rot90_m_f16): Delete.
14170 (vcmulq_x_f16): Delete.
14171 (vcmulq_x_f32): Delete.
14172 (vcmulq_rot90_x_f16): Delete.
14173 (vcmulq_rot90_x_f32): Delete.
14174 (vcmulq_rot180_x_f16): Delete.
14175 (vcmulq_rot180_x_f32): Delete.
14176 (vcmulq_rot270_x_f16): Delete.
14177 (vcmulq_rot270_x_f32): Delete.
14178 (__arm_vcmulq_rot90_f16): Delete.
14179 (__arm_vcmulq_rot270_f16): Delete.
14180 (__arm_vcmulq_rot180_f16): Delete.
14181 (__arm_vcmulq_f16): Delete.
14182 (__arm_vcmulq_rot90_f32): Delete.
14183 (__arm_vcmulq_rot270_f32): Delete.
14184 (__arm_vcmulq_rot180_f32): Delete.
14185 (__arm_vcmulq_f32): Delete.
14186 (__arm_vcmulq_m_f32): Delete.
14187 (__arm_vcmulq_m_f16): Delete.
14188 (__arm_vcmulq_rot180_m_f32): Delete.
14189 (__arm_vcmulq_rot180_m_f16): Delete.
14190 (__arm_vcmulq_rot270_m_f32): Delete.
14191 (__arm_vcmulq_rot270_m_f16): Delete.
14192 (__arm_vcmulq_rot90_m_f32): Delete.
14193 (__arm_vcmulq_rot90_m_f16): Delete.
14194 (__arm_vcmulq_x_f16): Delete.
14195 (__arm_vcmulq_x_f32): Delete.
14196 (__arm_vcmulq_rot90_x_f16): Delete.
14197 (__arm_vcmulq_rot90_x_f32): Delete.
14198 (__arm_vcmulq_rot180_x_f16): Delete.
14199 (__arm_vcmulq_rot180_x_f32): Delete.
14200 (__arm_vcmulq_rot270_x_f16): Delete.
14201 (__arm_vcmulq_rot270_x_f32): Delete.
14202 (__arm_vcmulq_rot90): Delete.
14203 (__arm_vcmulq_rot270): Delete.
14204 (__arm_vcmulq_rot180): Delete.
14205 (__arm_vcmulq): Delete.
14206 (__arm_vcmulq_m): Delete.
14207 (__arm_vcmulq_rot180_m): Delete.
14208 (__arm_vcmulq_rot270_m): Delete.
14209 (__arm_vcmulq_rot90_m): Delete.
14210 (__arm_vcmulq_x): Delete.
14211 (__arm_vcmulq_rot90_x): Delete.
14212 (__arm_vcmulq_rot180_x): Delete.
14213 (__arm_vcmulq_rot270_x): Delete.
14215 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
14217 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
14218 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
14219 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
14220 (MVE_VCADDQ_VCMULQ_M): New.
14221 (mve_insn): Add vcmul.
14222 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
14225 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
14227 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
14228 @mve_<mve_insn>q<mve_rot>_f<mode>.
14229 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
14230 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
14231 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
14233 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
14235 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
14236 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
14237 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
14238 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
14239 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
14240 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
14241 * config/arm/arm-mve-builtins-functions.h (class
14242 unspec_mve_function_exact_insn_rot): New.
14243 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
14244 (vcaddq_rot270): Delete.
14245 (vhcaddq_rot90): Delete.
14246 (vhcaddq_rot270): Delete.
14247 (vcaddq_rot270_m): Delete.
14248 (vcaddq_rot90_m): Delete.
14249 (vhcaddq_rot270_m): Delete.
14250 (vhcaddq_rot90_m): Delete.
14251 (vcaddq_rot90_x): Delete.
14252 (vcaddq_rot270_x): Delete.
14253 (vhcaddq_rot90_x): Delete.
14254 (vhcaddq_rot270_x): Delete.
14255 (vcaddq_rot90_u8): Delete.
14256 (vcaddq_rot270_u8): Delete.
14257 (vhcaddq_rot90_s8): Delete.
14258 (vhcaddq_rot270_s8): Delete.
14259 (vcaddq_rot90_s8): Delete.
14260 (vcaddq_rot270_s8): Delete.
14261 (vcaddq_rot90_u16): Delete.
14262 (vcaddq_rot270_u16): Delete.
14263 (vhcaddq_rot90_s16): Delete.
14264 (vhcaddq_rot270_s16): Delete.
14265 (vcaddq_rot90_s16): Delete.
14266 (vcaddq_rot270_s16): Delete.
14267 (vcaddq_rot90_u32): Delete.
14268 (vcaddq_rot270_u32): Delete.
14269 (vhcaddq_rot90_s32): Delete.
14270 (vhcaddq_rot270_s32): Delete.
14271 (vcaddq_rot90_s32): Delete.
14272 (vcaddq_rot270_s32): Delete.
14273 (vcaddq_rot90_f16): Delete.
14274 (vcaddq_rot270_f16): Delete.
14275 (vcaddq_rot90_f32): Delete.
14276 (vcaddq_rot270_f32): Delete.
14277 (vcaddq_rot270_m_s8): Delete.
14278 (vcaddq_rot270_m_s32): Delete.
14279 (vcaddq_rot270_m_s16): Delete.
14280 (vcaddq_rot270_m_u8): Delete.
14281 (vcaddq_rot270_m_u32): Delete.
14282 (vcaddq_rot270_m_u16): Delete.
14283 (vcaddq_rot90_m_s8): Delete.
14284 (vcaddq_rot90_m_s32): Delete.
14285 (vcaddq_rot90_m_s16): Delete.
14286 (vcaddq_rot90_m_u8): Delete.
14287 (vcaddq_rot90_m_u32): Delete.
14288 (vcaddq_rot90_m_u16): Delete.
14289 (vhcaddq_rot270_m_s8): Delete.
14290 (vhcaddq_rot270_m_s32): Delete.
14291 (vhcaddq_rot270_m_s16): Delete.
14292 (vhcaddq_rot90_m_s8): Delete.
14293 (vhcaddq_rot90_m_s32): Delete.
14294 (vhcaddq_rot90_m_s16): Delete.
14295 (vcaddq_rot270_m_f32): Delete.
14296 (vcaddq_rot270_m_f16): Delete.
14297 (vcaddq_rot90_m_f32): Delete.
14298 (vcaddq_rot90_m_f16): Delete.
14299 (vcaddq_rot90_x_s8): Delete.
14300 (vcaddq_rot90_x_s16): Delete.
14301 (vcaddq_rot90_x_s32): Delete.
14302 (vcaddq_rot90_x_u8): Delete.
14303 (vcaddq_rot90_x_u16): Delete.
14304 (vcaddq_rot90_x_u32): Delete.
14305 (vcaddq_rot270_x_s8): Delete.
14306 (vcaddq_rot270_x_s16): Delete.
14307 (vcaddq_rot270_x_s32): Delete.
14308 (vcaddq_rot270_x_u8): Delete.
14309 (vcaddq_rot270_x_u16): Delete.
14310 (vcaddq_rot270_x_u32): Delete.
14311 (vhcaddq_rot90_x_s8): Delete.
14312 (vhcaddq_rot90_x_s16): Delete.
14313 (vhcaddq_rot90_x_s32): Delete.
14314 (vhcaddq_rot270_x_s8): Delete.
14315 (vhcaddq_rot270_x_s16): Delete.
14316 (vhcaddq_rot270_x_s32): Delete.
14317 (vcaddq_rot90_x_f16): Delete.
14318 (vcaddq_rot90_x_f32): Delete.
14319 (vcaddq_rot270_x_f16): Delete.
14320 (vcaddq_rot270_x_f32): Delete.
14321 (__arm_vcaddq_rot90_u8): Delete.
14322 (__arm_vcaddq_rot270_u8): Delete.
14323 (__arm_vhcaddq_rot90_s8): Delete.
14324 (__arm_vhcaddq_rot270_s8): Delete.
14325 (__arm_vcaddq_rot90_s8): Delete.
14326 (__arm_vcaddq_rot270_s8): Delete.
14327 (__arm_vcaddq_rot90_u16): Delete.
14328 (__arm_vcaddq_rot270_u16): Delete.
14329 (__arm_vhcaddq_rot90_s16): Delete.
14330 (__arm_vhcaddq_rot270_s16): Delete.
14331 (__arm_vcaddq_rot90_s16): Delete.
14332 (__arm_vcaddq_rot270_s16): Delete.
14333 (__arm_vcaddq_rot90_u32): Delete.
14334 (__arm_vcaddq_rot270_u32): Delete.
14335 (__arm_vhcaddq_rot90_s32): Delete.
14336 (__arm_vhcaddq_rot270_s32): Delete.
14337 (__arm_vcaddq_rot90_s32): Delete.
14338 (__arm_vcaddq_rot270_s32): Delete.
14339 (__arm_vcaddq_rot270_m_s8): Delete.
14340 (__arm_vcaddq_rot270_m_s32): Delete.
14341 (__arm_vcaddq_rot270_m_s16): Delete.
14342 (__arm_vcaddq_rot270_m_u8): Delete.
14343 (__arm_vcaddq_rot270_m_u32): Delete.
14344 (__arm_vcaddq_rot270_m_u16): Delete.
14345 (__arm_vcaddq_rot90_m_s8): Delete.
14346 (__arm_vcaddq_rot90_m_s32): Delete.
14347 (__arm_vcaddq_rot90_m_s16): Delete.
14348 (__arm_vcaddq_rot90_m_u8): Delete.
14349 (__arm_vcaddq_rot90_m_u32): Delete.
14350 (__arm_vcaddq_rot90_m_u16): Delete.
14351 (__arm_vhcaddq_rot270_m_s8): Delete.
14352 (__arm_vhcaddq_rot270_m_s32): Delete.
14353 (__arm_vhcaddq_rot270_m_s16): Delete.
14354 (__arm_vhcaddq_rot90_m_s8): Delete.
14355 (__arm_vhcaddq_rot90_m_s32): Delete.
14356 (__arm_vhcaddq_rot90_m_s16): Delete.
14357 (__arm_vcaddq_rot90_x_s8): Delete.
14358 (__arm_vcaddq_rot90_x_s16): Delete.
14359 (__arm_vcaddq_rot90_x_s32): Delete.
14360 (__arm_vcaddq_rot90_x_u8): Delete.
14361 (__arm_vcaddq_rot90_x_u16): Delete.
14362 (__arm_vcaddq_rot90_x_u32): Delete.
14363 (__arm_vcaddq_rot270_x_s8): Delete.
14364 (__arm_vcaddq_rot270_x_s16): Delete.
14365 (__arm_vcaddq_rot270_x_s32): Delete.
14366 (__arm_vcaddq_rot270_x_u8): Delete.
14367 (__arm_vcaddq_rot270_x_u16): Delete.
14368 (__arm_vcaddq_rot270_x_u32): Delete.
14369 (__arm_vhcaddq_rot90_x_s8): Delete.
14370 (__arm_vhcaddq_rot90_x_s16): Delete.
14371 (__arm_vhcaddq_rot90_x_s32): Delete.
14372 (__arm_vhcaddq_rot270_x_s8): Delete.
14373 (__arm_vhcaddq_rot270_x_s16): Delete.
14374 (__arm_vhcaddq_rot270_x_s32): Delete.
14375 (__arm_vcaddq_rot90_f16): Delete.
14376 (__arm_vcaddq_rot270_f16): Delete.
14377 (__arm_vcaddq_rot90_f32): Delete.
14378 (__arm_vcaddq_rot270_f32): Delete.
14379 (__arm_vcaddq_rot270_m_f32): Delete.
14380 (__arm_vcaddq_rot270_m_f16): Delete.
14381 (__arm_vcaddq_rot90_m_f32): Delete.
14382 (__arm_vcaddq_rot90_m_f16): Delete.
14383 (__arm_vcaddq_rot90_x_f16): Delete.
14384 (__arm_vcaddq_rot90_x_f32): Delete.
14385 (__arm_vcaddq_rot270_x_f16): Delete.
14386 (__arm_vcaddq_rot270_x_f32): Delete.
14387 (__arm_vcaddq_rot90): Delete.
14388 (__arm_vcaddq_rot270): Delete.
14389 (__arm_vhcaddq_rot90): Delete.
14390 (__arm_vhcaddq_rot270): Delete.
14391 (__arm_vcaddq_rot270_m): Delete.
14392 (__arm_vcaddq_rot90_m): Delete.
14393 (__arm_vhcaddq_rot270_m): Delete.
14394 (__arm_vhcaddq_rot90_m): Delete.
14395 (__arm_vcaddq_rot90_x): Delete.
14396 (__arm_vcaddq_rot270_x): Delete.
14397 (__arm_vhcaddq_rot90_x): Delete.
14398 (__arm_vhcaddq_rot270_x): Delete.
14400 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
14402 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
14403 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
14404 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
14405 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
14406 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
14407 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
14409 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
14410 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
14411 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
14412 VHCADDQ_ROT270_M_S.
14413 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
14414 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
14415 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
14416 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
14417 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
14418 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
14420 (VCADDQ_ROT270_M): Delete.
14421 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
14422 (VCADDQ_ROT90_M): Delete.
14423 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
14424 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
14426 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
14427 (mve_vcaddq<mve_rot><mode>): Rename into ...
14428 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
14429 (mve_vcaddq_rot270_m_<supf><mode>)
14430 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
14431 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
14432 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
14433 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
14435 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
14437 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
14440 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
14441 preparation statement over braces for a single statement.
14442 (*bt<mode>_setncqi): Likewise.
14443 (*bt<mode>_setncqi_2): New define_insn_and_split.
14445 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
14447 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
14448 case inserting of 64-bit values into a TImode register, to handle
14449 both DImode and DFmode using either *insvti_lowpart_1
14450 or *isnvti_highpart_1.
14452 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
14455 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
14456 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
14457 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
14458 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
14459 when the original source contains a paradoxical subreg.
14461 2023-07-14 Jan Hubicka <jh@suse.cz>
14463 * passes.cc (execute_function_todo): Remove
14464 TODO_rebuild_frequencies
14465 * passes.def: Add rebuild_frequencies pass.
14466 * predict.cc (estimate_bb_frequencies): Drop
14468 (tree_estimate_probability): Update call of
14469 estimate_bb_frequencies.
14470 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
14471 first and do not rebuild if not necessary.
14472 (class pass_rebuild_frequencies): New.
14473 (make_pass_rebuild_frequencies): New.
14474 * profile-count.h: Add profile_count::very_large_p.
14475 * tree-inline.cc (optimize_inline_calls): Do not return
14476 TODO_rebuild_frequencies
14477 * tree-pass.h (TODO_rebuild_frequencies): Remove.
14478 (make_pass_rebuild_frequencies): Declare.
14480 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14482 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
14483 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14484 (expand_cond_len_ternop): New function.
14485 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
14486 (expand_cond_len_ternop): Ditto.
14488 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
14491 * config/bpf/bpf.md: Enable instruction scheduling.
14493 2023-07-14 Tamar Christina <tamar.christina@arm.com>
14495 PR tree-optimization/109154
14496 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
14497 (struct bb_predicate): Add no_predicate_stmts.
14498 (set_bb_predicate): Increase predicate count.
14499 (set_bb_predicate_gimplified_stmts): Conditionally initialize
14500 no_predicate_stmts.
14501 (get_bb_num_predicate_stmts): New.
14502 (init_bb_predicate): Initialzie no_predicate_stmts.
14503 (release_bb_predicate): Cleanup no_predicate_stmts.
14504 (insert_gimplified_predicates): Preserve no_predicate_stmts.
14506 2023-07-14 Tamar Christina <tamar.christina@arm.com>
14508 PR tree-optimization/109154
14509 * tree-if-conv.cc (gen_simplified_condition,
14510 gen_phi_nest_statement): New.
14511 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
14513 2023-07-14 Richard Biener <rguenther@suse.de>
14515 * gimple.h (gimple_phi_arg): New const overload.
14516 (gimple_phi_arg_def): Make gimple arg const.
14517 (gimple_phi_arg_def_from_edge): New inline function.
14518 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
14520 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
14521 new inline function.
14522 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
14524 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
14526 * common/config/riscv/riscv-common.cc:
14527 (riscv_implied_info): Add zihintntl item.
14528 (riscv_ext_version_table): Ditto.
14529 (riscv_ext_flag_table): Ditto.
14530 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
14531 (TARGET_ZIHINTNTL): Ditto.
14533 2023-07-14 Die Li <lidie@eswincomputing.com>
14535 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
14537 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
14540 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
14541 used by the address of the following memory operand.
14543 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
14546 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
14547 deallocate alloca-only frame.
14549 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
14552 * config/darwin.h (DARWIN_PLATFORM_ID): New.
14553 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
14554 and SDK data to the static linker.
14556 2023-07-13 Carl Love <cel@us.ibm.com>
14558 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
14559 built-in definition return type.
14560 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
14561 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
14562 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
14563 argument to return FPSCR fields.
14564 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
14565 the return value. Add description for
14566 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
14568 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
14571 * config/alpha/alpha.cc (alpha_emit_set_long_const):
14572 Always use DImode when constructing long const.
14574 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
14576 * haifa-sched.cc: Change TRUE/FALSE to true/false.
14578 * lra-assigns.cc: Ditto.
14579 * lra-constraints.cc: Ditto.
14580 * sel-sched.cc: Ditto.
14582 2023-07-13 Andrew Pinski <apinski@marvell.com>
14584 PR tree-optimization/110293
14585 PR tree-optimization/110539
14586 * match.pd: Expand the `x != (typeof x)(x == 0)`
14587 pattern to handle where the inner and outer comparsions
14588 are either `!=` or `==` and handle other constants
14591 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
14593 PR middle-end/109520
14594 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
14595 (lra_asm_insn_error): New prototype.
14596 * lra.cc: Include rtl_error.h.
14597 (lra_set_insn_recog_data): Initialize asm_reloads_num.
14598 (lra_asm_insn_error): New func whose code is taken from ...
14599 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
14600 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
14602 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14604 * genmatch.cc (commutative_op): Add COND_LEN_*
14605 * internal-fn.cc (first_commutative_argument): Ditto.
14607 (get_unconditional_internal_fn): Ditto.
14608 (can_interpret_as_conditional_op_p): Ditto.
14609 (internal_fn_len_index): Ditto.
14610 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
14611 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
14612 (convert_mult_to_fma): Ditto.
14613 (math_opts_dom_walker::after_dom_children): Ditto.
14615 2023-07-13 Pan Li <pan2.li@intel.com>
14617 * config/riscv/riscv.cc (vxrm_rtx): New static var.
14619 (global_state_unknown_p): Removed.
14620 (riscv_entity_mode_after): Removed.
14621 (asm_insn_p): New function.
14622 (vxrm_unknown_p): New function for fixed-point.
14623 (riscv_vxrm_mode_after): Ditto.
14624 (frm_unknown_dynamic_p): New function for floating-point.
14625 (riscv_frm_mode_after): Ditto.
14626 (riscv_mode_after): Leverage new functions.
14628 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14630 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
14631 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
14632 calling vect_model_load_cost.
14634 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14636 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
14637 handle memory_access_type VMAT_CONTIGUOUS, remove some
14638 VMAT_CONTIGUOUS_PERMUTE related handlings.
14639 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
14640 without calling vect_model_load_cost.
14642 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14644 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
14645 VMAT_CONTIGUOUS_REVERSE any more.
14646 (vectorizable_load): Adjust the costing handling on
14647 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
14649 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14651 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
14652 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
14653 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
14654 assert it will never get VMAT_LOAD_STORE_LANES.
14656 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14658 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
14659 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
14660 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
14661 remove VMAT_GATHER_SCATTER related handlings and the related parameter
14664 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14666 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
14667 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
14668 vect_model_load_cost.
14669 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
14670 VMAT_STRIDED_SLP any more, and remove their related handlings.
14672 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14674 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
14675 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
14676 hoisting decision and without calling vect_model_load_cost.
14677 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
14678 and remove VMAT_INVARIANT related handlings.
14680 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14682 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
14683 on costing with one extra argument cost_vec.
14684 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
14685 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
14686 gs_info.decl set any more.
14688 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14690 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
14691 to vect_model_load_cost down to some different transform paths
14692 according to the handlings of different vect_memory_access_types.
14694 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14696 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
14698 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14700 * config/riscv/autovec.md
14701 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
14702 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
14703 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
14704 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
14705 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14706 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
14707 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
14708 (len_mask_gather_load<mode><mode>): Ditto.
14709 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
14710 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
14711 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
14712 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
14713 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14714 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
14715 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
14716 (len_mask_scatter_store<mode><mode>): Ditto.
14717 * config/riscv/predicates.md (const_1_operand): New predicate.
14718 (vector_gs_scale_operand_16): Ditto.
14719 (vector_gs_scale_operand_32): Ditto.
14720 (vector_gs_scale_operand_64): Ditto.
14721 (vector_gs_extension_operand): Ditto.
14722 (vector_gs_scale_operand_16_rv32): Ditto.
14723 (vector_gs_scale_operand_32_rv32): Ditto.
14724 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
14725 (expand_gather_scatter): New function.
14726 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
14727 (emit_vlmax_masked_store_insn): New function.
14728 (emit_nonvlmax_masked_store_insn): Ditto.
14729 (modulo_sel_indices): Ditto.
14730 (expand_vec_perm): Fix SLP for gather/scatter.
14731 (prepare_gather_scatter): New function.
14732 (expand_gather_scatter): Ditto.
14733 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
14734 (subreg:SI (DI CONST_POLY_INT)).
14735 * config/riscv/vector-iterators.md: Add gather/scatter.
14736 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
14737 (@vec_duplicate<mode>): Ditto.
14738 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
14740 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14742 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14744 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
14745 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14746 (expand_cond_len_binop): New function.
14747 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
14748 (emit_nonvlmax_fp_tu_insn): Ditto.
14749 (need_fp_rounding_p): Ditto.
14750 (expand_cond_len_binop): Ditto.
14751 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
14752 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
14754 2023-07-12 Jan Hubicka <jh@suse.cz>
14756 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
14757 (gimple_duplicate_seme_region): ... this; break out profile updating
14759 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
14760 (ch_base::copy_headers): Update.
14761 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
14762 (gimple_duplicate_seme_region): ... this.
14764 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14766 PR tree-optimization/107043
14767 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
14769 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14771 PR tree-optimization/107053
14772 * gimple-range-op.cc (cfn_popcount): Use known set bits.
14774 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
14776 * ira.cc (equiv_init_varies_p): Change return type from int to bool
14777 and adjust function body accordingly.
14778 (equiv_init_movable_p): Ditto.
14779 (memref_used_between_p): Ditto.
14780 * lra-constraints.cc (valid_address_p): Ditto.
14782 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14784 * range-op.cc (irange_to_masked_value): Remove.
14785 (update_known_bitmask): Update irange value/mask pair instead of
14786 only updating nonzero bits.
14788 2023-07-12 Jan Hubicka <jh@suse.cz>
14790 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
14791 parameter and rewrite profile updating code to handle edges elimination.
14792 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
14793 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
14794 (loop_iv_derived_p): New function.
14795 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
14796 of PHIs and propagation of IV derived variables.
14797 (ch_base::copy_headers): Pass around the invariant edges hash set.
14799 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
14801 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
14802 (last_active_insn): Change "skip_use_p" function argument to bool.
14803 (noce_operand_ok): Change return type from int to bool.
14804 (find_cond_trap): Ditto.
14805 (block_jumps_and_fallthru_p): Change "fallthru_p" and
14806 "jump_p" variables to bool.
14807 (noce_find_if_block): Change return type from int to bool.
14808 (cond_exec_find_if_block): Ditto.
14809 (find_if_case_1): Ditto.
14810 (find_if_case_2): Ditto.
14811 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
14812 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
14813 (cond_exec_process_insns): Change return type from int to bool.
14814 Change "mod_ok" function arg to bool.
14815 (cond_exec_process_if_block): Change return type from int to bool.
14816 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
14818 (noce_emit_store_flag): Change return type from int to bool.
14819 Change "reversep" function arg to bool. Change "cond_complex"
14821 (noce_try_move): Change return type from int to bool.
14822 (noce_try_ifelse_collapse): Ditto.
14823 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
14824 (noce_try_addcc): Change return type from int to bool. Change
14825 "subtract" variable to bool.
14826 (noce_try_store_flag_constants): Change return type from int to bool.
14827 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
14828 (noce_try_cmove): Change return type from int to bool.
14829 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
14830 (noce_try_minmax): Change return type from int to bool. Change
14831 "unsignedp" variable to bool.
14832 (noce_try_abs): Change return type from int to bool. Change
14833 "negate" variable to bool.
14834 (noce_try_sign_mask): Change return type from int to bool.
14835 (noce_try_move): Ditto.
14836 (noce_try_store_flag_constants): Ditto.
14837 (noce_try_cmove): Ditto.
14838 (noce_try_cmove_arith): Ditto.
14839 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
14840 (noce_try_bitop): Change return type from int to bool.
14841 (noce_operand_ok): Ditto.
14842 (noce_convert_multiple_sets): Ditto.
14843 (noce_convert_multiple_sets_1): Ditto.
14844 (noce_process_if_block): Ditto.
14845 (check_cond_move_block): Ditto.
14846 (cond_move_process_if_block): Ditto. Change "success_p"
14848 (rest_of_handle_if_conversion): Change return type to void.
14850 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14852 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
14854 (get_conditional_len_internal_fn): New function.
14855 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
14856 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
14859 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14862 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
14864 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14867 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
14868 define_insn_and_split derived from *add<dwi>3_doubleword_concat
14869 and *add<dwi>3_doubleword_zext.
14871 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14874 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
14875 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
14876 (peephole2): Simplify rega = 0; rega op= rega cases.
14878 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14880 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
14881 testing a TImode SUBREG of a 128-bit vector register against
14882 zero, use a PTEST instruction instead of first moving it to
14883 a pair of scalar registers.
14885 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
14887 * genopinit.cc (main): Adjust maximal number of optabs and
14889 * gensupport.cc (find_optab): Shift optab by 20 and mode by
14891 * optabs-query.h (optab_handler): Ditto.
14892 (convert_optab_handler): Ditto.
14894 2023-07-12 Richard Biener <rguenther@suse.de>
14896 PR tree-optimization/110630
14897 * tree-vect-slp.cc (vect_add_slp_permutation): New
14898 offset parameter, honor that for the extract code generation.
14899 (vectorizable_slp_permutation_1): Handle offsetted identities.
14901 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14903 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
14904 (umul<mode>3_highpart): Ditto.
14906 2023-07-12 Jan Beulich <jbeulich@suse.com>
14908 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
14909 alternative. Adjust original last alternative's "prefix"
14910 attribute to maybe_evex.
14912 2023-07-12 Jan Beulich <jbeulich@suse.com>
14914 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
14915 vbroadcastss for AVX2. New AVX512F alternative.
14916 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
14917 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
14919 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14921 * config/riscv/peephole.md: Remove XThead* peephole passes.
14922 * config/riscv/thead.md: Include thead-peephole.md.
14923 * config/riscv/thead-peephole.md: New file.
14925 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14927 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
14929 (riscv_index_reg_class): Likewise.
14930 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
14931 (riscv_index_reg_class): New function.
14932 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
14933 riscv_index_reg_class().
14934 (REGNO_OK_FOR_INDEX_P): Call new function
14935 riscv_regno_ok_for_index_p().
14937 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14939 * config/riscv/riscv-protos.h (enum riscv_address_type):
14940 New location of type definition.
14941 (struct riscv_address_info): Likewise.
14942 * config/riscv/riscv.cc (enum riscv_address_type):
14943 Old location of type definition.
14944 (struct riscv_address_info): Likewise.
14946 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14948 * config/riscv/riscv.h (Xmode): New macro.
14950 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14952 * config/riscv/riscv.cc (riscv_print_operand_address): Use
14953 output_addr_const rather than riscv_print_operand.
14955 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14957 * config/riscv/thead.md: Adjust constraints of th_addsl.
14959 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14961 * config/riscv/thead.cc (th_mempair_operands_p):
14962 Fix documentation of th_mempair_order_operands().
14964 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14966 * config/riscv/thead.cc (th_mempair_save_regs):
14967 Emit REG_FRAME_RELATED_EXPR notes in prologue.
14969 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14971 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
14972 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
14973 New XThead extension INSN.
14974 (*zero_extendsidi2_th_extu): New XThead extension INSN.
14975 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
14977 2023-07-12 liuhongt <hongtao.liu@intel.com>
14981 * config/i386/predicates.md
14982 (int_float_vector_all_ones_operand): New predicate.
14983 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
14985 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
14987 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
14989 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
14990 define_insn_and_split to avoid false dependence.
14991 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
14992 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
14993 of operands 1 to '0' to avoid false dependence.
14994 (*andnot<mode>3): Ditto.
14995 (iornot<mode>3): Ditto.
14996 (*<nlogic><mode>3): Ditto.
14998 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
15000 * common/config/i386/cpuinfo.h
15001 (get_intel_cpu): Handle Granite Rapids D.
15002 * common/config/i386/i386-common.cc:
15003 (processor_alias_table): Add graniterapids-d.
15004 * common/config/i386/i386-cpuinfo.h
15005 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
15006 * config.gcc: Add -march=graniterapids-d.
15007 * config/i386/driver-i386.cc (host_detect_local_cpu):
15008 Handle graniterapids-d.
15009 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
15010 * doc/extend.texi: Add graniterapids-d.
15011 * doc/invoke.texi: Ditto.
15013 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
15015 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
15016 Add OPTION_MASK_ISA_AVX512VL.
15017 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
15020 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15022 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
15023 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
15024 (shuffle_compress_patterns): Ditto.
15025 (expand_vec_perm_const_1): Ditto.
15027 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
15029 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
15030 * cfghooks.h (struct cfg_hooks): Change return type of
15031 verify_flow_info from integer to bool.
15032 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
15033 (can_delete_label_p): Ditto.
15034 (rtl_verify_flow_info): Change return type from int to bool
15035 and adjust function body accordingly. Change "err" variable to bool.
15036 (rtl_verify_flow_info_1): Ditto.
15037 (free_bb_for_insn): Change return type to void.
15038 (rtl_merge_blocks): Change "b_empty" variable to bool.
15039 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
15040 (verify_hot_cold_block_grouping): Change return type from int to bool.
15041 Change "err" variable to bool.
15042 (rtl_verify_edges): Ditto.
15043 (rtl_verify_bb_insns): Ditto.
15044 (rtl_verify_bb_pointers): Ditto.
15045 (rtl_verify_bb_insn_chain): Ditto.
15046 (rtl_verify_fallthru): Ditto.
15047 (rtl_verify_bb_layout): Ditto.
15048 (purge_all_dead_edges): Change "purged" variable to bool.
15049 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
15050 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
15051 (load_killed_in_block_p): Change return type from int to bool
15052 and adjust function body accordingly.
15053 (oprs_unchanged_p): Return true/false.
15054 (rest_of_handle_gcse2): Change return type to void.
15055 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
15056 int to bool. Change "err" variable to bool.
15058 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
15060 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
15062 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15064 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
15065 * internal-fn.cc (cond_len_unary_direct): Ditto.
15066 (cond_len_binary_direct): Ditto.
15067 (cond_len_ternary_direct): Ditto.
15068 (expand_cond_len_unary_optab_fn): Ditto.
15069 (expand_cond_len_binary_optab_fn): Ditto.
15070 (expand_cond_len_ternary_optab_fn): Ditto.
15071 (direct_cond_len_unary_optab_supported_p): Ditto.
15072 (direct_cond_len_binary_optab_supported_p): Ditto.
15073 (direct_cond_len_ternary_optab_supported_p): Ditto.
15074 * internal-fn.def (COND_LEN_ADD): Ditto.
15075 (COND_LEN_SUB): Ditto.
15076 (COND_LEN_MUL): Ditto.
15077 (COND_LEN_DIV): Ditto.
15078 (COND_LEN_MOD): Ditto.
15079 (COND_LEN_RDIV): Ditto.
15080 (COND_LEN_MIN): Ditto.
15081 (COND_LEN_MAX): Ditto.
15082 (COND_LEN_FMIN): Ditto.
15083 (COND_LEN_FMAX): Ditto.
15084 (COND_LEN_AND): Ditto.
15085 (COND_LEN_IOR): Ditto.
15086 (COND_LEN_XOR): Ditto.
15087 (COND_LEN_SHL): Ditto.
15088 (COND_LEN_SHR): Ditto.
15089 (COND_LEN_FMA): Ditto.
15090 (COND_LEN_FMS): Ditto.
15091 (COND_LEN_FNMA): Ditto.
15092 (COND_LEN_FNMS): Ditto.
15093 (COND_LEN_NEG): Ditto.
15094 * optabs.def (OPTAB_D): Ditto.
15096 2023-07-11 Richard Biener <rguenther@suse.de>
15098 PR tree-optimization/110614
15099 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
15100 SLP splats are not suitable for re-align ops.
15102 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
15104 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
15106 (vsx_quad_dform_memory_operand): Likewise.
15108 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
15110 * reorg.cc (stop_search_p): Change return type from int to bool
15111 and adjust function body accordingly.
15112 (resource_conflicts_p): Ditto.
15113 (insn_references_resource_p): Change return type from int to bool.
15114 (insn_sets_resource_p): Ditto.
15115 (redirect_with_delay_slots_safe_p): Ditto.
15116 (condition_dominates_p): Change return type from int to bool
15117 and adjust function body accordingly.
15118 (redirect_with_delay_list_safe_p): Ditto.
15119 (check_annul_list_true_false): Ditto. Change "annul_true_p"
15120 function argument to bool.
15121 (steal_delay_list_from_target): Change "pannul_p" function
15122 argument to bool pointer. Change "must_annul" and "used_annul"
15123 variables from int to bool.
15124 (steal_delay_list_from_fallthrough): Ditto.
15125 (own_thread_p): Change return type from int to bool and adjust
15126 function body accordingly. Change "allow_fallthrough" function
15128 (reorg_redirect_jump): Change return type from int to bool.
15129 (fill_simple_delay_slots): Change "non_jumps_p" function
15130 argument from int to bool. Change "maybe_never" varible to bool.
15131 (fill_slots_from_thread): Change "likely", "thread_if_true" and
15132 "own_thread" function arguments to bool. Change "lose" and
15133 "must_annul" variables to bool.
15134 (delete_from_delay_slot): Change "had_barrier" variable to bool.
15135 (try_merge_delay_insns): Change "annul_p" variable to bool.
15136 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
15138 (rest_of_handle_delay_slots): Change return type from int to void
15139 and adjust function body accordingly.
15141 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
15143 * doc/extend.texi (RISC-V Operand Modifiers): New.
15145 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15147 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
15148 (insert_insn_end_basic_block): Ditto.
15149 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
15150 * gcse.cc (insert_insn_end_basic_block): Export as global function.
15151 * gcse.h (insert_insn_end_basic_block): Ditto.
15153 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
15156 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
15157 (arm_builtin_decl): Hahndle MVE builtins.
15158 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
15159 (add_unique_function): Fix handling of
15160 __ARM_MVE_PRESERVE_USER_NAMESPACE.
15161 (add_overloaded_function): Likewise.
15162 * config/arm/arm-protos.h (builtin_decl): New declaration.
15164 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
15166 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
15168 2023-07-10 Xi Ruoyao <xry111@xry111.site>
15170 PR tree-optimization/110557
15171 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
15172 Ensure the output sign-extended if necessary.
15174 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
15176 * config/i386/i386.md (peephole2): Transform xchg insn with a
15177 REG_UNUSED note to a (simple) move.
15178 (*insvti_lowpart_1): New define_insn_and_split.
15179 (*insvdi_lowpart_1): Likewise.
15181 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
15183 * config/i386/i386-features.cc (compute_convert_gain): Tweak
15184 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
15185 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
15186 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
15188 2023-07-10 liuhongt <hongtao.liu@intel.com>
15191 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
15192 splitter to detect fp max pattern.
15193 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
15195 2023-07-09 Jan Hubicka <jh@suse.cz>
15197 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
15198 (dump_edge_info): Likewise.
15199 (dump_bb_info): Likewise.
15200 * profile-count.cc (profile_count::dump): Add comma between quality and
15203 2023-07-08 Jan Hubicka <jh@suse.cz>
15205 PR tree-optimization/110600
15206 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
15208 2023-07-08 Jan Hubicka <jh@suse.cz>
15210 PR middle-end/110590
15211 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
15212 inner loops and be more careful about inconsistent profiles.
15213 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
15214 exit is followed by other exit.
15216 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
15218 * cprop.cc (reg_available_p): Change return type from int to bool.
15219 (reg_not_set_p): Ditto.
15220 (try_replace_reg): Ditto. Change "success" variable to bool.
15221 (cprop_jump): Change return type from int to void
15222 and adjust function body accordingly.
15223 (constprop_register): Ditto.
15224 (cprop_insn): Ditto. Change "changed" variable to bool.
15225 (local_cprop_pass): Change return type from int to void
15226 and adjust function body accordingly.
15227 (bypass_block): Ditto. Change "change", "may_be_loop_header"
15228 and "removed_p" variables to bool.
15229 (bypass_conditional_jumps): Change return type from int to void
15230 and adjust function body accordingly. Change "changed"
15232 (one_cprop_pass): Ditto.
15234 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
15236 * gcse.cc (expr_equiv_p): Change return type from int to bool.
15237 (oprs_unchanged_p): Change return type from int to void
15238 and adjust function body accordingly.
15239 (oprs_anticipatable_p): Ditto.
15240 (oprs_available_p): Ditto.
15241 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
15242 arguments to bool. Change "found" variable to bool.
15243 (load_killed_in_block_p): Change return type from int to void and
15244 adjust function body accordingly. Change "avail_p" argument to bool.
15245 (pre_expr_reaches_here_p): Change return type from int to void
15246 and adjust function body accordingly.
15247 (pre_delete): Ditto. Change "changed" variable to bool.
15248 (pre_gcse): Change return type from int to void
15249 and adjust function body accordingly. Change "did_insert" and
15250 "changed" variables to bool.
15251 (one_pre_gcse_pass): Change return type from int to void
15252 and adjust function body accordingly. Change "changed" variable
15254 (should_hoist_expr_to_dom): Change return type from int to void
15255 and adjust function body accordingly. Change
15256 "visited_allocated_locally" variable to bool.
15257 (hoist_code): Change return type from int to void and adjust
15258 function body accordingly. Change "changed" variable to bool.
15259 (one_code_hoisting_pass): Ditto.
15260 (pre_edge_insert): Change return type from int to void and adjust
15261 function body accordingly. Change "did_insert" variable to bool.
15262 (pre_expr_reaches_here_p_work): Change return type from int to void
15263 and adjust function body accordingly.
15264 (simple_mem): Ditto.
15265 (want_to_gcse_p): Change return type from int to void
15266 and adjust function body accordingly.
15267 (can_assign_to_reg_without_clobbers_p): Update function body
15268 for bool return type.
15269 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
15270 (pre_insert_copies): Change "added_copy" variable to bool.
15272 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
15276 * doc/invoke.texi (Warning Options): Fix typos.
15278 2023-07-07 Jan Hubicka <jh@suse.cz>
15280 * profile-count.cc (profile_count::dump): Add FUN
15281 parameter; print relative frequency.
15282 (profile_count::debug): Update.
15283 * profile-count.h (profile_count::dump): Update
15286 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
15290 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
15291 TImode destinations from paradoxical SUBREGs (setting the lowpart)
15292 into explicit zero extensions. Use *insvti_highpart_1 instruction
15293 to set the highpart of a TImode destination.
15295 2023-07-07 Jan Hubicka <jh@suse.cz>
15297 * predict.cc (force_edge_cold): Use
15298 set_edge_probability_and_rescale_others; improve dumps.
15300 2023-07-07 Jan Hubicka <jh@suse.cz>
15302 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
15304 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
15307 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
15309 * config/s390/s390.cc (vec_init): Fix default case
15311 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
15313 * lra-assigns.cc (assign_by_spills): Add reload insns involving
15314 reload pseudos with non-refined class to be processed on the next
15316 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
15317 (in_class_p): Use it.
15318 (print_curr_insn_alt): New func.
15319 (process_alt_operands): Use it. Improve debug info.
15320 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
15321 pseudo class if it is not refined yet.
15323 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
15325 * value-range.cc (irange::get_bitmask_from_range): Return all the
15326 known bits for a singleton.
15327 (irange::set_range_from_bitmask): Set a range of a singleton when
15328 all bits are known.
15330 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
15332 * value-range.cc (irange::intersect): Leave normalization to
15335 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
15337 * data-streamer-in.cc (streamer_read_value_range): Adjust for
15339 * data-streamer-out.cc (streamer_write_vrange): Same.
15340 * range-op.cc (operator_cast::fold_range): Same.
15341 * value-range-pretty-print.cc
15342 (vrange_printer::print_irange_bitmasks): Same.
15343 * value-range-storage.cc (irange_storage::write_lengths_address):
15345 (irange_storage::set_irange): Same.
15346 (irange_storage::get_irange): Same.
15347 (irange_storage::size): Same.
15348 (irange_storage::dump): Same.
15349 * value-range-storage.h: Same.
15350 * value-range.cc (debug): New.
15351 (irange_bitmask::dump): New.
15352 (add_vrange): Adjust for value/mask.
15353 (irange::operator=): Same.
15354 (irange::set): Same.
15355 (irange::verify_range): Same.
15356 (irange::operator==): Same.
15357 (irange::contains_p): Same.
15358 (irange::irange_single_pair_union): Same.
15359 (irange::union_): Same.
15360 (irange::intersect): Same.
15361 (irange::invert): Same.
15362 (irange::get_nonzero_bits_from_range): Rename to...
15363 (irange::get_bitmask_from_range): ...this.
15364 (irange::set_range_from_nonzero_bits): Rename to...
15365 (irange::set_range_from_bitmask): ...this.
15366 (irange::set_nonzero_bits): Rename to...
15367 (irange::update_bitmask): ...this.
15368 (irange::get_nonzero_bits): Rename to...
15369 (irange::get_bitmask): ...this.
15370 (irange::intersect_nonzero_bits): Rename to...
15371 (irange::intersect_bitmask): ...this.
15372 (irange::union_nonzero_bits): Rename to...
15373 (irange::union_bitmask): ...this.
15374 (irange_bitmask::verify_mask): New.
15375 * value-range.h (class irange_bitmask): New.
15376 (irange_bitmask::set_unknown): New.
15377 (irange_bitmask::unknown_p): New.
15378 (irange_bitmask::irange_bitmask): New.
15379 (irange_bitmask::get_precision): New.
15380 (irange_bitmask::get_nonzero_bits): New.
15381 (irange_bitmask::set_nonzero_bits): New.
15382 (irange_bitmask::operator==): New.
15383 (irange_bitmask::union_): New.
15384 (irange_bitmask::intersect): New.
15385 (class irange): Friend vrange_printer.
15386 (irange::varying_compatible_p): Adjust for bitmask.
15387 (irange::set_varying): Same.
15388 (irange::set_nonzero): Same.
15390 2023-07-07 Jan Beulich <jbeulich@suse.com>
15392 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
15394 2023-07-07 Jan Beulich <jbeulich@suse.com>
15396 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
15397 alternative. Switch new last alternative's "isa" attribute to
15399 (vec_extract_hi_v32qi): Likewise.
15401 2023-07-07 Pan Li <pan2.li@intel.com>
15402 Robin Dapp <rdapp@ventanamicro.com>
15404 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
15406 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
15407 (riscv_mode_exit): Likewise for exit mode.
15408 (riscv_mode_needed): Likewise for needed mode.
15409 (riscv_mode_after): Likewise for after mode.
15411 2023-07-07 Pan Li <pan2.li@intel.com>
15413 * config/riscv/vector.md: Fix typo.
15415 2023-07-06 Jan Hubicka <jh@suse.cz>
15417 PR middle-end/25623
15418 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
15419 of iterations determined.
15420 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
15422 2023-07-06 Jan Hubicka <jh@suse.cz>
15424 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
15425 probability update to be safe on loops with subloops.
15426 Make bound parameter to be iteration bound.
15427 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
15428 of scale_loop_profile.
15429 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
15431 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
15433 PR tree-optimization/110449
15434 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
15435 vec_loop for the unrolled loop.
15437 2023-07-06 Jan Hubicka <jh@suse.cz>
15439 * cfg.cc (set_edge_probability_and_rescale_others): New function.
15440 (update_bb_profile_for_threading): Use it; simplify the rest.
15441 * cfg.h (set_edge_probability_and_rescale_others): Declare.
15442 * profile-count.h (profile_probability::apply_scale): New.
15444 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
15446 * doc/extend.texi (ARC Built-in Functions): Update documentation
15447 with missing builtins.
15449 2023-07-06 Richard Biener <rguenther@suse.de>
15451 PR tree-optimization/110556
15452 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
15453 assign code and all operands of non-stores.
15455 2023-07-06 Richard Biener <rguenther@suse.de>
15457 PR tree-optimization/110563
15458 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
15459 Remove second argument.
15460 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
15461 Remove for_epilogue_p argument. Merge assert ...
15462 (vect_analyze_loop_2): ... with check done before determining
15463 partial vectors by moving it after.
15464 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
15466 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15468 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
15469 few things re 'reorder' option and strings.
15470 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
15472 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15474 * gengtype-parse.cc: Clean up obsolete parametrized structs
15476 * gengtype.cc: Likewise.
15477 * gengtype.h: Likewise.
15479 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15481 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
15484 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15486 * gengtype-parse.cc (token_names): Add '"user"'.
15487 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
15488 'FIRST_TOKEN_WITH_VALUE'.
15490 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15492 * doc/gty.texi (GTY Options) <string_length>: Enhance.
15494 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15496 * gengtype.cc (write_root, write_roots): Explicitly reject
15497 'string_length' option.
15498 * doc/gty.texi (GTY Options) <string_length>: Document.
15500 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15502 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
15503 (ggc_pch_write_object): Remove 'bool is_string' argument.
15504 * ggc-common.cc: Adjust.
15505 * ggc-page.cc: Likewise.
15507 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
15509 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
15511 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
15513 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
15514 and add description for inling of function with arch and tune
15517 2023-07-06 Richard Biener <rguenther@suse.de>
15519 PR tree-optimization/110515
15520 * tree-ssa-pre.cc (compute_avail): Make code dealing
15521 with hoisting loads with different alias-sets more
15524 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15526 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
15528 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
15530 * config/i386/i386.cc (ix86_can_inline_p): If callee has
15531 default arch=x86-64 and tune=generic, do not block the
15532 inlining to its caller. Also allow callee with different
15533 arch= to be inlined if it has always_inline attribute and
15534 it's ISA is subset of caller's.
15536 2023-07-06 liuhongt <hongtao.liu@intel.com>
15538 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
15539 DF/SFmode AND/IOR/XOR/ANDN operations.
15541 2023-07-06 Andrew Pinski <apinski@marvell.com>
15543 PR middle-end/110554
15544 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
15545 just build using boolean_type_node instead of the cond_type.
15546 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
15547 that will feed into the COND_EXPR.
15549 2023-07-06 liuhongt <hongtao.liu@intel.com>
15552 * config/i386/i386.md (movdf_internal): Disparage slightly for
15553 2 alternatives (r,v) and (v,r) by adding constraint modifier
15556 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
15559 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
15560 initialization of new_addr.
15562 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
15564 PR tree-optimization/110474
15565 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
15566 unroll factor while selecting the epilog vect loop VF.
15568 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15570 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
15573 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15575 * gimple-range-gori.cc (compute_operand_range): After calling
15576 compute_operand2_range, recursively call self if needed.
15577 (compute_operand2_range): Turn into a leaf function.
15578 (gori_compute::compute_operand1_and_operand2_range): Finish
15579 operand2 calculation.
15580 * gimple-range-gori.h (compute_operand2_range): Remove name param.
15582 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15584 * gimple-range-gori.cc (compute_operand_range): After calling
15585 compute_operand1_range, recursively call self if needed.
15586 (compute_operand1_range): Turn into a leaf function.
15587 (gori_compute::compute_operand1_and_operand2_range): Finish
15588 operand1 calculation.
15589 * gimple-range-gori.h (compute_operand1_range): Remove name param.
15591 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15593 * gimple-range-gori.cc (compute_operand_range): Check for
15594 operand interdependence when both op1 and op2 are computed.
15595 (compute_operand1_and_operand2_range): No checks required now.
15597 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15599 * gimple-range-gori.cc (compute_operand_range): Check for
15600 a relation between op1 and op2 and use that instead.
15601 (compute_operand1_range): Don't look for a relation override.
15602 (compute_operand2_range): Ditto.
15604 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
15606 * doc/contrib.texi (Contributors): Update my entry.
15608 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
15610 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
15613 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
15615 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
15616 scehdule_more_p and contributes_to_priority indirect frunction
15617 type from int to bool.
15618 (no_real_insns_p): Change return type from int to bool.
15619 (contributes_to_priority): Ditto.
15620 * haifa-sched.cc (no_real_insns_p): Change return type from
15621 int to bool and adjust function body accordingly.
15622 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
15623 variable type from int to bool.
15624 (ps_insn_advance_column): Change return type from int to bool.
15625 (ps_has_conflicts): Ditto. Change "has_conflicts"
15626 variable type from int to bool.
15627 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
15628 (conditions_mutex_p): Ditto.
15629 * sched-ebb.cc (schedule_more_p): Ditto.
15630 (ebb_contributes_to_priority): Change return type from
15631 int to bool and adjust function body accordingly.
15632 * sched-rgn.cc (is_cfg_nonregular): Ditto.
15633 (check_live_1): Ditto.
15635 (find_conditional_protection): Ditto.
15636 (is_conditionally_protected): Ditto.
15637 (is_prisky): Ditto.
15638 (is_exception_free): Ditto.
15639 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
15640 variables from int to bool.
15641 (extend_rgns): Change "rescan" variable from int to bool.
15642 (check_live): Change return type from
15643 int to bool and adjust function body accordingly.
15644 (can_schedule_ready_p): Ditto.
15645 (schedule_more_p): Ditto.
15646 (contributes_to_priority): Ditto.
15648 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15650 * doc/md.texi: Document that vec_set and vec_extract must not
15652 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
15653 (gimple_expand_vec_set_extract_expr): ...to this.
15654 (gimple_expand_vec_exprs): Call renamed function.
15655 * internal-fn.cc (vec_extract_direct): Add.
15656 (expand_vec_extract_optab_fn): New function to expand
15658 (direct_vec_extract_optab_supported_p): Add.
15659 * internal-fn.def (VEC_EXTRACT): Add.
15660 * optabs.cc (can_vec_extract_var_idx_p): New function.
15661 * optabs.h (can_vec_extract_var_idx_p): Declare.
15663 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15665 * config/riscv/autovec.md: Add gen_lowpart.
15667 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15669 * config/riscv/autovec.md: Allow register index operand.
15671 2023-07-05 Pan Li <pan2.li@intel.com>
15673 * config/riscv/riscv-vector-builtins.cc
15674 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
15676 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15678 * config/riscv/autovec.md: Use float_truncate.
15680 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15682 * internal-fn.cc (internal_fn_len_index): Apply
15683 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
15684 (internal_fn_mask_index): Ditto.
15685 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
15686 (supports_vec_scatter_store_p): Ditto.
15687 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
15688 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
15689 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
15690 (vect_get_strided_load_store_ops): Ditto.
15691 (vectorizable_store): Ditto.
15692 (vectorizable_load): Ditto.
15694 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15695 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15697 * simplify-rtx.cc (native_encode_rtx): Ditto.
15698 (native_decode_vector_rtx): Ditto.
15699 (simplify_const_vector_byte_offset): Ditto.
15700 (simplify_const_vector_subreg): Ditto.
15701 * tree.cc (build_truth_vector_type_for_mode): Ditto.
15702 * varasm.cc (output_constant_pool_2): Ditto.
15704 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
15706 * config/mips/mips.cc (mips_expand_block_move): don't expand for
15707 r6 with -mno-unaligned-access option if one or both of src and
15708 dest are unaligned. restruct: return directly if length is not const.
15709 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
15711 2023-07-05 Jan Beulich <jbeulich@suse.com>
15714 * config/i386/sse.md: New splitters to simplify
15715 not;vec_duplicate as a singular vpternlog.
15716 (one_cmpl<mode>2): Allow broadcast for operand 1.
15717 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
15719 2023-07-05 Jan Beulich <jbeulich@suse.com>
15722 * config/i386/sse.md: New splitters to simplify
15723 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
15725 2023-07-05 Jan Beulich <jbeulich@suse.com>
15728 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
15729 form of splitter for PR target/100711.
15731 2023-07-05 Richard Biener <rguenther@suse.de>
15733 PR middle-end/110541
15734 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
15737 2023-07-05 Jan Beulich <jbeulich@suse.com>
15740 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
15741 for memory form operand 1.
15743 2023-07-05 Jan Beulich <jbeulich@suse.com>
15746 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
15747 bitwise vector operations.
15748 * config/i386/sse.md (*iornot<mode>3): New insn.
15749 (*xnor<mode>3): Likewise.
15750 (*<nlogic><mode>3): Likewise.
15751 (andor): New code iterator.
15752 (nlogic): New code attribute.
15753 (ternlog_nlogic): Likewise.
15755 2023-07-05 Richard Biener <rguenther@suse.de>
15757 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
15759 2023-07-05 yulong <shiyulong@iscas.ac.cn>
15761 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
15763 2023-07-05 yulong <shiyulong@iscas.ac.cn>
15765 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
15766 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
15767 (ADJUST_ALIGNMENT): Ditto.
15768 (RVV_TUPLE_PARTIAL_MODES): Ditto.
15769 (ADJUST_NUNITS): Ditto.
15770 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
15772 (vfloat16mf4x3_t): Ditto.
15773 (vfloat16mf4x4_t): Ditto.
15774 (vfloat16mf4x5_t): Ditto.
15775 (vfloat16mf4x6_t): Ditto.
15776 (vfloat16mf4x7_t): Ditto.
15777 (vfloat16mf4x8_t): Ditto.
15778 (vfloat16mf2x2_t): Ditto.
15779 (vfloat16mf2x3_t): Ditto.
15780 (vfloat16mf2x4_t): Ditto.
15781 (vfloat16mf2x5_t): Ditto.
15782 (vfloat16mf2x6_t): Ditto.
15783 (vfloat16mf2x7_t): Ditto.
15784 (vfloat16mf2x8_t): Ditto.
15785 (vfloat16m1x2_t): Ditto.
15786 (vfloat16m1x3_t): Ditto.
15787 (vfloat16m1x4_t): Ditto.
15788 (vfloat16m1x5_t): Ditto.
15789 (vfloat16m1x6_t): Ditto.
15790 (vfloat16m1x7_t): Ditto.
15791 (vfloat16m1x8_t): Ditto.
15792 (vfloat16m2x2_t): Ditto.
15793 (vfloat16m2x3_t): Ditto.
15794 (vfloat16m2x4_t): Ditto.
15795 (vfloat16m4x2_t): Ditto.
15796 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
15797 (vfloat16mf4x3_t): Ditto.
15798 (vfloat16mf4x4_t): Ditto.
15799 (vfloat16mf4x5_t): Ditto.
15800 (vfloat16mf4x6_t): Ditto.
15801 (vfloat16mf4x7_t): Ditto.
15802 (vfloat16mf4x8_t): Ditto.
15803 (vfloat16mf2x2_t): Ditto.
15804 (vfloat16mf2x3_t): Ditto.
15805 (vfloat16mf2x4_t): Ditto.
15806 (vfloat16mf2x5_t): Ditto.
15807 (vfloat16mf2x6_t): Ditto.
15808 (vfloat16mf2x7_t): Ditto.
15809 (vfloat16mf2x8_t): Ditto.
15810 (vfloat16m1x2_t): Ditto.
15811 (vfloat16m1x3_t): Ditto.
15812 (vfloat16m1x4_t): Ditto.
15813 (vfloat16m1x5_t): Ditto.
15814 (vfloat16m1x6_t): Ditto.
15815 (vfloat16m1x7_t): Ditto.
15816 (vfloat16m1x8_t): Ditto.
15817 (vfloat16m2x2_t): Ditto.
15818 (vfloat16m2x3_t): Ditto.
15819 (vfloat16m2x4_t): Ditto.
15820 (vfloat16m4x2_t): Ditto.
15821 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
15822 * config/riscv/riscv.md: New.
15823 * config/riscv/vector-iterators.md: New.
15825 2023-07-04 Andrew Pinski <apinski@marvell.com>
15827 PR tree-optimization/110487
15828 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
15829 build a nonstandard integer and use that.
15831 2023-07-04 Andrew Pinski <apinski@marvell.com>
15833 * match.pd (a?-1:0): Cast type an integer type
15834 rather the type before the negative.
15835 (a?0:-1): Likewise.
15837 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15839 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
15840 Change to use HARD_REG_BIT and its macros.
15841 * config/xtensa/xtensa.md
15842 (peephole2: regmove elimination during DFmode input reload):
15845 2023-07-04 Richard Biener <rguenther@suse.de>
15847 PR tree-optimization/110491
15848 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
15849 whether the PHI args are possibly undefined before folding
15852 2023-07-04 Pan Li <pan2.li@intel.com>
15853 Thomas Schwinge <thomas@codesourcery.com>
15855 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
15856 bits for machine mode table.
15857 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
15858 HOST machine mode bits.
15859 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
15860 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
15862 * tree-streamer.h (streamer_mode_table): Ditto.
15863 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
15864 as the packing limit.
15865 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
15867 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
15869 * lto-streamer.h (class lto_input_block): Capture
15870 'lto_file_decl_data *file_data' instead of just
15871 'unsigned char *mode_table'.
15872 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
15873 * ipa-fnsummary.cc (inline_read_section): Likewise.
15874 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
15875 * ipa-modref.cc (read_section): Likewise.
15876 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
15878 * ipa-sra.cc (isra_read_summary_section): Likewise.
15879 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
15880 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
15881 * lto-streamer-in.cc (lto_read_body_or_constructor)
15882 (lto_input_toplevel_asms): Likewise.
15883 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
15885 2023-07-04 Richard Biener <rguenther@suse.de>
15887 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
15888 (empty_bb_or_one_feeding_into_p): Check for them.
15889 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
15890 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
15892 2023-07-04 Richard Biener <rguenther@suse.de>
15894 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
15895 check guarding scalar_niter underflow.
15897 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
15899 PR tree-optimization/110531
15900 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
15901 slp_done_for_suggested_uf to false.
15903 2023-07-04 Richard Biener <rguenther@suse.de>
15905 PR tree-optimization/110228
15906 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
15907 Mark SSA may-undefs.
15908 (bb_no_side_effects_p): Check stmt uses for undefs.
15910 2023-07-04 Richard Biener <rguenther@suse.de>
15912 PR tree-optimization/110436
15913 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
15914 force live but not relevant pattern stmts relevant.
15916 2023-07-04 Lili Cui <lili.cui@intel.com>
15918 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
15919 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
15921 2023-07-04 Richard Biener <rguenther@suse.de>
15923 PR middle-end/110495
15924 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
15925 since we do not set TREE_OVERFLOW on those since the
15926 introduction of VL vectors.
15927 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
15928 at TREE_OVERFLOW to determine validity of association.
15930 2023-07-04 Richard Biener <rguenther@suse.de>
15932 PR tree-optimization/110310
15933 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
15934 Move costing part ...
15935 (vect_analyze_loop_costing): ... here. Integrate better
15936 estimate for epilogues from ...
15937 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
15938 with actual epilogue status.
15939 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
15940 avoid cancelling epilogue vectorization.
15941 (vect_update_epilogue_niters): Remove. No longer update
15942 epilogue LOOP_VINFO_NITERS.
15944 2023-07-04 Pan Li <pan2.li@intel.com>
15947 2023-07-03 Pan Li <pan2.li@intel.com>
15949 * config/riscv/vector.md: Fix typo.
15951 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15953 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
15954 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
15955 (expand_gather_load_optab_fn): Ditto.
15956 (internal_load_fn_p): Ditto.
15957 (internal_store_fn_p): Ditto.
15958 (internal_gather_scatter_fn_p): Ditto.
15959 (internal_fn_len_index): Ditto.
15960 (internal_fn_mask_index): Ditto.
15961 (internal_fn_stored_value_index): Ditto.
15962 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
15963 (LEN_MASK_SCATTER_STORE): Ditto.
15964 * optabs.def (OPTAB_CD): Ditto.
15966 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15968 * config/riscv/riscv-vsetvl.cc
15969 (vector_insn_info::parse_insn): Add early break.
15971 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
15973 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
15974 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
15976 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
15978 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
15980 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
15982 * common/config/riscv/riscv-common.cc: Add support for zvbb,
15983 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
15984 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
15985 * config/riscv/arch-canonicalize: Add canonicalization info for
15986 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
15987 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
15988 (MASK_ZVBC): Likewise.
15989 (TARGET_ZVBB): Likewise.
15990 (TARGET_ZVBC): Likewise.
15991 (MASK_ZVKG): Likewise.
15992 (MASK_ZVKNED): Likewise.
15993 (MASK_ZVKNHA): Likewise.
15994 (MASK_ZVKNHB): Likewise.
15995 (MASK_ZVKSED): Likewise.
15996 (MASK_ZVKSH): Likewise.
15997 (MASK_ZVKN): Likewise.
15998 (MASK_ZVKNC): Likewise.
15999 (MASK_ZVKNG): Likewise.
16000 (MASK_ZVKS): Likewise.
16001 (MASK_ZVKSC): Likewise.
16002 (MASK_ZVKSG): Likewise.
16003 (MASK_ZVKT): Likewise.
16004 (TARGET_ZVKG): Likewise.
16005 (TARGET_ZVKNED): Likewise.
16006 (TARGET_ZVKNHA): Likewise.
16007 (TARGET_ZVKNHB): Likewise.
16008 (TARGET_ZVKSED): Likewise.
16009 (TARGET_ZVKSH): Likewise.
16010 (TARGET_ZVKN): Likewise.
16011 (TARGET_ZVKNC): Likewise.
16012 (TARGET_ZVKNG): Likewise.
16013 (TARGET_ZVKS): Likewise.
16014 (TARGET_ZVKSC): Likewise.
16015 (TARGET_ZVKSG): Likewise.
16016 (TARGET_ZVKT): Likewise.
16017 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
16019 2023-07-03 Andrew Pinski <apinski@marvell.com>
16021 PR middle-end/110510
16022 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
16024 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
16026 * config/darwin.h: Avoid duplicate multiply_defined specs on
16027 earlier Darwin versions with shared libgcc.
16029 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
16031 * tree.h (tree_int_cst_equal): Change return type from int to bool.
16032 (operand_equal_for_phi_arg_p): Ditto.
16033 (tree_map_base_marked_p): Ditto.
16034 * tree.cc (contains_placeholder_p): Update function body
16035 for bool return type.
16036 (type_cache_hasher::equal): Ditto.
16037 (tree_map_base_hash): Change return type
16038 from int to void and adjust function body accordingly.
16039 (tree_int_cst_equal): Ditto.
16040 (operand_equal_for_phi_arg_p): Ditto.
16041 (get_narrower): Change "first" variable to bool.
16042 (cl_option_hasher::equal): Update function body for bool return type.
16043 * ggc.h (ggc_set_mark): Change return type from int to bool.
16044 (ggc_marked_p): Ditto.
16045 * ggc-page.cc (gt_ggc_mx): Change return type
16046 from int to void and adjust function body accordingly.
16047 (ggc_set_mark): Ditto.
16049 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16051 * config/riscv/autovec.md: Change order of
16052 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
16053 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
16054 * doc/md.texi: Ditto.
16055 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
16056 * internal-fn.cc (len_maskload_direct): Ditto.
16057 (len_maskstore_direct): Ditto.
16058 (add_len_and_mask_args): New function.
16059 (expand_partial_load_optab_fn): Change order of
16060 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
16061 (expand_partial_store_optab_fn): Ditto.
16062 (internal_fn_len_index): New function.
16063 (internal_fn_mask_index): Change order of
16064 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
16065 (internal_fn_stored_value_index): Ditto.
16066 (internal_len_load_store_bias): Ditto.
16067 * internal-fn.h (internal_fn_len_index): New function.
16068 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
16069 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
16070 * tree-vect-stmts.cc (vectorizable_store): Ditto.
16071 (vectorizable_load): Ditto.
16073 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
16076 * doc/gm2.texi (Semantic checking): Include examples using
16077 -Wuninit-variable-checking.
16079 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16081 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
16082 (*single_widen_fnma<mode>): Ditto.
16083 (*double_widen_fms<mode>): Ditto.
16084 (*single_widen_fms<mode>): Ditto.
16085 (*double_widen_fnms<mode>): Ditto.
16086 (*single_widen_fnms<mode>): Ditto.
16088 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16090 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
16091 into "*" in pattern name which simplifies build files.
16092 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
16093 (*pred_single_widen_mul<mode>): New pattern.
16095 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
16097 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
16098 the index to be 0 or 1.
16100 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
16103 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16105 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
16106 (*single_widen_fnma<mode>): Ditto.
16107 (*double_widen_fms<mode>): Ditto.
16108 (*single_widen_fms<mode>): Ditto.
16109 (*double_widen_fnms<mode>): Ditto.
16110 (*single_widen_fnms<mode>): Ditto.
16112 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16114 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
16115 (*single_widen_fnma<mode>): Ditto.
16116 (*double_widen_fms<mode>): Ditto.
16117 (*single_widen_fms<mode>): Ditto.
16118 (*double_widen_fnms<mode>): Ditto.
16119 (*single_widen_fnms<mode>): Ditto.
16121 2023-07-03 Pan Li <pan2.li@intel.com>
16123 * config/riscv/vector.md: Fix typo.
16125 2023-07-03 Richard Biener <rguenther@suse.de>
16127 PR tree-optimization/110506
16128 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
16129 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
16131 2023-07-03 Richard Biener <rguenther@suse.de>
16133 PR tree-optimization/110506
16134 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
16135 type before relying on TYPE_PRECISION to produce a nonzero mask.
16137 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16139 * config/mips/mips.md(*and<mode>3_mips16): Generates
16140 ZEB/ZEH instructions.
16142 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16144 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
16145 address register to M16_REGS for MIPS16.
16146 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
16147 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
16148 (AVAIL_NON_MIPS16 (cache..)): Update to
16149 AVAIL_MIPS16E2_OR_NON_MIPS16.
16150 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
16151 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
16153 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16155 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
16156 for ISA_HAS_MIPS16E2.
16157 (ISA_HAS_SYNC): Same as above.
16158 (ISA_HAS_LL_SC): Same as above.
16160 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16162 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
16163 Add logics for generating instruction.
16164 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
16165 * config/mips/mips.md(mov_<load>l): Generates instructions.
16166 (mov_<load>r): Same as above.
16167 (mov_<store>l): Adjusted for the conditions above.
16168 (mov_<store>r): Same as above.
16169 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
16170 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
16172 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16174 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
16175 (mips_const_insns): Same as above.
16176 (mips_output_move): Same as above.
16177 (mips_output_function_prologue): Same as above.
16178 * config/mips/mips.md: Same as above
16180 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16182 * config/mips/constraints.md(Yz): New constraints for mips16e2.
16183 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
16184 (mips_bit_clear_info): Same as above.
16185 * config/mips/mips.cc(mips_bit_clear_info): New function for
16186 generating instructions.
16187 (mips_bit_clear_p): Same as above.
16188 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
16189 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
16190 (*and<mode>3): Generates INS instruction.
16191 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
16192 (ior<mode>3): Add logics for ORI instruction.
16193 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
16194 (*ior<mode>3_mips16): Add logics for XORI instruction.
16195 (*xor<mode>3_mips16): Generates XORI instrucion.
16196 (*extzv<mode>): Add logics for EXT instruction.
16197 (*insv<mode>): Add logics for INS instruction.
16198 * config/mips/predicates.md(bit_clear_operand): New predicate for
16199 generating bitwise instructions.
16200 (and_reg_operand): Add logics for generating bitwise instructions.
16202 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16204 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
16205 that uses global pointer register.
16206 (mips16_unextended_reference_p): Same as above.
16207 (mips_pic_base_register): Same as above.
16208 (mips_init_relocs): Same as above.
16209 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
16210 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
16211 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
16212 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
16214 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16216 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
16217 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
16218 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
16219 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
16220 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
16221 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
16223 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
16225 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
16227 * config/mips/mips.h(__mips_mips16e2): Defined a new
16229 (ISA_HAS_MIPS16E2): Defined a new macro.
16230 (ASM_SPEC): Pass mmips16e2 to the assembler.
16231 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
16232 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
16233 * doc/invoke.texi: Add -m(no-)mips16e2 option..
16235 2023-07-02 Jakub Jelinek <jakub@redhat.com>
16237 PR tree-optimization/110508
16238 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
16239 REALPART_EXPR opf nlhs if re2 is non-NULL.
16241 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16243 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
16245 * config/xtensa/xtensa.md (*xtensa_clamps):
16246 Add TARGET_MINMAX to the condition.
16248 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16250 * config/xtensa/xtensa.md (*eqne_INT_MIN):
16251 Add missing ":SI" to the match_operator.
16253 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
16256 * config/darwin.opt: Add fconstant-cfstrings alias to
16257 mconstant-cfstrings.
16258 * doc/invoke.texi: Amend invocation descriptions to reflect
16259 that the fconstant-cfstrings is a target-option alias and to
16260 add the missing mconstant-cfstrings option description to the
16263 2023-07-01 Jan Hubicka <jh@suse.cz>
16265 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
16266 parmaeter; update profile.
16267 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
16268 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
16269 (static_loop_exit): ... this; return the edge to be elliminated.
16270 (ch_base::copy_headers): Handle profile updating for eliminated exits.
16272 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
16274 * config/i386/i386-features.cc (compute_convert_gain): Provide
16275 gains/costs for ROTATE and ROTATERT (by an integer constant).
16276 (general_scalar_chain::convert_rotate): New helper function to
16277 convert a DImode or SImode rotation by an integer constant into
16279 (general_scalar_chain::convert_insn): Call the new convert_rotate
16280 for ROTATE and ROTATERT.
16281 (general_scalar_to_vector_candidate_p): Consider ROTATE and
16282 ROTATERT to be candidates if the second operand is an integer
16283 constant, valid for a rotation (or shift) in the given mode.
16284 * config/i386/i386-features.h (general_scalar_chain): Add new
16285 helper method convert_rotate.
16287 2023-07-01 Jan Hubicka <jh@suse.cz>
16289 PR tree-optimization/103680
16290 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
16291 make message clearer.
16293 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
16295 PR tree-optimization/101832
16296 * tree-object-size.cc (addr_object_size): Handle structure/union type
16297 when it has flexible size.
16299 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
16301 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
16302 (fold_nonarray_ctor_reference): Likewise. Specifically deal
16303 with integral bit-fields.
16304 (fold_ctor_reference): Make sure that the constructor uses the
16305 native storage order.
16307 2023-06-30 Jan Hubicka <jh@suse.cz>
16309 PR middle-end/109849
16310 * predict.cc (estimate_bb_frequencies): Turn to static function.
16311 (expr_expected_value_1): Fix handling of binary expressions with
16313 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
16314 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
16316 * predict.h (estimate_bb_frequencies): No longer declare it.
16318 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
16320 * fold-const.h (multiple_of_p): Change return type from int to bool.
16321 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
16322 neg_conp_p and neg_var_p variables to bool.
16323 (const_binop): Change sat_p variable to bool.
16324 (merge_ranges): Change no_overlap variable to bool.
16325 (extract_muldiv_1): Change same_p variable to bool.
16326 (tree_swap_operands_p): Update function body for bool return type.
16327 (fold_truth_andor): Change commutative variable to bool.
16328 (multiple_of_p): Change return type
16329 from int to void and adjust function body accordingly.
16330 * optabs.h (expand_twoval_unop): Change return type from int to bool.
16331 (expand_twoval_binop): Ditto.
16332 (can_compare_p): Ditto.
16333 (have_add2_insn): Ditto.
16334 (have_addptr3_insn): Ditto.
16335 (have_sub2_insn): Ditto.
16336 (have_insn_for): Ditto.
16337 * optabs.cc (add_equal_note): Ditto.
16338 (widen_operand): Change no_extend argument from int to bool.
16339 (expand_binop): Ditto.
16340 (expand_twoval_unop): Change return type
16341 from int to void and adjust function body accordingly.
16342 (expand_twoval_binop): Ditto.
16343 (can_compare_p): Ditto.
16344 (have_add2_insn): Ditto.
16345 (have_addptr3_insn): Ditto.
16346 (have_sub2_insn): Ditto.
16347 (have_insn_for): Ditto.
16349 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
16351 * config/aarch64/aarch64-simd.md
16352 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
16353 Expansions for abd vec widen optabs.
16354 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
16355 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
16356 that give the appropriate extend RTL for the max RTL.
16358 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
16360 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
16361 * optabs.def (vec_widen_sabd_optab,
16362 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
16363 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
16364 vec_widen_uabd_optab,
16365 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
16366 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
16368 * doc/md.texi: Document them.
16369 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
16370 to build a VEC_WIDEN_ABD call if the input precision is smaller
16371 than the precision of the output.
16372 (vect_recog_widen_abd_pattern): Should an ABD expression be
16373 found preceeding an extension, replace the two with a
16376 2023-06-30 Pan Li <pan2.li@intel.com>
16378 * config/riscv/vector.md: Refactor the common condition.
16380 2023-06-30 Richard Biener <rguenther@suse.de>
16382 PR tree-optimization/110496
16383 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
16384 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
16386 2023-06-30 Richard Biener <rguenther@suse.de>
16388 PR middle-end/110489
16389 * statistics.cc (curr_statistics_hash): Add argument
16390 indicating whether we should allocate the hash.
16391 (statistics_fini_pass): If the hash isn't allocated
16392 only print the summary header.
16394 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
16395 Thomas Schwinge <thomas@codesourcery.com>
16397 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
16399 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
16402 * config/mips/mips.cc (mips_function_arg_alignment): Returns
16403 the alignment of function argument. In case of typedef type,
16404 it returns the aligment of the aliased type.
16405 (mips_function_arg_boundary): Relocated calculation of the
16406 aligment of function arguments.
16408 2023-06-29 Jan Hubicka <jh@suse.cz>
16410 PR tree-optimization/109849
16411 * ipa-fnsummary.cc (decompose_param_expr): Skip
16412 functions returning its parameter.
16413 (set_cond_stmt_execution_predicate): Return early
16414 if predicate was constructed.
16416 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
16419 * doc/extend.texi: Document GCC extension on a structure containing
16420 a flexible array member to be a member of another structure.
16422 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
16424 * print-tree.cc (print_node): Print new bit type_include_flexarray.
16425 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
16426 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
16427 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
16428 in bit no_named_args_stdarg_p properly for its corresponding type.
16429 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
16430 out bit no_named_args_stdarg_p properly for its corresponding type.
16431 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
16433 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
16435 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
16436 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
16437 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
16439 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
16441 * value-range.cc (frange::set): Do not call verify_range.
16442 (frange::normalize_kind): Verify range.
16443 (frange::union_nans): Do not call verify_range.
16444 (frange::union_): Same.
16445 (frange::intersect): Same.
16446 (irange::irange_single_pair_union): Call normalize_kind if
16448 (irange::union_): Same.
16449 (irange::intersect): Same.
16450 (irange::set_range_from_nonzero_bits): Verify range.
16451 (irange::set_nonzero_bits): Call normalize_kind if necessary.
16452 (irange::get_nonzero_bits): Tweak comment.
16453 (irange::intersect_nonzero_bits): Call normalize_kind if
16455 (irange::union_nonzero_bits): Same.
16456 * value-range.h (irange::normalize_kind): Verify range.
16458 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
16460 * cselib.h (rtx_equal_for_cselib_1):
16461 Change return type from int to bool.
16462 (references_value_p): Ditto.
16463 (rtx_equal_for_cselib_p): Ditto.
16464 * expr.h (can_store_by_pieces): Ditto.
16465 (try_casesi): Ditto.
16466 (try_tablejump): Ditto.
16467 (safe_from_p): Ditto.
16468 * sbitmap.h (bitmap_equal_p): Ditto.
16469 * cselib.cc (references_value_p): Change return type
16470 from int to void and adjust function body accordingly.
16471 (rtx_equal_for_cselib_1): Ditto.
16472 * expr.cc (is_aligning_offset): Ditto.
16473 (can_store_by_pieces): Ditto.
16474 (mostly_zeros_p): Ditto.
16475 (all_zeros_p): Ditto.
16476 (safe_from_p): Ditto.
16477 (is_aligning_offset): Ditto.
16478 (try_casesi): Ditto.
16479 (try_tablejump): Ditto.
16480 (store_constructor): Change "need_to_clear" and
16481 "const_bounds_p" variables to bool.
16482 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
16484 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
16486 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
16489 2023-06-29 Richard Biener <rguenther@suse.de>
16491 PR tree-optimization/110460
16492 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
16493 Only allow integral, pointer and scalar float type scalar_type.
16495 2023-06-29 Lili Cui <lili.cui@intel.com>
16497 PR tree-optimization/110148
16498 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
16499 ops in this function.
16501 2023-06-29 Richard Biener <rguenther@suse.de>
16503 PR middle-end/110452
16504 * expr.cc (store_constructor): Handle uniform boolean
16505 vectors with integer mode specially.
16507 2023-06-29 Richard Biener <rguenther@suse.de>
16509 PR middle-end/110461
16510 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
16513 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
16515 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
16516 (array_slice): Relax va_gc constructor to handle all vectors
16517 with a vl_embed layout.
16519 2023-06-29 Pan Li <pan2.li@intel.com>
16521 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
16522 (riscv_mode_needed): Likewise.
16523 (riscv_entity_mode_after): Likewise.
16524 (riscv_mode_after): Likewise.
16525 (riscv_mode_entry): Likewise.
16526 (riscv_mode_exit): Likewise.
16527 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
16529 * config/riscv/riscv.md: Add FRM register.
16530 * config/riscv/vector-iterators.md: Add FRM type.
16531 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
16532 (fsrm): Define new insn for fsrm instruction.
16534 2023-06-29 Pan Li <pan2.li@intel.com>
16536 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
16537 Add macro for static frm min and max.
16538 * config/riscv/riscv-vector-builtins-bases.cc
16539 (class binop_frm): New class for floating-point with frm.
16540 (BASE): Add vfadd for frm.
16541 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
16542 * config/riscv/riscv-vector-builtins-functions.def
16543 (vfadd_frm): Likewise.
16544 * config/riscv/riscv-vector-builtins-shapes.cc
16545 (struct alu_frm_def): New struct for alu with frm.
16546 (SHAPE): Add alu with frm.
16547 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
16548 * config/riscv/riscv-vector-builtins.cc
16549 (function_checker::report_out_of_range_and_not): New function
16550 for report out of range and not val.
16551 (function_checker::require_immediate_range_or): New function
16552 for checking in range or one val.
16553 * config/riscv/riscv-vector-builtins.h: Add function decl.
16555 2023-06-29 Cui, Lili <lili.cui@intel.com>
16557 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
16558 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
16560 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
16563 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
16564 to insn before validating it.
16566 2023-06-28 Jan Hubicka <jh@suse.cz>
16568 PR middle-end/110334
16569 * ipa-fnsummary.h (ipa_fn_summary): Add
16570 safe_to_inline_to_always_inline.
16571 * ipa-inline.cc (can_early_inline_edge_p): ICE
16572 if SSA is not built; do cycle checking for
16573 always_inline functions.
16574 (inline_always_inline_functions): Be recrusive;
16575 watch for cycles; do not updat overall summary.
16576 (early_inliner): Do not give up on always_inlines.
16577 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
16580 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
16582 * output.h (leaf_function_p): Change return type from int to bool.
16583 (final_forward_branch_p): Ditto.
16584 (only_leaf_regs_used): Ditto.
16585 (maybe_assemble_visibility): Ditto.
16586 * varasm.h (supports_one_only): Ditto.
16587 * rtl.h (compute_alignments): Change return type from int to void.
16588 * final.cc (app_on): Change return type from int to bool.
16589 (compute_alignments): Change return type from int to void
16590 and adjust function body accordingly.
16591 (shorten_branches): Change "something_changed" variable
16592 type from int to bool.
16593 (leaf_function_p): Change return type from int to bool
16594 and adjust function body accordingly.
16595 (final_forward_branch_p): Ditto.
16596 (only_leaf_regs_used): Ditto.
16597 * varasm.cc (contains_pointers_p): Change return type from
16598 int to bool and adjust function body accordingly.
16599 (compare_constant): Ditto.
16600 (maybe_assemble_visibility): Ditto.
16601 (supports_one_only): Ditto.
16603 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
16606 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
16607 (maybe_copy_reg_attrs): New function.
16608 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
16609 (copyprop_hardreg_forward_1): Ditto.
16611 2023-06-28 Richard Biener <rguenther@suse.de>
16613 PR tree-optimization/110434
16614 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
16615 VAR we replace with <retval>.
16617 2023-06-28 Richard Biener <rguenther@suse.de>
16619 PR tree-optimization/110451
16620 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
16621 tcc_comparison are expensive.
16623 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
16625 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
16626 for TImode comparisons on 32-bit architectures.
16627 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
16628 SWIM1248x to exclude/avoid TImode being conditional on -m64.
16629 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
16630 and/or with TARGET_SSE4_1.
16631 * config/i386/predicates.md (ix86_timode_comparison_operator):
16632 New predicate that depends upon TARGET_64BIT.
16633 (ix86_timode_comparison_operand): Likewise.
16635 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
16638 * config/i386/i386-features.cc (compute_convert_gain): Provide
16639 more accurate gains for conversion of scalar comparisons to
16642 2023-06-28 Richard Biener <rguenther@suse.de>
16644 PR tree-optimization/110443
16645 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
16648 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
16650 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
16651 (peephole2 for move_and_compare): New.
16652 (mode_iterator WORD): New. Set the mode to SI/DImode by
16654 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
16655 (split pattern for compare_and_move): Likewise.
16657 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16659 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
16660 (*single_widen_fma<mode>): Ditto.
16662 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
16665 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
16667 (altivec_vupkhs<VU_char>_direct): ...this.
16668 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
16669 predicate to test if a constant can be loaded with vspltisw and
16671 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
16672 a vector constant can be synthesized with a vspltisw and a vupkhsw.
16673 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
16675 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
16676 function to return true if OP mode is V2DI and can be synthesized
16677 with vupkhsw and vspltisw.
16678 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
16679 constants with vspltisw and vupkhsw.
16681 2023-06-28 Jan Hubicka <jh@suse.cz>
16683 PR tree-optimization/110377
16684 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
16686 (ipa_analyze_node): Enable ranger.
16688 2023-06-28 Richard Biener <rguenther@suse.de>
16690 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
16691 (TYPE_PRECISION_RAW): Provide raw access to the precision
16693 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
16694 (gimple_canonical_types_compatible_p): Likewise.
16695 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
16696 Stream TYPE_PRECISION_RAW.
16697 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
16699 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
16701 2023-06-28 Alexandre Oliva <oliva@adacore.com>
16703 * doc/extend.texi (zero-call-used-regs): Document leafy and
16705 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
16706 LEAFY and variants.
16707 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
16708 functions in leafy mode.
16709 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
16711 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16713 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
16714 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
16716 (@pred_single_widen_add<mode>): New pattern.
16717 (@pred_single_widen_sub<mode>): New pattern.
16719 2023-06-28 liuhongt <hongtao.liu@intel.com>
16721 * config/i386/i386.cc (ix86_invalid_conversion): New function.
16722 (TARGET_INVALID_CONVERSION): Define as
16723 ix86_invalid_conversion.
16725 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16727 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
16729 (<float_cvt><vnconvert><mode>2): Ditto.
16730 (<optab><mode><vnconvert>2): Ditto.
16731 (<float_cvt><mode><vnconvert>2): Ditto.
16732 * config/riscv/vector-iterators.md: Add vnconvert.
16734 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16736 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
16738 (extend<v_quad_trunc><mode>2): Ditto.
16739 (trunc<mode><v_double_trunc>2): Ditto.
16740 (trunc<mode><v_quad_trunc>2): Ditto.
16741 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
16742 V_QUAD_TRUNC and v_quad_trunc.
16744 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16746 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
16749 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16751 * config/riscv/autovec.md (copysign<mode>3): Add expander.
16752 (xorsign<mode>3): Ditto.
16753 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
16755 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
16759 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
16760 (@pred_ncopysign<mode>_scalar): Ditto.
16762 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16764 * config/riscv/autovec.md: VF_AUTO -> VF.
16765 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
16766 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
16768 * config/riscv/vector.md: Use new iterators.
16770 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16772 * match.pd: Use element_mode and check if target supports
16773 operation with new type.
16775 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16777 * config/aarch64/aarch64-sve-builtins-base.cc
16778 (svdupq_impl::fold_nonconst_dupq): New method.
16779 (svdupq_impl::fold): Call fold_nonconst_dupq.
16781 2023-06-27 Andrew Pinski <apinski@marvell.com>
16783 PR middle-end/110420
16784 PR middle-end/103979
16785 PR middle-end/98619
16786 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
16788 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16790 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
16791 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
16793 (set_switch_stmt_execution_predicate): Same.
16794 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
16796 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16798 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
16799 ipa_vr instead of value_range.
16802 (ipa_get_value_range): Same.
16803 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
16807 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16809 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
16810 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
16811 (ipa_set_jfunc_vr): Take a range.
16812 (ipa_compute_jump_functions_for_edge): Pass range to
16814 (ipa_write_jump_function): Call streamer write helper.
16815 (ipa_read_jump_function): Call streamer read helper.
16816 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
16818 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
16820 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
16821 as a probable initializer rather than a probable complete statement.
16823 2023-06-27 Richard Biener <rguenther@suse.de>
16825 PR tree-optimization/96208
16826 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
16827 a non-grouped load if it is the same for all lanes.
16828 (vect_build_slp_tree_2): Handle not grouped loads.
16829 (vect_optimize_slp_pass::remove_redundant_permutations):
16831 (vect_transform_slp_perm_load_1): Likewise.
16832 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
16833 (get_group_load_store_type): Likewise. Handle
16834 invariant accesses.
16835 (vectorizable_load): Likewise.
16837 2023-06-27 liuhongt <hongtao.liu@intel.com>
16839 PR rtl-optimization/110237
16840 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
16842 (maskstore<mode><avx512fmaskmodelower): Ditto.
16843 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
16844 from original <avx512>_store<mode>_mask.
16846 2023-06-27 liuhongt <hongtao.liu@intel.com>
16848 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
16849 Move flag_expensive_optimizations && !optimize_size to ..
16850 * config/i386/i386-options.cc (ix86_option_override_internal):
16851 .. this, it makes -mvzeroupper independent of optimization
16852 level, but still keeps the behavior of architecture
16853 tuning(emit_vzeroupper) unchanged.
16855 2023-06-27 liuhongt <hongtao.liu@intel.com>
16858 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
16859 vzeroupper for vzeroupper call_insn.
16861 2023-06-27 Andrew Pinski <apinski@marvell.com>
16863 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
16866 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16868 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
16871 2023-06-26 Andrew Pinski <apinski@marvell.com>
16873 * doc/extend.texi (access attribute): Add
16875 (interrupt/interrupt_handler attribute):
16878 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16880 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
16881 Use <DWI> instead of <V2XWIDE>.
16882 (aarch64_sqrshrun_n<mode>): Likewise.
16884 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16886 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
16888 (aarch64_rnd_imm_p): ... This.
16889 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
16891 (aarch64_int_rnd_operand): ... This.
16892 (aarch64_simd_rshrn_imm_vec): Delete.
16893 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
16894 Adjust for the above.
16895 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
16896 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
16897 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
16898 (aarch64_sqrshrun_n<mode>_insn): Likewise.
16899 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
16900 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
16901 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
16902 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
16903 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
16905 (aarch64_rnd_imm_p): ... This.
16907 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
16909 * config/s390/s390.cc (s390_encode_section_info): Set
16910 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
16913 2023-06-26 Jan Hubicka <jh@suse.cz>
16915 PR tree-optimization/109849
16916 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
16917 count of newly constructed forwarder block.
16919 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
16921 * doc/optinfo.texi: Fix "steam" -> "stream".
16923 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16925 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
16927 (dse_optimize_stmt): Add LEN_MASK_STORE.
16929 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16931 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
16932 fold of LOAD/STORE with length.
16934 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
16936 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
16937 Check for interdependence between operands 1 and 2.
16939 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
16941 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
16942 into account when costing non-widening/truncating conversions.
16944 2023-06-26 Richard Biener <rguenther@suse.de>
16946 PR tree-optimization/110381
16947 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
16948 Materialize permutes before fold-left reductions.
16950 2023-06-26 Pan Li <pan2.li@intel.com>
16952 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
16954 2023-06-26 Richard Biener <rguenther@suse.de>
16956 * varasm.cc (initializer_constant_valid_p_1): Also
16957 constrain the type of value to be scalar integral
16958 before dispatching to narrowing_initializer_constant_valid_p.
16960 2023-06-26 Richard Biener <rguenther@suse.de>
16962 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
16963 Use element_precision.
16965 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16967 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
16969 (vcondu<V:mode><VI:mode>): Ditto.
16970 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
16971 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
16973 2023-06-26 Richard Biener <rguenther@suse.de>
16975 PR tree-optimization/110392
16976 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
16977 Do early exits on true/false predicate only after normalization.
16979 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16981 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
16984 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
16986 * config/i386/i386.md (peephole2): Simplify zeroing a register
16987 followed by an IOR, XOR or PLUS operation on it, into a move.
16988 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
16989 eliminate (and hide from reload) unnecessary word to doubleword
16990 extensions that are followed by left shifts by sufficiently large,
16991 but valid, bit counts.
16993 2023-06-26 liuhongt <hongtao.liu@intel.com>
16995 PR tree-optimization/110371
16996 PR tree-optimization/110018
16997 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
16998 save intermediate type operand instead of "subtle" vec_dest
17001 2023-06-26 liuhongt <hongtao.liu@intel.com>
17003 PR tree-optimization/110371
17004 PR tree-optimization/110018
17005 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
17006 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
17008 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
17010 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
17011 Override tune_string with arch_string if tune_string is not
17012 explicitly specified.
17014 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17016 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
17018 * config/riscv/riscv-vsetvl.h: New function.
17020 2023-06-25 Li Xu <xuli1@eswincomputing.com>
17022 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
17025 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17027 * config/riscv/autovec.md (len_load_<mode>): Remove.
17028 (len_maskload<mode><vm>): Remove.
17029 (len_store_<mode>): New pattern.
17030 (len_maskstore<mode><vm>): New pattern.
17031 * config/riscv/predicates.md (autovec_length_operand): New predicate.
17032 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17033 (expand_load_store): New function.
17034 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
17035 (emit_nonvlmax_masked_insn): Ditto.
17036 (expand_load_store): Ditto.
17037 * config/riscv/riscv-vector-builtins.cc
17038 (function_expander::use_contiguous_store_insn): Add avl_type operand
17040 * config/riscv/vector.md: Ditto.
17042 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17044 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
17047 2023-06-25 Pan Li <pan2.li@intel.com>
17049 * config/riscv/vector.md: Revert.
17051 2023-06-25 Pan Li <pan2.li@intel.com>
17053 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
17054 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
17055 (ADJUST_ALIGNMENT): Ditto.
17056 (RVV_TUPLE_PARTIAL_MODES): Ditto.
17057 (ADJUST_NUNITS): Ditto.
17058 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
17059 (vfloat16mf4x3_t): Ditto.
17060 (vfloat16mf4x4_t): Ditto.
17061 (vfloat16mf4x5_t): Ditto.
17062 (vfloat16mf4x6_t): Ditto.
17063 (vfloat16mf4x7_t): Ditto.
17064 (vfloat16mf4x8_t): Ditto.
17065 (vfloat16mf2x2_t): Ditto.
17066 (vfloat16mf2x3_t): Ditto.
17067 (vfloat16mf2x4_t): Ditto.
17068 (vfloat16mf2x5_t): Ditto.
17069 (vfloat16mf2x6_t): Ditto.
17070 (vfloat16mf2x7_t): Ditto.
17071 (vfloat16mf2x8_t): Ditto.
17072 (vfloat16m1x2_t): Ditto.
17073 (vfloat16m1x3_t): Ditto.
17074 (vfloat16m1x4_t): Ditto.
17075 (vfloat16m1x5_t): Ditto.
17076 (vfloat16m1x6_t): Ditto.
17077 (vfloat16m1x7_t): Ditto.
17078 (vfloat16m1x8_t): Ditto.
17079 (vfloat16m2x2_t): Ditto.
17080 (vfloat16m2x3_t): Diito.
17081 (vfloat16m2x4_t): Diito.
17082 (vfloat16m4x2_t): Diito.
17083 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
17084 (vfloat16mf4x3_t): Ditto.
17085 (vfloat16mf4x4_t): Ditto.
17086 (vfloat16mf4x5_t): Ditto.
17087 (vfloat16mf4x6_t): Ditto.
17088 (vfloat16mf4x7_t): Ditto.
17089 (vfloat16mf4x8_t): Ditto.
17090 (vfloat16mf2x2_t): Ditto.
17091 (vfloat16mf2x3_t): Ditto.
17092 (vfloat16mf2x4_t): Ditto.
17093 (vfloat16mf2x5_t): Ditto.
17094 (vfloat16mf2x6_t): Ditto.
17095 (vfloat16mf2x7_t): Ditto.
17096 (vfloat16mf2x8_t): Ditto.
17097 (vfloat16m1x2_t): Ditto.
17098 (vfloat16m1x3_t): Ditto.
17099 (vfloat16m1x4_t): Ditto.
17100 (vfloat16m1x5_t): Ditto.
17101 (vfloat16m1x6_t): Ditto.
17102 (vfloat16m1x7_t): Ditto.
17103 (vfloat16m1x8_t): Ditto.
17104 (vfloat16m2x2_t): Ditto.
17105 (vfloat16m2x3_t): Ditto.
17106 (vfloat16m2x4_t): Ditto.
17107 (vfloat16m4x2_t): Ditto.
17108 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
17109 * config/riscv/riscv.md: Ditto.
17110 * config/riscv/vector-iterators.md: Ditto.
17112 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17114 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
17115 (gimple_fold_partial_load_store_mem_ref): Ditto.
17116 (gimple_fold_partial_store): Ditto.
17117 (gimple_fold_call): Ditto.
17119 2023-06-25 liuhongt <hongtao.liu@intel.com>
17122 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
17123 Refine pattern with UNSPEC_MASKLOAD.
17124 (maskload<mode><avx512fmaskmodelower>): Ditto.
17125 (*<avx512>_load<mode>_mask): Extend mode iterator to
17127 (*<avx512>_load<mode>): Ditto.
17129 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17131 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
17133 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17135 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
17136 LEN_MASK_{LOAD,STORE}
17138 2023-06-25 yulong <shiyulong@iscas.ac.cn>
17140 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
17142 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
17144 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
17146 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17148 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
17149 (*fma<VI:mode><P:mode>): Ditto.
17150 (*fnma<mode>): Ditto.
17151 (*fnma<VI:mode><P:mode>): Ditto.
17153 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17155 * config/riscv/autovec.md (fma<mode>4): New pattern.
17156 (*fma<mode>): Ditto.
17157 (fnma<mode>4): Ditto.
17158 (*fnma<mode>): Ditto.
17159 (fms<mode>4): Ditto.
17160 (*fms<mode>): Ditto.
17161 (fnms<mode>4): Ditto.
17162 (*fnms<mode>): Ditto.
17163 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
17165 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
17166 * config/riscv/vector.md: Fix attribute bug.
17168 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17170 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
17171 Apply LEN_MASK_{LOAD,STORE}.
17173 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17175 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
17176 Add LEN_MASK_{LOAD,STORE}.
17178 2023-06-24 David Malcolm <dmalcolm@redhat.com>
17180 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
17181 * diagnostic.cc: Likewise.
17182 * text-art/box-drawing.cc: Likewise.
17183 * text-art/canvas.cc: Likewise.
17184 * text-art/ruler.cc: Likewise.
17185 * text-art/selftests.cc: Likewise.
17186 * text-art/selftests.h (text_art::canvas): New forward decl.
17187 * text-art/style.cc: Add #define INCLUDE_VECTOR.
17188 * text-art/styled-string.cc: Likewise.
17189 * text-art/table.cc: Likewise.
17190 * text-art/table.h: Remove #include <vector>.
17191 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
17192 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
17193 Remove #include of <vector> and <string>.
17194 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
17195 * text-art/widget.h: Remove #include <vector>.
17197 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17199 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
17200 (internal_load_fn_p): Add LEN_MASK_LOAD.
17201 (internal_store_fn_p): Add LEN_MASK_STORE.
17202 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
17203 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
17204 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
17205 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
17206 (get_len_load_store_mode): Ditto.
17207 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
17208 (get_len_load_store_mode): Ditto.
17209 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
17210 (get_all_ones_mask): New function.
17211 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
17212 (vectorizable_load): Ditto.
17214 2023-06-23 Marek Polacek <polacek@redhat.com>
17216 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
17217 -std=gnu++26. Document that for C++23, its value is 202302L.
17218 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
17219 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
17220 (gen_compile_unit_die): Likewise.
17222 2023-06-23 Jan Hubicka <jh@suse.cz>
17224 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
17226 (pass_phiprop::execute): Do not compute it here; return
17227 update_ssa_only_virtuals if something changed.
17228 (pass_data_phiprop): Remove TODO_update_ssa from todos.
17230 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
17231 Aaron Sawdey <acsawdey@linux.ibm.com>
17234 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
17235 allowed prefixed lwa to be generated.
17236 * config/rs6000/fusion.md: Regenerate.
17237 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
17238 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
17239 plus compare immediate fused insns.
17240 (maybe_prefixed): Likewise.
17242 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
17244 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
17245 of ASHIFT to const0_rtx with sufficiently large shift count.
17246 Optimize highpart SUBREGs of ASHIFT as the shift operand when
17247 the shift count is the correct offset. Optimize SUBREGs of
17248 multi-word logic operations if the SUBREGs of both operands
17251 2023-06-23 Richard Biener <rguenther@suse.de>
17253 * varasm.cc (initializer_constant_valid_p_1): Only
17254 allow conversions between scalar floating point types.
17256 2023-06-23 Richard Biener <rguenther@suse.de>
17258 * tree-vect-stmts.cc (vectorizable_assignment):
17259 Properly handle non-integral operands when analyzing
17262 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17264 PR tree-optimization/110280
17265 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
17266 using build_vector_from_val with the element of input operand, and
17267 mask's type if operand and mask's types don't match.
17269 2023-06-23 Richard Biener <rguenther@suse.de>
17271 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
17272 the truth_value_p case with !VECTOR_TYPE_P.
17274 2023-06-23 Richard Biener <rguenther@suse.de>
17276 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
17277 Exit early when the type isn't scalar integral.
17279 2023-06-23 Richard Biener <rguenther@suse.de>
17281 * match.pd ((outertype)((innertype0)a+(innertype1)b)
17282 -> ((newtype)a+(newtype)b)): Use element_precision
17285 2023-06-23 Richard Biener <rguenther@suse.de>
17287 * fold-const.cc (fold_binary_loc): Use element_precision
17288 when trying (double)float1 CMP (double)float2 to
17289 float1 CMP float2 simplification.
17290 * match.pd: Likewise.
17292 2023-06-23 Richard Biener <rguenther@suse.de>
17294 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
17295 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
17297 2023-06-23 Richard Biener <rguenther@suse.de>
17299 * tree-vect-stmts.cc (vector_vector_composition_type):
17300 Handle composition of a vector from a number of elements that
17301 happens to match its number of lanes.
17303 2023-06-22 Marek Polacek <polacek@redhat.com>
17305 * configure.ac (--enable-host-bind-now): New check. Add
17306 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
17307 * configure: Regenerate.
17308 * doc/install.texi: Document --enable-host-bind-now.
17310 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
17312 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
17314 2023-06-22 Richard Biener <rguenther@suse.de>
17316 PR tree-optimization/110332
17317 * tree-ssa-phiprop.cc (propagate_with_phi): Always
17318 check aliasing with edge inserted loads.
17320 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
17321 Uros Bizjak <ubizjak@gmail.com>
17323 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
17324 expansion of ptestc with equal operands as producing const1_rtx.
17325 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
17326 estimates of UNSPEC_PTEST, where the ptest performs the PAND
17327 or PAND of its operands.
17328 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
17329 of reg_equal_p operands into an x86_stc instruction.
17330 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
17331 (define_split): Similar to above for strict_low_part destinations.
17332 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
17334 2023-06-22 David Malcolm <dmalcolm@redhat.com>
17337 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
17338 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
17340 (fanalyzer-debug-text-art): New.
17342 2023-06-22 David Malcolm <dmalcolm@redhat.com>
17344 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
17345 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
17346 text-art/style.o, text-art/styled-string.o, text-art/table.o,
17347 text-art/theme.o, and text-art/widget.o.
17348 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
17349 (COLOR_FG_BRIGHT_RED): New.
17350 (COLOR_FG_BRIGHT_GREEN): New.
17351 (COLOR_FG_BRIGHT_YELLOW): New.
17352 (COLOR_FG_BRIGHT_BLUE): New.
17353 (COLOR_FG_BRIGHT_MAGENTA): New.
17354 (COLOR_FG_BRIGHT_CYAN): New.
17355 (COLOR_FG_BRIGHT_WHITE): New.
17356 (COLOR_BG_BRIGHT_BLACK): New.
17357 (COLOR_BG_BRIGHT_RED): New.
17358 (COLOR_BG_BRIGHT_GREEN): New.
17359 (COLOR_BG_BRIGHT_YELLOW): New.
17360 (COLOR_BG_BRIGHT_BLUE): New.
17361 (COLOR_BG_BRIGHT_MAGENTA): New.
17362 (COLOR_BG_BRIGHT_CYAN): New.
17363 (COLOR_BG_BRIGHT_WHITE): New.
17364 * common.opt (fdiagnostics-text-art-charset=): New option.
17365 (diagnostic-text-art.h): New SourceInclude.
17366 (diagnostic_text_art_charset) New Enum and EnumValues.
17367 * configure: Regenerate.
17368 * configure.ac (gccdepdir): Add text-art to loop.
17369 * diagnostic-diagram.h: New file.
17370 * diagnostic-format-json.cc (json_emit_diagram): New.
17371 (diagnostic_output_format_init_json): Wire it up to
17372 context->m_diagrams.m_emission_cb.
17373 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
17374 "text-art/canvas.h".
17375 (sarif_result::on_nested_diagnostic): Move code to...
17376 (sarif_result::add_related_location): ...this new function.
17377 (sarif_result::on_diagram): New.
17378 (sarif_builder::emit_diagram): New.
17379 (sarif_builder::make_message_object_for_diagram): New.
17380 (sarif_emit_diagram): New.
17381 (diagnostic_output_format_init_sarif): Set
17382 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
17383 * diagnostic-text-art.h: New file.
17384 * diagnostic.cc: Include "diagnostic-text-art.h",
17385 "diagnostic-diagram.h", and "text-art/theme.h".
17386 (diagnostic_initialize): Initialize context->m_diagrams and
17387 call diagnostics_text_art_charset_init.
17388 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
17389 (diagnostic_emit_diagram): New.
17390 (diagnostics_text_art_charset_init): New.
17391 * diagnostic.h (text_art::theme): New forward decl.
17392 (class diagnostic_diagram): Likewise.
17393 (diagnostic_context::m_diagrams): New field.
17394 (diagnostic_emit_diagram): New decl.
17395 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
17396 -fdiagnostics-text-art-charset=.
17397 (-fdiagnostics-plain-output): Add
17398 -fdiagnostics-text-art-charset=none.
17399 * gcc.cc: Include "diagnostic-text-art.h".
17400 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
17401 * opts-common.cc (decode_cmdline_options_to_array): Add
17402 "-fdiagnostics-text-art-charset=none" to expanded_args for
17403 -fdiagnostics-plain-output.
17404 * opts.cc: Include "diagnostic-text-art.h".
17405 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
17406 * pretty-print.cc (pp_unicode_character): New.
17407 * pretty-print.h (pp_unicode_character): New decl.
17408 * selftest-run-tests.cc: Include "text-art/selftests.h".
17409 (selftest::run_tests): Call text_art_tests.
17410 * text-art/box-drawing-chars.inc: New file, generated by
17411 contrib/unicode/gen-box-drawing-chars.py.
17412 * text-art/box-drawing.cc: New file.
17413 * text-art/box-drawing.h: New file.
17414 * text-art/canvas.cc: New file.
17415 * text-art/canvas.h: New file.
17416 * text-art/ruler.cc: New file.
17417 * text-art/ruler.h: New file.
17418 * text-art/selftests.cc: New file.
17419 * text-art/selftests.h: New file.
17420 * text-art/style.cc: New file.
17421 * text-art/styled-string.cc: New file.
17422 * text-art/table.cc: New file.
17423 * text-art/table.h: New file.
17424 * text-art/theme.cc: New file.
17425 * text-art/theme.h: New file.
17426 * text-art/types.h: New file.
17427 * text-art/widget.cc: New file.
17428 * text-art/widget.h: New file.
17430 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
17432 * function.h (emit_initial_value_sets):
17433 Change return type from int to void.
17434 (aggregate_value_p): Change return type from int to bool.
17435 (prologue_contains): Ditto.
17436 (epilogue_contains): Ditto.
17437 (prologue_epilogue_contains): Ditto.
17438 * function.cc (temp_slot): Make "in_use" variable bool.
17439 (make_slot_available): Update for changed "in_use" variable.
17440 (assign_stack_temp_for_type): Ditto.
17441 (emit_initial_value_sets): Change return type from int to void
17442 and update function body accordingly.
17443 (instantiate_virtual_regs): Ditto.
17444 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
17445 (safe_insn_predicate): Change return type from int to bool.
17446 (aggregate_value_p): Change return type from int to bool
17447 and update function body accordingly.
17448 (prologue_contains): Change return type from int to bool.
17449 (prologue_epilogue_contains): Ditto.
17451 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
17453 * common.opt (fp_contract_mode) [on]: Remove fallback.
17454 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
17455 * doc/invoke.texi (-ffp-contract): Update.
17456 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
17458 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17460 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17461 Add alternatives to prefer to avoid same input and output Z register.
17462 (mask_gather_load<mode><v_int_container>): Likewise.
17463 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17464 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17465 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17466 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17468 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17470 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17471 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17472 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17473 <SVE_2BHSI:mode>_sxtw): Likewise.
17474 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17475 <SVE_2BHSI:mode>_uxtw): Likewise.
17476 (@aarch64_ldff1_gather<mode>): Likewise.
17477 (@aarch64_ldff1_gather<mode>): Likewise.
17478 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17479 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17480 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17481 <VNx4_NARROW:mode>): Likewise.
17482 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17483 <VNx2_NARROW:mode>): Likewise.
17484 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17485 <VNx2_NARROW:mode>_sxtw): Likewise.
17486 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17487 <VNx2_NARROW:mode>_uxtw): Likewise.
17488 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17489 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17490 <SVE_PARTIAL_I:mode>): Likewise.
17492 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17494 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17495 Convert to compact alternatives syntax.
17496 (mask_gather_load<mode><v_int_container>): Likewise.
17497 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17498 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17499 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17500 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17502 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17504 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17505 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17506 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17507 <SVE_2BHSI:mode>_sxtw): Likewise.
17508 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17509 <SVE_2BHSI:mode>_uxtw): Likewise.
17510 (@aarch64_ldff1_gather<mode>): Likewise.
17511 (@aarch64_ldff1_gather<mode>): Likewise.
17512 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17513 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17514 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17515 <VNx4_NARROW:mode>): Likewise.
17516 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17517 <VNx2_NARROW:mode>): Likewise.
17518 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17519 <VNx2_NARROW:mode>_sxtw): Likewise.
17520 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17521 <VNx2_NARROW:mode>_uxtw): Likewise.
17522 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17523 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17524 <SVE_PARTIAL_I:mode>): Likewise.
17526 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17529 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17531 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17532 Convert to compact alternatives syntax.
17533 (mask_gather_load<mode><v_int_container>): Likewise.
17534 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17535 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17536 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17537 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17539 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17541 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17542 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17543 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17544 <SVE_2BHSI:mode>_sxtw): Likewise.
17545 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17546 <SVE_2BHSI:mode>_uxtw): Likewise.
17547 (@aarch64_ldff1_gather<mode>): Likewise.
17548 (@aarch64_ldff1_gather<mode>): Likewise.
17549 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17550 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17551 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17552 <VNx4_NARROW:mode>): Likewise.
17553 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17554 <VNx2_NARROW:mode>): Likewise.
17555 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17556 <VNx2_NARROW:mode>_sxtw): Likewise.
17557 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17558 <VNx2_NARROW:mode>_uxtw): Likewise.
17559 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17560 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17561 <SVE_PARTIAL_I:mode>): Likewise.
17563 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17565 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
17566 (get_len_load_store_mode): Ditto.
17567 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
17568 (get_len_load_store_mode): Ditto.
17569 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
17570 (get_len_load_store_mode): Ditto.
17571 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
17572 (get_len_load_store_mode): Ditto.
17573 * tree-if-conv.cc: include optabs-tree instead of optabs-query
17575 2023-06-21 Richard Biener <rguenther@suse.de>
17577 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
17578 split_constant_offset for the POINTER_PLUS_EXPR case.
17580 2023-06-21 Richard Biener <rguenther@suse.de>
17582 * tree-ssa-loop-ivopts.cc (record_group_use): Use
17583 split_constant_offset.
17585 2023-06-21 Richard Biener <rguenther@suse.de>
17587 * tree-loop-distribution.cc (classify_builtin_st): Use
17588 split_constant_offset.
17589 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
17590 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
17592 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17594 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17595 Convert to compact alternatives syntax.
17596 (mask_gather_load<mode><v_int_container>): Likewise.
17597 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17598 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17599 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17600 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17602 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17604 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17605 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17606 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17607 <SVE_2BHSI:mode>_sxtw): Likewise.
17608 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17609 <SVE_2BHSI:mode>_uxtw): Likewise.
17610 (@aarch64_ldff1_gather<mode>): Likewise.
17611 (@aarch64_ldff1_gather<mode>): Likewise.
17612 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17613 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17614 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17615 <VNx4_NARROW:mode>): Likewise.
17616 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17617 <VNx2_NARROW:mode>): Likewise.
17618 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17619 <VNx2_NARROW:mode>_sxtw): Likewise.
17620 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17621 <VNx2_NARROW:mode>_uxtw): Likewise.
17622 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17623 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17624 <SVE_PARTIAL_I:mode>): Likewise.
17626 2023-06-21 Tamar Christina <tamar.christina@arm.com>
17629 * doc/md.texi: Replace backslashchar.
17631 2023-06-21 Richard Biener <rguenther@suse.de>
17633 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
17634 Overload. For masked main loops make sure the vectorization
17635 factor isn't more than double the number of iterations.
17637 2023-06-21 Jan Beulich <jbeulich@suse.com>
17639 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
17640 value duplication by ix86_build_signbit_mask() when AVX512F and
17642 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
17643 2-alternative form. Adjust "mode" attribute. Add "enabled"
17645 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
17646 && !TARGET_PREFER_AVX256.
17647 (*<avx512>_vpternlog<mode>_2): Likewise.
17648 (*<avx512>_vpternlog<mode>_3): Likewise.
17650 2023-06-21 liuhongt <hongtao.liu@intel.com>
17653 * tree-vect-stmts.cc (vectorizable_conversion): Use
17654 intermiediate integer type for float_expr/fix_trunc_expr when
17655 direct optab is not existed.
17657 2023-06-20 Tamar Christina <tamar.christina@arm.com>
17659 PR bootstrap/110324
17660 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
17662 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
17664 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
17665 register operand to the stack pointer. Require the second register
17666 operand to have the number specified in a separate const_int operand.
17667 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
17668 (aarch64_allocate_and_probe_stack_space): Use it.
17669 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
17670 (aarch64_expand_epilogue): Likewise.
17672 2023-06-20 Jakub Jelinek <jakub@redhat.com>
17674 PR middle-end/79173
17675 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
17676 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
17679 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
17681 * calls.h (setjmp_call_p): Change return type from int to bool.
17682 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
17683 (store_one_arg): Change return type from int to bool
17684 and adjust function body accordingly. Change "sibcall_failure"
17686 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
17687 argument to bool. Change "partial_seen" variable to bool.
17688 (load_register_parameters): Change *sibcall_failure
17689 pointer argument to bool.
17690 (check_sibcall_argument_overlap_1): Change return type from int to bool
17691 and adjust function body accordingly.
17692 (check_sibcall_argument_overlap): Ditto. Change
17693 "mark_stored_args_map" argument to bool.
17694 (emit_call_1): Change "already_popped" variable to bool.
17695 (setjmp_call_p): Change return type from int to bool
17696 and adjust function body accordingly.
17697 (initialize_argument_information): Change *must_preallocate
17698 pointer argument to bool.
17699 (expand_call): Change "pcc_struct_value", "must_preallocate"
17700 and "sibcall_failure" variables to bool.
17701 (emit_library_call_value_1): Change "pcc_struct_value"
17704 2023-06-20 Martin Jambor <mjambor@suse.cz>
17707 * ipa-sra.cc (struct caller_issues): New field there_is_one.
17708 (check_for_caller_issues): Set it.
17709 (check_all_callers_for_issues): Check it.
17711 2023-06-20 Martin Jambor <mjambor@suse.cz>
17713 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
17714 (struct ipcp_transformation): Rearrange members according to
17715 C++ class coding convention, add m_uid_to_idx,
17716 get_param_index and maybe_create_parm_idx_map.
17717 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
17718 (compare_uids): Likewise.
17719 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
17720 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
17721 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
17722 (ipcp_update_vr): Likewise.
17723 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
17724 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
17726 2023-06-20 Carl Love <cel@us.ibm.com>
17728 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
17729 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
17730 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
17731 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
17732 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
17733 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
17734 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
17735 * config/rs6000/rs6000-builtins.def
17736 (__builtin_vsx_scalar_extract_exp_to_vec,
17737 __builtin_vsx_scalar_extract_sig_to_vec,
17738 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
17739 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
17740 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
17741 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
17742 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
17743 overloaded instance. Update comments.
17744 * config/rs6000/rs6000-overload.def
17745 (__builtin_vec_scalar_insert_exp): Add new overload definition with
17747 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
17748 overloaded definitions.
17749 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
17750 (DI_to_TI): New mode attribute.
17751 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
17752 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
17753 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
17754 * doc/extend.texi (scalar_extract_exp_to_vec,
17755 scalar_extract_sig_to_vec): Add documentation for new builtins.
17756 (scalar_insert_exp): Add new overloaded builtin definition.
17758 2023-06-20 Li Xu <xuli1@eswincomputing.com>
17760 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
17761 size of vector mask mode to one rvv register.
17763 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17765 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
17767 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
17769 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
17772 2023-06-20 Richard Biener <rguenther@suse.de>
17774 * tree-ssa-dse.cc (dse_classify_store): When we found
17775 no defs and the basic-block with the original definition
17776 ends in __builtin_unreachable[_trap] the store is dead.
17778 2023-06-20 Richard Biener <rguenther@suse.de>
17780 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
17781 keep the virtual SSA form up-to-date.
17783 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17785 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
17786 New define_insn_and_split.
17788 2023-06-20 Tamar Christina <tamar.christina@arm.com>
17790 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
17792 2023-06-20 Jan Beulich <jbeulich@suse.com>
17794 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
17795 constraint. Add new AVX512F alternative.
17797 2023-06-20 Richard Biener <rguenther@suse.de>
17800 * dwarf2out.cc (process_scope_var): Continue processing
17801 the decl after setting a parent in case the existing DIE
17804 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
17806 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
17807 (riscv_arg_has_vector): Simplify.
17808 (riscv_pass_in_vector_p): Adjust warning message.
17810 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
17812 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
17813 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
17814 * config/riscv/riscv.md (riscv_frcsr): New patterns.
17815 (riscv_fscsr): Likewise.
17817 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
17819 PR rtl-optimization/110305
17820 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17821 Handle HONOR_SNANS for x + 0.0.
17823 2023-06-19 Jan Hubicka <jh@suse.cz>
17825 PR tree-optimization/109811
17826 PR tree-optimization/109849
17827 * passes.def: Add phiprop to early optimization passes.
17828 * tree-ssa-phiprop.cc: Allow clonning.
17830 2023-06-19 Tamar Christina <tamar.christina@arm.com>
17832 * config/aarch64/aarch64.md (arches): Add nosimd.
17833 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
17836 2023-06-19 Tamar Christina <tamar.christina@arm.com>
17837 Omar Tahir <Omar.Tahir2@arm.com>
17839 * gensupport.cc (class conlist, add_constraints, add_attributes,
17840 skip_spaces, expect_char, preprocess_compact_syntax,
17841 parse_section_layout, parse_section, convert_syntax): New.
17842 (process_rtx): Check for conversion.
17843 * genoutput.cc (process_template): Check for unresolved iterators.
17844 (class data): Add compact_syntax_p.
17845 (gen_insn): Use it.
17846 * gensupport.h (compact_syntax): New.
17847 (hash-set.h): Include.
17848 * doc/md.texi: Document it.
17850 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
17852 * recog.h (check_asm_operands): Change return type from int to bool.
17853 (insn_invalid_p): Ditto.
17854 (verify_changes): Ditto.
17855 (apply_change_group): Ditto.
17856 (constrain_operands): Ditto.
17857 (constrain_operands_cached): Ditto.
17858 (validate_replace_rtx_subexp): Ditto.
17859 (validate_replace_rtx): Ditto.
17860 (validate_replace_rtx_part): Ditto.
17861 (validate_replace_rtx_part_nosimplify): Ditto.
17862 (added_clobbers_hard_reg_p): Ditto.
17863 (peep2_regno_dead_p): Ditto.
17864 (peep2_reg_dead_p): Ditto.
17865 (store_data_bypass_p): Ditto.
17866 (if_test_bypass_p): Ditto.
17867 * rtl.h (split_all_insns_noflow): Change
17868 return type from unsigned int to void.
17869 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
17870 of generated added_clobbers_hard_reg_p from int to bool and adjust
17871 function body accordingly. Change "used" variable type from
17873 * recog.cc (check_asm_operands): Change return type
17874 from int to bool and adjust function body accordingly.
17875 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
17876 (verify_changes): Change return type from int to bool.
17877 (apply_change_group): Change return type from int to bool
17878 and adjust function body accordingly.
17879 (validate_replace_rtx_subexp): Change return type from int to bool.
17880 (validate_replace_rtx): Ditto.
17881 (validate_replace_rtx_part): Ditto.
17882 (validate_replace_rtx_part_nosimplify): Ditto.
17883 (constrain_operands_cached): Ditto.
17884 (constrain_operands): Ditto. Change "lose" and "win"
17885 variables type from int to bool.
17886 (split_all_insns_noflow): Change return type from unsigned int
17887 to void and adjust function body accordingly.
17888 (peep2_regno_dead_p): Change return type from int to bool.
17889 (peep2_reg_dead_p): Ditto.
17890 (peep2_find_free_register): Change "success"
17891 variable type from int to bool
17892 (store_data_bypass_p_1): Change return type from int to bool.
17893 (store_data_bypass_p): Ditto.
17895 2023-06-19 Li Xu <xuli1@eswincomputing.com>
17897 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
17900 2023-06-19 Pan Li <pan2.li@intel.com>
17903 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
17905 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
17906 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
17907 VF_ZVE63 and VF_ZVE32.
17908 * config/riscv/vector.md
17909 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
17910 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
17911 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
17912 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
17913 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
17914 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
17915 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
17916 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
17917 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
17918 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
17920 2023-06-19 Pan Li <pan2.li@intel.com>
17923 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
17925 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
17926 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
17927 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
17928 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
17929 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
17930 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
17931 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
17932 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
17933 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
17934 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
17935 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
17936 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
17937 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
17938 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
17940 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17942 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
17943 (gcn_init_libfuncs): Add div and mod functions for all modes.
17944 Add placeholders for divmod functions.
17945 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
17947 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17949 * tree-vect-generic.cc: Include optabs-libfuncs.h.
17950 (get_compute_type): Check optab_libfunc.
17951 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
17952 (vectorizable_operation): Check optab_libfunc.
17954 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17956 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
17957 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
17958 (V_MOV, V_MOV_ALT): Likewise.
17959 (scalar_mode, SCALAR_MODE): Add TImode.
17960 (vnsi, VnSI, vndi, VnDI): Likewise.
17961 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
17962 (mov<mode>, mov<mode>_unspec): Use V_MOV.
17963 (*mov<mode>_4reg): New insn.
17964 (mov<mode>_exec): New 4reg variant.
17965 (mov<mode>_sgprbase): Likewise.
17966 (reload_in<mode>, reload_out<mode>): Use V_MOV.
17967 (vec_set<mode>): Likewise.
17968 (vec_duplicate<mode><exec>): New 4reg variant.
17969 (vec_extract<mode><scalar_mode>): Likewise.
17970 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
17971 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
17972 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
17973 (fold_extract_last_<mode>): Use V_MOV.
17974 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
17975 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
17976 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
17977 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
17978 gather<mode>_insn_2offsets<exec>): Use V_MOV.
17979 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
17980 scatter<mode>_insn_1offset<exec_scatter>,
17981 scatter<mode>_insn_1offset_ds<exec_scatter>,
17982 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
17983 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
17984 mask_scatter_store<mode><vnsi>): Likewise.
17985 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
17986 (gcn_hard_regno_mode_ok): Likewise.
17987 (GEN_VNM): Add TImode support.
17988 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
17989 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
17990 V8TImode, and V2TImode.
17991 (print_operand): Add 'J' and 'K' print codes.
17993 2023-06-19 Richard Biener <rguenther@suse.de>
17995 PR tree-optimization/110298
17996 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
17997 Clear number of iterations info before cleaning up the CFG.
17999 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18001 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
18002 Simplify vec_concat of lowpart subreg and high part vec_select.
18004 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
18006 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
18008 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
18010 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
18011 Handle null niters_skip.
18013 2023-06-19 Richard Biener <rguenther@suse.de>
18015 * config/aarch64/aarch64.cc
18016 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
18017 to LOOP_VINFO_MASKS.
18019 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
18022 * common/config/avr/avr-common.cc: Remove setting
18023 of OPT_fdelete_null_pointer_checks.
18024 * config/avr/avr.cc (avr_option_override): Clear
18025 flag_delete_null_pointer_checks if zero_address_valid.
18026 (avr_addr_space_zero_address_valid): New function.
18027 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
18030 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18031 Robin Dapp <rdapp.gcc@gmail.com>
18033 * doc/md.texi: Add len_mask{load,store}.
18034 * genopinit.cc (main): Ditto.
18036 * internal-fn.cc (len_maskload_direct): Ditto.
18037 (len_maskstore_direct): Ditto.
18038 (expand_call_mem_ref): Ditto.
18039 (expand_partial_load_optab_fn): Ditto.
18040 (expand_len_maskload_optab_fn): Ditto.
18041 (expand_partial_store_optab_fn): Ditto.
18042 (expand_len_maskstore_optab_fn): Ditto.
18043 (direct_len_maskload_optab_supported_p): Ditto.
18044 (direct_len_maskstore_optab_supported_p): Ditto.
18045 * internal-fn.def (LEN_MASK_LOAD): Ditto.
18046 (LEN_MASK_STORE): Ditto.
18047 * optabs.def (OPTAB_CD): Ditto.
18049 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
18051 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
18053 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
18055 * config/riscv/autovec.md (<optab><mode>3): Implement binop
18057 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
18058 (enum vxrm_field_enum): Rename this...
18059 (enum fixed_point_rounding_mode): ...to this.
18060 (enum frm_field_enum): Rename this...
18061 (enum floating_point_rounding_mode): ...to this.
18062 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
18063 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
18065 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
18066 (riscv_excess_precision): Do not convert to float for ZVFH.
18067 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
18069 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
18071 * config/riscv/vector-iterators.md: Add VI_QH iterator.
18072 * config/riscv/autovec-opt.md
18073 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
18074 that includes sign extension.
18075 (@pred_extract_first_sextsi<mode>): Dito for SImode.
18077 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
18079 * config/riscv/autovec.md (vec_set<mode>): Implement.
18080 (vec_extract<mode><vel>): Implement.
18081 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
18082 (emit_vlmax_slide_insn): Declare.
18083 (emit_nonvlmax_slide_tu_insn): Declare.
18084 (emit_scalar_move_insn): Export.
18085 (emit_nonvlmax_integer_move_insn): Export.
18086 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
18087 (emit_nonvlmax_slide_tu_insn): New function.
18088 (emit_vlmax_masked_mu_insn): No change.
18089 (emit_vlmax_integer_move_insn): Export.
18091 2023-06-19 Richard Biener <rguenther@suse.de>
18093 * tree-vectorizer.h (enum vect_partial_vector_style): New.
18094 (_loop_vec_info::partial_vector_style): Likewise.
18095 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
18096 (rgroup_controls::compare_type): Add.
18097 (vec_loop_masks): Change from a typedef to auto_vec<>
18099 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
18100 Adjust. Convert niters_skip to compare_type.
18101 (vect_set_loop_condition_partial_vectors_avx512): New function
18102 implementing the AVX512 partial vector codegen.
18103 (vect_set_loop_condition): Dispatch to the correct
18104 vect_set_loop_condition_partial_vectors_* function based on
18105 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
18106 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
18107 in the original niter type.
18108 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
18109 partial_vector_style.
18110 (can_produce_all_loop_masks_p): Adjust.
18111 (vect_verify_full_masking): Produce the rgroup_controls vector
18112 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
18113 (vect_verify_full_masking_avx512): New function implementing
18114 verification of AVX512 style masking.
18115 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
18116 (vect_analyze_loop_2): Also try AVX512 style masking.
18118 (vect_estimate_min_profitable_iters): Implement AVX512 style
18119 mask producing cost.
18120 (vect_record_loop_mask): Do not build the rgroup_controls
18121 vector here but record masks in a hash-set.
18122 (vect_get_loop_mask): Implement AVX512 style mask query,
18123 complementing the existing while_ult style.
18125 2023-06-19 Richard Biener <rguenther@suse.de>
18127 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
18129 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
18130 (vectorize_fold_left_reduction): Adjust.
18131 (vect_transform_reduction): Likewise.
18132 (vectorizable_live_operation): Likewise.
18133 * tree-vect-stmts.cc (vectorizable_call): Likewise.
18134 (vectorizable_operation): Likewise.
18135 (vectorizable_store): Likewise.
18136 (vectorizable_load): Likewise.
18137 (vectorizable_condition): Likewise.
18139 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
18142 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
18143 Add Optimization option property.
18145 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18147 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
18148 Add new pattern for the abovementioned case.
18150 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18152 * config/xtensa/xtensa.cc
18153 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
18155 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
18157 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
18159 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
18161 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
18163 2023-06-19 liuhongt <hongtao.liu@intel.com>
18166 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
18168 (sse2_packsswb<mask_name>): .. this, ..
18169 (avx2_packsswb<mask_name>): .. this and ..
18170 (avx512bw_packsswb<mask_name>): .. this.
18171 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
18172 (sse2_packssdw<mask_name>): .. this, ..
18173 (avx2_packssdw<mask_name>): .. this and ..
18174 (avx512bw_packssdw<mask_name>): .. this.
18176 2023-06-19 liuhongt <hongtao.liu@intel.com>
18179 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
18180 UNSPEC_US_TRUNCATE instead of original us_truncate for
18182 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
18184 (mmx_packsswb): .. this and ..
18185 (mmx_packuswb): .. this.
18186 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
18188 (s_trunsuffix): Removed code iterator.
18189 (any_s_truncate): Ditto.
18190 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
18191 UNSPEC_US_TRUNCATE instead of original us_truncate.
18192 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
18193 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
18195 2023-06-18 Pan Li <pan2.li@intel.com>
18197 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
18199 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
18201 * rtl.h (*rtx_equal_p_callback_function):
18202 Change return type from int to bool.
18203 (rtx_equal_p): Ditto.
18204 (*hash_rtx_callback_function): Ditto.
18205 * rtl.cc (rtx_equal_p): Change return type from int to bool
18206 and adjust function body accordingly.
18207 * early-remat.cc (scratch_equal): Ditto.
18208 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
18209 (hash_with_unspec_callback): Ditto.
18211 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
18213 * config/arc/arc.md (movqi_insn): Allow certain constants to
18214 be stored into memory in the pattern's condition.
18215 (movsf_insn): Similarly.
18217 2023-06-18 Honza <jh@ryzen3.suse.cz>
18219 PR tree-optimization/109849
18220 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
18221 ES; handle ipa_predicate::not_sra_candidate.
18222 (evaluate_properties_for_edge): Pass es to
18223 evaluate_conditions_for_known_args.
18224 (ipa_fn_summary_t::duplicate): Handle sra candidates.
18225 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
18226 (load_or_store_of_ptr_parameter): New function.
18227 (points_to_possible_sra_candidate_p): New function.
18228 (analyze_function_body): Initialize points_to_possible_sra_candidate;
18229 determine sra predicates.
18230 (estimate_ipcp_clone_size_and_time): Update call of
18231 evaluate_conditions_for_known_args.
18232 (remap_edge_params): Update points_to_possible_sra_candidate.
18233 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
18234 (write_ipa_call_summary): Likewise.
18235 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
18236 (dump_condition): Dump it.
18237 * ipa-predicate.h (struct inline_param_summary): Add
18238 points_to_possible_sra_candidate.
18240 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
18242 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
18243 function for setting the carry flag.
18244 (ix86_expand_builtin) <handlecarry>: Use it here.
18245 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
18246 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
18247 (usubc<mode>5): Likewise.
18249 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
18251 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
18252 for the immediate constant shift count.
18253 (*concat<mode><dwi>3_2): Likewise.
18254 (*concat<mode><dwi>3_3): Likewise.
18255 (*concat<mode><dwi>3_4): Likewise.
18256 (*concat<mode><dwi>3_5): Likewise.
18257 (*concat<mode><dwi>3_6): Likewise.
18259 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
18261 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
18262 (hash_rtx): Remove.
18263 * early-remat.cc (remat_candidate_hasher::equal): Update
18264 to call rtx_equal_p with rtx_equal_p_callback_function argument.
18265 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
18266 (rtx_equal_p): Remove.
18267 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
18268 argument with NULL default value.
18269 (rtx_equal_p_cb): Remove function declaration.
18270 (hash_rtx_cb): Ditto.
18271 (hash_rtx): Add hash_rtx_callback_function argument
18272 with NULL default value.
18273 * sel-sched-ir.cc (free_nop_pool): Update function comment.
18274 (skip_unspecs_callback): Ditto.
18275 (vinsn_init): Update to call hash_rtx with
18276 hash_rtx_callback_function argument.
18277 (vinsn_equal_p): Ditto.
18279 2023-06-18 yulong <shiyulong@iscas.ac.cn>
18281 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
18282 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
18283 (ADJUST_ALIGNMENT): Ditto.
18284 (RVV_TUPLE_PARTIAL_MODES): Ditto.
18285 (ADJUST_NUNITS): Ditto.
18286 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
18288 (vfloat16mf4x3_t): Ditto.
18289 (vfloat16mf4x4_t): Ditto.
18290 (vfloat16mf4x5_t): Ditto.
18291 (vfloat16mf4x6_t): Ditto.
18292 (vfloat16mf4x7_t): Ditto.
18293 (vfloat16mf4x8_t): Ditto.
18294 (vfloat16mf2x2_t): Ditto.
18295 (vfloat16mf2x3_t): Ditto.
18296 (vfloat16mf2x4_t): Ditto.
18297 (vfloat16mf2x5_t): Ditto.
18298 (vfloat16mf2x6_t): Ditto.
18299 (vfloat16mf2x7_t): Ditto.
18300 (vfloat16mf2x8_t): Ditto.
18301 (vfloat16m1x2_t): Ditto.
18302 (vfloat16m1x3_t): Ditto.
18303 (vfloat16m1x4_t): Ditto.
18304 (vfloat16m1x5_t): Ditto.
18305 (vfloat16m1x6_t): Ditto.
18306 (vfloat16m1x7_t): Ditto.
18307 (vfloat16m1x8_t): Ditto.
18308 (vfloat16m2x2_t): Ditto.
18309 (vfloat16m2x3_t): Ditto.
18310 (vfloat16m2x4_t): Ditto.
18311 (vfloat16m4x2_t): Ditto.
18312 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
18313 (vfloat16mf4x3_t): Ditto.
18314 (vfloat16mf4x4_t): Ditto.
18315 (vfloat16mf4x5_t): Ditto.
18316 (vfloat16mf4x6_t): Ditto.
18317 (vfloat16mf4x7_t): Ditto.
18318 (vfloat16mf4x8_t): Ditto.
18319 (vfloat16mf2x2_t): Ditto.
18320 (vfloat16mf2x3_t): Ditto.
18321 (vfloat16mf2x4_t): Ditto.
18322 (vfloat16mf2x5_t): Ditto.
18323 (vfloat16mf2x6_t): Ditto.
18324 (vfloat16mf2x7_t): Ditto.
18325 (vfloat16mf2x8_t): Ditto.
18326 (vfloat16m1x2_t): Ditto.
18327 (vfloat16m1x3_t): Ditto.
18328 (vfloat16m1x4_t): Ditto.
18329 (vfloat16m1x5_t): Ditto.
18330 (vfloat16m1x6_t): Ditto.
18331 (vfloat16m1x7_t): Ditto.
18332 (vfloat16m1x8_t): Ditto.
18333 (vfloat16m2x2_t): Ditto.
18334 (vfloat16m2x3_t): Ditto.
18335 (vfloat16m2x4_t): Ditto.
18336 (vfloat16m4x2_t): Ditto.
18337 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
18338 * config/riscv/riscv.md: New.
18339 * config/riscv/vector-iterators.md: New.
18341 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
18343 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
18344 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
18345 Generalize special case for converting TImode to V1TImode to handle
18346 all 128-bit vector conversions.
18348 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
18350 * gcc-ar.cc (main): Refactor to slightly reduce code
18351 duplication. Avoid unnecessary elements in nargv.
18353 2023-06-16 Pan Li <pan2.li@intel.com>
18356 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
18357 integer reduction expand.
18358 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
18359 and the LMUL1 attr respectively.
18360 * config/riscv/vector.md
18361 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
18362 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
18363 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
18364 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
18365 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
18366 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
18367 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
18369 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18372 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
18374 2023-06-16 Jakub Jelinek <jakub@redhat.com>
18376 PR middle-end/79173
18377 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
18378 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
18379 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
18381 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
18382 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
18383 * builtins.cc (fold_builtin_addc_subc): New function.
18384 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
18385 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
18387 2023-06-16 Jakub Jelinek <jakub@redhat.com>
18389 PR tree-optimization/110271
18390 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
18391 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
18392 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
18394 2023-06-16 Martin Jambor <mjambor@suse.cz>
18396 * configure: Regenerate.
18398 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
18399 Uros Bizjak <ubizjak@gmail.com>
18402 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
18403 define_insn_and_split combine *add<dwi>3_doubleword with
18404 a *concat<mode><dwi>3 for more efficient lowering after reload.
18406 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
18408 * ira-lives.cc: Include except.h.
18409 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
18410 when the pseudo does not live at the exception landing pad.
18412 2023-06-16 Alex Coplan <alex.coplan@arm.com>
18414 * doc/invoke.texi: Document -Welaborated-enum-base.
18416 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18418 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
18419 (ushrn2_n): ... This.
18420 (sqshrn2_n): Rename builtins to...
18421 (ssqshrn2_n): ... This.
18422 (uqshrn2_n): Rename builtins to...
18423 (uqushrn2_n): ... This.
18424 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
18425 (vqshrn_high_n_s32): Likewise.
18426 (vqshrn_high_n_s64): Likewise.
18427 (vqshrn_high_n_u16): Likewise.
18428 (vqshrn_high_n_u32): Likewise.
18429 (vqshrn_high_n_u64): Likewise.
18430 (vshrn_high_n_s16): Likewise.
18431 (vshrn_high_n_s32): Likewise.
18432 (vshrn_high_n_s64): Likewise.
18433 (vshrn_high_n_u16): Likewise.
18434 (vshrn_high_n_u32): Likewise.
18435 (vshrn_high_n_u64): Likewise.
18436 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
18438 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
18439 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
18440 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
18441 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
18442 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
18443 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
18444 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
18445 Update expander for the above.
18447 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18449 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
18450 (shrn2_n): ... This.
18451 (rshrn2): Rename builtins to...
18452 (rshrn2_n): ... This.
18453 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
18454 (vrshrn_high_n_s32): Likewise.
18455 (vrshrn_high_n_s64): Likewise.
18456 (vrshrn_high_n_u16): Likewise.
18457 (vrshrn_high_n_u32): Likewise.
18458 (vrshrn_high_n_u64): Likewise.
18459 (vshrn_high_n_s16): Likewise.
18460 (vshrn_high_n_s32): Likewise.
18461 (vshrn_high_n_s64): Likewise.
18462 (vshrn_high_n_u16): Likewise.
18463 (vshrn_high_n_u32): Likewise.
18464 (vshrn_high_n_u64): Likewise.
18465 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
18467 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
18468 (aarch64_shrn2<mode>_insn_le): Likewise.
18469 (aarch64_shrn2<mode>_insn_be): Likewise.
18470 (aarch64_shrn2<mode>): Likewise.
18471 (aarch64_rshrn2<mode>_insn_le): Likewise.
18472 (aarch64_rshrn2<mode>_insn_be): Likewise.
18473 (aarch64_rshrn2<mode>): Likewise.
18474 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
18475 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
18476 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
18477 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
18478 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
18479 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
18480 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
18481 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
18482 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
18483 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
18484 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
18485 (aarch64_sqshrun2_n<mode>): New define_expand.
18486 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
18487 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
18488 (aarch64_sqrshrun2_n<mode>): New define_expand.
18489 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
18490 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
18491 Delete unspec values.
18492 (VQSHRN_N): Delete int iterator.
18494 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18496 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
18497 * config/aarch64/aarch64-simd.md
18498 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
18499 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
18500 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
18501 * config/aarch64/iterators.md (shrn_s): New code attribute.
18503 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18505 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
18507 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
18508 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
18509 (aarch64_sqrshrun_n<mode>_insn): Likewise.
18510 (aarch64_sqshrun_n<mode>_insn): Likewise.
18511 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
18512 (aarch64_sqshrun_n<mode>): Likewise.
18513 (aarch64_sqrshrun_n<mode>): Likewise.
18514 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
18516 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18518 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
18519 (shrn_n): ... This.
18520 (rshrn): Rename builtins to...
18521 (rshrn_n): ... This.
18522 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
18523 (vshrn_n_s32): Likewise.
18524 (vshrn_n_s64): Likewise.
18525 (vshrn_n_u16): Likewise.
18526 (vshrn_n_u32): Likewise.
18527 (vshrn_n_u64): Likewise.
18528 (vrshrn_n_s16): Likewise.
18529 (vrshrn_n_s32): Likewise.
18530 (vrshrn_n_s64): Likewise.
18531 (vrshrn_n_u16): Likewise.
18532 (vrshrn_n_u32): Likewise.
18533 (vrshrn_n_u64): Likewise.
18534 * config/aarch64/aarch64-simd.md
18535 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
18536 (aarch64_shrn<mode>): Likewise.
18537 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
18538 (aarch64_rshrn<mode>): Likewise.
18539 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
18540 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
18541 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
18542 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
18543 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
18544 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
18545 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
18546 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
18547 (aarch64_sqshrun_n<mode>): Likewise.
18548 (aarch64_sqrshrun_n<mode>): Likewise.
18549 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
18550 (TRUNCEXTEND): New code attribute.
18551 (TRUNC_SHIFT): Likewise.
18552 (shrn_op): Likewise.
18553 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
18556 2023-06-16 Pan Li <pan2.li@intel.com>
18558 * config/riscv/riscv-vsetvl.cc
18559 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
18561 2023-06-16 Richard Biener <rguenther@suse.de>
18563 PR tree-optimization/110278
18564 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
18565 (x != (typeof x)(x == 0) -> true): Likewise.
18567 2023-06-16 Pali Rohár <pali@kernel.org>
18569 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
18570 (REAL_LIBGCC_SPEC): New define.
18571 * config/i386/mingw.opt: Add mcrtdll=
18572 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
18573 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
18574 (STARTFILE_SPEC): Adjust for -mcrtdll=.
18575 * doc/invoke.texi: Add mcrtdll= documentation.
18577 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
18579 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
18580 (mips_handle_code_readable_attr):New static function.
18581 (mips_get_code_readable_attr):New static enum function.
18582 (mips_set_current_function):Set the code_readable mode.
18583 (mips_option_override):Same as above.
18584 * doc/extend.texi:Document code_readable.
18586 2023-06-16 Richard Biener <rguenther@suse.de>
18588 PR tree-optimization/110269
18589 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
18590 with tree_expr_nonzero_p ...
18591 * match.pd (cmp (convert? addr@0) integer_zerop): With this
18594 2023-06-15 Marek Polacek <polacek@redhat.com>
18596 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
18597 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
18598 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
18599 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
18600 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
18602 * configure: Regenerate.
18603 * doc/install.texi: Document --enable-host-pie.
18605 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
18607 * regcprop.cc (maybe_mode_change): Enable stack pointer
18610 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
18612 PR tree-optimization/110266
18613 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
18615 (adjust_realpart_expr): Ditto.
18617 2023-06-15 Jan Beulich <jbeulich@suse.com>
18619 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
18622 2023-06-15 Jan Beulich <jbeulich@suse.com>
18624 * config/i386/constraints.md: Mention k and r for B.
18626 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
18627 Andrew Pinski <apinski@marvell.com>
18630 * config/loongarch/loongarch.md: Modify the register constraints for template
18631 "jumptable" and "indirect_jump" from "r" to "e".
18633 2023-06-15 Xi Ruoyao <xry111@xry111.site>
18635 * config/loongarch/loongarch-tune.h (loongarch_align): New
18637 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
18639 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
18641 * config/loongarch/loongarch.cc
18642 (loongarch_option_override_internal): Set the value of
18643 -falign-functions= if -falign-functions is enabled but no value
18644 is given. Likewise for -falign-labels=.
18646 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18648 PR middle-end/79173
18649 * internal-fn.def (UADDC, USUBC): New internal functions.
18650 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
18651 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
18652 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
18653 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
18654 match_uaddc_usubc): New functions.
18655 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
18656 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
18657 other optimizations have been successful for those.
18658 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
18659 * fold-const-call.cc (fold_const_call): Likewise.
18660 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
18661 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
18662 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
18664 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
18665 define_expand patterns.
18666 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
18667 into NOTE_INSN_DELETED note rather than nop instruction.
18668 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
18671 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18673 PR middle-end/79173
18674 * config/i386/i386.md (subborrow<mode>): Add alternative with
18675 memory destination and add for it define_peephole2
18676 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
18677 destination in these patterns.
18679 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18681 PR middle-end/79173
18682 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
18683 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
18684 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
18685 using memory destination in these patterns.
18687 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18689 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
18690 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
18691 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
18692 * fold-const-call.cc (fold_const_call): ... here.
18694 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
18696 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
18697 Rename to <su>abd<mode>3.
18698 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
18701 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
18703 * doc/md.texi (sabd, uabd): Document them.
18704 * internal-fn.def (ABD): Use new optab.
18705 * optabs.def (sabd_optab, uabd_optab): New optabs,
18706 * tree-vect-patterns.cc (vect_recog_absolute_difference):
18707 Recognize the following idiom abs (a - b).
18708 (vect_recog_sad_pattern): Refactor to use
18709 vect_recog_absolute_difference.
18710 (vect_recog_abd_pattern): Use patterns found by
18711 vect_recog_absolute_difference to build a new ABD
18714 2023-06-15 chenxiaolong <chenxl04200420@163.com>
18716 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
18717 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
18719 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18721 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
18722 (expand_vec_perm_const_1): Add merge optmization.
18724 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
18727 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
18728 (riscv_pass_by_reference): Return true for vector mode
18730 2023-06-15 Pan Li <pan2.li@intel.com>
18732 * config/riscv/autovec-opt.md: Align the predictor sytle.
18733 * config/riscv/autovec.md: Ditto.
18735 2023-06-15 Pan Li <pan2.li@intel.com>
18737 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
18738 Take elen instead of scalar BITS_PER_WORD.
18739 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
18740 instead of scaler BITS_PER_WORD.
18742 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
18744 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
18746 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18748 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
18749 Fix signed comparison warning in loop from npats to enelts.
18751 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
18753 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
18754 to offloading compilation.
18755 * config/gcn/mkoffload.cc (main): Adjust.
18756 * config/nvptx/mkoffload.cc (main): Likewise.
18757 * doc/invoke.texi (foffload-options): Update example.
18759 2023-06-14 liuhongt <hongtao.liu@intel.com>
18762 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
18763 for alternative 2 since there's no evex version for vpcmpeqd
18766 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
18768 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
18770 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
18772 * config/sh/divtab.cc: Remove.
18774 2023-06-13 Jakub Jelinek <jakub@redhat.com>
18776 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
18777 superfluous spaces around \t for vpcmpeqd.
18779 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
18781 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
18782 clearing vectors with only a single element. Set CLEARED if the
18783 vector was initialized to zero.
18785 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
18787 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
18790 (TUPLE_ENTRY): Undef.
18792 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18794 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
18795 (shuffle_generic_patterns): Ditto.
18796 (expand_vec_perm_const_1): Ditto.
18798 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18800 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
18801 (shuffle_decompress_patterns): Ditto.
18803 2023-06-13 Richard Biener <rguenther@suse.de>
18805 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
18807 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
18808 Kito Cheng <kito.cheng@sifive.com>
18810 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
18811 warning flag if func is not builtin
18812 * config/riscv/riscv.cc
18813 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
18814 (riscv_arg_has_vector): Determine whether the arg is vector type.
18815 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
18816 (riscv_init_cumulative_args): The same as header.
18817 (riscv_get_arg_info): Add the checking.
18818 (riscv_function_value): Check the func return and set warning flag
18819 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
18820 determine whether warning psabi or not.
18822 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18824 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
18825 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
18826 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
18827 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
18829 (arm_output_load_tpidr): Define.
18830 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
18831 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
18833 (reload_tp_hard): Likewise.
18834 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
18836 * doc/invoke.texi (Arm Options, mtp): Document new values.
18838 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18841 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
18842 AARCH64_TPIDRRO_EL0 value.
18843 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
18844 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
18845 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
18846 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
18848 2023-06-13 Alexandre Oliva <oliva@adacore.com>
18850 * range-op-float.cc (frange_nextafter): Drop inline.
18851 (frelop_early_resolve): Add static.
18852 (frange_float): Likewise.
18854 2023-06-13 Richard Biener <rguenther@suse.de>
18856 PR middle-end/110232
18857 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
18858 to check whether the buffer covers the whole vector.
18860 2023-06-13 Richard Biener <rguenther@suse.de>
18862 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
18863 .MASK_LOAD and friends set the size of the access to unknown.
18865 2023-06-13 Tejas Belagod <tbelagod@arm.com>
18868 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
18869 calls that have a constant input predicate vector.
18870 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
18871 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
18872 (svlast_impl::vect_all_same): Check if all vector elements are equal.
18874 2023-06-13 Andi Kleen <ak@linux.intel.com>
18876 * config/i386/gcc-auto-profile: Regenerate.
18878 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18880 * config/riscv/vector-iterators.md: Fix requirement.
18882 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18884 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
18885 (shuffle_decompress_patterns): New function.
18886 (expand_vec_perm_const_1): Add decompress optimization.
18888 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
18890 PR rtl-optimization/101188
18891 * postreload.cc (reload_cse_move2add_invalidate): New function,
18893 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
18895 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18897 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
18898 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
18899 and if maxv == 1, use constant element for duplicating into register.
18901 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
18903 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
18904 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
18905 (gimplify_adjust_omp_clauses): Change
18906 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
18907 GOMP_MAP_FORCE_PRESENT.
18908 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
18909 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
18910 to/from clauses with present modifier.
18912 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18914 PR tree-optimization/110205
18915 * range-op-float.cc (range_operator::fold_range): Add default FII
18917 * range-op-mixed.h (class operator_gt): Add missing final overrides.
18918 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
18919 (operator_lshift ::update_bitmask): Add final override.
18920 (operator_rshift ::update_bitmask): Add final override.
18921 * range-op.h (range_operator::fold_range): Add FII prototype.
18923 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18925 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
18926 Use range_op_handler directly.
18927 * range-op.cc (range_op_handler::range_op_handler): Unsigned
18928 param instead of tree-code.
18929 (ptr_op_widen_plus_signed): Delete.
18930 (ptr_op_widen_plus_unsigned): Delete.
18931 (ptr_op_widen_mult_signed): Delete.
18932 (ptr_op_widen_mult_unsigned): Delete.
18933 (range_op_table::initialize_integral_ops): Add new opcodes.
18934 * range-op.h (range_op_handler): Use unsigned.
18935 (OP_WIDEN_MULT_SIGNED): New.
18936 (OP_WIDEN_MULT_UNSIGNED): New.
18937 (OP_WIDEN_PLUS_SIGNED): New.
18938 (OP_WIDEN_PLUS_UNSIGNED): New.
18939 (RANGE_OP_TABLE_SIZE): New.
18940 (range_op_table::operator []): Use unsigned.
18941 (range_op_table::set): Use unsigned.
18942 (m_range_tree): Make unsigned.
18943 (ptr_op_widen_mult_signed): Remove.
18944 (ptr_op_widen_mult_unsigned): Remove.
18945 (ptr_op_widen_plus_signed): Remove.
18946 (ptr_op_widen_plus_unsigned): Remove.
18948 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18950 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
18951 manually as there is no access to the default operator.
18952 (cfn_copysign::fold_range): Don't check for validity.
18953 (cfn_ubsan::fold_range): Ditto.
18954 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
18955 * range-op.cc (default_operator): New.
18956 (range_op_handler::range_op_handler): Use default_operator
18958 (range_op_handler::operator bool): Move from header, compare
18959 against default operator.
18960 (range_op_handler::range_op): New.
18961 * range-op.h (range_op_handler::operator bool): Move.
18963 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18965 * range-op.cc (unified_table): Delete.
18966 (range_op_table operator_table): Instantiate.
18967 (range_op_table::range_op_table): Rename from unified_table.
18968 (range_op_handler::range_op_handler): Use range_op_table.
18969 * range-op.h (range_op_table::operator []): Inline.
18970 (range_op_table::set): Inline.
18972 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18974 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
18976 * gimple-range-op.cc (get_code): Rename from get_code_and_type
18978 (gimple_range_op_handler::supported_p): No need for type.
18979 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
18980 (cfn_copysign::fold_range): Ditto.
18981 (cfn_ubsan::fold_range): Ditto.
18982 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
18983 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
18984 * range-op-float.cc (operator_plus::op1_range): Ditto.
18985 (operator_mult::op1_range): Ditto.
18986 (range_op_float_tests): Ditto.
18987 * range-op.cc (get_op_handler): Remove.
18988 (range_op_handler::set_op_handler): Remove.
18989 (operator_plus::op1_range): No need for type.
18990 (operator_minus::op1_range): Ditto.
18991 (operator_mult::op1_range): Ditto.
18992 (operator_exact_divide::op1_range): Ditto.
18993 (operator_cast::op1_range): Ditto.
18994 (perator_bitwise_not::fold_range): Ditto.
18995 (operator_negate::fold_range): Ditto.
18996 * range-op.h (range_op_handler::range_op_handler): Remove type param.
18997 (range_cast): No need for type.
18998 (range_op_table::operator[]): Check for enum_code >= 0.
18999 * tree-data-ref.cc (compute_distributive_range): No need for type.
19000 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
19001 * value-query.cc (range_query::get_tree_range): Ditto.
19002 * value-relation.cc (relation_oracle::validate_relation): Ditto.
19003 * vr-values.cc (range_of_var_in_loop): Ditto.
19004 (simplify_using_ranges::fold_cond_with_ops): Ditto.
19006 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19008 * range-op-mixed.h (operator_max): Remove final.
19009 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
19010 (pointer_table::pointer_table): Remove.
19011 (class hybrid_max_operator): New.
19012 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
19013 * range-op.cc (pointer_tree_table): Remove.
19014 (unified_table::unified_table): Comment out MAX_EXPR.
19015 (get_op_handler): Remove check of pointer table.
19016 * range-op.h (class pointer_table): Remove.
19018 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19020 * range-op-mixed.h (operator_min): Remove final.
19021 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
19022 (class hybrid_min_operator): New.
19023 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
19024 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
19026 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19028 * range-op-mixed.h (operator_bitwise_or): Remove final.
19029 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
19030 (class hybrid_or_operator): New.
19031 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
19032 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
19034 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19036 * range-op-mixed.h (operator_bitwise_and): Remove final.
19037 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
19038 (class hybrid_and_operator): New.
19039 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
19040 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
19042 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19044 * Makefile.in (OBJS): Add range-op-ptr.o.
19045 * range-op-mixed.h (update_known_bitmask): Move prototype here.
19046 (minus_op1_op2_relation_effect): Move prototype here.
19047 (wi_includes_zero_p): Move function to here.
19048 (wi_zero_p): Ditto.
19049 * range-op.cc (update_known_bitmask): Remove static.
19050 (wi_includes_zero_p): Move to header.
19051 (wi_zero_p): Move to header.
19052 (minus_op1_op2_relation_effect): Remove static.
19053 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
19054 (pointer_plus_operator): Ditto.
19055 (pointer_min_max_operator): Ditto.
19056 (pointer_and_operator): Ditto.
19057 (pointer_or_operator): Ditto.
19058 (pointer_table): Ditto.
19059 (range_op_table::initialize_pointer_ops): Ditto.
19060 * range-op-ptr.cc: New.
19062 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19064 * range-op-mixed.h (class operator_max): Move from...
19065 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
19066 (get_op_handler): Remove the integral table.
19067 (class operator_max): Move from here.
19068 (integral_table::integral_table): Delete.
19069 * range-op.h (class integral_table): Delete.
19071 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19073 * range-op-mixed.h (class operator_min): Move from...
19074 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
19075 (class operator_min): Move from here.
19076 (integral_table::integral_table): Remove MIN_EXPR.
19078 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19080 * range-op-mixed.h (class operator_bitwise_or): Move from...
19081 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
19082 (class operator_bitwise_or): Move from here.
19083 (integral_table::integral_table): Remove BIT_IOR_EXPR.
19085 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19087 * range-op-mixed.h (class operator_bitwise_and): Move from...
19088 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
19089 (get_op_handler): Check for a pointer table entry first.
19090 (class operator_bitwise_and): Move from here.
19091 (integral_table::integral_table): Remove BIT_AND_EXPR.
19093 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19095 * range-op-mixed.h (class operator_bitwise_xor): Move from...
19096 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
19097 (class operator_bitwise_xor): Move from here.
19098 (integral_table::integral_table): Remove BIT_XOR_EXPR.
19099 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
19101 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19103 * range-op-mixed.h (class operator_bitwise_not): Move from...
19104 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
19105 (class operator_bitwise_not): Move from here.
19106 (integral_table::integral_table): Remove BIT_NOT_EXPR.
19107 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
19109 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
19111 * range-op-mixed.h (class operator_addr_expr): Move from...
19112 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
19113 (class operator_addr_expr): Move from here.
19114 (integral_table::integral_table): Remove ADDR_EXPR.
19115 (pointer_table::pointer_table): Remove ADDR_EXPR.
19117 2023-06-12 Pan Li <pan2.li@intel.com>
19119 * config/riscv/riscv-vector-builtins-types.def
19120 (vfloat16m1_t): Add type to lmul1 ops.
19121 (vfloat16m2_t): Likewise.
19122 (vfloat16m4_t): Likewise.
19124 2023-06-12 Richard Biener <rguenther@suse.de>
19126 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
19127 .MASK_STORE and friend set the size of the access to
19130 2023-06-12 Tamar Christina <tamar.christina@arm.com>
19132 * config.in: Regenerate.
19133 * configure: Regenerate.
19134 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
19136 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19138 * config/riscv/autovec-opt.md
19139 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
19140 (*<any_shiftrt:optab>trunc<mode>): Ditto.
19141 * config/riscv/autovec.md (<optab><mode>3): Change to
19142 define_insn_and_split.
19143 (v<optab><mode>3): Ditto.
19144 (trunc<mode><v_double_trunc>2): Ditto.
19146 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19148 * simplify-rtx.cc (simplify_const_unary_operation):
19149 Handle US_TRUNCATE, SS_TRUNCATE.
19151 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
19154 * doc/gm2.texi (Standard procedures): Fix Next link.
19156 2023-06-12 Tamar Christina <tamar.christina@arm.com>
19158 * config.in: Regenerate.
19160 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
19162 PR middle-end/110142
19163 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
19164 subtype to vect_widened_op_tree and remove subtype parameter, also
19165 remove superfluous overloaded function definition.
19166 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
19167 to call to vect_recog_widen_op_pattern.
19168 (vect_recog_widen_minus_pattern): Likewise.
19170 2023-06-12 liuhongt <hongtao.liu@intel.com>
19172 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
19173 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
19174 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
19175 (vec_unpacks_lo_<mode>): Ditto.
19176 (vec_unpacks_hi_<mode>): Ditto.
19177 (sse_movlhps_<mode>): New define_insn.
19178 (ssse3_palignr<mode>_perm): Extend to V_128H.
19179 (V_128H): New mode iterator.
19180 (ssepackPHmode): New mode attribute.
19181 (vunpck_extract_mode): Ditto.
19182 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
19183 (vpckfloat_temp_mode): Ditto.
19184 (vpckfloat_op_mode): Ditto.
19185 (vunpckfixt_mode): Extend to VxHF.
19186 (vunpckfixt_model): Ditto.
19187 (vunpckfixt_extract_mode): Ditto.
19189 2023-06-12 Richard Biener <rguenther@suse.de>
19191 PR middle-end/110200
19192 * genmatch.cc (expr::gen_transform): Put braces around
19193 the if arm for the (convert ...) short-cut.
19195 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
19198 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
19199 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
19201 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
19204 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
19205 floating constant itself for real_to_target call.
19207 2023-06-12 Pan Li <pan2.li@intel.com>
19209 * config/riscv/riscv-vector-builtins-types.def
19210 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
19211 (vfloat16mf2_t): Ditto.
19212 (vfloat16m1_t): Ditto.
19213 (vfloat16m2_t): Ditto.
19214 (vfloat16m4_t): Ditto.
19216 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
19218 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
19219 Do not require a stack frame when debugging is enabled for AIX.
19221 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
19223 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
19224 Remove attribute values.
19225 (insv_notbit): New post-reload insn.
19226 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
19227 (*insv.not-bit.0_split, *insv.not-bit.7_split)
19228 (*insv.xor-extract_split): Split to insv_notbit.
19229 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
19230 (*insv.xor-extract): Remove post-reload insns.
19231 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
19232 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
19233 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
19234 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
19236 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
19239 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
19240 (MSB, SIZE): New mode attributes.
19241 (any_shift): New code iterator.
19242 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
19243 (*lshr<mode>3_const_split): Add constraint alternative for
19244 the case of shift-offset = MSB. Ditch "length" attribute.
19245 (extzv<mode): New. replaces extzv. Adjust following patterns.
19246 Use avr_out_extr, avr_out_extr_not to print asm.
19247 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
19248 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
19249 * config/avr/constraints.md (C15, C23, C31, Yil): New
19250 * config/avr/predicates.md (reg_or_low_io_operand)
19251 (const7_operand, reg_or_low_io_operand)
19252 (const15_operand, const_0_to_15_operand)
19253 (const23_operand, const_0_to_23_operand)
19254 (const31_operand, const_0_to_31_operand): New.
19255 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
19256 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
19257 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
19258 MSB case to new insn constraint "r" for operands[1].
19259 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
19260 Handle these cases.
19261 (avr_rtx_costs_1): Adjust cost for a new pattern.
19263 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19265 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
19266 (vector_insn_info::parse_insn): Add rtx_insn parse.
19267 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
19268 (get_first_vsetvl): New function.
19269 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
19270 (pass_vsetvl::cleanup_insns): Remove it.
19271 (pass_vsetvl::ssa_post_optimization): New function.
19272 (has_no_uses): Ditto.
19273 (pass_vsetvl::propagate_avl): Remove it.
19274 (pass_vsetvl::df_post_optimization): New function.
19275 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
19276 * config/riscv/riscv-vsetvl.h: Adapt declaration.
19278 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
19280 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
19281 (ipcp_vr_lattice::print): Call dump method.
19282 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
19284 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
19285 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
19287 (initialize_node_lattices): Pass type when appropriate.
19288 (ipa_vr_operation_and_type_effects): Make type agnostic.
19289 (ipa_value_range_from_jfunc): Same.
19290 (propagate_vr_across_jump_function): Same.
19291 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
19292 (evaluate_properties_for_edge): Same.
19293 * ipa-prop.cc (ipa_vr::get_vrange): Same.
19294 (ipcp_update_vr): Same.
19295 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
19296 (ipa_range_set_and_normalize): Same.
19298 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
19302 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
19303 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
19304 (avr_pass_data_ifelse): New pass_data for it.
19305 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
19306 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
19307 (avr_out_cmp_ext): New functions.
19308 (compare_condtition): Make sure REG_CC dies in the branch insn.
19309 (avr_rtx_costs_1): Add computation of cbranch costs.
19310 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
19311 [ADJUST_LEN_CMP_SEXT]Handle them.
19312 (TARGET_CANONICALIZE_COMPARISON): New define.
19313 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
19314 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
19315 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
19316 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
19317 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
19318 (avr_out_cmp_zext): New Protos
19319 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
19320 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
19321 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
19322 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
19323 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
19324 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
19325 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
19326 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
19327 (adjust_len) [add_set_ZN, cmp_zext]: New.
19328 (QIPSI): New mode iterator.
19329 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
19330 (gelt): New code iterator.
19331 (gelt_eqne): New code attribute.
19332 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
19333 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
19334 (*cmpqi_sign_extend): Remove insns.
19335 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
19336 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
19337 * config/avr/predicates.md (scratch_or_d_register_operand): New.
19338 * config/avr/constraints.md (Yxx): New constraint.
19340 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19342 * config/riscv/autovec.md (select_vl<mode>): New pattern.
19343 * config/riscv/riscv-protos.h (expand_select_vl): New function.
19344 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
19346 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19348 * range-op-float.cc (foperator_mult_div_base): Delete.
19349 (foperator_mult_div_base::find_range): Make static local function.
19350 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
19351 (operator_mult::op1_range): Rename from foperator_mult.
19352 (operator_mult::op2_range): Ditto.
19353 (operator_mult::rv_fold): Ditto.
19354 (float_table::float_table): Remove MULT_EXPR.
19355 (class foperator_div): Inherit from range_operator.
19356 (float_table::float_table): Delete.
19357 * range-op-mixed.h (class operator_mult): Combined from integer
19359 * range-op.cc (float_tree_table): Delete.
19360 (op_mult): New object.
19361 (unified_table::unified_table): Add MULT_EXPR.
19362 (get_op_handler): Do not check float table any longer.
19363 (class cross_product_operator): Move to range-op-mixed.h.
19364 (class operator_mult): Move to range-op-mixed.h.
19365 (integral_table::integral_table): Remove MULT_EXPR.
19366 (pointer_table::pointer_table): Remove MULT_EXPR.
19367 * range-op.h (float_table): Remove.
19369 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19371 * range-op-float.cc (foperator_negate): Remove. Move prototypes
19372 to range-op-mixed.h
19373 (operator_negate::fold_range): Rename from foperator_negate.
19374 (operator_negate::op1_range): Ditto.
19375 (float_table::float_table): Remove NEGATE_EXPR.
19376 * range-op-mixed.h (class operator_negate): Combined from integer
19378 * range-op.cc (op_negate): New object.
19379 (unified_table::unified_table): Add NEGATE_EXPR.
19380 (class operator_negate): Move to range-op-mixed.h.
19381 (integral_table::integral_table): Remove NEGATE_EXPR.
19382 (pointer_table::pointer_table): Remove NEGATE_EXPR.
19384 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19386 * range-op-float.cc (foperator_minus): Remove. Move prototypes
19387 to range-op-mixed.h
19388 (operator_minus::fold_range): Rename from foperator_minus.
19389 (operator_minus::op1_range): Ditto.
19390 (operator_minus::op2_range): Ditto.
19391 (operator_minus::rv_fold): Ditto.
19392 (float_table::float_table): Remove MINUS_EXPR.
19393 * range-op-mixed.h (class operator_minus): Combined from integer
19395 * range-op.cc (op_minus): New object.
19396 (unified_table::unified_table): Add MINUS_EXPR.
19397 (class operator_minus): Move to range-op-mixed.h.
19398 (integral_table::integral_table): Remove MINUS_EXPR.
19399 (pointer_table::pointer_table): Remove MINUS_EXPR.
19401 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19403 * range-op-float.cc (foperator_abs): Remove. Move prototypes
19404 to range-op-mixed.h
19405 (operator_abs::fold_range): Rename from foperator_abs.
19406 (operator_abs::op1_range): Ditto.
19407 (float_table::float_table): Remove ABS_EXPR.
19408 * range-op-mixed.h (class operator_abs): Combined from integer
19410 * range-op.cc (op_abs): New object.
19411 (unified_table::unified_table): Add ABS_EXPR.
19412 (class operator_abs): Move to range-op-mixed.h.
19413 (integral_table::integral_table): Remove ABS_EXPR.
19414 (pointer_table::pointer_table): Remove ABS_EXPR.
19416 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19418 * range-op-float.cc (foperator_plus): Remove. Move prototypes
19419 to range-op-mixed.h
19420 (operator_plus::fold_range): Rename from foperator_plus.
19421 (operator_plus::op1_range): Ditto.
19422 (operator_plus::op2_range): Ditto.
19423 (operator_plus::rv_fold): Ditto.
19424 (float_table::float_table): Remove PLUS_EXPR.
19425 * range-op-mixed.h (class operator_plus): Combined from integer
19427 * range-op.cc (op_plus): New object.
19428 (unified_table::unified_table): Add PLUS_EXPR.
19429 (class operator_plus): Move to range-op-mixed.h.
19430 (integral_table::integral_table): Remove PLUS_EXPR.
19431 (pointer_table::pointer_table): Remove PLUS_EXPR.
19433 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19435 * range-op-mixed.h (class operator_cast): Combined from integer
19437 * range-op.cc (op_cast): New object.
19438 (unified_table::unified_table): Add op_cast
19439 (class operator_cast): Move to range-op-mixed.h.
19440 (integral_table::integral_table): Remove op_cast
19441 (pointer_table::pointer_table): Remove op_cast.
19443 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19445 * range-op-float.cc (operator_cst::fold_range): New.
19446 * range-op-mixed.h (class operator_cst): Move from integer file.
19447 * range-op.cc (op_cst): New object.
19448 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
19449 (class operator_cst): Move to range-op-mixed.h.
19450 (integral_table::integral_table): Remove op_cst.
19451 (pointer_table::pointer_table): Remove op_cst.
19453 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19455 * range-op-float.cc (foperator_identity): Remove. Move prototypes
19456 to range-op-mixed.h
19457 (operator_identity::fold_range): Rename from foperator_identity.
19458 (operator_identity::op1_range): Ditto.
19459 (float_table::float_table): Remove fop_identity.
19460 * range-op-mixed.h (class operator_identity): Combined from integer
19462 * range-op.cc (op_identity): New object.
19463 (unified_table::unified_table): Add op_identity.
19464 (class operator_identity): Move to range-op-mixed.h.
19465 (integral_table::integral_table): Remove identity.
19466 (pointer_table::pointer_table): Remove identity.
19468 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19470 * range-op-float.cc (foperator_ge): Remove. Move prototypes
19471 to range-op-mixed.h
19472 (operator_ge::fold_range): Rename from foperator_ge.
19473 (operator_ge::op1_range): Ditto.
19474 (float_table::float_table): Remove GE_EXPR.
19475 * range-op-mixed.h (class operator_ge): Combined from integer
19477 * range-op.cc (op_ge): New object.
19478 (unified_table::unified_table): Add GE_EXPR.
19479 (class operator_ge): Move to range-op-mixed.h.
19480 (ge_op1_op2_relation): Fold into
19481 operator_ge::op1_op2_relation.
19482 (integral_table::integral_table): Remove GE_EXPR.
19483 (pointer_table::pointer_table): Remove GE_EXPR.
19484 * range-op.h (ge_op1_op2_relation): Delete.
19486 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19488 * range-op-float.cc (foperator_gt): Remove. Move prototypes
19489 to range-op-mixed.h
19490 (operator_gt::fold_range): Rename from foperator_gt.
19491 (operator_gt::op1_range): Ditto.
19492 (float_table::float_table): Remove GT_EXPR.
19493 * range-op-mixed.h (class operator_gt): Combined from integer
19495 * range-op.cc (op_gt): New object.
19496 (unified_table::unified_table): Add GT_EXPR.
19497 (class operator_gt): Move to range-op-mixed.h.
19498 (gt_op1_op2_relation): Fold into
19499 operator_gt::op1_op2_relation.
19500 (integral_table::integral_table): Remove GT_EXPR.
19501 (pointer_table::pointer_table): Remove GT_EXPR.
19502 * range-op.h (gt_op1_op2_relation): Delete.
19504 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19506 * range-op-float.cc (foperator_le): Remove. Move prototypes
19507 to range-op-mixed.h
19508 (operator_le::fold_range): Rename from foperator_le.
19509 (operator_le::op1_range): Ditto.
19510 (float_table::float_table): Remove LE_EXPR.
19511 * range-op-mixed.h (class operator_le): Combined from integer
19513 * range-op.cc (op_le): New object.
19514 (unified_table::unified_table): Add LE_EXPR.
19515 (class operator_le): Move to range-op-mixed.h.
19516 (le_op1_op2_relation): Fold into
19517 operator_le::op1_op2_relation.
19518 (integral_table::integral_table): Remove LE_EXPR.
19519 (pointer_table::pointer_table): Remove LE_EXPR.
19520 * range-op.h (le_op1_op2_relation): Delete.
19522 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19524 * range-op-float.cc (foperator_lt): Remove. Move prototypes
19525 to range-op-mixed.h
19526 (operator_lt::fold_range): Rename from foperator_lt.
19527 (operator_lt::op1_range): Ditto.
19528 (float_table::float_table): Remove LT_EXPR.
19529 * range-op-mixed.h (class operator_lt): Combined from integer
19531 * range-op.cc (op_lt): New object.
19532 (unified_table::unified_table): Add LT_EXPR.
19533 (class operator_lt): Move to range-op-mixed.h.
19534 (lt_op1_op2_relation): Fold into
19535 operator_lt::op1_op2_relation.
19536 (integral_table::integral_table): Remove LT_EXPR.
19537 (pointer_table::pointer_table): Remove LT_EXPR.
19538 * range-op.h (lt_op1_op2_relation): Delete.
19540 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19542 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
19543 to range-op-mixed.h
19544 (operator_equal::fold_range): Rename from foperator_not_equal.
19545 (operator_equal::op1_range): Ditto.
19546 (float_table::float_table): Remove NE_EXPR.
19547 * range-op-mixed.h (class operator_not_equal): Combined from integer
19549 * range-op.cc (op_equal): New object.
19550 (unified_table::unified_table): Add NE_EXPR.
19551 (class operator_not_equal): Move to range-op-mixed.h.
19552 (not_equal_op1_op2_relation): Fold into
19553 operator_not_equal::op1_op2_relation.
19554 (integral_table::integral_table): Remove NE_EXPR.
19555 (pointer_table::pointer_table): Remove NE_EXPR.
19556 * range-op.h (not_equal_op1_op2_relation): Delete.
19558 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19560 * range-op-float.cc (foperator_equal): Remove. Move prototypes
19561 to range-op-mixed.h
19562 (operator_equal::fold_range): Rename from foperator_equal.
19563 (operator_equal::op1_range): Ditto.
19564 (float_table::float_table): Remove EQ_EXPR.
19565 * range-op-mixed.h (class operator_equal): Combined from integer
19567 * range-op.cc (op_equal): New object.
19568 (unified_table::unified_table): Add EQ_EXPR.
19569 (class operator_equal): Move to range-op-mixed.h.
19570 (equal_op1_op2_relation): Fold into
19571 operator_equal::op1_op2_relation.
19572 (integral_table::integral_table): Remove EQ_EXPR.
19573 (pointer_table::pointer_table): Remove EQ_EXPR.
19574 * range-op.h (equal_op1_op2_relation): Delete.
19576 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19578 * range-op-float.cc (class float_table): Move to header.
19579 (float_table::float_table): Move float only operators to...
19580 (range_op_table::initialize_float_ops): Here.
19581 * range-op-mixed.h: New.
19582 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
19584 (float_tree_table): Moved from range-op-float.cc.
19585 (unified_tree_table): New.
19586 (unified_table::unified_table): New. Call initialize routines.
19587 (get_op_handler): Check unified table first.
19588 (range_op_handler::range_op_handler): Handle no type constructor.
19589 (integral_table::integral_table): Move integral only operators to...
19590 (range_op_table::initialize_integral_ops): Here.
19591 (pointer_table::pointer_table): Move pointer only operators to...
19592 (range_op_table::initialize_pointer_ops): Here.
19593 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
19594 (get_bool_state): Ditto.
19595 (empty_range_varying): Ditto.
19596 (relop_early_resolve): Ditto.
19597 (class range_op_table): Add new init methods for range types.
19598 (class integral_table): Move declaration to here.
19599 (class pointer_table): Move declaration to here.
19600 (class float_table): Move declaration to here.
19602 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19603 Richard Sandiford <richard.sandiford@arm.com>
19604 Richard Biener <rguenther@suse.de>
19606 * doc/md.texi: Add SELECT_VL support.
19607 * internal-fn.def (SELECT_VL): Ditto.
19608 * optabs.def (OPTAB_D): Ditto.
19609 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
19610 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
19611 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
19612 (vectorizable_store): Ditto.
19613 (vectorizable_load): Ditto.
19614 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
19616 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
19619 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
19622 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
19624 * range-op.cc (range_cast): Move to...
19625 * range-op.h (range_cast): Here and add generic a version.
19627 2023-06-09 Marek Polacek <polacek@redhat.com>
19631 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
19632 warn about designated initializers in C only.
19634 2023-06-09 Andrew Pinski <apinski@marvell.com>
19636 PR tree-optimization/97711
19637 PR tree-optimization/110155
19638 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
19639 ((zero_one != 0) ? z <op> y : y): Likewise.
19641 2023-06-09 Andrew Pinski <apinski@marvell.com>
19643 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
19644 multiply rather than negation/bit_and.
19646 2023-06-09 Andrew Pinski <apinski@marvell.com>
19648 * match.pd (`X & -Y -> X * Y`): Allow for truncation
19649 and the same type for unsigned types.
19651 2023-06-09 Andrew Pinski <apinski@marvell.com>
19653 PR tree-optimization/110165
19654 PR tree-optimization/110166
19655 * match.pd (zero_one_valued_p): Don't accept
19656 signed 1-bit integers.
19658 2023-06-09 Richard Biener <rguenther@suse.de>
19660 * match.pd (two conversions in a row): Use element_precision
19661 to DTRT for VECTOR_TYPE.
19663 2023-06-09 Pan Li <pan2.li@intel.com>
19665 * config/riscv/riscv.md (enabled): Move to another place, and
19666 add fp_vector_disabled to the cond.
19667 (fp_vector_disabled): New attr defined for disabling fp.
19668 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
19670 2023-06-09 Pan Li <pan2.li@intel.com>
19672 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
19675 2023-06-09 liuhongt <hongtao.liu@intel.com>
19678 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
19679 view_convert_expr mask to signed type when folding pblendvb
19682 2023-06-09 liuhongt <hongtao.liu@intel.com>
19685 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
19686 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
19687 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
19689 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
19690 real codename for __builtin_ia32_pabs{b,w,d}.
19692 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19694 * gimple-range-op.cc
19695 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
19696 (gimple_range_op_handler::maybe_builtin_call): Adjust.
19697 * gimple-range-op.h (operand1, operand2): Use m_operator.
19698 * range-op.cc (integral_table, pointer_table): Relocate.
19699 (get_op_handler): Rename from get_handler and handle all types.
19700 (range_op_handler::range_op_handler): Relocate.
19701 (range_op_handler::set_op_handler): Relocate and adjust.
19702 (range_op_handler::range_op_handler): Relocate.
19703 (dispatch_trio): New.
19704 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
19705 (range_op_handler::dispatch_kind): New.
19706 (range_op_handler::fold_range): Relocate and Use new dispatch value.
19707 (range_op_handler::op1_range): Ditto.
19708 (range_op_handler::op2_range): Ditto.
19709 (range_op_handler::lhs_op1_relation): Ditto.
19710 (range_op_handler::lhs_op2_relation): Ditto.
19711 (range_op_handler::op1_op2_relation): Ditto.
19712 (range_op_handler::set_op_handler): Use m_operator member.
19713 * range-op.h (range_op_handler::operator bool): Use m_operator.
19714 (range_op_handler::dispatch_kind): New.
19715 (range_op_handler::m_valid): Delete.
19716 (range_op_handler::m_int): Delete
19717 (range_op_handler::m_float): Delete
19718 (range_op_handler::m_operator): New.
19719 (range_op_table::operator[]): Relocate from .cc file.
19720 (range_op_table::set): Ditto.
19721 * value-range.h (class vrange): Make range_op_handler a friend.
19723 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19725 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
19726 (cfn_pass_through_arg1): Adjust using statemenmt.
19727 (cfn_signbit): Change base class, adjust using statement.
19728 (cfn_copysign): Ditto.
19730 (cfn_sincos): Ditto.
19731 * range-op-float.cc (fold_range): Change class to range_operator.
19735 (lhs_op1_relation): Ditto.
19736 (lhs_op2_relation): Ditto.
19737 (op1_op2_relation): Ditto.
19738 (foperator_*): Ditto.
19739 (class float_table): New. Inherit from range_op_table.
19740 (floating_tree_table) Change to range_op_table pointer.
19741 (class floating_op_table): Delete.
19742 * range-op.cc (operator_equal): Adjust using statement.
19743 (operator_not_equal): Ditto.
19744 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
19745 (operator_minus, operator_cast): Ditto.
19746 (operator_bitwise_and, pointer_plus_operator): Ditto.
19747 (get_float_handle): Change return type.
19748 * range-op.h (range_operator_float): Delete. Relocate all methods
19749 into class range_operator.
19750 (range_op_handler::m_float): Change type to range_operator.
19751 (floating_op_table): Delete.
19752 (floating_tree_table): Change type.
19754 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19756 * range-op.cc (range_operator::fold_range): Call virtual routine.
19757 (range_operator::update_bitmask): New.
19758 (operator_equal::update_bitmask): New.
19759 (operator_not_equal::update_bitmask): New.
19760 (operator_lt::update_bitmask): New.
19761 (operator_le::update_bitmask): New.
19762 (operator_gt::update_bitmask): New.
19763 (operator_ge::update_bitmask): New.
19764 (operator_ge::update_bitmask): New.
19765 (operator_plus::update_bitmask): New.
19766 (operator_minus::update_bitmask): New.
19767 (operator_pointer_diff::update_bitmask): New.
19768 (operator_min::update_bitmask): New.
19769 (operator_max::update_bitmask): New.
19770 (operator_mult::update_bitmask): New.
19771 (operator_div:operator_div):New.
19772 (operator_div::update_bitmask): New.
19773 (operator_div::m_code): New member.
19774 (operator_exact_divide::operator_exact_divide): New constructor.
19775 (operator_lshift::update_bitmask): New.
19776 (operator_rshift::update_bitmask): New.
19777 (operator_bitwise_and::update_bitmask): New.
19778 (operator_bitwise_or::update_bitmask): New.
19779 (operator_bitwise_xor::update_bitmask): New.
19780 (operator_trunc_mod::update_bitmask): New.
19781 (op_ident, op_unknown, op_ptr_min_max): New.
19782 (op_nop, op_convert): Delete.
19783 (op_ssa, op_paren, op_obj_type): Delete.
19784 (op_realpart, op_imagpart): Delete.
19785 (op_ptr_min, op_ptr_max): Delete.
19786 (pointer_plus_operator:update_bitmask): New.
19787 (range_op_table::set): Do not use m_code.
19788 (integral_table::integral_table): Adjust to single instances.
19789 * range-op.h (range_operator::range_operator): Delete.
19790 (range_operator::m_code): Delete.
19791 (range_operator::update_bitmask): New.
19793 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19795 * range-op-float.cc (range_operator_float::fold_range): Return
19796 NAN of the result type.
19798 2023-06-08 Jakub Jelinek <jakub@redhat.com>
19800 * optabs.cc (expand_ffs): Add forward declaration.
19801 (expand_doubleword_clz): Rename to ...
19802 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
19803 handle also doubleword CTZ and FFS in addition to CLZ.
19804 (expand_unop): Adjust caller. Also call it for doubleword
19805 ctz_optab and ffs_optab.
19807 2023-06-08 Jakub Jelinek <jakub@redhat.com>
19810 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
19811 n_words == 2 recurse with mmx_ok as first argument rather than false.
19813 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
19815 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
19816 avoid sign extension/undefined behaviour when setting each bit.
19818 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
19819 Uros Bizjak <ubizjak@gmail.com>
19821 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
19822 Use new x86_stc instruction when the carry flag must be set.
19823 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
19824 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
19825 * config/i386/i386.h (TARGET_SLOW_STC): New define.
19826 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
19827 (x86_stc): New define_insn.
19828 (define_peephole2): Convert x86_stc into alternate implementation
19829 on pentium4 without -Os when a QImode register is available.
19830 (*x86_cmc): New define_insn.
19831 (define_peephole2): Convert *x86_cmc into alternate implementation
19832 on pentium4 without -Os when a QImode register is available.
19833 (*setccc): New define_insn_and_split for a no-op CCCmode move.
19834 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
19835 recognize (and eliminate) the carry flag being copied to itself.
19836 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
19837 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
19839 2023-06-07 Andrew Pinski <apinski@marvell.com>
19841 * match.pd: Fix comment for the
19842 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
19844 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
19845 Jeff Law <jlaw@ventanamicro.com>
19847 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
19848 (rotrsi3_sext): Expose generator.
19849 (rotlsi3 pattern): Hide generator.
19850 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
19852 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
19853 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
19854 (mulsi3, <optab>si3): Likewise.
19855 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
19856 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
19857 (<u>mulsidi3): Likewise.
19858 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
19859 (mulsi3_extended, <optab>si3_extended): Likewise.
19860 (splitter for shadd feeding divison): Update RTL pattern to account
19861 for changes in how 32 bit ops are expanded for TARGET_64BIT.
19862 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
19864 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
19867 * config/riscv/riscv.cc (riscv_print_operand): Calculate
19868 memmodel only when it is valid.
19870 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
19872 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
19873 for constant element of a vector.
19875 2023-06-07 Jakub Jelinek <jakub@redhat.com>
19877 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
19878 instead compare tree_nonzero_bits <= 1U rather than just == 1.
19880 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19883 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
19885 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
19886 names for builtins.
19887 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
19888 setup if in_lto_p, just like we do for SVE.
19889 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
19890 (__arm_st64b): Delete.
19891 (__arm_st64bv): Delete.
19892 (__arm_st64bv0): Delete.
19894 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19897 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
19898 Use input operand for the destination address.
19899 * config/aarch64/aarch64.md (st64b): Fix constraint on address
19902 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19905 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
19906 Replace eight consecutive spaces with tabs.
19907 (aarch64_init_ls64_builtins): Likewise.
19908 (aarch64_expand_builtin_ls64): Likewise.
19909 * config/aarch64/aarch64.md (ld64b): Likewise.
19912 (st64bv0): Likewise.
19914 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
19916 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
19917 offset table pseudo to a general reg subset.
19919 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19921 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
19923 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
19925 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
19926 (aarch64_sqxtun2<mode>_le): Likewise.
19927 (aarch64_sqxtun2<mode>_be): Likewise.
19928 (aarch64_sqxtun2<mode>): Adjust for the above.
19929 (aarch64_sqmovun<mode>): New define_expand.
19930 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
19931 (half_mask): New mode attribute.
19932 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
19935 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19937 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
19939 (aarch64_addp<mode>_insn): ... This...
19940 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
19941 (aarch64_addp<mode>): New define_expand.
19943 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19945 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
19946 * config/riscv/riscv-v.cc
19947 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
19949 (rvv_builder::single_step_npatterns_p): New function.
19950 (rvv_builder::npatterns_all_equal_p): Ditto.
19951 (const_vec_all_in_range_p): Support POLY handling.
19952 (gen_const_vector_dup): Ditto.
19953 (emit_vlmax_gather_insn): Add vrgatherei16.
19954 (emit_vlmax_masked_gather_mu_insn): Ditto.
19955 (expand_const_vector): Add VLA SLP const vector support.
19956 (expand_vec_perm): Support POLY.
19957 (struct expand_vec_perm_d): New struct.
19958 (shuffle_generic_patterns): New function.
19959 (expand_vec_perm_const_1): Ditto.
19960 (expand_vec_perm_const): Ditto.
19961 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
19962 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
19964 2023-06-07 Andrew Pinski <apinski@marvell.com>
19966 PR middle-end/110117
19967 * expr.cc (expand_single_bit_test): Handle
19968 const_int from expand_expr.
19970 2023-06-07 Andrew Pinski <apinski@marvell.com>
19972 * expr.cc (do_store_flag): Rearrange the
19973 TER code so that it overrides the nonzero bits
19974 info if we had `a & POW2`.
19976 2023-06-07 Andrew Pinski <apinski@marvell.com>
19978 PR tree-optimization/110134
19979 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
19981 (-A CMP CST -> B CMP (-CST)): Likewise.
19983 2023-06-07 Andrew Pinski <apinski@marvell.com>
19985 PR tree-optimization/89263
19986 PR tree-optimization/99069
19987 PR tree-optimization/20083
19988 PR tree-optimization/94898
19989 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
19990 one of the operands are constant.
19992 2023-06-07 Andrew Pinski <apinski@marvell.com>
19994 * match.pd (zero_one_valued_p): Match 0 integer constant
19997 2023-06-07 Pan Li <pan2.li@intel.com>
19999 * config/riscv/riscv-vector-builtins-types.def
20000 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
20001 (vfloat32m1_t): Ditto.
20002 (vfloat32m2_t): Ditto.
20003 (vfloat32m4_t): Ditto.
20004 (vfloat32m8_t): Ditto.
20005 (vint16mf4_t): Ditto.
20006 (vint16mf2_t): Ditto.
20007 (vint16m1_t): Ditto.
20008 (vint16m2_t): Ditto.
20009 (vint16m4_t): Ditto.
20010 (vint16m8_t): Ditto.
20011 (vuint16mf4_t): Ditto.
20012 (vuint16mf2_t): Ditto.
20013 (vuint16m1_t): Ditto.
20014 (vuint16m2_t): Ditto.
20015 (vuint16m4_t): Ditto.
20016 (vuint16m8_t): Ditto.
20017 (vint32mf2_t): Ditto.
20018 (vint32m1_t): Ditto.
20019 (vint32m2_t): Ditto.
20020 (vint32m4_t): Ditto.
20021 (vint32m8_t): Ditto.
20022 (vuint32mf2_t): Ditto.
20023 (vuint32m1_t): Ditto.
20024 (vuint32m2_t): Ditto.
20025 (vuint32m4_t): Ditto.
20026 (vuint32m8_t): Ditto.
20028 2023-06-07 Jason Merrill <jason@redhat.com>
20031 * doc/invoke.texi: Document it.
20033 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
20035 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
20036 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
20037 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
20038 NOT (BITREVERSE x) as BITREVERSE (NOT x).
20039 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
20040 Optimize PARITY (BITREVERSE x) as PARITY x.
20041 Optimize BITREVERSE (BITREVERSE x) as x.
20042 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
20043 BITREVERSE of a constant integer at compile-time.
20044 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
20045 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
20046 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
20047 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
20048 Optimize COPYSIGN (x, ABS y) as ABS x.
20049 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
20050 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
20051 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
20052 arguments at compile-time.
20054 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
20056 * rtl.h (function_invariant_p): Change return type from int to bool.
20057 * reload1.cc (function_invariant_p): Change return type from
20058 int to bool and adjust function body accordingly.
20060 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20062 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
20063 (*single_<optab>mult_plus<mode>): Ditto.
20064 (*double_<optab>mult_plus<mode>): Ditto.
20065 (*sign_zero_extend_fma): Ditto.
20066 (*zero_sign_extend_fma): Ditto.
20067 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20069 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
20070 Tobias Burnus <tobias@codesourcery.com>
20072 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
20073 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
20075 (omp_get_attachment): Handle map clauses with 'present' modifier.
20076 (omp_group_base): Likewise.
20077 (gimplify_scan_omp_clauses): Reorder present maps to come first.
20078 Set GOVD flags for present defaultmaps.
20079 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
20080 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
20082 (lower_omp_target): Handle map clauses with 'present' modifier.
20083 Handle 'to' and 'from' clauses with 'present'.
20084 * tree-core.h (enum omp_clause_defaultmap_kind): Add
20085 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
20086 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
20087 'from' clauses with 'present' modifier. Handle present defaultmap.
20088 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
20090 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
20092 * config/rs6000/genfusion.pl: Delete some dead code.
20094 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
20096 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
20098 (gen_ld_cmpi_p10): ... this.
20100 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
20103 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
20104 duplicate expression.
20106 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20108 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
20109 Handle unsigned reduc_plus_scal_ builtins.
20110 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
20111 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
20112 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
20113 __builtin_aarch64_reduc_plus_scal_v2di.
20114 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
20116 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20118 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
20119 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
20120 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
20122 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20124 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
20125 (aarch64_shrn<mode>_insn_be): Delete.
20126 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
20127 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
20128 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
20129 (aarch64_rshrn<mode>_insn_le): Delete.
20130 (aarch64_rshrn<mode>_insn_be): Delete.
20131 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
20132 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
20134 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20136 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
20138 (aarch64_pars_overlap_p): Likewise.
20139 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
20140 Express in terms of UNSPEC_ADDV.
20141 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
20142 (*aarch64_<su>addlv<mode>_reduction): Define.
20143 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
20144 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
20145 (aarch64_pars_overlap_p): Likewise.
20146 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
20147 (VQUADW): New mode attribute.
20148 (VWIDE2X_S): Likewise.
20150 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
20151 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
20153 2023-06-06 Richard Biener <rguenther@suse.de>
20155 PR middle-end/110055
20156 * gimplify.cc (gimplify_target_expr): Do not emit
20157 CLOBBERs for variables which have static storage duration
20158 after gimplifying their initializers.
20160 2023-06-06 Richard Biener <rguenther@suse.de>
20162 PR tree-optimization/109143
20163 * tree-ssa-structalias.cc (solution_set_expand): Avoid
20164 one bitmap iteration and optimize bit range setting.
20166 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
20168 PR bootstrap/110120
20169 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
20170 XVECEXP, not XEXP, to access first item of a PARALLEL.
20172 2023-06-06 Pan Li <pan2.li@intel.com>
20174 * config/riscv/riscv-vector-builtins-types.def
20175 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
20176 (vfloat16mf2_t): Likewise.
20177 (vfloat16m1_t): Likewise.
20178 (vfloat16m2_t): Likewise.
20179 (vfloat16m4_t): Likewise.
20180 (vfloat16m8_t): Likewise.
20181 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
20182 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
20184 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
20186 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
20187 for cfi reg/mem machmode
20188 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
20190 2023-06-06 Li Xu <xuli1@eswincomputing.com>
20192 * config/riscv/vector-iterators.md:
20193 Fix 'REQUIREMENT' for machine_mode 'MODE'.
20194 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
20195 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
20196 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
20198 2023-06-06 Pan Li <pan2.li@intel.com>
20200 * config/riscv/vector-iterators.md: Fix typo in mode attr.
20202 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
20203 Joel Hutton <joel.hutton@arm.com>
20205 * doc/generic.texi: Remove old tree codes.
20206 * expr.cc (expand_expr_real_2): Remove old tree code cases.
20207 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
20208 * optabs-tree.cc (optab_for_tree_code): Likewise.
20209 (supportable_half_widening_operation): Likewise.
20210 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
20211 * tree-inline.cc (estimate_operator_cost): Likewise.
20212 (op_symbol_code): Likewise.
20213 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
20214 (vect_analyze_data_ref_accesses): Likewise.
20215 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
20216 * cfgexpand.cc (expand_debug_expr): Likewise.
20217 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
20218 (supportable_widening_operation): Likewise.
20219 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
20221 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
20222 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
20223 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
20224 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
20225 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
20226 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
20227 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
20228 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
20230 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
20231 Joel Hutton <joel.hutton@arm.com>
20232 Tamar Christina <tamar.christina@arm.com>
20234 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
20236 (vec_widen_<su>add_lo_<mode>): ... to this.
20237 (vec_widen_<su>addl_hi_<mode>): Rename this ...
20238 (vec_widen_<su>add_hi_<mode>): ... to this.
20239 (vec_widen_<su>subl_lo_<mode>): Rename this ...
20240 (vec_widen_<su>sub_lo_<mode>): ... to this.
20241 (vec_widen_<su>subl_hi_<mode>): Rename this ...
20242 (vec_widen_<su>sub_hi_<mode>): ...to this.
20243 * doc/generic.texi: Document new IFN codes.
20244 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
20245 (commutative_binary_fn_p): Add widen_plus fn's.
20246 (widening_fn_p): New function.
20247 (narrowing_fn_p): New function.
20248 (direct_internal_fn_optab): Change visibility.
20249 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
20250 internal_fn that expands into multiple internal_fns for widening.
20251 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
20252 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
20253 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
20254 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
20255 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
20256 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
20257 (lookup_hilo_internal_fn): Likewise.
20258 (widening_fn_p): Likewise.
20259 (Narrowing_fn_p): Likewise.
20260 * optabs.cc (commutative_optab_p): Add widening plus optabs.
20261 * optabs.def (OPTAB_D): Define widen add, sub optabs.
20262 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
20263 patterns with a hi/lo or even/odd split.
20264 (vect_recog_sad_pattern): Refactor to use new IFN codes.
20265 (vect_recog_widen_plus_pattern): Likewise.
20266 (vect_recog_widen_minus_pattern): Likewise.
20267 (vect_recog_average_pattern): Likewise.
20268 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
20270 (supportable_widening_operation): Likewise.
20271 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
20273 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
20274 Joel Hutton <joel.hutton@arm.com>
20276 * tree-vect-patterns.cc: Add include for gimple-iterator.
20277 (vect_recog_widen_op_pattern): Refactor to use code_helper.
20278 (vect_gimple_build): New function.
20279 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
20281 (vectorizable_call): Likewise.
20282 (vect_gen_widened_results_half): Likewise.
20283 (vect_create_vectorized_demotion_stmts): Likewise.
20284 (vect_create_vectorized_promotion_stmts): Likewise.
20285 (vect_create_half_widening_stmts): Likewise.
20286 (vectorizable_conversion): Likewise.
20287 (supportable_widening_operation): Likewise.
20288 (supportable_narrowing_operation): Likewise.
20289 * tree-vectorizer.h (supportable_widening_operation): Change
20290 prototype to use code_helper.
20291 (supportable_narrowing_operation): Likewise.
20292 (vect_gimple_build): New function prototype.
20293 * tree.h (code_helper::safe_as_tree_code): New function.
20294 (code_helper::safe_as_fn_code): New function.
20296 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
20298 * wide-int.cc (wi::bitreverse_large): New function implementing
20299 bit reversal of an integer.
20300 * wide-int.h (wi::bitreverse): New (template) function prototype.
20301 (bitreverse_large): Prototype helper function/implementation.
20302 (wi::bitreverse): New template wrapper around bitreverse_large.
20304 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
20306 * rtl.h (print_rtl_single): Change return type from int to void.
20307 (print_rtl_single_with_indent): Ditto.
20308 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
20309 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
20310 (rtx_writer::print_rtx_operand_code_0): Ditto.
20311 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
20312 (rtx_writer::print_rtx_operand_code_i): Ditto.
20313 (rtx_writer::print_rtx_operand_code_u): Ditto.
20314 (rtx_writer::print_rtx_operand): Ditto.
20315 (rtx_writer::print_rtx): Ditto.
20316 (rtx_writer::finish_directive): Ditto.
20317 (print_rtl_single): Change return type from int to void
20318 and adjust function body accordingly.
20319 (rtx_writer::print_rtl_single_with_indent): Ditto.
20321 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
20323 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
20324 (reg_class_subset_p): Ditto.
20325 * reginfo.cc (reg_classes_intersect_p): Ditto.
20326 (reg_class_subset_p): Ditto.
20328 2023-06-05 Pan Li <pan2.li@intel.com>
20330 * config/riscv/riscv-vector-builtins-types.def
20331 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
20332 (vfloat32m1_t): Ditto.
20333 (vfloat32m2_t): Ditto.
20334 (vfloat32m4_t): Ditto.
20335 (vfloat32m8_t): Ditto.
20336 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
20337 (vint16mf2_t): Ditto.
20338 (vint16m1_t): Ditto.
20339 (vint16m2_t): Ditto.
20340 (vint16m4_t): Ditto.
20341 (vint16m8_t): Ditto.
20342 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
20343 (vuint16mf2_t): Ditto.
20344 (vuint16m1_t): Ditto.
20345 (vuint16m2_t): Ditto.
20346 (vuint16m4_t): Ditto.
20347 (vuint16m8_t): Ditto.
20348 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
20349 (vint32m1_t): Ditto.
20350 (vint32m2_t): Ditto.
20351 (vint32m4_t): Ditto.
20352 (vint32m8_t): Ditto.
20353 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
20354 (vuint32m1_t): Ditto.
20355 (vuint32m2_t): Ditto.
20356 (vuint32m4_t): Ditto.
20357 (vuint32m8_t): Ditto.
20358 * config/riscv/vector-iterators.md: Add FP=16 support for V,
20359 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
20361 2023-06-05 Andrew Pinski <apinski@marvell.com>
20363 PR bootstrap/110085
20364 * Makefile.in (clean): Remove the removing of
20365 MULTILIB_DIR/MULTILIB_OPTIONS directories.
20367 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
20369 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
20371 * config/mips/mips.cc (speculation_barrier_libfunc): New static
20373 (mips_init_libfuncs): Initialize it.
20374 (mips_emit_speculation_barrier): New function.
20375 * config/mips/mips.md (speculation_barrier): Call
20376 mips_emit_speculation_barrier.
20378 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20380 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
20381 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
20382 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
20383 (rvv_builder::get_merged_repeating_sequence): Ditto.
20384 (rvv_builder::get_merge_scalar_mask): Ditto.
20385 (emit_scalar_move_insn): Ditto.
20386 (emit_vlmax_integer_move_insn): Ditto.
20387 (emit_nonvlmax_integer_move_insn): Ditto.
20388 (emit_vlmax_gather_insn): Ditto.
20389 (emit_vlmax_masked_gather_mu_insn): Ditto.
20390 (get_repeating_sequence_dup_machine_mode): Ditto.
20392 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20394 * config/riscv/autovec.md: Split arguments.
20395 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
20396 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
20398 2023-06-04 Andrew Pinski <apinski@marvell.com>
20400 * expr.cc (do_store_flag): Improve for single bit testing
20401 not against zero but against that single bit.
20403 2023-06-04 Andrew Pinski <apinski@marvell.com>
20405 * expr.cc (do_store_flag): Extend the one bit checking case
20406 to handle the case where we don't have an and but rather still
20407 one bit is known to be non-zero.
20409 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
20411 * config/h8300/constraints.md (Zz): Make this a normal
20413 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
20414 * config/h8300/logical.md (H8/SX bit patterns): Remove.
20416 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20418 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
20419 New insn_and_split patterns.
20421 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20424 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
20425 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
20426 (@vlmul_extx4<mode>): Ditto.
20427 (@vlmul_extx8<mode>): Ditto.
20428 (@vlmul_extx16<mode>): Ditto.
20429 (@vlmul_extx32<mode>): Ditto.
20430 (@vlmul_extx64<mode>): Ditto.
20431 (*vlmul_extx2<mode>): Ditto.
20432 (*vlmul_extx4<mode>): Ditto.
20433 (*vlmul_extx8<mode>): Ditto.
20434 (*vlmul_extx16<mode>): Ditto.
20435 (*vlmul_extx32<mode>): Ditto.
20436 (*vlmul_extx64<mode>): Ditto.
20438 2023-06-04 Pan Li <pan2.li@intel.com>
20440 * config/riscv/riscv-vector-builtins-types.def
20441 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
20442 (vfloat32m1_t): Likewise.
20443 (vfloat32m2_t): Likewise.
20444 (vfloat32m4_t): Likewise.
20445 (vfloat32m8_t): Likewise.
20446 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
20447 * config/riscv/vector-iterators.md: Add single to half machine
20450 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20452 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
20453 (*n<optab><mode>): Ditto.
20454 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
20455 (*n<optab><mode>): Ditto.
20456 * config/riscv/vector.md: Ditto.
20458 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
20461 * config/i386/i386-features.cc (scalar_chain::convert_compare):
20462 Update or delete REG_EQUAL notes, converting CONST_INT and
20463 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
20465 2023-06-04 Jason Merrill <jason@redhat.com>
20468 * tree-eh.cc (lower_resx): Pass the exception pointer to the
20470 * except.h: Tweak comment.
20472 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
20474 * postreload.cc (move2add_use_add2_insn): Handle
20475 trivial single_sets. Rename variable PAT to SET.
20476 (move2add_use_add3_insn, reload_cse_move2add): Similar.
20478 2023-06-04 Pan Li <pan2.li@intel.com>
20480 * config/riscv/riscv-vector-builtins-types.def
20481 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
20482 (vfloat16mf2_t): Likewise.
20483 (vfloat16m1_t): Likewise.
20484 (vfloat16m2_t): Likewise.
20485 (vfloat16m4_t): Likewise.
20486 (vfloat16m8_t): Likewise.
20487 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
20488 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
20489 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
20490 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
20493 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
20495 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
20498 2023-06-03 Die Li <lidie@eswincomputing.com>
20500 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
20502 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20504 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
20506 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20508 * config/riscv/vector.md: Add vector-opt.md.
20509 * config/riscv/autovec-opt.md: New file.
20511 2023-06-03 liuhongt <hongtao.liu@intel.com>
20513 PR tree-optimization/110067
20514 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
20515 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
20517 2023-06-03 liuhongt <hongtao.liu@intel.com>
20520 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
20521 (truncv2si<mode>2): Ditto.
20523 2023-06-02 Andrew Pinski <apinski@marvell.com>
20525 PR rtl-optimization/102733
20526 * dse.cc (store_info): Add addrspace field.
20527 (record_store): Record the address space
20528 and check to make sure they are the same.
20530 2023-06-02 Andrew Pinski <apinski@marvell.com>
20532 PR rtl-optimization/110042
20533 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
20534 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
20536 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
20539 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
20540 Make sure that we do not have a cap on field alignment before altering
20541 the struct layout based on the type alignment of the first entry.
20543 2023-06-02 David Faust <david.faust@oracle.com>
20546 * btfout.cc (btf_absolute_func_id): New function.
20547 (btf_asm_func_type): Call it here. Change index parameter from
20548 size_t to ctf_id_t. Use PRIu64 formatter.
20550 2023-06-02 Alex Coplan <alex.coplan@arm.com>
20552 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
20553 (btf_asm_datasec_type): Likewise.
20555 2023-06-02 Carl Love <cel@us.ibm.com>
20557 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
20558 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
20560 2023-06-02 Jason Merrill <jason@redhat.com>
20564 * tree.h (DECL_MERGEABLE): New.
20565 * tree-core.h (struct tree_decl_common): Mention it.
20566 * gimplify.cc (gimplify_init_constructor): Check it.
20567 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
20568 * varasm.cc (categorize_decl_for_section): Likewise.
20570 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
20572 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
20573 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
20574 (stack_regs_mentioned_p): Change return type from int to bool
20575 and adjust function body accordingly.
20576 (stack_regs_mentioned): Ditto.
20577 (check_asm_stack_operands): Ditto. Change "malformed_asm"
20579 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
20580 (swap_rtx_condition_1): Change return type from int to bool
20581 and adjust function body accordingly. Change "r" variable to bool.
20582 (swap_rtx_condition): Change return type from int to bool
20583 and adjust function body accordingly.
20584 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
20585 (subst_stack_regs): Ditto.
20586 (convert_regs_entry): Change return type from int to bool and adjust
20587 function body accordingly. Change "inserted" variable to bool.
20588 (convert_regs_1): Recode handling of control_flow_insn_deleted.
20589 (convert_regs_2): Recode handling of cfg_altered.
20590 (convert_regs): Ditto. Change "inserted" variable to bool.
20592 2023-06-02 Jason Merrill <jason@redhat.com>
20595 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
20596 (initializer_constant_valid_p_1): Compare float precision.
20598 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
20600 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
20603 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20605 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
20606 (vect_set_loop_condition_partial_vectors): Ditto.
20608 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
20611 * config/avr/avr.md: Add an RTL peephole to optimize operations on
20612 non-LD_REGS after a move from LD_REGS.
20613 (piaop): New code iterator.
20615 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
20618 * doc/install.texi: Document (optional) Perl usage for parallel
20619 testing of libgomp.
20621 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
20624 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
20627 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20628 KuanLin Chen <best124612@gmail.com>
20630 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
20631 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
20633 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20635 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
20637 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20639 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
20641 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20643 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
20645 (DEF_RVV_FRM_ENUM): Ditto.
20647 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20649 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
20650 intrinsic API expander
20651 * config/riscv/vector.md
20652 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
20653 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
20654 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
20656 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20658 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
20659 * config/riscv/predicates.md (vector_perm_operand): New predicate.
20660 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20661 (expand_vec_perm): New function.
20662 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
20663 (gen_const_vector_dup): Ditto.
20664 (emit_vlmax_gather_insn): Ditto.
20665 (emit_vlmax_masked_gather_mu_insn): Ditto.
20666 (expand_vec_perm): Ditto.
20668 2023-06-01 Jason Merrill <jason@redhat.com>
20670 * doc/invoke.texi (-Wpedantic): Improve clarity.
20672 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
20674 * rtl.h (exp_equiv_p): Change return type from int to bool.
20675 * cse.cc (mention_regs): Change return type from int to bool
20676 and adjust function body accordingly.
20677 (exp_equiv_p): Ditto.
20678 (insert_regs): Ditto. Change "modified" function argument to bool
20679 and update usage accordingly.
20680 (record_jump_cond): Remove always zero "reversed_nonequality"
20681 function argument and update usage accordingly.
20682 (fold_rtx): Change "changed" variable to bool.
20683 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
20684 (is_dead_reg): Change return type from int to bool.
20686 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20688 * config/xtensa/xtensa.md (adddi3, subdi3):
20689 New RTL generation patterns implemented according to the instruc-
20690 tion idioms described in the Xtensa ISA reference manual (p. 600).
20692 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
20693 Uros Bizjak <ubizjak@gmail.com>
20696 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
20697 CODE_for_sse4_1_ptestzv2di.
20698 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
20699 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
20700 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
20701 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
20702 when expanding UNSPEC_PTEST to compare against zero.
20703 * config/i386/i386-features.cc (scalar_chain::convert_compare):
20704 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
20705 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
20706 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
20707 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
20708 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
20709 check for suitable matching modes for the UNSPEC_PTEST pattern.
20710 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
20711 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
20712 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
20713 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
20714 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
20715 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
20716 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
20718 (*ptest<mode>_and): Specify CCZ to only perform this optimization
20719 when only the Z flag is required.
20721 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
20724 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
20726 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20728 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
20729 Add =r,m and =r,m alternatives.
20730 (load_pair<DREG:mode><DREG2:mode>): Likewise.
20731 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
20733 2023-06-01 Pan Li <pan2.li@intel.com>
20735 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
20737 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
20738 (main): Disable FP16 tuple.
20739 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
20740 (TARGET_VECTOR_ELEN_FP_16): Ditto.
20741 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
20743 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
20744 (vfloat16mf2_t): Ditto.
20745 (vfloat16m1_t): Ditto.
20746 (vfloat16m2_t): Ditto.
20747 (vfloat16m4_t): Ditto.
20748 (vfloat16m8_t): Ditto.
20749 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
20751 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
20752 machine mode based on TARGET_VECTOR_ELEN_FP_16.
20754 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20756 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
20757 (DEF_RVV_FRM_ENUM): New macro.
20758 (handle_pragma_vector): Add FRM enum
20759 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
20766 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
20767 Richard Sandiford <richard.sandiford@arm.com>
20769 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
20770 Update call to wi::bswap.
20771 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
20772 Update call to wi::bswap.
20773 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
20774 Update calls to wi::bswap.
20775 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
20776 (wi::bswap_large): New function, with revised API.
20777 * wide-int.h (wi::bswap): New (template) function prototype.
20778 (wide_int_storage::bswap): Remove method.
20779 (sext_large, zext_large): Consistent indentation/line wrapping.
20780 (bswap_large): Prototype helper function containing implementation.
20781 (wi::bswap): New template wrapper around bswap_large.
20783 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20786 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
20787 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
20788 (usdot_prod<vsi2qi>): Rename to...
20789 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
20790 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
20791 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
20792 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
20793 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
20794 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
20795 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
20798 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20801 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
20802 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
20803 (aarch64_sq<r>dmulh_n<mode>): Rename to...
20804 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
20805 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
20806 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
20807 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
20808 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
20809 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
20810 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
20811 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
20812 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
20813 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
20814 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
20816 2023-05-31 David Faust <david.faust@oracle.com>
20818 * btfout.cc (btf_kind_names): New.
20819 (btf_kind_name): New.
20820 (btf_absolute_var_id): New utility function.
20821 (btf_relative_var_id): Likewise.
20822 (btf_relative_func_id): Likewise.
20823 (btf_absolute_datasec_id): Likewise.
20824 (btf_asm_type_ref): New.
20825 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
20826 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
20827 (btf_asm_varent): Likewise.
20828 (btf_asm_func_arg): Likewise.
20829 (btf_asm_datasec_entry): Likewise.
20830 (btf_asm_datasec_type): Likewise.
20831 (btf_asm_func_type): Likewise. Add index parameter.
20832 (btf_asm_enum_const): Likewise.
20833 (btf_asm_sou_member): Likewise.
20834 (output_btf_vars): Update btf_asm_* call accordingly.
20835 (output_asm_btf_sou_fields): Likewise.
20836 (output_asm_btf_enum_list): Likewise.
20837 (output_asm_btf_func_args_list): Likewise.
20838 (output_asm_btf_vlen_bytes): Likewise.
20839 (output_btf_func_types): Add ctf_container_ref parameter.
20840 Pass it to btf_asm_func_type.
20841 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
20842 (btf_output): Update output_btf_func_types call similarly.
20844 2023-05-31 David Faust <david.faust@oracle.com>
20846 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
20847 and BTF_KIND_FWD which do not use the size/type field at all.
20849 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
20851 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
20852 (active_insn_p): Ditto.
20853 (in_sequence_p): Ditto.
20854 (unshare_all_rtl): Change return type from int to void.
20855 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
20856 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
20857 and adjust function body accordingly.
20858 (mem_expr_equal_p): Ditto.
20859 (unshare_all_rtl): Change return type from int to void
20860 and adjust function body accordingly.
20861 (verify_rtx_sharing): Remove unneeded return.
20862 (active_insn_p): Change return type from int to bool
20863 and adjust function body accordingly.
20864 (in_sequence_p): Ditto.
20866 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
20868 * rtl.h (true_dependence): Change return type from int to bool.
20869 (canon_true_dependence): Ditto.
20870 (read_dependence): Ditto.
20871 (anti_dependence): Ditto.
20872 (canon_anti_dependence): Ditto.
20873 (output_dependence): Ditto.
20874 (canon_output_dependence): Ditto.
20875 (may_alias_p): Ditto.
20876 * alias.h (alias_sets_conflict_p): Ditto.
20877 (alias_sets_must_conflict_p): Ditto.
20878 (objects_must_conflict_p): Ditto.
20879 (nonoverlapping_memrefs_p): Ditto.
20880 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
20881 (record_set): Ditto.
20882 (base_alias_check): Ditto.
20883 (find_base_value): Ditto.
20884 (mems_in_disjoint_alias_sets_p): Ditto.
20885 (get_alias_set_entry): Ditto.
20886 (decl_for_component_ref): Ditto.
20887 (write_dependence_p): Ditto.
20888 (memory_modified_1): Ditto.
20889 (mems_in_disjoint_alias_set_p): Change return type from int to bool
20890 and adjust function body accordingly.
20891 (alias_sets_conflict_p): Ditto.
20892 (alias_sets_must_conflict_p): Ditto.
20893 (objects_must_conflict_p): Ditto.
20894 (rtx_equal_for_memref_p): Ditto.
20895 (base_alias_check): Ditto.
20896 (read_dependence): Ditto.
20897 (nonoverlapping_memrefs_p): Ditto.
20898 (true_dependence_1): Ditto.
20899 (true_dependence): Ditto.
20900 (canon_true_dependence): Ditto.
20901 (write_dependence_p): Ditto.
20902 (anti_dependence): Ditto.
20903 (canon_anti_dependence): Ditto.
20904 (output_dependence): Ditto.
20905 (canon_output_dependence): Ditto.
20906 (may_alias_p): Ditto.
20907 (init_alias_analysis): Change "changed" variable to bool.
20909 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20911 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
20912 expand into define_insn_and_split.
20914 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20916 * config/riscv/vector.md: Remove FRM.
20918 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20920 * config/riscv/vector.md: Remove FRM.
20922 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20924 * config/riscv/vector.md: Remove FRM.
20926 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
20929 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
20932 2023-05-31 Richard Biener <rguenther@suse.de>
20935 PR tree-optimization/109143
20936 * tree-ssa-structalias.cc (struct topo_info): Remove.
20937 (init_topo_info): Likewise.
20938 (free_topo_info): Likewise.
20939 (compute_topo_order): Simplify API, put the component
20940 with ESCAPED last so it's processed first.
20941 (topo_visit): Adjust.
20942 (solve_graph): Likewise.
20944 2023-05-31 Richard Biener <rguenther@suse.de>
20946 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
20948 (add_graph_edge): Count redundant edges we avoid to create.
20949 (dump_sa_stats): Dump them.
20950 (ipa_pta_execute): Do not dump generating constraints when
20951 we are not dumping them.
20953 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20955 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
20956 output template to avoid explicit switch on which_alternative.
20957 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
20958 (and<mode>3): Likewise.
20959 (ior<mode>3): Likewise.
20960 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
20962 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20964 * config/xtensa/predicates.md (xtensa_bit_join_operator):
20966 * config/xtensa/xtensa.md (ior_op): Remove.
20967 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
20968 insn_and_split pattern of the same name to express and capture
20969 the bit-combining operation with both sides swapped.
20970 In addition, replace use of code iterator with new operator
20972 (*shlrd_const, *shlrd_per_byte):
20973 Likewise regarding the code iterator.
20975 2023-05-31 Cui, Lili <lili.cui@intel.com>
20977 PR tree-optimization/110038
20978 * params.opt: Add a limit on tree-reassoc-width.
20979 * tree-ssa-reassoc.cc
20980 (rewrite_expr_tree_parallel): Add width limit.
20982 2023-05-31 Pan Li <pan2.li@intel.com>
20984 * common/config/riscv/riscv-common.cc:
20985 (riscv_implied_info): Add zvfh item.
20986 (riscv_ext_version_table): Ditto.
20987 (riscv_ext_flag_table): Ditto.
20988 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
20989 (TARGET_ZVFH): Ditto.
20991 2023-05-30 liuhongt <hongtao.liu@intel.com>
20993 PR tree-optimization/108804
20994 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
20995 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
20996 Add new parameter narrow_src_p.
20997 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
20998 vectorization by truncating to lower precision.
20999 * tree-vectorizer.h (vect_get_range_info): New declare.
21001 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
21003 * lra-int.h (lra_update_sp_offset): Add the prototype.
21004 * lra.cc (setup_sp_offset): Change the return type. Use
21005 lra_update_sp_offset.
21006 * lra-eliminations.cc (lra_update_sp_offset): New function.
21007 (lra_process_new_insns): Push the current insn to reprocess if the
21008 input reload changes sp offset.
21010 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
21013 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
21014 Fix misleading identation.
21016 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
21018 * rtl.h (comparison_dominates_p): Change return type from int to bool.
21019 (condjump_p): Ditto.
21020 (any_condjump_p): Ditto.
21021 (any_uncondjump_p): Ditto.
21022 (simplejump_p): Ditto.
21023 (returnjump_p): Ditto.
21024 (eh_returnjump_p): Ditto.
21025 (onlyjump_p): Ditto.
21026 (invert_jump_1): Ditto.
21027 (invert_jump): Ditto.
21028 (rtx_renumbered_equal_p): Ditto.
21029 (redirect_jump_1): Ditto.
21030 (redirect_jump): Ditto.
21031 (condjump_in_parallel_p): Ditto.
21032 * jump.cc (invert_exp_1): Adjust forward declaration.
21033 (comparison_dominates_p): Change return type from int to bool
21034 and adjust function body accordingly.
21035 (simplejump_p): Ditto.
21036 (condjump_p): Ditto.
21037 (condjump_in_parallel_p): Ditto.
21038 (any_uncondjump_p): Ditto.
21039 (any_condjump_p): Ditto.
21040 (returnjump_p): Ditto.
21041 (eh_returnjump_p): Ditto.
21042 (onlyjump_p): Ditto.
21043 (redirect_jump_1): Ditto.
21044 (redirect_jump): Ditto.
21045 (invert_exp_1): Ditto.
21046 (invert_jump_1): Ditto.
21047 (invert_jump): Ditto.
21048 (rtx_renumbered_equal_p): Ditto.
21050 2023-05-30 Andrew Pinski <apinski@marvell.com>
21052 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
21053 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
21054 Add ne as a possible cmp.
21055 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
21057 2023-05-30 Andrew Pinski <apinski@marvell.com>
21059 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
21062 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
21064 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
21065 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
21066 (and (extend X) C) as (zero_extend (and X C)), to also optimize
21067 modes wider than HOST_WIDE_INT.
21069 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
21072 * simplify-rtx.cc (simplify_const_relational_operation): Return
21073 early if we have a MODE_CC comparison that isn't a COMPARE against
21076 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
21078 * config/riscv/riscv.cc (riscv_const_insns): Allow
21079 const_vec_duplicates.
21081 2023-05-30 liuhongt <hongtao.liu@intel.com>
21083 PR middle-end/108938
21084 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
21085 function, cut from original find_bswap_or_nop function.
21086 (find_bswap_or_nop): Add a new parameter, detect bswap +
21087 rotate and save rotate result in the new parameter.
21088 (bswap_replace): Add a new parameter to indicate rotate and
21089 generate rotate stmt if needed.
21090 (maybe_optimize_vector_constructor): Adjust for new rotate
21091 parameter in the upper 2 functions.
21092 (pass_optimize_bswap::execute): Ditto.
21093 (imm_store_chain_info::output_merged_store): Ditto.
21095 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21097 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
21098 (aarch64_<su>adalp<mode>): New define_expand.
21099 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
21100 (aarch64_<su>addlp<mode>): Convert to define_expand.
21101 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
21102 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
21104 (USADDLP): Likewise.
21105 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
21107 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21109 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
21110 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
21111 srhadd, urhadd builtin codes for standard optab ones.
21112 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
21113 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
21115 (<u>avg<mode>3_ceil): Rename to...
21116 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
21118 (aarch64_<su>hsub<mode>): New define_expand.
21119 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
21120 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
21121 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
21123 2023-05-30 Andreas Schwab <schwab@suse.de>
21126 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
21127 match libsanitizer.
21129 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21131 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
21132 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
21134 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
21135 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
21136 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
21137 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
21138 (aarch64_<sra_op>sra_n<mode>): New define_expand.
21139 (aarch64_<sra_op>rsra_n<mode>): Likewise.
21140 (aarch64_<sur>sra_n<mode>): Rename to...
21141 (aarch64_<sur>sra_ndi): ... This.
21142 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
21143 any_target_p argument.
21144 (aarch64_extract_vec_duplicate_wide_int): Define.
21145 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
21146 (aarch64_const_vec_rnd_cst_p): Likewise.
21147 (aarch64_vector_mode_supported_any_target_p): Likewise.
21148 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
21149 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
21150 (VSRA): Adjust for the above.
21152 (V2XWIDE): New mode_attr.
21153 (vec_or_offset): Likewise.
21154 (SHIFTEXTEND): Likewise.
21155 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
21157 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
21158 clarify that it applies to current target options.
21159 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
21160 * doc/tm.texi.in: Regenerate.
21161 * stor-layout.cc (mode_for_vector): Check
21162 vector_mode_supported_any_target_p when iterating through vector modes.
21163 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
21164 clarify that it applies to current target options.
21165 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
21167 2023-05-30 Lili Cui <lili.cui@intel.com>
21169 PR tree-optimization/98350
21170 * tree-ssa-reassoc.cc
21171 (rewrite_expr_tree_parallel): Rewrite this function.
21172 (rank_ops_for_fma): New.
21173 (reassociate_bb): Handle new function.
21175 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
21177 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
21178 (rtx_unstable_p): Ditto.
21179 (reg_mentioned_p): Ditto.
21180 (reg_referenced_p): Ditto.
21181 (reg_used_between_p): Ditto.
21182 (reg_set_between_p): Ditto.
21183 (modified_between_p): Ditto.
21184 (no_labels_between_p): Ditto.
21185 (modified_in_p): Ditto.
21186 (reg_set_p): Ditto.
21187 (multiple_sets): Ditto.
21188 (set_noop_p): Ditto.
21189 (noop_move_p): Ditto.
21190 (reg_overlap_mentioned_p): Ditto.
21191 (dead_or_set_p): Ditto.
21192 (dead_or_set_regno_p): Ditto.
21193 (find_reg_fusage): Ditto.
21194 (find_regno_fusage): Ditto.
21195 (side_effects_p): Ditto.
21196 (volatile_refs_p): Ditto.
21197 (volatile_insn_p): Ditto.
21198 (may_trap_p_1): Ditto.
21199 (may_trap_p): Ditto.
21200 (may_trap_or_fault_p): Ditto.
21201 (computed_jump_p): Ditto.
21202 (auto_inc_p): Ditto.
21203 (loc_mentioned_in_p): Ditto.
21204 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
21205 (rtx_unstable_p): Change return type from int to bool
21206 and adjust function body accordingly.
21207 (rtx_addr_can_trap_p): Ditto.
21208 (reg_mentioned_p): Ditto.
21209 (no_labels_between_p): Ditto.
21210 (reg_used_between_p): Ditto.
21211 (reg_referenced_p): Ditto.
21212 (reg_set_between_p): Ditto.
21213 (reg_set_p): Ditto.
21214 (modified_between_p): Ditto.
21215 (modified_in_p): Ditto.
21216 (multiple_sets): Ditto.
21217 (set_noop_p): Ditto.
21218 (noop_move_p): Ditto.
21219 (reg_overlap_mentioned_p): Ditto.
21220 (dead_or_set_p): Ditto.
21221 (dead_or_set_regno_p): Ditto.
21222 (find_reg_fusage): Ditto.
21223 (find_regno_fusage): Ditto.
21224 (remove_node_from_insn_list): Ditto.
21225 (volatile_insn_p): Ditto.
21226 (volatile_refs_p): Ditto.
21227 (side_effects_p): Ditto.
21228 (may_trap_p_1): Ditto.
21229 (may_trap_p): Ditto.
21230 (may_trap_or_fault_p): Ditto.
21231 (computed_jump_p): Ditto.
21232 (auto_inc_p): Ditto.
21233 (loc_mentioned_in_p): Ditto.
21234 * combine.cc (can_combine_p): Update indirect function.
21236 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21238 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
21239 * config/riscv/iterators.md: New attribute.
21240 * config/riscv/vector-iterators.md: New attribute.
21242 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
21244 * config/riscv/riscv.md: Fix signed and unsigned comparison
21247 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21249 * config/riscv/autovec.md (fnma<mode>4): New pattern.
21250 (*fnma<mode>): Ditto.
21252 2023-05-29 Die Li <lidie@eswincomputing.com>
21254 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
21256 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
21257 process for TARGET_XTHEADCONDMOV
21259 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
21262 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
21263 TARGET_AVX512BW to generate truncv16hiv16qi2.
21265 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
21267 * config/riscv/riscv.md (and<mode>3): New expander.
21268 (*and<mode>3) New pattern.
21269 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
21272 2023-05-29 Pan Li <pan2.li@intel.com>
21274 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
21275 comments and rename local variables.
21276 (emit_nonvlmax_insn): Diito.
21277 (emit_vlmax_merge_insn): Ditto.
21278 (emit_vlmax_cmp_insn): Ditto.
21279 (emit_vlmax_cmp_mu_insn): Ditto.
21280 (emit_scalar_move_insn): Ditto.
21282 2023-05-29 Pan Li <pan2.li@intel.com>
21284 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
21286 (emit_nonvlmax_insn): Ditto.
21287 (emit_vlmax_merge_insn): Ditto.
21288 (emit_vlmax_cmp_insn): Ditto.
21289 (emit_vlmax_cmp_mu_insn): Ditto.
21290 (expand_vec_series): Ditto.
21292 2023-05-29 Pan Li <pan2.li@intel.com>
21294 * config/riscv/riscv-protos.h (enum insn_type): New type.
21295 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
21296 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
21298 (rvv_builder::get_merged_repeating_sequence): Ditto.
21299 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
21300 to evaluate the optimization cost.
21301 (rvv_builder::get_merge_scalar_mask): New function to get the merge
21303 (emit_scalar_move_insn): New function to emit vmv.s.x.
21304 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
21305 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
21307 (get_repeating_sequence_dup_machine_mode): New function to get the dup
21309 (expand_vector_init_merge_repeating_sequence): New function to perform
21311 (expand_vec_init): Add this vector init optimization.
21312 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
21314 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
21316 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
21317 put onto the increment when it is inserted after the position.
21319 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
21321 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
21324 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21326 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
21328 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21330 * config/riscv/autovec.md (fma<mode>4): New pattern.
21331 (*fma<mode>): Ditto.
21332 * config/riscv/riscv-protos.h (enum insn_type): New enum.
21333 (emit_vlmax_ternary_insn): New function.
21334 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
21336 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21338 * config/riscv/vector.md: Fix vimuladd instruction bug.
21340 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21342 * config/riscv/riscv.cc (global_state_unknown_p): New function.
21343 (riscv_mode_after): Fix incorrect VXM.
21345 2023-05-29 Pan Li <pan2.li@intel.com>
21347 * common/config/riscv/riscv-common.cc:
21348 (riscv_implied_info): Add zvfhmin item.
21349 (riscv_ext_version_table): Ditto.
21350 (riscv_ext_flag_table): Ditto.
21351 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
21352 (TARGET_ZFHMIN): Align indent.
21353 (TARGET_ZFH): Ditto.
21354 (TARGET_ZVFHMIN): New macro.
21356 2023-05-27 liuhongt <hongtao.liu@intel.com>
21359 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
21360 to VI_AVX2 to cover more modes.
21362 2023-05-27 liuhongt <hongtao.liu@intel.com>
21364 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
21365 Remove ATOM and ICELAKE(and later) core processors.
21367 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
21369 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
21371 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
21373 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
21376 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
21377 Juzhe Zhong <juzhe.zhong@rivai.ai>
21379 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
21381 (<optab><v_quad_trunc><mode>2): Dito.
21382 (<optab><v_oct_trunc><mode>2): Dito.
21383 (trunc<mode><v_double_trunc>2): Dito.
21384 (trunc<mode><v_quad_trunc>2): Dito.
21385 (trunc<mode><v_oct_trunc>2): Dito.
21386 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
21387 (autovectorize_vector_modes): Define.
21388 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
21390 (autovectorize_vector_modes): Implement hook.
21391 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
21392 Implement target hook.
21393 (riscv_vectorize_related_mode): Implement target hook.
21394 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
21395 (TARGET_VECTORIZE_RELATED_MODE): Define.
21396 * config/riscv/vector-iterators.md: Add lowercase versions of
21397 mode_attr iterators.
21399 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
21400 Tobias Burnus <tobias@codesourcery.com>
21402 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
21403 (ASM_SPEC): Use XNACKOPT.
21404 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
21405 (enum hsaco_attr_type): ... this, and generalize the names.
21406 (TARGET_XNACK): New macro.
21407 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
21409 (output_file_start): Update xnack handling.
21410 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
21411 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
21412 (sram_ecc_type): Rename to ...
21413 (hsaco_attr_type: ... this.)
21414 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
21415 (TEST_XNACK): Delete.
21416 (TEST_XNACK_ANY): New macro.
21417 (TEST_XNACK_ON): New macro.
21418 (main): Support the new -mxnack=on/off/any syntax.
21419 * doc/invoke.texi (-mxnack): Update for new syntax.
21421 2023-05-26 Andrew Pinski <apinski@marvell.com>
21423 * genmatch.cc (emit_debug_printf): New function.
21424 (dt_simplify::gen_1): Emit printf into the code
21425 before the `return true` or returning the folded result
21426 instead of emitting it always.
21428 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21430 * config/xtensa/xtensa-protos.h
21431 (xtensa_expand_block_set_unrolled_loop,
21432 xtensa_expand_block_set_small_loop): Remove.
21433 (xtensa_expand_block_set): New prototype.
21434 * config/xtensa/xtensa.cc
21435 (xtensa_expand_block_set_libcall): New subfunction.
21436 (xtensa_expand_block_set_unrolled_loop,
21437 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
21438 (xtensa_expand_block_set): New function that calls the above
21440 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
21441 xtensa_expand_block_set().
21443 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21445 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
21447 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
21449 * config/xtensa/constraints.md (O):
21450 Change to use the above function.
21451 * config/xtensa/xtensa.md (*subsi3_from_const):
21452 New insn_and_split pattern.
21454 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21456 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
21457 Retract excessive line folding, and correct the value of
21458 the "length" insn attribute related to TARGET_DENSITY.
21459 (*extzvsi-1bit_addsubx): Ditto.
21461 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
21463 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
21464 Do not disable call to ix86_expand_vecop_qihi2.
21466 2023-05-26 liuhongt <hongtao.liu@intel.com>
21470 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
21471 calculation when !hard_regno_mode_ok for GENERAL_REGS and
21472 mode, otherwise still use GENERAL_REGS.
21474 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21476 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
21477 explict VL and drop VL in ops.
21479 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
21481 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
21482 in different BB blocks.
21484 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
21486 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
21487 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
21488 instructions when available. Emulate truncation via
21489 ix86_expand_vec_perm_const_1 when native truncate insn
21491 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
21492 when available. Trivially rename some variables.
21493 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
21494 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
21495 calculation of V*QImode emulations to account for generation of
21496 2x-wider mode instructions.
21497 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
21498 emulations to account for generation of 2x-wider mode instructions.
21500 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
21503 * config/avr/avr.cc (avr_can_inline_p): New static function.
21504 (TARGET_CAN_INLINE_P): Define to that function.
21506 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
21509 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
21510 Handle any bit position and use mode QISI.
21511 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
21512 of 2 insns for bit-transfer of respective style.
21514 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
21516 * config/arm/iterators.md (MVE_6): Remove.
21517 * config/arm/mve.md: Replace MVE_6 with MVE_5.
21519 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21520 Richard Sandiford <richard.sandiford@arm.com>
21522 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
21524 (vect_set_loop_controls_directly): Add decrement IV support.
21525 (vect_set_loop_condition_partial_vectors): Ditto.
21526 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
21528 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
21531 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21534 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
21535 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
21536 Fix canonicalization of PLUS operands.
21537 (aarch64_fcmla<rot><mode>): Rename to...
21538 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
21539 Fix canonicalization of PLUS operands.
21540 (aarch64_fcmla_lane<rot><mode>): Rename to...
21541 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
21542 Fix canonicalization of PLUS operands.
21543 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
21544 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
21545 Fix canonicalization of PLUS operands.
21546 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
21548 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
21550 * config/arm/arm.md (rbitsi2): Rename to...
21551 (arm_rbit): ... This.
21552 (ctzsi2): Adjust for the above.
21553 (arm_rev16si2): Convert to define_expand.
21554 (arm_rev16si2_alt1): New pattern.
21555 (arm_rev16si2_alt): Rename to...
21556 (*arm_rev16si2_alt2): ... This.
21557 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
21558 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
21559 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
21560 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
21562 2023-05-25 Alex Coplan <alex.coplan@arm.com>
21565 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
21567 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
21568 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
21569 DFmode as an rvalue.
21571 2023-05-25 Richard Biener <rguenther@suse.de>
21574 * tree-vect-stmts.cc (vectorizable_condition): For
21575 embedded comparisons also handle the case when the target
21576 only provides vec_cmp and vcond_mask.
21578 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
21580 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
21583 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21585 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
21586 (seq_cost_ignoring_scalar_moves): Likewise.
21587 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
21589 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21591 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
21592 (vcage_f32): Likewise.
21593 (vcages_f32): Likewise.
21594 (vcageq_f32): Likewise.
21595 (vcaged_f64): Likewise.
21596 (vcageq_f64): Likewise.
21597 (vcagts_f32): Likewise.
21598 (vcagt_f32): Likewise.
21599 (vcagt_f64): Likewise.
21600 (vcagtq_f32): Likewise.
21601 (vcagtd_f64): Likewise.
21602 (vcagtq_f64): Likewise.
21603 (vcale_f32): Likewise.
21604 (vcale_f64): Likewise.
21605 (vcaled_f64): Likewise.
21606 (vcales_f32): Likewise.
21607 (vcaleq_f32): Likewise.
21608 (vcaleq_f64): Likewise.
21609 (vcalt_f32): Likewise.
21610 (vcalt_f64): Likewise.
21611 (vcaltd_f64): Likewise.
21612 (vcaltq_f32): Likewise.
21613 (vcaltq_f64): Likewise.
21614 (vcalts_f32): Likewise.
21616 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
21620 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
21621 int to const int or const int to const unsigned int.
21622 (_mm512_mask_srli_epi16): Ditto.
21623 (_mm512_slli_epi16): Ditto.
21624 (_mm512_mask_slli_epi16): Ditto.
21625 (_mm512_maskz_slli_epi16): Ditto.
21626 (_mm512_srai_epi16): Ditto.
21627 (_mm512_mask_srai_epi16): Ditto.
21628 (_mm512_maskz_srai_epi16): Ditto.
21629 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
21630 (_mm512_mask_slli_epi64): Ditto.
21631 (_mm512_maskz_slli_epi64): Ditto.
21632 (_mm512_srli_epi64): Ditto.
21633 (_mm512_mask_srli_epi64): Ditto.
21634 (_mm512_maskz_srli_epi64): Ditto.
21635 (_mm512_srai_epi64): Ditto.
21636 (_mm512_mask_srai_epi64): Ditto.
21637 (_mm512_maskz_srai_epi64): Ditto.
21638 (_mm512_slli_epi32): Ditto.
21639 (_mm512_mask_slli_epi32): Ditto.
21640 (_mm512_maskz_slli_epi32): Ditto.
21641 (_mm512_srli_epi32): Ditto.
21642 (_mm512_mask_srli_epi32): Ditto.
21643 (_mm512_maskz_srli_epi32): Ditto.
21644 (_mm512_srai_epi32): Ditto.
21645 (_mm512_mask_srai_epi32): Ditto.
21646 (_mm512_maskz_srai_epi32): Ditto.
21647 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
21648 (_mm256_maskz_srai_epi16): Ditto.
21649 (_mm_mask_srai_epi16): Ditto.
21650 (_mm_maskz_srai_epi16): Ditto.
21651 (_mm256_mask_slli_epi16): Ditto.
21652 (_mm256_maskz_slli_epi16): Ditto.
21653 (_mm_mask_slli_epi16): Ditto.
21654 (_mm_maskz_slli_epi16): Ditto.
21655 (_mm_maskz_srli_epi16): Ditto.
21656 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
21657 (_mm256_maskz_srli_epi32): Ditto.
21658 (_mm_mask_srli_epi32): Ditto.
21659 (_mm_maskz_srli_epi32): Ditto.
21660 (_mm256_mask_srli_epi64): Ditto.
21661 (_mm256_maskz_srli_epi64): Ditto.
21662 (_mm_mask_srli_epi64): Ditto.
21663 (_mm_maskz_srli_epi64): Ditto.
21664 (_mm256_mask_srai_epi32): Ditto.
21665 (_mm256_maskz_srai_epi32): Ditto.
21666 (_mm_mask_srai_epi32): Ditto.
21667 (_mm_maskz_srai_epi32): Ditto.
21668 (_mm256_srai_epi64): Ditto.
21669 (_mm256_mask_srai_epi64): Ditto.
21670 (_mm256_maskz_srai_epi64): Ditto.
21671 (_mm_srai_epi64): Ditto.
21672 (_mm_mask_srai_epi64): Ditto.
21673 (_mm_maskz_srai_epi64): Ditto.
21674 (_mm_mask_slli_epi32): Ditto.
21675 (_mm_maskz_slli_epi32): Ditto.
21676 (_mm_mask_slli_epi64): Ditto.
21677 (_mm_maskz_slli_epi64): Ditto.
21678 (_mm256_mask_slli_epi32): Ditto.
21679 (_mm256_maskz_slli_epi32): Ditto.
21680 (_mm256_mask_slli_epi64): Ditto.
21681 (_mm256_maskz_slli_epi64): Ditto.
21683 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21685 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
21688 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21690 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
21691 * data-streamer-out.cc (streamer_write_vrange): Same.
21692 * value-range.h (class vrange): Make streamer_write_vrange a friend.
21694 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21696 * value-query.cc (range_query::get_tree_range): Set NAN directly
21698 * value-range.cc (frange::set): Assert that bounds are not NAN.
21700 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21702 * value-range.cc (add_vrange): Handle known NANs.
21704 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21706 * value-range.h (frange::set_nan): New.
21708 2023-05-25 Alexandre Oliva <oliva@adacore.com>
21711 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
21712 requires stricter alignment than MEM's.
21714 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21716 PR tree-optimization/107822
21717 PR tree-optimization/107986
21718 * Makefile.in (OBJS): Add gimple-range-phi.o.
21719 * gimple-range-cache.h (ranger_cache::m_estimate): New
21720 phi_analyzer pointer member.
21721 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
21722 phi_analyzer if no loop info is available.
21723 * gimple-range-phi.cc: New file.
21724 * gimple-range-phi.h: New file.
21725 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
21727 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21729 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
21731 (fold_range): Add range_query parameter.
21732 (fur_relation::fur_relation): New.
21733 (fur_relation::trio): New.
21734 (fur_relation::register_relation): New.
21735 (fold_relations): New.
21736 * gimple-range-fold.h (fold_range): Adjust prototypes.
21737 (fold_relations): New.
21739 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21741 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
21742 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
21743 (ranger_cache::const_query): New.
21744 * gimple-range.cc (gimple_ranger::const_query): New.
21745 * gimple-range.h (gimple_ranger::const_query): New prototype.
21747 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21749 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
21750 (ssa_cache::dump_range_query): Delete.
21751 (ssa_lazy_cache::dump_range_query): Delete.
21752 (ssa_lazy_cache::get_range): Move from header file.
21753 (ssa_lazy_cache::clear_range): ditto.
21754 (ssa_lazy_cache::clear): Ditto.
21755 * gimple-range-cache.h (class ssa_cache): Virtualize.
21756 (class ssa_lazy_cache): Inherit and virtualize.
21758 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
21760 * value-range.h (vrange::kind): Remove.
21762 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
21764 PR middle-end/109840
21765 * match.pd <popcount optimizations>: Preserve zero-extension when
21766 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
21767 popcount((T)x), so the popcount's argument keeps the same type.
21768 <parity optimizations>: Likewise preserve extensions when
21769 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
21770 parity((T)x), so that the parity's argument type is the same.
21772 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
21774 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
21775 (ipcp_store_vr_results): Same.
21776 * ipa-prop.cc (ipa_vr::ipa_vr): New.
21777 (ipa_vr::get_vrange): New.
21778 (ipa_vr::set_unknown): New.
21779 (ipa_vr::streamer_read): New.
21780 (ipa_vr::streamer_write): New.
21781 (write_ipcp_transformation_info): Use new ipa_vr API.
21782 (read_ipcp_transformation_info): Same.
21783 (ipa_vr::nonzero_p): Delete.
21784 (ipcp_update_vr): Use new ipa_vr API.
21785 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
21786 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
21788 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
21790 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
21791 silence overflow warnings later on.
21793 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
21795 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
21796 Remove handling of V8QImode.
21797 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
21798 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
21799 (v<insn>v4qi3): Ditto.
21800 * config/i386/sse.md (v<insn>v8qi3): Remove.
21802 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21805 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
21806 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
21807 (aarch64_simd_ashr<mode>): Rename to...
21808 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
21809 (aarch64_simd_imm_shl<mode>): Rename to...
21810 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
21811 (aarch64_simd_reg_sshl<mode>): Rename to...
21812 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
21813 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
21814 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
21815 (aarch64_simd_reg_shl<mode>_signed): Rename to...
21816 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
21817 (vec_shr_<mode>): Rename to...
21818 (vec_shr_<mode><vczle><vczbe>): ... This.
21819 (aarch64_<sur>shl<mode>): Rename to...
21820 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
21821 (aarch64_<sur>q<r>shl<mode>): Rename to...
21822 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
21824 2023-05-24 Richard Biener <rguenther@suse.de>
21827 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
21828 Perform final vector composition using
21829 ix86_expand_vector_init_general instead of setting
21830 the highpart and lowpart which causes spilling.
21832 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21834 PR tree-optimization/109695
21835 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
21837 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
21838 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
21839 flag to set_global_range.
21840 (gimple_ranger::prefill_stmt_dependencies): Ditto.
21842 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21844 PR tree-optimization/109695
21845 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
21847 (temporal_cache::current_p): Check always_current method.
21848 (temporal_cache::set_always_current): Add param and set value
21850 (temporal_cache::always_current_p): New.
21851 (ranger_cache::get_global_range): Adjust.
21852 (ranger_cache::set_global_range): set always current first.
21854 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21856 PR tree-optimization/109695
21857 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
21858 fold_range with global query to choose an initial value.
21860 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21862 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
21865 2023-05-24 Richard Biener <rguenther@suse.de>
21867 PR tree-optimization/109849
21868 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
21869 expressions but take the first sets.
21871 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
21874 * doc/gm2.texi (High procedure function): New node.
21875 (Using): New menu entry for High procedure function.
21877 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
21879 PR rtl-optimization/109940
21880 * early-remat.cc (postorder_index): Rename to...
21881 (rpo_index): ...this.
21882 (compare_candidates): Sort by decreasing rpo_index rather than
21883 increasing postorder_index.
21884 (early_remat::sort_candidates): Calculate the forward RPO from
21886 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
21887 rather than DF_BACKWARD in reverse.
21889 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21892 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
21893 qualifier_none for the return operand.
21895 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21897 * config/riscv/autovec.md (<optab><mode>3): New pattern.
21898 (one_cmpl<mode>2): Ditto.
21899 (*<optab>not<mode>): Ditto.
21900 (*n<optab><mode>): Ditto.
21901 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
21904 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
21906 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
21907 calculation on n_perms by considering nvectors_per_build.
21909 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21910 Richard Sandiford <richard.sandiford@arm.com>
21912 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
21913 (vec_cmp<mode><vm>): New pattern.
21914 (vec_cmpu<mode><vm>): New pattern.
21915 (vcond<V:mode><VI:mode>): New pattern.
21916 (vcondu<V:mode><VI:mode>): New pattern.
21917 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
21918 (emit_vlmax_merge_insn): New function.
21919 (emit_vlmax_cmp_insn): Ditto.
21920 (emit_vlmax_cmp_mu_insn): Ditto.
21921 (expand_vec_cmp): Ditto.
21922 (expand_vec_cmp_float): Ditto.
21923 (expand_vcond): Ditto.
21924 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
21925 (emit_vlmax_cmp_insn): Ditto.
21926 (emit_vlmax_cmp_mu_insn): Ditto.
21927 (get_cmp_insn_code): Ditto.
21928 (expand_vec_cmp): Ditto.
21929 (expand_vec_cmp_float): Ditto.
21930 (expand_vcond): Ditto.
21932 2023-05-24 Pan Li <pan2.li@intel.com>
21934 * config/riscv/genrvv-type-indexer.cc (main): Add
21935 unsigned_eew*_lmul1_interpret for indexer.
21936 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21937 Register vuint*m1_t interpret function.
21938 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
21939 New macro for vuint8m1_t.
21940 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21941 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21942 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21943 (vbool1_t): Add to unsigned_eew*_interpret_ops.
21944 (vbool2_t): Likewise.
21945 (vbool4_t): Likewise.
21946 (vbool8_t): Likewise.
21947 (vbool16_t): Likewise.
21948 (vbool32_t): Likewise.
21949 (vbool64_t): Likewise.
21950 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
21951 New macro for vuint*m1_t.
21952 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21953 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21954 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21955 (required_extensions_p): Add vuint*m1_t interpret case.
21956 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
21957 Add vuint*m1_t interpret to base type.
21958 (unsigned_eew16_lmul1_interpret): Likewise.
21959 (unsigned_eew32_lmul1_interpret): Likewise.
21960 (unsigned_eew64_lmul1_interpret): Likewise.
21962 2023-05-24 Pan Li <pan2.li@intel.com>
21964 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
21965 for the eew size list.
21966 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
21967 (main): Add signed_eew*_lmul1_interpret for indexer.
21968 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21969 Register vint*m1_t interpret function.
21970 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
21971 New macro for vint8m1_t.
21972 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21973 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21974 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21975 (vbool1_t): Add to signed_eew*_interpret_ops.
21976 (vbool2_t): Likewise.
21977 (vbool4_t): Likewise.
21978 (vbool8_t): Likewise.
21979 (vbool16_t): Likewise.
21980 (vbool32_t): Likewise.
21981 (vbool64_t): Likewise.
21982 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
21983 New macro for vint*m1_t.
21984 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21985 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21986 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21987 (required_extensions_p): Add vint8m1_t interpret case.
21988 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
21989 Add vint*m1_t interpret to base type.
21990 (signed_eew16_lmul1_interpret): Likewise.
21991 (signed_eew32_lmul1_interpret): Likewise.
21992 (signed_eew64_lmul1_interpret): Likewise.
21994 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21996 * config/riscv/autovec.md: Adjust for new interface.
21997 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
21998 (emit_nonvlmax_insn): Add AVL operand.
21999 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
22000 (emit_nonvlmax_insn): Add AVL operand.
22001 (sew64_scalar_helper): Adjust for new interface.
22002 (expand_tuple_move): Ditto.
22003 * config/riscv/vector.md: Ditto.
22005 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22007 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
22008 (expand_const_vector): Ditto.
22009 (legitimize_move): Ditto.
22010 (sew64_scalar_helper): Ditto.
22011 (expand_tuple_move): Ditto.
22012 (expand_vector_init_insert_elems): Ditto.
22013 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
22015 2023-05-24 liuhongt <hongtao.liu@intel.com>
22018 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
22019 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
22020 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
22021 (ix86_masked_all_ones): Handle 64-bit mask.
22022 * config/i386/i386-builtin.def: Replace icode of related
22023 non-mask simd abs builtins with CODE_FOR_nothing.
22025 2023-05-23 Martin Uecker <uecker@tugraz.at>
22028 * function.cc (gimplify_parm_type): Remove function.
22029 (gimplify_parameters): Call gimplify_type_sizes.
22031 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22033 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
22034 and change to also accept '*subx' pattern.
22037 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
22039 * config/xtensa/predicates.md (addsub_operator): New.
22040 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
22041 *extzvsi-1bit_addsubx): New insn_and_split patterns.
22042 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
22043 Add a special case about ifcvt 'noce_try_cmove()' to handle
22044 constant loads that do not fit into signed 12 bits in the
22045 patterns added above.
22047 2023-05-23 Richard Biener <rguenther@suse.de>
22049 PR tree-optimization/109747
22050 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
22051 the SLP node only once to the cost hook.
22053 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
22055 * config/avr/avr.cc (avr_insn_cost): New static function.
22056 (TARGET_INSN_COST): Define to that function.
22058 2023-05-23 Richard Biener <rguenther@suse.de>
22061 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
22062 For vector construction or splats apply GPR->XMM move
22063 costing. QImode memory can be handled directly only
22064 with SSE4.1 pinsrb.
22066 2023-05-23 Richard Biener <rguenther@suse.de>
22068 PR tree-optimization/108752
22069 * tree-vect-stmts.cc (vectorizable_operation): For bit
22070 operations with generic word_mode vectors do not cost
22071 an extra stmt. For plus, minus and negate also cost the
22072 constant materialization.
22074 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
22076 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
22077 Call ix86_expand_vec_shift_qihi_constant for shifts
22078 with constant count operand.
22079 * config/i386/i386.cc (ix86_shift_rotate_cost):
22080 Handle V4QImode and V8QImode.
22081 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
22082 (<insn>v4qi3): Ditto.
22084 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22086 * config/riscv/vector.md: Add mode.
22088 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
22090 PR tree-optimization/109934
22091 * value-range.cc (irange::invert): Remove buggy special case.
22093 2023-05-23 Richard Biener <rguenther@suse.de>
22095 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
22098 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
22101 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
22102 subregs between any scalars that are 64 bits or smaller.
22103 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
22104 (bits_etype): New int attribute.
22105 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
22106 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
22107 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
22109 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
22111 * doc/md.texi: Document that <FOO> can be used to refer to the
22112 numerical value of an int iterator FOO. Tweak other parts of
22113 the int iterator documentation.
22114 * read-rtl.cc (iterator_group::has_self_attr): New field.
22115 (map_attr_string): When has_self_attr is true, make <FOO>
22116 expand to the current value of iterator FOO.
22117 (initialize_iterators): Set has_self_attr for int iterators.
22119 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22121 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
22122 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
22123 (RVV_UNOP_NUM): New macro.
22124 (RVV_BINOP_NUM): Ditto.
22125 (legitimize_move): Refactor the framework of RVV auto-vectorization.
22126 (emit_vlmax_op): Ditto.
22127 (emit_vlmax_reg_op): Ditto.
22128 (emit_len_op): Ditto.
22129 (emit_len_binop): Ditto.
22130 (emit_vlmax_tany_many): Ditto.
22131 (emit_nonvlmax_tany_many): Ditto.
22132 (sew64_scalar_helper): Ditto.
22133 (expand_tuple_move): Ditto.
22134 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
22135 (emit_pred_binop): Ditto.
22136 (emit_vlmax_op): Ditto.
22137 (emit_vlmax_tany_many): New function.
22138 (emit_len_op): Remove.
22139 (emit_nonvlmax_tany_many): New function.
22140 (emit_vlmax_reg_op): Remove.
22141 (emit_len_binop): Ditto.
22142 (emit_index_op): Ditto.
22143 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
22144 (expand_const_vector): Ditto.
22145 (legitimize_move): Ditto.
22146 (sew64_scalar_helper): Ditto.
22147 (expand_tuple_move): Ditto.
22148 (expand_vector_init_insert_elems): Ditto.
22149 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
22150 * config/riscv/vector.md: Ditto.
22152 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22155 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
22156 and constraint for operand 0.
22157 (add_vec_concat_subst_be): Likewise.
22159 2023-05-23 Richard Biener <rguenther@suse.de>
22161 PR tree-optimization/109849
22162 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
22163 and use that to determine what to hoist.
22165 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
22167 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
22168 specific treatment for bit-fields only if they have an integral type
22169 and filter out non-integral bit-fields that do not start and end on
22172 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
22174 PR tree-optimization/109920
22175 * value-range.h (RESIZABLE>::~int_range): Use delete[].
22177 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
22179 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
22180 calcuation of integer vector mode costs to reflect generated
22181 instruction sequences of different integer vector modes and
22182 different target ABIs. Remove "speed" function argument.
22183 (ix86_rtx_costs): Update call for removed function argument.
22184 (ix86_vector_costs::add_stmt_cost): Ditto.
22186 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
22188 * value-range.h (class Value_Range): Implement set_zero,
22189 set_nonzero, and nonzero_p.
22191 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
22193 * config/i386/i386.cc (ix86_multiplication_cost): Add
22194 the cost of a memory read to the cost of V?QImode sequences.
22196 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22198 * config/riscv/riscv-v.cc: Add "m_" prefix.
22200 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22202 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
22203 multiple-rgroup of length.
22204 * tree-vect-stmts.cc (vectorizable_store): Ditto.
22205 (vectorizable_load): Ditto.
22206 * tree-vectorizer.h (vect_get_loop_len): Ditto.
22208 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22210 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
22213 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
22215 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
22216 handling for the case index == count.
22218 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
22221 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
22222 Don't fold to XOR / AND / XOR if just one bit is copied to the
22225 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
22227 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
22228 builtin for bit reversal using brev instruction.
22229 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
22230 NVPTX_BUILTIN_BREVLL.
22231 (nvptx_init_builtins): Define "brev" and "brevll".
22232 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
22233 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
22234 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
22235 section, document __builtin_nvptx_brev{,ll}.
22237 2023-05-21 Jakub Jelinek <jakub@redhat.com>
22239 PR tree-optimization/109505
22240 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
22241 Combine successive equal operations with constants,
22242 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
22243 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
22246 2023-05-21 Andrew Pinski <apinski@marvell.com>
22248 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
22250 2023-05-21 Pan Li <pan2.li@intel.com>
22252 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
22253 rest bool size, aka 2, 4, 8, 16, 32, 64.
22254 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
22255 Register vbool[2|4|8|16|32|64] interpret function.
22256 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
22257 New macro for vbool2_t.
22258 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
22259 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
22260 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
22261 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
22262 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
22263 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
22264 (vint16m1_t): Likewise.
22265 (vint32m1_t): Likewise.
22266 (vint64m1_t): Likewise.
22267 (vuint8m1_t): Likewise.
22268 (vuint16m1_t): Likewise.
22269 (vuint32m1_t): Likewise.
22270 (vuint64m1_t): Likewise.
22271 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
22272 New macro for vbool2_t.
22273 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
22274 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
22275 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
22276 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
22277 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
22278 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
22279 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
22280 vbool2_t interprect to base type.
22281 (bool4_interpret): Likewise.
22282 (bool8_interpret): Likewise.
22283 (bool16_interpret): Likewise.
22284 (bool32_interpret): Likewise.
22285 (bool64_interpret): Likewise.
22287 2023-05-21 Andrew Pinski <apinski@marvell.com>
22289 PR middle-end/109919
22290 * expr.cc (expand_single_bit_test): Don't use the
22291 target for expand_expr.
22293 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
22295 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
22298 2023-05-20 Pan Li <pan2.li@intel.com>
22300 * mode-switching.cc (entity_map): Initialize the array to zero.
22303 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
22306 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
22307 Remove superfluous "parallel" in insn pattern.
22308 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
22309 printing error text to assembly.
22311 2023-05-20 Andrew Pinski <apinski@marvell.com>
22313 * expr.cc (fold_single_bit_test): Rename to ...
22314 (expand_single_bit_test): This and expand directly.
22315 (do_store_flag): Update for the rename function.
22317 2023-05-20 Andrew Pinski <apinski@marvell.com>
22319 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
22320 instead of shift/and.
22322 2023-05-20 Andrew Pinski <apinski@marvell.com>
22324 * expr.cc (fold_single_bit_test): Add an assert
22325 and simplify based on code being NE_EXPR or EQ_EXPR.
22327 2023-05-20 Andrew Pinski <apinski@marvell.com>
22329 * expr.cc (fold_single_bit_test): Take inner and bitnum
22330 instead of arg0 and arg1. Update the code.
22331 (do_store_flag): Don't create a tree when calling
22332 fold_single_bit_test instead just call it with the bitnum
22333 and the inner tree.
22335 2023-05-20 Andrew Pinski <apinski@marvell.com>
22337 * expr.cc (fold_single_bit_test): Use get_def_for_expr
22338 instead of checking the inner's code.
22340 2023-05-20 Andrew Pinski <apinski@marvell.com>
22342 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
22343 (fold_single_bit_test): This and simplify.
22345 2023-05-20 Andrew Pinski <apinski@marvell.com>
22347 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
22349 (fold_single_bit_test): Likewise.
22350 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
22351 (fold_single_bit_test): Likewise and make static.
22352 * fold-const.h (fold_single_bit_test): Remove declaration.
22354 2023-05-20 Die Li <lidie@eswincomputing.com>
22356 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
22359 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
22361 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
22363 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
22366 * config/riscv/bitmanip.md
22367 (<bitmanip_optab>disi2): Match with any_extend.
22368 (<bitmanip_optab>disi2_sext): New pattern to match
22369 with sign extend using an ANDI instruction.
22371 2023-05-19 Nathan Sidwell <nathan@acm.org>
22374 * opts.h (handle_deferred_dump_options): Declare.
22375 * opts-global.cc (handle_common_deferred_options): Do not handle
22377 (handle_deferred_dump_options): New.
22378 * toplev.cc (toplev::main): Call it after plugin init.
22380 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
22382 * config/riscv/constraints.md (DsS, DsD): Restore agreement
22383 with shiftm1 mode attribute.
22385 2023-05-19 Andrew Pinski <apinski@marvell.com>
22388 * gcc.cc (default_compilers["@c-header"]): Add %w
22389 after the --output-pch.
22391 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
22393 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
22394 to hival, ASHIFT the corresponding regs.
22396 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
22398 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
22400 2023-05-19 Jakub Jelinek <jakub@redhat.com>
22402 PR tree-optimization/105776
22403 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
22404 non-NULL, allow division statement to have a cast as single imm use
22405 rather than comparison/condition.
22406 (match_arith_overflow): In that case remove the cast stmt in addition
22407 to the division statement.
22409 2023-05-19 Jakub Jelinek <jakub@redhat.com>
22411 PR tree-optimization/101856
22412 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
22413 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
22414 support it but umul_highpart_optab does.
22416 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
22418 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
22419 of tree_to_shwi on array indices. Minor tweaks.
22421 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22423 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
22424 * attribs.cc (diag_attr_exclusions): Ditto.
22425 (decl_attributes): Ditto.
22426 (build_type_attribute_qual_variant): Ditto.
22427 * builtins.cc (fold_builtin_carg): Ditto.
22428 (fold_builtin_next_arg): Ditto.
22429 (do_mpc_arg2): Ditto.
22430 * cfgexpand.cc (expand_return): Ditto.
22431 * cgraph.h (decl_in_symtab_p): Ditto.
22432 (symtab_node::get_create): Ditto.
22433 * dwarf2out.cc (base_type_die): Ditto.
22434 (implicit_ptr_descriptor): Ditto.
22435 (gen_array_type_die): Ditto.
22436 (gen_type_die_with_usage): Ditto.
22437 (optimize_location_into_implicit_ptr): Ditto.
22438 * expr.cc (do_store_flag): Ditto.
22439 * fold-const.cc (negate_expr_p): Ditto.
22440 (fold_negate_expr_1): Ditto.
22441 (fold_convert_const): Ditto.
22442 (fold_convert_loc): Ditto.
22443 (constant_boolean_node): Ditto.
22444 (fold_binary_op_with_conditional_arg): Ditto.
22445 (build_fold_addr_expr_with_type_loc): Ditto.
22446 (fold_comparison): Ditto.
22447 (fold_checksum_tree): Ditto.
22448 (tree_unary_nonnegative_warnv_p): Ditto.
22449 (integer_valued_real_unary_p): Ditto.
22450 (fold_read_from_constant_string): Ditto.
22451 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
22452 * gimple-expr.cc (useless_type_conversion_p): Ditto.
22453 (is_gimple_reg): Ditto.
22454 (is_gimple_asm_val): Ditto.
22455 (mark_addressable): Ditto.
22456 * gimple-expr.h (is_gimple_variable): Ditto.
22457 (virtual_operand_p): Ditto.
22458 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
22459 * gimplify.cc (gimplify_bind_expr): Ditto.
22460 (gimplify_return_expr): Ditto.
22461 (gimple_add_padding_init_for_auto_var): Ditto.
22462 (gimplify_addr_expr): Ditto.
22463 (omp_add_variable): Ditto.
22464 (omp_notice_variable): Ditto.
22465 (omp_get_base_pointer): Ditto.
22466 (omp_strip_components_and_deref): Ditto.
22467 (omp_strip_indirections): Ditto.
22468 (omp_accumulate_sibling_list): Ditto.
22469 (omp_build_struct_sibling_lists): Ditto.
22470 (gimplify_adjust_omp_clauses_1): Ditto.
22471 (gimplify_adjust_omp_clauses): Ditto.
22472 (gimplify_omp_for): Ditto.
22473 (goa_lhs_expr_p): Ditto.
22474 (gimplify_one_sizepos): Ditto.
22475 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
22476 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
22477 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
22478 (propagate_controlled_uses): Ditto.
22479 * ipa-sra.cc (type_prevails_p): Ditto.
22480 (scan_expr_access): Ditto.
22481 * optabs-tree.cc (optab_for_tree_code): Ditto.
22482 * toplev.cc (wrapup_global_declaration_1): Ditto.
22483 * trans-mem.cc (transaction_invariant_address_p): Ditto.
22484 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
22485 (verify_gimple_comparison): Ditto.
22486 (verify_gimple_assign_binary): Ditto.
22487 (verify_gimple_assign_single): Ditto.
22488 * tree-complex.cc (get_component_ssa_name): Ditto.
22489 * tree-emutls.cc (lower_emutls_2): Ditto.
22490 * tree-inline.cc (copy_tree_body_r): Ditto.
22491 (estimate_move_cost): Ditto.
22492 (copy_decl_for_dup_finish): Ditto.
22493 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
22494 (note_nonlocal_vla_type): Ditto.
22495 (convert_local_omp_clauses): Ditto.
22496 (remap_vla_decls): Ditto.
22497 (fixup_vla_decls): Ditto.
22498 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
22499 * tree-pretty-print.cc (print_declaration): Ditto.
22500 (print_call_name): Ditto.
22501 * tree-sra.cc (compare_access_positions): Ditto.
22502 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
22503 * tree-ssa-ccp.cc (get_default_value): Ditto.
22504 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
22505 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
22506 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
22507 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
22508 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
22509 * tree-ssa-sink.cc (statement_sink_location): Ditto.
22510 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
22511 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
22512 * tree-ssa-uninit.cc (warn_uninit): Ditto.
22513 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
22514 (non_rewritable_mem_ref_base): Ditto.
22515 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
22516 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
22517 * tree-vect-generic.cc (do_binop): Ditto.
22519 * tree-vect-stmts.cc (vect_init_vector): Ditto.
22520 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
22521 * tree.cc (sign_mask_for): Ditto.
22522 (verify_type_variant): Ditto.
22523 (gimple_canonical_types_compatible_p): Ditto.
22524 (verify_type): Ditto.
22525 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
22526 * var-tracking.cc (prepare_call_arguments): Ditto.
22527 (vt_add_function_parameters): Ditto.
22528 * varasm.cc (decode_addr_const): Ditto.
22530 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22532 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
22533 (lower_reduction_clauses): Ditto.
22534 (lower_send_clauses): Ditto.
22535 (lower_omp_task_reductions): Ditto.
22536 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
22537 (worker_single_copy): Ditto.
22538 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
22539 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
22541 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22543 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
22545 (lto_read_body_or_constructor): Ditto.
22546 * lto-streamer-out.cc (tree_is_indexable): Ditto.
22547 (lto_output_var_decl_ref): Ditto.
22548 (DFS::DFS_write_tree_body): Ditto.
22549 (wrap_refs): Ditto.
22550 (write_symbol_extension_info): Ditto.
22552 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22554 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
22555 defines from tree.h.
22556 (aarch64_mangle_type): Ditto.
22557 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
22558 (alpha_gimplify_va_arg_1): Ditto.
22559 * config/arc/arc.cc (arc_encode_section_info): Ditto.
22560 (arc_is_aux_reg_p): Ditto.
22561 (arc_is_uncached_mem_p): Ditto.
22562 (arc_handle_aux_attribute): Ditto.
22563 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
22564 (arm_handle_cmse_nonsecure_call): Ditto.
22565 (arm_set_default_type_attributes): Ditto.
22566 (arm_is_segment_info_known): Ditto.
22567 (arm_mangle_type): Ditto.
22568 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
22569 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
22570 (avr_decl_absdata_p): Ditto.
22571 (avr_insert_attributes): Ditto.
22572 (avr_section_type_flags): Ditto.
22573 (avr_encode_section_info): Ditto.
22574 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
22575 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
22576 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
22577 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
22578 (csky_mangle_type): Ditto.
22579 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
22580 * config/darwin.cc (is_objc_metadata): Ditto.
22581 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
22582 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
22583 * config/frv/frv.cc (frv_emit_movsi): Ditto.
22584 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
22585 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
22586 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
22587 * config/i386/i386-expand.cc: Ditto.
22588 * config/i386/i386.cc (type_natural_mode): Ditto.
22589 (ix86_function_arg): Ditto.
22590 (ix86_data_alignment): Ditto.
22591 (ix86_local_alignment): Ditto.
22592 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
22593 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
22594 (i386_pe_type_dllexport_p): Ditto.
22595 (i386_pe_adjust_class_at_definition): Ditto.
22596 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
22597 (i386_pe_binds_local_p): Ditto.
22598 (i386_pe_section_type_flags): Ditto.
22599 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
22600 (ia64_gimplify_va_arg): Ditto.
22601 (ia64_in_small_data_p): Ditto.
22602 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
22603 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
22604 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
22605 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
22606 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
22607 (mcore_encode_section_info): Ditto.
22608 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
22609 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
22610 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
22611 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
22612 (pass_in_memory): Ditto.
22613 (nvptx_generate_vector_shuffle): Ditto.
22614 (nvptx_lockless_update): Ditto.
22615 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
22616 (pa_function_value): Ditto.
22617 (pa_function_arg): Ditto.
22618 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
22619 (TEXT_SPACE_P): Ditto.
22620 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
22621 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
22622 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
22623 (riscv_mangle_type): Ditto.
22624 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
22625 (rl78_addsi3_internal): Ditto.
22626 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
22627 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
22628 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
22629 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
22630 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
22631 (rs6000_function_arg_advance_1): Ditto.
22632 (rs6000_function_arg): Ditto.
22633 (rs6000_pass_by_reference): Ditto.
22634 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
22635 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
22636 (rs6000_set_default_type_attributes): Ditto.
22637 (rs6000_elf_in_small_data_p): Ditto.
22638 (IN_NAMED_SECTION): Ditto.
22639 (rs6000_xcoff_encode_section_info): Ditto.
22640 (rs6000_function_value): Ditto.
22641 (invalid_arg_for_unprototyped_fn): Ditto.
22642 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
22643 (s390_vec_n_elem): Ditto.
22644 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
22645 (s390_function_arg_integer): Ditto.
22646 (s390_return_in_memory): Ditto.
22647 (s390_encode_section_info): Ditto.
22648 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
22649 (sh_function_value): Ditto.
22650 * config/sol2.cc (solaris_insert_attributes): Ditto.
22651 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
22652 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
22653 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
22654 (xstormy16_handle_below100_attribute): Ditto.
22655 * config/v850/v850.cc (v850_encode_section_info): Ditto.
22656 (v850_insert_attributes): Ditto.
22657 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
22658 (visium_return_in_memory): Ditto.
22659 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
22661 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
22663 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
22664 (ix86_expand_vecop_qihi): Add op2vec bool variable.
22665 Do not set REG_EQUAL note.
22666 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
22668 * config/i386/i386.cc (ix86_multiplication_cost): Handle
22669 V4QImode and V8QImode.
22670 * config/i386/mmx.md (mulv8qi3): New expander.
22672 * config/i386/sse.md (mulv8qi3): Remove.
22674 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
22676 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
22678 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
22680 PR bootstrap/105831
22681 * config.gcc: Use = operator instead of ==.
22683 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
22685 PR bootstrap/105831
22686 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
22687 * configure.ac: Likewise.
22688 * configure: Regenerate.
22690 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22692 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
22693 (__ARM_mve_coerce1): Remove.
22694 (__ARM_mve_coerce2): Remove.
22695 (__ARM_mve_coerce3): Remove.
22696 (__ARM_mve_coerce_i_scalar): New.
22697 (__ARM_mve_coerce_s8_ptr): New.
22698 (__ARM_mve_coerce_u8_ptr): New.
22699 (__ARM_mve_coerce_s16_ptr): New.
22700 (__ARM_mve_coerce_u16_ptr): New.
22701 (__ARM_mve_coerce_s32_ptr): New.
22702 (__ARM_mve_coerce_u32_ptr): New.
22703 (__ARM_mve_coerce_s64_ptr): New.
22704 (__ARM_mve_coerce_u64_ptr): New.
22705 (__ARM_mve_coerce_f_scalar): New.
22706 (__ARM_mve_coerce_f16_ptr): New.
22707 (__ARM_mve_coerce_f32_ptr): New.
22708 (__arm_vst4q): Change _coerce_ overloads.
22709 (__arm_vbicq): Change _coerce_ overloads.
22710 (__arm_vld1q): Change _coerce_ overloads.
22711 (__arm_vld1q_z): Change _coerce_ overloads.
22712 (__arm_vld2q): Change _coerce_ overloads.
22713 (__arm_vld4q): Change _coerce_ overloads.
22714 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
22715 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
22716 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
22717 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
22718 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
22719 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
22720 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
22721 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
22722 (__arm_vst1q_p): Change _coerce_ overloads.
22723 (__arm_vst2q): Change _coerce_ overloads.
22724 (__arm_vst1q): Change _coerce_ overloads.
22725 (__arm_vstrhq): Change _coerce_ overloads.
22726 (__arm_vstrhq_p): Change _coerce_ overloads.
22727 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
22728 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
22729 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
22730 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
22731 (__arm_vstrwq_p): Change _coerce_ overloads.
22732 (__arm_vstrwq): Change _coerce_ overloads.
22733 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
22734 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
22735 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
22736 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
22737 (__arm_vsetq_lane): Change _coerce_ overloads.
22738 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
22739 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
22740 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
22741 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
22742 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
22743 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
22744 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
22745 (__arm_vidupq_x_u8): Change _coerce_ overloads.
22746 (__arm_vddupq_x_u8): Change _coerce_ overloads.
22747 (__arm_vidupq_x_u16): Change _coerce_ overloads.
22748 (__arm_vddupq_x_u16): Change _coerce_ overloads.
22749 (__arm_vidupq_x_u32): Change _coerce_ overloads.
22750 (__arm_vddupq_x_u32): Change _coerce_ overloads.
22751 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
22752 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
22753 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
22754 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
22755 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
22756 (__arm_vidupq_u16): Change _coerce_ overloads.
22757 (__arm_vidupq_u32): Change _coerce_ overloads.
22758 (__arm_vidupq_u8): Change _coerce_ overloads.
22759 (__arm_vddupq_u16): Change _coerce_ overloads.
22760 (__arm_vddupq_u32): Change _coerce_ overloads.
22761 (__arm_vddupq_u8): Change _coerce_ overloads.
22762 (__arm_viwdupq_m): Change _coerce_ overloads.
22763 (__arm_viwdupq_u16): Change _coerce_ overloads.
22764 (__arm_viwdupq_u32): Change _coerce_ overloads.
22765 (__arm_viwdupq_u8): Change _coerce_ overloads.
22766 (__arm_vdwdupq_m): Change _coerce_ overloads.
22767 (__arm_vdwdupq_u16): Change _coerce_ overloads.
22768 (__arm_vdwdupq_u32): Change _coerce_ overloads.
22769 (__arm_vdwdupq_u8): Change _coerce_ overloads.
22770 (__arm_vstrbq): Change _coerce_ overloads.
22771 (__arm_vstrbq_p): Change _coerce_ overloads.
22772 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
22773 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
22774 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
22775 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
22776 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
22778 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22780 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
22783 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22785 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
22786 (__arm_vadcq_u32): Likewise.
22787 (__arm_vadcq_m_s32): Likewise.
22788 (__arm_vadcq_m_u32): Likewise.
22789 (__arm_vsbcq_s32): Likewise.
22790 (__arm_vsbcq_u32): Likewise.
22791 (__arm_vsbcq_m_s32): Likewise.
22792 (__arm_vsbcq_m_u32): Likewise.
22793 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
22795 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
22797 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
22798 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
22799 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
22800 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
22801 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
22802 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
22803 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
22804 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
22805 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
22806 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
22807 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
22808 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
22809 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
22810 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
22811 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
22812 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
22813 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
22814 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
22815 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
22816 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
22817 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
22818 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
22819 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
22820 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
22821 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
22822 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
22823 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
22824 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
22825 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
22826 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
22827 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
22828 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
22829 (mve_vorrq_m_f<mode>)
22830 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
22831 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
22832 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
22833 capitalization in the emitted asm.
22835 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
22837 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
22839 (Ri): Move constraint definition from predicates.md.
22840 (Rl): Define new constraint.
22841 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
22842 missing constraint.
22843 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
22844 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
22845 op 2. Fix asm output spacing.
22846 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
22847 * config/arm/predicates.md (Ri) Move constraint to constraints.md
22848 (mve_vldrd_immediate): Move it from
22850 (mve_vstrw_immediate): New predicate.
22852 2023-05-18 Pan Li <pan2.li@intel.com>
22853 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22854 Kito Cheng <kito.cheng@sifive.com>
22855 Richard Biener <rguenther@suse.de>
22856 Richard Sandiford <richard.sandiford@arm.com>
22858 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
22859 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
22860 (struct table_elt): Extend machine_mode to 16 bits.
22861 (struct set): Ditto.
22862 * genmodes.cc (emit_mode_wider): Extend type from char to short.
22863 (emit_mode_complex): Ditto.
22864 (emit_mode_inner): Ditto.
22865 (emit_class_narrowest_mode): Ditto.
22866 * genopinit.cc (main): Extend the machine_mode limit.
22867 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
22868 re-ordered the struct fields for padding.
22869 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
22870 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
22871 (get_mode_alignment): Extend type from char to short.
22872 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
22873 removed the ATTRIBUTE_PACKED.
22874 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
22875 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
22876 m_kind to 2 bits and remove m_spare.
22877 * rtl.h (RTX_CODE_BITSIZE): New macro.
22878 (struct rtx_def): Swap both the bit size and location between the
22879 rtx_code and the machine_mode.
22880 (subreg_shape::unique_id): Extend the machine_mode limit.
22881 * rtlanal.h: Extend machine_mode to 16 bits.
22882 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
22883 bits and re-ordered the struct fields for padding.
22884 (struct tree_decl_common): Extend machine_mode to 16 bits.
22886 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
22888 * genrecog.cc (print_nonbool_test): Fix type error of
22889 switch (SUBREG_BYTE (op))'.
22891 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
22893 * common/config/riscv/riscv-common.cc: Remove
22894 trailing spaces on lines.
22895 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
22896 * config/riscv/riscv.h (enum reg_class): Likewise.
22897 * config/riscv/riscv.md: Likewise.
22899 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
22901 * config/pa/pa.md (clear_cache): New.
22903 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
22905 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
22906 parenthesis. Fix misnamed index entry.
22907 <concept>: Fix misnamed index entry.
22909 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22911 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
22913 (*<optab>si3_mask, *<optab>di3_mask): Here.
22914 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
22915 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
22917 (*<bitmanip_optab>si3_sext_mask): Likewise.
22918 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
22919 and const_di_mask_operand.
22920 (bitmanip_rotate): New iterator.
22921 (bitmanip_optab): Add rotates.
22922 * config/riscv/predicates.md (const_si_mask_operand): Renamed
22923 from const31_operand. Generalize to handle more mask constants.
22924 (const_di_mask_operand): Similarly.
22926 2023-05-17 Jakub Jelinek <jakub@redhat.com>
22929 * config/i386/i386-builtin-types.def (FLOAT128): Use
22930 float128t_type_node rather than float128_type_node.
22932 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
22934 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
22935 FP_CONTRACT_FAST (no functional change).
22937 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
22939 * config/i386/i386.cc (ix86_multiplication_cost): Correct
22940 calcuation of integer vector mode costs to reflect generated
22941 instruction sequences of different integer vector modes and
22942 different target ABIs.
22944 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22946 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
22947 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
22948 (riscv_mode_needed): Ditto.
22949 (riscv_mode_after): Ditto.
22950 (riscv_mode_entry): Ditto.
22951 (riscv_mode_exit): Ditto.
22952 (riscv_mode_priority): Ditto.
22953 (TARGET_MODE_EMIT): New target hook.
22954 (TARGET_MODE_NEEDED): Ditto.
22955 (TARGET_MODE_AFTER): Ditto.
22956 (TARGET_MODE_ENTRY): Ditto.
22957 (TARGET_MODE_EXIT): Ditto.
22958 (TARGET_MODE_PRIORITY): Ditto.
22959 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
22960 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
22961 * config/riscv/riscv.md: Add csrwvxrm.
22962 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
22963 (vxrmsi): New pattern.
22965 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22967 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
22968 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
22969 (struct narrow_alu_def): Ditto.
22970 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
22971 (function_expander::use_exact_insn): Ditto.
22972 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
22973 (function_base::has_rounding_mode_operand_p): New function.
22975 2023-05-17 Andrew Pinski <apinski@marvell.com>
22977 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
22978 against 0 instead of calling integer_zerop.
22980 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22982 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
22983 (DEF_RVV_VXRM_ENUM): New macro.
22984 (handle_pragma_vector): Add vxrm enum register.
22985 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
22991 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22993 * value-range.h (Value_Range::operator=): New.
22995 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22997 * value-range.cc (vrange::operator=): Add a stub to copy
22998 unsupported ranges.
22999 * value-range.h (is_a <unsupported_range>): New.
23000 (Value_Range::operator=): Support copying unsupported ranges.
23002 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
23004 * data-streamer-in.cc (streamer_read_real_value): New.
23005 (streamer_read_value_range): New.
23006 * data-streamer-out.cc (streamer_write_real_value): New.
23007 (streamer_write_vrange): New.
23008 * data-streamer.h (streamer_write_vrange): New.
23009 (streamer_read_value_range): New.
23011 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
23014 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
23015 is ignored for a fixed underlying type.
23016 (C++ Dialect Options): Likewise for -fstrict-enums.
23018 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
23020 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
23023 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
23025 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
23027 (s390_atomic_align_for_mode): New.
23029 2023-05-17 Jakub Jelinek <jakub@redhat.com>
23031 * wide-int.cc (wi::from_array): Add missing closing paren in function
23034 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
23036 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
23037 suggested unroll factor once the previous analysis fails.
23039 2023-05-17 Pan Li <pan2.li@intel.com>
23041 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
23043 (main): Add bool1 to the type indexer.
23044 * config/riscv/riscv-vector-builtins-functions.def
23045 (vreinterpret): Register vbool1 interpret function.
23046 * config/riscv/riscv-vector-builtins-types.def
23047 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
23048 (vint8m1_t): Add the type to bool1_interpret_ops.
23049 (vint16m1_t): Ditto.
23050 (vint32m1_t): Ditto.
23051 (vint64m1_t): Ditto.
23052 (vuint8m1_t): Ditto.
23053 (vuint16m1_t): Ditto.
23054 (vuint32m1_t): Ditto.
23055 (vuint64m1_t): Ditto.
23056 * config/riscv/riscv-vector-builtins.cc
23057 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
23058 (required_extensions_p): Add bool1 interpret case.
23059 * config/riscv/riscv-vector-builtins.def
23060 (bool1_interpret): Add bool1 interpret to base type.
23061 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
23062 with VB dest for vreinterpret.
23064 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
23067 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
23068 constants through "lis; xoris".
23070 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
23072 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
23073 default rs6000 target pass for O2 and above.
23074 * doc/invoke.texi: Document -free
23076 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
23078 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
23079 Fix wrong select_kind...
23081 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
23083 * config/s390/s390-protos.h (s390_expand_setmem): Change
23084 function signature.
23085 * config/s390/s390.cc (s390_expand_setmem): For memset's less
23086 than or equal to 256 byte do not perform a libc call.
23087 * config/s390/s390.md: Change expander into a version which
23090 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
23092 * config/s390/s390-protos.h (s390_expand_movmem): New.
23093 * config/s390/s390.cc (s390_expand_movmem): New.
23094 * config/s390/s390.md (movmem<mode>): New.
23098 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
23100 * config/s390/s390-protos.h (s390_expand_cpymem): Change
23101 function signature.
23102 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
23103 than or equal to 256 byte do not perform a libc call.
23104 (s390_expand_insv): Adapt new function signature of
23105 s390_expand_cpymem.
23106 * config/s390/s390.md: Change expander into a version which
23109 2023-05-16 Andrew Pinski <apinski@marvell.com>
23111 PR tree-optimization/109424
23112 * match.pd: Add patterns for min/max of zero_one_valued
23115 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23117 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
23118 * config/riscv/riscv-vector-builtins.cc
23119 (function_expander::use_ternop_insn): Add default rounding mode.
23120 (function_expander::use_widen_ternop_insn): Ditto.
23121 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
23122 (riscv_hard_regno_mode_ok): Ditto.
23123 (riscv_conditional_register_usage): Ditto.
23124 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
23125 (FRM_REG_P): Ditto.
23126 (RISCV_DWARF_FRM): Ditto.
23127 * config/riscv/riscv.md: Ditto.
23128 * config/riscv/vector-iterators.md: split no frm and has frm operations.
23129 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
23130 (@pred_<optab><mode>): Ditto.
23132 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
23134 PR tree-optimization/109695
23135 * value-range.cc (irange::operator=): Resize range.
23136 (irange::union_): Same.
23137 (irange::intersect): Same.
23138 (irange::invert): Same.
23139 (int_range_max): Default to 3 sub-ranges and resize as needed.
23140 * value-range.h (irange::maybe_resize): New.
23142 (int_range::int_range): Adjust for resizing.
23143 (int_range::operator=): Same.
23145 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
23147 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
23149 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
23150 when range changed.
23152 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23154 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
23155 * config/riscv/riscv-vector-builtins.cc
23156 (function_expander::use_exact_insn): Add default rounding mode operand.
23157 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
23158 (riscv_hard_regno_mode_ok): Ditto.
23159 (riscv_conditional_register_usage): Ditto.
23160 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
23161 (VXRM_REG_P): Ditto.
23162 (RISCV_DWARF_VXRM): Ditto.
23163 * config/riscv/riscv.md: Ditto.
23164 * config/riscv/vector.md: Ditto
23166 2023-05-15 Pan Li <pan2.li@intel.com>
23168 * optabs.cc (maybe_gen_insn): Add case to generate instruction
23169 that has 11 operands.
23171 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23173 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
23174 logic for vector modes.
23176 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23179 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
23180 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
23181 (aarch64_cmtst<mode>): Rename to...
23182 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
23183 (*aarch64_cmtst_same_<mode>): Rename to...
23184 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
23185 (*aarch64_cmtstdi): Rename to...
23186 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
23187 (aarch64_fac<optab><mode>): Rename to...
23188 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
23190 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
23193 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
23194 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
23196 2023-05-15 Pan Li <pan2.li@intel.com>
23197 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23198 kito-cheng <kito.cheng@sifive.com>
23200 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
23201 deciding the mode is constant or not.
23202 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
23204 2023-05-15 Richard Biener <rguenther@suse.de>
23206 PR tree-optimization/109848
23207 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
23208 TARGET_MEM_REF address preparation before the store, not
23211 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23213 * config/riscv/riscv.cc
23214 (riscv_vectorize_preferred_vector_alignment): New function.
23215 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
23217 2023-05-14 Andrew Pinski <apinski@marvell.com>
23219 PR tree-optimization/109829
23220 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
23222 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
23225 * config/i386/i386.cc: Revert the 2023-05-11 change.
23226 (ix86_widen_mult_cost): Return high value instead of
23227 ICEing for unsupported modes.
23229 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
23231 * config/i386/i386.cc (x86_function_profiler): Take
23232 ix86_direct_extern_access into account when generating calls
23235 2023-05-14 Pan Li <pan2.li@intel.com>
23237 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
23238 Refactor the or pattern to switch cases.
23240 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
23242 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
23243 aarch64_expand_vector_init to this, and remove interleaving case.
23244 Recursively call aarch64_expand_vector_init_fallback, instead of
23245 aarch64_expand_vector_init.
23246 (aarch64_unzip_vector_init): New function.
23247 (aarch64_expand_vector_init): Likewise.
23249 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
23251 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
23252 Pull out function call from the gcc_assert.
23254 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
23256 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
23257 (policy_to_str): New.
23258 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
23260 2023-05-13 Andrew Pinski <apinski@marvell.com>
23262 PR tree-optimization/109834
23263 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
23264 (popcount(rotate(x,y))->popcount(x)): Likewise.
23266 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
23268 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
23269 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
23270 gen_extend_insn to generate zero/sign extension instructions.
23272 (ix86_expand_vecop_qihi): Initialize interleave functions
23273 for MULT code only. Fix comments.
23275 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
23278 * config/i386/mmx.md (mulv2si3): Remove expander.
23279 (mulv2si3): Rename insn pattern from *mulv2si.
23281 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
23283 PR libstdc++/109816
23284 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
23285 '!lto_stream_offload_p'.
23287 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
23288 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23291 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
23292 (local_avl_compatible_p): New.
23293 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
23294 for LCM, rewrite as a backward algorithm.
23295 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
23296 interface, handle a BB at once.
23298 2023-05-12 Richard Biener <rguenther@suse.de>
23300 PR tree-optimization/64731
23301 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
23302 handle TARGET_MEM_REF destinations of stores from vector
23305 2023-05-12 Richard Biener <rguenther@suse.de>
23307 PR tree-optimization/109791
23308 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
23310 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
23313 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23315 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
23316 * config/arm/arm-mve-builtins-base.def (vsriq): New.
23317 * config/arm/arm-mve-builtins-base.h (vsriq): New.
23318 * config/arm/arm-mve-builtins.cc
23319 (function_instance::has_inactive_argument): Handle vsriq.
23320 * config/arm/arm_mve.h (vsriq): Remove.
23322 (vsriq_n_u8): Remove.
23323 (vsriq_n_s8): Remove.
23324 (vsriq_n_u16): Remove.
23325 (vsriq_n_s16): Remove.
23326 (vsriq_n_u32): Remove.
23327 (vsriq_n_s32): Remove.
23328 (vsriq_m_n_s8): Remove.
23329 (vsriq_m_n_u8): Remove.
23330 (vsriq_m_n_s16): Remove.
23331 (vsriq_m_n_u16): Remove.
23332 (vsriq_m_n_s32): Remove.
23333 (vsriq_m_n_u32): Remove.
23334 (__arm_vsriq_n_u8): Remove.
23335 (__arm_vsriq_n_s8): Remove.
23336 (__arm_vsriq_n_u16): Remove.
23337 (__arm_vsriq_n_s16): Remove.
23338 (__arm_vsriq_n_u32): Remove.
23339 (__arm_vsriq_n_s32): Remove.
23340 (__arm_vsriq_m_n_s8): Remove.
23341 (__arm_vsriq_m_n_u8): Remove.
23342 (__arm_vsriq_m_n_s16): Remove.
23343 (__arm_vsriq_m_n_u16): Remove.
23344 (__arm_vsriq_m_n_s32): Remove.
23345 (__arm_vsriq_m_n_u32): Remove.
23346 (__arm_vsriq): Remove.
23347 (__arm_vsriq_m): Remove.
23349 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23351 * config/arm/iterators.md (mve_insn): Add vsri.
23352 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
23353 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
23354 (mve_vsriq_m_n_<supf><mode>): Rename into ...
23355 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23357 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23359 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
23360 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
23362 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23364 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
23365 * config/arm/arm-mve-builtins-base.def (vsliq): New.
23366 * config/arm/arm-mve-builtins-base.h (vsliq): New.
23367 * config/arm/arm-mve-builtins.cc
23368 (function_instance::has_inactive_argument): Handle vsliq.
23369 * config/arm/arm_mve.h (vsliq): Remove.
23371 (vsliq_n_u8): Remove.
23372 (vsliq_n_s8): Remove.
23373 (vsliq_n_u16): Remove.
23374 (vsliq_n_s16): Remove.
23375 (vsliq_n_u32): Remove.
23376 (vsliq_n_s32): Remove.
23377 (vsliq_m_n_s8): Remove.
23378 (vsliq_m_n_s32): Remove.
23379 (vsliq_m_n_s16): Remove.
23380 (vsliq_m_n_u8): Remove.
23381 (vsliq_m_n_u32): Remove.
23382 (vsliq_m_n_u16): Remove.
23383 (__arm_vsliq_n_u8): Remove.
23384 (__arm_vsliq_n_s8): Remove.
23385 (__arm_vsliq_n_u16): Remove.
23386 (__arm_vsliq_n_s16): Remove.
23387 (__arm_vsliq_n_u32): Remove.
23388 (__arm_vsliq_n_s32): Remove.
23389 (__arm_vsliq_m_n_s8): Remove.
23390 (__arm_vsliq_m_n_s32): Remove.
23391 (__arm_vsliq_m_n_s16): Remove.
23392 (__arm_vsliq_m_n_u8): Remove.
23393 (__arm_vsliq_m_n_u32): Remove.
23394 (__arm_vsliq_m_n_u16): Remove.
23395 (__arm_vsliq): Remove.
23396 (__arm_vsliq_m): Remove.
23398 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23400 * config/arm/iterators.md (mve_insn>): Add vsli.
23401 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
23402 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23403 (mve_vsliq_m_n_<supf><mode>): Rename into ...
23404 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23406 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23408 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
23409 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
23411 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23413 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
23414 * config/arm/arm-mve-builtins-base.def (vpselq): New.
23415 * config/arm/arm-mve-builtins-base.h (vpselq): New.
23416 * config/arm/arm_mve.h (vpselq): Remove.
23417 (vpselq_u8): Remove.
23418 (vpselq_s8): Remove.
23419 (vpselq_u16): Remove.
23420 (vpselq_s16): Remove.
23421 (vpselq_u32): Remove.
23422 (vpselq_s32): Remove.
23423 (vpselq_u64): Remove.
23424 (vpselq_s64): Remove.
23425 (vpselq_f16): Remove.
23426 (vpselq_f32): Remove.
23427 (__arm_vpselq_u8): Remove.
23428 (__arm_vpselq_s8): Remove.
23429 (__arm_vpselq_u16): Remove.
23430 (__arm_vpselq_s16): Remove.
23431 (__arm_vpselq_u32): Remove.
23432 (__arm_vpselq_s32): Remove.
23433 (__arm_vpselq_u64): Remove.
23434 (__arm_vpselq_s64): Remove.
23435 (__arm_vpselq_f16): Remove.
23436 (__arm_vpselq_f32): Remove.
23437 (__arm_vpselq): Remove.
23439 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23441 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
23442 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
23444 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23446 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
23448 * config/arm/iterators.md (MVE_VPSELQ_F): New.
23449 (mve_insn): Add vpsel.
23450 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
23451 (@mve_<mve_insn>q_<supf><mode>): ... this.
23452 (@mve_vpselq_f<mode>): Rename into ...
23453 (@mve_<mve_insn>q_f<mode>): ... this.
23455 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23457 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
23458 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
23459 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
23460 * config/arm/arm-mve-builtins.cc
23461 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
23463 * config/arm/arm_mve.h (vfmaq): Remove.
23467 (vfmasq_m): Remove.
23469 (vfmaq_f16): Remove.
23470 (vfmaq_n_f16): Remove.
23471 (vfmasq_n_f16): Remove.
23472 (vfmsq_f16): Remove.
23473 (vfmaq_f32): Remove.
23474 (vfmaq_n_f32): Remove.
23475 (vfmasq_n_f32): Remove.
23476 (vfmsq_f32): Remove.
23477 (vfmaq_m_f32): Remove.
23478 (vfmaq_m_f16): Remove.
23479 (vfmaq_m_n_f32): Remove.
23480 (vfmaq_m_n_f16): Remove.
23481 (vfmasq_m_n_f32): Remove.
23482 (vfmasq_m_n_f16): Remove.
23483 (vfmsq_m_f32): Remove.
23484 (vfmsq_m_f16): Remove.
23485 (__arm_vfmaq_f16): Remove.
23486 (__arm_vfmaq_n_f16): Remove.
23487 (__arm_vfmasq_n_f16): Remove.
23488 (__arm_vfmsq_f16): Remove.
23489 (__arm_vfmaq_f32): Remove.
23490 (__arm_vfmaq_n_f32): Remove.
23491 (__arm_vfmasq_n_f32): Remove.
23492 (__arm_vfmsq_f32): Remove.
23493 (__arm_vfmaq_m_f32): Remove.
23494 (__arm_vfmaq_m_f16): Remove.
23495 (__arm_vfmaq_m_n_f32): Remove.
23496 (__arm_vfmaq_m_n_f16): Remove.
23497 (__arm_vfmasq_m_n_f32): Remove.
23498 (__arm_vfmasq_m_n_f16): Remove.
23499 (__arm_vfmsq_m_f32): Remove.
23500 (__arm_vfmsq_m_f16): Remove.
23501 (__arm_vfmaq): Remove.
23502 (__arm_vfmasq): Remove.
23503 (__arm_vfmsq): Remove.
23504 (__arm_vfmaq_m): Remove.
23505 (__arm_vfmasq_m): Remove.
23506 (__arm_vfmsq_m): Remove.
23508 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23510 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
23512 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
23513 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
23514 (mve_insn): Add vfma, vfmas, vfms.
23515 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
23517 (@mve_<mve_insn>q_f<mode>): ... this.
23518 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
23519 (@mve_<mve_insn>q_n_f<mode>): ... this.
23520 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
23521 @mve_<mve_insn>q_m_f<mode>.
23522 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
23523 @mve_<mve_insn>q_m_n_f<mode>.
23525 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23527 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
23528 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
23530 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23532 * config/arm/arm-mve-builtins-base.cc
23533 (FUNCTION_WITH_RTX_M_N_NO_F): New.
23535 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
23536 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
23537 * config/arm/arm_mve.h (vmvnq): Remove.
23540 (vmvnq_s8): Remove.
23541 (vmvnq_s16): Remove.
23542 (vmvnq_s32): Remove.
23543 (vmvnq_n_s16): Remove.
23544 (vmvnq_n_s32): Remove.
23545 (vmvnq_u8): Remove.
23546 (vmvnq_u16): Remove.
23547 (vmvnq_u32): Remove.
23548 (vmvnq_n_u16): Remove.
23549 (vmvnq_n_u32): Remove.
23550 (vmvnq_m_u8): Remove.
23551 (vmvnq_m_s8): Remove.
23552 (vmvnq_m_u16): Remove.
23553 (vmvnq_m_s16): Remove.
23554 (vmvnq_m_u32): Remove.
23555 (vmvnq_m_s32): Remove.
23556 (vmvnq_m_n_s16): Remove.
23557 (vmvnq_m_n_u16): Remove.
23558 (vmvnq_m_n_s32): Remove.
23559 (vmvnq_m_n_u32): Remove.
23560 (vmvnq_x_s8): Remove.
23561 (vmvnq_x_s16): Remove.
23562 (vmvnq_x_s32): Remove.
23563 (vmvnq_x_u8): Remove.
23564 (vmvnq_x_u16): Remove.
23565 (vmvnq_x_u32): Remove.
23566 (vmvnq_x_n_s16): Remove.
23567 (vmvnq_x_n_s32): Remove.
23568 (vmvnq_x_n_u16): Remove.
23569 (vmvnq_x_n_u32): Remove.
23570 (__arm_vmvnq_s8): Remove.
23571 (__arm_vmvnq_s16): Remove.
23572 (__arm_vmvnq_s32): Remove.
23573 (__arm_vmvnq_n_s16): Remove.
23574 (__arm_vmvnq_n_s32): Remove.
23575 (__arm_vmvnq_u8): Remove.
23576 (__arm_vmvnq_u16): Remove.
23577 (__arm_vmvnq_u32): Remove.
23578 (__arm_vmvnq_n_u16): Remove.
23579 (__arm_vmvnq_n_u32): Remove.
23580 (__arm_vmvnq_m_u8): Remove.
23581 (__arm_vmvnq_m_s8): Remove.
23582 (__arm_vmvnq_m_u16): Remove.
23583 (__arm_vmvnq_m_s16): Remove.
23584 (__arm_vmvnq_m_u32): Remove.
23585 (__arm_vmvnq_m_s32): Remove.
23586 (__arm_vmvnq_m_n_s16): Remove.
23587 (__arm_vmvnq_m_n_u16): Remove.
23588 (__arm_vmvnq_m_n_s32): Remove.
23589 (__arm_vmvnq_m_n_u32): Remove.
23590 (__arm_vmvnq_x_s8): Remove.
23591 (__arm_vmvnq_x_s16): Remove.
23592 (__arm_vmvnq_x_s32): Remove.
23593 (__arm_vmvnq_x_u8): Remove.
23594 (__arm_vmvnq_x_u16): Remove.
23595 (__arm_vmvnq_x_u32): Remove.
23596 (__arm_vmvnq_x_n_s16): Remove.
23597 (__arm_vmvnq_x_n_s32): Remove.
23598 (__arm_vmvnq_x_n_u16): Remove.
23599 (__arm_vmvnq_x_n_u32): Remove.
23600 (__arm_vmvnq): Remove.
23601 (__arm_vmvnq_m): Remove.
23602 (__arm_vmvnq_x): Remove.
23604 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23606 * config/arm/iterators.md (mve_insn): Add vmvn.
23607 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
23608 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23609 (mve_vmvnq_m_<supf><mode>): Rename into ...
23610 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23611 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
23612 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23614 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23616 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
23617 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
23619 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23621 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
23622 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
23623 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
23624 * config/arm/arm_mve.h (vbrsrq): Remove.
23625 (vbrsrq_m): Remove.
23626 (vbrsrq_x): Remove.
23627 (vbrsrq_n_f16): Remove.
23628 (vbrsrq_n_f32): Remove.
23629 (vbrsrq_n_u8): Remove.
23630 (vbrsrq_n_s8): Remove.
23631 (vbrsrq_n_u16): Remove.
23632 (vbrsrq_n_s16): Remove.
23633 (vbrsrq_n_u32): Remove.
23634 (vbrsrq_n_s32): Remove.
23635 (vbrsrq_m_n_s8): Remove.
23636 (vbrsrq_m_n_s32): Remove.
23637 (vbrsrq_m_n_s16): Remove.
23638 (vbrsrq_m_n_u8): Remove.
23639 (vbrsrq_m_n_u32): Remove.
23640 (vbrsrq_m_n_u16): Remove.
23641 (vbrsrq_m_n_f32): Remove.
23642 (vbrsrq_m_n_f16): Remove.
23643 (vbrsrq_x_n_s8): Remove.
23644 (vbrsrq_x_n_s16): Remove.
23645 (vbrsrq_x_n_s32): Remove.
23646 (vbrsrq_x_n_u8): Remove.
23647 (vbrsrq_x_n_u16): Remove.
23648 (vbrsrq_x_n_u32): Remove.
23649 (vbrsrq_x_n_f16): Remove.
23650 (vbrsrq_x_n_f32): Remove.
23651 (__arm_vbrsrq_n_u8): Remove.
23652 (__arm_vbrsrq_n_s8): Remove.
23653 (__arm_vbrsrq_n_u16): Remove.
23654 (__arm_vbrsrq_n_s16): Remove.
23655 (__arm_vbrsrq_n_u32): Remove.
23656 (__arm_vbrsrq_n_s32): Remove.
23657 (__arm_vbrsrq_m_n_s8): Remove.
23658 (__arm_vbrsrq_m_n_s32): Remove.
23659 (__arm_vbrsrq_m_n_s16): Remove.
23660 (__arm_vbrsrq_m_n_u8): Remove.
23661 (__arm_vbrsrq_m_n_u32): Remove.
23662 (__arm_vbrsrq_m_n_u16): Remove.
23663 (__arm_vbrsrq_x_n_s8): Remove.
23664 (__arm_vbrsrq_x_n_s16): Remove.
23665 (__arm_vbrsrq_x_n_s32): Remove.
23666 (__arm_vbrsrq_x_n_u8): Remove.
23667 (__arm_vbrsrq_x_n_u16): Remove.
23668 (__arm_vbrsrq_x_n_u32): Remove.
23669 (__arm_vbrsrq_n_f16): Remove.
23670 (__arm_vbrsrq_n_f32): Remove.
23671 (__arm_vbrsrq_m_n_f32): Remove.
23672 (__arm_vbrsrq_m_n_f16): Remove.
23673 (__arm_vbrsrq_x_n_f16): Remove.
23674 (__arm_vbrsrq_x_n_f32): Remove.
23675 (__arm_vbrsrq): Remove.
23676 (__arm_vbrsrq_m): Remove.
23677 (__arm_vbrsrq_x): Remove.
23679 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23681 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
23682 (mve_insn): Add vbrsr.
23683 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
23684 (@mve_<mve_insn>q_n_f<mode>): ... this.
23685 (mve_vbrsrq_n_<supf><mode>): Rename into ...
23686 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23687 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
23688 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23689 (mve_vbrsrq_m_n_f<mode>): Rename into ...
23690 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
23692 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23694 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
23695 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
23697 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23699 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
23700 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
23701 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
23702 * config/arm/arm_mve.h (vqshluq): Remove.
23703 (vqshluq_m): Remove.
23704 (vqshluq_n_s8): Remove.
23705 (vqshluq_n_s16): Remove.
23706 (vqshluq_n_s32): Remove.
23707 (vqshluq_m_n_s8): Remove.
23708 (vqshluq_m_n_s16): Remove.
23709 (vqshluq_m_n_s32): Remove.
23710 (__arm_vqshluq_n_s8): Remove.
23711 (__arm_vqshluq_n_s16): Remove.
23712 (__arm_vqshluq_n_s32): Remove.
23713 (__arm_vqshluq_m_n_s8): Remove.
23714 (__arm_vqshluq_m_n_s16): Remove.
23715 (__arm_vqshluq_m_n_s32): Remove.
23716 (__arm_vqshluq): Remove.
23717 (__arm_vqshluq_m): Remove.
23719 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23721 * config/arm/iterators.md (mve_insn): Add vqshlu.
23722 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
23723 (VQSHLUQ_M_N, VQSHLUQ_N): New.
23724 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
23725 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23726 (mve_vqshluq_m_n_s<mode>): Change name into ...
23727 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23729 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23731 * config/arm/arm-mve-builtins-shapes.cc
23732 (binary_lshift_unsigned): New.
23733 * config/arm/arm-mve-builtins-shapes.h
23734 (binary_lshift_unsigned): New.
23736 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23738 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
23739 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23740 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
23741 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23742 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
23743 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23744 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
23745 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
23746 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
23747 (vrmlaldavhaxq): Remove.
23748 (vrmlsldavhaq): Remove.
23749 (vrmlsldavhaxq): Remove.
23750 (vrmlaldavhaq_p): Remove.
23751 (vrmlaldavhaxq_p): Remove.
23752 (vrmlsldavhaq_p): Remove.
23753 (vrmlsldavhaxq_p): Remove.
23754 (vrmlaldavhaq_s32): Remove.
23755 (vrmlaldavhaq_u32): Remove.
23756 (vrmlaldavhaxq_s32): Remove.
23757 (vrmlsldavhaq_s32): Remove.
23758 (vrmlsldavhaxq_s32): Remove.
23759 (vrmlaldavhaq_p_s32): Remove.
23760 (vrmlaldavhaq_p_u32): Remove.
23761 (vrmlaldavhaxq_p_s32): Remove.
23762 (vrmlsldavhaq_p_s32): Remove.
23763 (vrmlsldavhaxq_p_s32): Remove.
23764 (__arm_vrmlaldavhaq_s32): Remove.
23765 (__arm_vrmlaldavhaq_u32): Remove.
23766 (__arm_vrmlaldavhaxq_s32): Remove.
23767 (__arm_vrmlsldavhaq_s32): Remove.
23768 (__arm_vrmlsldavhaxq_s32): Remove.
23769 (__arm_vrmlaldavhaq_p_s32): Remove.
23770 (__arm_vrmlaldavhaq_p_u32): Remove.
23771 (__arm_vrmlaldavhaxq_p_s32): Remove.
23772 (__arm_vrmlsldavhaq_p_s32): Remove.
23773 (__arm_vrmlsldavhaxq_p_s32): Remove.
23774 (__arm_vrmlaldavhaq): Remove.
23775 (__arm_vrmlaldavhaxq): Remove.
23776 (__arm_vrmlsldavhaq): Remove.
23777 (__arm_vrmlsldavhaxq): Remove.
23778 (__arm_vrmlaldavhaq_p): Remove.
23779 (__arm_vrmlaldavhaxq_p): Remove.
23780 (__arm_vrmlsldavhaq_p): Remove.
23781 (__arm_vrmlsldavhaxq_p): Remove.
23783 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23785 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
23786 (MVE_VRMLxLDAVHAxQ_P): New.
23787 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
23789 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
23790 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
23792 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
23793 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
23794 (mve_vrmlsldavhaq_sv4si): Merge into ...
23795 (@mve_<mve_insn>q_<supf>v4si): ... this.
23796 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
23797 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
23798 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
23799 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23801 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23803 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
23804 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
23806 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
23807 * config/arm/arm_mve.h (vqdmulltq): Remove.
23808 (vqdmullbq): Remove.
23809 (vqdmullbq_m): Remove.
23810 (vqdmulltq_m): Remove.
23811 (vqdmulltq_s16): Remove.
23812 (vqdmulltq_n_s16): Remove.
23813 (vqdmullbq_s16): Remove.
23814 (vqdmullbq_n_s16): Remove.
23815 (vqdmulltq_s32): Remove.
23816 (vqdmulltq_n_s32): Remove.
23817 (vqdmullbq_s32): Remove.
23818 (vqdmullbq_n_s32): Remove.
23819 (vqdmullbq_m_n_s32): Remove.
23820 (vqdmullbq_m_n_s16): Remove.
23821 (vqdmullbq_m_s32): Remove.
23822 (vqdmullbq_m_s16): Remove.
23823 (vqdmulltq_m_n_s32): Remove.
23824 (vqdmulltq_m_n_s16): Remove.
23825 (vqdmulltq_m_s32): Remove.
23826 (vqdmulltq_m_s16): Remove.
23827 (__arm_vqdmulltq_s16): Remove.
23828 (__arm_vqdmulltq_n_s16): Remove.
23829 (__arm_vqdmullbq_s16): Remove.
23830 (__arm_vqdmullbq_n_s16): Remove.
23831 (__arm_vqdmulltq_s32): Remove.
23832 (__arm_vqdmulltq_n_s32): Remove.
23833 (__arm_vqdmullbq_s32): Remove.
23834 (__arm_vqdmullbq_n_s32): Remove.
23835 (__arm_vqdmullbq_m_n_s32): Remove.
23836 (__arm_vqdmullbq_m_n_s16): Remove.
23837 (__arm_vqdmullbq_m_s32): Remove.
23838 (__arm_vqdmullbq_m_s16): Remove.
23839 (__arm_vqdmulltq_m_n_s32): Remove.
23840 (__arm_vqdmulltq_m_n_s16): Remove.
23841 (__arm_vqdmulltq_m_s32): Remove.
23842 (__arm_vqdmulltq_m_s16): Remove.
23843 (__arm_vqdmulltq): Remove.
23844 (__arm_vqdmullbq): Remove.
23845 (__arm_vqdmullbq_m): Remove.
23846 (__arm_vqdmulltq_m): Remove.
23848 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23850 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
23851 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
23852 (mve_insn): Add vqdmullb, vqdmullt.
23853 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
23854 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
23856 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
23857 (mve_vqdmulltq_n_s<mode>): Merge into ...
23858 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23859 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
23860 (@mve_<mve_insn>q_<supf><mode>): ... this.
23861 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
23863 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23864 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
23865 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23867 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23869 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
23870 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
23872 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
23874 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
23875 Drop unused parameter.
23876 (riscv_select_multilib): Ditto.
23877 (riscv_compute_multilib): Update call site of
23878 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
23880 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
23882 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
23883 * config/riscv/riscv-protos.h (expand_vec_init): New function.
23884 * config/riscv/riscv-v.cc (class rvv_builder): New class.
23885 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
23886 (rvv_builder::get_merged_repeating_sequence): Ditto.
23887 (expand_vector_init_insert_elems): Ditto.
23888 (expand_vec_init): Ditto.
23889 * config/riscv/vector-iterators.md: New attribute.
23891 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23893 * config/rs6000/rs6000-builtins.def
23894 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
23896 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
23897 xsiexpdpf to xsiexpdpf_di.
23898 * config/rs6000/vsx.md (xsiexpdp): Rename to...
23899 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
23900 replace TARGET_64BIT with TARGET_POWERPC64.
23901 (xsiexpdpf): Rename to...
23902 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
23903 replace TARGET_64BIT with TARGET_POWERPC64.
23905 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23907 * config/rs6000/rs6000-builtins.def
23908 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
23910 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
23913 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23915 * config/rs6000/rs6000-builtins.def
23916 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
23917 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
23919 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
23920 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
23921 TARGET_64BIT check.
23922 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
23923 requirement when it has a 64-bit argument.
23925 2023-05-12 Pan Li <pan2.li@intel.com>
23926 Richard Sandiford <richard.sandiford@arm.com>
23927 Richard Biener <rguenther@suse.de>
23928 Jakub Jelinek <jakub@redhat.com>
23930 * mux-utils.h: Add overload operator == and != for pointer_mux.
23931 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
23932 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
23933 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
23934 (dv_as_decl): Ditto.
23935 (dv_as_opaque): Removed due to unnecessary.
23936 (struct variable_hasher): Take decl_or_value as compare_type.
23937 (variable_hasher::equal): Diito.
23938 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
23939 (dv_from_value): Ditto.
23940 (attrs_list_member): Ditto.
23941 (vars_copy): Ditto.
23942 (var_reg_decl_set): Ditto.
23943 (var_reg_delete_and_set): Ditto.
23944 (find_loc_in_1pdv): Ditto.
23945 (canonicalize_values_star): Ditto.
23946 (variable_post_merge_new_vals): Ditto.
23947 (dump_onepart_variable_differences): Ditto.
23948 (variable_different_p): Ditto.
23949 (set_slot_part): Ditto.
23950 (clobber_slot_part): Ditto.
23951 (clobber_variable_part): Ditto.
23953 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
23955 * match.pd: simplify vector shift + bit_and + multiply.
23957 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23959 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
23960 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23961 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
23962 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23963 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
23964 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23965 * config/arm/arm-mve-builtins.cc
23966 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
23967 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
23968 * config/arm/arm_mve.h (vqrdmlashq): Remove.
23969 (vqrdmlahq): Remove.
23970 (vqdmlashq): Remove.
23971 (vqdmlahq): Remove.
23975 (vmlasq_m): Remove.
23976 (vqdmlashq_m): Remove.
23977 (vqdmlahq_m): Remove.
23978 (vqrdmlahq_m): Remove.
23979 (vqrdmlashq_m): Remove.
23980 (vmlasq_n_u8): Remove.
23981 (vmlaq_n_u8): Remove.
23982 (vqrdmlashq_n_s8): Remove.
23983 (vqrdmlahq_n_s8): Remove.
23984 (vqdmlahq_n_s8): Remove.
23985 (vqdmlashq_n_s8): Remove.
23986 (vmlasq_n_s8): Remove.
23987 (vmlaq_n_s8): Remove.
23988 (vmlasq_n_u16): Remove.
23989 (vmlaq_n_u16): Remove.
23990 (vqrdmlashq_n_s16): Remove.
23991 (vqrdmlahq_n_s16): Remove.
23992 (vqdmlashq_n_s16): Remove.
23993 (vqdmlahq_n_s16): Remove.
23994 (vmlasq_n_s16): Remove.
23995 (vmlaq_n_s16): Remove.
23996 (vmlasq_n_u32): Remove.
23997 (vmlaq_n_u32): Remove.
23998 (vqrdmlashq_n_s32): Remove.
23999 (vqrdmlahq_n_s32): Remove.
24000 (vqdmlashq_n_s32): Remove.
24001 (vqdmlahq_n_s32): Remove.
24002 (vmlasq_n_s32): Remove.
24003 (vmlaq_n_s32): Remove.
24004 (vmlaq_m_n_s8): Remove.
24005 (vmlaq_m_n_s32): Remove.
24006 (vmlaq_m_n_s16): Remove.
24007 (vmlaq_m_n_u8): Remove.
24008 (vmlaq_m_n_u32): Remove.
24009 (vmlaq_m_n_u16): Remove.
24010 (vmlasq_m_n_s8): Remove.
24011 (vmlasq_m_n_s32): Remove.
24012 (vmlasq_m_n_s16): Remove.
24013 (vmlasq_m_n_u8): Remove.
24014 (vmlasq_m_n_u32): Remove.
24015 (vmlasq_m_n_u16): Remove.
24016 (vqdmlashq_m_n_s8): Remove.
24017 (vqdmlashq_m_n_s32): Remove.
24018 (vqdmlashq_m_n_s16): Remove.
24019 (vqdmlahq_m_n_s8): Remove.
24020 (vqdmlahq_m_n_s32): Remove.
24021 (vqdmlahq_m_n_s16): Remove.
24022 (vqrdmlahq_m_n_s8): Remove.
24023 (vqrdmlahq_m_n_s32): Remove.
24024 (vqrdmlahq_m_n_s16): Remove.
24025 (vqrdmlashq_m_n_s8): Remove.
24026 (vqrdmlashq_m_n_s32): Remove.
24027 (vqrdmlashq_m_n_s16): Remove.
24028 (__arm_vmlasq_n_u8): Remove.
24029 (__arm_vmlaq_n_u8): Remove.
24030 (__arm_vqrdmlashq_n_s8): Remove.
24031 (__arm_vqdmlashq_n_s8): Remove.
24032 (__arm_vqrdmlahq_n_s8): Remove.
24033 (__arm_vqdmlahq_n_s8): Remove.
24034 (__arm_vmlasq_n_s8): Remove.
24035 (__arm_vmlaq_n_s8): Remove.
24036 (__arm_vmlasq_n_u16): Remove.
24037 (__arm_vmlaq_n_u16): Remove.
24038 (__arm_vqrdmlashq_n_s16): Remove.
24039 (__arm_vqdmlashq_n_s16): Remove.
24040 (__arm_vqrdmlahq_n_s16): Remove.
24041 (__arm_vqdmlahq_n_s16): Remove.
24042 (__arm_vmlasq_n_s16): Remove.
24043 (__arm_vmlaq_n_s16): Remove.
24044 (__arm_vmlasq_n_u32): Remove.
24045 (__arm_vmlaq_n_u32): Remove.
24046 (__arm_vqrdmlashq_n_s32): Remove.
24047 (__arm_vqdmlashq_n_s32): Remove.
24048 (__arm_vqrdmlahq_n_s32): Remove.
24049 (__arm_vqdmlahq_n_s32): Remove.
24050 (__arm_vmlasq_n_s32): Remove.
24051 (__arm_vmlaq_n_s32): Remove.
24052 (__arm_vmlaq_m_n_s8): Remove.
24053 (__arm_vmlaq_m_n_s32): Remove.
24054 (__arm_vmlaq_m_n_s16): Remove.
24055 (__arm_vmlaq_m_n_u8): Remove.
24056 (__arm_vmlaq_m_n_u32): Remove.
24057 (__arm_vmlaq_m_n_u16): Remove.
24058 (__arm_vmlasq_m_n_s8): Remove.
24059 (__arm_vmlasq_m_n_s32): Remove.
24060 (__arm_vmlasq_m_n_s16): Remove.
24061 (__arm_vmlasq_m_n_u8): Remove.
24062 (__arm_vmlasq_m_n_u32): Remove.
24063 (__arm_vmlasq_m_n_u16): Remove.
24064 (__arm_vqdmlahq_m_n_s8): Remove.
24065 (__arm_vqdmlahq_m_n_s32): Remove.
24066 (__arm_vqdmlahq_m_n_s16): Remove.
24067 (__arm_vqrdmlahq_m_n_s8): Remove.
24068 (__arm_vqrdmlahq_m_n_s32): Remove.
24069 (__arm_vqrdmlahq_m_n_s16): Remove.
24070 (__arm_vqrdmlashq_m_n_s8): Remove.
24071 (__arm_vqrdmlashq_m_n_s32): Remove.
24072 (__arm_vqrdmlashq_m_n_s16): Remove.
24073 (__arm_vqdmlashq_m_n_s8): Remove.
24074 (__arm_vqdmlashq_m_n_s16): Remove.
24075 (__arm_vqdmlashq_m_n_s32): Remove.
24076 (__arm_vmlasq): Remove.
24077 (__arm_vmlaq): Remove.
24078 (__arm_vqrdmlashq): Remove.
24079 (__arm_vqdmlashq): Remove.
24080 (__arm_vqrdmlahq): Remove.
24081 (__arm_vqdmlahq): Remove.
24082 (__arm_vmlaq_m): Remove.
24083 (__arm_vmlasq_m): Remove.
24084 (__arm_vqdmlahq_m): Remove.
24085 (__arm_vqrdmlahq_m): Remove.
24086 (__arm_vqrdmlashq_m): Remove.
24087 (__arm_vqdmlashq_m): Remove.
24089 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24091 * config/arm/iterators.md (MVE_VMLxQ_N): New.
24092 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
24094 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
24096 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
24097 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
24098 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
24099 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
24100 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24102 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24104 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
24105 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
24107 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24109 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
24110 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
24111 (vqrdmlsdhxq): New.
24112 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
24113 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
24114 (vqrdmlsdhxq): New.
24115 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
24116 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
24117 (vqrdmlsdhxq): New.
24118 * config/arm/arm-mve-builtins.cc
24119 (function_instance::has_inactive_argument): Handle vqrdmladhq,
24120 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
24121 vqdmlsdhq, vqdmlsdhxq.
24122 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
24123 (vqrdmlsdhq): Remove.
24124 (vqrdmladhxq): Remove.
24125 (vqrdmladhq): Remove.
24126 (vqdmlsdhxq): Remove.
24127 (vqdmlsdhq): Remove.
24128 (vqdmladhxq): Remove.
24129 (vqdmladhq): Remove.
24130 (vqdmladhq_m): Remove.
24131 (vqdmladhxq_m): Remove.
24132 (vqdmlsdhq_m): Remove.
24133 (vqdmlsdhxq_m): Remove.
24134 (vqrdmladhq_m): Remove.
24135 (vqrdmladhxq_m): Remove.
24136 (vqrdmlsdhq_m): Remove.
24137 (vqrdmlsdhxq_m): Remove.
24138 (vqrdmlsdhxq_s8): Remove.
24139 (vqrdmlsdhq_s8): Remove.
24140 (vqrdmladhxq_s8): Remove.
24141 (vqrdmladhq_s8): Remove.
24142 (vqdmlsdhxq_s8): Remove.
24143 (vqdmlsdhq_s8): Remove.
24144 (vqdmladhxq_s8): Remove.
24145 (vqdmladhq_s8): Remove.
24146 (vqrdmlsdhxq_s16): Remove.
24147 (vqrdmlsdhq_s16): Remove.
24148 (vqrdmladhxq_s16): Remove.
24149 (vqrdmladhq_s16): Remove.
24150 (vqdmlsdhxq_s16): Remove.
24151 (vqdmlsdhq_s16): Remove.
24152 (vqdmladhxq_s16): Remove.
24153 (vqdmladhq_s16): Remove.
24154 (vqrdmlsdhxq_s32): Remove.
24155 (vqrdmlsdhq_s32): Remove.
24156 (vqrdmladhxq_s32): Remove.
24157 (vqrdmladhq_s32): Remove.
24158 (vqdmlsdhxq_s32): Remove.
24159 (vqdmlsdhq_s32): Remove.
24160 (vqdmladhxq_s32): Remove.
24161 (vqdmladhq_s32): Remove.
24162 (vqdmladhq_m_s8): Remove.
24163 (vqdmladhq_m_s32): Remove.
24164 (vqdmladhq_m_s16): Remove.
24165 (vqdmladhxq_m_s8): Remove.
24166 (vqdmladhxq_m_s32): Remove.
24167 (vqdmladhxq_m_s16): Remove.
24168 (vqdmlsdhq_m_s8): Remove.
24169 (vqdmlsdhq_m_s32): Remove.
24170 (vqdmlsdhq_m_s16): Remove.
24171 (vqdmlsdhxq_m_s8): Remove.
24172 (vqdmlsdhxq_m_s32): Remove.
24173 (vqdmlsdhxq_m_s16): Remove.
24174 (vqrdmladhq_m_s8): Remove.
24175 (vqrdmladhq_m_s32): Remove.
24176 (vqrdmladhq_m_s16): Remove.
24177 (vqrdmladhxq_m_s8): Remove.
24178 (vqrdmladhxq_m_s32): Remove.
24179 (vqrdmladhxq_m_s16): Remove.
24180 (vqrdmlsdhq_m_s8): Remove.
24181 (vqrdmlsdhq_m_s32): Remove.
24182 (vqrdmlsdhq_m_s16): Remove.
24183 (vqrdmlsdhxq_m_s8): Remove.
24184 (vqrdmlsdhxq_m_s32): Remove.
24185 (vqrdmlsdhxq_m_s16): Remove.
24186 (__arm_vqrdmlsdhxq_s8): Remove.
24187 (__arm_vqrdmlsdhq_s8): Remove.
24188 (__arm_vqrdmladhxq_s8): Remove.
24189 (__arm_vqrdmladhq_s8): Remove.
24190 (__arm_vqdmlsdhxq_s8): Remove.
24191 (__arm_vqdmlsdhq_s8): Remove.
24192 (__arm_vqdmladhxq_s8): Remove.
24193 (__arm_vqdmladhq_s8): Remove.
24194 (__arm_vqrdmlsdhxq_s16): Remove.
24195 (__arm_vqrdmlsdhq_s16): Remove.
24196 (__arm_vqrdmladhxq_s16): Remove.
24197 (__arm_vqrdmladhq_s16): Remove.
24198 (__arm_vqdmlsdhxq_s16): Remove.
24199 (__arm_vqdmlsdhq_s16): Remove.
24200 (__arm_vqdmladhxq_s16): Remove.
24201 (__arm_vqdmladhq_s16): Remove.
24202 (__arm_vqrdmlsdhxq_s32): Remove.
24203 (__arm_vqrdmlsdhq_s32): Remove.
24204 (__arm_vqrdmladhxq_s32): Remove.
24205 (__arm_vqrdmladhq_s32): Remove.
24206 (__arm_vqdmlsdhxq_s32): Remove.
24207 (__arm_vqdmlsdhq_s32): Remove.
24208 (__arm_vqdmladhxq_s32): Remove.
24209 (__arm_vqdmladhq_s32): Remove.
24210 (__arm_vqdmladhq_m_s8): Remove.
24211 (__arm_vqdmladhq_m_s32): Remove.
24212 (__arm_vqdmladhq_m_s16): Remove.
24213 (__arm_vqdmladhxq_m_s8): Remove.
24214 (__arm_vqdmladhxq_m_s32): Remove.
24215 (__arm_vqdmladhxq_m_s16): Remove.
24216 (__arm_vqdmlsdhq_m_s8): Remove.
24217 (__arm_vqdmlsdhq_m_s32): Remove.
24218 (__arm_vqdmlsdhq_m_s16): Remove.
24219 (__arm_vqdmlsdhxq_m_s8): Remove.
24220 (__arm_vqdmlsdhxq_m_s32): Remove.
24221 (__arm_vqdmlsdhxq_m_s16): Remove.
24222 (__arm_vqrdmladhq_m_s8): Remove.
24223 (__arm_vqrdmladhq_m_s32): Remove.
24224 (__arm_vqrdmladhq_m_s16): Remove.
24225 (__arm_vqrdmladhxq_m_s8): Remove.
24226 (__arm_vqrdmladhxq_m_s32): Remove.
24227 (__arm_vqrdmladhxq_m_s16): Remove.
24228 (__arm_vqrdmlsdhq_m_s8): Remove.
24229 (__arm_vqrdmlsdhq_m_s32): Remove.
24230 (__arm_vqrdmlsdhq_m_s16): Remove.
24231 (__arm_vqrdmlsdhxq_m_s8): Remove.
24232 (__arm_vqrdmlsdhxq_m_s32): Remove.
24233 (__arm_vqrdmlsdhxq_m_s16): Remove.
24234 (__arm_vqrdmlsdhxq): Remove.
24235 (__arm_vqrdmlsdhq): Remove.
24236 (__arm_vqrdmladhxq): Remove.
24237 (__arm_vqrdmladhq): Remove.
24238 (__arm_vqdmlsdhxq): Remove.
24239 (__arm_vqdmlsdhq): Remove.
24240 (__arm_vqdmladhxq): Remove.
24241 (__arm_vqdmladhq): Remove.
24242 (__arm_vqdmladhq_m): Remove.
24243 (__arm_vqdmladhxq_m): Remove.
24244 (__arm_vqdmlsdhq_m): Remove.
24245 (__arm_vqdmlsdhxq_m): Remove.
24246 (__arm_vqrdmladhq_m): Remove.
24247 (__arm_vqrdmladhxq_m): Remove.
24248 (__arm_vqrdmlsdhq_m): Remove.
24249 (__arm_vqrdmlsdhxq_m): Remove.
24251 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24253 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
24254 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
24255 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
24256 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
24257 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
24258 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
24259 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
24260 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
24261 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
24262 (mve_vqdmladhq_s<mode>): Merge into ...
24263 (@mve_<mve_insn>q_<supf><mode>): ... this.
24265 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24267 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
24268 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
24270 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24272 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
24273 (vmlsldavaq, vmlsldavaxq): New.
24274 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
24275 (vmlsldavaq, vmlsldavaxq): New.
24276 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
24277 (vmlsldavaq, vmlsldavaxq): New.
24278 * config/arm/arm_mve.h (vmlaldavaq): Remove.
24279 (vmlaldavaxq): Remove.
24280 (vmlsldavaq): Remove.
24281 (vmlsldavaxq): Remove.
24282 (vmlaldavaq_p): Remove.
24283 (vmlaldavaxq_p): Remove.
24284 (vmlsldavaq_p): Remove.
24285 (vmlsldavaxq_p): Remove.
24286 (vmlaldavaq_s16): Remove.
24287 (vmlaldavaxq_s16): Remove.
24288 (vmlsldavaq_s16): Remove.
24289 (vmlsldavaxq_s16): Remove.
24290 (vmlaldavaq_u16): Remove.
24291 (vmlaldavaq_s32): Remove.
24292 (vmlaldavaxq_s32): Remove.
24293 (vmlsldavaq_s32): Remove.
24294 (vmlsldavaxq_s32): Remove.
24295 (vmlaldavaq_u32): Remove.
24296 (vmlaldavaq_p_s32): Remove.
24297 (vmlaldavaq_p_s16): Remove.
24298 (vmlaldavaq_p_u32): Remove.
24299 (vmlaldavaq_p_u16): Remove.
24300 (vmlaldavaxq_p_s32): Remove.
24301 (vmlaldavaxq_p_s16): Remove.
24302 (vmlsldavaq_p_s32): Remove.
24303 (vmlsldavaq_p_s16): Remove.
24304 (vmlsldavaxq_p_s32): Remove.
24305 (vmlsldavaxq_p_s16): Remove.
24306 (__arm_vmlaldavaq_s16): Remove.
24307 (__arm_vmlaldavaxq_s16): Remove.
24308 (__arm_vmlsldavaq_s16): Remove.
24309 (__arm_vmlsldavaxq_s16): Remove.
24310 (__arm_vmlaldavaq_u16): Remove.
24311 (__arm_vmlaldavaq_s32): Remove.
24312 (__arm_vmlaldavaxq_s32): Remove.
24313 (__arm_vmlsldavaq_s32): Remove.
24314 (__arm_vmlsldavaxq_s32): Remove.
24315 (__arm_vmlaldavaq_u32): Remove.
24316 (__arm_vmlaldavaq_p_s32): Remove.
24317 (__arm_vmlaldavaq_p_s16): Remove.
24318 (__arm_vmlaldavaq_p_u32): Remove.
24319 (__arm_vmlaldavaq_p_u16): Remove.
24320 (__arm_vmlaldavaxq_p_s32): Remove.
24321 (__arm_vmlaldavaxq_p_s16): Remove.
24322 (__arm_vmlsldavaq_p_s32): Remove.
24323 (__arm_vmlsldavaq_p_s16): Remove.
24324 (__arm_vmlsldavaxq_p_s32): Remove.
24325 (__arm_vmlsldavaxq_p_s16): Remove.
24326 (__arm_vmlaldavaq): Remove.
24327 (__arm_vmlaldavaxq): Remove.
24328 (__arm_vmlsldavaq): Remove.
24329 (__arm_vmlsldavaxq): Remove.
24330 (__arm_vmlaldavaq_p): Remove.
24331 (__arm_vmlaldavaxq_p): Remove.
24332 (__arm_vmlsldavaq_p): Remove.
24333 (__arm_vmlsldavaxq_p): Remove.
24335 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24337 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
24339 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
24340 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
24341 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
24342 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
24343 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
24344 (mve_vmlaldavaxq_s<mode>): Merge into ...
24345 (@mve_<mve_insn>q_<supf><mode>): ... this.
24346 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
24347 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
24349 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24351 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24353 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
24354 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
24356 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24358 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
24359 (vrmlsldavhq, vrmlsldavhxq): New.
24360 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
24361 (vrmlsldavhq, vrmlsldavhxq): New.
24362 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
24363 (vrmlsldavhq, vrmlsldavhxq): New.
24364 * config/arm/arm-mve-builtins-functions.h
24365 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
24366 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
24367 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
24368 (vrmlsldavhxq): Remove.
24369 (vrmlsldavhq): Remove.
24370 (vrmlaldavhxq): Remove.
24371 (vrmlaldavhq_p): Remove.
24372 (vrmlaldavhxq_p): Remove.
24373 (vrmlsldavhq_p): Remove.
24374 (vrmlsldavhxq_p): Remove.
24375 (vrmlaldavhq_u32): Remove.
24376 (vrmlsldavhxq_s32): Remove.
24377 (vrmlsldavhq_s32): Remove.
24378 (vrmlaldavhxq_s32): Remove.
24379 (vrmlaldavhq_s32): Remove.
24380 (vrmlaldavhq_p_s32): Remove.
24381 (vrmlaldavhxq_p_s32): Remove.
24382 (vrmlsldavhq_p_s32): Remove.
24383 (vrmlsldavhxq_p_s32): Remove.
24384 (vrmlaldavhq_p_u32): Remove.
24385 (__arm_vrmlaldavhq_u32): Remove.
24386 (__arm_vrmlsldavhxq_s32): Remove.
24387 (__arm_vrmlsldavhq_s32): Remove.
24388 (__arm_vrmlaldavhxq_s32): Remove.
24389 (__arm_vrmlaldavhq_s32): Remove.
24390 (__arm_vrmlaldavhq_p_s32): Remove.
24391 (__arm_vrmlaldavhxq_p_s32): Remove.
24392 (__arm_vrmlsldavhq_p_s32): Remove.
24393 (__arm_vrmlsldavhxq_p_s32): Remove.
24394 (__arm_vrmlaldavhq_p_u32): Remove.
24395 (__arm_vrmlaldavhq): Remove.
24396 (__arm_vrmlsldavhxq): Remove.
24397 (__arm_vrmlsldavhq): Remove.
24398 (__arm_vrmlaldavhxq): Remove.
24399 (__arm_vrmlaldavhq_p): Remove.
24400 (__arm_vrmlaldavhxq_p): Remove.
24401 (__arm_vrmlsldavhq_p): Remove.
24402 (__arm_vrmlsldavhxq_p): Remove.
24404 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24406 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
24408 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
24409 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
24410 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
24411 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
24412 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
24413 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
24414 (@mve_<mve_insn>q_<supf>v4si): ... this.
24415 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
24416 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
24418 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24420 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24422 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
24423 (vmlsldavq, vmlsldavxq): New.
24424 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
24425 (vmlsldavq, vmlsldavxq): New.
24426 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
24427 (vmlsldavq, vmlsldavxq): New.
24428 * config/arm/arm_mve.h (vmlaldavq): Remove.
24429 (vmlsldavxq): Remove.
24430 (vmlsldavq): Remove.
24431 (vmlaldavxq): Remove.
24432 (vmlaldavq_p): Remove.
24433 (vmlaldavxq_p): Remove.
24434 (vmlsldavq_p): Remove.
24435 (vmlsldavxq_p): Remove.
24436 (vmlaldavq_u16): Remove.
24437 (vmlsldavxq_s16): Remove.
24438 (vmlsldavq_s16): Remove.
24439 (vmlaldavxq_s16): Remove.
24440 (vmlaldavq_s16): Remove.
24441 (vmlaldavq_u32): Remove.
24442 (vmlsldavxq_s32): Remove.
24443 (vmlsldavq_s32): Remove.
24444 (vmlaldavxq_s32): Remove.
24445 (vmlaldavq_s32): Remove.
24446 (vmlaldavq_p_s16): Remove.
24447 (vmlaldavxq_p_s16): Remove.
24448 (vmlsldavq_p_s16): Remove.
24449 (vmlsldavxq_p_s16): Remove.
24450 (vmlaldavq_p_u16): Remove.
24451 (vmlaldavq_p_s32): Remove.
24452 (vmlaldavxq_p_s32): Remove.
24453 (vmlsldavq_p_s32): Remove.
24454 (vmlsldavxq_p_s32): Remove.
24455 (vmlaldavq_p_u32): Remove.
24456 (__arm_vmlaldavq_u16): Remove.
24457 (__arm_vmlsldavxq_s16): Remove.
24458 (__arm_vmlsldavq_s16): Remove.
24459 (__arm_vmlaldavxq_s16): Remove.
24460 (__arm_vmlaldavq_s16): Remove.
24461 (__arm_vmlaldavq_u32): Remove.
24462 (__arm_vmlsldavxq_s32): Remove.
24463 (__arm_vmlsldavq_s32): Remove.
24464 (__arm_vmlaldavxq_s32): Remove.
24465 (__arm_vmlaldavq_s32): Remove.
24466 (__arm_vmlaldavq_p_s16): Remove.
24467 (__arm_vmlaldavxq_p_s16): Remove.
24468 (__arm_vmlsldavq_p_s16): Remove.
24469 (__arm_vmlsldavxq_p_s16): Remove.
24470 (__arm_vmlaldavq_p_u16): Remove.
24471 (__arm_vmlaldavq_p_s32): Remove.
24472 (__arm_vmlaldavxq_p_s32): Remove.
24473 (__arm_vmlsldavq_p_s32): Remove.
24474 (__arm_vmlsldavxq_p_s32): Remove.
24475 (__arm_vmlaldavq_p_u32): Remove.
24476 (__arm_vmlaldavq): Remove.
24477 (__arm_vmlsldavxq): Remove.
24478 (__arm_vmlsldavq): Remove.
24479 (__arm_vmlaldavxq): Remove.
24480 (__arm_vmlaldavq_p): Remove.
24481 (__arm_vmlaldavxq_p): Remove.
24482 (__arm_vmlsldavq_p): Remove.
24483 (__arm_vmlsldavxq_p): Remove.
24485 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24487 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
24488 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
24489 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
24490 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
24491 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
24492 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
24493 (mve_vmlsldavxq_s<mode>): Merge into ...
24494 (@mve_<mve_insn>q_<supf><mode>): ... this.
24495 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
24496 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
24498 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24500 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24502 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
24503 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
24505 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24507 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
24508 * config/arm/arm-mve-builtins-base.def (vabavq): New.
24509 * config/arm/arm-mve-builtins-base.h (vabavq): New.
24510 * config/arm/arm_mve.h (vabavq): Remove.
24511 (vabavq_p): Remove.
24512 (vabavq_s8): Remove.
24513 (vabavq_s16): Remove.
24514 (vabavq_s32): Remove.
24515 (vabavq_u8): Remove.
24516 (vabavq_u16): Remove.
24517 (vabavq_u32): Remove.
24518 (vabavq_p_s8): Remove.
24519 (vabavq_p_u8): Remove.
24520 (vabavq_p_s16): Remove.
24521 (vabavq_p_u16): Remove.
24522 (vabavq_p_s32): Remove.
24523 (vabavq_p_u32): Remove.
24524 (__arm_vabavq_s8): Remove.
24525 (__arm_vabavq_s16): Remove.
24526 (__arm_vabavq_s32): Remove.
24527 (__arm_vabavq_u8): Remove.
24528 (__arm_vabavq_u16): Remove.
24529 (__arm_vabavq_u32): Remove.
24530 (__arm_vabavq_p_s8): Remove.
24531 (__arm_vabavq_p_u8): Remove.
24532 (__arm_vabavq_p_s16): Remove.
24533 (__arm_vabavq_p_u16): Remove.
24534 (__arm_vabavq_p_s32): Remove.
24535 (__arm_vabavq_p_u32): Remove.
24536 (__arm_vabavq): Remove.
24537 (__arm_vabavq_p): Remove.
24539 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24541 * config/arm/iterators.md (mve_insn): Add vabav.
24542 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
24543 (@mve_<mve_insn>q_<supf><mode>): ... this,.
24544 (mve_vabavq_p_<supf><mode>): Rename into ...
24545 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
24547 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24549 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
24550 (vmlsdavaq, vmlsdavaxq): New.
24551 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
24552 (vmlsdavaq, vmlsdavaxq): New.
24553 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
24554 (vmlsdavaq, vmlsdavaxq): New.
24555 * config/arm/arm_mve.h (vmladavaq): Remove.
24556 (vmlsdavaxq): Remove.
24557 (vmlsdavaq): Remove.
24558 (vmladavaxq): Remove.
24559 (vmladavaq_p): Remove.
24560 (vmladavaxq_p): Remove.
24561 (vmlsdavaq_p): Remove.
24562 (vmlsdavaxq_p): Remove.
24563 (vmladavaq_u8): Remove.
24564 (vmlsdavaxq_s8): Remove.
24565 (vmlsdavaq_s8): Remove.
24566 (vmladavaxq_s8): Remove.
24567 (vmladavaq_s8): Remove.
24568 (vmladavaq_u16): Remove.
24569 (vmlsdavaxq_s16): Remove.
24570 (vmlsdavaq_s16): Remove.
24571 (vmladavaxq_s16): Remove.
24572 (vmladavaq_s16): Remove.
24573 (vmladavaq_u32): Remove.
24574 (vmlsdavaxq_s32): Remove.
24575 (vmlsdavaq_s32): Remove.
24576 (vmladavaxq_s32): Remove.
24577 (vmladavaq_s32): Remove.
24578 (vmladavaq_p_s8): Remove.
24579 (vmladavaq_p_s32): Remove.
24580 (vmladavaq_p_s16): Remove.
24581 (vmladavaq_p_u8): Remove.
24582 (vmladavaq_p_u32): Remove.
24583 (vmladavaq_p_u16): Remove.
24584 (vmladavaxq_p_s8): Remove.
24585 (vmladavaxq_p_s32): Remove.
24586 (vmladavaxq_p_s16): Remove.
24587 (vmlsdavaq_p_s8): Remove.
24588 (vmlsdavaq_p_s32): Remove.
24589 (vmlsdavaq_p_s16): Remove.
24590 (vmlsdavaxq_p_s8): Remove.
24591 (vmlsdavaxq_p_s32): Remove.
24592 (vmlsdavaxq_p_s16): Remove.
24593 (__arm_vmladavaq_u8): Remove.
24594 (__arm_vmlsdavaxq_s8): Remove.
24595 (__arm_vmlsdavaq_s8): Remove.
24596 (__arm_vmladavaxq_s8): Remove.
24597 (__arm_vmladavaq_s8): Remove.
24598 (__arm_vmladavaq_u16): Remove.
24599 (__arm_vmlsdavaxq_s16): Remove.
24600 (__arm_vmlsdavaq_s16): Remove.
24601 (__arm_vmladavaxq_s16): Remove.
24602 (__arm_vmladavaq_s16): Remove.
24603 (__arm_vmladavaq_u32): Remove.
24604 (__arm_vmlsdavaxq_s32): Remove.
24605 (__arm_vmlsdavaq_s32): Remove.
24606 (__arm_vmladavaxq_s32): Remove.
24607 (__arm_vmladavaq_s32): Remove.
24608 (__arm_vmladavaq_p_s8): Remove.
24609 (__arm_vmladavaq_p_s32): Remove.
24610 (__arm_vmladavaq_p_s16): Remove.
24611 (__arm_vmladavaq_p_u8): Remove.
24612 (__arm_vmladavaq_p_u32): Remove.
24613 (__arm_vmladavaq_p_u16): Remove.
24614 (__arm_vmladavaxq_p_s8): Remove.
24615 (__arm_vmladavaxq_p_s32): Remove.
24616 (__arm_vmladavaxq_p_s16): Remove.
24617 (__arm_vmlsdavaq_p_s8): Remove.
24618 (__arm_vmlsdavaq_p_s32): Remove.
24619 (__arm_vmlsdavaq_p_s16): Remove.
24620 (__arm_vmlsdavaxq_p_s8): Remove.
24621 (__arm_vmlsdavaxq_p_s32): Remove.
24622 (__arm_vmlsdavaxq_p_s16): Remove.
24623 (__arm_vmladavaq): Remove.
24624 (__arm_vmlsdavaxq): Remove.
24625 (__arm_vmlsdavaq): Remove.
24626 (__arm_vmladavaxq): Remove.
24627 (__arm_vmladavaq_p): Remove.
24628 (__arm_vmladavaxq_p): Remove.
24629 (__arm_vmlsdavaq_p): Remove.
24630 (__arm_vmlsdavaxq_p): Remove.
24632 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24634 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
24635 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
24637 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24639 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
24640 (vmlsdavq, vmlsdavxq): New.
24641 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
24642 (vmlsdavq, vmlsdavxq): New.
24643 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
24644 (vmlsdavq, vmlsdavxq): New.
24645 * config/arm/arm_mve.h (vmladavq): Remove.
24646 (vmlsdavxq): Remove.
24647 (vmlsdavq): Remove.
24648 (vmladavxq): Remove.
24649 (vmladavq_p): Remove.
24650 (vmlsdavxq_p): Remove.
24651 (vmlsdavq_p): Remove.
24652 (vmladavxq_p): Remove.
24653 (vmladavq_u8): Remove.
24654 (vmlsdavxq_s8): Remove.
24655 (vmlsdavq_s8): Remove.
24656 (vmladavxq_s8): Remove.
24657 (vmladavq_s8): Remove.
24658 (vmladavq_u16): Remove.
24659 (vmlsdavxq_s16): Remove.
24660 (vmlsdavq_s16): Remove.
24661 (vmladavxq_s16): Remove.
24662 (vmladavq_s16): Remove.
24663 (vmladavq_u32): Remove.
24664 (vmlsdavxq_s32): Remove.
24665 (vmlsdavq_s32): Remove.
24666 (vmladavxq_s32): Remove.
24667 (vmladavq_s32): Remove.
24668 (vmladavq_p_u8): Remove.
24669 (vmlsdavxq_p_s8): Remove.
24670 (vmlsdavq_p_s8): Remove.
24671 (vmladavxq_p_s8): Remove.
24672 (vmladavq_p_s8): Remove.
24673 (vmladavq_p_u16): Remove.
24674 (vmlsdavxq_p_s16): Remove.
24675 (vmlsdavq_p_s16): Remove.
24676 (vmladavxq_p_s16): Remove.
24677 (vmladavq_p_s16): Remove.
24678 (vmladavq_p_u32): Remove.
24679 (vmlsdavxq_p_s32): Remove.
24680 (vmlsdavq_p_s32): Remove.
24681 (vmladavxq_p_s32): Remove.
24682 (vmladavq_p_s32): Remove.
24683 (__arm_vmladavq_u8): Remove.
24684 (__arm_vmlsdavxq_s8): Remove.
24685 (__arm_vmlsdavq_s8): Remove.
24686 (__arm_vmladavxq_s8): Remove.
24687 (__arm_vmladavq_s8): Remove.
24688 (__arm_vmladavq_u16): Remove.
24689 (__arm_vmlsdavxq_s16): Remove.
24690 (__arm_vmlsdavq_s16): Remove.
24691 (__arm_vmladavxq_s16): Remove.
24692 (__arm_vmladavq_s16): Remove.
24693 (__arm_vmladavq_u32): Remove.
24694 (__arm_vmlsdavxq_s32): Remove.
24695 (__arm_vmlsdavq_s32): Remove.
24696 (__arm_vmladavxq_s32): Remove.
24697 (__arm_vmladavq_s32): Remove.
24698 (__arm_vmladavq_p_u8): Remove.
24699 (__arm_vmlsdavxq_p_s8): Remove.
24700 (__arm_vmlsdavq_p_s8): Remove.
24701 (__arm_vmladavxq_p_s8): Remove.
24702 (__arm_vmladavq_p_s8): Remove.
24703 (__arm_vmladavq_p_u16): Remove.
24704 (__arm_vmlsdavxq_p_s16): Remove.
24705 (__arm_vmlsdavq_p_s16): Remove.
24706 (__arm_vmladavxq_p_s16): Remove.
24707 (__arm_vmladavq_p_s16): Remove.
24708 (__arm_vmladavq_p_u32): Remove.
24709 (__arm_vmlsdavxq_p_s32): Remove.
24710 (__arm_vmlsdavq_p_s32): Remove.
24711 (__arm_vmladavxq_p_s32): Remove.
24712 (__arm_vmladavq_p_s32): Remove.
24713 (__arm_vmladavq): Remove.
24714 (__arm_vmlsdavxq): Remove.
24715 (__arm_vmlsdavq): Remove.
24716 (__arm_vmladavxq): Remove.
24717 (__arm_vmladavq_p): Remove.
24718 (__arm_vmlsdavxq_p): Remove.
24719 (__arm_vmlsdavq_p): Remove.
24720 (__arm_vmladavxq_p): Remove.
24722 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24724 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
24725 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
24726 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
24727 vmlsdavax, vmlsdav, vmlsdavx.
24728 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
24729 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
24730 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
24732 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
24733 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
24734 (mve_vmlsdavxq_s<mode>): Merge into ...
24735 (@mve_<mve_insn>q_<supf><mode>): ... this.
24736 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
24737 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
24739 (@mve_<mve_insn>q_<supf><mode>): ... this.
24740 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
24741 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
24742 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24743 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
24744 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
24746 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24748 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24750 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
24751 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
24753 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24755 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
24756 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
24757 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
24758 * config/arm/arm_mve.h (vaddlvaq): Remove.
24759 (vaddlvaq_p): Remove.
24760 (vaddlvaq_u32): Remove.
24761 (vaddlvaq_s32): Remove.
24762 (vaddlvaq_p_s32): Remove.
24763 (vaddlvaq_p_u32): Remove.
24764 (__arm_vaddlvaq_u32): Remove.
24765 (__arm_vaddlvaq_s32): Remove.
24766 (__arm_vaddlvaq_p_s32): Remove.
24767 (__arm_vaddlvaq_p_u32): Remove.
24768 (__arm_vaddlvaq): Remove.
24769 (__arm_vaddlvaq_p): Remove.
24771 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24773 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
24774 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
24776 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24778 * config/arm/iterators.md (mve_insn): Add vaddlva.
24779 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
24780 (@mve_<mve_insn>q_<supf>v4si): ... this.
24781 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
24782 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24784 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
24787 * config/i386/i386.cc (ix86_widen_mult_cost):
24788 Handle V4HImode and V2SImode.
24790 2023-05-11 Andrew Pinski <apinski@marvell.com>
24792 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
24793 defined by a phi node with more than one uses, allow for the
24794 only uses are in that same defining statement.
24796 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24798 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
24801 2023-05-11 Pan Li <pan2.li@intel.com>
24803 * config/riscv/vector.md: Add comments for simplifying to vmset.
24805 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24807 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
24809 (v<optab><mode>3): Add vector shift pattern.
24810 * config/riscv/vector-iterators.md: New iterator.
24812 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24814 * config/riscv/autovec.md: Use renamed functions.
24815 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
24816 (emit_vlmax_reg_op): To this.
24817 (emit_nonvlmax_op): Rename.
24818 (emit_len_op): To this.
24819 (emit_nonvlmax_binop): Rename.
24820 (emit_len_binop): To this.
24821 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
24822 (emit_pred_binop): Remove vlmax_p.
24823 (emit_vlmax_op): Rename.
24824 (emit_vlmax_reg_op): To this.
24825 (emit_nonvlmax_op): Rename.
24826 (emit_len_op): To this.
24827 (emit_nonvlmax_binop): Rename.
24828 (emit_len_binop): To this.
24829 (sew64_scalar_helper): Use renamed functions.
24830 (expand_tuple_move): Use renamed functions.
24831 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
24833 * config/riscv/vector.md: Use renamed functions.
24835 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24836 Michael Collison <collison@rivosinc.com>
24838 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
24839 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
24840 * config/riscv/riscv-v.cc (emit_pred_op): New function.
24841 (set_expander_dest_and_mask): New function.
24842 (emit_pred_binop): New function.
24843 (emit_nonvlmax_binop): New function.
24845 2023-05-11 Pan Li <pan2.li@intel.com>
24847 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
24848 * gimple-loop-interchange.cc
24849 (tree_loop_interchange::map_inductions_to_loop): Ditto.
24850 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
24851 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
24852 * tree-ssa-loop-manip.cc (create_iv): Ditto.
24853 (tree_transform_and_unroll_loop): Ditto.
24854 (canonicalize_loop_ivs): Ditto.
24855 * tree-ssa-loop-manip.h (create_iv): Ditto.
24856 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
24857 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
24859 (vect_set_loop_condition_normal): Ditto.
24860 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
24861 * tree-vect-stmts.cc (vectorizable_store): Ditto.
24862 (vectorizable_load): Ditto.
24864 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24866 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
24867 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
24868 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
24869 * config/arm/arm_mve.h (vmovlbq): Remove.
24871 (vmovlbq_m): Remove.
24872 (vmovltq_m): Remove.
24873 (vmovlbq_x): Remove.
24874 (vmovltq_x): Remove.
24875 (vmovlbq_s8): Remove.
24876 (vmovlbq_s16): Remove.
24877 (vmovltq_s8): Remove.
24878 (vmovltq_s16): Remove.
24879 (vmovltq_u8): Remove.
24880 (vmovltq_u16): Remove.
24881 (vmovlbq_u8): Remove.
24882 (vmovlbq_u16): Remove.
24883 (vmovlbq_m_s8): Remove.
24884 (vmovltq_m_s8): Remove.
24885 (vmovlbq_m_u8): Remove.
24886 (vmovltq_m_u8): Remove.
24887 (vmovlbq_m_s16): Remove.
24888 (vmovltq_m_s16): Remove.
24889 (vmovlbq_m_u16): Remove.
24890 (vmovltq_m_u16): Remove.
24891 (vmovlbq_x_s8): Remove.
24892 (vmovlbq_x_s16): Remove.
24893 (vmovlbq_x_u8): Remove.
24894 (vmovlbq_x_u16): Remove.
24895 (vmovltq_x_s8): Remove.
24896 (vmovltq_x_s16): Remove.
24897 (vmovltq_x_u8): Remove.
24898 (vmovltq_x_u16): Remove.
24899 (__arm_vmovlbq_s8): Remove.
24900 (__arm_vmovlbq_s16): Remove.
24901 (__arm_vmovltq_s8): Remove.
24902 (__arm_vmovltq_s16): Remove.
24903 (__arm_vmovltq_u8): Remove.
24904 (__arm_vmovltq_u16): Remove.
24905 (__arm_vmovlbq_u8): Remove.
24906 (__arm_vmovlbq_u16): Remove.
24907 (__arm_vmovlbq_m_s8): Remove.
24908 (__arm_vmovltq_m_s8): Remove.
24909 (__arm_vmovlbq_m_u8): Remove.
24910 (__arm_vmovltq_m_u8): Remove.
24911 (__arm_vmovlbq_m_s16): Remove.
24912 (__arm_vmovltq_m_s16): Remove.
24913 (__arm_vmovlbq_m_u16): Remove.
24914 (__arm_vmovltq_m_u16): Remove.
24915 (__arm_vmovlbq_x_s8): Remove.
24916 (__arm_vmovlbq_x_s16): Remove.
24917 (__arm_vmovlbq_x_u8): Remove.
24918 (__arm_vmovlbq_x_u16): Remove.
24919 (__arm_vmovltq_x_s8): Remove.
24920 (__arm_vmovltq_x_s16): Remove.
24921 (__arm_vmovltq_x_u8): Remove.
24922 (__arm_vmovltq_x_u16): Remove.
24923 (__arm_vmovlbq): Remove.
24924 (__arm_vmovltq): Remove.
24925 (__arm_vmovlbq_m): Remove.
24926 (__arm_vmovltq_m): Remove.
24927 (__arm_vmovlbq_x): Remove.
24928 (__arm_vmovltq_x): Remove.
24930 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24932 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
24933 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
24935 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24937 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
24938 (VMOVLBQ, VMOVLTQ): Merge into ...
24939 (VMOVLxQ): ... this.
24940 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
24941 (VMOVLxQ_M): ... this.
24942 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
24943 (mve_vmovlbq_<supf><mode>): Merge into ...
24944 (@mve_<mve_insn>q_<supf><mode>): ... this.
24945 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
24947 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
24949 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24951 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
24952 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
24953 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
24954 * config/arm/arm-mve-builtins-functions.h
24955 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
24956 * config/arm/arm_mve.h (vaddlvq): Remove.
24957 (vaddlvq_p): Remove.
24958 (vaddlvq_s32): Remove.
24959 (vaddlvq_u32): Remove.
24960 (vaddlvq_p_s32): Remove.
24961 (vaddlvq_p_u32): Remove.
24962 (__arm_vaddlvq_s32): Remove.
24963 (__arm_vaddlvq_u32): Remove.
24964 (__arm_vaddlvq_p_s32): Remove.
24965 (__arm_vaddlvq_p_u32): Remove.
24966 (__arm_vaddlvq): Remove.
24967 (__arm_vaddlvq_p): Remove.
24969 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24971 * config/arm/iterators.md (mve_insn): Add vaddlv.
24972 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
24973 (@mve_<mve_insn>q_<supf>v4si): ... this.
24974 (mve_vaddlvq_p_<supf>v4si): Rename into ...
24975 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24977 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24979 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
24980 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
24982 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24984 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
24985 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
24986 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
24987 * config/arm/arm_mve.h (vaddvaq): Remove.
24988 (vaddvaq_p): Remove.
24989 (vaddvaq_u8): Remove.
24990 (vaddvaq_s8): Remove.
24991 (vaddvaq_u16): Remove.
24992 (vaddvaq_s16): Remove.
24993 (vaddvaq_u32): Remove.
24994 (vaddvaq_s32): Remove.
24995 (vaddvaq_p_u8): Remove.
24996 (vaddvaq_p_s8): Remove.
24997 (vaddvaq_p_u16): Remove.
24998 (vaddvaq_p_s16): Remove.
24999 (vaddvaq_p_u32): Remove.
25000 (vaddvaq_p_s32): Remove.
25001 (__arm_vaddvaq_u8): Remove.
25002 (__arm_vaddvaq_s8): Remove.
25003 (__arm_vaddvaq_u16): Remove.
25004 (__arm_vaddvaq_s16): Remove.
25005 (__arm_vaddvaq_u32): Remove.
25006 (__arm_vaddvaq_s32): Remove.
25007 (__arm_vaddvaq_p_u8): Remove.
25008 (__arm_vaddvaq_p_s8): Remove.
25009 (__arm_vaddvaq_p_u16): Remove.
25010 (__arm_vaddvaq_p_s16): Remove.
25011 (__arm_vaddvaq_p_u32): Remove.
25012 (__arm_vaddvaq_p_s32): Remove.
25013 (__arm_vaddvaq): Remove.
25014 (__arm_vaddvaq_p): Remove.
25016 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25018 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
25019 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
25021 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25023 * config/arm/iterators.md (mve_insn): Add vaddva.
25024 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
25025 (@mve_<mve_insn>q_<supf><mode>): ... this.
25026 (mve_vaddvaq_p_<supf><mode>): Rename into ...
25027 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
25029 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25031 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
25032 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
25033 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
25034 * config/arm/arm_mve.h (vaddvq): Remove.
25035 (vaddvq_p): Remove.
25036 (vaddvq_s8): Remove.
25037 (vaddvq_s16): Remove.
25038 (vaddvq_s32): Remove.
25039 (vaddvq_u8): Remove.
25040 (vaddvq_u16): Remove.
25041 (vaddvq_u32): Remove.
25042 (vaddvq_p_u8): Remove.
25043 (vaddvq_p_s8): Remove.
25044 (vaddvq_p_u16): Remove.
25045 (vaddvq_p_s16): Remove.
25046 (vaddvq_p_u32): Remove.
25047 (vaddvq_p_s32): Remove.
25048 (__arm_vaddvq_s8): Remove.
25049 (__arm_vaddvq_s16): Remove.
25050 (__arm_vaddvq_s32): Remove.
25051 (__arm_vaddvq_u8): Remove.
25052 (__arm_vaddvq_u16): Remove.
25053 (__arm_vaddvq_u32): Remove.
25054 (__arm_vaddvq_p_u8): Remove.
25055 (__arm_vaddvq_p_s8): Remove.
25056 (__arm_vaddvq_p_u16): Remove.
25057 (__arm_vaddvq_p_s16): Remove.
25058 (__arm_vaddvq_p_u32): Remove.
25059 (__arm_vaddvq_p_s32): Remove.
25060 (__arm_vaddvq): Remove.
25061 (__arm_vaddvq_p): Remove.
25063 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25065 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
25066 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
25068 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25070 * config/arm/iterators.md (mve_insn): Add vaddv.
25071 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
25072 (@mve_<mve_insn>q_<supf><mode>): ... this.
25073 (mve_vaddvq_p_<supf><mode>): Rename into ...
25074 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
25075 * config/arm/vec-common.md: Use gen_mve_q instead of
25078 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25080 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
25082 * config/arm/arm-mve-builtins-base.def (vdupq): New.
25083 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
25084 * config/arm/arm_mve.h (vdupq_n): Remove.
25086 (vdupq_n_f16): Remove.
25087 (vdupq_n_f32): Remove.
25088 (vdupq_n_s8): Remove.
25089 (vdupq_n_s16): Remove.
25090 (vdupq_n_s32): Remove.
25091 (vdupq_n_u8): Remove.
25092 (vdupq_n_u16): Remove.
25093 (vdupq_n_u32): Remove.
25094 (vdupq_m_n_u8): Remove.
25095 (vdupq_m_n_s8): Remove.
25096 (vdupq_m_n_u16): Remove.
25097 (vdupq_m_n_s16): Remove.
25098 (vdupq_m_n_u32): Remove.
25099 (vdupq_m_n_s32): Remove.
25100 (vdupq_m_n_f16): Remove.
25101 (vdupq_m_n_f32): Remove.
25102 (vdupq_x_n_s8): Remove.
25103 (vdupq_x_n_s16): Remove.
25104 (vdupq_x_n_s32): Remove.
25105 (vdupq_x_n_u8): Remove.
25106 (vdupq_x_n_u16): Remove.
25107 (vdupq_x_n_u32): Remove.
25108 (vdupq_x_n_f16): Remove.
25109 (vdupq_x_n_f32): Remove.
25110 (__arm_vdupq_n_s8): Remove.
25111 (__arm_vdupq_n_s16): Remove.
25112 (__arm_vdupq_n_s32): Remove.
25113 (__arm_vdupq_n_u8): Remove.
25114 (__arm_vdupq_n_u16): Remove.
25115 (__arm_vdupq_n_u32): Remove.
25116 (__arm_vdupq_m_n_u8): Remove.
25117 (__arm_vdupq_m_n_s8): Remove.
25118 (__arm_vdupq_m_n_u16): Remove.
25119 (__arm_vdupq_m_n_s16): Remove.
25120 (__arm_vdupq_m_n_u32): Remove.
25121 (__arm_vdupq_m_n_s32): Remove.
25122 (__arm_vdupq_x_n_s8): Remove.
25123 (__arm_vdupq_x_n_s16): Remove.
25124 (__arm_vdupq_x_n_s32): Remove.
25125 (__arm_vdupq_x_n_u8): Remove.
25126 (__arm_vdupq_x_n_u16): Remove.
25127 (__arm_vdupq_x_n_u32): Remove.
25128 (__arm_vdupq_n_f16): Remove.
25129 (__arm_vdupq_n_f32): Remove.
25130 (__arm_vdupq_m_n_f16): Remove.
25131 (__arm_vdupq_m_n_f32): Remove.
25132 (__arm_vdupq_x_n_f16): Remove.
25133 (__arm_vdupq_x_n_f32): Remove.
25134 (__arm_vdupq_n): Remove.
25135 (__arm_vdupq_m): Remove.
25137 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25139 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
25140 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
25142 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25144 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
25145 (MVE_FP_N_VDUPQ_ONLY): New.
25146 (mve_insn): Add vdupq.
25147 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
25148 (@mve_<mve_insn>q_n_f<mode>): ... this.
25149 (mve_vdupq_n_<supf><mode>): Rename into ...
25150 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25151 (mve_vdupq_m_n_<supf><mode>): Rename into ...
25152 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25153 (mve_vdupq_m_n_f<mode>): Rename into ...
25154 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
25156 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25158 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
25160 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
25162 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
25164 * config/arm/arm_mve.h (vrev16q): Remove.
25167 (vrev64q_m): Remove.
25168 (vrev16q_m): Remove.
25169 (vrev32q_m): Remove.
25170 (vrev16q_x): Remove.
25171 (vrev32q_x): Remove.
25172 (vrev64q_x): Remove.
25173 (vrev64q_f16): Remove.
25174 (vrev64q_f32): Remove.
25175 (vrev32q_f16): Remove.
25176 (vrev16q_s8): Remove.
25177 (vrev32q_s8): Remove.
25178 (vrev32q_s16): Remove.
25179 (vrev64q_s8): Remove.
25180 (vrev64q_s16): Remove.
25181 (vrev64q_s32): Remove.
25182 (vrev64q_u8): Remove.
25183 (vrev64q_u16): Remove.
25184 (vrev64q_u32): Remove.
25185 (vrev32q_u8): Remove.
25186 (vrev32q_u16): Remove.
25187 (vrev16q_u8): Remove.
25188 (vrev64q_m_u8): Remove.
25189 (vrev64q_m_s8): Remove.
25190 (vrev64q_m_u16): Remove.
25191 (vrev64q_m_s16): Remove.
25192 (vrev64q_m_u32): Remove.
25193 (vrev64q_m_s32): Remove.
25194 (vrev16q_m_s8): Remove.
25195 (vrev32q_m_f16): Remove.
25196 (vrev16q_m_u8): Remove.
25197 (vrev32q_m_s8): Remove.
25198 (vrev64q_m_f16): Remove.
25199 (vrev32q_m_u8): Remove.
25200 (vrev32q_m_s16): Remove.
25201 (vrev64q_m_f32): Remove.
25202 (vrev32q_m_u16): Remove.
25203 (vrev16q_x_s8): Remove.
25204 (vrev16q_x_u8): Remove.
25205 (vrev32q_x_s8): Remove.
25206 (vrev32q_x_s16): Remove.
25207 (vrev32q_x_u8): Remove.
25208 (vrev32q_x_u16): Remove.
25209 (vrev64q_x_s8): Remove.
25210 (vrev64q_x_s16): Remove.
25211 (vrev64q_x_s32): Remove.
25212 (vrev64q_x_u8): Remove.
25213 (vrev64q_x_u16): Remove.
25214 (vrev64q_x_u32): Remove.
25215 (vrev32q_x_f16): Remove.
25216 (vrev64q_x_f16): Remove.
25217 (vrev64q_x_f32): Remove.
25218 (__arm_vrev16q_s8): Remove.
25219 (__arm_vrev32q_s8): Remove.
25220 (__arm_vrev32q_s16): Remove.
25221 (__arm_vrev64q_s8): Remove.
25222 (__arm_vrev64q_s16): Remove.
25223 (__arm_vrev64q_s32): Remove.
25224 (__arm_vrev64q_u8): Remove.
25225 (__arm_vrev64q_u16): Remove.
25226 (__arm_vrev64q_u32): Remove.
25227 (__arm_vrev32q_u8): Remove.
25228 (__arm_vrev32q_u16): Remove.
25229 (__arm_vrev16q_u8): Remove.
25230 (__arm_vrev64q_m_u8): Remove.
25231 (__arm_vrev64q_m_s8): Remove.
25232 (__arm_vrev64q_m_u16): Remove.
25233 (__arm_vrev64q_m_s16): Remove.
25234 (__arm_vrev64q_m_u32): Remove.
25235 (__arm_vrev64q_m_s32): Remove.
25236 (__arm_vrev16q_m_s8): Remove.
25237 (__arm_vrev16q_m_u8): Remove.
25238 (__arm_vrev32q_m_s8): Remove.
25239 (__arm_vrev32q_m_u8): Remove.
25240 (__arm_vrev32q_m_s16): Remove.
25241 (__arm_vrev32q_m_u16): Remove.
25242 (__arm_vrev16q_x_s8): Remove.
25243 (__arm_vrev16q_x_u8): Remove.
25244 (__arm_vrev32q_x_s8): Remove.
25245 (__arm_vrev32q_x_s16): Remove.
25246 (__arm_vrev32q_x_u8): Remove.
25247 (__arm_vrev32q_x_u16): Remove.
25248 (__arm_vrev64q_x_s8): Remove.
25249 (__arm_vrev64q_x_s16): Remove.
25250 (__arm_vrev64q_x_s32): Remove.
25251 (__arm_vrev64q_x_u8): Remove.
25252 (__arm_vrev64q_x_u16): Remove.
25253 (__arm_vrev64q_x_u32): Remove.
25254 (__arm_vrev64q_f16): Remove.
25255 (__arm_vrev64q_f32): Remove.
25256 (__arm_vrev32q_f16): Remove.
25257 (__arm_vrev32q_m_f16): Remove.
25258 (__arm_vrev64q_m_f16): Remove.
25259 (__arm_vrev64q_m_f32): Remove.
25260 (__arm_vrev32q_x_f16): Remove.
25261 (__arm_vrev64q_x_f16): Remove.
25262 (__arm_vrev64q_x_f32): Remove.
25263 (__arm_vrev16q): Remove.
25264 (__arm_vrev32q): Remove.
25265 (__arm_vrev64q): Remove.
25266 (__arm_vrev64q_m): Remove.
25267 (__arm_vrev16q_m): Remove.
25268 (__arm_vrev32q_m): Remove.
25269 (__arm_vrev16q_x): Remove.
25270 (__arm_vrev32q_x): Remove.
25271 (__arm_vrev64q_x): Remove.
25273 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25275 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
25276 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
25277 (MVE_FP_M_VREV32Q_ONLY): New iterators.
25278 (mve_insn): Add vrev16q, vrev32q, vrev64q.
25279 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
25280 (@mve_<mve_insn>q_f<mode>): ... this
25281 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
25282 (mve_vrev64q_<supf><mode>): Rename into ...
25283 (@mve_<mve_insn>q_<supf><mode>): ... this.
25284 (mve_vrev32q_<supf><mode>): Rename into
25285 @mve_<mve_insn>q_<supf><mode>.
25286 (mve_vrev16q_<supf>v16qi): Rename into
25287 @mve_<mve_insn>q_<supf><mode>.
25288 (mve_vrev64q_m_<supf><mode>): Rename into
25289 @mve_<mve_insn>q_m_<supf><mode>.
25290 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
25291 (mve_vrev32q_m_<supf><mode>): Rename into
25292 @mve_<mve_insn>q_m_<supf><mode>.
25293 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
25294 (mve_vrev16q_m_<supf>v16qi): Rename into
25295 @mve_<mve_insn>q_m_<supf><mode>.
25297 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25299 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
25300 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
25301 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
25302 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
25303 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
25304 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
25305 * config/arm/arm-mve-builtins-functions.h (class
25306 unspec_based_mve_function_exact_insn_vcmp): New.
25307 * config/arm/arm-mve-builtins.cc
25308 (function_instance::has_inactive_argument): Handle vcmp.
25309 * config/arm/arm_mve.h (vcmpneq): Remove.
25317 (vcmpneq_m): Remove.
25318 (vcmphiq_m): Remove.
25319 (vcmpeqq_m): Remove.
25320 (vcmpcsq_m): Remove.
25321 (vcmpcsq_m_n): Remove.
25322 (vcmpltq_m): Remove.
25323 (vcmpleq_m): Remove.
25324 (vcmpgtq_m): Remove.
25325 (vcmpgeq_m): Remove.
25326 (vcmpneq_s8): Remove.
25327 (vcmpneq_s16): Remove.
25328 (vcmpneq_s32): Remove.
25329 (vcmpneq_u8): Remove.
25330 (vcmpneq_u16): Remove.
25331 (vcmpneq_u32): Remove.
25332 (vcmpneq_n_u8): Remove.
25333 (vcmphiq_u8): Remove.
25334 (vcmphiq_n_u8): Remove.
25335 (vcmpeqq_u8): Remove.
25336 (vcmpeqq_n_u8): Remove.
25337 (vcmpcsq_u8): Remove.
25338 (vcmpcsq_n_u8): Remove.
25339 (vcmpneq_n_s8): Remove.
25340 (vcmpltq_s8): Remove.
25341 (vcmpltq_n_s8): Remove.
25342 (vcmpleq_s8): Remove.
25343 (vcmpleq_n_s8): Remove.
25344 (vcmpgtq_s8): Remove.
25345 (vcmpgtq_n_s8): Remove.
25346 (vcmpgeq_s8): Remove.
25347 (vcmpgeq_n_s8): Remove.
25348 (vcmpeqq_s8): Remove.
25349 (vcmpeqq_n_s8): Remove.
25350 (vcmpneq_n_u16): Remove.
25351 (vcmphiq_u16): Remove.
25352 (vcmphiq_n_u16): Remove.
25353 (vcmpeqq_u16): Remove.
25354 (vcmpeqq_n_u16): Remove.
25355 (vcmpcsq_u16): Remove.
25356 (vcmpcsq_n_u16): Remove.
25357 (vcmpneq_n_s16): Remove.
25358 (vcmpltq_s16): Remove.
25359 (vcmpltq_n_s16): Remove.
25360 (vcmpleq_s16): Remove.
25361 (vcmpleq_n_s16): Remove.
25362 (vcmpgtq_s16): Remove.
25363 (vcmpgtq_n_s16): Remove.
25364 (vcmpgeq_s16): Remove.
25365 (vcmpgeq_n_s16): Remove.
25366 (vcmpeqq_s16): Remove.
25367 (vcmpeqq_n_s16): Remove.
25368 (vcmpneq_n_u32): Remove.
25369 (vcmphiq_u32): Remove.
25370 (vcmphiq_n_u32): Remove.
25371 (vcmpeqq_u32): Remove.
25372 (vcmpeqq_n_u32): Remove.
25373 (vcmpcsq_u32): Remove.
25374 (vcmpcsq_n_u32): Remove.
25375 (vcmpneq_n_s32): Remove.
25376 (vcmpltq_s32): Remove.
25377 (vcmpltq_n_s32): Remove.
25378 (vcmpleq_s32): Remove.
25379 (vcmpleq_n_s32): Remove.
25380 (vcmpgtq_s32): Remove.
25381 (vcmpgtq_n_s32): Remove.
25382 (vcmpgeq_s32): Remove.
25383 (vcmpgeq_n_s32): Remove.
25384 (vcmpeqq_s32): Remove.
25385 (vcmpeqq_n_s32): Remove.
25386 (vcmpneq_n_f16): Remove.
25387 (vcmpneq_f16): Remove.
25388 (vcmpltq_n_f16): Remove.
25389 (vcmpltq_f16): Remove.
25390 (vcmpleq_n_f16): Remove.
25391 (vcmpleq_f16): Remove.
25392 (vcmpgtq_n_f16): Remove.
25393 (vcmpgtq_f16): Remove.
25394 (vcmpgeq_n_f16): Remove.
25395 (vcmpgeq_f16): Remove.
25396 (vcmpeqq_n_f16): Remove.
25397 (vcmpeqq_f16): Remove.
25398 (vcmpneq_n_f32): Remove.
25399 (vcmpneq_f32): Remove.
25400 (vcmpltq_n_f32): Remove.
25401 (vcmpltq_f32): Remove.
25402 (vcmpleq_n_f32): Remove.
25403 (vcmpleq_f32): Remove.
25404 (vcmpgtq_n_f32): Remove.
25405 (vcmpgtq_f32): Remove.
25406 (vcmpgeq_n_f32): Remove.
25407 (vcmpgeq_f32): Remove.
25408 (vcmpeqq_n_f32): Remove.
25409 (vcmpeqq_f32): Remove.
25410 (vcmpeqq_m_f16): Remove.
25411 (vcmpeqq_m_f32): Remove.
25412 (vcmpneq_m_u8): Remove.
25413 (vcmpneq_m_n_u8): Remove.
25414 (vcmphiq_m_u8): Remove.
25415 (vcmphiq_m_n_u8): Remove.
25416 (vcmpeqq_m_u8): Remove.
25417 (vcmpeqq_m_n_u8): Remove.
25418 (vcmpcsq_m_u8): Remove.
25419 (vcmpcsq_m_n_u8): Remove.
25420 (vcmpneq_m_s8): Remove.
25421 (vcmpneq_m_n_s8): Remove.
25422 (vcmpltq_m_s8): Remove.
25423 (vcmpltq_m_n_s8): Remove.
25424 (vcmpleq_m_s8): Remove.
25425 (vcmpleq_m_n_s8): Remove.
25426 (vcmpgtq_m_s8): Remove.
25427 (vcmpgtq_m_n_s8): Remove.
25428 (vcmpgeq_m_s8): Remove.
25429 (vcmpgeq_m_n_s8): Remove.
25430 (vcmpeqq_m_s8): Remove.
25431 (vcmpeqq_m_n_s8): Remove.
25432 (vcmpneq_m_u16): Remove.
25433 (vcmpneq_m_n_u16): Remove.
25434 (vcmphiq_m_u16): Remove.
25435 (vcmphiq_m_n_u16): Remove.
25436 (vcmpeqq_m_u16): Remove.
25437 (vcmpeqq_m_n_u16): Remove.
25438 (vcmpcsq_m_u16): Remove.
25439 (vcmpcsq_m_n_u16): Remove.
25440 (vcmpneq_m_s16): Remove.
25441 (vcmpneq_m_n_s16): Remove.
25442 (vcmpltq_m_s16): Remove.
25443 (vcmpltq_m_n_s16): Remove.
25444 (vcmpleq_m_s16): Remove.
25445 (vcmpleq_m_n_s16): Remove.
25446 (vcmpgtq_m_s16): Remove.
25447 (vcmpgtq_m_n_s16): Remove.
25448 (vcmpgeq_m_s16): Remove.
25449 (vcmpgeq_m_n_s16): Remove.
25450 (vcmpeqq_m_s16): Remove.
25451 (vcmpeqq_m_n_s16): Remove.
25452 (vcmpneq_m_u32): Remove.
25453 (vcmpneq_m_n_u32): Remove.
25454 (vcmphiq_m_u32): Remove.
25455 (vcmphiq_m_n_u32): Remove.
25456 (vcmpeqq_m_u32): Remove.
25457 (vcmpeqq_m_n_u32): Remove.
25458 (vcmpcsq_m_u32): Remove.
25459 (vcmpcsq_m_n_u32): Remove.
25460 (vcmpneq_m_s32): Remove.
25461 (vcmpneq_m_n_s32): Remove.
25462 (vcmpltq_m_s32): Remove.
25463 (vcmpltq_m_n_s32): Remove.
25464 (vcmpleq_m_s32): Remove.
25465 (vcmpleq_m_n_s32): Remove.
25466 (vcmpgtq_m_s32): Remove.
25467 (vcmpgtq_m_n_s32): Remove.
25468 (vcmpgeq_m_s32): Remove.
25469 (vcmpgeq_m_n_s32): Remove.
25470 (vcmpeqq_m_s32): Remove.
25471 (vcmpeqq_m_n_s32): Remove.
25472 (vcmpeqq_m_n_f16): Remove.
25473 (vcmpgeq_m_f16): Remove.
25474 (vcmpgeq_m_n_f16): Remove.
25475 (vcmpgtq_m_f16): Remove.
25476 (vcmpgtq_m_n_f16): Remove.
25477 (vcmpleq_m_f16): Remove.
25478 (vcmpleq_m_n_f16): Remove.
25479 (vcmpltq_m_f16): Remove.
25480 (vcmpltq_m_n_f16): Remove.
25481 (vcmpneq_m_f16): Remove.
25482 (vcmpneq_m_n_f16): Remove.
25483 (vcmpeqq_m_n_f32): Remove.
25484 (vcmpgeq_m_f32): Remove.
25485 (vcmpgeq_m_n_f32): Remove.
25486 (vcmpgtq_m_f32): Remove.
25487 (vcmpgtq_m_n_f32): Remove.
25488 (vcmpleq_m_f32): Remove.
25489 (vcmpleq_m_n_f32): Remove.
25490 (vcmpltq_m_f32): Remove.
25491 (vcmpltq_m_n_f32): Remove.
25492 (vcmpneq_m_f32): Remove.
25493 (vcmpneq_m_n_f32): Remove.
25494 (__arm_vcmpneq_s8): Remove.
25495 (__arm_vcmpneq_s16): Remove.
25496 (__arm_vcmpneq_s32): Remove.
25497 (__arm_vcmpneq_u8): Remove.
25498 (__arm_vcmpneq_u16): Remove.
25499 (__arm_vcmpneq_u32): Remove.
25500 (__arm_vcmpneq_n_u8): Remove.
25501 (__arm_vcmphiq_u8): Remove.
25502 (__arm_vcmphiq_n_u8): Remove.
25503 (__arm_vcmpeqq_u8): Remove.
25504 (__arm_vcmpeqq_n_u8): Remove.
25505 (__arm_vcmpcsq_u8): Remove.
25506 (__arm_vcmpcsq_n_u8): Remove.
25507 (__arm_vcmpneq_n_s8): Remove.
25508 (__arm_vcmpltq_s8): Remove.
25509 (__arm_vcmpltq_n_s8): Remove.
25510 (__arm_vcmpleq_s8): Remove.
25511 (__arm_vcmpleq_n_s8): Remove.
25512 (__arm_vcmpgtq_s8): Remove.
25513 (__arm_vcmpgtq_n_s8): Remove.
25514 (__arm_vcmpgeq_s8): Remove.
25515 (__arm_vcmpgeq_n_s8): Remove.
25516 (__arm_vcmpeqq_s8): Remove.
25517 (__arm_vcmpeqq_n_s8): Remove.
25518 (__arm_vcmpneq_n_u16): Remove.
25519 (__arm_vcmphiq_u16): Remove.
25520 (__arm_vcmphiq_n_u16): Remove.
25521 (__arm_vcmpeqq_u16): Remove.
25522 (__arm_vcmpeqq_n_u16): Remove.
25523 (__arm_vcmpcsq_u16): Remove.
25524 (__arm_vcmpcsq_n_u16): Remove.
25525 (__arm_vcmpneq_n_s16): Remove.
25526 (__arm_vcmpltq_s16): Remove.
25527 (__arm_vcmpltq_n_s16): Remove.
25528 (__arm_vcmpleq_s16): Remove.
25529 (__arm_vcmpleq_n_s16): Remove.
25530 (__arm_vcmpgtq_s16): Remove.
25531 (__arm_vcmpgtq_n_s16): Remove.
25532 (__arm_vcmpgeq_s16): Remove.
25533 (__arm_vcmpgeq_n_s16): Remove.
25534 (__arm_vcmpeqq_s16): Remove.
25535 (__arm_vcmpeqq_n_s16): Remove.
25536 (__arm_vcmpneq_n_u32): Remove.
25537 (__arm_vcmphiq_u32): Remove.
25538 (__arm_vcmphiq_n_u32): Remove.
25539 (__arm_vcmpeqq_u32): Remove.
25540 (__arm_vcmpeqq_n_u32): Remove.
25541 (__arm_vcmpcsq_u32): Remove.
25542 (__arm_vcmpcsq_n_u32): Remove.
25543 (__arm_vcmpneq_n_s32): Remove.
25544 (__arm_vcmpltq_s32): Remove.
25545 (__arm_vcmpltq_n_s32): Remove.
25546 (__arm_vcmpleq_s32): Remove.
25547 (__arm_vcmpleq_n_s32): Remove.
25548 (__arm_vcmpgtq_s32): Remove.
25549 (__arm_vcmpgtq_n_s32): Remove.
25550 (__arm_vcmpgeq_s32): Remove.
25551 (__arm_vcmpgeq_n_s32): Remove.
25552 (__arm_vcmpeqq_s32): Remove.
25553 (__arm_vcmpeqq_n_s32): Remove.
25554 (__arm_vcmpneq_m_u8): Remove.
25555 (__arm_vcmpneq_m_n_u8): Remove.
25556 (__arm_vcmphiq_m_u8): Remove.
25557 (__arm_vcmphiq_m_n_u8): Remove.
25558 (__arm_vcmpeqq_m_u8): Remove.
25559 (__arm_vcmpeqq_m_n_u8): Remove.
25560 (__arm_vcmpcsq_m_u8): Remove.
25561 (__arm_vcmpcsq_m_n_u8): Remove.
25562 (__arm_vcmpneq_m_s8): Remove.
25563 (__arm_vcmpneq_m_n_s8): Remove.
25564 (__arm_vcmpltq_m_s8): Remove.
25565 (__arm_vcmpltq_m_n_s8): Remove.
25566 (__arm_vcmpleq_m_s8): Remove.
25567 (__arm_vcmpleq_m_n_s8): Remove.
25568 (__arm_vcmpgtq_m_s8): Remove.
25569 (__arm_vcmpgtq_m_n_s8): Remove.
25570 (__arm_vcmpgeq_m_s8): Remove.
25571 (__arm_vcmpgeq_m_n_s8): Remove.
25572 (__arm_vcmpeqq_m_s8): Remove.
25573 (__arm_vcmpeqq_m_n_s8): Remove.
25574 (__arm_vcmpneq_m_u16): Remove.
25575 (__arm_vcmpneq_m_n_u16): Remove.
25576 (__arm_vcmphiq_m_u16): Remove.
25577 (__arm_vcmphiq_m_n_u16): Remove.
25578 (__arm_vcmpeqq_m_u16): Remove.
25579 (__arm_vcmpeqq_m_n_u16): Remove.
25580 (__arm_vcmpcsq_m_u16): Remove.
25581 (__arm_vcmpcsq_m_n_u16): Remove.
25582 (__arm_vcmpneq_m_s16): Remove.
25583 (__arm_vcmpneq_m_n_s16): Remove.
25584 (__arm_vcmpltq_m_s16): Remove.
25585 (__arm_vcmpltq_m_n_s16): Remove.
25586 (__arm_vcmpleq_m_s16): Remove.
25587 (__arm_vcmpleq_m_n_s16): Remove.
25588 (__arm_vcmpgtq_m_s16): Remove.
25589 (__arm_vcmpgtq_m_n_s16): Remove.
25590 (__arm_vcmpgeq_m_s16): Remove.
25591 (__arm_vcmpgeq_m_n_s16): Remove.
25592 (__arm_vcmpeqq_m_s16): Remove.
25593 (__arm_vcmpeqq_m_n_s16): Remove.
25594 (__arm_vcmpneq_m_u32): Remove.
25595 (__arm_vcmpneq_m_n_u32): Remove.
25596 (__arm_vcmphiq_m_u32): Remove.
25597 (__arm_vcmphiq_m_n_u32): Remove.
25598 (__arm_vcmpeqq_m_u32): Remove.
25599 (__arm_vcmpeqq_m_n_u32): Remove.
25600 (__arm_vcmpcsq_m_u32): Remove.
25601 (__arm_vcmpcsq_m_n_u32): Remove.
25602 (__arm_vcmpneq_m_s32): Remove.
25603 (__arm_vcmpneq_m_n_s32): Remove.
25604 (__arm_vcmpltq_m_s32): Remove.
25605 (__arm_vcmpltq_m_n_s32): Remove.
25606 (__arm_vcmpleq_m_s32): Remove.
25607 (__arm_vcmpleq_m_n_s32): Remove.
25608 (__arm_vcmpgtq_m_s32): Remove.
25609 (__arm_vcmpgtq_m_n_s32): Remove.
25610 (__arm_vcmpgeq_m_s32): Remove.
25611 (__arm_vcmpgeq_m_n_s32): Remove.
25612 (__arm_vcmpeqq_m_s32): Remove.
25613 (__arm_vcmpeqq_m_n_s32): Remove.
25614 (__arm_vcmpneq_n_f16): Remove.
25615 (__arm_vcmpneq_f16): Remove.
25616 (__arm_vcmpltq_n_f16): Remove.
25617 (__arm_vcmpltq_f16): Remove.
25618 (__arm_vcmpleq_n_f16): Remove.
25619 (__arm_vcmpleq_f16): Remove.
25620 (__arm_vcmpgtq_n_f16): Remove.
25621 (__arm_vcmpgtq_f16): Remove.
25622 (__arm_vcmpgeq_n_f16): Remove.
25623 (__arm_vcmpgeq_f16): Remove.
25624 (__arm_vcmpeqq_n_f16): Remove.
25625 (__arm_vcmpeqq_f16): Remove.
25626 (__arm_vcmpneq_n_f32): Remove.
25627 (__arm_vcmpneq_f32): Remove.
25628 (__arm_vcmpltq_n_f32): Remove.
25629 (__arm_vcmpltq_f32): Remove.
25630 (__arm_vcmpleq_n_f32): Remove.
25631 (__arm_vcmpleq_f32): Remove.
25632 (__arm_vcmpgtq_n_f32): Remove.
25633 (__arm_vcmpgtq_f32): Remove.
25634 (__arm_vcmpgeq_n_f32): Remove.
25635 (__arm_vcmpgeq_f32): Remove.
25636 (__arm_vcmpeqq_n_f32): Remove.
25637 (__arm_vcmpeqq_f32): Remove.
25638 (__arm_vcmpeqq_m_f16): Remove.
25639 (__arm_vcmpeqq_m_f32): Remove.
25640 (__arm_vcmpeqq_m_n_f16): Remove.
25641 (__arm_vcmpgeq_m_f16): Remove.
25642 (__arm_vcmpgeq_m_n_f16): Remove.
25643 (__arm_vcmpgtq_m_f16): Remove.
25644 (__arm_vcmpgtq_m_n_f16): Remove.
25645 (__arm_vcmpleq_m_f16): Remove.
25646 (__arm_vcmpleq_m_n_f16): Remove.
25647 (__arm_vcmpltq_m_f16): Remove.
25648 (__arm_vcmpltq_m_n_f16): Remove.
25649 (__arm_vcmpneq_m_f16): Remove.
25650 (__arm_vcmpneq_m_n_f16): Remove.
25651 (__arm_vcmpeqq_m_n_f32): Remove.
25652 (__arm_vcmpgeq_m_f32): Remove.
25653 (__arm_vcmpgeq_m_n_f32): Remove.
25654 (__arm_vcmpgtq_m_f32): Remove.
25655 (__arm_vcmpgtq_m_n_f32): Remove.
25656 (__arm_vcmpleq_m_f32): Remove.
25657 (__arm_vcmpleq_m_n_f32): Remove.
25658 (__arm_vcmpltq_m_f32): Remove.
25659 (__arm_vcmpltq_m_n_f32): Remove.
25660 (__arm_vcmpneq_m_f32): Remove.
25661 (__arm_vcmpneq_m_n_f32): Remove.
25662 (__arm_vcmpneq): Remove.
25663 (__arm_vcmphiq): Remove.
25664 (__arm_vcmpeqq): Remove.
25665 (__arm_vcmpcsq): Remove.
25666 (__arm_vcmpltq): Remove.
25667 (__arm_vcmpleq): Remove.
25668 (__arm_vcmpgtq): Remove.
25669 (__arm_vcmpgeq): Remove.
25670 (__arm_vcmpneq_m): Remove.
25671 (__arm_vcmphiq_m): Remove.
25672 (__arm_vcmpeqq_m): Remove.
25673 (__arm_vcmpcsq_m): Remove.
25674 (__arm_vcmpltq_m): Remove.
25675 (__arm_vcmpleq_m): Remove.
25676 (__arm_vcmpgtq_m): Remove.
25677 (__arm_vcmpgeq_m): Remove.
25679 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25681 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
25682 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
25684 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25686 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
25687 (MVE_CMP_M_N_F, mve_cmp_op1): New.
25690 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
25691 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
25692 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
25693 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
25694 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
25695 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
25696 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
25697 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
25698 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
25699 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
25701 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
25702 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
25703 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
25704 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
25705 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
25707 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
25708 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
25709 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
25710 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
25711 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
25713 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
25715 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
25716 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
25717 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
25720 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
25722 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
25723 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
25724 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
25725 Simplify parity(rotate(x,y)) as parity(x).
25727 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25729 * config/riscv/autovec.md (@vec_series<mode>): New pattern
25730 * config/riscv/riscv-protos.h (expand_vec_series): New function.
25731 * config/riscv/riscv-v.cc (emit_binop): Ditto.
25732 (emit_index_op): Ditto.
25733 (expand_vec_series): Ditto.
25734 (expand_const_vector): Add series vector handling.
25735 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
25737 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
25739 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
25740 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
25741 (*concat<mode><dwi>3_2): Likewise.
25742 (*concat<mode><dwi>3_3): Likewise.
25743 (*concat<mode><dwi>3_4): Likewise.
25744 (*concat<mode><dwi>3_5): Likewise.
25745 (*concat<mode><dwi>3_6): Likewise.
25746 (*concat<mode><dwi>3_7): Likewise.
25748 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
25751 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
25752 (<insn>v4qiv4hi2): New expander.
25753 (<insn>v2hiv2si2): Ditto.
25754 (<insn>v2qiv2si2): Ditto.
25755 (<insn>v2qiv2hi2): Ditto.
25757 2023-05-10 Jeff Law <jlaw@ventanamicro>
25759 * config/h8300/constraints.md (Q): Make this a special memory
25763 2023-05-10 Jakub Jelinek <jakub@redhat.com>
25766 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
25767 if t is void_list_node.
25769 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25771 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
25772 (aarch64_sqmovun<mode>_insn_be): Delete.
25773 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
25774 (aarch64_sqmovun<mode>): Delete expander.
25776 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25779 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
25781 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
25782 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
25783 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
25785 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25788 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
25790 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
25791 (aarch64_<sur>qadd<mode>): Rename to...
25792 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
25794 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25796 * config/aarch64/aarch64-simd.md
25797 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
25798 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
25799 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
25800 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
25802 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25805 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
25806 (aarch64_xtn<mode>_insn_be): Likewise.
25807 (trunc<mode><Vnarrowq>2): Rename to...
25808 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
25809 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
25810 (aarch64_<su>qmovn<mode>): Likewise.
25811 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
25812 (aarch64_<su>qmovn<mode>_insn_le): Delete.
25813 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
25815 2023-05-10 Li Xu <xuli1@eswincomputing.com>
25817 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
25818 intruction replace null avl with (const_int 0).
25820 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25822 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
25825 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25828 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
25829 (source_equal_p): Fix dead loop in vsetvl avl checking.
25831 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
25833 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
25834 of modeadjusted_dccr.
25836 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25838 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
25839 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
25840 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
25841 * config/arm/arm-mve-builtins.cc
25842 (function_instance::has_inactive_argument): Handle vmaxaq and
25844 * config/arm/arm_mve.h (vminaq): Remove.
25846 (vminaq_m): Remove.
25847 (vmaxaq_m): Remove.
25848 (vminaq_s8): Remove.
25849 (vmaxaq_s8): Remove.
25850 (vminaq_s16): Remove.
25851 (vmaxaq_s16): Remove.
25852 (vminaq_s32): Remove.
25853 (vmaxaq_s32): Remove.
25854 (vminaq_m_s8): Remove.
25855 (vmaxaq_m_s8): Remove.
25856 (vminaq_m_s16): Remove.
25857 (vmaxaq_m_s16): Remove.
25858 (vminaq_m_s32): Remove.
25859 (vmaxaq_m_s32): Remove.
25860 (__arm_vminaq_s8): Remove.
25861 (__arm_vmaxaq_s8): Remove.
25862 (__arm_vminaq_s16): Remove.
25863 (__arm_vmaxaq_s16): Remove.
25864 (__arm_vminaq_s32): Remove.
25865 (__arm_vmaxaq_s32): Remove.
25866 (__arm_vminaq_m_s8): Remove.
25867 (__arm_vmaxaq_m_s8): Remove.
25868 (__arm_vminaq_m_s16): Remove.
25869 (__arm_vmaxaq_m_s16): Remove.
25870 (__arm_vminaq_m_s32): Remove.
25871 (__arm_vmaxaq_m_s32): Remove.
25872 (__arm_vminaq): Remove.
25873 (__arm_vmaxaq): Remove.
25874 (__arm_vminaq_m): Remove.
25875 (__arm_vmaxaq_m): Remove.
25877 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25879 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
25881 (mve_insn): Add vmaxa, vmina.
25882 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
25883 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
25885 (@mve_<mve_insn>q_<supf><mode>): ... this.
25886 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
25887 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25889 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25891 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
25892 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
25894 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25896 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
25897 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
25898 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
25899 * config/arm/arm-mve-builtins.cc
25900 (function_instance::has_inactive_argument): Handle vmaxnmaq and
25902 * config/arm/arm_mve.h (vminnmaq): Remove.
25903 (vmaxnmaq): Remove.
25904 (vmaxnmaq_m): Remove.
25905 (vminnmaq_m): Remove.
25906 (vminnmaq_f16): Remove.
25907 (vmaxnmaq_f16): Remove.
25908 (vminnmaq_f32): Remove.
25909 (vmaxnmaq_f32): Remove.
25910 (vmaxnmaq_m_f16): Remove.
25911 (vminnmaq_m_f16): Remove.
25912 (vmaxnmaq_m_f32): Remove.
25913 (vminnmaq_m_f32): Remove.
25914 (__arm_vminnmaq_f16): Remove.
25915 (__arm_vmaxnmaq_f16): Remove.
25916 (__arm_vminnmaq_f32): Remove.
25917 (__arm_vmaxnmaq_f32): Remove.
25918 (__arm_vmaxnmaq_m_f16): Remove.
25919 (__arm_vminnmaq_m_f16): Remove.
25920 (__arm_vmaxnmaq_m_f32): Remove.
25921 (__arm_vminnmaq_m_f32): Remove.
25922 (__arm_vminnmaq): Remove.
25923 (__arm_vmaxnmaq): Remove.
25924 (__arm_vmaxnmaq_m): Remove.
25925 (__arm_vminnmaq_m): Remove.
25927 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25929 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
25930 (MVE_VMAXNMA_VMINNMAQ_M): New.
25931 (mve_insn): Add vmaxnma, vminnma.
25932 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
25934 (@mve_<mve_insn>q_f<mode>): ... this.
25935 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
25936 (@mve_<mve_insn>q_m_f<mode>): ... this.
25938 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25940 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
25941 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
25942 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
25943 (vminnmavq, vminnmvq): New.
25944 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
25945 (vminnmavq, vminnmvq): New.
25946 * config/arm/arm_mve.h (vminnmvq): Remove.
25947 (vminnmavq): Remove.
25948 (vmaxnmvq): Remove.
25949 (vmaxnmavq): Remove.
25950 (vmaxnmavq_p): Remove.
25951 (vmaxnmvq_p): Remove.
25952 (vminnmavq_p): Remove.
25953 (vminnmvq_p): Remove.
25954 (vminnmvq_f16): Remove.
25955 (vminnmavq_f16): Remove.
25956 (vmaxnmvq_f16): Remove.
25957 (vmaxnmavq_f16): Remove.
25958 (vminnmvq_f32): Remove.
25959 (vminnmavq_f32): Remove.
25960 (vmaxnmvq_f32): Remove.
25961 (vmaxnmavq_f32): Remove.
25962 (vmaxnmavq_p_f16): Remove.
25963 (vmaxnmvq_p_f16): Remove.
25964 (vminnmavq_p_f16): Remove.
25965 (vminnmvq_p_f16): Remove.
25966 (vmaxnmavq_p_f32): Remove.
25967 (vmaxnmvq_p_f32): Remove.
25968 (vminnmavq_p_f32): Remove.
25969 (vminnmvq_p_f32): Remove.
25970 (__arm_vminnmvq_f16): Remove.
25971 (__arm_vminnmavq_f16): Remove.
25972 (__arm_vmaxnmvq_f16): Remove.
25973 (__arm_vmaxnmavq_f16): Remove.
25974 (__arm_vminnmvq_f32): Remove.
25975 (__arm_vminnmavq_f32): Remove.
25976 (__arm_vmaxnmvq_f32): Remove.
25977 (__arm_vmaxnmavq_f32): Remove.
25978 (__arm_vmaxnmavq_p_f16): Remove.
25979 (__arm_vmaxnmvq_p_f16): Remove.
25980 (__arm_vminnmavq_p_f16): Remove.
25981 (__arm_vminnmvq_p_f16): Remove.
25982 (__arm_vmaxnmavq_p_f32): Remove.
25983 (__arm_vmaxnmvq_p_f32): Remove.
25984 (__arm_vminnmavq_p_f32): Remove.
25985 (__arm_vminnmvq_p_f32): Remove.
25986 (__arm_vminnmvq): Remove.
25987 (__arm_vminnmavq): Remove.
25988 (__arm_vmaxnmvq): Remove.
25989 (__arm_vmaxnmavq): Remove.
25990 (__arm_vmaxnmavq_p): Remove.
25991 (__arm_vmaxnmvq_p): Remove.
25992 (__arm_vminnmavq_p): Remove.
25993 (__arm_vminnmvq_p): Remove.
25994 (__arm_vmaxnmavq_m): Remove.
25995 (__arm_vmaxnmvq_m): Remove.
25997 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25999 * config/arm/arm-mve-builtins-functions.h
26000 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
26002 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26004 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
26005 (MVE_VMAXNMxV_MINNMxVQ_P): New.
26006 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
26007 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
26008 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
26009 (@mve_<mve_insn>q_f<mode>): ... this.
26010 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
26011 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
26012 (@mve_<mve_insn>q_p_f<mode>): ... this.
26014 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26016 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
26017 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
26018 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
26019 * config/arm/arm_mve.h (vminnmq): Remove.
26021 (vmaxnmq_m): Remove.
26022 (vminnmq_m): Remove.
26023 (vminnmq_x): Remove.
26024 (vmaxnmq_x): Remove.
26025 (vminnmq_f16): Remove.
26026 (vmaxnmq_f16): Remove.
26027 (vminnmq_f32): Remove.
26028 (vmaxnmq_f32): Remove.
26029 (vmaxnmq_m_f32): Remove.
26030 (vmaxnmq_m_f16): Remove.
26031 (vminnmq_m_f32): Remove.
26032 (vminnmq_m_f16): Remove.
26033 (vminnmq_x_f16): Remove.
26034 (vminnmq_x_f32): Remove.
26035 (vmaxnmq_x_f16): Remove.
26036 (vmaxnmq_x_f32): Remove.
26037 (__arm_vminnmq_f16): Remove.
26038 (__arm_vmaxnmq_f16): Remove.
26039 (__arm_vminnmq_f32): Remove.
26040 (__arm_vmaxnmq_f32): Remove.
26041 (__arm_vmaxnmq_m_f32): Remove.
26042 (__arm_vmaxnmq_m_f16): Remove.
26043 (__arm_vminnmq_m_f32): Remove.
26044 (__arm_vminnmq_m_f16): Remove.
26045 (__arm_vminnmq_x_f16): Remove.
26046 (__arm_vminnmq_x_f32): Remove.
26047 (__arm_vmaxnmq_x_f16): Remove.
26048 (__arm_vmaxnmq_x_f32): Remove.
26049 (__arm_vminnmq): Remove.
26050 (__arm_vmaxnmq): Remove.
26051 (__arm_vmaxnmq_m): Remove.
26052 (__arm_vminnmq_m): Remove.
26053 (__arm_vminnmq_x): Remove.
26054 (__arm_vmaxnmq_x): Remove.
26056 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26058 * config/arm/iterators.md (MAX_MIN_F): New.
26059 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
26060 (mve_insn): Add vmaxnm, vminnm.
26061 (max_min_f_str): New.
26062 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
26064 (@mve_<max_min_f_str>q_f<mode>): ... this.
26065 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
26066 (@mve_<mve_insn>q_m_f<mode>): ... this.
26068 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26070 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
26071 (smax<mode>3): Likewise.
26073 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26075 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
26076 (FUNCTION_PRED_P_S): New.
26077 (vmaxavq, vminavq, vmaxvq, vminvq): New.
26078 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
26080 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
26082 * config/arm/arm_mve.h (vminvq): Remove.
26084 (vminvq_p): Remove.
26085 (vmaxvq_p): Remove.
26086 (vminvq_u8): Remove.
26087 (vmaxvq_u8): Remove.
26088 (vminvq_s8): Remove.
26089 (vmaxvq_s8): Remove.
26090 (vminvq_u16): Remove.
26091 (vmaxvq_u16): Remove.
26092 (vminvq_s16): Remove.
26093 (vmaxvq_s16): Remove.
26094 (vminvq_u32): Remove.
26095 (vmaxvq_u32): Remove.
26096 (vminvq_s32): Remove.
26097 (vmaxvq_s32): Remove.
26098 (vminvq_p_u8): Remove.
26099 (vmaxvq_p_u8): Remove.
26100 (vminvq_p_s8): Remove.
26101 (vmaxvq_p_s8): Remove.
26102 (vminvq_p_u16): Remove.
26103 (vmaxvq_p_u16): Remove.
26104 (vminvq_p_s16): Remove.
26105 (vmaxvq_p_s16): Remove.
26106 (vminvq_p_u32): Remove.
26107 (vmaxvq_p_u32): Remove.
26108 (vminvq_p_s32): Remove.
26109 (vmaxvq_p_s32): Remove.
26110 (__arm_vminvq_u8): Remove.
26111 (__arm_vmaxvq_u8): Remove.
26112 (__arm_vminvq_s8): Remove.
26113 (__arm_vmaxvq_s8): Remove.
26114 (__arm_vminvq_u16): Remove.
26115 (__arm_vmaxvq_u16): Remove.
26116 (__arm_vminvq_s16): Remove.
26117 (__arm_vmaxvq_s16): Remove.
26118 (__arm_vminvq_u32): Remove.
26119 (__arm_vmaxvq_u32): Remove.
26120 (__arm_vminvq_s32): Remove.
26121 (__arm_vmaxvq_s32): Remove.
26122 (__arm_vminvq_p_u8): Remove.
26123 (__arm_vmaxvq_p_u8): Remove.
26124 (__arm_vminvq_p_s8): Remove.
26125 (__arm_vmaxvq_p_s8): Remove.
26126 (__arm_vminvq_p_u16): Remove.
26127 (__arm_vmaxvq_p_u16): Remove.
26128 (__arm_vminvq_p_s16): Remove.
26129 (__arm_vmaxvq_p_s16): Remove.
26130 (__arm_vminvq_p_u32): Remove.
26131 (__arm_vmaxvq_p_u32): Remove.
26132 (__arm_vminvq_p_s32): Remove.
26133 (__arm_vmaxvq_p_s32): Remove.
26134 (__arm_vminvq): Remove.
26135 (__arm_vmaxvq): Remove.
26136 (__arm_vminvq_p): Remove.
26137 (__arm_vmaxvq_p): Remove.
26140 (vminavq_p): Remove.
26141 (vmaxavq_p): Remove.
26142 (vminavq_s8): Remove.
26143 (vmaxavq_s8): Remove.
26144 (vminavq_s16): Remove.
26145 (vmaxavq_s16): Remove.
26146 (vminavq_s32): Remove.
26147 (vmaxavq_s32): Remove.
26148 (vminavq_p_s8): Remove.
26149 (vmaxavq_p_s8): Remove.
26150 (vminavq_p_s16): Remove.
26151 (vmaxavq_p_s16): Remove.
26152 (vminavq_p_s32): Remove.
26153 (vmaxavq_p_s32): Remove.
26154 (__arm_vminavq_s8): Remove.
26155 (__arm_vmaxavq_s8): Remove.
26156 (__arm_vminavq_s16): Remove.
26157 (__arm_vmaxavq_s16): Remove.
26158 (__arm_vminavq_s32): Remove.
26159 (__arm_vmaxavq_s32): Remove.
26160 (__arm_vminavq_p_s8): Remove.
26161 (__arm_vmaxavq_p_s8): Remove.
26162 (__arm_vminavq_p_s16): Remove.
26163 (__arm_vmaxavq_p_s16): Remove.
26164 (__arm_vminavq_p_s32): Remove.
26165 (__arm_vmaxavq_p_s32): Remove.
26166 (__arm_vminavq): Remove.
26167 (__arm_vmaxavq): Remove.
26168 (__arm_vminavq_p): Remove.
26169 (__arm_vmaxavq_p): Remove.
26171 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26173 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
26174 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
26175 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
26176 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
26177 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
26178 (@mve_<mve_insn>q_<supf><mode>): ... this.
26179 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
26180 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
26181 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
26183 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26185 * config/arm/arm-mve-builtins-functions.h (class
26186 unspec_mve_function_exact_insn_pred_p): New.
26188 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26190 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
26191 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
26193 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26195 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
26196 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
26198 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
26200 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
26202 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
26203 (ADJUST_REG_ALLOC_ORDER): Likewise.
26204 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
26206 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
26207 Upa rather than Upl for unpredicated movprfx alternatives.
26209 2023-05-09 Jeff Law <jlaw@ventanamicro>
26211 * config/h8300/testcompare.md: Add peephole2 which uses a memory
26212 load to set flags, thus eliminating a compare against zero.
26214 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26216 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
26217 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
26218 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
26219 * config/arm/arm_mve.h (vshlltq): Remove.
26221 (vshllbq_m): Remove.
26222 (vshlltq_m): Remove.
26223 (vshllbq_x): Remove.
26224 (vshlltq_x): Remove.
26225 (vshlltq_n_u8): Remove.
26226 (vshllbq_n_u8): Remove.
26227 (vshlltq_n_s8): Remove.
26228 (vshllbq_n_s8): Remove.
26229 (vshlltq_n_u16): Remove.
26230 (vshllbq_n_u16): Remove.
26231 (vshlltq_n_s16): Remove.
26232 (vshllbq_n_s16): Remove.
26233 (vshllbq_m_n_s8): Remove.
26234 (vshllbq_m_n_s16): Remove.
26235 (vshllbq_m_n_u8): Remove.
26236 (vshllbq_m_n_u16): Remove.
26237 (vshlltq_m_n_s8): Remove.
26238 (vshlltq_m_n_s16): Remove.
26239 (vshlltq_m_n_u8): Remove.
26240 (vshlltq_m_n_u16): Remove.
26241 (vshllbq_x_n_s8): Remove.
26242 (vshllbq_x_n_s16): Remove.
26243 (vshllbq_x_n_u8): Remove.
26244 (vshllbq_x_n_u16): Remove.
26245 (vshlltq_x_n_s8): Remove.
26246 (vshlltq_x_n_s16): Remove.
26247 (vshlltq_x_n_u8): Remove.
26248 (vshlltq_x_n_u16): Remove.
26249 (__arm_vshlltq_n_u8): Remove.
26250 (__arm_vshllbq_n_u8): Remove.
26251 (__arm_vshlltq_n_s8): Remove.
26252 (__arm_vshllbq_n_s8): Remove.
26253 (__arm_vshlltq_n_u16): Remove.
26254 (__arm_vshllbq_n_u16): Remove.
26255 (__arm_vshlltq_n_s16): Remove.
26256 (__arm_vshllbq_n_s16): Remove.
26257 (__arm_vshllbq_m_n_s8): Remove.
26258 (__arm_vshllbq_m_n_s16): Remove.
26259 (__arm_vshllbq_m_n_u8): Remove.
26260 (__arm_vshllbq_m_n_u16): Remove.
26261 (__arm_vshlltq_m_n_s8): Remove.
26262 (__arm_vshlltq_m_n_s16): Remove.
26263 (__arm_vshlltq_m_n_u8): Remove.
26264 (__arm_vshlltq_m_n_u16): Remove.
26265 (__arm_vshllbq_x_n_s8): Remove.
26266 (__arm_vshllbq_x_n_s16): Remove.
26267 (__arm_vshllbq_x_n_u8): Remove.
26268 (__arm_vshllbq_x_n_u16): Remove.
26269 (__arm_vshlltq_x_n_s8): Remove.
26270 (__arm_vshlltq_x_n_s16): Remove.
26271 (__arm_vshlltq_x_n_u8): Remove.
26272 (__arm_vshlltq_x_n_u16): Remove.
26273 (__arm_vshlltq): Remove.
26274 (__arm_vshllbq): Remove.
26275 (__arm_vshllbq_m): Remove.
26276 (__arm_vshlltq_m): Remove.
26277 (__arm_vshllbq_x): Remove.
26278 (__arm_vshlltq_x): Remove.
26280 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26282 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
26283 (VSHLLBQ_N, VSHLLTQ_N): Remove.
26285 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
26286 (VSHLLxQ_M_N): New.
26287 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
26288 (mve_vshlltq_n_<supf><mode>): Merge into ...
26289 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26290 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
26292 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26294 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26296 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
26297 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
26299 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26301 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
26302 (vqmovntq, vqmovunbq, vqmovuntq): New.
26303 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
26304 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
26305 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
26306 (vqmovntq, vqmovunbq, vqmovuntq): New.
26307 * config/arm/arm-mve-builtins.cc
26308 (function_instance::has_inactive_argument): Handle vmovnbq,
26309 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
26310 * config/arm/arm_mve.h (vqmovntq): Remove.
26311 (vqmovnbq): Remove.
26312 (vqmovnbq_m): Remove.
26313 (vqmovntq_m): Remove.
26314 (vqmovntq_u16): Remove.
26315 (vqmovnbq_u16): Remove.
26316 (vqmovntq_s16): Remove.
26317 (vqmovnbq_s16): Remove.
26318 (vqmovntq_u32): Remove.
26319 (vqmovnbq_u32): Remove.
26320 (vqmovntq_s32): Remove.
26321 (vqmovnbq_s32): Remove.
26322 (vqmovnbq_m_s16): Remove.
26323 (vqmovntq_m_s16): Remove.
26324 (vqmovnbq_m_u16): Remove.
26325 (vqmovntq_m_u16): Remove.
26326 (vqmovnbq_m_s32): Remove.
26327 (vqmovntq_m_s32): Remove.
26328 (vqmovnbq_m_u32): Remove.
26329 (vqmovntq_m_u32): Remove.
26330 (__arm_vqmovntq_u16): Remove.
26331 (__arm_vqmovnbq_u16): Remove.
26332 (__arm_vqmovntq_s16): Remove.
26333 (__arm_vqmovnbq_s16): Remove.
26334 (__arm_vqmovntq_u32): Remove.
26335 (__arm_vqmovnbq_u32): Remove.
26336 (__arm_vqmovntq_s32): Remove.
26337 (__arm_vqmovnbq_s32): Remove.
26338 (__arm_vqmovnbq_m_s16): Remove.
26339 (__arm_vqmovntq_m_s16): Remove.
26340 (__arm_vqmovnbq_m_u16): Remove.
26341 (__arm_vqmovntq_m_u16): Remove.
26342 (__arm_vqmovnbq_m_s32): Remove.
26343 (__arm_vqmovntq_m_s32): Remove.
26344 (__arm_vqmovnbq_m_u32): Remove.
26345 (__arm_vqmovntq_m_u32): Remove.
26346 (__arm_vqmovntq): Remove.
26347 (__arm_vqmovnbq): Remove.
26348 (__arm_vqmovnbq_m): Remove.
26349 (__arm_vqmovntq_m): Remove.
26352 (vmovnbq_m): Remove.
26353 (vmovntq_m): Remove.
26354 (vmovntq_u16): Remove.
26355 (vmovnbq_u16): Remove.
26356 (vmovntq_s16): Remove.
26357 (vmovnbq_s16): Remove.
26358 (vmovntq_u32): Remove.
26359 (vmovnbq_u32): Remove.
26360 (vmovntq_s32): Remove.
26361 (vmovnbq_s32): Remove.
26362 (vmovnbq_m_s16): Remove.
26363 (vmovntq_m_s16): Remove.
26364 (vmovnbq_m_u16): Remove.
26365 (vmovntq_m_u16): Remove.
26366 (vmovnbq_m_s32): Remove.
26367 (vmovntq_m_s32): Remove.
26368 (vmovnbq_m_u32): Remove.
26369 (vmovntq_m_u32): Remove.
26370 (__arm_vmovntq_u16): Remove.
26371 (__arm_vmovnbq_u16): Remove.
26372 (__arm_vmovntq_s16): Remove.
26373 (__arm_vmovnbq_s16): Remove.
26374 (__arm_vmovntq_u32): Remove.
26375 (__arm_vmovnbq_u32): Remove.
26376 (__arm_vmovntq_s32): Remove.
26377 (__arm_vmovnbq_s32): Remove.
26378 (__arm_vmovnbq_m_s16): Remove.
26379 (__arm_vmovntq_m_s16): Remove.
26380 (__arm_vmovnbq_m_u16): Remove.
26381 (__arm_vmovntq_m_u16): Remove.
26382 (__arm_vmovnbq_m_s32): Remove.
26383 (__arm_vmovntq_m_s32): Remove.
26384 (__arm_vmovnbq_m_u32): Remove.
26385 (__arm_vmovntq_m_u32): Remove.
26386 (__arm_vmovntq): Remove.
26387 (__arm_vmovnbq): Remove.
26388 (__arm_vmovnbq_m): Remove.
26389 (__arm_vmovntq_m): Remove.
26390 (vqmovuntq): Remove.
26391 (vqmovunbq): Remove.
26392 (vqmovunbq_m): Remove.
26393 (vqmovuntq_m): Remove.
26394 (vqmovuntq_s16): Remove.
26395 (vqmovunbq_s16): Remove.
26396 (vqmovuntq_s32): Remove.
26397 (vqmovunbq_s32): Remove.
26398 (vqmovunbq_m_s16): Remove.
26399 (vqmovuntq_m_s16): Remove.
26400 (vqmovunbq_m_s32): Remove.
26401 (vqmovuntq_m_s32): Remove.
26402 (__arm_vqmovuntq_s16): Remove.
26403 (__arm_vqmovunbq_s16): Remove.
26404 (__arm_vqmovuntq_s32): Remove.
26405 (__arm_vqmovunbq_s32): Remove.
26406 (__arm_vqmovunbq_m_s16): Remove.
26407 (__arm_vqmovuntq_m_s16): Remove.
26408 (__arm_vqmovunbq_m_s32): Remove.
26409 (__arm_vqmovuntq_m_s32): Remove.
26410 (__arm_vqmovuntq): Remove.
26411 (__arm_vqmovunbq): Remove.
26412 (__arm_vqmovunbq_m): Remove.
26413 (__arm_vqmovuntq_m): Remove.
26415 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26417 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
26418 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
26421 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
26423 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
26424 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
26425 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
26426 (mve_vqmovuntq_s<mode>): Merge into ...
26427 (@mve_<mve_insn>q_<supf><mode>): ... this.
26428 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
26429 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
26430 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
26431 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
26433 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26435 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
26436 (binary_move_narrow_unsigned): New.
26437 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
26438 (binary_move_narrow_unsigned): New.
26440 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26442 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
26443 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
26444 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
26445 (vrndpq, vrndq, vrndxq): New.
26446 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
26447 (vrndpq, vrndq, vrndxq): New.
26448 * config/arm/arm_mve.h (vrndxq): Remove.
26454 (vrndaq_m): Remove.
26455 (vrndmq_m): Remove.
26456 (vrndnq_m): Remove.
26457 (vrndpq_m): Remove.
26459 (vrndxq_m): Remove.
26461 (vrndnq_x): Remove.
26462 (vrndmq_x): Remove.
26463 (vrndpq_x): Remove.
26464 (vrndaq_x): Remove.
26465 (vrndxq_x): Remove.
26466 (vrndxq_f16): Remove.
26467 (vrndxq_f32): Remove.
26468 (vrndq_f16): Remove.
26469 (vrndq_f32): Remove.
26470 (vrndpq_f16): Remove.
26471 (vrndpq_f32): Remove.
26472 (vrndnq_f16): Remove.
26473 (vrndnq_f32): Remove.
26474 (vrndmq_f16): Remove.
26475 (vrndmq_f32): Remove.
26476 (vrndaq_f16): Remove.
26477 (vrndaq_f32): Remove.
26478 (vrndaq_m_f16): Remove.
26479 (vrndmq_m_f16): Remove.
26480 (vrndnq_m_f16): Remove.
26481 (vrndpq_m_f16): Remove.
26482 (vrndq_m_f16): Remove.
26483 (vrndxq_m_f16): Remove.
26484 (vrndaq_m_f32): Remove.
26485 (vrndmq_m_f32): Remove.
26486 (vrndnq_m_f32): Remove.
26487 (vrndpq_m_f32): Remove.
26488 (vrndq_m_f32): Remove.
26489 (vrndxq_m_f32): Remove.
26490 (vrndq_x_f16): Remove.
26491 (vrndq_x_f32): Remove.
26492 (vrndnq_x_f16): Remove.
26493 (vrndnq_x_f32): Remove.
26494 (vrndmq_x_f16): Remove.
26495 (vrndmq_x_f32): Remove.
26496 (vrndpq_x_f16): Remove.
26497 (vrndpq_x_f32): Remove.
26498 (vrndaq_x_f16): Remove.
26499 (vrndaq_x_f32): Remove.
26500 (vrndxq_x_f16): Remove.
26501 (vrndxq_x_f32): Remove.
26502 (__arm_vrndxq_f16): Remove.
26503 (__arm_vrndxq_f32): Remove.
26504 (__arm_vrndq_f16): Remove.
26505 (__arm_vrndq_f32): Remove.
26506 (__arm_vrndpq_f16): Remove.
26507 (__arm_vrndpq_f32): Remove.
26508 (__arm_vrndnq_f16): Remove.
26509 (__arm_vrndnq_f32): Remove.
26510 (__arm_vrndmq_f16): Remove.
26511 (__arm_vrndmq_f32): Remove.
26512 (__arm_vrndaq_f16): Remove.
26513 (__arm_vrndaq_f32): Remove.
26514 (__arm_vrndaq_m_f16): Remove.
26515 (__arm_vrndmq_m_f16): Remove.
26516 (__arm_vrndnq_m_f16): Remove.
26517 (__arm_vrndpq_m_f16): Remove.
26518 (__arm_vrndq_m_f16): Remove.
26519 (__arm_vrndxq_m_f16): Remove.
26520 (__arm_vrndaq_m_f32): Remove.
26521 (__arm_vrndmq_m_f32): Remove.
26522 (__arm_vrndnq_m_f32): Remove.
26523 (__arm_vrndpq_m_f32): Remove.
26524 (__arm_vrndq_m_f32): Remove.
26525 (__arm_vrndxq_m_f32): Remove.
26526 (__arm_vrndq_x_f16): Remove.
26527 (__arm_vrndq_x_f32): Remove.
26528 (__arm_vrndnq_x_f16): Remove.
26529 (__arm_vrndnq_x_f32): Remove.
26530 (__arm_vrndmq_x_f16): Remove.
26531 (__arm_vrndmq_x_f32): Remove.
26532 (__arm_vrndpq_x_f16): Remove.
26533 (__arm_vrndpq_x_f32): Remove.
26534 (__arm_vrndaq_x_f16): Remove.
26535 (__arm_vrndaq_x_f32): Remove.
26536 (__arm_vrndxq_x_f16): Remove.
26537 (__arm_vrndxq_x_f32): Remove.
26538 (__arm_vrndxq): Remove.
26539 (__arm_vrndq): Remove.
26540 (__arm_vrndpq): Remove.
26541 (__arm_vrndnq): Remove.
26542 (__arm_vrndmq): Remove.
26543 (__arm_vrndaq): Remove.
26544 (__arm_vrndaq_m): Remove.
26545 (__arm_vrndmq_m): Remove.
26546 (__arm_vrndnq_m): Remove.
26547 (__arm_vrndpq_m): Remove.
26548 (__arm_vrndq_m): Remove.
26549 (__arm_vrndxq_m): Remove.
26550 (__arm_vrndq_x): Remove.
26551 (__arm_vrndnq_x): Remove.
26552 (__arm_vrndmq_x): Remove.
26553 (__arm_vrndpq_x): Remove.
26554 (__arm_vrndaq_x): Remove.
26555 (__arm_vrndxq_x): Remove.
26557 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26559 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
26560 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
26561 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
26562 (vclzq, vqabsq, vqnegq): New.
26563 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
26564 (vqabsq, vqnegq): New.
26565 * config/arm/arm_mve.h (vabsq): Remove.
26568 (vabsq_f16): Remove.
26569 (vabsq_f32): Remove.
26570 (vabsq_s8): Remove.
26571 (vabsq_s16): Remove.
26572 (vabsq_s32): Remove.
26573 (vabsq_m_s8): Remove.
26574 (vabsq_m_s16): Remove.
26575 (vabsq_m_s32): Remove.
26576 (vabsq_m_f16): Remove.
26577 (vabsq_m_f32): Remove.
26578 (vabsq_x_s8): Remove.
26579 (vabsq_x_s16): Remove.
26580 (vabsq_x_s32): Remove.
26581 (vabsq_x_f16): Remove.
26582 (vabsq_x_f32): Remove.
26583 (__arm_vabsq_s8): Remove.
26584 (__arm_vabsq_s16): Remove.
26585 (__arm_vabsq_s32): Remove.
26586 (__arm_vabsq_m_s8): Remove.
26587 (__arm_vabsq_m_s16): Remove.
26588 (__arm_vabsq_m_s32): Remove.
26589 (__arm_vabsq_x_s8): Remove.
26590 (__arm_vabsq_x_s16): Remove.
26591 (__arm_vabsq_x_s32): Remove.
26592 (__arm_vabsq_f16): Remove.
26593 (__arm_vabsq_f32): Remove.
26594 (__arm_vabsq_m_f16): Remove.
26595 (__arm_vabsq_m_f32): Remove.
26596 (__arm_vabsq_x_f16): Remove.
26597 (__arm_vabsq_x_f32): Remove.
26598 (__arm_vabsq): Remove.
26599 (__arm_vabsq_m): Remove.
26600 (__arm_vabsq_x): Remove.
26604 (vnegq_f16): Remove.
26605 (vnegq_f32): Remove.
26606 (vnegq_s8): Remove.
26607 (vnegq_s16): Remove.
26608 (vnegq_s32): Remove.
26609 (vnegq_m_s8): Remove.
26610 (vnegq_m_s16): Remove.
26611 (vnegq_m_s32): Remove.
26612 (vnegq_m_f16): Remove.
26613 (vnegq_m_f32): Remove.
26614 (vnegq_x_s8): Remove.
26615 (vnegq_x_s16): Remove.
26616 (vnegq_x_s32): Remove.
26617 (vnegq_x_f16): Remove.
26618 (vnegq_x_f32): Remove.
26619 (__arm_vnegq_s8): Remove.
26620 (__arm_vnegq_s16): Remove.
26621 (__arm_vnegq_s32): Remove.
26622 (__arm_vnegq_m_s8): Remove.
26623 (__arm_vnegq_m_s16): Remove.
26624 (__arm_vnegq_m_s32): Remove.
26625 (__arm_vnegq_x_s8): Remove.
26626 (__arm_vnegq_x_s16): Remove.
26627 (__arm_vnegq_x_s32): Remove.
26628 (__arm_vnegq_f16): Remove.
26629 (__arm_vnegq_f32): Remove.
26630 (__arm_vnegq_m_f16): Remove.
26631 (__arm_vnegq_m_f32): Remove.
26632 (__arm_vnegq_x_f16): Remove.
26633 (__arm_vnegq_x_f32): Remove.
26634 (__arm_vnegq): Remove.
26635 (__arm_vnegq_m): Remove.
26636 (__arm_vnegq_x): Remove.
26640 (vclsq_s8): Remove.
26641 (vclsq_s16): Remove.
26642 (vclsq_s32): Remove.
26643 (vclsq_m_s8): Remove.
26644 (vclsq_m_s16): Remove.
26645 (vclsq_m_s32): Remove.
26646 (vclsq_x_s8): Remove.
26647 (vclsq_x_s16): Remove.
26648 (vclsq_x_s32): Remove.
26649 (__arm_vclsq_s8): Remove.
26650 (__arm_vclsq_s16): Remove.
26651 (__arm_vclsq_s32): Remove.
26652 (__arm_vclsq_m_s8): Remove.
26653 (__arm_vclsq_m_s16): Remove.
26654 (__arm_vclsq_m_s32): Remove.
26655 (__arm_vclsq_x_s8): Remove.
26656 (__arm_vclsq_x_s16): Remove.
26657 (__arm_vclsq_x_s32): Remove.
26658 (__arm_vclsq): Remove.
26659 (__arm_vclsq_m): Remove.
26660 (__arm_vclsq_x): Remove.
26664 (vclzq_s8): Remove.
26665 (vclzq_s16): Remove.
26666 (vclzq_s32): Remove.
26667 (vclzq_u8): Remove.
26668 (vclzq_u16): Remove.
26669 (vclzq_u32): Remove.
26670 (vclzq_m_u8): Remove.
26671 (vclzq_m_s8): Remove.
26672 (vclzq_m_u16): Remove.
26673 (vclzq_m_s16): Remove.
26674 (vclzq_m_u32): Remove.
26675 (vclzq_m_s32): Remove.
26676 (vclzq_x_s8): Remove.
26677 (vclzq_x_s16): Remove.
26678 (vclzq_x_s32): Remove.
26679 (vclzq_x_u8): Remove.
26680 (vclzq_x_u16): Remove.
26681 (vclzq_x_u32): Remove.
26682 (__arm_vclzq_s8): Remove.
26683 (__arm_vclzq_s16): Remove.
26684 (__arm_vclzq_s32): Remove.
26685 (__arm_vclzq_u8): Remove.
26686 (__arm_vclzq_u16): Remove.
26687 (__arm_vclzq_u32): Remove.
26688 (__arm_vclzq_m_u8): Remove.
26689 (__arm_vclzq_m_s8): Remove.
26690 (__arm_vclzq_m_u16): Remove.
26691 (__arm_vclzq_m_s16): Remove.
26692 (__arm_vclzq_m_u32): Remove.
26693 (__arm_vclzq_m_s32): Remove.
26694 (__arm_vclzq_x_s8): Remove.
26695 (__arm_vclzq_x_s16): Remove.
26696 (__arm_vclzq_x_s32): Remove.
26697 (__arm_vclzq_x_u8): Remove.
26698 (__arm_vclzq_x_u16): Remove.
26699 (__arm_vclzq_x_u32): Remove.
26700 (__arm_vclzq): Remove.
26701 (__arm_vclzq_m): Remove.
26702 (__arm_vclzq_x): Remove.
26705 (vqnegq_m): Remove.
26706 (vqabsq_m): Remove.
26707 (vqabsq_s8): Remove.
26708 (vqabsq_s16): Remove.
26709 (vqabsq_s32): Remove.
26710 (vqnegq_s8): Remove.
26711 (vqnegq_s16): Remove.
26712 (vqnegq_s32): Remove.
26713 (vqnegq_m_s8): Remove.
26714 (vqabsq_m_s8): Remove.
26715 (vqnegq_m_s16): Remove.
26716 (vqabsq_m_s16): Remove.
26717 (vqnegq_m_s32): Remove.
26718 (vqabsq_m_s32): Remove.
26719 (__arm_vqabsq_s8): Remove.
26720 (__arm_vqabsq_s16): Remove.
26721 (__arm_vqabsq_s32): Remove.
26722 (__arm_vqnegq_s8): Remove.
26723 (__arm_vqnegq_s16): Remove.
26724 (__arm_vqnegq_s32): Remove.
26725 (__arm_vqnegq_m_s8): Remove.
26726 (__arm_vqabsq_m_s8): Remove.
26727 (__arm_vqnegq_m_s16): Remove.
26728 (__arm_vqabsq_m_s16): Remove.
26729 (__arm_vqnegq_m_s32): Remove.
26730 (__arm_vqabsq_m_s32): Remove.
26731 (__arm_vqabsq): Remove.
26732 (__arm_vqnegq): Remove.
26733 (__arm_vqnegq_m): Remove.
26734 (__arm_vqabsq_m): Remove.
26736 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26738 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
26739 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
26740 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
26741 vrndm, vrndn, vrndp, vrnd, vrndx.
26742 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
26743 VQABSQ_M_S, VQNEGQ_M_S.
26745 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
26746 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
26747 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
26748 (@mve_<mve_insn>q_f<mode>): ... this.
26749 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
26750 (mve_v<absneg_str>q_f<mode>): ... this.
26751 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
26752 (mve_v<absneg_str>q_s<mode>): ... this.
26753 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
26754 (@mve_<mve_insn>q_<supf><mode>): ... this.
26755 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
26756 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
26757 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
26758 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
26759 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
26760 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
26761 (mve_vrndxq_m_f<mode>): Merge into ...
26762 (@mve_<mve_insn>q_m_f<mode>): ... this.
26764 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26766 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
26767 * config/arm/arm-mve-builtins-shapes.h (unary): New.
26769 2023-05-09 Jakub Jelinek <jakub@redhat.com>
26771 * mux-utils.h: Fix comment typo, avoides -> avoids.
26773 2023-05-09 Jakub Jelinek <jakub@redhat.com>
26775 PR tree-optimization/109778
26776 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
26777 wi::zext (x, width) rather than x if width != precision, rather
26778 than using wi::zext (right, width) after the shift.
26779 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
26780 of wi::lrotate or wi::rrotate.
26782 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26784 * genmatch.cc (get_out_file): Make static and rename to ...
26785 (choose_output): ... this. Reimplement. Update all uses ...
26786 (decision_tree::gen): ... here and ...
26789 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26791 * genmatch.cc (showUsage): Reimplement as ...
26792 (usage): ...this. Adjust all uses.
26793 (main): Print usage when no arguments. Add missing 'return 1'.
26795 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26797 * genmatch.cc (header_file): Make static.
26798 (emit_func): Rename to...
26799 (fp_decl): ... this. Adjust all uses.
26800 (fp_decl_done): New function. Use it...
26801 (decision_tree::gen): ... here and...
26802 (write_predicate): ... here.
26805 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
26807 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
26810 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
26811 Uros Bizjak <ubizjak@gmail.com>
26813 * config/i386/i386.md (any_or_plus): Move definition earlier.
26814 (*insvti_highpart_1): New define_insn_and_split to overwrite
26815 (insv) the highpart of a TImode register/memory.
26817 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
26819 * auto-profile.cc (auto_profile): Check todo from early_inline
26820 to see if cleanup_tree_vfg needs to be called.
26821 (early_inline): Return todo from early_inliner.
26823 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
26825 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
26827 (pass_vsetvl::get_block_info): New.
26828 (pass_vsetvl::update_vector_info): New.
26829 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
26830 (pass_vsetvl::compute_local_backward_infos): Ditto.
26831 (pass_vsetvl::transfer_before): Ditto.
26832 (pass_vsetvl::transfer_after): Ditto.
26833 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
26834 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
26835 (pass_vsetvl::cleanup_insns): Ditto.
26836 (pass_vsetvl::compute_local_backward_infos): Use
26837 update_vector_info.
26839 2023-05-08 Jeff Law <jlaw@ventanamicro>
26841 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
26843 2023-05-08 Richard Biener <rguenther@suse.de>
26844 Michael Meissner <meissner@linux.ibm.com>
26846 PR middle-end/108623
26847 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
26848 Align bit fields > 1 bit to at least an 8-bit boundary.
26850 2023-05-08 Andrew Pinski <apinski@marvell.com>
26852 PR tree-optimization/109424
26853 PR tree-optimization/59424
26854 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
26855 (factor_out_conditional_operation): This and add support for all unary
26857 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
26858 to call factor_out_conditional_operation instead.
26860 2023-05-08 Andrew Pinski <apinski@marvell.com>
26862 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
26863 over factor_out_conditional_conversion.
26865 2023-05-08 Andrew Pinski <apinski@marvell.com>
26867 PR tree-optimization/49959
26868 PR tree-optimization/103771
26869 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
26870 Diamond shapped bb form for factor_out_conditional_conversion.
26872 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26874 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
26875 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
26876 (riscv_vector_get_mask_mode): Ditto.
26877 (get_mask_policy_no_pred): Ditto.
26878 (get_tail_policy_no_pred): Ditto.
26879 (get_mask_mode): New function.
26880 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
26881 (get_tail_policy_no_pred): Ditto.
26882 (riscv_vector_mask_mode_p): Ditto.
26883 (riscv_vector_get_mask_mode): Ditto.
26884 (get_mask_mode): New function.
26885 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
26887 (get_tail_policy_for_pred): Ditto.
26888 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
26889 (get_mask_policy_for_pred): Ditto
26890 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
26892 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
26894 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
26895 (riscv_select_multilib): New.
26896 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
26897 also handle select_by_abi.
26898 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
26899 to select_by_abi_arch_cmodel from 1.
26900 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
26901 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
26903 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
26905 * Makefile.in: (gimple-match-head.o-warn): Remove.
26906 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
26907 gimple-match-exports.cc.
26908 (gimple-match-auto.h): Only depend on s-gimple-match.
26909 (generic-match-auto.h): Likewise.
26911 2023-05-08 Andrew Pinski <apinski@marvell.com>
26913 PR tree-optimization/109691
26914 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
26916 If the removed statement can throw, have need_eh_cleanup
26917 include the bb of that statement.
26918 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
26919 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
26921 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
26922 Initialize dceworklist instead of stmts_to_remove.
26923 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
26924 Destore dceworklist instead of stmts_to_remove.
26925 (substitute_and_fold_dom_walker::before_dom_children):
26926 Set dceworklist instead of adding to stmts_to_remove.
26927 (substitute_and_fold_engine::substitute_and_fold):
26928 Call simple_dce_from_worklist instead of poping
26930 Don't update the stat on removal statements.
26932 2023-05-07 Andrew Pinski <apinski@marvell.com>
26935 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
26936 Change argument type to aarch64_feature_flags.
26937 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
26938 constructor argument type to aarch64_feature_flags.
26939 Change m_old_asm_isa_flags to be aarch64_feature_flags.
26941 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
26943 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
26944 more parallel code if can_create_pseudo_p.
26946 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
26949 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
26950 immediately before moving a multi-word register by parts.
26952 2023-05-06 Jeff Law <jlaw@ventanamicro>
26954 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
26956 2023-05-06 Michael Collison <collison@rivosinc.com>
26958 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
26959 Check that GET_MODE_NUNITS is a multiple of 2.
26961 2023-05-06 Michael Collison <collison@rivosinc.com>
26963 * config/riscv/riscv.cc
26964 (riscv_estimated_poly_value): Implement
26965 TARGET_ESTIMATED_POLY_VALUE.
26966 (riscv_preferred_simd_mode): Implement
26967 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
26968 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
26969 (riscv_empty_mask_is_expensive): Implement
26970 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
26971 (riscv_vectorize_create_costs): Implement
26972 TARGET_VECTORIZE_CREATE_COSTS.
26973 (riscv_support_vector_misalignment): Implement
26974 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
26975 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
26976 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
26977 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
26978 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
26980 2023-05-06 Jeff Law <jlaw@ventanamicro>
26982 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
26983 duplicate definition.
26985 2023-05-06 Michael Collison <collison@rivosinc.com>
26987 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
26988 (riscv_vector_preferred_simd_mode): Ditto.
26989 (get_mask_policy_no_pred): Ditto.
26990 (get_tail_policy_no_pred): Ditto.
26991 (riscv_vector_mask_mode_p): Ditto.
26992 (riscv_vector_get_mask_mode): Ditto.
26994 2023-05-06 Michael Collison <collison@rivosinc.com>
26996 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
26997 Remove static declaration to to make externally visible.
26998 (get_mask_policy_for_pred): Ditto.
26999 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
27000 New external declaration.
27001 (get_mask_policy_for_pred): Ditto.
27003 2023-05-06 Michael Collison <collison@rivosinc.com>
27005 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
27006 (riscv_vector_get_mask_mode): Ditto.
27007 (get_mask_policy_no_pred): Ditto.
27008 (get_tail_policy_no_pred): Ditto.
27010 2023-05-06 Xi Ruoyao <xry111@xry111.site>
27012 * config/loongarch/loongarch.h (struct machine_function): Add
27013 reg_is_wrapped_separately array for register wrapping
27015 * config/loongarch/loongarch.cc
27016 (loongarch_get_separate_components): New function.
27017 (loongarch_components_for_bb): Likewise.
27018 (loongarch_disqualify_components): Likewise.
27019 (loongarch_process_components): Likewise.
27020 (loongarch_emit_prologue_components): Likewise.
27021 (loongarch_emit_epilogue_components): Likewise.
27022 (loongarch_set_handled_components): Likewise.
27023 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
27024 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
27025 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
27026 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
27027 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
27028 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
27029 (loongarch_for_each_saved_reg): Skip registers that are wrapped
27032 2023-05-06 Xi Ruoyao <xry111@xry111.site>
27035 * Makefile.in (s-macro_list): Pass -nostdinc to
27038 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27040 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
27041 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
27042 (preferred_simd_mode): Ditto.
27043 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
27044 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
27045 (riscv_preferred_simd_mode): New function.
27046 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
27047 * config/riscv/vector.md: Add autovec.md.
27048 * config/riscv/autovec.md: New file.
27050 2023-05-06 Jakub Jelinek <jakub@redhat.com>
27052 * real.h (dconst_pi): Define.
27053 (dconst_e_ptr): Formatting fix.
27054 (dconst_pi_ptr): Declare.
27055 * real.cc (dconst_pi_ptr): New function.
27056 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
27057 boundaries range with range computed from sin/cos of the particular
27058 bounds if the argument range is shorter than 2*pi.
27059 (cfn_sincos::op1_range): Take bulps into account when determining
27060 which result ranges are always invalid or behave like known NAN.
27062 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
27064 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
27065 pass type to vrange_storage::equal_p.
27066 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
27067 (irange_storage::equal_p): Same.
27068 (frange_storage::equal_p): Same.
27069 * value-range-storage.h (class frange_storage): Same.
27071 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27074 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
27075 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
27077 2023-05-06 liuhongt <hongtao.liu@intel.com>
27079 * combine.cc (maybe_swap_commutative_operands): Canonicalize
27080 vec_merge when mask is constant.
27081 * doc/md.texi: Document vec_merge canonicalization.
27083 2023-05-06 Jakub Jelinek <jakub@redhat.com>
27085 * value-range.h (frange_arithmetic): Declare.
27086 * range-op-float.cc (frange_arithmetic): No longer static.
27087 * gimple-range-op.cc (frange_mpfr_arg1): New function.
27088 (cfn_sqrt::fold_range): Intersect the generic boundaries range
27089 with range computed from sqrt of the particular bounds.
27090 (cfn_sqrt::op1_range): Intersect the generic boundaries range
27091 with range computed from squared particular bounds.
27093 2023-05-06 Jakub Jelinek <jakub@redhat.com>
27095 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
27096 earlier with helper variables also renamed.
27097 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
27098 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
27099 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
27101 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
27103 * config/cris/cris.md (splitop): Add PLUS.
27104 * config/cris/cris.cc (cris_split_constant): Also handle
27105 PLUS when a split into two insns may be useful.
27107 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
27109 * config/cris/cris.md (movandsplit1): New define_peephole2.
27111 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
27113 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
27115 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
27117 * doc/md.texi (define_peephole2): Document order of scanning.
27119 2023-05-05 Pan Li <pan2.li@intel.com>
27120 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27122 * config/riscv/vector.md: Allow const as the operand of RVV
27123 indexed load/store.
27125 2023-05-05 Pan Li <pan2.li@intel.com>
27127 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
27128 consumed by simplify_rtx.
27130 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27132 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
27133 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
27134 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
27135 * config/arm/arm_mve.h (vshrq): Remove.
27137 (vrshrq_m): Remove.
27139 (vrshrq_x): Remove.
27141 (vshrq_n_s8): Remove.
27142 (vshrq_n_s16): Remove.
27143 (vshrq_n_s32): Remove.
27144 (vshrq_n_u8): Remove.
27145 (vshrq_n_u16): Remove.
27146 (vshrq_n_u32): Remove.
27147 (vrshrq_n_u8): Remove.
27148 (vrshrq_n_s8): Remove.
27149 (vrshrq_n_u16): Remove.
27150 (vrshrq_n_s16): Remove.
27151 (vrshrq_n_u32): Remove.
27152 (vrshrq_n_s32): Remove.
27153 (vrshrq_m_n_s8): Remove.
27154 (vrshrq_m_n_s32): Remove.
27155 (vrshrq_m_n_s16): Remove.
27156 (vrshrq_m_n_u8): Remove.
27157 (vrshrq_m_n_u32): Remove.
27158 (vrshrq_m_n_u16): Remove.
27159 (vshrq_m_n_s8): Remove.
27160 (vshrq_m_n_s32): Remove.
27161 (vshrq_m_n_s16): Remove.
27162 (vshrq_m_n_u8): Remove.
27163 (vshrq_m_n_u32): Remove.
27164 (vshrq_m_n_u16): Remove.
27165 (vrshrq_x_n_s8): Remove.
27166 (vrshrq_x_n_s16): Remove.
27167 (vrshrq_x_n_s32): Remove.
27168 (vrshrq_x_n_u8): Remove.
27169 (vrshrq_x_n_u16): Remove.
27170 (vrshrq_x_n_u32): Remove.
27171 (vshrq_x_n_s8): Remove.
27172 (vshrq_x_n_s16): Remove.
27173 (vshrq_x_n_s32): Remove.
27174 (vshrq_x_n_u8): Remove.
27175 (vshrq_x_n_u16): Remove.
27176 (vshrq_x_n_u32): Remove.
27177 (__arm_vshrq_n_s8): Remove.
27178 (__arm_vshrq_n_s16): Remove.
27179 (__arm_vshrq_n_s32): Remove.
27180 (__arm_vshrq_n_u8): Remove.
27181 (__arm_vshrq_n_u16): Remove.
27182 (__arm_vshrq_n_u32): Remove.
27183 (__arm_vrshrq_n_u8): Remove.
27184 (__arm_vrshrq_n_s8): Remove.
27185 (__arm_vrshrq_n_u16): Remove.
27186 (__arm_vrshrq_n_s16): Remove.
27187 (__arm_vrshrq_n_u32): Remove.
27188 (__arm_vrshrq_n_s32): Remove.
27189 (__arm_vrshrq_m_n_s8): Remove.
27190 (__arm_vrshrq_m_n_s32): Remove.
27191 (__arm_vrshrq_m_n_s16): Remove.
27192 (__arm_vrshrq_m_n_u8): Remove.
27193 (__arm_vrshrq_m_n_u32): Remove.
27194 (__arm_vrshrq_m_n_u16): Remove.
27195 (__arm_vshrq_m_n_s8): Remove.
27196 (__arm_vshrq_m_n_s32): Remove.
27197 (__arm_vshrq_m_n_s16): Remove.
27198 (__arm_vshrq_m_n_u8): Remove.
27199 (__arm_vshrq_m_n_u32): Remove.
27200 (__arm_vshrq_m_n_u16): Remove.
27201 (__arm_vrshrq_x_n_s8): Remove.
27202 (__arm_vrshrq_x_n_s16): Remove.
27203 (__arm_vrshrq_x_n_s32): Remove.
27204 (__arm_vrshrq_x_n_u8): Remove.
27205 (__arm_vrshrq_x_n_u16): Remove.
27206 (__arm_vrshrq_x_n_u32): Remove.
27207 (__arm_vshrq_x_n_s8): Remove.
27208 (__arm_vshrq_x_n_s16): Remove.
27209 (__arm_vshrq_x_n_s32): Remove.
27210 (__arm_vshrq_x_n_u8): Remove.
27211 (__arm_vshrq_x_n_u16): Remove.
27212 (__arm_vshrq_x_n_u32): Remove.
27213 (__arm_vshrq): Remove.
27214 (__arm_vrshrq): Remove.
27215 (__arm_vrshrq_m): Remove.
27216 (__arm_vshrq_m): Remove.
27217 (__arm_vrshrq_x): Remove.
27218 (__arm_vshrq_x): Remove.
27220 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27222 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
27223 (mve_insn): Add vrshr, vshr.
27224 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
27225 (mve_vrshrq_n_<supf><mode>): Merge into ...
27226 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27227 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
27229 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27231 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27233 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
27234 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
27236 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27238 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
27239 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
27240 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
27241 (vqrshrunbq, vqrshruntq): New.
27242 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
27243 (vqrshrunbq, vqrshruntq): New.
27244 * config/arm/arm-mve-builtins.cc
27245 (function_instance::has_inactive_argument): Handle vqshrunbq,
27246 vqshruntq, vqrshrunbq, vqrshruntq.
27247 * config/arm/arm_mve.h (vqrshrunbq): Remove.
27248 (vqrshruntq): Remove.
27249 (vqrshrunbq_m): Remove.
27250 (vqrshruntq_m): Remove.
27251 (vqrshrunbq_n_s16): Remove.
27252 (vqrshrunbq_n_s32): Remove.
27253 (vqrshruntq_n_s16): Remove.
27254 (vqrshruntq_n_s32): Remove.
27255 (vqrshrunbq_m_n_s32): Remove.
27256 (vqrshrunbq_m_n_s16): Remove.
27257 (vqrshruntq_m_n_s32): Remove.
27258 (vqrshruntq_m_n_s16): Remove.
27259 (__arm_vqrshrunbq_n_s16): Remove.
27260 (__arm_vqrshrunbq_n_s32): Remove.
27261 (__arm_vqrshruntq_n_s16): Remove.
27262 (__arm_vqrshruntq_n_s32): Remove.
27263 (__arm_vqrshrunbq_m_n_s32): Remove.
27264 (__arm_vqrshrunbq_m_n_s16): Remove.
27265 (__arm_vqrshruntq_m_n_s32): Remove.
27266 (__arm_vqrshruntq_m_n_s16): Remove.
27267 (__arm_vqrshrunbq): Remove.
27268 (__arm_vqrshruntq): Remove.
27269 (__arm_vqrshrunbq_m): Remove.
27270 (__arm_vqrshruntq_m): Remove.
27271 (vqshrunbq): Remove.
27272 (vqshruntq): Remove.
27273 (vqshrunbq_m): Remove.
27274 (vqshruntq_m): Remove.
27275 (vqshrunbq_n_s16): Remove.
27276 (vqshruntq_n_s16): Remove.
27277 (vqshrunbq_n_s32): Remove.
27278 (vqshruntq_n_s32): Remove.
27279 (vqshrunbq_m_n_s32): Remove.
27280 (vqshrunbq_m_n_s16): Remove.
27281 (vqshruntq_m_n_s32): Remove.
27282 (vqshruntq_m_n_s16): Remove.
27283 (__arm_vqshrunbq_n_s16): Remove.
27284 (__arm_vqshruntq_n_s16): Remove.
27285 (__arm_vqshrunbq_n_s32): Remove.
27286 (__arm_vqshruntq_n_s32): Remove.
27287 (__arm_vqshrunbq_m_n_s32): Remove.
27288 (__arm_vqshrunbq_m_n_s16): Remove.
27289 (__arm_vqshruntq_m_n_s32): Remove.
27290 (__arm_vqshruntq_m_n_s16): Remove.
27291 (__arm_vqshrunbq): Remove.
27292 (__arm_vqshruntq): Remove.
27293 (__arm_vqshrunbq_m): Remove.
27294 (__arm_vqshruntq_m): Remove.
27296 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27298 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
27299 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
27300 (MVE_SHRN_M_N): Likewise.
27301 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
27302 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
27304 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
27305 (mve_vqrshruntq_n_s<mode>): Remove.
27306 (mve_vqshrunbq_n_s<mode>): Remove.
27307 (mve_vqshruntq_n_s<mode>): Remove.
27308 (mve_vqrshrunbq_m_n_s<mode>): Remove.
27309 (mve_vqrshruntq_m_n_s<mode>): Remove.
27310 (mve_vqshrunbq_m_n_s<mode>): Remove.
27311 (mve_vqshruntq_m_n_s<mode>): Remove.
27313 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27315 * config/arm/arm-mve-builtins-shapes.cc
27316 (binary_rshift_narrow_unsigned): New.
27317 * config/arm/arm-mve-builtins-shapes.h
27318 (binary_rshift_narrow_unsigned): New.
27320 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27322 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
27323 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
27324 (vqrshrnbq, vqrshrntq): New.
27325 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
27326 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
27328 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
27329 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
27330 * config/arm/arm-mve-builtins.cc
27331 (function_instance::has_inactive_argument): Handle vshrnbq,
27332 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
27334 * config/arm/arm_mve.h (vshrnbq): Remove.
27336 (vshrnbq_m): Remove.
27337 (vshrntq_m): Remove.
27338 (vshrnbq_n_s16): Remove.
27339 (vshrntq_n_s16): Remove.
27340 (vshrnbq_n_u16): Remove.
27341 (vshrntq_n_u16): Remove.
27342 (vshrnbq_n_s32): Remove.
27343 (vshrntq_n_s32): Remove.
27344 (vshrnbq_n_u32): Remove.
27345 (vshrntq_n_u32): Remove.
27346 (vshrnbq_m_n_s32): Remove.
27347 (vshrnbq_m_n_s16): Remove.
27348 (vshrnbq_m_n_u32): Remove.
27349 (vshrnbq_m_n_u16): Remove.
27350 (vshrntq_m_n_s32): Remove.
27351 (vshrntq_m_n_s16): Remove.
27352 (vshrntq_m_n_u32): Remove.
27353 (vshrntq_m_n_u16): Remove.
27354 (__arm_vshrnbq_n_s16): Remove.
27355 (__arm_vshrntq_n_s16): Remove.
27356 (__arm_vshrnbq_n_u16): Remove.
27357 (__arm_vshrntq_n_u16): Remove.
27358 (__arm_vshrnbq_n_s32): Remove.
27359 (__arm_vshrntq_n_s32): Remove.
27360 (__arm_vshrnbq_n_u32): Remove.
27361 (__arm_vshrntq_n_u32): Remove.
27362 (__arm_vshrnbq_m_n_s32): Remove.
27363 (__arm_vshrnbq_m_n_s16): Remove.
27364 (__arm_vshrnbq_m_n_u32): Remove.
27365 (__arm_vshrnbq_m_n_u16): Remove.
27366 (__arm_vshrntq_m_n_s32): Remove.
27367 (__arm_vshrntq_m_n_s16): Remove.
27368 (__arm_vshrntq_m_n_u32): Remove.
27369 (__arm_vshrntq_m_n_u16): Remove.
27370 (__arm_vshrnbq): Remove.
27371 (__arm_vshrntq): Remove.
27372 (__arm_vshrnbq_m): Remove.
27373 (__arm_vshrntq_m): Remove.
27374 (vrshrnbq): Remove.
27375 (vrshrntq): Remove.
27376 (vrshrnbq_m): Remove.
27377 (vrshrntq_m): Remove.
27378 (vrshrnbq_n_s16): Remove.
27379 (vrshrntq_n_s16): Remove.
27380 (vrshrnbq_n_u16): Remove.
27381 (vrshrntq_n_u16): Remove.
27382 (vrshrnbq_n_s32): Remove.
27383 (vrshrntq_n_s32): Remove.
27384 (vrshrnbq_n_u32): Remove.
27385 (vrshrntq_n_u32): Remove.
27386 (vrshrnbq_m_n_s32): Remove.
27387 (vrshrnbq_m_n_s16): Remove.
27388 (vrshrnbq_m_n_u32): Remove.
27389 (vrshrnbq_m_n_u16): Remove.
27390 (vrshrntq_m_n_s32): Remove.
27391 (vrshrntq_m_n_s16): Remove.
27392 (vrshrntq_m_n_u32): Remove.
27393 (vrshrntq_m_n_u16): Remove.
27394 (__arm_vrshrnbq_n_s16): Remove.
27395 (__arm_vrshrntq_n_s16): Remove.
27396 (__arm_vrshrnbq_n_u16): Remove.
27397 (__arm_vrshrntq_n_u16): Remove.
27398 (__arm_vrshrnbq_n_s32): Remove.
27399 (__arm_vrshrntq_n_s32): Remove.
27400 (__arm_vrshrnbq_n_u32): Remove.
27401 (__arm_vrshrntq_n_u32): Remove.
27402 (__arm_vrshrnbq_m_n_s32): Remove.
27403 (__arm_vrshrnbq_m_n_s16): Remove.
27404 (__arm_vrshrnbq_m_n_u32): Remove.
27405 (__arm_vrshrnbq_m_n_u16): Remove.
27406 (__arm_vrshrntq_m_n_s32): Remove.
27407 (__arm_vrshrntq_m_n_s16): Remove.
27408 (__arm_vrshrntq_m_n_u32): Remove.
27409 (__arm_vrshrntq_m_n_u16): Remove.
27410 (__arm_vrshrnbq): Remove.
27411 (__arm_vrshrntq): Remove.
27412 (__arm_vrshrnbq_m): Remove.
27413 (__arm_vrshrntq_m): Remove.
27414 (vqshrnbq): Remove.
27415 (vqshrntq): Remove.
27416 (vqshrnbq_m): Remove.
27417 (vqshrntq_m): Remove.
27418 (vqshrnbq_n_s16): Remove.
27419 (vqshrntq_n_s16): Remove.
27420 (vqshrnbq_n_u16): Remove.
27421 (vqshrntq_n_u16): Remove.
27422 (vqshrnbq_n_s32): Remove.
27423 (vqshrntq_n_s32): Remove.
27424 (vqshrnbq_n_u32): Remove.
27425 (vqshrntq_n_u32): Remove.
27426 (vqshrnbq_m_n_s32): Remove.
27427 (vqshrnbq_m_n_s16): Remove.
27428 (vqshrnbq_m_n_u32): Remove.
27429 (vqshrnbq_m_n_u16): Remove.
27430 (vqshrntq_m_n_s32): Remove.
27431 (vqshrntq_m_n_s16): Remove.
27432 (vqshrntq_m_n_u32): Remove.
27433 (vqshrntq_m_n_u16): Remove.
27434 (__arm_vqshrnbq_n_s16): Remove.
27435 (__arm_vqshrntq_n_s16): Remove.
27436 (__arm_vqshrnbq_n_u16): Remove.
27437 (__arm_vqshrntq_n_u16): Remove.
27438 (__arm_vqshrnbq_n_s32): Remove.
27439 (__arm_vqshrntq_n_s32): Remove.
27440 (__arm_vqshrnbq_n_u32): Remove.
27441 (__arm_vqshrntq_n_u32): Remove.
27442 (__arm_vqshrnbq_m_n_s32): Remove.
27443 (__arm_vqshrnbq_m_n_s16): Remove.
27444 (__arm_vqshrnbq_m_n_u32): Remove.
27445 (__arm_vqshrnbq_m_n_u16): Remove.
27446 (__arm_vqshrntq_m_n_s32): Remove.
27447 (__arm_vqshrntq_m_n_s16): Remove.
27448 (__arm_vqshrntq_m_n_u32): Remove.
27449 (__arm_vqshrntq_m_n_u16): Remove.
27450 (__arm_vqshrnbq): Remove.
27451 (__arm_vqshrntq): Remove.
27452 (__arm_vqshrnbq_m): Remove.
27453 (__arm_vqshrntq_m): Remove.
27454 (vqrshrnbq): Remove.
27455 (vqrshrntq): Remove.
27456 (vqrshrnbq_m): Remove.
27457 (vqrshrntq_m): Remove.
27458 (vqrshrnbq_n_s16): Remove.
27459 (vqrshrnbq_n_u16): Remove.
27460 (vqrshrnbq_n_s32): Remove.
27461 (vqrshrnbq_n_u32): Remove.
27462 (vqrshrntq_n_s16): Remove.
27463 (vqrshrntq_n_u16): Remove.
27464 (vqrshrntq_n_s32): Remove.
27465 (vqrshrntq_n_u32): Remove.
27466 (vqrshrnbq_m_n_s32): Remove.
27467 (vqrshrnbq_m_n_s16): Remove.
27468 (vqrshrnbq_m_n_u32): Remove.
27469 (vqrshrnbq_m_n_u16): Remove.
27470 (vqrshrntq_m_n_s32): Remove.
27471 (vqrshrntq_m_n_s16): Remove.
27472 (vqrshrntq_m_n_u32): Remove.
27473 (vqrshrntq_m_n_u16): Remove.
27474 (__arm_vqrshrnbq_n_s16): Remove.
27475 (__arm_vqrshrnbq_n_u16): Remove.
27476 (__arm_vqrshrnbq_n_s32): Remove.
27477 (__arm_vqrshrnbq_n_u32): Remove.
27478 (__arm_vqrshrntq_n_s16): Remove.
27479 (__arm_vqrshrntq_n_u16): Remove.
27480 (__arm_vqrshrntq_n_s32): Remove.
27481 (__arm_vqrshrntq_n_u32): Remove.
27482 (__arm_vqrshrnbq_m_n_s32): Remove.
27483 (__arm_vqrshrnbq_m_n_s16): Remove.
27484 (__arm_vqrshrnbq_m_n_u32): Remove.
27485 (__arm_vqrshrnbq_m_n_u16): Remove.
27486 (__arm_vqrshrntq_m_n_s32): Remove.
27487 (__arm_vqrshrntq_m_n_s16): Remove.
27488 (__arm_vqrshrntq_m_n_u32): Remove.
27489 (__arm_vqrshrntq_m_n_u16): Remove.
27490 (__arm_vqrshrnbq): Remove.
27491 (__arm_vqrshrntq): Remove.
27492 (__arm_vqrshrnbq_m): Remove.
27493 (__arm_vqrshrntq_m): Remove.
27495 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27497 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
27498 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
27499 vrshrnt, vshrnb, vshrnt.
27501 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
27502 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
27503 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
27504 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
27505 (mve_vshrntq_n_<supf><mode>): Merge into ...
27506 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27507 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
27508 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
27509 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
27510 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
27512 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27514 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27516 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
27518 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
27520 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27522 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
27523 (vmaxq, vminq): New.
27524 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
27525 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
27526 * config/arm/arm_mve.h (vminq): Remove.
27532 (vminq_u8): Remove.
27533 (vmaxq_u8): Remove.
27534 (vminq_s8): Remove.
27535 (vmaxq_s8): Remove.
27536 (vminq_u16): Remove.
27537 (vmaxq_u16): Remove.
27538 (vminq_s16): Remove.
27539 (vmaxq_s16): Remove.
27540 (vminq_u32): Remove.
27541 (vmaxq_u32): Remove.
27542 (vminq_s32): Remove.
27543 (vmaxq_s32): Remove.
27544 (vmaxq_m_s8): Remove.
27545 (vmaxq_m_s32): Remove.
27546 (vmaxq_m_s16): Remove.
27547 (vmaxq_m_u8): Remove.
27548 (vmaxq_m_u32): Remove.
27549 (vmaxq_m_u16): Remove.
27550 (vminq_m_s8): Remove.
27551 (vminq_m_s32): Remove.
27552 (vminq_m_s16): Remove.
27553 (vminq_m_u8): Remove.
27554 (vminq_m_u32): Remove.
27555 (vminq_m_u16): Remove.
27556 (vminq_x_s8): Remove.
27557 (vminq_x_s16): Remove.
27558 (vminq_x_s32): Remove.
27559 (vminq_x_u8): Remove.
27560 (vminq_x_u16): Remove.
27561 (vminq_x_u32): Remove.
27562 (vmaxq_x_s8): Remove.
27563 (vmaxq_x_s16): Remove.
27564 (vmaxq_x_s32): Remove.
27565 (vmaxq_x_u8): Remove.
27566 (vmaxq_x_u16): Remove.
27567 (vmaxq_x_u32): Remove.
27568 (__arm_vminq_u8): Remove.
27569 (__arm_vmaxq_u8): Remove.
27570 (__arm_vminq_s8): Remove.
27571 (__arm_vmaxq_s8): Remove.
27572 (__arm_vminq_u16): Remove.
27573 (__arm_vmaxq_u16): Remove.
27574 (__arm_vminq_s16): Remove.
27575 (__arm_vmaxq_s16): Remove.
27576 (__arm_vminq_u32): Remove.
27577 (__arm_vmaxq_u32): Remove.
27578 (__arm_vminq_s32): Remove.
27579 (__arm_vmaxq_s32): Remove.
27580 (__arm_vmaxq_m_s8): Remove.
27581 (__arm_vmaxq_m_s32): Remove.
27582 (__arm_vmaxq_m_s16): Remove.
27583 (__arm_vmaxq_m_u8): Remove.
27584 (__arm_vmaxq_m_u32): Remove.
27585 (__arm_vmaxq_m_u16): Remove.
27586 (__arm_vminq_m_s8): Remove.
27587 (__arm_vminq_m_s32): Remove.
27588 (__arm_vminq_m_s16): Remove.
27589 (__arm_vminq_m_u8): Remove.
27590 (__arm_vminq_m_u32): Remove.
27591 (__arm_vminq_m_u16): Remove.
27592 (__arm_vminq_x_s8): Remove.
27593 (__arm_vminq_x_s16): Remove.
27594 (__arm_vminq_x_s32): Remove.
27595 (__arm_vminq_x_u8): Remove.
27596 (__arm_vminq_x_u16): Remove.
27597 (__arm_vminq_x_u32): Remove.
27598 (__arm_vmaxq_x_s8): Remove.
27599 (__arm_vmaxq_x_s16): Remove.
27600 (__arm_vmaxq_x_s32): Remove.
27601 (__arm_vmaxq_x_u8): Remove.
27602 (__arm_vmaxq_x_u16): Remove.
27603 (__arm_vmaxq_x_u32): Remove.
27604 (__arm_vminq): Remove.
27605 (__arm_vmaxq): Remove.
27606 (__arm_vmaxq_m): Remove.
27607 (__arm_vminq_m): Remove.
27608 (__arm_vminq_x): Remove.
27609 (__arm_vmaxq_x): Remove.
27611 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27613 * config/arm/iterators.md (MAX_MIN_SU): New.
27614 (max_min_su_str): New.
27615 (max_min_supf): New.
27616 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
27617 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
27618 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
27620 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27622 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
27623 (vqshlq, vshlq): New.
27624 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
27625 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
27626 * config/arm/arm_mve.h (vshlq): Remove.
27629 (vshlq_m_r): Remove.
27631 (vshlq_m_n): Remove.
27633 (vshlq_x_n): Remove.
27634 (vshlq_s8): Remove.
27635 (vshlq_s16): Remove.
27636 (vshlq_s32): Remove.
27637 (vshlq_u8): Remove.
27638 (vshlq_u16): Remove.
27639 (vshlq_u32): Remove.
27640 (vshlq_r_u8): Remove.
27641 (vshlq_n_u8): Remove.
27642 (vshlq_r_s8): Remove.
27643 (vshlq_n_s8): Remove.
27644 (vshlq_r_u16): Remove.
27645 (vshlq_n_u16): Remove.
27646 (vshlq_r_s16): Remove.
27647 (vshlq_n_s16): Remove.
27648 (vshlq_r_u32): Remove.
27649 (vshlq_n_u32): Remove.
27650 (vshlq_r_s32): Remove.
27651 (vshlq_n_s32): Remove.
27652 (vshlq_m_r_u8): Remove.
27653 (vshlq_m_r_s8): Remove.
27654 (vshlq_m_r_u16): Remove.
27655 (vshlq_m_r_s16): Remove.
27656 (vshlq_m_r_u32): Remove.
27657 (vshlq_m_r_s32): Remove.
27658 (vshlq_m_u8): Remove.
27659 (vshlq_m_s8): Remove.
27660 (vshlq_m_u16): Remove.
27661 (vshlq_m_s16): Remove.
27662 (vshlq_m_u32): Remove.
27663 (vshlq_m_s32): Remove.
27664 (vshlq_m_n_s8): Remove.
27665 (vshlq_m_n_s32): Remove.
27666 (vshlq_m_n_s16): Remove.
27667 (vshlq_m_n_u8): Remove.
27668 (vshlq_m_n_u32): Remove.
27669 (vshlq_m_n_u16): Remove.
27670 (vshlq_x_s8): Remove.
27671 (vshlq_x_s16): Remove.
27672 (vshlq_x_s32): Remove.
27673 (vshlq_x_u8): Remove.
27674 (vshlq_x_u16): Remove.
27675 (vshlq_x_u32): Remove.
27676 (vshlq_x_n_s8): Remove.
27677 (vshlq_x_n_s16): Remove.
27678 (vshlq_x_n_s32): Remove.
27679 (vshlq_x_n_u8): Remove.
27680 (vshlq_x_n_u16): Remove.
27681 (vshlq_x_n_u32): Remove.
27682 (__arm_vshlq_s8): Remove.
27683 (__arm_vshlq_s16): Remove.
27684 (__arm_vshlq_s32): Remove.
27685 (__arm_vshlq_u8): Remove.
27686 (__arm_vshlq_u16): Remove.
27687 (__arm_vshlq_u32): Remove.
27688 (__arm_vshlq_r_u8): Remove.
27689 (__arm_vshlq_n_u8): Remove.
27690 (__arm_vshlq_r_s8): Remove.
27691 (__arm_vshlq_n_s8): Remove.
27692 (__arm_vshlq_r_u16): Remove.
27693 (__arm_vshlq_n_u16): Remove.
27694 (__arm_vshlq_r_s16): Remove.
27695 (__arm_vshlq_n_s16): Remove.
27696 (__arm_vshlq_r_u32): Remove.
27697 (__arm_vshlq_n_u32): Remove.
27698 (__arm_vshlq_r_s32): Remove.
27699 (__arm_vshlq_n_s32): Remove.
27700 (__arm_vshlq_m_r_u8): Remove.
27701 (__arm_vshlq_m_r_s8): Remove.
27702 (__arm_vshlq_m_r_u16): Remove.
27703 (__arm_vshlq_m_r_s16): Remove.
27704 (__arm_vshlq_m_r_u32): Remove.
27705 (__arm_vshlq_m_r_s32): Remove.
27706 (__arm_vshlq_m_u8): Remove.
27707 (__arm_vshlq_m_s8): Remove.
27708 (__arm_vshlq_m_u16): Remove.
27709 (__arm_vshlq_m_s16): Remove.
27710 (__arm_vshlq_m_u32): Remove.
27711 (__arm_vshlq_m_s32): Remove.
27712 (__arm_vshlq_m_n_s8): Remove.
27713 (__arm_vshlq_m_n_s32): Remove.
27714 (__arm_vshlq_m_n_s16): Remove.
27715 (__arm_vshlq_m_n_u8): Remove.
27716 (__arm_vshlq_m_n_u32): Remove.
27717 (__arm_vshlq_m_n_u16): Remove.
27718 (__arm_vshlq_x_s8): Remove.
27719 (__arm_vshlq_x_s16): Remove.
27720 (__arm_vshlq_x_s32): Remove.
27721 (__arm_vshlq_x_u8): Remove.
27722 (__arm_vshlq_x_u16): Remove.
27723 (__arm_vshlq_x_u32): Remove.
27724 (__arm_vshlq_x_n_s8): Remove.
27725 (__arm_vshlq_x_n_s16): Remove.
27726 (__arm_vshlq_x_n_s32): Remove.
27727 (__arm_vshlq_x_n_u8): Remove.
27728 (__arm_vshlq_x_n_u16): Remove.
27729 (__arm_vshlq_x_n_u32): Remove.
27730 (__arm_vshlq): Remove.
27731 (__arm_vshlq_r): Remove.
27732 (__arm_vshlq_n): Remove.
27733 (__arm_vshlq_m_r): Remove.
27734 (__arm_vshlq_m): Remove.
27735 (__arm_vshlq_m_n): Remove.
27736 (__arm_vshlq_x): Remove.
27737 (__arm_vshlq_x_n): Remove.
27739 (vqshlq_r): Remove.
27740 (vqshlq_n): Remove.
27741 (vqshlq_m_r): Remove.
27742 (vqshlq_m_n): Remove.
27743 (vqshlq_m): Remove.
27744 (vqshlq_u8): Remove.
27745 (vqshlq_r_u8): Remove.
27746 (vqshlq_n_u8): Remove.
27747 (vqshlq_s8): Remove.
27748 (vqshlq_r_s8): Remove.
27749 (vqshlq_n_s8): Remove.
27750 (vqshlq_u16): Remove.
27751 (vqshlq_r_u16): Remove.
27752 (vqshlq_n_u16): Remove.
27753 (vqshlq_s16): Remove.
27754 (vqshlq_r_s16): Remove.
27755 (vqshlq_n_s16): Remove.
27756 (vqshlq_u32): Remove.
27757 (vqshlq_r_u32): Remove.
27758 (vqshlq_n_u32): Remove.
27759 (vqshlq_s32): Remove.
27760 (vqshlq_r_s32): Remove.
27761 (vqshlq_n_s32): Remove.
27762 (vqshlq_m_r_u8): Remove.
27763 (vqshlq_m_r_s8): Remove.
27764 (vqshlq_m_r_u16): Remove.
27765 (vqshlq_m_r_s16): Remove.
27766 (vqshlq_m_r_u32): Remove.
27767 (vqshlq_m_r_s32): Remove.
27768 (vqshlq_m_n_s8): Remove.
27769 (vqshlq_m_n_s32): Remove.
27770 (vqshlq_m_n_s16): Remove.
27771 (vqshlq_m_n_u8): Remove.
27772 (vqshlq_m_n_u32): Remove.
27773 (vqshlq_m_n_u16): Remove.
27774 (vqshlq_m_s8): Remove.
27775 (vqshlq_m_s32): Remove.
27776 (vqshlq_m_s16): Remove.
27777 (vqshlq_m_u8): Remove.
27778 (vqshlq_m_u32): Remove.
27779 (vqshlq_m_u16): Remove.
27780 (__arm_vqshlq_u8): Remove.
27781 (__arm_vqshlq_r_u8): Remove.
27782 (__arm_vqshlq_n_u8): Remove.
27783 (__arm_vqshlq_s8): Remove.
27784 (__arm_vqshlq_r_s8): Remove.
27785 (__arm_vqshlq_n_s8): Remove.
27786 (__arm_vqshlq_u16): Remove.
27787 (__arm_vqshlq_r_u16): Remove.
27788 (__arm_vqshlq_n_u16): Remove.
27789 (__arm_vqshlq_s16): Remove.
27790 (__arm_vqshlq_r_s16): Remove.
27791 (__arm_vqshlq_n_s16): Remove.
27792 (__arm_vqshlq_u32): Remove.
27793 (__arm_vqshlq_r_u32): Remove.
27794 (__arm_vqshlq_n_u32): Remove.
27795 (__arm_vqshlq_s32): Remove.
27796 (__arm_vqshlq_r_s32): Remove.
27797 (__arm_vqshlq_n_s32): Remove.
27798 (__arm_vqshlq_m_r_u8): Remove.
27799 (__arm_vqshlq_m_r_s8): Remove.
27800 (__arm_vqshlq_m_r_u16): Remove.
27801 (__arm_vqshlq_m_r_s16): Remove.
27802 (__arm_vqshlq_m_r_u32): Remove.
27803 (__arm_vqshlq_m_r_s32): Remove.
27804 (__arm_vqshlq_m_n_s8): Remove.
27805 (__arm_vqshlq_m_n_s32): Remove.
27806 (__arm_vqshlq_m_n_s16): Remove.
27807 (__arm_vqshlq_m_n_u8): Remove.
27808 (__arm_vqshlq_m_n_u32): Remove.
27809 (__arm_vqshlq_m_n_u16): Remove.
27810 (__arm_vqshlq_m_s8): Remove.
27811 (__arm_vqshlq_m_s32): Remove.
27812 (__arm_vqshlq_m_s16): Remove.
27813 (__arm_vqshlq_m_u8): Remove.
27814 (__arm_vqshlq_m_u32): Remove.
27815 (__arm_vqshlq_m_u16): Remove.
27816 (__arm_vqshlq): Remove.
27817 (__arm_vqshlq_r): Remove.
27818 (__arm_vqshlq_n): Remove.
27819 (__arm_vqshlq_m_r): Remove.
27820 (__arm_vqshlq_m_n): Remove.
27821 (__arm_vqshlq_m): Remove.
27823 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27825 * config/arm/arm-mve-builtins-functions.h (class
27826 unspec_mve_function_exact_insn_vshl): New.
27828 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27830 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
27831 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
27833 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27835 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
27836 (finish_opt_n_resolution): Handle MODE_r.
27837 * config/arm/arm-mve-builtins.def (r): New mode.
27839 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27841 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
27842 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
27844 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27846 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
27848 * config/arm/arm-mve-builtins-base.def (vabdq): New.
27849 * config/arm/arm-mve-builtins-base.h (vabdq): New.
27850 * config/arm/arm_mve.h (vabdq): Remove.
27853 (vabdq_u8): Remove.
27854 (vabdq_s8): Remove.
27855 (vabdq_u16): Remove.
27856 (vabdq_s16): Remove.
27857 (vabdq_u32): Remove.
27858 (vabdq_s32): Remove.
27859 (vabdq_f16): Remove.
27860 (vabdq_f32): Remove.
27861 (vabdq_m_s8): Remove.
27862 (vabdq_m_s32): Remove.
27863 (vabdq_m_s16): Remove.
27864 (vabdq_m_u8): Remove.
27865 (vabdq_m_u32): Remove.
27866 (vabdq_m_u16): Remove.
27867 (vabdq_m_f32): Remove.
27868 (vabdq_m_f16): Remove.
27869 (vabdq_x_s8): Remove.
27870 (vabdq_x_s16): Remove.
27871 (vabdq_x_s32): Remove.
27872 (vabdq_x_u8): Remove.
27873 (vabdq_x_u16): Remove.
27874 (vabdq_x_u32): Remove.
27875 (vabdq_x_f16): Remove.
27876 (vabdq_x_f32): Remove.
27877 (__arm_vabdq_u8): Remove.
27878 (__arm_vabdq_s8): Remove.
27879 (__arm_vabdq_u16): Remove.
27880 (__arm_vabdq_s16): Remove.
27881 (__arm_vabdq_u32): Remove.
27882 (__arm_vabdq_s32): Remove.
27883 (__arm_vabdq_m_s8): Remove.
27884 (__arm_vabdq_m_s32): Remove.
27885 (__arm_vabdq_m_s16): Remove.
27886 (__arm_vabdq_m_u8): Remove.
27887 (__arm_vabdq_m_u32): Remove.
27888 (__arm_vabdq_m_u16): Remove.
27889 (__arm_vabdq_x_s8): Remove.
27890 (__arm_vabdq_x_s16): Remove.
27891 (__arm_vabdq_x_s32): Remove.
27892 (__arm_vabdq_x_u8): Remove.
27893 (__arm_vabdq_x_u16): Remove.
27894 (__arm_vabdq_x_u32): Remove.
27895 (__arm_vabdq_f16): Remove.
27896 (__arm_vabdq_f32): Remove.
27897 (__arm_vabdq_m_f32): Remove.
27898 (__arm_vabdq_m_f16): Remove.
27899 (__arm_vabdq_x_f16): Remove.
27900 (__arm_vabdq_x_f32): Remove.
27901 (__arm_vabdq): Remove.
27902 (__arm_vabdq_m): Remove.
27903 (__arm_vabdq_x): Remove.
27905 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27907 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
27908 (MVE_FP_VABDQ_ONLY): New.
27909 (mve_insn): Add vabd.
27910 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
27911 (@mve_<mve_insn>q_f<mode>): ... this.
27912 (mve_vabdq_m_f<mode>): Remove.
27914 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27916 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
27917 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
27918 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
27919 * config/arm/arm_mve.h (vqrdmulhq): Remove.
27920 (vqrdmulhq_m): Remove.
27921 (vqrdmulhq_s8): Remove.
27922 (vqrdmulhq_n_s8): Remove.
27923 (vqrdmulhq_s16): Remove.
27924 (vqrdmulhq_n_s16): Remove.
27925 (vqrdmulhq_s32): Remove.
27926 (vqrdmulhq_n_s32): Remove.
27927 (vqrdmulhq_m_n_s8): Remove.
27928 (vqrdmulhq_m_n_s32): Remove.
27929 (vqrdmulhq_m_n_s16): Remove.
27930 (vqrdmulhq_m_s8): Remove.
27931 (vqrdmulhq_m_s32): Remove.
27932 (vqrdmulhq_m_s16): Remove.
27933 (__arm_vqrdmulhq_s8): Remove.
27934 (__arm_vqrdmulhq_n_s8): Remove.
27935 (__arm_vqrdmulhq_s16): Remove.
27936 (__arm_vqrdmulhq_n_s16): Remove.
27937 (__arm_vqrdmulhq_s32): Remove.
27938 (__arm_vqrdmulhq_n_s32): Remove.
27939 (__arm_vqrdmulhq_m_n_s8): Remove.
27940 (__arm_vqrdmulhq_m_n_s32): Remove.
27941 (__arm_vqrdmulhq_m_n_s16): Remove.
27942 (__arm_vqrdmulhq_m_s8): Remove.
27943 (__arm_vqrdmulhq_m_s32): Remove.
27944 (__arm_vqrdmulhq_m_s16): Remove.
27945 (__arm_vqrdmulhq): Remove.
27946 (__arm_vqrdmulhq_m): Remove.
27948 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27950 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
27951 (MVE_SHIFT_N, MVE_SHIFT_R): New.
27952 (mve_insn): Add vqshl, vshl.
27953 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
27954 (mve_vshlq_n_<supf><mode>): Merge into ...
27955 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27956 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
27958 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
27959 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
27961 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
27962 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
27964 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27965 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
27967 (@mve_<mve_insn>q_<supf><mode>): ... this.
27969 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27971 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
27972 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
27973 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
27974 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
27976 * config/arm/arm_mve.h (vrshlq): Remove.
27977 (vrshlq_m_n): Remove.
27978 (vrshlq_m): Remove.
27979 (vrshlq_x): Remove.
27980 (vrshlq_u8): Remove.
27981 (vrshlq_n_u8): Remove.
27982 (vrshlq_s8): Remove.
27983 (vrshlq_n_s8): Remove.
27984 (vrshlq_u16): Remove.
27985 (vrshlq_n_u16): Remove.
27986 (vrshlq_s16): Remove.
27987 (vrshlq_n_s16): Remove.
27988 (vrshlq_u32): Remove.
27989 (vrshlq_n_u32): Remove.
27990 (vrshlq_s32): Remove.
27991 (vrshlq_n_s32): Remove.
27992 (vrshlq_m_n_u8): Remove.
27993 (vrshlq_m_n_s8): Remove.
27994 (vrshlq_m_n_u16): Remove.
27995 (vrshlq_m_n_s16): Remove.
27996 (vrshlq_m_n_u32): Remove.
27997 (vrshlq_m_n_s32): Remove.
27998 (vrshlq_m_s8): Remove.
27999 (vrshlq_m_s32): Remove.
28000 (vrshlq_m_s16): Remove.
28001 (vrshlq_m_u8): Remove.
28002 (vrshlq_m_u32): Remove.
28003 (vrshlq_m_u16): Remove.
28004 (vrshlq_x_s8): Remove.
28005 (vrshlq_x_s16): Remove.
28006 (vrshlq_x_s32): Remove.
28007 (vrshlq_x_u8): Remove.
28008 (vrshlq_x_u16): Remove.
28009 (vrshlq_x_u32): Remove.
28010 (__arm_vrshlq_u8): Remove.
28011 (__arm_vrshlq_n_u8): Remove.
28012 (__arm_vrshlq_s8): Remove.
28013 (__arm_vrshlq_n_s8): Remove.
28014 (__arm_vrshlq_u16): Remove.
28015 (__arm_vrshlq_n_u16): Remove.
28016 (__arm_vrshlq_s16): Remove.
28017 (__arm_vrshlq_n_s16): Remove.
28018 (__arm_vrshlq_u32): Remove.
28019 (__arm_vrshlq_n_u32): Remove.
28020 (__arm_vrshlq_s32): Remove.
28021 (__arm_vrshlq_n_s32): Remove.
28022 (__arm_vrshlq_m_n_u8): Remove.
28023 (__arm_vrshlq_m_n_s8): Remove.
28024 (__arm_vrshlq_m_n_u16): Remove.
28025 (__arm_vrshlq_m_n_s16): Remove.
28026 (__arm_vrshlq_m_n_u32): Remove.
28027 (__arm_vrshlq_m_n_s32): Remove.
28028 (__arm_vrshlq_m_s8): Remove.
28029 (__arm_vrshlq_m_s32): Remove.
28030 (__arm_vrshlq_m_s16): Remove.
28031 (__arm_vrshlq_m_u8): Remove.
28032 (__arm_vrshlq_m_u32): Remove.
28033 (__arm_vrshlq_m_u16): Remove.
28034 (__arm_vrshlq_x_s8): Remove.
28035 (__arm_vrshlq_x_s16): Remove.
28036 (__arm_vrshlq_x_s32): Remove.
28037 (__arm_vrshlq_x_u8): Remove.
28038 (__arm_vrshlq_x_u16): Remove.
28039 (__arm_vrshlq_x_u32): Remove.
28040 (__arm_vrshlq): Remove.
28041 (__arm_vrshlq_m_n): Remove.
28042 (__arm_vrshlq_m): Remove.
28043 (__arm_vrshlq_x): Remove.
28045 (vqrshlq_m_n): Remove.
28046 (vqrshlq_m): Remove.
28047 (vqrshlq_u8): Remove.
28048 (vqrshlq_n_u8): Remove.
28049 (vqrshlq_s8): Remove.
28050 (vqrshlq_n_s8): Remove.
28051 (vqrshlq_u16): Remove.
28052 (vqrshlq_n_u16): Remove.
28053 (vqrshlq_s16): Remove.
28054 (vqrshlq_n_s16): Remove.
28055 (vqrshlq_u32): Remove.
28056 (vqrshlq_n_u32): Remove.
28057 (vqrshlq_s32): Remove.
28058 (vqrshlq_n_s32): Remove.
28059 (vqrshlq_m_n_u8): Remove.
28060 (vqrshlq_m_n_s8): Remove.
28061 (vqrshlq_m_n_u16): Remove.
28062 (vqrshlq_m_n_s16): Remove.
28063 (vqrshlq_m_n_u32): Remove.
28064 (vqrshlq_m_n_s32): Remove.
28065 (vqrshlq_m_s8): Remove.
28066 (vqrshlq_m_s32): Remove.
28067 (vqrshlq_m_s16): Remove.
28068 (vqrshlq_m_u8): Remove.
28069 (vqrshlq_m_u32): Remove.
28070 (vqrshlq_m_u16): Remove.
28071 (__arm_vqrshlq_u8): Remove.
28072 (__arm_vqrshlq_n_u8): Remove.
28073 (__arm_vqrshlq_s8): Remove.
28074 (__arm_vqrshlq_n_s8): Remove.
28075 (__arm_vqrshlq_u16): Remove.
28076 (__arm_vqrshlq_n_u16): Remove.
28077 (__arm_vqrshlq_s16): Remove.
28078 (__arm_vqrshlq_n_s16): Remove.
28079 (__arm_vqrshlq_u32): Remove.
28080 (__arm_vqrshlq_n_u32): Remove.
28081 (__arm_vqrshlq_s32): Remove.
28082 (__arm_vqrshlq_n_s32): Remove.
28083 (__arm_vqrshlq_m_n_u8): Remove.
28084 (__arm_vqrshlq_m_n_s8): Remove.
28085 (__arm_vqrshlq_m_n_u16): Remove.
28086 (__arm_vqrshlq_m_n_s16): Remove.
28087 (__arm_vqrshlq_m_n_u32): Remove.
28088 (__arm_vqrshlq_m_n_s32): Remove.
28089 (__arm_vqrshlq_m_s8): Remove.
28090 (__arm_vqrshlq_m_s32): Remove.
28091 (__arm_vqrshlq_m_s16): Remove.
28092 (__arm_vqrshlq_m_u8): Remove.
28093 (__arm_vqrshlq_m_u32): Remove.
28094 (__arm_vqrshlq_m_u16): Remove.
28095 (__arm_vqrshlq): Remove.
28096 (__arm_vqrshlq_m_n): Remove.
28097 (__arm_vqrshlq_m): Remove.
28099 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
28101 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
28102 (mve_insn): Add vqrshl, vrshl.
28103 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
28104 (mve_vrshlq_n_<supf><mode>): Merge into ...
28105 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28106 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
28108 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28110 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
28112 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
28113 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
28115 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28118 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
28119 denegrate PHI optmization.
28121 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
28123 * config/i386/predicates.md (register_no_SP_operand):
28124 Rename from index_register_operand.
28125 (call_register_operand): Update for rename.
28126 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
28128 2023-05-05 Tamar Christina <tamar.christina@arm.com>
28131 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
28132 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
28133 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
28134 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
28135 (s-match): Split into s-generic-match and s-gimple-match.
28136 * configure.ac (with-matchpd-partitions,
28137 DEFAULT_MATCHPD_PARTITIONS): New.
28138 * configure: Regenerate.
28140 2023-05-05 Tamar Christina <tamar.christina@arm.com>
28143 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
28144 (decision_tree::gen): Accept list of files instead of single and update
28145 to write function definition to header and main file.
28146 (write_predicate): Likewise.
28147 (write_header): Emit pragmas and new includes.
28148 (main): Create file buffers and cleanup.
28149 (showUsage, write_header_includes): New.
28151 2023-05-05 Tamar Christina <tamar.christina@arm.com>
28154 * Makefile.in (OBJS): Add gimple-match-exports.o.
28155 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
28156 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
28157 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
28158 gimple_resimplify5, constant_for_folding, convert_conditional_op,
28159 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
28160 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
28161 do_valueize, try_conditional_simplification, gimple_extract,
28162 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
28163 commutative_ternary_op_p, first_commutative_argument,
28164 associative_binary_op_p, directly_supported_p,
28165 get_conditional_internal_fn): Moved to gimple-match-exports.cc
28166 * gimple-match-exports.cc: New file.
28168 2023-05-05 Tamar Christina <tamar.christina@arm.com>
28171 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
28173 (dt_simplify::gen_1): Use it.
28175 2023-05-05 Tamar Christina <tamar.christina@arm.com>
28178 * genmatch.cc (output_line_directive): Only emit commented directive
28181 2023-05-05 Tamar Christina <tamar.christina@arm.com>
28184 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
28186 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
28188 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
28189 unused in_mode/in_n variables.
28191 2023-05-05 Richard Biener <rguenther@suse.de>
28193 PR tree-optimization/109735
28194 * tree-vect-stmts.cc (vectorizable_operation): Perform
28195 conversion for POINTER_DIFF_EXPR unconditionally.
28197 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
28199 * config/i386/mmx.md (mulv2si3): New expander.
28200 (*mulv2si3): New insn pattern.
28202 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
28203 Thomas Schwinge <thomas@codesourcery.com>
28206 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
28207 alongside reverse-offload function table to prevent NULL values
28208 of the function addresses.
28210 2023-05-05 Jakub Jelinek <jakub@redhat.com>
28212 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
28214 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
28216 2023-05-05 Andrew Pinski <apinski@marvell.com>
28218 PR tree-optimization/109732
28219 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
28220 of the argtrue/argfalse.
28222 2023-05-05 Andrew Pinski <apinski@marvell.com>
28224 PR tree-optimization/109722
28225 * match.pd: Extend the `ABS<a> == 0` pattern
28226 to cover `ABSU<a> == 0` too.
28228 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
28231 * config/i386/predicates.md (index_reg_operand): New predicate.
28232 * config/i386/i386.md (ashift to lea spliter): Use
28233 general_reg_operand and index_reg_operand predicates.
28235 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28237 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
28238 Rename and reimplement with RTL codes to...
28239 (aarch64_<optab>hn2<mode>_insn_le): .. This.
28240 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
28241 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
28243 (aarch64_<optab>hn2<mode>_insn_be): ... This.
28244 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
28245 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
28246 (aarch64_<optab>hn2<mode>): ... This.
28247 (aarch64_r<optab>hn2<mode>): New expander.
28248 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
28249 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
28250 (ADDSUBHN): Delete.
28251 (sur): Remove handling of the above.
28252 (addsub): Likewise.
28254 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28256 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
28258 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
28259 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
28260 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
28261 (aarch64_<sur><addsub>hn<mode>): Delete.
28262 (aarch64_<optab>hn<mode>): New define_expand.
28263 (aarch64_r<optab>hn<mode>): Likewise.
28264 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
28267 2023-05-04 Andrew Pinski <apinski@marvell.com>
28269 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
28270 diamond form bb with forwarder only empty blocks better.
28272 2023-05-04 Andrew Pinski <apinski@marvell.com>
28274 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
28275 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
28276 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
28277 of an inline version of it.
28278 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
28279 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
28281 2023-05-04 Andrew Pinski <apinski@marvell.com>
28283 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
28284 the default argument value for dce_ssa_names to nullptr.
28285 Check to make sure dce_ssa_names is a non-nullptr before
28286 calling simple_dce_from_worklist.
28288 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
28290 * config/i386/predicates.md (index_register_operand): Reject
28291 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
28292 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
28293 (call_register_no_elim_operand): Rewrite as ...
28294 (call_register_operand): ... this.
28295 (call_insn_operand): Use call_register_operand predicate.
28297 2023-05-04 Richard Biener <rguenther@suse.de>
28299 PR tree-optimization/109721
28300 * tree-vect-stmts.cc (vectorizable_operation): Make sure
28301 to test word_mode for all !target_support_p operations.
28303 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28306 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
28307 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
28308 (aarch64_mla<mode>): Rename to...
28309 (aarch64_mla<mode><vczle><vczbe>): ... This.
28310 (*aarch64_mla_elt<mode>): Rename to...
28311 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
28312 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
28313 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
28314 (aarch64_mla_n<mode>): Rename to...
28315 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
28316 (aarch64_mls<mode>): Rename to...
28317 (aarch64_mls<mode><vczle><vczbe>): ... This.
28318 (*aarch64_mls_elt<mode>): Rename to...
28319 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
28320 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
28321 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
28322 (aarch64_mls_n<mode>): Rename to...
28323 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
28324 (fma<mode>4): Rename to...
28325 (fma<mode>4<vczle><vczbe>): ... This.
28326 (*aarch64_fma4_elt<mode>): Rename to...
28327 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
28328 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
28329 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
28330 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
28331 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
28332 (fnma<mode>4): Rename to...
28333 (fnma<mode>4<vczle><vczbe>): ... This.
28334 (*aarch64_fnma4_elt<mode>): Rename to...
28335 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
28336 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
28337 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
28338 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
28339 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
28340 (aarch64_simd_bsl<mode>_internal): Rename to...
28341 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
28342 (*aarch64_simd_bsl<mode>_alt): Rename to...
28343 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
28345 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28348 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
28349 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
28350 (fabd<mode>3): Rename to...
28351 (fabd<mode>3<vczle><vczbe>): ... This.
28352 (aarch64_<optab>p<mode>): Rename to...
28353 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
28354 (aarch64_faddp<mode>): Rename to...
28355 (aarch64_faddp<mode><vczle><vczbe>): ... This.
28357 2023-05-04 Martin Liska <mliska@suse.cz>
28359 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
28360 (print_version): Use it.
28361 (generate_results): Likewise.
28363 2023-05-04 Richard Biener <rguenther@suse.de>
28365 * tree-cfg.h (last_stmt): Rename to ...
28366 (last_nondebug_stmt): ... this.
28367 * tree-cfg.cc (last_stmt): Rename to ...
28368 (last_nondebug_stmt): ... this.
28369 (assign_discriminators): Adjust.
28370 (group_case_labels_stmt): Likewise.
28371 (gimple_can_duplicate_bb_p): Likewise.
28372 (execute_fixup_cfg): Likewise.
28373 * auto-profile.cc (afdo_propagate_circuit): Likewise.
28374 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
28375 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
28376 (determine_parallel_type): Likewise.
28377 (adjust_context_and_scope): Likewise.
28378 (expand_task_call): Likewise.
28379 (remove_exit_barrier): Likewise.
28380 (expand_omp_taskreg): Likewise.
28381 (expand_omp_for_init_counts): Likewise.
28382 (expand_omp_for_init_vars): Likewise.
28383 (expand_omp_for_static_chunk): Likewise.
28384 (expand_omp_simd): Likewise.
28385 (expand_oacc_for): Likewise.
28386 (expand_omp_for): Likewise.
28387 (expand_omp_sections): Likewise.
28388 (expand_omp_atomic_fetch_op): Likewise.
28389 (expand_omp_atomic_cas): Likewise.
28390 (expand_omp_atomic): Likewise.
28391 (expand_omp_target): Likewise.
28392 (expand_omp): Likewise.
28393 (omp_make_gimple_edges): Likewise.
28394 * trans-mem.cc (tm_region_init): Likewise.
28395 * tree-inline.cc (redirect_all_calls): Likewise.
28396 * tree-parloops.cc (gen_parallel_loop): Likewise.
28397 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
28398 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
28400 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
28401 (may_eliminate_iv): Likewise.
28402 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
28403 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
28405 (estimate_numbers_of_iterations): Likewise.
28406 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
28407 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
28408 (set_predicates_for_bb): Likewise.
28409 (init_loop_unswitch_info): Likewise.
28410 (hoist_guard): Likewise.
28411 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
28412 (minmax_replacement): Likewise.
28413 * tree-ssa-reassoc.cc (update_range_test): Likewise.
28414 (optimize_range_tests_to_bit_test): Likewise.
28415 (optimize_range_tests_var_bound): Likewise.
28416 (optimize_range_tests): Likewise.
28417 (no_side_effect_bb): Likewise.
28418 (suitable_cond_bb): Likewise.
28419 (maybe_optimize_range_tests): Likewise.
28420 (reassociate_bb): Likewise.
28421 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
28423 2023-05-04 Jakub Jelinek <jakub@redhat.com>
28426 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
28427 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
28428 for it only if it still has TImode. Don't decide whether to call
28429 fix_debug_reg_uses based on whether SRC is ever set or not.
28431 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
28433 * config/cris/cris.cc (cris_split_constant): New function.
28434 * config/cris/cris.md (splitop): New iterator.
28435 (opsplit1): New define_peephole2.
28436 * config/cris/cris-protos.h (cris_split_constant): Declare.
28437 (cris_splittable_constant_p): New macro.
28439 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
28441 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
28444 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
28446 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
28447 lra_in_progress, not reload_in_progress.
28448 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
28449 * config/cris/constraints.md ("Q"): Ditto.
28451 2023-05-03 Andrew Pinski <apinski@marvell.com>
28453 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
28454 stats on removed number of statements and phis.
28456 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
28458 PR tree-optimization/109711
28459 * value-range.cc (irange::verify_range): Allow types of
28462 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
28465 * calls.cc (can_implement_as_sibling_call_p): Reject calls
28466 to __sanitizer_cov_trace_pc.
28468 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
28471 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
28472 a new ABI break parameter for GCC 14. Set it to the alignment
28473 of enums that have an underlying type. Take the true alignment
28474 of such enums from the TYPE_ALIGN of the underlying type's
28476 (aarch64_function_arg_boundary): Update accordingly.
28477 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
28478 Warn about ABI differences.
28480 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
28483 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
28484 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
28485 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
28486 (aarch64_gimplify_va_arg_expr): Likewise.
28488 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28490 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
28491 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
28492 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
28494 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
28495 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
28496 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
28497 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
28498 * config/arm/arm_mve.h (vhsubq): Remove.
28500 (vhaddq_m): Remove.
28501 (vhsubq_m): Remove.
28502 (vhaddq_x): Remove.
28503 (vhsubq_x): Remove.
28504 (vhsubq_u8): Remove.
28505 (vhsubq_n_u8): Remove.
28506 (vhaddq_u8): Remove.
28507 (vhaddq_n_u8): Remove.
28508 (vhsubq_s8): Remove.
28509 (vhsubq_n_s8): Remove.
28510 (vhaddq_s8): Remove.
28511 (vhaddq_n_s8): Remove.
28512 (vhsubq_u16): Remove.
28513 (vhsubq_n_u16): Remove.
28514 (vhaddq_u16): Remove.
28515 (vhaddq_n_u16): Remove.
28516 (vhsubq_s16): Remove.
28517 (vhsubq_n_s16): Remove.
28518 (vhaddq_s16): Remove.
28519 (vhaddq_n_s16): Remove.
28520 (vhsubq_u32): Remove.
28521 (vhsubq_n_u32): Remove.
28522 (vhaddq_u32): Remove.
28523 (vhaddq_n_u32): Remove.
28524 (vhsubq_s32): Remove.
28525 (vhsubq_n_s32): Remove.
28526 (vhaddq_s32): Remove.
28527 (vhaddq_n_s32): Remove.
28528 (vhaddq_m_n_s8): Remove.
28529 (vhaddq_m_n_s32): Remove.
28530 (vhaddq_m_n_s16): Remove.
28531 (vhaddq_m_n_u8): Remove.
28532 (vhaddq_m_n_u32): Remove.
28533 (vhaddq_m_n_u16): Remove.
28534 (vhaddq_m_s8): Remove.
28535 (vhaddq_m_s32): Remove.
28536 (vhaddq_m_s16): Remove.
28537 (vhaddq_m_u8): Remove.
28538 (vhaddq_m_u32): Remove.
28539 (vhaddq_m_u16): Remove.
28540 (vhsubq_m_n_s8): Remove.
28541 (vhsubq_m_n_s32): Remove.
28542 (vhsubq_m_n_s16): Remove.
28543 (vhsubq_m_n_u8): Remove.
28544 (vhsubq_m_n_u32): Remove.
28545 (vhsubq_m_n_u16): Remove.
28546 (vhsubq_m_s8): Remove.
28547 (vhsubq_m_s32): Remove.
28548 (vhsubq_m_s16): Remove.
28549 (vhsubq_m_u8): Remove.
28550 (vhsubq_m_u32): Remove.
28551 (vhsubq_m_u16): Remove.
28552 (vhaddq_x_n_s8): Remove.
28553 (vhaddq_x_n_s16): Remove.
28554 (vhaddq_x_n_s32): Remove.
28555 (vhaddq_x_n_u8): Remove.
28556 (vhaddq_x_n_u16): Remove.
28557 (vhaddq_x_n_u32): Remove.
28558 (vhaddq_x_s8): Remove.
28559 (vhaddq_x_s16): Remove.
28560 (vhaddq_x_s32): Remove.
28561 (vhaddq_x_u8): Remove.
28562 (vhaddq_x_u16): Remove.
28563 (vhaddq_x_u32): Remove.
28564 (vhsubq_x_n_s8): Remove.
28565 (vhsubq_x_n_s16): Remove.
28566 (vhsubq_x_n_s32): Remove.
28567 (vhsubq_x_n_u8): Remove.
28568 (vhsubq_x_n_u16): Remove.
28569 (vhsubq_x_n_u32): Remove.
28570 (vhsubq_x_s8): Remove.
28571 (vhsubq_x_s16): Remove.
28572 (vhsubq_x_s32): Remove.
28573 (vhsubq_x_u8): Remove.
28574 (vhsubq_x_u16): Remove.
28575 (vhsubq_x_u32): Remove.
28576 (__arm_vhsubq_u8): Remove.
28577 (__arm_vhsubq_n_u8): Remove.
28578 (__arm_vhaddq_u8): Remove.
28579 (__arm_vhaddq_n_u8): Remove.
28580 (__arm_vhsubq_s8): Remove.
28581 (__arm_vhsubq_n_s8): Remove.
28582 (__arm_vhaddq_s8): Remove.
28583 (__arm_vhaddq_n_s8): Remove.
28584 (__arm_vhsubq_u16): Remove.
28585 (__arm_vhsubq_n_u16): Remove.
28586 (__arm_vhaddq_u16): Remove.
28587 (__arm_vhaddq_n_u16): Remove.
28588 (__arm_vhsubq_s16): Remove.
28589 (__arm_vhsubq_n_s16): Remove.
28590 (__arm_vhaddq_s16): Remove.
28591 (__arm_vhaddq_n_s16): Remove.
28592 (__arm_vhsubq_u32): Remove.
28593 (__arm_vhsubq_n_u32): Remove.
28594 (__arm_vhaddq_u32): Remove.
28595 (__arm_vhaddq_n_u32): Remove.
28596 (__arm_vhsubq_s32): Remove.
28597 (__arm_vhsubq_n_s32): Remove.
28598 (__arm_vhaddq_s32): Remove.
28599 (__arm_vhaddq_n_s32): Remove.
28600 (__arm_vhaddq_m_n_s8): Remove.
28601 (__arm_vhaddq_m_n_s32): Remove.
28602 (__arm_vhaddq_m_n_s16): Remove.
28603 (__arm_vhaddq_m_n_u8): Remove.
28604 (__arm_vhaddq_m_n_u32): Remove.
28605 (__arm_vhaddq_m_n_u16): Remove.
28606 (__arm_vhaddq_m_s8): Remove.
28607 (__arm_vhaddq_m_s32): Remove.
28608 (__arm_vhaddq_m_s16): Remove.
28609 (__arm_vhaddq_m_u8): Remove.
28610 (__arm_vhaddq_m_u32): Remove.
28611 (__arm_vhaddq_m_u16): Remove.
28612 (__arm_vhsubq_m_n_s8): Remove.
28613 (__arm_vhsubq_m_n_s32): Remove.
28614 (__arm_vhsubq_m_n_s16): Remove.
28615 (__arm_vhsubq_m_n_u8): Remove.
28616 (__arm_vhsubq_m_n_u32): Remove.
28617 (__arm_vhsubq_m_n_u16): Remove.
28618 (__arm_vhsubq_m_s8): Remove.
28619 (__arm_vhsubq_m_s32): Remove.
28620 (__arm_vhsubq_m_s16): Remove.
28621 (__arm_vhsubq_m_u8): Remove.
28622 (__arm_vhsubq_m_u32): Remove.
28623 (__arm_vhsubq_m_u16): Remove.
28624 (__arm_vhaddq_x_n_s8): Remove.
28625 (__arm_vhaddq_x_n_s16): Remove.
28626 (__arm_vhaddq_x_n_s32): Remove.
28627 (__arm_vhaddq_x_n_u8): Remove.
28628 (__arm_vhaddq_x_n_u16): Remove.
28629 (__arm_vhaddq_x_n_u32): Remove.
28630 (__arm_vhaddq_x_s8): Remove.
28631 (__arm_vhaddq_x_s16): Remove.
28632 (__arm_vhaddq_x_s32): Remove.
28633 (__arm_vhaddq_x_u8): Remove.
28634 (__arm_vhaddq_x_u16): Remove.
28635 (__arm_vhaddq_x_u32): Remove.
28636 (__arm_vhsubq_x_n_s8): Remove.
28637 (__arm_vhsubq_x_n_s16): Remove.
28638 (__arm_vhsubq_x_n_s32): Remove.
28639 (__arm_vhsubq_x_n_u8): Remove.
28640 (__arm_vhsubq_x_n_u16): Remove.
28641 (__arm_vhsubq_x_n_u32): Remove.
28642 (__arm_vhsubq_x_s8): Remove.
28643 (__arm_vhsubq_x_s16): Remove.
28644 (__arm_vhsubq_x_s32): Remove.
28645 (__arm_vhsubq_x_u8): Remove.
28646 (__arm_vhsubq_x_u16): Remove.
28647 (__arm_vhsubq_x_u32): Remove.
28648 (__arm_vhsubq): Remove.
28649 (__arm_vhaddq): Remove.
28650 (__arm_vhaddq_m): Remove.
28651 (__arm_vhsubq_m): Remove.
28652 (__arm_vhaddq_x): Remove.
28653 (__arm_vhsubq_x): Remove.
28655 (vmulhq_m): Remove.
28656 (vmulhq_x): Remove.
28657 (vmulhq_u8): Remove.
28658 (vmulhq_s8): Remove.
28659 (vmulhq_u16): Remove.
28660 (vmulhq_s16): Remove.
28661 (vmulhq_u32): Remove.
28662 (vmulhq_s32): Remove.
28663 (vmulhq_m_s8): Remove.
28664 (vmulhq_m_s32): Remove.
28665 (vmulhq_m_s16): Remove.
28666 (vmulhq_m_u8): Remove.
28667 (vmulhq_m_u32): Remove.
28668 (vmulhq_m_u16): Remove.
28669 (vmulhq_x_s8): Remove.
28670 (vmulhq_x_s16): Remove.
28671 (vmulhq_x_s32): Remove.
28672 (vmulhq_x_u8): Remove.
28673 (vmulhq_x_u16): Remove.
28674 (vmulhq_x_u32): Remove.
28675 (__arm_vmulhq_u8): Remove.
28676 (__arm_vmulhq_s8): Remove.
28677 (__arm_vmulhq_u16): Remove.
28678 (__arm_vmulhq_s16): Remove.
28679 (__arm_vmulhq_u32): Remove.
28680 (__arm_vmulhq_s32): Remove.
28681 (__arm_vmulhq_m_s8): Remove.
28682 (__arm_vmulhq_m_s32): Remove.
28683 (__arm_vmulhq_m_s16): Remove.
28684 (__arm_vmulhq_m_u8): Remove.
28685 (__arm_vmulhq_m_u32): Remove.
28686 (__arm_vmulhq_m_u16): Remove.
28687 (__arm_vmulhq_x_s8): Remove.
28688 (__arm_vmulhq_x_s16): Remove.
28689 (__arm_vmulhq_x_s32): Remove.
28690 (__arm_vmulhq_x_u8): Remove.
28691 (__arm_vmulhq_x_u16): Remove.
28692 (__arm_vmulhq_x_u32): Remove.
28693 (__arm_vmulhq): Remove.
28694 (__arm_vmulhq_m): Remove.
28695 (__arm_vmulhq_x): Remove.
28698 (vqaddq_m): Remove.
28699 (vqsubq_m): Remove.
28700 (vqsubq_u8): Remove.
28701 (vqsubq_n_u8): Remove.
28702 (vqaddq_u8): Remove.
28703 (vqaddq_n_u8): Remove.
28704 (vqsubq_s8): Remove.
28705 (vqsubq_n_s8): Remove.
28706 (vqaddq_s8): Remove.
28707 (vqaddq_n_s8): Remove.
28708 (vqsubq_u16): Remove.
28709 (vqsubq_n_u16): Remove.
28710 (vqaddq_u16): Remove.
28711 (vqaddq_n_u16): Remove.
28712 (vqsubq_s16): Remove.
28713 (vqsubq_n_s16): Remove.
28714 (vqaddq_s16): Remove.
28715 (vqaddq_n_s16): Remove.
28716 (vqsubq_u32): Remove.
28717 (vqsubq_n_u32): Remove.
28718 (vqaddq_u32): Remove.
28719 (vqaddq_n_u32): Remove.
28720 (vqsubq_s32): Remove.
28721 (vqsubq_n_s32): Remove.
28722 (vqaddq_s32): Remove.
28723 (vqaddq_n_s32): Remove.
28724 (vqaddq_m_n_s8): Remove.
28725 (vqaddq_m_n_s32): Remove.
28726 (vqaddq_m_n_s16): Remove.
28727 (vqaddq_m_n_u8): Remove.
28728 (vqaddq_m_n_u32): Remove.
28729 (vqaddq_m_n_u16): Remove.
28730 (vqaddq_m_s8): Remove.
28731 (vqaddq_m_s32): Remove.
28732 (vqaddq_m_s16): Remove.
28733 (vqaddq_m_u8): Remove.
28734 (vqaddq_m_u32): Remove.
28735 (vqaddq_m_u16): Remove.
28736 (vqsubq_m_n_s8): Remove.
28737 (vqsubq_m_n_s32): Remove.
28738 (vqsubq_m_n_s16): Remove.
28739 (vqsubq_m_n_u8): Remove.
28740 (vqsubq_m_n_u32): Remove.
28741 (vqsubq_m_n_u16): Remove.
28742 (vqsubq_m_s8): Remove.
28743 (vqsubq_m_s32): Remove.
28744 (vqsubq_m_s16): Remove.
28745 (vqsubq_m_u8): Remove.
28746 (vqsubq_m_u32): Remove.
28747 (vqsubq_m_u16): Remove.
28748 (__arm_vqsubq_u8): Remove.
28749 (__arm_vqsubq_n_u8): Remove.
28750 (__arm_vqaddq_u8): Remove.
28751 (__arm_vqaddq_n_u8): Remove.
28752 (__arm_vqsubq_s8): Remove.
28753 (__arm_vqsubq_n_s8): Remove.
28754 (__arm_vqaddq_s8): Remove.
28755 (__arm_vqaddq_n_s8): Remove.
28756 (__arm_vqsubq_u16): Remove.
28757 (__arm_vqsubq_n_u16): Remove.
28758 (__arm_vqaddq_u16): Remove.
28759 (__arm_vqaddq_n_u16): Remove.
28760 (__arm_vqsubq_s16): Remove.
28761 (__arm_vqsubq_n_s16): Remove.
28762 (__arm_vqaddq_s16): Remove.
28763 (__arm_vqaddq_n_s16): Remove.
28764 (__arm_vqsubq_u32): Remove.
28765 (__arm_vqsubq_n_u32): Remove.
28766 (__arm_vqaddq_u32): Remove.
28767 (__arm_vqaddq_n_u32): Remove.
28768 (__arm_vqsubq_s32): Remove.
28769 (__arm_vqsubq_n_s32): Remove.
28770 (__arm_vqaddq_s32): Remove.
28771 (__arm_vqaddq_n_s32): Remove.
28772 (__arm_vqaddq_m_n_s8): Remove.
28773 (__arm_vqaddq_m_n_s32): Remove.
28774 (__arm_vqaddq_m_n_s16): Remove.
28775 (__arm_vqaddq_m_n_u8): Remove.
28776 (__arm_vqaddq_m_n_u32): Remove.
28777 (__arm_vqaddq_m_n_u16): Remove.
28778 (__arm_vqaddq_m_s8): Remove.
28779 (__arm_vqaddq_m_s32): Remove.
28780 (__arm_vqaddq_m_s16): Remove.
28781 (__arm_vqaddq_m_u8): Remove.
28782 (__arm_vqaddq_m_u32): Remove.
28783 (__arm_vqaddq_m_u16): Remove.
28784 (__arm_vqsubq_m_n_s8): Remove.
28785 (__arm_vqsubq_m_n_s32): Remove.
28786 (__arm_vqsubq_m_n_s16): Remove.
28787 (__arm_vqsubq_m_n_u8): Remove.
28788 (__arm_vqsubq_m_n_u32): Remove.
28789 (__arm_vqsubq_m_n_u16): Remove.
28790 (__arm_vqsubq_m_s8): Remove.
28791 (__arm_vqsubq_m_s32): Remove.
28792 (__arm_vqsubq_m_s16): Remove.
28793 (__arm_vqsubq_m_u8): Remove.
28794 (__arm_vqsubq_m_u32): Remove.
28795 (__arm_vqsubq_m_u16): Remove.
28796 (__arm_vqsubq): Remove.
28797 (__arm_vqaddq): Remove.
28798 (__arm_vqaddq_m): Remove.
28799 (__arm_vqsubq_m): Remove.
28800 (vqdmulhq): Remove.
28801 (vqdmulhq_m): Remove.
28802 (vqdmulhq_s8): Remove.
28803 (vqdmulhq_n_s8): Remove.
28804 (vqdmulhq_s16): Remove.
28805 (vqdmulhq_n_s16): Remove.
28806 (vqdmulhq_s32): Remove.
28807 (vqdmulhq_n_s32): Remove.
28808 (vqdmulhq_m_n_s8): Remove.
28809 (vqdmulhq_m_n_s32): Remove.
28810 (vqdmulhq_m_n_s16): Remove.
28811 (vqdmulhq_m_s8): Remove.
28812 (vqdmulhq_m_s32): Remove.
28813 (vqdmulhq_m_s16): Remove.
28814 (__arm_vqdmulhq_s8): Remove.
28815 (__arm_vqdmulhq_n_s8): Remove.
28816 (__arm_vqdmulhq_s16): Remove.
28817 (__arm_vqdmulhq_n_s16): Remove.
28818 (__arm_vqdmulhq_s32): Remove.
28819 (__arm_vqdmulhq_n_s32): Remove.
28820 (__arm_vqdmulhq_m_n_s8): Remove.
28821 (__arm_vqdmulhq_m_n_s32): Remove.
28822 (__arm_vqdmulhq_m_n_s16): Remove.
28823 (__arm_vqdmulhq_m_s8): Remove.
28824 (__arm_vqdmulhq_m_s32): Remove.
28825 (__arm_vqdmulhq_m_s16): Remove.
28826 (__arm_vqdmulhq): Remove.
28827 (__arm_vqdmulhq_m): Remove.
28829 (vrhaddq_m): Remove.
28830 (vrhaddq_x): Remove.
28831 (vrhaddq_u8): Remove.
28832 (vrhaddq_s8): Remove.
28833 (vrhaddq_u16): Remove.
28834 (vrhaddq_s16): Remove.
28835 (vrhaddq_u32): Remove.
28836 (vrhaddq_s32): Remove.
28837 (vrhaddq_m_s8): Remove.
28838 (vrhaddq_m_s32): Remove.
28839 (vrhaddq_m_s16): Remove.
28840 (vrhaddq_m_u8): Remove.
28841 (vrhaddq_m_u32): Remove.
28842 (vrhaddq_m_u16): Remove.
28843 (vrhaddq_x_s8): Remove.
28844 (vrhaddq_x_s16): Remove.
28845 (vrhaddq_x_s32): Remove.
28846 (vrhaddq_x_u8): Remove.
28847 (vrhaddq_x_u16): Remove.
28848 (vrhaddq_x_u32): Remove.
28849 (__arm_vrhaddq_u8): Remove.
28850 (__arm_vrhaddq_s8): Remove.
28851 (__arm_vrhaddq_u16): Remove.
28852 (__arm_vrhaddq_s16): Remove.
28853 (__arm_vrhaddq_u32): Remove.
28854 (__arm_vrhaddq_s32): Remove.
28855 (__arm_vrhaddq_m_s8): Remove.
28856 (__arm_vrhaddq_m_s32): Remove.
28857 (__arm_vrhaddq_m_s16): Remove.
28858 (__arm_vrhaddq_m_u8): Remove.
28859 (__arm_vrhaddq_m_u32): Remove.
28860 (__arm_vrhaddq_m_u16): Remove.
28861 (__arm_vrhaddq_x_s8): Remove.
28862 (__arm_vrhaddq_x_s16): Remove.
28863 (__arm_vrhaddq_x_s32): Remove.
28864 (__arm_vrhaddq_x_u8): Remove.
28865 (__arm_vrhaddq_x_u16): Remove.
28866 (__arm_vrhaddq_x_u32): Remove.
28867 (__arm_vrhaddq): Remove.
28868 (__arm_vrhaddq_m): Remove.
28869 (__arm_vrhaddq_x): Remove.
28871 (vrmulhq_m): Remove.
28872 (vrmulhq_x): Remove.
28873 (vrmulhq_u8): Remove.
28874 (vrmulhq_s8): Remove.
28875 (vrmulhq_u16): Remove.
28876 (vrmulhq_s16): Remove.
28877 (vrmulhq_u32): Remove.
28878 (vrmulhq_s32): Remove.
28879 (vrmulhq_m_s8): Remove.
28880 (vrmulhq_m_s32): Remove.
28881 (vrmulhq_m_s16): Remove.
28882 (vrmulhq_m_u8): Remove.
28883 (vrmulhq_m_u32): Remove.
28884 (vrmulhq_m_u16): Remove.
28885 (vrmulhq_x_s8): Remove.
28886 (vrmulhq_x_s16): Remove.
28887 (vrmulhq_x_s32): Remove.
28888 (vrmulhq_x_u8): Remove.
28889 (vrmulhq_x_u16): Remove.
28890 (vrmulhq_x_u32): Remove.
28891 (__arm_vrmulhq_u8): Remove.
28892 (__arm_vrmulhq_s8): Remove.
28893 (__arm_vrmulhq_u16): Remove.
28894 (__arm_vrmulhq_s16): Remove.
28895 (__arm_vrmulhq_u32): Remove.
28896 (__arm_vrmulhq_s32): Remove.
28897 (__arm_vrmulhq_m_s8): Remove.
28898 (__arm_vrmulhq_m_s32): Remove.
28899 (__arm_vrmulhq_m_s16): Remove.
28900 (__arm_vrmulhq_m_u8): Remove.
28901 (__arm_vrmulhq_m_u32): Remove.
28902 (__arm_vrmulhq_m_u16): Remove.
28903 (__arm_vrmulhq_x_s8): Remove.
28904 (__arm_vrmulhq_x_s16): Remove.
28905 (__arm_vrmulhq_x_s32): Remove.
28906 (__arm_vrmulhq_x_u8): Remove.
28907 (__arm_vrmulhq_x_u16): Remove.
28908 (__arm_vrmulhq_x_u32): Remove.
28909 (__arm_vrmulhq): Remove.
28910 (__arm_vrmulhq_m): Remove.
28911 (__arm_vrmulhq_x): Remove.
28913 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28915 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
28916 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
28917 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
28918 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
28919 * config/arm/mve.md (mve_vabdq_<supf><mode>)
28920 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
28921 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
28922 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
28923 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
28924 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
28925 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
28927 (@mve_<mve_insn>q_<supf><mode>): ... this.
28928 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
28929 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
28930 gen_mve_vhaddq / gen_mve_vrhaddq.
28932 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28934 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
28935 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
28936 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
28937 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
28938 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
28939 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
28940 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
28941 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
28942 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
28943 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
28944 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
28945 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
28946 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28948 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28950 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
28951 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
28953 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
28954 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
28955 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
28956 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
28957 (mve_vqsubq_n_<supf><mode>): Merge into ...
28958 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28960 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28962 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
28963 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
28964 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
28965 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
28966 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
28967 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
28968 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
28969 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
28970 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
28971 (mve_vshlq_m_<supf><mode>): Merged into
28972 @mve_<mve_insn>q_m_<supf><mode>.
28973 (mve_vabdq_m_<supf><mode>): Likewise.
28974 (mve_vhaddq_m_<supf><mode>): Likewise.
28975 (mve_vhsubq_m_<supf><mode>): Likewise.
28976 (mve_vmaxq_m_<supf><mode>): Likewise.
28977 (mve_vminq_m_<supf><mode>): Likewise.
28978 (mve_vmulhq_m_<supf><mode>): Likewise.
28979 (mve_vqaddq_m_<supf><mode>): Likewise.
28980 (mve_vqrshlq_m_<supf><mode>): Likewise.
28981 (mve_vqshlq_m_<supf><mode>): Likewise.
28982 (mve_vqsubq_m_<supf><mode>): Likewise.
28983 (mve_vrhaddq_m_<supf><mode>): Likewise.
28984 (mve_vrmulhq_m_<supf><mode>): Likewise.
28985 (mve_vrshlq_m_<supf><mode>): Likewise.
28986 (mve_vqdmladhq_m_s<mode>): Likewise.
28987 (mve_vqdmladhxq_m_s<mode>): Likewise.
28988 (mve_vqdmlsdhq_m_s<mode>): Likewise.
28989 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
28990 (mve_vqdmulhq_m_s<mode>): Likewise.
28991 (mve_vqrdmladhq_m_s<mode>): Likewise.
28992 (mve_vqrdmladhxq_m_s<mode>): Likewise.
28993 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
28994 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
28995 (mve_vqrdmulhq_m_s<mode>): Likewise.
28997 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28999 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
29000 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
29001 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
29002 * config/arm/arm_mve.h (vcreateq_f16): Remove.
29003 (vcreateq_f32): Remove.
29004 (vcreateq_u8): Remove.
29005 (vcreateq_u16): Remove.
29006 (vcreateq_u32): Remove.
29007 (vcreateq_u64): Remove.
29008 (vcreateq_s8): Remove.
29009 (vcreateq_s16): Remove.
29010 (vcreateq_s32): Remove.
29011 (vcreateq_s64): Remove.
29012 (__arm_vcreateq_u8): Remove.
29013 (__arm_vcreateq_u16): Remove.
29014 (__arm_vcreateq_u32): Remove.
29015 (__arm_vcreateq_u64): Remove.
29016 (__arm_vcreateq_s8): Remove.
29017 (__arm_vcreateq_s16): Remove.
29018 (__arm_vcreateq_s32): Remove.
29019 (__arm_vcreateq_s64): Remove.
29020 (__arm_vcreateq_f16): Remove.
29021 (__arm_vcreateq_f32): Remove.
29023 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29025 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
29026 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
29027 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
29028 (@mve_<mve_insn>q_f<mode>): ... this.
29029 (mve_vcreateq_<supf><mode>): Rename into ...
29030 (@mve_<mve_insn>q_<supf><mode>): ... this.
29032 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29034 * config/arm/arm-mve-builtins-shapes.cc (create): New.
29035 * config/arm/arm-mve-builtins-shapes.h: (create): New.
29037 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29039 * config/arm/arm-mve-builtins-functions.h (class
29040 unspec_mve_function_exact_insn): New.
29042 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29044 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
29046 * config/arm/arm-mve-builtins-base.def (vorrq): New.
29047 * config/arm/arm-mve-builtins-base.h (vorrq): New.
29048 * config/arm/arm-mve-builtins.cc
29049 (function_instance::has_inactive_argument): Handle vorrq.
29050 * config/arm/arm_mve.h (vorrq): Remove.
29051 (vorrq_m_n): Remove.
29054 (vorrq_u8): Remove.
29055 (vorrq_s8): Remove.
29056 (vorrq_u16): Remove.
29057 (vorrq_s16): Remove.
29058 (vorrq_u32): Remove.
29059 (vorrq_s32): Remove.
29060 (vorrq_n_u16): Remove.
29061 (vorrq_f16): Remove.
29062 (vorrq_n_s16): Remove.
29063 (vorrq_n_u32): Remove.
29064 (vorrq_f32): Remove.
29065 (vorrq_n_s32): Remove.
29066 (vorrq_m_n_s16): Remove.
29067 (vorrq_m_n_u16): Remove.
29068 (vorrq_m_n_s32): Remove.
29069 (vorrq_m_n_u32): Remove.
29070 (vorrq_m_s8): Remove.
29071 (vorrq_m_s32): Remove.
29072 (vorrq_m_s16): Remove.
29073 (vorrq_m_u8): Remove.
29074 (vorrq_m_u32): Remove.
29075 (vorrq_m_u16): Remove.
29076 (vorrq_m_f32): Remove.
29077 (vorrq_m_f16): Remove.
29078 (vorrq_x_s8): Remove.
29079 (vorrq_x_s16): Remove.
29080 (vorrq_x_s32): Remove.
29081 (vorrq_x_u8): Remove.
29082 (vorrq_x_u16): Remove.
29083 (vorrq_x_u32): Remove.
29084 (vorrq_x_f16): Remove.
29085 (vorrq_x_f32): Remove.
29086 (__arm_vorrq_u8): Remove.
29087 (__arm_vorrq_s8): Remove.
29088 (__arm_vorrq_u16): Remove.
29089 (__arm_vorrq_s16): Remove.
29090 (__arm_vorrq_u32): Remove.
29091 (__arm_vorrq_s32): Remove.
29092 (__arm_vorrq_n_u16): Remove.
29093 (__arm_vorrq_n_s16): Remove.
29094 (__arm_vorrq_n_u32): Remove.
29095 (__arm_vorrq_n_s32): Remove.
29096 (__arm_vorrq_m_n_s16): Remove.
29097 (__arm_vorrq_m_n_u16): Remove.
29098 (__arm_vorrq_m_n_s32): Remove.
29099 (__arm_vorrq_m_n_u32): Remove.
29100 (__arm_vorrq_m_s8): Remove.
29101 (__arm_vorrq_m_s32): Remove.
29102 (__arm_vorrq_m_s16): Remove.
29103 (__arm_vorrq_m_u8): Remove.
29104 (__arm_vorrq_m_u32): Remove.
29105 (__arm_vorrq_m_u16): Remove.
29106 (__arm_vorrq_x_s8): Remove.
29107 (__arm_vorrq_x_s16): Remove.
29108 (__arm_vorrq_x_s32): Remove.
29109 (__arm_vorrq_x_u8): Remove.
29110 (__arm_vorrq_x_u16): Remove.
29111 (__arm_vorrq_x_u32): Remove.
29112 (__arm_vorrq_f16): Remove.
29113 (__arm_vorrq_f32): Remove.
29114 (__arm_vorrq_m_f32): Remove.
29115 (__arm_vorrq_m_f16): Remove.
29116 (__arm_vorrq_x_f16): Remove.
29117 (__arm_vorrq_x_f32): Remove.
29118 (__arm_vorrq): Remove.
29119 (__arm_vorrq_m_n): Remove.
29120 (__arm_vorrq_m): Remove.
29121 (__arm_vorrq_x): Remove.
29123 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29125 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
29126 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
29127 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
29128 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
29130 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29132 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
29133 (vandq,veorq): New.
29134 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
29135 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
29136 * config/arm/arm_mve.h (vandq): Remove.
29139 (vandq_u8): Remove.
29140 (vandq_s8): Remove.
29141 (vandq_u16): Remove.
29142 (vandq_s16): Remove.
29143 (vandq_u32): Remove.
29144 (vandq_s32): Remove.
29145 (vandq_f16): Remove.
29146 (vandq_f32): Remove.
29147 (vandq_m_s8): Remove.
29148 (vandq_m_s32): Remove.
29149 (vandq_m_s16): Remove.
29150 (vandq_m_u8): Remove.
29151 (vandq_m_u32): Remove.
29152 (vandq_m_u16): Remove.
29153 (vandq_m_f32): Remove.
29154 (vandq_m_f16): Remove.
29155 (vandq_x_s8): Remove.
29156 (vandq_x_s16): Remove.
29157 (vandq_x_s32): Remove.
29158 (vandq_x_u8): Remove.
29159 (vandq_x_u16): Remove.
29160 (vandq_x_u32): Remove.
29161 (vandq_x_f16): Remove.
29162 (vandq_x_f32): Remove.
29163 (__arm_vandq_u8): Remove.
29164 (__arm_vandq_s8): Remove.
29165 (__arm_vandq_u16): Remove.
29166 (__arm_vandq_s16): Remove.
29167 (__arm_vandq_u32): Remove.
29168 (__arm_vandq_s32): Remove.
29169 (__arm_vandq_m_s8): Remove.
29170 (__arm_vandq_m_s32): Remove.
29171 (__arm_vandq_m_s16): Remove.
29172 (__arm_vandq_m_u8): Remove.
29173 (__arm_vandq_m_u32): Remove.
29174 (__arm_vandq_m_u16): Remove.
29175 (__arm_vandq_x_s8): Remove.
29176 (__arm_vandq_x_s16): Remove.
29177 (__arm_vandq_x_s32): Remove.
29178 (__arm_vandq_x_u8): Remove.
29179 (__arm_vandq_x_u16): Remove.
29180 (__arm_vandq_x_u32): Remove.
29181 (__arm_vandq_f16): Remove.
29182 (__arm_vandq_f32): Remove.
29183 (__arm_vandq_m_f32): Remove.
29184 (__arm_vandq_m_f16): Remove.
29185 (__arm_vandq_x_f16): Remove.
29186 (__arm_vandq_x_f32): Remove.
29187 (__arm_vandq): Remove.
29188 (__arm_vandq_m): Remove.
29189 (__arm_vandq_x): Remove.
29192 (veorq_u8): Remove.
29193 (veorq_s8): Remove.
29194 (veorq_u16): Remove.
29195 (veorq_s16): Remove.
29196 (veorq_u32): Remove.
29197 (veorq_s32): Remove.
29198 (veorq_f16): Remove.
29199 (veorq_f32): Remove.
29200 (veorq_m_s8): Remove.
29201 (veorq_m_s32): Remove.
29202 (veorq_m_s16): Remove.
29203 (veorq_m_u8): Remove.
29204 (veorq_m_u32): Remove.
29205 (veorq_m_u16): Remove.
29206 (veorq_m_f32): Remove.
29207 (veorq_m_f16): Remove.
29208 (veorq_x_s8): Remove.
29209 (veorq_x_s16): Remove.
29210 (veorq_x_s32): Remove.
29211 (veorq_x_u8): Remove.
29212 (veorq_x_u16): Remove.
29213 (veorq_x_u32): Remove.
29214 (veorq_x_f16): Remove.
29215 (veorq_x_f32): Remove.
29216 (__arm_veorq_u8): Remove.
29217 (__arm_veorq_s8): Remove.
29218 (__arm_veorq_u16): Remove.
29219 (__arm_veorq_s16): Remove.
29220 (__arm_veorq_u32): Remove.
29221 (__arm_veorq_s32): Remove.
29222 (__arm_veorq_m_s8): Remove.
29223 (__arm_veorq_m_s32): Remove.
29224 (__arm_veorq_m_s16): Remove.
29225 (__arm_veorq_m_u8): Remove.
29226 (__arm_veorq_m_u32): Remove.
29227 (__arm_veorq_m_u16): Remove.
29228 (__arm_veorq_x_s8): Remove.
29229 (__arm_veorq_x_s16): Remove.
29230 (__arm_veorq_x_s32): Remove.
29231 (__arm_veorq_x_u8): Remove.
29232 (__arm_veorq_x_u16): Remove.
29233 (__arm_veorq_x_u32): Remove.
29234 (__arm_veorq_f16): Remove.
29235 (__arm_veorq_f32): Remove.
29236 (__arm_veorq_m_f32): Remove.
29237 (__arm_veorq_m_f16): Remove.
29238 (__arm_veorq_x_f16): Remove.
29239 (__arm_veorq_x_f32): Remove.
29240 (__arm_veorq): Remove.
29241 (__arm_veorq_m): Remove.
29242 (__arm_veorq_x): Remove.
29244 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29246 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
29247 (MVE_FP_M_BINARY_LOGIC): New.
29248 (MVE_INT_M_N_BINARY_LOGIC): New.
29249 (MVE_INT_N_BINARY_LOGIC): New.
29250 (mve_insn): Add vand, veor, vorr, vbic.
29251 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
29252 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
29253 (mve_vbicq_m_<supf><mode>): Merge into ...
29254 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
29255 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
29256 (mve_vbicq_m_f<mode>): Merge into ...
29257 (@mve_<mve_insn>q_m_f<mode>): ... this.
29258 (mve_vorrq_n_<supf><mode>)
29259 (mve_vbicq_n_<supf><mode>): Merge into ...
29260 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29261 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
29263 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29265 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29267 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
29268 * config/arm/arm-mve-builtins-shapes.h (binary): New.
29270 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29272 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
29274 (vaddq, vmulq, vsubq): New.
29275 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
29276 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
29277 * config/arm/arm_mve.h (vaddq): Remove.
29280 (vaddq_n_u8): Remove.
29281 (vaddq_n_s8): Remove.
29282 (vaddq_n_u16): Remove.
29283 (vaddq_n_s16): Remove.
29284 (vaddq_n_u32): Remove.
29285 (vaddq_n_s32): Remove.
29286 (vaddq_n_f16): Remove.
29287 (vaddq_n_f32): Remove.
29288 (vaddq_m_n_s8): Remove.
29289 (vaddq_m_n_s32): Remove.
29290 (vaddq_m_n_s16): Remove.
29291 (vaddq_m_n_u8): Remove.
29292 (vaddq_m_n_u32): Remove.
29293 (vaddq_m_n_u16): Remove.
29294 (vaddq_m_s8): Remove.
29295 (vaddq_m_s32): Remove.
29296 (vaddq_m_s16): Remove.
29297 (vaddq_m_u8): Remove.
29298 (vaddq_m_u32): Remove.
29299 (vaddq_m_u16): Remove.
29300 (vaddq_m_f32): Remove.
29301 (vaddq_m_f16): Remove.
29302 (vaddq_m_n_f32): Remove.
29303 (vaddq_m_n_f16): Remove.
29304 (vaddq_s8): Remove.
29305 (vaddq_s16): Remove.
29306 (vaddq_s32): Remove.
29307 (vaddq_u8): Remove.
29308 (vaddq_u16): Remove.
29309 (vaddq_u32): Remove.
29310 (vaddq_f16): Remove.
29311 (vaddq_f32): Remove.
29312 (vaddq_x_s8): Remove.
29313 (vaddq_x_s16): Remove.
29314 (vaddq_x_s32): Remove.
29315 (vaddq_x_n_s8): Remove.
29316 (vaddq_x_n_s16): Remove.
29317 (vaddq_x_n_s32): Remove.
29318 (vaddq_x_u8): Remove.
29319 (vaddq_x_u16): Remove.
29320 (vaddq_x_u32): Remove.
29321 (vaddq_x_n_u8): Remove.
29322 (vaddq_x_n_u16): Remove.
29323 (vaddq_x_n_u32): Remove.
29324 (vaddq_x_f16): Remove.
29325 (vaddq_x_f32): Remove.
29326 (vaddq_x_n_f16): Remove.
29327 (vaddq_x_n_f32): Remove.
29328 (__arm_vaddq_n_u8): Remove.
29329 (__arm_vaddq_n_s8): Remove.
29330 (__arm_vaddq_n_u16): Remove.
29331 (__arm_vaddq_n_s16): Remove.
29332 (__arm_vaddq_n_u32): Remove.
29333 (__arm_vaddq_n_s32): Remove.
29334 (__arm_vaddq_m_n_s8): Remove.
29335 (__arm_vaddq_m_n_s32): Remove.
29336 (__arm_vaddq_m_n_s16): Remove.
29337 (__arm_vaddq_m_n_u8): Remove.
29338 (__arm_vaddq_m_n_u32): Remove.
29339 (__arm_vaddq_m_n_u16): Remove.
29340 (__arm_vaddq_m_s8): Remove.
29341 (__arm_vaddq_m_s32): Remove.
29342 (__arm_vaddq_m_s16): Remove.
29343 (__arm_vaddq_m_u8): Remove.
29344 (__arm_vaddq_m_u32): Remove.
29345 (__arm_vaddq_m_u16): Remove.
29346 (__arm_vaddq_s8): Remove.
29347 (__arm_vaddq_s16): Remove.
29348 (__arm_vaddq_s32): Remove.
29349 (__arm_vaddq_u8): Remove.
29350 (__arm_vaddq_u16): Remove.
29351 (__arm_vaddq_u32): Remove.
29352 (__arm_vaddq_x_s8): Remove.
29353 (__arm_vaddq_x_s16): Remove.
29354 (__arm_vaddq_x_s32): Remove.
29355 (__arm_vaddq_x_n_s8): Remove.
29356 (__arm_vaddq_x_n_s16): Remove.
29357 (__arm_vaddq_x_n_s32): Remove.
29358 (__arm_vaddq_x_u8): Remove.
29359 (__arm_vaddq_x_u16): Remove.
29360 (__arm_vaddq_x_u32): Remove.
29361 (__arm_vaddq_x_n_u8): Remove.
29362 (__arm_vaddq_x_n_u16): Remove.
29363 (__arm_vaddq_x_n_u32): Remove.
29364 (__arm_vaddq_n_f16): Remove.
29365 (__arm_vaddq_n_f32): Remove.
29366 (__arm_vaddq_m_f32): Remove.
29367 (__arm_vaddq_m_f16): Remove.
29368 (__arm_vaddq_m_n_f32): Remove.
29369 (__arm_vaddq_m_n_f16): Remove.
29370 (__arm_vaddq_f16): Remove.
29371 (__arm_vaddq_f32): Remove.
29372 (__arm_vaddq_x_f16): Remove.
29373 (__arm_vaddq_x_f32): Remove.
29374 (__arm_vaddq_x_n_f16): Remove.
29375 (__arm_vaddq_x_n_f32): Remove.
29376 (__arm_vaddq): Remove.
29377 (__arm_vaddq_m): Remove.
29378 (__arm_vaddq_x): Remove.
29382 (vmulq_u8): Remove.
29383 (vmulq_n_u8): Remove.
29384 (vmulq_s8): Remove.
29385 (vmulq_n_s8): Remove.
29386 (vmulq_u16): Remove.
29387 (vmulq_n_u16): Remove.
29388 (vmulq_s16): Remove.
29389 (vmulq_n_s16): Remove.
29390 (vmulq_u32): Remove.
29391 (vmulq_n_u32): Remove.
29392 (vmulq_s32): Remove.
29393 (vmulq_n_s32): Remove.
29394 (vmulq_n_f16): Remove.
29395 (vmulq_f16): Remove.
29396 (vmulq_n_f32): Remove.
29397 (vmulq_f32): Remove.
29398 (vmulq_m_n_s8): Remove.
29399 (vmulq_m_n_s32): Remove.
29400 (vmulq_m_n_s16): Remove.
29401 (vmulq_m_n_u8): Remove.
29402 (vmulq_m_n_u32): Remove.
29403 (vmulq_m_n_u16): Remove.
29404 (vmulq_m_s8): Remove.
29405 (vmulq_m_s32): Remove.
29406 (vmulq_m_s16): Remove.
29407 (vmulq_m_u8): Remove.
29408 (vmulq_m_u32): Remove.
29409 (vmulq_m_u16): Remove.
29410 (vmulq_m_f32): Remove.
29411 (vmulq_m_f16): Remove.
29412 (vmulq_m_n_f32): Remove.
29413 (vmulq_m_n_f16): Remove.
29414 (vmulq_x_s8): Remove.
29415 (vmulq_x_s16): Remove.
29416 (vmulq_x_s32): Remove.
29417 (vmulq_x_n_s8): Remove.
29418 (vmulq_x_n_s16): Remove.
29419 (vmulq_x_n_s32): Remove.
29420 (vmulq_x_u8): Remove.
29421 (vmulq_x_u16): Remove.
29422 (vmulq_x_u32): Remove.
29423 (vmulq_x_n_u8): Remove.
29424 (vmulq_x_n_u16): Remove.
29425 (vmulq_x_n_u32): Remove.
29426 (vmulq_x_f16): Remove.
29427 (vmulq_x_f32): Remove.
29428 (vmulq_x_n_f16): Remove.
29429 (vmulq_x_n_f32): Remove.
29430 (__arm_vmulq_u8): Remove.
29431 (__arm_vmulq_n_u8): Remove.
29432 (__arm_vmulq_s8): Remove.
29433 (__arm_vmulq_n_s8): Remove.
29434 (__arm_vmulq_u16): Remove.
29435 (__arm_vmulq_n_u16): Remove.
29436 (__arm_vmulq_s16): Remove.
29437 (__arm_vmulq_n_s16): Remove.
29438 (__arm_vmulq_u32): Remove.
29439 (__arm_vmulq_n_u32): Remove.
29440 (__arm_vmulq_s32): Remove.
29441 (__arm_vmulq_n_s32): Remove.
29442 (__arm_vmulq_m_n_s8): Remove.
29443 (__arm_vmulq_m_n_s32): Remove.
29444 (__arm_vmulq_m_n_s16): Remove.
29445 (__arm_vmulq_m_n_u8): Remove.
29446 (__arm_vmulq_m_n_u32): Remove.
29447 (__arm_vmulq_m_n_u16): Remove.
29448 (__arm_vmulq_m_s8): Remove.
29449 (__arm_vmulq_m_s32): Remove.
29450 (__arm_vmulq_m_s16): Remove.
29451 (__arm_vmulq_m_u8): Remove.
29452 (__arm_vmulq_m_u32): Remove.
29453 (__arm_vmulq_m_u16): Remove.
29454 (__arm_vmulq_x_s8): Remove.
29455 (__arm_vmulq_x_s16): Remove.
29456 (__arm_vmulq_x_s32): Remove.
29457 (__arm_vmulq_x_n_s8): Remove.
29458 (__arm_vmulq_x_n_s16): Remove.
29459 (__arm_vmulq_x_n_s32): Remove.
29460 (__arm_vmulq_x_u8): Remove.
29461 (__arm_vmulq_x_u16): Remove.
29462 (__arm_vmulq_x_u32): Remove.
29463 (__arm_vmulq_x_n_u8): Remove.
29464 (__arm_vmulq_x_n_u16): Remove.
29465 (__arm_vmulq_x_n_u32): Remove.
29466 (__arm_vmulq_n_f16): Remove.
29467 (__arm_vmulq_f16): Remove.
29468 (__arm_vmulq_n_f32): Remove.
29469 (__arm_vmulq_f32): Remove.
29470 (__arm_vmulq_m_f32): Remove.
29471 (__arm_vmulq_m_f16): Remove.
29472 (__arm_vmulq_m_n_f32): Remove.
29473 (__arm_vmulq_m_n_f16): Remove.
29474 (__arm_vmulq_x_f16): Remove.
29475 (__arm_vmulq_x_f32): Remove.
29476 (__arm_vmulq_x_n_f16): Remove.
29477 (__arm_vmulq_x_n_f32): Remove.
29478 (__arm_vmulq): Remove.
29479 (__arm_vmulq_m): Remove.
29480 (__arm_vmulq_x): Remove.
29484 (vsubq_n_f16): Remove.
29485 (vsubq_n_f32): Remove.
29486 (vsubq_u8): Remove.
29487 (vsubq_n_u8): Remove.
29488 (vsubq_s8): Remove.
29489 (vsubq_n_s8): Remove.
29490 (vsubq_u16): Remove.
29491 (vsubq_n_u16): Remove.
29492 (vsubq_s16): Remove.
29493 (vsubq_n_s16): Remove.
29494 (vsubq_u32): Remove.
29495 (vsubq_n_u32): Remove.
29496 (vsubq_s32): Remove.
29497 (vsubq_n_s32): Remove.
29498 (vsubq_f16): Remove.
29499 (vsubq_f32): Remove.
29500 (vsubq_m_s8): Remove.
29501 (vsubq_m_u8): Remove.
29502 (vsubq_m_s16): Remove.
29503 (vsubq_m_u16): Remove.
29504 (vsubq_m_s32): Remove.
29505 (vsubq_m_u32): Remove.
29506 (vsubq_m_n_s8): Remove.
29507 (vsubq_m_n_s32): Remove.
29508 (vsubq_m_n_s16): Remove.
29509 (vsubq_m_n_u8): Remove.
29510 (vsubq_m_n_u32): Remove.
29511 (vsubq_m_n_u16): Remove.
29512 (vsubq_m_f32): Remove.
29513 (vsubq_m_f16): Remove.
29514 (vsubq_m_n_f32): Remove.
29515 (vsubq_m_n_f16): Remove.
29516 (vsubq_x_s8): Remove.
29517 (vsubq_x_s16): Remove.
29518 (vsubq_x_s32): Remove.
29519 (vsubq_x_n_s8): Remove.
29520 (vsubq_x_n_s16): Remove.
29521 (vsubq_x_n_s32): Remove.
29522 (vsubq_x_u8): Remove.
29523 (vsubq_x_u16): Remove.
29524 (vsubq_x_u32): Remove.
29525 (vsubq_x_n_u8): Remove.
29526 (vsubq_x_n_u16): Remove.
29527 (vsubq_x_n_u32): Remove.
29528 (vsubq_x_f16): Remove.
29529 (vsubq_x_f32): Remove.
29530 (vsubq_x_n_f16): Remove.
29531 (vsubq_x_n_f32): Remove.
29532 (__arm_vsubq_u8): Remove.
29533 (__arm_vsubq_n_u8): Remove.
29534 (__arm_vsubq_s8): Remove.
29535 (__arm_vsubq_n_s8): Remove.
29536 (__arm_vsubq_u16): Remove.
29537 (__arm_vsubq_n_u16): Remove.
29538 (__arm_vsubq_s16): Remove.
29539 (__arm_vsubq_n_s16): Remove.
29540 (__arm_vsubq_u32): Remove.
29541 (__arm_vsubq_n_u32): Remove.
29542 (__arm_vsubq_s32): Remove.
29543 (__arm_vsubq_n_s32): Remove.
29544 (__arm_vsubq_m_s8): Remove.
29545 (__arm_vsubq_m_u8): Remove.
29546 (__arm_vsubq_m_s16): Remove.
29547 (__arm_vsubq_m_u16): Remove.
29548 (__arm_vsubq_m_s32): Remove.
29549 (__arm_vsubq_m_u32): Remove.
29550 (__arm_vsubq_m_n_s8): Remove.
29551 (__arm_vsubq_m_n_s32): Remove.
29552 (__arm_vsubq_m_n_s16): Remove.
29553 (__arm_vsubq_m_n_u8): Remove.
29554 (__arm_vsubq_m_n_u32): Remove.
29555 (__arm_vsubq_m_n_u16): Remove.
29556 (__arm_vsubq_x_s8): Remove.
29557 (__arm_vsubq_x_s16): Remove.
29558 (__arm_vsubq_x_s32): Remove.
29559 (__arm_vsubq_x_n_s8): Remove.
29560 (__arm_vsubq_x_n_s16): Remove.
29561 (__arm_vsubq_x_n_s32): Remove.
29562 (__arm_vsubq_x_u8): Remove.
29563 (__arm_vsubq_x_u16): Remove.
29564 (__arm_vsubq_x_u32): Remove.
29565 (__arm_vsubq_x_n_u8): Remove.
29566 (__arm_vsubq_x_n_u16): Remove.
29567 (__arm_vsubq_x_n_u32): Remove.
29568 (__arm_vsubq_n_f16): Remove.
29569 (__arm_vsubq_n_f32): Remove.
29570 (__arm_vsubq_f16): Remove.
29571 (__arm_vsubq_f32): Remove.
29572 (__arm_vsubq_m_f32): Remove.
29573 (__arm_vsubq_m_f16): Remove.
29574 (__arm_vsubq_m_n_f32): Remove.
29575 (__arm_vsubq_m_n_f16): Remove.
29576 (__arm_vsubq_x_f16): Remove.
29577 (__arm_vsubq_x_f32): Remove.
29578 (__arm_vsubq_x_n_f16): Remove.
29579 (__arm_vsubq_x_n_f32): Remove.
29580 (__arm_vsubq): Remove.
29581 (__arm_vsubq_m): Remove.
29582 (__arm_vsubq_x): Remove.
29583 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
29585 (vmulq_u, vmulq_s, vmulq_f): Remove.
29586 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
29587 (mve_vmulq_<supf><mode>): Remove.
29589 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29591 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
29592 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
29593 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
29595 * config/arm/mve.md
29596 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
29598 (@mve_<mve_insn>q_n_f<mode>): ... this.
29599 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
29600 (mve_vsubq_n_<supf><mode>): Factorize into ...
29601 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29602 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
29604 (mve_<mve_addsubmul>q<mode>): ... this.
29605 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
29607 (mve_<mve_addsubmul>q_f<mode>): ... this.
29608 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
29609 (mve_vsubq_m_<supf><mode>): Factorize into ...
29610 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
29611 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
29612 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
29613 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29614 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
29616 (@mve_<mve_insn>q_m_f<mode>): ... this.
29617 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
29618 (mve_vsubq_m_n_f<mode>): Factorize into ...
29619 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
29621 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29623 * config/arm/arm-mve-builtins-functions.h (class
29624 unspec_based_mve_function_base): New.
29625 (class unspec_based_mve_function_exact_insn): New.
29627 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29629 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
29630 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
29632 2023-05-03 Murray Steele <murray.steele@arm.com>
29633 Christophe Lyon <christophe.lyon@arm.com>
29635 * config/arm/arm-mve-builtins-base.cc (class
29636 vuninitializedq_impl): New.
29637 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
29638 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
29640 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
29641 * config/arm/arm-mve-builtins-shapes.h (inherent): New
29643 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
29644 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
29645 (__arm_vuninitializedq_u8): Remove.
29646 (__arm_vuninitializedq_u16): Remove.
29647 (__arm_vuninitializedq_u32): Remove.
29648 (__arm_vuninitializedq_u64): Remove.
29649 (__arm_vuninitializedq_s8): Remove.
29650 (__arm_vuninitializedq_s16): Remove.
29651 (__arm_vuninitializedq_s32): Remove.
29652 (__arm_vuninitializedq_s64): Remove.
29653 (__arm_vuninitializedq_f16): Remove.
29654 (__arm_vuninitializedq_f32): Remove.
29656 2023-05-03 Murray Steele <murray.steele@arm.com>
29657 Christophe Lyon <christophe.lyon@arm.com>
29659 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
29660 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
29661 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
29662 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
29663 (parse_type): Likewise.
29664 (parse_signature): Likewise.
29665 (build_one): Likewise.
29666 (build_all): Likewise.
29667 (overloaded_base): New struct.
29668 (unary_convert_def): Likewise.
29669 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
29670 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
29672 (TYPES_reinterpret_unsigned1): Likewise.
29673 (TYPES_reinterpret_integer): Likewise.
29674 (TYPES_reinterpret_integer1): Likewise.
29675 (TYPES_reinterpret_float1): Likewise.
29676 (TYPES_reinterpret_float): Likewise.
29677 (reinterpret_integer): New.
29678 (reinterpret_float): New.
29679 (handle_arm_mve_h): Register builtins.
29680 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
29681 (vreinterpretq_s32): Likewise.
29682 (vreinterpretq_s64): Likewise.
29683 (vreinterpretq_s8): Likewise.
29684 (vreinterpretq_u16): Likewise.
29685 (vreinterpretq_u32): Likewise.
29686 (vreinterpretq_u64): Likewise.
29687 (vreinterpretq_u8): Likewise.
29688 (vreinterpretq_f16): Likewise.
29689 (vreinterpretq_f32): Likewise.
29690 (vreinterpretq_s16_s32): Likewise.
29691 (vreinterpretq_s16_s64): Likewise.
29692 (vreinterpretq_s16_s8): Likewise.
29693 (vreinterpretq_s16_u16): Likewise.
29694 (vreinterpretq_s16_u32): Likewise.
29695 (vreinterpretq_s16_u64): Likewise.
29696 (vreinterpretq_s16_u8): Likewise.
29697 (vreinterpretq_s32_s16): Likewise.
29698 (vreinterpretq_s32_s64): Likewise.
29699 (vreinterpretq_s32_s8): Likewise.
29700 (vreinterpretq_s32_u16): Likewise.
29701 (vreinterpretq_s32_u32): Likewise.
29702 (vreinterpretq_s32_u64): Likewise.
29703 (vreinterpretq_s32_u8): Likewise.
29704 (vreinterpretq_s64_s16): Likewise.
29705 (vreinterpretq_s64_s32): Likewise.
29706 (vreinterpretq_s64_s8): Likewise.
29707 (vreinterpretq_s64_u16): Likewise.
29708 (vreinterpretq_s64_u32): Likewise.
29709 (vreinterpretq_s64_u64): Likewise.
29710 (vreinterpretq_s64_u8): Likewise.
29711 (vreinterpretq_s8_s16): Likewise.
29712 (vreinterpretq_s8_s32): Likewise.
29713 (vreinterpretq_s8_s64): Likewise.
29714 (vreinterpretq_s8_u16): Likewise.
29715 (vreinterpretq_s8_u32): Likewise.
29716 (vreinterpretq_s8_u64): Likewise.
29717 (vreinterpretq_s8_u8): Likewise.
29718 (vreinterpretq_u16_s16): Likewise.
29719 (vreinterpretq_u16_s32): Likewise.
29720 (vreinterpretq_u16_s64): Likewise.
29721 (vreinterpretq_u16_s8): Likewise.
29722 (vreinterpretq_u16_u32): Likewise.
29723 (vreinterpretq_u16_u64): Likewise.
29724 (vreinterpretq_u16_u8): Likewise.
29725 (vreinterpretq_u32_s16): Likewise.
29726 (vreinterpretq_u32_s32): Likewise.
29727 (vreinterpretq_u32_s64): Likewise.
29728 (vreinterpretq_u32_s8): Likewise.
29729 (vreinterpretq_u32_u16): Likewise.
29730 (vreinterpretq_u32_u64): Likewise.
29731 (vreinterpretq_u32_u8): Likewise.
29732 (vreinterpretq_u64_s16): Likewise.
29733 (vreinterpretq_u64_s32): Likewise.
29734 (vreinterpretq_u64_s64): Likewise.
29735 (vreinterpretq_u64_s8): Likewise.
29736 (vreinterpretq_u64_u16): Likewise.
29737 (vreinterpretq_u64_u32): Likewise.
29738 (vreinterpretq_u64_u8): Likewise.
29739 (vreinterpretq_u8_s16): Likewise.
29740 (vreinterpretq_u8_s32): Likewise.
29741 (vreinterpretq_u8_s64): Likewise.
29742 (vreinterpretq_u8_s8): Likewise.
29743 (vreinterpretq_u8_u16): Likewise.
29744 (vreinterpretq_u8_u32): Likewise.
29745 (vreinterpretq_u8_u64): Likewise.
29746 (vreinterpretq_s32_f16): Likewise.
29747 (vreinterpretq_s32_f32): Likewise.
29748 (vreinterpretq_u16_f16): Likewise.
29749 (vreinterpretq_u16_f32): Likewise.
29750 (vreinterpretq_u32_f16): Likewise.
29751 (vreinterpretq_u32_f32): Likewise.
29752 (vreinterpretq_u64_f16): Likewise.
29753 (vreinterpretq_u64_f32): Likewise.
29754 (vreinterpretq_u8_f16): Likewise.
29755 (vreinterpretq_u8_f32): Likewise.
29756 (vreinterpretq_f16_f32): Likewise.
29757 (vreinterpretq_f16_s16): Likewise.
29758 (vreinterpretq_f16_s32): Likewise.
29759 (vreinterpretq_f16_s64): Likewise.
29760 (vreinterpretq_f16_s8): Likewise.
29761 (vreinterpretq_f16_u16): Likewise.
29762 (vreinterpretq_f16_u32): Likewise.
29763 (vreinterpretq_f16_u64): Likewise.
29764 (vreinterpretq_f16_u8): Likewise.
29765 (vreinterpretq_f32_f16): Likewise.
29766 (vreinterpretq_f32_s16): Likewise.
29767 (vreinterpretq_f32_s32): Likewise.
29768 (vreinterpretq_f32_s64): Likewise.
29769 (vreinterpretq_f32_s8): Likewise.
29770 (vreinterpretq_f32_u16): Likewise.
29771 (vreinterpretq_f32_u32): Likewise.
29772 (vreinterpretq_f32_u64): Likewise.
29773 (vreinterpretq_f32_u8): Likewise.
29774 (vreinterpretq_s16_f16): Likewise.
29775 (vreinterpretq_s16_f32): Likewise.
29776 (vreinterpretq_s64_f16): Likewise.
29777 (vreinterpretq_s64_f32): Likewise.
29778 (vreinterpretq_s8_f16): Likewise.
29779 (vreinterpretq_s8_f32): Likewise.
29780 (__arm_vreinterpretq_f16): Likewise.
29781 (__arm_vreinterpretq_f32): Likewise.
29782 (__arm_vreinterpretq_s16): Likewise.
29783 (__arm_vreinterpretq_s32): Likewise.
29784 (__arm_vreinterpretq_s64): Likewise.
29785 (__arm_vreinterpretq_s8): Likewise.
29786 (__arm_vreinterpretq_u16): Likewise.
29787 (__arm_vreinterpretq_u32): Likewise.
29788 (__arm_vreinterpretq_u64): Likewise.
29789 (__arm_vreinterpretq_u8): Likewise.
29790 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
29791 (__arm_vreinterpretq_s16_s64): Likewise.
29792 (__arm_vreinterpretq_s16_s8): Likewise.
29793 (__arm_vreinterpretq_s16_u16): Likewise.
29794 (__arm_vreinterpretq_s16_u32): Likewise.
29795 (__arm_vreinterpretq_s16_u64): Likewise.
29796 (__arm_vreinterpretq_s16_u8): Likewise.
29797 (__arm_vreinterpretq_s32_s16): Likewise.
29798 (__arm_vreinterpretq_s32_s64): Likewise.
29799 (__arm_vreinterpretq_s32_s8): Likewise.
29800 (__arm_vreinterpretq_s32_u16): Likewise.
29801 (__arm_vreinterpretq_s32_u32): Likewise.
29802 (__arm_vreinterpretq_s32_u64): Likewise.
29803 (__arm_vreinterpretq_s32_u8): Likewise.
29804 (__arm_vreinterpretq_s64_s16): Likewise.
29805 (__arm_vreinterpretq_s64_s32): Likewise.
29806 (__arm_vreinterpretq_s64_s8): Likewise.
29807 (__arm_vreinterpretq_s64_u16): Likewise.
29808 (__arm_vreinterpretq_s64_u32): Likewise.
29809 (__arm_vreinterpretq_s64_u64): Likewise.
29810 (__arm_vreinterpretq_s64_u8): Likewise.
29811 (__arm_vreinterpretq_s8_s16): Likewise.
29812 (__arm_vreinterpretq_s8_s32): Likewise.
29813 (__arm_vreinterpretq_s8_s64): Likewise.
29814 (__arm_vreinterpretq_s8_u16): Likewise.
29815 (__arm_vreinterpretq_s8_u32): Likewise.
29816 (__arm_vreinterpretq_s8_u64): Likewise.
29817 (__arm_vreinterpretq_s8_u8): Likewise.
29818 (__arm_vreinterpretq_u16_s16): Likewise.
29819 (__arm_vreinterpretq_u16_s32): Likewise.
29820 (__arm_vreinterpretq_u16_s64): Likewise.
29821 (__arm_vreinterpretq_u16_s8): Likewise.
29822 (__arm_vreinterpretq_u16_u32): Likewise.
29823 (__arm_vreinterpretq_u16_u64): Likewise.
29824 (__arm_vreinterpretq_u16_u8): Likewise.
29825 (__arm_vreinterpretq_u32_s16): Likewise.
29826 (__arm_vreinterpretq_u32_s32): Likewise.
29827 (__arm_vreinterpretq_u32_s64): Likewise.
29828 (__arm_vreinterpretq_u32_s8): Likewise.
29829 (__arm_vreinterpretq_u32_u16): Likewise.
29830 (__arm_vreinterpretq_u32_u64): Likewise.
29831 (__arm_vreinterpretq_u32_u8): Likewise.
29832 (__arm_vreinterpretq_u64_s16): Likewise.
29833 (__arm_vreinterpretq_u64_s32): Likewise.
29834 (__arm_vreinterpretq_u64_s64): Likewise.
29835 (__arm_vreinterpretq_u64_s8): Likewise.
29836 (__arm_vreinterpretq_u64_u16): Likewise.
29837 (__arm_vreinterpretq_u64_u32): Likewise.
29838 (__arm_vreinterpretq_u64_u8): Likewise.
29839 (__arm_vreinterpretq_u8_s16): Likewise.
29840 (__arm_vreinterpretq_u8_s32): Likewise.
29841 (__arm_vreinterpretq_u8_s64): Likewise.
29842 (__arm_vreinterpretq_u8_s8): Likewise.
29843 (__arm_vreinterpretq_u8_u16): Likewise.
29844 (__arm_vreinterpretq_u8_u32): Likewise.
29845 (__arm_vreinterpretq_u8_u64): Likewise.
29846 (__arm_vreinterpretq_s32_f16): Likewise.
29847 (__arm_vreinterpretq_s32_f32): Likewise.
29848 (__arm_vreinterpretq_s16_f16): Likewise.
29849 (__arm_vreinterpretq_s16_f32): Likewise.
29850 (__arm_vreinterpretq_s64_f16): Likewise.
29851 (__arm_vreinterpretq_s64_f32): Likewise.
29852 (__arm_vreinterpretq_s8_f16): Likewise.
29853 (__arm_vreinterpretq_s8_f32): Likewise.
29854 (__arm_vreinterpretq_u16_f16): Likewise.
29855 (__arm_vreinterpretq_u16_f32): Likewise.
29856 (__arm_vreinterpretq_u32_f16): Likewise.
29857 (__arm_vreinterpretq_u32_f32): Likewise.
29858 (__arm_vreinterpretq_u64_f16): Likewise.
29859 (__arm_vreinterpretq_u64_f32): Likewise.
29860 (__arm_vreinterpretq_u8_f16): Likewise.
29861 (__arm_vreinterpretq_u8_f32): Likewise.
29862 (__arm_vreinterpretq_f16_f32): Likewise.
29863 (__arm_vreinterpretq_f16_s16): Likewise.
29864 (__arm_vreinterpretq_f16_s32): Likewise.
29865 (__arm_vreinterpretq_f16_s64): Likewise.
29866 (__arm_vreinterpretq_f16_s8): Likewise.
29867 (__arm_vreinterpretq_f16_u16): Likewise.
29868 (__arm_vreinterpretq_f16_u32): Likewise.
29869 (__arm_vreinterpretq_f16_u64): Likewise.
29870 (__arm_vreinterpretq_f16_u8): Likewise.
29871 (__arm_vreinterpretq_f32_f16): Likewise.
29872 (__arm_vreinterpretq_f32_s16): Likewise.
29873 (__arm_vreinterpretq_f32_s32): Likewise.
29874 (__arm_vreinterpretq_f32_s64): Likewise.
29875 (__arm_vreinterpretq_f32_s8): Likewise.
29876 (__arm_vreinterpretq_f32_u16): Likewise.
29877 (__arm_vreinterpretq_f32_u32): Likewise.
29878 (__arm_vreinterpretq_f32_u64): Likewise.
29879 (__arm_vreinterpretq_f32_u8): Likewise.
29880 (__arm_vreinterpretq_s16): Likewise.
29881 (__arm_vreinterpretq_s32): Likewise.
29882 (__arm_vreinterpretq_s64): Likewise.
29883 (__arm_vreinterpretq_s8): Likewise.
29884 (__arm_vreinterpretq_u16): Likewise.
29885 (__arm_vreinterpretq_u32): Likewise.
29886 (__arm_vreinterpretq_u64): Likewise.
29887 (__arm_vreinterpretq_u8): Likewise.
29888 (__arm_vreinterpretq_f16): Likewise.
29889 (__arm_vreinterpretq_f32): Likewise.
29890 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
29891 * config/arm/unspecs.md: (REINTERPRET): New unspec.
29893 2023-05-03 Murray Steele <murray.steele@arm.com>
29894 Christophe Lyon <christophe.lyon@arm.com>
29895 Christophe Lyon <christophe.lyon@arm.com
29897 * config.gcc: Add arm-mve-builtins-base.o and
29898 arm-mve-builtins-shapes.o to extra_objs.
29899 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
29901 (arm_expand_builtin): Likewise
29902 (arm_check_builtin_call): Likewise
29903 (arm_describe_resolver): Likewise.
29904 * config/arm/arm-builtins.h (enum resolver_ident): Add
29906 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
29907 (arm_resolve_overloaded_builtin): Handle MVE builtins.
29908 (arm_register_target_pragmas): Register arm_check_builtin_call.
29909 * config/arm/arm-mve-builtins.cc (class registered_function): New
29911 (struct registered_function_hasher): New struct.
29912 (pred_suffixes): New table.
29913 (mode_suffixes): New table.
29914 (type_suffix_info): New table.
29915 (TYPES_float16): New.
29916 (TYPES_all_float): New.
29917 (TYPES_integer_8): New.
29918 (TYPES_integer_8_16): New.
29919 (TYPES_integer_16_32): New.
29920 (TYPES_integer_32): New.
29921 (TYPES_signed_16_32): New.
29922 (TYPES_signed_32): New.
29923 (TYPES_all_signed): New.
29924 (TYPES_all_unsigned): New.
29925 (TYPES_all_integer): New.
29926 (TYPES_all_integer_with_64): New.
29927 (DEF_VECTOR_TYPE): New.
29928 (DEF_DOUBLE_TYPE): New.
29929 (DEF_MVE_TYPES_ARRAY): New.
29930 (all_integer): New.
29931 (all_integer_with_64): New.
29935 (all_unsigned): New.
29937 (integer_8_16): New.
29938 (integer_16_32): New.
29940 (signed_16_32): New.
29942 (register_vector_type): Use void_type_node for mve.fp-only types when
29943 mve.fp is not enabled.
29944 (register_builtin_tuple_types): Likewise.
29945 (handle_arm_mve_h): New function..
29946 (matches_type_p): Likewise..
29947 (report_out_of_range): Likewise.
29948 (report_not_enum): Likewise.
29949 (report_missing_float): Likewise.
29950 (report_non_ice): Likewise.
29951 (check_requires_float): Likewise.
29952 (function_instance::hash): Likewise
29953 (function_instance::call_properties): Likewise.
29954 (function_instance::reads_global_state_p): Likewise.
29955 (function_instance::modifies_global_state_p): Likewise.
29956 (function_instance::could_trap_p): Likewise.
29957 (function_instance::has_inactive_argument): Likewise.
29958 (registered_function_hasher::hash): Likewise.
29959 (registered_function_hasher::equal): Likewise.
29960 (function_builder::function_builder): Likewise.
29961 (function_builder::~function_builder): Likewise.
29962 (function_builder::append_name): Likewise.
29963 (function_builder::finish_name): Likewise.
29964 (function_builder::get_name): Likewise.
29965 (add_attribute): Likewise.
29966 (function_builder::get_attributes): Likewise.
29967 (function_builder::add_function): Likewise.
29968 (function_builder::add_unique_function): Likewise.
29969 (function_builder::add_overloaded_function): Likewise.
29970 (function_builder::add_overloaded_functions): Likewise.
29971 (function_builder::register_function_group): Likewise.
29972 (function_call_info::function_call_info): Likewise.
29973 (function_resolver::function_resolver): Likewise.
29974 (function_resolver::get_vector_type): Likewise.
29975 (function_resolver::get_scalar_type_name): Likewise.
29976 (function_resolver::get_argument_type): Likewise.
29977 (function_resolver::scalar_argument_p): Likewise.
29978 (function_resolver::report_no_such_form): Likewise.
29979 (function_resolver::lookup_form): Likewise.
29980 (function_resolver::resolve_to): Likewise.
29981 (function_resolver::infer_vector_or_tuple_type): Likewise.
29982 (function_resolver::infer_vector_type): Likewise.
29983 (function_resolver::require_vector_or_scalar_type): Likewise.
29984 (function_resolver::require_vector_type): Likewise.
29985 (function_resolver::require_matching_vector_type): Likewise.
29986 (function_resolver::require_derived_vector_type): Likewise.
29987 (function_resolver::require_derived_scalar_type): Likewise.
29988 (function_resolver::require_integer_immediate): Likewise.
29989 (function_resolver::require_scalar_type): Likewise.
29990 (function_resolver::check_num_arguments): Likewise.
29991 (function_resolver::check_gp_argument): Likewise.
29992 (function_resolver::finish_opt_n_resolution): Likewise.
29993 (function_resolver::resolve_unary): Likewise.
29994 (function_resolver::resolve_unary_n): Likewise.
29995 (function_resolver::resolve_uniform): Likewise.
29996 (function_resolver::resolve_uniform_opt_n): Likewise.
29997 (function_resolver::resolve): Likewise.
29998 (function_checker::function_checker): Likewise.
29999 (function_checker::argument_exists_p): Likewise.
30000 (function_checker::require_immediate): Likewise.
30001 (function_checker::require_immediate_enum): Likewise.
30002 (function_checker::require_immediate_range): Likewise.
30003 (function_checker::check): Likewise.
30004 (gimple_folder::gimple_folder): Likewise.
30005 (gimple_folder::fold): Likewise.
30006 (function_expander::function_expander): Likewise.
30007 (function_expander::direct_optab_handler): Likewise.
30008 (function_expander::get_fallback_value): Likewise.
30009 (function_expander::get_reg_target): Likewise.
30010 (function_expander::add_output_operand): Likewise.
30011 (function_expander::add_input_operand): Likewise.
30012 (function_expander::add_integer_operand): Likewise.
30013 (function_expander::generate_insn): Likewise.
30014 (function_expander::use_exact_insn): Likewise.
30015 (function_expander::use_unpred_insn): Likewise.
30016 (function_expander::use_pred_x_insn): Likewise.
30017 (function_expander::use_cond_insn): Likewise.
30018 (function_expander::map_to_rtx_codes): Likewise.
30019 (function_expander::expand): Likewise.
30020 (resolve_overloaded_builtin): Likewise.
30021 (check_builtin_call): Likewise.
30022 (gimple_fold_builtin): Likewise.
30023 (expand_builtin): Likewise.
30024 (gt_ggc_mx): Likewise.
30025 (gt_pch_nx): Likewise.
30026 (gt_pch_nx): Likewise.
30027 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
30038 (offset): New mode.
30039 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
30040 (CP_READ_FPCR): Likewise.
30041 (CP_RAISE_FP_EXCEPTIONS): Likewise.
30042 (CP_READ_MEMORY): Likewise.
30043 (CP_WRITE_MEMORY): Likewise.
30044 (enum units_index): New enum.
30045 (enum predication_index): New.
30046 (enum type_class_index): New.
30047 (enum mode_suffix_index): New enum.
30048 (enum type_suffix_index): New.
30049 (struct mode_suffix_info): New struct.
30050 (struct type_suffix_info): New.
30051 (struct function_group_info): Likewise.
30052 (class function_instance): Likewise.
30053 (class registered_function): Likewise.
30054 (class function_builder): Likewise.
30055 (class function_call_info): Likewise.
30056 (class function_resolver): Likewise.
30057 (class function_checker): Likewise.
30058 (class gimple_folder): Likewise.
30059 (class function_expander): Likewise.
30060 (get_mve_pred16_t): Likewise.
30061 (find_mode_suffix): New function.
30062 (class function_base): Likewise.
30063 (class function_shape): Likewise.
30064 (function_instance::operator==): New function.
30065 (function_instance::operator!=): Likewise.
30066 (function_instance::vectors_per_tuple): Likewise.
30067 (function_instance::mode_suffix): Likewise.
30068 (function_instance::type_suffix): Likewise.
30069 (function_instance::scalar_type): Likewise.
30070 (function_instance::vector_type): Likewise.
30071 (function_instance::tuple_type): Likewise.
30072 (function_instance::vector_mode): Likewise.
30073 (function_call_info::function_returns_void_p): Likewise.
30074 (function_base::call_properties): Likewise.
30075 * config/arm/arm-protos.h (enum arm_builtin_class): Add
30077 (handle_arm_mve_h): New.
30078 (resolve_overloaded_builtin): New.
30079 (check_builtin_call): New.
30080 (gimple_fold_builtin): New.
30081 (expand_builtin): New.
30082 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
30083 arm_gimple_fold_builtin.
30084 (arm_gimple_fold_builtin): New function.
30085 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
30086 * config/arm/predicates.md (arm_any_register_operand): New predicate.
30087 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
30088 (arm-mve-builtins-shapes.o): New target.
30089 (arm-mve-builtins-base.o): New target.
30090 * config/arm/arm-mve-builtins-base.cc: New file.
30091 * config/arm/arm-mve-builtins-base.def: New file.
30092 * config/arm/arm-mve-builtins-base.h: New file.
30093 * config/arm/arm-mve-builtins-functions.h: New file.
30094 * config/arm/arm-mve-builtins-shapes.cc: New file.
30095 * config/arm/arm-mve-builtins-shapes.h: New file.
30097 2023-05-03 Murray Steele <murray.steele@arm.com>
30098 Christophe Lyon <christophe.lyon@arm.com>
30099 Christophe Lyon <christophe.lyon@arm.com>
30101 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
30103 (arm_init_builtin): Use arm_general_add_builtin_function instead
30104 of arm_add_builtin_function.
30105 (arm_init_acle_builtins): Likewise.
30106 (arm_init_mve_builtins): Likewise.
30107 (arm_init_crypto_builtins): Likewise.
30108 (arm_init_builtins): Likewise.
30109 (arm_general_builtin_decl): New function.
30110 (arm_builtin_decl): Defer to numberspace-specialized functions.
30111 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
30112 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
30113 (arm_general_expand_builtin_1): ... specialize for general builtins.
30114 (arm_expand_acle_builtin): Use arm_general_expand_builtin
30115 instead of arm_expand_builtin.
30116 (arm_expand_mve_builtin): Likewise.
30117 (arm_expand_neon_builtin): Likewise.
30118 (arm_expand_vfp_builtin): Likewise.
30119 (arm_general_expand_builtin): New function.
30120 (arm_expand_builtin): Specialize for general builtins.
30121 (arm_general_check_builtin_call): New function.
30122 (arm_check_builtin_call): Specialize for general builtins.
30123 (arm_describe_resolver): Validate numberspace.
30124 (arm_cde_end_args): Likewise.
30125 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
30126 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
30128 2023-05-03 Martin Liska <mliska@suse.cz>
30131 * config/riscv/sync.md: Add gcc_unreachable to a switch.
30133 2023-05-03 Richard Biener <rguenther@suse.de>
30135 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
30136 (patch_loop_exit): Likewise.
30137 (connect_loops): Likewise.
30138 (split_loop): Likewise.
30139 (control_dep_semi_invariant_p): Likewise.
30140 (do_split_loop_on_cond): Likewise.
30141 (split_loop_on_cond): Likewise.
30142 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
30144 (simplify_loop_version): Likewise.
30145 (evaluate_bbs): Likewise.
30146 (find_loop_guard): Likewise.
30147 (clean_up_after_unswitching): Likewise.
30148 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
30150 (optimize_spaceship): Take a gcond * argument, avoid
30152 (math_opts_dom_walker::after_dom_children): Adjust call to
30153 optimize_spaceship.
30154 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
30155 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
30158 2023-05-03 Andreas Schwab <schwab@suse.de>
30160 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
30162 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30164 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
30166 (class vlseg): New class.
30167 (class vsseg): Ditto.
30168 (class vlsseg): Ditto.
30169 (class vssseg): Ditto.
30170 (class seg_indexed_load): Ditto.
30171 (class seg_indexed_store): Ditto.
30172 (class vlsegff): Ditto.
30174 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
30175 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
30185 * config/riscv/riscv-vector-builtins-shapes.cc (struct
30186 seg_loadstore_def): Ditto.
30187 (struct seg_indexed_loadstore_def): Ditto.
30188 (struct seg_fault_load_def): Ditto.
30190 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
30191 * config/riscv/riscv-vector-builtins.cc
30192 (function_builder::append_nf): New function.
30193 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
30194 Change ptr from double into float.
30195 (vfloat32m1x3_t): Ditto.
30196 (vfloat32m1x4_t): Ditto.
30197 (vfloat32m1x5_t): Ditto.
30198 (vfloat32m1x6_t): Ditto.
30199 (vfloat32m1x7_t): Ditto.
30200 (vfloat32m1x8_t): Ditto.
30201 (vfloat32m2x2_t): Ditto.
30202 (vfloat32m2x3_t): Ditto.
30203 (vfloat32m2x4_t): Ditto.
30204 (vfloat32m4x2_t): Ditto.
30205 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
30206 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
30208 * config/riscv/riscv.md: Add segment instructions.
30209 * config/riscv/vector-iterators.md: Support segment intrinsics.
30210 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
30212 (@pred_unit_strided_store<mode>): Ditto.
30213 (@pred_strided_load<mode>): Ditto.
30214 (@pred_strided_store<mode>): Ditto.
30215 (@pred_fault_load<mode>): Ditto.
30216 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
30217 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
30218 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
30219 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
30220 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
30221 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
30222 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
30223 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
30224 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
30225 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
30226 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
30227 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
30228 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
30229 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
30231 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30233 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
30234 tuple type support.
30236 (floattype): Ditto.
30238 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
30239 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
30241 (vget): Add tuple type vget.
30242 * config/riscv/riscv-vector-builtins-types.def
30243 (DEF_RVV_TUPLE_OPS): New macro.
30244 (vint8mf8x2_t): Ditto.
30245 (vuint8mf8x2_t): Ditto.
30246 (vint8mf8x3_t): Ditto.
30247 (vuint8mf8x3_t): Ditto.
30248 (vint8mf8x4_t): Ditto.
30249 (vuint8mf8x4_t): Ditto.
30250 (vint8mf8x5_t): Ditto.
30251 (vuint8mf8x5_t): Ditto.
30252 (vint8mf8x6_t): Ditto.
30253 (vuint8mf8x6_t): Ditto.
30254 (vint8mf8x7_t): Ditto.
30255 (vuint8mf8x7_t): Ditto.
30256 (vint8mf8x8_t): Ditto.
30257 (vuint8mf8x8_t): Ditto.
30258 (vint8mf4x2_t): Ditto.
30259 (vuint8mf4x2_t): Ditto.
30260 (vint8mf4x3_t): Ditto.
30261 (vuint8mf4x3_t): Ditto.
30262 (vint8mf4x4_t): Ditto.
30263 (vuint8mf4x4_t): Ditto.
30264 (vint8mf4x5_t): Ditto.
30265 (vuint8mf4x5_t): Ditto.
30266 (vint8mf4x6_t): Ditto.
30267 (vuint8mf4x6_t): Ditto.
30268 (vint8mf4x7_t): Ditto.
30269 (vuint8mf4x7_t): Ditto.
30270 (vint8mf4x8_t): Ditto.
30271 (vuint8mf4x8_t): Ditto.
30272 (vint8mf2x2_t): Ditto.
30273 (vuint8mf2x2_t): Ditto.
30274 (vint8mf2x3_t): Ditto.
30275 (vuint8mf2x3_t): Ditto.
30276 (vint8mf2x4_t): Ditto.
30277 (vuint8mf2x4_t): Ditto.
30278 (vint8mf2x5_t): Ditto.
30279 (vuint8mf2x5_t): Ditto.
30280 (vint8mf2x6_t): Ditto.
30281 (vuint8mf2x6_t): Ditto.
30282 (vint8mf2x7_t): Ditto.
30283 (vuint8mf2x7_t): Ditto.
30284 (vint8mf2x8_t): Ditto.
30285 (vuint8mf2x8_t): Ditto.
30286 (vint8m1x2_t): Ditto.
30287 (vuint8m1x2_t): Ditto.
30288 (vint8m1x3_t): Ditto.
30289 (vuint8m1x3_t): Ditto.
30290 (vint8m1x4_t): Ditto.
30291 (vuint8m1x4_t): Ditto.
30292 (vint8m1x5_t): Ditto.
30293 (vuint8m1x5_t): Ditto.
30294 (vint8m1x6_t): Ditto.
30295 (vuint8m1x6_t): Ditto.
30296 (vint8m1x7_t): Ditto.
30297 (vuint8m1x7_t): Ditto.
30298 (vint8m1x8_t): Ditto.
30299 (vuint8m1x8_t): Ditto.
30300 (vint8m2x2_t): Ditto.
30301 (vuint8m2x2_t): Ditto.
30302 (vint8m2x3_t): Ditto.
30303 (vuint8m2x3_t): Ditto.
30304 (vint8m2x4_t): Ditto.
30305 (vuint8m2x4_t): Ditto.
30306 (vint8m4x2_t): Ditto.
30307 (vuint8m4x2_t): Ditto.
30308 (vint16mf4x2_t): Ditto.
30309 (vuint16mf4x2_t): Ditto.
30310 (vint16mf4x3_t): Ditto.
30311 (vuint16mf4x3_t): Ditto.
30312 (vint16mf4x4_t): Ditto.
30313 (vuint16mf4x4_t): Ditto.
30314 (vint16mf4x5_t): Ditto.
30315 (vuint16mf4x5_t): Ditto.
30316 (vint16mf4x6_t): Ditto.
30317 (vuint16mf4x6_t): Ditto.
30318 (vint16mf4x7_t): Ditto.
30319 (vuint16mf4x7_t): Ditto.
30320 (vint16mf4x8_t): Ditto.
30321 (vuint16mf4x8_t): Ditto.
30322 (vint16mf2x2_t): Ditto.
30323 (vuint16mf2x2_t): Ditto.
30324 (vint16mf2x3_t): Ditto.
30325 (vuint16mf2x3_t): Ditto.
30326 (vint16mf2x4_t): Ditto.
30327 (vuint16mf2x4_t): Ditto.
30328 (vint16mf2x5_t): Ditto.
30329 (vuint16mf2x5_t): Ditto.
30330 (vint16mf2x6_t): Ditto.
30331 (vuint16mf2x6_t): Ditto.
30332 (vint16mf2x7_t): Ditto.
30333 (vuint16mf2x7_t): Ditto.
30334 (vint16mf2x8_t): Ditto.
30335 (vuint16mf2x8_t): Ditto.
30336 (vint16m1x2_t): Ditto.
30337 (vuint16m1x2_t): Ditto.
30338 (vint16m1x3_t): Ditto.
30339 (vuint16m1x3_t): Ditto.
30340 (vint16m1x4_t): Ditto.
30341 (vuint16m1x4_t): Ditto.
30342 (vint16m1x5_t): Ditto.
30343 (vuint16m1x5_t): Ditto.
30344 (vint16m1x6_t): Ditto.
30345 (vuint16m1x6_t): Ditto.
30346 (vint16m1x7_t): Ditto.
30347 (vuint16m1x7_t): Ditto.
30348 (vint16m1x8_t): Ditto.
30349 (vuint16m1x8_t): Ditto.
30350 (vint16m2x2_t): Ditto.
30351 (vuint16m2x2_t): Ditto.
30352 (vint16m2x3_t): Ditto.
30353 (vuint16m2x3_t): Ditto.
30354 (vint16m2x4_t): Ditto.
30355 (vuint16m2x4_t): Ditto.
30356 (vint16m4x2_t): Ditto.
30357 (vuint16m4x2_t): Ditto.
30358 (vint32mf2x2_t): Ditto.
30359 (vuint32mf2x2_t): Ditto.
30360 (vint32mf2x3_t): Ditto.
30361 (vuint32mf2x3_t): Ditto.
30362 (vint32mf2x4_t): Ditto.
30363 (vuint32mf2x4_t): Ditto.
30364 (vint32mf2x5_t): Ditto.
30365 (vuint32mf2x5_t): Ditto.
30366 (vint32mf2x6_t): Ditto.
30367 (vuint32mf2x6_t): Ditto.
30368 (vint32mf2x7_t): Ditto.
30369 (vuint32mf2x7_t): Ditto.
30370 (vint32mf2x8_t): Ditto.
30371 (vuint32mf2x8_t): Ditto.
30372 (vint32m1x2_t): Ditto.
30373 (vuint32m1x2_t): Ditto.
30374 (vint32m1x3_t): Ditto.
30375 (vuint32m1x3_t): Ditto.
30376 (vint32m1x4_t): Ditto.
30377 (vuint32m1x4_t): Ditto.
30378 (vint32m1x5_t): Ditto.
30379 (vuint32m1x5_t): Ditto.
30380 (vint32m1x6_t): Ditto.
30381 (vuint32m1x6_t): Ditto.
30382 (vint32m1x7_t): Ditto.
30383 (vuint32m1x7_t): Ditto.
30384 (vint32m1x8_t): Ditto.
30385 (vuint32m1x8_t): Ditto.
30386 (vint32m2x2_t): Ditto.
30387 (vuint32m2x2_t): Ditto.
30388 (vint32m2x3_t): Ditto.
30389 (vuint32m2x3_t): Ditto.
30390 (vint32m2x4_t): Ditto.
30391 (vuint32m2x4_t): Ditto.
30392 (vint32m4x2_t): Ditto.
30393 (vuint32m4x2_t): Ditto.
30394 (vint64m1x2_t): Ditto.
30395 (vuint64m1x2_t): Ditto.
30396 (vint64m1x3_t): Ditto.
30397 (vuint64m1x3_t): Ditto.
30398 (vint64m1x4_t): Ditto.
30399 (vuint64m1x4_t): Ditto.
30400 (vint64m1x5_t): Ditto.
30401 (vuint64m1x5_t): Ditto.
30402 (vint64m1x6_t): Ditto.
30403 (vuint64m1x6_t): Ditto.
30404 (vint64m1x7_t): Ditto.
30405 (vuint64m1x7_t): Ditto.
30406 (vint64m1x8_t): Ditto.
30407 (vuint64m1x8_t): Ditto.
30408 (vint64m2x2_t): Ditto.
30409 (vuint64m2x2_t): Ditto.
30410 (vint64m2x3_t): Ditto.
30411 (vuint64m2x3_t): Ditto.
30412 (vint64m2x4_t): Ditto.
30413 (vuint64m2x4_t): Ditto.
30414 (vint64m4x2_t): Ditto.
30415 (vuint64m4x2_t): Ditto.
30416 (vfloat32mf2x2_t): Ditto.
30417 (vfloat32mf2x3_t): Ditto.
30418 (vfloat32mf2x4_t): Ditto.
30419 (vfloat32mf2x5_t): Ditto.
30420 (vfloat32mf2x6_t): Ditto.
30421 (vfloat32mf2x7_t): Ditto.
30422 (vfloat32mf2x8_t): Ditto.
30423 (vfloat32m1x2_t): Ditto.
30424 (vfloat32m1x3_t): Ditto.
30425 (vfloat32m1x4_t): Ditto.
30426 (vfloat32m1x5_t): Ditto.
30427 (vfloat32m1x6_t): Ditto.
30428 (vfloat32m1x7_t): Ditto.
30429 (vfloat32m1x8_t): Ditto.
30430 (vfloat32m2x2_t): Ditto.
30431 (vfloat32m2x3_t): Ditto.
30432 (vfloat32m2x4_t): Ditto.
30433 (vfloat32m4x2_t): Ditto.
30434 (vfloat64m1x2_t): Ditto.
30435 (vfloat64m1x3_t): Ditto.
30436 (vfloat64m1x4_t): Ditto.
30437 (vfloat64m1x5_t): Ditto.
30438 (vfloat64m1x6_t): Ditto.
30439 (vfloat64m1x7_t): Ditto.
30440 (vfloat64m1x8_t): Ditto.
30441 (vfloat64m2x2_t): Ditto.
30442 (vfloat64m2x3_t): Ditto.
30443 (vfloat64m2x4_t): Ditto.
30444 (vfloat64m4x2_t): Ditto.
30445 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
30447 (DEF_RVV_TYPE_INDEX): Ditto.
30448 (rvv_arg_type_info::get_tuple_subpart_type): New function.
30449 (DEF_RVV_TUPLE_TYPE): New macro.
30450 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
30451 Adapt for tuple vget/vset support.
30452 (vint8mf4_t): Ditto.
30453 (vuint8mf4_t): Ditto.
30454 (vint8mf2_t): Ditto.
30455 (vuint8mf2_t): Ditto.
30456 (vint8m1_t): Ditto.
30457 (vuint8m1_t): Ditto.
30458 (vint8m2_t): Ditto.
30459 (vuint8m2_t): Ditto.
30460 (vint8m4_t): Ditto.
30461 (vuint8m4_t): Ditto.
30462 (vint8m8_t): Ditto.
30463 (vuint8m8_t): Ditto.
30464 (vint16mf4_t): Ditto.
30465 (vuint16mf4_t): Ditto.
30466 (vint16mf2_t): Ditto.
30467 (vuint16mf2_t): Ditto.
30468 (vint16m1_t): Ditto.
30469 (vuint16m1_t): Ditto.
30470 (vint16m2_t): Ditto.
30471 (vuint16m2_t): Ditto.
30472 (vint16m4_t): Ditto.
30473 (vuint16m4_t): Ditto.
30474 (vint16m8_t): Ditto.
30475 (vuint16m8_t): Ditto.
30476 (vint32mf2_t): Ditto.
30477 (vuint32mf2_t): Ditto.
30478 (vint32m1_t): Ditto.
30479 (vuint32m1_t): Ditto.
30480 (vint32m2_t): Ditto.
30481 (vuint32m2_t): Ditto.
30482 (vint32m4_t): Ditto.
30483 (vuint32m4_t): Ditto.
30484 (vint32m8_t): Ditto.
30485 (vuint32m8_t): Ditto.
30486 (vint64m1_t): Ditto.
30487 (vuint64m1_t): Ditto.
30488 (vint64m2_t): Ditto.
30489 (vuint64m2_t): Ditto.
30490 (vint64m4_t): Ditto.
30491 (vuint64m4_t): Ditto.
30492 (vint64m8_t): Ditto.
30493 (vuint64m8_t): Ditto.
30494 (vfloat32mf2_t): Ditto.
30495 (vfloat32m1_t): Ditto.
30496 (vfloat32m2_t): Ditto.
30497 (vfloat32m4_t): Ditto.
30498 (vfloat32m8_t): Ditto.
30499 (vfloat64m1_t): Ditto.
30500 (vfloat64m2_t): Ditto.
30501 (vfloat64m4_t): Ditto.
30502 (vfloat64m8_t): Ditto.
30503 (tuple_subpart): Add tuple subpart base type.
30504 * config/riscv/riscv-vector-builtins.h (struct
30505 rvv_arg_type_info): Ditto.
30506 (tuple_type_field): New function.
30508 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30510 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
30511 (RVV_TUPLE_PARTIAL_MODES): Ditto.
30512 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
30515 (get_subpart_mode): Ditto.
30516 (get_tuple_mode): Ditto.
30517 (expand_tuple_move): Ditto.
30518 * config/riscv/riscv-v.cc (ENTRY): New macro.
30519 (TUPLE_ENTRY): Ditto.
30520 (get_nf): New function.
30521 (get_subpart_mode): Ditto.
30522 (get_tuple_mode): Ditto.
30523 (expand_tuple_move): Ditto.
30524 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
30526 (register_tuple_type): New function
30527 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
30529 (vint8mf8x2_t): New macro.
30530 (vuint8mf8x2_t): Ditto.
30531 (vint8mf8x3_t): Ditto.
30532 (vuint8mf8x3_t): Ditto.
30533 (vint8mf8x4_t): Ditto.
30534 (vuint8mf8x4_t): Ditto.
30535 (vint8mf8x5_t): Ditto.
30536 (vuint8mf8x5_t): Ditto.
30537 (vint8mf8x6_t): Ditto.
30538 (vuint8mf8x6_t): Ditto.
30539 (vint8mf8x7_t): Ditto.
30540 (vuint8mf8x7_t): Ditto.
30541 (vint8mf8x8_t): Ditto.
30542 (vuint8mf8x8_t): Ditto.
30543 (vint8mf4x2_t): Ditto.
30544 (vuint8mf4x2_t): Ditto.
30545 (vint8mf4x3_t): Ditto.
30546 (vuint8mf4x3_t): Ditto.
30547 (vint8mf4x4_t): Ditto.
30548 (vuint8mf4x4_t): Ditto.
30549 (vint8mf4x5_t): Ditto.
30550 (vuint8mf4x5_t): Ditto.
30551 (vint8mf4x6_t): Ditto.
30552 (vuint8mf4x6_t): Ditto.
30553 (vint8mf4x7_t): Ditto.
30554 (vuint8mf4x7_t): Ditto.
30555 (vint8mf4x8_t): Ditto.
30556 (vuint8mf4x8_t): Ditto.
30557 (vint8mf2x2_t): Ditto.
30558 (vuint8mf2x2_t): Ditto.
30559 (vint8mf2x3_t): Ditto.
30560 (vuint8mf2x3_t): Ditto.
30561 (vint8mf2x4_t): Ditto.
30562 (vuint8mf2x4_t): Ditto.
30563 (vint8mf2x5_t): Ditto.
30564 (vuint8mf2x5_t): Ditto.
30565 (vint8mf2x6_t): Ditto.
30566 (vuint8mf2x6_t): Ditto.
30567 (vint8mf2x7_t): Ditto.
30568 (vuint8mf2x7_t): Ditto.
30569 (vint8mf2x8_t): Ditto.
30570 (vuint8mf2x8_t): Ditto.
30571 (vint8m1x2_t): Ditto.
30572 (vuint8m1x2_t): Ditto.
30573 (vint8m1x3_t): Ditto.
30574 (vuint8m1x3_t): Ditto.
30575 (vint8m1x4_t): Ditto.
30576 (vuint8m1x4_t): Ditto.
30577 (vint8m1x5_t): Ditto.
30578 (vuint8m1x5_t): Ditto.
30579 (vint8m1x6_t): Ditto.
30580 (vuint8m1x6_t): Ditto.
30581 (vint8m1x7_t): Ditto.
30582 (vuint8m1x7_t): Ditto.
30583 (vint8m1x8_t): Ditto.
30584 (vuint8m1x8_t): Ditto.
30585 (vint8m2x2_t): Ditto.
30586 (vuint8m2x2_t): Ditto.
30587 (vint8m2x3_t): Ditto.
30588 (vuint8m2x3_t): Ditto.
30589 (vint8m2x4_t): Ditto.
30590 (vuint8m2x4_t): Ditto.
30591 (vint8m4x2_t): Ditto.
30592 (vuint8m4x2_t): Ditto.
30593 (vint16mf4x2_t): Ditto.
30594 (vuint16mf4x2_t): Ditto.
30595 (vint16mf4x3_t): Ditto.
30596 (vuint16mf4x3_t): Ditto.
30597 (vint16mf4x4_t): Ditto.
30598 (vuint16mf4x4_t): Ditto.
30599 (vint16mf4x5_t): Ditto.
30600 (vuint16mf4x5_t): Ditto.
30601 (vint16mf4x6_t): Ditto.
30602 (vuint16mf4x6_t): Ditto.
30603 (vint16mf4x7_t): Ditto.
30604 (vuint16mf4x7_t): Ditto.
30605 (vint16mf4x8_t): Ditto.
30606 (vuint16mf4x8_t): Ditto.
30607 (vint16mf2x2_t): Ditto.
30608 (vuint16mf2x2_t): Ditto.
30609 (vint16mf2x3_t): Ditto.
30610 (vuint16mf2x3_t): Ditto.
30611 (vint16mf2x4_t): Ditto.
30612 (vuint16mf2x4_t): Ditto.
30613 (vint16mf2x5_t): Ditto.
30614 (vuint16mf2x5_t): Ditto.
30615 (vint16mf2x6_t): Ditto.
30616 (vuint16mf2x6_t): Ditto.
30617 (vint16mf2x7_t): Ditto.
30618 (vuint16mf2x7_t): Ditto.
30619 (vint16mf2x8_t): Ditto.
30620 (vuint16mf2x8_t): Ditto.
30621 (vint16m1x2_t): Ditto.
30622 (vuint16m1x2_t): Ditto.
30623 (vint16m1x3_t): Ditto.
30624 (vuint16m1x3_t): Ditto.
30625 (vint16m1x4_t): Ditto.
30626 (vuint16m1x4_t): Ditto.
30627 (vint16m1x5_t): Ditto.
30628 (vuint16m1x5_t): Ditto.
30629 (vint16m1x6_t): Ditto.
30630 (vuint16m1x6_t): Ditto.
30631 (vint16m1x7_t): Ditto.
30632 (vuint16m1x7_t): Ditto.
30633 (vint16m1x8_t): Ditto.
30634 (vuint16m1x8_t): Ditto.
30635 (vint16m2x2_t): Ditto.
30636 (vuint16m2x2_t): Ditto.
30637 (vint16m2x3_t): Ditto.
30638 (vuint16m2x3_t): Ditto.
30639 (vint16m2x4_t): Ditto.
30640 (vuint16m2x4_t): Ditto.
30641 (vint16m4x2_t): Ditto.
30642 (vuint16m4x2_t): Ditto.
30643 (vint32mf2x2_t): Ditto.
30644 (vuint32mf2x2_t): Ditto.
30645 (vint32mf2x3_t): Ditto.
30646 (vuint32mf2x3_t): Ditto.
30647 (vint32mf2x4_t): Ditto.
30648 (vuint32mf2x4_t): Ditto.
30649 (vint32mf2x5_t): Ditto.
30650 (vuint32mf2x5_t): Ditto.
30651 (vint32mf2x6_t): Ditto.
30652 (vuint32mf2x6_t): Ditto.
30653 (vint32mf2x7_t): Ditto.
30654 (vuint32mf2x7_t): Ditto.
30655 (vint32mf2x8_t): Ditto.
30656 (vuint32mf2x8_t): Ditto.
30657 (vint32m1x2_t): Ditto.
30658 (vuint32m1x2_t): Ditto.
30659 (vint32m1x3_t): Ditto.
30660 (vuint32m1x3_t): Ditto.
30661 (vint32m1x4_t): Ditto.
30662 (vuint32m1x4_t): Ditto.
30663 (vint32m1x5_t): Ditto.
30664 (vuint32m1x5_t): Ditto.
30665 (vint32m1x6_t): Ditto.
30666 (vuint32m1x6_t): Ditto.
30667 (vint32m1x7_t): Ditto.
30668 (vuint32m1x7_t): Ditto.
30669 (vint32m1x8_t): Ditto.
30670 (vuint32m1x8_t): Ditto.
30671 (vint32m2x2_t): Ditto.
30672 (vuint32m2x2_t): Ditto.
30673 (vint32m2x3_t): Ditto.
30674 (vuint32m2x3_t): Ditto.
30675 (vint32m2x4_t): Ditto.
30676 (vuint32m2x4_t): Ditto.
30677 (vint32m4x2_t): Ditto.
30678 (vuint32m4x2_t): Ditto.
30679 (vint64m1x2_t): Ditto.
30680 (vuint64m1x2_t): Ditto.
30681 (vint64m1x3_t): Ditto.
30682 (vuint64m1x3_t): Ditto.
30683 (vint64m1x4_t): Ditto.
30684 (vuint64m1x4_t): Ditto.
30685 (vint64m1x5_t): Ditto.
30686 (vuint64m1x5_t): Ditto.
30687 (vint64m1x6_t): Ditto.
30688 (vuint64m1x6_t): Ditto.
30689 (vint64m1x7_t): Ditto.
30690 (vuint64m1x7_t): Ditto.
30691 (vint64m1x8_t): Ditto.
30692 (vuint64m1x8_t): Ditto.
30693 (vint64m2x2_t): Ditto.
30694 (vuint64m2x2_t): Ditto.
30695 (vint64m2x3_t): Ditto.
30696 (vuint64m2x3_t): Ditto.
30697 (vint64m2x4_t): Ditto.
30698 (vuint64m2x4_t): Ditto.
30699 (vint64m4x2_t): Ditto.
30700 (vuint64m4x2_t): Ditto.
30701 (vfloat32mf2x2_t): Ditto.
30702 (vfloat32mf2x3_t): Ditto.
30703 (vfloat32mf2x4_t): Ditto.
30704 (vfloat32mf2x5_t): Ditto.
30705 (vfloat32mf2x6_t): Ditto.
30706 (vfloat32mf2x7_t): Ditto.
30707 (vfloat32mf2x8_t): Ditto.
30708 (vfloat32m1x2_t): Ditto.
30709 (vfloat32m1x3_t): Ditto.
30710 (vfloat32m1x4_t): Ditto.
30711 (vfloat32m1x5_t): Ditto.
30712 (vfloat32m1x6_t): Ditto.
30713 (vfloat32m1x7_t): Ditto.
30714 (vfloat32m1x8_t): Ditto.
30715 (vfloat32m2x2_t): Ditto.
30716 (vfloat32m2x3_t): Ditto.
30717 (vfloat32m2x4_t): Ditto.
30718 (vfloat32m4x2_t): Ditto.
30719 (vfloat64m1x2_t): Ditto.
30720 (vfloat64m1x3_t): Ditto.
30721 (vfloat64m1x4_t): Ditto.
30722 (vfloat64m1x5_t): Ditto.
30723 (vfloat64m1x6_t): Ditto.
30724 (vfloat64m1x7_t): Ditto.
30725 (vfloat64m1x8_t): Ditto.
30726 (vfloat64m2x2_t): Ditto.
30727 (vfloat64m2x3_t): Ditto.
30728 (vfloat64m2x4_t): Ditto.
30729 (vfloat64m4x2_t): Ditto.
30730 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
30732 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
30733 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
30735 (TUPLE_ENTRY): Ditto.
30736 (riscv_v_ext_mode_p): New function.
30737 (riscv_v_adjust_nunits): Add tuple mode adjustment.
30738 (riscv_classify_address): Ditto.
30739 (riscv_binary_cost): Ditto.
30740 (riscv_rtx_costs): Ditto.
30741 (riscv_secondary_memory_needed): Ditto.
30742 (riscv_hard_regno_nregs): Ditto.
30743 (riscv_hard_regno_mode_ok): Ditto.
30744 (riscv_vector_mode_supported_p): Ditto.
30745 (riscv_regmode_natural_size): Ditto.
30746 (riscv_array_mode): New function.
30747 (TARGET_ARRAY_MODE): New target hook.
30748 * config/riscv/riscv.md: Add tuple modes.
30749 * config/riscv/vector-iterators.md: Ditto.
30750 * config/riscv/vector.md (mov<mode>): Add tuple modes data
30752 (*mov<VT:mode>_<P:mode>): Ditto.
30754 2023-05-03 Richard Biener <rguenther@suse.de>
30756 * cse.cc (cse_insn): Track an equivalence to the destination
30757 separately and delay using src_related for it.
30759 2023-05-03 Richard Biener <rguenther@suse.de>
30761 * cse.cc (HASH): Turn into inline function and mix
30762 in another HASH_SHIFT bits.
30763 (SAFE_HASH): Likewise.
30765 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30768 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
30769 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
30771 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30774 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
30775 (add<mode>3<vczle><vczbe>): ... This.
30776 (sub<mode>3): Rename to...
30777 (sub<mode>3<vczle><vczbe>): ... This.
30778 (mul<mode>3): Rename to...
30779 (mul<mode>3<vczle><vczbe>): ... This.
30780 (*div<mode>3): Rename to...
30781 (*div<mode>3<vczle><vczbe>): ... This.
30782 (neg<mode>2): Rename to...
30783 (neg<mode>2<vczle><vczbe>): ... This.
30784 (abs<mode>2): Rename to...
30785 (abs<mode>2<vczle><vczbe>): ... This.
30786 (<frint_pattern><mode>2): Rename to...
30787 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
30788 (<fmaxmin><mode>3): Rename to...
30789 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
30790 (*sqrt<mode>2): Rename to...
30791 (*sqrt<mode>2<vczle><vczbe>): ... This.
30793 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
30795 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
30797 2023-05-03 Martin Liska <mliska@suse.cz>
30799 PR tree-optimization/109693
30800 * value-range-storage.cc (vrange_allocator::vrange_allocator):
30801 Remove unused field.
30802 * value-range-storage.h: Likewise.
30804 2023-05-02 Andrew Pinski <apinski@marvell.com>
30806 * tree-ssa-phiopt.cc (move_stmt): New function.
30807 (match_simplify_replacement): Use move_stmt instead
30808 of the inlined version.
30810 2023-05-02 Andrew Pinski <apinski@marvell.com>
30812 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
30815 2023-05-02 Andrew Pinski <apinski@marvell.com>
30817 PR tree-optimization/109702
30818 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
30819 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
30821 2023-05-02 Andrew Pinski <apinski@marvell.com>
30824 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
30825 insn_and_split pattern.
30827 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30829 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
30832 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30834 * config/riscv/sync.md (mem_thread_fence_1): Change fence
30835 depending on the given memory model.
30837 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30839 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
30840 riscv_union_memmodels function to sync.md.
30841 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
30842 get the union of two memmodels in sync.md.
30843 (riscv_print_operand): Add %I and %J flags that output the
30844 optimal LR/SC flag bits for a given memory model.
30845 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
30846 bits on SC op and replace with optimized %I, %J flags.
30848 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30850 * config/riscv/riscv.cc
30851 (riscv_memmodel_needs_amo_release): Change function name.
30852 (riscv_print_operand): Remove unneeded %F case.
30853 * config/riscv/sync.md: Remove unneeded fences.
30855 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30858 * config/riscv/sync.md (atomic_store<mode>): Use simple store
30859 instruction in combination with fence(s).
30861 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30863 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
30864 of %A to include release bits.
30866 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30868 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
30869 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
30872 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30874 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
30875 sequentially consistent LR.aqrl/SC.rl pairs.
30877 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30879 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
30880 sanitize memmodel input with memmodel_base.
30882 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
30883 Pan Li <pan2.li@intel.com>
30886 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
30888 2023-05-02 Romain Naour <romain.naour@gmail.com>
30890 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
30893 2023-05-02 Martin Liska <mliska@suse.cz>
30895 * doc/invoke.texi: Update documentation based on param.opt file.
30897 2023-05-02 Richard Biener <rguenther@suse.de>
30899 PR tree-optimization/109672
30900 * tree-vect-stmts.cc (vectorizable_operation): For plus,
30901 minus and negate always check the vector mode is word mode.
30903 2023-05-01 Andrew Pinski <apinski@marvell.com>
30905 * tree-ssa-phiopt.cc: Update comment about
30906 how the transformation are implemented.
30908 2023-05-01 Jeff Law <jlaw@ventanamicro>
30910 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
30912 2023-05-01 Jeff Law <jlaw@ventanamicro>
30914 * config/cris/cris.cc (TARGET_LRA_P): Remove.
30915 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
30916 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
30917 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
30918 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
30919 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
30921 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
30923 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
30924 * print-tree.cc (print_decl_identifier): Implement it.
30925 * toplev.cc (output_stack_usage_1): Use it.
30927 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30929 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
30932 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30934 * value-range.h (irange::set_nonzero): Inline.
30936 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30938 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
30940 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
30941 invalid_range, as it is an inverse range.
30942 * tree-vrp.cc (find_case_label_range): Avoid trees.
30943 * value-range.cc (irange::irange_set): Delete.
30944 (irange::irange_set_1bit_anti_range): Delete.
30945 (irange::irange_set_anti_range): Delete.
30946 (irange::set): Cleanup.
30947 * value-range.h (class irange): Remove irange_set,
30948 irange_set_anti_range, irange_set_1bit_anti_range.
30949 (irange::set_undefined): Remove set to m_type.
30951 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30953 * range-op.cc (update_known_bitmask): Adjust for irange containing
30954 wide_ints internally.
30955 * tree-ssanames.cc (set_nonzero_bits): Same.
30956 * tree-ssanames.h (set_nonzero_bits): Same.
30957 * value-range-storage.cc (irange_storage::set_irange): Same.
30958 (irange_storage::get_irange): Same.
30959 * value-range.cc (irange::operator=): Same.
30960 (irange::irange_set): Same.
30961 (irange::irange_set_1bit_anti_range): Same.
30962 (irange::irange_set_anti_range): Same.
30963 (irange::set): Same.
30964 (irange::verify_range): Same.
30965 (irange::contains_p): Same.
30966 (irange::irange_single_pair_union): Same.
30967 (irange::union_): Same.
30968 (irange::irange_contains_p): Same.
30969 (irange::intersect): Same.
30970 (irange::invert): Same.
30971 (irange::set_range_from_nonzero_bits): Same.
30972 (irange::set_nonzero_bits): Same.
30973 (mask_to_wi): Same.
30974 (irange::intersect_nonzero_bits): Same.
30975 (irange::union_nonzero_bits): Same.
30978 (tree_range): Same.
30979 (range_tests_strict_enum): Same.
30980 (range_tests_misc): Same.
30981 (range_tests_nonzero_bits): Same.
30982 * value-range.h (irange::type): Same.
30983 (irange::varying_compatible_p): Same.
30984 (irange::irange): Same.
30985 (int_range::int_range): Same.
30986 (irange::set_undefined): Same.
30987 (irange::set_varying): Same.
30988 (irange::lower_bound): Same.
30989 (irange::upper_bound): Same.
30991 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30993 * gimple-range-fold.cc (tree_lower_bound): Delete.
30994 (tree_upper_bound): Delete.
30995 (vrp_val_max): Delete.
30996 (vrp_val_min): Delete.
30997 (fold_using_range::range_of_ssa_name_with_loop_info): Call
30998 range_of_var_in_loop.
30999 * vr-values.cc (valid_value_p): Delete.
31000 (fix_overflow): Delete.
31001 (get_scev_info): New.
31002 (bounds_of_var_in_loop): Refactor into...
31003 (induction_variable_may_overflow_p): ...this,
31004 (range_from_loop_direction): ...and this,
31005 (range_of_var_in_loop): ...and this.
31006 * vr-values.h (bounds_of_var_in_loop): Delete.
31007 (range_of_var_in_loop): New.
31009 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31011 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
31013 (vrp_val_max): New.
31014 (vrp_val_min): New.
31015 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
31016 * range-op.cc (max_limit): Same.
31018 (plus_minus_ranges): Same.
31019 (operator_rshift::op1_range): Same.
31020 (operator_cast::inside_domain_p): Same.
31021 * value-range.cc (vrp_val_is_max): Delete.
31022 (vrp_val_is_min): Delete.
31023 (range_tests_misc): Use irange_val_*.
31024 * value-range.h (vrp_val_is_min): Delete.
31025 (vrp_val_is_max): Delete.
31026 (vrp_val_max): Delete.
31027 (irange_val_min): New.
31028 (vrp_val_min): Delete.
31029 (irange_val_max): New.
31030 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
31032 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31034 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
31035 * gimple-fold.cc (size_must_be_zero_p): Same.
31036 * gimple-loop-versioning.cc
31037 (loop_versioning::prune_loop_conditions): Same.
31038 * gimple-range-edge.cc (gcond_edge_range): Same.
31039 (gimple_outgoing_range::calc_switch_ranges): Same.
31040 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
31041 (adjust_realpart_expr): Same.
31042 (fold_using_range::range_of_address): Same.
31043 (fold_using_range::relation_fold_and_or): Same.
31044 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
31045 (range_is_either_true_or_false): Same.
31046 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
31047 (cfn_clz::fold_range): Same.
31048 (cfn_ctz::fold_range): Same.
31049 * gimple-range-tests.cc (class test_expr_eval): Same.
31050 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
31051 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
31052 (propagate_vr_across_jump_function): Same.
31053 (decide_whether_version_node): Same.
31054 * ipa-prop.cc (ipa_get_value_range): Same.
31055 * ipa-prop.h (ipa_range_set_and_normalize): Same.
31056 * range-op.cc (get_shift_range): Same.
31057 (value_range_from_overflowed_bounds): Same.
31058 (value_range_with_overflow): Same.
31059 (create_possibly_reversed_range): Same.
31060 (equal_op1_op2_relation): Same.
31061 (not_equal_op1_op2_relation): Same.
31062 (lt_op1_op2_relation): Same.
31063 (le_op1_op2_relation): Same.
31064 (gt_op1_op2_relation): Same.
31065 (ge_op1_op2_relation): Same.
31066 (operator_mult::op1_range): Same.
31067 (operator_exact_divide::op1_range): Same.
31068 (operator_lshift::op1_range): Same.
31069 (operator_rshift::op1_range): Same.
31070 (operator_cast::op1_range): Same.
31071 (operator_logical_and::fold_range): Same.
31072 (set_nonzero_range_from_mask): Same.
31073 (operator_bitwise_or::op1_range): Same.
31074 (operator_bitwise_xor::op1_range): Same.
31075 (operator_addr_expr::fold_range): Same.
31076 (pointer_plus_operator::wi_fold): Same.
31077 (pointer_or_operator::op1_range): Same.
31084 (range_op_cast_tests): Same.
31085 (range_op_lshift_tests): Same.
31086 (range_op_rshift_tests): Same.
31087 (range_op_bitwise_and_tests): Same.
31088 (range_relational_tests): Same.
31089 * range.cc (range_zero): Same.
31090 (range_nonzero): Same.
31091 * range.h (range_true): Same.
31092 (range_false): Same.
31093 (range_true_and_false): Same.
31094 * tree-data-ref.cc (split_constant_offset_1): Same.
31095 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
31096 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
31097 (find_unswitching_predicates_for_bb): Same.
31098 * tree-ssa-phiopt.cc (value_replacement): Same.
31099 * tree-ssa-threadbackward.cc
31100 (back_threader::find_taken_edge_cond): Same.
31101 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
31102 * tree-vrp.cc (find_case_label_range): Same.
31103 * value-query.cc (range_query::get_tree_range): Same.
31104 * value-range.cc (irange::set_nonnegative): Same.
31105 (frange::contains_p): Same.
31106 (frange::singleton_p): Same.
31107 (frange::internal_singleton_p): Same.
31108 (irange::irange_set): Same.
31109 (irange::irange_set_1bit_anti_range): Same.
31110 (irange::irange_set_anti_range): Same.
31111 (irange::set): Same.
31112 (irange::operator==): Same.
31113 (irange::singleton_p): Same.
31114 (irange::contains_p): Same.
31115 (irange::set_range_from_nonzero_bits): Same.
31116 (DEFINE_INT_RANGE_INSTANCE): Same.
31126 (range_uint128): New.
31127 (range_uchar): New.
31129 (build_range3): Convert to irange wide_int API.
31130 (range_tests_irange3): Same.
31131 (range_tests_int_range_max): Same.
31132 (range_tests_strict_enum): Same.
31133 (range_tests_misc): Same.
31134 (range_tests_nonzero_bits): Same.
31135 (range_tests_nan): Same.
31136 (range_tests_signed_zeros): Same.
31137 * value-range.h (Value_Range::Value_Range): Same.
31138 (irange::set): Same.
31139 (irange::nonzero_p): Same.
31140 (irange::contains_p): Same.
31141 (range_includes_zero_p): Same.
31142 (irange::set_nonzero): Same.
31143 (irange::set_zero): Same.
31144 (contains_zero_p): Same.
31145 (frange::contains_p): Same.
31147 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
31148 (bounds_of_var_in_loop): Same.
31149 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
31151 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31153 * value-range.cc (irange::irange_union): Rename to...
31154 (irange::union_): ...this.
31155 (irange::irange_intersect): Rename to...
31156 (irange::intersect): ...this.
31157 * value-range.h (irange::union_): Delete.
31158 (irange::intersect): Delete.
31160 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31162 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
31164 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31166 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
31168 (compare_ranges): Delete.
31169 (compare_range_with_value): Delete.
31170 (bounds_of_var_in_loop): Tidy up by using ranger API.
31171 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
31172 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
31173 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
31174 strict_overflow_p and only_ranges.
31175 (simplify_using_ranges::legacy_fold_cond): Adjust call to
31176 legacy_fold_cond_overflow.
31177 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
31179 (range_fits_type_p): Rename value_range to irange.
31180 * vr-values.h (range_fits_type_p): Adjust prototype.
31182 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31184 * value-range.cc (irange::irange_set_anti_range): Remove uses of
31185 tree_lower_bound and tree_upper_bound.
31186 (irange::verify_range): Same.
31187 (irange::operator==): Same.
31188 (irange::singleton_p): Same.
31189 * value-range.h (irange::tree_lower_bound): Delete.
31190 (irange::tree_upper_bound): Delete.
31191 (irange::lower_bound): Delete.
31192 (irange::upper_bound): Delete.
31193 (irange::zero_p): Remove uses of tree_lower_bound and
31196 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31198 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
31200 (determine_value_range): Same.
31201 (record_nonwrapping_iv): Same.
31202 (infer_loop_bounds_from_signedness): Same.
31203 (scev_var_range_cant_overflow): Same.
31204 * tree-vrp.cc (operand_less_p): Delete.
31205 * tree-vrp.h (operand_less_p): Delete.
31206 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
31207 (irange::value_inside_range): Delete.
31208 * value-range.h (vrange::kind): Delete.
31209 (irange::num_pairs): Remove check of m_kind.
31210 (irange::min): Delete.
31211 (irange::max): Delete.
31213 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
31215 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
31216 for vrange_storage.
31217 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
31218 (sbr_vector::grow): Same.
31219 (sbr_vector::set_bb_range): Same.
31220 (sbr_vector::get_bb_range): Same.
31221 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
31222 (sbr_sparse_bitmap::set_bb_range): Same.
31223 (sbr_sparse_bitmap::get_bb_range): Same.
31224 (block_range_cache::block_range_cache): Same.
31225 (ssa_global_cache::ssa_global_cache): Same.
31226 (ssa_global_cache::get_global_range): Same.
31227 (ssa_global_cache::set_global_range): Same.
31228 * gimple-range-cache.h: Same.
31229 * gimple-range-edge.cc
31230 (gimple_outgoing_range::gimple_outgoing_range): Same.
31231 (gimple_outgoing_range::switch_edge_range): Same.
31232 (gimple_outgoing_range::calc_switch_ranges): Same.
31233 * gimple-range-edge.h: Same.
31234 * gimple-range-infer.cc
31235 (infer_range_manager::infer_range_manager): Same.
31236 (infer_range_manager::get_nonzero): Same.
31237 (infer_range_manager::maybe_adjust_range): Same.
31238 (infer_range_manager::add_range): Same.
31239 * gimple-range-infer.h: Rename obstack_vrange_allocator to
31241 * tree-core.h (struct irange_storage_slot): Remove.
31242 (struct tree_ssa_name): Remove irange_info and frange_info. Make
31243 range_info a pointer to vrange_storage.
31244 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
31245 (range_info_alloc): Same.
31246 (range_info_free): Same.
31247 (range_info_get_range): Same.
31248 (range_info_set_range): Same.
31249 (get_nonzero_bits): Same.
31250 * value-query.cc (get_ssa_name_range_info): Same.
31251 * value-range-storage.cc (class vrange_internal_alloc): New.
31252 (class vrange_obstack_alloc): New.
31253 (class vrange_ggc_alloc): New.
31254 (vrange_allocator::vrange_allocator): New.
31255 (vrange_allocator::~vrange_allocator): New.
31256 (vrange_storage::alloc_slot): New.
31257 (vrange_allocator::alloc): New.
31258 (vrange_allocator::free): New.
31259 (vrange_allocator::clone): New.
31260 (vrange_allocator::clone_varying): New.
31261 (vrange_allocator::clone_undefined): New.
31262 (vrange_storage::alloc): New.
31263 (vrange_storage::set_vrange): Remove slot argument.
31264 (vrange_storage::get_vrange): Same.
31265 (vrange_storage::fits_p): Same.
31266 (vrange_storage::equal_p): New.
31267 (irange_storage::write_lengths_address): New.
31268 (irange_storage::lengths_address): New.
31269 (irange_storage_slot::alloc_slot): Remove.
31270 (irange_storage::alloc): New.
31271 (irange_storage_slot::irange_storage_slot): Remove.
31272 (irange_storage::irange_storage): New.
31273 (write_wide_int): New.
31274 (irange_storage_slot::set_irange): Remove.
31275 (irange_storage::set_irange): New.
31276 (read_wide_int): New.
31277 (irange_storage_slot::get_irange): Remove.
31278 (irange_storage::get_irange): New.
31279 (irange_storage_slot::size): Remove.
31280 (irange_storage::equal_p): New.
31281 (irange_storage_slot::num_wide_ints_needed): Remove.
31282 (irange_storage::size): New.
31283 (irange_storage_slot::fits_p): Remove.
31284 (irange_storage::fits_p): New.
31285 (irange_storage_slot::dump): Remove.
31286 (irange_storage::dump): New.
31287 (frange_storage_slot::alloc_slot): Remove.
31288 (frange_storage::alloc): New.
31289 (frange_storage_slot::set_frange): Remove.
31290 (frange_storage::set_frange): New.
31291 (frange_storage_slot::get_frange): Remove.
31292 (frange_storage::get_frange): New.
31293 (frange_storage_slot::fits_p): Remove.
31294 (frange_storage::equal_p): New.
31295 (frange_storage::fits_p): New.
31296 (ggc_vrange_allocator): New.
31297 (ggc_alloc_vrange_storage): New.
31298 * value-range-storage.h (class vrange_storage): Rewrite.
31299 (class irange_storage): Rewrite.
31300 (class frange_storage): Rewrite.
31301 (class obstack_vrange_allocator): Remove.
31302 (class ggc_vrange_allocator): Remove.
31303 (vrange_allocator::alloc_vrange): Remove.
31304 (vrange_allocator::alloc_irange): Remove.
31305 (vrange_allocator::alloc_frange): Remove.
31306 (ggc_alloc_vrange_storage): New.
31307 * value-range.h (class irange): Rename vrange_allocator to
31309 (class frange): Same.
31311 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
31313 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
31314 inc to avoid clobbering the carry flag.
31316 2023-04-30 Andrew Pinski <apinski@marvell.com>
31318 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
31319 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
31321 2023-04-30 Andrew Pinski <apinski@marvell.com>
31323 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31324 Allow some builtin/internal function calls which
31325 are known not to trap/throw.
31326 (phiopt_worker::match_simplify_replacement):
31327 Use name instead of getting the lhs again.
31329 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
31331 * configure: Regenerate.
31332 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
31334 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
31336 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
31337 emit_insn_if_valid_for_reload.
31338 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
31339 to be recognized, also try emitting a parallel that clobbers
31340 TARGET_FLAGS_REGNUM, as applicable.
31342 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
31344 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
31346 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
31347 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
31349 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
31351 * config/stormy16/stormy16.md (any_lshift): New code iterator.
31352 (any_or_plus): Likewise.
31353 (any_rotate): Likewise.
31354 (*<any_lshift>_and_internal): New define_insn_and_split to
31355 recognize a logical shift followed by an AND, and split it
31356 again after reload.
31357 (*swpn): New define_insn matching xstormy16's swpn.
31358 (*swpn_zext): New define_insn recognizing swpn followed by
31359 zero_extendqihi2, i.e. with the high byte set to zero.
31360 (*swpn_sext): Likewise, for swpn followed by cbw.
31361 (*swpn_sext_2): Likewise, for an alternate RTL form.
31362 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
31363 sequence is split in the correct place to recognize the *swpn_zext
31364 followed by any_or_plus (ior, xor or plus) instruction.
31366 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
31369 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
31370 (lm32-*-uclinux*): Likewise.
31372 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
31374 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
31375 for riscv_use_save_libcall.
31376 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
31377 (riscv_compute_frame_info): restructure to decouple stack allocation
31378 for rv32e w/o save-restore.
31380 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
31382 * doc/install.texi: Fix documentation typo
31384 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
31386 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
31387 (u): Add div/udiv cases.
31388 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
31389 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
31391 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
31392 (thead_c906_tune_info): Likewise.
31393 (optimize_size_tune_info): Likewise.
31394 (riscv_use_divmod_expander): New function.
31395 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
31397 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
31399 * config/riscv/bitmanip.md: Added clmulr instruction.
31400 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
31401 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
31403 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
31404 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
31405 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
31406 functions to riscv-cmo.def.
31407 * config/riscv/generic.md: Add clmul to list of instructions
31408 using the generic_imul reservation.
31410 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
31412 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
31414 2023-04-28 Andrew Pinski <apinski@marvell.com>
31416 PR tree-optimization/100958
31417 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
31418 (pass_phiopt::execute): Don't call two_value_replacement.
31419 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
31420 handle what two_value_replacement did.
31422 2023-04-28 Andrew Pinski <apinski@marvell.com>
31424 * match.pd: Add patterns for
31425 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
31427 2023-04-28 Andrew Pinski <apinski@marvell.com>
31429 * match.pd: Factor out the deciding the min/max from
31430 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
31432 * fold-const.cc (minmax_from_comparison): this new function.
31433 * fold-const.h (minmax_from_comparison): New prototype.
31435 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
31437 PR rtl-optimization/109476
31438 * lower-subreg.cc: Include explow.h for force_reg.
31439 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
31440 If decomposing a suitable LSHIFTRT and we're not splitting
31441 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
31442 instead of setting a high part SUBREG to zero, which helps combine.
31443 (decompose_multiword_subregs): Update call to resolve_shift_zext.
31445 2023-04-28 Richard Biener <rguenther@suse.de>
31447 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
31449 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
31450 gather-scatter info and cost emulated scatters accordingly.
31451 (get_load_store_type): Support emulated scatters.
31452 (vectorizable_store): Likewise. Emulate them by extracting
31453 scalar offsets and data, doing scalar stores.
31455 2023-04-28 Richard Biener <rguenther@suse.de>
31457 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
31458 Tame down element extracts and scalar loads for gather/scatter
31459 similar to elementwise strided accesses.
31461 2023-04-28 Pan Li <pan2.li@intel.com>
31462 kito-cheng <kito.cheng@sifive.com>
31464 * config/riscv/vector.md: Add new define split to perform
31465 the simplification.
31467 2023-04-28 Richard Biener <rguenther@suse.de>
31470 * ipa-param-manipulation.cc
31471 (ipa_param_body_adjustments::modify_expression): Allow
31472 conversion of a register to a non-register type. Elide
31473 conversions inside BIT_FIELD_REFs.
31475 2023-04-28 Richard Biener <rguenther@suse.de>
31477 PR tree-optimization/109644
31478 * tree-cfg.cc (verify_types_in_gimple_reference): Check
31479 register constraints on the outermost VIEW_CONVERT_EXPR
31480 only. Do not allow register or invariant bases on
31481 multi-level or possibly variable index handled components.
31483 2023-04-28 Richard Biener <rguenther@suse.de>
31485 * gimplify.cc (gimplify_compound_lval): When there's a
31486 non-register type produced by one of the handled component
31487 operations make sure we get a non-register base.
31489 2023-04-28 Richard Biener <rguenther@suse.de>
31491 PR tree-optimization/108752
31492 * tree-vect-generic.cc (build_replicated_const): Rename
31493 to build_replicated_int_cst and move to tree.{h,cc}.
31494 (do_plus_minus): Adjust.
31495 (do_negate): Likewise.
31496 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
31497 arithmetic vector operations in lowered form.
31498 * tree.h (build_replicated_int_cst): Declare.
31499 * tree.cc (build_replicated_int_cst): Moved from
31500 tree-vect-generic.cc build_replicated_const.
31502 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31505 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
31506 (aarch64_rbit<mode><vczle><vczbe>): ... This.
31507 (neg<mode>2): Rename to...
31508 (neg<mode>2<vczle><vczbe>): ... This.
31509 (abs<mode>2): Rename to...
31510 (abs<mode>2<vczle><vczbe>): ... This.
31511 (aarch64_abs<mode>): Rename to...
31512 (aarch64_abs<mode><vczle><vczbe>): ... This.
31513 (one_cmpl<mode>2): Rename to...
31514 (one_cmpl<mode>2<vczle><vczbe>): ... This.
31515 (clrsb<mode>2): Rename to...
31516 (clrsb<mode>2<vczle><vczbe>): ... This.
31517 (clz<mode>2): Rename to...
31518 (clz<mode>2<vczle><vczbe>): ... This.
31519 (popcount<mode>2): Rename to...
31520 (popcount<mode>2<vczle><vczbe>): ... This.
31522 2023-04-28 Jakub Jelinek <jakub@redhat.com>
31524 * gimple-range-op.cc (class cfn_sqrt): New type.
31525 (op_cfn_sqrt): New variable.
31526 (gimple_range_op_handler::maybe_builtin_call): Handle
31527 CASE_CFN_SQRT{,_FN}.
31529 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
31530 Jakub Jelinek <jakub@redhat.com>
31532 * value-range.h (frange_nextafter): Declare.
31533 * gimple-range-op.cc (class cfn_sincos): New.
31534 (op_cfn_sin, op_cfn_cos): New variables.
31535 (gimple_range_op_handler::maybe_builtin_call): Handle
31536 CASE_CFN_{SIN,COS}{,_FN}.
31538 2023-04-28 Jakub Jelinek <jakub@redhat.com>
31540 * target.def (libm_function_max_error): New target hook.
31541 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
31542 * doc/tm.texi: Regenerated.
31543 * targhooks.h (default_libm_function_max_error,
31544 glibc_linux_libm_function_max_error): Declare.
31545 * targhooks.cc: Include case-cfn-macros.h.
31546 (default_libm_function_max_error,
31547 glibc_linux_libm_function_max_error): New functions.
31548 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31549 * config/linux-protos.h (linux_libm_function_max_error): Declare.
31550 * config/linux.cc: Include target.h and targhooks.h.
31551 (linux_libm_function_max_error): New function.
31552 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
31553 (arc_libm_function_max_error): New function.
31554 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31555 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
31556 (ix86_libm_function_max_error): New function.
31557 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31558 * config/rs6000/rs6000-protos.h
31559 (rs6000_linux_libm_function_max_error): Declare.
31560 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
31561 and case-cfn-macros.h.
31562 (rs6000_linux_libm_function_max_error): New function.
31563 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31564 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31565 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
31566 (or1k_libm_function_max_error): New function.
31567 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31569 2023-04-28 Alexandre Oliva <oliva@adacore.com>
31571 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
31572 Move detach value calls...
31573 (pass_harden_conditional_branches::execute): ... here.
31574 (pass_harden_compares::execute): Detach values before
31577 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
31579 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
31580 (cml<addsub_as><mode>4): Likewise.
31581 (vec_addsub<mode>3): Likewise.
31582 (cadd<rot><mode>3): Likewise.
31583 (vec_fmaddsub<mode>4): Likewise.
31584 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
31586 2023-04-27 Andrew Pinski <apinski@marvell.com>
31588 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
31589 up to 2 min/max expressions in the sequence/match code.
31591 2023-04-27 Andrew Pinski <apinski@marvell.com>
31593 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
31595 * tree-eh.cc (operation_could_trap_helper_p): Treate
31596 MIN_EXPR/MAX_EXPR similar as other comparisons.
31598 2023-04-27 Andrew Pinski <apinski@marvell.com>
31600 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
31602 (cond_if_else_store_replacement): Likewise.
31603 (get_non_trapping): Likewise.
31604 (store_elim_worker): Move into ...
31605 (pass_cselim::execute): This.
31607 2023-04-27 Andrew Pinski <apinski@marvell.com>
31609 * tree-ssa-phiopt.cc (two_value_replacement): Remove
31611 (match_simplify_replacement): Likewise.
31612 (factor_out_conditional_conversion): Likewise.
31613 (value_replacement): Likewise.
31614 (minmax_replacement): Likewise.
31615 (spaceship_replacement): Likewise.
31616 (cond_removal_in_builtin_zero_pattern): Likewise.
31617 (hoist_adjacent_loads): Likewise.
31618 (tree_ssa_phiopt_worker): Move into ...
31619 (pass_phiopt::execute): this.
31621 2023-04-27 Andrew Pinski <apinski@marvell.com>
31623 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
31624 do_store_elim argument and split that part out to ...
31625 (store_elim_worker): This new function.
31626 (pass_cselim::execute): Call store_elim_worker.
31627 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
31629 2023-04-27 Jan Hubicka <jh@suse.cz>
31631 * cfgloopmanip.h (unloop_loops): Export.
31632 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
31633 that no longer loop.
31634 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
31635 vectors of loops to unloop.
31636 (canonicalize_induction_variables): Free vectors here.
31637 (tree_unroll_loops_completely): Free vectors here.
31639 2023-04-27 Richard Biener <rguenther@suse.de>
31641 PR tree-optimization/109170
31642 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
31643 Handle __builtin_expect and similar via cfn_pass_through_arg1
31644 and inspecting the calls fnspec.
31645 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
31646 and BUILT_IN_EXPECT_WITH_PROBABILITY.
31648 2023-04-27 Alexandre Oliva <oliva@adacore.com>
31650 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
31652 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
31654 PR tree-optimization/109639
31655 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
31656 (propagate_vr_across_jump_function): Same.
31657 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
31658 * ipa-prop.h (ipa_range_set_and_normalize): New.
31659 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
31661 2023-04-27 Richard Biener <rguenther@suse.de>
31663 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
31664 create a CTOR operand in the result when simplifying GIMPLE.
31666 2023-04-27 Richard Biener <rguenther@suse.de>
31668 * gimplify.cc (gimplify_compound_lval): When the base
31669 gimplified to a register make sure to split up chains
31672 2023-04-27 Richard Biener <rguenther@suse.de>
31675 * ipa-param-manipulation.h
31676 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
31678 * ipa-param-manipulation.cc
31679 (ipa_param_body_adjustments::modify_expression): Likewise.
31680 When we need a conversion and the replacement is a register
31681 split the conversion out.
31682 (ipa_param_body_adjustments::modify_assignment): Pass
31683 extra_stmts to RHS modify_expression.
31685 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
31687 * doc/extend.texi (Zero Length): Describe example.
31689 2023-04-27 Richard Biener <rguenther@suse.de>
31691 PR tree-optimization/109594
31692 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
31693 what we rewrite to a register based on the above.
31695 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
31697 * config/riscv/riscv.cc: Fix whitespace.
31698 * config/riscv/sync.md: Fix whitespace.
31700 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31702 PR tree-optimization/108697
31703 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
31704 not clear the vector on an out of range query.
31705 (ssa_cache::dump): Use dump_range_query instead of get_range.
31706 (ssa_cache::dump_range_query): New.
31707 (ssa_lazy_cache::dump_range_query): New.
31708 (ssa_lazy_cache::set_range): New.
31709 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
31710 (class ssa_lazy_cache): New.
31711 (ssa_lazy_cache::ssa_lazy_cache): New.
31712 (ssa_lazy_cache::~ssa_lazy_cache): New.
31713 (ssa_lazy_cache::get_range): New.
31714 (ssa_lazy_cache::clear_range): New.
31715 (ssa_lazy_cache::clear): New.
31716 (ssa_lazy_cache::dump): New.
31717 * gimple-range-path.cc (path_range_query::path_range_query): Do
31718 not allocate a ssa_cache object nor has_cache bitmap.
31719 (path_range_query::~path_range_query): Do not free objects.
31720 (path_range_query::clear_cache): Remove.
31721 (path_range_query::get_cache): Adjust.
31722 (path_range_query::set_cache): Remove.
31723 (path_range_query::dump): Don't call through a pointer.
31724 (path_range_query::internal_range_of_expr): Set cache directly.
31725 (path_range_query::reset_path): Clear cache directly.
31726 (path_range_query::ssa_range_in_phi): Fold with globals only.
31727 (path_range_query::compute_ranges_in_phis): Simply set range.
31728 (path_range_query::compute_ranges_in_block): Call cache directly.
31729 * gimple-range-path.h (class path_range_query): Replace bitmap
31730 and cache pointer with lazy cache object.
31731 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
31733 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31735 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
31736 (ssa_cache::~ssa_cache): Rename.
31737 (ssa_cache::has_range): New.
31738 (ssa_cache::get_range): Rename.
31739 (ssa_cache::set_range): Rename.
31740 (ssa_cache::clear_range): Rename.
31741 (ssa_cache::clear): Rename.
31742 (ssa_cache::dump): Rename and use get_range.
31743 (ranger_cache::get_global_range): Use get_range and set_range.
31744 (ranger_cache::range_of_def): Use get_range.
31745 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
31746 (class ranger_cache): Use ssa_cache.
31747 * gimple-range-path.cc (path_range_query::path_range_query): Use
31749 (path_range_query::get_cache): Use get_range.
31750 (path_range_query::set_cache): Use set_range.
31751 * gimple-range-path.h (class path_range_query): Use ssa_cache.
31752 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
31753 (assume_query::range_of_expr): Use get_range.
31754 (assume_query::assume_query): Use set_range.
31755 (assume_query::calculate_op): Use get_range and set_range.
31756 * gimple-range.h (class assume_query): Use ssa_cache.
31758 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31760 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
31761 and local to optionally zero memory.
31762 (br_vector::grow): Only zero memory if flag is set.
31763 (class sbr_lazy_vector): New.
31764 (sbr_lazy_vector::sbr_lazy_vector): New.
31765 (sbr_lazy_vector::set_bb_range): New.
31766 (sbr_lazy_vector::get_bb_range): New.
31767 (sbr_lazy_vector::bb_range_p): New.
31768 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
31769 * gimple-range-gori.cc (gori_map::calculate_gori): Use
31770 param_vrp_switch_limit.
31771 (gori_compute::gori_compute): Use param_vrp_switch_limit.
31772 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
31773 (vrp_switch_limit): Rename from evrp_switch_limit.
31774 (vrp_vector_threshold): New.
31776 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31778 * value-relation.cc (dom_oracle::query_relation): Check early for lack
31780 * value-relation.h (equiv_oracle::has_equiv_p): New.
31782 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31784 PR tree-optimization/109417
31785 * gimple-range-gori.cc (range_def_chain::register_dependency):
31786 Save the ssa version number, not the pointer.
31787 (gori_compute::may_recompute_p): No need to check if a dependency
31788 is in the free list.
31789 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
31790 fields to be unsigned int instead of trees.
31791 (ange_def_chain::depend1): Adjust.
31792 (ange_def_chain::depend2): Adjust.
31793 * gimple-range.h: Include "ssa.h" to inline ssa_name().
31795 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
31797 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
31798 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
31799 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
31801 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
31804 * config/riscv/riscv-protos.h: Add helper function stubs.
31805 * config/riscv/riscv.cc: Add helper functions for subword masking.
31806 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
31807 -mno-inline-atomics.
31808 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
31809 fetch_and_nand, CAS, and exchange ops.
31810 * doc/invoke.texi: Add blurb regarding new command-line flags
31811 -minline-atomics and -mno-inline-atomics.
31813 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31815 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
31816 Reimplement using standard RTL codes instead of unspec.
31817 (aarch64_rshrn2<mode>_insn_be): Likewise.
31818 (aarch64_rshrn2<mode>): Adjust for the above.
31819 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
31821 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31823 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
31824 with standard RTL codes instead of an UNSPEC.
31825 (aarch64_rshrn<mode>_insn_be): Likewise.
31826 (aarch64_rshrn<mode>): Adjust for the above.
31827 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
31829 2023-04-26 Pan Li <pan2.li@intel.com>
31830 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31832 * config/riscv/riscv.cc (riscv_classify_address): Allow
31833 const0_rtx for the RVV load/store.
31835 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31837 * range-op.cc (range_op_cast_tests): Remove legacy support.
31838 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
31839 * value-range.cc (irange::operator=): Same.
31840 (get_legacy_range): Same.
31841 (irange::copy_legacy_to_multi_range): Delete.
31842 (irange::copy_to_legacy): Delete.
31843 (irange::irange_set_anti_range): Delete.
31844 (irange::set): Remove legacy support.
31845 (irange::verify_range): Same.
31846 (irange::legacy_lower_bound): Delete.
31847 (irange::legacy_upper_bound): Delete.
31848 (irange::legacy_equal_p): Delete.
31849 (irange::operator==): Remove legacy support.
31850 (irange::singleton_p): Same.
31851 (irange::value_inside_range): Same.
31852 (irange::contains_p): Same.
31853 (intersect_ranges): Delete.
31854 (irange::legacy_intersect): Delete.
31855 (union_ranges): Delete.
31856 (irange::legacy_union): Delete.
31857 (irange::legacy_verbose_union_): Delete.
31858 (irange::legacy_verbose_intersect): Delete.
31859 (irange::irange_union): Remove legacy support.
31860 (irange::irange_intersect): Same.
31861 (irange::intersect): Same.
31862 (irange::invert): Same.
31863 (ranges_from_anti_range): Delete.
31864 (gt_pch_nx): Adjust for legacy removal.
31866 (range_tests_legacy): Delete.
31867 (range_tests_misc): Adjust for legacy removal.
31868 (range_tests): Same.
31869 * value-range.h (class irange): Same.
31870 (irange::legacy_mode_p): Delete.
31871 (ranges_from_anti_range): Delete.
31872 (irange::nonzero_p): Adjust for legacy removal.
31873 (irange::lower_bound): Same.
31874 (irange::upper_bound): Same.
31875 (irange::union_): Same.
31876 (irange::intersect): Same.
31877 (irange::set_nonzero): Same.
31878 (irange::set_zero): Same.
31879 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
31881 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31883 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
31884 of range_has_numeric_bounds_p with irange API.
31885 (range_has_numeric_bounds_p): Delete.
31886 * value-range.h (range_has_numeric_bounds_p): Delete.
31888 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31890 * tree-data-ref.cc (compute_distributive_range): Replace uses of
31891 range_int_cst_p with irange API.
31892 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
31893 * tree-vrp.h (range_int_cst_p): Delete.
31894 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
31895 range_int_cst_p with irange API.
31896 (vr_set_zero_nonzero_bits): Same.
31897 (range_fits_type_p): Same.
31898 (simplify_using_ranges::simplify_casted_cond): Same.
31899 * tree-vrp.cc (range_int_cst_p): Remove.
31901 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31903 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
31905 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31907 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
31908 API uses to new API.
31909 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
31910 * internal-fn.cc (get_min_precision): Same.
31912 * tree-affine.cc (expr_to_aff_combination): Same.
31913 * tree-data-ref.cc (dr_step_indicator): Same.
31914 * tree-dfa.cc (get_ref_base_and_extent): Same.
31915 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
31916 * tree-ssa-phiopt.cc (two_value_replacement): Same.
31917 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
31918 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
31919 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
31920 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
31921 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
31922 * tree.cc (get_range_pos_neg): Same.
31924 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31926 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
31927 vrange::dump instead of ad-hoc dumper.
31928 * tree-ssa-strlen.cc (dump_strlen_info): Same.
31929 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
31932 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31934 * range-op.cc (operator_cast::op1_range): Use
31935 create_possibly_reversed_range.
31936 (operator_bitwise_and::simple_op1_range_solver): Same.
31937 * value-range.cc (swap_out_of_order_endpoints): Delete.
31938 (irange::set): Remove call to swap_out_of_order_endpoints.
31940 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31942 * builtins.cc (determine_block_size): Convert use of legacy API to
31944 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
31945 (array_bounds_checker::check_array_ref): Same.
31946 * gimple-ssa-warn-restrict.cc
31947 (builtin_memref::extend_offset_range): Same.
31948 * ipa-cp.cc (ipcp_store_vr_results): Same.
31949 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
31950 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
31951 (ipa_write_jump_function): Same.
31952 * pointer-query.cc (get_size_range): Same.
31953 * tree-data-ref.cc (split_constant_offset): Same.
31954 * tree-ssa-strlen.cc (get_range): Same.
31955 (maybe_diag_stxncpy_trunc): Same.
31956 (strlen_pass::get_len_or_size): Same.
31957 (strlen_pass::count_nonzero_bytes_addr): Same.
31958 * tree-vect-patterns.cc (vect_get_range_info): Same.
31959 * value-range.cc (irange::maybe_anti_range): Remove.
31960 (get_legacy_range): New.
31961 (irange::copy_to_legacy): Use get_legacy_range.
31962 (ranges_from_anti_range): Same.
31963 * value-range.h (class irange): Remove maybe_anti_range.
31964 (get_legacy_range): New.
31965 * vr-values.cc (check_for_binary_op_overflow): Convert use of
31966 legacy API to get_legacy_range.
31967 (compare_ranges): Same.
31968 (compare_range_with_value): Same.
31969 (bounds_of_var_in_loop): Same.
31970 (find_case_label_ranges): Same.
31971 (simplify_using_ranges::simplify_switch_using_ranges): Same.
31973 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31975 * value-range-pretty-print.cc (vrange_printer::visit): Remove
31977 * value-range.cc (irange::constant_p): Remove.
31978 (irange::get_nonzero_bits_from_range): Remove constant_p use.
31979 * value-range.h (class irange): Remove constant_p.
31980 (irange::num_pairs): Remove constant_p use.
31982 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31984 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
31986 (irange::set): Same.
31987 (irange::legacy_lower_bound): Same.
31988 (irange::legacy_upper_bound): Same.
31989 (irange::contains_p): Same.
31990 (range_tests_legacy): Same.
31991 (irange::normalize_addresses): Remove.
31992 (irange::normalize_symbolics): Remove.
31993 (irange::symbolic_p): Remove.
31994 * value-range.h (class irange): Remove symbolic_p,
31995 normalize_symbolics, and normalize_addresses.
31996 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
31997 Remove symbolics support.
31999 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
32001 * value-range.cc (irange::may_contain_p): Remove.
32002 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
32003 usage with contains_p.
32004 * vr-values.cc (compare_range_with_value): Same.
32006 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
32008 * tree-vrp.cc (supported_types_p): Remove.
32009 (defined_ranges_p): Remove.
32010 (range_fold_binary_expr): Remove.
32011 (range_fold_unary_expr): Remove.
32012 * tree-vrp.h (range_fold_unary_expr): Remove.
32013 (range_fold_binary_expr): Remove.
32015 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
32017 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
32018 (ipa_value_range_from_jfunc): Same.
32019 (propagate_vr_across_jump_function): Same.
32020 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
32021 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
32022 * vr-values.cc (bounds_of_var_in_loop): Same.
32024 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
32026 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
32027 Add irange argument.
32028 (check_out_of_bounds_and_warn): Remove check for vr.
32029 (array_bounds_checker::check_array_ref): Remove pointer qualifier
32030 for vr and adjust accordingly.
32031 * gimple-array-bounds.h (get_value_range): Add irange argument.
32032 * value-query.cc (class equiv_allocator): Delete.
32033 (range_query::get_value_range): Delete.
32034 (range_query::range_query): Remove allocator access.
32035 (range_query::~range_query): Same.
32036 * value-query.h (get_value_range): Delete.
32038 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
32039 call to get_value_range.
32040 (check_for_binary_op_overflow): Same.
32041 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
32042 (simplify_using_ranges::simplify_abs_using_ranges): Same.
32043 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
32044 (simplify_using_ranges::simplify_casted_cond): Same.
32045 (simplify_using_ranges::simplify_switch_using_ranges): Same.
32046 (simplify_using_ranges::two_valued_val_range_p): Same.
32048 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
32051 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
32053 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
32054 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
32055 (simplify_using_ranges::legacy_fold_cond): ...this.
32056 (simplify_using_ranges::fold_cond): Rename
32057 vrp_evaluate_conditional_warnv_with_ops to
32058 legacy_fold_cond_overflow.
32059 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
32060 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
32061 legacy_fold_cond_overflow respectively.
32063 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
32065 * vr-values.cc (get_vr_for_comparison): Remove.
32066 (compare_name_with_value): Same.
32067 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
32068 compare_name_with_value.
32069 * vr-values.h: Remove compare_name_with_value.
32070 Remove get_vr_for_comparison.
32072 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
32074 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
32075 (bswapsi2): New define_insn.
32076 (swaphi): New define_insn to exchange two registers (swpw).
32077 (define_peephole2): Recognize exchange of registers as swaphi.
32079 2023-04-26 Richard Biener <rguenther@suse.de>
32081 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
32083 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
32084 * predict.cc (apply_return_prediction): Likewise.
32085 * sese.cc (set_ifsese_condition): Likewise. Simplify.
32086 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
32087 (make_edges_bb): Likewise.
32088 (make_cond_expr_edges): Likewise.
32089 (end_recording_case_labels): Likewise.
32090 (make_gimple_asm_edges): Likewise.
32091 (cleanup_dead_labels): Likewise.
32092 (group_case_labels): Likewise.
32093 (gimple_can_merge_blocks_p): Likewise.
32094 (gimple_merge_blocks): Likewise.
32095 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
32096 (gimple_duplicate_sese_tail): Avoid last_stmt.
32097 (find_loop_dist_alias): Likewise.
32098 (gimple_block_ends_with_condjump_p): Likewise.
32099 (gimple_purge_dead_eh_edges): Likewise.
32100 (gimple_purge_dead_abnormal_call_edges): Likewise.
32101 (pass_warn_function_return::execute): Likewise.
32102 (execute_fixup_cfg): Likewise.
32103 * tree-eh.cc (redirect_eh_edge_1): Likewise.
32104 (pass_lower_resx::execute): Likewise.
32105 (pass_lower_eh_dispatch::execute): Likewise.
32106 (cleanup_empty_eh): Likewise.
32107 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
32108 (predicate_bbs): Likewise.
32109 (ifcvt_split_critical_edges): Likewise.
32110 * tree-loop-distribution.cc (create_edge_for_control_dependence):
32112 (loop_distribution::transform_reduction_loop): Likewise.
32113 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
32114 (try_transform_to_exit_first_loop_alt): Likewise.
32115 (transform_to_exit_first_loop): Likewise.
32116 (create_parallel_loop): Likewise.
32117 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
32118 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
32119 (eliminate_unnecessary_stmts): Likewise.
32121 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
32123 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
32124 (pass_tree_ifcombine::execute): Likewise.
32125 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
32126 (should_duplicate_loop_header_p): Likewise.
32127 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
32128 (tree_estimate_loop_size): Likewise.
32129 (try_unroll_loop_completely): Likewise.
32130 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
32131 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
32132 (canonicalize_loop_ivs): Likewise.
32133 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
32134 (bound_difference): Likewise.
32135 (number_of_iterations_popcount): Likewise.
32136 (number_of_iterations_cltz): Likewise.
32137 (number_of_iterations_cltz_complement): Likewise.
32138 (simplify_using_initial_conditions): Likewise.
32139 (number_of_iterations_exit_assumptions): Likewise.
32140 (loop_niter_by_eval): Likewise.
32141 (estimate_numbers_of_iterations): Likewise.
32143 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32145 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
32147 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
32150 * config/rs6000/rs6000-builtins.def
32151 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
32152 __builtin_vsx_scalar_cmp_exp_qp_lt,
32153 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
32156 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
32159 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
32160 easy_vector_constant with const_vector_each_byte_same, add
32161 handlings in preparation for !easy_vector_constant, and update
32162 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
32163 * config/rs6000/predicates.md (const_vector_each_byte_same): New
32166 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32168 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
32169 (*pred_ltge<mode>_merge_tie_mask): Ditto.
32170 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
32171 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
32172 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
32173 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
32174 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
32176 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32178 * config/riscv/vector.md: Fix redundant vmv1r.v.
32180 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32182 * config/riscv/vector.md: Fix RA constraint.
32184 2023-04-26 Pan Li <pan2.li@intel.com>
32187 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
32188 check for vn_reference equal.
32190 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32192 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
32193 auto-vectorization preference.
32194 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
32195 auto-vectorization.
32196 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
32198 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
32200 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
32201 and bclridisi_nottwobits patterns.
32202 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
32203 predicate to avoid splitting arith constants.
32204 (const_nottwobits_not_arith_operand): New predicate.
32206 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
32208 * recog.cc (peep2_attempt, peep2_update_life): Correct
32209 head-comment description of parameter match_len.
32211 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
32213 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
32214 riscv_split_symbol() drop in_splitter arg.
32215 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
32216 riscv_split_symbol() drop in_splitter arg.
32217 riscv_force_temporary() drop in_splitter arg.
32218 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
32219 riscv_split_symbol() drop in_splitter arg.
32221 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
32223 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
32224 superfluous debug temporaries for single GIMPLE assignments.
32226 2023-04-25 Richard Biener <rguenther@suse.de>
32228 PR tree-optimization/109609
32229 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
32231 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
32232 the size given by arg_max_access_size_given_by_arg_p as
32233 maximum, not exact, size.
32235 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32238 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
32239 (orn<mode>3<vczle><vczbe>): ... This.
32240 (bic<mode>3): Rename to...
32241 (bic<mode>3<vczle><vczbe>): ... This.
32242 (<su><maxmin><mode>3): Rename to...
32243 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
32245 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32247 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
32248 * config/aarch64/iterators.md (VQDIV): New mode iterator.
32249 (vnx2di): New mode attribute.
32251 2023-04-25 Richard Biener <rguenther@suse.de>
32253 PR rtl-optimization/109585
32254 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
32256 2023-04-25 Jakub Jelinek <jakub@redhat.com>
32259 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
32260 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
32261 is larger than signed int maximum.
32263 2023-04-25 Martin Liska <mliska@suse.cz>
32265 * doc/gcov.texi: Document the new "calls" field and document
32266 the API bump. Mention also "block_ids" for lines.
32267 * gcov.cc (output_intermediate_json_line): Output info about
32268 calls and extend branches as well.
32269 (generate_results): Bump version to 2.
32270 (output_line_details): Use block ID instead of a non-sensual
32273 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
32275 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
32276 length attribute for the first (memory operand) alternative.
32278 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
32280 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
32281 * config/aarch64/constraints.md: Make "Umn" relaxed memory
32283 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
32285 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
32287 * value-range.cc (frange::set): Adjust constructor.
32288 * value-range.h (nan_state::nan_state): Replace default
32289 constructor with one taking an argument.
32291 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
32293 * ipa-cp.cc (ipa_range_contains_p): New.
32294 (decide_whether_version_node): Use it.
32296 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32298 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
32299 simplify two successive VEC_PERM_EXPRs with same VLA mask,
32300 where mask chooses elements in reverse order.
32302 2023-04-24 Andrew Pinski <apinski@marvell.com>
32304 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
32305 and support diamond shaped basic block form.
32306 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
32308 2023-04-24 Andrew Pinski <apinski@marvell.com>
32310 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
32311 Instead of calling last_and_only_stmt, look for the last statement
32314 2023-04-24 Andrew Pinski <apinski@marvell.com>
32316 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
32318 (match_simplify_replacement): Call
32319 empty_bb_or_one_feeding_into_p instead of doing it inline.
32321 2023-04-24 Andrew Pinski <apinski@marvell.com>
32323 PR tree-optimization/68894
32324 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
32325 continue for the do_hoist_loads diamond case.
32327 2023-04-24 Andrew Pinski <apinski@marvell.com>
32329 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
32330 code for better code readability.
32332 2023-04-24 Andrew Pinski <apinski@marvell.com>
32334 PR tree-optimization/109604
32335 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
32336 diamond form check from ...
32337 (minmax_replacement): Here.
32339 2023-04-24 Patrick Palka <ppalka@redhat.com>
32341 * tree.cc (strip_array_types): Don't define here.
32342 (is_typedef_decl): Don't define here.
32343 (typedef_variant_p): Don't define here.
32344 * tree.h (strip_array_types): Define here.
32345 (is_typedef_decl): Define here.
32346 (typedef_variant_p): Define here.
32348 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
32350 * doc/generic.texi (OpenMP): Add != to allowed
32351 conditions and state that vars can be unsigned.
32352 * tree.def (OMP_FOR): Likewise.
32354 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32356 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
32358 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
32360 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
32361 Remove explicit Solaris 11 references.
32363 (Options specification, --with-gnu-as): as and gas always differ
32365 Remove /usr/ccs/bin reference.
32366 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
32367 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
32368 (*-*-solaris2*): ... here.
32369 Update bundled GCC versions.
32370 Don't refer to pre-built binaries.
32371 Remove /bin/sh warning.
32372 Update assembler, linker recommendations.
32373 Document GNAT bootstrap compiler.
32374 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
32375 (sparc64-*-solaris2*): Move content...
32376 (sparcv9-*-solaris2*): ...here.
32377 Add GDC for 64-bit bootstrap compilers.
32379 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32382 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
32384 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
32387 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32389 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
32390 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
32391 (aarch64_<su>abal2<mode>): New define_expand.
32392 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
32393 (aarch64_rtx_costs): Handle ABD rtxes.
32394 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
32395 * config/aarch64/iterators.md (ABAL2): Delete.
32396 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
32398 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32400 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
32401 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
32402 (<sur>sadv16qi): Rename to...
32403 (<su>sadv16qi): ... This. Adjust for the above.
32404 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
32405 (<su>sad<vsi2qi>): ... This. Adjust for the above.
32406 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
32407 * config/aarch64/iterators.md (ABAL): Delete.
32408 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
32410 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32412 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
32413 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
32414 (aarch64_<su>abdl2<mode>): New define_expand.
32415 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
32416 * config/aarch64/iterators.md (ABDL2): Delete.
32417 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
32419 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32421 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
32422 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
32424 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
32425 * config/aarch64/iterators.md (ABDL): Delete.
32426 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
32428 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32430 * config/aarch64/aarch64-simd.md
32431 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
32433 2023-04-24 Richard Biener <rguenther@suse.de>
32435 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
32437 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
32439 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
32440 (set_switch_stmt_execution_predicate): Likewise.
32441 (phi_result_unknown_predicate): Likewise.
32442 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
32443 (ipa_analyze_indirect_call_uses): Likewise.
32444 * predict.cc (predict_iv_comparison): Likewise.
32445 (predict_extra_loop_exits): Likewise.
32446 (predict_loops): Likewise.
32447 (tree_predict_by_opcode): Likewise.
32448 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
32450 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
32451 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
32452 (replace_phi_edge_with_variable): Likewise.
32453 (two_value_replacement): Likewise.
32454 (value_replacement): Likewise.
32455 (minmax_replacement): Likewise.
32456 (spaceship_replacement): Likewise.
32457 (cond_removal_in_builtin_zero_pattern): Likewise.
32458 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
32459 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
32460 (vn_phi_lookup): Likewise.
32461 (vn_phi_insert): Likewise.
32462 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
32463 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
32465 (back_threader_profitability::possibly_profitable_path_p):
32467 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
32469 * tree-switch-conversion.cc (pass_convert_switch::execute):
32471 (pass_lower_switch<O0>::execute): Likewise.
32472 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
32473 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
32474 * tree-vect-slp.cc (vect_slp_function): Likewise.
32475 * tree-vect-stmts.cc (cfun_returns): Likewise.
32476 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
32477 (vect_loop_dist_alias_call): Likewise.
32479 2023-04-24 Richard Biener <rguenther@suse.de>
32481 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
32483 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32485 * config/riscv/riscv-vsetvl.cc
32486 (vector_infos_manager::all_avail_in_compatible_p): New function.
32487 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
32488 * config/riscv/riscv-vsetvl.h: New function.
32490 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32492 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
32493 comment for cleanup_insns.
32495 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32497 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
32498 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
32499 with the fault first load property.
32501 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32503 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
32504 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
32506 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32509 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
32510 (aarch64_addp<mode><vczle><vczbe>): ... This.
32512 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
32514 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
32515 provide reasonable values for common arithmetic operations and
32516 immediate operands (in several machine modes).
32518 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
32520 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
32521 format specifier to output high_part register name of SImode reg.
32522 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
32523 (zero_extendqihi2): Fix lengths, consistent formatting and add
32524 "and Rx,#255" alternative, for documentation purposes.
32525 (zero_extendhisi2): New define_insn.
32527 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
32529 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
32530 SImode shifts by two by performing a single bit SImode shift twice.
32532 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
32534 PR tree-optimization/109593
32535 * value-range.cc (frange::operator==): Handle NANs.
32537 2023-04-23 liuhongt <hongtao.liu@intel.com>
32539 PR rtl-optimization/108707
32540 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
32541 GENERAL_REGS when preferred reg_class is not known.
32543 2023-04-22 Andrew Pinski <apinski@marvell.com>
32545 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
32546 Change the code around slightly to move diamond
32547 handling for do_store_elim/do_hoist_loads out of
32550 2023-04-22 Andrew Pinski <apinski@marvell.com>
32552 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
32553 Remove check on empty_block_p.
32555 2023-04-22 Jakub Jelinek <jakub@redhat.com>
32557 PR bootstrap/109589
32558 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
32559 * realmpfr.h (class auto_mpfr): Likewise.
32561 2023-04-22 Jakub Jelinek <jakub@redhat.com>
32563 PR tree-optimization/109583
32564 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
32565 if vec_mode is not VECTOR_MODE_P.
32567 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
32568 Ondrej Kubanek <kubanek0ondrej@gmail.com>
32570 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
32571 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
32572 loop profile and bounds after header duplication.
32573 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
32574 Break out from try_peel_loop; fix handling of 0 iterations.
32575 (try_peel_loop): Use adjust_loop_info_after_peeling.
32577 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
32579 PR tree-optimization/109546
32580 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
32581 not fold conditions with ADDR_EXPR early.
32583 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32585 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
32586 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
32588 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
32589 (*aarch64_<optab><mode>3_zero): Define.
32590 (*aarch64_<optab><mode>3_cssc): Likewise.
32591 * config/aarch64/iterators.md (maxminand): New code attribute.
32593 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32596 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
32597 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
32599 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
32600 (aarch64_override_options_internal): Handle the above.
32601 (aarch64_output_load_tp): New function.
32602 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
32603 aarch64_output_load_tp.
32604 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
32605 (mtp=): New option.
32606 * doc/invoke.texi (AArch64 Options): Document -mtp=.
32608 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32611 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
32612 (add_vec_concat_subst_be): Likewise.
32615 (add<mode>3): Rename to...
32616 (add<mode>3<vczle><vczbe>): ... This.
32617 (sub<mode>3): Rename to...
32618 (sub<mode>3<vczle><vczbe>): ... This.
32619 (mul<mode>3): Rename to...
32620 (mul<mode>3<vczle><vczbe>): ... This.
32621 (and<mode>3): Rename to...
32622 (and<mode>3<vczle><vczbe>): ... This.
32623 (ior<mode>3): Rename to...
32624 (ior<mode>3<vczle><vczbe>): ... This.
32625 (xor<mode>3): Rename to...
32626 (xor<mode>3<vczle><vczbe>): ... This.
32627 * config/aarch64/iterators.md (VDZ): Define.
32629 2023-04-21 Patrick Palka <ppalka@redhat.com>
32631 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
32634 2023-04-21 Jan Hubicka <jh@suse.cz>
32636 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
32639 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
32641 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
32642 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
32644 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32646 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
32647 force_reg instead of copy_to_mode_reg.
32648 (aarch64_expand_vector_init): Likewise.
32650 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
32652 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
32653 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
32654 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
32655 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
32656 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
32657 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
32658 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
32659 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
32660 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
32661 * config/i386/predicates.md (index_register_operand):
32662 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
32663 * config/i386/i386.cc (ix86_legitimate_address_p): Use
32664 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
32665 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
32667 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32668 Ondrej Kubanek <kubanek0ondrej@gmail.com>
32670 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
32673 2023-04-21 Richard Biener <rguenther@suse.de>
32675 * is-a.h (safe_is_a): New.
32677 2023-04-21 Richard Biener <rguenther@suse.de>
32679 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
32680 (gphi_iterator::operator*): Likewise.
32682 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32683 Michal Jires <michal@jires.eu>
32685 * ipa-inline.cc (class inline_badness): New class.
32686 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
32688 (update_edge_key): Update.
32689 (lookup_recursive_calls): Likewise.
32690 (recursive_inlining): Likewise.
32691 (add_new_edges_to_heap): Likewise.
32692 (inline_small_functions): Likewise.
32694 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32696 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
32698 2023-04-21 Richard Biener <rguenther@suse.de>
32700 PR tree-optimization/109573
32701 * tree-vect-loop.cc (vectorizable_live_operation): Allow
32702 unhandled SSA copy as well. Demote assert to checking only.
32704 2023-04-21 Richard Biener <rguenther@suse.de>
32706 * df-core.cc (df_analyze): Compute RPO on the reverse graph
32707 for DF_BACKWARD problems.
32708 (loop_post_order_compute): Rename to ...
32709 (loop_rev_post_order_compute): ... this, compute a RPO.
32710 (loop_inverted_post_order_compute): Rename to ...
32711 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
32712 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
32713 problems, RPO on the inverted graph for DF_BACKWARD.
32715 2023-04-21 Richard Biener <rguenther@suse.de>
32717 * cfganal.h (inverted_rev_post_order_compute): Rename
32719 (inverted_post_order_compute): ... this. Add struct function
32720 argument, change allocation to a C array.
32721 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
32722 * lcm.cc (compute_antinout_edge): Adjust.
32723 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
32724 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
32725 * tree-ssa-pre.cc (compute_antic): Likewise.
32727 2023-04-21 Richard Biener <rguenther@suse.de>
32729 * df.h (df_d::postorder_inverted): Change back to int *,
32731 * df-core.cc (rest_of_handle_df_finish): Adjust.
32732 (df_analyze_1): Likewise.
32733 (df_analyze): For DF_FORWARD problems use RPO on the forward
32735 (loop_inverted_post_order_compute): Adjust API.
32736 (df_analyze_loop): Adjust.
32737 (df_get_n_blocks): Likewise.
32738 (df_get_postorder): Likewise.
32740 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32743 * config/riscv/riscv-vsetvl.cc
32744 (vector_infos_manager::all_empty_predecessor_p): New function.
32745 (pass_vsetvl::backward_demand_fusion): Ditto.
32746 * config/riscv/riscv-vsetvl.h: Ditto.
32748 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
32751 * config/riscv/generic.md: Change standard names to insn names.
32753 2023-04-21 Richard Biener <rguenther@suse.de>
32755 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
32756 (compute_laterin): Use RPO.
32757 (compute_available): Likewise.
32759 2023-04-21 Peng Fan <fanpeng@loongson.cn>
32761 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
32763 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32766 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
32767 (vector_insn_info::skip_avl_compatible_p): Ditto.
32768 (vector_insn_info::merge): Remove default value.
32769 (pass_vsetvl::compute_local_backward_infos): Ditto.
32770 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
32771 * config/riscv/riscv-vsetvl.h: Ditto.
32773 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
32775 * doc/extend.texi (Common Function Attributes): Remove duplicate
32778 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
32780 PR tree-optimization/109564
32781 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
32782 UNDEFINED range names when deciding if all PHI arguments are the same,
32784 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32786 PR tree-optimization/109011
32787 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
32788 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
32789 .CTZ (X) = PREC - .POPCOUNT (X | -X).
32791 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
32793 * lra-constraints.cc (match_reload): Exclude some hard regs for
32794 multi-reg inout reload pseudos used in asm in different mode.
32796 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
32798 * config/arm/arm.cc (thumb1_legitimate_address_p):
32799 Use VIRTUAL_REGISTER_P predicate.
32800 (arm_eliminable_register): Ditto.
32801 * config/avr/avr.md (push<mode>_1): Ditto.
32802 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
32803 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
32804 * config/i386/predicates.md (register_no_elim_operand): Ditto.
32805 * config/iq2000/predicates.md (call_insn_operand): Ditto.
32806 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
32808 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
32811 * config/i386/predicates.md (extract_operator): New predicate.
32812 * config/i386/i386.md (any_extract): Remove code iterator.
32813 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
32814 (*cmpqi_ext<mode>_1): Ditto.
32815 (*cmpqi_ext<mode>_2): Ditto.
32816 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
32817 (*cmpqi_ext<mode>_3): Ditto.
32818 (*cmpqi_ext<mode>_4): Ditto.
32819 (*extzvqi_mem_rex64): Ditto.
32821 (*insvqi_2): Ditto.
32822 (*extendqi<SWI24:mode>_ext_1): Ditto.
32823 (*addqi_ext<mode>_0): Ditto.
32824 (*addqi_ext<mode>_1): Ditto.
32825 (*addqi_ext<mode>_2): Ditto.
32826 (*subqi_ext<mode>_0): Ditto.
32827 (*subqi_ext<mode>_2): Ditto.
32828 (*testqi_ext<mode>_1): Ditto.
32829 (*testqi_ext<mode>_2): Ditto.
32830 (*andqi_ext<mode>_0): Ditto.
32831 (*andqi_ext<mode>_1): Ditto.
32832 (*andqi_ext<mode>_1_cc): Ditto.
32833 (*andqi_ext<mode>_2): Ditto.
32834 (*<any_or:code>qi_ext<mode>_0): Ditto.
32835 (*<any_or:code>qi_ext<mode>_1): Ditto.
32836 (*<any_or:code>qi_ext<mode>_2): Ditto.
32837 (*xorqi_ext<mode>_1_cc): Ditto.
32838 (*negqi_ext<mode>_2): Ditto.
32839 (*ashlqi_ext<mode>_2): Ditto.
32840 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
32842 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
32845 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
32846 <bitmanip_insn> as the type to allow for fine grained control of
32847 scheduling these insns.
32848 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
32850 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
32851 pcnt, signed and unsigned min/max.
32853 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32854 kito-cheng <kito.cheng@sifive.com>
32856 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
32858 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32859 kito-cheng <kito.cheng@sifive.com>
32862 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
32863 (pass_vsetvl::cleanup_insns): Fix bug.
32865 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
32867 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
32868 (ldexp<mode>3): Delete.
32869 (ldexp<mode>3<exec>): Change "B" to "A".
32871 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32872 Jonathan Wakely <jwakely@redhat.com>
32874 * tree.h (built_in_function_equal_p): New helper function.
32875 (fndecl_built_in_p): Turn into variadic template to support
32876 1 or more built_in_function arguments.
32877 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
32878 * gimplify.cc (goa_stabilize_expr): Likewise.
32879 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
32880 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
32881 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
32882 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
32883 cgraph_update_edges_for_call_stmt_node,
32884 cgraph_edge::verify_corresponds_to_fndecl,
32885 cgraph_node::verify_node): Likewise.
32886 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
32887 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
32888 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
32890 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32892 PR tree-optimization/109011
32893 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
32894 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
32895 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
32896 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
32897 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
32899 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
32901 2023-04-20 Richard Biener <rguenther@suse.de>
32903 * df-core.cc (rest_of_handle_df_initialize): Remove
32904 computation of df->postorder, df->postorder_inverted and
32907 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32909 * common/config/i386/i386-common.cc
32910 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
32911 (ix86_handle_option): Set AVX flag for VAES.
32912 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
32913 Add OPTION_MASK_ISA2_VAES_UNSET.
32914 (def_builtin): Share builtin between AES and VAES.
32915 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
32917 * config/i386/i386.md (aes): New isa attribute.
32918 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
32919 (aesenclast): Ditto.
32921 (aesdeclast): Ditto.
32922 * config/i386/vaesintrin.h: Remove redundant avx target push.
32923 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
32924 (_mm_aesdeclast_si128): Ditto.
32925 (_mm_aesenc_si128): Ditto.
32926 (_mm_aesenclast_si128): Ditto.
32928 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
32930 * config/i386/avx2intrin.h
32931 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
32932 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
32933 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
32934 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
32935 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
32936 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
32937 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
32938 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
32939 (_mm_reduce_add_epi16): New instrinsics.
32940 (_mm_reduce_mul_epi16): Ditto.
32941 (_mm_reduce_and_epi16): Ditto.
32942 (_mm_reduce_or_epi16): Ditto.
32943 (_mm_reduce_max_epi16): Ditto.
32944 (_mm_reduce_max_epu16): Ditto.
32945 (_mm_reduce_min_epi16): Ditto.
32946 (_mm_reduce_min_epu16): Ditto.
32947 (_mm256_reduce_add_epi16): Ditto.
32948 (_mm256_reduce_mul_epi16): Ditto.
32949 (_mm256_reduce_and_epi16): Ditto.
32950 (_mm256_reduce_or_epi16): Ditto.
32951 (_mm256_reduce_max_epi16): Ditto.
32952 (_mm256_reduce_max_epu16): Ditto.
32953 (_mm256_reduce_min_epi16): Ditto.
32954 (_mm256_reduce_min_epu16): Ditto.
32955 (_mm_reduce_add_epi8): Ditto.
32956 (_mm_reduce_mul_epi8): Ditto.
32957 (_mm_reduce_and_epi8): Ditto.
32958 (_mm_reduce_or_epi8): Ditto.
32959 (_mm_reduce_max_epi8): Ditto.
32960 (_mm_reduce_max_epu8): Ditto.
32961 (_mm_reduce_min_epi8): Ditto.
32962 (_mm_reduce_min_epu8): Ditto.
32963 (_mm256_reduce_add_epi8): Ditto.
32964 (_mm256_reduce_mul_epi8): Ditto.
32965 (_mm256_reduce_and_epi8): Ditto.
32966 (_mm256_reduce_or_epi8): Ditto.
32967 (_mm256_reduce_max_epi8): Ditto.
32968 (_mm256_reduce_max_epu8): Ditto.
32969 (_mm256_reduce_min_epi8): Ditto.
32970 (_mm256_reduce_min_epu8): Ditto.
32971 * config/i386/avx512vlbwintrin.h:
32972 (_mm_mask_reduce_add_epi16): Ditto.
32973 (_mm_mask_reduce_mul_epi16): Ditto.
32974 (_mm_mask_reduce_and_epi16): Ditto.
32975 (_mm_mask_reduce_or_epi16): Ditto.
32976 (_mm_mask_reduce_max_epi16): Ditto.
32977 (_mm_mask_reduce_max_epu16): Ditto.
32978 (_mm_mask_reduce_min_epi16): Ditto.
32979 (_mm_mask_reduce_min_epu16): Ditto.
32980 (_mm256_mask_reduce_add_epi16): Ditto.
32981 (_mm256_mask_reduce_mul_epi16): Ditto.
32982 (_mm256_mask_reduce_and_epi16): Ditto.
32983 (_mm256_mask_reduce_or_epi16): Ditto.
32984 (_mm256_mask_reduce_max_epi16): Ditto.
32985 (_mm256_mask_reduce_max_epu16): Ditto.
32986 (_mm256_mask_reduce_min_epi16): Ditto.
32987 (_mm256_mask_reduce_min_epu16): Ditto.
32988 (_mm_mask_reduce_add_epi8): Ditto.
32989 (_mm_mask_reduce_mul_epi8): Ditto.
32990 (_mm_mask_reduce_and_epi8): Ditto.
32991 (_mm_mask_reduce_or_epi8): Ditto.
32992 (_mm_mask_reduce_max_epi8): Ditto.
32993 (_mm_mask_reduce_max_epu8): Ditto.
32994 (_mm_mask_reduce_min_epi8): Ditto.
32995 (_mm_mask_reduce_min_epu8): Ditto.
32996 (_mm256_mask_reduce_add_epi8): Ditto.
32997 (_mm256_mask_reduce_mul_epi8): Ditto.
32998 (_mm256_mask_reduce_and_epi8): Ditto.
32999 (_mm256_mask_reduce_or_epi8): Ditto.
33000 (_mm256_mask_reduce_max_epi8): Ditto.
33001 (_mm256_mask_reduce_max_epu8): Ditto.
33002 (_mm256_mask_reduce_min_epi8): Ditto.
33003 (_mm256_mask_reduce_min_epu8): Ditto.
33005 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
33007 * common/config/i386/i386-common.cc
33008 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
33009 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
33010 (OPTION_MASK_ISA_AVX_UNSET):
33011 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
33012 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
33013 * config/i386/i386.md (vpclmulqdqvl): New.
33014 * config/i386/sse.md (pclmulqdq): Add evex encoding.
33015 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
33018 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
33020 * config/i386/avx512vlbwintrin.h
33021 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
33022 (_mm_mask_blend_epi8): Ditto.
33023 (_mm256_mask_blend_epi16): Ditto.
33024 (_mm256_mask_blend_epi8): Ditto.
33025 * config/i386/avx512vlintrin.h
33026 (_mm256_mask_blend_pd): Ditto.
33027 (_mm256_mask_blend_ps): Ditto.
33028 (_mm256_mask_blend_epi64): Ditto.
33029 (_mm256_mask_blend_epi32): Ditto.
33030 (_mm_mask_blend_pd): Ditto.
33031 (_mm_mask_blend_ps): Ditto.
33032 (_mm_mask_blend_epi64): Ditto.
33033 (_mm_mask_blend_epi32): Ditto.
33034 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
33035 (VF_AVX512HFBFVL): Move it before the first usage.
33036 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
33037 to VF_AVX512HFBFVL.
33039 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
33041 * common/config/i386/i386-common.cc
33042 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
33043 to OPTION_MASK_ISA_AVX512BW_SET.
33044 (OPTION_MASK_ISA_AVX512F_UNSET):
33045 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
33046 (OPTION_MASK_ISA_AVX512BW_UNSET):
33047 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
33048 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
33049 * config/i386/avx512vbmi2vlintrin.h: Ditto.
33050 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
33051 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
33052 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
33053 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
33055 (compressstore<mode>_mask): Ditto.
33056 (expand<mode>_mask): Ditto.
33057 (expand<mode>_maskz): Ditto.
33058 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
33059 VI12_VI48F_AVX512VL.
33061 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
33063 * common/config/i386/i386-common.cc
33064 (OPTION_MASK_ISA_AVX512BITALG_SET):
33065 Change OPTION_MASK_ISA_AVX512F_SET
33066 to OPTION_MASK_ISA_AVX512BW_SET.
33067 (OPTION_MASK_ISA_AVX512F_UNSET):
33068 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
33069 (OPTION_MASK_ISA_AVX512BW_UNSET):
33070 Add OPTION_MASK_ISA_AVX512BITALG_SET.
33071 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
33072 * config/i386/i386-builtin.def:
33073 Remove redundant OPTION_MASK_ISA_AVX512BW.
33074 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
33075 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
33076 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
33078 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
33080 * config/i386/i386-expand.cc
33081 (ix86_check_builtin_isa_match): Correct wrong comments.
33082 Add a new macro SHARE_BUILTIN and refactor the current if
33085 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
33087 * config/i386/cpuid.h: Open a new section for Extended Features
33088 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
33091 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
33093 * config/i386/sse.md: Modify insn vperm{i,f}
33096 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
33098 * config/xtensa/xtensa-opts.h: New header.
33099 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
33100 xtensa_strict_align.
33101 * config/xtensa/xtensa.cc (xtensa_option_override): When
33102 -m[no-]strict-align is not specified in the command line set
33103 xtensa_strict_align to 0 if the hardware supports both unaligned
33104 loads and stores or to 1 otherwise.
33105 * config/xtensa/xtensa.opt (mstrict-align): New option.
33106 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
33108 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
33110 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
33113 2023-04-19 Andrew Pinski <apinski@marvell.com>
33115 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
33117 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33119 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
33120 (VECTOR_BOOL_MODE): Ditto.
33121 (ADJUST_NUNITS): Ditto.
33122 (ADJUST_ALIGNMENT): Ditto.
33123 (ADJUST_BYTESIZE): Ditto.
33124 (ADJUST_PRECISION): Ditto.
33125 (RVV_MODES): Ditto.
33126 (VECTOR_MODE_WITH_PREFIX): Ditto.
33127 * config/riscv/riscv-v.cc (ENTRY): Ditto.
33128 (get_vlmul): Ditto.
33129 (get_ratio): Ditto.
33130 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
33131 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
33132 (vbool64_t): Ditto.
33133 (vbool32_t): Ditto.
33134 (vbool16_t): Ditto.
33139 (vint8mf8_t): Ditto.
33140 (vuint8mf8_t): Ditto.
33141 (vint8mf4_t): Ditto.
33142 (vuint8mf4_t): Ditto.
33143 (vint8mf2_t): Ditto.
33144 (vuint8mf2_t): Ditto.
33145 (vint8m1_t): Ditto.
33146 (vuint8m1_t): Ditto.
33147 (vint8m2_t): Ditto.
33148 (vuint8m2_t): Ditto.
33149 (vint8m4_t): Ditto.
33150 (vuint8m4_t): Ditto.
33151 (vint8m8_t): Ditto.
33152 (vuint8m8_t): Ditto.
33153 (vint16mf4_t): Ditto.
33154 (vuint16mf4_t): Ditto.
33155 (vint16mf2_t): Ditto.
33156 (vuint16mf2_t): Ditto.
33157 (vint16m1_t): Ditto.
33158 (vuint16m1_t): Ditto.
33159 (vint16m2_t): Ditto.
33160 (vuint16m2_t): Ditto.
33161 (vint16m4_t): Ditto.
33162 (vuint16m4_t): Ditto.
33163 (vint16m8_t): Ditto.
33164 (vuint16m8_t): Ditto.
33165 (vint32mf2_t): Ditto.
33166 (vuint32mf2_t): Ditto.
33167 (vint32m1_t): Ditto.
33168 (vuint32m1_t): Ditto.
33169 (vint32m2_t): Ditto.
33170 (vuint32m2_t): Ditto.
33171 (vint32m4_t): Ditto.
33172 (vuint32m4_t): Ditto.
33173 (vint32m8_t): Ditto.
33174 (vuint32m8_t): Ditto.
33175 (vint64m1_t): Ditto.
33176 (vuint64m1_t): Ditto.
33177 (vint64m2_t): Ditto.
33178 (vuint64m2_t): Ditto.
33179 (vint64m4_t): Ditto.
33180 (vuint64m4_t): Ditto.
33181 (vint64m8_t): Ditto.
33182 (vuint64m8_t): Ditto.
33183 (vfloat32mf2_t): Ditto.
33184 (vfloat32m1_t): Ditto.
33185 (vfloat32m2_t): Ditto.
33186 (vfloat32m4_t): Ditto.
33187 (vfloat32m8_t): Ditto.
33188 (vfloat64m1_t): Ditto.
33189 (vfloat64m2_t): Ditto.
33190 (vfloat64m4_t): Ditto.
33191 (vfloat64m8_t): Ditto.
33192 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
33193 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
33194 (riscv_convert_vector_bits): Ditto.
33195 * config/riscv/riscv.md:
33196 * config/riscv/vector-iterators.md:
33197 * config/riscv/vector.md
33198 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
33199 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
33200 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
33201 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
33202 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
33203 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
33204 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
33205 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
33206 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
33208 2023-04-19 Pan Li <pan2.li@intel.com>
33210 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
33211 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
33213 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
33217 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
33218 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
33219 for operand 0. Use any_extract code iterator.
33220 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
33221 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
33222 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
33223 (*cmpqi_ext<mode>_1): Use general_operand predicate
33224 for operand 1. Use any_extract code iterator.
33225 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
33226 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
33228 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33230 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
33231 (aarch64_uaddw2<mode>): Delete.
33232 (aarch64_ssubw2<mode>): Delete.
33233 (aarch64_usubw2<mode>): Delete.
33234 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
33236 2023-04-19 Richard Biener <rguenther@suse.de>
33238 * tree-ssa-structalias.cc (do_ds_constraint): Use
33239 solve_add_graph_edge.
33241 2023-04-19 Richard Biener <rguenther@suse.de>
33243 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
33245 (do_sd_constraint): ... here.
33247 2023-04-19 Richard Biener <rguenther@suse.de>
33249 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
33250 rejecting the merge when A contains only a non-local label.
33252 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
33254 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
33255 (VIRTUAL_REGISTER_NUM_P): Ditto.
33256 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
33257 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
33258 * function.cc (instantiate_decl_rtl): Ditto.
33259 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
33260 (nonzero_address_p): Ditto.
33261 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
33263 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
33265 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
33267 2023-04-19 Richard Biener <rguenther@suse.de>
33269 * system.h (auto_mpz::operator->()): New.
33270 * realmpfr.h (auto_mpfr::operator->()): New.
33271 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
33272 * real.cc (real_from_string): Likewise.
33273 (dconst_e_ptr): Likewise.
33274 (dconst_sqrt2_ptr): Likewise.
33275 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
33277 (bound_difference_of_offsetted_base): Likewise.
33278 (number_of_iterations_ne): Likewise.
33279 (number_of_iterations_lt_to_ne): Likewise.
33280 * ubsan.cc: Include realmpfr.h.
33281 (ubsan_instrument_float_cast): Use auto_mpfr.
33283 2023-04-19 Richard Biener <rguenther@suse.de>
33285 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
33286 edges, remove edges from escaped after special-casing them.
33288 2023-04-19 Richard Biener <rguenther@suse.de>
33290 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
33293 2023-04-19 Richard Biener <rguenther@suse.de>
33295 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
33296 to the LHS varinfo solution member.
33298 2023-04-19 Richard Biener <rguenther@suse.de>
33300 * tree-ssa-structalias.cc (topo_visit): Look at the real
33301 destination of edges.
33303 2023-04-19 Richard Biener <rguenther@suse.de>
33305 PR tree-optimization/44794
33306 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
33307 If an epilogue loop is required set its iteration upper bound.
33309 2023-04-19 Xi Ruoyao <xry111@xry111.site>
33312 * config/loongarch/loongarch-protos.h
33313 (loongarch_expand_block_move): Add a parameter as alignment RTX.
33314 * config/loongarch/loongarch.h:
33315 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
33316 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
33317 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
33318 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
33319 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
33320 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
33321 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
33322 Take the alignment from the parameter, but set it to
33323 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
33324 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
33325 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
33326 (loongarch_block_move_straight): When there are left-over bytes,
33327 half the mode size instead of falling back to byte mode at once.
33328 (loongarch_block_move_loop): Limit the length of loop body with
33329 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
33330 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
33331 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
33332 to loongarch_expand_block_move.
33334 2023-04-19 Xi Ruoyao <xry111@xry111.site>
33336 * config/loongarch/loongarch.cc
33337 (loongarch_setup_incoming_varargs): Don't save more GARs than
33338 cfun->va_list_gpr_size / UNITS_PER_WORD.
33340 2023-04-19 Richard Biener <rguenther@suse.de>
33342 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
33343 no epilogue condition.
33345 2023-04-19 Richard Biener <rguenther@suse.de>
33347 * gimple.h (gimple_assign_load): Outline...
33348 * gimple.cc (gimple_assign_load): ... here. Avoid
33349 get_base_address and instead just strip the outermost
33350 handled component, treating a remaining handled component
33353 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33355 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
33357 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
33359 2023-04-19 Jakub Jelinek <jakub@redhat.com>
33361 PR tree-optimization/109011
33362 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
33363 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
33364 CLZ, CTZ and FFS. Remove vargs variable, use
33365 gimple_build_call_internal rather than gimple_build_call_internal_vec.
33366 (vect_vect_recog_func_ptrs): Adjust popcount entry.
33368 2023-04-19 Jakub Jelinek <jakub@redhat.com>
33371 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
33372 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
33373 a new REG rather than the SUBREG.
33375 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
33377 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
33380 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33383 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
33384 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
33386 2023-04-19 Richard Biener <rguenther@suse.de>
33388 PR rtl-optimization/109237
33389 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
33390 TREE_VISITED on INSN_VAR_LOCATION_DECL.
33391 (delete_trivially_dead_insns): Maintain TREE_VISITED on
33392 active debug bind INSN_VAR_LOCATION_DECL.
33394 2023-04-19 Richard Biener <rguenther@suse.de>
33396 PR rtl-optimization/109237
33397 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
33399 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
33401 * doc/install.texi (enable-decimal-float): Add AArch64.
33403 2023-04-19 liuhongt <hongtao.liu@intel.com>
33405 PR rtl-optimization/109351
33406 * ira.cc (setup_class_subset_and_memory_move_costs): Check
33407 hard_regno_mode_ok before setting lowest memory move cost for
33408 the mode with different reg classes.
33410 2023-04-18 Jason Merrill <jason@redhat.com>
33412 * doc/invoke.texi: Remove stray @gol.
33414 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33416 * ifcvt.cc (cond_move_process_if_block): Consider the result of
33417 targetm.noce_conversion_profitable_p() when replacing the original
33418 sequence with the converted one.
33420 2023-04-18 Mark Harmstone <mark@harmstone.com>
33422 * common.opt (gcodeview): Add new option.
33423 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
33424 * opts.cc (command_handle_option): Similarly.
33425 * doc/invoke.texi: Add documentation for -gcodeview.
33427 2023-04-18 Andrew Pinski <apinski@marvell.com>
33429 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
33430 (make_pass_phiopt): Make execute out of line.
33431 (tree_ssa_cs_elim): Move code into ...
33432 (pass_cselim::execute): here.
33434 2023-04-18 Sam James <sam@gentoo.org>
33436 * system.h: Drop unused INCLUDE_PTHREAD_H.
33438 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
33440 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
33443 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
33445 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
33446 (bswapdi2, bswapsi2): Similarly.
33448 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
33451 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
33452 Use CODE_FOR_sse4_1_insertps_v4sf.
33453 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
33454 (expand_vec_perm_1): Call expand_vec_per_insertps.
33455 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
33456 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
33457 (@sse4_1_insertps_<mode>): New insn pattern.
33458 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
33459 pattern from sse4_1_insertps using VI4F_128 mode iterator.
33461 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33463 * value-range.cc (gt_ggc_mx): New.
33465 * value-range.h (class vrange): Add GTY marker.
33466 (class frange): Same.
33467 (gt_ggc_mx): Remove.
33468 (gt_pch_nx): Remove.
33470 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
33472 * lra-constraints.cc (constraint_unique): New.
33473 (process_address_1): Apply constraint_unique test.
33474 * recog.cc (constrain_operands): Allow relaxed memory
33477 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
33479 * doc/extend.texi (Target Builtins): Add RISC-V Vector
33481 (RISC-V Vector Intrinsics): Document GCC implemented which
33482 version of RISC-V vector intrinsics and its reference.
33484 2023-04-18 Richard Biener <rguenther@suse.de>
33486 PR middle-end/108786
33487 * bitmap.h (bitmap_clear_first_set_bit): New.
33488 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
33489 bitmap_first_set_bit and add optional clearing of the bit.
33490 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
33491 (bitmap_clear_first_set_bit): Likewise.
33492 * df-core.cc (df_worklist_dataflow_doublequeue): Use
33493 bitmap_clear_first_set_bit.
33494 * graphite-scop-detection.cc (scop_detection::merge_sese):
33496 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
33497 (sanitize_asan_mark_poison): Likewise.
33498 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
33499 * tree-into-ssa.cc (rewrite_blocks): Likewise.
33500 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
33501 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
33503 2023-04-18 Richard Biener <rguenther@suse.de>
33505 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
33506 (dump_sa_points_to_info): ... this function.
33507 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
33508 and call dump_sa_stats guarded with TDF_STATS.
33509 (ipa_pta_execute): Likewise.
33510 (compute_may_aliases): Guard dump_alias_info with
33511 TDF_DETAILS|TDF_ALIAS.
33513 2023-04-18 Andrew Pinski <apinski@marvell.com>
33515 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
33516 the expression that is being tried when TDF_FOLDING
33518 (phiopt_worker::match_simplify_replacement): Dump
33519 the sequence which was created by gimple_simplify_phiopt
33520 when TDF_FOLDING is true.
33522 2023-04-18 Andrew Pinski <apinski@marvell.com>
33524 * tree-ssa-phiopt.cc (match_simplify_replacement):
33525 Simplify code that does the movement slightly.
33527 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33529 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
33531 (rev16<mode>2): Rename to...
33532 (aarch64_rev16<mode>2_alt1): ... This.
33533 (rev16<mode>2_alt): Rename to...
33534 (*aarch64_rev16<mode>2_alt2): ... This.
33536 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33538 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
33539 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
33541 * range-op-float.cc (zero_range): Use dconstm0.
33542 (zero_to_inf_range): Same.
33543 * real.h (dconstm0): New.
33544 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
33545 (frange::set_zero): Do not declare dconstm0.
33547 2023-04-18 Richard Biener <rguenther@suse.de>
33549 * system.h (class auto_mpz): New,
33550 * realmpfr.h (class auto_mpfr): Likewise.
33551 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
33552 (do_mpfr_arg2): Likewise.
33553 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
33555 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33557 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
33558 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
33560 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33562 * value-range.cc (frange::operator==): Adjust for NAN.
33563 (range_tests_nan): Remove some NAN tests.
33565 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33567 * inchash.cc (hash::add_real_value): New.
33568 * inchash.h (class hash): Add add_real_value.
33569 * value-range.cc (add_vrange): New.
33570 * value-range.h (inchash::add_vrange): New.
33572 2023-04-18 Richard Biener <rguenther@suse.de>
33574 PR tree-optimization/109539
33575 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
33576 Re-implement pointer relatedness for PHIs.
33578 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
33580 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
33581 (SV_FP): New iterator.
33582 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
33583 (recip<mode>2): Unify the two patterns using SV_FP.
33584 (div_scale<mode><exec_vcc>): New insn.
33585 (div_fmas<mode><exec>): New insn.
33586 (div_fixup<mode><exec>): New insn.
33587 (div<mode>3): Unify the two expanders and rewrite using hardfp.
33588 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
33589 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
33590 and UNSPEC_DIV_FIXUP.
33591 (vccwait): New attribute.
33593 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33595 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
33596 if the argument matches that.
33598 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33600 * config/aarch64/atomics.md
33601 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
33602 Use SD_HSDI for destination mode iterator.
33604 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
33606 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
33607 of z-extensions and s-extensions.
33608 (riscv_subset_list::parse): Likewise.
33610 2023-04-18 Jakub Jelinek <jakub@redhat.com>
33612 PR tree-optimization/109240
33613 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
33614 first vec_perm operand and minus as second using fneg/fadd and
33615 minus as first vec_perm operand and plus as second using fneg/fsub.
33617 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33619 * data-streamer.cc (bp_pack_real_value): New.
33620 (bp_unpack_real_value): New.
33621 * data-streamer.h (bp_pack_real_value): New.
33622 (bp_unpack_real_value): New.
33623 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
33624 bp_unpack_real_value.
33625 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
33626 bp_pack_real_value.
33628 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33630 * wide-int.h (WIDE_INT_MAX_HWIS): New.
33631 (class fixed_wide_int_storage): Use it.
33632 (trailing_wide_ints <N>::set_precision): Use it.
33633 (trailing_wide_ints <N>::extra_size): Use it.
33635 2023-04-18 Xi Ruoyao <xry111@xry111.site>
33637 * config/loongarch/loongarch-protos.h
33638 (loongarch_addu16i_imm12_operand_p): New function prototype.
33639 (loongarch_split_plus_constant): Likewise.
33640 * config/loongarch/loongarch.cc
33641 (loongarch_addu16i_imm12_operand_p): New function.
33642 (loongarch_split_plus_constant): Likewise.
33643 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
33644 (DUAL_IMM12_OPERAND): Likewise.
33645 (DUAL_ADDU16I_OPERAND): Likewise.
33646 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
33648 * config/loongarch/predicates.md (const_dual_imm12_operand): New
33650 (const_addu16i_operand): Likewise.
33651 (const_addu16i_imm12_di_operand): Likewise.
33652 (const_addu16i_imm12_si_operand): Likewise.
33653 (plus_di_operand): Likewise.
33654 (plus_si_operand): Likewise.
33655 (plus_si_extend_operand): Likewise.
33656 * config/loongarch/loongarch.md (add<mode>3): Convert to
33657 define_insn_and_split. Use plus_<mode>_operand predicate
33658 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
33659 and Le constraints.
33660 (*addsi3_extended): Convert to define_insn_and_split. Use
33661 plus_si_extend_operand instead of arith_operand. Add
33662 alternatives for La and Le alternatives.
33664 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33666 * value-range.h (Value_Range::Value_Range): New.
33667 (Value_Range::contains_p): New.
33669 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33671 * value-range.h (class vrange): Make m_discriminator const.
33672 (class irange): Make m_max_ranges const. Adjust constructors
33674 (class unsupported_range): Construct vrange appropriately.
33675 (class frange): Same.
33677 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
33679 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
33682 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
33684 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
33686 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
33688 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
33690 (riscv_expand_epilogue): Likewise.
33692 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
33694 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
33696 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
33698 2023-04-17 Andrew Pinski <apinski@marvell.com>
33700 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
33703 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
33705 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
33708 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
33710 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
33711 parameter remaining_size.
33712 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
33713 (riscv_expand_prologue): Likewise.
33714 (riscv_expand_epilogue): Likewise.
33716 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
33718 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
33719 roriw for constant counts.
33720 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
33721 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
33722 (simplify_context::simplify_binary_operation_1): Use it.
33723 * expmed.cc (expand_shift_1): Likewise.
33725 2023-04-17 Martin Jambor <mjambor@suse.cz>
33729 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
33730 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
33731 (ipa_zap_jf_refdesc): New function.
33732 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
33733 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
33734 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
33735 the new parameter of find_reference.
33736 (adjust_references_in_caller): Likewise. Make sure the constant jump
33737 function is not used to decrement a refdec counter again. Only
33738 decrement refdesc counters when the pass_through jump function allows
33739 it. Added a detailed dump when decrementing refdesc counters.
33740 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
33741 (ipa_set_jf_simple_pass_through): Initialize the new flag.
33742 (ipa_set_jf_unary_pass_through): Likewise.
33743 (ipa_set_jf_arith_pass_through): Likewise.
33744 (remove_described_reference): Provide a value for the new parameter of
33746 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
33747 the previous pass_through had a flag mandating that we do so.
33748 (propagate_controlled_uses): Likewise. Only decrement refdesc
33749 counters when the pass_through jump function allows it.
33750 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
33751 parameter of find_reference.
33752 (ipa_write_jump_function): Assert the new flag does not have to be
33754 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
33757 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
33758 Di Zhao <di.zhao@amperecomputing.com>
33760 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
33761 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
33762 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
33763 Check for the above tuning option when processing loads.
33765 2023-04-17 Richard Biener <rguenther@suse.de>
33767 PR tree-optimization/109524
33768 * tree-vrp.cc (remove_unreachable::m_list): Change to a
33769 vector of pairs of block indices.
33770 (remove_unreachable::maybe_register_block): Adjust.
33771 (remove_unreachable::remove_and_update_globals): Likewise.
33772 Deal with removed blocks.
33774 2023-04-16 Jeff Law <jlaw@ventanamicro>
33777 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
33778 TARGET_SFB_ALU, force the true arm into a register.
33780 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
33783 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
33784 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
33786 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
33787 (pa_function_arg_size): Change return type to int. Return zero
33788 for arguments larger than 1 GB. Update comments.
33790 2023-04-15 Jakub Jelinek <jakub@redhat.com>
33792 PR tree-optimization/109154
33793 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
33794 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
33796 2023-04-15 Jason Merrill <jason@redhat.com>
33799 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
33800 Overhaul lhs_ref.ref analysis.
33802 2023-04-14 Richard Biener <rguenther@suse.de>
33804 PR tree-optimization/109502
33805 * tree-vect-stmts.cc (vectorizable_assignment): Fix
33806 check for conversion between mask and non-mask types.
33808 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
33809 Jakub Jelinek <jakub@redhat.com>
33813 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
33814 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
33815 smaller than word_mode.
33816 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
33817 <case AND>: Likewise.
33819 2023-04-14 Jakub Jelinek <jakub@redhat.com>
33821 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
33824 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
33826 PR tree-optimization/108139
33827 PR tree-optimization/109462
33828 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
33829 equivalency check for PHI nodes.
33830 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
33831 does not dominate single-arg equivalency edges.
33833 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
33836 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
33837 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
33839 2023-04-13 Richard Biener <rguenther@suse.de>
33841 PR tree-optimization/109491
33842 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
33843 NULL operands test.
33845 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33848 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
33849 (vint16mf4_t): Ditto.
33850 (vint32mf2_t): Ditto.
33851 (vint64m1_t): Ditto.
33852 (vint64m2_t): Ditto.
33853 (vint64m4_t): Ditto.
33854 (vint64m8_t): Ditto.
33855 (vuint8mf8_t): Ditto.
33856 (vuint16mf4_t): Ditto.
33857 (vuint32mf2_t): Ditto.
33858 (vuint64m1_t): Ditto.
33859 (vuint64m2_t): Ditto.
33860 (vuint64m4_t): Ditto.
33861 (vuint64m8_t): Ditto.
33862 (vfloat32mf2_t): Ditto.
33863 (vbool64_t): Ditto.
33864 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
33865 (register_vector_type): Ditto.
33866 (check_required_extensions): Fix condition.
33867 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
33868 (RVV_REQUIRE_ELEN_64): New define.
33869 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
33870 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
33871 (TARGET_VECTOR_FP64): Ditto.
33872 (ENTRY): Fix predicate.
33873 * config/riscv/vector-iterators.md: Fix predicate.
33875 2023-04-12 Jakub Jelinek <jakub@redhat.com>
33877 PR tree-optimization/109410
33878 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
33879 block if first statement of the function is a call to returns_twice
33882 2023-04-12 Jakub Jelinek <jakub@redhat.com>
33885 * config/i386/i386.cc: Include rtl-error.h.
33886 (ix86_print_operand): For z modifier warning, use warning_for_asm
33887 if this_is_asm_operands. For Z modifier errors, use %c and code
33888 instead of hardcoded Z.
33890 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
33892 * config/i386/x-mingw32-utf8: Remove extrataneous $@
33894 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
33896 PR tree-optimization/109462
33897 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
33898 check for equivalences if NAME is a phi node.
33900 2023-04-12 Richard Biener <rguenther@suse.de>
33902 PR tree-optimization/109473
33903 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
33904 Convert scalar result to the computation type before performing
33905 the reduction adjustment.
33907 2023-04-12 Richard Biener <rguenther@suse.de>
33909 PR tree-optimization/109469
33910 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
33911 a returns-twice call.
33913 2023-04-12 Richard Biener <rguenther@suse.de>
33915 PR tree-optimization/109434
33916 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
33917 handle possibly throwing calls when processing the LHS
33918 and may-defs are not OK.
33920 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
33922 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
33923 predicate to avoid splitting arith constants.
33925 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
33926 Pan Li <pan2.li@intel.com>
33927 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33928 Kito Cheng <kito.cheng@sifive.com>
33931 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
33932 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
33933 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
33934 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
33935 (riscv_zero_call_used_regs): New.
33936 (TARGET_ZERO_CALL_USED_REGS): New.
33938 2023-04-11 Martin Liska <mliska@suse.cz>
33941 * opts.cc (finish_options): Drop also
33942 x_flag_var_tracking_assignments.
33944 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
33946 PR tree-optimization/108888
33947 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
33949 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
33952 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
33953 (vsx_sign_extend_v16qi_<mode>): ... this.
33954 (vsx_sign_extend_hi_<mode>): Rename to...
33955 (vsx_sign_extend_v8hi_<mode>): ... this.
33956 (vsx_sign_extend_si_v2di): Rename to...
33957 (vsx_sign_extend_v4si_v2di): ... this.
33958 (vsignextend_qi_<mode>): Remove.
33959 (vsignextend_hi_<mode>): Remove.
33960 (vsignextend_si_v2di): Remove.
33961 (vsignextend_v2di_v1ti): Remove.
33962 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
33963 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
33964 with gen_vsx_sign_extend_v16qi_v4si.
33965 * config/rs6000/rs6000.md (split for DI constant generation):
33966 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
33967 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
33968 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
33969 with gen_vsx_sign_extend_v16qi_si.
33970 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
33971 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
33972 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
33973 vsx_sign_extend_v16qi_v4si.
33974 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
33975 vsx_sign_extend_v8hi_v2di.
33976 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
33977 vsx_sign_extend_v8hi_v4si.
33978 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
33979 vsx_sign_extend_si_v2di.
33980 (__builtin_altivec_vsignext): Set bif-pattern to
33981 vsx_sign_extend_v2di_v1ti.
33982 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
33983 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
33984 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
33985 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
33987 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
33990 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
33991 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
33993 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
33995 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
33997 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
33999 * common/config/i386/cpuinfo.h (get_available_features):
34000 Detect AMX-COMPLEX.
34001 * common/config/i386/i386-common.cc
34002 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
34003 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
34004 (ix86_handle_option): Handle -mamx-complex.
34005 * common/config/i386/i386-cpuinfo.h (enum processor_features):
34006 Add FEATURE_AMX_COMPLEX.
34007 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
34009 * config.gcc: Add amxcomplexintrin.h.
34010 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
34011 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
34013 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
34014 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
34015 Handle amx-complex.
34016 * config/i386/i386.opt: Add option -mamx-complex.
34017 * config/i386/immintrin.h: Include amxcomplexintrin.h.
34018 * doc/extend.texi: Document amx-complex.
34019 * doc/invoke.texi: Document -mamx-complex.
34020 * doc/sourcebuild.texi: Document target amx-complex.
34021 * config/i386/amxcomplexintrin.h: New file.
34023 2023-04-08 Jakub Jelinek <jakub@redhat.com>
34025 PR tree-optimization/109392
34026 * tree-vect-generic.cc (tree_vec_extract): Handle failure
34027 of maybe_push_res_to_seq better.
34029 2023-04-08 Jakub Jelinek <jakub@redhat.com>
34031 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
34033 (SYSTEM_H): Depend on $(HASHTAB_H).
34034 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
34035 dependency on $(RTL_BASE_H), remove redundant dependency on
34038 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
34041 * config/arm/arm.cc (arm_effective_regno): New function.
34042 (mve_vector_mem_operand): Use it.
34044 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
34046 PR tree-optimization/109417
34047 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
34048 dependency is in SSA_NAME_FREE_LIST.
34050 2023-04-06 Andrew Pinski <apinski@marvell.com>
34052 PR tree-optimization/109427
34053 * params.opt (-param=vect-induction-float=):
34054 Fix option attribute typo for IntegerRange.
34056 2023-04-05 Jeff Law <jlaw@ventanamicro>
34059 * combine.cc (combine_instructions): Force re-recognition when
34060 after restoring the body of an insn to its original form.
34062 2023-04-05 Martin Jambor <mjambor@suse.cz>
34065 * ipa-sra.cc (zap_useless_ipcp_results): New function.
34066 (process_isra_node_results): Call it.
34068 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34070 * config/riscv/vector.md: Fix incorrect operand order.
34072 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34074 * config/riscv/riscv-vsetvl.cc
34075 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
34078 2023-04-05 Li Xu <xuli1@eswincomputing.com>
34080 * config/riscv/riscv-vector-builtins.def: Fix typo.
34081 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
34082 * config/riscv/vector-iterators.md: Ditto.
34084 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
34086 * doc/md.texi (Including Patterns): Fix page break.
34088 2023-04-04 Jakub Jelinek <jakub@redhat.com>
34090 PR tree-optimization/109386
34091 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
34092 foperator_le::op1_range, foperator_le::op2_range,
34093 foperator_gt::op1_range, foperator_gt::op2_range,
34094 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
34095 BRS_FALSE case even if the other op is maybe_isnan, not just
34097 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
34098 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
34099 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
34100 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
34101 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
34102 not just known_isnan.
34104 2023-04-04 Marek Polacek <polacek@redhat.com>
34106 PR sanitizer/109107
34107 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
34109 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
34111 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
34113 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
34114 (mve_vcreateq_f<mode>): Swap operands.
34116 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
34118 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
34120 2023-04-04 Jakub Jelinek <jakub@redhat.com>
34123 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
34124 Reword diagnostics about zfinx conflict with f, formatting fixes.
34126 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
34128 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
34130 2023-04-04 Richard Biener <rguenther@suse.de>
34132 PR tree-optimization/109304
34133 * tree-profile.cc (tree_profiling): Use symtab node
34134 availability to decide whether to skip adjusting calls.
34135 Do not adjust calls to internal functions.
34137 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
34140 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
34141 function for permutation control vector by considering big endianness.
34143 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
34146 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
34147 (rs6000_vprtyb<mode>2): ... this.
34148 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
34149 rs6000_vprtybv2di2.
34150 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
34151 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
34152 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
34153 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
34155 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
34156 Sandra Loosemore <sandra@codesourcery.com>
34158 * doc/md.texi (Insn Splitting): Tweak wording for readability.
34160 2023-04-03 Martin Jambor <mjambor@suse.cz>
34163 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
34164 offset + size will be representable in unsigned int.
34166 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
34168 * configure.ac (ZSTD_LIB): Move before zstd.h check.
34169 Unset gcc_cv_header_zstd_h without libzstd.
34170 * configure: Regenerate.
34172 2023-04-03 Martin Liska <mliska@suse.cz>
34174 * doc/invoke.texi: Document new param.
34176 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
34178 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
34179 new check_effective_target function.
34181 2023-04-03 Li Xu <xuli1@eswincomputing.com>
34183 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
34184 (vfloat32m8_t): Likewise
34186 2023-04-03 liuhongt <hongtao.liu@intel.com>
34188 * doc/md.texi: Document signbitm2.
34190 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34191 kito-cheng <kito.cheng@sifive.com>
34193 * config/riscv/vector.md: Fix RA constraint.
34195 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
34197 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
34198 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
34199 * config/riscv/vector.md: Fix scalar move bug.
34201 2023-04-01 Jakub Jelinek <jakub@redhat.com>
34203 * range-op-float.cc (foperator_equal::fold_range): If at least
34204 one of the op ranges is not singleton and neither is NaN and all
34205 4 bounds are zero, return [1, 1].
34206 (foperator_not_equal::fold_range): In the same case return [0, 0].
34208 2023-04-01 Jakub Jelinek <jakub@redhat.com>
34210 * range-op-float.cc (foperator_equal::fold_range): Perform the
34211 non-singleton handling regardless of maybe_isnan (op1, op2).
34212 (foperator_not_equal::fold_range): Likewise.
34213 (foperator_lt::fold_range, foperator_le::fold_range,
34214 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
34215 real_* comparison check which results in range_false (type)
34216 even if maybe_isnan (op1, op2). Simplify.
34217 (foperator_ltgt): New class.
34218 (fop_ltgt): New variable.
34219 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
34222 2023-04-01 Jakub Jelinek <jakub@redhat.com>
34225 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
34226 returns VOIDmode, handle it like if the register isn't used for
34227 passing arguments at all.
34228 (apply_result_size): If targetm.calls.get_raw_result_mode returns
34229 VOIDmode, handle it like if the register isn't used for returning
34231 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
34232 means to return VOIDmode.
34233 * doc/tm.texi: Regenerated.
34234 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
34235 TARGET_SVE for P0_REGNUM.
34236 (aarch64_function_arg_regno_p): Also return true for p0-p3.
34237 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
34239 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
34241 * lra-constraints.cc: (combine_reload_insn): New function.
34243 2023-03-31 Jakub Jelinek <jakub@redhat.com>
34245 PR tree-optimization/91645
34246 * range-op-float.cc (foperator_unordered_lt::fold_range,
34247 foperator_unordered_le::fold_range,
34248 foperator_unordered_gt::fold_range,
34249 foperator_unordered_ge::fold_range,
34250 foperator_unordered_equal::fold_range): Call the ordered
34251 fold_range on ranges with cleared NaNs.
34252 * value-query.cc (range_query::get_tree_range): Handle also
34253 COMPARISON_CLASS_P trees.
34255 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
34256 Andrew Pinski <pinskia@gmail.com>
34259 * config/riscv/t-riscv: Add missing dependencies.
34261 2023-03-31 liuhongt <hongtao.liu@intel.com>
34263 * config/i386/i386.cc (inline_memory_move_cost): Return 100
34264 for MASK_REGS when MODE_SIZE > 8.
34266 2023-03-31 liuhongt <hongtao.liu@intel.com>
34269 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
34270 ufloat/ufix to floatuns/fixuns.
34271 * config/i386/i386-expand.cc
34272 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
34273 * config/i386/sse.md
34274 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
34276 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
34277 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
34279 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
34281 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
34283 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
34284 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
34285 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
34286 (ufloatv2siv2df2<mask_name>): Renamed to ..
34287 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
34288 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
34290 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
34292 (ufix_notruncv2dfv2si2): Renamed to ..
34293 (fixuns_notruncv2dfv2si2):.. this.
34294 (ufix_notruncv2dfv2si2_mask): Renamed to ..
34295 (fixuns_notruncv2dfv2si2_mask): .. this.
34296 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
34297 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
34298 (ufix_truncv2dfv2si2): Renamed to ..
34299 (*fixuns_truncv2dfv2si2): .. this.
34300 (ufix_truncv2dfv2si2_mask): Renamed to ..
34301 (fixuns_truncv2dfv2si2_mask): .. this.
34302 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
34303 (*fixuns_truncv2dfv2si2_mask_1): .. this.
34304 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
34305 (fixuns_truncv4dfv4si2<mask_name>): .. this.
34306 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
34308 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
34310 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
34311 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
34314 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
34316 PR tree-optimization/109154
34317 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
34318 * gimple-range-gori.h (may_recompute_p): Add depth param.
34319 * params.opt (ranger-recompute-depth): New param.
34321 2023-03-30 Jason Merrill <jason@redhat.com>
34325 * cgraph.h: Move reset() from cgraph_node to symtab_node.
34326 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
34327 remove_from_same_comdat_group.
34329 2023-03-30 Richard Biener <rguenther@suse.de>
34331 PR tree-optimization/107561
34332 * gimple-ssa-warn-access.cc (get_size_range): Add flags
34333 argument and pass it on.
34334 (check_access): When querying for the size range pass
34335 SR_ALLOW_ZERO when the known destination size is zero.
34337 2023-03-30 Richard Biener <rguenther@suse.de>
34339 PR tree-optimization/109342
34340 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
34341 overload for edge. When that edge is a backedge use
34342 dominated_by_p directly.
34344 2023-03-30 liuhongt <hongtao.liu@intel.com>
34346 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
34347 vpblendd instead of vpblendw for V4SI under avx2.
34349 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
34351 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
34352 for many quick operands, for register-sized modes.
34354 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
34356 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
34359 2023-03-29 Martin Liska <mliska@suse.cz>
34361 PR bootstrap/109310
34362 * configure.ac: Emit a warning for deprecated option
34363 --enable-link-mutex.
34364 * configure: Regenerate.
34366 2023-03-29 Richard Biener <rguenther@suse.de>
34368 PR tree-optimization/109331
34369 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
34370 discover a taken edge make sure to cleanup the CFG.
34372 2023-03-29 Richard Biener <rguenther@suse.de>
34374 PR tree-optimization/109327
34375 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
34376 already removed stmts when draining to_remove.
34378 2023-03-29 Richard Biener <rguenther@suse.de>
34381 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
34382 so we can re-create the DIE for the type if required.
34384 2023-03-29 Jakub Jelinek <jakub@redhat.com>
34385 Richard Biener <rguenther@suse.de>
34387 PR tree-optimization/109301
34388 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
34389 properties_provided from PROP_gimple_opt_math to 0.
34390 (pass_data_expand_powcabs): Change properties_provided from 0 to
34391 PROP_gimple_opt_math.
34393 2023-03-29 Richard Biener <rguenther@suse.de>
34395 PR tree-optimization/109154
34396 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
34397 inverted condition specially by inverting at the caller.
34398 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
34400 2023-03-28 David Malcolm <dmalcolm@redhat.com>
34403 * diagnostic-show-locus.cc (column_range::column_range): Factor
34404 out assertion conditional into...
34405 (column_range::valid_p): ...this new function.
34406 (line_corrections::add_hint): Don't attempt to consolidate hints
34407 if it would lead to invalid column_range instances.
34409 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
34412 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
34413 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
34416 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
34418 PR rtl-optimization/109187
34419 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
34420 subtraction in three-way comparison.
34422 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
34424 PR tree-optimization/109265
34425 PR tree-optimization/109274
34426 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
34427 not create a relation record is op1 and op2 are the same symbol.
34428 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
34429 handler for this stmt, but create a new record only if this statement
34430 generates a relation based on the ranges.
34431 (gori_compute::compute_operand2_range): Ditto.
34432 * value-relation.h (value_relation::set_relation): Always create the
34433 record that is requested.
34435 2023-03-28 Richard Biener <rguenther@suse.de>
34437 PR tree-optimization/107087
34438 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
34439 executable regions to avoid useless work and to better
34440 propagate degenerate PHIs.
34442 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
34444 * config/i386/x-mingw32-utf8: update comments.
34446 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
34449 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
34450 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
34452 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
34454 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
34455 after inlining. Record which decls are loaded from. Fix handling
34456 of vops for loads and stores.
34457 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
34458 (aarch64_accesses_vector_load_decl_p): Likewise.
34459 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
34461 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
34462 that loads from a decl, treat vector stores to those decls as
34464 (aarch64_vector_costs::finish_cost): ...and in that case,
34465 if the vector code does nothing more than a store, give the
34466 prologue a zero cost as well.
34468 2023-03-28 Richard Biener <rguenther@suse.de>
34471 PR tree-optimization/108129
34472 * genmatch.cc (lower_for): For (match ...) delay
34473 substituting into the match operator if possible.
34474 (dt_operand::gen_gimple_expr): For user_id look at the
34475 first substitute for determining how to access operands.
34476 (dt_operand::gen_generic_expr): Likewise.
34477 (dt_node::gen_kids): Properly sort user_ids according
34478 to their substitutes.
34479 (dt_node::gen_kids_1): Code-generate user_id matching.
34481 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34482 Jonathan Wakely <jwakely@redhat.com>
34484 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
34485 Use subcommand rather than sub-command in function comments.
34487 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34489 PR tree-optimization/109154
34490 * value-range.h (frange::flush_denormals_to_zero): Make it public
34491 rather than private.
34492 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
34494 * range-op-float.cc (range_operator_float::fold_range): Call
34495 flush_denormals_to_zero.
34497 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34499 PR middle-end/106190
34500 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
34501 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
34503 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34505 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
34506 as 4th argument to set to avoid clear_nan and union_ calls.
34508 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34511 * config/i386/i386.cc (assign_386_stack_local): For DImode
34512 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
34513 align 32 rather than 0 to assign_stack_local.
34515 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
34518 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
34519 on operand #3 to get the final condition code. Use std::swap.
34520 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
34521 (fucmp<gcond:code>8<P:mode>_vis): Move around.
34522 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
34523 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
34525 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
34527 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
34528 top-level sections.
34530 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
34532 * config.host: Pull in i386/x-mingw32-utf8 Makefile
34533 fragment and reference utf8rc-mingw32.o explicitly
34535 * config/i386/sym-mingw32.cc: prevent name mangling of
34537 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
34538 depend on manifest file explicitly.
34540 2023-03-28 Richard Biener <rguenther@suse.de>
34543 2023-03-27 Richard Biener <rguenther@suse.de>
34545 PR rtl-optimization/109237
34546 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
34548 2023-03-28 Richard Biener <rguenther@suse.de>
34550 * common.opt (gdwarf): Remove Negative(gdwarf-).
34552 2023-03-28 Richard Biener <rguenther@suse.de>
34554 * common.opt (gdwarf): Add RejectNegative.
34555 (gdwarf-): Likewise.
34559 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34561 * config/cris/constraints.md ("T"): Correct to
34562 define_memory_constraint.
34564 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34566 * config/cris/cris.md (BW2): New mode-iterator.
34567 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
34570 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34572 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
34573 for possible eliminable compares.
34575 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34577 * config/cris/constraints.md ("R"): Remove unused constraint.
34579 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
34581 PR gcov-profile/109297
34582 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
34583 (merge_stream_usage): Likewise.
34584 (overlap_usage): Likewise.
34586 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
34589 * config/riscv/thead.md: Add missing mode specifiers.
34591 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
34592 Jiangning Liu <jiangning.liu@amperecomputing.com>
34593 Manolis Tsamis <manolis.tsamis@vrull.eu>
34595 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
34597 2023-03-27 Richard Biener <rguenther@suse.de>
34599 PR rtl-optimization/109237
34600 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
34602 2023-03-27 Richard Biener <rguenther@suse.de>
34605 * lto-wrapper.cc (run_gcc): Parse alternate debug options
34606 as well, they always enable debug.
34608 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
34611 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
34613 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
34615 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
34618 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
34619 than zero when calling vec_sld.
34620 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
34621 zero when calling vec_sld.
34622 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
34623 than zero when calling vec_sld.
34625 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
34627 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
34628 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
34629 loops are represented and which fields are vectors. Add
34630 documentation for OMP_FOR_PRE_BODY field. Document internal
34631 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
34632 * tree.def (OMP_FOR): Make documentation consistent with the
34633 Texinfo manual, to fill some gaps and correct errors.
34635 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
34638 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
34639 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
34640 (handle_move_double): Call it before handle_movsi.
34641 * config/m68k/m68k-protos.h: Declare it.
34643 2023-03-26 Jakub Jelinek <jakub@redhat.com>
34645 PR tree-optimization/109230
34646 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
34648 2023-03-26 Jakub Jelinek <jakub@redhat.com>
34651 * predict.cc (compute_function_frequency): Don't call
34652 warn_function_cold if function already has cold attribute.
34654 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
34656 * doc/install.texi: Remove anachronistic note
34657 related to languages built and separate source tarballs.
34659 2023-03-25 David Malcolm <dmalcolm@redhat.com>
34662 * diagnostic-format-sarif.cc (read_until_eof): Delete.
34663 (maybe_read_file): Delete.
34664 (sarif_builder::maybe_make_artifact_content_object): Use
34665 get_source_file_content rather than maybe_read_file.
34666 Reject it if it's not valid UTF-8.
34667 * input.cc (file_cache_slot::get_full_file_content): New.
34668 (get_source_file_content): New.
34669 (selftest::check_cpp_valid_utf8_p): New.
34670 (selftest::test_cpp_valid_utf8_p): New.
34671 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
34672 * input.h (get_source_file_content): New prototype.
34674 2023-03-24 David Malcolm <dmalcolm@redhat.com>
34676 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
34678 (Special Functions for Debugging the Analyzer): Convert to a
34679 table, and rewrite in places.
34680 (Other Debugging Techniques): Add notes on how to compare two
34681 different exploded graphs.
34683 2023-03-24 David Malcolm <dmalcolm@redhat.com>
34686 * json.cc: Update comments to indicate that we now preserve
34687 insertion order of keys within objects.
34688 (object::print): Traverse keys in insertion order.
34689 (object::set): Preserve insertion order of keys.
34690 (selftest::test_writing_objects): Add an additional key to verify
34691 that we preserve insertion order.
34692 * json.h (object::m_keys): New field.
34694 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
34696 PR tree-optimization/109238
34697 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
34698 predecessors which this block dominates.
34700 2023-03-24 Richard Biener <rguenther@suse.de>
34702 PR tree-optimization/106912
34703 * tree-profile.cc (tree_profiling): Update stmts only when
34704 profiling or testing coverage. Make sure to update calls
34705 fntype, stripping 'const' there.
34707 2023-03-24 Jakub Jelinek <jakub@redhat.com>
34709 PR middle-end/109258
34710 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
34711 if target == const0_rtx.
34713 2023-03-24 Alexandre Oliva <oliva@adacore.com>
34715 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
34716 Document options and effective targets.
34718 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
34720 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
34723 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
34725 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
34726 non-earlyclobber alternative.
34728 2023-03-23 Andrew Pinski <apinski@marvell.com>
34731 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
34734 2023-03-23 Richard Biener <rguenther@suse.de>
34736 PR tree-optimization/107569
34737 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
34738 Do not push SSA names with zero uses as available leader.
34739 (process_bb): Likewise.
34741 2023-03-23 Richard Biener <rguenther@suse.de>
34743 PR tree-optimization/109262
34744 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
34745 combining a piecewise complex load avoid touching loads
34746 that throw internally. Use fun, not cfun throughout.
34748 2023-03-23 Jakub Jelinek <jakub@redhat.com>
34750 * value-range.cc (irange::irange_union, irange::intersect): Fix
34751 comment spelling bugs.
34752 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
34753 * gimple-range-trace.h: Likewise.
34754 * gimple-range-edge.cc: Likewise.
34755 (gimple_outgoing_range_stmt_p,
34756 gimple_outgoing_range::switch_edge_range,
34757 gimple_outgoing_range::edge_range_p): Likewise.
34758 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
34759 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
34760 assume_query::assume_query, assume_query::calculate_phi): Likewise.
34761 * gimple-range-edge.h: Likewise.
34762 * value-range.h (Value_Range::set, Value_Range::lower_bound,
34763 Value_Range::upper_bound, frange::set_undefined): Likewise.
34764 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
34765 gori_compute): Likewise.
34766 * gimple-range-fold.h (fold_using_range): Likewise.
34767 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
34769 * gimple-range-gori.cc (range_def_chain::in_chain_p,
34770 range_def_chain::dump, gori_map::calculate_gori,
34771 gori_compute::compute_operand_range_switch,
34772 gori_compute::logical_combine, gori_compute::refine_using_relation,
34773 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
34775 * gimple-range.h: Likewise.
34776 (enable_ranger): Likewise.
34777 * range-op.h (empty_range_varying): Likewise.
34778 * value-query.h (value_query): Likewise.
34779 * gimple-range-cache.cc (block_range_cache::set_bb_range,
34780 block_range_cache::dump, ssa_global_cache::clear_global_range,
34781 temporal_cache::temporal_value, temporal_cache::current_p,
34782 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
34783 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
34785 * gimple-range-fold.cc (fur_edge::get_phi_operand,
34786 fur_stmt::get_operand, gimple_range_adjustment,
34787 fold_using_range::range_of_phi,
34788 fold_using_range::relation_fold_and_or): Likewise.
34789 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
34790 * value-query.cc (range_query::value_of_expr,
34791 range_query::value_on_edge, range_query::query_relation): Likewise.
34792 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
34793 intersect_range_with_nonzero_bits): Likewise.
34794 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
34795 exit_range): Likewise.
34796 * value-relation.h: Likewise.
34797 (equiv_oracle, relation_trio::relation_trio, value_relation,
34798 value_relation::value_relation, pe_min): Likewise.
34799 * range-op-float.cc (range_operator_float::rv_fold,
34800 frange_arithmetic, foperator_unordered_equal::op1_range,
34801 foperator_div::rv_fold): Likewise.
34802 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
34803 * value-relation.cc (equiv_oracle::query_relation,
34804 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
34805 value_relation::apply_transitive, relation_chain_head::find_relation,
34806 dom_oracle::query_relation, dom_oracle::find_relation_block,
34807 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
34808 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
34809 create_possibly_reversed_range, adjust_op1_for_overflow,
34810 operator_mult::wi_fold, operator_exact_divide::op1_range,
34811 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
34812 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
34813 range_op_lshift_tests): Likewise.
34815 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
34817 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
34818 (move_callee_saved_registers): Detect the bug condition early.
34820 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
34822 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
34823 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
34825 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
34826 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
34827 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
34828 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
34829 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
34831 2023-03-23 Jakub Jelinek <jakub@redhat.com>
34833 PR tree-optimization/109176
34834 * tree-vect-generic.cc (expand_vector_condition): If a has
34835 vector boolean type and is a comparison, also check if both
34836 the comparison and VEC_COND_EXPR could be successfully expanded
34839 2023-03-23 Pan Li <pan2.li@intel.com>
34840 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34844 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
34845 for vector mask modes.
34846 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
34847 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
34849 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
34851 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
34853 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34856 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
34857 (emit_vlmax_op): Ditto.
34858 * config/riscv/riscv-v.cc (get_sew): New function.
34859 (emit_vlmax_vsetvl): Adapt function.
34860 (emit_pred_op): Ditto.
34861 (emit_vlmax_op): Ditto.
34862 (emit_nonvlmax_op): Ditto.
34863 (legitimize_move): Fix LRA ICE.
34864 (gen_no_side_effects_vsetvl_rtx): Adapt function.
34865 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
34866 (@mov<VB:mode><P:mode>_lra): Ditto.
34867 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
34868 (*mov<VB:mode><P:mode>_lra): Ditto.
34870 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34873 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
34874 __riscv_vlenb support.
34876 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34877 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
34878 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
34880 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34881 * config/riscv/riscv-vector-builtins.cc: Ditto.
34883 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34884 kito-cheng <kito.cheng@sifive.com>
34886 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
34887 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
34888 (pass_vsetvl::need_vsetvl): Fix bugs.
34889 (pass_vsetvl::backward_demand_fusion): Fix bugs.
34890 (pass_vsetvl::demand_fusion): Fix bugs.
34891 (eliminate_insn): Fix bugs.
34892 (insert_vsetvl): Ditto.
34893 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
34894 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
34895 * config/riscv/vector.md: Ditto.
34897 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34898 kito-cheng <kito.cheng@sifive.com>
34900 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
34901 * config/riscv/vector-iterators.md (nmsac): Ditto.
34907 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
34908 (@pred_mul_plus<mode>): Ditto.
34909 (*pred_madd<mode>): Ditto.
34910 (*pred_macc<mode>): Ditto.
34911 (*pred_mul_plus<mode>): Ditto.
34912 (@pred_mul_plus<mode>_scalar): Ditto.
34913 (*pred_madd<mode>_scalar): Ditto.
34914 (*pred_macc<mode>_scalar): Ditto.
34915 (*pred_mul_plus<mode>_scalar): Ditto.
34916 (*pred_madd<mode>_extended_scalar): Ditto.
34917 (*pred_macc<mode>_extended_scalar): Ditto.
34918 (*pred_mul_plus<mode>_extended_scalar): Ditto.
34919 (@pred_minus_mul<mode>): Ditto.
34920 (*pred_<madd_nmsub><mode>): Ditto.
34921 (*pred_nmsub<mode>): Ditto.
34922 (*pred_<macc_nmsac><mode>): Ditto.
34923 (*pred_nmsac<mode>): Ditto.
34924 (*pred_mul_<optab><mode>): Ditto.
34925 (*pred_minus_mul<mode>): Ditto.
34926 (@pred_mul_<optab><mode>_scalar): Ditto.
34927 (@pred_minus_mul<mode>_scalar): Ditto.
34928 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34929 (*pred_nmsub<mode>_scalar): Ditto.
34930 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34931 (*pred_nmsac<mode>_scalar): Ditto.
34932 (*pred_mul_<optab><mode>_scalar): Ditto.
34933 (*pred_minus_mul<mode>_scalar): Ditto.
34934 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
34935 (*pred_nmsub<mode>_extended_scalar): Ditto.
34936 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
34937 (*pred_nmsac<mode>_extended_scalar): Ditto.
34938 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
34939 (*pred_minus_mul<mode>_extended_scalar): Ditto.
34940 (*pred_<madd_msub><mode>): Ditto.
34941 (*pred_<macc_msac><mode>): Ditto.
34942 (*pred_<madd_msub><mode>_scalar): Ditto.
34943 (*pred_<macc_msac><mode>_scalar): Ditto.
34944 (@pred_neg_mul_<optab><mode>): Ditto.
34945 (@pred_mul_neg_<optab><mode>): Ditto.
34946 (*pred_<nmadd_msub><mode>): Ditto.
34947 (*pred_<nmsub_nmadd><mode>): Ditto.
34948 (*pred_<nmacc_msac><mode>): Ditto.
34949 (*pred_<nmsac_nmacc><mode>): Ditto.
34950 (*pred_neg_mul_<optab><mode>): Ditto.
34951 (*pred_mul_neg_<optab><mode>): Ditto.
34952 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
34953 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
34954 (*pred_<nmadd_msub><mode>_scalar): Ditto.
34955 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
34956 (*pred_<nmacc_msac><mode>_scalar): Ditto.
34957 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
34958 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
34959 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
34960 (@pred_widen_neg_mul_<optab><mode>): Ditto.
34961 (@pred_widen_mul_neg_<optab><mode>): Ditto.
34962 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
34963 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
34965 2023-03-23 liuhongt <hongtao.liu@intel.com>
34967 * builtins.cc (builtin_memset_read_str): Replace
34968 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
34969 (builtin_memset_gen_str): Ditto.
34970 * config/i386/i386-expand.cc
34971 (ix86_convert_const_wide_int_to_broadcast): Replace
34972 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
34973 (ix86_expand_vector_move): Ditto.
34974 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
34976 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
34977 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
34978 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
34979 * doc/tm.texi.in: Ditto.
34980 * target.def: Ditto.
34982 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
34984 * lra.cc (lra): Do not repeat inheritance and live range splitting
34985 when asm error is found.
34987 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
34989 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
34990 (gcn_expand_dpp_distribute_even_insn)
34991 (gcn_expand_dpp_distribute_odd_insn): Declare.
34992 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
34993 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
34994 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
34995 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
34996 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
34997 (fms<mode>4_negop2): New patterns.
34998 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
34999 (gcn_expand_dpp_distribute_even_insn)
35000 (gcn_expand_dpp_distribute_odd_insn): New functions.
35001 * config/gcn/gcn.md: Add entries to unspec enum.
35003 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
35005 PR tree-optimization/109008
35006 * value-range.cc (frange::set): Add nan_state argument.
35007 * value-range.h (class nan_state): New.
35008 (frange::get_nan_state): New.
35010 2023-03-22 Martin Liska <mliska@suse.cz>
35012 * configure: Regenerate.
35014 2023-03-21 Joseph Myers <joseph@codesourcery.com>
35016 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
35019 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
35021 PR tree-optimization/109192
35022 * gimple-range-gori.cc (gori_compute::compute_operand_range):
35023 Terminate gori calculations if a relation is not relevant.
35024 * value-relation.h (value_relation::set_relation): Allow
35025 equality between op1 and op2 if they are the same.
35027 2023-03-21 Richard Biener <rguenther@suse.de>
35029 PR tree-optimization/109219
35030 * tree-vect-loop.cc (vectorizable_reduction): Check
35031 slp_node, not STMT_SLP_TYPE.
35032 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
35033 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
35034 Remove assertion on STMT_SLP_TYPE.
35036 2023-03-21 Jakub Jelinek <jakub@redhat.com>
35038 PR tree-optimization/109215
35039 * tree.h (enum special_array_member): Adjust comments for int_0
35041 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
35042 has zero sized element type and the array has variable number of
35043 elements or constant one or more elements.
35044 (component_ref_size): Adjust comments, formatting fix.
35046 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35048 * configure.ac: Add check for the Texinfo 6.8
35049 CONTENTS_OUTPUT_LOCATION customization variable and set it if
35051 * configure: Regenerate.
35052 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
35053 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
35054 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
35055 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
35057 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35059 * doc/extend.texi: Associate use_hazard_barrier_return index
35060 entry with its attribute.
35061 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
35064 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35066 * doc/implement-c.texi: Remove usage of @gol.
35067 * doc/invoke.texi: Ditto.
35068 * doc/sourcebuild.texi: Ditto.
35069 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
35070 texinfo.tex versions, the bug it was working around appears to
35073 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35075 * doc/include/texinfo.tex: Update to 2023-01-17.19.
35077 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35079 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
35080 @enddefbuiltin for defining built-in functions.
35081 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
35082 places where it should be used.
35084 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35086 * doc/extend.texi (Formatted Output Function Checking): New
35087 subsection for grouping together printf et al.
35088 (Exception handling) Fix missing @ sign before copyright
35089 header, which lead to the copyright line leaking into
35090 '(gcc)Exception handling'.
35091 * doc/gcc.texi: Set document language to en_US.
35092 (@copying): Wrap front cover texts in quotations, move in manual
35095 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
35097 * doc/gcc.texi: Add the Indices appendix, to make texinfo
35098 generate nice indices overview page.
35100 2023-03-21 Richard Biener <rguenther@suse.de>
35102 PR tree-optimization/109170
35103 * gimple-range-op.cc (cfn_pass_through_arg1): New.
35104 (gimple_range_op_handler::maybe_builtin_call): Handle
35105 __builtin_expect via cfn_pass_through_arg1.
35107 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
35110 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
35111 (init_float128_ieee): Delete code to switch complex multiply and divide
35113 (complex_multiply_builtin_code): New helper function.
35114 (complex_divide_builtin_code): Likewise.
35115 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
35116 of complex 128-bit multiply and divide built-in functions.
35118 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
35121 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
35123 2023-03-19 Jonny Grant <jg@jguk.org>
35125 * doc/extend.texi (Common Function Attributes) <nonnull>:
35128 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
35130 PR rtl-optimization/109179
35131 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
35132 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
35134 2023-03-17 Jakub Jelinek <jakub@redhat.com>
35137 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
35139 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
35140 to allocate_struct_function instead of false.
35141 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
35142 nor DECL_RESULT here. Pass true as ABSTRACT_P to
35143 push_struct_function. Call targetm.target_option.relayout_function
35145 (tree_function_versioning): Formatting fix.
35147 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
35149 * lra-constraints.cc: Include hooks.h.
35150 (combine_reload_insn): New function.
35151 (lra_constraints): Call it.
35153 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35154 kito-cheng <kito.cheng@sifive.com>
35156 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
35157 as legitimate value.
35158 * config/riscv/riscv-vector-builtins.cc
35159 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
35160 (function_expander::use_widen_ternop_insn): Ditto.
35161 * config/riscv/vector.md (@vundefined<mode>): New pattern.
35162 (pred_mul_<optab><mode>_undef_merge): Remove.
35163 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
35164 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
35165 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
35166 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
35168 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35171 * config/riscv/riscv.md: Fix subreg bug.
35173 2023-03-17 Jakub Jelinek <jakub@redhat.com>
35175 PR middle-end/108685
35176 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
35177 use its loop_father rather than BODY_BB's loop_father.
35178 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
35179 If broken_loop with ordered > collapse and at least one of those
35180 extra loops aren't guaranteed to have at least one iteration, change
35181 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
35182 loop_father to l0_bb's loop_father rather than l1_bb's.
35184 2023-03-17 Jakub Jelinek <jakub@redhat.com>
35187 * gdbhooks.py (TreePrinter.to_string): Wrap
35188 gdb.parse_and_eval('tree_code_type') in a try block, parse
35189 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
35190 raises exception. Update comments for the recent tree_code_type
35193 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
35195 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
35196 issues. Add more line breaks to example so it doesn't overflow
35199 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
35201 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
35202 line breaks in examples.
35203 <malloc>: Fix bad line breaks in running text, also copy-edit
35205 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
35206 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
35208 (C++ Dialect Options) <-fcontracts>: Add line break in example.
35209 <-Wctad-maybe-unsupported>: Likewise.
35210 <-Winvalid-constexpr>: Likewise.
35211 (Warning Options) <-Wdangling-pointer>: Likewise.
35212 <-Winterference-size>: Likewise.
35213 <-Wvla-parameter>: Likewise.
35214 (Static Analyzer Options): Fix bad line breaks in running text,
35215 plus add some missing markup.
35216 (Optimize Options) <openacc-privatization>: Fix more bad line
35217 breaks in running text.
35219 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
35221 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
35222 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
35223 (expand_vec_perm_2perm_pblendv): Ditto.
35225 2023-03-16 Martin Liska <mliska@suse.cz>
35227 PR middle-end/106133
35228 * gcc.cc (driver_handle_option): Use x_main_input_basename
35229 if x_dump_base_name is null.
35230 * opts.cc (common_handle_option): Likewise.
35232 2023-03-16 Richard Biener <rguenther@suse.de>
35234 PR tree-optimization/109123
35235 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
35236 Do not emit -Wuse-after-free late.
35237 (pass_waccess::check_call): Always check call pointer uses.
35239 2023-03-16 Richard Biener <rguenther@suse.de>
35241 PR tree-optimization/109141
35242 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
35243 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
35245 (renumber_gimple_stmt_uids): ... here and
35246 (renumber_gimple_stmt_uids_in_blocks): ... here.
35247 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
35248 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
35250 (pass_waccess::check_pointer_uses): Process all PHIs.
35252 2023-03-15 David Malcolm <dmalcolm@redhat.com>
35255 * diagnostic-format-sarif.cc (class sarif_invocation): New.
35256 (class sarif_ice_notification): New.
35257 (sarif_builder::m_invocation_obj): New field.
35258 (sarif_invocation::add_notification_for_ice): New.
35259 (sarif_invocation::prepare_to_flush): New.
35260 (sarif_ice_notification::sarif_ice_notification): New.
35261 (sarif_builder::sarif_builder): Add m_invocation_obj.
35262 (sarif_builder::end_diagnostic): Special-case DK_ICE and
35264 (sarif_builder::flush_to_file): Call prepare_to_flush on
35265 m_invocation_obj. Pass the latter to make_top_level_object.
35266 (sarif_builder::make_result_object): Move creation of "locations"
35268 (sarif_builder::make_locations_arr): ...this new function.
35269 (sarif_builder::make_top_level_object): Add "invocation_obj" param
35270 and pass it to make_run_object.
35271 (sarif_builder::make_run_object): Add "invocation_obj" param and
35273 (sarif_ice_handler): New callback.
35274 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
35275 * diagnostic.cc (diagnostic_initialize): Initialize new field
35277 (diagnostic_action_after_output): If it is set, make one attempt
35278 to call ice_handler_cb.
35279 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
35281 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
35283 * config/i386/i386-expand.cc (expand_vec_perm_blend):
35284 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
35285 and fix V2HImode handling.
35286 (expand_vec_perm_1): Try to emit BLEND instruction
35287 before MOVSS/MOVSD.
35288 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
35290 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
35292 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
35294 2023-03-15 Richard Biener <rguenther@suse.de>
35296 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
35297 Do not diagnose clobbers.
35299 2023-03-15 Richard Biener <rguenther@suse.de>
35301 PR tree-optimization/109139
35302 * tree-ssa-live.cc (remove_unused_locals): Look at the
35303 base address for unused decls on the LHS of .DEFERRED_INIT.
35305 2023-03-15 Xi Ruoyao <xry111@xry111.site>
35308 * builtins.cc (inline_string_cmp): Force the character
35309 difference into "result" pseudo-register, instead of reassign
35310 the pseudo-register.
35312 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35314 * config.gcc: Add thead.o to RISC-V extra_objs.
35315 * config/riscv/peephole.md: Add mempair peephole passes.
35316 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
35318 (th_mempair_operands_p): Likewise.
35319 (th_mempair_order_operands): Likewise.
35320 (th_mempair_prepare_save_restore_operands): Likewise.
35321 (th_mempair_save_restore_regs): Likewise.
35322 (th_mempair_output_move): Likewise.
35323 * config/riscv/riscv.cc (riscv_save_reg): Move code.
35324 (riscv_restore_reg): Move code.
35325 (riscv_for_each_saved_reg): Add code to emit mempair insns.
35326 * config/riscv/t-riscv: Add thead.cc.
35327 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
35329 (*th_mempair_store_<GPR:mode>2): Likewise.
35330 (*th_mempair_load_extendsidi2): Likewise.
35331 (*th_mempair_load_zero_extendsidi2): Likewise.
35332 * config/riscv/thead.cc: New file.
35334 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35336 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
35337 New constraint "th_f_fmv".
35338 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
35340 * config/riscv/riscv.cc (riscv_split_doubleword_move):
35341 Add split code for XTheadFmv.
35342 (riscv_secondary_memory_needed): XTheadFmv does not need
35344 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
35345 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
35346 movdf_hardfloat_rv32.
35347 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
35348 (th_fmv_x_w): New INSN.
35349 (th_fmv_x_hw): New INSN.
35351 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35353 * config/riscv/riscv.md (maddhisi4): New expand.
35354 (msubhisi4): New expand.
35355 * config/riscv/thead.md (*th_mula<mode>): New pattern.
35356 (*th_mulawsi): New pattern.
35357 (*th_mulawsi2): New pattern.
35358 (*th_maddhisi4): New pattern.
35359 (*th_sextw_maddhisi4): New pattern.
35360 (*th_muls<mode>): New pattern.
35361 (*th_mulswsi): New pattern.
35362 (*th_mulswsi2): New pattern.
35363 (*th_msubhisi4): New pattern.
35364 (*th_sextw_msubhisi4): New pattern.
35366 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35368 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
35369 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
35371 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
35373 (riscv_expand_conditional_move): New function.
35374 (riscv_expand_conditional_move_onesided): New function.
35375 * config/riscv/riscv.md: Add support for XTheadCondMov.
35376 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
35377 support for XTheadCondMov.
35378 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
35380 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35382 * config/riscv/bitmanip.md (clzdi2): New expand.
35383 (clzsi2): New expand.
35384 (ctz<mode>2): New expand.
35385 (popcount<mode>2): New expand.
35386 (<bitmanip_optab>si2): Rename INSN.
35387 (*<bitmanip_optab>si2): Hide INSN name.
35388 (<bitmanip_optab>di2): Rename INSN.
35389 (*<bitmanip_optab>di2): Hide INSN name.
35390 (rotrsi3): Remove INSN.
35391 (rotr<mode>3): Add expand.
35392 (*rotrsi3): New INSN.
35393 (rotrdi3): Rename INSN.
35394 (*rotrdi3): Hide INSN name.
35395 (rotrsi3_sext): Rename INSN.
35396 (*rotrsi3_sext): Hide INSN name.
35397 (bswap<mode>2): Remove INSN.
35398 (bswapdi2): Add expand.
35399 (bswapsi2): Add expand.
35400 (*bswap<mode>2): Hide INSN name.
35401 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
35403 * config/riscv/riscv.md (extv<mode>): New expand.
35404 (extzv<mode>): New expand.
35405 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
35406 (*th_ext<mode>): New INSN.
35407 (*th_extu<mode>): New INSN.
35408 (*th_clz<mode>2): New INSN.
35409 (*th_rev<mode>2): New INSN.
35411 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35413 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
35414 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
35416 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35418 * config/riscv/riscv.md: Include thead.md
35419 * config/riscv/thead.md: New file.
35421 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35423 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
35425 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
35427 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
35428 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
35429 (MASK_XTHEADBB): New.
35430 (MASK_XTHEADBS): New.
35431 (MASK_XTHEADCMO): New.
35432 (MASK_XTHEADCONDMOV): New.
35433 (MASK_XTHEADFMEMIDX): New.
35434 (MASK_XTHEADFMV): New.
35435 (MASK_XTHEADINT): New.
35436 (MASK_XTHEADMAC): New.
35437 (MASK_XTHEADMEMIDX): New.
35438 (MASK_XTHEADMEMPAIR): New.
35439 (MASK_XTHEADSYNC): New.
35440 (TARGET_XTHEADBA): New.
35441 (TARGET_XTHEADBB): New.
35442 (TARGET_XTHEADBS): New.
35443 (TARGET_XTHEADCMO): New.
35444 (TARGET_XTHEADCONDMOV): New.
35445 (TARGET_XTHEADFMEMIDX): New.
35446 (TARGET_XTHEADFMV): New.
35447 (TARGET_XTHEADINT): New.
35448 (TARGET_XTHEADMAC): New.
35449 (TARGET_XTHEADMEMIDX): New.
35450 (TARGET_XTHEADMEMPAIR): new.
35451 (TARGET_XTHEADSYNC): New.
35452 * config/riscv/riscv.opt: Add riscv_xthead_subext.
35454 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
35457 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
35458 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
35459 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
35461 2023-03-14 Jakub Jelinek <jakub@redhat.com>
35464 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
35465 when lo is equal to dhi and hi is a MEM which uses dlo register.
35467 2023-03-14 Martin Jambor <mjambor@suse.cz>
35470 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
35471 global0 instead of zeroing when it does not have as many counts as
35474 2023-03-14 Martin Jambor <mjambor@suse.cz>
35477 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
35478 ipa count, remove assert, lenient_count_portion_handling, dump
35479 also orig_node_count.
35481 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
35483 * config/i386/i386-expand.cc (expand_vec_perm_movs):
35484 Handle V2SImode for TARGET_MMX_WITH_SSE.
35485 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
35486 using V2FI mode iterator to handle both V2SI and V2SF modes.
35488 2023-03-14 Sam James <sam@gentoo.org>
35490 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
35491 including <sstream> earlier.
35492 * system.h: Add INCLUDE_SSTREAM.
35494 2023-03-14 Richard Biener <rguenther@suse.de>
35496 * tree-ssa-live.cc (remove_unused_locals): Do not treat
35497 the .DEFERRED_INIT of a variable as use, instead remove
35498 that if it is the only use.
35500 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
35502 PR rtl-optimization/107762
35503 * expr.cc (emit_group_store): Revert latest change.
35505 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
35507 PR tree-optimization/109005
35508 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
35509 aggregate type check.
35511 2023-03-14 Jakub Jelinek <jakub@redhat.com>
35513 PR tree-optimization/109115
35514 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
35515 r.upper_bound () on r.undefined_p () range.
35517 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
35519 PR tree-optimization/106896
35520 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
35521 implementatoin with probability_in; avoid some asserts.
35523 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
35525 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
35527 2023-03-13 Sean Bright <sean@seanbright.com>
35529 * doc/invoke.texi (Warning Options): Remove errant 'See'
35532 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35534 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
35535 REG_OK_FOR_BASE_P): Remove.
35537 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35539 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
35540 (=vd,vd,vr,vr): Ditto.
35541 * config/riscv/vector.md: Ditto.
35543 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35545 * config/riscv/riscv-vector-builtins.cc
35546 (function_expander::use_compare_insn): Add operand predicate check.
35548 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35550 * config/riscv/vector.md: Fine tune RA constraints.
35552 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
35554 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
35555 hsaco assemble/link.
35557 2023-03-13 Richard Biener <rguenther@suse.de>
35559 PR tree-optimization/109046
35560 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
35561 piecewise complex loads.
35563 2023-03-12 Jakub Jelinek <jakub@redhat.com>
35565 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
35566 (aarch64_bf16_ptr_type_node): Adjust comment.
35567 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
35568 bfloat16_type_node rather than aarch64_bf16_type_node.
35569 (aarch64_libgcc_floating_mode_supported_p,
35570 aarch64_scalar_mode_supported_p): Also support BFmode.
35571 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
35572 (aarch64_invalid_binary_op): Remove BFmode related rejections.
35573 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
35574 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
35575 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
35576 aarch64_bf16_type_node.
35577 (aarch64_init_simd_builtin_types): Likewise.
35578 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
35579 which is created in tree.cc already.
35580 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
35582 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
35584 PR middle-end/109031
35585 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
35586 ensure that the type of x is as wide or wider than the type of a.
35588 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35591 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
35592 (*bitmask_shift_plus<mode>): New.
35593 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
35594 (@aarch64_bitmask_udiv<mode>3): Remove.
35595 * config/aarch64/aarch64.cc
35596 (aarch64_vectorize_can_special_div_by_constant,
35597 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
35598 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
35599 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
35601 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35604 * target.def (preferred_div_as_shifts_over_mult): New.
35605 * doc/tm.texi.in: Document it.
35606 * doc/tm.texi: Regenerate.
35607 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
35608 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
35609 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
35611 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35612 Richard Sandiford <richard.sandiford@arm.com>
35615 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
35618 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35619 Andrew MacLeod <amacleod@redhat.com>
35622 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
35623 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
35625 (gimple_range_op_handler::maybe_non_standard): New.
35626 * range-op.cc (class operator_widen_plus_signed,
35627 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
35628 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
35629 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
35630 operator_widen_mult_unsigned::wi_fold,
35631 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
35632 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
35633 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
35634 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
35636 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35639 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
35640 * doc/tm.texi.in: Likewise.
35641 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
35642 * expmed.cc (expand_divmod): Likewise.
35643 * expmed.h (expand_divmod): Likewise.
35644 * expr.cc (force_operand, expand_expr_divmod): Likewise.
35645 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
35646 * target.def (can_special_div_by_const): Remove.
35647 * target.h: Remove tree-core.h include
35648 * targhooks.cc (default_can_special_div_by_const): Remove.
35649 * targhooks.h (default_can_special_div_by_const): Remove.
35650 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
35651 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
35652 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
35654 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
35656 * doc/install.texi2html: Fix issue number typo in comment.
35658 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
35660 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
35663 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
35665 * doc/invoke.texi (Optimize Options): Add markup to
35666 description of asan-kernel-mem-intrinsic-prefix, and clarify
35669 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
35671 * doc/extend.texi (Named Address Spaces): Drop a redundant link
35674 2023-03-11 Jeff Law <jlaw@ventanamicro>
35677 * doc/extend.texi: Clarify Attribute Syntax a bit.
35679 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
35681 * doc/install.texi (Prerequisites): Suggest using newer versions
35683 (Final install): Clean up and modernize discussion of how to
35684 build or obtain the GCC manuals.
35685 * doc/install.texi2html: Update comment to point to the PR instead
35686 of "makeinfo 4.7 brokenness" (it's not specific to that version).
35688 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35691 * optabs.cc (expand_fix): For conversions from BFmode to integral,
35692 use shifts to convert it to SFmode first and then convert SFmode
35695 2023-03-10 Andrew Pinski <apinski@marvell.com>
35697 * config/aarch64/aarch64.md: Add a new define_split
35700 2023-03-10 Richard Biener <rguenther@suse.de>
35702 * tree-ssa-structalias.cc (solve_graph): Immediately
35703 iterate self-cycles.
35705 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35707 PR tree-optimization/109008
35708 * range-op-float.cc (float_widen_lhs_range): If not
35709 -frounding-math and not IBM double double format, extend lhs
35710 range just by 0.5ulp rather than 1ulp in each direction.
35712 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35715 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
35717 * config/i386/t-cygwin-w64: Remove.
35719 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35722 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
35723 C++14, don't declare as extern const arrays.
35724 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
35725 static constexpr member arrays for C++11 or C++14.
35726 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
35727 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
35728 (TREE_CODE_LENGTH): For C++11 or C++14 use
35729 tree_code_length_tmpl <0>::tree_code_length instead of
35731 * tree.cc (tree_code_type, tree_code_length): Remove.
35733 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35736 * common.opt (fcanon-prefix-map): New option.
35737 * opts.cc: Include file-prefix-map.h.
35738 (flag_canon_prefix_map): New variable.
35739 (common_handle_option): Handle OPT_fcanon_prefix_map.
35740 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
35741 * file-prefix-map.h (flag_canon_prefix_map): Declare.
35742 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
35744 (add_prefix_map): Initialize canonicalize member from
35745 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
35746 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
35747 use lrealpath result only for map->canonicalize map entries.
35748 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
35749 * opts-global.cc (handle_common_deferred_options): Clear
35750 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
35751 * doc/invoke.texi (-fcanon-prefix-map): Document.
35752 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
35753 see also for -fcanon-prefix-map.
35754 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
35756 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35759 * cgraphunit.cc (check_global_declaration): Don't warn for unused
35760 variables which have OPT_Wunused_variable warning suppressed.
35762 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35764 PR tree-optimization/109008
35765 * range-op-float.cc (float_widen_lhs_range): If lb is
35766 minimum representable finite number or ub is maximum
35767 representable finite number, instead of widening it to
35768 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
35769 Temporarily clear flag_finite_math_only when canonicalizing
35772 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35774 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
35775 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
35776 (gimple_fold_builtin): Ditto.
35777 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
35778 (class vleff): Ditto.
35780 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35781 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
35783 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
35784 (struct fault_load_def): Ditto.
35786 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35787 * config/riscv/riscv-vector-builtins.cc
35788 (rvv_arg_type_info::get_tree_type): Add size_ptr.
35789 (gimple_folder::gimple_folder): New class.
35790 (gimple_folder::fold): Ditto.
35791 (gimple_fold_builtin): New function.
35792 (get_read_vl_instance): Ditto.
35793 (get_read_vl_decl): Ditto.
35794 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
35795 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
35796 (get_read_vl_instance): New function.
35797 (get_read_vl_decl): Ditto.
35798 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
35799 (read_vl_insn_p): Ditto.
35800 (available_occurrence_p): Ditto.
35801 (backward_propagate_worthwhile_p): Ditto.
35802 (gen_vsetvl_pat): Adapt for vleff support.
35803 (get_forward_read_vl_insn): New function.
35804 (get_backward_fault_first_load_insn): Ditto.
35805 (source_equal_p): Adapt for vleff support.
35806 (first_ratio_invalid_for_second_sew_p): Remove.
35807 (first_ratio_invalid_for_second_lmul_p): Ditto.
35808 (first_lmul_less_than_second_lmul_p): Ditto.
35809 (first_ratio_less_than_second_ratio_p): Ditto.
35810 (support_relaxed_compatible_p): New function.
35811 (vector_insn_info::operator>): Remove.
35812 (vector_insn_info::operator>=): Refine.
35813 (vector_insn_info::parse_insn): Adapt for vleff support.
35814 (vector_insn_info::compatible_p): Ditto.
35815 (vector_insn_info::update_fault_first_load_avl): New function.
35816 (pass_vsetvl::transfer_after): Adapt for vleff support.
35817 (pass_vsetvl::demand_fusion): Ditto.
35818 (pass_vsetvl::cleanup_insns): Ditto.
35819 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
35820 redundant condtions.
35821 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
35822 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
35823 * config/riscv/riscv.md: Adapt for vleff support.
35824 * config/riscv/t-riscv: Ditto.
35825 * config/riscv/vector-iterators.md: New iterator.
35826 * config/riscv/vector.md (read_vlsi): New pattern.
35827 (read_vldi_zero_extend): Ditto.
35828 (@pred_fault_load<mode>): Ditto.
35830 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35832 * config/riscv/riscv-vector-builtins.cc
35833 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
35834 (function_expander::use_widen_ternop_insn): Ditto.
35835 * optabs.cc (maybe_gen_insn): Extend nops handling.
35837 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35839 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
35840 patterns according to RVV ISA.
35841 * config/riscv/vector-iterators.md: New iterators.
35842 * config/riscv/vector.md
35843 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
35844 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
35845 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
35846 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
35847 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
35848 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
35849 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
35850 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
35851 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
35852 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35853 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35854 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35855 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35856 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35858 2023-03-10 Michael Collison <collison@rivosinc.com>
35860 * tree-vect-loop-manip.cc (vect_do_peeling): Use
35861 result of constant_lower_bound instead of vf for the lower
35862 bound of the epilog loop trip count.
35864 2023-03-09 Tamar Christina <tamar.christina@arm.com>
35866 * passes.cc (emergency_dump_function): Finish graph generation.
35868 2023-03-09 Tamar Christina <tamar.christina@arm.com>
35870 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
35871 and bottom bit only.
35873 2023-03-09 Andrew Pinski <apinski@marvell.com>
35875 PR tree-optimization/108980
35876 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
35877 Reorgnize the call to warning for not strict flexible arrays
35878 to be before the check of warned.
35880 2023-03-09 Jason Merrill <jason@redhat.com>
35882 * doc/extend.texi: Comment out __is_deducible docs.
35884 2023-03-09 Jason Merrill <jason@redhat.com>
35887 * doc/extend.texi (Type Traits):: Document __is_deducible.
35889 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
35892 * config.host: add object for x86_64-*-mingw*.
35893 * config/i386/sym-mingw32.cc: dummy file to attach
35895 * config/i386/utf8-mingw32.rc: windres resource file.
35896 * config/i386/winnt-utf8.manifest: XML manifest to
35898 * config/i386/x-mingw32: reference to x-mingw32-utf8.
35899 * config/i386/x-mingw32-utf8: Makefile fragment to
35900 embed UTF-8 manifest.
35902 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
35904 * lra-constraints.cc (process_alt_operands): Use operand modes for
35905 clobbered regs instead of the biggest access mode.
35907 2023-03-09 Richard Biener <rguenther@suse.de>
35909 PR middle-end/108995
35910 * fold-const.cc (extract_muldiv_1): Avoid folding
35911 (CST * b) / CST2 when sanitizing overflow and we rely on
35912 overflow being undefined.
35914 2023-03-09 Jakub Jelinek <jakub@redhat.com>
35915 Richard Biener <rguenther@suse.de>
35917 PR tree-optimization/109008
35918 * range-op-float.cc (float_widen_lhs_range): New function.
35919 (foperator_plus::op1_range, foperator_minus::op1_range,
35920 foperator_minus::op2_range, foperator_mult::op1_range,
35921 foperator_div::op1_range, foperator_div::op2_range): Use it.
35923 2023-03-07 Jonathan Grant <jg@jguk.org>
35926 * doc/invoke.texi (Instrumentation Options): Clarify
35927 LeakSanitizer behavior.
35929 2023-03-07 Benson Muite <benson_muite@emailplus.org>
35931 * doc/install.texi (Prerequisites): Add link to gmplib.org.
35933 2023-03-07 Pan Li <pan2.li@intel.com>
35934 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35938 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
35940 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
35941 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
35942 * genmodes.cc (adj_precision): New.
35943 (ADJUST_PRECISION): New.
35944 (emit_mode_adjustments): Handle ADJUST_PRECISION.
35946 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
35948 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
35950 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
35952 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
35953 {s|u}{max|min} in QI, HI and DI modes.
35954 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
35955 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
35956 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
35957 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
35960 2023-03-06 Richard Biener <rguenther@suse.de>
35962 PR tree-optimization/109025
35963 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
35964 the inner LC PHI use is the inner loop PHI latch definition
35965 before classifying an outer PHI as double reduction.
35967 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
35970 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
35972 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
35973 (X86_TUNE_USE_SCATTER): Likewise.
35975 2023-03-06 Xi Ruoyao <xry111@xry111.site>
35978 * config/loongarch/loongarch.h (FP_RETURN): Use
35979 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
35980 (UNITS_PER_FP_ARG): Likewise.
35982 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35984 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
35985 (pass_vsetvl::backward_demand_fusion): Ditto.
35987 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35988 SiYu Wu <siyu@isrc.iscas.ac.cn>
35990 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
35992 (riscv_sm3p1_<mode>): New.
35993 (riscv_sm4ed_<mode>): New.
35994 (riscv_sm4ks_<mode>): New.
35995 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
35996 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
35997 ZKSH's built-in functions.
35999 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
36000 SiYu Wu <siyu@isrc.iscas.ac.cn>
36002 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
36003 (riscv_sha256sig1_<mode>): New.
36004 (riscv_sha256sum0_<mode>): New.
36005 (riscv_sha256sum1_<mode>): New.
36006 (riscv_sha512sig0h): New.
36007 (riscv_sha512sig0l): New.
36008 (riscv_sha512sig1h): New.
36009 (riscv_sha512sig1l): New.
36010 (riscv_sha512sum0r): New.
36011 (riscv_sha512sum1r): New.
36012 (riscv_sha512sig0): New.
36013 (riscv_sha512sig1): New.
36014 (riscv_sha512sum0): New.
36015 (riscv_sha512sum1): New.
36016 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
36017 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
36018 built-in functions.
36019 (DIRECT_BUILTIN): Add new.
36021 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
36022 SiYu Wu <siyu@isrc.iscas.ac.cn>
36024 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
36026 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
36027 (riscv_aes32dsmi): New.
36028 (riscv_aes64ds): New.
36029 (riscv_aes64dsm): New.
36030 (riscv_aes64im): New.
36031 (riscv_aes64ks1i): New.
36032 (riscv_aes64ks2): New.
36033 (riscv_aes32esi): New.
36034 (riscv_aes32esmi): New.
36035 (riscv_aes64es): New.
36036 (riscv_aes64esm): New.
36037 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
36038 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
36039 ZKNE's built-in functions.
36041 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
36042 SiYu Wu <siyu@isrc.iscas.ac.cn>
36044 * config/riscv/bitmanip.md: Add ZBKB's instructions.
36045 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
36046 * config/riscv/riscv.md: Add new type for crypto instructions.
36047 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
36049 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
36050 extension's built-in function file.
36052 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
36053 SiYu Wu <siyu@isrc.iscas.ac.cn>
36055 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
36056 (RISCV_FTYPE_NAME3): New.
36057 (RISCV_ATYPE_QI): New.
36058 (RISCV_ATYPE_HI): New.
36059 (RISCV_FTYPE_ATYPES2): New.
36060 (RISCV_FTYPE_ATYPES3): New.
36061 * config/riscv/riscv-ftypes.def (2): New.
36064 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
36066 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
36069 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36070 kito-cheng <kito.cheng@sifive.com>
36072 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
36073 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
36074 (riscv_register_pragmas): Add builtin function check call.
36075 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
36076 (check_builtin_call): New function.
36077 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
36078 (class vreinterpret): Ditto.
36079 (class vlmul_ext): Ditto.
36080 (class vlmul_trunc): Ditto.
36081 (class vset): Ditto.
36082 (class vget): Ditto.
36084 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36085 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
36101 (vundefined): Add new intrinsic.
36102 (vreinterpret): Ditto.
36103 (vlmul_ext): Ditto.
36104 (vlmul_trunc): Ditto.
36107 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
36108 (struct narrow_alu_def): Ditto.
36109 (struct reduc_alu_def): Ditto.
36110 (struct vundefined_def): Ditto.
36111 (struct misc_def): Ditto.
36112 (struct vset_def): Ditto.
36113 (struct vget_def): Ditto.
36115 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36116 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
36117 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
36118 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
36119 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
36120 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
36121 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
36122 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
36123 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
36124 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
36125 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
36126 (DEF_RVV_LMUL1_OPS): Ditto.
36127 (DEF_RVV_LMUL2_OPS): Ditto.
36128 (DEF_RVV_LMUL4_OPS): Ditto.
36129 (vint16mf4_t): Ditto.
36130 (vint16mf2_t): Ditto.
36131 (vint16m1_t): Ditto.
36132 (vint16m2_t): Ditto.
36133 (vint16m4_t): Ditto.
36134 (vint16m8_t): Ditto.
36135 (vint32mf2_t): Ditto.
36136 (vint32m1_t): Ditto.
36137 (vint32m2_t): Ditto.
36138 (vint32m4_t): Ditto.
36139 (vint32m8_t): Ditto.
36140 (vint64m1_t): Ditto.
36141 (vint64m2_t): Ditto.
36142 (vint64m4_t): Ditto.
36143 (vint64m8_t): Ditto.
36144 (vuint16mf4_t): Ditto.
36145 (vuint16mf2_t): Ditto.
36146 (vuint16m1_t): Ditto.
36147 (vuint16m2_t): Ditto.
36148 (vuint16m4_t): Ditto.
36149 (vuint16m8_t): Ditto.
36150 (vuint32mf2_t): Ditto.
36151 (vuint32m1_t): Ditto.
36152 (vuint32m2_t): Ditto.
36153 (vuint32m4_t): Ditto.
36154 (vuint32m8_t): Ditto.
36155 (vuint64m1_t): Ditto.
36156 (vuint64m2_t): Ditto.
36157 (vuint64m4_t): Ditto.
36158 (vuint64m8_t): Ditto.
36159 (vint8mf4_t): Ditto.
36160 (vint8mf2_t): Ditto.
36161 (vint8m1_t): Ditto.
36162 (vint8m2_t): Ditto.
36163 (vint8m4_t): Ditto.
36164 (vint8m8_t): Ditto.
36165 (vuint8mf4_t): Ditto.
36166 (vuint8mf2_t): Ditto.
36167 (vuint8m1_t): Ditto.
36168 (vuint8m2_t): Ditto.
36169 (vuint8m4_t): Ditto.
36170 (vuint8m8_t): Ditto.
36171 (vint8mf8_t): Ditto.
36172 (vuint8mf8_t): Ditto.
36173 (vfloat32mf2_t): Ditto.
36174 (vfloat32m1_t): Ditto.
36175 (vfloat32m2_t): Ditto.
36176 (vfloat32m4_t): Ditto.
36177 (vfloat64m1_t): Ditto.
36178 (vfloat64m2_t): Ditto.
36179 (vfloat64m4_t): Ditto.
36180 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
36181 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
36182 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
36183 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
36184 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
36185 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
36186 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
36187 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
36188 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
36189 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
36190 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
36191 (DEF_RVV_LMUL1_OPS): Ditto.
36192 (DEF_RVV_LMUL2_OPS): Ditto.
36193 (DEF_RVV_LMUL4_OPS): Ditto.
36194 (DEF_RVV_TYPE_INDEX): Ditto.
36195 (required_extensions_p): Adapt for new intrinsic support/
36196 (get_required_extensions): New function.
36197 (check_required_extensions): Ditto.
36198 (unsigned_base_type_p): Remove.
36199 (rvv_arg_type_info::get_scalar_ptr_type): New function.
36200 (get_mode_for_bitsize): Remove.
36201 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
36202 (rvv_arg_type_info::get_base_vector_type): Ditto.
36203 (rvv_arg_type_info::get_function_type_index): Ditto.
36204 (DEF_RVV_BASE_TYPE): New def.
36205 (function_builder::apply_predication): New class.
36206 (function_expander::mask_mode): Ditto.
36207 (function_checker::function_checker): Ditto.
36208 (function_checker::report_non_ice): Ditto.
36209 (function_checker::report_out_of_range): Ditto.
36210 (function_checker::require_immediate): Ditto.
36211 (function_checker::require_immediate_range): Ditto.
36212 (function_checker::check): Ditto.
36213 (check_builtin_call): Ditto.
36214 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
36215 (DEF_RVV_BASE_TYPE): Ditto.
36216 (DEF_RVV_TYPE_INDEX): Ditto.
36217 (vbool64_t): Ditto.
36218 (vbool32_t): Ditto.
36219 (vbool16_t): Ditto.
36224 (vuint8mf8_t): Ditto.
36225 (vuint8mf4_t): Ditto.
36226 (vuint8mf2_t): Ditto.
36227 (vuint8m1_t): Ditto.
36228 (vuint8m2_t): Ditto.
36229 (vint8m4_t): Ditto.
36230 (vuint8m4_t): Ditto.
36231 (vint8m8_t): Ditto.
36232 (vuint8m8_t): Ditto.
36233 (vint16mf4_t): Ditto.
36234 (vuint16mf2_t): Ditto.
36235 (vuint16m1_t): Ditto.
36236 (vuint16m2_t): Ditto.
36237 (vuint16m4_t): Ditto.
36238 (vuint16m8_t): Ditto.
36239 (vint32mf2_t): Ditto.
36240 (vuint32m1_t): Ditto.
36241 (vuint32m2_t): Ditto.
36242 (vuint32m4_t): Ditto.
36243 (vuint32m8_t): Ditto.
36244 (vuint64m1_t): Ditto.
36245 (vuint64m2_t): Ditto.
36246 (vuint64m4_t): Ditto.
36247 (vuint64m8_t): Ditto.
36248 (vfloat32mf2_t): Ditto.
36249 (vfloat32m1_t): Ditto.
36250 (vfloat32m2_t): Ditto.
36251 (vfloat32m4_t): Ditto.
36252 (vfloat32m8_t): Ditto.
36253 (vfloat64m1_t): Ditto.
36254 (vfloat64m4_t): Ditto.
36255 (vector): Move it def.
36258 (signed_vector): Ditto.
36259 (unsigned_vector): Ditto.
36260 (unsigned_scalar): Ditto.
36261 (vector_ptr): Ditto.
36262 (scalar_ptr): Ditto.
36263 (scalar_const_ptr): Ditto.
36267 (unsigned_long): Ditto.
36269 (eew8_index): Ditto.
36270 (eew16_index): Ditto.
36271 (eew32_index): Ditto.
36272 (eew64_index): Ditto.
36273 (shift_vector): Ditto.
36274 (double_trunc_vector): Ditto.
36275 (quad_trunc_vector): Ditto.
36276 (oct_trunc_vector): Ditto.
36277 (double_trunc_scalar): Ditto.
36278 (double_trunc_signed_vector): Ditto.
36279 (double_trunc_unsigned_vector): Ditto.
36280 (double_trunc_unsigned_scalar): Ditto.
36281 (double_trunc_float_vector): Ditto.
36282 (float_vector): Ditto.
36283 (lmul1_vector): Ditto.
36284 (widen_lmul1_vector): Ditto.
36285 (eew8_interpret): Ditto.
36286 (eew16_interpret): Ditto.
36287 (eew32_interpret): Ditto.
36288 (eew64_interpret): Ditto.
36289 (vlmul_ext_x2): Ditto.
36290 (vlmul_ext_x4): Ditto.
36291 (vlmul_ext_x8): Ditto.
36292 (vlmul_ext_x16): Ditto.
36293 (vlmul_ext_x32): Ditto.
36294 (vlmul_ext_x64): Ditto.
36295 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
36296 (struct function_type_info): New function.
36297 (struct rvv_arg_type_info): Ditto.
36298 (class function_checker): New class.
36299 (rvv_arg_type_info::get_scalar_type): New function.
36300 (rvv_arg_type_info::get_vector_type): Ditto.
36301 (function_expander::ret_mode): New function.
36302 (function_checker::arg_mode): Ditto.
36303 (function_checker::ret_mode): Ditto.
36304 * config/riscv/t-riscv: Add generator.
36305 * config/riscv/vector-iterators.md: New iterators.
36306 * config/riscv/vector.md (vundefined<mode>): New pattern.
36307 (@vundefined<mode>): Ditto.
36308 (@vreinterpret<mode>): Ditto.
36309 (@vlmul_extx2<mode>): Ditto.
36310 (@vlmul_extx4<mode>): Ditto.
36311 (@vlmul_extx8<mode>): Ditto.
36312 (@vlmul_extx16<mode>): Ditto.
36313 (@vlmul_extx32<mode>): Ditto.
36314 (@vlmul_extx64<mode>): Ditto.
36315 (*vlmul_extx2<mode>): Ditto.
36316 (*vlmul_extx4<mode>): Ditto.
36317 (*vlmul_extx8<mode>): Ditto.
36318 (*vlmul_extx16<mode>): Ditto.
36319 (*vlmul_extx32<mode>): Ditto.
36320 (*vlmul_extx64<mode>): Ditto.
36321 * config/riscv/genrvv-type-indexer.cc: New file.
36323 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36325 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
36326 (slide1_sew64_helper): New function.
36327 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
36328 (get_unknown_min_value): Ditto.
36329 (force_vector_length_operand): Ditto.
36330 (gen_no_side_effects_vsetvl_rtx): Ditto.
36331 (get_vl_x2_rtx): Ditto.
36332 (slide1_sew64_helper): Ditto.
36333 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
36334 (class vrgather): Ditto.
36335 (class vrgatherei16): Ditto.
36336 (class vcompress): Ditto.
36338 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36339 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
36340 (vslidedown): Ditto.
36341 (vslide1up): Ditto.
36342 (vslide1down): Ditto.
36343 (vfslide1up): Ditto.
36344 (vfslide1down): Ditto.
36346 (vrgatherei16): Ditto.
36347 (vcompress): Ditto.
36348 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
36349 (vint8mf8_t): Ditto.
36350 (vint8mf4_t): Ditto.
36351 (vint8mf2_t): Ditto.
36352 (vint8m1_t): Ditto.
36353 (vint8m2_t): Ditto.
36354 (vint8m4_t): Ditto.
36355 (vint16mf4_t): Ditto.
36356 (vint16mf2_t): Ditto.
36357 (vint16m1_t): Ditto.
36358 (vint16m2_t): Ditto.
36359 (vint16m4_t): Ditto.
36360 (vint16m8_t): Ditto.
36361 (vint32mf2_t): Ditto.
36362 (vint32m1_t): Ditto.
36363 (vint32m2_t): Ditto.
36364 (vint32m4_t): Ditto.
36365 (vint32m8_t): Ditto.
36366 (vint64m1_t): Ditto.
36367 (vint64m2_t): Ditto.
36368 (vint64m4_t): Ditto.
36369 (vint64m8_t): Ditto.
36370 (vuint8mf8_t): Ditto.
36371 (vuint8mf4_t): Ditto.
36372 (vuint8mf2_t): Ditto.
36373 (vuint8m1_t): Ditto.
36374 (vuint8m2_t): Ditto.
36375 (vuint8m4_t): Ditto.
36376 (vuint16mf4_t): Ditto.
36377 (vuint16mf2_t): Ditto.
36378 (vuint16m1_t): Ditto.
36379 (vuint16m2_t): Ditto.
36380 (vuint16m4_t): Ditto.
36381 (vuint16m8_t): Ditto.
36382 (vuint32mf2_t): Ditto.
36383 (vuint32m1_t): Ditto.
36384 (vuint32m2_t): Ditto.
36385 (vuint32m4_t): Ditto.
36386 (vuint32m8_t): Ditto.
36387 (vuint64m1_t): Ditto.
36388 (vuint64m2_t): Ditto.
36389 (vuint64m4_t): Ditto.
36390 (vuint64m8_t): Ditto.
36391 (vfloat32mf2_t): Ditto.
36392 (vfloat32m1_t): Ditto.
36393 (vfloat32m2_t): Ditto.
36394 (vfloat32m4_t): Ditto.
36395 (vfloat32m8_t): Ditto.
36396 (vfloat64m1_t): Ditto.
36397 (vfloat64m2_t): Ditto.
36398 (vfloat64m4_t): Ditto.
36399 (vfloat64m8_t): Ditto.
36400 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
36401 * config/riscv/riscv.md: Adjust RVV instruction types.
36402 * config/riscv/vector-iterators.md (down): New iterator.
36403 (=vd,vr): New attribute.
36404 (UNSPEC_VSLIDE1UP): New unspec.
36405 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
36406 (*pred_slide<ud><mode>): Ditto.
36407 (*pred_slide<ud><mode>_extended): Ditto.
36408 (@pred_gather<mode>): Ditto.
36409 (@pred_gather<mode>_scalar): Ditto.
36410 (@pred_gatherei16<mode>): Ditto.
36411 (@pred_compress<mode>): Ditto.
36413 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36415 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
36417 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36419 * config/riscv/constraints.md (Wb1): New constraint.
36420 * config/riscv/predicates.md
36421 (vector_least_significant_set_mask_operand): New predicate.
36422 (vector_broadcast_mask_operand): Ditto.
36423 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
36424 (gen_scalar_move_mask): New function.
36425 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
36426 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
36427 (class vmv_s): Ditto.
36429 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36430 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
36434 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
36436 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36437 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
36438 (function_expander::use_exact_insn): New function.
36439 (function_expander::use_contiguous_load_insn): New function.
36440 (function_expander::use_contiguous_store_insn): New function.
36441 (function_expander::use_ternop_insn): New function.
36442 (function_expander::use_widen_ternop_insn): New function.
36443 (function_expander::use_scalar_move_insn): New function.
36444 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
36445 * config/riscv/riscv-vector-builtins.h
36446 (function_expander::add_scalar_move_mask_operand): New class.
36447 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
36448 (scalar_move_insn_p): Ditto.
36449 (has_vsetvl_killed_avl_p): Ditto.
36450 (anticipatable_occurrence_p): Ditto.
36451 (insert_vsetvl): Ditto.
36452 (get_vl_vtype_info): Ditto.
36453 (calculate_sew): Ditto.
36454 (calculate_vlmul): Ditto.
36455 (incompatible_avl_p): Ditto.
36456 (different_sew_p): Ditto.
36457 (different_lmul_p): Ditto.
36458 (different_ratio_p): Ditto.
36459 (different_tail_policy_p): Ditto.
36460 (different_mask_policy_p): Ditto.
36461 (possible_zero_avl_p): Ditto.
36462 (first_ratio_invalid_for_second_sew_p): Ditto.
36463 (first_ratio_invalid_for_second_lmul_p): Ditto.
36464 (second_ratio_invalid_for_first_sew_p): Ditto.
36465 (second_ratio_invalid_for_first_lmul_p): Ditto.
36466 (second_sew_less_than_first_sew_p): Ditto.
36467 (first_sew_less_than_second_sew_p): Ditto.
36468 (compare_lmul): Ditto.
36469 (second_lmul_less_than_first_lmul_p): Ditto.
36470 (first_lmul_less_than_second_lmul_p): Ditto.
36471 (first_ratio_less_than_second_ratio_p): Ditto.
36472 (second_ratio_less_than_first_ratio_p): Ditto.
36473 (DEF_INCOMPATIBLE_COND): Ditto.
36474 (greatest_sew): Ditto.
36475 (first_sew): Ditto.
36476 (second_sew): Ditto.
36477 (first_vlmul): Ditto.
36478 (second_vlmul): Ditto.
36479 (first_ratio): Ditto.
36480 (second_ratio): Ditto.
36481 (vlmul_for_first_sew_second_ratio): Ditto.
36482 (ratio_for_second_sew_first_vlmul): Ditto.
36483 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
36484 (always_unavailable): Ditto.
36485 (avl_unavailable_p): Ditto.
36486 (sew_unavailable_p): Ditto.
36487 (lmul_unavailable_p): Ditto.
36488 (ge_sew_unavailable_p): Ditto.
36489 (ge_sew_lmul_unavailable_p): Ditto.
36490 (ge_sew_ratio_unavailable_p): Ditto.
36491 (DEF_UNAVAILABLE_COND): Ditto.
36492 (same_sew_lmul_demand_p): Ditto.
36493 (propagate_avl_across_demands_p): Ditto.
36494 (reg_available_p): Ditto.
36495 (avl_info::has_non_zero_avl): Ditto.
36496 (vl_vtype_info::has_non_zero_avl): Ditto.
36497 (vector_insn_info::operator>=): Refactor.
36498 (vector_insn_info::parse_insn): Adjust for scalar move.
36499 (vector_insn_info::demand_vl_vtype): Remove.
36500 (vector_insn_info::compatible_p): New function.
36501 (vector_insn_info::compatible_avl_p): Ditto.
36502 (vector_insn_info::compatible_vtype_p): Ditto.
36503 (vector_insn_info::available_p): Ditto.
36504 (vector_insn_info::merge): Ditto.
36505 (vector_insn_info::fuse_avl): Ditto.
36506 (vector_insn_info::fuse_sew_lmul): Ditto.
36507 (vector_insn_info::fuse_tail_policy): Ditto.
36508 (vector_insn_info::fuse_mask_policy): Ditto.
36509 (vector_insn_info::dump): Ditto.
36510 (vector_infos_manager::release): Ditto.
36511 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
36512 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
36513 (pass_vsetvl::hard_empty_block_p): Ditto.
36514 (pass_vsetvl::backward_demand_fusion): Ditto.
36515 (pass_vsetvl::forward_demand_fusion): Ditto.
36516 (pass_vsetvl::refine_vsetvls): Ditto.
36517 (pass_vsetvl::cleanup_vsetvls): Ditto.
36518 (pass_vsetvl::commit_vsetvls): Ditto.
36519 (pass_vsetvl::propagate_avl): Ditto.
36520 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
36521 (struct demands_pair): Ditto.
36522 (struct demands_cond): Ditto.
36523 (struct demands_fuse_rule): Ditto.
36524 * config/riscv/vector-iterators.md: New iterator.
36525 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
36526 (*pred_broadcast<mode>): Ditto.
36527 (*pred_broadcast<mode>_extended_scalar): Ditto.
36528 (@pred_extract_first<mode>): Ditto.
36529 (*pred_extract_first<mode>): Ditto.
36530 (@pred_extract_first_trunc<mode>): Ditto.
36531 * config/riscv/riscv-vsetvl.def: New file.
36533 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
36535 * config/riscv/bitmanip.md: allow 0 constant in max/min
36538 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
36540 * config/riscv/bitmanip.md: Fix wrong index in the check.
36542 2023-03-04 Jakub Jelinek <jakub@redhat.com>
36544 PR middle-end/109006
36545 * vec.cc (test_auto_alias): Adjust comment for removal of
36547 * read-rtl-function.cc (function_reader::parse_block): Likewise.
36548 * gdbhooks.py: Likewise.
36550 2023-03-04 Jakub Jelinek <jakub@redhat.com>
36552 PR testsuite/108973
36553 * selftest-diagnostic.cc
36554 (test_diagnostic_context::test_diagnostic_context): Set
36555 caret_max_width to 80.
36557 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36559 * gimple-ssa-warn-access.cc
36560 (pass_waccess::check_dangling_stores): Skip non-stores.
36562 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36564 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
36565 after vmsr and vmrs, and lower the case of P0.
36567 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
36569 PR middle-end/109006
36570 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
36572 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
36574 PR middle-end/109006
36575 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
36577 2023-03-03 Jakub Jelinek <jakub@redhat.com>
36580 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
36581 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
36582 suppressed on stmt. For [static %E] warning, print access_nelts
36583 rather than access_size. Fix up comment wording.
36585 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
36587 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
36588 arch14 instead of z16.
36590 2023-03-03 Anthony Green <green@moxielogic.com>
36592 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
36594 2023-03-03 Anthony Green <green@moxielogic.com>
36596 * config/moxie/constraints.md (A, B, W): Change
36597 define_constraint to define_memory_constraint.
36599 2023-03-03 Xi Ruoyao <xry111@xry111.site>
36601 * toplev.cc (process_options): Fix the spelling of
36602 "-fstack-clash-protection".
36604 2023-03-03 Richard Biener <rguenther@suse.de>
36606 PR tree-optimization/109002
36607 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
36608 PHI-translate ANTIC_IN.
36610 2023-03-03 Jakub Jelinek <jakub@redhat.com>
36612 PR tree-optimization/108988
36613 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
36614 size_type_node before passing it as argument to fwrite. Formatting
36617 2023-03-03 Richard Biener <rguenther@suse.de>
36620 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
36621 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
36622 * config/i386/i386-features.h (scalar_chain::max_visits): New.
36623 (scalar_chain::build): Add bitmap parameter, return boolean.
36624 (scalar_chain::add_insn): Likewise.
36625 (scalar_chain::analyze_register_chain): Likewise.
36626 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
36627 Initialize max_visits.
36628 (scalar_chain::analyze_register_chain): When we exhaust
36629 max_visits, abort. Also abort when running into any
36631 (scalar_chain::add_insn): Propagate abort.
36632 (scalar_chain::build): Likewise. When aborting amend
36633 the set of disallowed insn with the insns set.
36634 (convert_scalars_to_vector): Adjust. Do not convert aborted
36637 2023-03-03 Richard Biener <rguenther@suse.de>
36640 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
36641 generate a DIE for a function scope static.
36643 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36645 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
36647 2023-03-02 Jakub Jelinek <jakub@redhat.com>
36650 * target.h (emit_support_tinfos_callback): New typedef.
36651 * targhooks.h (default_emit_support_tinfos): Declare.
36652 * targhooks.cc (default_emit_support_tinfos): New function.
36653 * target.def (emit_support_tinfos): New target hook.
36654 * doc/tm.texi.in (emit_support_tinfos): Document it.
36655 * doc/tm.texi: Regenerated.
36656 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
36657 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
36659 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
36661 * ira-costs.cc: Include print-rtl.h.
36662 (record_reg_classes, scan_one_insn): Add code to print debug info.
36663 (record_operand_costs): Find and use smaller cost for hard reg
36666 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
36667 Paul-Antoine Arras <pa@codesourcery.com>
36669 * builtins.cc (mathfn_built_in_explicit): New.
36670 * config/gcn/gcn.cc: Include case-cfn-macros.h.
36671 (mathfn_built_in_explicit): Add prototype.
36672 (gcn_vectorize_builtin_vectorized_function): New.
36673 (gcn_libc_has_function): New.
36674 (TARGET_LIBC_HAS_FUNCTION): Define.
36675 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
36677 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36679 PR tree-optimization/108979
36680 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
36681 operations on invariants.
36683 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
36685 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
36686 * config/s390/s390.cc (s390_option_override_internal): Make
36687 partial vector usage the default from z13 on.
36688 * config/s390/vector.md (len_load_v16qi): Add.
36689 (len_store_v16qi): Add.
36691 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
36693 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
36694 of constant 0 offset.
36696 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
36698 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
36700 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
36702 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
36704 * config.gcc: add -with-{no-}msa build option.
36705 * config/mips/mips.h: Likewise.
36706 * doc/install.texi: Likewise.
36708 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36710 PR tree-optimization/108603
36711 * explow.cc (convert_memory_address_addr_space_1): Only wrap
36712 the result of a recursive call in a CONST if no instructions
36715 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36717 PR tree-optimization/108430
36718 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
36719 of inverted condition.
36721 2023-03-02 Jakub Jelinek <jakub@redhat.com>
36724 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
36725 comparison copy the bytes from ptr to a temporary buffer and clearing
36726 padding bits in there.
36728 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
36730 PR middle-end/108545
36731 * gimplify.cc (struct tree_operand_hash_no_se): New.
36732 (omp_index_mapping_groups_1, omp_index_mapping_groups,
36733 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
36734 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
36735 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
36736 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
36737 of tree_operand_hash.
36739 2023-03-01 LIU Hao <lh_mouse@126.com>
36742 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
36743 Remove the size limit `pch_VA_max_size`
36745 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
36747 PR middle-end/108546
36748 * omp-low.cc (lower_omp_target): Remove optional handling
36749 on the receiver side, i.e. inside target (data), for
36752 2023-03-01 Jakub Jelinek <jakub@redhat.com>
36755 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
36756 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
36758 2023-03-01 Richard Biener <rguenther@suse.de>
36760 PR tree-optimization/108970
36761 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
36762 Check we can copy the BBs.
36763 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
36765 (vect_do_peeling): Streamline error handling.
36767 2023-03-01 Richard Biener <rguenther@suse.de>
36769 PR tree-optimization/108950
36770 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
36771 Check oprnd0 is defined in the loop.
36772 * tree-vect-loop.cc (vectorizable_reduction): Record all
36773 operands vector types, compute that of invariants and
36774 properly update their SLP nodes.
36776 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
36779 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
36780 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
36782 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
36784 PR middle-end/107411
36785 PR middle-end/107411
36786 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
36788 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
36789 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
36791 2023-02-28 Jakub Jelinek <jakub@redhat.com>
36793 PR sanitizer/108894
36794 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
36795 comparison rather than index > bound.
36796 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
36797 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
36798 * doc/invoke.texi (-fsanitize=bounds): Document that whether
36799 flexible array member-like arrays are instrumented or not depends
36800 on -fstrict-flex-arrays* options of strict_flex_array attributes.
36801 (-fsanitize=bounds-strict): Document that flexible array members
36802 are not instrumented.
36804 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
36808 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
36809 (fmod<mode>3): Ditto.
36810 (fpremxf4_i387): Ditto.
36811 (reminderxf3): Ditto.
36812 (reminder<mode>3): Ditto.
36813 (fprem1xf4_i387): Ditto.
36815 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
36817 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
36818 generating FFS with mismatched operand and result modes, by using
36819 an explicit SIGN_EXTEND/ZERO_EXTEND.
36820 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
36821 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
36823 2023-02-27 Patrick Palka <ppalka@redhat.com>
36825 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
36826 * lra-int.h (lra_change_class): Likewise.
36827 * recog.h (which_op_alt): Likewise.
36828 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
36831 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36833 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
36835 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
36837 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
36838 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
36840 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
36842 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
36843 (xtensa_get_config_v3): New functions.
36845 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36847 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
36849 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
36851 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
36852 the macro to 0x1000000000.
36854 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
36857 * doc/gm2.texi (-fm2-pathname): New option documented.
36858 (-fm2-pathnameI): New option documented.
36859 (-fm2-prefix=): New option documented.
36860 (-fruntime-modules=): Update default module list.
36862 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
36865 * config/xtensa/xtensa-protos.h
36866 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
36867 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
36868 to xtensa_expand_call.
36869 (xtensa_expand_call): Emit the call and add a clobber expression
36870 for the static chain to it in case of windowed ABI.
36871 * config/xtensa/xtensa.md (call, call_value, sibcall)
36872 (sibcall_value): Call xtensa_expand_call and complete expansion
36873 right after that call.
36875 2023-02-24 Richard Biener <rguenther@suse.de>
36877 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
36878 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
36879 changing alignment of vec<T, A, vl_embed> and simplifying
36881 (vec<T, A, vl_embed>::address): Compute as this + 1.
36882 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
36883 vector instead of the offset of the m_vecdata member.
36884 (auto_vec<T, N>::m_data): Turn storage into
36885 uninitialized unsigned char.
36886 (auto_vec<T, N>::auto_vec): Allow allocation of one
36887 stack member. Initialize m_vec in a special way to
36888 avoid later stringop overflow diagnostics.
36889 * vec.cc (test_auto_alias): New.
36890 (vec_cc_tests): Call it.
36892 2023-02-24 Richard Biener <rguenther@suse.de>
36894 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
36895 take a const reference to the object, use address to
36897 (vec<T, A, vl_embed>::contains): Use address to access data.
36898 (vec<T, A, vl_embed>::operator[]): Use address instead of
36899 m_vecdata to access data.
36900 (vec<T, A, vl_embed>::iterate): Likewise.
36901 (vec<T, A, vl_embed>::copy): Likewise.
36902 (vec<T, A, vl_embed>::quick_push): Likewise.
36903 (vec<T, A, vl_embed>::pop): Likewise.
36904 (vec<T, A, vl_embed>::quick_insert): Likewise.
36905 (vec<T, A, vl_embed>::ordered_remove): Likewise.
36906 (vec<T, A, vl_embed>::unordered_remove): Likewise.
36907 (vec<T, A, vl_embed>::block_remove): Likewise.
36908 (vec<T, A, vl_heap>::address): Likewise.
36910 2023-02-24 Martin Liska <mliska@suse.cz>
36912 PR sanitizer/108834
36913 * asan.cc (asan_add_global): Use proper TU name for normal
36914 global variables (and aux_base_name for the artificial one).
36916 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36918 * config/i386/i386-builtin.def: Update description of BDESC
36919 and BDESC_FIRST in file comment to include mask2.
36921 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36923 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
36925 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36927 PR middle-end/108854
36928 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
36929 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
36930 nodes and adjust their DECL_CONTEXT.
36932 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36935 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
36936 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
36937 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
36938 __builtin_ia32_cvtne2ps2bf16_v8bf,
36939 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
36940 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
36941 __builtin_ia32_cvtneps2bf16_v8sf_mask,
36942 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
36943 __builtin_ia32_cvtneps2bf16_v4sf_mask,
36944 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
36945 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
36946 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
36947 __builtin_ia32_dpbf16ps_v4sf_mask,
36948 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
36949 OPTION_MASK_ISA_AVX512VL.
36951 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
36953 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
36954 Add non-compact 32-bit multilibs.
36956 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
36958 * config/mips/mips.md (*clo<mode>2): New pattern.
36960 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
36962 * config/mips/mips.h (machine_function): New variable
36963 use_hazard_barrier_return_p.
36964 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
36965 (mips_hb_return_internal): New insn pattern.
36966 * config/mips/mips.cc (mips_attribute_table): Add attribute
36967 use_hazard_barrier_return.
36968 (mips_use_hazard_barrier_return_p): New static function.
36969 (mips_function_attr_inlinable_p): Likewise.
36970 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
36971 Emit error for unsupported architecture choice.
36972 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
36973 Return false for use_hazard_barrier_return.
36974 (mips_expand_epilogue): Emit hazard barrier return.
36975 * doc/extend.texi: Document use_hazard_barrier_return.
36977 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36979 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
36980 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
36981 for the gcc-internal headers.
36983 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36985 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
36986 and $(POSTCOMPILE) instead of manual dependency listing.
36987 * config/xtensa/xtensa-dynconfig.c: Rename to ...
36988 * config/xtensa/xtensa-dynconfig.cc: ... this.
36990 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
36992 * doc/cfg.texi: Reorder index entries around @items.
36993 * doc/cpp.texi: Ditto.
36994 * doc/cppenv.texi: Ditto.
36995 * doc/cppopts.texi: Ditto.
36996 * doc/generic.texi: Ditto.
36997 * doc/install.texi: Ditto.
36998 * doc/extend.texi: Ditto.
36999 * doc/invoke.texi: Ditto.
37000 * doc/md.texi: Ditto.
37001 * doc/rtl.texi: Ditto.
37002 * doc/tm.texi.in: Ditto.
37003 * doc/trouble.texi: Ditto.
37004 * doc/tm.texi: Regenerate.
37006 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37008 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
37009 the occurrence of general-purpose register used only once and for
37010 transferring intermediate value.
37012 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37014 * config/xtensa/xtensa.cc (machine_function): Add new member
37015 'eliminated_callee_saved_bmp'.
37016 (xtensa_can_eliminate_callee_saved_reg_p): New function to
37017 determine whether the register can be eliminated or not.
37018 (xtensa_expand_prologue): Add invoking the above function and
37019 elimination the use of callee-saved register by using its stack
37020 slot through the stack pointer (or the frame pointer if needed)
37022 (xtensa_expand_prologue): Modify to not emit register restoration
37023 insn from its stack slot if the register is already eliminated.
37025 2023-02-23 Jakub Jelinek <jakub@redhat.com>
37027 PR translation/108890
37028 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
37029 around fatal_error format strings.
37031 2023-02-23 Richard Biener <rguenther@suse.de>
37033 * tree-ssa-structalias.cc (handle_lhs_call): Do not
37034 re-create rhsc, only truncate it.
37036 2023-02-23 Jakub Jelinek <jakub@redhat.com>
37038 PR middle-end/106258
37039 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
37040 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
37042 2023-02-23 Richard Biener <rguenther@suse.de>
37044 * tree-if-conv.cc (tree_if_conversion): Properly manage
37045 memory of refs and the contained data references.
37047 2023-02-23 Richard Biener <rguenther@suse.de>
37049 PR tree-optimization/108888
37050 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
37051 calls to predicate.
37052 (predicate_statements): Only predicate calls with PLF_2.
37054 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37056 * config/xtensa/xtensa.md
37057 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
37058 Add missing "SI:" to PLUS RTXes.
37060 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
37063 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
37064 Emit (use (reg:SI A0_REG)) at the end in the sibling call
37065 (i.e. the same place as (return) in the normal call).
37067 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
37070 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
37073 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
37075 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
37076 (sibcall_value, sibcall_value_internal): Add 'use' expression
37079 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
37081 * doc/cppdiropts.texi: Reorder @opindex commands to precede
37082 @items they relate to.
37083 * doc/cppopts.texi: Ditto.
37084 * doc/cppwarnopts.texi: Ditto.
37085 * doc/invoke.texi: Ditto.
37086 * doc/lto.texi: Ditto.
37088 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
37090 * internal-fn.cc (expand_MASK_CALL): New.
37091 * internal-fn.def (MASK_CALL): New.
37092 * internal-fn.h (expand_MASK_CALL): New prototype.
37093 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
37094 for mask arguments also.
37095 * tree-if-conv.cc: Include cgraph.h.
37096 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
37097 (predicate_statements): Convert functions to IFN_MASK_CALL.
37098 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
37099 IFN_MASK_CALL as a SIMD function call.
37100 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
37101 IFN_MASK_CALL as an inbranch SIMD function call.
37102 Generate the mask vector arguments.
37104 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37106 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
37107 (class widen_reducop): Ditto.
37108 (class freducop): Ditto.
37109 (class widen_freducop): Ditto.
37111 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37112 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
37121 (vwredsumu): Ditto.
37122 (vfredusum): Ditto.
37123 (vfredosum): Ditto.
37126 (vfwredosum): Ditto.
37127 (vfwredusum): Ditto.
37128 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
37130 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37131 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
37132 (DEF_RVV_WU_OPS): Ditto.
37133 (DEF_RVV_WF_OPS): Ditto.
37134 (vint8mf8_t): Ditto.
37135 (vint8mf4_t): Ditto.
37136 (vint8mf2_t): Ditto.
37137 (vint8m1_t): Ditto.
37138 (vint8m2_t): Ditto.
37139 (vint8m4_t): Ditto.
37140 (vint8m8_t): Ditto.
37141 (vint16mf4_t): Ditto.
37142 (vint16mf2_t): Ditto.
37143 (vint16m1_t): Ditto.
37144 (vint16m2_t): Ditto.
37145 (vint16m4_t): Ditto.
37146 (vint16m8_t): Ditto.
37147 (vint32mf2_t): Ditto.
37148 (vint32m1_t): Ditto.
37149 (vint32m2_t): Ditto.
37150 (vint32m4_t): Ditto.
37151 (vint32m8_t): Ditto.
37152 (vuint8mf8_t): Ditto.
37153 (vuint8mf4_t): Ditto.
37154 (vuint8mf2_t): Ditto.
37155 (vuint8m1_t): Ditto.
37156 (vuint8m2_t): Ditto.
37157 (vuint8m4_t): Ditto.
37158 (vuint8m8_t): Ditto.
37159 (vuint16mf4_t): Ditto.
37160 (vuint16mf2_t): Ditto.
37161 (vuint16m1_t): Ditto.
37162 (vuint16m2_t): Ditto.
37163 (vuint16m4_t): Ditto.
37164 (vuint16m8_t): Ditto.
37165 (vuint32mf2_t): Ditto.
37166 (vuint32m1_t): Ditto.
37167 (vuint32m2_t): Ditto.
37168 (vuint32m4_t): Ditto.
37169 (vuint32m8_t): Ditto.
37170 (vfloat32mf2_t): Ditto.
37171 (vfloat32m1_t): Ditto.
37172 (vfloat32m2_t): Ditto.
37173 (vfloat32m4_t): Ditto.
37174 (vfloat32m8_t): Ditto.
37175 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
37176 (DEF_RVV_WU_OPS): Ditto.
37177 (DEF_RVV_WF_OPS): Ditto.
37178 (required_extensions_p): Add reduction support.
37179 (rvv_arg_type_info::get_base_vector_type): Ditto.
37180 (rvv_arg_type_info::get_tree_type): Ditto.
37181 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
37182 * config/riscv/riscv.md: Ditto.
37183 * config/riscv/vector-iterators.md (minu): Ditto.
37184 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
37185 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
37186 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
37187 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
37188 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
37189 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
37190 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
37192 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37194 * config/riscv/iterators.md: New iterator.
37195 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
37196 (enum ternop_type): New enum.
37197 (class vmacc): New class.
37198 (class imac): Ditto.
37199 (class vnmsac): Ditto.
37200 (enum widen_ternop_type): New enum.
37201 (class vmadd): Ditto.
37202 (class vnmsub): Ditto.
37203 (class iwmac): Ditto.
37204 (class vwmacc): Ditto.
37205 (class vwmaccu): Ditto.
37206 (class vwmaccsu): Ditto.
37207 (class vwmaccus): Ditto.
37208 (class reverse_binop): Ditto.
37209 (class vfmacc): Ditto.
37210 (class vfnmsac): Ditto.
37211 (class vfmadd): Ditto.
37212 (class vfnmsub): Ditto.
37213 (class vfnmacc): Ditto.
37214 (class vfmsac): Ditto.
37215 (class vfnmadd): Ditto.
37216 (class vfmsub): Ditto.
37217 (class vfwmacc): Ditto.
37218 (class vfwnmacc): Ditto.
37219 (class vfwmsac): Ditto.
37220 (class vfwnmsac): Ditto.
37221 (class float_misc): Ditto.
37222 (class fcmp): Ditto.
37223 (class vfclass): Ditto.
37224 (class vfcvt_x): Ditto.
37225 (class vfcvt_rtz_x): Ditto.
37226 (class vfcvt_f): Ditto.
37227 (class vfwcvt_x): Ditto.
37228 (class vfwcvt_rtz_x): Ditto.
37229 (class vfwcvt_f): Ditto.
37230 (class vfncvt_x): Ditto.
37231 (class vfncvt_rtz_x): Ditto.
37232 (class vfncvt_f): Ditto.
37233 (class vfncvt_rod_f): Ditto.
37235 * config/riscv/riscv-vector-builtins-bases.h:
37236 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
37280 (vfcvt_rtz_x): Ditto.
37281 (vfcvt_rtz_xu): Ditto.
37284 (vfwcvt_xu): Ditto.
37285 (vfwcvt_rtz_x): Ditto.
37286 (vfwcvt_rtz_xu): Ditto.
37289 (vfncvt_xu): Ditto.
37290 (vfncvt_rtz_x): Ditto.
37291 (vfncvt_rtz_xu): Ditto.
37293 (vfncvt_rod_f): Ditto.
37294 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
37295 (struct move_def): Ditto.
37296 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
37297 (DEF_RVV_CONVERT_I_OPS): Ditto.
37298 (DEF_RVV_CONVERT_U_OPS): Ditto.
37299 (DEF_RVV_WCONVERT_I_OPS): Ditto.
37300 (DEF_RVV_WCONVERT_U_OPS): Ditto.
37301 (DEF_RVV_WCONVERT_F_OPS): Ditto.
37302 (vfloat64m1_t): Ditto.
37303 (vfloat64m2_t): Ditto.
37304 (vfloat64m4_t): Ditto.
37305 (vfloat64m8_t): Ditto.
37306 (vint32mf2_t): Ditto.
37307 (vint32m1_t): Ditto.
37308 (vint32m2_t): Ditto.
37309 (vint32m4_t): Ditto.
37310 (vint32m8_t): Ditto.
37311 (vint64m1_t): Ditto.
37312 (vint64m2_t): Ditto.
37313 (vint64m4_t): Ditto.
37314 (vint64m8_t): Ditto.
37315 (vuint32mf2_t): Ditto.
37316 (vuint32m1_t): Ditto.
37317 (vuint32m2_t): Ditto.
37318 (vuint32m4_t): Ditto.
37319 (vuint32m8_t): Ditto.
37320 (vuint64m1_t): Ditto.
37321 (vuint64m2_t): Ditto.
37322 (vuint64m4_t): Ditto.
37323 (vuint64m8_t): Ditto.
37324 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
37325 (DEF_RVV_CONVERT_U_OPS): Ditto.
37326 (DEF_RVV_WCONVERT_I_OPS): Ditto.
37327 (DEF_RVV_WCONVERT_U_OPS): Ditto.
37328 (DEF_RVV_WCONVERT_F_OPS): Ditto.
37329 (DEF_RVV_F_OPS): Ditto.
37330 (DEF_RVV_WEXTF_OPS): Ditto.
37331 (required_extensions_p): Adjust for floating-point support.
37332 (check_required_extensions): Ditto.
37333 (unsigned_base_type_p): Ditto.
37334 (get_mode_for_bitsize): Ditto.
37335 (rvv_arg_type_info::get_base_vector_type): Ditto.
37336 (rvv_arg_type_info::get_tree_type): Ditto.
37337 * config/riscv/riscv-vector-builtins.def (v_f): New define.
37340 (xu_v): New define.
37342 (xu_w): New define.
37343 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
37344 (function_expander::arg_mode): New function.
37345 * config/riscv/vector-iterators.md (sof): New iterator.
37351 (fixuns_trunc): Ditto.
37353 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
37354 (@pred_<optab><mode>): Ditto.
37355 (@pred_<optab><mode>_scalar): Ditto.
37356 (@pred_<optab><mode>_reverse_scalar): Ditto.
37357 (@pred_<copysign><mode>): Ditto.
37358 (@pred_<copysign><mode>_scalar): Ditto.
37359 (@pred_mul_<optab><mode>): Ditto.
37360 (pred_mul_<optab><mode>_undef_merge): Ditto.
37361 (*pred_<madd_nmsub><mode>): Ditto.
37362 (*pred_<macc_nmsac><mode>): Ditto.
37363 (*pred_mul_<optab><mode>): Ditto.
37364 (@pred_mul_<optab><mode>_scalar): Ditto.
37365 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
37366 (*pred_<madd_nmsub><mode>_scalar): Ditto.
37367 (*pred_<macc_nmsac><mode>_scalar): Ditto.
37368 (*pred_mul_<optab><mode>_scalar): Ditto.
37369 (@pred_neg_mul_<optab><mode>): Ditto.
37370 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
37371 (*pred_<nmadd_msub><mode>): Ditto.
37372 (*pred_<nmacc_msac><mode>): Ditto.
37373 (*pred_neg_mul_<optab><mode>): Ditto.
37374 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
37375 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
37376 (*pred_<nmadd_msub><mode>_scalar): Ditto.
37377 (*pred_<nmacc_msac><mode>_scalar): Ditto.
37378 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
37379 (@pred_<misc_op><mode>): Ditto.
37380 (@pred_class<mode>): Ditto.
37381 (@pred_dual_widen_<optab><mode>): Ditto.
37382 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
37383 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
37384 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
37385 (@pred_widen_mul_<optab><mode>): Ditto.
37386 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
37387 (@pred_widen_neg_mul_<optab><mode>): Ditto.
37388 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
37389 (@pred_cmp<mode>): Ditto.
37390 (*pred_cmp<mode>): Ditto.
37391 (*pred_cmp<mode>_narrow): Ditto.
37392 (@pred_cmp<mode>_scalar): Ditto.
37393 (*pred_cmp<mode>_scalar): Ditto.
37394 (*pred_cmp<mode>_scalar_narrow): Ditto.
37395 (@pred_eqne<mode>_scalar): Ditto.
37396 (*pred_eqne<mode>_scalar): Ditto.
37397 (*pred_eqne<mode>_scalar_narrow): Ditto.
37398 (@pred_merge<mode>_scalar): Ditto.
37399 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
37400 (@pred_<fix_cvt><mode>): Ditto.
37401 (@pred_<float_cvt><mode>): Ditto.
37402 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
37403 (@pred_widen_<fix_cvt><mode>): Ditto.
37404 (@pred_widen_<float_cvt><mode>): Ditto.
37405 (@pred_extend<mode>): Ditto.
37406 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
37407 (@pred_narrow_<fix_cvt><mode>): Ditto.
37408 (@pred_narrow_<float_cvt><mode>): Ditto.
37409 (@pred_trunc<mode>): Ditto.
37410 (@pred_rod_trunc<mode>): Ditto.
37412 2023-02-22 Jakub Jelinek <jakub@redhat.com>
37414 PR middle-end/106258
37415 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
37416 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
37417 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
37418 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
37420 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
37422 * common.opt (-Wcomplain-wrong-lang): New.
37423 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
37424 * opts-common.cc (prune_options): Handle it.
37425 * opts-global.cc (complain_wrong_lang): Use it.
37427 2023-02-21 David Malcolm <dmalcolm@redhat.com>
37430 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
37432 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
37435 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
37437 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
37438 (sibcall_value, sibcall_value_internal): Add 'use' expression
37441 2023-02-21 Richard Biener <rguenther@suse.de>
37443 PR tree-optimization/108691
37444 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
37445 assert about calls_setjmp not becoming true when it was false.
37447 2023-02-21 Richard Biener <rguenther@suse.de>
37449 PR tree-optimization/108793
37450 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
37451 Use convert operands to niter_type when computing num.
37453 2023-02-21 Richard Biener <rguenther@suse.de>
37456 2023-02-13 Richard Biener <rguenther@suse.de>
37458 PR tree-optimization/108691
37459 * tree-cfg.cc (notice_special_calls): When the CFG is built
37460 honor gimple_call_ctrl_altering_p.
37461 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
37462 temporarily if the call is not control-altering.
37463 * calls.cc (emit_call_1): Do not add REG_SETJMP if
37464 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
37466 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37468 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
37469 true if register A0 (return address register) when -Og is specified.
37471 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
37473 * config/i386/predicates.md
37474 (general_x64constmem_operand): New predicate.
37475 * config/i386/i386.md (*cmpqi_ext<mode>_1):
37476 Use nonimm_x64constmem_operand.
37477 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
37478 (*addqi_ext<mode>_1): Ditto.
37479 (*testqi_ext<mode>_1): Ditto.
37480 (*andqi_ext<mode>_1): Ditto.
37481 (*andqi_ext<mode>_1_cc): Ditto.
37482 (*<any_or:code>qi_ext<mode>_1): Ditto.
37483 (*xorqi_ext<mode>_1_cc): Ditto.
37485 2023-02-20 Jakub Jelinek <jakub2redhat.com>
37488 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
37489 gen_umadddi4_highpart{,_le}.
37491 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
37493 * config/riscv/riscv.md (prefetch): Use r instead of p for the
37495 (riscv_prefetchi_<mode>): Ditto.
37497 2023-02-20 Richard Biener <rguenther@suse.de>
37499 PR tree-optimization/108816
37500 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
37501 versioning condition split prerequesite, assert required
37504 2023-02-20 Richard Biener <rguenther@suse.de>
37506 PR tree-optimization/108825
37507 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
37508 loop-local verfication only verify there's no pending SSA
37511 2023-02-20 Richard Biener <rguenther@suse.de>
37513 PR tree-optimization/108819
37514 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
37515 we have an SSA name as iv_2 as expected.
37517 2023-02-18 Jakub Jelinek <jakub@redhat.com>
37519 PR tree-optimization/108819
37520 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
37522 2023-02-18 Jakub Jelinek <jakub@redhat.com>
37525 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
37526 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
37528 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
37529 with ix86_replace_reg_with_reg.
37531 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
37533 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
37535 2023-02-18 Xi Ruoyao <xry111@xry111.site>
37537 * config.gcc (triplet_abi): Set its value based on $with_abi,
37538 instead of $target.
37539 (la_canonical_triplet): Set it after $triplet_abi is set
37541 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
37542 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
37545 2023-02-18 Andrew Pinski <apinski@marvell.com>
37547 * match.pd: Remove #if GIMPLE around the
37550 2023-02-18 Andrew Pinski <apinski@marvell.com>
37552 * value-query.h (get_range_query): Return the global ranges
37553 for a nullptr func.
37555 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
37557 * doc/invoke.texi (@item -Wall): Fix typo in
37560 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
37563 * config/i386/predicates.md
37564 (nonimm_x64constmem_operand): New predicate.
37565 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
37566 (*subqi_ext<mode>_0): Ditto.
37567 (*andqi_ext<mode>_0): Ditto.
37568 (*<any_or:code>qi_ext<mode>_0): Ditto.
37570 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
37573 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
37574 int_outermode instead of GET_MODE (tem) to prevent
37575 VOIDmode from entering simplify_gen_subreg.
37577 2023-02-17 Richard Biener <rguenther@suse.de>
37579 PR tree-optimization/108821
37580 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
37581 move volatile accesses.
37583 2023-02-17 Richard Biener <rguenther@suse.de>
37585 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
37586 called on virtual operands.
37587 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
37588 ssa_undefined_value_p calls.
37589 (vn_phi_insert): Likewise.
37590 (set_ssa_val_to): Likewise.
37591 (visit_phi): Avoid extra work with equivalences for
37592 virtual operand PHIs.
37594 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37596 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
37598 (class mask_nlogic): Ditto.
37599 (class mask_notlogic): Ditto.
37600 (class vmmv): Ditto.
37601 (class vmclr): Ditto.
37602 (class vmset): Ditto.
37603 (class vmnot): Ditto.
37604 (class vcpop): Ditto.
37605 (class vfirst): Ditto.
37606 (class mask_misc): Ditto.
37607 (class viota): Ditto.
37608 (class vid): Ditto.
37610 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37611 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
37630 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
37631 (struct mask_alu_def): Ditto.
37633 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37634 * config/riscv/riscv-vector-builtins.cc: Ditto.
37635 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
37636 for dest it scalar RVV intrinsics.
37637 * config/riscv/vector-iterators.md (sof): New iterator.
37638 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
37639 (@pred_<optab>not<mode>): New pattern.
37640 (@pred_popcount<VB:mode><P:mode>): New pattern.
37641 (@pred_ffs<VB:mode><P:mode>): New pattern.
37642 (@pred_<misc_op><mode>): New pattern.
37643 (@pred_iota<mode>): New pattern.
37644 (@pred_series<mode>): New pattern.
37646 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37648 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
37652 * config/riscv/riscv-vector-builtins.cc: Ditto.
37654 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37655 kito-cheng <kito.cheng@sifive.com>
37657 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
37658 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
37659 (sew64_scalar_helper): New function.
37660 * config/riscv/vector.md: Normalization.
37662 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37664 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
37726 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37728 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
37729 (@pred_<optab><mode>_scalar): Ditto.
37730 (*pred_<optab><mode>_scalar): Ditto.
37731 (*pred_<optab><mode>_extended_scalar): Ditto.
37733 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37735 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
37736 (init_builtins): Ditto.
37737 (mangle_builtin_type): Ditto.
37738 (verify_type_context): Ditto.
37739 (handle_pragma_vector): Ditto.
37740 (builtin_decl): Ditto.
37741 (expand_builtin): Ditto.
37742 (const_vec_all_same_in_range_p): Ditto.
37743 (legitimize_move): Ditto.
37744 (emit_vlmax_op): Ditto.
37745 (emit_nonvlmax_op): Ditto.
37746 (get_vlmul): Ditto.
37747 (get_ratio): Ditto.
37750 (get_avl_type): Ditto.
37751 (calculate_ratio): Ditto.
37752 (enum vlmul_type): Ditto.
37754 (neg_simm5_p): Ditto.
37755 (has_vi_variant_p): Ditto.
37757 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37759 * config/riscv/riscv-protos.h (simm32_p): Remove.
37760 * config/riscv/riscv-v.cc (simm32_p): Ditto.
37761 * config/riscv/vector.md: Use immediate_operand
37762 instead of riscv_vector::simm32_p.
37764 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
37766 * doc/invoke.texi (Optimize Options): Reword the explanation
37767 getting minimal, maximal and default values of a parameter.
37769 2023-02-16 Patrick Palka <ppalka@redhat.com>
37771 * addresses.h: Mechanically drop 'static' from 'static inline'
37772 functions via s/^static inline/inline/g.
37773 * asan.h: Likewise.
37774 * attribs.h: Likewise.
37775 * basic-block.h: Likewise.
37776 * bitmap.h: Likewise.
37777 * cfghooks.h: Likewise.
37778 * cfgloop.h: Likewise.
37779 * cgraph.h: Likewise.
37780 * cselib.h: Likewise.
37781 * data-streamer.h: Likewise.
37782 * debug.h: Likewise.
37784 * diagnostic.h: Likewise.
37785 * dominance.h: Likewise.
37786 * dumpfile.h: Likewise.
37787 * emit-rtl.h: Likewise.
37788 * except.h: Likewise.
37789 * expmed.h: Likewise.
37790 * expr.h: Likewise.
37791 * fixed-value.h: Likewise.
37792 * gengtype.h: Likewise.
37793 * gimple-expr.h: Likewise.
37794 * gimple-iterator.h: Likewise.
37795 * gimple-predict.h: Likewise.
37796 * gimple-range-fold.h: Likewise.
37797 * gimple-ssa.h: Likewise.
37798 * gimple.h: Likewise.
37799 * graphite.h: Likewise.
37800 * hard-reg-set.h: Likewise.
37801 * hash-map.h: Likewise.
37802 * hash-set.h: Likewise.
37803 * hash-table.h: Likewise.
37804 * hwint.h: Likewise.
37805 * input.h: Likewise.
37806 * insn-addr.h: Likewise.
37807 * internal-fn.h: Likewise.
37808 * ipa-fnsummary.h: Likewise.
37809 * ipa-icf-gimple.h: Likewise.
37810 * ipa-inline.h: Likewise.
37811 * ipa-modref.h: Likewise.
37812 * ipa-prop.h: Likewise.
37813 * ira-int.h: Likewise.
37815 * lra-int.h: Likewise.
37817 * lto-streamer.h: Likewise.
37818 * memmodel.h: Likewise.
37819 * omp-general.h: Likewise.
37820 * optabs-query.h: Likewise.
37821 * optabs.h: Likewise.
37822 * plugin.h: Likewise.
37823 * pretty-print.h: Likewise.
37824 * range.h: Likewise.
37825 * read-md.h: Likewise.
37826 * recog.h: Likewise.
37827 * regs.h: Likewise.
37828 * rtl-iter.h: Likewise.
37830 * sbitmap.h: Likewise.
37831 * sched-int.h: Likewise.
37832 * sel-sched-ir.h: Likewise.
37833 * sese.h: Likewise.
37834 * sparseset.h: Likewise.
37835 * ssa-iterators.h: Likewise.
37836 * system.h: Likewise.
37837 * target-globals.h: Likewise.
37838 * target.h: Likewise.
37839 * timevar.h: Likewise.
37840 * tree-chrec.h: Likewise.
37841 * tree-data-ref.h: Likewise.
37842 * tree-iterator.h: Likewise.
37843 * tree-outof-ssa.h: Likewise.
37844 * tree-phinodes.h: Likewise.
37845 * tree-scalar-evolution.h: Likewise.
37846 * tree-sra.h: Likewise.
37847 * tree-ssa-alias.h: Likewise.
37848 * tree-ssa-live.h: Likewise.
37849 * tree-ssa-loop-manip.h: Likewise.
37850 * tree-ssa-loop.h: Likewise.
37851 * tree-ssa-operands.h: Likewise.
37852 * tree-ssa-propagate.h: Likewise.
37853 * tree-ssa-sccvn.h: Likewise.
37854 * tree-ssa.h: Likewise.
37855 * tree-ssanames.h: Likewise.
37856 * tree-streamer.h: Likewise.
37857 * tree-switch-conversion.h: Likewise.
37858 * tree-vectorizer.h: Likewise.
37859 * tree.h: Likewise.
37860 * wide-int.h: Likewise.
37862 2023-02-16 Jakub Jelinek <jakub@redhat.com>
37864 PR tree-optimization/108657
37865 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
37866 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
37867 is a call to internal or builtin function.
37869 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
37871 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
37872 using-declaration to unhide functions.
37874 2023-02-16 Jakub Jelinek <jakub@redhat.com>
37876 PR tree-optimization/108783
37877 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
37878 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
37879 t to curr->op. Otherwise, punt if either newop1 or newop2 are
37880 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
37882 2023-02-16 Richard Biener <rguenther@suse.de>
37884 PR tree-optimization/108791
37885 * tree-ssa-forwprop.cc (optimize_vector_load): Build
37886 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
37889 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
37892 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
37893 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
37894 (ix86_expand_prologue): Likewise.
37896 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
37898 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
37900 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
37902 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
37903 int248_register_operand predicate in zero_extract sub-RTX.
37904 (*cmpqi_ext<mode>_2): Ditto.
37905 (*cmpqi_ext<mode>_3): Ditto.
37906 (*cmpqi_ext<mode>_4): Ditto.
37907 (*extzvqi_mem_rex64): Ditto.
37909 (*insvqi_1_mem_rex64): Ditto.
37910 (@insv<mode>_1): Ditto.
37911 (*insvqi_1): Ditto.
37912 (*insvqi_2): Ditto.
37913 (*insvqi_3): Ditto.
37914 (*extendqi<SWI24:mode>_ext_1): Ditto.
37915 (*addqi_ext<mode>_1): Ditto.
37916 (*addqi_ext<mode>_2): Ditto.
37917 (*subqi_ext<mode>_2): Ditto.
37918 (*testqi_ext<mode>_1): Ditto.
37919 (*testqi_ext<mode>_2): Ditto.
37920 (*andqi_ext<mode>_1): Ditto.
37921 (*andqi_ext<mode>_1_cc): Ditto.
37922 (*andqi_ext<mode>_2): Ditto.
37923 (*<any_or:code>qi_ext<mode>_1): Ditto.
37924 (*<any_or:code>qi_ext<mode>_2): Ditto.
37925 (*xorqi_ext<mode>_1_cc): Ditto.
37926 (*negqi_ext<mode>_2): Ditto.
37927 (*ashlqi_ext<mode>_2): Ditto.
37928 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
37930 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
37932 * config/i386/predicates.md (int248_register_operand):
37933 Rename from extr_register_operand.
37934 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
37935 (*extzx<mode>): Ditto.
37936 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
37937 (*ashl<mode>3_mask): Ditto.
37938 (*<any_shiftrt:insn><mode>3_mask): Ditto.
37939 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
37940 (*<any_rotate:insn><mode>3_mask): Ditto.
37941 (*<btsc><mode>_mask): Ditto.
37942 (*btr<mode>_mask): Ditto.
37943 (*jcc_bt<mode>_mask_1): Ditto.
37945 2023-02-15 Richard Biener <rguenther@suse.de>
37947 PR middle-end/26854
37948 * df-core.cc (df_worklist_propagate_forward): Put later
37949 blocks on worklist and only earlier blocks on pending.
37950 (df_worklist_propagate_backward): Likewise.
37951 (df_worklist_dataflow_doublequeue): Change the iteration
37952 to process new blocks in the same iteration if that
37953 maintains the iteration order.
37955 2023-02-15 Marek Polacek <polacek@redhat.com>
37957 PR middle-end/106080
37958 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
37961 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37963 * config/riscv/predicates.md: Refine codes.
37964 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
37965 * config/riscv/riscv-v.cc: Refine codes.
37966 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
37968 (class imac): New class.
37969 (enum widen_ternop_type): New enum.
37970 (class iwmac): New class.
37972 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37973 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
37981 * config/riscv/riscv-vector-builtins.cc
37982 (function_builder::apply_predication): Adjust for multiply-add support.
37983 (function_expander::add_vundef_operand): Refine codes.
37984 (function_expander::use_ternop_insn): New function.
37985 (function_expander::use_widen_ternop_insn): Ditto.
37986 * config/riscv/riscv-vector-builtins.h: New function.
37987 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
37988 (pred_mul_<optab><mode>_undef_merge): Ditto.
37989 (*pred_<madd_nmsub><mode>): Ditto.
37990 (*pred_<macc_nmsac><mode>): Ditto.
37991 (*pred_mul_<optab><mode>): Ditto.
37992 (@pred_mul_<optab><mode>_scalar): Ditto.
37993 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
37994 (*pred_<madd_nmsub><mode>_scalar): Ditto.
37995 (*pred_<macc_nmsac><mode>_scalar): Ditto.
37996 (*pred_mul_<optab><mode>_scalar): Ditto.
37997 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
37998 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
37999 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
38000 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
38001 (@pred_widen_mul_plus<su><mode>): Ditto.
38002 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
38003 (@pred_widen_mul_plussu<mode>): Ditto.
38004 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
38005 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
38007 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38009 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
38010 (vector_all_trues_mask_operand): New predicate.
38011 (vector_undef_operand): New predicate.
38012 (ltge_operator): New predicate.
38013 (comparison_except_ltge_operator): New predicate.
38014 (comparison_except_eqge_operator): New predicate.
38015 (ge_operator): New predicate.
38016 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
38017 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
38019 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38020 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
38030 * config/riscv/riscv-vector-builtins-shapes.cc
38031 (struct return_mask_def): Adjust for compare support.
38032 * config/riscv/riscv-vector-builtins.cc
38033 (function_expander::use_compare_insn): New function.
38034 * config/riscv/riscv-vector-builtins.h
38035 (function_expander::add_integer_operand): Ditto.
38036 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
38037 * config/riscv/riscv.md: Add vector min/max attributes.
38038 * config/riscv/vector-iterators.md (xnor): New iterator.
38039 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
38040 (*pred_cmp<mode>): Ditto.
38041 (*pred_cmp<mode>_narrow): Ditto.
38042 (@pred_ltge<mode>): Ditto.
38043 (*pred_ltge<mode>): Ditto.
38044 (*pred_ltge<mode>_narrow): Ditto.
38045 (@pred_cmp<mode>_scalar): Ditto.
38046 (*pred_cmp<mode>_scalar): Ditto.
38047 (*pred_cmp<mode>_scalar_narrow): Ditto.
38048 (@pred_eqne<mode>_scalar): Ditto.
38049 (*pred_eqne<mode>_scalar): Ditto.
38050 (*pred_eqne<mode>_scalar_narrow): Ditto.
38051 (*pred_cmp<mode>_extended_scalar): Ditto.
38052 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
38053 (*pred_eqne<mode>_extended_scalar): Ditto.
38054 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
38055 (@pred_ge<mode>_scalar): Ditto.
38056 (@pred_<optab><mode>): Ditto.
38057 (@pred_n<optab><mode>): Ditto.
38058 (@pred_<optab>n<mode>): Ditto.
38059 (@pred_not<mode>): Ditto.
38061 2023-02-15 Martin Jambor <mjambor@suse.cz>
38064 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
38065 creation of non-scalar replacements even if IPA-CP knows their
38068 2023-02-15 Jakub Jelinek <jakub@redhat.com>
38072 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
38073 expander, change operand 3 to be TImode, emit maddlddi4 and
38074 umadddi4_highpart{,_le} with its low half and finally add the high
38075 half to the result.
38077 2023-02-15 Martin Liska <mliska@suse.cz>
38079 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
38081 2023-02-15 Richard Biener <rguenther@suse.de>
38083 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
38084 for with_poison and alias worklist to it.
38085 (sanitize_asan_mark_poison): Likewise.
38087 2023-02-15 Richard Biener <rguenther@suse.de>
38090 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
38091 Combine bitmap test and set.
38092 (scalar_chain::add_insn): Likewise.
38093 (scalar_chain::analyze_register_chain): Remove redundant
38094 attempt to add to queue and instead strengthen assert.
38095 Sink common attempts to mark the def dual-mode.
38096 (scalar_chain::add_to_queue): Remove redundant insn bitmap
38099 2023-02-15 Richard Biener <rguenther@suse.de>
38102 * config/i386/i386-features.cc (convert_scalars_to_vector):
38103 Switch candidates bitmaps to tree view before building the chains.
38105 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
38107 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
38108 "failure trying to reload" call.
38110 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
38112 * gdbinit.in (phrs): New command.
38113 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
38114 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
38116 2023-02-14 David Faust <david.faust@oracle.com>
38119 * config/bpf/constraints.md (q): New memory constraint.
38120 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
38121 (zero_extendqidi2): Likewise.
38122 (zero_extendsidi2): Likewise.
38123 (*mov<MM:mode>): Likewise.
38125 2023-02-14 Andrew Pinski <apinski@marvell.com>
38127 PR tree-optimization/108355
38128 PR tree-optimization/96921
38129 * match.pd: Add pattern for "1 - bool_val".
38131 2023-02-14 Richard Biener <rguenther@suse.de>
38133 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
38134 basic block index hashing on the availability of ->cclhs.
38135 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
38136 rely on ->cclhs availability.
38137 (vn_phi_lookup): Set ->cclhs only when we are eventually
38138 going to CSE the PHI.
38139 (vn_phi_insert): Likewise.
38141 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
38143 * gimplify.cc (gimplify_save_expr): Add missing guard.
38145 2023-02-14 Richard Biener <rguenther@suse.de>
38147 PR tree-optimization/108782
38148 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
38149 Make sure we're not vectorizing an inner loop.
38151 2023-02-14 Jakub Jelinek <jakub@redhat.com>
38153 PR sanitizer/108777
38154 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
38155 * asan.h (asan_memfn_rtl): Declare.
38156 * asan.cc (asan_memfn_rtls): New variable.
38157 (asan_memfn_rtl): New function.
38158 * builtins.cc (expand_builtin): If
38159 param_asan_kernel_mem_intrinsic_prefix and function is
38160 kernel-{,hw}address sanitized, emit calls to
38161 __{,hw}asan_{memcpy,memmove,memset} rather than
38162 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
38163 instead of flag_sanitize & SANITIZE_ADDRESS to check if
38164 asan_intercepted_p functions shouldn't be expanded inline.
38166 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
38168 PR tree-optimization/96373
38169 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
38170 operations on the loop mask. Reject partial vectors if this isn't
38173 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
38175 PR rtl-optimization/108681
38176 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
38177 code to handle bare uses and clobbers.
38179 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
38181 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
38182 caller_save_p flag when clearing defined_p flag.
38183 (setup_reg_equiv): Ditto.
38184 * lra-constraints.cc (lra_constraints): Ditto.
38186 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
38189 * config/i386/predicates.md (extr_register_operand):
38190 New special predicate.
38191 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
38192 as operand 1 predicate.
38193 (*exzv<mode>): Ditto.
38194 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
38196 2023-02-13 Richard Biener <rguenther@suse.de>
38198 PR tree-optimization/28614
38199 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
38200 walking all edges in most cases.
38201 (vn_nary_op_insert_pieces_predicated): Avoid repeated
38202 calls to can_track_predicate_on_edge unless checking is
38204 (process_bb): Instead call it once here for each edge
38205 we register possibly multiple predicates on.
38207 2023-02-13 Richard Biener <rguenther@suse.de>
38209 PR tree-optimization/108691
38210 * tree-cfg.cc (notice_special_calls): When the CFG is built
38211 honor gimple_call_ctrl_altering_p.
38212 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
38213 temporarily if the call is not control-altering.
38214 * calls.cc (emit_call_1): Do not add REG_SETJMP if
38215 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
38217 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
38220 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
38221 (struct s390_sched_state): Initialise to zero.
38222 (s390_sched_variable_issue): For better debuggability also emit
38224 (s390_sched_init): Unconditionally reset scheduler state.
38226 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
38228 * ifcvt.h (noce_if_info::cond_inverted): New field.
38229 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
38230 values when cond_inverted is true.
38231 (noce_find_if_block): Allow the condition to be inverted when
38232 handling conditional moves.
38234 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
38236 * config/s390/predicates.md (execute_operation): Use
38237 constrain_operands instead of extract_constrain_insn in order to
38238 determine wheter there exists a valid alternative.
38240 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
38242 * common/config/arc/arc-common.cc (arc_option_optimization_table):
38243 Remove millicode from list.
38245 2023-02-13 Martin Liska <mliska@suse.cz>
38247 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
38249 2023-02-13 Richard Biener <rguenther@suse.de>
38251 PR tree-optimization/106722
38252 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
38253 whether we marked a stmt.
38254 (mark_control_dependent_edges_necessary): When
38255 mark_last_stmt_necessary didn't mark any stmt make sure
38256 to mark its control dependent edges.
38257 (propagate_necessity): Likewise.
38259 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
38261 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
38262 (DWARF_FRAME_REGISTERS): New.
38263 (DWARF_REG_TO_UNWIND_COLUMN): New.
38265 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
38267 * doc/sourcebuild.texi: Remove (broken) direct reference to
38268 "The GNU configure and build system".
38270 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
38272 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
38273 gen_add3_insn to gen_rtx_SET.
38274 (riscv_adjust_libcall_cfi_epilogue): Likewise.
38276 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38278 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
38279 (class vnclip): Ditto.
38281 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38282 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
38291 * config/riscv/vector-iterators.md (su): Add instruction.
38294 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
38295 (@pred_<sat_op><mode>_scalar): Ditto.
38296 (*pred_<sat_op><mode>_scalar): Ditto.
38297 (*pred_<sat_op><mode>_extended_scalar): Ditto.
38298 (@pred_narrow_clip<v_su><mode>): Ditto.
38299 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
38301 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38303 * config/riscv/constraints.md (Wbr): Remove unused constraint.
38304 * config/riscv/predicates.md: Fix move operand predicate.
38305 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
38306 (class vncvt_x): Ditto.
38307 (class vmerge): Ditto.
38308 (class vmv_v): Ditto.
38310 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38311 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
38318 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
38319 (struct move_def): Ditto.
38321 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38322 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
38323 (DEF_RVV_WEXTU_OPS): Ditto
38324 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
38329 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
38330 * config/riscv/vector-iterators.md (nmsac):New iterator.
38331 (nmsub): New iterator.
38332 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
38333 (@pred_merge<mode>_scalar): New pattern.
38334 (*pred_merge<mode>_scalar): New pattern.
38335 (*pred_merge<mode>_extended_scalar): New pattern.
38336 (@pred_narrow_<optab><mode>): New pattern.
38337 (@pred_narrow_<optab><mode>_scalar): New pattern.
38338 (@pred_trunc<mode>): New pattern.
38340 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38342 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
38343 (class vmsbc): Ditto.
38344 (BASE): Define new class.
38345 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38346 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
38348 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
38351 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38352 * config/riscv/riscv-vector-builtins.cc
38353 (function_expander::use_exact_insn): Adjust for new support
38354 * config/riscv/riscv-vector-builtins.h
38355 (function_base::has_merge_operand_p): New function.
38356 * config/riscv/vector-iterators.md: New iterator.
38357 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
38358 (@pred_msbc<mode>): Ditto.
38359 (@pred_madc<mode>_scalar): Ditto.
38360 (@pred_msbc<mode>_scalar): Ditto.
38361 (*pred_madc<mode>_scalar): Ditto.
38362 (*pred_madc<mode>_extended_scalar): Ditto.
38363 (*pred_msbc<mode>_scalar): Ditto.
38364 (*pred_msbc<mode>_extended_scalar): Ditto.
38365 (@pred_madc<mode>_overflow): Ditto.
38366 (@pred_msbc<mode>_overflow): Ditto.
38367 (@pred_madc<mode>_overflow_scalar): Ditto.
38368 (@pred_msbc<mode>_overflow_scalar): Ditto.
38369 (*pred_madc<mode>_overflow_scalar): Ditto.
38370 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
38371 (*pred_msbc<mode>_overflow_scalar): Ditto.
38372 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
38374 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38376 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
38377 * config/riscv/riscv-v.cc (simm32_p): Ditto.
38378 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
38379 (class vsbc): Ditto.
38381 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38382 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
38384 * config/riscv/riscv-vector-builtins-shapes.cc
38385 (struct no_mask_policy_def): Ditto.
38387 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38388 * config/riscv/riscv-vector-builtins.cc
38389 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
38390 (rvv_arg_type_info::get_tree_type): Ditto.
38391 (function_expander::use_exact_insn): Ditto.
38392 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
38393 (function_base::use_mask_predication_p): New function.
38394 * config/riscv/vector-iterators.md: New iterator.
38395 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
38396 (@pred_sbc<mode>): Ditto.
38397 (@pred_adc<mode>_scalar): Ditto.
38398 (@pred_sbc<mode>_scalar): Ditto.
38399 (*pred_adc<mode>_scalar): Ditto.
38400 (*pred_adc<mode>_extended_scalar): Ditto.
38401 (*pred_sbc<mode>_scalar): Ditto.
38402 (*pred_sbc<mode>_extended_scalar): Ditto.
38404 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38406 * config/riscv/vector.md: use "zero" reg.
38408 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38410 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
38412 (class vwmulsu): Ditto.
38413 (class vwcvt): Ditto.
38414 (BASE): Add integer widening support.
38415 * config/riscv/riscv-vector-builtins-bases.h: Ditto
38416 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
38417 (vwsub): New class.
38418 (vwmul): New class.
38419 (vwmulu): New class.
38420 (vwmulsu): New class.
38421 (vwaddu): New class.
38422 (vwsubu): New class.
38423 (vwcvt_x): New class.
38424 (vwcvtu_x): New class.
38425 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
38427 (struct widen_alu_def): New class.
38428 (SHAPE): New class.
38429 * config/riscv/riscv-vector-builtins-shapes.h: New class.
38430 * config/riscv/riscv-vector-builtins.cc
38431 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
38432 (rvv_arg_type_info::get_tree_type): Ditto.
38433 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
38435 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
38437 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
38438 * config/riscv/riscv.h (X0_REGNUM): New constant.
38439 * config/riscv/vector-iterators.md: New iterators.
38440 * config/riscv/vector.md
38441 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
38443 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
38445 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
38446 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
38448 (@pred_widen_mulsu<mode>): Ditto.
38449 (@pred_widen_mulsu<mode>_scalar): Ditto.
38450 (@pred_<optab><mode>): Ditto.
38452 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38453 kito-cheng <kito.cheng@sifive.com>
38455 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
38456 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
38458 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38459 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
38463 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
38465 (DEF_RVV_FULL_V_U_OPS): Ditto.
38466 (vint8mf8_t): Ditto.
38467 (vint8mf4_t): Ditto.
38468 (vint8mf2_t): Ditto.
38469 (vint8m1_t): Ditto.
38470 (vint8m2_t): Ditto.
38471 (vint8m4_t): Ditto.
38472 (vint8m8_t): Ditto.
38473 (vint16mf4_t): Ditto.
38474 (vint16mf2_t): Ditto.
38475 (vint16m1_t): Ditto.
38476 (vint16m2_t): Ditto.
38477 (vint16m4_t): Ditto.
38478 (vint16m8_t): Ditto.
38479 (vint32mf2_t): Ditto.
38480 (vint32m1_t): Ditto.
38481 (vint32m2_t): Ditto.
38482 (vint32m4_t): Ditto.
38483 (vint32m8_t): Ditto.
38484 (vint64m1_t): Ditto.
38485 (vint64m2_t): Ditto.
38486 (vint64m4_t): Ditto.
38487 (vint64m8_t): Ditto.
38488 (vuint8mf8_t): Ditto.
38489 (vuint8mf4_t): Ditto.
38490 (vuint8mf2_t): Ditto.
38491 (vuint8m1_t): Ditto.
38492 (vuint8m2_t): Ditto.
38493 (vuint8m4_t): Ditto.
38494 (vuint8m8_t): Ditto.
38495 (vuint16mf4_t): Ditto.
38496 (vuint16mf2_t): Ditto.
38497 (vuint16m1_t): Ditto.
38498 (vuint16m2_t): Ditto.
38499 (vuint16m4_t): Ditto.
38500 (vuint16m8_t): Ditto.
38501 (vuint32mf2_t): Ditto.
38502 (vuint32m1_t): Ditto.
38503 (vuint32m2_t): Ditto.
38504 (vuint32m4_t): Ditto.
38505 (vuint32m8_t): Ditto.
38506 (vuint64m1_t): Ditto.
38507 (vuint64m2_t): Ditto.
38508 (vuint64m4_t): Ditto.
38509 (vuint64m8_t): Ditto.
38510 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
38511 (DEF_RVV_FULL_V_U_OPS): Ditto.
38512 (check_required_extensions): Add vmulh support.
38513 (rvv_arg_type_info::get_tree_type): Ditto.
38514 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
38515 (enum rvv_base_type): Ditto.
38516 * config/riscv/riscv.opt: Add 'V' extension flag.
38517 * config/riscv/vector-iterators.md (su): New iterator.
38518 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
38519 (@pred_mulh<v_su><mode>_scalar): Ditto.
38520 (*pred_mulh<v_su><mode>_scalar): Ditto.
38521 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
38523 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38525 * config/riscv/iterators.md: Add sign_extend/zero_extend.
38526 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
38528 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
38529 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
38532 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
38533 for vsext/vzext support.
38534 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
38536 (DEF_RVV_QEXTI_OPS): Ditto.
38537 (DEF_RVV_OEXTI_OPS): Ditto.
38538 (DEF_RVV_WEXTU_OPS): Ditto.
38539 (DEF_RVV_QEXTU_OPS): Ditto.
38540 (DEF_RVV_OEXTU_OPS): Ditto.
38541 (vint16mf4_t): Ditto.
38542 (vint16mf2_t): Ditto.
38543 (vint16m1_t): Ditto.
38544 (vint16m2_t): Ditto.
38545 (vint16m4_t): Ditto.
38546 (vint16m8_t): Ditto.
38547 (vint32mf2_t): Ditto.
38548 (vint32m1_t): Ditto.
38549 (vint32m2_t): Ditto.
38550 (vint32m4_t): Ditto.
38551 (vint32m8_t): Ditto.
38552 (vint64m1_t): Ditto.
38553 (vint64m2_t): Ditto.
38554 (vint64m4_t): Ditto.
38555 (vint64m8_t): Ditto.
38556 (vuint16mf4_t): Ditto.
38557 (vuint16mf2_t): Ditto.
38558 (vuint16m1_t): Ditto.
38559 (vuint16m2_t): Ditto.
38560 (vuint16m4_t): Ditto.
38561 (vuint16m8_t): Ditto.
38562 (vuint32mf2_t): Ditto.
38563 (vuint32m1_t): Ditto.
38564 (vuint32m2_t): Ditto.
38565 (vuint32m4_t): Ditto.
38566 (vuint32m8_t): Ditto.
38567 (vuint64m1_t): Ditto.
38568 (vuint64m2_t): Ditto.
38569 (vuint64m4_t): Ditto.
38570 (vuint64m8_t): Ditto.
38571 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
38572 (DEF_RVV_QEXTI_OPS): Ditto.
38573 (DEF_RVV_OEXTI_OPS): Ditto.
38574 (DEF_RVV_WEXTU_OPS): Ditto.
38575 (DEF_RVV_QEXTU_OPS): Ditto.
38576 (DEF_RVV_OEXTU_OPS): Ditto.
38577 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
38579 (rvv_arg_type_info::get_tree_type): Ditto.
38580 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
38581 * config/riscv/vector-iterators.md (z): New attribute.
38582 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
38583 (@pred_<optab><mode>_vf4): Ditto.
38584 (@pred_<optab><mode>_vf8): Ditto.
38586 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38588 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
38589 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
38590 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
38591 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38592 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
38596 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
38601 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
38602 (@pred_<optab><mode>_scalar): New pattern.
38603 (*pred_<optab><mode>_scalar): New pattern.
38604 (*pred_<optab><mode>_extended_scalar): New pattern.
38606 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38608 * config/riscv/iterators.md: Add neg and not.
38609 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
38611 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38612 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
38633 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
38634 (struct alu_def): Ditto.
38636 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38637 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
38638 * config/riscv/vector-iterators.md: New iterator.
38639 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
38641 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38643 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
38645 2023-02-11 Jakub Jelinek <jakub@redhat.com>
38648 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
38649 item->offset bit position is too large to be representable as
38650 unsigned int byte position.
38652 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
38654 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
38656 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
38658 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
38659 valid_combine only when ira_use_lra_p is true.
38661 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
38663 * params.opt (ira-simple-lra-insn-threshold): Add new param.
38664 * ira.cc (ira): Use the param to switch on simple LRA.
38666 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
38668 PR tree-optimization/108687
38669 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
38670 back to RFD_NONE mode for calculations.
38671 (ranger_cache::propagate_cache): Call the internal edge range API
38672 with RFD_READ_ONLY instead of changing the external routine.
38674 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
38676 PR tree-optimization/108520
38677 * gimple-range-infer.cc (check_assume_func): Invoke
38678 gimple_range_global directly instead using global_range_query.
38679 * value-query.cc (get_range_global): Add function context and
38680 avoid calling nonnull_arg_p if not cfun.
38681 (gimple_range_global): Add function context pointer.
38682 * value-query.h (imple_range_global): Add function context.
38684 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38686 * config/riscv/constraints.md (Wdm): Adjust constraint.
38687 (Wbr): New constraint.
38688 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
38689 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
38690 (emit_vlmax_op): New function.
38691 (emit_nonvlmax_op): Ditto.
38693 (neg_simm5_p): Ditto.
38694 (has_vi_variant_p): Ditto.
38695 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
38696 (emit_vlmax_op): New function.
38697 (emit_nonvlmax_op): Ditto.
38698 (expand_const_vector): Adjust function.
38699 (legitimize_move): Ditto.
38700 (simm32_p): New function.
38702 (neg_simm5_p): Ditto.
38703 (has_vi_variant_p): Ditto.
38704 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
38706 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38707 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
38710 (vminu): Remove signed cases.
38712 (vdiv): Remove unsigned cases.
38714 (vdivu): Remove signed cases.
38718 (vrsub): New class.
38723 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
38724 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
38725 * config/riscv/vector-iterators.md: New iterators.
38726 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
38728 (@pred_<optab><mode>_scalar): New pattern.
38729 (@pred_sub<mode>_reverse_scalar): Ditto.
38730 (*pred_<optab><mode>_scalar): Ditto.
38731 (*pred_<optab><mode>_extended_scalar): Ditto.
38732 (*pred_sub<mode>_reverse_scalar): Ditto.
38733 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
38735 2023-02-10 Richard Biener <rguenther@suse.de>
38737 PR tree-optimization/108724
38738 * tree-vect-stmts.cc (vectorizable_operation): Avoid
38739 using word_mode vectors when vector lowering will
38740 decompose them to elementwise operations.
38742 2023-02-10 Jakub Jelinek <jakub@redhat.com>
38745 2023-02-09 Martin Liska <mliska@suse.cz>
38748 * doc/extend.texi: Document that the function
38749 does not work correctly for old VIA processors.
38751 2023-02-10 Andrew Pinski <apinski@marvell.com>
38752 Andrew Macleod <amacleod@redhat.com>
38754 PR tree-optimization/108684
38755 * tree-ssa-dce.cc (simple_dce_from_worklist):
38756 Check all ssa names and not just non-vdef ones
38757 before accepting the inline-asm.
38758 Call unlink_stmt_vdef on the statement before
38761 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
38763 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38764 * ira.cc (validate_equiv_mem): Check memref address variance.
38765 (no_equiv): Clear caller_save_p flag.
38766 (update_equiv_regs): Define caller save equivalence for
38768 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38769 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38770 call_save_p. Use caller save equivalence depending on the arg.
38771 (split_reg): Adjust the call.
38773 2023-02-09 Jakub Jelinek <jakub@redhat.com>
38776 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
38777 (cpu_indicator_init): Call get_available_features for all CPUs with
38778 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
38781 2023-02-09 Jakub Jelinek <jakub@redhat.com>
38783 PR tree-optimization/108688
38784 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
38785 of BIT_INSERT_EXPR extracting exactly all inserted bits even
38786 when without mode precision. Formatting fixes.
38788 2023-02-09 Andrew Pinski <apinski@marvell.com>
38790 PR tree-optimization/108688
38791 * match.pd (bit_field_ref [bit_insert]): Avoid generating
38792 BIT_FIELD_REFs of non-mode-precision integral operands.
38794 2023-02-09 Martin Liska <mliska@suse.cz>
38797 * doc/extend.texi: Document that the function
38798 does not work correctly for old VIA processors.
38800 2023-02-09 Andreas Schwab <schwab@suse.de>
38802 * lto-wrapper.cc (merge_and_complain): Handle
38803 -funwind-tables and -fasynchronous-unwind-tables.
38804 (append_compiler_options): Likewise.
38806 2023-02-09 Richard Biener <rguenther@suse.de>
38808 PR tree-optimization/26854
38809 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
38810 view around insert_updated_phi_nodes_for.
38811 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
38813 (walk_aliased_vdefs_1): Likewise.
38815 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
38817 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
38819 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38822 * config.gcc (tm_mlib_file): Define new variable.
38824 2023-02-08 Jakub Jelinek <jakub@redhat.com>
38826 PR tree-optimization/108692
38827 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
38828 widened_code which is different from code, don't call
38829 vect_look_through_possible_promotion but instead just check op is
38830 SSA_NAME with integral type for which vect_is_simple_use is true
38831 and call set_op on this_unprom.
38833 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
38835 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
38837 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
38839 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
38840 to 'aarch_ra_sign_key'.
38841 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
38843 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
38844 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
38845 * config/arm/arm.opt: Define.
38847 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
38849 PR tree-optimization/108316
38850 * tree-vect-stmts.cc (get_load_store_type): When using
38851 internal functions for gather/scatter, make sure that the type
38852 of the offset argument is consistent with the offset vector type.
38854 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
38857 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
38859 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38860 * ira.cc (validate_equiv_mem): Check memref address variance.
38861 (update_equiv_regs): Define caller save equivalence for
38863 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38864 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38865 call_save_p. Use caller save equivalence depending on the arg.
38866 (split_reg): Adjust the call.
38868 2023-02-08 Jakub Jelinek <jakub@redhat.com>
38870 * tree.def (SAD_EXPR): Remove outdated comment about missing
38873 2023-02-07 Marek Polacek <polacek@redhat.com>
38875 * doc/invoke.texi: Update -fchar8_t documentation.
38877 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
38879 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38880 * ira.cc (validate_equiv_mem): Check memref address variance.
38881 (update_equiv_regs): Define caller save equivalence for
38883 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38884 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38885 call_save_p. Use caller save equivalence depending on the arg.
38886 (split_reg): Adjust the call.
38888 2023-02-07 Richard Biener <rguenther@suse.de>
38890 PR tree-optimization/26854
38891 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
38892 instead of immediate uses.
38894 2023-02-07 Jakub Jelinek <jakub@redhat.com>
38896 PR tree-optimization/106923
38897 * ipa-split.cc (execute_split_functions): Don't split returns_twice
38900 2023-02-07 Jakub Jelinek <jakub@redhat.com>
38902 PR tree-optimization/106433
38903 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
38904 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
38906 2023-02-07 Jan Hubicka <jh@suse.cz>
38908 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
38911 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
38913 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
38914 (process_asm): Create a constructor for GCN_STACK_SIZE.
38915 (main): Parse the -mstack-size option.
38917 2023-02-06 Alex Coplan <alex.coplan@arm.com>
38920 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
38921 Use correct constraint for operand 3.
38923 2023-02-06 Martin Jambor <mjambor@suse.cz>
38925 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
38927 2023-02-06 Xi Ruoyao <xry111@xry111.site>
38929 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
38930 New define_int_iterator.
38931 (bytepick_d_ashift_amount): Likewise.
38932 (bytepick_imm): New define_int_attr.
38933 (bytepick_w_lshiftrt_amount): Likewise.
38934 (bytepick_d_lshiftrt_amount): Likewise.
38935 (bytepick_w_<bytepick_imm>): New define_insn template.
38936 (bytepick_w_<bytepick_imm>_extend): Likewise.
38937 (bytepick_d_<bytepick_imm>): Likewise.
38938 (bytepick_w): Remove unused define_insn.
38939 (bytepick_d): Likewise.
38940 (UNSPEC_BYTEPICK_W): Remove unused unspec.
38941 (UNSPEC_BYTEPICK_D): Likewise.
38942 * config/loongarch/predicates.md (const_0_to_3_operand):
38943 Remove unused define_predicate.
38944 (const_0_to_7_operand): Likewise.
38946 2023-02-06 Jakub Jelinek <jakub@redhat.com>
38948 PR tree-optimization/108655
38949 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
38950 or -fsanitize=unreachable -fsanitize-trap=unreachable return
38951 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
38953 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
38955 * doc/install.texi (Specific): Remove PW32.
38957 2023-02-03 Jakub Jelinek <jakub@redhat.com>
38959 PR tree-optimization/108647
38960 * range-op.cc (operator_equal::op1_range,
38961 operator_not_equal::op1_range): Don't test op2 bound
38962 equality if op2.undefined_p (), instead set_varying.
38963 (operator_lt::op1_range, operator_le::op1_range,
38964 operator_gt::op1_range, operator_ge::op1_range): Return false if
38965 op2.undefined_p ().
38966 (operator_lt::op2_range, operator_le::op2_range,
38967 operator_gt::op2_range, operator_ge::op2_range): Return false if
38968 op1.undefined_p ().
38970 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
38972 PR tree-optimization/108639
38973 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
38975 (irange::operator==): Same.
38977 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
38979 PR tree-optimization/108647
38980 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
38981 (foperator_lt::op2_range): Same.
38982 (foperator_le::op1_range): Same.
38983 (foperator_le::op2_range): Same.
38984 (foperator_gt::op1_range): Same.
38985 (foperator_gt::op2_range): Same.
38986 (foperator_ge::op1_range): Same.
38987 (foperator_ge::op2_range): Same.
38988 (foperator_unordered_lt::op1_range): Same.
38989 (foperator_unordered_lt::op2_range): Same.
38990 (foperator_unordered_le::op1_range): Same.
38991 (foperator_unordered_le::op2_range): Same.
38992 (foperator_unordered_gt::op1_range): Same.
38993 (foperator_unordered_gt::op2_range): Same.
38994 (foperator_unordered_ge::op1_range): Same.
38995 (foperator_unordered_ge::op2_range): Same.
38997 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
38999 PR tree-optimization/107570
39000 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
39002 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
39004 * doc/gm2.texi (Internals): Remove from menu.
39005 (Using): Comment out ifnohtml conditional.
39006 (Documentation): Use gcc url.
39007 (License): Node simplified.
39008 (Copying): New node. Include gpl_v3_without_node.
39009 (Contributing): Node simplified.
39010 (Internals): Commented out.
39011 (Libraries): Node simplified.
39014 (Functions): Ditto.
39016 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
39018 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
39020 (mve_vqshluq_m_n_s<mode>): Likewise.
39021 (mve_vshlq_m_<supf><mode>): Likewise.
39022 (mve_vsriq_m_n_<supf><mode>): Likewise.
39023 (mve_vsubq_m_<supf><mode>): Likewise.
39025 2023-02-03 Martin Jambor <mjambor@suse.cz>
39028 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
39029 when comparing to an IPA-CP value.
39030 (dump_list_of_param_indices): New function.
39031 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
39032 Dump removed candidates using dump_list_of_param_indices.
39033 * ipa-param-manipulation.cc
39034 (ipa_param_body_adjustments::modify_expression): Add assert checking
39035 sizes of a VIEW_CONVERT_EXPR will match.
39036 (ipa_param_body_adjustments::modify_assignment): Likewise.
39038 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
39040 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
39041 * config/riscv/riscv.cc: Ditto.
39043 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39045 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
39049 * config/riscv/vector.md: Ditto.
39051 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39053 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
39054 * config/riscv/riscv-vector-builtins-bases.cc: New class.
39055 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
39058 * config/riscv/riscv-vector-builtins.cc: Ditto.
39059 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
39061 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
39063 * toplev.cc (toplev::main): Only print the version information header
39064 from toplevel main().
39066 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
39068 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
39069 cond_{ashl|ashr|lshr}
39071 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
39073 PR rtl-optimization/108086
39074 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
39075 Adjust size-related commentary accordingly.
39077 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
39079 PR rtl-optimization/108508
39080 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
39081 the splay tree search gives the first clobber in the second group,
39082 make sure that the root of the first clobber group is updated
39083 correctly. Enter the new clobber group into the definition splay
39086 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
39088 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
39089 Fix finding best match score.
39091 2023-02-02 Jakub Jelinek <jakub@redhat.com>
39094 PR rtl-optimization/108463
39096 * cselib.cc (cselib_current_insn): Move declaration earlier.
39097 (cselib_hasher::equal): For debug only locs, temporarily override
39098 cselib_current_insn to their l->setting_insn for the
39099 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
39100 promote some debug locs.
39101 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
39102 when using cselib call cselib_lookup_from_insn on the address but
39103 don't substitute it.
39105 2023-02-02 Richard Biener <rguenther@suse.de>
39107 PR middle-end/108625
39108 * genmatch.cc (expr::gen_transform): Also disallow resimplification
39109 from pushing to lseq with force_leaf.
39110 (dt_simplify::gen_1): Likewise.
39112 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
39114 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
39115 (struct kernargs): Replace the common content with kernargs_abi.
39116 (struct heap): Delete.
39117 (main): Read GCN_STACK_SIZE envvar.
39118 Allocate space for the device stacks.
39119 Write the new kernargs fields.
39120 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
39121 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
39122 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
39123 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
39124 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
39125 Set up the stacks from the values in the kernargs, not private.
39126 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
39127 (gcn_hsa_declare_function_name): Turn off the private segment.
39128 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
39129 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
39130 * config/gcn/gcn.opt (mstack-size): Change the description.
39132 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
39135 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
39136 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
39137 addressing MVE predicate modes.
39138 (mve_bool_vec_to_const): Change to represent correct MVE predicate
39140 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
39142 (arm_vector_mode_supported_p): Likewise.
39143 (arm_mode_to_pred_mode): Add V2QI.
39144 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
39146 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
39147 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
39148 (v2qi_UP): New macro.
39149 (v4bi_UP): New macro.
39150 (v8bi_UP): New macro.
39151 (v16bi_UP): New macro.
39152 (arm_expand_builtin_args): Make it able to expand the new predicate
39154 * config/arm/arm-modes.def (V2QI): New mode.
39155 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
39156 Pred4x4_t): Remove unused predicate builtin types.
39157 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
39158 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
39159 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
39160 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
39161 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
39162 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
39163 of MODE_VECTOR_BOOL.
39164 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
39165 (MVE_VPRED): Likewise.
39166 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
39167 (MVE_vctp): New mode attribute.
39171 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
39172 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
39174 (mve_vpnothi): Rename this...
39175 (mve_vpnotv16bi): ... to this.
39176 (mve_vctp<mode1>q_mhi): Rename this...
39177 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
39178 (mve_vldrdq_gather_base_z_<supf>v2di,
39179 mve_vldrdq_gather_offset_z_<supf>v2di,
39180 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
39181 mve_vstrdq_scatter_base_p_<supf>v2di,
39182 mve_vstrdq_scatter_offset_p_<supf>v2di,
39183 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
39184 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
39185 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
39186 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
39187 mve_vldrdq_gather_base_wb_z_<supf>v2di,
39188 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
39189 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
39191 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
39193 (VCTP): ... with this.
39194 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
39195 (VCTP_M): ... with this.
39196 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
39197 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
39199 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
39202 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
39203 (arm_modes_tieable_p): Make MVE predicate modes tieable.
39204 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
39205 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
39206 simplify_subreg to simplify subregs where the outermode is not scalar.
39208 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
39211 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
39212 new qualifiers parameter and use unsigned short type for MVE predicate.
39213 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
39215 (arm_init_crypto_builtins): Likewise.
39217 2023-02-02 Jakub Jelinek <jakub@redhat.com>
39220 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
39221 * internal-fn.def (TRAP): Remove.
39222 * internal-fn.cc (expand_TRAP): Remove.
39223 * tree.cc (build_common_builtin_nodes): Define
39224 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
39225 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
39226 instead of BUILT_IN_TRAP.
39227 * gimple.cc (gimple_build_builtin_unreachable): Remove
39228 emitting internal function for BUILT_IN_TRAP.
39229 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
39230 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
39231 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
39232 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
39233 BUILT_IN_UNREACHABLE_TRAP.
39234 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
39235 * tree-cfg.cc (verify_gimple_call,
39236 pass_warn_function_return::execute): Likewise.
39237 * attribs.cc (decl_attributes): Don't report exclusions on
39238 BUILT_IN_UNREACHABLE_TRAP either.
39240 2023-02-02 liuhongt <hongtao.liu@intel.com>
39242 PR tree-optimization/108601
39243 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
39244 * tree-vect-loop.cc
39245 (vectorizable_nonlinear_induction): Remove
39246 vect_can_peel_nonlinear_iv_p.
39247 (vect_can_peel_nonlinear_iv_p): Don't peel
39248 nonlinear iv(mult or shift) for epilog when vf is not
39249 constant and moved the defination to ..
39250 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
39253 2023-02-02 Jakub Jelinek <jakub@redhat.com>
39255 PR middle-end/108435
39256 * tree-nested.cc (convert_nonlocal_omp_clauses)
39257 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
39258 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
39259 before calling declare_vars.
39260 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
39261 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
39262 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
39263 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
39265 2023-02-01 Tamar Christina <tamar.christina@arm.com>
39267 * common/config/aarch64/aarch64-common.cc
39268 (struct aarch64_option_extension): Add native_detect and document struct
39270 (all_extensions): Set new field native_detect.
39271 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
39274 2023-02-01 Martin Liska <mliska@suse.cz>
39276 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
39279 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
39281 PR tree-optimization/108356
39282 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
39283 do a search of the DOM tree for a range.
39285 2023-02-01 Martin Liska <mliska@suse.cz>
39288 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
39289 ony non-null values.
39290 * ipa.cc (walk_polymorphic_call_targets): Likewise.
39292 2023-02-01 Martin Liska <mliska@suse.cz>
39295 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
39298 2023-02-01 Jakub Jelinek <jakub@redhat.com>
39301 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
39302 subregs in DEBUG_INSNs.
39304 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
39306 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
39308 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
39310 * config/s390/s390.cc (s390_restore_gpr_p): New function.
39311 (s390_preserve_gpr_arg_in_range_p): New function.
39312 (s390_preserve_gpr_arg_p): New function.
39313 (s390_preserve_fpr_arg_p): New function.
39314 (s390_register_info_stdarg_fpr): Rename to ...
39315 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
39316 (s390_register_info_stdarg_gpr): Rename to ...
39317 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
39318 (s390_register_info): Use the renamed functions above.
39319 (s390_optimize_register_info): Likewise.
39320 (save_fpr): Generate CFI for -mpreserve-args.
39321 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
39322 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
39323 (s390_optimize_prologue): Likewise.
39324 * config/s390/s390.opt: New option -mpreserve-args
39326 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
39328 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
39329 (restore_gprs): Likewise.
39330 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
39331 frame pointer if a frame-pointer is used.
39332 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
39333 * config/s390/s390.md (stack_tie): Add a register operand and
39335 (@stack_tie<mode>): ... this.
39337 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
39339 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
39340 EMIT_CFI parameter.
39341 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
39342 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
39344 2023-02-01 Richard Biener <rguenther@suse.de>
39346 PR middle-end/108500
39347 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
39348 with tree traversal algorithm.
39350 2023-02-01 Jason Merrill <jason@redhat.com>
39352 * doc/invoke.texi: Document -Wno-changes-meaning.
39354 2023-02-01 David Malcolm <dmalcolm@redhat.com>
39356 * doc/invoke.texi (Static Analyzer Options): Add notes about
39357 limitations of -fanalyzer.
39359 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39361 * config/riscv/constraints.md (vj): New.
39363 * config/riscv/iterators.md: Add more opcode.
39364 * config/riscv/predicates.md (vector_arith_operand): New.
39365 (vector_neg_arith_operand): New.
39366 (vector_shift_operand): New.
39367 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
39368 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
39385 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
39402 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
39403 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
39404 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
39405 (DEF_RVV_U_OPS): New.
39406 (rvv_arg_type_info::get_base_vector_type): Handle
39407 RVV_BASE_shift_vector.
39408 (rvv_arg_type_info::get_tree_type): Ditto.
39409 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
39410 RVV_BASE_shift_vector.
39411 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
39412 * config/riscv/vector-iterators.md: Handle more opcode.
39413 * config/riscv/vector.md (@pred_<optab><mode>): New.
39415 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
39418 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
39421 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
39423 PR tree-optimization/108608
39424 * tree-vect-loop.cc (vect_transform_reduction): Handle single
39425 def-use cycles that involve function calls rather than tree codes.
39427 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
39429 PR tree-optimization/108385
39430 * gimple-range-gori.cc (gori_compute::compute_operand_range):
39431 Allow VARYING computations to continue if there is a relation.
39432 * range-op.cc (pointer_plus_operator::op2_range): New.
39434 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
39436 PR tree-optimization/108359
39437 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
39438 (range_operator::fold_range): If op1 is equivalent to op2 then
39439 invoke new fold_in_parts_equiv to operate on sub-components.
39440 * range-op.h (wi_fold_in_parts_equiv): New prototype.
39442 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
39444 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
39445 not abort calculations if there is a valid relation available.
39446 (gori_compute::refine_using_relation): Pass correct relation trio.
39447 (gori_compute::compute_operand1_range): Create trio and use it.
39448 (gori_compute::compute_operand2_range): Ditto.
39449 * range-op.cc (operator_plus::op1_range): Use correct trio member.
39450 (operator_minus::op1_range): Use correct trio member.
39451 * value-relation.cc (value_relation::create_trio): New.
39452 * value-relation.h (value_relation::create_trio): New prototype.
39454 2023-01-31 Jakub Jelinek <jakub@redhat.com>
39457 * config/i386/i386-expand.cc
39458 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
39459 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
39460 equal to bitsize of mode.
39462 2023-01-31 Jakub Jelinek <jakub@redhat.com>
39464 PR rtl-optimization/108596
39465 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
39466 ends with asm goto and has a crossing fallthrough edge to the same bb
39467 that contains at least one of its labels by restoring EDGE_CROSSING
39468 flag even on possible edge from cur_bb to new_bb successor.
39470 2023-01-31 Jakub Jelinek <jakub@redhat.com>
39473 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
39474 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
39475 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
39476 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
39477 uninitialized automatic variable __W.
39479 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
39481 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
39483 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39485 * config/riscv/riscv-protos.h (get_vector_mode): New function.
39486 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
39487 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
39488 (class loadstore): Adjust for indexed loads/stores support.
39490 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
39491 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
39507 * config/riscv/riscv-vector-builtins-shapes.cc
39508 (struct indexed_loadstore_def): New class.
39510 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
39511 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
39512 for indexed loads/stores support.
39513 (check_required_extensions): Ditto.
39514 (rvv_arg_type_info::get_base_vector_type): New function.
39515 (rvv_arg_type_info::get_tree_type): Ditto.
39516 (function_builder::add_unique_function): Adjust for indexed loads/stores
39518 (function_expander::use_exact_insn): New function.
39519 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
39520 indexed loads/stores support.
39521 (struct rvv_arg_type_info): Ditto.
39522 (function_expander::index_mode): New function.
39523 (function_base::apply_tail_policy_p): Ditto.
39524 (function_base::apply_mask_policy_p): Ditto.
39525 * config/riscv/vector-iterators.md (unspec): New unspec.
39526 * config/riscv/vector.md (unspec): Ditto.
39527 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
39529 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
39530 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
39531 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
39532 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
39533 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
39534 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
39535 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
39536 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
39537 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
39538 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39539 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39540 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39541 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39543 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
39545 * config.gcc: Recognize x86_64-*-gnu* targets and include
39547 * config/i386/gnu64.h: Define configuration for new target
39548 including ld.so location.
39550 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
39552 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
39553 ampere1a to include SM4.
39555 2023-01-30 Andrew Pinski <apinski@marvell.com>
39557 PR tree-optimization/108582
39558 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
39559 for middlebb to have no phi nodes.
39561 2023-01-30 Richard Biener <rguenther@suse.de>
39563 PR tree-optimization/108574
39564 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
39565 sameval and def, ignore the equivalence if there's the
39566 danger of oscillating between two values.
39568 2023-01-30 Andreas Schwab <schwab@suse.de>
39570 * common/config/riscv/riscv-common.cc
39571 (riscv_option_optimization_table)
39572 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
39573 -fasynchronous-unwind-tables and -funwind-tables.
39574 * config.gcc (riscv*-*-linux*): Define
39575 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
39577 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
39579 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
39580 value of includedir.
39582 2023-01-30 Richard Biener <rguenther@suse.de>
39585 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
39588 2023-01-30 liuhongt <hongtao.liu@intel.com>
39590 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
39591 * doc/invoke.texi: Ditto.
39593 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
39595 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
39596 (stmt_may_terminate_function_p): If assuming return or EH
39597 volatile asm is safe.
39598 (find_always_executed_bbs): Fix handling of terminating BBS and
39599 infinite loops; add debug output.
39600 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
39602 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
39604 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
39605 off-by-one in checking the permissible shift-amount.
39607 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39609 * doc/extend.texi (Named Address Spaces): Update link to the
39612 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39614 * doc/standards.texi (Standards): Fix markup.
39616 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39618 * doc/standards.texi (Standards): Update link to Objective-C book.
39620 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39622 * doc/invoke.texi (Instrumentation Options): Update reference to
39625 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39627 * doc/standards.texi: Update Go1 link.
39629 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39631 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
39632 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
39635 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39636 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
39638 * config/riscv/riscv-vector-builtins.cc
39639 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
39640 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
39641 (@pred_strided_store<mode>): Ditto.
39643 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39645 * config/riscv/vector.md (tail_policy_op_idx): Remove.
39646 (mask_policy_op_idx): Remove.
39647 (avl_type_op_idx): Remove.
39649 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
39651 PR tree-optimization/96373
39652 * tree.h (sign_mask_for): Declare.
39653 * tree.cc (sign_mask_for): New function.
39654 (signed_or_unsigned_type_for): For vector types, try to use the
39655 related_int_vector_mode.
39656 * genmatch.cc (commutative_op): Handle conditional internal functions.
39657 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
39659 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
39661 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
39662 Use the likely minimum VF when bounding the denominators to
39663 the estimated number of iterations.
39665 2023-01-27 Richard Biener <rguenther@suse.de>
39668 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
39669 and -Ofast FP environment side-effects.
39671 2023-01-27 Richard Biener <rguenther@suse.de>
39674 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
39675 Don't add crtfastmath.o for -shared.
39677 2023-01-27 Richard Biener <rguenther@suse.de>
39680 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
39683 2023-01-27 Richard Biener <rguenther@suse.de>
39686 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
39687 crtfastmath.o for -shared.
39689 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
39691 PR tree-optimization/108306
39692 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
39693 varying for shifts that are always out of void range.
39694 (operator_rshift::fold_range): Return [0, 0] not
39695 varying for shifts that are always out of void range.
39697 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
39699 PR tree-optimization/108447
39700 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
39701 Do not attempt to fold HONOR_NAN types.
39703 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39705 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
39706 Remove _m suffix for "vop_m" C++ overloaded API name.
39708 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39710 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
39711 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39712 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
39714 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
39715 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
39716 (vbool64_t): Ditto.
39717 (vbool32_t): Ditto.
39718 (vbool16_t): Ditto.
39723 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
39724 (rvv_arg_type_info::get_tree_type): Ditto.
39725 (function_expander::use_contiguous_load_insn): Ditto.
39726 * config/riscv/vector.md (@pred_store<mode>): Ditto.
39728 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39730 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
39731 (vsetvl_discard_result_insn_p): New function.
39732 (reg_killed_by_bb_p): rename to find_reg_killed_by.
39733 (find_reg_killed_by): New name.
39734 (get_vl): allow it to be called by more functions.
39735 (has_vsetvl_killed_avl_p): Add condition.
39736 (get_avl): allow it to be called by more functions.
39737 (insn_should_be_added_p): New function.
39738 (get_all_nonphi_defs): Refine function.
39739 (get_all_sets): Ditto.
39740 (get_same_bb_set): New function.
39741 (any_insn_in_bb_p): Ditto.
39742 (any_set_in_bb_p): Ditto.
39743 (get_vl_vtype_info): Add VLMAX forward optimization.
39744 (source_equal_p): Fix issues.
39745 (extract_single_source): Refine.
39746 (avl_info::multiple_source_equal_p): New function.
39747 (avl_info::operator==): Adjust for final version.
39748 (vl_vtype_info::operator==): Ditto.
39749 (vl_vtype_info::same_avl_p): Ditto.
39750 (vector_insn_info::parse_insn): Ditto.
39751 (vector_insn_info::available_p): New function.
39752 (vector_insn_info::merge): Adjust for final version.
39753 (vector_insn_info::dump): Add hard_empty.
39754 (pass_vsetvl::hard_empty_block_p): New function.
39755 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
39756 (pass_vsetvl::forward_demand_fusion): Ditto.
39757 (pass_vsetvl::demand_fusion): Ditto.
39758 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
39759 (pass_vsetvl::compute_local_properties): Adjust for final version.
39760 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
39761 (pass_vsetvl::refine_vsetvls): Ditto.
39762 (pass_vsetvl::commit_vsetvls): Ditto.
39763 (pass_vsetvl::propagate_avl): New function.
39764 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
39765 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
39767 2023-01-27 Jakub Jelinek <jakub@redhat.com>
39770 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
39771 from size_t to int.
39773 2023-01-27 Jakub Jelinek <jakub@redhat.com>
39776 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
39777 redirection of calls to __builtin_trap in addition to redirection
39778 to __builtin_unreachable.
39780 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39782 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
39784 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39786 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
39787 (emit_vsetvl_insn): Ditto.
39789 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39791 * config/riscv/vector.md: Fix constraints.
39793 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39795 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
39797 2023-01-27 Patrick Palka <ppalka@redhat.com>
39798 Jakub Jelinek <jakub@redhat.com>
39800 * tree-core.h (tree_code_type, tree_code_length): For
39801 C++17 and later, add inline keyword, otherwise don't define
39802 the arrays, but declare extern arrays.
39803 * tree.cc (tree_code_type, tree_code_length): Define these
39804 arrays for C++14 and older.
39806 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39808 * config/riscv/riscv-vsetvl.h: Change it into public.
39810 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39812 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
39815 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39817 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
39819 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39821 * config/riscv/vector.md: Fix incorrect attributes.
39823 2023-01-27 Richard Biener <rguenther@suse.de>
39826 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
39827 Don't add crtfastmath.o for -shared.
39829 2023-01-27 Alexandre Oliva <oliva@gnu.org>
39831 * doc/options.texi (option, RejectNegative): Mention that
39832 -g-started options are also implicitly negatable.
39834 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
39836 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
39837 Use get_typenode_from_name to get fixed-width integer type
39839 * config/riscv/riscv-vector-builtins.def: Update define with
39840 fixed-width integer type nodes.
39842 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39844 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
39845 (real_insn_and_same_bb_p): New function.
39846 (same_bb_and_after_or_equal_p): Remove it.
39847 (before_p): New function.
39848 (reg_killed_by_bb_p): Ditto.
39849 (has_vsetvl_killed_avl_p): Ditto.
39850 (get_vl): Move location so that we can call it.
39851 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
39852 (available_occurrence_p): Ditto.
39853 (dominate_probability_p): Remove it.
39854 (can_backward_propagate_p): Remove it.
39855 (get_all_nonphi_defs): New function.
39856 (get_all_predecessors): Ditto.
39857 (any_insn_in_bb_p): Ditto.
39858 (insert_vsetvl): Adjust AVL REG.
39859 (source_equal_p): New function.
39860 (extract_single_source): Ditto.
39861 (avl_info::single_source_equal_p): Ditto.
39862 (avl_info::operator==): Adjust for AVL=REG.
39863 (vl_vtype_info::same_avl_p): Ditto.
39864 (vector_insn_info::set_demand_info): Remove it.
39865 (vector_insn_info::compatible_p): Adjust for AVL=REG.
39866 (vector_insn_info::compatible_avl_p): New function.
39867 (vector_insn_info::merge): Adjust AVL=REG.
39868 (vector_insn_info::dump): Ditto.
39869 (pass_vsetvl::merge_successors): Remove it.
39870 (enum fusion_type): New enum.
39871 (pass_vsetvl::get_backward_fusion_type): New function.
39872 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
39873 (pass_vsetvl::forward_demand_fusion): Ditto.
39874 (pass_vsetvl::demand_fusion): Ditto.
39875 (pass_vsetvl::prune_expressions): Ditto.
39876 (pass_vsetvl::compute_local_properties): Ditto.
39877 (pass_vsetvl::cleanup_vsetvls): Ditto.
39878 (pass_vsetvl::commit_vsetvls): Ditto.
39879 (pass_vsetvl::init): Ditto.
39880 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
39881 (enum merge_type): New enum.
39883 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39885 * config/riscv/riscv-vsetvl.cc
39886 (vector_infos_manager::vector_infos_manager): Add probability.
39887 (vector_infos_manager::dump): Ditto.
39888 (pass_vsetvl::compute_probabilities): Ditto.
39889 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
39891 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39893 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
39894 (vector_insn_info::merge): Ditto.
39895 (vector_insn_info::dump): Ditto.
39896 (pass_vsetvl::merge_successors): Ditto.
39897 (pass_vsetvl::backward_demand_fusion): Ditto.
39898 (pass_vsetvl::forward_demand_fusion): Ditto.
39899 (pass_vsetvl::commit_vsetvls): Ditto.
39900 * config/riscv/riscv-vsetvl.h: Ditto.
39902 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39904 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
39907 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39909 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
39911 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39913 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
39914 Add pre-check for redundant flow.
39916 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39918 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
39919 (vector_infos_manager::free_bitmap_vectors): Ditto.
39920 (pass_vsetvl::pre_vsetvl): Adjust codes.
39921 * config/riscv/riscv-vsetvl.h: New function declaration.
39923 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39925 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
39926 (vector_insn_info::set_demand_info): New function.
39927 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
39928 (pass_vsetvl::merge_successors): Ditto.
39929 (pass_vsetvl::compute_global_backward_infos): Ditto.
39930 (pass_vsetvl::backward_demand_fusion): Ditto.
39931 (pass_vsetvl::forward_demand_fusion): Ditto.
39932 (pass_vsetvl::demand_fusion): New function.
39933 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
39934 * config/riscv/riscv-vsetvl.h: New function declaration.
39936 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39938 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
39940 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39942 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
39943 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
39945 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39947 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
39948 (backward_propagate_worthwhile_p): Fix non-worthwhile.
39950 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39952 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
39954 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39956 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
39957 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
39958 (pass_vsetvl::commit_vsetvls): Ditto.
39959 * config/riscv/riscv-vsetvl.h: New function declaration.
39961 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39963 * config/riscv/vector.md:
39965 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39967 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
39968 pred_store for vse.
39969 * config/riscv/riscv-vector-builtins.cc
39970 (function_expander::add_mem_operand): Refine function.
39971 (function_expander::use_contiguous_load_insn): Adjust new
39973 (function_expander::use_contiguous_store_insn): Ditto.
39974 * config/riscv/riscv-vector-builtins.h: Refine function.
39975 * config/riscv/vector.md (@pred_store<mode>): New pattern.
39977 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39979 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
39981 2023-01-26 Marek Polacek <polacek@redhat.com>
39983 PR middle-end/108543
39984 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
39985 if it was previously set.
39987 2023-01-26 Jakub Jelinek <jakub@redhat.com>
39989 PR tree-optimization/108540
39990 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
39991 are singletons, use range_true even if op1 != op2
39992 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
39993 even if intersection of the ranges is empty and one has
39994 zero low bound and another zero high bound, use range_true_and_false
39995 rather than range_false.
39996 (foperator_not_equal::fold_range): If both op1 and op2
39997 are singletons, use range_false even if op1 != op2
39998 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
39999 even if intersection of the ranges is empty and one has
40000 zero low bound and another zero high bound, use range_true_and_false
40001 rather than range_true.
40003 2023-01-26 Jakub Jelinek <jakub@redhat.com>
40005 * value-relation.cc (kind_string): Add const.
40006 (rr_negate_table, rr_swap_table, rr_intersect_table,
40007 rr_union_table, rr_transitive_table): Add static const, change
40008 element type from relation_kind to unsigned char.
40009 (relation_negate, relation_swap, relation_intersect, relation_union,
40010 relation_transitive): Cast rr_*_table element to relation_kind.
40011 (relation_to_code): Add static const.
40012 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
40014 2023-01-26 Richard Biener <rguenther@suse.de>
40016 PR tree-optimization/108547
40017 * gimple-predicate-analysis.cc (value_sat_pred_p):
40020 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
40022 PR tree-optimization/108522
40023 * tree-object-size.cc (compute_object_offset): Make EXPR
40024 argument non-const. Call component_ref_field_offset.
40026 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
40028 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
40029 FEATURE_STRING field.
40031 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
40033 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
40035 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
40039 * gcc.cc: Provide default specs for Modula-2 so that when the
40040 language is not built-in better diagnostics are emitted for
40041 attempts to use .mod or .m2i file extensions.
40043 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
40045 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
40047 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
40049 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
40051 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
40053 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
40056 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
40058 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
40060 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
40062 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
40064 2023-01-25 Richard Biener <rguenther@suse.de>
40066 PR tree-optimization/108523
40067 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
40068 backedge value for the result when using predication to
40071 2023-01-25 Richard Biener <rguenther@suse.de>
40073 * doc/lto.texi (Command line options): Reword and update reference
40074 to removed lto_read_all_file_options.
40076 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
40078 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
40081 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
40083 * doc/contrib.texi: Add Jose E. Marchesi.
40085 2023-01-25 Jakub Jelinek <jakub@redhat.com>
40087 PR tree-optimization/108498
40088 * gimple-ssa-store-merging.cc (class store_operand_info):
40089 End coment with full stop rather than comma.
40090 (split_group): Likewise.
40091 (merged_store_group::apply_stores): Clear string_concatenation if
40092 start or end aren't on a byte boundary.
40094 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
40095 Jakub Jelinek <jakub@redhat.com>
40097 PR tree-optimization/108522
40098 * tree-object-size.cc (compute_object_offset): Use
40099 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
40101 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40103 * config/xtensa/xtensa.md:
40104 Fix exit from loops detecting references before overwriting in the
40107 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
40109 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
40110 do elimination but only for hard register.
40111 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
40112 calls of get_hard_regno.
40114 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
40116 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
40119 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
40122 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
40123 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
40126 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40128 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
40129 and only include 'csky/t-csky-linux' when enable multilib.
40130 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
40131 define it when disable multilib.
40133 2023-01-24 Richard Biener <rguenther@suse.de>
40135 PR tree-optimization/108500
40136 * dominance.h (calculate_dominance_info): Add parameter
40137 to indicate fast-query compute, defaulted to true.
40138 * dominance.cc (calculate_dominance_info): Honor
40139 fast-query compute parameter.
40140 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
40141 not compute the dominator fast-query DFS numbers.
40143 2023-01-24 Eric Biggers <ebiggers@google.com>
40146 * optc-save-gen.awk: Fix copy-and-paste error.
40148 2023-01-24 Jakub Jelinek <jakub@redhat.com>
40151 * cgraphbuild.cc: Include gimplify.h.
40152 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
40153 their corresponding DECL_VALUE_EXPR expressions after unsharing.
40155 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40158 * config.gcc (tm_file): Move the variable out of loop.
40160 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
40161 Yang Yujie <yangyujie@loongson.cn>
40164 * config/loongarch/loongarch.cc (loongarch_classify_address):
40165 Add precessint for CONST_INT.
40166 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
40167 (loongarch_print_operand): Increase the processing of '%c'.
40168 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
40169 And port the public operand modifiers information to this document.
40171 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40173 * doc/invoke.texi (-mbranch-protection): Update documentation.
40175 2023-01-23 Richard Biener <rguenther@suse.de>
40178 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
40180 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
40181 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
40182 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
40183 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
40185 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40187 * config/arm/aout.h (ra_auth_code): Add entry in enum.
40188 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
40189 to dwarf frame expression.
40190 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
40191 (arm_expand_prologue): Update frame related information and reg notes
40192 for pac/pacbit insn.
40193 (arm_regno_class): Check for pac pseudo reigster.
40194 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
40195 (arm_init_machine_status): Set pacspval_needed to zero.
40196 (arm_debugger_regno): Check for PAC register.
40197 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
40199 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
40200 (arm_unwind_emit): Update REG_CFA_REGISTER case._
40201 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
40202 (DWARF_PAC_REGNUM): Define.
40203 (IS_PAC_REGNUM): Likewise.
40204 (enum reg_class): Add PAC_REG entry.
40205 (machine_function): Add pacbti_needed state to structure.
40206 * config/arm/arm.md (RA_AUTH_CODE): Define.
40208 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40210 * config.gcc ($tm_file): Update variable.
40211 * config/arm/arm-mlib.h: Create new header file.
40212 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
40213 multilib arch directory.
40214 (MULTILIB_REUSE): Add multilib reuse rules.
40215 (MULTILIB_MATCHES): Add multilib match rules.
40217 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40219 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
40220 * config/arm/arm-tables.opt: Regenerate.
40221 * config/arm/arm-tune.md: Likewise.
40222 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
40223 * (-mfix-cmse-cve-2021-35465): Likewise.
40225 2023-01-23 Richard Biener <rguenther@suse.de>
40227 PR tree-optimization/108482
40228 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
40229 .LOOP_DIST_ALIAS calls.
40231 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40233 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
40234 * config/arm/arm-protos.h: Update.
40235 * config/arm/aarch-common-protos.h: Declare
40236 'aarch_bti_arch_check'.
40237 * config/arm/arm.cc (aarch_bti_enabled) Update.
40238 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
40239 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
40240 * config/arm/arm.md (bti_nop): New insn.
40241 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
40242 (aarch-bti-insert.o): New target.
40243 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
40244 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
40246 (gate): Make use of 'aarch_bti_arch_check'.
40247 * config/arm/arm-passes.def: New file.
40248 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
40250 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40252 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
40253 'aarch-bti-insert.o'.
40254 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
40256 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
40257 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
40258 (aarch64_output_mi_thunk)
40259 (aarch64_print_patchable_function_entry)
40260 (aarch64_file_end_indicate_exec_stack): Update renamed function
40261 calls to renamed functions.
40262 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
40263 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
40265 * config/aarch64/aarch64-bti-insert.cc: Delete.
40266 * config/arm/aarch-bti-insert.cc: New file including and
40267 generalizing code from aarch64-bti-insert.cc.
40268 * config/arm/aarch-common-protos.h: Update.
40270 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40272 * config/arm/arm.h (arm_arch8m_main): Declare it.
40273 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
40275 * config/arm/arm.cc (arm_arch8m_main): Define it.
40276 (arm_option_reconfigure_globals): Set arm_arch8m_main.
40277 (arm_compute_frame_layout, arm_expand_prologue)
40278 (thumb2_expand_return, arm_expand_epilogue)
40279 (arm_conditional_register_usage): Update for pac codegen.
40280 (arm_current_function_pac_enabled_p): New function.
40281 (aarch_bti_enabled) New function.
40282 (use_return_insn): Return zero when pac is enabled.
40283 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
40285 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
40286 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
40288 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40290 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
40291 mbranch-protection.
40293 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40294 Tejas Belagod <tbelagod@arm.com>
40296 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
40297 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
40299 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40300 Tejas Belagod <tbelagod@arm.com>
40301 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40303 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
40304 new pseudo register class _UVRSC_PAC.
40306 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40307 Tejas Belagod <tbelagod@arm.com>
40309 * config/arm/arm-c.cc (arm_cpu_builtins): Define
40310 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
40311 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
40313 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40314 Tejas Belagod <tbelagod@arm.com>
40316 * doc/sourcebuild.texi: Document arm_pacbti_hw.
40318 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40319 Tejas Belagod <tbelagod@arm.com>
40320 Richard Earnshaw <Richard.Earnshaw@arm.com>
40322 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
40323 -mbranch-protection option and initialize appropriate data structures.
40324 * config/arm/arm.opt (-mbranch-protection): New option.
40325 * doc/invoke.texi (Arm Options): Document it.
40327 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40328 Tejas Belagod <tbelagod@arm.com>
40330 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
40331 * config/arm/arm-cpus.in (pacbti): New feature.
40332 * doc/invoke.texi (Arm Options): Document it.
40334 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
40335 Tejas Belagod <tbelagod@arm.com>
40337 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
40338 (all_architectures): Fix comment.
40339 (aarch64_parse_extension): Rename return type, enum value names.
40340 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
40341 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
40342 Also rename corresponding enum values.
40343 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
40344 out aarch64_function_type and move it to common code as
40345 aarch_function_type in aarch-common.h.
40346 * config/aarch64/aarch64-protos.h: Include common types header,
40347 move out types aarch64_parse_opt_result and aarch64_key_type to
40349 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
40350 and functions out into aarch-common.h and aarch-common.cc. Fix up
40351 all the name changes resulting from the move.
40352 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
40354 * config/aarch64/aarch64.opt: Include aarch-common.h to import
40355 type move. Fix up name changes from factoring out common code and
40357 * config/arm/aarch-common-protos.h: Export factored out routines to both
40359 * config/arm/aarch-common.cc: Include newly factored out types.
40360 Move all mbranch-protection code and data structures from
40362 * config/arm/aarch-common.h: New header that declares types shared
40363 between aarch32 and aarch64 backends.
40364 * config/arm/arm-protos.h: Declare types and variables that are
40365 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
40366 aarch_ra_sign_scope and aarch_enable_bti.
40367 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
40368 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
40369 * config/arm/arm.cc: Add missing includes.
40371 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
40373 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
40375 2023-01-23 Richard Biener <rguenther@suse.de>
40377 PR tree-optimization/108449
40378 * cgraphunit.cc (check_global_declaration): Do not turn
40379 undefined statics into externs.
40381 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
40383 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
40384 and HI input modes.
40385 * config/pru/pru.md (clz): Fix generated code for QI and HI
40388 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
40390 * config/v850/v850.cc (v850_select_section): Put const volatile
40391 objects into read-only sections.
40393 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
40395 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
40396 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
40397 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
40399 2023-01-20 Jakub Jelinek <jakub@redhat.com>
40401 PR tree-optimization/108457
40402 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
40403 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
40404 argument instead of a temporary. Formatting fixes.
40406 2023-01-19 Jakub Jelinek <jakub@redhat.com>
40408 PR tree-optimization/108447
40409 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
40410 (relation_tests): Add self-tests for relation_{intersect,union}
40412 * selftest.h (relation_tests): Declare.
40413 * function-tests.cc (test_ranges): Call it.
40415 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
40418 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
40419 invalid third argument to __builtin_ia32_prefetch.
40421 2023-01-19 Jakub Jelinek <jakub@redhat.com>
40423 PR middle-end/108459
40424 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
40425 than fold_unary for NEGATE_EXPR.
40427 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
40430 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
40431 comment. Move assert about alignment a bit later.
40433 2023-01-19 Jakub Jelinek <jakub@redhat.com>
40435 PR tree-optimization/108440
40436 * tree-ssa-forwprop.cc: Include gimple-range.h.
40437 (simplify_rotate): For the forms with T2 wider than T and shift counts of
40438 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
40439 to B. For the forms with T2 wider than T and shift counts of
40440 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
40441 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
40442 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
40443 pass specific ranger instead of get_global_range_query.
40444 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
40447 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
40449 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
40450 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
40452 (aarch64_simd_vec_copy_lane<mode>): Likewise.
40453 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
40455 2023-01-19 Alexandre Oliva <oliva@adacore.com>
40458 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
40459 within debug insns.
40461 2023-01-18 Martin Jambor <mjambor@suse.cz>
40464 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
40465 lcone_of chain also do not need the body.
40467 2023-01-18 Richard Biener <rguenther@suse.de>
40470 2022-12-16 Richard Biener <rguenther@suse.de>
40472 PR middle-end/108086
40473 * tree-inline.cc (remap_ssa_name): Do not unshare the
40474 result from the decl_map.
40476 2023-01-18 Murray Steele <murray.steele@arm.com>
40479 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
40481 (__arm_vst1q_p_s8): Likewise.
40482 (__arm_vld1q_z_u8): Likewise.
40483 (__arm_vld1q_z_s8): Likewise.
40484 (__arm_vst1q_p_u16): Likewise.
40485 (__arm_vst1q_p_s16): Likewise.
40486 (__arm_vld1q_z_u16): Likewise.
40487 (__arm_vld1q_z_s16): Likewise.
40488 (__arm_vst1q_p_u32): Likewise.
40489 (__arm_vst1q_p_s32): Likewise.
40490 (__arm_vld1q_z_u32): Likewise.
40491 (__arm_vld1q_z_s32): Likewise.
40492 (__arm_vld1q_z_f16): Likewise.
40493 (__arm_vst1q_p_f16): Likewise.
40494 (__arm_vld1q_z_f32): Likewise.
40495 (__arm_vst1q_p_f32): Likewise.
40497 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40499 * config/xtensa/xtensa.md (xorsi3_internal):
40500 Rename from the original of "xorsi3".
40501 (xorsi3): New expansion pattern that emits addition rather than
40502 bitwise-XOR when the second source is a constant of -2147483648
40505 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
40506 Andrew Pinski <apinski@marvell.com>
40509 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
40510 vec_vsubcuqP with vec_vsubcuq.
40512 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
40515 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
40516 support for invalid uses of MMA opaque type in function arguments.
40518 2023-01-18 liuhongt <hongtao.liu@intel.com>
40521 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
40522 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
40523 -share or -mno-daz-ftz is specified.
40524 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
40525 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
40527 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
40529 * config/bpf/bpf.cc (bpf_option_override): Disable
40532 2023-01-17 Jakub Jelinek <jakub@redhat.com>
40534 PR tree-optimization/106523
40535 * tree-ssa-forwprop.cc (simplify_rotate): For the
40536 patterns with (-Y) & (B - 1) in one operand's shift
40537 count and Y in another, if T2 has wider precision than T,
40538 punt if Y could have a value in [B, B2 - 1] range.
40540 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
40543 * config/i386/i386.cc (x86_output_mi_thunk): Disable
40544 -mforce-indirect-call for PIC in 32-bit mode.
40546 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
40549 * ipa-modref.cc (modref_access_analysis::analyze): Use
40550 find_always_executed_bbs.
40551 * ipa-sra.cc (process_scan_results): Likewise.
40552 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
40553 (find_always_executed_bbs): New function.
40554 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
40555 (find_always_executed_bbs): Declare.
40557 2023-01-16 Jan Hubicka <jh@suse.cz>
40559 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
40560 by TARGET_USE_SCATTER.
40561 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
40562 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
40563 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
40564 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
40565 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
40566 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
40568 2023-01-16 Richard Biener <rguenther@suse.de>
40571 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
40573 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
40577 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
40578 (__ARM_mve_coerce3): Likewise.
40580 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40582 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
40584 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40586 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
40587 (number_of_iterations_bitcount): Add call to the above.
40588 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
40589 c[lt]z idiom recognition.
40591 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40593 * doc/sourcebuild.texi: Add missing target attributes.
40595 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40597 PR tree-optimization/94793
40598 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
40600 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
40601 (number_of_iterations_cltz_complement): New.
40602 (number_of_iterations_bitcount): Add call to the above.
40604 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
40606 * doc/extend.texi (Common Function Attributes): Fix grammar.
40608 2023-01-16 Jakub Jelinek <jakub@redhat.com>
40611 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
40612 * config/riscv/riscv-vsetvl.cc: Likewise.
40614 2023-01-16 Jakub Jelinek <jakub@redhat.com>
40617 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
40618 disable -Winit-self using pragma GCC diagnostic ignored.
40619 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
40621 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
40622 _mm256_undefined_si256): Likewise.
40623 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
40624 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
40625 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
40626 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
40628 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
40631 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
40632 support for invalid uses in inline asm, factor out the checking and
40633 erroring to lambda function check_and_error_invalid_use.
40635 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
40637 PR tree-optimization/107608
40638 * range-op-float.cc (range_operator_float::fold_range): Avoid
40639 folding into INF when flag_trapping_math.
40640 * value-range.h (frange::known_isinf): Return false for possible NANs.
40642 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40644 * config.gcc (csky-*-*): Support --with-float=softfp.
40646 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40648 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
40649 Rename to xtensa_adjust_reg_alloc_order.
40650 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
40651 Ditto. And also remove code to reorder register numbers for
40652 leaf functions, rename the tables, and adjust the allocation
40653 order for the call0 ABI to use register A0 more.
40654 (xtensa_leaf_regs): Remove.
40655 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
40656 (order_regs_for_local_alloc): Rename as the above.
40657 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
40659 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
40661 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
40662 Change to define_insn_and_split to fold ldr+dup to ld1rq.
40663 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
40665 2023-01-14 Alexandre Oliva <oliva@adacore.com>
40667 * hash-table.h (is_deleted): Precheck !is_empty.
40668 (mark_deleted): Postcheck !is_empty.
40669 (copy constructor): Test is_empty before is_deleted.
40671 2023-01-14 Alexandre Oliva <oliva@adacore.com>
40674 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
40677 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
40679 PR rtl-optimization/108274
40680 * function.cc (thread_prologue_and_epilogue_insns): Also update the
40681 DF information for calls in a few more cases.
40683 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
40685 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
40686 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
40688 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
40689 (MAX_SYNC_LIBFUNC_SIZE): Define.
40690 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
40692 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
40693 libcall when sync libcalls are disabled.
40694 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
40695 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
40696 are disabled on 32-bit target.
40697 * config/pa/pa.opt (matomic-libcalls): New option.
40698 * doc/invoke.texi (HPPA Options): Update.
40700 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
40702 PR rtl-optimization/108117
40703 PR rtl-optimization/108132
40704 * sched-deps.cc (deps_analyze_insn): Do not schedule across
40705 calls before reload.
40707 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40709 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
40710 options for -mlibarch.
40711 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
40712 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
40714 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
40716 * attribs.cc (strict_flex_array_level_of): Move this function to ...
40717 * attribs.h (strict_flex_array_level_of): Remove the declaration.
40718 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
40719 replace the referece to strict_flex_array_level_of with
40720 DECL_NOT_FLEXARRAY.
40721 * tree.cc (component_ref_size): Likewise.
40723 2023-01-13 Richard Biener <rguenther@suse.de>
40726 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
40727 crtfastmath.o for -shared.
40728 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
40730 2023-01-13 Richard Biener <rguenther@suse.de>
40733 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
40734 crtfastmath.o for -shared.
40735 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
40737 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
40740 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
40742 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
40744 (TARGET_DWARF_FRAME_REG_MODE): Define.
40746 2023-01-13 Richard Biener <rguenther@suse.de>
40749 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
40750 update EH info on the fly.
40752 2023-01-13 Richard Biener <rguenther@suse.de>
40754 PR tree-optimization/108387
40755 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
40756 value before inserting expression into the tables.
40758 2023-01-12 Andrew Pinski <apinski@marvell.com>
40759 Roger Sayle <roger@nextmovesoftware.com>
40761 PR tree-optimization/92342
40762 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
40763 Use tcc_comparison and :c for the multiply.
40764 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
40766 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
40767 Richard Sandiford <richard.sandiford@arm.com>
40770 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
40771 Check DECL_PACKED for bitfield.
40772 (aarch64_layout_arg): Warn when parameter passing ABI changes.
40773 (aarch64_function_arg_boundary): Do not warn here.
40774 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
40777 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
40778 Richard Sandiford <richard.sandiford@arm.com>
40780 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
40782 (aarch64_layout_arg): Factorize warning conditions.
40783 (aarch64_function_arg_boundary): Fix typo.
40784 * function.cc (currently_expanding_function_start): New variable.
40785 (expand_function_start): Handle
40786 currently_expanding_function_start.
40787 * function.h (currently_expanding_function_start): Declare.
40789 2023-01-12 Richard Biener <rguenther@suse.de>
40791 PR tree-optimization/99412
40792 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
40793 (swap_ops_for_binary_stmt): Remove reduction handling.
40794 (rewrite_expr_tree_parallel): Adjust.
40795 (reassociate_bb): Likewise.
40796 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
40798 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40800 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
40801 Rearrange the emitting codes.
40803 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40805 * config/xtensa/xtensa.md (*btrue):
40806 Correct value of the attribute "length" that depends on
40807 TARGET_DENSITY and operands, and add '?' character to the register
40808 constraint of the compared operand.
40810 2023-01-12 Alexandre Oliva <oliva@adacore.com>
40812 * hash-table.h (expand): Check elements and deleted counts.
40813 (verify): Likewise.
40815 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
40817 PR tree-optimization/71343
40818 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
40819 the value number of the expression X << C the same as the value
40820 number for the multiplication X * (1<<C).
40822 2023-01-11 David Faust <david.faust@oracle.com>
40825 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
40826 floating point modes.
40828 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
40830 PR tree-optimization/108199
40831 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
40832 for bit-field references.
40834 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
40836 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
40837 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
40838 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
40839 OPTION_MASK_P10_FUSION.
40841 2023-01-11 Richard Biener <rguenther@suse.de>
40843 PR tree-optimization/107767
40844 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
40845 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
40846 * tree-switch-conversion.cc (switch_conversion::collect):
40847 Count unique non-default targets accounting for later
40848 merging opportunities.
40850 2023-01-11 Martin Liska <mliska@suse.cz>
40852 PR middle-end/107976
40853 * params.opt: Limit JT params.
40854 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
40856 2023-01-11 Richard Biener <rguenther@suse.de>
40858 PR tree-optimization/108352
40859 * tree-ssa-threadbackward.cc
40860 (back_threader_profitability::profitable_path_p): Adjust
40861 heuristic that allows non-multi-way branch threads creating
40863 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
40864 (--param fsm-scale-path-stmts): Adjust.
40865 * params.opt (--param=fsm-scale-path-blocks=): Remove.
40866 (-param=fsm-scale-path-stmts=): Adjust description.
40868 2023-01-11 Richard Biener <rguenther@suse.de>
40870 PR tree-optimization/108353
40871 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
40873 (add_ssa_edge): Simplify.
40874 (add_control_edge): Likewise.
40875 (ssa_prop_init): Likewise.
40876 (ssa_prop_fini): Likewise.
40877 (ssa_propagation_engine::ssa_propagate): Likewise.
40879 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
40881 * config/s390/s390.md (*not<mode>): New pattern.
40883 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40885 * config/xtensa/xtensa.cc (xtensa_insn_cost):
40886 Let insn cost for size be obtained by applying COSTS_N_INSNS()
40887 to instruction length and then dividing by 3.
40889 2023-01-10 Richard Biener <rguenther@suse.de>
40891 PR tree-optimization/106293
40892 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
40893 process degenerate PHI defs.
40895 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
40897 PR rtl-optimization/106421
40898 * cprop.cc (bypass_block): Check that DEST is local to this
40899 function (non-NULL) before calling find_edge.
40901 2023-01-10 Martin Jambor <mjambor@suse.cz>
40904 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
40905 sort_replacements, lookup_first_base_replacement and
40906 m_sorted_replacements_p.
40907 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
40908 (ipa_param_body_adjustments::register_replacement): Set
40909 m_sorted_replacements_p to false.
40910 (compare_param_body_replacement): New function.
40911 (ipa_param_body_adjustments::sort_replacements): Likewise.
40912 (ipa_param_body_adjustments::common_initialization): Call
40914 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
40915 m_sorted_replacements_p.
40916 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
40918 (ipa_param_body_adjustments::lookup_first_base_replacement): New
40920 (ipa_param_body_adjustments::modify_call_stmt): Use
40921 lookup_first_base_replacement.
40922 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
40923 adjustments->sort_replacements.
40925 2023-01-10 Richard Biener <rguenther@suse.de>
40927 PR tree-optimization/108314
40928 * tree-vect-stmts.cc (vectorizable_condition): Do not
40929 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
40931 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40933 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
40935 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40937 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
40939 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40941 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
40942 defines for soft float abi.
40944 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40946 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
40947 (smart_bclri): Likewise.
40948 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
40949 (fast_bclri): Likewise.
40950 (fast_cmpnesi_i): Likewise.
40951 (*fast_cmpltsi_i): Likewise.
40952 (*fast_cmpgeusi_i): Likewise.
40954 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40956 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
40957 flag_fp_int_builtin_inexact || !flag_trapping_math.
40958 (<frm_pattern><mode>2): Likewise.
40960 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
40962 * config/s390/s390.cc (s390_register_info): Check call_used_regs
40963 instead of hard-coding the register numbers for call saved
40965 (s390_optimize_register_info): Likewise.
40967 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
40969 * doc/gm2.texi (Overview): Fix @node markers.
40970 (Using): Likewise. Remove subsections that were moved to Overview
40971 from the menu and move others around.
40973 2023-01-09 Richard Biener <rguenther@suse.de>
40975 PR middle-end/108209
40976 * genmatch.cc (commutative_op): Fix return value for
40977 user-id with non-commutative first replacement.
40979 2023-01-09 Jakub Jelinek <jakub@redhat.com>
40982 * calls.cc (expand_call): For calls with
40983 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
40986 2023-01-09 Richard Biener <rguenther@suse.de>
40988 PR middle-end/69482
40989 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
40990 qualified accesses also force objects to memory.
40992 2023-01-09 Martin Liska <mliska@suse.cz>
40995 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
40996 NULL (deleleted value) to a hash_set.
40998 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41000 * config/xtensa/xtensa.md (*splice_bits):
41001 New insn_and_split pattern.
41003 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
41005 * config/xtensa/xtensa.cc
41006 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
41007 New helper functions.
41008 (xtensa_set_return_address, xtensa_output_mi_thunk):
41009 Change to use the helper function.
41010 (xtensa_emit_adjust_stack_ptr): Ditto.
41011 And also change to try reusing the content of scratch register
41012 A9 if the register is not modified in the function body.
41014 2023-01-07 LIU Hao <lh_mouse@126.com>
41016 PR middle-end/108300
41017 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
41018 before <windows.h>.
41019 * diagnostic-color.cc: Likewise.
41020 * plugin.cc: Likewise.
41021 * prefix.cc: Likewise.
41023 2023-01-06 Joseph Myers <joseph@codesourcery.com>
41025 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
41026 for handling real integer types.
41028 2023-01-06 Tamar Christina <tamar.christina@arm.com>
41031 2022-12-12 Tamar Christina <tamar.christina@arm.com>
41033 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
41034 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
41035 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
41036 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
41037 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
41038 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
41039 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
41040 (aarch64_simd_dupv2hf): New.
41041 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
41043 * config/aarch64/iterators.md (VHSDF_P): New.
41044 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
41045 Vel, q, vp): Add V2HF.
41046 * config/arm/types.md (neon_fp_reduc_add_h): New.
41048 2023-01-06 Martin Liska <mliska@suse.cz>
41050 PR middle-end/107966
41051 * doc/options.texi: Fix Var documentation in internal manual.
41053 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
41056 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
41058 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
41059 RTL expansion to allow condition (mask) to be shared/reused,
41060 by avoiding overwriting pseudos and adding REG_EQUAL notes.
41062 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
41064 * common.opt: Add -static-libgm2.
41065 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
41066 * doc/gm2.texi: Document static-libgm2.
41067 * gcc.cc (driver_handle_option): Allow static-libgm2.
41069 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
41071 * common/config/i386/i386-common.cc (processor_alias_table):
41072 Use CPU_ZNVER4 for znver4.
41073 * config/i386/i386.md: Add znver4.md.
41074 * config/i386/znver4.md: New.
41076 2023-01-04 Jakub Jelinek <jakub@redhat.com>
41078 PR tree-optimization/108253
41079 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
41082 2023-01-04 Jakub Jelinek <jakub@redhat.com>
41084 PR middle-end/108237
41085 * generic-match-head.cc: Include tree-pass.h.
41086 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
41087 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
41088 resp. PROP_gimple_lvec property set.
41090 2023-01-04 Jakub Jelinek <jakub@redhat.com>
41092 PR sanitizer/108256
41093 * convert.cc (do_narrow): Punt for MULT_EXPR if original
41094 type doesn't wrap around and -fsanitize=signed-integer-overflow
41096 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
41098 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
41100 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
41101 * common/config/i386/i386-common.cc: Add Emeraldrapids.
41103 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
41105 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
41108 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
41110 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
41111 default constructor to initialize it.
41112 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
41113 for last and iterate to handle recursive calls. Delete leftover
41114 candidates at the end.
41115 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
41117 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
41118 gc_candidate bit when a clone is used.
41120 2023-01-03 Florian Weimer <fweimer@redhat.com>
41123 2023-01-02 Florian Weimer <fweimer@redhat.com>
41125 * dwarf2cfi.cc (init_return_column_size): Remove.
41126 (init_one_dwarf_reg_size): Adjust.
41127 (generate_dwarf_reg_sizes): New function. Extracted
41128 from expand_builtin_init_dwarf_reg_sizes.
41129 (expand_builtin_init_dwarf_reg_sizes): Call
41130 generate_dwarf_reg_sizes.
41131 * target.def (init_dwarf_reg_sizes_extra): Adjust
41133 * config/msp430/msp430.cc
41134 (msp430_init_dwarf_reg_sizes_extra): Adjust.
41135 * config/rs6000/rs6000.cc
41136 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
41137 * doc/tm.texi: Update.
41139 2023-01-03 Florian Weimer <fweimer@redhat.com>
41142 2023-01-02 Florian Weimer <fweimer@redhat.com>
41144 * debug.h (dwarf_reg_sizes_constant): Declare.
41145 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
41147 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
41149 PR tree-optimization/105043
41150 * doc/extend.texi (Object Size Checking): Split out into two
41151 subsections and mention _FORTIFY_SOURCE.
41153 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
41155 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
41156 RTL expansion to allow condition (mask) to be shared/reused,
41157 by avoiding overwriting pseudos and adding REG_EQUAL notes.
41159 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
41162 * config/i386/i386-features.cc
41163 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
41164 the gain/cost of converting a MEM operand.
41166 2023-01-03 Jakub Jelinek <jakub@redhat.com>
41168 PR middle-end/108264
41169 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
41170 from source which doesn't have scalar integral mode first convert
41173 2023-01-03 Jakub Jelinek <jakub@redhat.com>
41175 PR rtl-optimization/108263
41176 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
41179 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
41182 * config/i386/lujiazui.md (lujiazui_div): New automaton.
41183 (lua_div): New unit.
41184 (lua_idiv_qi): Correct unit in the reservation.
41185 (lua_idiv_qi_load): Ditto.
41186 (lua_idiv_hi): Ditto.
41187 (lua_idiv_hi_load): Ditto.
41188 (lua_idiv_si): Ditto.
41189 (lua_idiv_si_load): Ditto.
41190 (lua_idiv_di): Ditto.
41191 (lua_idiv_di_load): Ditto.
41192 (lua_fdiv_SF): Ditto.
41193 (lua_fdiv_SF_load): Ditto.
41194 (lua_fdiv_DF): Ditto.
41195 (lua_fdiv_DF_load): Ditto.
41196 (lua_fdiv_XF): Ditto.
41197 (lua_fdiv_XF_load): Ditto.
41198 (lua_ssediv_SF): Ditto.
41199 (lua_ssediv_load_SF): Ditto.
41200 (lua_ssediv_V4SF): Ditto.
41201 (lua_ssediv_load_V4SF): Ditto.
41202 (lua_ssediv_V8SF): Ditto.
41203 (lua_ssediv_load_V8SF): Ditto.
41204 (lua_ssediv_SD): Ditto.
41205 (lua_ssediv_load_SD): Ditto.
41206 (lua_ssediv_V2DF): Ditto.
41207 (lua_ssediv_load_V2DF): Ditto.
41208 (lua_ssediv_V4DF): Ditto.
41209 (lua_ssediv_load_V4DF): Ditto.
41211 2023-01-02 Florian Weimer <fweimer@redhat.com>
41213 * debug.h (dwarf_reg_sizes_constant): Declare.
41214 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
41216 2023-01-02 Florian Weimer <fweimer@redhat.com>
41218 * dwarf2cfi.cc (init_return_column_size): Remove.
41219 (init_one_dwarf_reg_size): Adjust.
41220 (generate_dwarf_reg_sizes): New function. Extracted
41221 from expand_builtin_init_dwarf_reg_sizes.
41222 (expand_builtin_init_dwarf_reg_sizes): Call
41223 generate_dwarf_reg_sizes.
41224 * target.def (init_dwarf_reg_sizes_extra): Adjust
41226 * config/msp430/msp430.cc
41227 (msp430_init_dwarf_reg_sizes_extra): Adjust.
41228 * config/rs6000/rs6000.cc
41229 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
41230 * doc/tm.texi: Update.
41232 2023-01-02 Jakub Jelinek <jakub@redhat.com>
41234 * gcc.cc (process_command): Update copyright notice dates.
41235 * gcov-dump.cc (print_version): Ditto.
41236 * gcov.cc (print_version): Ditto.
41237 * gcov-tool.cc (print_version): Ditto.
41238 * gengtype.cc (create_file): Ditto.
41239 * doc/cpp.texi: Bump @copying's copyright year.
41240 * doc/cppinternals.texi: Ditto.
41241 * doc/gcc.texi: Ditto.
41242 * doc/gccint.texi: Ditto.
41243 * doc/gcov.texi: Ditto.
41244 * doc/install.texi: Ditto.
41245 * doc/invoke.texi: Ditto.
41247 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
41248 Uroš Bizjak <ubizjak@gmail.com>
41250 * config/i386/i386.md (extendditi2): New define_insn.
41251 (define_split): Use DWIH mode iterator to treat new extendditi2
41252 identically to existing extendsidi2_1.
41253 (define_peephole2): Likewise.
41254 (define_peephole2): Likewise.
41255 (define_Split): Likewise.
41258 Copyright (C) 2023 Free Software Foundation, Inc.
41260 Copying and distribution of this file, with or without modification,
41261 are permitted in any medium without royalty provided the copyright
41262 notice and this notice are preserved.