1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
38 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
39 #include "addresses.h"
41 /* Forward declarations */
42 static void set_of_1 (rtx
, const_rtx
, void *);
43 static bool covers_regno_p (const_rtx
, unsigned int);
44 static bool covers_regno_no_parallel_p (const_rtx
, unsigned int);
45 static int rtx_referenced_p_1 (rtx
*, void *);
46 static int computed_jump_p_1 (const_rtx
);
47 static void parms_set (rtx
, const_rtx
, void *);
49 static unsigned HOST_WIDE_INT
cached_nonzero_bits (const_rtx
, enum machine_mode
,
50 const_rtx
, enum machine_mode
,
51 unsigned HOST_WIDE_INT
);
52 static unsigned HOST_WIDE_INT
nonzero_bits1 (const_rtx
, enum machine_mode
,
53 const_rtx
, enum machine_mode
,
54 unsigned HOST_WIDE_INT
);
55 static unsigned int cached_num_sign_bit_copies (const_rtx
, enum machine_mode
, const_rtx
,
58 static unsigned int num_sign_bit_copies1 (const_rtx
, enum machine_mode
, const_rtx
,
59 enum machine_mode
, unsigned int);
61 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
62 -1 if a code has no such operand. */
63 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
65 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
66 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
67 SIGN_EXTEND then while narrowing we also have to enforce the
68 representation and sign-extend the value to mode DESTINATION_REP.
70 If the value is already sign-extended to DESTINATION_REP mode we
71 can just switch to DESTINATION mode on it. For each pair of
72 integral modes SOURCE and DESTINATION, when truncating from SOURCE
73 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
74 contains the number of high-order bits in SOURCE that have to be
75 copies of the sign-bit so that we can do this mode-switch to
79 num_sign_bit_copies_in_rep
[MAX_MODE_INT
+ 1][MAX_MODE_INT
+ 1];
81 /* Return 1 if the value of X is unstable
82 (would be different at a different point in the program).
83 The frame pointer, arg pointer, etc. are considered stable
84 (within one function) and so is anything marked `unchanging'. */
87 rtx_unstable_p (const_rtx x
)
89 const RTX_CODE code
= GET_CODE (x
);
96 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
105 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
106 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
107 /* The arg pointer varies if it is not a fixed register. */
108 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
110 /* ??? When call-clobbered, the value is stable modulo the restore
111 that must happen after a call. This currently screws up local-alloc
112 into believing that the restore is not needed. */
113 if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
&& x
== pic_offset_table_rtx
)
118 if (MEM_VOLATILE_P (x
))
127 fmt
= GET_RTX_FORMAT (code
);
128 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
131 if (rtx_unstable_p (XEXP (x
, i
)))
134 else if (fmt
[i
] == 'E')
137 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
138 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
145 /* Return 1 if X has a value that can vary even between two
146 executions of the program. 0 means X can be compared reliably
147 against certain constants or near-constants.
148 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
149 zero, we are slightly more conservative.
150 The frame pointer and the arg pointer are considered constant. */
153 rtx_varies_p (const_rtx x
, bool for_alias
)
166 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
175 /* Note that we have to test for the actual rtx used for the frame
176 and arg pointers and not just the register number in case we have
177 eliminated the frame and/or arg pointer and are using it
179 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
180 /* The arg pointer varies if it is not a fixed register. */
181 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
183 if (x
== pic_offset_table_rtx
184 /* ??? When call-clobbered, the value is stable modulo the restore
185 that must happen after a call. This currently screws up
186 local-alloc into believing that the restore is not needed, so we
187 must return 0 only if we are called from alias analysis. */
188 && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|| for_alias
))
193 /* The operand 0 of a LO_SUM is considered constant
194 (in fact it is related specifically to operand 1)
195 during alias analysis. */
196 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
197 || rtx_varies_p (XEXP (x
, 1), for_alias
);
200 if (MEM_VOLATILE_P (x
))
209 fmt
= GET_RTX_FORMAT (code
);
210 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
213 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
216 else if (fmt
[i
] == 'E')
219 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
220 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
227 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
228 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
229 whether nonzero is returned for unaligned memory accesses on strict
230 alignment machines. */
233 rtx_addr_can_trap_p_1 (const_rtx x
, HOST_WIDE_INT offset
, HOST_WIDE_INT size
,
234 enum machine_mode mode
, bool unaligned_mems
)
236 enum rtx_code code
= GET_CODE (x
);
240 && GET_MODE_SIZE (mode
) != 0)
242 HOST_WIDE_INT actual_offset
= offset
;
243 #ifdef SPARC_STACK_BOUNDARY_HACK
244 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
245 the real alignment of %sp. However, when it does this, the
246 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
247 if (SPARC_STACK_BOUNDARY_HACK
248 && (x
== stack_pointer_rtx
|| x
== hard_frame_pointer_rtx
))
249 actual_offset
-= STACK_POINTER_OFFSET
;
252 if (actual_offset
% GET_MODE_SIZE (mode
) != 0)
259 if (SYMBOL_REF_WEAK (x
))
261 if (!CONSTANT_POOL_ADDRESS_P (x
))
264 HOST_WIDE_INT decl_size
;
269 size
= GET_MODE_SIZE (mode
);
273 /* If the size of the access or of the symbol is unknown,
275 decl
= SYMBOL_REF_DECL (x
);
277 /* Else check that the access is in bounds. TODO: restructure
278 expr_size/tree_expr_size/int_expr_size and just use the latter. */
281 else if (DECL_P (decl
) && DECL_SIZE_UNIT (decl
))
282 decl_size
= (host_integerp (DECL_SIZE_UNIT (decl
), 0)
283 ? tree_low_cst (DECL_SIZE_UNIT (decl
), 0)
285 else if (TREE_CODE (decl
) == STRING_CST
)
286 decl_size
= TREE_STRING_LENGTH (decl
);
287 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl
)))
288 decl_size
= int_size_in_bytes (TREE_TYPE (decl
));
292 return (decl_size
<= 0 ? offset
!= 0 : offset
+ size
> decl_size
);
301 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
302 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
303 || x
== stack_pointer_rtx
304 /* The arg pointer varies if it is not a fixed register. */
305 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
307 /* All of the virtual frame registers are stack references. */
308 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
309 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
314 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
315 mode
, unaligned_mems
);
318 /* An address is assumed not to trap if:
319 - it is the pic register plus a constant. */
320 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
323 /* - or it is an address that can't trap plus a constant integer,
324 with the proper remainder modulo the mode size if we are
325 considering unaligned memory references. */
326 if (CONST_INT_P (XEXP (x
, 1))
327 && !rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
+ INTVAL (XEXP (x
, 1)),
328 size
, mode
, unaligned_mems
))
335 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), offset
, size
,
336 mode
, unaligned_mems
);
343 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
344 mode
, unaligned_mems
);
350 /* If it isn't one of the case above, it can cause a trap. */
354 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
357 rtx_addr_can_trap_p (const_rtx x
)
359 return rtx_addr_can_trap_p_1 (x
, 0, 0, VOIDmode
, false);
362 /* Return true if X is an address that is known to not be zero. */
365 nonzero_address_p (const_rtx x
)
367 const enum rtx_code code
= GET_CODE (x
);
372 return !SYMBOL_REF_WEAK (x
);
378 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
379 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
380 || x
== stack_pointer_rtx
381 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
383 /* All of the virtual frame registers are stack references. */
384 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
385 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
390 return nonzero_address_p (XEXP (x
, 0));
393 /* Handle PIC references. */
394 if (XEXP (x
, 0) == pic_offset_table_rtx
395 && CONSTANT_P (XEXP (x
, 1)))
400 /* Similar to the above; allow positive offsets. Further, since
401 auto-inc is only allowed in memories, the register must be a
403 if (CONST_INT_P (XEXP (x
, 1))
404 && INTVAL (XEXP (x
, 1)) > 0)
406 return nonzero_address_p (XEXP (x
, 0));
409 /* Similarly. Further, the offset is always positive. */
416 return nonzero_address_p (XEXP (x
, 0));
419 return nonzero_address_p (XEXP (x
, 1));
425 /* If it isn't one of the case above, might be zero. */
429 /* Return 1 if X refers to a memory location whose address
430 cannot be compared reliably with constant addresses,
431 or if X refers to a BLKmode memory object.
432 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
433 zero, we are slightly more conservative. */
436 rtx_addr_varies_p (const_rtx x
, bool for_alias
)
447 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
449 fmt
= GET_RTX_FORMAT (code
);
450 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
453 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
456 else if (fmt
[i
] == 'E')
459 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
460 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
466 /* Return the CALL in X if there is one. */
469 get_call_rtx_from (rtx x
)
473 if (GET_CODE (x
) == PARALLEL
)
474 x
= XVECEXP (x
, 0, 0);
475 if (GET_CODE (x
) == SET
)
477 if (GET_CODE (x
) == CALL
&& MEM_P (XEXP (x
, 0)))
482 /* Return the value of the integer term in X, if one is apparent;
484 Only obvious integer terms are detected.
485 This is used in cse.c with the `related_value' field. */
488 get_integer_term (const_rtx x
)
490 if (GET_CODE (x
) == CONST
)
493 if (GET_CODE (x
) == MINUS
494 && CONST_INT_P (XEXP (x
, 1)))
495 return - INTVAL (XEXP (x
, 1));
496 if (GET_CODE (x
) == PLUS
497 && CONST_INT_P (XEXP (x
, 1)))
498 return INTVAL (XEXP (x
, 1));
502 /* If X is a constant, return the value sans apparent integer term;
504 Only obvious integer terms are detected. */
507 get_related_value (const_rtx x
)
509 if (GET_CODE (x
) != CONST
)
512 if (GET_CODE (x
) == PLUS
513 && CONST_INT_P (XEXP (x
, 1)))
515 else if (GET_CODE (x
) == MINUS
516 && CONST_INT_P (XEXP (x
, 1)))
521 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
522 to somewhere in the same object or object_block as SYMBOL. */
525 offset_within_block_p (const_rtx symbol
, HOST_WIDE_INT offset
)
529 if (GET_CODE (symbol
) != SYMBOL_REF
)
537 if (CONSTANT_POOL_ADDRESS_P (symbol
)
538 && offset
< (int) GET_MODE_SIZE (get_pool_mode (symbol
)))
541 decl
= SYMBOL_REF_DECL (symbol
);
542 if (decl
&& offset
< int_size_in_bytes (TREE_TYPE (decl
)))
546 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol
)
547 && SYMBOL_REF_BLOCK (symbol
)
548 && SYMBOL_REF_BLOCK_OFFSET (symbol
) >= 0
549 && ((unsigned HOST_WIDE_INT
) offset
+ SYMBOL_REF_BLOCK_OFFSET (symbol
)
550 < (unsigned HOST_WIDE_INT
) SYMBOL_REF_BLOCK (symbol
)->size
))
556 /* Split X into a base and a constant offset, storing them in *BASE_OUT
557 and *OFFSET_OUT respectively. */
560 split_const (rtx x
, rtx
*base_out
, rtx
*offset_out
)
562 if (GET_CODE (x
) == CONST
)
565 if (GET_CODE (x
) == PLUS
&& CONST_INT_P (XEXP (x
, 1)))
567 *base_out
= XEXP (x
, 0);
568 *offset_out
= XEXP (x
, 1);
573 *offset_out
= const0_rtx
;
576 /* Return the number of places FIND appears within X. If COUNT_DEST is
577 zero, we do not count occurrences inside the destination of a SET. */
580 count_occurrences (const_rtx x
, const_rtx find
, int count_dest
)
584 const char *format_ptr
;
603 count
= count_occurrences (XEXP (x
, 0), find
, count_dest
);
605 count
+= count_occurrences (XEXP (x
, 1), find
, count_dest
);
609 if (MEM_P (find
) && rtx_equal_p (x
, find
))
614 if (SET_DEST (x
) == find
&& ! count_dest
)
615 return count_occurrences (SET_SRC (x
), find
, count_dest
);
622 format_ptr
= GET_RTX_FORMAT (code
);
625 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
627 switch (*format_ptr
++)
630 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
634 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
635 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
643 /* Return TRUE if OP is a register or subreg of a register that
644 holds an unsigned quantity. Otherwise, return FALSE. */
647 unsigned_reg_p (rtx op
)
651 && TYPE_UNSIGNED (TREE_TYPE (REG_EXPR (op
))))
654 if (GET_CODE (op
) == SUBREG
655 && SUBREG_PROMOTED_UNSIGNED_P (op
))
662 /* Nonzero if register REG appears somewhere within IN.
663 Also works if REG is not a register; in this case it checks
664 for a subexpression of IN that is Lisp "equal" to REG. */
667 reg_mentioned_p (const_rtx reg
, const_rtx in
)
679 if (GET_CODE (in
) == LABEL_REF
)
680 return reg
== XEXP (in
, 0);
682 code
= GET_CODE (in
);
686 /* Compare registers by number. */
688 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
690 /* These codes have no constituent expressions
698 /* These are kept unique for a given value. */
705 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
708 fmt
= GET_RTX_FORMAT (code
);
710 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
715 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
716 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
719 else if (fmt
[i
] == 'e'
720 && reg_mentioned_p (reg
, XEXP (in
, i
)))
726 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
727 no CODE_LABEL insn. */
730 no_labels_between_p (const_rtx beg
, const_rtx end
)
735 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
741 /* Nonzero if register REG is used in an insn between
742 FROM_INSN and TO_INSN (exclusive of those two). */
745 reg_used_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
749 if (from_insn
== to_insn
)
752 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
753 if (NONDEBUG_INSN_P (insn
)
754 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
755 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
760 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
761 is entirely replaced by a new value and the only use is as a SET_DEST,
762 we do not consider it a reference. */
765 reg_referenced_p (const_rtx x
, const_rtx body
)
769 switch (GET_CODE (body
))
772 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
775 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
776 of a REG that occupies all of the REG, the insn references X if
777 it is mentioned in the destination. */
778 if (GET_CODE (SET_DEST (body
)) != CC0
779 && GET_CODE (SET_DEST (body
)) != PC
780 && !REG_P (SET_DEST (body
))
781 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
782 && REG_P (SUBREG_REG (SET_DEST (body
)))
783 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
784 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
785 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
786 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
787 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
792 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
793 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
800 return reg_overlap_mentioned_p (x
, body
);
803 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
806 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
809 case UNSPEC_VOLATILE
:
810 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
811 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
816 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
817 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
822 if (MEM_P (XEXP (body
, 0)))
823 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
828 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
830 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
837 /* Nonzero if register REG is set or clobbered in an insn between
838 FROM_INSN and TO_INSN (exclusive of those two). */
841 reg_set_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
845 if (from_insn
== to_insn
)
848 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
849 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
854 /* Internals of reg_set_between_p. */
856 reg_set_p (const_rtx reg
, const_rtx insn
)
858 /* We can be passed an insn or part of one. If we are passed an insn,
859 check if a side-effect of the insn clobbers REG. */
861 && (FIND_REG_INC_NOTE (insn
, reg
)
864 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
865 && overlaps_hard_reg_set_p (regs_invalidated_by_call
,
866 GET_MODE (reg
), REGNO (reg
)))
868 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
871 return set_of (reg
, insn
) != NULL_RTX
;
874 /* Similar to reg_set_between_p, but check all registers in X. Return 0
875 only if none of them are modified between START and END. Return 1 if
876 X contains a MEM; this routine does use memory aliasing. */
879 modified_between_p (const_rtx x
, const_rtx start
, const_rtx end
)
881 const enum rtx_code code
= GET_CODE (x
);
902 if (modified_between_p (XEXP (x
, 0), start
, end
))
904 if (MEM_READONLY_P (x
))
906 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
907 if (memory_modified_in_insn_p (x
, insn
))
913 return reg_set_between_p (x
, start
, end
);
919 fmt
= GET_RTX_FORMAT (code
);
920 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
922 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
925 else if (fmt
[i
] == 'E')
926 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
927 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
934 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
935 of them are modified in INSN. Return 1 if X contains a MEM; this routine
936 does use memory aliasing. */
939 modified_in_p (const_rtx x
, const_rtx insn
)
941 const enum rtx_code code
= GET_CODE (x
);
958 if (modified_in_p (XEXP (x
, 0), insn
))
960 if (MEM_READONLY_P (x
))
962 if (memory_modified_in_insn_p (x
, insn
))
968 return reg_set_p (x
, insn
);
974 fmt
= GET_RTX_FORMAT (code
);
975 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
977 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
980 else if (fmt
[i
] == 'E')
981 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
982 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
989 /* Helper function for set_of. */
997 set_of_1 (rtx x
, const_rtx pat
, void *data1
)
999 struct set_of_data
*const data
= (struct set_of_data
*) (data1
);
1000 if (rtx_equal_p (x
, data
->pat
)
1001 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
1005 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
1006 (either directly or via STRICT_LOW_PART and similar modifiers). */
1008 set_of (const_rtx pat
, const_rtx insn
)
1010 struct set_of_data data
;
1011 data
.found
= NULL_RTX
;
1013 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
1017 /* This function, called through note_stores, collects sets and
1018 clobbers of hard registers in a HARD_REG_SET, which is pointed to
1021 record_hard_reg_sets (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
1023 HARD_REG_SET
*pset
= (HARD_REG_SET
*)data
;
1024 if (REG_P (x
) && HARD_REGISTER_P (x
))
1025 add_to_hard_reg_set (pset
, GET_MODE (x
), REGNO (x
));
1028 /* Examine INSN, and compute the set of hard registers written by it.
1029 Store it in *PSET. Should only be called after reload. */
1031 find_all_hard_reg_sets (const_rtx insn
, HARD_REG_SET
*pset
)
1035 CLEAR_HARD_REG_SET (*pset
);
1036 note_stores (PATTERN (insn
), record_hard_reg_sets
, pset
);
1038 IOR_HARD_REG_SET (*pset
, call_used_reg_set
);
1039 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1040 if (REG_NOTE_KIND (link
) == REG_INC
)
1041 record_hard_reg_sets (XEXP (link
, 0), NULL
, pset
);
1044 /* A for_each_rtx subroutine of record_hard_reg_uses. */
1046 record_hard_reg_uses_1 (rtx
*px
, void *data
)
1049 HARD_REG_SET
*pused
= (HARD_REG_SET
*)data
;
1051 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1053 int nregs
= hard_regno_nregs
[REGNO (x
)][GET_MODE (x
)];
1055 SET_HARD_REG_BIT (*pused
, REGNO (x
) + nregs
);
1060 /* Like record_hard_reg_sets, but called through note_uses. */
1062 record_hard_reg_uses (rtx
*px
, void *data
)
1064 for_each_rtx (px
, record_hard_reg_uses_1
, data
);
1067 /* Given an INSN, return a SET expression if this insn has only a single SET.
1068 It may also have CLOBBERs, USEs, or SET whose output
1069 will not be used, which we ignore. */
1072 single_set_2 (const_rtx insn
, const_rtx pat
)
1075 int set_verified
= 1;
1078 if (GET_CODE (pat
) == PARALLEL
)
1080 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1082 rtx sub
= XVECEXP (pat
, 0, i
);
1083 switch (GET_CODE (sub
))
1090 /* We can consider insns having multiple sets, where all
1091 but one are dead as single set insns. In common case
1092 only single set is present in the pattern so we want
1093 to avoid checking for REG_UNUSED notes unless necessary.
1095 When we reach set first time, we just expect this is
1096 the single set we are looking for and only when more
1097 sets are found in the insn, we check them. */
1100 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
1101 && !side_effects_p (set
))
1107 set
= sub
, set_verified
= 0;
1108 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
1109 || side_effects_p (sub
))
1121 /* Given an INSN, return nonzero if it has more than one SET, else return
1125 multiple_sets (const_rtx insn
)
1130 /* INSN must be an insn. */
1131 if (! INSN_P (insn
))
1134 /* Only a PARALLEL can have multiple SETs. */
1135 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1137 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1138 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1140 /* If we have already found a SET, then return now. */
1148 /* Either zero or one SET. */
1152 /* Return nonzero if the destination of SET equals the source
1153 and there are no side effects. */
1156 set_noop_p (const_rtx set
)
1158 rtx src
= SET_SRC (set
);
1159 rtx dst
= SET_DEST (set
);
1161 if (dst
== pc_rtx
&& src
== pc_rtx
)
1164 if (MEM_P (dst
) && MEM_P (src
))
1165 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1167 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1168 return rtx_equal_p (XEXP (dst
, 0), src
)
1169 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1170 && !side_effects_p (src
);
1172 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1173 dst
= XEXP (dst
, 0);
1175 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1177 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1179 src
= SUBREG_REG (src
);
1180 dst
= SUBREG_REG (dst
);
1183 return (REG_P (src
) && REG_P (dst
)
1184 && REGNO (src
) == REGNO (dst
));
1187 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1191 noop_move_p (const_rtx insn
)
1193 rtx pat
= PATTERN (insn
);
1195 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1198 /* Insns carrying these notes are useful later on. */
1199 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1202 /* Check the code to be executed for COND_EXEC. */
1203 if (GET_CODE (pat
) == COND_EXEC
)
1204 pat
= COND_EXEC_CODE (pat
);
1206 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1209 if (GET_CODE (pat
) == PARALLEL
)
1212 /* If nothing but SETs of registers to themselves,
1213 this insn can also be deleted. */
1214 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1216 rtx tem
= XVECEXP (pat
, 0, i
);
1218 if (GET_CODE (tem
) == USE
1219 || GET_CODE (tem
) == CLOBBER
)
1222 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1232 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1233 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1234 If the object was modified, if we hit a partial assignment to X, or hit a
1235 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1236 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1240 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1244 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1248 rtx set
= single_set (p
);
1249 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1251 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1253 rtx src
= SET_SRC (set
);
1255 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1256 src
= XEXP (note
, 0);
1258 if ((valid_to
== NULL_RTX
1259 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1260 /* Reject hard registers because we don't usually want
1261 to use them; we'd rather use a pseudo. */
1263 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1270 /* If set in non-simple way, we don't have a value. */
1271 if (reg_set_p (x
, p
))
1278 /* Return nonzero if register in range [REGNO, ENDREGNO)
1279 appears either explicitly or implicitly in X
1280 other than being stored into.
1282 References contained within the substructure at LOC do not count.
1283 LOC may be zero, meaning don't ignore anything. */
1286 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, const_rtx x
,
1290 unsigned int x_regno
;
1295 /* The contents of a REG_NONNEG note is always zero, so we must come here
1296 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1300 code
= GET_CODE (x
);
1305 x_regno
= REGNO (x
);
1307 /* If we modifying the stack, frame, or argument pointer, it will
1308 clobber a virtual register. In fact, we could be more precise,
1309 but it isn't worth it. */
1310 if ((x_regno
== STACK_POINTER_REGNUM
1311 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1312 || x_regno
== ARG_POINTER_REGNUM
1314 || x_regno
== FRAME_POINTER_REGNUM
)
1315 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1318 return endregno
> x_regno
&& regno
< END_REGNO (x
);
1321 /* If this is a SUBREG of a hard reg, we can see exactly which
1322 registers are being modified. Otherwise, handle normally. */
1323 if (REG_P (SUBREG_REG (x
))
1324 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1326 unsigned int inner_regno
= subreg_regno (x
);
1327 unsigned int inner_endregno
1328 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1329 ? subreg_nregs (x
) : 1);
1331 return endregno
> inner_regno
&& regno
< inner_endregno
;
1337 if (&SET_DEST (x
) != loc
1338 /* Note setting a SUBREG counts as referring to the REG it is in for
1339 a pseudo but not for hard registers since we can
1340 treat each word individually. */
1341 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1342 && loc
!= &SUBREG_REG (SET_DEST (x
))
1343 && REG_P (SUBREG_REG (SET_DEST (x
)))
1344 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1345 && refers_to_regno_p (regno
, endregno
,
1346 SUBREG_REG (SET_DEST (x
)), loc
))
1347 || (!REG_P (SET_DEST (x
))
1348 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1351 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1360 /* X does not match, so try its subexpressions. */
1362 fmt
= GET_RTX_FORMAT (code
);
1363 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1365 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1373 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1376 else if (fmt
[i
] == 'E')
1379 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1380 if (loc
!= &XVECEXP (x
, i
, j
)
1381 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1388 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1389 we check if any register number in X conflicts with the relevant register
1390 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1391 contains a MEM (we don't bother checking for memory addresses that can't
1392 conflict because we expect this to be a rare case. */
1395 reg_overlap_mentioned_p (const_rtx x
, const_rtx in
)
1397 unsigned int regno
, endregno
;
1399 /* If either argument is a constant, then modifying X can not
1400 affect IN. Here we look at IN, we can profitably combine
1401 CONSTANT_P (x) with the switch statement below. */
1402 if (CONSTANT_P (in
))
1406 switch (GET_CODE (x
))
1408 case STRICT_LOW_PART
:
1411 /* Overly conservative. */
1416 regno
= REGNO (SUBREG_REG (x
));
1417 if (regno
< FIRST_PSEUDO_REGISTER
)
1418 regno
= subreg_regno (x
);
1419 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1420 ? subreg_nregs (x
) : 1);
1425 endregno
= END_REGNO (x
);
1427 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1437 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1438 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1441 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1444 else if (fmt
[i
] == 'E')
1447 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1448 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1458 return reg_mentioned_p (x
, in
);
1464 /* If any register in here refers to it we return true. */
1465 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1466 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1467 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1473 gcc_assert (CONSTANT_P (x
));
1478 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1479 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1480 ignored by note_stores, but passed to FUN.
1482 FUN receives three arguments:
1483 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1484 2. the SET or CLOBBER rtx that does the store,
1485 3. the pointer DATA provided to note_stores.
1487 If the item being stored in or clobbered is a SUBREG of a hard register,
1488 the SUBREG will be passed. */
1491 note_stores (const_rtx x
, void (*fun
) (rtx
, const_rtx
, void *), void *data
)
1495 if (GET_CODE (x
) == COND_EXEC
)
1496 x
= COND_EXEC_CODE (x
);
1498 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1500 rtx dest
= SET_DEST (x
);
1502 while ((GET_CODE (dest
) == SUBREG
1503 && (!REG_P (SUBREG_REG (dest
))
1504 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1505 || GET_CODE (dest
) == ZERO_EXTRACT
1506 || GET_CODE (dest
) == STRICT_LOW_PART
)
1507 dest
= XEXP (dest
, 0);
1509 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1510 each of whose first operand is a register. */
1511 if (GET_CODE (dest
) == PARALLEL
)
1513 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1514 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1515 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1518 (*fun
) (dest
, x
, data
);
1521 else if (GET_CODE (x
) == PARALLEL
)
1522 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1523 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1526 /* Like notes_stores, but call FUN for each expression that is being
1527 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1528 FUN for each expression, not any interior subexpressions. FUN receives a
1529 pointer to the expression and the DATA passed to this function.
1531 Note that this is not quite the same test as that done in reg_referenced_p
1532 since that considers something as being referenced if it is being
1533 partially set, while we do not. */
1536 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1541 switch (GET_CODE (body
))
1544 (*fun
) (&COND_EXEC_TEST (body
), data
);
1545 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1549 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1550 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1554 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1555 note_uses (&PATTERN (XVECEXP (body
, 0, i
)), fun
, data
);
1559 (*fun
) (&XEXP (body
, 0), data
);
1563 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1564 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1568 (*fun
) (&TRAP_CONDITION (body
), data
);
1572 (*fun
) (&XEXP (body
, 0), data
);
1576 case UNSPEC_VOLATILE
:
1577 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1578 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1582 if (MEM_P (XEXP (body
, 0)))
1583 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1588 rtx dest
= SET_DEST (body
);
1590 /* For sets we replace everything in source plus registers in memory
1591 expression in store and operands of a ZERO_EXTRACT. */
1592 (*fun
) (&SET_SRC (body
), data
);
1594 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1596 (*fun
) (&XEXP (dest
, 1), data
);
1597 (*fun
) (&XEXP (dest
, 2), data
);
1600 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1601 dest
= XEXP (dest
, 0);
1604 (*fun
) (&XEXP (dest
, 0), data
);
1609 /* All the other possibilities never store. */
1610 (*fun
) (pbody
, data
);
1615 /* Return nonzero if X's old contents don't survive after INSN.
1616 This will be true if X is (cc0) or if X is a register and
1617 X dies in INSN or because INSN entirely sets X.
1619 "Entirely set" means set directly and not through a SUBREG, or
1620 ZERO_EXTRACT, so no trace of the old contents remains.
1621 Likewise, REG_INC does not count.
1623 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1624 but for this use that makes no difference, since regs don't overlap
1625 during their lifetimes. Therefore, this function may be used
1626 at any time after deaths have been computed.
1628 If REG is a hard reg that occupies multiple machine registers, this
1629 function will only return 1 if each of those registers will be replaced
1633 dead_or_set_p (const_rtx insn
, const_rtx x
)
1635 unsigned int regno
, end_regno
;
1638 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1639 if (GET_CODE (x
) == CC0
)
1642 gcc_assert (REG_P (x
));
1645 end_regno
= END_REGNO (x
);
1646 for (i
= regno
; i
< end_regno
; i
++)
1647 if (! dead_or_set_regno_p (insn
, i
))
1653 /* Return TRUE iff DEST is a register or subreg of a register and
1654 doesn't change the number of words of the inner register, and any
1655 part of the register is TEST_REGNO. */
1658 covers_regno_no_parallel_p (const_rtx dest
, unsigned int test_regno
)
1660 unsigned int regno
, endregno
;
1662 if (GET_CODE (dest
) == SUBREG
1663 && (((GET_MODE_SIZE (GET_MODE (dest
))
1664 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1665 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1666 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1667 dest
= SUBREG_REG (dest
);
1672 regno
= REGNO (dest
);
1673 endregno
= END_REGNO (dest
);
1674 return (test_regno
>= regno
&& test_regno
< endregno
);
1677 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1678 any member matches the covers_regno_no_parallel_p criteria. */
1681 covers_regno_p (const_rtx dest
, unsigned int test_regno
)
1683 if (GET_CODE (dest
) == PARALLEL
)
1685 /* Some targets place small structures in registers for return
1686 values of functions, and those registers are wrapped in
1687 PARALLELs that we may see as the destination of a SET. */
1690 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1692 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1693 if (inner
!= NULL_RTX
1694 && covers_regno_no_parallel_p (inner
, test_regno
))
1701 return covers_regno_no_parallel_p (dest
, test_regno
);
1704 /* Utility function for dead_or_set_p to check an individual register. */
1707 dead_or_set_regno_p (const_rtx insn
, unsigned int test_regno
)
1711 /* See if there is a death note for something that includes TEST_REGNO. */
1712 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1716 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1719 pattern
= PATTERN (insn
);
1721 /* If a COND_EXEC is not executed, the value survives. */
1722 if (GET_CODE (pattern
) == COND_EXEC
)
1725 if (GET_CODE (pattern
) == SET
)
1726 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1727 else if (GET_CODE (pattern
) == PARALLEL
)
1731 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1733 rtx body
= XVECEXP (pattern
, 0, i
);
1735 if (GET_CODE (body
) == COND_EXEC
)
1736 body
= COND_EXEC_CODE (body
);
1738 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1739 && covers_regno_p (SET_DEST (body
), test_regno
))
1747 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1748 If DATUM is nonzero, look for one whose datum is DATUM. */
1751 find_reg_note (const_rtx insn
, enum reg_note kind
, const_rtx datum
)
1755 gcc_checking_assert (insn
);
1757 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1758 if (! INSN_P (insn
))
1762 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1763 if (REG_NOTE_KIND (link
) == kind
)
1768 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1769 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1774 /* Return the reg-note of kind KIND in insn INSN which applies to register
1775 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1776 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1777 it might be the case that the note overlaps REGNO. */
1780 find_regno_note (const_rtx insn
, enum reg_note kind
, unsigned int regno
)
1784 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1785 if (! INSN_P (insn
))
1788 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1789 if (REG_NOTE_KIND (link
) == kind
1790 /* Verify that it is a register, so that scratch and MEM won't cause a
1792 && REG_P (XEXP (link
, 0))
1793 && REGNO (XEXP (link
, 0)) <= regno
1794 && END_REGNO (XEXP (link
, 0)) > regno
)
1799 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1803 find_reg_equal_equiv_note (const_rtx insn
)
1810 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1811 if (REG_NOTE_KIND (link
) == REG_EQUAL
1812 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1814 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1815 insns that have multiple sets. Checking single_set to
1816 make sure of this is not the proper check, as explained
1817 in the comment in set_unique_reg_note.
1819 This should be changed into an assert. */
1820 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
1827 /* Check whether INSN is a single_set whose source is known to be
1828 equivalent to a constant. Return that constant if so, otherwise
1832 find_constant_src (const_rtx insn
)
1836 set
= single_set (insn
);
1839 x
= avoid_constant_pool_reference (SET_SRC (set
));
1844 note
= find_reg_equal_equiv_note (insn
);
1845 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1846 return XEXP (note
, 0);
1851 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1852 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1855 find_reg_fusage (const_rtx insn
, enum rtx_code code
, const_rtx datum
)
1857 /* If it's not a CALL_INSN, it can't possibly have a
1858 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1868 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1870 link
= XEXP (link
, 1))
1871 if (GET_CODE (XEXP (link
, 0)) == code
1872 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1877 unsigned int regno
= REGNO (datum
);
1879 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1880 to pseudo registers, so don't bother checking. */
1882 if (regno
< FIRST_PSEUDO_REGISTER
)
1884 unsigned int end_regno
= END_HARD_REGNO (datum
);
1887 for (i
= regno
; i
< end_regno
; i
++)
1888 if (find_regno_fusage (insn
, code
, i
))
1896 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1897 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1900 find_regno_fusage (const_rtx insn
, enum rtx_code code
, unsigned int regno
)
1904 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1905 to pseudo registers, so don't bother checking. */
1907 if (regno
>= FIRST_PSEUDO_REGISTER
1911 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1915 if (GET_CODE (op
= XEXP (link
, 0)) == code
1916 && REG_P (reg
= XEXP (op
, 0))
1917 && REGNO (reg
) <= regno
1918 && END_HARD_REGNO (reg
) > regno
)
1926 /* Return true if KIND is an integer REG_NOTE. */
1929 int_reg_note_p (enum reg_note kind
)
1931 return kind
== REG_BR_PROB
;
1934 /* Allocate a register note with kind KIND and datum DATUM. LIST is
1935 stored as the pointer to the next register note. */
1938 alloc_reg_note (enum reg_note kind
, rtx datum
, rtx list
)
1942 gcc_checking_assert (!int_reg_note_p (kind
));
1947 case REG_LABEL_TARGET
:
1948 case REG_LABEL_OPERAND
:
1950 /* These types of register notes use an INSN_LIST rather than an
1951 EXPR_LIST, so that copying is done right and dumps look
1953 note
= alloc_INSN_LIST (datum
, list
);
1954 PUT_REG_NOTE_KIND (note
, kind
);
1958 note
= alloc_EXPR_LIST (kind
, datum
, list
);
1965 /* Add register note with kind KIND and datum DATUM to INSN. */
1968 add_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1970 REG_NOTES (insn
) = alloc_reg_note (kind
, datum
, REG_NOTES (insn
));
1973 /* Add an integer register note with kind KIND and datum DATUM to INSN. */
1976 add_int_reg_note (rtx insn
, enum reg_note kind
, int datum
)
1978 gcc_checking_assert (int_reg_note_p (kind
));
1979 REG_NOTES (insn
) = gen_rtx_INT_LIST ((enum machine_mode
) kind
,
1980 datum
, REG_NOTES (insn
));
1983 /* Add a register note like NOTE to INSN. */
1986 add_shallow_copy_of_reg_note (rtx insn
, rtx note
)
1988 if (GET_CODE (note
) == INT_LIST
)
1989 add_int_reg_note (insn
, REG_NOTE_KIND (note
), XINT (note
, 0));
1991 add_reg_note (insn
, REG_NOTE_KIND (note
), XEXP (note
, 0));
1994 /* Remove register note NOTE from the REG_NOTES of INSN. */
1997 remove_note (rtx insn
, const_rtx note
)
2001 if (note
== NULL_RTX
)
2004 if (REG_NOTES (insn
) == note
)
2005 REG_NOTES (insn
) = XEXP (note
, 1);
2007 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
2008 if (XEXP (link
, 1) == note
)
2010 XEXP (link
, 1) = XEXP (note
, 1);
2014 switch (REG_NOTE_KIND (note
))
2018 df_notes_rescan (insn
);
2025 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
2028 remove_reg_equal_equiv_notes (rtx insn
)
2032 loc
= ®_NOTES (insn
);
2035 enum reg_note kind
= REG_NOTE_KIND (*loc
);
2036 if (kind
== REG_EQUAL
|| kind
== REG_EQUIV
)
2037 *loc
= XEXP (*loc
, 1);
2039 loc
= &XEXP (*loc
, 1);
2043 /* Remove all REG_EQUAL and REG_EQUIV notes referring to REGNO. */
2046 remove_reg_equal_equiv_notes_for_regno (unsigned int regno
)
2053 /* This loop is a little tricky. We cannot just go down the chain because
2054 it is being modified by some actions in the loop. So we just iterate
2055 over the head. We plan to drain the list anyway. */
2056 while ((eq_use
= DF_REG_EQ_USE_CHAIN (regno
)) != NULL
)
2058 rtx insn
= DF_REF_INSN (eq_use
);
2059 rtx note
= find_reg_equal_equiv_note (insn
);
2061 /* This assert is generally triggered when someone deletes a REG_EQUAL
2062 or REG_EQUIV note by hacking the list manually rather than calling
2066 remove_note (insn
, note
);
2070 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2071 return 1 if it is found. A simple equality test is used to determine if
2075 in_expr_list_p (const_rtx listp
, const_rtx node
)
2079 for (x
= listp
; x
; x
= XEXP (x
, 1))
2080 if (node
== XEXP (x
, 0))
2086 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
2087 remove that entry from the list if it is found.
2089 A simple equality test is used to determine if NODE matches. */
2092 remove_node_from_expr_list (const_rtx node
, rtx
*listp
)
2095 rtx prev
= NULL_RTX
;
2099 if (node
== XEXP (temp
, 0))
2101 /* Splice the node out of the list. */
2103 XEXP (prev
, 1) = XEXP (temp
, 1);
2105 *listp
= XEXP (temp
, 1);
2111 temp
= XEXP (temp
, 1);
2115 /* Nonzero if X contains any volatile instructions. These are instructions
2116 which may cause unpredictable machine state instructions, and thus no
2117 instructions or register uses should be moved or combined across them.
2118 This includes only volatile asms and UNSPEC_VOLATILE instructions. */
2121 volatile_insn_p (const_rtx x
)
2123 const RTX_CODE code
= GET_CODE (x
);
2141 case UNSPEC_VOLATILE
:
2146 if (MEM_VOLATILE_P (x
))
2153 /* Recursively scan the operands of this expression. */
2156 const char *const fmt
= GET_RTX_FORMAT (code
);
2159 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2163 if (volatile_insn_p (XEXP (x
, i
)))
2166 else if (fmt
[i
] == 'E')
2169 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2170 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
2178 /* Nonzero if X contains any volatile memory references
2179 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2182 volatile_refs_p (const_rtx x
)
2184 const RTX_CODE code
= GET_CODE (x
);
2200 case UNSPEC_VOLATILE
:
2206 if (MEM_VOLATILE_P (x
))
2213 /* Recursively scan the operands of this expression. */
2216 const char *const fmt
= GET_RTX_FORMAT (code
);
2219 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2223 if (volatile_refs_p (XEXP (x
, i
)))
2226 else if (fmt
[i
] == 'E')
2229 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2230 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
2238 /* Similar to above, except that it also rejects register pre- and post-
2242 side_effects_p (const_rtx x
)
2244 const RTX_CODE code
= GET_CODE (x
);
2261 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2262 when some combination can't be done. If we see one, don't think
2263 that we can simplify the expression. */
2264 return (GET_MODE (x
) != VOIDmode
);
2273 case UNSPEC_VOLATILE
:
2279 if (MEM_VOLATILE_P (x
))
2286 /* Recursively scan the operands of this expression. */
2289 const char *fmt
= GET_RTX_FORMAT (code
);
2292 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2296 if (side_effects_p (XEXP (x
, i
)))
2299 else if (fmt
[i
] == 'E')
2302 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2303 if (side_effects_p (XVECEXP (x
, i
, j
)))
2311 /* Return nonzero if evaluating rtx X might cause a trap.
2312 FLAGS controls how to consider MEMs. A nonzero means the context
2313 of the access may have changed from the original, such that the
2314 address may have become invalid. */
2317 may_trap_p_1 (const_rtx x
, unsigned flags
)
2323 /* We make no distinction currently, but this function is part of
2324 the internal target-hooks ABI so we keep the parameter as
2325 "unsigned flags". */
2326 bool code_changed
= flags
!= 0;
2330 code
= GET_CODE (x
);
2333 /* Handle these cases quickly. */
2345 return targetm
.unspec_may_trap_p (x
, flags
);
2347 case UNSPEC_VOLATILE
:
2353 return MEM_VOLATILE_P (x
);
2355 /* Memory ref can trap unless it's a static var or a stack slot. */
2357 /* Recognize specific pattern of stack checking probes. */
2358 if (flag_stack_check
2359 && MEM_VOLATILE_P (x
)
2360 && XEXP (x
, 0) == stack_pointer_rtx
)
2362 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2363 reference; moving it out of context such as when moving code
2364 when optimizing, might cause its address to become invalid. */
2366 || !MEM_NOTRAP_P (x
))
2368 HOST_WIDE_INT size
= MEM_SIZE_KNOWN_P (x
) ? MEM_SIZE (x
) : 0;
2369 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), 0, size
,
2370 GET_MODE (x
), code_changed
);
2375 /* Division by a non-constant might trap. */
2380 if (HONOR_SNANS (GET_MODE (x
)))
2382 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2383 return flag_trapping_math
;
2384 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2389 /* An EXPR_LIST is used to represent a function call. This
2390 certainly may trap. */
2399 /* Some floating point comparisons may trap. */
2400 if (!flag_trapping_math
)
2402 /* ??? There is no machine independent way to check for tests that trap
2403 when COMPARE is used, though many targets do make this distinction.
2404 For instance, sparc uses CCFPE for compares which generate exceptions
2405 and CCFP for compares which do not generate exceptions. */
2406 if (HONOR_NANS (GET_MODE (x
)))
2408 /* But often the compare has some CC mode, so check operand
2410 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2411 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2417 if (HONOR_SNANS (GET_MODE (x
)))
2419 /* Often comparison is CC mode, so check operand modes. */
2420 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2421 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2426 /* Conversion of floating point might trap. */
2427 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2434 /* These operations don't trap even with floating point. */
2438 /* Any floating arithmetic may trap. */
2439 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)) && flag_trapping_math
)
2443 fmt
= GET_RTX_FORMAT (code
);
2444 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2448 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2451 else if (fmt
[i
] == 'E')
2454 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2455 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2462 /* Return nonzero if evaluating rtx X might cause a trap. */
2465 may_trap_p (const_rtx x
)
2467 return may_trap_p_1 (x
, 0);
2470 /* Same as above, but additionally return nonzero if evaluating rtx X might
2471 cause a fault. We define a fault for the purpose of this function as a
2472 erroneous execution condition that cannot be encountered during the normal
2473 execution of a valid program; the typical example is an unaligned memory
2474 access on a strict alignment machine. The compiler guarantees that it
2475 doesn't generate code that will fault from a valid program, but this
2476 guarantee doesn't mean anything for individual instructions. Consider
2477 the following example:
2479 struct S { int d; union { char *cp; int *ip; }; };
2481 int foo(struct S *s)
2489 on a strict alignment machine. In a valid program, foo will never be
2490 invoked on a structure for which d is equal to 1 and the underlying
2491 unique field of the union not aligned on a 4-byte boundary, but the
2492 expression *s->ip might cause a fault if considered individually.
2494 At the RTL level, potentially problematic expressions will almost always
2495 verify may_trap_p; for example, the above dereference can be emitted as
2496 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2497 However, suppose that foo is inlined in a caller that causes s->cp to
2498 point to a local character variable and guarantees that s->d is not set
2499 to 1; foo may have been effectively translated into pseudo-RTL as:
2502 (set (reg:SI) (mem:SI (%fp - 7)))
2504 (set (reg:QI) (mem:QI (%fp - 7)))
2506 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2507 memory reference to a stack slot, but it will certainly cause a fault
2508 on a strict alignment machine. */
2511 may_trap_or_fault_p (const_rtx x
)
2513 return may_trap_p_1 (x
, 1);
2516 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2517 i.e., an inequality. */
2520 inequality_comparisons_p (const_rtx x
)
2524 const enum rtx_code code
= GET_CODE (x
);
2552 len
= GET_RTX_LENGTH (code
);
2553 fmt
= GET_RTX_FORMAT (code
);
2555 for (i
= 0; i
< len
; i
++)
2559 if (inequality_comparisons_p (XEXP (x
, i
)))
2562 else if (fmt
[i
] == 'E')
2565 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2566 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2574 /* Replace any occurrence of FROM in X with TO. The function does
2575 not enter into CONST_DOUBLE for the replace.
2577 Note that copying is not done so X must not be shared unless all copies
2578 are to be modified. */
2581 replace_rtx (rtx x
, rtx from
, rtx to
)
2589 /* Allow this function to make replacements in EXPR_LISTs. */
2593 if (GET_CODE (x
) == SUBREG
)
2595 rtx new_rtx
= replace_rtx (SUBREG_REG (x
), from
, to
);
2597 if (CONST_INT_P (new_rtx
))
2599 x
= simplify_subreg (GET_MODE (x
), new_rtx
,
2600 GET_MODE (SUBREG_REG (x
)),
2605 SUBREG_REG (x
) = new_rtx
;
2609 else if (GET_CODE (x
) == ZERO_EXTEND
)
2611 rtx new_rtx
= replace_rtx (XEXP (x
, 0), from
, to
);
2613 if (CONST_INT_P (new_rtx
))
2615 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2616 new_rtx
, GET_MODE (XEXP (x
, 0)));
2620 XEXP (x
, 0) = new_rtx
;
2625 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2626 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2629 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2630 else if (fmt
[i
] == 'E')
2631 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2632 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2638 /* Replace occurrences of the old label in *X with the new one.
2639 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2642 replace_label (rtx
*x
, void *data
)
2645 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2646 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2647 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2652 if (GET_CODE (l
) == SYMBOL_REF
2653 && CONSTANT_POOL_ADDRESS_P (l
))
2655 rtx c
= get_pool_constant (l
);
2656 if (rtx_referenced_p (old_label
, c
))
2659 replace_label_data
*d
= (replace_label_data
*) data
;
2661 /* Create a copy of constant C; replace the label inside
2662 but do not update LABEL_NUSES because uses in constant pool
2664 new_c
= copy_rtx (c
);
2665 d
->update_label_nuses
= false;
2666 for_each_rtx (&new_c
, replace_label
, data
);
2667 d
->update_label_nuses
= update_label_nuses
;
2669 /* Add the new constant NEW_C to constant pool and replace
2670 the old reference to constant by new reference. */
2671 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2672 *x
= replace_rtx (l
, l
, new_l
);
2677 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2678 field. This is not handled by for_each_rtx because it doesn't
2679 handle unprinted ('0') fields. */
2680 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2681 JUMP_LABEL (l
) = new_label
;
2683 if ((GET_CODE (l
) == LABEL_REF
2684 || GET_CODE (l
) == INSN_LIST
)
2685 && XEXP (l
, 0) == old_label
)
2687 XEXP (l
, 0) = new_label
;
2688 if (update_label_nuses
)
2690 ++LABEL_NUSES (new_label
);
2691 --LABEL_NUSES (old_label
);
2699 /* When *BODY is equal to X or X is directly referenced by *BODY
2700 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2701 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2704 rtx_referenced_p_1 (rtx
*body
, void *x
)
2708 if (*body
== NULL_RTX
)
2709 return y
== NULL_RTX
;
2711 /* Return true if a label_ref *BODY refers to label Y. */
2712 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2713 return XEXP (*body
, 0) == y
;
2715 /* If *BODY is a reference to pool constant traverse the constant. */
2716 if (GET_CODE (*body
) == SYMBOL_REF
2717 && CONSTANT_POOL_ADDRESS_P (*body
))
2718 return rtx_referenced_p (y
, get_pool_constant (*body
));
2720 /* By default, compare the RTL expressions. */
2721 return rtx_equal_p (*body
, y
);
2724 /* Return true if X is referenced in BODY. */
2727 rtx_referenced_p (rtx x
, rtx body
)
2729 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2732 /* If INSN is a tablejump return true and store the label (before jump table) to
2733 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2736 tablejump_p (const_rtx insn
, rtx
*labelp
, rtx
*tablep
)
2743 label
= JUMP_LABEL (insn
);
2744 if (label
!= NULL_RTX
&& !ANY_RETURN_P (label
)
2745 && (table
= next_active_insn (label
)) != NULL_RTX
2746 && JUMP_TABLE_DATA_P (table
))
2748 gcc_assert (table
== NEXT_INSN (label
));
2758 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2759 constant that is not in the constant pool and not in the condition
2760 of an IF_THEN_ELSE. */
2763 computed_jump_p_1 (const_rtx x
)
2765 const enum rtx_code code
= GET_CODE (x
);
2782 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2783 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2786 return (computed_jump_p_1 (XEXP (x
, 1))
2787 || computed_jump_p_1 (XEXP (x
, 2)));
2793 fmt
= GET_RTX_FORMAT (code
);
2794 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2797 && computed_jump_p_1 (XEXP (x
, i
)))
2800 else if (fmt
[i
] == 'E')
2801 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2802 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2809 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2811 Tablejumps and casesi insns are not considered indirect jumps;
2812 we can recognize them by a (use (label_ref)). */
2815 computed_jump_p (const_rtx insn
)
2820 rtx pat
= PATTERN (insn
);
2822 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2823 if (JUMP_LABEL (insn
) != NULL
)
2826 if (GET_CODE (pat
) == PARALLEL
)
2828 int len
= XVECLEN (pat
, 0);
2829 int has_use_labelref
= 0;
2831 for (i
= len
- 1; i
>= 0; i
--)
2832 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2833 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2836 has_use_labelref
= 1;
2840 if (! has_use_labelref
)
2841 for (i
= len
- 1; i
>= 0; i
--)
2842 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2843 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2844 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2847 else if (GET_CODE (pat
) == SET
2848 && SET_DEST (pat
) == pc_rtx
2849 && computed_jump_p_1 (SET_SRC (pat
)))
2855 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2856 calls. Processes the subexpressions of EXP and passes them to F. */
2858 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2861 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2864 for (; format
[n
] != '\0'; n
++)
2871 result
= (*f
) (x
, data
);
2873 /* Do not traverse sub-expressions. */
2875 else if (result
!= 0)
2876 /* Stop the traversal. */
2880 /* There are no sub-expressions. */
2883 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2886 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2894 if (XVEC (exp
, n
) == 0)
2896 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2899 x
= &XVECEXP (exp
, n
, j
);
2900 result
= (*f
) (x
, data
);
2902 /* Do not traverse sub-expressions. */
2904 else if (result
!= 0)
2905 /* Stop the traversal. */
2909 /* There are no sub-expressions. */
2912 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2915 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2923 /* Nothing to do. */
2931 /* Traverse X via depth-first search, calling F for each
2932 sub-expression (including X itself). F is also passed the DATA.
2933 If F returns -1, do not traverse sub-expressions, but continue
2934 traversing the rest of the tree. If F ever returns any other
2935 nonzero value, stop the traversal, and return the value returned
2936 by F. Otherwise, return 0. This function does not traverse inside
2937 tree structure that contains RTX_EXPRs, or into sub-expressions
2938 whose format code is `0' since it is not known whether or not those
2939 codes are actually RTL.
2941 This routine is very general, and could (should?) be used to
2942 implement many of the other routines in this file. */
2945 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2951 result
= (*f
) (x
, data
);
2953 /* Do not traverse sub-expressions. */
2955 else if (result
!= 0)
2956 /* Stop the traversal. */
2960 /* There are no sub-expressions. */
2963 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2967 return for_each_rtx_1 (*x
, i
, f
, data
);
2972 /* Data structure that holds the internal state communicated between
2973 for_each_inc_dec, for_each_inc_dec_find_mem and
2974 for_each_inc_dec_find_inc_dec. */
2976 struct for_each_inc_dec_ops
{
2977 /* The function to be called for each autoinc operation found. */
2978 for_each_inc_dec_fn fn
;
2979 /* The opaque argument to be passed to it. */
2981 /* The MEM we're visiting, if any. */
2985 static int for_each_inc_dec_find_mem (rtx
*r
, void *d
);
2987 /* Find PRE/POST-INC/DEC/MODIFY operations within *R, extract the
2988 operands of the equivalent add insn and pass the result to the
2989 operator specified by *D. */
2992 for_each_inc_dec_find_inc_dec (rtx
*r
, void *d
)
2995 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*)d
;
2997 switch (GET_CODE (x
))
3002 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
3003 rtx r1
= XEXP (x
, 0);
3004 rtx c
= gen_int_mode (size
, GET_MODE (r1
));
3005 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
3011 int size
= GET_MODE_SIZE (GET_MODE (data
->mem
));
3012 rtx r1
= XEXP (x
, 0);
3013 rtx c
= gen_int_mode (-size
, GET_MODE (r1
));
3014 return data
->fn (data
->mem
, x
, r1
, r1
, c
, data
->arg
);
3020 rtx r1
= XEXP (x
, 0);
3021 rtx add
= XEXP (x
, 1);
3022 return data
->fn (data
->mem
, x
, r1
, add
, NULL
, data
->arg
);
3027 rtx save
= data
->mem
;
3028 int ret
= for_each_inc_dec_find_mem (r
, d
);
3038 /* If *R is a MEM, find PRE/POST-INC/DEC/MODIFY operations within its
3039 address, extract the operands of the equivalent add insn and pass
3040 the result to the operator specified by *D. */
3043 for_each_inc_dec_find_mem (rtx
*r
, void *d
)
3046 if (x
!= NULL_RTX
&& MEM_P (x
))
3048 struct for_each_inc_dec_ops
*data
= (struct for_each_inc_dec_ops
*) d
;
3053 result
= for_each_rtx (&XEXP (x
, 0), for_each_inc_dec_find_inc_dec
,
3063 /* Traverse *X looking for MEMs, and for autoinc operations within
3064 them. For each such autoinc operation found, call FN, passing it
3065 the innermost enclosing MEM, the operation itself, the RTX modified
3066 by the operation, two RTXs (the second may be NULL) that, once
3067 added, represent the value to be held by the modified RTX
3068 afterwards, and ARG. FN is to return -1 to skip looking for other
3069 autoinc operations within the visited operation, 0 to continue the
3070 traversal, or any other value to have it returned to the caller of
3071 for_each_inc_dec. */
3074 for_each_inc_dec (rtx
*x
,
3075 for_each_inc_dec_fn fn
,
3078 struct for_each_inc_dec_ops data
;
3084 return for_each_rtx (x
, for_each_inc_dec_find_mem
, &data
);
3088 /* Searches X for any reference to REGNO, returning the rtx of the
3089 reference found if any. Otherwise, returns NULL_RTX. */
3092 regno_use_in (unsigned int regno
, rtx x
)
3098 if (REG_P (x
) && REGNO (x
) == regno
)
3101 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
3102 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
3106 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
3109 else if (fmt
[i
] == 'E')
3110 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3111 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
3118 /* Return a value indicating whether OP, an operand of a commutative
3119 operation, is preferred as the first or second operand. The higher
3120 the value, the stronger the preference for being the first operand.
3121 We use negative values to indicate a preference for the first operand
3122 and positive values for the second operand. */
3125 commutative_operand_precedence (rtx op
)
3127 enum rtx_code code
= GET_CODE (op
);
3129 /* Constants always come the second operand. Prefer "nice" constants. */
3130 if (code
== CONST_INT
)
3132 if (code
== CONST_DOUBLE
)
3134 if (code
== CONST_FIXED
)
3136 op
= avoid_constant_pool_reference (op
);
3137 code
= GET_CODE (op
);
3139 switch (GET_RTX_CLASS (code
))
3142 if (code
== CONST_INT
)
3144 if (code
== CONST_DOUBLE
)
3146 if (code
== CONST_FIXED
)
3151 /* SUBREGs of objects should come second. */
3152 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
3157 /* Complex expressions should be the first, so decrease priority
3158 of objects. Prefer pointer objects over non pointer objects. */
3159 if ((REG_P (op
) && REG_POINTER (op
))
3160 || (MEM_P (op
) && MEM_POINTER (op
)))
3164 case RTX_COMM_ARITH
:
3165 /* Prefer operands that are themselves commutative to be first.
3166 This helps to make things linear. In particular,
3167 (and (and (reg) (reg)) (not (reg))) is canonical. */
3171 /* If only one operand is a binary expression, it will be the first
3172 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
3173 is canonical, although it will usually be further simplified. */
3177 /* Then prefer NEG and NOT. */
3178 if (code
== NEG
|| code
== NOT
)
3186 /* Return 1 iff it is necessary to swap operands of commutative operation
3187 in order to canonicalize expression. */
3190 swap_commutative_operands_p (rtx x
, rtx y
)
3192 return (commutative_operand_precedence (x
)
3193 < commutative_operand_precedence (y
));
3196 /* Return 1 if X is an autoincrement side effect and the register is
3197 not the stack pointer. */
3199 auto_inc_p (const_rtx x
)
3201 switch (GET_CODE (x
))
3209 /* There are no REG_INC notes for SP. */
3210 if (XEXP (x
, 0) != stack_pointer_rtx
)
3218 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
3220 loc_mentioned_in_p (rtx
*loc
, const_rtx in
)
3229 code
= GET_CODE (in
);
3230 fmt
= GET_RTX_FORMAT (code
);
3231 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3235 if (loc
== &XEXP (in
, i
) || loc_mentioned_in_p (loc
, XEXP (in
, i
)))
3238 else if (fmt
[i
] == 'E')
3239 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
3240 if (loc
== &XVECEXP (in
, i
, j
)
3241 || loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
3247 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3248 and SUBREG_BYTE, return the bit offset where the subreg begins
3249 (counting from the least significant bit of the operand). */
3252 subreg_lsb_1 (enum machine_mode outer_mode
,
3253 enum machine_mode inner_mode
,
3254 unsigned int subreg_byte
)
3256 unsigned int bitpos
;
3260 /* A paradoxical subreg begins at bit position 0. */
3261 if (GET_MODE_PRECISION (outer_mode
) > GET_MODE_PRECISION (inner_mode
))
3264 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3265 /* If the subreg crosses a word boundary ensure that
3266 it also begins and ends on a word boundary. */
3267 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3268 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3269 && (subreg_byte
% UNITS_PER_WORD
3270 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3272 if (WORDS_BIG_ENDIAN
)
3273 word
= (GET_MODE_SIZE (inner_mode
)
3274 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3276 word
= subreg_byte
/ UNITS_PER_WORD
;
3277 bitpos
= word
* BITS_PER_WORD
;
3279 if (BYTES_BIG_ENDIAN
)
3280 byte
= (GET_MODE_SIZE (inner_mode
)
3281 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3283 byte
= subreg_byte
% UNITS_PER_WORD
;
3284 bitpos
+= byte
* BITS_PER_UNIT
;
3289 /* Given a subreg X, return the bit offset where the subreg begins
3290 (counting from the least significant bit of the reg). */
3293 subreg_lsb (const_rtx x
)
3295 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3299 /* Fill in information about a subreg of a hard register.
3300 xregno - A regno of an inner hard subreg_reg (or what will become one).
3301 xmode - The mode of xregno.
3302 offset - The byte offset.
3303 ymode - The mode of a top level SUBREG (or what may become one).
3304 info - Pointer to structure to fill in. */
3306 subreg_get_info (unsigned int xregno
, enum machine_mode xmode
,
3307 unsigned int offset
, enum machine_mode ymode
,
3308 struct subreg_info
*info
)
3310 int nregs_xmode
, nregs_ymode
;
3311 int mode_multiple
, nregs_multiple
;
3312 int offset_adj
, y_offset
, y_offset_adj
;
3313 int regsize_xmode
, regsize_ymode
;
3316 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3320 /* If there are holes in a non-scalar mode in registers, we expect
3321 that it is made up of its units concatenated together. */
3322 if (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
))
3324 enum machine_mode xmode_unit
;
3326 nregs_xmode
= HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode
);
3327 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3330 xmode_unit
= GET_MODE_INNER (xmode
);
3331 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode_unit
));
3332 gcc_assert (nregs_xmode
3333 == (GET_MODE_NUNITS (xmode
)
3334 * HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode_unit
)));
3335 gcc_assert (hard_regno_nregs
[xregno
][xmode
]
3336 == (hard_regno_nregs
[xregno
][xmode_unit
]
3337 * GET_MODE_NUNITS (xmode
)));
3339 /* You can only ask for a SUBREG of a value with holes in the middle
3340 if you don't cross the holes. (Such a SUBREG should be done by
3341 picking a different register class, or doing it in memory if
3342 necessary.) An example of a value with holes is XCmode on 32-bit
3343 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3344 3 for each part, but in memory it's two 128-bit parts.
3345 Padding is assumed to be at the end (not necessarily the 'high part')
3347 if ((offset
/ GET_MODE_SIZE (xmode_unit
) + 1
3348 < GET_MODE_NUNITS (xmode
))
3349 && (offset
/ GET_MODE_SIZE (xmode_unit
)
3350 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3351 / GET_MODE_SIZE (xmode_unit
))))
3353 info
->representable_p
= false;
3358 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3360 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3362 /* Paradoxical subregs are otherwise valid. */
3365 && GET_MODE_PRECISION (ymode
) > GET_MODE_PRECISION (xmode
))
3367 info
->representable_p
= true;
3368 /* If this is a big endian paradoxical subreg, which uses more
3369 actual hard registers than the original register, we must
3370 return a negative offset so that we find the proper highpart
3372 if (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3373 ? REG_WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
3374 info
->offset
= nregs_xmode
- nregs_ymode
;
3377 info
->nregs
= nregs_ymode
;
3381 /* If registers store different numbers of bits in the different
3382 modes, we cannot generally form this subreg. */
3383 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
)
3384 && !HARD_REGNO_NREGS_HAS_PADDING (xregno
, ymode
)
3385 && (GET_MODE_SIZE (xmode
) % nregs_xmode
) == 0
3386 && (GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0)
3388 regsize_xmode
= GET_MODE_SIZE (xmode
) / nregs_xmode
;
3389 regsize_ymode
= GET_MODE_SIZE (ymode
) / nregs_ymode
;
3390 if (!rknown
&& regsize_xmode
> regsize_ymode
&& nregs_ymode
> 1)
3392 info
->representable_p
= false;
3394 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3395 info
->offset
= offset
/ regsize_xmode
;
3398 if (!rknown
&& regsize_ymode
> regsize_xmode
&& nregs_xmode
> 1)
3400 info
->representable_p
= false;
3402 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3403 info
->offset
= offset
/ regsize_xmode
;
3408 /* Lowpart subregs are otherwise valid. */
3409 if (!rknown
&& offset
== subreg_lowpart_offset (ymode
, xmode
))
3411 info
->representable_p
= true;
3414 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3417 info
->nregs
= nregs_ymode
;
3422 /* This should always pass, otherwise we don't know how to verify
3423 the constraint. These conditions may be relaxed but
3424 subreg_regno_offset would need to be redesigned. */
3425 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3426 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3428 if (WORDS_BIG_ENDIAN
!= REG_WORDS_BIG_ENDIAN
3429 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
)
3431 HOST_WIDE_INT xsize
= GET_MODE_SIZE (xmode
);
3432 HOST_WIDE_INT ysize
= GET_MODE_SIZE (ymode
);
3433 HOST_WIDE_INT off_low
= offset
& (ysize
- 1);
3434 HOST_WIDE_INT off_high
= offset
& ~(ysize
- 1);
3435 offset
= (xsize
- ysize
- off_high
) | off_low
;
3437 /* The XMODE value can be seen as a vector of NREGS_XMODE
3438 values. The subreg must represent a lowpart of given field.
3439 Compute what field it is. */
3440 offset_adj
= offset
;
3441 offset_adj
-= subreg_lowpart_offset (ymode
,
3442 mode_for_size (GET_MODE_BITSIZE (xmode
)
3446 /* Size of ymode must not be greater than the size of xmode. */
3447 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3448 gcc_assert (mode_multiple
!= 0);
3450 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3451 y_offset_adj
= offset_adj
/ GET_MODE_SIZE (ymode
);
3452 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3454 gcc_assert ((offset_adj
% GET_MODE_SIZE (ymode
)) == 0);
3455 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3459 info
->representable_p
= (!(y_offset_adj
% (mode_multiple
/ nregs_multiple
)));
3462 info
->offset
= (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3463 info
->nregs
= nregs_ymode
;
3466 /* This function returns the regno offset of a subreg expression.
3467 xregno - A regno of an inner hard subreg_reg (or what will become one).
3468 xmode - The mode of xregno.
3469 offset - The byte offset.
3470 ymode - The mode of a top level SUBREG (or what may become one).
3471 RETURN - The regno offset which would be used. */
3473 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3474 unsigned int offset
, enum machine_mode ymode
)
3476 struct subreg_info info
;
3477 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3481 /* This function returns true when the offset is representable via
3482 subreg_offset in the given regno.
3483 xregno - A regno of an inner hard subreg_reg (or what will become one).
3484 xmode - The mode of xregno.
3485 offset - The byte offset.
3486 ymode - The mode of a top level SUBREG (or what may become one).
3487 RETURN - Whether the offset is representable. */
3489 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3490 unsigned int offset
, enum machine_mode ymode
)
3492 struct subreg_info info
;
3493 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3494 return info
.representable_p
;
3497 /* Return the number of a YMODE register to which
3499 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3501 can be simplified. Return -1 if the subreg can't be simplified.
3503 XREGNO is a hard register number. */
3506 simplify_subreg_regno (unsigned int xregno
, enum machine_mode xmode
,
3507 unsigned int offset
, enum machine_mode ymode
)
3509 struct subreg_info info
;
3510 unsigned int yregno
;
3512 #ifdef CANNOT_CHANGE_MODE_CLASS
3513 /* Give the backend a chance to disallow the mode change. */
3514 if (GET_MODE_CLASS (xmode
) != MODE_COMPLEX_INT
3515 && GET_MODE_CLASS (xmode
) != MODE_COMPLEX_FLOAT
3516 && REG_CANNOT_CHANGE_MODE_P (xregno
, xmode
, ymode
)
3517 /* We can use mode change in LRA for some transformations. */
3518 && ! lra_in_progress
)
3522 /* We shouldn't simplify stack-related registers. */
3523 if ((!reload_completed
|| frame_pointer_needed
)
3524 && xregno
== FRAME_POINTER_REGNUM
)
3527 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
3528 && xregno
== ARG_POINTER_REGNUM
)
3531 if (xregno
== STACK_POINTER_REGNUM
3532 /* We should convert hard stack register in LRA if it is
3534 && ! lra_in_progress
)
3537 /* Try to get the register offset. */
3538 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3539 if (!info
.representable_p
)
3542 /* Make sure that the offsetted register value is in range. */
3543 yregno
= xregno
+ info
.offset
;
3544 if (!HARD_REGISTER_NUM_P (yregno
))
3547 /* See whether (reg:YMODE YREGNO) is valid.
3549 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3550 This is a kludge to work around how complex FP arguments are passed
3551 on IA-64 and should be fixed. See PR target/49226. */
3552 if (!HARD_REGNO_MODE_OK (yregno
, ymode
)
3553 && HARD_REGNO_MODE_OK (xregno
, xmode
))
3556 return (int) yregno
;
3559 /* Return the final regno that a subreg expression refers to. */
3561 subreg_regno (const_rtx x
)
3564 rtx subreg
= SUBREG_REG (x
);
3565 int regno
= REGNO (subreg
);
3567 ret
= regno
+ subreg_regno_offset (regno
,
3575 /* Return the number of registers that a subreg expression refers
3578 subreg_nregs (const_rtx x
)
3580 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x
)), x
);
3583 /* Return the number of registers that a subreg REG with REGNO
3584 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3585 changed so that the regno can be passed in. */
3588 subreg_nregs_with_regno (unsigned int regno
, const_rtx x
)
3590 struct subreg_info info
;
3591 rtx subreg
= SUBREG_REG (x
);
3593 subreg_get_info (regno
, GET_MODE (subreg
), SUBREG_BYTE (x
), GET_MODE (x
),
3599 struct parms_set_data
3605 /* Helper function for noticing stores to parameter registers. */
3607 parms_set (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
3609 struct parms_set_data
*const d
= (struct parms_set_data
*) data
;
3610 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3611 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3613 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3618 /* Look backward for first parameter to be loaded.
3619 Note that loads of all parameters will not necessarily be
3620 found if CSE has eliminated some of them (e.g., an argument
3621 to the outer function is passed down as a parameter).
3622 Do not skip BOUNDARY. */
3624 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3626 struct parms_set_data parm
;
3627 rtx p
, before
, first_set
;
3629 /* Since different machines initialize their parameter registers
3630 in different orders, assume nothing. Collect the set of all
3631 parameter registers. */
3632 CLEAR_HARD_REG_SET (parm
.regs
);
3634 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3635 if (GET_CODE (XEXP (p
, 0)) == USE
3636 && REG_P (XEXP (XEXP (p
, 0), 0)))
3638 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3640 /* We only care about registers which can hold function
3642 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3645 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3649 first_set
= call_insn
;
3651 /* Search backward for the first set of a register in this set. */
3652 while (parm
.nregs
&& before
!= boundary
)
3654 before
= PREV_INSN (before
);
3656 /* It is possible that some loads got CSEed from one call to
3657 another. Stop in that case. */
3658 if (CALL_P (before
))
3661 /* Our caller needs either ensure that we will find all sets
3662 (in case code has not been optimized yet), or take care
3663 for possible labels in a way by setting boundary to preceding
3665 if (LABEL_P (before
))
3667 gcc_assert (before
== boundary
);
3671 if (INSN_P (before
))
3673 int nregs_old
= parm
.nregs
;
3674 note_stores (PATTERN (before
), parms_set
, &parm
);
3675 /* If we found something that did not set a parameter reg,
3676 we're done. Do not keep going, as that might result
3677 in hoisting an insn before the setting of a pseudo
3678 that is used by the hoisted insn. */
3679 if (nregs_old
!= parm
.nregs
)
3688 /* Return true if we should avoid inserting code between INSN and preceding
3689 call instruction. */
3692 keep_with_call_p (const_rtx insn
)
3696 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3698 if (REG_P (SET_DEST (set
))
3699 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3700 && fixed_regs
[REGNO (SET_DEST (set
))]
3701 && general_operand (SET_SRC (set
), VOIDmode
))
3703 if (REG_P (SET_SRC (set
))
3704 && targetm
.calls
.function_value_regno_p (REGNO (SET_SRC (set
)))
3705 && REG_P (SET_DEST (set
))
3706 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3708 /* There may be a stack pop just after the call and before the store
3709 of the return register. Search for the actual store when deciding
3710 if we can break or not. */
3711 if (SET_DEST (set
) == stack_pointer_rtx
)
3713 /* This CONST_CAST is okay because next_nonnote_insn just
3714 returns its argument and we assign it to a const_rtx
3716 const_rtx i2
= next_nonnote_insn (CONST_CAST_RTX (insn
));
3717 if (i2
&& keep_with_call_p (i2
))
3724 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3725 to non-complex jumps. That is, direct unconditional, conditional,
3726 and tablejumps, but not computed jumps or returns. It also does
3727 not apply to the fallthru case of a conditional jump. */
3730 label_is_jump_target_p (const_rtx label
, const_rtx jump_insn
)
3732 rtx tmp
= JUMP_LABEL (jump_insn
);
3737 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3739 rtvec vec
= XVEC (PATTERN (tmp
),
3740 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3741 int i
, veclen
= GET_NUM_ELEM (vec
);
3743 for (i
= 0; i
< veclen
; ++i
)
3744 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3748 if (find_reg_note (jump_insn
, REG_LABEL_TARGET
, label
))
3755 /* Return an estimate of the cost of computing rtx X.
3756 One use is in cse, to decide which expression to keep in the hash table.
3757 Another is in rtl generation, to pick the cheapest way to multiply.
3758 Other uses like the latter are expected in the future.
3760 X appears as operand OPNO in an expression with code OUTER_CODE.
3761 SPEED specifies whether costs optimized for speed or size should
3765 rtx_cost (rtx x
, enum rtx_code outer_code
, int opno
, bool speed
)
3776 /* A size N times larger than UNITS_PER_WORD likely needs N times as
3777 many insns, taking N times as long. */
3778 factor
= GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
;
3782 /* Compute the default costs of certain things.
3783 Note that targetm.rtx_costs can override the defaults. */
3785 code
= GET_CODE (x
);
3789 /* Multiplication has time-complexity O(N*N), where N is the
3790 number of units (translated from digits) when using
3791 schoolbook long multiplication. */
3792 total
= factor
* factor
* COSTS_N_INSNS (5);
3798 /* Similarly, complexity for schoolbook long division. */
3799 total
= factor
* factor
* COSTS_N_INSNS (7);
3802 /* Used in combine.c as a marker. */
3806 /* A SET doesn't have a mode, so let's look at the SET_DEST to get
3807 the mode for the factor. */
3808 factor
= GET_MODE_SIZE (GET_MODE (SET_DEST (x
))) / UNITS_PER_WORD
;
3813 total
= factor
* COSTS_N_INSNS (1);
3823 /* If we can't tie these modes, make this expensive. The larger
3824 the mode, the more expensive it is. */
3825 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3826 return COSTS_N_INSNS (2 + factor
);
3830 if (targetm
.rtx_costs (x
, code
, outer_code
, opno
, &total
, speed
))
3835 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3836 which is already in total. */
3838 fmt
= GET_RTX_FORMAT (code
);
3839 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3841 total
+= rtx_cost (XEXP (x
, i
), code
, i
, speed
);
3842 else if (fmt
[i
] == 'E')
3843 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3844 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
, i
, speed
);
3849 /* Fill in the structure C with information about both speed and size rtx
3850 costs for X, which is operand OPNO in an expression with code OUTER. */
3853 get_full_rtx_cost (rtx x
, enum rtx_code outer
, int opno
,
3854 struct full_rtx_costs
*c
)
3856 c
->speed
= rtx_cost (x
, outer
, opno
, true);
3857 c
->size
= rtx_cost (x
, outer
, opno
, false);
3861 /* Return cost of address expression X.
3862 Expect that X is properly formed address reference.
3864 SPEED parameter specify whether costs optimized for speed or size should
3868 address_cost (rtx x
, enum machine_mode mode
, addr_space_t as
, bool speed
)
3870 /* We may be asked for cost of various unusual addresses, such as operands
3871 of push instruction. It is not worthwhile to complicate writing
3872 of the target hook by such cases. */
3874 if (!memory_address_addr_space_p (mode
, x
, as
))
3877 return targetm
.address_cost (x
, mode
, as
, speed
);
3880 /* If the target doesn't override, compute the cost as with arithmetic. */
3883 default_address_cost (rtx x
, enum machine_mode
, addr_space_t
, bool speed
)
3885 return rtx_cost (x
, MEM
, 0, speed
);
3889 unsigned HOST_WIDE_INT
3890 nonzero_bits (const_rtx x
, enum machine_mode mode
)
3892 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3896 num_sign_bit_copies (const_rtx x
, enum machine_mode mode
)
3898 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3901 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3902 It avoids exponential behavior in nonzero_bits1 when X has
3903 identical subexpressions on the first or the second level. */
3905 static unsigned HOST_WIDE_INT
3906 cached_nonzero_bits (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3907 enum machine_mode known_mode
,
3908 unsigned HOST_WIDE_INT known_ret
)
3910 if (x
== known_x
&& mode
== known_mode
)
3913 /* Try to find identical subexpressions. If found call
3914 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3915 precomputed value for the subexpression as KNOWN_RET. */
3917 if (ARITHMETIC_P (x
))
3919 rtx x0
= XEXP (x
, 0);
3920 rtx x1
= XEXP (x
, 1);
3922 /* Check the first level. */
3924 return nonzero_bits1 (x
, mode
, x0
, mode
,
3925 cached_nonzero_bits (x0
, mode
, known_x
,
3926 known_mode
, known_ret
));
3928 /* Check the second level. */
3929 if (ARITHMETIC_P (x0
)
3930 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3931 return nonzero_bits1 (x
, mode
, x1
, mode
,
3932 cached_nonzero_bits (x1
, mode
, known_x
,
3933 known_mode
, known_ret
));
3935 if (ARITHMETIC_P (x1
)
3936 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3937 return nonzero_bits1 (x
, mode
, x0
, mode
,
3938 cached_nonzero_bits (x0
, mode
, known_x
,
3939 known_mode
, known_ret
));
3942 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3945 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3946 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3947 is less useful. We can't allow both, because that results in exponential
3948 run time recursion. There is a nullstone testcase that triggered
3949 this. This macro avoids accidental uses of num_sign_bit_copies. */
3950 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3952 /* Given an expression, X, compute which bits in X can be nonzero.
3953 We don't care about bits outside of those defined in MODE.
3955 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3956 an arithmetic operation, we can do better. */
3958 static unsigned HOST_WIDE_INT
3959 nonzero_bits1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3960 enum machine_mode known_mode
,
3961 unsigned HOST_WIDE_INT known_ret
)
3963 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3964 unsigned HOST_WIDE_INT inner_nz
;
3966 enum machine_mode inner_mode
;
3967 unsigned int mode_width
= GET_MODE_PRECISION (mode
);
3969 /* For floating-point and vector values, assume all bits are needed. */
3970 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
)
3971 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
3974 /* If X is wider than MODE, use its mode instead. */
3975 if (GET_MODE_PRECISION (GET_MODE (x
)) > mode_width
)
3977 mode
= GET_MODE (x
);
3978 nonzero
= GET_MODE_MASK (mode
);
3979 mode_width
= GET_MODE_PRECISION (mode
);
3982 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3983 /* Our only callers in this case look for single bit values. So
3984 just return the mode mask. Those tests will then be false. */
3987 #ifndef WORD_REGISTER_OPERATIONS
3988 /* If MODE is wider than X, but both are a single word for both the host
3989 and target machines, we can compute this from which bits of the
3990 object might be nonzero in its own mode, taking into account the fact
3991 that on many CISC machines, accessing an object in a wider mode
3992 causes the high-order bits to become undefined. So they are
3993 not known to be zero. */
3995 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3996 && GET_MODE_PRECISION (GET_MODE (x
)) <= BITS_PER_WORD
3997 && GET_MODE_PRECISION (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3998 && GET_MODE_PRECISION (mode
) > GET_MODE_PRECISION (GET_MODE (x
)))
4000 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
4001 known_x
, known_mode
, known_ret
);
4002 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
4007 code
= GET_CODE (x
);
4011 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4012 /* If pointers extend unsigned and this is a pointer in Pmode, say that
4013 all the bits above ptr_mode are known to be zero. */
4014 /* As we do not know which address space the pointer is referring to,
4015 we can do this only if the target does not support different pointer
4016 or address modes depending on the address space. */
4017 if (target_default_pointer_address_modes_p ()
4018 && POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4020 nonzero
&= GET_MODE_MASK (ptr_mode
);
4023 /* Include declared information about alignment of pointers. */
4024 /* ??? We don't properly preserve REG_POINTER changes across
4025 pointer-to-integer casts, so we can't trust it except for
4026 things that we know must be pointers. See execute/960116-1.c. */
4027 if ((x
== stack_pointer_rtx
4028 || x
== frame_pointer_rtx
4029 || x
== arg_pointer_rtx
)
4030 && REGNO_POINTER_ALIGN (REGNO (x
)))
4032 unsigned HOST_WIDE_INT alignment
4033 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
4035 #ifdef PUSH_ROUNDING
4036 /* If PUSH_ROUNDING is defined, it is possible for the
4037 stack to be momentarily aligned only to that amount,
4038 so we pick the least alignment. */
4039 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
4040 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
4044 nonzero
&= ~(alignment
- 1);
4048 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
4049 rtx new_rtx
= rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
4050 known_mode
, known_ret
,
4054 nonzero_for_hook
&= cached_nonzero_bits (new_rtx
, mode
, known_x
,
4055 known_mode
, known_ret
);
4057 return nonzero_for_hook
;
4061 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
4062 /* If X is negative in MODE, sign-extend the value. */
4064 && mode_width
< BITS_PER_WORD
4065 && (UINTVAL (x
) & ((unsigned HOST_WIDE_INT
) 1 << (mode_width
- 1)))
4067 return UINTVAL (x
) | (HOST_WIDE_INT_M1U
<< mode_width
);
4073 #ifdef LOAD_EXTEND_OP
4074 /* In many, if not most, RISC machines, reading a byte from memory
4075 zeros the rest of the register. Noticing that fact saves a lot
4076 of extra zero-extends. */
4077 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
4078 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
4083 case UNEQ
: case LTGT
:
4084 case GT
: case GTU
: case UNGT
:
4085 case LT
: case LTU
: case UNLT
:
4086 case GE
: case GEU
: case UNGE
:
4087 case LE
: case LEU
: case UNLE
:
4088 case UNORDERED
: case ORDERED
:
4089 /* If this produces an integer result, we know which bits are set.
4090 Code here used to clear bits outside the mode of X, but that is
4092 /* Mind that MODE is the mode the caller wants to look at this
4093 operation in, and not the actual operation mode. We can wind
4094 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
4095 that describes the results of a vector compare. */
4096 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
4097 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
4098 nonzero
= STORE_FLAG_VALUE
;
4103 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4104 and num_sign_bit_copies. */
4105 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4106 == GET_MODE_PRECISION (GET_MODE (x
)))
4110 if (GET_MODE_PRECISION (GET_MODE (x
)) < mode_width
)
4111 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
4116 /* Disabled to avoid exponential mutual recursion between nonzero_bits
4117 and num_sign_bit_copies. */
4118 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
4119 == GET_MODE_PRECISION (GET_MODE (x
)))
4125 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
4126 known_x
, known_mode
, known_ret
)
4127 & GET_MODE_MASK (mode
));
4131 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4132 known_x
, known_mode
, known_ret
);
4133 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4134 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4138 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
4139 Otherwise, show all the bits in the outer mode but not the inner
4141 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
4142 known_x
, known_mode
, known_ret
);
4143 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
4145 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
4146 if (val_signbit_known_set_p (GET_MODE (XEXP (x
, 0)), inner_nz
))
4147 inner_nz
|= (GET_MODE_MASK (mode
)
4148 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
4151 nonzero
&= inner_nz
;
4155 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
4156 known_x
, known_mode
, known_ret
)
4157 & cached_nonzero_bits (XEXP (x
, 1), mode
,
4158 known_x
, known_mode
, known_ret
);
4162 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
4164 unsigned HOST_WIDE_INT nonzero0
4165 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4166 known_x
, known_mode
, known_ret
);
4168 /* Don't call nonzero_bits for the second time if it cannot change
4170 if ((nonzero
& nonzero0
) != nonzero
)
4172 | cached_nonzero_bits (XEXP (x
, 1), mode
,
4173 known_x
, known_mode
, known_ret
);
4177 case PLUS
: case MINUS
:
4179 case DIV
: case UDIV
:
4180 case MOD
: case UMOD
:
4181 /* We can apply the rules of arithmetic to compute the number of
4182 high- and low-order zero bits of these operations. We start by
4183 computing the width (position of the highest-order nonzero bit)
4184 and the number of low-order zero bits for each value. */
4186 unsigned HOST_WIDE_INT nz0
4187 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4188 known_x
, known_mode
, known_ret
);
4189 unsigned HOST_WIDE_INT nz1
4190 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4191 known_x
, known_mode
, known_ret
);
4192 int sign_index
= GET_MODE_PRECISION (GET_MODE (x
)) - 1;
4193 int width0
= floor_log2 (nz0
) + 1;
4194 int width1
= floor_log2 (nz1
) + 1;
4195 int low0
= floor_log2 (nz0
& -nz0
);
4196 int low1
= floor_log2 (nz1
& -nz1
);
4197 unsigned HOST_WIDE_INT op0_maybe_minusp
4198 = nz0
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4199 unsigned HOST_WIDE_INT op1_maybe_minusp
4200 = nz1
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
4201 unsigned int result_width
= mode_width
;
4207 result_width
= MAX (width0
, width1
) + 1;
4208 result_low
= MIN (low0
, low1
);
4211 result_low
= MIN (low0
, low1
);
4214 result_width
= width0
+ width1
;
4215 result_low
= low0
+ low1
;
4220 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4221 result_width
= width0
;
4226 result_width
= width0
;
4231 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4232 result_width
= MIN (width0
, width1
);
4233 result_low
= MIN (low0
, low1
);
4238 result_width
= MIN (width0
, width1
);
4239 result_low
= MIN (low0
, low1
);
4245 if (result_width
< mode_width
)
4246 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << result_width
) - 1;
4249 nonzero
&= ~(((unsigned HOST_WIDE_INT
) 1 << result_low
) - 1);
4254 if (CONST_INT_P (XEXP (x
, 1))
4255 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
4256 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
4260 /* If this is a SUBREG formed for a promoted variable that has
4261 been zero-extended, we know that at least the high-order bits
4262 are zero, though others might be too. */
4264 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
4265 nonzero
= GET_MODE_MASK (GET_MODE (x
))
4266 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
4267 known_x
, known_mode
, known_ret
);
4269 inner_mode
= GET_MODE (SUBREG_REG (x
));
4270 /* If the inner mode is a single word for both the host and target
4271 machines, we can compute this from which bits of the inner
4272 object might be nonzero. */
4273 if (GET_MODE_PRECISION (inner_mode
) <= BITS_PER_WORD
4274 && (GET_MODE_PRECISION (inner_mode
) <= HOST_BITS_PER_WIDE_INT
))
4276 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
4277 known_x
, known_mode
, known_ret
);
4279 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4280 /* If this is a typical RISC machine, we only have to worry
4281 about the way loads are extended. */
4282 if ((LOAD_EXTEND_OP (inner_mode
) == SIGN_EXTEND
4283 ? val_signbit_known_set_p (inner_mode
, nonzero
)
4284 : LOAD_EXTEND_OP (inner_mode
) != ZERO_EXTEND
)
4285 || !MEM_P (SUBREG_REG (x
)))
4288 /* On many CISC machines, accessing an object in a wider mode
4289 causes the high-order bits to become undefined. So they are
4290 not known to be zero. */
4291 if (GET_MODE_PRECISION (GET_MODE (x
))
4292 > GET_MODE_PRECISION (inner_mode
))
4293 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
4294 & ~GET_MODE_MASK (inner_mode
));
4303 /* The nonzero bits are in two classes: any bits within MODE
4304 that aren't in GET_MODE (x) are always significant. The rest of the
4305 nonzero bits are those that are significant in the operand of
4306 the shift when shifted the appropriate number of bits. This
4307 shows that high-order bits are cleared by the right shift and
4308 low-order bits by left shifts. */
4309 if (CONST_INT_P (XEXP (x
, 1))
4310 && INTVAL (XEXP (x
, 1)) >= 0
4311 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
4312 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4314 enum machine_mode inner_mode
= GET_MODE (x
);
4315 unsigned int width
= GET_MODE_PRECISION (inner_mode
);
4316 int count
= INTVAL (XEXP (x
, 1));
4317 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
4318 unsigned HOST_WIDE_INT op_nonzero
4319 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4320 known_x
, known_mode
, known_ret
);
4321 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
4322 unsigned HOST_WIDE_INT outer
= 0;
4324 if (mode_width
> width
)
4325 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
4327 if (code
== LSHIFTRT
)
4329 else if (code
== ASHIFTRT
)
4333 /* If the sign bit may have been nonzero before the shift, we
4334 need to mark all the places it could have been copied to
4335 by the shift as possibly nonzero. */
4336 if (inner
& ((unsigned HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
4337 inner
|= (((unsigned HOST_WIDE_INT
) 1 << count
) - 1)
4340 else if (code
== ASHIFT
)
4343 inner
= ((inner
<< (count
% width
)
4344 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
4346 nonzero
&= (outer
| inner
);
4352 /* This is at most the number of bits in the mode. */
4353 nonzero
= ((unsigned HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
4357 /* If CLZ has a known value at zero, then the nonzero bits are
4358 that value, plus the number of bits in the mode minus one. */
4359 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4361 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4367 /* If CTZ has a known value at zero, then the nonzero bits are
4368 that value, plus the number of bits in the mode minus one. */
4369 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4371 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4377 /* This is at most the number of bits in the mode minus 1. */
4378 nonzero
= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4387 unsigned HOST_WIDE_INT nonzero_true
4388 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4389 known_x
, known_mode
, known_ret
);
4391 /* Don't call nonzero_bits for the second time if it cannot change
4393 if ((nonzero
& nonzero_true
) != nonzero
)
4394 nonzero
&= nonzero_true
4395 | cached_nonzero_bits (XEXP (x
, 2), mode
,
4396 known_x
, known_mode
, known_ret
);
4407 /* See the macro definition above. */
4408 #undef cached_num_sign_bit_copies
4411 /* The function cached_num_sign_bit_copies is a wrapper around
4412 num_sign_bit_copies1. It avoids exponential behavior in
4413 num_sign_bit_copies1 when X has identical subexpressions on the
4414 first or the second level. */
4417 cached_num_sign_bit_copies (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4418 enum machine_mode known_mode
,
4419 unsigned int known_ret
)
4421 if (x
== known_x
&& mode
== known_mode
)
4424 /* Try to find identical subexpressions. If found call
4425 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4426 the precomputed value for the subexpression as KNOWN_RET. */
4428 if (ARITHMETIC_P (x
))
4430 rtx x0
= XEXP (x
, 0);
4431 rtx x1
= XEXP (x
, 1);
4433 /* Check the first level. */
4436 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4437 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4441 /* Check the second level. */
4442 if (ARITHMETIC_P (x0
)
4443 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4445 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4446 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4450 if (ARITHMETIC_P (x1
)
4451 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4453 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4454 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4459 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4462 /* Return the number of bits at the high-order end of X that are known to
4463 be equal to the sign bit. X will be used in mode MODE; if MODE is
4464 VOIDmode, X will be used in its own mode. The returned value will always
4465 be between 1 and the number of bits in MODE. */
4468 num_sign_bit_copies1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4469 enum machine_mode known_mode
,
4470 unsigned int known_ret
)
4472 enum rtx_code code
= GET_CODE (x
);
4473 unsigned int bitwidth
= GET_MODE_PRECISION (mode
);
4474 int num0
, num1
, result
;
4475 unsigned HOST_WIDE_INT nonzero
;
4477 /* If we weren't given a mode, use the mode of X. If the mode is still
4478 VOIDmode, we don't know anything. Likewise if one of the modes is
4481 if (mode
== VOIDmode
)
4482 mode
= GET_MODE (x
);
4484 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
))
4485 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
4488 /* For a smaller object, just ignore the high bits. */
4489 if (bitwidth
< GET_MODE_PRECISION (GET_MODE (x
)))
4491 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4492 known_x
, known_mode
, known_ret
);
4494 num0
- (int) (GET_MODE_PRECISION (GET_MODE (x
)) - bitwidth
));
4497 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_PRECISION (GET_MODE (x
)))
4499 #ifndef WORD_REGISTER_OPERATIONS
4500 /* If this machine does not do all register operations on the entire
4501 register and MODE is wider than the mode of X, we can say nothing
4502 at all about the high-order bits. */
4505 /* Likewise on machines that do, if the mode of the object is smaller
4506 than a word and loads of that size don't sign extend, we can say
4507 nothing about the high order bits. */
4508 if (GET_MODE_PRECISION (GET_MODE (x
)) < BITS_PER_WORD
4509 #ifdef LOAD_EXTEND_OP
4510 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4521 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4522 /* If pointers extend signed and this is a pointer in Pmode, say that
4523 all the bits above ptr_mode are known to be sign bit copies. */
4524 /* As we do not know which address space the pointer is referring to,
4525 we can do this only if the target does not support different pointer
4526 or address modes depending on the address space. */
4527 if (target_default_pointer_address_modes_p ()
4528 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4529 && mode
== Pmode
&& REG_POINTER (x
))
4530 return GET_MODE_PRECISION (Pmode
) - GET_MODE_PRECISION (ptr_mode
) + 1;
4534 unsigned int copies_for_hook
= 1, copies
= 1;
4535 rtx new_rtx
= rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4536 known_mode
, known_ret
,
4540 copies
= cached_num_sign_bit_copies (new_rtx
, mode
, known_x
,
4541 known_mode
, known_ret
);
4543 if (copies
> 1 || copies_for_hook
> 1)
4544 return MAX (copies
, copies_for_hook
);
4546 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4551 #ifdef LOAD_EXTEND_OP
4552 /* Some RISC machines sign-extend all loads of smaller than a word. */
4553 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4554 return MAX (1, ((int) bitwidth
4555 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1));
4560 /* If the constant is negative, take its 1's complement and remask.
4561 Then see how many zero bits we have. */
4562 nonzero
= UINTVAL (x
) & GET_MODE_MASK (mode
);
4563 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4564 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4565 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4567 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4570 /* If this is a SUBREG for a promoted object that is sign-extended
4571 and we are looking at it in a wider mode, we know that at least the
4572 high-order bits are known to be sign bit copies. */
4574 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4576 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4577 known_x
, known_mode
, known_ret
);
4578 return MAX ((int) bitwidth
4579 - (int) GET_MODE_PRECISION (GET_MODE (x
)) + 1,
4583 /* For a smaller object, just ignore the high bits. */
4584 if (bitwidth
<= GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
))))
4586 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4587 known_x
, known_mode
, known_ret
);
4588 return MAX (1, (num0
4589 - (int) (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x
)))
4593 #ifdef WORD_REGISTER_OPERATIONS
4594 #ifdef LOAD_EXTEND_OP
4595 /* For paradoxical SUBREGs on machines where all register operations
4596 affect the entire register, just look inside. Note that we are
4597 passing MODE to the recursive call, so the number of sign bit copies
4598 will remain relative to that mode, not the inner mode. */
4600 /* This works only if loads sign extend. Otherwise, if we get a
4601 reload for the inner part, it may be loaded from the stack, and
4602 then we lose all sign bit copies that existed before the store
4605 if (paradoxical_subreg_p (x
)
4606 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4607 && MEM_P (SUBREG_REG (x
)))
4608 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4609 known_x
, known_mode
, known_ret
);
4615 if (CONST_INT_P (XEXP (x
, 1)))
4616 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4620 return (bitwidth
- GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4621 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4622 known_x
, known_mode
, known_ret
));
4625 /* For a smaller object, just ignore the high bits. */
4626 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4627 known_x
, known_mode
, known_ret
);
4628 return MAX (1, (num0
- (int) (GET_MODE_PRECISION (GET_MODE (XEXP (x
, 0)))
4632 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4633 known_x
, known_mode
, known_ret
);
4635 case ROTATE
: case ROTATERT
:
4636 /* If we are rotating left by a number of bits less than the number
4637 of sign bit copies, we can just subtract that amount from the
4639 if (CONST_INT_P (XEXP (x
, 1))
4640 && INTVAL (XEXP (x
, 1)) >= 0
4641 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4643 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4644 known_x
, known_mode
, known_ret
);
4645 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4646 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4651 /* In general, this subtracts one sign bit copy. But if the value
4652 is known to be positive, the number of sign bit copies is the
4653 same as that of the input. Finally, if the input has just one bit
4654 that might be nonzero, all the bits are copies of the sign bit. */
4655 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4656 known_x
, known_mode
, known_ret
);
4657 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4658 return num0
> 1 ? num0
- 1 : 1;
4660 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4665 && (((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4670 case IOR
: case AND
: case XOR
:
4671 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4672 /* Logical operations will preserve the number of sign-bit copies.
4673 MIN and MAX operations always return one of the operands. */
4674 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4675 known_x
, known_mode
, known_ret
);
4676 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4677 known_x
, known_mode
, known_ret
);
4679 /* If num1 is clearing some of the top bits then regardless of
4680 the other term, we are guaranteed to have at least that many
4681 high-order zero bits. */
4684 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4685 && CONST_INT_P (XEXP (x
, 1))
4686 && (UINTVAL (XEXP (x
, 1))
4687 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) == 0)
4690 /* Similarly for IOR when setting high-order bits. */
4693 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4694 && CONST_INT_P (XEXP (x
, 1))
4695 && (UINTVAL (XEXP (x
, 1))
4696 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4699 return MIN (num0
, num1
);
4701 case PLUS
: case MINUS
:
4702 /* For addition and subtraction, we can have a 1-bit carry. However,
4703 if we are subtracting 1 from a positive number, there will not
4704 be such a carry. Furthermore, if the positive number is known to
4705 be 0 or 1, we know the result is either -1 or 0. */
4707 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4708 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4710 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4711 if ((((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4712 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4713 : bitwidth
- floor_log2 (nonzero
) - 1);
4716 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4717 known_x
, known_mode
, known_ret
);
4718 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4719 known_x
, known_mode
, known_ret
);
4720 result
= MAX (1, MIN (num0
, num1
) - 1);
4725 /* The number of bits of the product is the sum of the number of
4726 bits of both terms. However, unless one of the terms if known
4727 to be positive, we must allow for an additional bit since negating
4728 a negative number can remove one sign bit copy. */
4730 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4731 known_x
, known_mode
, known_ret
);
4732 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4733 known_x
, known_mode
, known_ret
);
4735 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4737 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4738 || (((nonzero_bits (XEXP (x
, 0), mode
)
4739 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4740 && ((nonzero_bits (XEXP (x
, 1), mode
)
4741 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)))
4745 return MAX (1, result
);
4748 /* The result must be <= the first operand. If the first operand
4749 has the high bit set, we know nothing about the number of sign
4751 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4753 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4754 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4757 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4758 known_x
, known_mode
, known_ret
);
4761 /* The result must be <= the second operand. If the second operand
4762 has (or just might have) the high bit set, we know nothing about
4763 the number of sign bit copies. */
4764 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4766 else if ((nonzero_bits (XEXP (x
, 1), mode
)
4767 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4770 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4771 known_x
, known_mode
, known_ret
);
4774 /* Similar to unsigned division, except that we have to worry about
4775 the case where the divisor is negative, in which case we have
4777 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4778 known_x
, known_mode
, known_ret
);
4780 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4781 || (nonzero_bits (XEXP (x
, 1), mode
)
4782 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4788 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4789 known_x
, known_mode
, known_ret
);
4791 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4792 || (nonzero_bits (XEXP (x
, 1), mode
)
4793 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4799 /* Shifts by a constant add to the number of bits equal to the
4801 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4802 known_x
, known_mode
, known_ret
);
4803 if (CONST_INT_P (XEXP (x
, 1))
4804 && INTVAL (XEXP (x
, 1)) > 0
4805 && INTVAL (XEXP (x
, 1)) < GET_MODE_PRECISION (GET_MODE (x
)))
4806 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4811 /* Left shifts destroy copies. */
4812 if (!CONST_INT_P (XEXP (x
, 1))
4813 || INTVAL (XEXP (x
, 1)) < 0
4814 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
4815 || INTVAL (XEXP (x
, 1)) >= GET_MODE_PRECISION (GET_MODE (x
)))
4818 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4819 known_x
, known_mode
, known_ret
);
4820 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4823 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4824 known_x
, known_mode
, known_ret
);
4825 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4826 known_x
, known_mode
, known_ret
);
4827 return MIN (num0
, num1
);
4829 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4830 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4831 case GEU
: case GTU
: case LEU
: case LTU
:
4832 case UNORDERED
: case ORDERED
:
4833 /* If the constant is negative, take its 1's complement and remask.
4834 Then see how many zero bits we have. */
4835 nonzero
= STORE_FLAG_VALUE
;
4836 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4837 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4838 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4840 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4846 /* If we haven't been able to figure it out by one of the above rules,
4847 see if some of the high-order bits are known to be zero. If so,
4848 count those bits and return one less than that amount. If we can't
4849 safely compute the mask for this mode, always return BITWIDTH. */
4851 bitwidth
= GET_MODE_PRECISION (mode
);
4852 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4855 nonzero
= nonzero_bits (x
, mode
);
4856 return nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4857 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4860 /* Calculate the rtx_cost of a single instruction. A return value of
4861 zero indicates an instruction pattern without a known cost. */
4864 insn_rtx_cost (rtx pat
, bool speed
)
4869 /* Extract the single set rtx from the instruction pattern.
4870 We can't use single_set since we only have the pattern. */
4871 if (GET_CODE (pat
) == SET
)
4873 else if (GET_CODE (pat
) == PARALLEL
)
4876 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4878 rtx x
= XVECEXP (pat
, 0, i
);
4879 if (GET_CODE (x
) == SET
)
4892 cost
= set_src_cost (SET_SRC (set
), speed
);
4893 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4896 /* Given an insn INSN and condition COND, return the condition in a
4897 canonical form to simplify testing by callers. Specifically:
4899 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4900 (2) Both operands will be machine operands; (cc0) will have been replaced.
4901 (3) If an operand is a constant, it will be the second operand.
4902 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4903 for GE, GEU, and LEU.
4905 If the condition cannot be understood, or is an inequality floating-point
4906 comparison which needs to be reversed, 0 will be returned.
4908 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4910 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4911 insn used in locating the condition was found. If a replacement test
4912 of the condition is desired, it should be placed in front of that
4913 insn and we will be sure that the inputs are still valid.
4915 If WANT_REG is nonzero, we wish the condition to be relative to that
4916 register, if possible. Therefore, do not canonicalize the condition
4917 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4918 to be a compare to a CC mode register.
4920 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4924 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4925 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4932 int reverse_code
= 0;
4933 enum machine_mode mode
;
4934 basic_block bb
= BLOCK_FOR_INSN (insn
);
4936 code
= GET_CODE (cond
);
4937 mode
= GET_MODE (cond
);
4938 op0
= XEXP (cond
, 0);
4939 op1
= XEXP (cond
, 1);
4942 code
= reversed_comparison_code (cond
, insn
);
4943 if (code
== UNKNOWN
)
4949 /* If we are comparing a register with zero, see if the register is set
4950 in the previous insn to a COMPARE or a comparison operation. Perform
4951 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4954 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4955 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4956 && op1
== CONST0_RTX (GET_MODE (op0
))
4959 /* Set nonzero when we find something of interest. */
4963 /* If comparison with cc0, import actual comparison from compare
4967 if ((prev
= prev_nonnote_insn (prev
)) == 0
4968 || !NONJUMP_INSN_P (prev
)
4969 || (set
= single_set (prev
)) == 0
4970 || SET_DEST (set
) != cc0_rtx
)
4973 op0
= SET_SRC (set
);
4974 op1
= CONST0_RTX (GET_MODE (op0
));
4980 /* If this is a COMPARE, pick up the two things being compared. */
4981 if (GET_CODE (op0
) == COMPARE
)
4983 op1
= XEXP (op0
, 1);
4984 op0
= XEXP (op0
, 0);
4987 else if (!REG_P (op0
))
4990 /* Go back to the previous insn. Stop if it is not an INSN. We also
4991 stop if it isn't a single set or if it has a REG_INC note because
4992 we don't want to bother dealing with it. */
4994 prev
= prev_nonnote_nondebug_insn (prev
);
4997 || !NONJUMP_INSN_P (prev
)
4998 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4999 /* In cfglayout mode, there do not have to be labels at the
5000 beginning of a block, or jumps at the end, so the previous
5001 conditions would not stop us when we reach bb boundary. */
5002 || BLOCK_FOR_INSN (prev
) != bb
)
5005 set
= set_of (op0
, prev
);
5008 && (GET_CODE (set
) != SET
5009 || !rtx_equal_p (SET_DEST (set
), op0
)))
5012 /* If this is setting OP0, get what it sets it to if it looks
5016 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
5017 #ifdef FLOAT_STORE_FLAG_VALUE
5018 REAL_VALUE_TYPE fsfv
;
5021 /* ??? We may not combine comparisons done in a CCmode with
5022 comparisons not done in a CCmode. This is to aid targets
5023 like Alpha that have an IEEE compliant EQ instruction, and
5024 a non-IEEE compliant BEQ instruction. The use of CCmode is
5025 actually artificial, simply to prevent the combination, but
5026 should not affect other platforms.
5028 However, we must allow VOIDmode comparisons to match either
5029 CCmode or non-CCmode comparison, because some ports have
5030 modeless comparisons inside branch patterns.
5032 ??? This mode check should perhaps look more like the mode check
5033 in simplify_comparison in combine. */
5035 if ((GET_CODE (SET_SRC (set
)) == COMPARE
5038 && val_signbit_known_set_p (inner_mode
,
5040 #ifdef FLOAT_STORE_FLAG_VALUE
5042 && SCALAR_FLOAT_MODE_P (inner_mode
)
5043 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5044 REAL_VALUE_NEGATIVE (fsfv
)))
5047 && COMPARISON_P (SET_SRC (set
))))
5048 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5049 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5050 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5052 else if (((code
== EQ
5054 && val_signbit_known_set_p (inner_mode
,
5056 #ifdef FLOAT_STORE_FLAG_VALUE
5058 && SCALAR_FLOAT_MODE_P (inner_mode
)
5059 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
5060 REAL_VALUE_NEGATIVE (fsfv
)))
5063 && COMPARISON_P (SET_SRC (set
))
5064 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
5065 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
5066 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
5076 else if (reg_set_p (op0
, prev
))
5077 /* If this sets OP0, but not directly, we have to give up. */
5082 /* If the caller is expecting the condition to be valid at INSN,
5083 make sure X doesn't change before INSN. */
5084 if (valid_at_insn_p
)
5085 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
5087 if (COMPARISON_P (x
))
5088 code
= GET_CODE (x
);
5091 code
= reversed_comparison_code (x
, prev
);
5092 if (code
== UNKNOWN
)
5097 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
5103 /* If constant is first, put it last. */
5104 if (CONSTANT_P (op0
))
5105 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
5107 /* If OP0 is the result of a comparison, we weren't able to find what
5108 was really being compared, so fail. */
5110 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
5113 /* Canonicalize any ordered comparison with integers involving equality
5114 if we can do computations in the relevant mode and we do not
5117 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
5118 && CONST_INT_P (op1
)
5119 && GET_MODE (op0
) != VOIDmode
5120 && GET_MODE_PRECISION (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
5122 HOST_WIDE_INT const_val
= INTVAL (op1
);
5123 unsigned HOST_WIDE_INT uconst_val
= const_val
;
5124 unsigned HOST_WIDE_INT max_val
5125 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
5130 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
5131 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
5134 /* When cross-compiling, const_val might be sign-extended from
5135 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
5137 if ((const_val
& max_val
)
5138 != ((unsigned HOST_WIDE_INT
) 1
5139 << (GET_MODE_PRECISION (GET_MODE (op0
)) - 1)))
5140 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
5144 if (uconst_val
< max_val
)
5145 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
5149 if (uconst_val
!= 0)
5150 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
5158 /* Never return CC0; return zero instead. */
5162 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
5165 /* Given a jump insn JUMP, return the condition that will cause it to branch
5166 to its JUMP_LABEL. If the condition cannot be understood, or is an
5167 inequality floating-point comparison which needs to be reversed, 0 will
5170 If EARLIEST is nonzero, it is a pointer to a place where the earliest
5171 insn used in locating the condition was found. If a replacement test
5172 of the condition is desired, it should be placed in front of that
5173 insn and we will be sure that the inputs are still valid. If EARLIEST
5174 is null, the returned condition will be valid at INSN.
5176 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
5177 compare CC mode register.
5179 VALID_AT_INSN_P is the same as for canonicalize_condition. */
5182 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
5188 /* If this is not a standard conditional jump, we can't parse it. */
5190 || ! any_condjump_p (jump
))
5192 set
= pc_set (jump
);
5194 cond
= XEXP (SET_SRC (set
), 0);
5196 /* If this branches to JUMP_LABEL when the condition is false, reverse
5199 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
5200 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
5202 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
5203 allow_cc_mode
, valid_at_insn_p
);
5206 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
5207 TARGET_MODE_REP_EXTENDED.
5209 Note that we assume that the property of
5210 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
5211 narrower than mode B. I.e., if A is a mode narrower than B then in
5212 order to be able to operate on it in mode B, mode A needs to
5213 satisfy the requirements set by the representation of mode B. */
5216 init_num_sign_bit_copies_in_rep (void)
5218 enum machine_mode mode
, in_mode
;
5220 for (in_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); in_mode
!= VOIDmode
;
5221 in_mode
= GET_MODE_WIDER_MODE (mode
))
5222 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= in_mode
;
5223 mode
= GET_MODE_WIDER_MODE (mode
))
5225 enum machine_mode i
;
5227 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
5228 extends to the next widest mode. */
5229 gcc_assert (targetm
.mode_rep_extended (mode
, in_mode
) == UNKNOWN
5230 || GET_MODE_WIDER_MODE (mode
) == in_mode
);
5232 /* We are in in_mode. Count how many bits outside of mode
5233 have to be copies of the sign-bit. */
5234 for (i
= mode
; i
!= in_mode
; i
= GET_MODE_WIDER_MODE (i
))
5236 enum machine_mode wider
= GET_MODE_WIDER_MODE (i
);
5238 if (targetm
.mode_rep_extended (i
, wider
) == SIGN_EXTEND
5239 /* We can only check sign-bit copies starting from the
5240 top-bit. In order to be able to check the bits we
5241 have already seen we pretend that subsequent bits
5242 have to be sign-bit copies too. */
5243 || num_sign_bit_copies_in_rep
[in_mode
][mode
])
5244 num_sign_bit_copies_in_rep
[in_mode
][mode
]
5245 += GET_MODE_PRECISION (wider
) - GET_MODE_PRECISION (i
);
5250 /* Suppose that truncation from the machine mode of X to MODE is not a
5251 no-op. See if there is anything special about X so that we can
5252 assume it already contains a truncated value of MODE. */
5255 truncated_to_mode (enum machine_mode mode
, const_rtx x
)
5257 /* This register has already been used in MODE without explicit
5259 if (REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
))
5262 /* See if we already satisfy the requirements of MODE. If yes we
5263 can just switch to MODE. */
5264 if (num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
]
5265 && (num_sign_bit_copies (x
, GET_MODE (x
))
5266 >= num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
] + 1))
5272 /* Initialize non_rtx_starting_operands, which is used to speed up
5278 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5280 const char *format
= GET_RTX_FORMAT (i
);
5281 const char *first
= strpbrk (format
, "eEV");
5282 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
5285 init_num_sign_bit_copies_in_rep ();
5288 /* Check whether this is a constant pool constant. */
5290 constant_pool_constant_p (rtx x
)
5292 x
= avoid_constant_pool_reference (x
);
5293 return CONST_DOUBLE_P (x
);
5296 /* If M is a bitmask that selects a field of low-order bits within an item but
5297 not the entire word, return the length of the field. Return -1 otherwise.
5298 M is used in machine mode MODE. */
5301 low_bitmask_len (enum machine_mode mode
, unsigned HOST_WIDE_INT m
)
5303 if (mode
!= VOIDmode
)
5305 if (GET_MODE_PRECISION (mode
) > HOST_BITS_PER_WIDE_INT
)
5307 m
&= GET_MODE_MASK (mode
);
5310 return exact_log2 (m
+ 1);
5313 /* Return the mode of MEM's address. */
5316 get_address_mode (rtx mem
)
5318 enum machine_mode mode
;
5320 gcc_assert (MEM_P (mem
));
5321 mode
= GET_MODE (XEXP (mem
, 0));
5322 if (mode
!= VOIDmode
)
5324 return targetm
.addr_space
.address_mode (MEM_ADDR_SPACE (mem
));
5327 /* Split up a CONST_DOUBLE or integer constant rtx
5328 into two rtx's for single words,
5329 storing in *FIRST the word that comes first in memory in the target
5330 and in *SECOND the other. */
5333 split_double (rtx value
, rtx
*first
, rtx
*second
)
5335 if (CONST_INT_P (value
))
5337 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
5339 /* In this case the CONST_INT holds both target words.
5340 Extract the bits from it into two word-sized pieces.
5341 Sign extend each half to HOST_WIDE_INT. */
5342 unsigned HOST_WIDE_INT low
, high
;
5343 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
5344 unsigned bits_per_word
= BITS_PER_WORD
;
5346 /* Set sign_bit to the most significant bit of a word. */
5348 sign_bit
<<= bits_per_word
- 1;
5350 /* Set mask so that all bits of the word are set. We could
5351 have used 1 << BITS_PER_WORD instead of basing the
5352 calculation on sign_bit. However, on machines where
5353 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
5354 compiler warning, even though the code would never be
5356 mask
= sign_bit
<< 1;
5359 /* Set sign_extend as any remaining bits. */
5360 sign_extend
= ~mask
;
5362 /* Pick the lower word and sign-extend it. */
5363 low
= INTVAL (value
);
5368 /* Pick the higher word, shifted to the least significant
5369 bits, and sign-extend it. */
5370 high
= INTVAL (value
);
5371 high
>>= bits_per_word
- 1;
5374 if (high
& sign_bit
)
5375 high
|= sign_extend
;
5377 /* Store the words in the target machine order. */
5378 if (WORDS_BIG_ENDIAN
)
5380 *first
= GEN_INT (high
);
5381 *second
= GEN_INT (low
);
5385 *first
= GEN_INT (low
);
5386 *second
= GEN_INT (high
);
5391 /* The rule for using CONST_INT for a wider mode
5392 is that we regard the value as signed.
5393 So sign-extend it. */
5394 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
5395 if (WORDS_BIG_ENDIAN
)
5407 else if (!CONST_DOUBLE_P (value
))
5409 if (WORDS_BIG_ENDIAN
)
5411 *first
= const0_rtx
;
5417 *second
= const0_rtx
;
5420 else if (GET_MODE (value
) == VOIDmode
5421 /* This is the old way we did CONST_DOUBLE integers. */
5422 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
5424 /* In an integer, the words are defined as most and least significant.
5425 So order them by the target's convention. */
5426 if (WORDS_BIG_ENDIAN
)
5428 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5429 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
5433 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
5434 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
5441 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
5443 /* Note, this converts the REAL_VALUE_TYPE to the target's
5444 format, splits up the floating point double and outputs
5445 exactly 32 bits of it into each of l[0] and l[1] --
5446 not necessarily BITS_PER_WORD bits. */
5447 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
5449 /* If 32 bits is an entire word for the target, but not for the host,
5450 then sign-extend on the host so that the number will look the same
5451 way on the host that it would on the target. See for instance
5452 simplify_unary_operation. The #if is needed to avoid compiler
5455 #if HOST_BITS_PER_LONG > 32
5456 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
5458 if (l
[0] & ((long) 1 << 31))
5459 l
[0] |= ((long) (-1) << 32);
5460 if (l
[1] & ((long) 1 << 31))
5461 l
[1] |= ((long) (-1) << 32);
5465 *first
= GEN_INT (l
[0]);
5466 *second
= GEN_INT (l
[1]);
5470 /* Return true if X is a sign_extract or zero_extract from the least
5474 lsb_bitfield_op_p (rtx x
)
5476 if (GET_RTX_CLASS (GET_CODE (x
)) == RTX_BITFIELD_OPS
)
5478 enum machine_mode mode
= GET_MODE (XEXP (x
, 0));
5479 HOST_WIDE_INT len
= INTVAL (XEXP (x
, 1));
5480 HOST_WIDE_INT pos
= INTVAL (XEXP (x
, 2));
5482 return (pos
== (BITS_BIG_ENDIAN
? GET_MODE_PRECISION (mode
) - len
: 0));
5487 /* Strip outer address "mutations" from LOC and return a pointer to the
5488 inner value. If OUTER_CODE is nonnull, store the code of the innermost
5489 stripped expression there.
5491 "Mutations" either convert between modes or apply some kind of
5492 extension, truncation or alignment. */
5495 strip_address_mutations (rtx
*loc
, enum rtx_code
*outer_code
)
5499 enum rtx_code code
= GET_CODE (*loc
);
5500 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
5501 /* Things like SIGN_EXTEND, ZERO_EXTEND and TRUNCATE can be
5502 used to convert between pointer sizes. */
5503 loc
= &XEXP (*loc
, 0);
5504 else if (lsb_bitfield_op_p (*loc
))
5505 /* A [SIGN|ZERO]_EXTRACT from the least significant bit effectively
5506 acts as a combined truncation and extension. */
5507 loc
= &XEXP (*loc
, 0);
5508 else if (code
== AND
&& CONST_INT_P (XEXP (*loc
, 1)))
5509 /* (and ... (const_int -X)) is used to align to X bytes. */
5510 loc
= &XEXP (*loc
, 0);
5511 else if (code
== SUBREG
5512 && !OBJECT_P (SUBREG_REG (*loc
))
5513 && subreg_lowpart_p (*loc
))
5514 /* (subreg (operator ...) ...) inside and is used for mode
5516 loc
= &SUBREG_REG (*loc
);
5524 /* Return true if CODE applies some kind of scale. The scaled value is
5525 is the first operand and the scale is the second. */
5528 binary_scale_code_p (enum rtx_code code
)
5530 return (code
== MULT
5532 /* Needed by ARM targets. */
5536 || code
== ROTATERT
);
5539 /* If *INNER can be interpreted as a base, return a pointer to the inner term
5540 (see address_info). Return null otherwise. */
5543 get_base_term (rtx
*inner
)
5545 if (GET_CODE (*inner
) == LO_SUM
)
5546 inner
= strip_address_mutations (&XEXP (*inner
, 0));
5549 || GET_CODE (*inner
) == SUBREG
)
5554 /* If *INNER can be interpreted as an index, return a pointer to the inner term
5555 (see address_info). Return null otherwise. */
5558 get_index_term (rtx
*inner
)
5560 /* At present, only constant scales are allowed. */
5561 if (binary_scale_code_p (GET_CODE (*inner
)) && CONSTANT_P (XEXP (*inner
, 1)))
5562 inner
= strip_address_mutations (&XEXP (*inner
, 0));
5565 || GET_CODE (*inner
) == SUBREG
)
5570 /* Set the segment part of address INFO to LOC, given that INNER is the
5574 set_address_segment (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5576 gcc_assert (!info
->segment
);
5577 info
->segment
= loc
;
5578 info
->segment_term
= inner
;
5581 /* Set the base part of address INFO to LOC, given that INNER is the
5585 set_address_base (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5587 gcc_assert (!info
->base
);
5589 info
->base_term
= inner
;
5592 /* Set the index part of address INFO to LOC, given that INNER is the
5596 set_address_index (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5598 gcc_assert (!info
->index
);
5600 info
->index_term
= inner
;
5603 /* Set the displacement part of address INFO to LOC, given that INNER
5604 is the constant term. */
5607 set_address_disp (struct address_info
*info
, rtx
*loc
, rtx
*inner
)
5609 gcc_assert (!info
->disp
);
5611 info
->disp_term
= inner
;
5614 /* INFO->INNER describes a {PRE,POST}_{INC,DEC} address. Set up the
5615 rest of INFO accordingly. */
5618 decompose_incdec_address (struct address_info
*info
)
5620 info
->autoinc_p
= true;
5622 rtx
*base
= &XEXP (*info
->inner
, 0);
5623 set_address_base (info
, base
, base
);
5624 gcc_checking_assert (info
->base
== info
->base_term
);
5626 /* These addresses are only valid when the size of the addressed
5628 gcc_checking_assert (info
->mode
!= VOIDmode
);
5631 /* INFO->INNER describes a {PRE,POST}_MODIFY address. Set up the rest
5632 of INFO accordingly. */
5635 decompose_automod_address (struct address_info
*info
)
5637 info
->autoinc_p
= true;
5639 rtx
*base
= &XEXP (*info
->inner
, 0);
5640 set_address_base (info
, base
, base
);
5641 gcc_checking_assert (info
->base
== info
->base_term
);
5643 rtx plus
= XEXP (*info
->inner
, 1);
5644 gcc_assert (GET_CODE (plus
) == PLUS
);
5646 info
->base_term2
= &XEXP (plus
, 0);
5647 gcc_checking_assert (rtx_equal_p (*info
->base_term
, *info
->base_term2
));
5649 rtx
*step
= &XEXP (plus
, 1);
5650 rtx
*inner_step
= strip_address_mutations (step
);
5651 if (CONSTANT_P (*inner_step
))
5652 set_address_disp (info
, step
, inner_step
);
5654 set_address_index (info
, step
, inner_step
);
5657 /* Treat *LOC as a tree of PLUS operands and store pointers to the summed
5658 values in [PTR, END). Return a pointer to the end of the used array. */
5661 extract_plus_operands (rtx
*loc
, rtx
**ptr
, rtx
**end
)
5664 if (GET_CODE (x
) == PLUS
)
5666 ptr
= extract_plus_operands (&XEXP (x
, 0), ptr
, end
);
5667 ptr
= extract_plus_operands (&XEXP (x
, 1), ptr
, end
);
5671 gcc_assert (ptr
!= end
);
5677 /* Evaluate the likelihood of X being a base or index value, returning
5678 positive if it is likely to be a base, negative if it is likely to be
5679 an index, and 0 if we can't tell. Make the magnitude of the return
5680 value reflect the amount of confidence we have in the answer.
5682 MODE, AS, OUTER_CODE and INDEX_CODE are as for ok_for_base_p_1. */
5685 baseness (rtx x
, enum machine_mode mode
, addr_space_t as
,
5686 enum rtx_code outer_code
, enum rtx_code index_code
)
5688 /* Believe *_POINTER unless the address shape requires otherwise. */
5689 if (REG_P (x
) && REG_POINTER (x
))
5691 if (MEM_P (x
) && MEM_POINTER (x
))
5694 if (REG_P (x
) && HARD_REGISTER_P (x
))
5696 /* X is a hard register. If it only fits one of the base
5697 or index classes, choose that interpretation. */
5698 int regno
= REGNO (x
);
5699 bool base_p
= ok_for_base_p_1 (regno
, mode
, as
, outer_code
, index_code
);
5700 bool index_p
= REGNO_OK_FOR_INDEX_P (regno
);
5701 if (base_p
!= index_p
)
5702 return base_p
? 1 : -1;
5707 /* INFO->INNER describes a normal, non-automodified address.
5708 Fill in the rest of INFO accordingly. */
5711 decompose_normal_address (struct address_info
*info
)
5713 /* Treat the address as the sum of up to four values. */
5715 size_t n_ops
= extract_plus_operands (info
->inner
, ops
,
5716 ops
+ ARRAY_SIZE (ops
)) - ops
;
5718 /* If there is more than one component, any base component is in a PLUS. */
5720 info
->base_outer_code
= PLUS
;
5722 /* Try to classify each sum operand now. Leave those that could be
5723 either a base or an index in OPS. */
5726 for (size_t in
= 0; in
< n_ops
; ++in
)
5729 rtx
*inner
= strip_address_mutations (loc
);
5730 if (CONSTANT_P (*inner
))
5731 set_address_disp (info
, loc
, inner
);
5732 else if (GET_CODE (*inner
) == UNSPEC
)
5733 set_address_segment (info
, loc
, inner
);
5736 /* The only other possibilities are a base or an index. */
5737 rtx
*base_term
= get_base_term (inner
);
5738 rtx
*index_term
= get_index_term (inner
);
5739 gcc_assert (base_term
|| index_term
);
5741 set_address_index (info
, loc
, index_term
);
5742 else if (!index_term
)
5743 set_address_base (info
, loc
, base_term
);
5746 gcc_assert (base_term
== index_term
);
5748 inner_ops
[out
] = base_term
;
5754 /* Classify the remaining OPS members as bases and indexes. */
5757 /* If we haven't seen a base or an index yet, assume that this is
5758 the base. If we were confident that another term was the base
5759 or index, treat the remaining operand as the other kind. */
5761 set_address_base (info
, ops
[0], inner_ops
[0]);
5763 set_address_index (info
, ops
[0], inner_ops
[0]);
5767 /* In the event of a tie, assume the base comes first. */
5768 if (baseness (*inner_ops
[0], info
->mode
, info
->as
, PLUS
,
5770 >= baseness (*inner_ops
[1], info
->mode
, info
->as
, PLUS
,
5771 GET_CODE (*ops
[0])))
5773 set_address_base (info
, ops
[0], inner_ops
[0]);
5774 set_address_index (info
, ops
[1], inner_ops
[1]);
5778 set_address_base (info
, ops
[1], inner_ops
[1]);
5779 set_address_index (info
, ops
[0], inner_ops
[0]);
5783 gcc_assert (out
== 0);
5786 /* Describe address *LOC in *INFO. MODE is the mode of the addressed value,
5787 or VOIDmode if not known. AS is the address space associated with LOC.
5788 OUTER_CODE is MEM if *LOC is a MEM address and ADDRESS otherwise. */
5791 decompose_address (struct address_info
*info
, rtx
*loc
, enum machine_mode mode
,
5792 addr_space_t as
, enum rtx_code outer_code
)
5794 memset (info
, 0, sizeof (*info
));
5797 info
->addr_outer_code
= outer_code
;
5799 info
->inner
= strip_address_mutations (loc
, &outer_code
);
5800 info
->base_outer_code
= outer_code
;
5801 switch (GET_CODE (*info
->inner
))
5807 decompose_incdec_address (info
);
5812 decompose_automod_address (info
);
5816 decompose_normal_address (info
);
5821 /* Describe address operand LOC in INFO. */
5824 decompose_lea_address (struct address_info
*info
, rtx
*loc
)
5826 decompose_address (info
, loc
, VOIDmode
, ADDR_SPACE_GENERIC
, ADDRESS
);
5829 /* Describe the address of MEM X in INFO. */
5832 decompose_mem_address (struct address_info
*info
, rtx x
)
5834 gcc_assert (MEM_P (x
));
5835 decompose_address (info
, &XEXP (x
, 0), GET_MODE (x
),
5836 MEM_ADDR_SPACE (x
), MEM
);
5839 /* Update INFO after a change to the address it describes. */
5842 update_address (struct address_info
*info
)
5844 decompose_address (info
, info
->outer
, info
->mode
, info
->as
,
5845 info
->addr_outer_code
);
5848 /* Return the scale applied to *INFO->INDEX_TERM, or 0 if the index is
5849 more complicated than that. */
5852 get_index_scale (const struct address_info
*info
)
5854 rtx index
= *info
->index
;
5855 if (GET_CODE (index
) == MULT
5856 && CONST_INT_P (XEXP (index
, 1))
5857 && info
->index_term
== &XEXP (index
, 0))
5858 return INTVAL (XEXP (index
, 1));
5860 if (GET_CODE (index
) == ASHIFT
5861 && CONST_INT_P (XEXP (index
, 1))
5862 && info
->index_term
== &XEXP (index
, 0))
5863 return (HOST_WIDE_INT
) 1 << INTVAL (XEXP (index
, 1));
5865 if (info
->index
== info
->index_term
)
5871 /* Return the "index code" of INFO, in the form required by
5875 get_index_code (const struct address_info
*info
)
5878 return GET_CODE (*info
->index
);
5881 return GET_CODE (*info
->disp
);