libjava/sysdep/powerpc/locks.h

   1 // locks.h - Thread synchronization primitives. PowerPC implementation.
   2
   3 /* Copyright (C) 2002,2008  Free Software Foundation
   4
   5    This file is part of libgcj.
   6
   7 This software is copyrighted work licensed under the terms of the
   8 Libgcj License.  Please consult the file "LIBGCJ_LICENSE" for
   9 details.  */
  10
  11 #ifndef __SYSDEP_LOCKS_H__
  12 #define __SYSDEP_LOCKS_H__
  13
  14 typedef size_t obj_addr_t;      /* Integer type big enough for object   */
  15                                 /* address.                             */
  16
  17 // Atomically replace *addr by new_val if it was initially equal to old.
  18 // Return true if the comparison succeeded.
  19 // Assumed to have acquire semantics, i.e. later memory operations
  20 // cannot execute before the compare_and_swap finishes.
  21
  22 inline static bool
  23 compare_and_swap (volatile obj_addr_t *addr,
  24                   obj_addr_t old,
  25                   obj_addr_t new_val)
  26 {
  27   return __atomic_compare_exchange_n (addr, &old, new_val, 0,
  28                                       __ATOMIC_ACQUIRE, __ATOMIC_RELAXED);
  29 }
  30
  31
  32 // Set *addr to new_val with release semantics, i.e. making sure
  33 // that prior loads and stores complete before this
  34 // assignment.
  35
  36 inline static void
  37 release_set (volatile obj_addr_t *addr, obj_addr_t new_val)
  38 {
  39   __atomic_store_n(addr, new_val, __ATOMIC_RELEASE);
  40 }
  41
  42
  43 // Compare_and_swap with release semantics instead of acquire semantics.
  44
  45 inline static bool
  46 compare_and_swap_release (volatile obj_addr_t *addr, obj_addr_t old,
  47                           obj_addr_t new_val)
  48 {
  49   return __atomic_compare_exchange_n (addr, &old, new_val, 0,
  50                                       __ATOMIC_RELEASE, __ATOMIC_RELAXED);
  51 }
  52
  53
  54 // Ensure that subsequent instructions do not execute on stale
  55 // data that was loaded from memory before the barrier.
  56
  57 inline static void
  58 read_barrier ()
  59 {
  60   __atomic_thread_fence (__ATOMIC_ACQUIRE);
  61 }
  62
  63
  64 // Ensure that prior stores to memory are completed with respect to other
  65 // processors.
  66
  67 inline static void
  68 write_barrier ()
  69 {
  70   __atomic_thread_fence (__ATOMIC_RELEASE);
  71 }
  72
  73 #endif