1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(m, x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int,
247 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
, int));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void dup_replacements
PARAMS ((rtx
*, rtx
*));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int maybe_memory_address_p
PARAMS ((enum machine_mode
, rtx
, rtx
*));
264 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
265 int, enum reload_type
, int, rtx
));
266 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
267 static rtx subst_indexed_address
PARAMS ((rtx
));
268 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
269 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
270 int, enum reload_type
,int, rtx
));
271 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
272 enum machine_mode
, int,
273 enum reload_type
, int));
274 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int,
275 enum reload_type
, int, rtx
));
276 static void copy_replacements_1
PARAMS ((rtx
*, rtx
*, int));
277 static int find_inc_amount
PARAMS ((rtx
, rtx
));
279 #ifdef HAVE_SECONDARY_RELOADS
281 /* Determine if any secondary reloads are needed for loading (if IN_P is
282 nonzero) or storing (if IN_P is zero) X to or from a reload register of
283 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
284 are needed, push them.
286 Return the reload number of the secondary reload we made, or -1 if
287 we didn't need one. *PICODE is set to the insn_code to use if we do
288 need a secondary reload. */
291 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
297 enum reg_class reload_class
;
298 enum machine_mode reload_mode
;
299 enum reload_type type
;
300 enum insn_code
*picode
;
302 enum reg_class
class = NO_REGS
;
303 enum machine_mode mode
= reload_mode
;
304 enum insn_code icode
= CODE_FOR_nothing
;
305 enum reg_class t_class
= NO_REGS
;
306 enum machine_mode t_mode
= VOIDmode
;
307 enum insn_code t_icode
= CODE_FOR_nothing
;
308 enum reload_type secondary_type
;
309 int s_reload
, t_reload
= -1;
311 if (type
== RELOAD_FOR_INPUT_ADDRESS
312 || type
== RELOAD_FOR_OUTPUT_ADDRESS
313 || type
== RELOAD_FOR_INPADDR_ADDRESS
314 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
315 secondary_type
= type
;
317 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
319 *picode
= CODE_FOR_nothing
;
321 /* If X is a paradoxical SUBREG, use the inner value to determine both the
322 mode and object being reloaded. */
323 if (GET_CODE (x
) == SUBREG
324 && (GET_MODE_SIZE (GET_MODE (x
))
325 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
328 reload_mode
= GET_MODE (x
);
331 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
332 is still a pseudo-register by now, it *must* have an equivalent MEM
333 but we don't want to assume that), use that equivalent when seeing if
334 a secondary reload is needed since whether or not a reload is needed
335 might be sensitive to the form of the MEM. */
337 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
338 && reg_equiv_mem
[REGNO (x
)] != 0)
339 x
= reg_equiv_mem
[REGNO (x
)];
341 #ifdef SECONDARY_INPUT_RELOAD_CLASS
343 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
346 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
348 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
351 /* If we don't need any secondary registers, done. */
352 if (class == NO_REGS
)
355 /* Get a possible insn to use. If the predicate doesn't accept X, don't
358 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
359 : reload_out_optab
[(int) reload_mode
]);
361 if (icode
!= CODE_FOR_nothing
362 && insn_data
[(int) icode
].operand
[in_p
].predicate
363 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
364 icode
= CODE_FOR_nothing
;
366 /* If we will be using an insn, see if it can directly handle the reload
367 register we will be using. If it can, the secondary reload is for a
368 scratch register. If it can't, we will use the secondary reload for
369 an intermediate register and require a tertiary reload for the scratch
372 if (icode
!= CODE_FOR_nothing
)
374 /* If IN_P is nonzero, the reload register will be the output in
375 operand 0. If IN_P is zero, the reload register will be the input
376 in operand 1. Outputs should have an initial "=", which we must
379 enum reg_class insn_class
;
381 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
382 insn_class
= ALL_REGS
;
385 const char *insn_constraint
386 = &insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
387 char insn_letter
= *insn_constraint
;
389 = (insn_letter
== 'r' ? GENERAL_REGS
390 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter
,
393 if (insn_class
== NO_REGS
)
396 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
400 /* The scratch register's constraint must start with "=&". */
401 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
402 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
405 if (reg_class_subset_p (reload_class
, insn_class
))
406 mode
= insn_data
[(int) icode
].operand
[2].mode
;
409 const char *t_constraint
410 = &insn_data
[(int) icode
].operand
[2].constraint
[2];
411 char t_letter
= *t_constraint
;
413 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
414 t_class
= (t_letter
== 'r' ? GENERAL_REGS
415 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter
,
418 icode
= CODE_FOR_nothing
;
422 /* This case isn't valid, so fail. Reload is allowed to use the same
423 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
424 in the case of a secondary register, we actually need two different
425 registers for correct code. We fail here to prevent the possibility of
426 silently generating incorrect code later.
428 The convention is that secondary input reloads are valid only if the
429 secondary_class is different from class. If you have such a case, you
430 can not use secondary reloads, you must work around the problem some
433 Allow this when a reload_in/out pattern is being used. I.e. assume
434 that the generated code handles this case. */
436 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
437 && t_icode
== CODE_FOR_nothing
)
440 /* If we need a tertiary reload, see if we have one we can reuse or else
443 if (t_class
!= NO_REGS
)
445 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
446 if (rld
[t_reload
].secondary_p
447 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
448 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
449 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
450 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
451 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
452 == CODE_FOR_nothing
))
453 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
454 == CODE_FOR_nothing
)))
455 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
456 && MERGABLE_RELOADS (secondary_type
,
457 rld
[t_reload
].when_needed
,
458 opnum
, rld
[t_reload
].opnum
))
461 rld
[t_reload
].inmode
= t_mode
;
463 rld
[t_reload
].outmode
= t_mode
;
465 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
466 rld
[t_reload
].class = t_class
;
468 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
469 rld
[t_reload
].optional
&= optional
;
470 rld
[t_reload
].secondary_p
= 1;
471 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
472 opnum
, rld
[t_reload
].opnum
))
473 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
476 if (t_reload
== n_reloads
)
478 /* We need to make a new tertiary reload for this register class. */
479 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
480 rld
[t_reload
].class = t_class
;
481 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
482 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
483 rld
[t_reload
].reg_rtx
= 0;
484 rld
[t_reload
].optional
= optional
;
485 rld
[t_reload
].inc
= 0;
486 /* Maybe we could combine these, but it seems too tricky. */
487 rld
[t_reload
].nocombine
= 1;
488 rld
[t_reload
].in_reg
= 0;
489 rld
[t_reload
].out_reg
= 0;
490 rld
[t_reload
].opnum
= opnum
;
491 rld
[t_reload
].when_needed
= secondary_type
;
492 rld
[t_reload
].secondary_in_reload
= -1;
493 rld
[t_reload
].secondary_out_reload
= -1;
494 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
495 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
496 rld
[t_reload
].secondary_p
= 1;
502 /* See if we can reuse an existing secondary reload. */
503 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
504 if (rld
[s_reload
].secondary_p
505 && (reg_class_subset_p (class, rld
[s_reload
].class)
506 || reg_class_subset_p (rld
[s_reload
].class, class))
507 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
508 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
509 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
510 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
511 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
512 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
513 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
514 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
515 opnum
, rld
[s_reload
].opnum
))
518 rld
[s_reload
].inmode
= mode
;
520 rld
[s_reload
].outmode
= mode
;
522 if (reg_class_subset_p (class, rld
[s_reload
].class))
523 rld
[s_reload
].class = class;
525 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
526 rld
[s_reload
].optional
&= optional
;
527 rld
[s_reload
].secondary_p
= 1;
528 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
529 opnum
, rld
[s_reload
].opnum
))
530 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
533 if (s_reload
== n_reloads
)
535 #ifdef SECONDARY_MEMORY_NEEDED
536 /* If we need a memory location to copy between the two reload regs,
537 set it up now. Note that we do the input case before making
538 the reload and the output case after. This is due to the
539 way reloads are output. */
541 if (in_p
&& icode
== CODE_FOR_nothing
542 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
544 get_secondary_mem (x
, reload_mode
, opnum
, type
);
546 /* We may have just added new reloads. Make sure we add
547 the new reload at the end. */
548 s_reload
= n_reloads
;
552 /* We need to make a new secondary reload for this register class. */
553 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
554 rld
[s_reload
].class = class;
556 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
557 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
558 rld
[s_reload
].reg_rtx
= 0;
559 rld
[s_reload
].optional
= optional
;
560 rld
[s_reload
].inc
= 0;
561 /* Maybe we could combine these, but it seems too tricky. */
562 rld
[s_reload
].nocombine
= 1;
563 rld
[s_reload
].in_reg
= 0;
564 rld
[s_reload
].out_reg
= 0;
565 rld
[s_reload
].opnum
= opnum
;
566 rld
[s_reload
].when_needed
= secondary_type
;
567 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
568 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
569 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
570 rld
[s_reload
].secondary_out_icode
571 = ! in_p
? t_icode
: CODE_FOR_nothing
;
572 rld
[s_reload
].secondary_p
= 1;
576 #ifdef SECONDARY_MEMORY_NEEDED
577 if (! in_p
&& icode
== CODE_FOR_nothing
578 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
579 get_secondary_mem (x
, mode
, opnum
, type
);
586 #endif /* HAVE_SECONDARY_RELOADS */
588 #ifdef SECONDARY_MEMORY_NEEDED
590 /* Return a memory location that will be used to copy X in mode MODE.
591 If we haven't already made a location for this mode in this insn,
592 call find_reloads_address on the location being returned. */
595 get_secondary_mem (x
, mode
, opnum
, type
)
596 rtx x ATTRIBUTE_UNUSED
;
597 enum machine_mode mode
;
599 enum reload_type type
;
604 /* By default, if MODE is narrower than a word, widen it to a word.
605 This is required because most machines that require these memory
606 locations do not support short load and stores from all registers
607 (e.g., FP registers). */
609 #ifdef SECONDARY_MEMORY_NEEDED_MODE
610 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
612 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
613 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
616 /* If we already have made a MEM for this operand in MODE, return it. */
617 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
618 return secondary_memlocs_elim
[(int) mode
][opnum
];
620 /* If this is the first time we've tried to get a MEM for this mode,
621 allocate a new one. `something_changed' in reload will get set
622 by noticing that the frame size has changed. */
624 if (secondary_memlocs
[(int) mode
] == 0)
626 #ifdef SECONDARY_MEMORY_NEEDED_RTX
627 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
629 secondary_memlocs
[(int) mode
]
630 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
634 /* Get a version of the address doing any eliminations needed. If that
635 didn't give us a new MEM, make a new one if it isn't valid. */
637 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
638 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
640 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
641 loc
= copy_rtx (loc
);
643 /* The only time the call below will do anything is if the stack
644 offset is too large. In that case IND_LEVELS doesn't matter, so we
645 can just pass a zero. Adjust the type to be the address of the
646 corresponding object. If the address was valid, save the eliminated
647 address. If it wasn't valid, we need to make a reload each time, so
652 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
653 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
656 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
660 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
664 /* Clear any secondary memory locations we've made. */
667 clear_secondary_mem ()
669 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
671 #endif /* SECONDARY_MEMORY_NEEDED */
673 /* Find the largest class for which every register number plus N is valid in
674 M1 (if in range) and is cheap to move into REGNO.
675 Abort if no such class exists. */
677 static enum reg_class
678 find_valid_class (m1
, n
, dest_regno
)
679 enum machine_mode m1 ATTRIBUTE_UNUSED
;
681 unsigned int dest_regno ATTRIBUTE_UNUSED
;
686 enum reg_class best_class
= NO_REGS
;
687 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
688 unsigned int best_size
= 0;
691 for (class = 1; class < N_REG_CLASSES
; class++)
694 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
695 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
696 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
697 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
702 cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
704 if ((reg_class_size
[class] > best_size
705 && (best_cost
< 0 || best_cost
>= cost
))
709 best_size
= reg_class_size
[class];
710 best_cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
720 /* Return the number of a previously made reload that can be combined with
721 a new one, or n_reloads if none of the existing reloads can be used.
722 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
723 push_reload, they determine the kind of the new reload that we try to
724 combine. P_IN points to the corresponding value of IN, which can be
725 modified by this function.
726 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
729 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
731 enum reg_class
class;
732 enum reload_type type
;
733 int opnum
, dont_share
;
737 /* We can't merge two reloads if the output of either one is
740 if (earlyclobber_operand_p (out
))
743 /* We can use an existing reload if the class is right
744 and at least one of IN and OUT is a match
745 and the other is at worst neutral.
746 (A zero compared against anything is neutral.)
748 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
749 for the same thing since that can cause us to need more reload registers
750 than we otherwise would. */
752 for (i
= 0; i
< n_reloads
; i
++)
753 if ((reg_class_subset_p (class, rld
[i
].class)
754 || reg_class_subset_p (rld
[i
].class, class))
755 /* If the existing reload has a register, it must fit our class. */
756 && (rld
[i
].reg_rtx
== 0
757 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
758 true_regnum (rld
[i
].reg_rtx
)))
759 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
760 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
761 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
762 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
763 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
764 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
765 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
768 /* Reloading a plain reg for input can match a reload to postincrement
769 that reg, since the postincrement's value is the right value.
770 Likewise, it can match a preincrement reload, since we regard
771 the preincrementation as happening before any ref in this insn
773 for (i
= 0; i
< n_reloads
; i
++)
774 if ((reg_class_subset_p (class, rld
[i
].class)
775 || reg_class_subset_p (rld
[i
].class, class))
776 /* If the existing reload has a register, it must fit our
778 && (rld
[i
].reg_rtx
== 0
779 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
780 true_regnum (rld
[i
].reg_rtx
)))
781 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
782 && ((GET_CODE (in
) == REG
783 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
784 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
785 || (GET_CODE (rld
[i
].in
) == REG
786 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
787 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
788 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
789 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
790 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
791 opnum
, rld
[i
].opnum
))
793 /* Make sure reload_in ultimately has the increment,
794 not the plain register. */
795 if (GET_CODE (in
) == REG
)
802 /* Return nonzero if X is a SUBREG which will require reloading of its
803 SUBREG_REG expression. */
806 reload_inner_reg_of_subreg (x
, mode
, output
)
808 enum machine_mode mode
;
813 /* Only SUBREGs are problematical. */
814 if (GET_CODE (x
) != SUBREG
)
817 inner
= SUBREG_REG (x
);
819 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
820 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
823 /* If INNER is not a hard register, then INNER will not need to
825 if (GET_CODE (inner
) != REG
826 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
838 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
840 != (int) HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
843 /* Record one reload that needs to be performed.
844 IN is an rtx saying where the data are to be found before this instruction.
845 OUT says where they must be stored after the instruction.
846 (IN is zero for data not read, and OUT is zero for data not written.)
847 INLOC and OUTLOC point to the places in the instructions where
848 IN and OUT were found.
849 If IN and OUT are both nonzero, it means the same register must be used
850 to reload both IN and OUT.
852 CLASS is a register class required for the reloaded data.
853 INMODE is the machine mode that the instruction requires
854 for the reg that replaces IN and OUTMODE is likewise for OUT.
856 If IN is zero, then OUT's location and mode should be passed as
859 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
861 OPTIONAL nonzero means this reload does not need to be performed:
862 it can be discarded if that is more convenient.
864 OPNUM and TYPE say what the purpose of this reload is.
866 The return value is the reload-number for this reload.
868 If both IN and OUT are nonzero, in some rare cases we might
869 want to make two separate reloads. (Actually we never do this now.)
870 Therefore, the reload-number for OUT is stored in
871 output_reloadnum when we return; the return value applies to IN.
872 Usually (presently always), when IN and OUT are nonzero,
873 the two reload-numbers are equal, but the caller should be careful to
877 push_reload (in
, out
, inloc
, outloc
, class,
878 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
881 enum reg_class
class;
882 enum machine_mode inmode
, outmode
;
886 enum reload_type type
;
890 int dont_remove_subreg
= 0;
891 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
892 int secondary_in_reload
= -1, secondary_out_reload
= -1;
893 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
894 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
896 /* INMODE and/or OUTMODE could be VOIDmode if no mode
897 has been specified for the operand. In that case,
898 use the operand's mode as the mode to reload. */
899 if (inmode
== VOIDmode
&& in
!= 0)
900 inmode
= GET_MODE (in
);
901 if (outmode
== VOIDmode
&& out
!= 0)
902 outmode
= GET_MODE (out
);
904 /* If IN is a pseudo register everywhere-equivalent to a constant, and
905 it is not in a hard register, reload straight from the constant,
906 since we want to get rid of such pseudo registers.
907 Often this is done earlier, but not always in find_reloads_address. */
908 if (in
!= 0 && GET_CODE (in
) == REG
)
910 int regno
= REGNO (in
);
912 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
913 && reg_equiv_constant
[regno
] != 0)
914 in
= reg_equiv_constant
[regno
];
917 /* Likewise for OUT. Of course, OUT will never be equivalent to
918 an actual constant, but it might be equivalent to a memory location
919 (in the case of a parameter). */
920 if (out
!= 0 && GET_CODE (out
) == REG
)
922 int regno
= REGNO (out
);
924 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
925 && reg_equiv_constant
[regno
] != 0)
926 out
= reg_equiv_constant
[regno
];
929 /* If we have a read-write operand with an address side-effect,
930 change either IN or OUT so the side-effect happens only once. */
931 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
932 switch (GET_CODE (XEXP (in
, 0)))
934 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
935 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
938 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
939 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
946 /* If we are reloading a (SUBREG constant ...), really reload just the
947 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
948 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
949 a pseudo and hence will become a MEM) with M1 wider than M2 and the
950 register is a pseudo, also reload the inside expression.
951 For machines that extend byte loads, do this for any SUBREG of a pseudo
952 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
953 M2 is an integral mode that gets extended when loaded.
954 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
955 either M1 is not valid for R or M2 is wider than a word but we only
956 need one word to store an M2-sized quantity in R.
957 (However, if OUT is nonzero, we need to reload the reg *and*
958 the subreg, so do nothing here, and let following statement handle it.)
960 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
961 we can't handle it here because CONST_INT does not indicate a mode.
963 Similarly, we must reload the inside expression if we have a
964 STRICT_LOW_PART (presumably, in == out in the cas).
966 Also reload the inner expression if it does not require a secondary
967 reload but the SUBREG does.
969 Finally, reload the inner expression if it is a register that is in
970 the class whose registers cannot be referenced in a different size
971 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
972 cannot reload just the inside since we might end up with the wrong
973 register class. But if it is inside a STRICT_LOW_PART, we have
974 no choice, so we hope we do get the right register class there. */
976 if (in
!= 0 && GET_CODE (in
) == SUBREG
977 && (subreg_lowpart_p (in
) || strict_low
)
978 #ifdef CANNOT_CHANGE_MODE_CLASS
979 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
981 && (CONSTANT_P (SUBREG_REG (in
))
982 || GET_CODE (SUBREG_REG (in
)) == PLUS
984 || (((GET_CODE (SUBREG_REG (in
)) == REG
985 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
986 || GET_CODE (SUBREG_REG (in
)) == MEM
)
987 && ((GET_MODE_SIZE (inmode
)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
989 #ifdef LOAD_EXTEND_OP
990 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
991 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
993 && (GET_MODE_SIZE (inmode
)
994 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
995 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
996 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
998 #ifdef WORD_REGISTER_OPERATIONS
999 || ((GET_MODE_SIZE (inmode
)
1000 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1001 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1002 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1006 || (GET_CODE (SUBREG_REG (in
)) == REG
1007 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1008 /* The case where out is nonzero
1009 is handled differently in the following statement. */
1010 && (out
== 0 || subreg_lowpart_p (in
))
1011 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1016 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1017 GET_MODE (SUBREG_REG (in
)))))
1018 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1019 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1020 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
1021 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1022 GET_MODE (SUBREG_REG (in
)),
1026 #ifdef CANNOT_CHANGE_MODE_CLASS
1027 || (GET_CODE (SUBREG_REG (in
)) == REG
1028 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1029 && REG_CANNOT_CHANGE_MODE_P
1030 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1034 in_subreg_loc
= inloc
;
1035 inloc
= &SUBREG_REG (in
);
1037 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1038 if (GET_CODE (in
) == MEM
)
1039 /* This is supposed to happen only for paradoxical subregs made by
1040 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1041 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1044 inmode
= GET_MODE (in
);
1047 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1048 either M1 is not valid for R or M2 is wider than a word but we only
1049 need one word to store an M2-sized quantity in R.
1051 However, we must reload the inner reg *as well as* the subreg in
1054 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1055 code above. This can happen if SUBREG_BYTE != 0. */
1057 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1059 enum reg_class in_class
= class;
1061 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1063 = find_valid_class (inmode
,
1064 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1065 GET_MODE (SUBREG_REG (in
)),
1068 REGNO (SUBREG_REG (in
)));
1070 /* This relies on the fact that emit_reload_insns outputs the
1071 instructions for input reloads of type RELOAD_OTHER in the same
1072 order as the reloads. Thus if the outer reload is also of type
1073 RELOAD_OTHER, we are guaranteed that this inner reload will be
1074 output before the outer reload. */
1075 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1076 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1077 dont_remove_subreg
= 1;
1080 /* Similarly for paradoxical and problematical SUBREGs on the output.
1081 Note that there is no reason we need worry about the previous value
1082 of SUBREG_REG (out); even if wider than out,
1083 storing in a subreg is entitled to clobber it all
1084 (except in the case of STRICT_LOW_PART,
1085 and in that case the constraint should label it input-output.) */
1086 if (out
!= 0 && GET_CODE (out
) == SUBREG
1087 && (subreg_lowpart_p (out
) || strict_low
)
1088 #ifdef CANNOT_CHANGE_MODE_CLASS
1089 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1091 && (CONSTANT_P (SUBREG_REG (out
))
1093 || (((GET_CODE (SUBREG_REG (out
)) == REG
1094 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1095 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1096 && ((GET_MODE_SIZE (outmode
)
1097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1098 #ifdef WORD_REGISTER_OPERATIONS
1099 || ((GET_MODE_SIZE (outmode
)
1100 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1101 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1102 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1106 || (GET_CODE (SUBREG_REG (out
)) == REG
1107 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1108 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1109 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1111 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1113 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1114 GET_MODE (SUBREG_REG (out
)))))
1115 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1116 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1117 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1118 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1119 GET_MODE (SUBREG_REG (out
)),
1123 #ifdef CANNOT_CHANGE_MODE_CLASS
1124 || (GET_CODE (SUBREG_REG (out
)) == REG
1125 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1126 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1127 GET_MODE (SUBREG_REG (out
)),
1132 out_subreg_loc
= outloc
;
1133 outloc
= &SUBREG_REG (out
);
1135 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1136 if (GET_CODE (out
) == MEM
1137 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1140 outmode
= GET_MODE (out
);
1143 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1144 either M1 is not valid for R or M2 is wider than a word but we only
1145 need one word to store an M2-sized quantity in R.
1147 However, we must reload the inner reg *as well as* the subreg in
1148 that case. In this case, the inner reg is an in-out reload. */
1150 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1152 /* This relies on the fact that emit_reload_insns outputs the
1153 instructions for output reloads of type RELOAD_OTHER in reverse
1154 order of the reloads. Thus if the outer reload is also of type
1155 RELOAD_OTHER, we are guaranteed that this inner reload will be
1156 output after the outer reload. */
1157 dont_remove_subreg
= 1;
1158 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1160 find_valid_class (outmode
,
1161 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1162 GET_MODE (SUBREG_REG (out
)),
1165 REGNO (SUBREG_REG (out
))),
1166 VOIDmode
, VOIDmode
, 0, 0,
1167 opnum
, RELOAD_OTHER
);
1170 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1171 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1172 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1173 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1176 /* If IN is a SUBREG of a hard register, make a new REG. This
1177 simplifies some of the cases below. */
1179 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1180 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1181 && ! dont_remove_subreg
)
1182 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1184 /* Similarly for OUT. */
1185 if (out
!= 0 && GET_CODE (out
) == SUBREG
1186 && GET_CODE (SUBREG_REG (out
)) == REG
1187 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1188 && ! dont_remove_subreg
)
1189 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1191 /* Narrow down the class of register wanted if that is
1192 desirable on this machine for efficiency. */
1194 class = PREFERRED_RELOAD_CLASS (in
, class);
1196 /* Output reloads may need analogous treatment, different in detail. */
1197 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1199 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1202 /* Make sure we use a class that can handle the actual pseudo
1203 inside any subreg. For example, on the 386, QImode regs
1204 can appear within SImode subregs. Although GENERAL_REGS
1205 can handle SImode, QImode needs a smaller class. */
1206 #ifdef LIMIT_RELOAD_CLASS
1208 class = LIMIT_RELOAD_CLASS (inmode
, class);
1209 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1210 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1213 class = LIMIT_RELOAD_CLASS (outmode
, class);
1214 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1215 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1218 /* Verify that this class is at least possible for the mode that
1220 if (this_insn_is_asm
)
1222 enum machine_mode mode
;
1223 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1227 if (mode
== VOIDmode
)
1229 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1234 outmode
= word_mode
;
1236 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1237 if (HARD_REGNO_MODE_OK (i
, mode
)
1238 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1240 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1243 for (j
= 1; j
< nregs
; j
++)
1244 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1249 if (i
== FIRST_PSEUDO_REGISTER
)
1251 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1256 /* Optional output reloads are always OK even if we have no register class,
1257 since the function of these reloads is only to have spill_reg_store etc.
1258 set, so that the storing insn can be deleted later. */
1259 if (class == NO_REGS
1260 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1263 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1267 /* See if we need a secondary reload register to move between CLASS
1268 and IN or CLASS and OUT. Get the icode and push any required reloads
1269 needed for each of them if so. */
1271 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1274 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1275 &secondary_in_icode
);
1278 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1279 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1280 secondary_out_reload
1281 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1282 type
, &secondary_out_icode
);
1285 /* We found no existing reload suitable for re-use.
1286 So add an additional reload. */
1288 #ifdef SECONDARY_MEMORY_NEEDED
1289 /* If a memory location is needed for the copy, make one. */
1290 if (in
!= 0 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == SUBREG
)
1291 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1294 get_secondary_mem (in
, inmode
, opnum
, type
);
1300 rld
[i
].class = class;
1301 rld
[i
].inmode
= inmode
;
1302 rld
[i
].outmode
= outmode
;
1304 rld
[i
].optional
= optional
;
1306 rld
[i
].nocombine
= 0;
1307 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1308 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1309 rld
[i
].opnum
= opnum
;
1310 rld
[i
].when_needed
= type
;
1311 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1312 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1313 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1314 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1315 rld
[i
].secondary_p
= 0;
1319 #ifdef SECONDARY_MEMORY_NEEDED
1320 if (out
!= 0 && (GET_CODE (out
) == REG
|| GET_CODE (out
) == SUBREG
)
1321 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (class,
1323 REGNO_REG_CLASS (reg_or_subregno (out
)),
1325 get_secondary_mem (out
, outmode
, opnum
, type
);
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */
1335 /* The modes can be different. If they are, we want to reload in
1336 the larger mode, so that the value is valid for both modes. */
1337 if (inmode
!= VOIDmode
1338 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1339 rld
[i
].inmode
= inmode
;
1340 if (outmode
!= VOIDmode
1341 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1342 rld
[i
].outmode
= outmode
;
1345 rtx in_reg
= inloc
? *inloc
: 0;
1346 /* If we merge reloads for two distinct rtl expressions that
1347 are identical in content, there might be duplicate address
1348 reloads. Remove the extra set now, so that if we later find
1349 that we can inherit this reload, we can get rid of the
1350 address reloads altogether.
1352 Do not do this if both reloads are optional since the result
1353 would be an optional reload which could potentially leave
1354 unresolved address replacements.
1356 It is not sufficient to call transfer_replacements since
1357 choose_reload_regs will remove the replacements for address
1358 reloads of inherited reloads which results in the same
1360 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1361 && ! (rld
[i
].optional
&& optional
))
1363 /* We must keep the address reload with the lower operand
1365 if (opnum
> rld
[i
].opnum
)
1367 remove_address_replacements (in
);
1369 in_reg
= rld
[i
].in_reg
;
1372 remove_address_replacements (rld
[i
].in
);
1375 rld
[i
].in_reg
= in_reg
;
1380 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1382 if (reg_class_subset_p (class, rld
[i
].class))
1383 rld
[i
].class = class;
1384 rld
[i
].optional
&= optional
;
1385 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1386 opnum
, rld
[i
].opnum
))
1387 rld
[i
].when_needed
= RELOAD_OTHER
;
1388 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1391 /* If the ostensible rtx being reloaded differs from the rtx found
1392 in the location to substitute, this reload is not safe to combine
1393 because we cannot reliably tell whether it appears in the insn. */
1395 if (in
!= 0 && in
!= *inloc
)
1396 rld
[i
].nocombine
= 1;
1399 /* This was replaced by changes in find_reloads_address_1 and the new
1400 function inc_for_reload, which go with a new meaning of reload_inc. */
1402 /* If this is an IN/OUT reload in an insn that sets the CC,
1403 it must be for an autoincrement. It doesn't work to store
1404 the incremented value after the insn because that would clobber the CC.
1405 So we must do the increment of the value reloaded from,
1406 increment it, store it back, then decrement again. */
1407 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1411 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1412 /* If we did not find a nonzero amount-to-increment-by,
1413 that contradicts the belief that IN is being incremented
1414 in an address in this insn. */
1415 if (rld
[i
].inc
== 0)
1420 /* If we will replace IN and OUT with the reload-reg,
1421 record where they are located so that substitution need
1422 not do a tree walk. */
1424 if (replace_reloads
)
1428 struct replacement
*r
= &replacements
[n_replacements
++];
1430 r
->subreg_loc
= in_subreg_loc
;
1434 if (outloc
!= 0 && outloc
!= inloc
)
1436 struct replacement
*r
= &replacements
[n_replacements
++];
1439 r
->subreg_loc
= out_subreg_loc
;
1444 /* If this reload is just being introduced and it has both
1445 an incoming quantity and an outgoing quantity that are
1446 supposed to be made to match, see if either one of the two
1447 can serve as the place to reload into.
1449 If one of them is acceptable, set rld[i].reg_rtx
1452 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1454 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1457 earlyclobber_operand_p (out
));
1459 /* If the outgoing register already contains the same value
1460 as the incoming one, we can dispense with loading it.
1461 The easiest way to tell the caller that is to give a phony
1462 value for the incoming operand (same as outgoing one). */
1463 if (rld
[i
].reg_rtx
== out
1464 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1465 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1466 static_reload_reg_p
, i
, inmode
))
1470 /* If this is an input reload and the operand contains a register that
1471 dies in this insn and is used nowhere else, see if it is the right class
1472 to be used for this reload. Use it if so. (This occurs most commonly
1473 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1474 this if it is also an output reload that mentions the register unless
1475 the output is a SUBREG that clobbers an entire register.
1477 Note that the operand might be one of the spill regs, if it is a
1478 pseudo reg and we are in a block where spilling has not taken place.
1479 But if there is no spilling in this block, that is OK.
1480 An explicitly used hard reg cannot be a spill reg. */
1482 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1486 enum machine_mode rel_mode
= inmode
;
1488 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1491 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1492 if (REG_NOTE_KIND (note
) == REG_DEAD
1493 && GET_CODE (XEXP (note
, 0)) == REG
1494 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1495 && reg_mentioned_p (XEXP (note
, 0), in
)
1496 && ! refers_to_regno_for_reload_p (regno
,
1498 + HARD_REGNO_NREGS (regno
,
1500 PATTERN (this_insn
), inloc
)
1501 /* If this is also an output reload, IN cannot be used as
1502 the reload register if it is set in this insn unless IN
1504 && (out
== 0 || in
== out
1505 || ! hard_reg_set_here_p (regno
,
1507 + HARD_REGNO_NREGS (regno
,
1509 PATTERN (this_insn
)))
1510 /* ??? Why is this code so different from the previous?
1511 Is there any simple coherent way to describe the two together?
1512 What's going on here. */
1514 || (GET_CODE (in
) == SUBREG
1515 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1517 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1518 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1519 /* Make sure the operand fits in the reg that dies. */
1520 && (GET_MODE_SIZE (rel_mode
)
1521 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1522 && HARD_REGNO_MODE_OK (regno
, inmode
)
1523 && HARD_REGNO_MODE_OK (regno
, outmode
))
1526 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1527 HARD_REGNO_NREGS (regno
, outmode
));
1529 for (offs
= 0; offs
< nregs
; offs
++)
1530 if (fixed_regs
[regno
+ offs
]
1531 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1537 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1544 output_reloadnum
= i
;
1549 /* Record an additional place we must replace a value
1550 for which we have already recorded a reload.
1551 RELOADNUM is the value returned by push_reload
1552 when the reload was recorded.
1553 This is used in insn patterns that use match_dup. */
1556 push_replacement (loc
, reloadnum
, mode
)
1559 enum machine_mode mode
;
1561 if (replace_reloads
)
1563 struct replacement
*r
= &replacements
[n_replacements
++];
1564 r
->what
= reloadnum
;
1571 /* Duplicate any replacement we have recorded to apply at
1572 location ORIG_LOC to also be performed at DUP_LOC.
1573 This is used in insn patterns that use match_dup. */
1576 dup_replacements (dup_loc
, orig_loc
)
1580 int i
, n
= n_replacements
;
1582 for (i
= 0; i
< n
; i
++)
1584 struct replacement
*r
= &replacements
[i
];
1585 if (r
->where
== orig_loc
)
1586 push_replacement (dup_loc
, r
->what
, r
->mode
);
1590 /* Transfer all replacements that used to be in reload FROM to be in
1594 transfer_replacements (to
, from
)
1599 for (i
= 0; i
< n_replacements
; i
++)
1600 if (replacements
[i
].what
== from
)
1601 replacements
[i
].what
= to
;
1604 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1605 or a subpart of it. If we have any replacements registered for IN_RTX,
1606 cancel the reloads that were supposed to load them.
1607 Return nonzero if we canceled any reloads. */
1609 remove_address_replacements (in_rtx
)
1613 char reload_flags
[MAX_RELOADS
];
1614 int something_changed
= 0;
1616 memset (reload_flags
, 0, sizeof reload_flags
);
1617 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1619 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1620 reload_flags
[replacements
[i
].what
] |= 1;
1623 replacements
[j
++] = replacements
[i
];
1624 reload_flags
[replacements
[i
].what
] |= 2;
1627 /* Note that the following store must be done before the recursive calls. */
1630 for (i
= n_reloads
- 1; i
>= 0; i
--)
1632 if (reload_flags
[i
] == 1)
1634 deallocate_reload_reg (i
);
1635 remove_address_replacements (rld
[i
].in
);
1637 something_changed
= 1;
1640 return something_changed
;
1643 /* If there is only one output reload, and it is not for an earlyclobber
1644 operand, try to combine it with a (logically unrelated) input reload
1645 to reduce the number of reload registers needed.
1647 This is safe if the input reload does not appear in
1648 the value being output-reloaded, because this implies
1649 it is not needed any more once the original insn completes.
1651 If that doesn't work, see we can use any of the registers that
1652 die in this insn as a reload register. We can if it is of the right
1653 class and does not appear in the value being output-reloaded. */
1659 int output_reload
= -1;
1660 int secondary_out
= -1;
1663 /* Find the output reload; return unless there is exactly one
1664 and that one is mandatory. */
1666 for (i
= 0; i
< n_reloads
; i
++)
1667 if (rld
[i
].out
!= 0)
1669 if (output_reload
>= 0)
1674 if (output_reload
< 0 || rld
[output_reload
].optional
)
1677 /* An input-output reload isn't combinable. */
1679 if (rld
[output_reload
].in
!= 0)
1682 /* If this reload is for an earlyclobber operand, we can't do anything. */
1683 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1686 /* If there is a reload for part of the address of this operand, we would
1687 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1688 its life to the point where doing this combine would not lower the
1689 number of spill registers needed. */
1690 for (i
= 0; i
< n_reloads
; i
++)
1691 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1692 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1693 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1696 /* Check each input reload; can we combine it? */
1698 for (i
= 0; i
< n_reloads
; i
++)
1699 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1700 /* Life span of this reload must not extend past main insn. */
1701 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1702 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1703 && rld
[i
].when_needed
!= RELOAD_OTHER
1704 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1705 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1706 rld
[output_reload
].outmode
))
1708 && rld
[i
].reg_rtx
== 0
1709 #ifdef SECONDARY_MEMORY_NEEDED
1710 /* Don't combine two reloads with different secondary
1711 memory locations. */
1712 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1713 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1714 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1715 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1717 && (SMALL_REGISTER_CLASSES
1718 ? (rld
[i
].class == rld
[output_reload
].class)
1719 : (reg_class_subset_p (rld
[i
].class,
1720 rld
[output_reload
].class)
1721 || reg_class_subset_p (rld
[output_reload
].class,
1723 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1724 /* Args reversed because the first arg seems to be
1725 the one that we imagine being modified
1726 while the second is the one that might be affected. */
1727 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1729 /* However, if the input is a register that appears inside
1730 the output, then we also can't share.
1731 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1732 If the same reload reg is used for both reg 69 and the
1733 result to be stored in memory, then that result
1734 will clobber the address of the memory ref. */
1735 && ! (GET_CODE (rld
[i
].in
) == REG
1736 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1737 rld
[output_reload
].out
))))
1738 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1739 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1740 && (reg_class_size
[(int) rld
[i
].class]
1741 || SMALL_REGISTER_CLASSES
)
1742 /* We will allow making things slightly worse by combining an
1743 input and an output, but no worse than that. */
1744 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1745 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1749 /* We have found a reload to combine with! */
1750 rld
[i
].out
= rld
[output_reload
].out
;
1751 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1752 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1753 /* Mark the old output reload as inoperative. */
1754 rld
[output_reload
].out
= 0;
1755 /* The combined reload is needed for the entire insn. */
1756 rld
[i
].when_needed
= RELOAD_OTHER
;
1757 /* If the output reload had a secondary reload, copy it. */
1758 if (rld
[output_reload
].secondary_out_reload
!= -1)
1760 rld
[i
].secondary_out_reload
1761 = rld
[output_reload
].secondary_out_reload
;
1762 rld
[i
].secondary_out_icode
1763 = rld
[output_reload
].secondary_out_icode
;
1766 #ifdef SECONDARY_MEMORY_NEEDED
1767 /* Copy any secondary MEM. */
1768 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1769 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1770 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1772 /* If required, minimize the register class. */
1773 if (reg_class_subset_p (rld
[output_reload
].class,
1775 rld
[i
].class = rld
[output_reload
].class;
1777 /* Transfer all replacements from the old reload to the combined. */
1778 for (j
= 0; j
< n_replacements
; j
++)
1779 if (replacements
[j
].what
== output_reload
)
1780 replacements
[j
].what
= i
;
1785 /* If this insn has only one operand that is modified or written (assumed
1786 to be the first), it must be the one corresponding to this reload. It
1787 is safe to use anything that dies in this insn for that output provided
1788 that it does not occur in the output (we already know it isn't an
1789 earlyclobber. If this is an asm insn, give up. */
1791 if (INSN_CODE (this_insn
) == -1)
1794 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1795 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1796 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1799 /* See if some hard register that dies in this insn and is not used in
1800 the output is the right class. Only works if the register we pick
1801 up can fully hold our output reload. */
1802 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1803 if (REG_NOTE_KIND (note
) == REG_DEAD
1804 && GET_CODE (XEXP (note
, 0)) == REG
1805 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1806 rld
[output_reload
].out
)
1807 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1808 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1809 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1810 REGNO (XEXP (note
, 0)))
1811 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1812 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1813 /* Ensure that a secondary or tertiary reload for this output
1814 won't want this register. */
1815 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1816 || (! (TEST_HARD_REG_BIT
1817 (reg_class_contents
[(int) rld
[secondary_out
].class],
1818 REGNO (XEXP (note
, 0))))
1819 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1820 || ! (TEST_HARD_REG_BIT
1821 (reg_class_contents
[(int) rld
[secondary_out
].class],
1822 REGNO (XEXP (note
, 0)))))))
1823 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1825 rld
[output_reload
].reg_rtx
1826 = gen_rtx_REG (rld
[output_reload
].outmode
,
1827 REGNO (XEXP (note
, 0)));
1832 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1833 See if one of IN and OUT is a register that may be used;
1834 this is desirable since a spill-register won't be needed.
1835 If so, return the register rtx that proves acceptable.
1837 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1838 CLASS is the register class required for the reload.
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1853 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1854 inmode
, outmode
, class, for_real
, earlyclobber
)
1855 rtx real_in
, real_out
;
1856 rtx
*inloc
, *outloc
;
1857 enum machine_mode inmode
, outmode
;
1858 enum reg_class
class;
1868 /* If operands exceed a word, we can't use either of them
1869 unless they have the same size. */
1870 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1871 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1872 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1875 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1876 respectively refers to a hard register. */
1878 /* Find the inside of any subregs. */
1879 while (GET_CODE (out
) == SUBREG
)
1881 if (GET_CODE (SUBREG_REG (out
)) == REG
1882 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1883 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1884 GET_MODE (SUBREG_REG (out
)),
1887 out
= SUBREG_REG (out
);
1889 while (GET_CODE (in
) == SUBREG
)
1891 if (GET_CODE (SUBREG_REG (in
)) == REG
1892 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1893 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1894 GET_MODE (SUBREG_REG (in
)),
1897 in
= SUBREG_REG (in
);
1900 /* Narrow down the reg class, the same way push_reload will;
1901 otherwise we might find a dummy now, but push_reload won't. */
1902 class = PREFERRED_RELOAD_CLASS (in
, class);
1904 /* See if OUT will do. */
1905 if (GET_CODE (out
) == REG
1906 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1908 unsigned int regno
= REGNO (out
) + out_offset
;
1909 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1912 /* When we consider whether the insn uses OUT,
1913 ignore references within IN. They don't prevent us
1914 from copying IN into OUT, because those refs would
1915 move into the insn that reloads IN.
1917 However, we only ignore IN in its role as this reload.
1918 If the insn uses IN elsewhere and it contains OUT,
1919 that counts. We can't be sure it's the "same" operand
1920 so it might not go through this reload. */
1922 *inloc
= const0_rtx
;
1924 if (regno
< FIRST_PSEUDO_REGISTER
1925 && HARD_REGNO_MODE_OK (regno
, outmode
)
1926 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1927 PATTERN (this_insn
), outloc
))
1931 for (i
= 0; i
< nwords
; i
++)
1932 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1938 if (GET_CODE (real_out
) == REG
)
1941 value
= gen_rtx_REG (outmode
, regno
);
1948 /* Consider using IN if OUT was not acceptable
1949 or if OUT dies in this insn (like the quotient in a divmod insn).
1950 We can't use IN unless it is dies in this insn,
1951 which means we must know accurately which hard regs are live.
1952 Also, the result can't go in IN if IN is used within OUT,
1953 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1954 if (hard_regs_live_known
1955 && GET_CODE (in
) == REG
1956 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1958 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1959 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1960 && !fixed_regs
[REGNO (in
)]
1961 && HARD_REGNO_MODE_OK (REGNO (in
),
1962 /* The only case where out and real_out might
1963 have different modes is where real_out
1964 is a subreg, and in that case, out
1966 (GET_MODE (out
) != VOIDmode
1967 ? GET_MODE (out
) : outmode
)))
1969 unsigned int regno
= REGNO (in
) + in_offset
;
1970 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1972 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1973 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1974 PATTERN (this_insn
))
1976 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1977 PATTERN (this_insn
), inloc
)))
1981 for (i
= 0; i
< nwords
; i
++)
1982 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1988 /* If we were going to use OUT as the reload reg
1989 and changed our mind, it means OUT is a dummy that
1990 dies here. So don't bother copying value to it. */
1991 if (for_real
>= 0 && value
== real_out
)
1992 rld
[for_real
].out
= 0;
1993 if (GET_CODE (real_in
) == REG
)
1996 value
= gen_rtx_REG (inmode
, regno
);
2004 /* This page contains subroutines used mainly for determining
2005 whether the IN or an OUT of a reload can serve as the
2008 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2011 earlyclobber_operand_p (x
)
2016 for (i
= 0; i
< n_earlyclobbers
; i
++)
2017 if (reload_earlyclobbers
[i
] == x
)
2023 /* Return 1 if expression X alters a hard reg in the range
2024 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2025 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2026 X should be the body of an instruction. */
2029 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
2030 unsigned int beg_regno
, end_regno
;
2033 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2035 rtx op0
= SET_DEST (x
);
2037 while (GET_CODE (op0
) == SUBREG
)
2038 op0
= SUBREG_REG (op0
);
2039 if (GET_CODE (op0
) == REG
)
2041 unsigned int r
= REGNO (op0
);
2043 /* See if this reg overlaps range under consideration. */
2045 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2049 else if (GET_CODE (x
) == PARALLEL
)
2051 int i
= XVECLEN (x
, 0) - 1;
2054 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2061 /* Return 1 if ADDR is a valid memory address for mode MODE,
2062 and check that each pseudo reg has the proper kind of
2066 strict_memory_address_p (mode
, addr
)
2067 enum machine_mode mode ATTRIBUTE_UNUSED
;
2070 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2077 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2078 if they are the same hard reg, and has special hacks for
2079 autoincrement and autodecrement.
2080 This is specifically intended for find_reloads to use
2081 in determining whether two operands match.
2082 X is the operand whose number is the lower of the two.
2084 The value is 2 if Y contains a pre-increment that matches
2085 a non-incrementing address in X. */
2087 /* ??? To be completely correct, we should arrange to pass
2088 for X the output operand and for Y the input operand.
2089 For now, we assume that the output operand has the lower number
2090 because that is natural in (SET output (... input ...)). */
2093 operands_match_p (x
, y
)
2097 RTX_CODE code
= GET_CODE (x
);
2103 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2104 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2105 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2111 i
= REGNO (SUBREG_REG (x
));
2112 if (i
>= FIRST_PSEUDO_REGISTER
)
2114 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2115 GET_MODE (SUBREG_REG (x
)),
2122 if (GET_CODE (y
) == SUBREG
)
2124 j
= REGNO (SUBREG_REG (y
));
2125 if (j
>= FIRST_PSEUDO_REGISTER
)
2127 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2128 GET_MODE (SUBREG_REG (y
)),
2135 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2136 multiple hard register group, so that for example (reg:DI 0) and
2137 (reg:SI 1) will be considered the same register. */
2138 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2139 && i
< FIRST_PSEUDO_REGISTER
)
2140 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2141 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2142 && j
< FIRST_PSEUDO_REGISTER
)
2143 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2147 /* If two operands must match, because they are really a single
2148 operand of an assembler insn, then two postincrements are invalid
2149 because the assembler insn would increment only once.
2150 On the other hand, a postincrement matches ordinary indexing
2151 if the postincrement is the output operand. */
2152 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2153 return operands_match_p (XEXP (x
, 0), y
);
2154 /* Two preincrements are invalid
2155 because the assembler insn would increment only once.
2156 On the other hand, a preincrement matches ordinary indexing
2157 if the preincrement is the input operand.
2158 In this case, return 2, since some callers need to do special
2159 things when this happens. */
2160 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2161 || GET_CODE (y
) == PRE_MODIFY
)
2162 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2166 /* Now we have disposed of all the cases
2167 in which different rtx codes can match. */
2168 if (code
!= GET_CODE (y
))
2170 if (code
== LABEL_REF
)
2171 return XEXP (x
, 0) == XEXP (y
, 0);
2172 if (code
== SYMBOL_REF
)
2173 return XSTR (x
, 0) == XSTR (y
, 0);
2175 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2177 if (GET_MODE (x
) != GET_MODE (y
))
2180 /* Compare the elements. If any pair of corresponding elements
2181 fail to match, return 0 for the whole things. */
2184 fmt
= GET_RTX_FORMAT (code
);
2185 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2191 if (XWINT (x
, i
) != XWINT (y
, i
))
2196 if (XINT (x
, i
) != XINT (y
, i
))
2201 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2204 /* If any subexpression returns 2,
2205 we should return 2 if we are successful. */
2214 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2216 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2218 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2226 /* It is believed that rtx's at this level will never
2227 contain anything but integers and other rtx's,
2228 except for within LABEL_REFs and SYMBOL_REFs. */
2233 return 1 + success_2
;
2236 /* Describe the range of registers or memory referenced by X.
2237 If X is a register, set REG_FLAG and put the first register
2238 number into START and the last plus one into END.
2239 If X is a memory reference, put a base address into BASE
2240 and a range of integer offsets into START and END.
2241 If X is pushing on the stack, we can assume it causes no trouble,
2242 so we set the SAFE field. */
2244 static struct decomposition
2248 struct decomposition val
;
2254 if (GET_CODE (x
) == MEM
)
2256 rtx base
= NULL_RTX
, offset
= 0;
2257 rtx addr
= XEXP (x
, 0);
2259 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2260 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2262 val
.base
= XEXP (addr
, 0);
2263 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2264 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2265 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2269 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2271 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2272 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2273 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2275 val
.base
= XEXP (addr
, 0);
2276 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2277 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2278 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2283 if (GET_CODE (addr
) == CONST
)
2285 addr
= XEXP (addr
, 0);
2288 if (GET_CODE (addr
) == PLUS
)
2290 if (CONSTANT_P (XEXP (addr
, 0)))
2292 base
= XEXP (addr
, 1);
2293 offset
= XEXP (addr
, 0);
2295 else if (CONSTANT_P (XEXP (addr
, 1)))
2297 base
= XEXP (addr
, 0);
2298 offset
= XEXP (addr
, 1);
2305 offset
= const0_rtx
;
2307 if (GET_CODE (offset
) == CONST
)
2308 offset
= XEXP (offset
, 0);
2309 if (GET_CODE (offset
) == PLUS
)
2311 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2313 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2314 offset
= XEXP (offset
, 0);
2316 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2318 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2319 offset
= XEXP (offset
, 1);
2323 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2324 offset
= const0_rtx
;
2327 else if (GET_CODE (offset
) != CONST_INT
)
2329 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2330 offset
= const0_rtx
;
2333 if (all_const
&& GET_CODE (base
) == PLUS
)
2334 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2336 if (GET_CODE (offset
) != CONST_INT
)
2339 val
.start
= INTVAL (offset
);
2340 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2344 else if (GET_CODE (x
) == REG
)
2347 val
.start
= true_regnum (x
);
2350 /* A pseudo with no hard reg. */
2351 val
.start
= REGNO (x
);
2352 val
.end
= val
.start
+ 1;
2356 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2358 else if (GET_CODE (x
) == SUBREG
)
2360 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2361 /* This could be more precise, but it's good enough. */
2362 return decompose (SUBREG_REG (x
));
2364 val
.start
= true_regnum (x
);
2366 return decompose (SUBREG_REG (x
));
2369 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2371 else if (CONSTANT_P (x
)
2372 /* This hasn't been assigned yet, so it can't conflict yet. */
2373 || GET_CODE (x
) == SCRATCH
)
2380 /* Return 1 if altering Y will not modify the value of X.
2381 Y is also described by YDATA, which should be decompose (Y). */
2384 immune_p (x
, y
, ydata
)
2386 struct decomposition ydata
;
2388 struct decomposition xdata
;
2391 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2395 if (GET_CODE (y
) != MEM
)
2397 /* If Y is memory and X is not, Y can't affect X. */
2398 if (GET_CODE (x
) != MEM
)
2401 xdata
= decompose (x
);
2403 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2405 /* If bases are distinct symbolic constants, there is no overlap. */
2406 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2408 /* Constants and stack slots never overlap. */
2409 if (CONSTANT_P (xdata
.base
)
2410 && (ydata
.base
== frame_pointer_rtx
2411 || ydata
.base
== hard_frame_pointer_rtx
2412 || ydata
.base
== stack_pointer_rtx
))
2414 if (CONSTANT_P (ydata
.base
)
2415 && (xdata
.base
== frame_pointer_rtx
2416 || xdata
.base
== hard_frame_pointer_rtx
2417 || xdata
.base
== stack_pointer_rtx
))
2419 /* If either base is variable, we don't know anything. */
2423 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2426 /* Similar, but calls decompose. */
2429 safe_from_earlyclobber (op
, clobber
)
2432 struct decomposition early_data
;
2434 early_data
= decompose (clobber
);
2435 return immune_p (op
, clobber
, early_data
);
2438 /* Main entry point of this file: search the body of INSN
2439 for values that need reloading and record them with push_reload.
2440 REPLACE nonzero means record also where the values occur
2441 so that subst_reloads can be used.
2443 IND_LEVELS says how many levels of indirection are supported by this
2444 machine; a value of zero means that a memory reference is not a valid
2447 LIVE_KNOWN says we have valid information about which hard
2448 regs are live at each point in the program; this is true when
2449 we are called from global_alloc but false when stupid register
2450 allocation has been done.
2452 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2453 which is nonnegative if the reg has been commandeered for reloading into.
2454 It is copied into STATIC_RELOAD_REG_P and referenced from there
2455 by various subroutines.
2457 Return TRUE if some operands need to be changed, because of swapping
2458 commutative operands, reg_equiv_address substitution, or whatever. */
2461 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2463 int replace
, ind_levels
;
2465 short *reload_reg_p
;
2467 int insn_code_number
;
2470 /* These start out as the constraints for the insn
2471 and they are chewed up as we consider alternatives. */
2472 char *constraints
[MAX_RECOG_OPERANDS
];
2473 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2475 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2476 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2477 /* Nonzero for a MEM operand whose entire address needs a reload. */
2478 int address_reloaded
[MAX_RECOG_OPERANDS
];
2479 /* Value of enum reload_type to use for operand. */
2480 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2481 /* Value of enum reload_type to use within address of operand. */
2482 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2483 /* Save the usage of each operand. */
2484 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2485 int no_input_reloads
= 0, no_output_reloads
= 0;
2487 int this_alternative
[MAX_RECOG_OPERANDS
];
2488 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2489 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2490 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2491 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2492 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2494 int goal_alternative
[MAX_RECOG_OPERANDS
];
2495 int this_alternative_number
;
2496 int goal_alternative_number
= 0;
2497 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2498 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2499 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2500 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2501 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2502 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2503 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2504 int goal_alternative_swapped
;
2507 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2508 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2509 rtx body
= PATTERN (insn
);
2510 rtx set
= single_set (insn
);
2511 int goal_earlyclobber
= 0, this_earlyclobber
;
2512 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2518 n_earlyclobbers
= 0;
2519 replace_reloads
= replace
;
2520 hard_regs_live_known
= live_known
;
2521 static_reload_reg_p
= reload_reg_p
;
2523 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2524 neither are insns that SET cc0. Insns that use CC0 are not allowed
2525 to have any input reloads. */
2526 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2527 no_output_reloads
= 1;
2530 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2531 no_input_reloads
= 1;
2532 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2533 no_output_reloads
= 1;
2536 #ifdef SECONDARY_MEMORY_NEEDED
2537 /* The eliminated forms of any secondary memory locations are per-insn, so
2538 clear them out here. */
2540 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2543 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2544 is cheap to move between them. If it is not, there may not be an insn
2545 to do the copy, so we may need a reload. */
2546 if (GET_CODE (body
) == SET
2547 && GET_CODE (SET_DEST (body
)) == REG
2548 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2549 && GET_CODE (SET_SRC (body
)) == REG
2550 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2551 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2552 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2553 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2556 extract_insn (insn
);
2558 noperands
= reload_n_operands
= recog_data
.n_operands
;
2559 n_alternatives
= recog_data
.n_alternatives
;
2561 /* Just return "no reloads" if insn has no operands with constraints. */
2562 if (noperands
== 0 || n_alternatives
== 0)
2565 insn_code_number
= INSN_CODE (insn
);
2566 this_insn_is_asm
= insn_code_number
< 0;
2568 memcpy (operand_mode
, recog_data
.operand_mode
,
2569 noperands
* sizeof (enum machine_mode
));
2570 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2574 /* If we will need to know, later, whether some pair of operands
2575 are the same, we must compare them now and save the result.
2576 Reloading the base and index registers will clobber them
2577 and afterward they will fail to match. */
2579 for (i
= 0; i
< noperands
; i
++)
2584 substed_operand
[i
] = recog_data
.operand
[i
];
2587 modified
[i
] = RELOAD_READ
;
2589 /* Scan this operand's constraint to see if it is an output operand,
2590 an in-out operand, is commutative, or should match another. */
2594 p
+= CONSTRAINT_LEN (c
, p
);
2596 modified
[i
] = RELOAD_WRITE
;
2598 modified
[i
] = RELOAD_READ_WRITE
;
2601 /* The last operand should not be marked commutative. */
2602 if (i
== noperands
- 1)
2607 else if (ISDIGIT (c
))
2609 c
= strtoul (p
- 1, &p
, 10);
2611 operands_match
[c
][i
]
2612 = operands_match_p (recog_data
.operand
[c
],
2613 recog_data
.operand
[i
]);
2615 /* An operand may not match itself. */
2619 /* If C can be commuted with C+1, and C might need to match I,
2620 then C+1 might also need to match I. */
2621 if (commutative
>= 0)
2623 if (c
== commutative
|| c
== commutative
+ 1)
2625 int other
= c
+ (c
== commutative
? 1 : -1);
2626 operands_match
[other
][i
]
2627 = operands_match_p (recog_data
.operand
[other
],
2628 recog_data
.operand
[i
]);
2630 if (i
== commutative
|| i
== commutative
+ 1)
2632 int other
= i
+ (i
== commutative
? 1 : -1);
2633 operands_match
[c
][other
]
2634 = operands_match_p (recog_data
.operand
[c
],
2635 recog_data
.operand
[other
]);
2637 /* Note that C is supposed to be less than I.
2638 No need to consider altering both C and I because in
2639 that case we would alter one into the other. */
2645 /* Examine each operand that is a memory reference or memory address
2646 and reload parts of the addresses into index registers.
2647 Also here any references to pseudo regs that didn't get hard regs
2648 but are equivalent to constants get replaced in the insn itself
2649 with those constants. Nobody will ever see them again.
2651 Finally, set up the preferred classes of each operand. */
2653 for (i
= 0; i
< noperands
; i
++)
2655 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2657 address_reloaded
[i
] = 0;
2658 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2659 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2662 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2663 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2666 if (*constraints
[i
] == 0)
2667 /* Ignore things like match_operator operands. */
2669 else if (constraints
[i
][0] == 'p'
2670 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2672 find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2673 recog_data
.operand
[i
],
2674 recog_data
.operand_loc
[i
],
2675 i
, operand_type
[i
], ind_levels
, insn
);
2677 /* If we now have a simple operand where we used to have a
2678 PLUS or MULT, re-recognize and try again. */
2679 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2680 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2681 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2682 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2684 INSN_CODE (insn
) = -1;
2685 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2690 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2691 substed_operand
[i
] = recog_data
.operand
[i
];
2693 else if (code
== MEM
)
2696 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2697 recog_data
.operand_loc
[i
],
2698 XEXP (recog_data
.operand
[i
], 0),
2699 &XEXP (recog_data
.operand
[i
], 0),
2700 i
, address_type
[i
], ind_levels
, insn
);
2701 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2702 substed_operand
[i
] = recog_data
.operand
[i
];
2704 else if (code
== SUBREG
)
2706 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2708 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2711 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2713 &address_reloaded
[i
]);
2715 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2716 that didn't get a hard register, emit a USE with a REG_EQUAL
2717 note in front so that we might inherit a previous, possibly
2721 && GET_CODE (op
) == MEM
2722 && GET_CODE (reg
) == REG
2723 && (GET_MODE_SIZE (GET_MODE (reg
))
2724 >= GET_MODE_SIZE (GET_MODE (op
))))
2725 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2727 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2729 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2731 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2732 /* We can get a PLUS as an "operand" as a result of register
2733 elimination. See eliminate_regs and gen_reload. We handle
2734 a unary operator by reloading the operand. */
2735 substed_operand
[i
] = recog_data
.operand
[i
]
2736 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2737 ind_levels
, 0, insn
,
2738 &address_reloaded
[i
]);
2739 else if (code
== REG
)
2741 /* This is equivalent to calling find_reloads_toplev.
2742 The code is duplicated for speed.
2743 When we find a pseudo always equivalent to a constant,
2744 we replace it by the constant. We must be sure, however,
2745 that we don't try to replace it in the insn in which it
2747 int regno
= REGNO (recog_data
.operand
[i
]);
2748 if (reg_equiv_constant
[regno
] != 0
2749 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2751 /* Record the existing mode so that the check if constants are
2752 allowed will work when operand_mode isn't specified. */
2754 if (operand_mode
[i
] == VOIDmode
)
2755 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2757 substed_operand
[i
] = recog_data
.operand
[i
]
2758 = reg_equiv_constant
[regno
];
2760 if (reg_equiv_memory_loc
[regno
] != 0
2761 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2762 /* We need not give a valid is_set_dest argument since the case
2763 of a constant equivalence was checked above. */
2764 substed_operand
[i
] = recog_data
.operand
[i
]
2765 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2766 ind_levels
, 0, insn
,
2767 &address_reloaded
[i
]);
2769 /* If the operand is still a register (we didn't replace it with an
2770 equivalent), get the preferred class to reload it into. */
2771 code
= GET_CODE (recog_data
.operand
[i
]);
2773 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2774 >= FIRST_PSEUDO_REGISTER
)
2775 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2779 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2780 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2783 /* If this is simply a copy from operand 1 to operand 0, merge the
2784 preferred classes for the operands. */
2785 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2786 && recog_data
.operand
[1] == SET_SRC (set
))
2788 preferred_class
[0] = preferred_class
[1]
2789 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2790 pref_or_nothing
[0] |= pref_or_nothing
[1];
2791 pref_or_nothing
[1] |= pref_or_nothing
[0];
2794 /* Now see what we need for pseudo-regs that didn't get hard regs
2795 or got the wrong kind of hard reg. For this, we must consider
2796 all the operands together against the register constraints. */
2798 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2801 goal_alternative_swapped
= 0;
2804 /* The constraints are made of several alternatives.
2805 Each operand's constraint looks like foo,bar,... with commas
2806 separating the alternatives. The first alternatives for all
2807 operands go together, the second alternatives go together, etc.
2809 First loop over alternatives. */
2811 for (this_alternative_number
= 0;
2812 this_alternative_number
< n_alternatives
;
2813 this_alternative_number
++)
2815 /* Loop over operands for one constraint alternative. */
2816 /* LOSERS counts those that don't fit this alternative
2817 and would require loading. */
2819 /* BAD is set to 1 if it some operand can't fit this alternative
2820 even after reloading. */
2822 /* REJECT is a count of how undesirable this alternative says it is
2823 if any reloading is required. If the alternative matches exactly
2824 then REJECT is ignored, but otherwise it gets this much
2825 counted against it in addition to the reloading needed. Each
2826 ? counts three times here since we want the disparaging caused by
2827 a bad register class to only count 1/3 as much. */
2830 this_earlyclobber
= 0;
2832 for (i
= 0; i
< noperands
; i
++)
2834 char *p
= constraints
[i
];
2839 /* 0 => this operand can be reloaded somehow for this alternative. */
2841 /* 0 => this operand can be reloaded if the alternative allows regs. */
2845 rtx operand
= recog_data
.operand
[i
];
2847 /* Nonzero means this is a MEM that must be reloaded into a reg
2848 regardless of what the constraint says. */
2849 int force_reload
= 0;
2851 /* Nonzero if a constant forced into memory would be OK for this
2854 int earlyclobber
= 0;
2856 /* If the predicate accepts a unary operator, it means that
2857 we need to reload the operand, but do not do this for
2858 match_operator and friends. */
2859 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2860 operand
= XEXP (operand
, 0);
2862 /* If the operand is a SUBREG, extract
2863 the REG or MEM (or maybe even a constant) within.
2864 (Constants can occur as a result of reg_equiv_constant.) */
2866 while (GET_CODE (operand
) == SUBREG
)
2868 /* Offset only matters when operand is a REG and
2869 it is a hard reg. This is because it is passed
2870 to reg_fits_class_p if it is a REG and all pseudos
2871 return 0 from that function. */
2872 if (GET_CODE (SUBREG_REG (operand
)) == REG
2873 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2875 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2876 GET_MODE (SUBREG_REG (operand
)),
2877 SUBREG_BYTE (operand
),
2878 GET_MODE (operand
));
2880 operand
= SUBREG_REG (operand
);
2881 /* Force reload if this is a constant or PLUS or if there may
2882 be a problem accessing OPERAND in the outer mode. */
2883 if (CONSTANT_P (operand
)
2884 || GET_CODE (operand
) == PLUS
2885 /* We must force a reload of paradoxical SUBREGs
2886 of a MEM because the alignment of the inner value
2887 may not be enough to do the outer reference. On
2888 big-endian machines, it may also reference outside
2891 On machines that extend byte operations and we have a
2892 SUBREG where both the inner and outer modes are no wider
2893 than a word and the inner mode is narrower, is integral,
2894 and gets extended when loaded from memory, combine.c has
2895 made assumptions about the behavior of the machine in such
2896 register access. If the data is, in fact, in memory we
2897 must always load using the size assumed to be in the
2898 register and let the insn do the different-sized
2901 This is doubly true if WORD_REGISTER_OPERATIONS. In
2902 this case eliminate_regs has left non-paradoxical
2903 subregs for push_reloads to see. Make sure it does
2904 by forcing the reload.
2906 ??? When is it right at this stage to have a subreg
2907 of a mem that is _not_ to be handled specially? IMO
2908 those should have been reduced to just a mem. */
2909 || ((GET_CODE (operand
) == MEM
2910 || (GET_CODE (operand
)== REG
2911 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2912 #ifndef WORD_REGISTER_OPERATIONS
2913 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2914 < BIGGEST_ALIGNMENT
)
2915 && (GET_MODE_SIZE (operand_mode
[i
])
2916 > GET_MODE_SIZE (GET_MODE (operand
))))
2917 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2918 #ifdef LOAD_EXTEND_OP
2919 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2920 && (GET_MODE_SIZE (GET_MODE (operand
))
2922 && (GET_MODE_SIZE (operand_mode
[i
])
2923 > GET_MODE_SIZE (GET_MODE (operand
)))
2924 && INTEGRAL_MODE_P (GET_MODE (operand
))
2925 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2930 /* This following hunk of code should no longer be
2931 needed at all with SUBREG_BYTE. If you need this
2932 code back, please explain to me why so I can
2933 fix the real problem. -DaveM */
2935 /* Subreg of a hard reg which can't handle the subreg's mode
2936 or which would handle that mode in the wrong number of
2937 registers for subregging to work. */
2938 || (GET_CODE (operand
) == REG
2939 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2940 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2941 && (GET_MODE_SIZE (GET_MODE (operand
))
2943 && ((GET_MODE_SIZE (GET_MODE (operand
))
2945 != HARD_REGNO_NREGS (REGNO (operand
),
2946 GET_MODE (operand
))))
2947 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2954 this_alternative
[i
] = (int) NO_REGS
;
2955 this_alternative_win
[i
] = 0;
2956 this_alternative_match_win
[i
] = 0;
2957 this_alternative_offmemok
[i
] = 0;
2958 this_alternative_earlyclobber
[i
] = 0;
2959 this_alternative_matches
[i
] = -1;
2961 /* An empty constraint or empty alternative
2962 allows anything which matched the pattern. */
2963 if (*p
== 0 || *p
== ',')
2966 /* Scan this alternative's specs for this operand;
2967 set WIN if the operand fits any letter in this alternative.
2968 Otherwise, clear BADOP if this operand could
2969 fit some letter after reloads,
2970 or set WINREG if this operand could fit after reloads
2971 provided the constraint allows some registers. */
2974 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
2983 case '=': case '+': case '*':
2987 /* The last operand should not be marked commutative. */
2988 if (i
!= noperands
- 1)
3001 /* Ignore rest of this alternative as far as
3002 reloading is concerned. */
3005 while (*p
&& *p
!= ',');
3009 case '0': case '1': case '2': case '3': case '4':
3010 case '5': case '6': case '7': case '8': case '9':
3011 m
= strtoul (p
, &end
, 10);
3015 this_alternative_matches
[i
] = m
;
3016 /* We are supposed to match a previous operand.
3017 If we do, we win if that one did.
3018 If we do not, count both of the operands as losers.
3019 (This is too conservative, since most of the time
3020 only a single reload insn will be needed to make
3021 the two operands win. As a result, this alternative
3022 may be rejected when it is actually desirable.) */
3023 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3024 /* If we are matching as if two operands were swapped,
3025 also pretend that operands_match had been computed
3027 But if I is the second of those and C is the first,
3028 don't exchange them, because operands_match is valid
3029 only on one side of its diagonal. */
3031 [(m
== commutative
|| m
== commutative
+ 1)
3032 ? 2 * commutative
+ 1 - m
: m
]
3033 [(i
== commutative
|| i
== commutative
+ 1)
3034 ? 2 * commutative
+ 1 - i
: i
])
3035 : operands_match
[m
][i
])
3037 /* If we are matching a non-offsettable address where an
3038 offsettable address was expected, then we must reject
3039 this combination, because we can't reload it. */
3040 if (this_alternative_offmemok
[m
]
3041 && GET_CODE (recog_data
.operand
[m
]) == MEM
3042 && this_alternative
[m
] == (int) NO_REGS
3043 && ! this_alternative_win
[m
])
3046 did_match
= this_alternative_win
[m
];
3050 /* Operands don't match. */
3052 /* Retroactively mark the operand we had to match
3053 as a loser, if it wasn't already. */
3054 if (this_alternative_win
[m
])
3056 this_alternative_win
[m
] = 0;
3057 if (this_alternative
[m
] == (int) NO_REGS
)
3059 /* But count the pair only once in the total badness of
3060 this alternative, if the pair can be a dummy reload. */
3062 = find_dummy_reload (recog_data
.operand
[i
],
3063 recog_data
.operand
[m
],
3064 recog_data
.operand_loc
[i
],
3065 recog_data
.operand_loc
[m
],
3066 operand_mode
[i
], operand_mode
[m
],
3067 this_alternative
[m
], -1,
3068 this_alternative_earlyclobber
[m
]);
3073 /* This can be fixed with reloads if the operand
3074 we are supposed to match can be fixed with reloads. */
3076 this_alternative
[i
] = this_alternative
[m
];
3078 /* If we have to reload this operand and some previous
3079 operand also had to match the same thing as this
3080 operand, we don't know how to do that. So reject this
3082 if (! did_match
|| force_reload
)
3083 for (j
= 0; j
< i
; j
++)
3084 if (this_alternative_matches
[j
]
3085 == this_alternative_matches
[i
])
3090 /* All necessary reloads for an address_operand
3091 were handled in find_reloads_address. */
3092 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3100 if (GET_CODE (operand
) == MEM
3101 || (GET_CODE (operand
) == REG
3102 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3103 && reg_renumber
[REGNO (operand
)] < 0))
3105 if (CONSTANT_P (operand
)
3106 /* force_const_mem does not accept HIGH. */
3107 && GET_CODE (operand
) != HIGH
)
3113 if (GET_CODE (operand
) == MEM
3114 && ! address_reloaded
[i
]
3115 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3116 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3121 if (GET_CODE (operand
) == MEM
3122 && ! address_reloaded
[i
]
3123 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3124 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3128 /* Memory operand whose address is not offsettable. */
3132 if (GET_CODE (operand
) == MEM
3133 && ! (ind_levels
? offsettable_memref_p (operand
)
3134 : offsettable_nonstrict_memref_p (operand
))
3135 /* Certain mem addresses will become offsettable
3136 after they themselves are reloaded. This is important;
3137 we don't want our own handling of unoffsettables
3138 to override the handling of reg_equiv_address. */
3139 && !(GET_CODE (XEXP (operand
, 0)) == REG
3141 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3145 /* Memory operand whose address is offsettable. */
3149 if ((GET_CODE (operand
) == MEM
3150 /* If IND_LEVELS, find_reloads_address won't reload a
3151 pseudo that didn't get a hard reg, so we have to
3152 reject that case. */
3153 && ((ind_levels
? offsettable_memref_p (operand
)
3154 : offsettable_nonstrict_memref_p (operand
))
3155 /* A reloaded address is offsettable because it is now
3156 just a simple register indirect. */
3157 || address_reloaded
[i
]))
3158 || (GET_CODE (operand
) == REG
3159 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3160 && reg_renumber
[REGNO (operand
)] < 0
3161 /* If reg_equiv_address is nonzero, we will be
3162 loading it into a register; hence it will be
3163 offsettable, but we cannot say that reg_equiv_mem
3164 is offsettable without checking. */
3165 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3166 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3167 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3169 /* force_const_mem does not accept HIGH. */
3170 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3171 || GET_CODE (operand
) == MEM
)
3178 /* Output operand that is stored before the need for the
3179 input operands (and their index registers) is over. */
3180 earlyclobber
= 1, this_earlyclobber
= 1;
3185 if (GET_CODE (operand
) == CONST_DOUBLE
3186 || (GET_CODE (operand
) == CONST_VECTOR
3187 && (GET_MODE_CLASS (GET_MODE (operand
))
3188 == MODE_VECTOR_FLOAT
)))
3194 if (GET_CODE (operand
) == CONST_DOUBLE
3195 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3200 if (GET_CODE (operand
) == CONST_INT
3201 || (GET_CODE (operand
) == CONST_DOUBLE
3202 && GET_MODE (operand
) == VOIDmode
))
3205 if (CONSTANT_P (operand
)
3206 #ifdef LEGITIMATE_PIC_OPERAND_P
3207 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3214 if (GET_CODE (operand
) == CONST_INT
3215 || (GET_CODE (operand
) == CONST_DOUBLE
3216 && GET_MODE (operand
) == VOIDmode
))
3228 if (GET_CODE (operand
) == CONST_INT
3229 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3239 /* A PLUS is never a valid operand, but reload can make
3240 it from a register when eliminating registers. */
3241 && GET_CODE (operand
) != PLUS
3242 /* A SCRATCH is not a valid operand. */
3243 && GET_CODE (operand
) != SCRATCH
3244 #ifdef LEGITIMATE_PIC_OPERAND_P
3245 && (! CONSTANT_P (operand
)
3247 || LEGITIMATE_PIC_OPERAND_P (operand
))
3249 && (GENERAL_REGS
== ALL_REGS
3250 || GET_CODE (operand
) != REG
3251 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3252 && reg_renumber
[REGNO (operand
)] < 0)))
3254 /* Drop through into 'r' case. */
3258 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3262 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3264 #ifdef EXTRA_CONSTRAINT_STR
3265 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3269 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3271 /* If the address was already reloaded,
3273 if (GET_CODE (operand
) == MEM
&& address_reloaded
[i
])
3275 /* Likewise if the address will be reloaded because
3276 reg_equiv_address is nonzero. For reg_equiv_mem
3277 we have to check. */
3278 if (GET_CODE (operand
) == REG
3279 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3280 && reg_renumber
[REGNO (operand
)] < 0
3281 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3282 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3283 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3286 /* If we didn't already win, we can reload
3287 constants via force_const_mem, and other
3288 MEMs by reloading the address like for 'o'. */
3289 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3290 || GET_CODE (operand
) == MEM
)
3296 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3298 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3301 /* If we didn't already win, we can reload
3302 the address into a base register. */
3303 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3306 /* Address constraints are reloaded in Pmode, no matter
3307 what mode is given in the machine description. */
3308 operand_mode
[i
] = Pmode
;
3312 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3319 = (int) (reg_class_subunion
3320 [this_alternative
[i
]]
3321 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3323 if (GET_MODE (operand
) == BLKmode
)
3326 if (GET_CODE (operand
) == REG
3327 && reg_fits_class_p (operand
, this_alternative
[i
],
3328 offset
, GET_MODE (recog_data
.operand
[i
])))
3332 while ((p
+= len
), c
);
3336 /* If this operand could be handled with a reg,
3337 and some reg is allowed, then this operand can be handled. */
3338 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3341 /* Record which operands fit this alternative. */
3342 this_alternative_earlyclobber
[i
] = earlyclobber
;
3343 if (win
&& ! force_reload
)
3344 this_alternative_win
[i
] = 1;
3345 else if (did_match
&& ! force_reload
)
3346 this_alternative_match_win
[i
] = 1;
3349 int const_to_mem
= 0;
3351 this_alternative_offmemok
[i
] = offmemok
;
3355 /* Alternative loses if it has no regs for a reg operand. */
3356 if (GET_CODE (operand
) == REG
3357 && this_alternative
[i
] == (int) NO_REGS
3358 && this_alternative_matches
[i
] < 0)
3361 /* If this is a constant that is reloaded into the desired
3362 class by copying it to memory first, count that as another
3363 reload. This is consistent with other code and is
3364 required to avoid choosing another alternative when
3365 the constant is moved into memory by this function on
3366 an early reload pass. Note that the test here is
3367 precisely the same as in the code below that calls
3369 if (CONSTANT_P (operand
)
3370 /* force_const_mem does not accept HIGH. */
3371 && GET_CODE (operand
) != HIGH
3372 && ((PREFERRED_RELOAD_CLASS (operand
,
3373 (enum reg_class
) this_alternative
[i
])
3375 || no_input_reloads
)
3376 && operand_mode
[i
] != VOIDmode
)
3379 if (this_alternative
[i
] != (int) NO_REGS
)
3383 /* If we can't reload this value at all, reject this
3384 alternative. Note that we could also lose due to
3385 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3388 if (! CONSTANT_P (operand
)
3389 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3390 && (PREFERRED_RELOAD_CLASS (operand
,
3391 (enum reg_class
) this_alternative
[i
])
3395 /* Alternative loses if it requires a type of reload not
3396 permitted for this insn. We can always reload SCRATCH
3397 and objects with a REG_UNUSED note. */
3398 else if (GET_CODE (operand
) != SCRATCH
3399 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3400 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3402 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3406 /* We prefer to reload pseudos over reloading other things,
3407 since such reloads may be able to be eliminated later.
3408 If we are reloading a SCRATCH, we won't be generating any
3409 insns, just using a register, so it is also preferred.
3410 So bump REJECT in other cases. Don't do this in the
3411 case where we are forcing a constant into memory and
3412 it will then win since we don't want to have a different
3413 alternative match then. */
3414 if (! (GET_CODE (operand
) == REG
3415 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3416 && GET_CODE (operand
) != SCRATCH
3417 && ! (const_to_mem
&& constmemok
))
3420 /* Input reloads can be inherited more often than output
3421 reloads can be removed, so penalize output reloads. */
3422 if (operand_type
[i
] != RELOAD_FOR_INPUT
3423 && GET_CODE (operand
) != SCRATCH
)
3427 /* If this operand is a pseudo register that didn't get a hard
3428 reg and this alternative accepts some register, see if the
3429 class that we want is a subset of the preferred class for this
3430 register. If not, but it intersects that class, use the
3431 preferred class instead. If it does not intersect the preferred
3432 class, show that usage of this alternative should be discouraged;
3433 it will be discouraged more still if the register is `preferred
3434 or nothing'. We do this because it increases the chance of
3435 reusing our spill register in a later insn and avoiding a pair
3436 of memory stores and loads.
3438 Don't bother with this if this alternative will accept this
3441 Don't do this for a multiword operand, since it is only a
3442 small win and has the risk of requiring more spill registers,
3443 which could cause a large loss.
3445 Don't do this if the preferred class has only one register
3446 because we might otherwise exhaust the class. */
3448 if (! win
&& ! did_match
3449 && this_alternative
[i
] != (int) NO_REGS
3450 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3451 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3453 if (! reg_class_subset_p (this_alternative
[i
],
3454 preferred_class
[i
]))
3456 /* Since we don't have a way of forming the intersection,
3457 we just do something special if the preferred class
3458 is a subset of the class we have; that's the most
3459 common case anyway. */
3460 if (reg_class_subset_p (preferred_class
[i
],
3461 this_alternative
[i
]))
3462 this_alternative
[i
] = (int) preferred_class
[i
];
3464 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3469 /* Now see if any output operands that are marked "earlyclobber"
3470 in this alternative conflict with any input operands
3471 or any memory addresses. */
3473 for (i
= 0; i
< noperands
; i
++)
3474 if (this_alternative_earlyclobber
[i
]
3475 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3477 struct decomposition early_data
;
3479 early_data
= decompose (recog_data
.operand
[i
]);
3481 if (modified
[i
] == RELOAD_READ
)
3484 if (this_alternative
[i
] == NO_REGS
)
3486 this_alternative_earlyclobber
[i
] = 0;
3487 if (this_insn_is_asm
)
3488 error_for_asm (this_insn
,
3489 "`&' constraint used with no register class");
3494 for (j
= 0; j
< noperands
; j
++)
3495 /* Is this an input operand or a memory ref? */
3496 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3497 || modified
[j
] != RELOAD_WRITE
)
3499 /* Ignore things like match_operator operands. */
3500 && *recog_data
.constraints
[j
] != 0
3501 /* Don't count an input operand that is constrained to match
3502 the early clobber operand. */
3503 && ! (this_alternative_matches
[j
] == i
3504 && rtx_equal_p (recog_data
.operand
[i
],
3505 recog_data
.operand
[j
]))
3506 /* Is it altered by storing the earlyclobber operand? */
3507 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3510 /* If the output is in a single-reg class,
3511 it's costly to reload it, so reload the input instead. */
3512 if (reg_class_size
[this_alternative
[i
]] == 1
3513 && (GET_CODE (recog_data
.operand
[j
]) == REG
3514 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3517 this_alternative_win
[j
] = 0;
3518 this_alternative_match_win
[j
] = 0;
3523 /* If an earlyclobber operand conflicts with something,
3524 it must be reloaded, so request this and count the cost. */
3528 this_alternative_win
[i
] = 0;
3529 this_alternative_match_win
[j
] = 0;
3530 for (j
= 0; j
< noperands
; j
++)
3531 if (this_alternative_matches
[j
] == i
3532 && this_alternative_match_win
[j
])
3534 this_alternative_win
[j
] = 0;
3535 this_alternative_match_win
[j
] = 0;
3541 /* If one alternative accepts all the operands, no reload required,
3542 choose that alternative; don't consider the remaining ones. */
3545 /* Unswap these so that they are never swapped at `finish'. */
3546 if (commutative
>= 0)
3548 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3549 recog_data
.operand
[commutative
+ 1]
3550 = substed_operand
[commutative
+ 1];
3552 for (i
= 0; i
< noperands
; i
++)
3554 goal_alternative_win
[i
] = this_alternative_win
[i
];
3555 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3556 goal_alternative
[i
] = this_alternative
[i
];
3557 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3558 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3559 goal_alternative_earlyclobber
[i
]
3560 = this_alternative_earlyclobber
[i
];
3562 goal_alternative_number
= this_alternative_number
;
3563 goal_alternative_swapped
= swapped
;
3564 goal_earlyclobber
= this_earlyclobber
;
3568 /* REJECT, set by the ! and ? constraint characters and when a register
3569 would be reloaded into a non-preferred class, discourages the use of
3570 this alternative for a reload goal. REJECT is incremented by six
3571 for each ? and two for each non-preferred class. */
3572 losers
= losers
* 6 + reject
;
3574 /* If this alternative can be made to work by reloading,
3575 and it needs less reloading than the others checked so far,
3576 record it as the chosen goal for reloading. */
3577 if (! bad
&& best
> losers
)
3579 for (i
= 0; i
< noperands
; i
++)
3581 goal_alternative
[i
] = this_alternative
[i
];
3582 goal_alternative_win
[i
] = this_alternative_win
[i
];
3583 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3584 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3585 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3586 goal_alternative_earlyclobber
[i
]
3587 = this_alternative_earlyclobber
[i
];
3589 goal_alternative_swapped
= swapped
;
3591 goal_alternative_number
= this_alternative_number
;
3592 goal_earlyclobber
= this_earlyclobber
;
3596 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3597 then we need to try each alternative twice,
3598 the second time matching those two operands
3599 as if we had exchanged them.
3600 To do this, really exchange them in operands.
3602 If we have just tried the alternatives the second time,
3603 return operands to normal and drop through. */
3605 if (commutative
>= 0)
3610 enum reg_class tclass
;
3613 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3614 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3615 /* Swap the duplicates too. */
3616 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3617 if (recog_data
.dup_num
[i
] == commutative
3618 || recog_data
.dup_num
[i
] == commutative
+ 1)
3619 *recog_data
.dup_loc
[i
]
3620 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3622 tclass
= preferred_class
[commutative
];
3623 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3624 preferred_class
[commutative
+ 1] = tclass
;
3626 t
= pref_or_nothing
[commutative
];
3627 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3628 pref_or_nothing
[commutative
+ 1] = t
;
3630 memcpy (constraints
, recog_data
.constraints
,
3631 noperands
* sizeof (char *));
3636 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3637 recog_data
.operand
[commutative
+ 1]
3638 = substed_operand
[commutative
+ 1];
3639 /* Unswap the duplicates too. */
3640 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3641 if (recog_data
.dup_num
[i
] == commutative
3642 || recog_data
.dup_num
[i
] == commutative
+ 1)
3643 *recog_data
.dup_loc
[i
]
3644 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3648 /* The operands don't meet the constraints.
3649 goal_alternative describes the alternative
3650 that we could reach by reloading the fewest operands.
3651 Reload so as to fit it. */
3653 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3655 /* No alternative works with reloads?? */
3656 if (insn_code_number
>= 0)
3657 fatal_insn ("unable to generate reloads for:", insn
);
3658 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3659 /* Avoid further trouble with this insn. */
3660 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3665 /* Jump to `finish' from above if all operands are valid already.
3666 In that case, goal_alternative_win is all 1. */
3669 /* Right now, for any pair of operands I and J that are required to match,
3671 goal_alternative_matches[J] is I.
3672 Set up goal_alternative_matched as the inverse function:
3673 goal_alternative_matched[I] = J. */
3675 for (i
= 0; i
< noperands
; i
++)
3676 goal_alternative_matched
[i
] = -1;
3678 for (i
= 0; i
< noperands
; i
++)
3679 if (! goal_alternative_win
[i
]
3680 && goal_alternative_matches
[i
] >= 0)
3681 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3683 for (i
= 0; i
< noperands
; i
++)
3684 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3686 /* If the best alternative is with operands 1 and 2 swapped,
3687 consider them swapped before reporting the reloads. Update the
3688 operand numbers of any reloads already pushed. */
3690 if (goal_alternative_swapped
)
3694 tem
= substed_operand
[commutative
];
3695 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3696 substed_operand
[commutative
+ 1] = tem
;
3697 tem
= recog_data
.operand
[commutative
];
3698 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3699 recog_data
.operand
[commutative
+ 1] = tem
;
3700 tem
= *recog_data
.operand_loc
[commutative
];
3701 *recog_data
.operand_loc
[commutative
]
3702 = *recog_data
.operand_loc
[commutative
+ 1];
3703 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3705 for (i
= 0; i
< n_reloads
; i
++)
3707 if (rld
[i
].opnum
== commutative
)
3708 rld
[i
].opnum
= commutative
+ 1;
3709 else if (rld
[i
].opnum
== commutative
+ 1)
3710 rld
[i
].opnum
= commutative
;
3714 for (i
= 0; i
< noperands
; i
++)
3716 operand_reloadnum
[i
] = -1;
3718 /* If this is an earlyclobber operand, we need to widen the scope.
3719 The reload must remain valid from the start of the insn being
3720 reloaded until after the operand is stored into its destination.
3721 We approximate this with RELOAD_OTHER even though we know that we
3722 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3724 One special case that is worth checking is when we have an
3725 output that is earlyclobber but isn't used past the insn (typically
3726 a SCRATCH). In this case, we only need have the reload live
3727 through the insn itself, but not for any of our input or output
3729 But we must not accidentally narrow the scope of an existing
3730 RELOAD_OTHER reload - leave these alone.
3732 In any case, anything needed to address this operand can remain
3733 however they were previously categorized. */
3735 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3737 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3738 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3741 /* Any constants that aren't allowed and can't be reloaded
3742 into registers are here changed into memory references. */
3743 for (i
= 0; i
< noperands
; i
++)
3744 if (! goal_alternative_win
[i
]
3745 && CONSTANT_P (recog_data
.operand
[i
])
3746 /* force_const_mem does not accept HIGH. */
3747 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3748 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3749 (enum reg_class
) goal_alternative
[i
])
3751 || no_input_reloads
)
3752 && operand_mode
[i
] != VOIDmode
)
3754 substed_operand
[i
] = recog_data
.operand
[i
]
3755 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3756 recog_data
.operand
[i
]),
3757 i
, address_type
[i
], ind_levels
, 0, insn
,
3759 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3760 goal_alternative_number
))
3761 goal_alternative_win
[i
] = 1;
3764 /* Record the values of the earlyclobber operands for the caller. */
3765 if (goal_earlyclobber
)
3766 for (i
= 0; i
< noperands
; i
++)
3767 if (goal_alternative_earlyclobber
[i
])
3768 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3770 /* Now record reloads for all the operands that need them. */
3771 for (i
= 0; i
< noperands
; i
++)
3772 if (! goal_alternative_win
[i
])
3774 /* Operands that match previous ones have already been handled. */
3775 if (goal_alternative_matches
[i
] >= 0)
3777 /* Handle an operand with a nonoffsettable address
3778 appearing where an offsettable address will do
3779 by reloading the address into a base register.
3781 ??? We can also do this when the operand is a register and
3782 reg_equiv_mem is not offsettable, but this is a bit tricky,
3783 so we don't bother with it. It may not be worth doing. */
3784 else if (goal_alternative_matched
[i
] == -1
3785 && goal_alternative_offmemok
[i
]
3786 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3788 operand_reloadnum
[i
]
3789 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3790 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3791 MODE_BASE_REG_CLASS (VOIDmode
),
3792 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3793 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3794 rld
[operand_reloadnum
[i
]].inc
3795 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3797 /* If this operand is an output, we will have made any
3798 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3799 now we are treating part of the operand as an input, so
3800 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3802 if (modified
[i
] == RELOAD_WRITE
)
3804 for (j
= 0; j
< n_reloads
; j
++)
3806 if (rld
[j
].opnum
== i
)
3808 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3809 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3810 else if (rld
[j
].when_needed
3811 == RELOAD_FOR_OUTADDR_ADDRESS
)
3812 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3817 else if (goal_alternative_matched
[i
] == -1)
3819 operand_reloadnum
[i
]
3820 = push_reload ((modified
[i
] != RELOAD_WRITE
3821 ? recog_data
.operand
[i
] : 0),
3822 (modified
[i
] != RELOAD_READ
3823 ? recog_data
.operand
[i
] : 0),
3824 (modified
[i
] != RELOAD_WRITE
3825 ? recog_data
.operand_loc
[i
] : 0),
3826 (modified
[i
] != RELOAD_READ
3827 ? recog_data
.operand_loc
[i
] : 0),
3828 (enum reg_class
) goal_alternative
[i
],
3829 (modified
[i
] == RELOAD_WRITE
3830 ? VOIDmode
: operand_mode
[i
]),
3831 (modified
[i
] == RELOAD_READ
3832 ? VOIDmode
: operand_mode
[i
]),
3833 (insn_code_number
< 0 ? 0
3834 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3835 0, i
, operand_type
[i
]);
3837 /* In a matching pair of operands, one must be input only
3838 and the other must be output only.
3839 Pass the input operand as IN and the other as OUT. */
3840 else if (modified
[i
] == RELOAD_READ
3841 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3843 operand_reloadnum
[i
]
3844 = push_reload (recog_data
.operand
[i
],
3845 recog_data
.operand
[goal_alternative_matched
[i
]],
3846 recog_data
.operand_loc
[i
],
3847 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3848 (enum reg_class
) goal_alternative
[i
],
3850 operand_mode
[goal_alternative_matched
[i
]],
3851 0, 0, i
, RELOAD_OTHER
);
3852 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3854 else if (modified
[i
] == RELOAD_WRITE
3855 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3857 operand_reloadnum
[goal_alternative_matched
[i
]]
3858 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3859 recog_data
.operand
[i
],
3860 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3861 recog_data
.operand_loc
[i
],
3862 (enum reg_class
) goal_alternative
[i
],
3863 operand_mode
[goal_alternative_matched
[i
]],
3865 0, 0, i
, RELOAD_OTHER
);
3866 operand_reloadnum
[i
] = output_reloadnum
;
3868 else if (insn_code_number
>= 0)
3872 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3873 /* Avoid further trouble with this insn. */
3874 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3879 else if (goal_alternative_matched
[i
] < 0
3880 && goal_alternative_matches
[i
] < 0
3883 /* For each non-matching operand that's a MEM or a pseudo-register
3884 that didn't get a hard register, make an optional reload.
3885 This may get done even if the insn needs no reloads otherwise. */
3887 rtx operand
= recog_data
.operand
[i
];
3889 while (GET_CODE (operand
) == SUBREG
)
3890 operand
= SUBREG_REG (operand
);
3891 if ((GET_CODE (operand
) == MEM
3892 || (GET_CODE (operand
) == REG
3893 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3894 /* If this is only for an output, the optional reload would not
3895 actually cause us to use a register now, just note that
3896 something is stored here. */
3897 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3898 || modified
[i
] == RELOAD_WRITE
)
3899 && ! no_input_reloads
3900 /* An optional output reload might allow to delete INSN later.
3901 We mustn't make in-out reloads on insns that are not permitted
3903 If this is an asm, we can't delete it; we must not even call
3904 push_reload for an optional output reload in this case,
3905 because we can't be sure that the constraint allows a register,
3906 and push_reload verifies the constraints for asms. */
3907 && (modified
[i
] == RELOAD_READ
3908 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3909 operand_reloadnum
[i
]
3910 = push_reload ((modified
[i
] != RELOAD_WRITE
3911 ? recog_data
.operand
[i
] : 0),
3912 (modified
[i
] != RELOAD_READ
3913 ? recog_data
.operand
[i
] : 0),
3914 (modified
[i
] != RELOAD_WRITE
3915 ? recog_data
.operand_loc
[i
] : 0),
3916 (modified
[i
] != RELOAD_READ
3917 ? recog_data
.operand_loc
[i
] : 0),
3918 (enum reg_class
) goal_alternative
[i
],
3919 (modified
[i
] == RELOAD_WRITE
3920 ? VOIDmode
: operand_mode
[i
]),
3921 (modified
[i
] == RELOAD_READ
3922 ? VOIDmode
: operand_mode
[i
]),
3923 (insn_code_number
< 0 ? 0
3924 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3925 1, i
, operand_type
[i
]);
3926 /* If a memory reference remains (either as a MEM or a pseudo that
3927 did not get a hard register), yet we can't make an optional
3928 reload, check if this is actually a pseudo register reference;
3929 we then need to emit a USE and/or a CLOBBER so that reload
3930 inheritance will do the right thing. */
3932 && (GET_CODE (operand
) == MEM
3933 || (GET_CODE (operand
) == REG
3934 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3935 && reg_renumber
[REGNO (operand
)] < 0)))
3937 operand
= *recog_data
.operand_loc
[i
];
3939 while (GET_CODE (operand
) == SUBREG
)
3940 operand
= SUBREG_REG (operand
);
3941 if (GET_CODE (operand
) == REG
)
3943 if (modified
[i
] != RELOAD_WRITE
)
3944 /* We mark the USE with QImode so that we recognize
3945 it as one that can be safely deleted at the end
3947 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3949 if (modified
[i
] != RELOAD_READ
)
3950 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3954 else if (goal_alternative_matches
[i
] >= 0
3955 && goal_alternative_win
[goal_alternative_matches
[i
]]
3956 && modified
[i
] == RELOAD_READ
3957 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3958 && ! no_input_reloads
&& ! no_output_reloads
3961 /* Similarly, make an optional reload for a pair of matching
3962 objects that are in MEM or a pseudo that didn't get a hard reg. */
3964 rtx operand
= recog_data
.operand
[i
];
3966 while (GET_CODE (operand
) == SUBREG
)
3967 operand
= SUBREG_REG (operand
);
3968 if ((GET_CODE (operand
) == MEM
3969 || (GET_CODE (operand
) == REG
3970 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3971 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3973 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3974 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3975 recog_data
.operand
[i
],
3976 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3977 recog_data
.operand_loc
[i
],
3978 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3979 operand_mode
[goal_alternative_matches
[i
]],
3981 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3984 /* Perform whatever substitutions on the operands we are supposed
3985 to make due to commutativity or replacement of registers
3986 with equivalent constants or memory slots. */
3988 for (i
= 0; i
< noperands
; i
++)
3990 /* We only do this on the last pass through reload, because it is
3991 possible for some data (like reg_equiv_address) to be changed during
3992 later passes. Moreover, we loose the opportunity to get a useful
3993 reload_{in,out}_reg when we do these replacements. */
3997 rtx substitution
= substed_operand
[i
];
3999 *recog_data
.operand_loc
[i
] = substitution
;
4001 /* If we're replacing an operand with a LABEL_REF, we need
4002 to make sure that there's a REG_LABEL note attached to
4003 this instruction. */
4004 if (GET_CODE (insn
) != JUMP_INSN
4005 && GET_CODE (substitution
) == LABEL_REF
4006 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
4007 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
4008 XEXP (substitution
, 0),
4012 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4015 /* If this insn pattern contains any MATCH_DUP's, make sure that
4016 they will be substituted if the operands they match are substituted.
4017 Also do now any substitutions we already did on the operands.
4019 Don't do this if we aren't making replacements because we might be
4020 propagating things allocated by frame pointer elimination into places
4021 it doesn't expect. */
4023 if (insn_code_number
>= 0 && replace
)
4024 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4026 int opno
= recog_data
.dup_num
[i
];
4027 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4028 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4032 /* This loses because reloading of prior insns can invalidate the equivalence
4033 (or at least find_equiv_reg isn't smart enough to find it any more),
4034 causing this insn to need more reload regs than it needed before.
4035 It may be too late to make the reload regs available.
4036 Now this optimization is done safely in choose_reload_regs. */
4038 /* For each reload of a reg into some other class of reg,
4039 search for an existing equivalent reg (same value now) in the right class.
4040 We can use it as long as we don't need to change its contents. */
4041 for (i
= 0; i
< n_reloads
; i
++)
4042 if (rld
[i
].reg_rtx
== 0
4044 && GET_CODE (rld
[i
].in
) == REG
4048 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4049 static_reload_reg_p
, 0, rld
[i
].inmode
);
4050 /* Prevent generation of insn to load the value
4051 because the one we found already has the value. */
4053 rld
[i
].in
= rld
[i
].reg_rtx
;
4057 /* Perhaps an output reload can be combined with another
4058 to reduce needs by one. */
4059 if (!goal_earlyclobber
)
4062 /* If we have a pair of reloads for parts of an address, they are reloading
4063 the same object, the operands themselves were not reloaded, and they
4064 are for two operands that are supposed to match, merge the reloads and
4065 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4067 for (i
= 0; i
< n_reloads
; i
++)
4071 for (j
= i
+ 1; j
< n_reloads
; j
++)
4072 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4073 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4074 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4075 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4076 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4077 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4078 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4079 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4080 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4081 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4082 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4083 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4084 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4085 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4086 || (goal_alternative_matches
[rld
[j
].opnum
]
4089 for (k
= 0; k
< n_replacements
; k
++)
4090 if (replacements
[k
].what
== j
)
4091 replacements
[k
].what
= i
;
4093 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4094 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4095 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4097 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4102 /* Scan all the reloads and update their type.
4103 If a reload is for the address of an operand and we didn't reload
4104 that operand, change the type. Similarly, change the operand number
4105 of a reload when two operands match. If a reload is optional, treat it
4106 as though the operand isn't reloaded.
4108 ??? This latter case is somewhat odd because if we do the optional
4109 reload, it means the object is hanging around. Thus we need only
4110 do the address reload if the optional reload was NOT done.
4112 Change secondary reloads to be the address type of their operand, not
4115 If an operand's reload is now RELOAD_OTHER, change any
4116 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4117 RELOAD_FOR_OTHER_ADDRESS. */
4119 for (i
= 0; i
< n_reloads
; i
++)
4121 if (rld
[i
].secondary_p
4122 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4123 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4125 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4126 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4127 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4128 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4129 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4130 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4132 /* If we have a secondary reload to go along with this reload,
4133 change its type to RELOAD_FOR_OPADDR_ADDR. */
4135 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4136 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4137 && rld
[i
].secondary_in_reload
!= -1)
4139 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4141 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4143 /* If there's a tertiary reload we have to change it also. */
4144 if (secondary_in_reload
> 0
4145 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4146 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4147 = RELOAD_FOR_OPADDR_ADDR
;
4150 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4151 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4152 && rld
[i
].secondary_out_reload
!= -1)
4154 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4156 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4158 /* If there's a tertiary reload we have to change it also. */
4159 if (secondary_out_reload
4160 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4161 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4162 = RELOAD_FOR_OPADDR_ADDR
;
4165 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4166 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4167 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4169 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4172 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4173 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4174 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4175 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4177 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4179 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4180 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4183 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4184 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4185 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4187 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4188 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4189 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4190 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4191 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4192 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4193 This is complicated by the fact that a single operand can have more
4194 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4195 choose_reload_regs without affecting code quality, and cases that
4196 actually fail are extremely rare, so it turns out to be better to fix
4197 the problem here by not generating cases that choose_reload_regs will
4199 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4200 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4202 We can reduce the register pressure by exploiting that a
4203 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4204 does not conflict with any of them, if it is only used for the first of
4205 the RELOAD_FOR_X_ADDRESS reloads. */
4207 int first_op_addr_num
= -2;
4208 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4209 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4210 int need_change
= 0;
4211 /* We use last_op_addr_reload and the contents of the above arrays
4212 first as flags - -2 means no instance encountered, -1 means exactly
4213 one instance encountered.
4214 If more than one instance has been encountered, we store the reload
4215 number of the first reload of the kind in question; reload numbers
4216 are known to be non-negative. */
4217 for (i
= 0; i
< noperands
; i
++)
4218 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4219 for (i
= n_reloads
- 1; i
>= 0; i
--)
4221 switch (rld
[i
].when_needed
)
4223 case RELOAD_FOR_OPERAND_ADDRESS
:
4224 if (++first_op_addr_num
>= 0)
4226 first_op_addr_num
= i
;
4230 case RELOAD_FOR_INPUT_ADDRESS
:
4231 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4233 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4237 case RELOAD_FOR_OUTPUT_ADDRESS
:
4238 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4240 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4251 for (i
= 0; i
< n_reloads
; i
++)
4254 enum reload_type type
;
4256 switch (rld
[i
].when_needed
)
4258 case RELOAD_FOR_OPADDR_ADDR
:
4259 first_num
= first_op_addr_num
;
4260 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4262 case RELOAD_FOR_INPADDR_ADDRESS
:
4263 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4264 type
= RELOAD_FOR_INPUT_ADDRESS
;
4266 case RELOAD_FOR_OUTADDR_ADDRESS
:
4267 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4268 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4275 else if (i
> first_num
)
4276 rld
[i
].when_needed
= type
;
4279 /* Check if the only TYPE reload that uses reload I is
4280 reload FIRST_NUM. */
4281 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4283 if (rld
[j
].when_needed
== type
4284 && (rld
[i
].secondary_p
4285 ? rld
[j
].secondary_in_reload
== i
4286 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4288 rld
[i
].when_needed
= type
;
4297 /* See if we have any reloads that are now allowed to be merged
4298 because we've changed when the reload is needed to
4299 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4300 check for the most common cases. */
4302 for (i
= 0; i
< n_reloads
; i
++)
4303 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4304 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4305 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4306 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4307 for (j
= 0; j
< n_reloads
; j
++)
4308 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4309 && rld
[j
].when_needed
== rld
[i
].when_needed
4310 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4311 && rld
[i
].class == rld
[j
].class
4312 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4313 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4315 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4316 transfer_replacements (i
, j
);
4321 /* If we made any reloads for addresses, see if they violate a
4322 "no input reloads" requirement for this insn. But loads that we
4323 do after the insn (such as for output addresses) are fine. */
4324 if (no_input_reloads
)
4325 for (i
= 0; i
< n_reloads
; i
++)
4327 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4328 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4332 /* Compute reload_mode and reload_nregs. */
4333 for (i
= 0; i
< n_reloads
; i
++)
4336 = (rld
[i
].inmode
== VOIDmode
4337 || (GET_MODE_SIZE (rld
[i
].outmode
)
4338 > GET_MODE_SIZE (rld
[i
].inmode
)))
4339 ? rld
[i
].outmode
: rld
[i
].inmode
;
4341 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4344 /* Special case a simple move with an input reload and a
4345 destination of a hard reg, if the hard reg is ok, use it. */
4346 for (i
= 0; i
< n_reloads
; i
++)
4347 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4348 && GET_CODE (PATTERN (insn
)) == SET
4349 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4350 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4352 rtx dest
= SET_DEST (PATTERN (insn
));
4353 unsigned int regno
= REGNO (dest
);
4355 if (regno
< FIRST_PSEUDO_REGISTER
4356 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4357 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4358 rld
[i
].reg_rtx
= dest
;
4364 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4365 accepts a memory operand with constant address. */
4368 alternative_allows_memconst (constraint
, altnum
)
4369 const char *constraint
;
4373 /* Skip alternatives before the one requested. */
4376 while (*constraint
++ != ',');
4379 /* Scan the requested alternative for 'm' or 'o'.
4380 If one of them is present, this alternative accepts memory constants. */
4381 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4382 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4383 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
, constraint
))
4388 /* Scan X for memory references and scan the addresses for reloading.
4389 Also checks for references to "constant" regs that we want to eliminate
4390 and replaces them with the values they stand for.
4391 We may alter X destructively if it contains a reference to such.
4392 If X is just a constant reg, we return the equivalent value
4395 IND_LEVELS says how many levels of indirect addressing this machine
4398 OPNUM and TYPE identify the purpose of the reload.
4400 IS_SET_DEST is true if X is the destination of a SET, which is not
4401 appropriate to be replaced by a constant.
4403 INSN, if nonzero, is the insn in which we do the reload. It is used
4404 to determine if we may generate output reloads, and where to put USEs
4405 for pseudos that we have to replace with stack slots.
4407 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4408 result of find_reloads_address. */
4411 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4415 enum reload_type type
;
4419 int *address_reloaded
;
4421 RTX_CODE code
= GET_CODE (x
);
4423 const char *fmt
= GET_RTX_FORMAT (code
);
4429 /* This code is duplicated for speed in find_reloads. */
4430 int regno
= REGNO (x
);
4431 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4432 x
= reg_equiv_constant
[regno
];
4434 /* This creates (subreg (mem...)) which would cause an unnecessary
4435 reload of the mem. */
4436 else if (reg_equiv_mem
[regno
] != 0)
4437 x
= reg_equiv_mem
[regno
];
4439 else if (reg_equiv_memory_loc
[regno
]
4440 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4442 rtx mem
= make_memloc (x
, regno
);
4443 if (reg_equiv_address
[regno
]
4444 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4446 /* If this is not a toplevel operand, find_reloads doesn't see
4447 this substitution. We have to emit a USE of the pseudo so
4448 that delete_output_reload can see it. */
4449 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4450 /* We mark the USE with QImode so that we recognize it
4451 as one that can be safely deleted at the end of
4453 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4456 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4457 opnum
, type
, ind_levels
, insn
);
4458 if (address_reloaded
)
4459 *address_reloaded
= i
;
4468 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4469 opnum
, type
, ind_levels
, insn
);
4470 if (address_reloaded
)
4471 *address_reloaded
= i
;
4476 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4478 /* Check for SUBREG containing a REG that's equivalent to a constant.
4479 If the constant has a known value, truncate it right now.
4480 Similarly if we are extracting a single-word of a multi-word
4481 constant. If the constant is symbolic, allow it to be substituted
4482 normally. push_reload will strip the subreg later. If the
4483 constant is VOIDmode, abort because we will lose the mode of
4484 the register (this should never happen because one of the cases
4485 above should handle it). */
4487 int regno
= REGNO (SUBREG_REG (x
));
4490 if (subreg_lowpart_p (x
)
4491 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4492 && reg_equiv_constant
[regno
] != 0
4493 && (tem
= gen_lowpart_common (GET_MODE (x
),
4494 reg_equiv_constant
[regno
])) != 0)
4497 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4498 && reg_equiv_constant
[regno
] != 0)
4501 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4502 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4508 /* If the subreg contains a reg that will be converted to a mem,
4509 convert the subreg to a narrower memref now.
4510 Otherwise, we would get (subreg (mem ...) ...),
4511 which would force reload of the mem.
4513 We also need to do this if there is an equivalent MEM that is
4514 not offsettable. In that case, alter_subreg would produce an
4515 invalid address on big-endian machines.
4517 For machines that extend byte loads, we must not reload using
4518 a wider mode if we have a paradoxical SUBREG. find_reloads will
4519 force a reload in that case. So we should not do anything here. */
4521 else if (regno
>= FIRST_PSEUDO_REGISTER
4522 #ifdef LOAD_EXTEND_OP
4523 && (GET_MODE_SIZE (GET_MODE (x
))
4524 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4526 && (reg_equiv_address
[regno
] != 0
4527 || (reg_equiv_mem
[regno
] != 0
4528 && (! strict_memory_address_p (GET_MODE (x
),
4529 XEXP (reg_equiv_mem
[regno
], 0))
4530 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4531 || num_not_at_initial_offset
))))
4532 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4536 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4540 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4541 ind_levels
, is_set_dest
, insn
,
4543 /* If we have replaced a reg with it's equivalent memory loc -
4544 that can still be handled here e.g. if it's in a paradoxical
4545 subreg - we must make the change in a copy, rather than using
4546 a destructive change. This way, find_reloads can still elect
4547 not to do the change. */
4548 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4550 x
= shallow_copy_rtx (x
);
4553 XEXP (x
, i
) = new_part
;
4559 /* Return a mem ref for the memory equivalent of reg REGNO.
4560 This mem ref is not shared with anything. */
4563 make_memloc (ad
, regno
)
4567 /* We must rerun eliminate_regs, in case the elimination
4568 offsets have changed. */
4570 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4572 /* If TEM might contain a pseudo, we must copy it to avoid
4573 modifying it when we do the substitution for the reload. */
4574 if (rtx_varies_p (tem
, 0))
4575 tem
= copy_rtx (tem
);
4577 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4578 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4580 /* Copy the result if it's still the same as the equivalence, to avoid
4581 modifying it when we do the substitution for the reload. */
4582 if (tem
== reg_equiv_memory_loc
[regno
])
4583 tem
= copy_rtx (tem
);
4587 /* Returns true if AD could be turned into a valid memory reference
4588 to mode MODE by reloading the part pointed to by PART into a
4592 maybe_memory_address_p (mode
, ad
, part
)
4593 enum machine_mode mode
;
4599 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4602 retv
= memory_address_p (mode
, ad
);
4608 /* Record all reloads needed for handling memory address AD
4609 which appears in *LOC in a memory reference to mode MODE
4610 which itself is found in location *MEMREFLOC.
4611 Note that we take shortcuts assuming that no multi-reg machine mode
4612 occurs as part of an address.
4614 OPNUM and TYPE specify the purpose of this reload.
4616 IND_LEVELS says how many levels of indirect addressing this machine
4619 INSN, if nonzero, is the insn in which we do the reload. It is used
4620 to determine if we may generate output reloads, and where to put USEs
4621 for pseudos that we have to replace with stack slots.
4623 Value is nonzero if this address is reloaded or replaced as a whole.
4624 This is interesting to the caller if the address is an autoincrement.
4626 Note that there is no verification that the address will be valid after
4627 this routine does its work. Instead, we rely on the fact that the address
4628 was valid when reload started. So we need only undo things that reload
4629 could have broken. These are wrong register types, pseudos not allocated
4630 to a hard register, and frame pointer elimination. */
4633 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4634 enum machine_mode mode
;
4639 enum reload_type type
;
4644 int removed_and
= 0;
4647 /* If the address is a register, see if it is a legitimate address and
4648 reload if not. We first handle the cases where we need not reload
4649 or where we must reload in a non-standard way. */
4651 if (GET_CODE (ad
) == REG
)
4655 /* If the register is equivalent to an invariant expression, substitute
4656 the invariant, and eliminate any eliminable register references. */
4657 tem
= reg_equiv_constant
[regno
];
4659 && (tem
= eliminate_regs (tem
, mode
, insn
))
4660 && strict_memory_address_p (mode
, tem
))
4666 tem
= reg_equiv_memory_loc
[regno
];
4669 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4671 tem
= make_memloc (ad
, regno
);
4672 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4674 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4675 &XEXP (tem
, 0), opnum
,
4676 ADDR_TYPE (type
), ind_levels
, insn
);
4678 /* We can avoid a reload if the register's equivalent memory
4679 expression is valid as an indirect memory address.
4680 But not all addresses are valid in a mem used as an indirect
4681 address: only reg or reg+constant. */
4684 && strict_memory_address_p (mode
, tem
)
4685 && (GET_CODE (XEXP (tem
, 0)) == REG
4686 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4687 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4688 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4690 /* TEM is not the same as what we'll be replacing the
4691 pseudo with after reload, put a USE in front of INSN
4692 in the final reload pass. */
4694 && num_not_at_initial_offset
4695 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4698 /* We mark the USE with QImode so that we
4699 recognize it as one that can be safely
4700 deleted at the end of reload. */
4701 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4704 /* This doesn't really count as replacing the address
4705 as a whole, since it is still a memory access. */
4713 /* The only remaining case where we can avoid a reload is if this is a
4714 hard register that is valid as a base register and which is not the
4715 subject of a CLOBBER in this insn. */
4717 else if (regno
< FIRST_PSEUDO_REGISTER
4718 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4719 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4722 /* If we do not have one of the cases above, we must do the reload. */
4723 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4724 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4728 if (strict_memory_address_p (mode
, ad
))
4730 /* The address appears valid, so reloads are not needed.
4731 But the address may contain an eliminable register.
4732 This can happen because a machine with indirect addressing
4733 may consider a pseudo register by itself a valid address even when
4734 it has failed to get a hard reg.
4735 So do a tree-walk to find and eliminate all such regs. */
4737 /* But first quickly dispose of a common case. */
4738 if (GET_CODE (ad
) == PLUS
4739 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4740 && GET_CODE (XEXP (ad
, 0)) == REG
4741 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4744 subst_reg_equivs_changed
= 0;
4745 *loc
= subst_reg_equivs (ad
, insn
);
4747 if (! subst_reg_equivs_changed
)
4750 /* Check result for validity after substitution. */
4751 if (strict_memory_address_p (mode
, ad
))
4755 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4760 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4765 *memrefloc
= copy_rtx (*memrefloc
);
4766 XEXP (*memrefloc
, 0) = ad
;
4767 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4773 /* The address is not valid. We have to figure out why. First see if
4774 we have an outer AND and remove it if so. Then analyze what's inside. */
4776 if (GET_CODE (ad
) == AND
)
4779 loc
= &XEXP (ad
, 0);
4783 /* One possibility for why the address is invalid is that it is itself
4784 a MEM. This can happen when the frame pointer is being eliminated, a
4785 pseudo is not allocated to a hard register, and the offset between the
4786 frame and stack pointers is not its initial value. In that case the
4787 pseudo will have been replaced by a MEM referring to the
4789 if (GET_CODE (ad
) == MEM
)
4791 /* First ensure that the address in this MEM is valid. Then, unless
4792 indirect addresses are valid, reload the MEM into a register. */
4794 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4795 opnum
, ADDR_TYPE (type
),
4796 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4798 /* If tem was changed, then we must create a new memory reference to
4799 hold it and store it back into memrefloc. */
4800 if (tem
!= ad
&& memrefloc
)
4802 *memrefloc
= copy_rtx (*memrefloc
);
4803 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4804 loc
= &XEXP (*memrefloc
, 0);
4806 loc
= &XEXP (*loc
, 0);
4809 /* Check similar cases as for indirect addresses as above except
4810 that we can allow pseudos and a MEM since they should have been
4811 taken care of above. */
4814 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4815 || GET_CODE (XEXP (tem
, 0)) == MEM
4816 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4817 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4818 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4819 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4821 /* Must use TEM here, not AD, since it is the one that will
4822 have any subexpressions reloaded, if needed. */
4823 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4824 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4827 return ! removed_and
;
4833 /* If we have address of a stack slot but it's not valid because the
4834 displacement is too large, compute the sum in a register.
4835 Handle all base registers here, not just fp/ap/sp, because on some
4836 targets (namely SH) we can also get too large displacements from
4837 big-endian corrections. */
4838 else if (GET_CODE (ad
) == PLUS
4839 && GET_CODE (XEXP (ad
, 0)) == REG
4840 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4841 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4842 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4844 /* Unshare the MEM rtx so we can safely alter it. */
4847 *memrefloc
= copy_rtx (*memrefloc
);
4848 loc
= &XEXP (*memrefloc
, 0);
4850 loc
= &XEXP (*loc
, 0);
4853 if (double_reg_address_ok
)
4855 /* Unshare the sum as well. */
4856 *loc
= ad
= copy_rtx (ad
);
4858 /* Reload the displacement into an index reg.
4859 We assume the frame pointer or arg pointer is a base reg. */
4860 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4861 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4867 /* If the sum of two regs is not necessarily valid,
4868 reload the sum into a base reg.
4869 That will at least work. */
4870 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4871 Pmode
, opnum
, type
, ind_levels
);
4873 return ! removed_and
;
4876 /* If we have an indexed stack slot, there are three possible reasons why
4877 it might be invalid: The index might need to be reloaded, the address
4878 might have been made by frame pointer elimination and hence have a
4879 constant out of range, or both reasons might apply.
4881 We can easily check for an index needing reload, but even if that is the
4882 case, we might also have an invalid constant. To avoid making the
4883 conservative assumption and requiring two reloads, we see if this address
4884 is valid when not interpreted strictly. If it is, the only problem is
4885 that the index needs a reload and find_reloads_address_1 will take care
4888 If we decide to do something here, it must be that
4889 `double_reg_address_ok' is true and that this address rtl was made by
4890 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4891 rework the sum so that the reload register will be added to the index.
4892 This is safe because we know the address isn't shared.
4894 We check for fp/ap/sp as both the first and second operand of the
4897 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4898 && GET_CODE (XEXP (ad
, 0)) == PLUS
4899 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4900 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4901 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4903 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4904 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4906 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4907 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 1)))
4909 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4910 plus_constant (XEXP (XEXP (ad
, 0), 0),
4911 INTVAL (XEXP (ad
, 1))),
4912 XEXP (XEXP (ad
, 0), 1));
4913 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4914 MODE_BASE_REG_CLASS (mode
),
4915 GET_MODE (ad
), opnum
, type
, ind_levels
);
4916 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4922 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4923 && GET_CODE (XEXP (ad
, 0)) == PLUS
4924 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4925 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4926 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4928 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4929 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4931 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4932 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 0)))
4934 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4935 XEXP (XEXP (ad
, 0), 0),
4936 plus_constant (XEXP (XEXP (ad
, 0), 1),
4937 INTVAL (XEXP (ad
, 1))));
4938 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4939 MODE_BASE_REG_CLASS (mode
),
4940 GET_MODE (ad
), opnum
, type
, ind_levels
);
4941 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4947 /* See if address becomes valid when an eliminable register
4948 in a sum is replaced. */
4951 if (GET_CODE (ad
) == PLUS
)
4952 tem
= subst_indexed_address (ad
);
4953 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4955 /* Ok, we win that way. Replace any additional eliminable
4958 subst_reg_equivs_changed
= 0;
4959 tem
= subst_reg_equivs (tem
, insn
);
4961 /* Make sure that didn't make the address invalid again. */
4963 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4970 /* If constants aren't valid addresses, reload the constant address
4972 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4974 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4975 Unshare it so we can safely alter it. */
4976 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4977 && CONSTANT_POOL_ADDRESS_P (ad
))
4979 *memrefloc
= copy_rtx (*memrefloc
);
4980 loc
= &XEXP (*memrefloc
, 0);
4982 loc
= &XEXP (*loc
, 0);
4985 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4986 Pmode
, opnum
, type
, ind_levels
);
4987 return ! removed_and
;
4990 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4994 /* Find all pseudo regs appearing in AD
4995 that are eliminable in favor of equivalent values
4996 and do not have hard regs; replace them by their equivalents.
4997 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4998 front of it for pseudos that we have to replace with stack slots. */
5001 subst_reg_equivs (ad
, insn
)
5005 RTX_CODE code
= GET_CODE (ad
);
5024 int regno
= REGNO (ad
);
5026 if (reg_equiv_constant
[regno
] != 0)
5028 subst_reg_equivs_changed
= 1;
5029 return reg_equiv_constant
[regno
];
5031 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5033 rtx mem
= make_memloc (ad
, regno
);
5034 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5036 subst_reg_equivs_changed
= 1;
5037 /* We mark the USE with QImode so that we recognize it
5038 as one that can be safely deleted at the end of
5040 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5049 /* Quickly dispose of a common case. */
5050 if (XEXP (ad
, 0) == frame_pointer_rtx
5051 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5059 fmt
= GET_RTX_FORMAT (code
);
5060 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5062 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5066 /* Compute the sum of X and Y, making canonicalizations assumed in an
5067 address, namely: sum constant integers, surround the sum of two
5068 constants with a CONST, put the constant as the second operand, and
5069 group the constant on the outermost sum.
5071 This routine assumes both inputs are already in canonical form. */
5078 enum machine_mode mode
= GET_MODE (x
);
5080 if (mode
== VOIDmode
)
5081 mode
= GET_MODE (y
);
5083 if (mode
== VOIDmode
)
5086 if (GET_CODE (x
) == CONST_INT
)
5087 return plus_constant (y
, INTVAL (x
));
5088 else if (GET_CODE (y
) == CONST_INT
)
5089 return plus_constant (x
, INTVAL (y
));
5090 else if (CONSTANT_P (x
))
5091 tem
= x
, x
= y
, y
= tem
;
5093 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5094 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5096 /* Note that if the operands of Y are specified in the opposite
5097 order in the recursive calls below, infinite recursion will occur. */
5098 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5099 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5101 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5102 constant will have been placed second. */
5103 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5105 if (GET_CODE (x
) == CONST
)
5107 if (GET_CODE (y
) == CONST
)
5110 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5113 return gen_rtx_PLUS (mode
, x
, y
);
5116 /* If ADDR is a sum containing a pseudo register that should be
5117 replaced with a constant (from reg_equiv_constant),
5118 return the result of doing so, and also apply the associative
5119 law so that the result is more likely to be a valid address.
5120 (But it is not guaranteed to be one.)
5122 Note that at most one register is replaced, even if more are
5123 replaceable. Also, we try to put the result into a canonical form
5124 so it is more likely to be a valid address.
5126 In all other cases, return ADDR. */
5129 subst_indexed_address (addr
)
5132 rtx op0
= 0, op1
= 0, op2
= 0;
5136 if (GET_CODE (addr
) == PLUS
)
5138 /* Try to find a register to replace. */
5139 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5140 if (GET_CODE (op0
) == REG
5141 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5142 && reg_renumber
[regno
] < 0
5143 && reg_equiv_constant
[regno
] != 0)
5144 op0
= reg_equiv_constant
[regno
];
5145 else if (GET_CODE (op1
) == REG
5146 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5147 && reg_renumber
[regno
] < 0
5148 && reg_equiv_constant
[regno
] != 0)
5149 op1
= reg_equiv_constant
[regno
];
5150 else if (GET_CODE (op0
) == PLUS
5151 && (tem
= subst_indexed_address (op0
)) != op0
)
5153 else if (GET_CODE (op1
) == PLUS
5154 && (tem
= subst_indexed_address (op1
)) != op1
)
5159 /* Pick out up to three things to add. */
5160 if (GET_CODE (op1
) == PLUS
)
5161 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5162 else if (GET_CODE (op0
) == PLUS
)
5163 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5165 /* Compute the sum. */
5167 op1
= form_sum (op1
, op2
);
5169 op0
= form_sum (op0
, op1
);
5176 /* Update the REG_INC notes for an insn. It updates all REG_INC
5177 notes for the instruction which refer to REGNO the to refer
5178 to the reload number.
5180 INSN is the insn for which any REG_INC notes need updating.
5182 REGNO is the register number which has been reloaded.
5184 RELOADNUM is the reload number. */
5187 update_auto_inc_notes (insn
, regno
, reloadnum
)
5188 rtx insn ATTRIBUTE_UNUSED
;
5189 int regno ATTRIBUTE_UNUSED
;
5190 int reloadnum ATTRIBUTE_UNUSED
;
5195 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5196 if (REG_NOTE_KIND (link
) == REG_INC
5197 && (int) REGNO (XEXP (link
, 0)) == regno
)
5198 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5202 /* Record the pseudo registers we must reload into hard registers in a
5203 subexpression of a would-be memory address, X referring to a value
5204 in mode MODE. (This function is not called if the address we find
5207 CONTEXT = 1 means we are considering regs as index regs,
5208 = 0 means we are considering them as base regs.
5210 OPNUM and TYPE specify the purpose of any reloads made.
5212 IND_LEVELS says how many levels of indirect addressing are
5213 supported at this point in the address.
5215 INSN, if nonzero, is the insn in which we do the reload. It is used
5216 to determine if we may generate output reloads.
5218 We return nonzero if X, as a whole, is reloaded or replaced. */
5220 /* Note that we take shortcuts assuming that no multi-reg machine mode
5221 occurs as part of an address.
5222 Also, this is not fully machine-customizable; it works for machines
5223 such as VAXen and 68000's and 32000's, but other possible machines
5224 could have addressing modes that this does not handle right. */
5227 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5228 enum machine_mode mode
;
5233 enum reload_type type
;
5237 RTX_CODE code
= GET_CODE (x
);
5243 rtx orig_op0
= XEXP (x
, 0);
5244 rtx orig_op1
= XEXP (x
, 1);
5245 RTX_CODE code0
= GET_CODE (orig_op0
);
5246 RTX_CODE code1
= GET_CODE (orig_op1
);
5250 if (GET_CODE (op0
) == SUBREG
)
5252 op0
= SUBREG_REG (op0
);
5253 code0
= GET_CODE (op0
);
5254 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5255 op0
= gen_rtx_REG (word_mode
,
5257 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5258 GET_MODE (SUBREG_REG (orig_op0
)),
5259 SUBREG_BYTE (orig_op0
),
5260 GET_MODE (orig_op0
))));
5263 if (GET_CODE (op1
) == SUBREG
)
5265 op1
= SUBREG_REG (op1
);
5266 code1
= GET_CODE (op1
);
5267 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5268 /* ??? Why is this given op1's mode and above for
5269 ??? op0 SUBREGs we use word_mode? */
5270 op1
= gen_rtx_REG (GET_MODE (op1
),
5272 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5273 GET_MODE (SUBREG_REG (orig_op1
)),
5274 SUBREG_BYTE (orig_op1
),
5275 GET_MODE (orig_op1
))));
5278 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5279 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5281 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5282 type
, ind_levels
, insn
);
5283 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5284 type
, ind_levels
, insn
);
5287 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5288 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5290 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5291 type
, ind_levels
, insn
);
5292 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5293 type
, ind_levels
, insn
);
5296 else if (code0
== CONST_INT
|| code0
== CONST
5297 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5298 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5299 type
, ind_levels
, insn
);
5301 else if (code1
== CONST_INT
|| code1
== CONST
5302 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5303 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5304 type
, ind_levels
, insn
);
5306 else if (code0
== REG
&& code1
== REG
)
5308 if (REG_OK_FOR_INDEX_P (op0
)
5309 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5311 else if (REG_OK_FOR_INDEX_P (op1
)
5312 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5314 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5315 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5316 type
, ind_levels
, insn
);
5317 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5318 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5319 type
, ind_levels
, insn
);
5320 else if (REG_OK_FOR_INDEX_P (op1
))
5321 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5322 type
, ind_levels
, insn
);
5323 else if (REG_OK_FOR_INDEX_P (op0
))
5324 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5325 type
, ind_levels
, insn
);
5328 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5329 type
, ind_levels
, insn
);
5330 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5331 type
, ind_levels
, insn
);
5335 else if (code0
== REG
)
5337 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5338 type
, ind_levels
, insn
);
5339 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5340 type
, ind_levels
, insn
);
5343 else if (code1
== REG
)
5345 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5346 type
, ind_levels
, insn
);
5347 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5348 type
, ind_levels
, insn
);
5357 rtx op0
= XEXP (x
, 0);
5358 rtx op1
= XEXP (x
, 1);
5360 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5363 /* Currently, we only support {PRE,POST}_MODIFY constructs
5364 where a base register is {inc,dec}remented by the contents
5365 of another register or by a constant value. Thus, these
5366 operands must match. */
5367 if (op0
!= XEXP (op1
, 0))
5370 /* Require index register (or constant). Let's just handle the
5371 register case in the meantime... If the target allows
5372 auto-modify by a constant then we could try replacing a pseudo
5373 register with its equivalent constant where applicable. */
5374 if (REG_P (XEXP (op1
, 1)))
5375 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5376 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5377 opnum
, type
, ind_levels
, insn
);
5379 if (REG_P (XEXP (op1
, 0)))
5381 int regno
= REGNO (XEXP (op1
, 0));
5384 /* A register that is incremented cannot be constant! */
5385 if (regno
>= FIRST_PSEUDO_REGISTER
5386 && reg_equiv_constant
[regno
] != 0)
5389 /* Handle a register that is equivalent to a memory location
5390 which cannot be addressed directly. */
5391 if (reg_equiv_memory_loc
[regno
] != 0
5392 && (reg_equiv_address
[regno
] != 0
5393 || num_not_at_initial_offset
))
5395 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5397 if (reg_equiv_address
[regno
]
5398 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5400 /* First reload the memory location's address.
5401 We can't use ADDR_TYPE (type) here, because we need to
5402 write back the value after reading it, hence we actually
5403 need two registers. */
5404 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5405 &XEXP (tem
, 0), opnum
,
5409 /* Then reload the memory location into a base
5411 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5413 MODE_BASE_REG_CLASS (mode
),
5414 GET_MODE (x
), GET_MODE (x
), 0,
5415 0, opnum
, RELOAD_OTHER
);
5417 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5422 if (reg_renumber
[regno
] >= 0)
5423 regno
= reg_renumber
[regno
];
5425 /* We require a base register here... */
5426 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5428 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5429 &XEXP (op1
, 0), &XEXP (x
, 0),
5430 MODE_BASE_REG_CLASS (mode
),
5431 GET_MODE (x
), GET_MODE (x
), 0, 0,
5432 opnum
, RELOAD_OTHER
);
5434 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5447 if (GET_CODE (XEXP (x
, 0)) == REG
)
5449 int regno
= REGNO (XEXP (x
, 0));
5453 /* A register that is incremented cannot be constant! */
5454 if (regno
>= FIRST_PSEUDO_REGISTER
5455 && reg_equiv_constant
[regno
] != 0)
5458 /* Handle a register that is equivalent to a memory location
5459 which cannot be addressed directly. */
5460 if (reg_equiv_memory_loc
[regno
] != 0
5461 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5463 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5464 if (reg_equiv_address
[regno
]
5465 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5467 /* First reload the memory location's address.
5468 We can't use ADDR_TYPE (type) here, because we need to
5469 write back the value after reading it, hence we actually
5470 need two registers. */
5471 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5472 &XEXP (tem
, 0), opnum
, type
,
5474 /* Put this inside a new increment-expression. */
5475 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5476 /* Proceed to reload that, as if it contained a register. */
5480 /* If we have a hard register that is ok as an index,
5481 don't make a reload. If an autoincrement of a nice register
5482 isn't "valid", it must be that no autoincrement is "valid".
5483 If that is true and something made an autoincrement anyway,
5484 this must be a special context where one is allowed.
5485 (For example, a "push" instruction.)
5486 We can't improve this address, so leave it alone. */
5488 /* Otherwise, reload the autoincrement into a suitable hard reg
5489 and record how much to increment by. */
5491 if (reg_renumber
[regno
] >= 0)
5492 regno
= reg_renumber
[regno
];
5493 if ((regno
>= FIRST_PSEUDO_REGISTER
5494 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5495 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5499 /* If we can output the register afterwards, do so, this
5500 saves the extra update.
5501 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5502 CALL_INSN - and it does not set CC0.
5503 But don't do this if we cannot directly address the
5504 memory location, since this will make it harder to
5505 reuse address reloads, and increases register pressure.
5506 Also don't do this if we can probably update x directly. */
5507 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5509 : reg_equiv_mem
[regno
]);
5510 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5511 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5512 && memory_operand (equiv
, GET_MODE (equiv
))
5514 && ! sets_cc0_p (PATTERN (insn
))
5516 && ! (icode
!= CODE_FOR_nothing
5517 && ((*insn_data
[icode
].operand
[0].predicate
)
5519 && ((*insn_data
[icode
].operand
[1].predicate
)
5522 /* We use the original pseudo for loc, so that
5523 emit_reload_insns() knows which pseudo this
5524 reload refers to and updates the pseudo rtx, not
5525 its equivalent memory location, as well as the
5526 corresponding entry in reg_last_reload_reg. */
5527 loc
= &XEXP (x_orig
, 0);
5530 = push_reload (x
, x
, loc
, loc
,
5531 (context
? INDEX_REG_CLASS
:
5532 MODE_BASE_REG_CLASS (mode
)),
5533 GET_MODE (x
), GET_MODE (x
), 0, 0,
5534 opnum
, RELOAD_OTHER
);
5539 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5540 (context
? INDEX_REG_CLASS
:
5541 MODE_BASE_REG_CLASS (mode
)),
5542 GET_MODE (x
), GET_MODE (x
), 0, 0,
5545 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5550 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5556 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5558 /* This is probably the result of a substitution, by eliminate_regs,
5559 of an equivalent address for a pseudo that was not allocated to a
5560 hard register. Verify that the specified address is valid and
5561 reload it into a register. */
5562 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5563 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5567 /* Since we know we are going to reload this item, don't decrement
5568 for the indirection level.
5570 Note that this is actually conservative: it would be slightly
5571 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5573 /* We can't use ADDR_TYPE (type) here, because we need to
5574 write back the value after reading it, hence we actually
5575 need two registers. */
5576 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5577 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5578 opnum
, type
, ind_levels
, insn
);
5580 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5581 (context
? INDEX_REG_CLASS
:
5582 MODE_BASE_REG_CLASS (mode
)),
5583 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5585 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5587 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5589 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5596 /* This is probably the result of a substitution, by eliminate_regs, of
5597 an equivalent address for a pseudo that was not allocated to a hard
5598 register. Verify that the specified address is valid and reload it
5601 Since we know we are going to reload this item, don't decrement for
5602 the indirection level.
5604 Note that this is actually conservative: it would be slightly more
5605 efficient to use the value of SPILL_INDIRECT_LEVELS from
5608 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5609 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5610 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5611 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5612 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5617 int regno
= REGNO (x
);
5619 if (reg_equiv_constant
[regno
] != 0)
5621 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5622 (context
? INDEX_REG_CLASS
:
5623 MODE_BASE_REG_CLASS (mode
)),
5624 GET_MODE (x
), opnum
, type
, ind_levels
);
5628 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5629 that feeds this insn. */
5630 if (reg_equiv_mem
[regno
] != 0)
5632 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5633 (context
? INDEX_REG_CLASS
:
5634 MODE_BASE_REG_CLASS (mode
)),
5635 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5640 if (reg_equiv_memory_loc
[regno
]
5641 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5643 rtx tem
= make_memloc (x
, regno
);
5644 if (reg_equiv_address
[regno
] != 0
5645 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5648 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5649 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5654 if (reg_renumber
[regno
] >= 0)
5655 regno
= reg_renumber
[regno
];
5657 if ((regno
>= FIRST_PSEUDO_REGISTER
5658 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5659 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5661 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5662 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5663 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5667 /* If a register appearing in an address is the subject of a CLOBBER
5668 in this insn, reload it into some other register to be safe.
5669 The CLOBBER is supposed to make the register unavailable
5670 from before this insn to after it. */
5671 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5673 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5674 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5675 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5682 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5684 /* If this is a SUBREG of a hard register and the resulting register
5685 is of the wrong class, reload the whole SUBREG. This avoids
5686 needless copies if SUBREG_REG is multi-word. */
5687 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5689 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5691 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5692 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5694 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5695 (context
? INDEX_REG_CLASS
:
5696 MODE_BASE_REG_CLASS (mode
)),
5697 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5701 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5702 is larger than the class size, then reload the whole SUBREG. */
5705 enum reg_class
class = (context
? INDEX_REG_CLASS
5706 : MODE_BASE_REG_CLASS (mode
));
5707 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5708 > reg_class_size
[class])
5710 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5712 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5713 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5725 const char *fmt
= GET_RTX_FORMAT (code
);
5728 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5731 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5732 opnum
, type
, ind_levels
, insn
);
5739 /* X, which is found at *LOC, is a part of an address that needs to be
5740 reloaded into a register of class CLASS. If X is a constant, or if
5741 X is a PLUS that contains a constant, check that the constant is a
5742 legitimate operand and that we are supposed to be able to load
5743 it into the register.
5745 If not, force the constant into memory and reload the MEM instead.
5747 MODE is the mode to use, in case X is an integer constant.
5749 OPNUM and TYPE describe the purpose of any reloads made.
5751 IND_LEVELS says how many levels of indirect addressing this machine
5755 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5758 enum reg_class
class;
5759 enum machine_mode mode
;
5761 enum reload_type type
;
5765 && (! LEGITIMATE_CONSTANT_P (x
)
5766 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5770 tem
= x
= force_const_mem (mode
, x
);
5771 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5772 opnum
, type
, ind_levels
, 0);
5775 else if (GET_CODE (x
) == PLUS
5776 && CONSTANT_P (XEXP (x
, 1))
5777 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5778 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5782 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5783 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5784 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5785 opnum
, type
, ind_levels
, 0);
5788 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5789 mode
, VOIDmode
, 0, 0, opnum
, type
);
5792 /* X, a subreg of a pseudo, is a part of an address that needs to be
5795 If the pseudo is equivalent to a memory location that cannot be directly
5796 addressed, make the necessary address reloads.
5798 If address reloads have been necessary, or if the address is changed
5799 by register elimination, return the rtx of the memory location;
5800 otherwise, return X.
5802 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5805 OPNUM and TYPE identify the purpose of the reload.
5807 IND_LEVELS says how many levels of indirect addressing are
5808 supported at this point in the address.
5810 INSN, if nonzero, is the insn in which we do the reload. It is used
5811 to determine where to put USEs for pseudos that we have to replace with
5815 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5820 enum reload_type type
;
5824 int regno
= REGNO (SUBREG_REG (x
));
5826 if (reg_equiv_memory_loc
[regno
])
5828 /* If the address is not directly addressable, or if the address is not
5829 offsettable, then it must be replaced. */
5831 && (reg_equiv_address
[regno
]
5832 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5835 if (force_replace
|| num_not_at_initial_offset
)
5837 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5839 /* If the address changes because of register elimination, then
5840 it must be replaced. */
5842 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5844 int offset
= SUBREG_BYTE (x
);
5845 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5846 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5848 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5849 PUT_MODE (tem
, GET_MODE (x
));
5851 /* If this was a paradoxical subreg that we replaced, the
5852 resulting memory must be sufficiently aligned to allow
5853 us to widen the mode of the memory. */
5854 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5858 base
= XEXP (tem
, 0);
5859 if (GET_CODE (base
) == PLUS
)
5861 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5862 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5864 base
= XEXP (base
, 0);
5866 if (GET_CODE (base
) != REG
5867 || (REGNO_POINTER_ALIGN (REGNO (base
))
5868 < outer_size
* BITS_PER_UNIT
))
5872 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5873 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5876 /* If this is not a toplevel operand, find_reloads doesn't see
5877 this substitution. We have to emit a USE of the pseudo so
5878 that delete_output_reload can see it. */
5879 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5880 /* We mark the USE with QImode so that we recognize it
5881 as one that can be safely deleted at the end of
5883 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5893 /* Substitute into the current INSN the registers into which we have reloaded
5894 the things that need reloading. The array `replacements'
5895 contains the locations of all pointers that must be changed
5896 and says what to replace them with.
5898 Return the rtx that X translates into; usually X, but modified. */
5901 subst_reloads (insn
)
5906 for (i
= 0; i
< n_replacements
; i
++)
5908 struct replacement
*r
= &replacements
[i
];
5909 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5912 #ifdef ENABLE_CHECKING
5913 /* Internal consistency test. Check that we don't modify
5914 anything in the equivalence arrays. Whenever something from
5915 those arrays needs to be reloaded, it must be unshared before
5916 being substituted into; the equivalence must not be modified.
5917 Otherwise, if the equivalence is used after that, it will
5918 have been modified, and the thing substituted (probably a
5919 register) is likely overwritten and not a usable equivalence. */
5922 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5924 #define CHECK_MODF(ARRAY) \
5925 if (ARRAY[check_regno] \
5926 && loc_mentioned_in_p (r->where, \
5927 ARRAY[check_regno])) \
5930 CHECK_MODF (reg_equiv_constant
);
5931 CHECK_MODF (reg_equiv_memory_loc
);
5932 CHECK_MODF (reg_equiv_address
);
5933 CHECK_MODF (reg_equiv_mem
);
5936 #endif /* ENABLE_CHECKING */
5938 /* If we're replacing a LABEL_REF with a register, add a
5939 REG_LABEL note to indicate to flow which label this
5940 register refers to. */
5941 if (GET_CODE (*r
->where
) == LABEL_REF
5942 && GET_CODE (insn
) == JUMP_INSN
)
5943 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5944 XEXP (*r
->where
, 0),
5947 /* Encapsulate RELOADREG so its machine mode matches what
5948 used to be there. Note that gen_lowpart_common will
5949 do the wrong thing if RELOADREG is multi-word. RELOADREG
5950 will always be a REG here. */
5951 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5952 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5954 /* If we are putting this into a SUBREG and RELOADREG is a
5955 SUBREG, we would be making nested SUBREGs, so we have to fix
5956 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5958 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5960 if (GET_MODE (*r
->subreg_loc
)
5961 == GET_MODE (SUBREG_REG (reloadreg
)))
5962 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5966 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5968 /* When working with SUBREGs the rule is that the byte
5969 offset must be a multiple of the SUBREG's mode. */
5970 final_offset
= (final_offset
/
5971 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5972 final_offset
= (final_offset
*
5973 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5975 *r
->where
= SUBREG_REG (reloadreg
);
5976 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5980 *r
->where
= reloadreg
;
5982 /* If reload got no reg and isn't optional, something's wrong. */
5983 else if (! rld
[r
->what
].optional
)
5988 /* Make a copy of any replacements being done into X and move those
5989 copies to locations in Y, a copy of X. */
5992 copy_replacements (x
, y
)
5995 /* We can't support X being a SUBREG because we might then need to know its
5996 location if something inside it was replaced. */
5997 if (GET_CODE (x
) == SUBREG
)
6000 copy_replacements_1 (&x
, &y
, n_replacements
);
6004 copy_replacements_1 (px
, py
, orig_replacements
)
6007 int orig_replacements
;
6011 struct replacement
*r
;
6015 for (j
= 0; j
< orig_replacements
; j
++)
6017 if (replacements
[j
].subreg_loc
== px
)
6019 r
= &replacements
[n_replacements
++];
6020 r
->where
= replacements
[j
].where
;
6022 r
->what
= replacements
[j
].what
;
6023 r
->mode
= replacements
[j
].mode
;
6025 else if (replacements
[j
].where
== px
)
6027 r
= &replacements
[n_replacements
++];
6030 r
->what
= replacements
[j
].what
;
6031 r
->mode
= replacements
[j
].mode
;
6037 code
= GET_CODE (x
);
6038 fmt
= GET_RTX_FORMAT (code
);
6040 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6043 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6044 else if (fmt
[i
] == 'E')
6045 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6046 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6051 /* Change any replacements being done to *X to be done to *Y. */
6054 move_replacements (x
, y
)
6060 for (i
= 0; i
< n_replacements
; i
++)
6061 if (replacements
[i
].subreg_loc
== x
)
6062 replacements
[i
].subreg_loc
= y
;
6063 else if (replacements
[i
].where
== x
)
6065 replacements
[i
].where
= y
;
6066 replacements
[i
].subreg_loc
= 0;
6070 /* If LOC was scheduled to be replaced by something, return the replacement.
6071 Otherwise, return *LOC. */
6074 find_replacement (loc
)
6077 struct replacement
*r
;
6079 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6081 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6083 if (reloadreg
&& r
->where
== loc
)
6085 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6086 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6090 else if (reloadreg
&& r
->subreg_loc
== loc
)
6092 /* RELOADREG must be either a REG or a SUBREG.
6094 ??? Is it actually still ever a SUBREG? If so, why? */
6096 if (GET_CODE (reloadreg
) == REG
)
6097 return gen_rtx_REG (GET_MODE (*loc
),
6098 (REGNO (reloadreg
) +
6099 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6100 GET_MODE (SUBREG_REG (*loc
)),
6103 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6107 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6109 /* When working with SUBREGs the rule is that the byte
6110 offset must be a multiple of the SUBREG's mode. */
6111 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6112 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6113 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6119 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6120 what's inside and make a new rtl if so. */
6121 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6122 || GET_CODE (*loc
) == MULT
)
6124 rtx x
= find_replacement (&XEXP (*loc
, 0));
6125 rtx y
= find_replacement (&XEXP (*loc
, 1));
6127 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6128 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6134 /* Return nonzero if register in range [REGNO, ENDREGNO)
6135 appears either explicitly or implicitly in X
6136 other than being stored into (except for earlyclobber operands).
6138 References contained within the substructure at LOC do not count.
6139 LOC may be zero, meaning don't ignore anything.
6141 This is similar to refers_to_regno_p in rtlanal.c except that we
6142 look at equivalences for pseudos that didn't get hard registers. */
6145 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6146 unsigned int regno
, endregno
;
6159 code
= GET_CODE (x
);
6166 /* If this is a pseudo, a hard register must not have been allocated.
6167 X must therefore either be a constant or be in memory. */
6168 if (r
>= FIRST_PSEUDO_REGISTER
)
6170 if (reg_equiv_memory_loc
[r
])
6171 return refers_to_regno_for_reload_p (regno
, endregno
,
6172 reg_equiv_memory_loc
[r
],
6175 if (reg_equiv_constant
[r
])
6181 return (endregno
> r
6182 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6183 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6187 /* If this is a SUBREG of a hard reg, we can see exactly which
6188 registers are being modified. Otherwise, handle normally. */
6189 if (GET_CODE (SUBREG_REG (x
)) == REG
6190 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6192 unsigned int inner_regno
= subreg_regno (x
);
6193 unsigned int inner_endregno
6194 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6195 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6197 return endregno
> inner_regno
&& regno
< inner_endregno
;
6203 if (&SET_DEST (x
) != loc
6204 /* Note setting a SUBREG counts as referring to the REG it is in for
6205 a pseudo but not for hard registers since we can
6206 treat each word individually. */
6207 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6208 && loc
!= &SUBREG_REG (SET_DEST (x
))
6209 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6210 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6211 && refers_to_regno_for_reload_p (regno
, endregno
,
6212 SUBREG_REG (SET_DEST (x
)),
6214 /* If the output is an earlyclobber operand, this is
6216 || ((GET_CODE (SET_DEST (x
)) != REG
6217 || earlyclobber_operand_p (SET_DEST (x
)))
6218 && refers_to_regno_for_reload_p (regno
, endregno
,
6219 SET_DEST (x
), loc
))))
6222 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6231 /* X does not match, so try its subexpressions. */
6233 fmt
= GET_RTX_FORMAT (code
);
6234 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6236 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6244 if (refers_to_regno_for_reload_p (regno
, endregno
,
6248 else if (fmt
[i
] == 'E')
6251 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6252 if (loc
!= &XVECEXP (x
, i
, j
)
6253 && refers_to_regno_for_reload_p (regno
, endregno
,
6254 XVECEXP (x
, i
, j
), loc
))
6261 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6262 we check if any register number in X conflicts with the relevant register
6263 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6264 contains a MEM (we don't bother checking for memory addresses that can't
6265 conflict because we expect this to be a rare case.
6267 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6268 that we look at equivalences for pseudos that didn't get hard registers. */
6271 reg_overlap_mentioned_for_reload_p (x
, in
)
6274 int regno
, endregno
;
6276 /* Overly conservative. */
6277 if (GET_CODE (x
) == STRICT_LOW_PART
6278 || GET_RTX_CLASS (GET_CODE (x
)) == 'a')
6281 /* If either argument is a constant, then modifying X can not affect IN. */
6282 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6284 else if (GET_CODE (x
) == SUBREG
)
6286 regno
= REGNO (SUBREG_REG (x
));
6287 if (regno
< FIRST_PSEUDO_REGISTER
)
6288 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6289 GET_MODE (SUBREG_REG (x
)),
6293 else if (GET_CODE (x
) == REG
)
6297 /* If this is a pseudo, it must not have been assigned a hard register.
6298 Therefore, it must either be in memory or be a constant. */
6300 if (regno
>= FIRST_PSEUDO_REGISTER
)
6302 if (reg_equiv_memory_loc
[regno
])
6303 return refers_to_mem_for_reload_p (in
);
6304 else if (reg_equiv_constant
[regno
])
6309 else if (GET_CODE (x
) == MEM
)
6310 return refers_to_mem_for_reload_p (in
);
6311 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6312 || GET_CODE (x
) == CC0
)
6313 return reg_mentioned_p (x
, in
);
6314 else if (GET_CODE (x
) == PLUS
)
6315 return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6316 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6320 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6321 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6323 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6326 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6330 refers_to_mem_for_reload_p (x
)
6336 if (GET_CODE (x
) == MEM
)
6339 if (GET_CODE (x
) == REG
)
6340 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6341 && reg_equiv_memory_loc
[REGNO (x
)]);
6343 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6344 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6346 && (GET_CODE (XEXP (x
, i
)) == MEM
6347 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6353 /* Check the insns before INSN to see if there is a suitable register
6354 containing the same value as GOAL.
6355 If OTHER is -1, look for a register in class CLASS.
6356 Otherwise, just see if register number OTHER shares GOAL's value.
6358 Return an rtx for the register found, or zero if none is found.
6360 If RELOAD_REG_P is (short *)1,
6361 we reject any hard reg that appears in reload_reg_rtx
6362 because such a hard reg is also needed coming into this insn.
6364 If RELOAD_REG_P is any other nonzero value,
6365 it is a vector indexed by hard reg number
6366 and we reject any hard reg whose element in the vector is nonnegative
6367 as well as any that appears in reload_reg_rtx.
6369 If GOAL is zero, then GOALREG is a register number; we look
6370 for an equivalent for that register.
6372 MODE is the machine mode of the value we want an equivalence for.
6373 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6375 This function is used by jump.c as well as in the reload pass.
6377 If GOAL is the sum of the stack pointer and a constant, we treat it
6378 as if it were a constant except that sp is required to be unchanging. */
6381 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6384 enum reg_class
class;
6386 short *reload_reg_p
;
6388 enum machine_mode mode
;
6391 rtx goaltry
, valtry
, value
, where
;
6397 int goal_mem_addr_varies
= 0;
6398 int need_stable_sp
= 0;
6404 else if (GET_CODE (goal
) == REG
)
6405 regno
= REGNO (goal
);
6406 else if (GET_CODE (goal
) == MEM
)
6408 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6409 if (MEM_VOLATILE_P (goal
))
6411 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6413 /* An address with side effects must be reexecuted. */
6428 else if (CONSTANT_P (goal
))
6430 else if (GET_CODE (goal
) == PLUS
6431 && XEXP (goal
, 0) == stack_pointer_rtx
6432 && CONSTANT_P (XEXP (goal
, 1)))
6433 goal_const
= need_stable_sp
= 1;
6434 else if (GET_CODE (goal
) == PLUS
6435 && XEXP (goal
, 0) == frame_pointer_rtx
6436 && CONSTANT_P (XEXP (goal
, 1)))
6441 /* Scan insns back from INSN, looking for one that copies
6442 a value into or out of GOAL.
6443 Stop and give up if we reach a label. */
6448 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6451 if (GET_CODE (p
) == INSN
6452 /* If we don't want spill regs ... */
6453 && (! (reload_reg_p
!= 0
6454 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6455 /* ... then ignore insns introduced by reload; they aren't
6456 useful and can cause results in reload_as_needed to be
6457 different from what they were when calculating the need for
6458 spills. If we notice an input-reload insn here, we will
6459 reject it below, but it might hide a usable equivalent.
6460 That makes bad code. It may even abort: perhaps no reg was
6461 spilled for this insn because it was assumed we would find
6463 || INSN_UID (p
) < reload_first_uid
))
6466 pat
= single_set (p
);
6468 /* First check for something that sets some reg equal to GOAL. */
6471 && true_regnum (SET_SRC (pat
)) == regno
6472 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6475 && true_regnum (SET_DEST (pat
)) == regno
6476 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6478 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6479 /* When looking for stack pointer + const,
6480 make sure we don't use a stack adjust. */
6481 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6482 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6484 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6485 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6487 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6488 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6489 /* If we are looking for a constant,
6490 and something equivalent to that constant was copied
6491 into a reg, we can use that reg. */
6492 || (goal_const
&& REG_NOTES (p
) != 0
6493 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6494 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6496 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6497 || (GET_CODE (SET_DEST (pat
)) == REG
6498 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6499 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6501 && GET_CODE (goal
) == CONST_INT
6503 = operand_subword (XEXP (tem
, 0), 0, 0,
6505 && rtx_equal_p (goal
, goaltry
)
6507 = operand_subword (SET_DEST (pat
), 0, 0,
6509 && (valueno
= true_regnum (valtry
)) >= 0)))
6510 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6512 && GET_CODE (SET_DEST (pat
)) == REG
6513 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6514 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6516 && GET_CODE (goal
) == CONST_INT
6517 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6519 && rtx_equal_p (goal
, goaltry
)
6521 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6522 && (valueno
= true_regnum (valtry
)) >= 0)))
6526 if (valueno
!= other
)
6529 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6535 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6536 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6549 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6550 (or copying VALUE into GOAL, if GOAL is also a register).
6551 Now verify that VALUE is really valid. */
6553 /* VALUENO is the register number of VALUE; a hard register. */
6555 /* Don't try to re-use something that is killed in this insn. We want
6556 to be able to trust REG_UNUSED notes. */
6557 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6560 /* If we propose to get the value from the stack pointer or if GOAL is
6561 a MEM based on the stack pointer, we need a stable SP. */
6562 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6563 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6567 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6568 if (GET_MODE (value
) != mode
)
6571 /* Reject VALUE if it was loaded from GOAL
6572 and is also a register that appears in the address of GOAL. */
6574 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6575 && refers_to_regno_for_reload_p (valueno
,
6577 + HARD_REGNO_NREGS (valueno
, mode
)),
6581 /* Reject registers that overlap GOAL. */
6583 if (!goal_mem
&& !goal_const
6584 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6585 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6588 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6589 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6591 /* Reject VALUE if it is one of the regs reserved for reloads.
6592 Reload1 knows how to reuse them anyway, and it would get
6593 confused if we allocated one without its knowledge.
6594 (Now that insns introduced by reload are ignored above,
6595 this case shouldn't happen, but I'm not positive.) */
6597 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6600 for (i
= 0; i
< valuenregs
; ++i
)
6601 if (reload_reg_p
[valueno
+ i
] >= 0)
6605 /* Reject VALUE if it is a register being used for an input reload
6606 even if it is not one of those reserved. */
6608 if (reload_reg_p
!= 0)
6611 for (i
= 0; i
< n_reloads
; i
++)
6612 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6614 int regno1
= REGNO (rld
[i
].reg_rtx
);
6615 int nregs1
= HARD_REGNO_NREGS (regno1
,
6616 GET_MODE (rld
[i
].reg_rtx
));
6617 if (regno1
< valueno
+ valuenregs
6618 && regno1
+ nregs1
> valueno
)
6624 /* We must treat frame pointer as varying here,
6625 since it can vary--in a nonlocal goto as generated by expand_goto. */
6626 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6628 /* Now verify that the values of GOAL and VALUE remain unaltered
6629 until INSN is reached. */
6638 /* Don't trust the conversion past a function call
6639 if either of the two is in a call-clobbered register, or memory. */
6640 if (GET_CODE (p
) == CALL_INSN
)
6644 if (goal_mem
|| need_stable_sp
)
6647 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6648 for (i
= 0; i
< nregs
; ++i
)
6649 if (call_used_regs
[regno
+ i
])
6652 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6653 for (i
= 0; i
< valuenregs
; ++i
)
6654 if (call_used_regs
[valueno
+ i
])
6656 #ifdef NON_SAVING_SETJMP
6657 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6666 /* Watch out for unspec_volatile, and volatile asms. */
6667 if (volatile_insn_p (pat
))
6670 /* If this insn P stores in either GOAL or VALUE, return 0.
6671 If GOAL is a memory ref and this insn writes memory, return 0.
6672 If GOAL is a memory ref and its address is not constant,
6673 and this insn P changes a register used in GOAL, return 0. */
6675 if (GET_CODE (pat
) == COND_EXEC
)
6676 pat
= COND_EXEC_CODE (pat
);
6677 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6679 rtx dest
= SET_DEST (pat
);
6680 while (GET_CODE (dest
) == SUBREG
6681 || GET_CODE (dest
) == ZERO_EXTRACT
6682 || GET_CODE (dest
) == SIGN_EXTRACT
6683 || GET_CODE (dest
) == STRICT_LOW_PART
)
6684 dest
= XEXP (dest
, 0);
6685 if (GET_CODE (dest
) == REG
)
6687 int xregno
= REGNO (dest
);
6689 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6690 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6693 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6695 if (xregno
< valueno
+ valuenregs
6696 && xregno
+ xnregs
> valueno
)
6698 if (goal_mem_addr_varies
6699 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6701 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6704 else if (goal_mem
&& GET_CODE (dest
) == MEM
6705 && ! push_operand (dest
, GET_MODE (dest
)))
6707 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6708 && reg_equiv_memory_loc
[regno
] != 0)
6710 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6713 else if (GET_CODE (pat
) == PARALLEL
)
6716 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6718 rtx v1
= XVECEXP (pat
, 0, i
);
6719 if (GET_CODE (v1
) == COND_EXEC
)
6720 v1
= COND_EXEC_CODE (v1
);
6721 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6723 rtx dest
= SET_DEST (v1
);
6724 while (GET_CODE (dest
) == SUBREG
6725 || GET_CODE (dest
) == ZERO_EXTRACT
6726 || GET_CODE (dest
) == SIGN_EXTRACT
6727 || GET_CODE (dest
) == STRICT_LOW_PART
)
6728 dest
= XEXP (dest
, 0);
6729 if (GET_CODE (dest
) == REG
)
6731 int xregno
= REGNO (dest
);
6733 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6734 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6737 if (xregno
< regno
+ nregs
6738 && xregno
+ xnregs
> regno
)
6740 if (xregno
< valueno
+ valuenregs
6741 && xregno
+ xnregs
> valueno
)
6743 if (goal_mem_addr_varies
6744 && reg_overlap_mentioned_for_reload_p (dest
,
6747 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6750 else if (goal_mem
&& GET_CODE (dest
) == MEM
6751 && ! push_operand (dest
, GET_MODE (dest
)))
6753 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6754 && reg_equiv_memory_loc
[regno
] != 0)
6756 else if (need_stable_sp
6757 && push_operand (dest
, GET_MODE (dest
)))
6763 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6767 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6768 link
= XEXP (link
, 1))
6770 pat
= XEXP (link
, 0);
6771 if (GET_CODE (pat
) == CLOBBER
)
6773 rtx dest
= SET_DEST (pat
);
6775 if (GET_CODE (dest
) == REG
)
6777 int xregno
= REGNO (dest
);
6779 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6781 if (xregno
< regno
+ nregs
6782 && xregno
+ xnregs
> regno
)
6784 else if (xregno
< valueno
+ valuenregs
6785 && xregno
+ xnregs
> valueno
)
6787 else if (goal_mem_addr_varies
6788 && reg_overlap_mentioned_for_reload_p (dest
,
6793 else if (goal_mem
&& GET_CODE (dest
) == MEM
6794 && ! push_operand (dest
, GET_MODE (dest
)))
6796 else if (need_stable_sp
6797 && push_operand (dest
, GET_MODE (dest
)))
6804 /* If this insn auto-increments or auto-decrements
6805 either regno or valueno, return 0 now.
6806 If GOAL is a memory ref and its address is not constant,
6807 and this insn P increments a register used in GOAL, return 0. */
6811 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6812 if (REG_NOTE_KIND (link
) == REG_INC
6813 && GET_CODE (XEXP (link
, 0)) == REG
)
6815 int incno
= REGNO (XEXP (link
, 0));
6816 if (incno
< regno
+ nregs
&& incno
>= regno
)
6818 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6820 if (goal_mem_addr_varies
6821 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6831 /* Find a place where INCED appears in an increment or decrement operator
6832 within X, and return the amount INCED is incremented or decremented by.
6833 The value is always positive. */
6836 find_inc_amount (x
, inced
)
6839 enum rtx_code code
= GET_CODE (x
);
6845 rtx addr
= XEXP (x
, 0);
6846 if ((GET_CODE (addr
) == PRE_DEC
6847 || GET_CODE (addr
) == POST_DEC
6848 || GET_CODE (addr
) == PRE_INC
6849 || GET_CODE (addr
) == POST_INC
)
6850 && XEXP (addr
, 0) == inced
)
6851 return GET_MODE_SIZE (GET_MODE (x
));
6852 else if ((GET_CODE (addr
) == PRE_MODIFY
6853 || GET_CODE (addr
) == POST_MODIFY
)
6854 && GET_CODE (XEXP (addr
, 1)) == PLUS
6855 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6856 && XEXP (addr
, 0) == inced
6857 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6859 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6860 return i
< 0 ? -i
: i
;
6864 fmt
= GET_RTX_FORMAT (code
);
6865 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6869 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6876 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6878 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6888 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6889 If SETS is nonzero, also consider SETs. */
6892 regno_clobbered_p (regno
, insn
, mode
, sets
)
6895 enum machine_mode mode
;
6898 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6899 unsigned int endregno
= regno
+ nregs
;
6901 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6902 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6903 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6905 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6907 return test
>= regno
&& test
< endregno
;
6910 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6912 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6916 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6917 if ((GET_CODE (elt
) == CLOBBER
6918 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6919 && GET_CODE (XEXP (elt
, 0)) == REG
)
6921 unsigned int test
= REGNO (XEXP (elt
, 0));
6923 if (test
>= regno
&& test
< endregno
)
6932 static const char *const reload_when_needed_name
[] =
6935 "RELOAD_FOR_OUTPUT",
6937 "RELOAD_FOR_INPUT_ADDRESS",
6938 "RELOAD_FOR_INPADDR_ADDRESS",
6939 "RELOAD_FOR_OUTPUT_ADDRESS",
6940 "RELOAD_FOR_OUTADDR_ADDRESS",
6941 "RELOAD_FOR_OPERAND_ADDRESS",
6942 "RELOAD_FOR_OPADDR_ADDR",
6944 "RELOAD_FOR_OTHER_ADDRESS"
6947 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6949 /* These functions are used to print the variables set by 'find_reloads' */
6952 debug_reload_to_stream (f
)
6960 for (r
= 0; r
< n_reloads
; r
++)
6962 fprintf (f
, "Reload %d: ", r
);
6966 fprintf (f
, "reload_in (%s) = ",
6967 GET_MODE_NAME (rld
[r
].inmode
));
6968 print_inline_rtx (f
, rld
[r
].in
, 24);
6969 fprintf (f
, "\n\t");
6972 if (rld
[r
].out
!= 0)
6974 fprintf (f
, "reload_out (%s) = ",
6975 GET_MODE_NAME (rld
[r
].outmode
));
6976 print_inline_rtx (f
, rld
[r
].out
, 24);
6977 fprintf (f
, "\n\t");
6980 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6982 fprintf (f
, "%s (opnum = %d)",
6983 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6986 if (rld
[r
].optional
)
6987 fprintf (f
, ", optional");
6989 if (rld
[r
].nongroup
)
6990 fprintf (f
, ", nongroup");
6992 if (rld
[r
].inc
!= 0)
6993 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6995 if (rld
[r
].nocombine
)
6996 fprintf (f
, ", can't combine");
6998 if (rld
[r
].secondary_p
)
6999 fprintf (f
, ", secondary_reload_p");
7001 if (rld
[r
].in_reg
!= 0)
7003 fprintf (f
, "\n\treload_in_reg: ");
7004 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7007 if (rld
[r
].out_reg
!= 0)
7009 fprintf (f
, "\n\treload_out_reg: ");
7010 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7013 if (rld
[r
].reg_rtx
!= 0)
7015 fprintf (f
, "\n\treload_reg_rtx: ");
7016 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7020 if (rld
[r
].secondary_in_reload
!= -1)
7022 fprintf (f
, "%ssecondary_in_reload = %d",
7023 prefix
, rld
[r
].secondary_in_reload
);
7027 if (rld
[r
].secondary_out_reload
!= -1)
7028 fprintf (f
, "%ssecondary_out_reload = %d\n",
7029 prefix
, rld
[r
].secondary_out_reload
);
7032 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7034 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7035 insn_data
[rld
[r
].secondary_in_icode
].name
);
7039 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7040 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7041 insn_data
[rld
[r
].secondary_out_icode
].name
);
7050 debug_reload_to_stream (stderr
);