1 ;; GCC machine description for Blackfin synchronization instructions.
2 ;; Copyright (C) 2005-2015 Free Software Foundation, Inc.
3 ;; Contributed by Analog Devices.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify
8 ;; it under the terms of the GNU General Public License as published by
9 ;; the Free Software Foundation; either version 3, or (at your option)
12 ;; GCC is distributed in the hope that it will be useful,
13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ;; GNU General Public License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
21 (define_code_iterator FETCHOP [plus minus ior and xor])
22 (define_code_attr fetchop_name
23 [(plus "add") (minus "sub") (ior "ior") (and "and") (xor "xor")])
24 (define_code_attr fetchop_addr
25 [(plus "1072") (minus "1088") (ior "1104") (and "1120") (xor "1136")])
27 (define_insn "sync_<fetchop_name>si_internal"
28 [(set (mem:SI (match_operand:SI 0 "register_operand" "qA"))
30 [(FETCHOP:SI (mem:SI (match_dup 0))
31 (match_operand:SI 1 "register_operand" "q0"))
32 (match_operand:SI 2 "register_no_elim_operand" "a")]
34 (clobber (match_scratch:SI 3 "=q0"))
35 (clobber (match_scratch:SI 4 "=q1"))
36 (clobber (reg:SI REG_RETS))]
37 "TARGET_SUPPORTS_SYNC_CALLS"
39 [(set_attr "type" "call")])
41 (define_expand "sync_<fetchop_name>si"
43 [(set (match_operand:SI 0 "memory_operand" "+m")
45 [(FETCHOP:SI (match_dup 0)
46 (match_operand:SI 1 "register_operand" "q0"))
49 (clobber (match_scratch:SI 3 ""))
50 (clobber (match_scratch:SI 4 ""))
51 (clobber (reg:SI REG_RETS))])]
52 "TARGET_SUPPORTS_SYNC_CALLS"
54 if (!REG_P (XEXP (operands[0], 0)))
56 operands[0] = shallow_copy_rtx (operands[0]);
57 XEXP (operands[0], 0) = force_reg (Pmode, XEXP (operands[0], 0));
59 operands[2] = force_reg (Pmode, GEN_INT (<fetchop_addr>));
62 (define_insn "sync_old_<fetchop_name>si_internal"
63 [(set (match_operand:SI 0 "register_operand" "=q1")
64 (mem:SI (match_operand:SI 1 "register_operand" "qA")))
65 (set (mem:SI (match_dup 1))
67 [(FETCHOP:SI (mem:SI (match_dup 1))
68 (match_operand:SI 2 "register_operand" "q0"))
69 (match_operand:SI 3 "register_no_elim_operand" "a")]
71 (clobber (match_scratch:SI 4 "=q0"))
72 (clobber (reg:SI REG_RETS))]
73 "TARGET_SUPPORTS_SYNC_CALLS"
75 [(set_attr "type" "call")])
77 (define_expand "sync_old_<fetchop_name>si"
79 [(set (match_operand:SI 0 "register_operand" "")
80 (match_operand:SI 1 "memory_operand" ""))
83 [(FETCHOP:SI (match_dup 1)
84 (match_operand:SI 2 "register_operand" ""))
87 (clobber (match_scratch:SI 4 ""))
88 (clobber (reg:SI REG_RETS))])]
89 "TARGET_SUPPORTS_SYNC_CALLS"
91 if (!REG_P (XEXP (operands[1], 0)))
93 operands[1] = shallow_copy_rtx (operands[1]);
94 XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
96 operands[3] = force_reg (Pmode, GEN_INT (<fetchop_addr>));
99 (define_insn "sync_new_<fetchop_name>si_internal"
100 [(set (match_operand:SI 0 "register_operand" "=q0")
103 (mem:SI (match_operand:SI 1 "register_operand" "qA"))
104 (match_operand:SI 2 "register_operand" "q0"))
105 (match_operand:SI 3 "register_no_elim_operand" "a")]
107 (set (mem:SI (match_dup 1))
109 [(FETCHOP:SI (mem:SI (match_dup 1)) (match_dup 2))
112 (clobber (match_scratch:SI 4 "=q1"))
113 (clobber (reg:SI REG_RETS))]
114 "TARGET_SUPPORTS_SYNC_CALLS"
116 [(set_attr "type" "call")])
118 (define_expand "sync_new_<fetchop_name>si"
120 [(set (match_operand:SI 0 "register_operand" "")
122 [(FETCHOP:SI (match_operand:SI 1 "memory_operand" "")
123 (match_operand:SI 2 "register_operand" ""))
128 [(FETCHOP:SI (match_dup 1) (match_dup 2))
131 (clobber (match_scratch:SI 4 ""))
132 (clobber (reg:SI REG_RETS))])]
133 "TARGET_SUPPORTS_SYNC_CALLS"
135 if (!REG_P (XEXP (operands[1], 0)))
137 operands[1] = shallow_copy_rtx (operands[1]);
138 XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
140 operands[3] = force_reg (Pmode, GEN_INT (<fetchop_addr>));
143 (define_insn "sync_compare_and_swapsi_internal"
144 [(set (match_operand:SI 0 "register_operand" "=q0")
145 (mem:SI (match_operand:SI 1 "register_operand" "qA")))
146 (set (mem:SI (match_dup 1))
148 [(mem:SI (match_dup 1))
149 (match_operand:SI 2 "register_operand" "q1")
150 (match_operand:SI 3 "register_operand" "q2")
151 (match_operand:SI 4 "register_no_elim_operand" "a")]
153 (clobber (reg:SI REG_RETS))]
154 "TARGET_SUPPORTS_SYNC_CALLS"
156 [(set_attr "type" "call")])
158 (define_expand "sync_compare_and_swapsi"
160 [(set (match_operand:SI 0 "register_operand" "")
161 (match_operand:SI 1 "memory_operand" ""))
165 (match_operand:SI 2 "register_operand" "")
166 (match_operand:SI 3 "register_operand" "")
169 (clobber (reg:SI REG_RETS))])]
170 "TARGET_SUPPORTS_SYNC_CALLS"
172 if (!REG_P (XEXP (operands[1], 0)))
174 operands[1] = shallow_copy_rtx (operands[1]);
175 XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
177 operands[4] = force_reg (Pmode, GEN_INT (0x420));