1 # Copyright
(C
) 1999-2014 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 if { [llength $
args] > 0 } {
45 set options
[list
"additional_flags=[lindex $args 0]"]
49 switch -glob
-- $contents
{
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default
{ set src $
{basename
}[pid
].c
}
64 set compile_type $type
66 assembly
{ set output $
{basename
}[pid
].s
}
67 object
{ set output $
{basename
}[pid
].o
}
68 executable
{ set output $
{basename
}[pid
].exe
}
70 set output $
{basename
}[pid
].s
71 lappend options
"additional_flags=-fdump-$type"
72 set compile_type assembly
78 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
81 set scan_output $output
82 # Don
't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
85 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
89 return [list $lines $scan_output
]
92 proc current_target_name
{ } {
94 if [info exists target_info
(target
,name)] {
95 set answer $target_info
(target
,name)
102 # Implement an effective
-target check
for property PROP by invoking
103 # the Tcl command
ARGS and seeing
if it returns true.
105 proc check_cached_effective_target
{ prop
args } {
108 set target
[current_target_name
]
109 if {![info exists et_cache
($prop
,target
)]
110 || $et_cache
($prop
,target
) != $target
} {
111 verbose
"check_cached_effective_target $prop: checking $target" 2
112 set et_cache
($prop
,target
) $target
113 set et_cache
($prop
,value
) [uplevel eval $
args]
115 set value $et_cache
($prop
,value
)
116 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
120 # Like check_compile
, but
delete the output file and
return true
if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache
{args} {
123 set result
[eval check_compile $
args]
124 set lines
[lindex $result
0]
125 set output
[lindex $result
1]
126 remote_file build
delete $output
127 return [string match
"" $lines]
130 # Like check_no_compiler_messages_nocache
, but
cache the result.
131 # PROP is the
property we
're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP
, otherwise they satisfy it
143 #
if they
do match regular expression PATTERN.
(PATTERN can start
144 # with something like
"[!]" if the regular expression needs to match
145 #
"!" as the first character.)
147 #
Delete the output file before returning. The other arguments are
148 # as
for check_compile.
149 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
152 set result
[eval
[list check_compile $basename
] $
args]
153 set lines
[lindex $result
0]
154 set output
[lindex $result
1]
157 if { [string match
"" $lines] } {
158 set chan
[open
"$output"]
159 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
160 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
164 remote_file build
delete $output
168 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
169 # PROP is the
property we
're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
198 remote_file build delete $output
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking
, and doubles as a prefix
for temporary
205 proc check_runtime
{prop
args} {
208 return [check_cached_effective_target $prop
{
209 eval
[list check_runtime_nocache $prop
] $
args
213 ###############################
214 # proc check_weak_available
{ }
215 ###############################
217 # weak symbols are only supported in some configs
/object formats
218 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
220 proc check_weak_available
{ } {
223 # All mips targets should support it
225 if { [ string first
"mips" $target_cpu ] >= 0 } {
229 # All AIX targets should support it
231 if { [istarget
*-*-aix
*] } {
235 # All solaris2 targets should support it
237 if { [istarget
*-*-solaris2
*] } {
241 # Windows targets Cygwin and MingW32 support it
243 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
247 # HP
-UX
10.X doesn
't support it
249 if { [istarget hppa*-*-hpux10*] } {
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
256 set objformat [gcc_target_object_format]
264 unknown { return -1 }
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
280 return [check_weak_available]
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
300 ###############################
301 # proc check_alias_available { }
302 ###############################
304 # Determine if the target toolchain supports the alias attribute.
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
311 proc check_alias_available { } {
312 global alias_available_saved
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
328 set lines [${tool}_target_compile $src $obj object ""]
330 remote_file build delete $obj
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
339 set objformat [gcc_target_object_format]
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
345 set alias_available_saved 0
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
352 set alias_available_saved -1
357 verbose "check_alias_available returning $alias_available_saved" 2
360 return $alias_available_saved
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
381 void f() __attribute__((ifunc("g")));
385 # Returns true if --gc-sections is supported on the target.
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc
-sections despite whatever
's
393 # advertised by ld's options.
394 if { [istarget alpha
*-*-*]
395 ||
[istarget ia64
-*-*] } {
396 set gc_sections_available_saved
0
400 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
402 if { [board_info target
exists ldflags
]
403 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved
0
408 # VxWorks kernel modules are relocatable objects linked with
-r
,
409 #
while RTP executables are linked with
-q
(--emit
-relocs
).
410 # Both of these options are incompatible with
--gc
-sections.
411 if { [istarget
*-*-vxworks
*] } {
412 set gc_sections_available_saved
0
416 # Check
if the
ld used by gcc supports
--gc
-sections.
417 set gcc_spec
[$
{tool
}_target_compile
"-dumpspecs" "" "none" ""]
418 regsub
".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
421 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved
1
424 set gc_sections_available_saved
0
427 return $gc_sections_available_saved
430 #
Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
433 proc check_effective_target_trampolines
{ } {
434 if [target_info
exists no_trampolines
] {
437 if { [istarget avr
-*-*]
438 ||
[istarget msp430
-*-*]
439 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
440 ||
[istarget hppa64
-hp
-hpux11.23
] } {
446 #
Return 1 if according to target_info struct and explicit target list
447 # target is supposed to keep null pointer checks. This could be due to
448 # use of option fno
-delete-null
-pointer
-checks or hardwired in target.
450 proc check_effective_target_keeps_null_pointer_checks
{ } {
451 if [target_info
exists keeps_null_pointer_checks
] {
454 if { [istarget avr
-*-*] } {
460 #
Return true
if profiling is supported
on the target.
462 proc check_profiling_available
{ test_what
} {
463 global profiling_available_saved
465 verbose
"Profiling argument is <$test_what>" 1
467 # These conditions depend
on the
argument so examine them before
468 # looking at the
cache variable.
470 # Tree profiling requires TLS runtime support.
471 if { $test_what
== "-fprofile-generate" } {
472 if { ![check_effective_target_tls_runtime
] } {
477 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
478 # vendor compiler. We cannot reliably predict the directory where the
479 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
480 # necessarily find mcrt1.o even if we have it.
481 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
485 # We don't yet support profiling
for MIPS16.
486 if { [istarget mips
*-*-*]
487 && ![check_effective_target_nomips16
]
488 && ($test_what
== "-p" || $test_what == "-pg") } {
492 # MinGW does not support
-p.
493 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
497 # cygwin does not support
-p.
498 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
502 # uClibc does not have gcrt1.o.
503 if { [check_effective_target_uclibc
]
504 && ($test_what
== "-p" || $test_what == "-pg") } {
508 # Now examine the
cache variable.
509 if {![info exists profiling_available_saved
]} {
510 # Some targets don
't have any implementation of __bb_init_func or are
511 # missing other needed machinery.
512 if { [istarget aarch64*-*-elf]
513 || [istarget am3*-*-linux*]
514 || [istarget arm*-*-eabi*]
515 || [istarget arm*-*-elf]
516 || [istarget arm*-*-symbianelf*]
517 || [istarget avr-*-*]
518 || [istarget bfin-*-*]
519 || [istarget cris-*-*]
520 || [istarget crisv32-*-*]
521 || [istarget fido-*-elf]
522 || [istarget h8300-*-*]
523 || [istarget lm32-*-*]
524 || [istarget m32c-*-elf]
525 || [istarget m68k-*-elf]
526 || [istarget m68k-*-uclinux*]
527 || [istarget mep-*-elf]
528 || [istarget mips*-*-elf*]
529 || [istarget mmix-*-*]
530 || [istarget mn10300-*-elf*]
531 || [istarget moxie-*-elf*]
532 || [istarget msp430-*-*]
533 || [istarget nds32*-*-elf]
534 || [istarget nios2-*-elf]
535 || [istarget powerpc-*-eabi*]
536 || [istarget powerpc-*-elf]
538 || [istarget tic6x-*-elf]
539 || [istarget xstormy16-*]
540 || [istarget xtensa*-*-elf]
541 || [istarget *-*-rtems*]
542 || [istarget *-*-vxworks*] } {
543 set profiling_available_saved 0
545 set profiling_available_saved 1
549 return $profiling_available_saved
552 # Check to see if a target is "freestanding". This is as per the definition
553 # in Section 4 of C99 standard. Effectively, it is a target which supports no
554 # extra headers or libraries other than what is considered essential.
555 proc check_effective_target_freestanding { } {
559 # Return 1 if target has packed layout of structure members by
560 # default, 0 otherwise. Note that this is slightly different than
561 # whether the target has "natural alignment": both attributes may be
564 proc check_effective_target_default_packed { } {
565 return [check_no_compiler_messages default_packed assembly {
566 struct x { char a; long b; } c;
567 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
571 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
572 # documentation, where the test also comes from.
574 proc check_effective_target_pcc_bitfield_type_matters { } {
575 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
576 # bitfields
, but let
's stick to the example code from the docs.
577 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
578 struct foo1 { char x; char :0; char y; };
579 struct foo2 { char x; int :0; char y; };
580 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
584 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
586 proc add_options_for_tls { flags } {
587 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
588 # libthread, so always pass -pthread for native TLS. Same for AIX.
589 # Need to duplicate native TLS check from
590 # check_effective_target_tls_native to avoid recursion.
591 if { ([istarget powerpc-ibm-aix*]) &&
592 [check_no_messages_and_pattern tls_native "!emutls" assembly {
594 int f (void) { return i; }
595 void g (int j) { i = j; }
597 return "$flags -pthread"
602 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
604 proc check_effective_target_tls {} {
605 return [check_no_compiler_messages tls assembly {
607 int f (void) { return i; }
608 void g (int j) { i = j; }
612 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
614 proc check_effective_target_tls_native {} {
615 # VxWorks uses emulated TLS machinery, but with non-standard helper
616 # functions, so we fail to automatically detect it.
617 if { [istarget *-*-vxworks*] } {
621 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
623 int f (void) { return i; }
624 void g (int j) { i = j; }
628 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
630 proc check_effective_target_tls_emulated {} {
631 # VxWorks uses emulated TLS machinery, but with non-standard helper
632 # functions, so we fail to automatically detect it.
633 if { [istarget *-*-vxworks*] } {
637 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
639 int f (void) { return i; }
640 void g (int j) { i = j; }
644 # Return 1 if TLS executables can run correctly, 0 otherwise.
646 proc check_effective_target_tls_runtime {} {
647 # MSP430 runtime does not have TLS support, but just
648 # running the test below is insufficient to show this.
649 if { [istarget msp430-*-*] } {
652 return [check_runtime tls_runtime {
653 __thread int thr = 0;
654 int main (void) { return thr; }
655 } [add_options_for_tls ""]]
658 # Return 1 if atomic compare-and-swap is supported on 'int'
660 proc check_effective_target_cas_char {} {
661 return [check_no_compiler_messages cas_char assembly {
662 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
668 proc check_effective_target_cas_int {} {
669 return [check_no_compiler_messages cas_int assembly {
670 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
672 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
680 # Return 1 if -ffunction-sections is supported, 0 otherwise.
682 proc check_effective_target_function_sections {} {
683 # Darwin has its own scheme and silently accepts -ffunction-sections.
684 if { [istarget *-*-darwin*] } {
688 return [check_no_compiler_messages functionsections assembly {
690 } "-ffunction-sections"]
693 # Return 1 if instruction scheduling is available, 0 otherwise.
695 proc check_effective_target_scheduling {} {
696 return [check_no_compiler_messages scheduling object {
698 } "-fschedule-insns"]
701 # Return 1 if trapping arithmetic is available, 0 otherwise.
703 proc check_effective_target_trapping {} {
704 return [check_no_compiler_messages trapping object {
705 add (int a, int b) { return a + b; }
709 # Return 1 if compilation with -fgraphite is error-free for trivial
712 proc check_effective_target_fgraphite {} {
713 return [check_no_compiler_messages fgraphite object {
718 # Return 1 if compilation with -fopenmp is error-free for trivial
721 proc check_effective_target_fopenmp {} {
722 return [check_no_compiler_messages fopenmp object {
727 # Return 1 if compilation with -fgnu-tm is error-free for trivial
730 proc check_effective_target_fgnu_tm {} {
731 return [check_no_compiler_messages fgnu_tm object {
736 # Return 1 if the target supports mmap, 0 otherwise.
738 proc check_effective_target_mmap {} {
739 return [check_function_available "mmap"]
742 # Return 1 if the target supports dlopen, 0 otherwise.
743 proc check_effective_target_dlopen {} {
744 return [check_no_compiler_messages dlopen executable {
746 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
747 } [add_options_for_dlopen ""]]
750 proc add_options_for_dlopen { flags } {
754 # Return 1 if the target supports clone, 0 otherwise.
755 proc check_effective_target_clone {} {
756 return [check_function_available "clone"]
759 # Return 1 if the target supports setrlimit, 0 otherwise.
760 proc check_effective_target_setrlimit {} {
761 # Darwin has non-posix compliant RLIMIT_AS
762 if { [istarget *-*-darwin*] } {
765 return [check_function_available "setrlimit"]
768 # Return 1 if the target supports swapcontext, 0 otherwise.
769 proc check_effective_target_swapcontext {} {
770 return [check_no_compiler_messages swapcontext executable {
771 #include <ucontext.h>
774 ucontext_t orig_context,child_context;
775 if (swapcontext(&child_context, &orig_context) < 0) { }
780 # Return 1 if compilation with -pthread is error-free for trivial
783 proc check_effective_target_pthread {} {
784 return [check_no_compiler_messages pthread object {
789 # Return 1 if compilation with -mpe-aligned-commons is error-free
790 # for trivial code, 0 otherwise.
792 proc check_effective_target_pe_aligned_commons {} {
793 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
794 return [check_no_compiler_messages pe_aligned_commons object {
796 } "-mpe-aligned-commons"]
801 # Return 1 if the target supports -static
802 proc check_effective_target_static {} {
803 return [check_no_compiler_messages static executable {
804 int main (void) { return 0; }
808 # Return 1 if the target supports -fstack-protector
809 proc check_effective_target_fstack_protector {} {
810 return [check_runtime fstack_protector {
811 int main (void) { return 0; }
812 } "-fstack-protector"]
815 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
816 # for trivial code, 0 otherwise.
818 proc check_effective_target_freorder {} {
819 return [check_no_compiler_messages freorder object {
821 } "-freorder-blocks-and-partition"]
824 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
825 # emitted, 0 otherwise. Whether a shared library can actually be built is
826 # out of scope for this test.
828 proc check_effective_target_fpic { } {
829 # Note that M68K has a multilib that supports -fpic but not
830 # -fPIC, so we need to check both. We test with a program that
831 # requires GOT references.
832 foreach arg {fpic fPIC} {
833 if [check_no_compiler_messages $arg object {
834 extern int foo (void); extern int bar;
835 int baz (void) { return foo () + bar; }
843 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
845 proc check_effective_target_pie { } {
846 if { [istarget *-*-darwin\[912\]*]
847 || [istarget *-*-linux*]
848 || [istarget *-*-gnu*] } {
854 # Return true if the target supports -mpaired-single (as used on MIPS).
856 proc check_effective_target_mpaired_single { } {
857 return [check_no_compiler_messages mpaired_single object {
862 # Return true if the target has access to FPU instructions.
864 proc check_effective_target_hard_float { } {
865 if { [istarget mips*-*-*] } {
866 return [check_no_compiler_messages hard_float assembly {
867 #if (defined __mips_soft_float || defined __mips16)
873 # This proc is actually checking the availabilty of FPU
874 # support for doubles, so on the RX we must fail if the
875 # 64-bit double multilib has been selected.
876 if { [istarget rx-*-*] } {
878 # return [check_no_compiler_messages hard_float assembly {
879 #if defined __RX_64_BIT_DOUBLES__
885 # The generic test equates hard_float with "no call for adding doubles".
886 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
887 double a (double b, double c) { return b + c; }
891 # Return true if the target is a 64-bit MIPS target.
893 proc check_effective_target_mips64 { } {
894 return [check_no_compiler_messages mips64 assembly {
901 # Return true if the target is a MIPS target that does not produce
904 proc check_effective_target_nomips16 { } {
905 return [check_no_compiler_messages nomips16 object {
909 /* A cheap way of testing for -mflip-mips16. */
910 void foo (void) { asm ("addiu $20,$20,1"); }
911 void bar (void) { asm ("addiu $20,$20,1"); }
916 # Add the options needed for MIPS16 function attributes. At the moment,
917 # we don't support MIPS16 PIC.
919 proc add_options_for_mips16_attribute
{ flags
} {
920 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
923 #
Return true
if we can force a
mode that allows MIPS16 code generation.
924 # We don
't support MIPS16 PIC, and only support MIPS16 -mhard-float
927 proc check_effective_target_mips16_attribute { } {
928 return [check_no_compiler_messages mips16_attribute assembly {
932 #if defined __mips_hard_float \
933 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
934 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
937 } [add_options_for_mips16_attribute ""]]
940 # Return 1 if the target supports long double larger than double when
941 # using the new ABI, 0 otherwise.
943 proc check_effective_target_mips_newabi_large_long_double { } {
944 return [check_no_compiler_messages mips_newabi_large_long_double object {
945 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
949 # Return true if the target is a MIPS target that has access
950 # to the LL and SC instructions.
952 proc check_effective_target_mips_llsc { } {
953 if { ![istarget mips*-*-*] } {
956 # Assume that these instructions are always implemented for
957 # non-elf* targets, via emulation if necessary.
958 if { ![istarget *-*-elf*] } {
961 # Otherwise assume LL/SC support for everything but MIPS I.
962 return [check_no_compiler_messages mips_llsc assembly {
969 # Return true if the target is a MIPS target that uses in-place relocations.
971 proc check_effective_target_mips_rel { } {
972 if { ![istarget mips*-*-*] } {
975 return [check_no_compiler_messages mips_rel object {
976 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
977 || (defined _ABI64 && _MIPS_SIM == _ABI64)
983 # Return true if the target is a MIPS target that uses the EABI.
985 proc check_effective_target_mips_eabi { } {
986 if { ![istarget mips*-*-*] } {
989 return [check_no_compiler_messages mips_eabi object {
996 # Return 1 if the current multilib does not generate PIC by default.
998 proc check_effective_target_nonpic { } {
999 return [check_no_compiler_messages nonpic assembly {
1006 # Return 1 if the target does not use a status wrapper.
1008 proc check_effective_target_unwrapped { } {
1009 if { [target_info needs_status_wrapper] != "" \
1010 && [target_info needs_status_wrapper] != "0" } {
1016 # Return true if iconv is supported on the target. In particular IBM1047.
1018 proc check_iconv_available { test_what } {
1021 # If the tool configuration file has not set libiconv, try "-liconv"
1022 if { ![info exists libiconv] } {
1023 set libiconv "-liconv"
1025 set test_what [lindex $test_what 1]
1026 return [check_runtime_nocache $test_what [subst {
1032 cd = iconv_open ("$test_what", "UTF-8");
1033 if (cd == (iconv_t) -1)
1040 # Return true if Cilk Library is supported on the target.
1041 proc check_libcilkrts_available { } {
1042 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1046 int __cilkrts_set_param (const char *, const char *);
1048 int x = __cilkrts_set_param ("nworkers", "0");
1051 } "-fcilkplus -lcilkrts" ]
1054 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1056 proc check_ascii_locale_available { } {
1060 # Return true if named sections are supported on this target.
1062 proc check_named_sections_available { } {
1063 return [check_no_compiler_messages named_sections assembly {
1064 int __attribute__ ((section("whatever"))) foo;
1068 # Return true if the "naked" function attribute is supported on this target.
1070 proc check_effective_target_naked_functions { } {
1071 return [check_no_compiler_messages naked_functions assembly {
1072 void f() __attribute__((naked));
1076 # Return 1 if the target supports Fortran real kinds larger than real(8),
1079 # When the target name changes, replace the cached result.
1081 proc check_effective_target_fortran_large_real { } {
1082 return [check_no_compiler_messages fortran_large_real executable {
1084 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1091 # Return 1 if the target supports Fortran real kind real(16),
1092 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1093 # this checks for Real(16) only; the other returned real(10) if
1094 # both real(10) and real(16) are available.
1096 # When the target name changes, replace the cached result.
1098 proc check_effective_target_fortran_real_16 { } {
1099 return [check_no_compiler_messages fortran_real_16 executable {
1108 # Return 1 if the target supports Fortran's IEEE modules
,
1111 # When the target
name changes
, replace the cached result.
1113 proc check_effective_target_fortran_ieee
{ flags
} {
1114 return [check_no_compiler_messages fortran_ieee executable
{
1116 use
, intrinsic
:: ieee_features
1122 #
Return 1 if the target supports
SQRT for the
largest floating
-point
1123 # type.
(Some targets lack the libm support
for this FP type.
)
1124 #
On most targets
, this check effectively checks either whether sqrtl is
1125 # available or
on __float128 systems whether libquadmath is installed
,
1126 # which provides sqrtq.
1128 # When the target
name changes
, replace the cached result.
1130 proc check_effective_target_fortran_largest_fp_has_sqrt
{ } {
1131 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable
{
1133 use iso_fortran_env
, only
: real_kinds
1134 integer,parameter
:: maxFP
= real_kinds
(ubound
(real_kinds
,dim
=1))
1135 real
(kind
=maxFP
), volatile
:: x
1143 #
Return 1 if the target supports Fortran
integer kinds larger than
1144 #
integer(8), 0 otherwise.
1146 # When the target
name changes
, replace the cached result.
1148 proc check_effective_target_fortran_large_int
{ } {
1149 return [check_no_compiler_messages fortran_large_int executable
{
1151 integer,parameter
:: k
= selected_int_kind
(range
(0_8
) + 1)
1152 integer(kind
=k
) :: i
1157 #
Return 1 if the target supports Fortran
integer(16), 0 otherwise.
1159 # When the target
name changes
, replace the cached result.
1161 proc check_effective_target_fortran_integer_16
{ } {
1162 return [check_no_compiler_messages fortran_integer_16 executable
{
1169 #
Return 1 if we can statically link libgfortran
, 0 otherwise.
1171 # When the target
name changes
, replace the cached result.
1173 proc check_effective_target_static_libgfortran
{ } {
1174 return [check_no_compiler_messages static_libgfortran executable
{
1181 #
Return 1 if cilk
-plus is supported by the target
, 0 otherwise.
1183 proc check_effective_target_cilkplus
{ } {
1184 # Skip cilk
-plus tests
on int16 and size16 targets
for now.
1185 # The cilk
-plus tests are not generic enough to cover these
1186 # cases and would throw hundreds of FAILs.
1187 if { [check_effective_target_int16
]
1188 ||
![check_effective_target_size32plus
] } {
1192 # Skip AVR
, its RAM is too small and too many tests would fail.
1193 if { [istarget avr
-*-*] } {
1199 proc check_linker_plugin_available
{ } {
1200 return [check_no_compiler_messages_nocache linker_plugin executable
{
1201 int main
() { return 0; }
1202 } "-flto -fuse-linker-plugin"]
1205 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
1206 # otherwise.
Cache the result.
1208 proc check_750cl_hw_available
{ } {
1209 return [check_cached_effective_target
750cl_hw_available
{
1210 #
If this is not the right target
then we can skip the test.
1211 if { ![istarget powerpc
-*paired
*] } {
1214 check_runtime_nocache
750cl_hw_available
{
1218 asm volatile
("ps_mul v0,v0,v0");
1220 asm volatile
("ps_mul 0,0,0");
1229 #
Return 1 if the target OS supports running SSE executables
, 0
1230 # otherwise.
Cache the result.
1232 proc check_sse_os_support_available
{ } {
1233 return [check_cached_effective_target sse_os_support_available
{
1234 #
If this is not the right target
then we can skip the test.
1235 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1237 } elseif
{ [istarget i?
86-*-solaris2
*] } {
1238 # The Solaris
2 kernel doesn
't save and restore SSE registers
1239 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1240 check_runtime_nocache sse_os_support_available {
1243 asm volatile ("movaps %xmm0,%xmm0");
1253 # Return 1 if the target OS supports running AVX executables, 0
1254 # otherwise. Cache the result.
1256 proc check_avx_os_support_available { } {
1257 return [check_cached_effective_target avx_os_support_available {
1258 # If this is not the right target then we can skip the test.
1259 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1262 # Check that OS has AVX and SSE saving enabled.
1263 check_runtime_nocache avx_os_support_available {
1266 unsigned int eax, edx;
1268 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1269 return (eax & 6) != 6;
1276 # Return 1 if the target supports executing SSE instructions, 0
1277 # otherwise. Cache the result.
1279 proc check_sse_hw_available { } {
1280 return [check_cached_effective_target sse_hw_available {
1281 # If this is not the right target then we can skip the test.
1282 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1285 check_runtime_nocache sse_hw_available {
1289 unsigned int eax, ebx, ecx, edx;
1290 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1291 return !(edx & bit_SSE);
1299 # Return 1 if the target supports executing SSE2 instructions, 0
1300 # otherwise. Cache the result.
1302 proc check_sse2_hw_available { } {
1303 return [check_cached_effective_target sse2_hw_available {
1304 # If this is not the right target then we can skip the test.
1305 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1308 check_runtime_nocache sse2_hw_available {
1312 unsigned int eax, ebx, ecx, edx;
1313 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1314 return !(edx & bit_SSE2);
1322 # Return 1 if the target supports executing AVX instructions, 0
1323 # otherwise. Cache the result.
1325 proc check_avx_hw_available { } {
1326 return [check_cached_effective_target avx_hw_available {
1327 # If this is not the right target then we can skip the test.
1328 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1331 check_runtime_nocache avx_hw_available {
1335 unsigned int eax, ebx, ecx, edx;
1336 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1337 return ((ecx & (bit_AVX | bit_OSXSAVE))
1338 != (bit_AVX | bit_OSXSAVE));
1346 # Return 1 if the target supports running SSE executables, 0 otherwise.
1348 proc check_effective_target_sse_runtime { } {
1349 if { [check_effective_target_sse]
1350 && [check_sse_hw_available]
1351 && [check_sse_os_support_available] } {
1357 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1359 proc check_effective_target_sse2_runtime { } {
1360 if { [check_effective_target_sse2]
1361 && [check_sse2_hw_available]
1362 && [check_sse_os_support_available] } {
1368 # Return 1 if the target supports running AVX executables, 0 otherwise.
1370 proc check_effective_target_avx_runtime { } {
1371 if { [check_effective_target_avx]
1372 && [check_avx_hw_available]
1373 && [check_avx_os_support_available] } {
1379 # Return 1 if the target supports executing power8 vector instructions, 0
1380 # otherwise. Cache the result.
1382 proc check_p8vector_hw_available { } {
1383 return [check_cached_effective_target p8vector_hw_available {
1384 # Some simulators are known to not support VSX/power8 instructions.
1385 # For now, disable on Darwin
1386 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1389 set options "-mpower8-vector"
1390 check_runtime_nocache p8vector_hw_available {
1394 asm volatile ("xxlorc vs0,vs0,vs0");
1396 asm volatile ("xxlorc 0,0,0");
1405 # Return 1 if the target supports executing VSX instructions, 0
1406 # otherwise. Cache the result.
1408 proc check_vsx_hw_available { } {
1409 return [check_cached_effective_target vsx_hw_available {
1410 # Some simulators are known to not support VSX instructions.
1411 # For now, disable on Darwin
1412 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1416 check_runtime_nocache vsx_hw_available {
1420 asm volatile ("xxlor vs0,vs0,vs0");
1422 asm volatile ("xxlor 0,0,0");
1431 # Return 1 if the target supports executing AltiVec instructions, 0
1432 # otherwise. Cache the result.
1434 proc check_vmx_hw_available { } {
1435 return [check_cached_effective_target vmx_hw_available {
1436 # Some simulators are known to not support VMX instructions.
1437 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1440 # Most targets don't require special flags
for this test case
, but
1441 # Darwin does. Just to be sure
, make sure VSX is not enabled
for
1442 # the altivec tests.
1443 if { [istarget
*-*-darwin
*]
1444 ||
[istarget
*-*-aix
*] } {
1445 set options
"-maltivec -mno-vsx"
1447 set options
"-mno-vsx"
1449 check_runtime_nocache vmx_hw_available
{
1453 asm volatile
("vor v0,v0,v0");
1455 asm volatile
("vor 0,0,0");
1464 proc check_ppc_recip_hw_available
{ } {
1465 return [check_cached_effective_target ppc_recip_hw_available
{
1466 # Some simulators may not support FRE
/FRES
/FRSQRTE
/FRSQRTES
1467 #
For now
, disable
on Darwin
1468 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] ||
[istarget
*-*-darwin
*]} {
1471 set options
"-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1472 check_runtime_nocache ppc_recip_hw_available
{
1473 volatile double d_recip
, d_rsqrt
, d_four
= 4.0;
1474 volatile float f_recip
, f_rsqrt
, f_four
= 4.0f
;
1477 asm volatile
("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1478 asm volatile
("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1479 asm volatile
("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1480 asm volatile
("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1488 #
Return 1 if the target supports executing AltiVec and Cell PPU
1489 # instructions
, 0 otherwise.
Cache the result.
1491 proc check_effective_target_cell_hw
{ } {
1492 return [check_cached_effective_target cell_hw_available
{
1493 # Some simulators are known to not support VMX and PPU instructions.
1494 if { [istarget powerpc
-*-eabi
*] } {
1497 # Most targets don
't require special flags for this test
1498 # case, but Darwin and AIX do.
1499 if { [istarget *-*-darwin*]
1500 || [istarget *-*-aix*] } {
1501 set options "-maltivec -mcpu=cell"
1503 set options "-mcpu=cell"
1505 check_runtime_nocache cell_hw_available {
1509 asm volatile ("vor v0,v0,v0");
1510 asm volatile ("lvlx v0,r0,r0");
1512 asm volatile ("vor 0,0,0");
1513 asm volatile ("lvlx 0,0,0");
1522 # Return 1 if the target supports executing 64-bit instructions, 0
1523 # otherwise. Cache the result.
1525 proc check_effective_target_powerpc64 { } {
1526 global powerpc64_available_saved
1529 if [info exists powerpc64_available_saved] {
1530 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1532 set powerpc64_available_saved 0
1534 # Some simulators are known to not support powerpc64 instructions.
1535 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1536 verbose "check_effective_target_powerpc64 returning 0" 2
1537 return $powerpc64_available_saved
1540 # Set up, compile, and execute a test program containing a 64-bit
1541 # instruction. Include the current process ID in the file
1542 # names to prevent conflicts with invocations for multiple
1547 set f [open $src "w"]
1548 puts $f "int main() {"
1549 puts $f "#ifdef __MACH__"
1550 puts $f " asm volatile (\"extsw r0,r0\");"
1552 puts $f " asm volatile (\"extsw 0,0\");"
1554 puts $f " return 0; }"
1557 set opts "additional_flags=-mcpu=G5"
1559 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1560 set lines [${tool}_target_compile $src $exe executable "$opts"]
1563 if [string match "" $lines] then {
1564 # No error message, compilation succeeded.
1565 set result [${tool}_load "./$exe" "" ""]
1566 set status [lindex $result 0]
1567 remote_file build delete $exe
1568 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1570 if { $status == "pass" } then {
1571 set powerpc64_available_saved 1
1574 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1578 return $powerpc64_available_saved
1581 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1582 # complex float arguments. This affects gfortran tests that call cabsf
1583 # in libm built by an earlier compiler. Return 1 if libm uses the same
1584 # argument passing as the compiler under test, 0 otherwise.
1586 # When the target name changes, replace the cached result.
1588 proc check_effective_target_broken_cplxf_arg { } {
1589 return [check_cached_effective_target broken_cplxf_arg {
1590 # Skip the work for targets known not to be affected.
1591 if { ![istarget powerpc64-*-linux*] } {
1593 } elseif { ![is-effective-target lp64] } {
1596 check_runtime_nocache broken_cplxf_arg {
1597 #include <complex.h>
1598 extern void abort (void);
1599 float fabsf (float);
1600 float cabsf (_Complex float);
1607 if (fabsf (f - 5.0) > 0.0001)
1616 # Return 1 is this is a TI C6X target supporting C67X instructions
1617 proc check_effective_target_ti_c67x { } {
1618 return [check_no_compiler_messages ti_c67x assembly {
1619 #if !defined(_TMS320C6700)
1625 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1626 proc check_effective_target_ti_c64xp { } {
1627 return [check_no_compiler_messages ti_c64xp assembly {
1628 #if !defined(_TMS320C6400_PLUS)
1635 proc check_alpha_max_hw_available { } {
1636 return [check_runtime alpha_max_hw_available {
1637 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1641 # Returns true iff the FUNCTION is available on the target system.
1642 # (This is essentially a Tcl implementation of Autoconf's
1645 proc check_function_available
{ function
} {
1646 return [check_no_compiler_messages $
{function
}_available \
1652 int main
() { $function
(); }
1656 # Returns true iff
"fork" is available on the target system.
1658 proc check_fork_available
{} {
1659 return [check_function_available
"fork"]
1662 # Returns true iff
"mkfifo" is available on the target system.
1664 proc check_mkfifo_available
{} {
1665 if { [istarget
*-*-cygwin
*] } {
1666 # Cygwin has mkfifo
, but support is incomplete.
1670 return [check_function_available
"mkfifo"]
1673 # Returns true iff
"__cxa_atexit" is used on the target system.
1675 proc check_cxa_atexit_available
{ } {
1676 return [check_cached_effective_target cxa_atexit_available
{
1677 if { [istarget hppa
*-*-hpux10
*] } {
1678 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
1680 } elseif { [istarget *-*-vxworks] } {
1681 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1684 check_runtime_nocache cxa_atexit_available
{
1687 static unsigned
int count;
1704 Y
() { f
(); count = 2; }
1713 int main
() { return 0; }
1719 proc check_effective_target_objc2
{ } {
1720 return [check_no_compiler_messages objc2 object
{
1729 proc check_effective_target_next_runtime
{ } {
1730 return [check_no_compiler_messages objc2 object
{
1731 #ifdef __NEXT_RUNTIME__
1739 #
Return 1 if we
're generating 32-bit code using default options, 0
1742 proc check_effective_target_ilp32 { } {
1743 return [check_no_compiler_messages ilp32 object {
1744 int dummy[sizeof (int) == 4
1745 && sizeof (void *) == 4
1746 && sizeof (long) == 4 ? 1 : -1];
1750 # Return 1 if we're generating ia32 code using default options
, 0
1753 proc check_effective_target_ia32
{ } {
1754 return [check_no_compiler_messages ia32 object
{
1755 int dummy
[sizeof
(int) == 4
1756 && sizeof
(void
*) == 4
1757 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
1761 #
Return 1 if we
're generating x32 code using default options, 0
1764 proc check_effective_target_x32 { } {
1765 return [check_no_compiler_messages x32 object {
1766 int dummy[sizeof (int) == 4
1767 && sizeof (void *) == 4
1768 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1772 # Return 1 if we're generating
32-bit integers using default
1773 # options
, 0 otherwise.
1775 proc check_effective_target_int32
{ } {
1776 return [check_no_compiler_messages int32 object
{
1777 int dummy
[sizeof
(int) == 4 ?
1 : -1];
1781 #
Return 1 if we
're generating 32-bit or larger integers using default
1782 # options, 0 otherwise.
1784 proc check_effective_target_int32plus { } {
1785 return [check_no_compiler_messages int32plus object {
1786 int dummy[sizeof (int) >= 4 ? 1 : -1];
1790 # Return 1 if we're generating
32-bit or larger pointers using default
1791 # options
, 0 otherwise.
1793 proc check_effective_target_ptr32plus
{ } {
1794 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
1795 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
1796 # cannot really hold a
32-bit address
, so we always
return false here.
1797 if { [istarget msp430
-*-*] } {
1801 return [check_no_compiler_messages ptr32plus object
{
1802 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
1806 #
Return 1 if we support
32-bit or larger array and structure sizes
1807 # using default options
, 0 otherwise. Avoid false positive
on
1808 # targets with
20 or
24 bit address spaces.
1810 proc check_effective_target_size32plus
{ } {
1811 return [check_no_compiler_messages size32plus object
{
1812 char dummy
[16777217L];
1816 # Returns
1 if we
're generating 16-bit or smaller integers with the
1817 # default options, 0 otherwise.
1819 proc check_effective_target_int16 { } {
1820 return [check_no_compiler_messages int16 object {
1821 int dummy[sizeof (int) < 4 ? 1 : -1];
1825 # Return 1 if we're generating
64-bit code using default options
, 0
1828 proc check_effective_target_lp64
{ } {
1829 return [check_no_compiler_messages lp64 object
{
1830 int dummy
[sizeof
(int) == 4
1831 && sizeof
(void
*) == 8
1832 && sizeof
(long
) == 8 ?
1 : -1];
1836 #
Return 1 if we
're generating 64-bit code using default llp64 options,
1839 proc check_effective_target_llp64 { } {
1840 return [check_no_compiler_messages llp64 object {
1841 int dummy[sizeof (int) == 4
1842 && sizeof (void *) == 8
1843 && sizeof (long long) == 8
1844 && sizeof (long) == 4 ? 1 : -1];
1848 # Return 1 if long and int have different sizes,
1851 proc check_effective_target_long_neq_int { } {
1852 return [check_no_compiler_messages long_ne_int object {
1853 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1857 # Return 1 if the target supports long double larger than double,
1860 proc check_effective_target_large_long_double { } {
1861 return [check_no_compiler_messages large_long_double object {
1862 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1866 # Return 1 if the target supports double larger than float,
1869 proc check_effective_target_large_double { } {
1870 return [check_no_compiler_messages large_double object {
1871 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1875 # Return 1 if the target supports long double of 128 bits,
1878 proc check_effective_target_longdouble128 { } {
1879 return [check_no_compiler_messages longdouble128 object {
1880 int dummy[sizeof(long double) == 16 ? 1 : -1];
1884 # Return 1 if the target supports double of 64 bits,
1887 proc check_effective_target_double64 { } {
1888 return [check_no_compiler_messages double64 object {
1889 int dummy[sizeof(double) == 8 ? 1 : -1];
1893 # Return 1 if the target supports double of at least 64 bits,
1896 proc check_effective_target_double64plus { } {
1897 return [check_no_compiler_messages double64plus object {
1898 int dummy[sizeof(double) >= 8 ? 1 : -1];
1902 # Return 1 if the target supports 'w
' suffix on floating constant
1905 proc check_effective_target_has_w_floating_suffix { } {
1907 if [check_effective_target_c++] {
1908 append opts "-std=gnu++03"
1910 return [check_no_compiler_messages w_fp_suffix object {
1915 # Return 1 if the target supports 'q
' suffix on floating constant
1918 proc check_effective_target_has_q_floating_suffix { } {
1920 if [check_effective_target_c++] {
1921 append opts "-std=gnu++03"
1923 return [check_no_compiler_messages q_fp_suffix object {
1927 # Return 1 if the target supports compiling fixed-point,
1930 proc check_effective_target_fixed_point { } {
1931 return [check_no_compiler_messages fixed_point object {
1932 _Sat _Fract x; _Sat _Accum y;
1936 # Return 1 if the target supports compiling decimal floating point,
1939 proc check_effective_target_dfp_nocache { } {
1940 verbose "check_effective_target_dfp_nocache: compiling source" 2
1941 set ret [check_no_compiler_messages_nocache dfp object {
1942 float x __attribute__((mode(DD)));
1944 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1948 proc check_effective_target_dfprt_nocache { } {
1949 return [check_runtime_nocache dfprt {
1950 typedef float d64 __attribute__((mode(DD)));
1951 d64 x = 1.2df, y = 2.3dd, z;
1952 int main () { z = x + y; return 0; }
1956 # Return 1 if the target supports compiling Decimal Floating Point,
1959 # This won't change
for different subtargets so
cache the result.
1961 proc check_effective_target_dfp
{ } {
1962 return [check_cached_effective_target dfp
{
1963 check_effective_target_dfp_nocache
1967 #
Return 1 if the target supports linking and executing Decimal Floating
1968 # Point
, 0 otherwise.
1970 # This won
't change for different subtargets so cache the result.
1972 proc check_effective_target_dfprt { } {
1973 return [check_cached_effective_target dfprt {
1974 check_effective_target_dfprt_nocache
1978 # Return 1 if the target supports executing DFP hardware instructions,
1979 # 0 otherwise. Cache the result.
1981 proc check_dfp_hw_available { } {
1982 return [check_cached_effective_target dfp_hw_available {
1983 # For now, disable on Darwin
1984 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1987 check_runtime_nocache dfp_hw_available {
1988 volatile _Decimal64 r;
1989 volatile _Decimal64 a = 4.0DD;
1990 volatile _Decimal64 b = 2.0DD;
1993 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
1994 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
1995 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
1996 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
1999 } "-mcpu=power6 -mhard-float"
2004 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2006 proc check_effective_target_ucn_nocache { } {
2007 # -std=c99 is only valid for C
2008 if [check_effective_target_c] {
2009 set ucnopts "-std=c99"
2011 append ucnopts " -fextended-identifiers"
2012 verbose "check_effective_target_ucn_nocache: compiling source" 2
2013 set ret [check_no_compiler_messages_nocache ucn object {
2016 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2020 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2022 # This won't change
for different subtargets
, so
cache the result.
2024 proc check_effective_target_ucn
{ } {
2025 return [check_cached_effective_target ucn
{
2026 check_effective_target_ucn_nocache
2030 #
Return 1 if the target needs a command line
argument to enable a SIMD
2033 proc check_effective_target_vect_cmdline_needed
{ } {
2034 global et_vect_cmdline_needed_saved
2035 global et_vect_cmdline_needed_target_name
2037 if { ![info exists et_vect_cmdline_needed_target_name
] } {
2038 set et_vect_cmdline_needed_target_name
""
2041 #
If the target has changed since we
set the cached value
, clear it.
2042 set current_target
[current_target_name
]
2043 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
2044 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2045 set et_vect_cmdline_needed_target_name $current_target
2046 if { [info exists et_vect_cmdline_needed_saved
] } {
2047 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
2048 unset et_vect_cmdline_needed_saved
2052 if [info exists et_vect_cmdline_needed_saved
] {
2053 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
2055 set et_vect_cmdline_needed_saved
1
2056 if { [istarget alpha
*-*-*]
2057 ||
[istarget ia64
-*-*]
2058 ||
(([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
2059 && ([check_effective_target_x32
]
2060 ||
[check_effective_target_lp64
]))
2061 ||
([istarget powerpc
*-*-*]
2062 && ([check_effective_target_powerpc_spe
]
2063 ||
[check_effective_target_powerpc_altivec
]))
2064 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
2065 ||
[istarget spu
-*-*]
2066 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
2067 ||
[istarget aarch64
*-*-*] } {
2068 set et_vect_cmdline_needed_saved
0
2072 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2073 return $et_vect_cmdline_needed_saved
2076 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
2078 # This won
't change for different subtargets so cache the result.
2080 proc check_effective_target_vect_int { } {
2081 global et_vect_int_saved
2083 if [info exists et_vect_int_saved] {
2084 verbose "check_effective_target_vect_int: using cached result" 2
2086 set et_vect_int_saved 0
2087 if { [istarget i?86-*-*]
2088 || ([istarget powerpc*-*-*]
2089 && ![istarget powerpc-*-linux*paired*])
2090 || [istarget spu-*-*]
2091 || [istarget x86_64-*-*]
2092 || [istarget sparc*-*-*]
2093 || [istarget alpha*-*-*]
2094 || [istarget ia64-*-*]
2095 || [istarget aarch64*-*-*]
2096 || [check_effective_target_arm32]
2097 || ([istarget mips*-*-*]
2098 && [check_effective_target_mips_loongson]) } {
2099 set et_vect_int_saved 1
2103 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2104 return $et_vect_int_saved
2107 # Return 1 if the target supports signed int->float conversion
2110 proc check_effective_target_vect_intfloat_cvt { } {
2111 global et_vect_intfloat_cvt_saved
2113 if [info exists et_vect_intfloat_cvt_saved] {
2114 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2116 set et_vect_intfloat_cvt_saved 0
2117 if { [istarget i?86-*-*]
2118 || ([istarget powerpc*-*-*]
2119 && ![istarget powerpc-*-linux*paired*])
2120 || [istarget x86_64-*-*]
2121 || ([istarget arm*-*-*]
2122 && [check_effective_target_arm_neon_ok])} {
2123 set et_vect_intfloat_cvt_saved 1
2127 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2128 return $et_vect_intfloat_cvt_saved
2131 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
2133 proc check_effective_target_int128
{ } {
2134 return [check_no_compiler_messages int128 object
{
2136 #ifndef __SIZEOF_INT128__
2145 #
Return 1 if the target supports unsigned
int->float conversion
2148 proc check_effective_target_vect_uintfloat_cvt
{ } {
2149 global et_vect_uintfloat_cvt_saved
2151 if [info exists et_vect_uintfloat_cvt_saved
] {
2152 verbose
"check_effective_target_vect_uintfloat_cvt: using cached result" 2
2154 set et_vect_uintfloat_cvt_saved
0
2155 if { [istarget i?
86-*-*]
2156 ||
([istarget powerpc
*-*-*]
2157 && ![istarget powerpc
-*-linux
*paired
*])
2158 ||
[istarget x86_64
-*-*]
2159 ||
[istarget aarch64
*-*-*]
2160 ||
([istarget arm
*-*-*]
2161 && [check_effective_target_arm_neon_ok
])} {
2162 set et_vect_uintfloat_cvt_saved
1
2166 verbose
"check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2167 return $et_vect_uintfloat_cvt_saved
2171 #
Return 1 if the target supports signed float
->int conversion
2174 proc check_effective_target_vect_floatint_cvt
{ } {
2175 global et_vect_floatint_cvt_saved
2177 if [info exists et_vect_floatint_cvt_saved
] {
2178 verbose
"check_effective_target_vect_floatint_cvt: using cached result" 2
2180 set et_vect_floatint_cvt_saved
0
2181 if { [istarget i?
86-*-*]
2182 ||
([istarget powerpc
*-*-*]
2183 && ![istarget powerpc
-*-linux
*paired
*])
2184 ||
[istarget x86_64
-*-*]
2185 ||
([istarget arm
*-*-*]
2186 && [check_effective_target_arm_neon_ok
])} {
2187 set et_vect_floatint_cvt_saved
1
2191 verbose
"check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2192 return $et_vect_floatint_cvt_saved
2195 #
Return 1 if the target supports unsigned float
->int conversion
2198 proc check_effective_target_vect_floatuint_cvt
{ } {
2199 global et_vect_floatuint_cvt_saved
2201 if [info exists et_vect_floatuint_cvt_saved
] {
2202 verbose
"check_effective_target_vect_floatuint_cvt: using cached result" 2
2204 set et_vect_floatuint_cvt_saved
0
2205 if { ([istarget powerpc
*-*-*]
2206 && ![istarget powerpc
-*-linux
*paired
*])
2207 ||
([istarget arm
*-*-*]
2208 && [check_effective_target_arm_neon_ok
])} {
2209 set et_vect_floatuint_cvt_saved
1
2213 verbose
"check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2214 return $et_vect_floatuint_cvt_saved
2217 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
2219 # This won
't change for different subtargets so cache the result.
2221 proc check_effective_target_vect_simd_clones { } {
2222 global et_vect_simd_clones_saved
2224 if [info exists et_vect_simd_clones_saved] {
2225 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2227 set et_vect_simd_clones_saved 0
2228 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2229 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2230 # avx2 clone. Only the right clone for the specified arch will be
2231 # chosen, but still we need to at least be able to assemble
2233 if { [check_effective_target_avx2] } {
2234 set et_vect_simd_clones_saved 1
2239 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2240 return $et_vect_simd_clones_saved
2243 # Return 1 if this is a AArch64 target supporting big endian
2244 proc check_effective_target_aarch64_big_endian { } {
2245 return [check_no_compiler_messages aarch64_big_endian assembly {
2246 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2252 # Return 1 if this is a AArch64 target supporting little endian
2253 proc check_effective_target_aarch64_little_endian { } {
2254 return [check_no_compiler_messages aarch64_little_endian assembly {
2255 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2261 # Return 1 if this is an arm target using 32-bit instructions
2262 proc check_effective_target_arm32 { } {
2263 return [check_no_compiler_messages arm32 assembly {
2264 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2270 # Return 1 if this is an arm target not using Thumb
2271 proc check_effective_target_arm_nothumb { } {
2272 return [check_no_compiler_messages arm_nothumb assembly {
2273 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2279 # Return 1 if this is a little-endian ARM target
2280 proc check_effective_target_arm_little_endian { } {
2281 return [check_no_compiler_messages arm_little_endian assembly {
2282 #if !defined(__arm__) || !defined(__ARMEL__)
2288 # Return 1 if this is an ARM target that only supports aligned vector accesses
2289 proc check_effective_target_arm_vect_no_misalign { } {
2290 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2291 #if !defined(__arm__) \
2292 || (defined(__ARM_FEATURE_UNALIGNED) \
2293 && defined(__ARMEL__))
2300 # Return 1 if this is an ARM target supporting -mfpu=vfp
2301 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2304 proc check_effective_target_arm_vfp_ok { } {
2305 if { [check_effective_target_arm32] } {
2306 return [check_no_compiler_messages arm_vfp_ok object {
2308 } "-mfpu=vfp -mfloat-abi=softfp"]
2314 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2315 # -mfloat-abi=softfp.
2317 proc check_effective_target_arm_vfp3_ok { } {
2318 if { [check_effective_target_arm32] } {
2319 return [check_no_compiler_messages arm_vfp3_ok object {
2321 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2327 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2328 # -mfloat-abi=softfp.
2329 proc check_effective_target_arm_v8_vfp_ok {} {
2330 if { [check_effective_target_arm32] } {
2331 return [check_no_compiler_messages arm_v8_vfp_ok object {
2334 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2337 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2343 # Return 1 if this is an ARM target supporting -mfpu=vfp
2344 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2347 proc check_effective_target_arm_hard_vfp_ok { } {
2348 if { [check_effective_target_arm32]
2349 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2350 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2351 int main() { return 0;}
2352 } "-mfpu=vfp -mfloat-abi=hard"]
2358 # Return 1 if this is an ARM target that supports DSP multiply with
2359 # current multilib flags.
2361 proc check_effective_target_arm_dsp { } {
2362 return [check_no_compiler_messages arm_dsp assembly {
2363 #ifndef __ARM_FEATURE_DSP
2370 # Return 1 if this is an ARM target that supports unaligned word/halfword
2371 # load/store instructions.
2373 proc check_effective_target_arm_unaligned { } {
2374 return [check_no_compiler_messages arm_unaligned assembly {
2375 #ifndef __ARM_FEATURE_UNALIGNED
2376 #error no unaligned support
2382 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2383 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2384 # incompatible with these options. Also set et_arm_crypto_flags to the
2385 # best options to add.
2387 proc check_effective_target_arm_crypto_ok_nocache { } {
2388 global et_arm_crypto_flags
2389 set et_arm_crypto_flags ""
2390 if { [check_effective_target_arm32] } {
2391 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2392 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2393 #include "arm_neon.h"
2395 foo (uint8x16_t a, uint8x16_t b)
2397 return vaeseq_u8 (a, b);
2400 set et_arm_crypto_flags $flags
2409 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2411 proc check_effective_target_arm_crypto_ok { } {
2412 return [check_cached_effective_target arm_crypto_ok \
2413 check_effective_target_arm_crypto_ok_nocache]
2416 # Add options for crypto extensions.
2417 proc add_options_for_arm_crypto { flags } {
2418 if { ! [check_effective_target_arm_crypto_ok] } {
2421 global et_arm_crypto_flags
2422 return "$flags $et_arm_crypto_flags"
2425 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2426 # or -mfloat-abi=hard, but if one is already specified by the
2427 # multilib, use it. Similarly, if a -mfpu option already enables
2428 # NEON, do not add -mfpu=neon.
2430 proc add_options_for_arm_neon { flags } {
2431 if { ! [check_effective_target_arm_neon_ok] } {
2434 global et_arm_neon_flags
2435 return "$flags $et_arm_neon_flags"
2438 proc add_options_for_arm_v8_vfp { flags } {
2439 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2442 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2445 proc add_options_for_arm_v8_neon { flags } {
2446 if { ! [check_effective_target_arm_v8_neon_ok] } {
2449 global et_arm_v8_neon_flags
2450 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2453 proc add_options_for_arm_crc { flags } {
2454 if { ! [check_effective_target_arm_crc_ok] } {
2457 global et_arm_crc_flags
2458 return "$flags $et_arm_crc_flags"
2461 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2462 # or -mfloat-abi=hard, but if one is already specified by the
2463 # multilib, use it. Similarly, if a -mfpu option already enables
2464 # NEON, do not add -mfpu=neon.
2466 proc add_options_for_arm_neonv2 { flags } {
2467 if { ! [check_effective_target_arm_neonv2_ok] } {
2470 global et_arm_neonv2_flags
2471 return "$flags $et_arm_neonv2_flags"
2474 # Add the options needed for vfp3.
2475 proc add_options_for_arm_vfp3 { flags } {
2476 if { ! [check_effective_target_arm_vfp3_ok] } {
2479 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2482 # Return 1 if this is an ARM target supporting -mfpu=neon
2483 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2484 # incompatible with these options. Also set et_arm_neon_flags to the
2485 # best options to add.
2487 proc check_effective_target_arm_neon_ok_nocache { } {
2488 global et_arm_neon_flags
2489 set et_arm_neon_flags ""
2490 if { [check_effective_target_arm32] } {
2491 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2492 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2493 #include "arm_neon.h"
2496 set et_arm_neon_flags $flags
2505 proc check_effective_target_arm_neon_ok { } {
2506 return [check_cached_effective_target arm_neon_ok \
2507 check_effective_target_arm_neon_ok_nocache]
2510 proc check_effective_target_arm_crc_ok_nocache { } {
2511 global et_arm_crc_flags
2512 set et_arm_crc_flags "-march=armv8-a+crc"
2513 return [check_no_compiler_messages_nocache arm_crc_ok object {
2514 #if !defined (__ARM_FEATURE_CRC32)
2517 } "$et_arm_crc_flags"]
2520 proc check_effective_target_arm_crc_ok { } {
2521 return [check_cached_effective_target arm_crc_ok \
2522 check_effective_target_arm_crc_ok_nocache]
2525 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2526 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2527 # incompatible with these options. Also set et_arm_neon_flags to the
2528 # best options to add.
2530 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2531 global et_arm_neon_fp16_flags
2532 set et_arm_neon_fp16_flags ""
2533 if { [check_effective_target_arm32] } {
2534 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2535 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2536 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2537 #include "arm_neon.h"
2539 foo (float32x4_t arg)
2541 return vcvt_f16_f32 (arg);
2544 set et_arm_neon_fp16_flags $flags
2553 proc check_effective_target_arm_neon_fp16_ok { } {
2554 return [check_cached_effective_target arm_neon_fp16_ok \
2555 check_effective_target_arm_neon_fp16_ok_nocache]
2558 proc add_options_for_arm_neon_fp16 { flags } {
2559 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2562 global et_arm_neon_fp16_flags
2563 return "$flags $et_arm_neon_fp16_flags"
2566 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2567 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2568 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2569 # best options to add.
2571 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2572 global et_arm_v8_neon_flags
2573 set et_arm_v8_neon_flags ""
2574 if { [check_effective_target_arm32] } {
2575 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2576 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2578 #error not armv8 or later
2580 #include "arm_neon.h"
2584 __asm__ volatile ("vrintn.f32 q0, q0");
2586 } "$flags -march=armv8-a"] } {
2587 set et_arm_v8_neon_flags $flags
2596 proc check_effective_target_arm_v8_neon_ok { } {
2597 return [check_cached_effective_target arm_v8_neon_ok \
2598 check_effective_target_arm_v8_neon_ok_nocache]
2601 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2602 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2603 # incompatible with these options. Also set et_arm_neonv2_flags to the
2604 # best options to add.
2606 proc check_effective_target_arm_neonv2_ok_nocache { } {
2607 global et_arm_neonv2_flags
2608 set et_arm_neonv2_flags ""
2609 if { [check_effective_target_arm32] } {
2610 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2611 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2612 #include "arm_neon.h"
2614 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2616 return vfma_f32 (a, b, c);
2619 set et_arm_neonv2_flags $flags
2628 proc check_effective_target_arm_neonv2_ok { } {
2629 return [check_cached_effective_target arm_neonv2_ok \
2630 check_effective_target_arm_neonv2_ok_nocache]
2633 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2634 # or -mfloat-abi=hard, but if one is already specified by the
2637 proc add_options_for_arm_fp16 { flags } {
2638 if { ! [check_effective_target_arm_fp16_ok] } {
2641 global et_arm_fp16_flags
2642 return "$flags $et_arm_fp16_flags"
2645 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2646 # Skip multilibs that are incompatible with these options and set
2647 # et_arm_fp16_flags to the best options to add.
2649 proc check_effective_target_arm_fp16_ok_nocache { } {
2650 global et_arm_fp16_flags
2651 set et_arm_fp16_flags ""
2652 if { ! [check_effective_target_arm32] } {
2655 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2656 # Multilib flags would override -mfpu.
2659 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2660 # Must generate floating-point instructions.
2663 if [check_effective_target_arm_hf_eabi] {
2664 # Use existing float-abi and force an fpu which supports fp16
2665 set et_arm_fp16_flags "-mfpu=vfpv4"
2668 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2669 # The existing -mfpu value is OK; use it, but add softfp.
2670 set et_arm_fp16_flags "-mfloat-abi=softfp"
2673 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2674 # macro to check for this support.
2675 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2676 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2679 set et_arm_fp16_flags "$flags"
2686 proc check_effective_target_arm_fp16_ok { } {
2687 return [check_cached_effective_target arm_fp16_ok \
2688 check_effective_target_arm_fp16_ok_nocache]
2691 # Creates a series of routines that return 1 if the given architecture
2692 # can be selected and a routine to give the flags to select that architecture
2693 # Note: Extra flags may be added to disable options from newer compilers
2694 # (Thumb in particular - but others may be added in the future)
2695 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2696 # /* { dg-add-options arm_arch_v5 } */
2697 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2698 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2699 v4t "-march=armv4t" __ARM_ARCH_4T__
2700 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2701 v5t "-march=armv5t" __ARM_ARCH_5T__
2702 v5te "-march=armv5te" __ARM_ARCH_5TE__
2703 v6 "-march=armv6" __ARM_ARCH_6__
2704 v6k "-march=armv6k" __ARM_ARCH_6K__
2705 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2706 v6z "-march=armv6z" __ARM_ARCH_6Z__
2707 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2708 v7a "-march=armv7-a" __ARM_ARCH_7A__
2709 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2710 v7r "-march=armv7-r" __ARM_ARCH_7R__
2711 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2712 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2713 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2714 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2715 proc check_effective_target_arm_arch_FUNC_ok { } {
2716 if { [ string match "*-marm*" "FLAG" ] &&
2717 ![check_effective_target_arm_arm_ok] } {
2720 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2727 proc add_options_for_arm_arch_FUNC { flags } {
2728 return "$flags FLAG"
2731 proc check_effective_target_arm_arch_FUNC_multilib { } {
2732 return [check_runtime arm_arch_FUNC_multilib {
2738 } [add_options_for_arm_arch_FUNC ""]]
2743 # Return 1 if this is an ARM target where -marm causes ARM to be
2746 proc check_effective_target_arm_arm_ok { } {
2747 return [check_no_compiler_messages arm_arm_ok assembly {
2748 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2755 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2758 proc check_effective_target_arm_thumb1_ok { } {
2759 return [check_no_compiler_messages arm_thumb1_ok assembly {
2760 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2763 int foo (int i) { return i; }
2767 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2770 proc check_effective_target_arm_thumb2_ok { } {
2771 return [check_no_compiler_messages arm_thumb2_ok assembly {
2772 #if !defined(__thumb2__)
2775 int foo (int i) { return i; }
2779 # Return 1 if this is an ARM target where Thumb-1 is used without options
2780 # added by the test.
2782 proc check_effective_target_arm_thumb1 { } {
2783 return [check_no_compiler_messages arm_thumb1 assembly {
2784 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2791 # Return 1 if this is an ARM target where Thumb-2 is used without options
2792 # added by the test.
2794 proc check_effective_target_arm_thumb2 { } {
2795 return [check_no_compiler_messages arm_thumb2 assembly {
2796 #if !defined(__thumb2__)
2803 # Return 1 if this is an ARM target where conditional execution is available.
2805 proc check_effective_target_arm_cond_exec { } {
2806 return [check_no_compiler_messages arm_cond_exec assembly {
2807 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2814 # Return 1 if this is an ARM cortex-M profile cpu
2816 proc check_effective_target_arm_cortex_m { } {
2817 if { ![istarget arm*-*-*] } {
2820 return [check_no_compiler_messages arm_cortex_m assembly {
2821 #if !defined(__ARM_ARCH_7M__) \
2822 && !defined (__ARM_ARCH_7EM__) \
2823 && !defined (__ARM_ARCH_6M__)
2830 # Return 1 if the target supports executing NEON instructions, 0
2831 # otherwise. Cache the result.
2833 proc check_effective_target_arm_neon_hw { } {
2834 return [check_runtime arm_neon_hw_available {
2838 long long a = 0, b = 1;
2839 asm ("vorr %P0, %P1, %P2"
2841 : "0" (a), "w" (b));
2844 } [add_options_for_arm_neon ""]]
2847 proc check_effective_target_arm_neonv2_hw { } {
2848 return [check_runtime arm_neon_hwv2_available {
2849 #include "arm_neon.h"
2853 float32x2_t a, b, c;
2854 asm ("vfma.f32 %P0, %P1, %P2"
2856 : "w" (b), "w" (c));
2859 } [add_options_for_arm_neonv2 ""]]
2862 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2865 proc check_effective_target_arm_v8_neon_hw { } {
2866 return [check_runtime arm_v8_neon_hw_available {
2867 #include "arm_neon.h"
2872 asm ("vrinta.f32 %P0, %P1"
2877 } [add_options_for_arm_v8_neon ""]]
2880 # Return 1 if this is a ARM target with NEON enabled.
2882 proc check_effective_target_arm_neon { } {
2883 if { [check_effective_target_arm32] } {
2884 return [check_no_compiler_messages arm_neon object {
2885 #ifndef __ARM_NEON__
2896 proc check_effective_target_arm_neonv2 { } {
2897 if { [check_effective_target_arm32] } {
2898 return [check_no_compiler_messages arm_neon object {
2899 #ifndef __ARM_NEON__
2902 #ifndef __ARM_FEATURE_FMA
2914 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2915 # the Loongson vector modes.
2917 proc check_effective_target_mips_loongson { } {
2918 return [check_no_compiler_messages loongson assembly {
2919 #if !defined(__mips_loongson_vector_rev)
2925 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
2928 proc check_effective_target_arm_eabi { } {
2929 return [check_no_compiler_messages arm_eabi object {
2930 #ifndef __ARM_EABI__
2938 # Return 1 if this is an ARM target that adheres to the hard-float variant of
2939 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
2941 proc check_effective_target_arm_hf_eabi { } {
2942 return [check_no_compiler_messages arm_hf_eabi object {
2943 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
2944 #error not hard-float EABI
2951 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2952 # Some multilibs may be incompatible with this option.
2954 proc check_effective_target_arm_iwmmxt_ok { } {
2955 if { [check_effective_target_arm32] } {
2956 return [check_no_compiler_messages arm_iwmmxt_ok object {
2964 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
2965 # for an ARM target.
2966 proc check_effective_target_arm_prefer_ldrd_strd { } {
2967 if { ![check_effective_target_arm32] } {
2971 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
2972 void foo (int *p) { p[0] = 1; p[1] = 0;}
2976 # Return 1 if this is a PowerPC target supporting -meabi.
2978 proc check_effective_target_powerpc_eabi_ok { } {
2979 if { [istarget powerpc*-*-*] } {
2980 return [check_no_compiler_messages powerpc_eabi_ok object {
2988 # Return 1 if this is a PowerPC target with floating-point registers.
2990 proc check_effective_target_powerpc_fprs { } {
2991 if { [istarget powerpc*-*-*]
2992 || [istarget rs6000-*-*] } {
2993 return [check_no_compiler_messages powerpc_fprs object {
3005 # Return 1 if this is a PowerPC target with hardware double-precision
3008 proc check_effective_target_powerpc_hard_double { } {
3009 if { [istarget powerpc*-*-*]
3010 || [istarget rs6000-*-*] } {
3011 return [check_no_compiler_messages powerpc_hard_double object {
3023 # Return 1 if this is a PowerPC target supporting -maltivec.
3025 proc check_effective_target_powerpc_altivec_ok { } {
3026 if { ([istarget powerpc*-*-*]
3027 && ![istarget powerpc-*-linux*paired*])
3028 || [istarget rs6000-*-*] } {
3029 # AltiVec is not supported on AIX before 5.3.
3030 if { [istarget powerpc*-*-aix4*]
3031 || [istarget powerpc*-*-aix5.1*]
3032 || [istarget powerpc*-*-aix5.2*] } {
3035 return [check_no_compiler_messages powerpc_altivec_ok object {
3043 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3045 proc check_effective_target_powerpc_p8vector_ok { } {
3046 if { ([istarget powerpc*-*-*]
3047 && ![istarget powerpc-*-linux*paired*])
3048 || [istarget rs6000-*-*] } {
3049 # AltiVec is not supported on AIX before 5.3.
3050 if { [istarget powerpc*-*-aix4*]
3051 || [istarget powerpc*-*-aix5.1*]
3052 || [istarget powerpc*-*-aix5.2*] } {
3055 return [check_no_compiler_messages powerpc_p8vector_ok object {
3058 asm volatile ("xxlorc vs0,vs0,vs0");
3060 asm volatile ("xxlorc 0,0,0");
3064 } "-mpower8-vector"]
3070 # Return 1 if this is a PowerPC target supporting -mvsx
3072 proc check_effective_target_powerpc_vsx_ok { } {
3073 if { ([istarget powerpc*-*-*]
3074 && ![istarget powerpc-*-linux*paired*])
3075 || [istarget rs6000-*-*] } {
3076 # VSX is not supported on AIX before 7.1.
3077 if { [istarget powerpc*-*-aix4*]
3078 || [istarget powerpc*-*-aix5*]
3079 || [istarget powerpc*-*-aix6*] } {
3082 return [check_no_compiler_messages powerpc_vsx_ok object {
3085 asm volatile ("xxlor vs0,vs0,vs0");
3087 asm volatile ("xxlor 0,0,0");
3097 # Return 1 if this is a PowerPC target supporting -mhtm
3099 proc check_effective_target_powerpc_htm_ok { } {
3100 if { ([istarget powerpc*-*-*]
3101 && ![istarget powerpc-*-linux*paired*])
3102 || [istarget rs6000-*-*] } {
3103 # HTM is not supported on AIX yet.
3104 if { [istarget powerpc*-*-aix*] } {
3107 return [check_no_compiler_messages powerpc_htm_ok object {
3109 asm volatile ("tbegin. 0");
3118 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3120 proc check_effective_target_powerpc_ppu_ok { } {
3121 if [check_effective_target_powerpc_altivec_ok] {
3122 return [check_no_compiler_messages cell_asm_available object {
3125 asm volatile ("lvlx v0,v0,v0");
3127 asm volatile ("lvlx 0,0,0");
3137 # Return 1 if this is a PowerPC target that supports SPU.
3139 proc check_effective_target_powerpc_spu { } {
3140 if { [istarget powerpc*-*-linux*] } {
3141 return [check_effective_target_powerpc_altivec_ok]
3147 # Return 1 if this is a PowerPC SPE target. The check includes options
3148 # specified by dg-options for this test, so don't
cache the result.
3150 proc check_effective_target_powerpc_spe_nocache
{ } {
3151 if { [istarget powerpc
*-*-*] } {
3152 return [check_no_compiler_messages_nocache powerpc_spe object
{
3158 } [current_compiler_flags
]]
3164 #
Return 1 if this is a PowerPC target with SPE enabled.
3166 proc check_effective_target_powerpc_spe
{ } {
3167 if { [istarget powerpc
*-*-*] } {
3168 return [check_no_compiler_messages powerpc_spe object
{
3180 #
Return 1 if this is a PowerPC target with Altivec enabled.
3182 proc check_effective_target_powerpc_altivec
{ } {
3183 if { [istarget powerpc
*-*-*] } {
3184 return [check_no_compiler_messages powerpc_altivec object
{
3196 #
Return 1 if this is a PowerPC
405 target. The check includes options
3197 # specified by dg
-options
for this test
, so don
't cache the result.
3199 proc check_effective_target_powerpc_405_nocache { } {
3200 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3201 return [check_no_compiler_messages_nocache powerpc_405 object {
3207 } [current_compiler_flags]]
3213 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3215 proc check_effective_target_powerpc_elfv2 { } {
3216 if { [istarget powerpc*-*-*] } {
3217 return [check_no_compiler_messages powerpc_elfv2 object {
3219 #error not ELF v2 ABI
3229 # Return 1 if this is a SPU target with a toolchain that
3230 # supports automatic overlay generation.
3232 proc check_effective_target_spu_auto_overlay { } {
3233 if { [istarget spu*-*-elf*] } {
3234 return [check_no_compiler_messages spu_auto_overlay executable {
3236 } "-Wl,--auto-overlay" ]
3242 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3243 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3244 # test environment appears to run executables on such a simulator.
3246 proc check_effective_target_ultrasparc_hw { } {
3247 return [check_runtime ultrasparc_hw {
3248 int main() { return 0; }
3249 } "-mcpu=ultrasparc"]
3252 # Return 1 if the test environment supports executing UltraSPARC VIS2
3253 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3255 proc check_effective_target_ultrasparc_vis2_hw { } {
3256 return [check_runtime ultrasparc_vis2_hw {
3257 int main() { __asm__(".word 0x81b00320"); return 0; }
3258 } "-mcpu=ultrasparc3"]
3261 # Return 1 if the test environment supports executing UltraSPARC VIS3
3262 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3264 proc check_effective_target_ultrasparc_vis3_hw { } {
3265 return [check_runtime ultrasparc_vis3_hw {
3266 int main() { __asm__(".word 0x81b00220"); return 0; }
3270 # Return 1 if this is a SPARC-V9 target.
3272 proc check_effective_target_sparc_v9 { } {
3273 if { [istarget sparc*-*-*] } {
3274 return [check_no_compiler_messages sparc_v9 object {
3276 asm volatile ("return %i7+8");
3285 # Return 1 if this is a SPARC target with VIS enabled.
3287 proc check_effective_target_sparc_vis { } {
3288 if { [istarget sparc*-*-*] } {
3289 return [check_no_compiler_messages sparc_vis object {
3301 # Return 1 if the target supports hardware vector shift operation.
3303 proc check_effective_target_vect_shift { } {
3304 global et_vect_shift_saved
3306 if [info exists et_vect_shift_saved] {
3307 verbose "check_effective_target_vect_shift: using cached result" 2
3309 set et_vect_shift_saved 0
3310 if { ([istarget powerpc*-*-*]
3311 && ![istarget powerpc-*-linux*paired*])
3312 || [istarget ia64-*-*]
3313 || [istarget i?86-*-*]
3314 || [istarget x86_64-*-*]
3315 || [istarget aarch64*-*-*]
3316 || [check_effective_target_arm32]
3317 || ([istarget mips*-*-*]
3318 && [check_effective_target_mips_loongson]) } {
3319 set et_vect_shift_saved 1
3323 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3324 return $et_vect_shift_saved
3327 proc check_effective_target_whole_vector_shift { } {
3328 if { [istarget x86_64-*-*]
3329 || [istarget ia64-*-*]
3330 || ([check_effective_target_arm32]
3331 && [check_effective_target_arm_little_endian])
3332 || ([istarget mips*-*-*]
3333 && [check_effective_target_mips_loongson]) } {
3339 verbose "check_effective_target_vect_long: returning $answer" 2
3343 # Return 1 if the target supports vector bswap operations.
3345 proc check_effective_target_vect_bswap { } {
3346 global et_vect_bswap_saved
3348 if [info exists et_vect_bswap_saved] {
3349 verbose "check_effective_target_vect_bswap: using cached result" 2
3351 set et_vect_bswap_saved 0
3352 if { [istarget aarch64*-*-*]
3353 || ([istarget arm*-*-*]
3354 && [check_effective_target_arm_neon])
3356 set et_vect_bswap_saved 1
3360 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3361 return $et_vect_bswap_saved
3364 # Return 1 if the target supports hardware vector shift operation for char.
3366 proc check_effective_target_vect_shift_char { } {
3367 global et_vect_shift_char_saved
3369 if [info exists et_vect_shift_char_saved] {
3370 verbose "check_effective_target_vect_shift_char: using cached result" 2
3372 set et_vect_shift_char_saved 0
3373 if { ([istarget powerpc*-*-*]
3374 && ![istarget powerpc-*-linux*paired*])
3375 || [check_effective_target_arm32] } {
3376 set et_vect_shift_char_saved 1
3380 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3381 return $et_vect_shift_char_saved
3384 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3386 # This can change for different subtargets so do not cache the result.
3388 proc check_effective_target_vect_long { } {
3389 if { [istarget i?86-*-*]
3390 || (([istarget powerpc*-*-*]
3391 && ![istarget powerpc-*-linux*paired*])
3392 && [check_effective_target_ilp32])
3393 || [istarget x86_64-*-*]
3394 || [check_effective_target_arm32]
3395 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3401 verbose "check_effective_target_vect_long: returning $answer" 2
3405 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3407 # This won't change
for different subtargets so
cache the result.
3409 proc check_effective_target_vect_float
{ } {
3410 global et_vect_float_saved
3412 if [info exists et_vect_float_saved
] {
3413 verbose
"check_effective_target_vect_float: using cached result" 2
3415 set et_vect_float_saved
0
3416 if { [istarget i?
86-*-*]
3417 ||
[istarget powerpc
*-*-*]
3418 ||
[istarget spu
-*-*]
3419 ||
[istarget mips
-sde
-elf
]
3420 ||
[istarget mipsisa64
*-*-*]
3421 ||
[istarget x86_64
-*-*]
3422 ||
[istarget ia64
-*-*]
3423 ||
[istarget aarch64
*-*-*]
3424 ||
[check_effective_target_arm32
] } {
3425 set et_vect_float_saved
1
3429 verbose
"check_effective_target_vect_float: returning $et_vect_float_saved" 2
3430 return $et_vect_float_saved
3433 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
3435 # This won
't change for different subtargets so cache the result.
3437 proc check_effective_target_vect_double { } {
3438 global et_vect_double_saved
3440 if [info exists et_vect_double_saved] {
3441 verbose "check_effective_target_vect_double: using cached result" 2
3443 set et_vect_double_saved 0
3444 if { [istarget i?86-*-*]
3445 || [istarget aarch64*-*-*]
3446 || [istarget x86_64-*-*] } {
3447 if { [check_no_compiler_messages vect_double assembly {
3448 #ifdef __tune_atom__
3449 # error No double vectorizer support.
3452 set et_vect_double_saved 1
3454 set et_vect_double_saved 0
3456 } elseif { [istarget spu-*-*] } {
3457 set et_vect_double_saved 1
3461 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3462 return $et_vect_double_saved
3465 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3467 # This won't change
for different subtargets so
cache the result.
3469 proc check_effective_target_vect_long_long
{ } {
3470 global et_vect_long_long_saved
3472 if [info exists et_vect_long_long_saved
] {
3473 verbose
"check_effective_target_vect_long_long: using cached result" 2
3475 set et_vect_long_long_saved
0
3476 if { [istarget i?
86-*-*]
3477 ||
[istarget x86_64
-*-*] } {
3478 set et_vect_long_long_saved
1
3482 verbose
"check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3483 return $et_vect_long_long_saved
3487 #
Return 1 if the target plus current options does not support a vector
3488 #
max instruction
on "int", 0 otherwise.
3490 # This won
't change for different subtargets so cache the result.
3492 proc check_effective_target_vect_no_int_max { } {
3493 global et_vect_no_int_max_saved
3495 if [info exists et_vect_no_int_max_saved] {
3496 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3498 set et_vect_no_int_max_saved 0
3499 if { [istarget sparc*-*-*]
3500 || [istarget spu-*-*]
3501 || [istarget alpha*-*-*]
3502 || ([istarget mips*-*-*]
3503 && [check_effective_target_mips_loongson]) } {
3504 set et_vect_no_int_max_saved 1
3507 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3508 return $et_vect_no_int_max_saved
3511 # Return 1 if the target plus current options does not support a vector
3512 # add instruction on "int", 0 otherwise.
3514 # This won't change
for different subtargets so
cache the result.
3516 proc check_effective_target_vect_no_int_add
{ } {
3517 global et_vect_no_int_add_saved
3519 if [info exists et_vect_no_int_add_saved
] {
3520 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
3522 set et_vect_no_int_add_saved
0
3523 # Alpha only supports vector add
on V8QI and V4HI.
3524 if { [istarget alpha
*-*-*] } {
3525 set et_vect_no_int_add_saved
1
3528 verbose
"check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3529 return $et_vect_no_int_add_saved
3532 #
Return 1 if the target plus current options does not support vector
3533 # bitwise instructions
, 0 otherwise.
3535 # This won
't change for different subtargets so cache the result.
3537 proc check_effective_target_vect_no_bitwise { } {
3538 global et_vect_no_bitwise_saved
3540 if [info exists et_vect_no_bitwise_saved] {
3541 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3543 set et_vect_no_bitwise_saved 0
3545 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3546 return $et_vect_no_bitwise_saved
3549 # Return 1 if the target plus current options supports vector permutation,
3552 # This won't change
for different subtargets so
cache the result.
3554 proc check_effective_target_vect_perm
{ } {
3557 if [info exists et_vect_perm_saved
] {
3558 verbose
"check_effective_target_vect_perm: using cached result" 2
3560 set et_vect_perm_saved
0
3561 if { [is
-effective
-target arm_neon_ok
]
3562 ||
[istarget aarch64
*-*-*]
3563 ||
[istarget powerpc
*-*-*]
3564 ||
[istarget spu
-*-*]
3565 ||
[istarget i?
86-*-*]
3566 ||
[istarget x86_64
-*-*]
3567 ||
([istarget mips
*-*-*]
3568 && [check_effective_target_mpaired_single
]) } {
3569 set et_vect_perm_saved
1
3572 verbose
"check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3573 return $et_vect_perm_saved
3576 #
Return 1 if the target plus current options supports vector permutation
3577 #
on byte
-sized elements
, 0 otherwise.
3579 # This won
't change for different subtargets so cache the result.
3581 proc check_effective_target_vect_perm_byte { } {
3582 global et_vect_perm_byte
3584 if [info exists et_vect_perm_byte_saved] {
3585 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3587 set et_vect_perm_byte_saved 0
3588 if { ([is-effective-target arm_neon_ok]
3589 && [is-effective-target arm_little_endian])
3590 || ([istarget aarch64*-*-*]
3591 && [is-effective-target aarch64_little_endian])
3592 || [istarget powerpc*-*-*]
3593 || [istarget spu-*-*] } {
3594 set et_vect_perm_byte_saved 1
3597 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3598 return $et_vect_perm_byte_saved
3601 # Return 1 if the target plus current options supports vector permutation
3602 # on short-sized elements, 0 otherwise.
3604 # This won't change
for different subtargets so
cache the result.
3606 proc check_effective_target_vect_perm_short
{ } {
3607 global et_vect_perm_short
3609 if [info exists et_vect_perm_short_saved
] {
3610 verbose
"check_effective_target_vect_perm_short: using cached result" 2
3612 set et_vect_perm_short_saved
0
3613 if { ([is
-effective
-target arm_neon_ok
]
3614 && [is
-effective
-target arm_little_endian
])
3615 ||
([istarget aarch64
*-*-*]
3616 && [is
-effective
-target aarch64_little_endian
])
3617 ||
[istarget powerpc
*-*-*]
3618 ||
[istarget spu
-*-*] } {
3619 set et_vect_perm_short_saved
1
3622 verbose
"check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3623 return $et_vect_perm_short_saved
3626 #
Return 1 if the target plus current options supports a vector
3627 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
3629 # This won
't change for different subtargets so cache the result.
3631 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3632 global et_vect_widen_sum_hi_to_si_pattern
3634 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3635 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3637 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3638 if { [istarget powerpc*-*-*]
3639 || [istarget ia64-*-*] } {
3640 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3643 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3644 return $et_vect_widen_sum_hi_to_si_pattern_saved
3647 # Return 1 if the target plus current options supports a vector
3648 # widening summation of *short* args into *int* result, 0 otherwise.
3649 # A target can also support this widening summation if it can support
3650 # promotion (unpacking) from shorts to ints.
3652 # This won't change
for different subtargets so
cache the result.
3654 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
3655 global et_vect_widen_sum_hi_to_si
3657 if [info exists et_vect_widen_sum_hi_to_si_saved
] {
3658 verbose
"check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3660 set et_vect_widen_sum_hi_to_si_saved
[check_effective_target_vect_unpack
]
3661 if { [istarget powerpc
*-*-*]
3662 ||
[istarget ia64
-*-*] } {
3663 set et_vect_widen_sum_hi_to_si_saved
1
3666 verbose
"check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3667 return $et_vect_widen_sum_hi_to_si_saved
3670 #
Return 1 if the target plus current options supports a vector
3671 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
3672 # A target can also support this widening summation
if it can support
3673 # promotion
(unpacking
) from chars to shorts.
3675 # This won
't change for different subtargets so cache the result.
3677 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3678 global et_vect_widen_sum_qi_to_hi
3680 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3681 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3683 set et_vect_widen_sum_qi_to_hi_saved 0
3684 if { [check_effective_target_vect_unpack]
3685 || [check_effective_target_arm_neon_ok]
3686 || [istarget ia64-*-*] } {
3687 set et_vect_widen_sum_qi_to_hi_saved 1
3690 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3691 return $et_vect_widen_sum_qi_to_hi_saved
3694 # Return 1 if the target plus current options supports a vector
3695 # widening summation of *char* args into *int* result, 0 otherwise.
3697 # This won't change
for different subtargets so
cache the result.
3699 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
3700 global et_vect_widen_sum_qi_to_si
3702 if [info exists et_vect_widen_sum_qi_to_si_saved
] {
3703 verbose
"check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3705 set et_vect_widen_sum_qi_to_si_saved
0
3706 if { [istarget powerpc
*-*-*] } {
3707 set et_vect_widen_sum_qi_to_si_saved
1
3710 verbose
"check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3711 return $et_vect_widen_sum_qi_to_si_saved
3714 #
Return 1 if the target plus current options supports a vector
3715 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3716 # A target can also support this widening multplication
if it can support
3717 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
3718 # multiplication of shorts
).
3720 # This won
't change for different subtargets so cache the result.
3723 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3724 global et_vect_widen_mult_qi_to_hi
3726 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3727 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3729 if { [check_effective_target_vect_unpack]
3730 && [check_effective_target_vect_short_mult] } {
3731 set et_vect_widen_mult_qi_to_hi_saved 1
3733 set et_vect_widen_mult_qi_to_hi_saved 0
3735 if { [istarget powerpc*-*-*]
3736 || [istarget aarch64*-*-*]
3737 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3738 set et_vect_widen_mult_qi_to_hi_saved 1
3741 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3742 return $et_vect_widen_mult_qi_to_hi_saved
3745 # Return 1 if the target plus current options supports a vector
3746 # widening multiplication of *short* args into *int* result, 0 otherwise.
3747 # A target can also support this widening multplication if it can support
3748 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3749 # multiplication of ints).
3751 # This won't change
for different subtargets so
cache the result.
3754 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
3755 global et_vect_widen_mult_hi_to_si
3757 if [info exists et_vect_widen_mult_hi_to_si_saved
] {
3758 verbose
"check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3760 if { [check_effective_target_vect_unpack
]
3761 && [check_effective_target_vect_int_mult
] } {
3762 set et_vect_widen_mult_hi_to_si_saved
1
3764 set et_vect_widen_mult_hi_to_si_saved
0
3766 if { [istarget powerpc
*-*-*]
3767 ||
[istarget spu
-*-*]
3768 ||
[istarget ia64
-*-*]
3769 ||
[istarget aarch64
*-*-*]
3770 ||
[istarget i?
86-*-*]
3771 ||
[istarget x86_64
-*-*]
3772 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3773 set et_vect_widen_mult_hi_to_si_saved
1
3776 verbose
"check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3777 return $et_vect_widen_mult_hi_to_si_saved
3780 #
Return 1 if the target plus current options supports a vector
3781 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
3783 # This won
't change for different subtargets so cache the result.
3785 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3786 global et_vect_widen_mult_qi_to_hi_pattern
3788 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3789 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3791 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3792 if { [istarget powerpc*-*-*]
3793 || ([istarget arm*-*-*]
3794 && [check_effective_target_arm_neon_ok]
3795 && [check_effective_target_arm_little_endian]) } {
3796 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3799 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3800 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3803 # Return 1 if the target plus current options supports a vector
3804 # widening multiplication of *short* args into *int* result, 0 otherwise.
3806 # This won't change
for different subtargets so
cache the result.
3808 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
3809 global et_vect_widen_mult_hi_to_si_pattern
3811 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
] {
3812 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3814 set et_vect_widen_mult_hi_to_si_pattern_saved
0
3815 if { [istarget powerpc
*-*-*]
3816 ||
[istarget spu
-*-*]
3817 ||
[istarget ia64
-*-*]
3818 ||
[istarget i?
86-*-*]
3819 ||
[istarget x86_64
-*-*]
3820 ||
([istarget arm
*-*-*]
3821 && [check_effective_target_arm_neon_ok
]
3822 && [check_effective_target_arm_little_endian
]) } {
3823 set et_vect_widen_mult_hi_to_si_pattern_saved
1
3826 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3827 return $et_vect_widen_mult_hi_to_si_pattern_saved
3830 #
Return 1 if the target plus current options supports a vector
3831 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
3833 # This won
't change for different subtargets so cache the result.
3835 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
3836 global et_vect_widen_mult_si_to_di_pattern
3838 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
3839 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3841 set et_vect_widen_mult_si_to_di_pattern_saved 0
3842 if {[istarget ia64-*-*]
3843 || [istarget i?86-*-*]
3844 || [istarget x86_64-*-*] } {
3845 set et_vect_widen_mult_si_to_di_pattern_saved 1
3848 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3849 return $et_vect_widen_mult_si_to_di_pattern_saved
3852 # Return 1 if the target plus current options supports a vector
3853 # widening shift, 0 otherwise.
3855 # This won't change
for different subtargets so
cache the result.
3857 proc check_effective_target_vect_widen_shift
{ } {
3858 global et_vect_widen_shift_saved
3860 if [info exists et_vect_shift_saved
] {
3861 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
3863 set et_vect_widen_shift_saved
0
3864 if { ([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
3865 set et_vect_widen_shift_saved
1
3868 verbose
"check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3869 return $et_vect_widen_shift_saved
3872 #
Return 1 if the target plus current options supports a vector
3873 # dot
-product of signed chars
, 0 otherwise.
3875 # This won
't change for different subtargets so cache the result.
3877 proc check_effective_target_vect_sdot_qi { } {
3878 global et_vect_sdot_qi
3880 if [info exists et_vect_sdot_qi_saved] {
3881 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3883 set et_vect_sdot_qi_saved 0
3884 if { [istarget ia64-*-*] } {
3885 set et_vect_udot_qi_saved 1
3888 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3889 return $et_vect_sdot_qi_saved
3892 # Return 1 if the target plus current options supports a vector
3893 # dot-product of unsigned chars, 0 otherwise.
3895 # This won't change
for different subtargets so
cache the result.
3897 proc check_effective_target_vect_udot_qi
{ } {
3898 global et_vect_udot_qi
3900 if [info exists et_vect_udot_qi_saved
] {
3901 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
3903 set et_vect_udot_qi_saved
0
3904 if { [istarget powerpc
*-*-*]
3905 ||
[istarget ia64
-*-*] } {
3906 set et_vect_udot_qi_saved
1
3909 verbose
"check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3910 return $et_vect_udot_qi_saved
3913 #
Return 1 if the target plus current options supports a vector
3914 # dot
-product of signed shorts
, 0 otherwise.
3916 # This won
't change for different subtargets so cache the result.
3918 proc check_effective_target_vect_sdot_hi { } {
3919 global et_vect_sdot_hi
3921 if [info exists et_vect_sdot_hi_saved] {
3922 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3924 set et_vect_sdot_hi_saved 0
3925 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3926 || [istarget ia64-*-*]
3927 || [istarget i?86-*-*]
3928 || [istarget x86_64-*-*] } {
3929 set et_vect_sdot_hi_saved 1
3932 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3933 return $et_vect_sdot_hi_saved
3936 # Return 1 if the target plus current options supports a vector
3937 # dot-product of unsigned shorts, 0 otherwise.
3939 # This won't change
for different subtargets so
cache the result.
3941 proc check_effective_target_vect_udot_hi
{ } {
3942 global et_vect_udot_hi
3944 if [info exists et_vect_udot_hi_saved
] {
3945 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
3947 set et_vect_udot_hi_saved
0
3948 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*]) } {
3949 set et_vect_udot_hi_saved
1
3952 verbose
"check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3953 return $et_vect_udot_hi_saved
3956 #
Return 1 if the target plus current options supports a vector
3957 # sad operation of unsigned chars
, 0 otherwise.
3959 # This won
't change for different subtargets so cache the result.
3961 proc check_effective_target_vect_usad_char { } {
3962 global et_vect_usad_char
3964 if [info exists et_vect_usad_char_saved] {
3965 verbose "check_effective_target_vect_usad_char: using cached result" 2
3967 set et_vect_usad_char_saved 0
3968 if { ([istarget i?86-*-*]
3969 || [istarget x86_64-*-*]) } {
3970 set et_vect_usad_char_saved 1
3973 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
3974 return $et_vect_usad_char_saved
3977 # Return 1 if the target plus current options supports a vector
3978 # demotion (packing) of shorts (to chars) and ints (to shorts)
3979 # using modulo arithmetic, 0 otherwise.
3981 # This won't change
for different subtargets so
cache the result.
3983 proc check_effective_target_vect_pack_trunc
{ } {
3984 global et_vect_pack_trunc
3986 if [info exists et_vect_pack_trunc_saved
] {
3987 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
3989 set et_vect_pack_trunc_saved
0
3990 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
3991 ||
[istarget i?
86-*-*]
3992 ||
[istarget x86_64
-*-*]
3993 ||
[istarget aarch64
*-*-*]
3994 ||
[istarget spu
-*-*]
3995 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
3996 && [check_effective_target_arm_little_endian
]) } {
3997 set et_vect_pack_trunc_saved
1
4000 verbose
"check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4001 return $et_vect_pack_trunc_saved
4004 #
Return 1 if the target plus current options supports a vector
4005 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
4007 # This won
't change for different subtargets so cache the result.
4009 proc check_effective_target_vect_unpack { } {
4010 global et_vect_unpack
4012 if [info exists et_vect_unpack_saved] {
4013 verbose "check_effective_target_vect_unpack: using cached result" 2
4015 set et_vect_unpack_saved 0
4016 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4017 || [istarget i?86-*-*]
4018 || [istarget x86_64-*-*]
4019 || [istarget spu-*-*]
4020 || [istarget ia64-*-*]
4021 || [istarget aarch64*-*-*]
4022 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4023 && [check_effective_target_arm_little_endian]) } {
4024 set et_vect_unpack_saved 1
4027 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4028 return $et_vect_unpack_saved
4031 # Return 1 if the target plus current options does not guarantee
4032 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4034 # This won't change
for different subtargets so
cache the result.
4036 proc check_effective_target_unaligned_stack
{ } {
4037 global et_unaligned_stack_saved
4039 if [info exists et_unaligned_stack_saved
] {
4040 verbose
"check_effective_target_unaligned_stack: using cached result" 2
4042 set et_unaligned_stack_saved
0
4044 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4045 return $et_unaligned_stack_saved
4048 #
Return 1 if the target plus current options does not support a vector
4049 # alignment mechanism
, 0 otherwise.
4051 # This won
't change for different subtargets so cache the result.
4053 proc check_effective_target_vect_no_align { } {
4054 global et_vect_no_align_saved
4056 if [info exists et_vect_no_align_saved] {
4057 verbose "check_effective_target_vect_no_align: using cached result" 2
4059 set et_vect_no_align_saved 0
4060 if { [istarget mipsisa64*-*-*]
4061 || [istarget mips-sde-elf]
4062 || [istarget sparc*-*-*]
4063 || [istarget ia64-*-*]
4064 || [check_effective_target_arm_vect_no_misalign]
4065 || ([istarget mips*-*-*]
4066 && [check_effective_target_mips_loongson]) } {
4067 set et_vect_no_align_saved 1
4070 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4071 return $et_vect_no_align_saved
4074 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4076 # This won't change
for different subtargets so
cache the result.
4078 proc check_effective_target_vect_hw_misalign
{ } {
4079 global et_vect_hw_misalign_saved
4081 if [info exists et_vect_hw_misalign_saved
] {
4082 verbose
"check_effective_target_vect_hw_misalign: using cached result" 2
4084 set et_vect_hw_misalign_saved
0
4085 if { ([istarget x86_64
-*-*]
4086 ||
[istarget aarch64
*-*-*]
4087 ||
[istarget i?
86-*-*]) } {
4088 set et_vect_hw_misalign_saved
1
4091 verbose
"check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4092 return $et_vect_hw_misalign_saved
4096 #
Return 1 if arrays are aligned to the vector alignment
4097 # boundary
, 0 otherwise.
4099 # This won
't change for different subtargets so cache the result.
4101 proc check_effective_target_vect_aligned_arrays { } {
4102 global et_vect_aligned_arrays
4104 if [info exists et_vect_aligned_arrays_saved] {
4105 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4107 set et_vect_aligned_arrays_saved 0
4108 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4109 if { ([is-effective-target lp64]
4110 && ( ![check_avx_available]
4111 || [check_prefer_avx128])) } {
4112 set et_vect_aligned_arrays_saved 1
4115 if [istarget spu-*-*] {
4116 set et_vect_aligned_arrays_saved 1
4119 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4120 return $et_vect_aligned_arrays_saved
4123 # Return 1 if types of size 32 bit or less are naturally aligned
4124 # (aligned to their type-size), 0 otherwise.
4126 # This won't change
for different subtargets so
cache the result.
4128 proc check_effective_target_natural_alignment_32
{ } {
4129 global et_natural_alignment_32
4131 if [info exists et_natural_alignment_32_saved
] {
4132 verbose
"check_effective_target_natural_alignment_32: using cached result" 2
4134 # FIXME
: 32bit powerpc
: guaranteed only
if MASK_ALIGN_NATURAL
/POWER.
4135 set et_natural_alignment_32_saved
1
4136 if { ([istarget
*-*-darwin
*] && [is
-effective
-target lp64
]) } {
4137 set et_natural_alignment_32_saved
0
4140 verbose
"check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4141 return $et_natural_alignment_32_saved
4144 #
Return 1 if types of size
64 bit or less are naturally aligned
(aligned to their
4145 # type
-size
), 0 otherwise.
4147 # This won
't change for different subtargets so cache the result.
4149 proc check_effective_target_natural_alignment_64 { } {
4150 global et_natural_alignment_64
4152 if [info exists et_natural_alignment_64_saved] {
4153 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4155 set et_natural_alignment_64_saved 0
4156 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4157 || [istarget spu-*-*] } {
4158 set et_natural_alignment_64_saved 1
4161 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4162 return $et_natural_alignment_64_saved
4165 # Return 1 if all vector types are naturally aligned (aligned to their
4166 # type-size), 0 otherwise.
4168 # This won't change
for different subtargets so
cache the result.
4170 proc check_effective_target_vect_natural_alignment
{ } {
4171 global et_vect_natural_alignment
4173 if [info exists et_vect_natural_alignment_saved
] {
4174 verbose
"check_effective_target_vect_natural_alignment: using cached result" 2
4176 set et_vect_natural_alignment_saved
1
4177 if { [check_effective_target_arm_eabi
] } {
4178 set et_vect_natural_alignment_saved
0
4181 verbose
"check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4182 return $et_vect_natural_alignment_saved
4185 #
Return 1 if vector alignment
(for types of size
32 bit or less
) is reachable
, 0 otherwise.
4187 # This won
't change for different subtargets so cache the result.
4189 proc check_effective_target_vector_alignment_reachable { } {
4190 global et_vector_alignment_reachable
4192 if [info exists et_vector_alignment_reachable_saved] {
4193 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4195 if { [check_effective_target_vect_aligned_arrays]
4196 || [check_effective_target_natural_alignment_32] } {
4197 set et_vector_alignment_reachable_saved 1
4199 set et_vector_alignment_reachable_saved 0
4202 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4203 return $et_vector_alignment_reachable_saved
4206 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4208 # This won't change
for different subtargets so
cache the result.
4210 proc check_effective_target_vector_alignment_reachable_for_64bit
{ } {
4211 global et_vector_alignment_reachable_for_64bit
4213 if [info exists et_vector_alignment_reachable_for_64bit_saved
] {
4214 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4216 if { [check_effective_target_vect_aligned_arrays
]
4217 ||
[check_effective_target_natural_alignment_64
] } {
4218 set et_vector_alignment_reachable_for_64bit_saved
1
4220 set et_vector_alignment_reachable_for_64bit_saved
0
4223 verbose
"check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4224 return $et_vector_alignment_reachable_for_64bit_saved
4227 #
Return 1 if the target only requires element alignment
for vector accesses
4229 proc check_effective_target_vect_element_align
{ } {
4230 global et_vect_element_align
4232 if [info exists et_vect_element_align
] {
4233 verbose
"check_effective_target_vect_element_align: using cached result" 2
4235 set et_vect_element_align
0
4236 if { ([istarget arm
*-*-*]
4237 && ![check_effective_target_arm_vect_no_misalign
])
4238 ||
[check_effective_target_vect_hw_misalign
] } {
4239 set et_vect_element_align
1
4243 verbose
"check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4244 return $et_vect_element_align
4247 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
4249 proc check_effective_target_vect_condition
{ } {
4250 global et_vect_cond_saved
4252 if [info exists et_vect_cond_saved
] {
4253 verbose
"check_effective_target_vect_cond: using cached result" 2
4255 set et_vect_cond_saved
0
4256 if { [istarget aarch64
*-*-*]
4257 ||
[istarget powerpc
*-*-*]
4258 ||
[istarget ia64
-*-*]
4259 ||
[istarget i?
86-*-*]
4260 ||
[istarget spu
-*-*]
4261 ||
[istarget x86_64
-*-*]
4262 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]) } {
4263 set et_vect_cond_saved
1
4267 verbose
"check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4268 return $et_vect_cond_saved
4271 #
Return 1 if the target supports vector conditional operations where
4272 # the comparison has different type from the lhs
, 0 otherwise.
4274 proc check_effective_target_vect_cond_mixed
{ } {
4275 global et_vect_cond_mixed_saved
4277 if [info exists et_vect_cond_mixed_saved
] {
4278 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
4280 set et_vect_cond_mixed_saved
0
4281 if { [istarget i?
86-*-*]
4282 ||
[istarget x86_64
-*-*]
4283 ||
[istarget powerpc
*-*-*] } {
4284 set et_vect_cond_mixed_saved
1
4288 verbose
"check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4289 return $et_vect_cond_mixed_saved
4292 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
4294 proc check_effective_target_vect_char_mult
{ } {
4295 global et_vect_char_mult_saved
4297 if [info exists et_vect_char_mult_saved
] {
4298 verbose
"check_effective_target_vect_char_mult: using cached result" 2
4300 set et_vect_char_mult_saved
0
4301 if { [istarget aarch64
*-*-*]
4302 ||
[istarget ia64
-*-*]
4303 ||
[istarget i?
86-*-*]
4304 ||
[istarget x86_64
-*-*]
4305 ||
[check_effective_target_arm32
] } {
4306 set et_vect_char_mult_saved
1
4310 verbose
"check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4311 return $et_vect_char_mult_saved
4314 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
4316 proc check_effective_target_vect_short_mult
{ } {
4317 global et_vect_short_mult_saved
4319 if [info exists et_vect_short_mult_saved
] {
4320 verbose
"check_effective_target_vect_short_mult: using cached result" 2
4322 set et_vect_short_mult_saved
0
4323 if { [istarget ia64
-*-*]
4324 ||
[istarget spu
-*-*]
4325 ||
[istarget i?
86-*-*]
4326 ||
[istarget x86_64
-*-*]
4327 ||
[istarget powerpc
*-*-*]
4328 ||
[istarget aarch64
*-*-*]
4329 ||
[check_effective_target_arm32
]
4330 ||
([istarget mips
*-*-*]
4331 && [check_effective_target_mips_loongson
]) } {
4332 set et_vect_short_mult_saved
1
4336 verbose
"check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4337 return $et_vect_short_mult_saved
4340 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
4342 proc check_effective_target_vect_int_mult
{ } {
4343 global et_vect_int_mult_saved
4345 if [info exists et_vect_int_mult_saved
] {
4346 verbose
"check_effective_target_vect_int_mult: using cached result" 2
4348 set et_vect_int_mult_saved
0
4349 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
4350 ||
[istarget spu
-*-*]
4351 ||
[istarget i?
86-*-*]
4352 ||
[istarget x86_64
-*-*]
4353 ||
[istarget ia64
-*-*]
4354 ||
[istarget aarch64
*-*-*]
4355 ||
[check_effective_target_arm32
] } {
4356 set et_vect_int_mult_saved
1
4360 verbose
"check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4361 return $et_vect_int_mult_saved
4364 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
4366 proc check_effective_target_vect_extract_even_odd
{ } {
4367 global et_vect_extract_even_odd_saved
4369 if [info exists et_vect_extract_even_odd_saved
] {
4370 verbose
"check_effective_target_vect_extract_even_odd: using cached result" 2
4372 set et_vect_extract_even_odd_saved
0
4373 if { [istarget aarch64
*-*-*]
4374 ||
[istarget powerpc
*-*-*]
4375 ||
[is
-effective
-target arm_neon_ok
]
4376 ||
[istarget i?
86-*-*]
4377 ||
[istarget x86_64
-*-*]
4378 ||
[istarget ia64
-*-*]
4379 ||
[istarget spu
-*-*]
4380 ||
([istarget mips
*-*-*]
4381 && [check_effective_target_mpaired_single
]) } {
4382 set et_vect_extract_even_odd_saved
1
4386 verbose
"check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4387 return $et_vect_extract_even_odd_saved
4390 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
4392 proc check_effective_target_vect_interleave
{ } {
4393 global et_vect_interleave_saved
4395 if [info exists et_vect_interleave_saved
] {
4396 verbose
"check_effective_target_vect_interleave: using cached result" 2
4398 set et_vect_interleave_saved
0
4399 if { [istarget aarch64
*-*-*]
4400 ||
[istarget powerpc
*-*-*]
4401 ||
[is
-effective
-target arm_neon_ok
]
4402 ||
[istarget i?
86-*-*]
4403 ||
[istarget x86_64
-*-*]
4404 ||
[istarget ia64
-*-*]
4405 ||
[istarget spu
-*-*]
4406 ||
([istarget mips
*-*-*]
4407 && [check_effective_target_mpaired_single
]) } {
4408 set et_vect_interleave_saved
1
4412 verbose
"check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4413 return $et_vect_interleave_saved
4416 foreach N
{2 3 4 8} {
4417 eval
[string map
[list N $N
] {
4418 #
Return 1 if the target supports
2-vector interleaving
4419 proc check_effective_target_vect_stridedN
{ } {
4420 global et_vect_stridedN_saved
4422 if [info exists et_vect_stridedN_saved
] {
4423 verbose
"check_effective_target_vect_stridedN: using cached result" 2
4425 set et_vect_stridedN_saved
0
4427 && [check_effective_target_vect_interleave
]
4428 && [check_effective_target_vect_extract_even_odd
] } {
4429 set et_vect_stridedN_saved
1
4431 if { ([istarget arm
*-*-*]
4432 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
4433 set et_vect_stridedN_saved
1
4437 verbose
"check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4438 return $et_vect_stridedN_saved
4443 #
Return 1 if the target supports multiple vector sizes
4445 proc check_effective_target_vect_multiple_sizes
{ } {
4446 global et_vect_multiple_sizes_saved
4448 set et_vect_multiple_sizes_saved
0
4449 if { ([istarget aarch64
*-*-*]
4450 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
])) } {
4451 set et_vect_multiple_sizes_saved
1
4453 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
4454 if { ([check_avx_available
] && ![check_prefer_avx128
]) } {
4455 set et_vect_multiple_sizes_saved
1
4459 verbose
"check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4460 return $et_vect_multiple_sizes_saved
4463 #
Return 1 if the target supports vectors of
64 bits.
4465 proc check_effective_target_vect64
{ } {
4466 global et_vect64_saved
4468 if [info exists et_vect64_saved
] {
4469 verbose
"check_effective_target_vect64: using cached result" 2
4471 set et_vect64_saved
0
4472 if { ([istarget arm
*-*-*]
4473 && [check_effective_target_arm_neon_ok
]
4474 && [check_effective_target_arm_little_endian
]) } {
4475 set et_vect64_saved
1
4479 verbose
"check_effective_target_vect64: returning $et_vect64_saved" 2
4480 return $et_vect64_saved
4483 #
Return 1 if the target supports vector copysignf calls.
4485 proc check_effective_target_vect_call_copysignf
{ } {
4486 global et_vect_call_copysignf_saved
4488 if [info exists et_vect_call_copysignf_saved
] {
4489 verbose
"check_effective_target_vect_call_copysignf: using cached result" 2
4491 set et_vect_call_copysignf_saved
0
4492 if { [istarget i?
86-*-*]
4493 ||
[istarget x86_64
-*-*]
4494 ||
[istarget powerpc
*-*-*] } {
4495 set et_vect_call_copysignf_saved
1
4499 verbose
"check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4500 return $et_vect_call_copysignf_saved
4503 #
Return 1 if the target supports vector sqrtf calls.
4505 proc check_effective_target_vect_call_sqrtf
{ } {
4506 global et_vect_call_sqrtf_saved
4508 if [info exists et_vect_call_sqrtf_saved
] {
4509 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
4511 set et_vect_call_sqrtf_saved
0
4512 if { [istarget aarch64
*-*-*]
4513 ||
[istarget i?
86-*-*]
4514 ||
[istarget x86_64
-*-*]
4515 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
]) } {
4516 set et_vect_call_sqrtf_saved
1
4520 verbose
"check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4521 return $et_vect_call_sqrtf_saved
4524 #
Return 1 if the target supports vector lrint calls.
4526 proc check_effective_target_vect_call_lrint
{ } {
4527 set et_vect_call_lrint
0
4528 if { ([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) && [check_effective_target_ilp32
] } {
4529 set et_vect_call_lrint
1
4532 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4533 return $et_vect_call_lrint
4536 #
Return 1 if the target supports vector btrunc calls.
4538 proc check_effective_target_vect_call_btrunc
{ } {
4539 global et_vect_call_btrunc_saved
4541 if [info exists et_vect_call_btrunc_saved
] {
4542 verbose
"check_effective_target_vect_call_btrunc: using cached result" 2
4544 set et_vect_call_btrunc_saved
0
4545 if { [istarget aarch64
*-*-*] } {
4546 set et_vect_call_btrunc_saved
1
4550 verbose
"check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4551 return $et_vect_call_btrunc_saved
4554 #
Return 1 if the target supports vector btruncf calls.
4556 proc check_effective_target_vect_call_btruncf
{ } {
4557 global et_vect_call_btruncf_saved
4559 if [info exists et_vect_call_btruncf_saved
] {
4560 verbose
"check_effective_target_vect_call_btruncf: using cached result" 2
4562 set et_vect_call_btruncf_saved
0
4563 if { [istarget aarch64
*-*-*] } {
4564 set et_vect_call_btruncf_saved
1
4568 verbose
"check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4569 return $et_vect_call_btruncf_saved
4572 #
Return 1 if the target supports vector ceil calls.
4574 proc check_effective_target_vect_call_ceil
{ } {
4575 global et_vect_call_ceil_saved
4577 if [info exists et_vect_call_ceil_saved
] {
4578 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
4580 set et_vect_call_ceil_saved
0
4581 if { [istarget aarch64
*-*-*] } {
4582 set et_vect_call_ceil_saved
1
4586 verbose
"check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4587 return $et_vect_call_ceil_saved
4590 #
Return 1 if the target supports vector ceilf calls.
4592 proc check_effective_target_vect_call_ceilf
{ } {
4593 global et_vect_call_ceilf_saved
4595 if [info exists et_vect_call_ceilf_saved
] {
4596 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
4598 set et_vect_call_ceilf_saved
0
4599 if { [istarget aarch64
*-*-*] } {
4600 set et_vect_call_ceilf_saved
1
4604 verbose
"check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4605 return $et_vect_call_ceilf_saved
4608 #
Return 1 if the target supports vector floor calls.
4610 proc check_effective_target_vect_call_floor
{ } {
4611 global et_vect_call_floor_saved
4613 if [info exists et_vect_call_floor_saved
] {
4614 verbose
"check_effective_target_vect_call_floor: using cached result" 2
4616 set et_vect_call_floor_saved
0
4617 if { [istarget aarch64
*-*-*] } {
4618 set et_vect_call_floor_saved
1
4622 verbose
"check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4623 return $et_vect_call_floor_saved
4626 #
Return 1 if the target supports vector floorf calls.
4628 proc check_effective_target_vect_call_floorf
{ } {
4629 global et_vect_call_floorf_saved
4631 if [info exists et_vect_call_floorf_saved
] {
4632 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
4634 set et_vect_call_floorf_saved
0
4635 if { [istarget aarch64
*-*-*] } {
4636 set et_vect_call_floorf_saved
1
4640 verbose
"check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4641 return $et_vect_call_floorf_saved
4644 #
Return 1 if the target supports vector lceil calls.
4646 proc check_effective_target_vect_call_lceil
{ } {
4647 global et_vect_call_lceil_saved
4649 if [info exists et_vect_call_lceil_saved
] {
4650 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
4652 set et_vect_call_lceil_saved
0
4653 if { [istarget aarch64
*-*-*] } {
4654 set et_vect_call_lceil_saved
1
4658 verbose
"check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4659 return $et_vect_call_lceil_saved
4662 #
Return 1 if the target supports vector lfloor calls.
4664 proc check_effective_target_vect_call_lfloor
{ } {
4665 global et_vect_call_lfloor_saved
4667 if [info exists et_vect_call_lfloor_saved
] {
4668 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
4670 set et_vect_call_lfloor_saved
0
4671 if { [istarget aarch64
*-*-*] } {
4672 set et_vect_call_lfloor_saved
1
4676 verbose
"check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4677 return $et_vect_call_lfloor_saved
4680 #
Return 1 if the target supports vector nearbyint calls.
4682 proc check_effective_target_vect_call_nearbyint
{ } {
4683 global et_vect_call_nearbyint_saved
4685 if [info exists et_vect_call_nearbyint_saved
] {
4686 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
4688 set et_vect_call_nearbyint_saved
0
4689 if { [istarget aarch64
*-*-*] } {
4690 set et_vect_call_nearbyint_saved
1
4694 verbose
"check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4695 return $et_vect_call_nearbyint_saved
4698 #
Return 1 if the target supports vector nearbyintf calls.
4700 proc check_effective_target_vect_call_nearbyintf
{ } {
4701 global et_vect_call_nearbyintf_saved
4703 if [info exists et_vect_call_nearbyintf_saved
] {
4704 verbose
"check_effective_target_vect_call_nearbyintf: using cached result" 2
4706 set et_vect_call_nearbyintf_saved
0
4707 if { [istarget aarch64
*-*-*] } {
4708 set et_vect_call_nearbyintf_saved
1
4712 verbose
"check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4713 return $et_vect_call_nearbyintf_saved
4716 #
Return 1 if the target supports vector
round calls.
4718 proc check_effective_target_vect_call_round
{ } {
4719 global et_vect_call_round_saved
4721 if [info exists et_vect_call_round_saved
] {
4722 verbose
"check_effective_target_vect_call_round: using cached result" 2
4724 set et_vect_call_round_saved
0
4725 if { [istarget aarch64
*-*-*] } {
4726 set et_vect_call_round_saved
1
4730 verbose
"check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4731 return $et_vect_call_round_saved
4734 #
Return 1 if the target supports vector roundf calls.
4736 proc check_effective_target_vect_call_roundf
{ } {
4737 global et_vect_call_roundf_saved
4739 if [info exists et_vect_call_roundf_saved
] {
4740 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
4742 set et_vect_call_roundf_saved
0
4743 if { [istarget aarch64
*-*-*] } {
4744 set et_vect_call_roundf_saved
1
4748 verbose
"check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4749 return $et_vect_call_roundf_saved
4752 #
Return 1 if the target supports section
-anchors
4754 proc check_effective_target_section_anchors
{ } {
4755 global et_section_anchors_saved
4757 if [info exists et_section_anchors_saved
] {
4758 verbose
"check_effective_target_section_anchors: using cached result" 2
4760 set et_section_anchors_saved
0
4761 if { [istarget powerpc
*-*-*]
4762 ||
[istarget arm
*-*-*] } {
4763 set et_section_anchors_saved
1
4767 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4768 return $et_section_anchors_saved
4771 #
Return 1 if the target supports atomic operations
on "int_128" values.
4773 proc check_effective_target_sync_int_128
{ } {
4774 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4775 && ![is
-effective
-target ia32
] } {
4782 #
Return 1 if the target supports atomic operations
on "int_128" values
4783 # and can
execute them.
4785 proc check_effective_target_sync_int_128_runtime
{ } {
4786 if { ([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
4787 && ![is
-effective
-target ia32
] } {
4788 return [check_cached_effective_target sync_int_128_available
{
4789 check_runtime_nocache sync_int_128_available
{
4793 unsigned
int eax
, ebx
, ecx
, edx
;
4794 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4795 return !(ecx
& bit_CMPXCHG16B
);
4805 #
Return 1 if the target supports atomic operations
on "long long".
4807 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4809 proc check_effective_target_sync_long_long
{ } {
4810 if { [istarget x86_64
-*-*]
4811 ||
[istarget i?
86-*-*])
4812 ||
[istarget aarch64
*-*-*]
4813 ||
[istarget arm
*-*-*]
4814 ||
[istarget alpha
*-*-*]
4815 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
]) } {
4822 #
Return 1 if the target supports atomic operations
on "long long"
4823 # and can
execute them.
4825 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
4827 proc check_effective_target_sync_long_long_runtime
{ } {
4828 if { [istarget x86_64
-*-*]
4829 ||
[istarget i?
86-*-*] } {
4830 return [check_cached_effective_target sync_long_long_available
{
4831 check_runtime_nocache sync_long_long_available
{
4835 unsigned
int eax
, ebx
, ecx
, edx
;
4836 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
4837 return !(edx
& bit_CMPXCHG8B
);
4842 } elseif
{ [istarget aarch64
*-*-*] } {
4844 } elseif
{ [istarget arm
*-*-linux
-*] } {
4845 return [check_runtime sync_longlong_runtime
{
4851 if (sizeof
(long long
) != 8)
4854 /* Just check
for native
; checking
for kernel fallback is tricky.
*/
4855 asm volatile
("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4860 } elseif
{ [istarget alpha
*-*-*] } {
4862 } elseif
{ ([istarget sparc
*-*-*]
4863 && [check_effective_target_lp64
]
4864 && [check_effective_target_ultrasparc_hw
]) } {
4866 } elseif
{ [istarget powerpc
*-*-*] && [check_effective_target_lp64
] } {
4873 #
Return 1 if the target supports byte swap instructions.
4875 proc check_effective_target_bswap
{ } {
4876 global et_bswap_saved
4878 if [info exists et_bswap_saved
] {
4879 verbose
"check_effective_target_bswap: using cached result" 2
4881 set et_bswap_saved
0
4882 if { [istarget aarch64
-*-*]
4883 ||
[istarget alpha
*-*-*]
4884 ||
[istarget arm
*-*-*]
4885 ||
[istarget i?
86-*-*]
4886 ||
[istarget m68k
-*-*]
4887 ||
[istarget powerpc
*-*-*]
4888 ||
[istarget rs6000
-*-*]
4889 ||
[istarget s390
*-*-*]
4890 ||
[istarget x86_64
-*-*] } {
4891 set et_bswap_saved
1
4895 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
4896 return $et_bswap_saved
4899 #
Return 1 if the target supports
16-bit byte swap instructions.
4901 proc check_effective_target_bswap16
{ } {
4902 global et_bswap16_saved
4904 if [info exists et_bswap16_saved
] {
4905 verbose
"check_effective_target_bswap16: using cached result" 2
4907 set et_bswap16_saved
0
4908 if { [is
-effective
-target bswap
]
4909 && ![istarget alpha
*-*-*]
4910 && ![istarget i?
86-*-*]
4911 && ![istarget x86_64
-*-*] } {
4912 set et_bswap16_saved
1
4916 verbose
"check_effective_target_bswap16: returning $et_bswap16_saved" 2
4917 return $et_bswap16_saved
4920 #
Return 1 if the target supports
32-bit byte swap instructions.
4922 proc check_effective_target_bswap32
{ } {
4923 global et_bswap32_saved
4925 if [info exists et_bswap32_saved
] {
4926 verbose
"check_effective_target_bswap32: using cached result" 2
4928 set et_bswap32_saved
0
4929 if { [is
-effective
-target bswap
] } {
4930 set et_bswap32_saved
1
4934 verbose
"check_effective_target_bswap32: returning $et_bswap32_saved" 2
4935 return $et_bswap32_saved
4938 #
Return 1 if the target supports
64-bit byte swap instructions.
4940 proc check_effective_target_bswap64
{ } {
4941 global et_bswap64_saved
4943 if [info exists et_bswap64_saved
] {
4944 verbose
"check_effective_target_bswap64: using cached result" 2
4946 set et_bswap64_saved
0
4947 if { [is
-effective
-target bswap
]
4948 && [is
-effective
-target lp64
] } {
4949 set et_bswap64_saved
1
4953 verbose
"check_effective_target_bswap64: returning $et_bswap64_saved" 2
4954 return $et_bswap64_saved
4957 #
Return 1 if the target supports atomic operations
on "int" and "long".
4959 proc check_effective_target_sync_int_long
{ } {
4960 global et_sync_int_long_saved
4962 if [info exists et_sync_int_long_saved
] {
4963 verbose
"check_effective_target_sync_int_long: using cached result" 2
4965 set et_sync_int_long_saved
0
4966 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
4967 # load-reserved/store-conditional instructions.
4968 if { [istarget ia64-*-*]
4969 || [istarget i?86-*-*]
4970 || [istarget x86_64-*-*]
4971 || [istarget aarch64*-*-*]
4972 || [istarget alpha*-*-*]
4973 || [istarget arm*-*-linux-*]
4974 || [istarget bfin*-*linux*]
4975 || [istarget hppa*-*linux*]
4976 || [istarget s390*-*-*]
4977 || [istarget powerpc*-*-*]
4978 || [istarget crisv32-*-*] || [istarget cris-*-*]
4979 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4980 || [check_effective_target_mips_llsc] } {
4981 set et_sync_int_long_saved 1
4985 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
4986 return $et_sync_int_long_saved
4989 # Return 1 if the target supports atomic operations on "char" and "short".
4991 proc check_effective_target_sync_char_short { } {
4992 global et_sync_char_short_saved
4994 if [info exists et_sync_char_short_saved] {
4995 verbose "check_effective_target_sync_char_short: using cached result" 2
4997 set et_sync_char_short_saved 0
4998 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4999 #
load-reserved/store
-conditional instructions.
5000 if { [istarget aarch64
*-*-*]
5001 ||
[istarget ia64
-*-*]
5002 ||
[istarget i?
86-*-*]
5003 ||
[istarget x86_64
-*-*]
5004 ||
[istarget alpha
*-*-*]
5005 ||
[istarget arm
*-*-linux
-*]
5006 ||
[istarget hppa
*-*linux
*]
5007 ||
[istarget s390
*-*-*]
5008 ||
[istarget powerpc
*-*-*]
5009 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
5010 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
5011 ||
[check_effective_target_mips_llsc
] } {
5012 set et_sync_char_short_saved
1
5016 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5017 return $et_sync_char_short_saved
5020 #
Return 1 if the target uses a ColdFire FPU.
5022 proc check_effective_target_coldfire_fpu
{ } {
5023 return [check_no_compiler_messages coldfire_fpu assembly
{
5030 #
Return true
if this is a uClibc target.
5032 proc check_effective_target_uclibc
{} {
5033 return [check_no_compiler_messages uclibc object
{
5034 #
include <features.h
>
5035 #
if !defined
(__UCLIBC__
)
5041 #
Return true
if this is a uclibc target and
if the uclibc feature
5042 # described by __$feature__ is not present.
5044 proc check_missing_uclibc_feature
{feature
} {
5045 return [check_no_compiler_messages $feature object
"
5046 #
include <features.h
>
5047 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
5053 #
Return true
if this is a Newlib target.
5055 proc check_effective_target_newlib
{} {
5056 return [check_no_compiler_messages newlib object
{
5061 #
Return true
if this is NOT a Bionic target.
5063 proc check_effective_target_non_bionic
{} {
5064 return [check_no_compiler_messages non_bionic object
{
5066 #
if defined
(__BIONIC__
)
5073 #
(a
) an error of a few ULP is expected in string to floating
-point
5074 # conversion functions
; and
5075 #
(b
) overflow is not always detected correctly by those functions.
5077 proc check_effective_target_lax_strtofp
{} {
5078 # By default
, assume that all uClibc targets suffer from this.
5079 return [check_effective_target_uclibc
]
5082 #
Return 1 if this is a target
for which wcsftime is a dummy
5083 # function that always returns
0.
5085 proc check_effective_target_dummy_wcsftime
{} {
5086 # By default
, assume that all uClibc targets suffer from this.
5087 return [check_effective_target_uclibc
]
5090 #
Return 1 if constructors with initialization priority arguments are
5091 # supposed
on this target.
5093 proc check_effective_target_init_priority
{} {
5094 return [check_no_compiler_messages init_priority assembly
"
5095 void f
() __attribute__
((constructor
(1000)));
5100 #
Return 1 if the target matches the effective target
'arg', 0 otherwise.
5101 # This can be used with
any check_
* proc that takes no
argument and
5102 # returns only
1 or
0. It could be used with check_
* procs that take
5103 # arguments with keywords that pass particular arguments.
5105 proc is
-effective
-target
{ arg } {
5107 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5108 set selected
[check_effective_target_$
{arg}]
5111 "vmx_hw" { set selected [check_vmx_hw_available] }
5112 "vsx_hw" { set selected [check_vsx_hw_available] }
5113 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5114 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5115 "dfp_hw" { set selected [check_dfp_hw_available] }
5116 "named_sections" { set selected [check_named_sections_available] }
5117 "gc_sections" { set selected [check_gc_sections_available] }
5118 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5119 default
{ error
"unknown effective target keyword `$arg'" }
5122 verbose
"is-effective-target: $arg $selected" 2
5126 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
5128 proc is
-effective
-target
-keyword
{ arg } {
5129 if { [info procs check_effective_target_$
{arg}] != [list
] } {
5132 # These have different names
for their check_
* procs.
5134 "vmx_hw" { return 1 }
5135 "vsx_hw" { return 1 }
5136 "p8vector_hw" { return 1 }
5137 "ppc_recip_hw" { return 1 }
5138 "dfp_hw" { return 1 }
5139 "named_sections" { return 1 }
5140 "gc_sections" { return 1 }
5141 "cxa_atexit" { return 1 }
5142 default
{ return 0 }
5147 #
Return 1 if target default to short enums
5149 proc check_effective_target_short_enums
{ } {
5150 return [check_no_compiler_messages short_enums assembly
{
5152 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
5156 #
Return 1 if target supports merging string constants at link time.
5158 proc check_effective_target_string_merging
{ } {
5159 return [check_no_messages_and_pattern string_merging \
5160 "rodata\\.str" assembly {
5161 const char
*var
= "String";
5165 #
Return 1 if target has the basic signed and unsigned types in
5166 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
5167 # working
<stdint.h
> for all targets.
5169 proc check_effective_target_stdint_types
{ } {
5170 return [check_no_compiler_messages stdint_types assembly
{
5172 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
5173 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
5177 #
Return 1 if target has the basic signed and unsigned types in
5178 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
5179 # these types agree with those in the header, as some systems have
5180 # only <inttypes.h>.
5182 proc check_effective_target_inttypes_types { } {
5183 return [check_no_compiler_messages inttypes_types assembly {
5184 #include <inttypes.h>
5185 int8_t a; int16_t b; int32_t c; int64_t d;
5186 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5190 # Return 1 if programs are intended to be run on a simulator
5191 # (i.e. slowly) rather than hardware (i.e. fast).
5193 proc check_effective_target_simulator { } {
5195 # All "src/sim" simulators set this one.
5196 if [board_info target exists is_simulator] {
5197 return [board_info target is_simulator]
5200 # The "sid" simulators don't
set that one
, but at least they
set
5202 if [board_info target
exists slow_simulator
] {
5203 return [board_info target slow_simulator
]
5209 #
Return 1 if programs are intended to be run
on hardware rather than
5212 proc check_effective_target_hw
{ } {
5214 # All
"src/sim" simulators set this one.
5215 if [board_info target
exists is_simulator
] {
5216 if [board_info target is_simulator
] {
5223 # The
"sid" simulators don't set that one, but at least they set
5225 if [board_info target
exists slow_simulator
] {
5226 if [board_info target slow_simulator
] {
5236 #
Return 1 if the target is a VxWorks kernel.
5238 proc check_effective_target_vxworks_kernel
{ } {
5239 return [check_no_compiler_messages vxworks_kernel assembly
{
5240 #
if !defined __vxworks || defined __RTP__
5246 #
Return 1 if the target is a VxWorks RTP.
5248 proc check_effective_target_vxworks_rtp
{ } {
5249 return [check_no_compiler_messages vxworks_rtp assembly
{
5250 #
if !defined __vxworks ||
!defined __RTP__
5256 #
Return 1 if the target is expected to provide wide character support.
5258 proc check_effective_target_wchar
{ } {
5259 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
5262 return [check_no_compiler_messages wchar assembly
{
5267 #
Return 1 if the target has
<pthread.h
>.
5269 proc check_effective_target_pthread_h
{ } {
5270 return [check_no_compiler_messages pthread_h assembly
{
5271 #
include <pthread.h
>
5275 #
Return 1 if the target can truncate a file from a file
-descriptor
,
5276 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
5277 # chsize. We test
for a trivially functional truncation
; no stubs.
5278 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
5279 # different function to be used.
5281 proc check_effective_target_fd_truncate { } {
5283 #define _FILE_OFFSET_BITS 64
5289 FILE *f = fopen ("tst.tmp", "wb");
5291 const char t[] = "test writing more than ten characters";
5295 write (fd, t, sizeof (t) - 1);
5297 if (ftruncate (fd, 10) != 0)
5306 f = fopen ("tst.tmp", "rb");
5307 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5315 if { [check_runtime ftruncate $prog] } {
5319 regsub "ftruncate" $prog "chsize" prog
5320 return [check_runtime chsize $prog]
5323 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5325 proc add_options_for_c99_runtime { flags } {
5326 if { [istarget *-*-solaris2*] } {
5327 return "$flags -std=c99"
5329 if { [istarget powerpc-*-darwin*] } {
5330 return "$flags -mmacosx-version-min=10.3"
5335 # Add to FLAGS all the target-specific flags needed to enable
5336 # full IEEE compliance mode.
5338 proc add_options_for_ieee { flags } {
5339 if { [istarget alpha*-*-*]
5340 || [istarget sh*-*-*] } {
5341 return "$flags -mieee"
5343 if { [istarget rx-*-*] } {
5344 return "$flags -mnofpu"
5349 if {![info exists flags_to_postpone]} {
5350 set flags_to_postpone ""
5353 # Add to FLAGS the flags needed to enable functions to bind locally
5354 # when using pic/PIC passes in the testsuite.
5355 proc add_options_for_bind_pic_locally { flags } {
5356 global flags_to_postpone
5358 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
5359 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
5360 # order to make sure that the multilib_flags doesn't override this.
5362 if {[check_no_compiler_messages using_pic2 assembly
{
5367 set flags_to_postpone
"-fPIE"
5370 if {[check_no_compiler_messages using_pic1 assembly
{
5375 set flags_to_postpone
"-fpie"
5381 # Add to FLAGS the flags needed to enable
64-bit vectors.
5383 proc add_options_for_double_vectors
{ flags
} {
5384 if [is
-effective
-target arm_neon_ok
] {
5385 return "$flags -mvectorize-with-neon-double"
5391 #
Return 1 if the target provides a full C99 runtime.
5393 proc check_effective_target_c99_runtime
{ } {
5394 return [check_cached_effective_target c99_runtime
{
5397 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
5398 set contents
[read $file
]
5401 #ifndef HAVE_C99_RUNTIME
5405 check_no_compiler_messages_nocache c99_runtime assembly \
5406 $contents
[add_options_for_c99_runtime
""]
5410 #
Return 1 if target wchar_t is at least
4 bytes.
5412 proc check_effective_target_4byte_wchar_t
{ } {
5413 return [check_no_compiler_messages
4byte_wchar_t object
{
5414 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
5418 #
Return 1 if the target supports automatic stack alignment.
5420 proc check_effective_target_automatic_stack_alignment
{ } {
5421 # Ordinarily x86 supports automatic stack alignment ...
5422 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
5423 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
5424 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
5425 return [check_effective_target_ilp32];
5432 # Return true if we are compiling for AVX target.
5434 proc check_avx_available { } {
5435 if { [check_no_compiler_messages avx_available assembly {
5445 # Return true if 32- and 16-bytes vectors are available.
5447 proc check_effective_target_vect_sizes_32B_16B { } {
5448 if { [check_avx_available] && ![check_prefer_avx128] } {
5455 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5458 proc check_prefer_avx128 { } {
5459 if ![check_avx_available] {
5462 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5463 float a[1024],b[1024],c[1024];
5464 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5465 } "-O2 -ftree-vectorize"]
5469 # Return 1 if avx512f instructions can be compiled.
5471 proc check_effective_target_avx512f { } {
5472 return [check_no_compiler_messages avx512f object {
5473 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5475 __m512d _mm512_add (__m512d a)
5477 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5482 # Return 1 if avx instructions can be compiled.
5484 proc check_effective_target_avx { } {
5485 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5488 return [check_no_compiler_messages avx object {
5489 void _mm256_zeroall (void)
5491 __builtin_ia32_vzeroall ();
5496 # Return 1 if avx2 instructions can be compiled.
5497 proc check_effective_target_avx2 { } {
5498 return [check_no_compiler_messages avx2 object {
5499 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5501 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5503 return __builtin_ia32_andnotsi256 (__X, __Y);
5508 # Return 1 if sse instructions can be compiled.
5509 proc check_effective_target_sse { } {
5510 return [check_no_compiler_messages sse object {
5513 __builtin_ia32_stmxcsr ();
5519 # Return 1 if sse2 instructions can be compiled.
5520 proc check_effective_target_sse2 { } {
5521 return [check_no_compiler_messages sse2 object {
5522 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5524 __m128i _mm_srli_si128 (__m128i __A, int __N)
5526 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5531 # Return 1 if F16C instructions can be compiled.
5533 proc check_effective_target_f16c { } {
5534 return [check_no_compiler_messages f16c object {
5535 #include "immintrin.h"
5537 foo (unsigned short val)
5539 return _cvtsh_ss (val);
5544 # Return 1 if C wchar_t type is compatible with char16_t.
5546 proc check_effective_target_wchar_t_char16_t_compatible { } {
5547 return [check_no_compiler_messages wchar_t_char16_t object {
5549 __CHAR16_TYPE__ *p16 = &wc;
5550 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5554 # Return 1 if C wchar_t type is compatible with char32_t.
5556 proc check_effective_target_wchar_t_char32_t_compatible { } {
5557 return [check_no_compiler_messages wchar_t_char32_t object {
5559 __CHAR32_TYPE__ *p32 = &wc;
5560 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5564 # Return 1 if pow10 function exists.
5566 proc check_effective_target_pow10 { } {
5567 return [check_runtime pow10 {
5577 # Return 1 if current options generate DFP instructions, 0 otherwise.
5579 proc check_effective_target_hard_dfp {} {
5580 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5581 typedef float d64 __attribute__((mode(DD)));
5583 void foo (void) { z = x + y; }
5587 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5588 # for strchr etc. functions.
5590 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5591 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5594 #if !defined(__cplusplus) \
5595 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5596 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5597 ISO C++ correct string.h and wchar.h protos not supported.
5604 # Return 1 if GNU as is used.
5606 proc check_effective_target_gas { } {
5607 global use_gas_saved
5610 if {![info exists use_gas_saved]} {
5611 # Check if the as used by gcc is GNU as.
5612 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5613 # Provide /dev/null as input, otherwise gas times out reading from
5615 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5616 set as_output [lindex $status 1]
5617 if { [ string first "GNU" $as_output ] >= 0 } {
5623 return $use_gas_saved
5626 # Return 1 if GNU ld is used.
5628 proc check_effective_target_gld { } {
5629 global use_gld_saved
5632 if {![info exists use_gld_saved]} {
5633 # Check if the ld used by gcc is GNU ld.
5634 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5635 set status [remote_exec host "$gcc_ld" "--version"]
5636 set ld_output [lindex $status 1]
5637 if { [ string first "GNU" $ld_output ] >= 0 } {
5643 return $use_gld_saved
5646 # Return 1 if the compiler has been configure with link-time optimization
5649 proc check_effective_target_lto { } {
5651 return [info exists ENABLE_LTO]
5654 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5656 proc check_effective_target_maybe_x32 { } {
5657 return [check_no_compiler_messages maybe_x32 object {
5659 } "-mx32 -maddress-mode=short"]
5662 # Return 1 if this target supports the -fsplit-stack option, 0
5665 proc check_effective_target_split_stack {} {
5666 return [check_no_compiler_messages split_stack object {
5671 # Return 1 if this target supports the -masm=intel option, 0
5674 proc check_effective_target_masm_intel {} {
5675 return [check_no_compiler_messages masm_intel object {
5676 extern void abort (void);
5680 # Return 1 if the language for the compiler under test is C.
5682 proc check_effective_target_c { } {
5684 if [string match $tool "gcc"] {
5690 # Return 1 if the language for the compiler under test is C++.
5692 proc check_effective_target_c++ { } {
5694 if [string match $tool "g++"] {
5700 # Check whether the current active language standard supports the features
5701 # of C++11/C++14 by checking for the presence of one of the -std
5702 # flags. This assumes that the default for the compiler is C++98, and that
5703 # there will never be multiple -std= arguments on the command line.
5704 proc check_effective_target_c++11_only { } {
5705 if ![check_effective_target_c++] {
5708 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5710 proc check_effective_target_c++11 { } {
5711 if [check_effective_target_c++11_only] {
5714 return [check_effective_target_c++14]
5716 proc check_effective_target_c++11_down { } {
5717 if ![check_effective_target_c++] {
5720 return ![check_effective_target_c++14]
5723 proc check_effective_target_c++14_only { } {
5724 if ![check_effective_target_c++] {
5727 return [check-flags { { } { } { -std=c++1y -std=gnu++1y -std=c++14 -std=gnu++14 } }]
5730 proc check_effective_target_c++14 { } {
5731 if [check_effective_target_c++14_only] {
5734 return [check_effective_target_c++1z]
5736 proc check_effective_target_c++14_down { } {
5737 if ![check_effective_target_c++] {
5740 return ![check_effective_target_c++1z]
5743 proc check_effective_target_c++98_only { } {
5744 if ![check_effective_target_c++] {
5747 return ![check_effective_target_c++11]
5750 proc check_effective_target_c++1z_only { } {
5751 if ![check_effective_target_c++] {
5754 return [check-flags { { } { } { -std=c++1z -std=gnu++1z } }]
5756 proc check_effective_target_c++1z { } {
5757 return [check_effective_target_c++1z_only]
5760 # Return 1 if expensive testcases should be run.
5762 proc check_effective_target_run_expensive_tests { } {
5763 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5769 # Returns 1 if "mempcpy" is available on the target system.
5771 proc check_effective_target_mempcpy {} {
5772 return [check_function_available "mempcpy"]
5775 # Check whether the vectorizer tests are supported by the target and
5776 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5777 # Set dg-do-what-default to either compile or run, depending on target
5778 # capabilities. Return 1 if vectorizer tests are supported by
5779 # target, 0 otherwise.
5781 proc check_vect_support_and_set_flags { } {
5782 global DEFAULT_VECTCFLAGS
5783 global dg-do-what-default
5785 if [istarget powerpc-*paired*] {
5786 lappend DEFAULT_VECTCFLAGS "-mpaired"
5787 if [check_750cl_hw_available] {
5788 set dg-do-what-default run
5790 set dg-do-what-default compile
5792 } elseif [istarget powerpc*-*-*] {
5793 # Skip targets not supporting -maltivec.
5794 if ![is-effective-target powerpc_altivec_ok] {
5798 lappend DEFAULT_VECTCFLAGS "-maltivec"
5799 if [check_p8vector_hw_available] {
5800 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5801 } elseif [check_vsx_hw_available] {
5802 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5805 if [check_vmx_hw_available] {
5806 set dg-do-what-default run
5808 if [is-effective-target ilp32] {
5809 # Specify a cpu that supports VMX for compile-only tests.
5810 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5812 set dg-do-what-default compile
5814 } elseif { [istarget spu-*-*] } {
5815 set dg-do-what-default run
5816 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5817 lappend DEFAULT_VECTCFLAGS "-msse2"
5818 if { [check_effective_target_sse2_runtime] } {
5819 set dg-do-what-default run
5821 set dg-do-what-default compile
5823 } elseif { [istarget mips*-*-*]
5824 && ([check_effective_target_mpaired_single]
5825 || [check_effective_target_mips_loongson])
5826 && [check_effective_target_nomips16] } {
5827 if { [check_effective_target_mpaired_single] } {
5828 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5830 set dg-do-what-default run
5831 } elseif [istarget sparc*-*-*] {
5832 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5833 if [check_effective_target_ultrasparc_hw] {
5834 set dg-do-what-default run
5836 set dg-do-what-default compile
5838 } elseif [istarget alpha*-*-*] {
5839 # Alpha's vectorization capabilities are extremely limited.
5840 # It
's more effort than its worth disabling all of the tests
5841 # that it cannot pass. But if you actually want to see what
5842 # does work, command out the return.
5845 lappend DEFAULT_VECTCFLAGS "-mmax"
5846 if [check_alpha_max_hw_available] {
5847 set dg-do-what-default run
5849 set dg-do-what-default compile
5851 } elseif [istarget ia64-*-*] {
5852 set dg-do-what-default run
5853 } elseif [is-effective-target arm_neon_ok] {
5854 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5855 # NEON does not support denormals, so is not used for vectorization by
5856 # default to avoid loss of precision. We must pass -ffast-math to test
5857 # vectorization of float operations.
5858 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5859 if [is-effective-target arm_neon_hw] {
5860 set dg-do-what-default run
5862 set dg-do-what-default compile
5864 } elseif [istarget "aarch64*-*-*"] {
5865 set dg-do-what-default run
5873 # Return 1 if the target does *not* require strict alignment.
5875 proc check_effective_target_non_strict_align {} {
5876 return [check_no_compiler_messages non_strict_align assembly {
5878 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5880 void foo(void) { z = (c *) y; }
5884 # Return 1 if the target has <ucontext.h>.
5886 proc check_effective_target_ucontext_h { } {
5887 return [check_no_compiler_messages ucontext_h assembly {
5888 #include <ucontext.h>
5892 proc check_effective_target_aarch64_tiny { } {
5893 if { [istarget aarch64*-*-*] } {
5894 return [check_no_compiler_messages aarch64_tiny object {
5895 #ifdef __AARCH64_CMODEL_TINY__
5898 #error target not AArch64 tiny code model
5906 proc check_effective_target_aarch64_small { } {
5907 if { [istarget aarch64*-*-*] } {
5908 return [check_no_compiler_messages aarch64_small object {
5909 #ifdef __AARCH64_CMODEL_SMALL__
5912 #error target not AArch64 small code model
5920 proc check_effective_target_aarch64_large { } {
5921 if { [istarget aarch64*-*-*] } {
5922 return [check_no_compiler_messages aarch64_large object {
5923 #ifdef __AARCH64_CMODEL_LARGE__
5926 #error target not AArch64 large code model
5934 # Return 1 if <fenv.h> is available with all the standard IEEE
5935 # exceptions and floating-point exceptions are raised by arithmetic
5936 # operations. (If the target requires special options for "inexact"
5937 # exceptions, those need to be specified in the testcases.)
5939 proc check_effective_target_fenv_exceptions {} {
5940 return [check_runtime fenv_exceptions {
5943 #ifndef FE_DIVBYZERO
5944 # error Missing FE_DIVBYZERO
5947 # error Missing FE_INEXACT
5950 # error Missing FE_INVALID
5953 # error Missing FE_OVERFLOW
5955 #ifndef FE_UNDERFLOW
5956 # error Missing FE_UNDERFLOW
5958 volatile float a = 0.0f, r;
5963 if (fetestexcept (FE_INVALID))
5968 } [add_options_for_ieee "-std=gnu99"]]
5971 proc check_effective_target_tiny {} {
5972 if { [istarget aarch64*-*-*]
5973 && [check_effective_target_aarch64_tiny] } {
5979 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
5981 proc check_effective_target_logical_op_short_circuit {} {
5982 if { [istarget mips*-*-*]
5983 || [istarget arc*-*-*]
5984 || [istarget avr*-*-*]
5985 || [istarget crisv32-*-*] || [istarget cris-*-*]
5986 || [istarget mmix-*-*]
5987 || [istarget s390*-*-*]
5988 || [istarget powerpc*-*-*]
5989 || [istarget nios2*-*-*]
5990 || [check_effective_target_arm_cortex_m] } {
5996 # Record that dg-final test TEST requires convential compilation.
5998 proc force_conventional_output_for { test } {
5999 if { [info proc $test] == "" } {
6000 perror "$test does not exist"
6003 proc ${test}_required_options {} {
6004 global gcc_force_conventional_output
6005 return $gcc_force_conventional_output