gcc/config/ip2k/ip2k.h

   1 /* Definitions of target machine for GCC,
   2    For Ubicom IP2022 Communications Controller
   3
   4    Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
   5    Contributed by Red Hat, Inc and Ubicom, Inc.
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 GCC is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING.  If not, write to
  21 the Free Software Foundation, 59 Temple Place - Suite 330,
  22 Boston, MA 02111-1307, USA.  */
  23
  24 \f
  25 #undef ASM_SPEC /* We have a GAS assembler.  */
  26
  27 #define TARGET_CPU_CPP_BUILTINS()               \
  28   do                                            \
  29     {                                           \
  30       builtin_define_std ("IP2K");              \
  31       builtin_define ("_DOUBLE_IS_32BITS");     \
  32       builtin_define ("_BUFSIZ=512");           \
  33       builtin_define ("__FILENAME_MAX__=128");  \
  34     }                                           \
  35   while (0)
  36
  37 /* This declaration should be present.  */
  38 extern int target_flags;
  39
  40 #define TARGET_SWITCHES {{"",0, NULL}}
  41
  42 #define TARGET_VERSION fprintf (stderr, " (ip2k, GNU assembler syntax)")
  43
  44 /* Caller-saves is not a win for the IP2K.  Pretty much anywhere that
  45    a register is permitted allows SP-relative addresses too.
  46
  47    This machine doesn't have PIC addressing modes, so disable that also.  */
  48
  49 #define OVERRIDE_OPTIONS        \
  50     do {                        \
  51         flag_caller_saves = 0;  \
  52         flag_pic = 0;           \
  53     } while (0)
  54
  55 /* Put each function in its own section so that PAGE-instruction
  56    relaxation can do its best.  */
  57 #define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG)   \
  58     do {                                        \
  59         if ((LEVEL) || (SIZEFLAG))              \
  60             flag_function_sections = 1; \
  61     } while (0)
  62
  63 #define BITS_BIG_ENDIAN 0
  64 #define BYTES_BIG_ENDIAN 1
  65 #define WORDS_BIG_ENDIAN 1
  66 #define BITS_PER_WORD 8
  67 #define UNITS_PER_WORD (BITS_PER_WORD / BITS_PER_UNIT)
  68
  69 /* Width in bits of a pointer.
  70    See also the macro `Pmode' defined below.  */
  71 #define POINTER_SIZE 16
  72
  73 /* Maximum sized of reasonable data type DImode or Dfmode ...  */
  74 #define MAX_FIXED_MODE_SIZE 64
  75
  76 #define PARM_BOUNDARY 8
  77 #define FUNCTION_BOUNDARY 16
  78 #define EMPTY_FIELD_BOUNDARY 8
  79 #define BIGGEST_ALIGNMENT 8
  80
  81 #define STRICT_ALIGNMENT 0
  82
  83 #define PCC_BITFIELD_TYPE_MATTERS 1
  84
  85 #undef INT_TYPE_SIZE
  86 #define INT_TYPE_SIZE 16
  87
  88 #undef SHORT_TYPE_SIZE
  89 #define SHORT_TYPE_SIZE 16
  90
  91 #undef LONG_TYPE_SIZE
  92 #define LONG_TYPE_SIZE 32
  93
  94 #undef LONG_LONG_TYPE_SIZE
  95 #define LONG_LONG_TYPE_SIZE     64
  96
  97 #undef CHAR_TYPE_SIZE
  98 #define  CHAR_TYPE_SIZE 8
  99
 100 #undef FLOAT_TYPE_SIZE
 101 #define FLOAT_TYPE_SIZE 32
 102
 103 #undef DOUBLE_TYPE_SIZE
 104 #define DOUBLE_TYPE_SIZE 32
 105
 106 #undef LONG_DOUBLE_TYPE_SIZE
 107 #define LONG_DOUBLE_TYPE_SIZE   32
 108
 109 #define DEFAULT_SIGNED_CHAR 1
 110
 111 #define SIZE_TYPE "unsigned int"
 112
 113 #define PTRDIFF_TYPE "int"
 114
 115 #undef WCHAR_TYPE
 116 #define WCHAR_TYPE "int"
 117 #undef WCHAR_TYPE_SIZE
 118 #define WCHAR_TYPE_SIZE 16
 119
 120 #define HARD_REG_SIZE           (UNITS_PER_WORD)
 121 /* Standard register usage.
 122
 123    for the IP2K, we are going to have a LOT of registers, but only some of them
 124    are named.  */
 125
 126 #define FIRST_PSEUDO_REGISTER (0x104) /* Skip over physical regs, VFP, AP.  */
 127
 128 #define REG_IP          0x4
 129 #define REG_IPH         REG_IP
 130 #define REG_IPL         0x5
 131
 132 #define REG_SP          0x6
 133 #define REG_SPH         REG_SP
 134 #define REG_SPL         0x7
 135
 136 #define REG_PCH         0x8
 137 #define REG_PCL         0x9
 138
 139 #define REG_W           0xa
 140 #define REG_STATUS      0xb
 141
 142 #define REG_DP          0xc
 143 #define REG_DPH         REG_DP
 144 #define REG_DPL         0xd
 145
 146 #define REG_MULH        0xf
 147
 148 #define REG_CALLH       0x7e            /* Call-stack readout.  */
 149 #define REG_CALLL       0x7f
 150
 151
 152 #define REG_RESULT      0x80    /* Result register (upto 8 bytes).  */
 153 #define REG_FP          0xfd    /* 2 bytes for FRAME chain  */
 154
 155 #define REG_ZERO        0xff    /* Initialized to zero by runtime.  */
 156
 157 #define REG_VFP         0x100   /* Virtual frame pointer.  */
 158 #define REG_AP          0x102   /* Virtual arg pointer.  */
 159
 160 /* Status register bits.  */
 161 #define Z_FLAG  0x2
 162 #define DC_FLAG 0x1
 163 #define C_FLAG  0x0
 164
 165 #define FIXED_REGISTERS {\
 166 1,1,1,1,0,0,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
 167 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
 168 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
 169 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
 170 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/*r128..r159*/\
 171 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
 172 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
 173 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
 174 1,1,1,1}
 175
 176 #define CALL_USED_REGISTERS {                   \
 177 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
 178 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
 179 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
 180 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
 181 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r128..r159*/\
 182 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
 183 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
 184 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
 185 1,1,1,1}
 186
 187 #define NON_SAVING_SETJMP 0
 188
 189 #define REG_ALLOC_ORDER {                       \
 190     0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f,    \
 191     0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,    \
 192     0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,    \
 193     0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,    \
 194     0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7,    \
 195     0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf,    \
 196     0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7,    \
 197     0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf,    \
 198     0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,    \
 199     0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf,    \
 200     0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd7,    \
 201     0xd8,0xd9,0xda,0xdb,0xdc,0xdd,0xde,0xdf,    \
 202     0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,    \
 203     0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,    \
 204     0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,    \
 205     0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,    \
 206     0x00,0x01,0x02,0x03,0x0c,0x0d,0x06,0x07,    \
 207     0x08,0x09,0x0a,0x0b,0x04,0x05,0x0e,0x0f,    \
 208     0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,    \
 209     0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,    \
 210     0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,    \
 211     0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,    \
 212     0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,    \
 213     0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,    \
 214     0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,    \
 215     0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,    \
 216     0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,    \
 217     0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f,    \
 218     0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,    \
 219     0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f,    \
 220     0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,    \
 221     0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,    \
 222     0x100,0x101,0x102,0x103}
 223
 224
 225 #define ORDER_REGS_FOR_LOCAL_ALLOC ip2k_init_local_alloc (reg_alloc_order)
 226
 227 /* Are we allowed to rename registers?  For some reason, regrename was
 228    changing DP to IP (when it appeared in addresses like (plus:HI
 229    (reg: DP) (const_int 37)) - and that's bad because IP doesn't
 230    permit offsets!  */
 231
 232 #define HARD_REGNO_RENAME_OK(REG, NREG)                         \
 233   (((REG) == REG_DPH) ? 0                                       \
 234     : ((REG) == REG_IPH) ? ((NREG) == REG_DPH)                  \
 235     : (((NREG) == REG_IPL) || ((NREG) == REG_DPL)) ? 0 : 1)
 236
 237 #define HARD_REGNO_NREGS(REGNO, MODE) \
 238   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 239
 240 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
 241
 242 #define MODES_TIEABLE_P(MODE1, MODE2)           \
 243    (((MODE1) == QImode && (MODE2) == HImode)    \
 244     || ((MODE2) == QImode && (MODE1) == HImode))
 245 /* We originally had this as follows - this isn't a win on the IP2k
 246    though as registers just get in our way!
 247
 248    #define MODES_TIEABLE_P(MODE1, MODE2) \
 249     (((MODE1) > HImode && (MODE2) == HImode)
 250      || ((MODE1) == HImode && (MODE2) > HImode))  */
 251
 252 enum reg_class {
 253   NO_REGS,
 254   DPH_REGS,
 255   DPL_REGS,
 256   DP_REGS,
 257   SP_REGS,
 258   IPH_REGS,
 259   IPL_REGS,
 260   IP_REGS,
 261   DP_SP_REGS,
 262   PTR_REGS,
 263   NONPTR_REGS,
 264   NONSP_REGS,
 265   GENERAL_REGS,
 266   ALL_REGS = GENERAL_REGS,
 267   LIM_REG_CLASSES
 268 };
 269
 270 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 271
 272 #define REG_CLASS_NAMES {                       \
 273                 "NO_REGS",                      \
 274                 "DPH_REGS",                     \
 275                 "DPL_REGS",                     \
 276                 "DP_REGS",                      \
 277                 "SP_REGS",                      \
 278                 "IPH_REGS",                     \
 279                 "IPL_REGS",                     \
 280                 "IP_REGS",                      \
 281                 "DP_SP_REGS",                   \
 282                 "PTR_REGS",                     \
 283                 "NONPTR_REGS",                  \
 284                 "NONSP_REGS",                   \
 285                 "GENERAL_REGS"                  \
 286                 }
 287
 288
 289 #define REG_CLASS_CONTENTS {                            \
 290 {0x00000000, 0, 0, 0, 0, 0, 0, 0, 0}, /* NO_REGS */     \
 291 {0x00001000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPH_REGS */    \
 292 {0x00002000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPL_REGS */    \
 293 {0x00003000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_REGS */     \
 294 {0x000000c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SP_REGS */     \
 295 {0x00000010, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPH_REGS */    \
 296 {0x00000020, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPL_REGS */    \
 297 {0x00000030, 0, 0, 0, 0, 0, 0, 0, 0}, /* IP_REGS */     \
 298 {0x000030c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_SP_REGS */  \
 299 {0x000030f0, 0, 0, 0, 0, 0, 0, 0, 0}, /* PTR_REGS */    \
 300 {0xffffcf0f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONPTR_REGS */ \
 301 {0xffffff3f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONSP_REGS */  \
 302 {0xffffffff,-1,-1,-1,-1,-1,-1,-1,15}  /* GENERAL_REGS */ \
 303 }
 304
 305 #define REGNO_REG_CLASS(R)      \
 306   ( (R) == REG_IPH ? IPH_REGS   \
 307   : (R) == REG_IPL ? IPL_REGS   \
 308   : (R) == REG_DPH ? DPH_REGS   \
 309   : (R) == REG_DPL ? DPL_REGS   \
 310   : (R) == REG_SPH ? SP_REGS    \
 311   : (R) == REG_SPL ? SP_REGS    \
 312   : NONPTR_REGS)
 313
 314 #define MODE_BASE_REG_CLASS(MODE) ((MODE) == QImode ? PTR_REGS : DP_SP_REGS)
 315
 316 #define BASE_REG_CLASS PTR_REGS
 317
 318 #define INDEX_REG_CLASS NO_REGS
 319
 320 #define REG_CLASS_FROM_LETTER(C)        \
 321   ( (C) == 'j' ? IPH_REGS               \
 322   : (C) == 'k' ? IPL_REGS               \
 323   : (C) == 'f' ? IP_REGS                \
 324   : (C) == 'y' ? DPH_REGS               \
 325   : (C) == 'z' ? DPL_REGS               \
 326   : (C) == 'b' ? DP_REGS                \
 327   : (C) == 'u' ? NONSP_REGS             \
 328   : (C) == 'q' ? SP_REGS                \
 329   : (C) == 'c' ? DP_SP_REGS             \
 330   : (C) == 'a' ? PTR_REGS               \
 331   : (C) == 'd' ? NONPTR_REGS            \
 332   : NO_REGS)
 333
 334 #define REGNO_OK_FOR_BASE_P(R) \
 335   ((R) == REG_DP || (R) == REG_IP || (R) == REG_SP)
 336
 337 #define REGNO_MODE_OK_FOR_BASE_P(R,M)           \
 338   ((R) == REG_DP || (R) == REG_SP               \
 339    || ((R) == REG_IP && GET_MODE_SIZE (M) <= 1))
 340
 341 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 342
 343 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
 344
 345 #define SMALL_REGISTER_CLASSES 1
 346
 347 #define CLASS_LIKELY_SPILLED_P(CLASS)  class_likely_spilled_p(CLASS)
 348
 349 #define CLASS_MAX_NREGS(CLASS, MODE)   GET_MODE_SIZE (MODE)
 350
 351 #define CONST_OK_FOR_LETTER_P(VALUE, C)                         \
 352   ((C) == 'I' ? (VALUE) >= -255 && (VALUE) <= -1 :              \
 353    (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 7 :                  \
 354    (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 127 :                \
 355    (C) == 'L' ? (VALUE) > 0 && (VALUE) < 128:                   \
 356    (C) == 'M' ? (VALUE) == -1:                                  \
 357    (C) == 'N' ? (VALUE) == 1:                                   \
 358    (C) == 'O' ? (VALUE) == 0:                                   \
 359    (C) == 'P' ? (VALUE) >= 0 && (VALUE) <= 255:                 \
 360    0)
 361
 362 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
 363
 364 #define EXTRA_CONSTRAINT(X, C) ip2k_extra_constraint (X, C)
 365
 366 /* This is an undocumented variable which describes
 367    how GCC will pop a data.  */
 368 #define STACK_POP_CODE PRE_INC
 369
 370 #define STACK_PUSH_CODE POST_DEC
 371
 372 #define STACK_CHECK_BUILTIN     1
 373 /* Prologue code will do stack checking as necessary.  */
 374
 375 #define STARTING_FRAME_OFFSET (0)
 376
 377 #define FRAME_GROWS_DOWNWARD    1
 378 #define STACK_GROWS_DOWNWARD    1
 379
 380 /* On IP2K arg pointer is virtual and resolves to either SP or FP
 381    after we've resolved what registers are saved (fp chain, return
 382    pc, etc.  */
 383
 384 #define FIRST_PARM_OFFSET(FUNDECL) 0
 385
 386 #define STACK_POINTER_OFFSET 1
 387 /* IP2K stack is post-decremented, so 0(sp) is address of open space
 388    and 1(sp) is offset to the location avobe the forst location at which
 389    outgoing arguments are placed.  */
 390
 391 #define STACK_BOUNDARY 8
 392
 393 #define STACK_POINTER_REGNUM REG_SP
 394
 395 #define FRAME_POINTER_REGNUM REG_VFP
 396 #define HARD_FRAME_POINTER_REGNUM REG_FP
 397
 398 #define ARG_POINTER_REGNUM  REG_AP
 399
 400 /* We don't really want to support nested functions.  But we'll crash
 401    in various testsuite tests if we don't at least define the register
 402    to contain the static chain. The return value register is about as
 403    bad a place as any for this.  */
 404
 405 #define STATIC_CHAIN_REGNUM     REG_RESULT
 406
 407 #define FRAME_POINTER_REQUIRED (!flag_omit_frame_pointer)
 408
 409 #define ELIMINABLE_REGS {                                       \
 410         {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},             \
 411         {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},        \
 412         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},           \
 413         {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},      \
 414         {HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 415 }
 416
 417 #define CAN_ELIMINATE(FROM, TO)                                 \
 418   ((FROM) == HARD_FRAME_POINTER_REGNUM                          \
 419    ? (flag_omit_frame_pointer && !frame_pointer_needed) : 1)
 420 /* Don't eliminate FP unless we EXPLICITLY_ASKED  */
 421
 422 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 423   ((OFFSET) = ip2k_init_elim_offset ((FROM), (TO)))
 424
 425 #define RETURN_ADDR_RTX(COUNT, X) \
 426   (((COUNT) == 0) ? gen_rtx_REG (HImode, REG_CALLH) : NULL_RTX)
 427
 428 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
 429
 430 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
 431   ip2k_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
 432
 433 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
 434
 435 #define CUMULATIVE_ARGS int
 436
 437 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 438   ((CUM) = 0)
 439
 440 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
 441
 442 /* All arguments are passed on stack - do nothing here.  */
 443
 444 #define FUNCTION_ARG_REGNO_P(R) 0
 445
 446 #define FUNCTION_VALUE(VALTYPE, FUNC)                           \
 447    ((TYPE_MODE (VALTYPE) == QImode)                             \
 448     ? gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT + 1) \
 449     : gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT))
 450
 451 /* Because functions returning 'char' actually widen to 'int', we have to
 452    use $81 as the return location if we think we only have a 'char'.  */
 453
 454 #define LIBCALL_VALUE(MODE)  gen_rtx_REG ((MODE), REG_RESULT)
 455
 456 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_RESULT)
 457
 458 /* Indicate that large structures are passed by reference.  */
 459 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM,MODE,TYPE,NAMED)     0
 460
 461 #define DEFAULT_PCC_STRUCT_RETURN 0
 462
 463 #define EPILOGUE_USES(REGNO) 0
 464
 465
 466 /*  Hmmm.  We don't actually like constants as addresses - they always need
 467     to be loaded to a register, except for function calls which take an
 468     address by immediate value.  But changing this to zero had negative
 469     effects, causing the compiler to get very confused....  */
 470
 471 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
 472
 473 #define MAX_REGS_PER_ADDRESS 1
 474
 475 #ifdef REG_OK_STRICT
 476 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
 477 {                                                       \
 478   if (legitimate_address_p ((MODE), (OPERAND), 1))      \
 479     goto ADDR;                                          \
 480 }
 481 #else
 482 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
 483 {                                                       \
 484   if (legitimate_address_p ((MODE), (OPERAND), 0))      \
 485     goto ADDR;                                          \
 486 }
 487 #endif
 488
 489 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 490
 491 #define REG_OK_FOR_BASE_NOSTRICT_P(X)   \
 492   (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 493    || (REGNO (X) == REG_FP)             \
 494    || (REGNO (X) == REG_VFP)            \
 495    || (REGNO (X) == REG_AP)             \
 496    || REG_OK_FOR_BASE_STRICT_P(X))
 497
 498 #ifdef REG_OK_STRICT
 499 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
 500 #else
 501 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
 502 #endif
 503
 504 #define REG_OK_FOR_INDEX_P(X) 0
 505
 506 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)             \
 507 do { rtx orig_x = (X);                                  \
 508   (X) = legitimize_address ((X), (OLDX), (MODE), 0);    \
 509   if ((X) != orig_x && memory_address_p ((MODE), (X)))  \
 510     goto WIN;                                           \
 511 } while (0)
 512
 513 /* Is X a legitimate register to reload, or is it a pseudo stack-temp
 514    that is problematic for push_reload() ?  */
 515
 516 #define LRA_REG(X)                                              \
 517   (! (reg_equiv_memory_loc[REGNO (X)]                           \
 518       && (reg_equiv_address[REGNO (X)]                          \
 519           || num_not_at_initial_offset)))
 520
 521 /* Given a register X that failed the LRA_REG test, replace X
 522    by its memory equivalent, find the reloads needed for THAT memory
 523    location and substitute that back for the higher-level reload
 524    that we're conducting...  */
 525
 526 /* WARNING: we reference 'ind_levels' and 'insn' which are local variables
 527    in find_reloads_address (), where the LEGITIMIZE_RELOAD_ADDRESS macro
 528    expands.  */
 529
 530 #define FRA_REG(X,MODE,OPNUM,TYPE)                                      \
 531 do {                                                                    \
 532   rtx tem = make_memloc ((X), REGNO (X));                               \
 533                                                                         \
 534   if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))        \
 535     {                                                                   \
 536       /* Note that we're doing address in address - cf. ADDR_TYPE  */   \
 537       find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),        \
 538                             &XEXP (tem, 0), (OPNUM),                    \
 539                             ADDR_TYPE (TYPE), ind_levels, insn);        \
 540     }                                                                   \
 541   (X) = tem;                                                            \
 542 } while (0)
 543
 544
 545 /* For the IP2K, we want to be clever about picking IP vs DP for a
 546    base pointer since IP only directly supports a zero displacement.
 547    (Note that we have modified all the HI patterns to correctly handle
 548    IP references by manipulating iph:ipl as we fetch the pieces).  */
 549 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND,WIN)                 \
 550 {                                                                            \
 551   if (GET_CODE (X) == PLUS                                                   \
 552       && REG_P (XEXP (X, 0))                                                 \
 553       && GET_CODE (XEXP (X, 1)) == CONST_INT)                                \
 554     {                                                                        \
 555       int disp = INTVAL (XEXP (X, 1));                                       \
 556       int fit = (disp >= 0 && disp <= (127 - 2 * GET_MODE_SIZE (MODE)));     \
 557       rtx reg = XEXP (X, 0);                                                 \
 558       if (!fit)                                                              \
 559         {                                                                    \
 560           push_reload ((X), NULL_RTX, &(X),                                  \
 561                        NULL, MODE_BASE_REG_CLASS (MODE), GET_MODE (X),       \
 562                        VOIDmode, 0, 0, OPNUM, TYPE);                         \
 563           goto WIN;                                                          \
 564         }                                                                    \
 565       if (reg_equiv_memory_loc[REGNO (reg)]                                  \
 566           && (reg_equiv_address[REGNO (reg)] || num_not_at_initial_offset))  \
 567         {                                                                    \
 568           rtx mem = make_memloc (reg, REGNO (reg));                          \
 569           if (! strict_memory_address_p (GET_MODE (mem), XEXP (mem, 0)))     \
 570             {                                                                \
 571               /* Note that we're doing address in address - cf. ADDR_TYPE  */\
 572                find_reloads_address (GET_MODE (mem), &mem, XEXP (mem, 0),    \
 573                                     &XEXP (mem, 0), (OPNUM),                 \
 574                                     ADDR_TYPE (TYPE), (IND), insn);          \
 575             }                                                                \
 576           push_reload (mem, NULL, &XEXP (X, 0), NULL,                        \
 577                        GENERAL_REGS, Pmode, VOIDmode, 0, 0,                  \
 578                        OPNUM, TYPE);                                         \
 579           push_reload (X, NULL, &X, NULL,                                    \
 580                        MODE_BASE_REG_CLASS (MODE), GET_MODE (X), VOIDmode,   \
 581                        0, 0, OPNUM, TYPE);                                   \
 582           goto WIN;                                                          \
 583         }                                                                    \
 584    }                                                                         \
 585 }
 586
 587 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)                \
 588     do {                                                        \
 589         if (ip2k_mode_dependent_address (ADDR)) goto LABEL;     \
 590     } while (0)
 591
 592 #define LEGITIMATE_CONSTANT_P(X) 1
 593
 594 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 7
 595
 596 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 6
 597
 598 #define SLOW_BYTE_ACCESS 0
 599
 600 #define NO_FUNCTION_CSE
 601
 602 #define TEXT_SECTION_ASM_OP ".text"
 603 #define DATA_SECTION_ASM_OP ".data"
 604
 605 #define JUMP_TABLES_IN_TEXT_SECTION 1
 606
 607 #define ASM_COMMENT_START " ; "
 608
 609 #define ASM_APP_ON "/* #APP */\n"
 610
 611 #define ASM_APP_OFF "/* #NOAPP */\n"
 612
 613 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
 614   fprintf ((STREAM), ".double %.20e\n", (VALUE))
 615 #define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
 616   asm_output_float ((STREAM), (VALUE))
 617
 618 #define ASM_OUTPUT_INT(FILE, VALUE)                     \
 619  ( fprintf ((FILE), "\t.long "),                        \
 620    output_addr_const ((FILE), (VALUE)),                 \
 621    fputs ("\n", (FILE)))
 622
 623 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
 624   asm_output_short ((FILE), (VALUE))
 625 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
 626   asm_output_char ((FILE), (VALUE))
 627
 628 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
 629   asm_output_byte ((FILE), (VALUE))
 630
 631 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) \
 632   ((C) == '\n' || ((C) == '$'))
 633
 634 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)  \
 635 do {                                                    \
 636      fputs ("\t.comm ", (STREAM));                      \
 637      assemble_name ((STREAM), (NAME));                  \
 638      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
 639 } while (0)
 640
 641 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)   \
 642 do {                                                    \
 643      fputs ("\t.lcomm ", (STREAM));                     \
 644      assemble_name ((STREAM), (NAME));                  \
 645      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
 646 } while (0)
 647
 648 #undef WEAK_ASM_OP
 649 #define WEAK_ASM_OP     ".weak"
 650
 651 #undef ASM_DECLARE_FUNCTION_SIZE
 652 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)            \
 653   do {                                                          \
 654     if (!flag_inhibit_size_directive)                           \
 655       ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME);                   \
 656   } while (0)
 657
 658 #define ESCAPES \
 659 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 660 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
 661 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
 662 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
 663 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 664 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 665 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 666 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
 667 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
 668    ASM_OUTPUT_LIMITED_STRING macros.  Each byte in the table
 669    corresponds to a particular byte value [0..255].  For any
 670    given byte value, if the value in the corresponding table
 671    position is zero, the given character can be output directly.
 672    If the table value is 1, the byte must be output as a \ooo
 673    octal escape.  If the tables value is anything else, then the
 674    byte value should be output as a \ followed by the value
 675    in the table.  Note that we can use standard UN*X escape
 676    sequences for many control characters, but we don't use
 677    \a to represent BEL because some svr4 assemblers (e.g. on
 678    the i386) don't know about that.  Also, we don't use \v
 679    since some versions of gas, such as 2.2 did not accept it.  */
 680
 681 /* Globalizing directive for a label.  */
 682 #define GLOBAL_ASM_OP ".global\t"
 683
 684 #define REGISTER_NAMES  {                                       \
 685   "$00","$01","$02","$03","iph","ipl","sph","spl",              \
 686   "pch","pcl","wreg","status","dph","dpl","$0e","mulh",         \
 687   "$10","$11","$12","$13","$14","$15","$16","$17",              \
 688   "$18","$19","$1a","$1b","$1c","$1d","$1e","$1f",              \
 689   "$20","$21","$22","$23","$24","$25","$26","$27",              \
 690   "$28","$29","$2a","$2b","$2c","$2d","$2e","$2f",              \
 691   "$30","$31","$32","$33","$34","$35","$36","$37",              \
 692   "$38","$39","$3a","$3b","$3c","$3d","$3e","$3f",              \
 693   "$40","$41","$42","$43","$44","$45","$46","$47",              \
 694   "$48","$49","$4a","$4b","$4c","$4d","$4e","$4f",              \
 695   "$50","$51","$52","$53","$54","$55","$56","$57",              \
 696   "$58","$59","$5a","$5b","$5c","$5d","$5e","$5f",              \
 697   "$60","$61","$62","$63","$64","$65","$66","$67",              \
 698   "$68","$69","$6a","$6b","$6c","$6d","$6e","$6f",              \
 699   "$70","$71","$72","$73","$74","$75","$76","$77",              \
 700   "$78","$79","$7a","$7b","$7c","$7d","callh","calll",          \
 701   "$80","$81","$82","$83","$84","$85","$86","$87",              \
 702   "$88","$89","$8a","$8b","$8c","$8d","$8e","$8f",              \
 703   "$90","$91","$92","$93","$94","$95","$96","$97",              \
 704   "$98","$99","$9a","$9b","$9c","$9d","$9e","$9f",              \
 705   "$a0","$a1","$a2","$a3","$a4","$a5","$a6","$a7",              \
 706   "$a8","$a9","$aa","$ab","$ac","$ad","$ae","$af",              \
 707   "$b0","$b1","$b2","$b3","$b4","$b5","$b6","$b7",              \
 708   "$b8","$b9","$ba","$bb","$bc","$bd","$be","$bf",              \
 709   "$c0","$c1","$c2","$c3","$c4","$c5","$c6","$c7",              \
 710   "$c8","$c9","$ca","$cb","$cc","$cd","$ce","$cf",              \
 711   "$d0","$d1","$d2","$d3","$d4","$d5","$d6","$d7",              \
 712   "$d8","$d9","$da","$db","$dc","$dd","$de","$df",              \
 713   "$e0","$e1","$e2","$e3","$e4","$e5","$e6","$e7",              \
 714   "$e8","$e9","$ea","$eb","$ec","$ed","$ee","$ef",              \
 715   "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7",              \
 716   "$f8","$f9","$fa","$fb","$fc","$fd","$fe","$ff",              \
 717   "vfph","vfpl","vaph","vapl"}
 718
 719 #define PRINT_OPERAND(STREAM, X, CODE) \
 720   print_operand ((STREAM), (X), (CODE))
 721
 722 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
 723   ((CODE) == '<' || (CODE) == '>')
 724
 725 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
 726
 727 /* Since register names don't have a prefix, we must preface all
 728    user identifiers with the '_' to prevent confusion.  */
 729
 730 #undef USER_LABEL_PREFIX
 731 #define USER_LABEL_PREFIX "_"
 732 #define LOCAL_LABEL_PREFIX ".L"
 733
 734 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 735   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
 736
 737 /* elfos.h presumes that we will want switch/case dispatch tables aligned.
 738    This is not so for the ip2k.  */
 739 #undef ASM_OUTPUT_CASE_LABEL
 740
 741 #undef ASM_OUTPUT_ADDR_VEC_ELT
 742 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 743   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
 744
 745 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
 746   fprintf ((STREAM), "\t.align %d\n", (POWER))
 747
 748 /* Since instructions are 16 bit word addresses, we should lie and claim that
 749    the dispatch vectors are in QImode.  Otherwise the offset into the jump
 750    table will be scaled by the MODE_SIZE.  */
 751
 752 #define CASE_VECTOR_MODE QImode
 753
 754 #undef WORD_REGISTER_OPERATIONS
 755
 756 #define MOVE_MAX 1
 757
 758 #define MOVE_RATIO              3
 759 /* MOVE_RATIO is the number of move instructions that is better than a
 760    block move.  Make this small on the IP2k, since the code size grows very
 761    large with each move.  */
 762
 763 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 764
 765 #define Pmode HImode
 766
 767 #define FUNCTION_MODE HImode
 768
 769 #define DOLLARS_IN_IDENTIFIERS 0
 770
 771 extern int ip2k_reorg_in_progress;
 772 /* Flag if we're in the middle of IP2k-specific reorganization.  */
 773
 774 extern int ip2k_reorg_completed;
 775 /* Flag if we've completed our IP2k-specific reorganization.  If we have
 776    then we allow quite a few more tricks than before.  */
 777
 778 extern int ip2k_reorg_split_dimode;
 779 extern int ip2k_reorg_split_simode;
 780 extern int ip2k_reorg_split_qimode;
 781 extern int ip2k_reorg_split_himode;
 782 /* Flags for various split operations that we run in sequence.  */
 783
 784 extern int ip2k_reorg_merge_qimode;
 785 /* Flag to indicate that it's safe to merge QImode operands.  */
 786
 787 #define TRAMPOLINE_TEMPLATE(FILE) abort ()
 788
 789 #define TRAMPOLINE_SIZE 4
 790
 791 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                       \
 792 {                                                                       \
 793   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)),     \
 794                            CXT);                                        \
 795   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)),     \
 796                            FNADDR);                                     \
 797 }
 798 /* Store in cc_status the expressions
 799    that the condition codes will describe
 800    after execution of an instruction whose pattern is EXP.
 801    Do not alter them if the instruction would not alter the cc's.  */
 802
 803 #define NOTICE_UPDATE_CC(EXP, INSN) (void)(0)
 804
 805 /* Output assembler code to FILE to increment profiler label # LABELNO
 806    for profiling a function entry.  */
 807
 808 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 809   fprintf ((FILE), "/* profiler %d */", (LABELNO))
 810
 811 #undef ENDFILE_SPEC
 812 #undef LINK_SPEC
 813 #undef STARTFILE_SPEC
 814
 815 #if defined(__STDC__) || defined(ALMOST_STDC)
 816 #define AS2(a,b,c) #a "\t" #b "," #c
 817 #define AS1(a,b) #a "\t" #b
 818 #else
 819 #define AS1(a,b) "a     b"
 820 #define AS2(a,b,c) "a   b,c"
 821 #endif
 822 #define OUT_AS1(a,b) output_asm_insn (AS1 (a,b), operands)
 823 #define OUT_AS2(a,b,c) output_asm_insn (AS2 (a,b,c), operands)
 824 #define CR_TAB "\n\t"
 825
 826 #define PREDICATE_CODES                                 \
 827   {"ip2k_ip_operand", {MEM}},                           \
 828   {"ip2k_short_operand", {MEM}},                        \
 829   {"ip2k_gen_operand", {MEM, REG, SUBREG}},             \
 830   {"ip2k_nonptr_operand", {REG, SUBREG}},               \
 831   {"ip2k_ptr_operand", {REG, SUBREG}},                  \
 832   {"ip2k_split_dest_operand", {REG, SUBREG, MEM}},      \
 833   {"ip2k_sp_operand", {REG}},                           \
 834   {"ip2k_nonsp_reg_operand", {REG, SUBREG}},            \
 835   {"ip2k_symbol_ref_operand", {SYMBOL_REF}},            \
 836   {"ip2k_binary_operator", {PLUS, MINUS, MULT, DIV,     \
 837                             UDIV, MOD, UMOD, AND, IOR,  \
 838                             XOR, COMPARE, ASHIFT,       \
 839                             ASHIFTRT, LSHIFTRT}},       \
 840   {"ip2k_unary_operator", {NEG, NOT, SIGN_EXTEND,       \
 841                            ZERO_EXTEND}},               \
 842   {"ip2k_unsigned_comparison_operator", {LTU, GTU, NE,  \
 843                                          EQ, LEU, GEU}},\
 844   {"ip2k_signed_comparison_operator", {LT, GT, LE, GE}},
 845
 846 #define DWARF2_DEBUGGING_INFO 1
 847
 848 #define DWARF2_ASM_LINE_DEBUG_INFO      1
 849
 850 #define DBX_REGISTER_NUMBER(REGNO)      (REGNO)
 851
 852 /* Miscellaneous macros to describe machine specifics.  */
 853
 854 #define IS_PSEUDO_P(R)  (REGNO (R) >= FIRST_PSEUDO_REGISTER)
 855
 856 /* Default calculations would cause DWARF address sizes to be 2 bytes,
 857    but the Harvard architecture of the IP2k and the word-addressed 64k
 858    of instruction memory causes us to want a 32-bit "address" field.  */
 859 #undef DWARF2_ADDR_SIZE
 860 #define DWARF2_ADDR_SIZE        4
 861