asmcomp/schedgen.mli

   1 (***********************************************************************)
   2 (*                                                                     *)
   3 (*                           Objective Caml                            *)
   4 (*                                                                     *)
   5 (*            Xavier Leroy, projet Cristal, INRIA Rocquencourt         *)
   6 (*                                                                     *)
   7 (*  Copyright 1997 Institut National de Recherche en Informatique et   *)
   8 (*  en Automatique.  All rights reserved.  This file is distributed    *)
   9 (*  under the terms of the Q Public License version 1.0.               *)
  10 (*                                                                     *)
  11 (***********************************************************************)
  12
  13 (* $Id$ *)
  14
  15 (* Instruction scheduling *)
  16
  17 type code_dag_node =
  18   { instr: Linearize.instruction;
  19     delay: int;
  20     mutable sons: (code_dag_node * int) list;
  21     mutable date: int;
  22     mutable length: int;
  23     mutable ancestors: int;
  24     mutable emitted_ancestors: int }
  25
  26 class virtual scheduler_generic : object
  27   (* Can be overriden by processor description *)
  28   method virtual oper_issue_cycles : Mach.operation -> int
  29       (* Number of cycles needed to issue the given operation *)
  30   method virtual oper_latency : Mach.operation -> int
  31       (* Number of cycles needed to complete the given operation *)
  32   method reload_retaddr_issue_cycles : int
  33       (* Number of cycles needed to issue a Lreloadretaddr operation *)
  34   method reload_retaddr_latency : int
  35       (* Number of cycles needed to complete a Lreloadretaddr operation *)
  36   method oper_in_basic_block : Mach.operation -> bool
  37       (* Says whether the given operation terminates a basic block *)
  38   method is_store : Mach.operation -> bool
  39       (* Says whether the given operation is a memory store *)
  40   method is_load : Mach.operation -> bool
  41       (* Says whether the given operation is a memory load *)
  42   method is_checkbound : Mach.operation -> bool
  43       (* Says whether the given operation is a checkbound *)
  44   (* Entry point *)
  45   method schedule_fundecl : Linearize.fundecl -> Linearize.fundecl
  46 end