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[newos.git] / boot / i386 / smp_boot.c
blob1907f60c89762b8e2c9e44d00b531b17101469b7
1 /*
2 ** Copyright 2001, Travis Geiselbrecht. All rights reserved.
3 ** Distributed under the terms of the NewOS License.
4 */
5 #include <boot/stage2.h>
6 #include "stage2_priv.h"
8 #include <string.h>
10 #define NO_SMP 0
11 #define CHATTY_SMP 0
13 static unsigned int mp_mem_phys = 0;
14 static unsigned int mp_mem_virt = 0;
15 static struct mp_flt_struct *mp_flt_ptr = NULL;
16 static kernel_args *saved_ka = NULL;
17 static unsigned int kernel_entry_point = 0;
19 static int smp_get_current_cpu(kernel_args *ka);
21 static unsigned int map_page(kernel_args *ka, unsigned int paddr, unsigned int vaddr)
23 unsigned int *pentry;
24 unsigned int *pgdir = (unsigned int *)(ka->arch_args.page_hole + (4*1024*1024-PAGE_SIZE));
26 // check to see if a page table exists for this range
27 if(pgdir[vaddr / PAGE_SIZE / 1024] == 0) {
28 unsigned int pgtable;
29 // we need to allocate a pgtable
30 pgtable = ka->phys_alloc_range[0].start + ka->phys_alloc_range[0].size;
31 ka->phys_alloc_range[0].size += PAGE_SIZE;
32 ka->arch_args.pgtables[ka->arch_args.num_pgtables++] = pgtable;
34 // put it in the pgdir
35 pgdir[vaddr / PAGE_SIZE / 1024] = (pgtable & ADDR_MASK) | DEFAULT_PAGE_FLAGS;
37 // zero it out in it's new mapping
38 memset((unsigned int *)((unsigned int *)ka->arch_args.page_hole + (vaddr / PAGE_SIZE / 1024) * PAGE_SIZE), 0, PAGE_SIZE);
40 // now, fill in the pentry
41 pentry = (unsigned int *)((unsigned int *)ka->arch_args.page_hole + vaddr / PAGE_SIZE);
43 *pentry = (paddr & ADDR_MASK) | DEFAULT_PAGE_FLAGS;
45 asm volatile("invlpg (%0)" : : "r" (vaddr));
47 return 0;
50 static unsigned int apic_read(unsigned int *addr)
52 return *addr;
55 static void apic_write(unsigned int *addr, unsigned int data)
57 *addr = data;
61 static void *mp_virt_to_phys(void *ptr)
63 return ((void *)(((unsigned int)ptr - mp_mem_virt) + mp_mem_phys));
66 static void *mp_phys_to_virt(void *ptr)
68 return ((void *)(((unsigned int)ptr - mp_mem_phys) + mp_mem_virt));
71 static unsigned int *smp_probe(unsigned int base, unsigned int limit)
73 unsigned int *ptr;
75 // dprintf("smp_probe: entry base 0x%x, limit 0x%x\n", base, limit);
77 for (ptr = (unsigned int *) base; (unsigned int) ptr < limit; ptr++) {
78 if (*ptr == MP_FLT_SIGNATURE) {
79 // dprintf("smp_probe: found floating pointer structure at 0x%x\n", ptr);
80 return ptr;
83 return NULL;
86 static void smp_do_config(kernel_args *ka)
88 char *ptr;
89 int i;
90 struct mp_config_table *mpc;
91 struct mp_ext_pe *pe;
92 struct mp_ext_ioapic *io;
93 struct mp_ext_bus *bus;
94 const char *cpu_family[] = { "", "", "", "", "Intel 486",
95 "Intel Pentium", "Intel Pentium Pro", "Intel Pentium II" };
98 * we are not running in standard configuration, so we have to look through
99 * all of the mp configuration table crap to figure out how many processors
100 * we have, where our apics are, etc.
102 ka->num_cpus = 0;
104 mpc = mp_phys_to_virt(mp_flt_ptr->mpc);
106 /* print out our new found configuration. */
107 ptr = (char *) &(mpc->oem[0]);
108 #if CHATTY_SMP
109 dprintf ("smp: oem id: %c%c%c%c%c%c%c%c product id: "
110 "%c%c%c%c%c%c%c%c%c%c%c%c\n", ptr[0], ptr[1], ptr[2], ptr[3], ptr[4],
111 ptr[5], ptr[6], ptr[7], ptr[8], ptr[9], ptr[10], ptr[11], ptr[12],
112 ptr[13], ptr[14], ptr[15], ptr[16], ptr[17], ptr[18], ptr[19],
113 ptr[20]);
114 dprintf("smp: base table has %d entries, extended section %d bytes\n",
115 mpc->num_entries, mpc->ext_len);
116 #endif
117 ka->arch_args.apic_phys = (unsigned int)mpc->apic;
119 ptr = (char *) ((unsigned int) mpc + sizeof (struct mp_config_table));
120 for (i = 0; i < mpc->num_entries; i++) {
121 switch (*ptr) {
122 case MP_EXT_PE:
123 pe = (struct mp_ext_pe *) ptr;
124 ka->arch_args.cpu_apic_id[ka->num_cpus] = pe->apic_id;
125 ka->arch_args.cpu_os_id[pe->apic_id] = ka->num_cpus;
126 ka->arch_args.cpu_apic_version[ka->num_cpus] = pe->apic_version;
127 #if CHATTY_SMP
128 dprintf ("smp: cpu#%d: %s, apic id %d, version %d%s\n",
129 ka->num_cpus, cpu_family[(pe->signature & 0xf00) >> 8],
130 pe->apic_id, pe->apic_version, (pe->cpu_flags & 0x2) ?
131 ", BSP" : "");
132 #endif
133 ptr += 20;
134 ka->num_cpus++;
135 break;
136 case MP_EXT_BUS:
137 bus = (struct mp_ext_bus *)ptr;
138 #if CHATTY_SMP
139 dprintf("smp: bus%d: %c%c%c%c%c%c\n", bus->bus_id,
140 bus->name[0], bus->name[1], bus->name[2], bus->name[3],
141 bus->name[4], bus->name[5]);
142 #endif
143 ptr += 8;
144 break;
145 case MP_EXT_IO_APIC:
146 io = (struct mp_ext_ioapic *) ptr;
147 ka->arch_args.ioapic_phys = (unsigned int)io->addr;
148 #if CHATTY_SMP
149 dprintf("smp: found io apic with apic id %d, version %d\n",
150 io->ioapic_id, io->ioapic_version);
151 #endif
152 ptr += 8;
153 break;
154 case MP_EXT_IO_INT:
155 ptr += 8;
156 break;
157 case MP_EXT_LOCAL_INT:
158 ptr += 8;
159 break;
162 dprintf("smp: apic @ 0x%x, i/o apic @ 0x%x, total %d processors detected\n",
163 (unsigned int)ka->arch_args.apic_phys, (unsigned int)ka->arch_args.ioapic_phys, ka->num_cpus);
165 // this BIOS looks broken, because it didn't report any cpus (VMWare)
166 if(ka->num_cpus == 0) {
167 ka->num_cpus = 1;
171 struct smp_scan_spots_struct {
172 unsigned int start;
173 unsigned int stop;
174 unsigned int len;
177 static struct smp_scan_spots_struct smp_scan_spots[] = {
178 { 0x9fc00, 0xa0000, 0xa0000 - 0x9fc00 },
179 { 0xf0000, 0x100000, 0x100000 - 0xf0000 },
180 { 0, 0, 0 }
183 static int smp_find_mp_config(kernel_args *ka)
185 int i;
187 // XXX for now, assume the memory is identity mapped by the 1st stage
188 for(i=0; smp_scan_spots[i].len > 0; i++) {
189 mp_flt_ptr = (struct mp_flt_struct *)smp_probe(smp_scan_spots[i].start,
190 smp_scan_spots[i].stop);
191 if(mp_flt_ptr != NULL)
192 break;
194 #if NO_SMP
195 if(0) {
196 #else
197 if(mp_flt_ptr != NULL) {
198 #endif
199 mp_mem_phys = smp_scan_spots[i].start;
200 mp_mem_virt = smp_scan_spots[i].start;
202 #if CHATTY_SMP
203 dprintf ("smp_boot: intel mp version %s, %s", (mp_flt_ptr->mp_rev == 1) ? "1.1" :
204 "1.4", (mp_flt_ptr->mp_feature_2 & 0x80) ?
205 "imcr and pic compatibility mode.\n" : "virtual wire compatibility mode.\n");
206 #endif
207 if (mp_flt_ptr->mpc == 0) {
208 // XXX need to implement
209 #if 1
210 ka->num_cpus = 1;
211 return 1;
212 #else
213 /* this system conforms to one of the default configurations */
214 // mp_num_def_config = mp_flt_ptr->mp_feature_1;
215 dprintf ("smp: standard configuration %d\n", mp_flt_ptr->mp_feature_1);
216 /* num_cpus = 2;
217 ka->cpu_apic_id[0] = 0;
218 ka->cpu_apic_id[1] = 1;
219 apic_phys = (unsigned int *) 0xfee00000;
220 ioapic_phys = (unsigned int *) 0xfec00000;
221 kprintf ("smp: WARNING: standard configuration code is untested");
223 #endif
224 } else {
225 smp_do_config(ka);
227 return ka->num_cpus;
228 } else {
229 ka->num_cpus = 1;
230 return 1;
234 static int smp_setup_apic(kernel_args *ka)
236 unsigned int config;
237 // dprintf("setting up the apic...");
239 /* set spurious interrupt vector to 0xff */
240 config = apic_read(APIC_SIVR) & 0xfffffc00;
241 config |= APIC_ENABLE | 0xff;
242 apic_write(APIC_SIVR, config);
243 #if 0
244 /* setup LINT0 as ExtINT */
245 config = (apic_read(APIC_LINT0) & 0xffff1c00);
246 config |= APIC_LVT_DM_ExtINT | APIC_LVT_IIPP | APIC_LVT_TM;
247 apic_write(APIC_LINT0, config);
249 /* setup LINT1 as NMI */
250 config = (apic_read(APIC_LINT1) & 0xffff1c00);
251 config |= APIC_LVT_DM_NMI | APIC_LVT_IIPP;
252 apic_write(APIC_LINT1, config);
253 #endif
255 /* setup timer */
256 config = apic_read(APIC_LVTT) & ~APIC_LVTT_MASK;
257 config |= 0xfb | APIC_LVTT_M; // vector 0xfb, timer masked
258 apic_write(APIC_LVTT, config);
260 apic_write(APIC_ICRT, 0); // zero out the clock
262 config = apic_read(APIC_TDCR) & ~0x0000000f;
263 config |= APIC_TDCR_1; // clock division by 1
264 apic_write(APIC_TDCR, config);
266 /* setup error vector to 0xfe */
267 config = (apic_read(APIC_LVT3) & 0xffffff00) | 0xfe;
268 apic_write(APIC_LVT3, config);
270 /* accept all interrupts */
271 config = apic_read(APIC_TPRI) & 0xffffff00;
272 apic_write(APIC_TPRI, config);
274 config = apic_read(APIC_SIVR);
275 apic_write(APIC_EOI, 0);
277 // dprintf("done\n");
278 return 0;
281 // target function of the trampoline code
282 // The trampoline code should have the pgdir and a gdt set up for us,
283 // along with us being on the final stack for this processor. We need
284 // to set up the local APIC and load the global idt and gdt. When we're
285 // done, we'll jump into the kernel with the cpu number as an argument.
286 static int smp_cpu_ready(void)
288 kernel_args *ka = saved_ka;
289 unsigned int curr_cpu = smp_get_current_cpu(ka);
290 struct gdt_idt_descr idt_descr;
291 struct gdt_idt_descr gdt_descr;
293 // dprintf("smp_cpu_ready: entry cpu %d\n", curr_cpu);
295 // Important. Make sure supervisor threads can fault on read only pages...
296 asm("movl %%eax, %%cr0" : : "a" ((1 << 31) | (1 << 16) | (1 << 5) | 1));
297 asm("cld");
298 asm("fninit");
300 smp_setup_apic(ka);
302 // Set up the final idt
303 idt_descr.a = IDT_LIMIT - 1;
304 idt_descr.b = (unsigned int *)ka->arch_args.vir_idt;
306 asm("lidt %0;"
307 : : "m" (idt_descr));
309 // Set up the final gdt
310 gdt_descr.a = GDT_LIMIT - 1;
311 gdt_descr.b = (unsigned int *)ka->arch_args.vir_gdt;
313 asm("lgdt %0;"
314 : : "m" (gdt_descr));
316 asm("pushl %0; " // push the cpu number
317 "pushl %1; " // kernel args
318 "pushl $0x0;" // dummy retval for call to main
319 "pushl %2; " // this is the start address
320 "ret; " // jump.
321 : : "r" (curr_cpu), "m" (ka), "g" (kernel_entry_point));
323 // no where to return to
324 return 0;
327 static int smp_boot_all_cpus(kernel_args *ka)
329 unsigned int trampoline_code;
330 unsigned int trampoline_stack;
331 unsigned int i;
333 // XXX assume low 1 meg is identity mapped by the 1st stage bootloader
334 // and nothing important is in 0x9e000 & 0x9f000
336 // allocate a stack and a code area for the smp trampoline
337 // (these have to be < 1M physical)
338 trampoline_code = 0x9f000; // 640kB - 4096 == 0x9f000
339 trampoline_stack = 0x9e000; // 640kB - 8192 == 0x9e000
340 map_page(ka, 0x9f000, 0x9f000);
341 map_page(ka, 0x9e000, 0x9e000);
343 // copy the trampoline code over
344 memcpy((char *)trampoline_code, &smp_trampoline,
345 (unsigned int)&smp_trampoline_end - (unsigned int)&smp_trampoline);
347 // boot the cpus
348 for(i = 1; i < ka->num_cpus; i++) {
349 unsigned int *final_stack;
350 unsigned int *final_stack_ptr;
351 unsigned int *tramp_stack_ptr;
352 unsigned int config;
353 unsigned int num_startups;
354 unsigned int j;
356 // create a final stack the trampoline code will put the ap processor on
357 ka->cpu_kstack[i].start = ka->virt_alloc_range[0].start + ka->virt_alloc_range[0].size;
358 ka->cpu_kstack[i].size = STACK_SIZE * PAGE_SIZE;
359 for(j=0; j<ka->cpu_kstack[i].size/PAGE_SIZE; j++) {
360 // map the pages in
361 map_page(ka, ka->phys_alloc_range[0].start + ka->phys_alloc_range[0].size,
362 ka->virt_alloc_range[0].start + ka->virt_alloc_range[0].size);
363 ka->phys_alloc_range[0].size += PAGE_SIZE;
364 ka->virt_alloc_range[0].size += PAGE_SIZE;
367 // set this stack up
368 final_stack = (unsigned int *)ka->cpu_kstack[i].start;
369 memset(final_stack, 0, STACK_SIZE * PAGE_SIZE);
370 final_stack_ptr = (final_stack + (STACK_SIZE * PAGE_SIZE) / sizeof(unsigned int)) - 1;
371 *final_stack_ptr = (unsigned int)&smp_cpu_ready;
372 final_stack_ptr--;
374 // set the trampoline stack up
375 tramp_stack_ptr = (unsigned int *)(trampoline_stack + PAGE_SIZE - 4);
376 // final location of the stack
377 *tramp_stack_ptr = ((unsigned int)final_stack) + STACK_SIZE * PAGE_SIZE - sizeof(unsigned int);
378 tramp_stack_ptr--;
379 // page dir
380 *tramp_stack_ptr = ka->arch_args.phys_pgdir;
381 tramp_stack_ptr--;
383 // put a gdt descriptor at the bottom of the stack
384 *((unsigned short *)trampoline_stack) = 0x18-1; // LIMIT
385 *((unsigned int *)(trampoline_stack + 2)) = trampoline_stack + 8;
386 // put the gdt at the bottom
387 memcpy(&((unsigned int *)trampoline_stack)[2], (void *)ka->arch_args.vir_gdt, 6*4);
389 /* clear apic errors */
390 if(ka->arch_args.cpu_apic_version[i] & 0xf0) {
391 apic_write(APIC_ESR, 0);
392 apic_read(APIC_ESR);
395 /* send (aka assert) INIT IPI */
396 config = (apic_read(APIC_ICR2) & 0x00ffffff) | (ka->arch_args.cpu_apic_id[i] << 24);
397 apic_write(APIC_ICR2, config); /* set target pe */
398 config = (apic_read(APIC_ICR1) & 0xfff00000) | 0x0000c500;
399 apic_write(APIC_ICR1, config);
401 // wait for pending to end
402 while((apic_read(APIC_ICR1) & 0x00001000) == 0x00001000);
404 /* deassert INIT */
405 config = (apic_read(APIC_ICR2) & 0x00ffffff) | (ka->arch_args.cpu_apic_id[i] << 24);
406 apic_write(APIC_ICR2, config);
407 config = (apic_read(APIC_ICR1) & 0xfff00000) | 0x00008500;
409 // wait for pending to end
410 while((apic_read(APIC_ICR1) & 0x00001000) == 0x00001000);
411 // dprintf("0x%x\n", apic_read(APIC_ICR1));
413 /* wait 10ms */
414 sleep(10000);
416 /* is this a local apic or an 82489dx ? */
417 num_startups = (ka->arch_args.cpu_apic_version[i] & 0xf0) ? 2 : 0;
418 for (j = 0; j < num_startups; j++) {
419 /* it's a local apic, so send STARTUP IPIs */
420 apic_write(APIC_ESR, 0);
422 /* set target pe */
423 config = (apic_read(APIC_ICR2) & 0xf0ffffff) | (ka->arch_args.cpu_apic_id[i] << 24);
424 apic_write(APIC_ICR2, config);
426 /* send the IPI */
427 config = (apic_read(APIC_ICR1) & 0xfff0f800) | APIC_DM_STARTUP |
428 (0x9f000 >> 12);
429 apic_write(APIC_ICR1, config);
431 /* wait */
432 sleep(200);
434 while((apic_read(APIC_ICR1)& 0x00001000) == 0x00001000);
438 return 0;
441 static void calculate_apic_timer_conversion_factor(kernel_args *ka)
443 long long t1, t2;
444 unsigned int config;
445 unsigned int count;
447 // setup the timer
448 config = apic_read(APIC_LVTT);
449 config = (config & ~APIC_LVTT_MASK) + APIC_LVTT_M; // timer masked, vector 0
450 apic_write(APIC_LVTT, config);
452 config = (apic_read(APIC_TDCR) & ~0x0000000f) + 0xb; // divide clock by one
453 apic_write(APIC_TDCR, config);
455 t1 = system_time();
456 apic_write(APIC_ICRT, 0xffffffff); // start the counter
458 execute_n_instructions(128*20000);
460 count = apic_read(APIC_CCRT);
461 t2 = system_time();
463 count = 0xffffffff - count;
465 ka->arch_args.apic_time_cv_factor = (unsigned int)((1000000.0/(t2 - t1)) * count);
467 dprintf("APIC ticks/sec = %d\n", ka->arch_args.apic_time_cv_factor);
470 int smp_boot(kernel_args *ka, unsigned int kernel_entry)
472 // dprintf("smp_boot: entry\n");
474 kernel_entry_point = kernel_entry;
475 saved_ka = ka;
477 if(smp_find_mp_config(ka) > 1) {
478 // dprintf("smp_boot: had found > 1 cpus\n");
479 // dprintf("post config:\n");
480 // dprintf("num_cpus = 0x%p\n", ka->num_cpus);
481 // dprintf("apic_phys = 0x%p\n", ka->arch_args.apic_phys);
482 // dprintf("ioapic_phys = 0x%p\n", ka->arch_args.ioapic_phys);
484 // map in the apic & ioapic
485 map_page(ka, ka->arch_args.apic_phys, ka->virt_alloc_range[0].start + ka->virt_alloc_range[0].size);
486 ka->arch_args.apic = (unsigned int *)(ka->virt_alloc_range[0].start + ka->virt_alloc_range[0].size);
487 ka->virt_alloc_range[0].size += PAGE_SIZE;
489 map_page(ka, ka->arch_args.ioapic_phys, ka->virt_alloc_range[0].start + ka->virt_alloc_range[0].size);
490 ka->arch_args.ioapic = (unsigned int *)(ka->virt_alloc_range[0].start + ka->virt_alloc_range[0].size);
491 ka->virt_alloc_range[0].size += PAGE_SIZE;
493 // dprintf("apic = 0x%p\n", ka->arch_args.apic);
494 // dprintf("ioapic = 0x%p\n", ka->arch_args.ioapic);
496 // set up the apic
497 smp_setup_apic(ka);
499 // calculate how fast the apic timer is
500 calculate_apic_timer_conversion_factor(ka);
502 // dprintf("trampolining other cpus\n");
503 smp_boot_all_cpus(ka);
504 // dprintf("done trampolining\n");
507 // dprintf("smp_boot: exit\n");
509 return 0;
512 static int smp_get_current_cpu(kernel_args *ka)
514 if(ka->arch_args.apic == NULL)
515 return 0;
516 else
517 return ka->arch_args.cpu_os_id[(apic_read(APIC_ID) & 0xffffffff) >> 24];