kernel/arch/sh4/arch_dbg_console.c

   1 /*
   2 ** Copyright 2001, Travis Geiselbrecht. All rights reserved.
   3 ** Distributed under the terms of the NewOS License.
   4 */
   5 #include <kernel/kernel.h>
   6 #include <boot/stage2.h>
   7
   8 #include <kernel/arch/dbg_console.h>
   9
  10 int arch_dbg_con_init(kernel_args *ka)
  11 {
  12         volatile uint16 *scif16 = (uint16*)0xffe80000;
  13         volatile uint8 *scif8 = (uint8*)0xffe80000;
  14         int x;
  15
  16         /* Disable interrupts, transmit/receive, and use internal clock */
  17         scif16[8/2] = 0;
  18
  19         /* 8N1, use P0 clock */
  20         scif16[0] = 0;
  21
  22         /* Set baudrate, N = P0/(32*B)-1 */
  23 //      scif8[4] = (50000000 / (32 * baud_rate)) - 1;
  24
  25 //      scif8[4] = 80; // 19200
  26 //      scif8[4] = 40; // 38400
  27 //      scif8[4] = 26; // 57600
  28         scif8[4] = 13; // 115200
  29
  30         /* Reset FIFOs, enable hardware flow control */
  31         scif16[24/2] = 4; //12;
  32
  33         for(x = 0; x < 100000; x++);
  34         scif16[24/2] = 0; //8;
  35
  36         /* Disable manual pin control */
  37         scif16[32/2] = 0;
  38
  39         /* Clear status */
  40         scif16[16/2] = 0x60;
  41         scif16[36/2] = 0;
  42
  43         /* Enable transmit/receive */
  44         scif16[8/2] = 0x30;
  45
  46         for(x = 0; x < 100000; x++);
  47
  48         arch_dbg_con_puts("serial initted\n");
  49
  50         return 0;
  51 }
  52
  53 int arch_dbg_con_init2(kernel_args *ka)
  54 {
  55         return 0;
  56 }
  57
  58 char arch_dbg_con_read()
  59 {
  60         volatile uint16 *status = (uint16*)0xffe8001c;
  61         volatile uint16 *ack = (uint16*)0xffe80010;
  62         volatile uint8 *fifo = (uint8*)0xffe80014;
  63         char c;
  64
  65         /* Check input FIFO */
  66         while ((*status & 0x1f) == 0);
  67
  68         /* Get the input char */
  69         c = *fifo;
  70
  71         /* Ack */
  72         *ack &= 0x6d;
  73
  74         return c;
  75 }
  76
  77 /* Flush all FIFO'd bytes out of the serial port buffer */
  78 static void arch_dbg_con_flush() {
  79         volatile uint16 *ack = (uint16*)0xffe80010;
  80
  81         *ack &= 0xbf;
  82         while (!(*ack & 0x40))
  83                 ;
  84         *ack &= 0xbf;
  85 }
  86
  87 static void _arch_dbg_con_putch(const char c)
  88 {
  89         volatile uint16 *ack = (uint16*)0xffe80010;
  90         volatile uint8 *fifo = (uint8*)0xffe8000c;
  91
  92         /* Wait until the transmit buffer has space */
  93         while (!(*ack & 0x20))
  94                 ;
  95         /* Send the char */
  96         *fifo = c;
  97
  98         /* Clear status */
  99         *ack &= 0x9f;
 100 }
 101
 102 char arch_dbg_con_putch(const char c)
 103 {
 104         if (c == '\n') {
 105                 _arch_dbg_con_putch('\r');
 106                 _arch_dbg_con_putch('\n');
 107         } else if (c != '\r')
 108                 _arch_dbg_con_putch(c);
 109
 110         return c;
 111 }
 112
 113 void arch_dbg_con_puts(const char *s)
 114 {
 115         while(*s != '\0') {
 116                 arch_dbg_con_putch(*s);
 117                 s++;
 118         }
 119 }
 120
 121 ssize_t arch_dbg_con_write(const void *buf, ssize_t len)
 122 {
 123         const char *cbuf = (const char *)buf;
 124         ssize_t ret = len;
 125
 126         while(len > 0) {
 127                 arch_dbg_con_putch(*cbuf);
 128                 cbuf++;
 129                 len--;
 130         }
 131         return ret;
 132 }
 133