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Fixed 64-bit Mode Segment Selection.
[nasm/sigaren-mirror.git] / disasm.c
blob4b1439df405f627d8e64aecd0e382057c916bc69
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <inttypes.h>
14
15 #include "nasm.h"
16 #include "disasm.h"
17 #include "sync.h"
18 #include "insns.h"
19
20 #include "names.c"
21
22 extern struct itemplate **itable[];
23
24 /*
25 * Flags that go into the `segment' field of `insn' structures
26 * during disassembly.
27 */
28 #define SEG_RELATIVE 1
29 #define SEG_32BIT 2
30 #define SEG_RMREG 4
31 #define SEG_DISP8 8
32 #define SEG_DISP16 16
33 #define SEG_DISP32 32
34 #define SEG_NODISP 64
35 #define SEG_SIGNED 128
36 #define SEG_64BIT 256
37
38 /*
39 * REX flags
40 */
41 #define REX_P 0x40 /* REX prefix present */
42 #define REX_W 0x08 /* 64-bit operand size */
43 #define REX_R 0x04 /* ModRM reg extension */
44 #define REX_X 0x02 /* SIB index extension */
45 #define REX_B 0x01 /* ModRM r/m extension */
46
47 #include "regdis.c"
48
49 #define getu8(x) (*(uint8_t *)(x))
50 #if defined(__i386__) || defined(__x86_64__)
51 /* Littleendian CPU which can handle unaligned references */
52 #define getu16(x) (*(uint16_t *)(x))
53 #define getu32(x) (*(uint32_t *)(x))
54 #define getu64(x) (*(uint64_t *)(x))
55 #else
56 static uint16_t getu16(uint8_t *data)
57 {
58 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
59 }
60 static uint32_t getu32(uint8_t *data)
61 {
62 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
63 }
64 static uint64_t getu64(uint8_t *data)
65 {
66 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
67 }
68 #endif
69
70 #define gets8(x) ((int8_t)getu8(x))
71 #define gets16(x) ((int16_t)getu16(x))
72 #define gets32(x) ((int32_t)getu32(x))
73 #define gets64(x) ((int64_t)getu64(x))
74
75 /* Important: regval must already have been adjusted for rex extensions */
76 static int whichreg(int32_t regflags, int regval, int rex)
77 {
78 if (!(REG_AL & ~regflags))
79 return R_AL;
80 if (!(REG_AX & ~regflags))
81 return R_AX;
82 if (!(REG_EAX & ~regflags))
83 return R_EAX;
84 if (!(REG_RAX & ~regflags))
85 return R_RAX;
86 if (!(REG_DL & ~regflags))
87 return R_DL;
88 if (!(REG_DX & ~regflags))
89 return R_DX;
90 if (!(REG_EDX & ~regflags))
91 return R_EDX;
92 if (!(REG_RDX & ~regflags))
93 return R_RDX;
94 if (!(REG_CL & ~regflags))
95 return R_CL;
96 if (!(REG_CX & ~regflags))
97 return R_CX;
98 if (!(REG_ECX & ~regflags))
99 return R_ECX;
100 if (!(REG_RCX & ~regflags))
101 return R_RCX;
102 if (!(FPU0 & ~regflags))
103 return R_ST0;
104 if (!(REG_CS & ~regflags))
105 return (regval == 1) ? R_CS : 0;
106 if (!(REG_DESS & ~regflags))
107 return (regval == 0 || regval == 2
108 || regval == 3 ? rd_sreg[regval] : 0);
109 if (!(REG_FSGS & ~regflags))
110 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
111 if (!(REG_SEG67 & ~regflags))
112 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
113
114 /* All the entries below look up regval in an 16-entry array */
115 if (regval < 0 || regval > 15)
116 return 0;
117
118 if (!(rex & REX_P) && regval > 7)
119 return 0; /* Internal error! */
120
121 if (!((REGMEM | BITS8) & ~regflags)) {
122 if (rex & REX_P)
123 return rd_reg8_rex[regval];
124 else
125 return rd_reg8[regval];
126 }
127 if (!((REGMEM | BITS16) & ~regflags))
128 return rd_reg16[regval];
129 if (!((REGMEM | BITS32) & ~regflags))
130 return rd_reg32[regval];
131 if (!((REGMEM | BITS64) & ~regflags))
132 return rd_reg64[regval];
133 if (!(REG_SREG & ~regflags))
134 return rd_sreg[regval & 7]; /* Ignore REX */
135 if (!(REG_CREG & ~regflags))
136 return rd_creg[regval];
137 if (!(REG_DREG & ~regflags))
138 return rd_dreg[regval];
139 if (!(REG_TREG & ~regflags)) {
140 if (rex & REX_P)
141 return 0; /* TR registers are ill-defined with rex */
142 return rd_treg[regval];
143 }
144 if (!(FPUREG & ~regflags))
145 return rd_fpureg[regval & 7]; /* Ignore REX */
146 if (!(MMXREG & ~regflags))
147 return rd_mmxreg[regval & 7]; /* Ignore REX */
148 if (!(XMMREG & ~regflags))
149 return rd_xmmreg[regval];
150
151 return 0;
152 }
153
154 static const char *whichcond(int condval)
155 {
156 static int conds[] = {
157 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
158 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
159 };
160 return conditions[conds[condval]];
161 }
162
163 /*
164 * Process an effective address (ModRM) specification.
165 */
166 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
167 int segsize, operand * op, int rex)
168 {
169 int mod, rm, scale, index, base;
170
171 mod = (modrm >> 6) & 03;
172 rm = modrm & 07;
173
174 if (mod == 3) { /* pure register version */
175 op->basereg = rm+(rex & REX_B ? 8 : 0);
176 op->segment |= SEG_RMREG;
177 return data;
178 }
179
180 op->addr_size = 0;
181
182 if (asize == 16) {
183 /*
184 * <mod> specifies the displacement size (none, byte or
185 * word), and <rm> specifies the register combination.
186 * Exception: mod=0,rm=6 does not specify [BP] as one might
187 * expect, but instead specifies [disp16].
188 */
189 op->indexreg = op->basereg = -1;
190 op->scale = 1; /* always, in 16 bits */
191 switch (rm) {
192 case 0:
193 op->basereg = R_BX;
194 op->indexreg = R_SI;
195 break;
196 case 1:
197 op->basereg = R_BX;
198 op->indexreg = R_DI;
199 break;
200 case 2:
201 op->basereg = R_BP;
202 op->indexreg = R_SI;
203 break;
204 case 3:
205 op->basereg = R_BP;
206 op->indexreg = R_DI;
207 break;
208 case 4:
209 op->basereg = R_SI;
210 break;
211 case 5:
212 op->basereg = R_DI;
213 break;
214 case 6:
215 op->basereg = R_BP;
216 break;
217 case 7:
218 op->basereg = R_BX;
219 break;
220 }
221 if (rm == 6 && mod == 0) { /* special case */
222 op->basereg = -1;
223 if (segsize != 16)
224 op->addr_size = 16;
225 mod = 2; /* fake disp16 */
226 }
227 switch (mod) {
228 case 0:
229 op->segment |= SEG_NODISP;
230 break;
231 case 1:
232 op->segment |= SEG_DISP8;
233 op->offset = (int8_t)*data++;
234 break;
235 case 2:
236 op->segment |= SEG_DISP16;
237 op->offset = *data++;
238 op->offset |= ((unsigned)*data++) << 8;
239 break;
240 }
241 return data;
242 } else {
243 /*
244 * Once again, <mod> specifies displacement size (this time
245 * none, byte or *dword*), while <rm> specifies the base
246 * register. Again, [EBP] is missing, replaced by a pure
247 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
248 * and RIP-relative addressing in 64-bit mode.
249 *
250 * However, rm=4
251 * indicates not a single base register, but instead the
252 * presence of a SIB byte...
253 */
254 int a64 = asize == 64;
255
256 op->indexreg = -1;
257
258 if (a64)
259 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
260 else
261 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
262
263 if (rm == 5 && mod == 0) {
264 if (segsize == 64) {
265 op->basereg = R_RIP;
266 op->segment |= SEG_RELATIVE;
267 mod = 2; /* fake disp32 */
268 } else {
269 op->basereg = -1;
270 if (segsize != 32)
271 op->addr_size = 32;
272 mod = 2; /* fake disp32 */
273 }
274 }
275
276 if (rm == 4) { /* process SIB */
277 scale = (*data >> 6) & 03;
278 index = (*data >> 3) & 07;
279 base = *data & 07;
280 data++;
281
282 op->scale = 1 << scale;
283
284 if (index == 4)
285 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
286 else if (a64)
287 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
288 else
289 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
290
291 if (base == 5 && mod == 0) {
292 op->basereg = -1;
293 mod = 2; /* Fake disp32 */
294 } else if (a64)
295 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
296 else
297 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
298 }
299
300 switch (mod) {
301 case 0:
302 op->segment |= SEG_NODISP;
303 break;
304 case 1:
305 op->segment |= SEG_DISP8;
306 op->offset = gets8(data);
307 data++;
308 break;
309 case 2:
310 op->segment |= SEG_DISP32;
311 op->offset = getu32(data);
312 data += 4;
313 break;
314 }
315 return data;
316 }
317 }
318
319 /*
320 * Determine whether the instruction template in t corresponds to the data
321 * stream in data. Return the number of bytes matched if so.
322 */
323 static int matches(struct itemplate *t, uint8_t *data, int asize,
324 int osize, int segsize, int rep, insn * ins,
325 int rex, int *rexout)
326 {
327 uint8_t *r = (uint8_t *)(t->code);
328 uint8_t *origdata = data;
329 int a_used = FALSE, o_used = FALSE;
330 int drep = 0;
331
332 *rexout = rex;
333
334 if (segsize == 64) {
335 if (t->flags & IF_NOLONG)
336 return FALSE;
337 } else {
338 if (t->flags & IF_X64)
339 return FALSE;
340 }
341
342 if (rep == 0xF2)
343 drep = P_REPNE;
344 else if (rep == 0xF3)
345 drep = P_REP;
346
347 while (*r) {
348 int c = *r++;
349
350 /* FIX: change this into a switch */
351 if (c >= 01 && c <= 03) {
352 while (c--)
353 if (*r++ != *data++)
354 return FALSE;
355 } else if (c == 04) {
356 switch (*data++) {
357 case 0x07:
358 ins->oprs[0].basereg = 0;
359 break;
360 case 0x17:
361 ins->oprs[0].basereg = 2;
362 break;
363 case 0x1F:
364 ins->oprs[0].basereg = 3;
365 break;
366 default:
367 return FALSE;
368 }
369 } else if (c == 05) {
370 switch (*data++) {
371 case 0xA1:
372 ins->oprs[0].basereg = 4;
373 break;
374 case 0xA9:
375 ins->oprs[0].basereg = 5;
376 break;
377 default:
378 return FALSE;
379 }
380 } else if (c == 06) {
381 switch (*data++) {
382 case 0x06:
383 ins->oprs[0].basereg = 0;
384 break;
385 case 0x0E:
386 ins->oprs[0].basereg = 1;
387 break;
388 case 0x16:
389 ins->oprs[0].basereg = 2;
390 break;
391 case 0x1E:
392 ins->oprs[0].basereg = 3;
393 break;
394 default:
395 return FALSE;
396 }
397 } else if (c == 07) {
398 switch (*data++) {
399 case 0xA0:
400 ins->oprs[0].basereg = 4;
401 break;
402 case 0xA8:
403 ins->oprs[0].basereg = 5;
404 break;
405 default:
406 return FALSE;
407 }
408 } else if (c >= 010 && c <= 012) {
409 int t = *r++, d = *data++;
410 if (d < t || d > t + 7)
411 return FALSE;
412 else {
413 ins->oprs[c - 010].basereg = (d-t)+(rex & REX_B ? 8 : 0);
414 ins->oprs[c - 010].segment |= SEG_RMREG;
415 }
416 } else if (c == 017) {
417 if (*data++)
418 return FALSE;
419 } else if (c >= 014 && c <= 016) {
420 ins->oprs[c - 014].offset = (int8_t)*data++;
421 ins->oprs[c - 014].segment |= SEG_SIGNED;
422 } else if (c >= 020 && c <= 022) {
423 ins->oprs[c - 020].offset = *data++;
424 } else if (c >= 024 && c <= 026) {
425 ins->oprs[c - 024].offset = *data++;
426 } else if (c >= 030 && c <= 032) {
427 ins->oprs[c - 030].offset = getu16(data);
428 data += 2;
429 } else if (c >= 034 && c <= 036) {
430 if (osize == 32) {
431 ins->oprs[c - 034].offset = getu32(data);
432 data += 4;
433 } else {
434 ins->oprs[c - 034].offset = getu16(data);
435 data += 2;
436 }
437 if (segsize != asize)
438 ins->oprs[c - 034].addr_size = asize;
439 } else if (c >= 040 && c <= 042) {
440 ins->oprs[c - 040].offset = getu32(data);
441 data += 4;
442 } else if (c >= 044 && c <= 046) {
443 switch (asize) {
444 case 16:
445 ins->oprs[c - 044].offset = getu16(data);
446 data += 2;
447 break;
448 case 32:
449 ins->oprs[c - 044].offset = getu32(data);
450 data += 4;
451 break;
452 case 64:
453 ins->oprs[c - 044].offset = getu64(data);
454 data += 8;
455 break;
456 }
457 if (segsize != asize)
458 ins->oprs[c - 044].addr_size = asize;
459 } else if (c >= 050 && c <= 052) {
460 ins->oprs[c - 050].offset = gets8(data++);
461 ins->oprs[c - 050].segment |= SEG_RELATIVE;
462 } else if (c >= 054 && c <= 056) {
463 ins->oprs[c - 054].offset = getu64(data);
464 data += 8;
465 } else if (c >= 060 && c <= 062) {
466 ins->oprs[c - 060].offset = gets16(data);
467 data += 2;
468 ins->oprs[c - 060].segment |= SEG_RELATIVE;
469 ins->oprs[c - 060].segment &= ~SEG_32BIT;
470 } else if (c >= 064 && c <= 066) {
471 if (osize == 16) {
472 ins->oprs[c - 064].offset = getu16(data);
473 data += 2;
474 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
475 } else if (osize == 32) {
476 ins->oprs[c - 064].offset = getu32(data);
477 data += 4;
478 ins->oprs[c - 064].segment &= ~SEG_64BIT;
479 ins->oprs[c - 064].segment |= SEG_32BIT;
480 }
481 if (segsize != osize) {
482 ins->oprs[c - 064].type =
483 (ins->oprs[c - 064].type & NON_SIZE)
484 | ((osize == 16) ? BITS16 : BITS32);
485 }
486 } else if (c >= 070 && c <= 072) {
487 ins->oprs[c - 070].offset = getu32(data);
488 data += 4;
489 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
490 } else if (c >= 0100 && c < 0130) {
491 int modrm = *data++;
492 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+(rex & REX_R ? 8 : 0);
493 ins->oprs[c & 07].segment |= SEG_RMREG;
494 data = do_ea(data, modrm, asize, segsize,
495 &ins->oprs[(c >> 3) & 07], rex);
496 } else if (c >= 0130 && c <= 0132) {
497 ins->oprs[c - 0130].offset = getu16(data);
498 data += 2;
499 } else if (c >= 0140 && c <= 0142) {
500 ins->oprs[c - 0140].offset = getu32(data);
501 data += 4;
502 } else if (c >= 0200 && c <= 0277) {
503 int modrm = *data++;
504 if (((modrm >> 3) & 07) != (c & 07))
505 return FALSE; /* spare field doesn't match up */
506 data = do_ea(data, modrm, asize, segsize,
507 &ins->oprs[(c >> 3) & 07], rex);
508 } else if (c >= 0300 && c <= 0302) {
509 a_used = TRUE;
510 } else if (c == 0310) {
511 if (asize != 16)
512 return FALSE;
513 else
514 a_used = TRUE;
515 } else if (c == 0311) {
516 if (asize == 16)
517 return FALSE;
518 else
519 a_used = TRUE;
520 } else if (c == 0312) {
521 if (asize != segsize)
522 return FALSE;
523 else
524 a_used = TRUE;
525 } else if (c == 0320) {
526 if (osize != 16)
527 return FALSE;
528 else
529 o_used = TRUE;
530 } else if (c == 0321) {
531 if (osize != 32)
532 return FALSE;
533 else
534 o_used = TRUE;
535 } else if (c == 0322) {
536 if (osize != (segsize == 16) ? 16 : 32)
537 return FALSE;
538 else
539 o_used = TRUE;
540 } else if (c == 0323) {
541 rex |= REX_W; /* 64-bit only instruction */
542 osize = 64;
543 } else if (c == 0324) {
544 if (!(rex & (REX_P|REX_W)) || osize != 64)
545 return FALSE;
546 } else if (c == 0330) {
547 int t = *r++, d = *data++;
548 if (d < t || d > t + 15)
549 return FALSE;
550 else
551 ins->condition = d - t;
552 } else if (c == 0331) {
553 if (rep)
554 return FALSE;
555 } else if (c == 0332) {
556 if (drep == P_REP)
557 drep = P_REPE;
558 } else if (c == 0333) {
559 if (rep != 0xF3)
560 return FALSE;
561 drep = 0;
562 }
563 }
564
565 /*
566 * Check for unused rep or a/o prefixes.
567 */
568 ins->nprefix = 0;
569 if (drep)
570 ins->prefixes[ins->nprefix++] = drep;
571 if (!a_used && asize != segsize)
572 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
573 if (!o_used && osize == ((segsize == 16) ? 32 : 16)) {
574 fprintf(stderr, "osize = %d, segsize = %d\n", osize, segsize);
575 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
576 }
577
578 /* Fix: check for redundant REX prefixes */
579
580 *rexout = rex;
581 return data - origdata;
582 }
583
584 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
585 int32_t offset, int autosync, uint32_t prefer)
586 {
587 struct itemplate **p, **best_p;
588 int length, best_length = 0;
589 char *segover;
590 int rep, lock, asize, osize, i, slen, colon, rex, rexout, best_rex;
591 uint8_t *origdata;
592 int works;
593 insn tmp_ins, ins;
594 uint32_t goodness, best;
595
596 /*
597 * Scan for prefixes.
598 */
599 asize = segsize;
600 osize = (segsize == 64) ? 32 : segsize;
601 rex = 0;
602 segover = NULL;
603 rep = lock = 0;
604 origdata = data;
605 for (;;) {
606 if (*data == 0xF3 || *data == 0xF2)
607 rep = *data++;
608 else if (*data == 0xF0)
609 lock = *data++;
610 else if (*data == 0x2E)
611 segover = "cs", data++;
612 else if (*data == 0x36)
613 segover = "ss", data++;
614 else if (*data == 0x3E)
615 segover = "ds", data++;
616 else if (*data == 0x26)
617 segover = "es", data++;
618 else if (*data == 0x64)
619 segover = "fs", data++;
620 else if (*data == 0x65)
621 segover = "gs", data++;
622 else if (*data == 0x66) {
623 osize = (segsize == 16) ? 32 : 16;
624 data++;
625 } else if (*data == 0x67) {
626 asize = (segsize == 32) ? 16 : 32;
627 data++;
628 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
629 rex = *data++;
630 if (rex & REX_W)
631 osize = 64;
632 break; /* REX is always the last prefix */
633 } else {
634 break;
635 }
636 }
637
638 tmp_ins.oprs[0].segment = tmp_ins.oprs[1].segment =
639 tmp_ins.oprs[2].segment =
640 tmp_ins.oprs[0].addr_size = tmp_ins.oprs[1].addr_size =
641 tmp_ins.oprs[2].addr_size = (segsize == 64 ? SEG_64BIT :
642 segsize == 32 ? SEG_32BIT : 0);
643 tmp_ins.condition = -1;
644 best = -1; /* Worst possible */
645 best_p = NULL;
646 best_rex = 0;
647 for (p = itable[*data]; *p; p++) {
648 if ((length = matches(*p, data, asize, osize,
649 segsize, rep, &tmp_ins, rex, &rexout))) {
650 works = TRUE;
651 /*
652 * Final check to make sure the types of r/m match up.
653 */
654 for (i = 0; i < (*p)->operands; i++) {
655 if (
656 /* If it's a mem-only EA but we have a register, die. */
657 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
658 !(MEMORY & ~(*p)->opd[i])) ||
659 /* If it's a reg-only EA but we have a memory ref, die. */
660 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
661 !(REGNORM & ~(*p)->opd[i]) &&
662 !((*p)->opd[i] & REG_SMASK)) ||
663 /* Register type mismatch (eg FS vs REG_DESS): die. */
664 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
665 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
666 !whichreg((*p)->opd[i],
667 tmp_ins.oprs[i].basereg, rexout))) {
668 works = FALSE;
669 break;
670 }
671 }
672
673 if (works) {
674 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
675 if (goodness < best) {
676 /* This is the best one found so far */
677 best = goodness;
678 best_p = p;
679 best_length = length;
680 ins = tmp_ins;
681 best_rex = rexout;
682 }
683 }
684 }
685 }
686
687 if (!best_p)
688 return 0; /* no instruction was matched */
689
690 /* Pick the best match */
691 p = best_p;
692 length = best_length;
693 rex = best_rex;
694 if (best_rex & REX_W)
695 osize = 64;
696
697 slen = 0;
698
699 /* TODO: snprintf returns the value that the string would have if
700 * the buffer were long enough, and not the actual length of
701 * the returned string, so each instance of using the return
702 * value of snprintf should actually be checked to assure that
703 * the return value is "sane." Maybe a macro wrapper could
704 * be used for that purpose.
705 */
706 if (lock)
707 slen += snprintf(output + slen, outbufsize - slen, "lock ");
708 for (i = 0; i < ins.nprefix; i++)
709 switch (ins.prefixes[i]) {
710 case P_REP:
711 slen += snprintf(output + slen, outbufsize - slen, "rep ");
712 break;
713 case P_REPE:
714 slen += snprintf(output + slen, outbufsize - slen, "repe ");
715 break;
716 case P_REPNE:
717 slen += snprintf(output + slen, outbufsize - slen, "repne ");
718 break;
719 case P_A16:
720 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
721 break;
722 case P_A32:
723 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
724 break;
725 case P_O16:
726 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
727 break;
728 case P_O32:
729 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
730 break;
731 }
732
733 for (i = 0; i < elements(ico); i++)
734 if ((*p)->opcode == ico[i]) {
735 slen +=
736 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
737 whichcond(ins.condition));
738 break;
739 }
740 if (i >= elements(ico))
741 slen +=
742 snprintf(output + slen, outbufsize - slen, "%s",
743 insn_names[(*p)->opcode]);
744 colon = FALSE;
745 length += data - origdata; /* fix up for prefixes */
746 for (i = 0; i < (*p)->operands; i++) {
747 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
748
749 if (ins.oprs[i].segment & SEG_RELATIVE) {
750 ins.oprs[i].offset += offset + length;
751 /*
752 * sort out wraparound
753 */
754 if (!(ins.oprs[i].segment & (SEG_32BIT|SEG_64BIT)))
755 ins.oprs[i].offset &= 0xffff;
756 /*
757 * add sync marker, if autosync is on
758 */
759 if (autosync)
760 add_sync(ins.oprs[i].offset, 0L);
761 }
762
763 if ((*p)->opd[i] & COLON)
764 colon = TRUE;
765 else
766 colon = FALSE;
767
768 if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
769 (ins.oprs[i].segment & SEG_RMREG)) {
770 ins.oprs[i].basereg = whichreg((*p)->opd[i],
771 ins.oprs[i].basereg, rex);
772 if ((*p)->opd[i] & TO)
773 slen += snprintf(output + slen, outbufsize - slen, "to ");
774 slen += snprintf(output + slen, outbufsize - slen, "%s",
775 reg_names[ins.oprs[i].basereg -
776 EXPR_REG_START]);
777 } else if (!(UNITY & ~(*p)->opd[i])) {
778 output[slen++] = '1';
779 } else if ((*p)->opd[i] & IMMEDIATE) {
780 if ((*p)->opd[i] & BITS8) {
781 slen +=
782 snprintf(output + slen, outbufsize - slen, "byte ");
783 if (ins.oprs[i].segment & SEG_SIGNED) {
784 if (ins.oprs[i].offset < 0) {
785 ins.oprs[i].offset *= -1;
786 output[slen++] = '-';
787 } else
788 output[slen++] = '+';
789 }
790 } else if ((*p)->opd[i] & BITS16) {
791 slen +=
792 snprintf(output + slen, outbufsize - slen, "word ");
793 } else if ((*p)->opd[i] & BITS32) {
794 slen +=
795 snprintf(output + slen, outbufsize - slen, "dword ");
796 } else if ((*p)->opd[i] & BITS64) {
797 slen +=
798 snprintf(output + slen, outbufsize - slen, "qword ");
799 } else if ((*p)->opd[i] & NEAR) {
800 slen +=
801 snprintf(output + slen, outbufsize - slen, "near ");
802 } else if ((*p)->opd[i] & SHORT) {
803 slen +=
804 snprintf(output + slen, outbufsize - slen, "short ");
805 }
806 slen +=
807 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
808 ins.oprs[i].offset);
809 } else if (!(MEM_OFFS & ~(*p)->opd[i])) {
810 slen +=
811 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
812 ((const char*)segover ? (const char*)segover : ""), /* placate type mistmatch warning */
813 ((const char*)segover ? ":" : ""), /* by using (const char*) instead of uint8_t* */
814 (ins.oprs[i].addr_size ==
815 32 ? "dword " : ins.oprs[i].addr_size ==
816 16 ? "word " : ""), ins.oprs[i].offset);
817 segover = NULL;
818 } else if (!(REGMEM & ~(*p)->opd[i])) {
819 int started = FALSE;
820 if ((*p)->opd[i] & BITS8)
821 slen +=
822 snprintf(output + slen, outbufsize - slen, "byte ");
823 if ((*p)->opd[i] & BITS16)
824 slen +=
825 snprintf(output + slen, outbufsize - slen, "word ");
826 if ((*p)->opd[i] & BITS32)
827 slen +=
828 snprintf(output + slen, outbufsize - slen, "dword ");
829 if ((*p)->opd[i] & BITS64)
830 slen +=
831 snprintf(output + slen, outbufsize - slen, "qword ");
832 if ((*p)->opd[i] & BITS80)
833 slen +=
834 snprintf(output + slen, outbufsize - slen, "tword ");
835 if ((*p)->opd[i] & FAR)
836 slen += snprintf(output + slen, outbufsize - slen, "far ");
837 if ((*p)->opd[i] & NEAR)
838 slen +=
839 snprintf(output + slen, outbufsize - slen, "near ");
840 output[slen++] = '[';
841 if (ins.oprs[i].addr_size)
842 slen += snprintf(output + slen, outbufsize - slen, "%s",
843 (ins.oprs[i].addr_size == 64 ? "qword " :
844 ins.oprs[i].addr_size == 32 ? "dword " :
845 ins.oprs[i].addr_size == 16 ? "word " :
846 ""));
847 if (segover) {
848 slen +=
849 snprintf(output + slen, outbufsize - slen, "%s:",
850 segover);
851 segover = NULL;
852 }
853 if (ins.oprs[i].basereg != -1) {
854 slen += snprintf(output + slen, outbufsize - slen, "%s",
855 reg_names[(ins.oprs[i].basereg -
856 EXPR_REG_START)]);
857 started = TRUE;
858 }
859 if (ins.oprs[i].indexreg != -1) {
860 if (started)
861 output[slen++] = '+';
862 slen += snprintf(output + slen, outbufsize - slen, "%s",
863 reg_names[(ins.oprs[i].indexreg -
864 EXPR_REG_START)]);
865 if (ins.oprs[i].scale > 1)
866 slen +=
867 snprintf(output + slen, outbufsize - slen, "*%d",
868 ins.oprs[i].scale);
869 started = TRUE;
870 }
871 if (ins.oprs[i].segment & SEG_DISP8) {
872 int minus = 0;
873 int8_t offset = ins.oprs[i].offset;
874 if (offset < 0) {
875 minus = 1;
876 offset = -offset;
877 }
878 slen +=
879 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
880 minus ? "-" : "+", offset);
881 } else if (ins.oprs[i].segment & SEG_DISP16) {
882 int minus = 0;
883 int16_t offset = ins.oprs[i].offset;
884 if (offset < 0) {
885 minus = 1;
886 offset = -offset;
887 }
888 slen +=
889 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
890 minus ? "-" : started ? "+" : "", offset);
891 } else if (ins.oprs[i].segment & SEG_DISP32) {
892 char *prefix = "";
893 int32_t offset = ins.oprs[i].offset;
894 if (ins.oprs[i].basereg == R_RIP) {
895 prefix = ":";
896 } else if (offset < 0) {
897 offset = -offset;
898 prefix = "-";
899 } else {
900 prefix = started ? "+" : "";
901 }
902 slen +=
903 snprintf(output + slen, outbufsize - slen,
904 "%s0x%"PRIx32"", prefix, offset);
905 }
906 output[slen++] = ']';
907 } else {
908 slen +=
909 snprintf(output + slen, outbufsize - slen, "<operand%d>",
910 i);
911 }
912 }
913 output[slen] = '\0';
914 if (segover) { /* unused segment override */
915 char *p = output;
916 int count = slen + 1;
917 while (count--)
918 p[count + 3] = p[count];
919 strncpy(output, segover, 2);
920 output[2] = ' ';
921 }
922 return length;
923 }
924
925 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
926 {
927 snprintf(output, outbufsize, "db 0x%02X", *data);
928 return 1;
929 }
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