disasm.c

   1 /* disasm.c   where all the _work_ gets done in the Netwide Disassembler
   2  *
   3  * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
   4  * Julian Hall. All rights reserved. The software is
   5  * redistributable under the licence given in the file "Licence"
   6  * distributed in the NASM archive.
   7  *
   8  * initial version 27/iii/95 by Simon Tatham
   9  */
  10
  11 #include <stdio.h>
  12 #include <string.h>
  13
  14 #include "nasm.h"
  15 #include "disasm.h"
  16 #include "sync.h"
  17 #include "insns.h"
  18
  19 #include "names.c"
  20
  21 extern struct itemplate **itable[];
  22
  23 /*
  24  * Flags that go into the `segment' field of `insn' structures
  25  * during disassembly.
  26  */
  27 #define SEG_RELATIVE 1
  28 #define SEG_32BIT 2
  29 #define SEG_RMREG 4
  30 #define SEG_DISP8 8
  31 #define SEG_DISP16 16
  32 #define SEG_DISP32 32
  33 #define SEG_NODISP 64
  34 #define SEG_SIGNED 128
  35
  36 static int whichreg(long regflags, int regval) {
  37     static int reg32[] = {
  38         R_EAX, R_ECX, R_EDX, R_EBX, R_ESP, R_EBP, R_ESI, R_EDI };
  39     static int reg16[] = {
  40         R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI };
  41     static int reg8[] = {
  42         R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH };
  43     static int sreg[] = {
  44         R_ES, R_CS, R_SS, R_DS, R_FS, R_GS, 0, 0 };
  45     static int creg[] = {
  46         R_CR0, 0, R_CR2, R_CR3, R_CR4, 0, 0, 0 };
  47     static int dreg[] = {
  48         R_DR0, R_DR1, R_DR2, R_DR3, 0, 0, R_DR6, R_DR7 };
  49     static int treg[] = {
  50         0, 0, 0, R_TR3, R_TR4, R_TR5, R_TR6, R_TR7 };
  51     static int fpureg[] = {
  52         R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7 };
  53     static int mmxreg[] = {
  54         R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7 };
  55
  56     if (!(REG_AL & ~regflags))
  57         return R_AL;
  58     if (!(REG_AX & ~regflags))
  59         return R_AX;
  60     if (!(REG_EAX & ~regflags))
  61         return R_EAX;
  62     if (!(REG_DX & ~regflags))
  63         return R_DX;
  64     if (!(REG_CL & ~regflags))
  65         return R_CL;
  66     if (!(REG_CX & ~regflags))
  67         return R_CX;
  68     if (!(REG_ECX & ~regflags))
  69         return R_ECX;
  70     if (!(REG_CR4 & ~regflags))
  71         return R_CR4;
  72     if (!(FPU0 & ~regflags))
  73         return R_ST0;
  74     if (!((REGMEM|BITS8) & ~regflags))
  75         return reg8[regval];
  76     if (!((REGMEM|BITS16) & ~regflags))
  77         return reg16[regval];
  78     if (!((REGMEM|BITS32) & ~regflags))
  79         return reg32[regval];
  80     if (!(REG_SREG & ~regflags))
  81         return sreg[regval];
  82     if (!(REG_CREG & ~regflags))
  83         return creg[regval];
  84     if (!(REG_DREG & ~regflags))
  85         return dreg[regval];
  86     if (!(REG_TREG & ~regflags))
  87         return treg[regval];
  88     if (!(FPUREG & ~regflags))
  89         return fpureg[regval];
  90     if (!(MMXREG & ~regflags))
  91         return mmxreg[regval];
  92     return 0;
  93 }
  94
  95 static char *whichcond(int condval) {
  96     static int conds[] = {
  97         C_O, C_NO, C_B, C_AE, C_E, C_NE, C_BE, C_A,
  98         C_S, C_NS, C_PE, C_PO, C_L, C_GE, C_LE, C_G
  99     };
 100     return conditions[conds[condval]];
 101 }
 102
 103 /*
 104  * Process an effective address (ModRM) specification.
 105  */
 106 static unsigned char *do_ea (unsigned char *data, int modrm, int asize,
 107                              int segsize, operand *op) {
 108     int mod, rm, scale, index, base;
 109
 110     mod = (modrm >> 6) & 03;
 111     rm = modrm & 07;
 112
 113     if (mod == 3) {                    /* pure register version */
 114         op->basereg = rm;
 115         op->segment |= SEG_RMREG;
 116         return data;
 117     }
 118
 119     op->addr_size = 0;
 120
 121     if (asize == 16) {
 122         /*
 123          * <mod> specifies the displacement size (none, byte or
 124          * word), and <rm> specifies the register combination.
 125          * Exception: mod=0,rm=6 does not specify [BP] as one might
 126          * expect, but instead specifies [disp16].
 127          */
 128         op->indexreg = op->basereg = -1;
 129         op->scale = 1;                 /* always, in 16 bits */
 130         switch (rm) {
 131           case 0: op->basereg = R_BX; op->indexreg = R_SI; break;
 132           case 1: op->basereg = R_BX; op->indexreg = R_DI; break;
 133           case 2: op->basereg = R_BP; op->indexreg = R_SI; break;
 134           case 3: op->basereg = R_BP; op->indexreg = R_DI; break;
 135           case 4: op->basereg = R_SI; break;
 136           case 5: op->basereg = R_DI; break;
 137           case 6: op->basereg = R_BP; break;
 138           case 7: op->basereg = R_BX; break;
 139         }
 140         if (rm == 6 && mod == 0) {     /* special case */
 141             op->basereg = -1;
 142             if (segsize != 16)
 143                 op->addr_size = 16;
 144             mod = 2;                   /* fake disp16 */
 145         }
 146         switch (mod) {
 147           case 0:
 148             op->segment |= SEG_NODISP;
 149             break;
 150           case 1:
 151             op->segment |= SEG_DISP8;
 152             op->offset = (signed char) *data++;
 153             break;
 154           case 2:
 155             op->segment |= SEG_DISP16;
 156             op->offset = *data++;
 157             op->offset |= (*data++) << 8;
 158             break;
 159         }
 160         return data;
 161     } else {
 162         /*
 163          * Once again, <mod> specifies displacement size (this time
 164          * none, byte or *dword*), while <rm> specifies the base
 165          * register. Again, [EBP] is missing, replaced by a pure
 166          * disp32 (this time that's mod=0,rm=*5*). However, rm=4
 167          * indicates not a single base register, but instead the
 168          * presence of a SIB byte...
 169          */
 170         op->indexreg = -1;
 171         switch (rm) {
 172           case 0: op->basereg = R_EAX; break;
 173           case 1: op->basereg = R_ECX; break;
 174           case 2: op->basereg = R_EDX; break;
 175           case 3: op->basereg = R_EBX; break;
 176           case 5: op->basereg = R_EBP; break;
 177           case 6: op->basereg = R_ESI; break;
 178           case 7: op->basereg = R_EDI; break;
 179         }
 180         if (rm == 5 && mod == 0) {
 181             op->basereg = -1;
 182             if (segsize != 32)
 183                 op->addr_size = 32;
 184             mod = 2;                   /* fake disp32 */
 185         }
 186         if (rm == 4) {                 /* process SIB */
 187             scale = (*data >> 6) & 03;
 188             index = (*data >> 3) & 07;
 189             base = *data & 07;
 190             data++;
 191
 192             op->scale = 1 << scale;
 193             switch (index) {
 194               case 0: op->indexreg = R_EAX; break;
 195               case 1: op->indexreg = R_ECX; break;
 196               case 2: op->indexreg = R_EDX; break;
 197               case 3: op->indexreg = R_EBX; break;
 198               case 4: op->indexreg = -1; break;
 199               case 5: op->indexreg = R_EBP; break;
 200               case 6: op->indexreg = R_ESI; break;
 201               case 7: op->indexreg = R_EDI; break;
 202             }
 203
 204             switch (base) {
 205               case 0: op->basereg = R_EAX; break;
 206               case 1: op->basereg = R_ECX; break;
 207               case 2: op->basereg = R_EDX; break;
 208               case 3: op->basereg = R_EBX; break;
 209               case 4: op->basereg = R_ESP; break;
 210               case 6: op->basereg = R_ESI; break;
 211               case 7: op->basereg = R_EDI; break;
 212               case 5:
 213                 if (mod == 0) {
 214                     mod = 2;
 215                     op->basereg = -1;
 216                 } else
 217                     op->basereg = R_EBP;
 218                 break;
 219             }
 220         }
 221         switch (mod) {
 222           case 0:
 223             op->segment |= SEG_NODISP;
 224             break;
 225           case 1:
 226             op->segment |= SEG_DISP8;
 227             op->offset = (signed char) *data++;
 228             break;
 229           case 2:
 230             op->segment |= SEG_DISP32;
 231             op->offset = *data++;
 232             op->offset |= (*data++) << 8;
 233             op->offset |= ((long) *data++) << 16;
 234             op->offset |= ((long) *data++) << 24;
 235             break;
 236         }
 237         return data;
 238     }
 239 }
 240
 241 /*
 242  * Determine whether the code string in r corresponds to the data
 243  * stream in data. Return the number of bytes matched if so.
 244  */
 245 static int matches (unsigned char *r, unsigned char *data, int asize,
 246                     int osize, int segsize, insn *ins) {
 247     unsigned char *origdata = data;
 248     int a_used = FALSE, o_used = FALSE;
 249
 250     while (*r) {
 251         int c = *r++;
 252         if (c >= 01 && c <= 03) {
 253             while (c--)
 254                 if (*r++ != *data++)
 255                     return FALSE;
 256         }
 257         if (c == 04) {
 258             switch (*data++) {
 259               case 0x07: ins->oprs[0].basereg = 0; break;
 260               case 0x17: ins->oprs[0].basereg = 2; break;
 261               case 0x1F: ins->oprs[0].basereg = 3; break;
 262               default: return FALSE;
 263             }
 264         }
 265         if (c == 05) {
 266             switch (*data++) {
 267               case 0xA1: ins->oprs[0].basereg = 4; break;
 268               case 0xA9: ins->oprs[0].basereg = 5; break;
 269               default: return FALSE;
 270             }
 271         }
 272         if (c == 06) {
 273             switch (*data++) {
 274               case 0x06: ins->oprs[0].basereg = 0; break;
 275               case 0x0E: ins->oprs[0].basereg = 1; break;
 276               case 0x16: ins->oprs[0].basereg = 2; break;
 277               case 0x1E: ins->oprs[0].basereg = 3; break;
 278               default: return FALSE;
 279             }
 280         }
 281         if (c == 07) {
 282             switch (*data++) {
 283               case 0xA0: ins->oprs[0].basereg = 4; break;
 284               case 0xA8: ins->oprs[0].basereg = 5; break;
 285               default: return FALSE;
 286             }
 287         }
 288         if (c >= 010 && c <= 012) {
 289             int t = *r++, d = *data++;
 290             if (d < t || d > t+7)
 291                 return FALSE;
 292             else {
 293                 ins->oprs[c-010].basereg = d-t;
 294                 ins->oprs[c-010].segment |= SEG_RMREG;
 295             }
 296         }
 297         if (c == 017)
 298             if (*data++)
 299                 return FALSE;
 300         if (c >= 014 && c <= 016) {
 301             ins->oprs[c-014].offset = (signed char) *data++;
 302             ins->oprs[c-014].segment |= SEG_SIGNED;
 303         }
 304         if (c >= 020 && c <= 022)
 305             ins->oprs[c-020].offset = *data++;
 306         if (c >= 024 && c <= 026)
 307             ins->oprs[c-024].offset = *data++;
 308         if (c >= 030 && c <= 032) {
 309             ins->oprs[c-030].offset = *data++;
 310             ins->oprs[c-030].offset |= (*data++ << 8);
 311         }
 312         if (c >= 034 && c <= 036) {
 313             ins->oprs[c-034].offset = *data++;
 314             ins->oprs[c-034].offset |= (*data++ << 8);
 315             if (asize == 32) {
 316                 ins->oprs[c-034].offset |= (((long) *data++) << 16);
 317                 ins->oprs[c-034].offset |= (((long) *data++) << 24);
 318             }
 319             if (segsize != asize)
 320                 ins->oprs[c-034].addr_size = asize;
 321         }
 322         if (c >= 040 && c <= 042) {
 323             ins->oprs[c-040].offset = *data++;
 324             ins->oprs[c-040].offset |= (*data++ << 8);
 325             ins->oprs[c-040].offset |= (((long) *data++) << 16);
 326             ins->oprs[c-040].offset |= (((long) *data++) << 24);
 327         }
 328         if (c >= 050 && c <= 052) {
 329             ins->oprs[c-050].offset = (signed char) *data++;
 330             ins->oprs[c-050].segment |= SEG_RELATIVE;
 331         }
 332         if (c >= 060 && c <= 062) {
 333             ins->oprs[c-060].offset = *data++;
 334             ins->oprs[c-060].offset |= (*data++ << 8);
 335             ins->oprs[c-060].segment |= SEG_RELATIVE;
 336             ins->oprs[c-060].segment &= ~SEG_32BIT;
 337         }
 338         if (c >= 064 && c <= 066) {
 339             ins->oprs[c-064].offset = *data++;
 340             ins->oprs[c-064].offset |= (*data++ << 8);
 341             if (asize == 32) {
 342                 ins->oprs[c-064].offset |= (((long) *data++) << 16);
 343                 ins->oprs[c-064].offset |= (((long) *data++) << 24);
 344                 ins->oprs[c-064].segment |= SEG_32BIT;
 345             } else
 346                 ins->oprs[c-064].segment &= ~SEG_32BIT;
 347             ins->oprs[c-064].segment |= SEG_RELATIVE;
 348             if (segsize != asize)
 349                 ins->oprs[c-064].addr_size = asize;
 350         }
 351         if (c >= 070 && c <= 072) {
 352             ins->oprs[c-070].offset = *data++;
 353             ins->oprs[c-070].offset |= (*data++ << 8);
 354             ins->oprs[c-070].offset |= (((long) *data++) << 16);
 355             ins->oprs[c-070].offset |= (((long) *data++) << 24);
 356             ins->oprs[c-070].segment |= SEG_32BIT | SEG_RELATIVE;
 357         }
 358         if (c >= 0100 && c <= 0177) {
 359             int modrm = *data++;
 360             ins->oprs[c & 07].basereg = (modrm >> 3) & 07;
 361             ins->oprs[c & 07].segment |= SEG_RMREG;
 362             data = do_ea (data, modrm, asize, segsize,
 363                           &ins->oprs[(c >> 3) & 07]);
 364         }
 365         if (c >= 0200 && c <= 0277) {
 366             int modrm = *data++;
 367             if (((modrm >> 3) & 07) != (c & 07))
 368                 return FALSE;          /* spare field doesn't match up */
 369             data = do_ea (data, modrm, asize, segsize,
 370                           &ins->oprs[(c >> 3) & 07]);
 371         }
 372         if (c >= 0300 && c <= 0302) {
 373             if (asize)
 374                 ins->oprs[c-0300].segment |= SEG_32BIT;
 375             else
 376                 ins->oprs[c-0300].segment &= ~SEG_32BIT;
 377             a_used = TRUE;
 378         }
 379         if (c == 0310) {
 380             if (asize == 32)
 381                 return FALSE;
 382             else
 383                 a_used = TRUE;
 384         }
 385         if (c == 0311) {
 386             if (asize == 16)
 387                 return FALSE;
 388             else
 389                 a_used = TRUE;
 390         }
 391         if (c == 0312) {
 392             if (asize != segsize)
 393                 return FALSE;
 394             else
 395                 a_used = TRUE;
 396         }
 397         if (c == 0320) {
 398             if (osize == 32)
 399                 return FALSE;
 400             else
 401                 o_used = TRUE;
 402         }
 403         if (c == 0321) {
 404             if (osize == 16)
 405                 return FALSE;
 406             else
 407                 o_used = TRUE;
 408         }
 409         if (c == 0322) {
 410             if (osize != segsize)
 411                 return FALSE;
 412             else
 413                 o_used = TRUE;
 414         }
 415         if (c == 0330) {
 416             int t = *r++, d = *data++;
 417             if (d < t || d > t+15)
 418                 return FALSE;
 419             else
 420                 ins->condition = d - t;
 421         }
 422     }
 423
 424     /*
 425      * Check for unused a/o prefixes.
 426      */
 427     ins->nprefix = 0;
 428     if (!a_used && asize != segsize)
 429         ins->prefixes[ins->nprefix++] = (asize == 16 ? P_A16 : P_A32);
 430     if (!o_used && osize != segsize)
 431         ins->prefixes[ins->nprefix++] = (osize == 16 ? P_O16 : P_O32);
 432
 433     return data - origdata;
 434 }
 435
 436 long disasm (unsigned char *data, char *output, int segsize, long offset,
 437              int autosync) {
 438     struct itemplate **p;
 439     int length = 0;
 440     char *segover;
 441     int rep, lock, asize, osize, i, slen, colon;
 442     unsigned char *origdata;
 443     int works;
 444     insn ins;
 445
 446     /*
 447      * Scan for prefixes.
 448      */
 449     asize = osize = segsize;
 450     segover = NULL;
 451     rep = lock = 0;
 452     origdata = data;
 453     for (;;) {
 454         if (*data == 0xF3 || *data == 0xF2)
 455             rep = *data++;
 456         else if (*data == 0xF0)
 457             lock = *data++;
 458         else if (*data == 0x2E || *data == 0x36 || *data == 0x3E ||
 459                  *data == 0x26 || *data == 0x64 || *data == 0x65) {
 460             switch (*data++) {
 461               case 0x2E: segover = "cs"; break;
 462               case 0x36: segover = "ss"; break;
 463               case 0x3E: segover = "ds"; break;
 464               case 0x26: segover = "es"; break;
 465               case 0x64: segover = "fs"; break;
 466               case 0x65: segover = "gs"; break;
 467             }
 468         } else if (*data == 0x66)
 469             osize = 48 - segsize, data++;
 470         else if (*data == 0x67)
 471             asize = 48 - segsize, data++;
 472         else
 473             break;
 474     }
 475
 476     ins.oprs[0].segment = ins.oprs[1].segment = ins.oprs[2].segment =
 477     ins.oprs[0].addr_size = ins.oprs[1].addr_size = ins.oprs[2].addr_size =
 478         (segsize == 16 ? 0 : SEG_32BIT);
 479     ins.condition = -1;
 480     works = TRUE;
 481     for (p = itable[*data]; *p; p++)
 482         if ( (length = matches((unsigned char *)((*p)->code), data,
 483                                asize, osize, segsize, &ins)) ) {
 484             works = TRUE;
 485             /*
 486              * Final check to make sure the types of r/m match up.
 487              */
 488             for (i = 0; i < (*p)->operands; i++)
 489                 if (((ins.oprs[i].segment & SEG_RMREG) &&
 490                      !(MEMORY & ~(*p)->opd[i])) ||
 491                     (!(ins.oprs[i].segment & SEG_RMREG) &&
 492                      !(REGNORM & ~(*p)->opd[i]) &&
 493                      !((*p)->opd[i] & REG_SMASK)))
 494                     works = FALSE;
 495             if (works)
 496                 break;
 497         }
 498     if (!length || !works)
 499         return 0;                      /* no instruction was matched */
 500
 501     slen = 0;
 502
 503     if (rep) {
 504         slen += sprintf(output+slen, "rep%s ",
 505                         (rep == 0xF2 ? "ne" :
 506                          (*p)->opcode == I_CMPSB ||
 507                          (*p)->opcode == I_CMPSW ||
 508                          (*p)->opcode == I_CMPSD ||
 509                          (*p)->opcode == I_SCASB ||
 510                          (*p)->opcode == I_SCASW ||
 511                          (*p)->opcode == I_SCASD ? "e" : ""));
 512     }
 513     if (lock)
 514         slen += sprintf(output+slen, "lock ");
 515     for (i = 0; i < ins.nprefix; i++)
 516         switch (ins.prefixes[i]) {
 517           case P_A16: slen += sprintf(output+slen, "a16 "); break;
 518           case P_A32: slen += sprintf(output+slen, "a32 "); break;
 519           case P_O16: slen += sprintf(output+slen, "o16 "); break;
 520           case P_O32: slen += sprintf(output+slen, "o32 "); break;
 521         }
 522
 523     for (i = 0; i < elements(ico); i++)
 524         if ((*p)->opcode == ico[i]) {
 525             slen += sprintf(output+slen, "%s%s", icn[i],
 526                             whichcond(ins.condition));
 527             break;
 528         }
 529     if (i >= elements(ico))
 530         slen += sprintf(output+slen, "%s", insn_names[(*p)->opcode]);
 531     colon = FALSE;
 532     length += data - origdata;         /* fix up for prefixes */
 533     for (i=0; i<(*p)->operands; i++) {
 534         output[slen++] = (colon ? ':' : i==0 ? ' ' : ',');
 535
 536         if (ins.oprs[i].segment & SEG_RELATIVE) {
 537             ins.oprs[i].offset += offset + length;
 538             /*
 539              * sort out wraparound
 540              */
 541             if (!(ins.oprs[i].segment & SEG_32BIT))
 542                 ins.oprs[i].offset &= 0xFFFF;
 543             /*
 544              * add sync marker, if autosync is on
 545              */
 546             if (autosync)
 547                 add_sync (ins.oprs[i].offset, 0L);
 548         }
 549
 550         if ((*p)->opd[i] & COLON)
 551             colon = TRUE;
 552         else
 553             colon = FALSE;
 554
 555         if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
 556             (ins.oprs[i].segment & SEG_RMREG)) {
 557             ins.oprs[i].basereg = whichreg ((*p)->opd[i],
 558                                             ins.oprs[i].basereg);
 559             slen += sprintf(output+slen, "%s",
 560                             reg_names[ins.oprs[i].basereg]);
 561         } else if (!(UNITY & ~(*p)->opd[i])) {
 562             output[slen++] = '1';
 563         } else if ( (*p)->opd[i] & IMMEDIATE ) {
 564             if ( (*p)->opd[i] & BITS8 ) {
 565                 slen += sprintf(output+slen, "byte ");
 566                 if (ins.oprs[i].segment & SEG_SIGNED) {
 567                     if (ins.oprs[i].offset < 0) {
 568                         ins.oprs[i].offset *= -1;
 569                         output[slen++] = '-';
 570                     } else
 571                         output[slen++] = '+';
 572                 }
 573             } else if ( (*p)->opd[i] & BITS16 ) {
 574                 slen += sprintf(output+slen, "word ");
 575             } else if ( (*p)->opd[i] & BITS32 ) {
 576                 slen += sprintf(output+slen, "dword ");
 577             } else if ( (*p)->opd[i] & NEAR ) {
 578                 slen += sprintf(output+slen, "near ");
 579             } else if ( (*p)->opd[i] & SHORT ) {
 580                 slen += sprintf(output+slen, "short ");
 581             }
 582             slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 583         } else if ( !(MEM_OFFS & ~(*p)->opd[i]) ) {
 584             slen += sprintf(output+slen, "[%s%s%s0x%lx]",
 585                             (segover ? segover : ""),
 586                             (segover ? ":" : ""),
 587                             (ins.oprs[i].addr_size == 32 ? "dword " :
 588                              ins.oprs[i].addr_size == 16 ? "word " : ""),
 589                             ins.oprs[i].offset);
 590             segover = NULL;
 591         } else if ( !(REGMEM & ~(*p)->opd[i]) ) {
 592             int started = FALSE;
 593             if ( (*p)->opd[i] & BITS8 )
 594                 slen += sprintf(output+slen, "byte ");
 595             if ( (*p)->opd[i] & BITS16 )
 596                 slen += sprintf(output+slen, "word ");
 597             if ( (*p)->opd[i] & BITS32 )
 598                 slen += sprintf(output+slen, "dword ");
 599             if ( (*p)->opd[i] & BITS64 )
 600                 slen += sprintf(output+slen, "qword ");
 601             if ( (*p)->opd[i] & BITS80 )
 602                 slen += sprintf(output+slen, "tword ");
 603             if ( (*p)->opd[i] & FAR )
 604                 slen += sprintf(output+slen, "far ");
 605             if ( (*p)->opd[i] & NEAR )
 606                 slen += sprintf(output+slen, "near ");
 607             output[slen++] = '[';
 608             if (ins.oprs[i].addr_size)
 609                 slen += sprintf(output+slen, "%s",
 610                                 (ins.oprs[i].addr_size == 32 ? "dword " :
 611                                  ins.oprs[i].addr_size == 16 ? "word " : ""));
 612             if (segover) {
 613                 slen += sprintf(output+slen, "%s:", segover);
 614                 segover = NULL;
 615             }
 616             if (ins.oprs[i].basereg != -1) {
 617                 slen += sprintf(output+slen, "%s",
 618                                 reg_names[ins.oprs[i].basereg]);
 619                 started = TRUE;
 620             }
 621             if (ins.oprs[i].indexreg != -1) {
 622                 if (started)
 623                     output[slen++] = '+';
 624                 slen += sprintf(output+slen, "%s",
 625                                 reg_names[ins.oprs[i].indexreg]);
 626                 if (ins.oprs[i].scale > 1)
 627                     slen += sprintf(output+slen, "*%d", ins.oprs[i].scale);
 628                 started = TRUE;
 629             }
 630             if (ins.oprs[i].segment & SEG_DISP8) {
 631                 int sign = '+';
 632                 if (ins.oprs[i].offset & 0x80) {
 633                     ins.oprs[i].offset = - (signed char) ins.oprs[i].offset;
 634                     sign = '-';
 635                 }
 636                 slen += sprintf(output+slen, "%c0x%lx", sign,
 637                                 ins.oprs[i].offset);
 638             } else if (ins.oprs[i].segment & SEG_DISP16) {
 639                 if (started)
 640                     output[slen++] = '+';
 641                 slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 642             } else if (ins.oprs[i].segment & SEG_DISP32) {
 643                 if (started)
 644                     output[slen++] = '+';
 645                 slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 646             }
 647             output[slen++] = ']';
 648         } else {
 649             slen += sprintf(output+slen, "<operand%d>", i);
 650         }
 651     }
 652     output[slen] = '\0';
 653     if (segover) {                     /* unused segment override */
 654         char *p = output;
 655         int count = slen+1;
 656         while (count--)
 657             p[count+3] = p[count];
 658         strncpy (output, segover, 2);
 659         output[2] = ' ';
 660     }
 661     return length;
 662 }
 663
 664 long eatbyte (unsigned char *data, char *output) {
 665     sprintf(output, "db 0x%02X", *data);
 666     return 1;
 667 }