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First cut at AVX machinery.
[nasm/autotest.git] / disasm.c
blob8263d508bb3c9e03302de3754f4e3d48b0fb57cc
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the license given in the file "LICENSE"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include "compiler.h"
12
13 #include <stdio.h>
14 #include <string.h>
15 #include <limits.h>
16 #include <inttypes.h>
17
18 #include "nasm.h"
19 #include "disasm.h"
20 #include "sync.h"
21 #include "insns.h"
22
23 #include "names.c"
24
25 /*
26 * Flags that go into the `segment' field of `insn' structures
27 * during disassembly.
28 */
29 #define SEG_RELATIVE 1
30 #define SEG_32BIT 2
31 #define SEG_RMREG 4
32 #define SEG_DISP8 8
33 #define SEG_DISP16 16
34 #define SEG_DISP32 32
35 #define SEG_NODISP 64
36 #define SEG_SIGNED 128
37 #define SEG_64BIT 256
38
39 #include "regdis.c"
40
41 /*
42 * Prefix information
43 */
44 struct prefix_info {
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t rex; /* Rex prefix present */
53 };
54
55 #define getu8(x) (*(uint8_t *)(x))
56 #if X86_MEMORY
57 /* Littleendian CPU which can handle unaligned references */
58 #define getu16(x) (*(uint16_t *)(x))
59 #define getu32(x) (*(uint32_t *)(x))
60 #define getu64(x) (*(uint64_t *)(x))
61 #else
62 static uint16_t getu16(uint8_t *data)
63 {
64 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
65 }
66 static uint32_t getu32(uint8_t *data)
67 {
68 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
69 }
70 static uint64_t getu64(uint8_t *data)
71 {
72 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
73 }
74 #endif
75
76 #define gets8(x) ((int8_t)getu8(x))
77 #define gets16(x) ((int16_t)getu16(x))
78 #define gets32(x) ((int32_t)getu32(x))
79 #define gets64(x) ((int64_t)getu64(x))
80
81 /* Important: regval must already have been adjusted for rex extensions */
82 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
83 {
84 if (!(regflags & (REGISTER|REGMEM)))
85 return 0; /* Registers not permissible?! */
86
87 regflags |= REGISTER;
88
89 if (!(REG_AL & ~regflags))
90 return R_AL;
91 if (!(REG_AX & ~regflags))
92 return R_AX;
93 if (!(REG_EAX & ~regflags))
94 return R_EAX;
95 if (!(REG_RAX & ~regflags))
96 return R_RAX;
97 if (!(REG_DL & ~regflags))
98 return R_DL;
99 if (!(REG_DX & ~regflags))
100 return R_DX;
101 if (!(REG_EDX & ~regflags))
102 return R_EDX;
103 if (!(REG_RDX & ~regflags))
104 return R_RDX;
105 if (!(REG_CL & ~regflags))
106 return R_CL;
107 if (!(REG_CX & ~regflags))
108 return R_CX;
109 if (!(REG_ECX & ~regflags))
110 return R_ECX;
111 if (!(REG_RCX & ~regflags))
112 return R_RCX;
113 if (!(FPU0 & ~regflags))
114 return R_ST0;
115 if (!(REG_CS & ~regflags))
116 return (regval == 1) ? R_CS : 0;
117 if (!(REG_DESS & ~regflags))
118 return (regval == 0 || regval == 2
119 || regval == 3 ? rd_sreg[regval] : 0);
120 if (!(REG_FSGS & ~regflags))
121 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
122 if (!(REG_SEG67 & ~regflags))
123 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
124
125 /* All the entries below look up regval in an 16-entry array */
126 if (regval < 0 || regval > 15)
127 return 0;
128
129 if (!(REG8 & ~regflags)) {
130 if (rex & REX_P)
131 return rd_reg8_rex[regval];
132 else
133 return rd_reg8[regval];
134 }
135 if (!(REG16 & ~regflags))
136 return rd_reg16[regval];
137 if (!(REG32 & ~regflags))
138 return rd_reg32[regval];
139 if (!(REG64 & ~regflags))
140 return rd_reg64[regval];
141 if (!(REG_SREG & ~regflags))
142 return rd_sreg[regval & 7]; /* Ignore REX */
143 if (!(REG_CREG & ~regflags))
144 return rd_creg[regval];
145 if (!(REG_DREG & ~regflags))
146 return rd_dreg[regval];
147 if (!(REG_TREG & ~regflags)) {
148 if (rex & REX_P)
149 return 0; /* TR registers are ill-defined with rex */
150 return rd_treg[regval];
151 }
152 if (!(FPUREG & ~regflags))
153 return rd_fpureg[regval & 7]; /* Ignore REX */
154 if (!(MMXREG & ~regflags))
155 return rd_mmxreg[regval & 7]; /* Ignore REX */
156 if (!(XMMREG & ~regflags))
157 return rd_xmmreg[regval];
158
159 return 0;
160 }
161
162 static const char *whichcond(int condval)
163 {
164 static int conds[] = {
165 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
166 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
167 };
168 return conditions[conds[condval]];
169 }
170
171 /*
172 * Process a DREX suffix
173 */
174 static uint8_t *do_drex(uint8_t *data, insn *ins)
175 {
176 uint8_t drex = *data++;
177 operand *dst = &ins->oprs[ins->drexdst];
178
179 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
180 return NULL; /* OC0 mismatch */
181 ins->rex = (ins->rex & ~7) | (drex & 7);
182
183 dst->segment = SEG_RMREG;
184 dst->basereg = drex >> 4;
185 return data;
186 }
187
188
189 /*
190 * Process an effective address (ModRM) specification.
191 */
192 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
193 int segsize, operand * op, insn *ins)
194 {
195 int mod, rm, scale, index, base;
196 int rex;
197 uint8_t sib = 0;
198
199 mod = (modrm >> 6) & 03;
200 rm = modrm & 07;
201
202 if (mod != 3 && rm == 4 && asize != 16)
203 sib = *data++;
204
205 if (ins->rex & REX_D) {
206 data = do_drex(data, ins);
207 if (!data)
208 return NULL;
209 }
210 rex = ins->rex;
211
212 if (mod == 3) { /* pure register version */
213 op->basereg = rm+(rex & REX_B ? 8 : 0);
214 op->segment |= SEG_RMREG;
215 return data;
216 }
217
218 op->disp_size = 0;
219 op->eaflags = 0;
220
221 if (asize == 16) {
222 /*
223 * <mod> specifies the displacement size (none, byte or
224 * word), and <rm> specifies the register combination.
225 * Exception: mod=0,rm=6 does not specify [BP] as one might
226 * expect, but instead specifies [disp16].
227 */
228 op->indexreg = op->basereg = -1;
229 op->scale = 1; /* always, in 16 bits */
230 switch (rm) {
231 case 0:
232 op->basereg = R_BX;
233 op->indexreg = R_SI;
234 break;
235 case 1:
236 op->basereg = R_BX;
237 op->indexreg = R_DI;
238 break;
239 case 2:
240 op->basereg = R_BP;
241 op->indexreg = R_SI;
242 break;
243 case 3:
244 op->basereg = R_BP;
245 op->indexreg = R_DI;
246 break;
247 case 4:
248 op->basereg = R_SI;
249 break;
250 case 5:
251 op->basereg = R_DI;
252 break;
253 case 6:
254 op->basereg = R_BP;
255 break;
256 case 7:
257 op->basereg = R_BX;
258 break;
259 }
260 if (rm == 6 && mod == 0) { /* special case */
261 op->basereg = -1;
262 if (segsize != 16)
263 op->disp_size = 16;
264 mod = 2; /* fake disp16 */
265 }
266 switch (mod) {
267 case 0:
268 op->segment |= SEG_NODISP;
269 break;
270 case 1:
271 op->segment |= SEG_DISP8;
272 op->offset = (int8_t)*data++;
273 break;
274 case 2:
275 op->segment |= SEG_DISP16;
276 op->offset = *data++;
277 op->offset |= ((unsigned)*data++) << 8;
278 break;
279 }
280 return data;
281 } else {
282 /*
283 * Once again, <mod> specifies displacement size (this time
284 * none, byte or *dword*), while <rm> specifies the base
285 * register. Again, [EBP] is missing, replaced by a pure
286 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
287 * and RIP-relative addressing in 64-bit mode.
288 *
289 * However, rm=4
290 * indicates not a single base register, but instead the
291 * presence of a SIB byte...
292 */
293 int a64 = asize == 64;
294
295 op->indexreg = -1;
296
297 if (a64)
298 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
299 else
300 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
301
302 if (rm == 5 && mod == 0) {
303 if (segsize == 64) {
304 op->eaflags |= EAF_REL;
305 op->segment |= SEG_RELATIVE;
306 mod = 2; /* fake disp32 */
307 }
308
309 if (asize != 64)
310 op->disp_size = asize;
311
312 op->basereg = -1;
313 mod = 2; /* fake disp32 */
314 }
315
316 if (rm == 4) { /* process SIB */
317 scale = (sib >> 6) & 03;
318 index = (sib >> 3) & 07;
319 base = sib & 07;
320
321 op->scale = 1 << scale;
322
323 if (index == 4)
324 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
325 else if (a64)
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
327 else
328 op->indexreg = rd_reg32[index | ((rex & REX_X) ? 8 : 0)];
329
330 if (base == 5 && mod == 0) {
331 op->basereg = -1;
332 mod = 2; /* Fake disp32 */
333 } else if (a64)
334 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
335 else
336 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
337
338 if (segsize == 16)
339 op->disp_size = 32;
340 }
341
342 switch (mod) {
343 case 0:
344 op->segment |= SEG_NODISP;
345 break;
346 case 1:
347 op->segment |= SEG_DISP8;
348 op->offset = gets8(data);
349 data++;
350 break;
351 case 2:
352 op->segment |= SEG_DISP32;
353 op->offset = gets32(data);
354 data += 4;
355 break;
356 }
357 return data;
358 }
359 }
360
361 /*
362 * Determine whether the instruction template in t corresponds to the data
363 * stream in data. Return the number of bytes matched if so.
364 */
365 #define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
366
367 static int matches(const struct itemplate *t, uint8_t *data,
368 const struct prefix_info *prefix, int segsize, insn *ins)
369 {
370 uint8_t *r = (uint8_t *)(t->code);
371 uint8_t *origdata = data;
372 bool a_used = false, o_used = false;
373 enum prefixes drep = 0;
374 uint8_t lock = prefix->lock;
375 int osize = prefix->osize;
376 int asize = prefix->asize;
377 int i, c;
378 struct operand *opx;
379 int s_field_for = -1; /* No 144/154 series code encountered */
380
381 for (i = 0; i < MAX_OPERANDS; i++) {
382 ins->oprs[i].segment = ins->oprs[i].disp_size =
383 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
384 }
385 ins->condition = -1;
386 ins->rex = prefix->rex;
387 memset(ins->prefixes, 0, sizeof ins->prefixes);
388
389 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
390 return false;
391
392 if (prefix->rep == 0xF2)
393 drep = P_REPNE;
394 else if (prefix->rep == 0xF3)
395 drep = P_REP;
396
397 while ((c = *r++) != 0) {
398 opx = &ins->oprs[c & 3];
399
400 switch (c) {
401 case 01:
402 case 02:
403 case 03:
404 while (c--)
405 if (*r++ != *data++)
406 return false;
407 break;
408
409 case 04:
410 switch (*data++) {
411 case 0x07:
412 ins->oprs[0].basereg = 0;
413 break;
414 case 0x17:
415 ins->oprs[0].basereg = 2;
416 break;
417 case 0x1F:
418 ins->oprs[0].basereg = 3;
419 break;
420 default:
421 return false;
422 }
423 break;
424
425 case 05:
426 switch (*data++) {
427 case 0xA1:
428 ins->oprs[0].basereg = 4;
429 break;
430 case 0xA9:
431 ins->oprs[0].basereg = 5;
432 break;
433 default:
434 return false;
435 }
436 break;
437
438 case 06:
439 switch (*data++) {
440 case 0x06:
441 ins->oprs[0].basereg = 0;
442 break;
443 case 0x0E:
444 ins->oprs[0].basereg = 1;
445 break;
446 case 0x16:
447 ins->oprs[0].basereg = 2;
448 break;
449 case 0x1E:
450 ins->oprs[0].basereg = 3;
451 break;
452 default:
453 return false;
454 }
455 break;
456
457 case 07:
458 switch (*data++) {
459 case 0xA0:
460 ins->oprs[0].basereg = 4;
461 break;
462 case 0xA8:
463 ins->oprs[0].basereg = 5;
464 break;
465 default:
466 return false;
467 }
468 break;
469
470 case4(010):
471 {
472 int t = *r++, d = *data++;
473 if (d < t || d > t + 7)
474 return false;
475 else {
476 opx->basereg = (d-t)+
477 (ins->rex & REX_B ? 8 : 0);
478 opx->segment |= SEG_RMREG;
479 }
480 break;
481 }
482
483 case4(014):
484 opx->offset = (int8_t)*data++;
485 opx->segment |= SEG_SIGNED;
486 break;
487
488 case4(020):
489 opx->offset = *data++;
490 break;
491
492 case4(024):
493 opx->offset = *data++;
494 break;
495
496 case4(030):
497 opx->offset = getu16(data);
498 data += 2;
499 break;
500
501 case4(034):
502 if (osize == 32) {
503 opx->offset = getu32(data);
504 data += 4;
505 } else {
506 opx->offset = getu16(data);
507 data += 2;
508 }
509 if (segsize != asize)
510 opx->disp_size = asize;
511 break;
512
513 case4(040):
514 opx->offset = getu32(data);
515 data += 4;
516 break;
517
518 case4(044):
519 switch (asize) {
520 case 16:
521 opx->offset = getu16(data);
522 data += 2;
523 if (segsize != 16)
524 opx->disp_size = 16;
525 break;
526 case 32:
527 opx->offset = getu32(data);
528 data += 4;
529 if (segsize == 16)
530 opx->disp_size = 32;
531 break;
532 case 64:
533 opx->offset = getu64(data);
534 opx->disp_size = 64;
535 data += 8;
536 break;
537 }
538 break;
539
540 case4(050):
541 opx->offset = gets8(data++);
542 opx->segment |= SEG_RELATIVE;
543 break;
544
545 case4(054):
546 opx->offset = getu64(data);
547 data += 8;
548 break;
549
550 case4(060):
551 opx->offset = gets16(data);
552 data += 2;
553 opx->segment |= SEG_RELATIVE;
554 opx->segment &= ~SEG_32BIT;
555 break;
556
557 case4(064):
558 opx->segment |= SEG_RELATIVE;
559 if (osize == 16) {
560 opx->offset = gets16(data);
561 data += 2;
562 opx->segment &= ~(SEG_32BIT|SEG_64BIT);
563 } else if (osize == 32) {
564 opx->offset = gets32(data);
565 data += 4;
566 opx->segment &= ~SEG_64BIT;
567 opx->segment |= SEG_32BIT;
568 }
569 if (segsize != osize) {
570 opx->type =
571 (opx->type & ~SIZE_MASK)
572 | ((osize == 16) ? BITS16 : BITS32);
573 }
574 break;
575
576 case4(070):
577 opx->offset = gets32(data);
578 data += 4;
579 opx->segment |= SEG_32BIT | SEG_RELATIVE;
580 break;
581
582 case4(0100):
583 case4(0110):
584 case4(0120):
585 case4(0130):
586 {
587 int modrm = *data++;
588 opx->segment |= SEG_RMREG;
589 data = do_ea(data, modrm, asize, segsize,
590 &ins->oprs[(c >> 3) & 3], ins);
591 if (!data)
592 return false;
593 opx->basereg = ((modrm >> 3)&7)+
594 (ins->rex & REX_R ? 8 : 0);
595 break;
596 }
597
598 case4(0140):
599 if (s_field_for == (c & 3)) {
600 opx->offset = gets8(data);
601 data++;
602 } else {
603 opx->offset = getu16(data);
604 data += 2;
605 }
606 break;
607
608 case4(0144):
609 case4(0154):
610 s_field_for = (*data & 0x02) ? c & 3 : -1;
611 if ((*data++ & ~0x02) != *r++)
612 return false;
613 break;
614
615 case4(0150):
616 if (s_field_for == (c & 3)) {
617 opx->offset = gets8(data);
618 data++;
619 } else {
620 opx->offset = getu32(data);
621 data += 4;
622 }
623 break;
624
625 case4(0160):
626 ins->rex |= REX_D;
627 ins->drexdst = c & 3;
628 break;
629
630 case4(0164):
631 ins->rex |= REX_D|REX_OC;
632 ins->drexdst = c & 3;
633 break;
634
635 case 0170:
636 if (*data++)
637 return false;
638 break;
639
640 case 0171:
641 data = do_drex(data, ins);
642 if (!data)
643 return false;
644 break;
645
646 case 0172:
647 {
648 uint8_t ximm = *data++;
649 c = *r++;
650 ins->oprs[c >> 3].basereg = ximm >> 4;
651 ins->oprs[c >> 3].segment |= SEG_RMREG;
652 ins->oprs[c & 7].offset = ximm & 15;
653 }
654 break;
655
656 case4(0200):
657 case4(0204):
658 case4(0210):
659 case4(0214):
660 case4(0220):
661 case4(0224):
662 case4(0230):
663 case4(0234):
664 {
665 int modrm = *data++;
666 if (((modrm >> 3) & 07) != (c & 07))
667 return false; /* spare field doesn't match up */
668 data = do_ea(data, modrm, asize, segsize,
669 &ins->oprs[(c >> 3) & 07], ins);
670 if (!data)
671 return false;
672 break;
673 }
674
675 case 0310:
676 if (asize != 16)
677 return false;
678 else
679 a_used = true;
680 break;
681
682 case 0311:
683 if (asize == 16)
684 return false;
685 else
686 a_used = true;
687 break;
688
689 case 0312:
690 if (asize != segsize)
691 return false;
692 else
693 a_used = true;
694 break;
695
696 case 0313:
697 if (asize != 64)
698 return false;
699 else
700 a_used = true;
701 break;
702
703 case 0314:
704 if (prefix->rex & REX_B)
705 return false;
706 break;
707
708 case 0315:
709 if (prefix->rex & REX_X)
710 return false;
711 break;
712
713 case 0316:
714 if (prefix->rex & REX_R)
715 return false;
716 break;
717
718 case 0317:
719 if (prefix->rex & REX_W)
720 return false;
721 break;
722
723 case 0320:
724 if (osize != 16)
725 return false;
726 else
727 o_used = true;
728 break;
729
730 case 0321:
731 if (osize != 32)
732 return false;
733 else
734 o_used = true;
735 break;
736
737 case 0322:
738 if (osize != (segsize == 16) ? 16 : 32)
739 return false;
740 else
741 o_used = true;
742 break;
743
744 case 0323:
745 ins->rex |= REX_W; /* 64-bit only instruction */
746 osize = 64;
747 o_used = true;
748 break;
749
750 case 0324:
751 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
752 return false;
753 o_used = true;
754 break;
755
756 case 0330:
757 {
758 int t = *r++, d = *data++;
759 if (d < t || d > t + 15)
760 return false;
761 else
762 ins->condition = d - t;
763 break;
764 }
765
766 case 0331:
767 if (prefix->rep)
768 return false;
769 break;
770
771 case 0332:
772 if (prefix->rep != 0xF2)
773 return false;
774 drep = 0;
775 break;
776
777 case 0333:
778 if (prefix->rep != 0xF3)
779 return false;
780 drep = 0;
781 break;
782
783 case 0334:
784 if (lock) {
785 ins->rex |= REX_R;
786 lock = 0;
787 }
788 break;
789
790 case 0335:
791 if (drep == P_REP)
792 drep = P_REPE;
793 break;
794
795 case 0340:
796 return false;
797
798 case 0364:
799 if (prefix->osp)
800 return false;
801 break;
802
803 case 0365:
804 if (prefix->asp)
805 return false;
806 break;
807
808 case 0366:
809 if (!prefix->osp)
810 return false;
811 o_used = true;
812 break;
813
814 case 0367:
815 if (!prefix->asp)
816 return false;
817 a_used = true;
818 break;
819
820 default:
821 return false; /* Unknown code */
822 }
823 }
824
825 /* REX cannot be combined with DREX */
826 if ((ins->rex & REX_D) && (prefix->rex))
827 return false;
828
829 /*
830 * Check for unused rep or a/o prefixes.
831 */
832 for (i = 0; i < t->operands; i++) {
833 if (ins->oprs[i].segment != SEG_RMREG)
834 a_used = true;
835 }
836
837 if (lock) {
838 if (ins->prefixes[PPS_LREP])
839 return false;
840 ins->prefixes[PPS_LREP] = P_LOCK;
841 }
842 if (drep) {
843 if (ins->prefixes[PPS_LREP])
844 return false;
845 ins->prefixes[PPS_LREP] = drep;
846 }
847 if (!o_used) {
848 if (osize != ((segsize == 16) ? 16 : 32)) {
849 enum prefixes pfx = 0;
850
851 switch (osize) {
852 case 16:
853 pfx = P_O16;
854 break;
855 case 32:
856 pfx = P_O32;
857 break;
858 case 64:
859 pfx = P_O64;
860 break;
861 }
862
863 if (ins->prefixes[PPS_OSIZE])
864 return false;
865 ins->prefixes[PPS_OSIZE] = pfx;
866 }
867 }
868 if (!a_used && asize != segsize) {
869 if (ins->prefixes[PPS_ASIZE])
870 return false;
871 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
872 }
873
874 /* Fix: check for redundant REX prefixes */
875
876 return data - origdata;
877 }
878
879 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
880 int32_t offset, int autosync, uint32_t prefer)
881 {
882 const struct itemplate * const *p, * const *best_p;
883 const struct disasm_index *ix;
884 uint8_t *dp;
885 int length, best_length = 0;
886 char *segover;
887 int i, slen, colon, n;
888 uint8_t *origdata;
889 int works;
890 insn tmp_ins, ins;
891 uint32_t goodness, best;
892 int best_pref;
893 struct prefix_info prefix;
894 bool end_prefix;
895
896 memset(&ins, 0, sizeof ins);
897
898 /*
899 * Scan for prefixes.
900 */
901 memset(&prefix, 0, sizeof prefix);
902 prefix.asize = segsize;
903 prefix.osize = (segsize == 64) ? 32 : segsize;
904 segover = NULL;
905 origdata = data;
906
907 for (end_prefix = false; !end_prefix; ) {
908 switch (*data) {
909 case 0xF2:
910 case 0xF3:
911 prefix.rep = *data++;
912 break;
913 case 0xF0:
914 prefix.lock = *data++;
915 break;
916 case 0x2E:
917 segover = "cs", prefix.seg = *data++;
918 break;
919 case 0x36:
920 segover = "ss", prefix.seg = *data++;
921 break;
922 case 0x3E:
923 segover = "ds", prefix.seg = *data++;
924 break;
925 case 0x26:
926 segover = "es", prefix.seg = *data++;
927 break;
928 case 0x64:
929 segover = "fs", prefix.seg = *data++;
930 break;
931 case 0x65:
932 segover = "gs", prefix.seg = *data++;
933 break;
934 case 0x66:
935 prefix.osize = (segsize == 16) ? 32 : 16;
936 prefix.osp = *data++;
937 break;
938 case 0x67:
939 prefix.asize = (segsize == 32) ? 16 : 32;
940 prefix.asp = *data++;
941 break;
942 default:
943 if (segsize == 64 && (*data & 0xf0) == REX_P) {
944 prefix.rex = *data++;
945 if (prefix.rex & REX_W)
946 prefix.osize = 64;
947 end_prefix = true;
948 } else {
949 end_prefix = true;
950 }
951 }
952 }
953
954 best = -1; /* Worst possible */
955 best_p = NULL;
956 best_pref = INT_MAX;
957
958 dp = data;
959 ix = itable + *dp++;
960 while (ix->n == -1) {
961 ix = (const struct disasm_index *)ix->p + *dp++;
962 }
963
964 p = (const struct itemplate * const *)ix->p;
965 for (n = ix->n; n; n--, p++) {
966 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
967 works = true;
968 /*
969 * Final check to make sure the types of r/m match up.
970 * XXX: Need to make sure this is actually correct.
971 */
972 for (i = 0; i < (*p)->operands; i++) {
973 if (!((*p)->opd[i] & SAME_AS) &&
974 (
975 /* If it's a mem-only EA but we have a
976 register, die. */
977 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
978 !(MEMORY & ~(*p)->opd[i])) ||
979 /* If it's a reg-only EA but we have a memory
980 ref, die. */
981 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
982 !(REG_EA & ~(*p)->opd[i]) &&
983 !((*p)->opd[i] & REG_SMASK)) ||
984 /* Register type mismatch (eg FS vs REG_DESS):
985 die. */
986 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
987 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
988 !whichreg((*p)->opd[i],
989 tmp_ins.oprs[i].basereg, tmp_ins.rex))
990 )) {
991 works = false;
992 break;
993 }
994 }
995
996 /*
997 * Note: we always prefer instructions which incorporate
998 * prefixes in the instructions themselves. This is to allow
999 * e.g. PAUSE to be preferred to REP NOP, and deal with
1000 * MMX/SSE instructions where prefixes are used to select
1001 * between MMX and SSE register sets or outright opcode
1002 * selection.
1003 */
1004 if (works) {
1005 int i, nprefix;
1006 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
1007 nprefix = 0;
1008 for (i = 0; i < MAXPREFIX; i++)
1009 if (tmp_ins.prefixes[i])
1010 nprefix++;
1011 if (nprefix < best_pref ||
1012 (nprefix == best_pref && goodness < best)) {
1013 /* This is the best one found so far */
1014 best = goodness;
1015 best_p = p;
1016 best_pref = nprefix;
1017 best_length = length;
1018 ins = tmp_ins;
1019 }
1020 }
1021 }
1022 }
1023
1024 if (!best_p)
1025 return 0; /* no instruction was matched */
1026
1027 /* Pick the best match */
1028 p = best_p;
1029 length = best_length;
1030
1031 slen = 0;
1032
1033 /* TODO: snprintf returns the value that the string would have if
1034 * the buffer were long enough, and not the actual length of
1035 * the returned string, so each instance of using the return
1036 * value of snprintf should actually be checked to assure that
1037 * the return value is "sane." Maybe a macro wrapper could
1038 * be used for that purpose.
1039 */
1040 for (i = 0; i < MAXPREFIX; i++)
1041 switch (ins.prefixes[i]) {
1042 case P_LOCK:
1043 slen += snprintf(output + slen, outbufsize - slen, "lock ");
1044 break;
1045 case P_REP:
1046 slen += snprintf(output + slen, outbufsize - slen, "rep ");
1047 break;
1048 case P_REPE:
1049 slen += snprintf(output + slen, outbufsize - slen, "repe ");
1050 break;
1051 case P_REPNE:
1052 slen += snprintf(output + slen, outbufsize - slen, "repne ");
1053 break;
1054 case P_A16:
1055 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
1056 break;
1057 case P_A32:
1058 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
1059 break;
1060 case P_A64:
1061 slen += snprintf(output + slen, outbufsize - slen, "a64 ");
1062 break;
1063 case P_O16:
1064 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
1065 break;
1066 case P_O32:
1067 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
1068 break;
1069 case P_O64:
1070 slen += snprintf(output + slen, outbufsize - slen, "o64 ");
1071 break;
1072 default:
1073 break;
1074 }
1075
1076 for (i = 0; i < (int)elements(ico); i++)
1077 if ((*p)->opcode == ico[i]) {
1078 slen +=
1079 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
1080 whichcond(ins.condition));
1081 break;
1082 }
1083 if (i >= (int)elements(ico))
1084 slen +=
1085 snprintf(output + slen, outbufsize - slen, "%s",
1086 insn_names[(*p)->opcode]);
1087 colon = false;
1088 length += data - origdata; /* fix up for prefixes */
1089 for (i = 0; i < (*p)->operands; i++) {
1090 opflags_t t = (*p)->opd[i];
1091 const operand *o = &ins.oprs[i];
1092 int64_t offs;
1093
1094 if (t & SAME_AS) {
1095 o = &ins.oprs[t & ~SAME_AS];
1096 t = (*p)->opd[t & ~SAME_AS];
1097 }
1098
1099 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
1100
1101 offs = o->offset;
1102 if (o->segment & SEG_RELATIVE) {
1103 offs += offset + length;
1104 /*
1105 * sort out wraparound
1106 */
1107 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1108 offs &= 0xffff;
1109 else if (segsize != 64)
1110 offs &= 0xffffffff;
1111
1112 /*
1113 * add sync marker, if autosync is on
1114 */
1115 if (autosync)
1116 add_sync(offs, 0L);
1117 }
1118
1119 if (t & COLON)
1120 colon = true;
1121 else
1122 colon = false;
1123
1124 if ((t & (REGISTER | FPUREG)) ||
1125 (o->segment & SEG_RMREG)) {
1126 enum reg_enum reg;
1127 reg = whichreg(t, o->basereg, ins.rex);
1128 if (t & TO)
1129 slen += snprintf(output + slen, outbufsize - slen, "to ");
1130 slen += snprintf(output + slen, outbufsize - slen, "%s",
1131 reg_names[reg - EXPR_REG_START]);
1132 } else if (!(UNITY & ~t)) {
1133 output[slen++] = '1';
1134 } else if (t & IMMEDIATE) {
1135 if (t & BITS8) {
1136 slen +=
1137 snprintf(output + slen, outbufsize - slen, "byte ");
1138 if (o->segment & SEG_SIGNED) {
1139 if (offs < 0) {
1140 offs *= -1;
1141 output[slen++] = '-';
1142 } else
1143 output[slen++] = '+';
1144 }
1145 } else if (t & BITS16) {
1146 slen +=
1147 snprintf(output + slen, outbufsize - slen, "word ");
1148 } else if (t & BITS32) {
1149 slen +=
1150 snprintf(output + slen, outbufsize - slen, "dword ");
1151 } else if (t & BITS64) {
1152 slen +=
1153 snprintf(output + slen, outbufsize - slen, "qword ");
1154 } else if (t & NEAR) {
1155 slen +=
1156 snprintf(output + slen, outbufsize - slen, "near ");
1157 } else if (t & SHORT) {
1158 slen +=
1159 snprintf(output + slen, outbufsize - slen, "short ");
1160 }
1161 slen +=
1162 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
1163 offs);
1164 } else if (!(MEM_OFFS & ~t)) {
1165 slen +=
1166 snprintf(output + slen, outbufsize - slen,
1167 "[%s%s%s0x%"PRIx64"]",
1168 (segover ? segover : ""),
1169 (segover ? ":" : ""),
1170 (o->disp_size == 64 ? "qword " :
1171 o->disp_size == 32 ? "dword " :
1172 o->disp_size == 16 ? "word " : ""), offs);
1173 segover = NULL;
1174 } else if (!(REGMEM & ~t)) {
1175 int started = false;
1176 if (t & BITS8)
1177 slen +=
1178 snprintf(output + slen, outbufsize - slen, "byte ");
1179 if (t & BITS16)
1180 slen +=
1181 snprintf(output + slen, outbufsize - slen, "word ");
1182 if (t & BITS32)
1183 slen +=
1184 snprintf(output + slen, outbufsize - slen, "dword ");
1185 if (t & BITS64)
1186 slen +=
1187 snprintf(output + slen, outbufsize - slen, "qword ");
1188 if (t & BITS80)
1189 slen +=
1190 snprintf(output + slen, outbufsize - slen, "tword ");
1191 if (t & BITS128)
1192 slen +=
1193 snprintf(output + slen, outbufsize - slen, "oword ");
1194 if (t & FAR)
1195 slen += snprintf(output + slen, outbufsize - slen, "far ");
1196 if (t & NEAR)
1197 slen +=
1198 snprintf(output + slen, outbufsize - slen, "near ");
1199 output[slen++] = '[';
1200 if (o->disp_size)
1201 slen += snprintf(output + slen, outbufsize - slen, "%s",
1202 (o->disp_size == 64 ? "qword " :
1203 o->disp_size == 32 ? "dword " :
1204 o->disp_size == 16 ? "word " :
1205 ""));
1206 if (o->eaflags & EAF_REL)
1207 slen += snprintf(output + slen, outbufsize - slen, "rel ");
1208 if (segover) {
1209 slen +=
1210 snprintf(output + slen, outbufsize - slen, "%s:",
1211 segover);
1212 segover = NULL;
1213 }
1214 if (o->basereg != -1) {
1215 slen += snprintf(output + slen, outbufsize - slen, "%s",
1216 reg_names[(o->basereg -
1217 EXPR_REG_START)]);
1218 started = true;
1219 }
1220 if (o->indexreg != -1) {
1221 if (started)
1222 output[slen++] = '+';
1223 slen += snprintf(output + slen, outbufsize - slen, "%s",
1224 reg_names[(o->indexreg -
1225 EXPR_REG_START)]);
1226 if (o->scale > 1)
1227 slen +=
1228 snprintf(output + slen, outbufsize - slen, "*%d",
1229 o->scale);
1230 started = true;
1231 }
1232
1233
1234 if (o->segment & SEG_DISP8) {
1235 const char *prefix;
1236 uint8_t offset = offs;
1237 if ((int8_t)offset < 0) {
1238 prefix = "-";
1239 offset = -offset;
1240 } else {
1241 prefix = "+";
1242 }
1243 slen +=
1244 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1245 prefix, offset);
1246 } else if (o->segment & SEG_DISP16) {
1247 const char *prefix;
1248 uint16_t offset = offs;
1249 if ((int16_t)offset < 0 && started) {
1250 offset = -offset;
1251 prefix = "-";
1252 } else {
1253 prefix = started ? "+" : "";
1254 }
1255 slen +=
1256 snprintf(output + slen, outbufsize - slen,
1257 "%s0x%"PRIx16"", prefix, offset);
1258 } else if (o->segment & SEG_DISP32) {
1259 if (prefix.asize == 64) {
1260 const char *prefix;
1261 uint64_t offset = (int64_t)(int32_t)offs;
1262 if ((int32_t)offs < 0 && started) {
1263 offset = -offset;
1264 prefix = "-";
1265 } else {
1266 prefix = started ? "+" : "";
1267 }
1268 slen +=
1269 snprintf(output + slen, outbufsize - slen,
1270 "%s0x%"PRIx64"", prefix, offset);
1271 } else {
1272 const char *prefix;
1273 uint32_t offset = offs;
1274 if ((int32_t) offset < 0 && started) {
1275 offset = -offset;
1276 prefix = "-";
1277 } else {
1278 prefix = started ? "+" : "";
1279 }
1280 slen +=
1281 snprintf(output + slen, outbufsize - slen,
1282 "%s0x%"PRIx32"", prefix, offset);
1283 }
1284 }
1285 output[slen++] = ']';
1286 } else {
1287 slen +=
1288 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1289 i);
1290 }
1291 }
1292 output[slen] = '\0';
1293 if (segover) { /* unused segment override */
1294 char *p = output;
1295 int count = slen + 1;
1296 while (count--)
1297 p[count + 3] = p[count];
1298 strncpy(output, segover, 2);
1299 output[2] = ' ';
1300 }
1301 return length;
1302 }
1303
1304 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1305 {
1306 snprintf(output, outbufsize, "db 0x%02X", *data);
1307 return 1;
1308 }
Automatic testing