1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
8 * initial version 27/iii/95 by Simon Tatham
24 * Flags that go into the `segment' field of `insn' structures
27 #define SEG_RELATIVE 1
34 #define SEG_SIGNED 128
43 uint8_t osize
; /* Operand size */
44 uint8_t asize
; /* Address size */
45 uint8_t osp
; /* Operand size prefix present */
46 uint8_t asp
; /* Address size prefix present */
47 uint8_t rep
; /* Rep prefix present */
48 uint8_t seg
; /* Segment override prefix present */
49 uint8_t lock
; /* Lock prefix present */
50 uint8_t rex
; /* Rex prefix present */
53 #define getu8(x) (*(uint8_t *)(x))
54 #if defined(__i386__) || defined(__x86_64__)
55 /* Littleendian CPU which can handle unaligned references */
56 #define getu16(x) (*(uint16_t *)(x))
57 #define getu32(x) (*(uint32_t *)(x))
58 #define getu64(x) (*(uint64_t *)(x))
60 static uint16_t getu16(uint8_t *data
)
62 return (uint16_t)data
[0] + ((uint16_t)data
[1] << 8);
64 static uint32_t getu32(uint8_t *data
)
66 return (uint32_t)getu16(data
) + ((uint32_t)getu16(data
+2) << 16);
68 static uint64_t getu64(uint8_t *data
)
70 return (uint64_t)getu32(data
) + ((uint64_t)getu32(data
+4) << 32);
74 #define gets8(x) ((int8_t)getu8(x))
75 #define gets16(x) ((int16_t)getu16(x))
76 #define gets32(x) ((int32_t)getu32(x))
77 #define gets64(x) ((int64_t)getu64(x))
79 /* Important: regval must already have been adjusted for rex extensions */
80 static enum reg_enum
whichreg(int32_t regflags
, int regval
, int rex
)
82 if (!(regflags
& (REGISTER
|REGMEM
)))
83 return 0; /* Registers not permissible?! */
87 if (!(REG_AL
& ~regflags
))
89 if (!(REG_AX
& ~regflags
))
91 if (!(REG_EAX
& ~regflags
))
93 if (!(REG_RAX
& ~regflags
))
95 if (!(REG_DL
& ~regflags
))
97 if (!(REG_DX
& ~regflags
))
99 if (!(REG_EDX
& ~regflags
))
101 if (!(REG_RDX
& ~regflags
))
103 if (!(REG_CL
& ~regflags
))
105 if (!(REG_CX
& ~regflags
))
107 if (!(REG_ECX
& ~regflags
))
109 if (!(REG_RCX
& ~regflags
))
111 if (!(FPU0
& ~regflags
))
113 if (!(REG_CS
& ~regflags
))
114 return (regval
== 1) ? R_CS
: 0;
115 if (!(REG_DESS
& ~regflags
))
116 return (regval
== 0 || regval
== 2
117 || regval
== 3 ? rd_sreg
[regval
] : 0);
118 if (!(REG_FSGS
& ~regflags
))
119 return (regval
== 4 || regval
== 5 ? rd_sreg
[regval
] : 0);
120 if (!(REG_SEG67
& ~regflags
))
121 return (regval
== 6 || regval
== 7 ? rd_sreg
[regval
] : 0);
123 /* All the entries below look up regval in an 16-entry array */
124 if (regval
< 0 || regval
> 15)
127 if (!(REG8
& ~regflags
)) {
129 return rd_reg8_rex
[regval
];
131 return rd_reg8
[regval
];
133 if (!(REG16
& ~regflags
))
134 return rd_reg16
[regval
];
135 if (!(REG32
& ~regflags
))
136 return rd_reg32
[regval
];
137 if (!(REG64
& ~regflags
))
138 return rd_reg64
[regval
];
139 if (!(REG_SREG
& ~regflags
))
140 return rd_sreg
[regval
& 7]; /* Ignore REX */
141 if (!(REG_CREG
& ~regflags
))
142 return rd_creg
[regval
];
143 if (!(REG_DREG
& ~regflags
))
144 return rd_dreg
[regval
];
145 if (!(REG_TREG
& ~regflags
)) {
147 return 0; /* TR registers are ill-defined with rex */
148 return rd_treg
[regval
];
150 if (!(FPUREG
& ~regflags
))
151 return rd_fpureg
[regval
& 7]; /* Ignore REX */
152 if (!(MMXREG
& ~regflags
))
153 return rd_mmxreg
[regval
& 7]; /* Ignore REX */
154 if (!(XMMREG
& ~regflags
))
155 return rd_xmmreg
[regval
];
160 static const char *whichcond(int condval
)
162 static int conds
[] = {
163 C_O
, C_NO
, C_C
, C_NC
, C_Z
, C_NZ
, C_NA
, C_A
,
164 C_S
, C_NS
, C_PE
, C_PO
, C_L
, C_NL
, C_NG
, C_G
166 return conditions
[conds
[condval
]];
170 * Process an effective address (ModRM) specification.
172 static uint8_t *do_ea(uint8_t *data
, int modrm
, int asize
,
173 int segsize
, operand
* op
, int rex
)
175 int mod
, rm
, scale
, index
, base
;
177 mod
= (modrm
>> 6) & 03;
180 if (mod
== 3) { /* pure register version */
181 op
->basereg
= rm
+(rex
& REX_B
? 8 : 0);
182 op
->segment
|= SEG_RMREG
;
191 * <mod> specifies the displacement size (none, byte or
192 * word), and <rm> specifies the register combination.
193 * Exception: mod=0,rm=6 does not specify [BP] as one might
194 * expect, but instead specifies [disp16].
196 op
->indexreg
= op
->basereg
= -1;
197 op
->scale
= 1; /* always, in 16 bits */
228 if (rm
== 6 && mod
== 0) { /* special case */
232 mod
= 2; /* fake disp16 */
236 op
->segment
|= SEG_NODISP
;
239 op
->segment
|= SEG_DISP8
;
240 op
->offset
= (int8_t)*data
++;
243 op
->segment
|= SEG_DISP16
;
244 op
->offset
= *data
++;
245 op
->offset
|= ((unsigned)*data
++) << 8;
251 * Once again, <mod> specifies displacement size (this time
252 * none, byte or *dword*), while <rm> specifies the base
253 * register. Again, [EBP] is missing, replaced by a pure
254 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
255 * and RIP-relative addressing in 64-bit mode.
258 * indicates not a single base register, but instead the
259 * presence of a SIB byte...
261 int a64
= asize
== 64;
266 op
->basereg
= rd_reg64
[rm
| ((rex
& REX_B
) ? 8 : 0)];
268 op
->basereg
= rd_reg32
[rm
| ((rex
& REX_B
) ? 8 : 0)];
270 if (rm
== 5 && mod
== 0) {
272 op
->eaflags
|= EAF_REL
;
273 op
->segment
|= SEG_RELATIVE
;
274 mod
= 2; /* fake disp32 */
278 op
->addr_size
= asize
;
281 mod
= 2; /* fake disp32 */
284 if (rm
== 4) { /* process SIB */
285 scale
= (*data
>> 6) & 03;
286 index
= (*data
>> 3) & 07;
290 op
->scale
= 1 << scale
;
293 op
->indexreg
= -1; /* ESP/RSP/R12 cannot be an index */
295 op
->indexreg
= rd_reg64
[index
| ((rex
& REX_X
) ? 8 : 0)];
297 op
->indexreg
= rd_reg64
[index
| ((rex
& REX_X
) ? 8 : 0)];
299 if (base
== 5 && mod
== 0) {
301 mod
= 2; /* Fake disp32 */
303 op
->basereg
= rd_reg64
[base
| ((rex
& REX_B
) ? 8 : 0)];
305 op
->basereg
= rd_reg32
[base
| ((rex
& REX_B
) ? 8 : 0)];
313 op
->segment
|= SEG_NODISP
;
316 op
->segment
|= SEG_DISP8
;
317 op
->offset
= gets8(data
);
321 op
->segment
|= SEG_DISP32
;
322 op
->offset
= getu32(data
);
331 * Determine whether the instruction template in t corresponds to the data
332 * stream in data. Return the number of bytes matched if so.
334 static int matches(const struct itemplate
*t
, uint8_t *data
,
335 const struct prefix_info
*prefix
, int segsize
, insn
*ins
)
337 uint8_t *r
= (uint8_t *)(t
->code
);
338 uint8_t *origdata
= data
;
339 int a_used
= FALSE
, o_used
= FALSE
;
340 enum prefixes drep
= 0;
341 uint8_t lock
= prefix
->lock
;
342 int osize
= prefix
->osize
;
343 int asize
= prefix
->asize
;
345 ins
->oprs
[0].segment
= ins
->oprs
[1].segment
=
346 ins
->oprs
[2].segment
=
347 ins
->oprs
[0].addr_size
= ins
->oprs
[1].addr_size
=
348 ins
->oprs
[2].addr_size
= (segsize
== 64 ? SEG_64BIT
:
349 segsize
== 32 ? SEG_32BIT
: 0);
351 ins
->rex
= prefix
->rex
;
353 if (t
->flags
& (segsize
== 64 ? IF_NOLONG
: IF_LONG
))
356 if (prefix
->rep
== 0xF2)
358 else if (prefix
->rep
== 0xF3)
364 /* FIX: change this into a switch */
365 if (c
>= 01 && c
<= 03) {
369 } else if (c
== 04) {
372 ins
->oprs
[0].basereg
= 0;
375 ins
->oprs
[0].basereg
= 2;
378 ins
->oprs
[0].basereg
= 3;
383 } else if (c
== 05) {
386 ins
->oprs
[0].basereg
= 4;
389 ins
->oprs
[0].basereg
= 5;
394 } else if (c
== 06) {
397 ins
->oprs
[0].basereg
= 0;
400 ins
->oprs
[0].basereg
= 1;
403 ins
->oprs
[0].basereg
= 2;
406 ins
->oprs
[0].basereg
= 3;
411 } else if (c
== 07) {
414 ins
->oprs
[0].basereg
= 4;
417 ins
->oprs
[0].basereg
= 5;
422 } else if (c
>= 010 && c
<= 012) {
423 int t
= *r
++, d
= *data
++;
424 if (d
< t
|| d
> t
+ 7)
427 ins
->oprs
[c
- 010].basereg
= (d
-t
)+
428 (ins
->rex
& REX_B
? 8 : 0);
429 ins
->oprs
[c
- 010].segment
|= SEG_RMREG
;
431 } else if (c
== 017) {
434 } else if (c
>= 014 && c
<= 016) {
435 ins
->oprs
[c
- 014].offset
= (int8_t)*data
++;
436 ins
->oprs
[c
- 014].segment
|= SEG_SIGNED
;
437 } else if (c
>= 020 && c
<= 022) {
438 ins
->oprs
[c
- 020].offset
= *data
++;
439 } else if (c
>= 024 && c
<= 026) {
440 ins
->oprs
[c
- 024].offset
= *data
++;
441 } else if (c
>= 030 && c
<= 032) {
442 ins
->oprs
[c
- 030].offset
= getu16(data
);
444 } else if (c
>= 034 && c
<= 036) {
446 ins
->oprs
[c
- 034].offset
= getu32(data
);
449 ins
->oprs
[c
- 034].offset
= getu16(data
);
452 if (segsize
!= asize
)
453 ins
->oprs
[c
- 034].addr_size
= asize
;
454 } else if (c
>= 040 && c
<= 042) {
455 ins
->oprs
[c
- 040].offset
= getu32(data
);
457 } else if (c
>= 044 && c
<= 046) {
460 ins
->oprs
[c
- 044].offset
= getu16(data
);
464 ins
->oprs
[c
- 044].offset
= getu32(data
);
468 ins
->oprs
[c
- 044].offset
= getu64(data
);
472 if (segsize
!= asize
)
473 ins
->oprs
[c
- 044].addr_size
= asize
;
474 } else if (c
>= 050 && c
<= 052) {
475 ins
->oprs
[c
- 050].offset
= gets8(data
++);
476 ins
->oprs
[c
- 050].segment
|= SEG_RELATIVE
;
477 } else if (c
>= 054 && c
<= 056) {
478 ins
->oprs
[c
- 054].offset
= getu64(data
);
480 } else if (c
>= 060 && c
<= 062) {
481 ins
->oprs
[c
- 060].offset
= gets16(data
);
483 ins
->oprs
[c
- 060].segment
|= SEG_RELATIVE
;
484 ins
->oprs
[c
- 060].segment
&= ~SEG_32BIT
;
485 } else if (c
>= 064 && c
<= 066) {
487 ins
->oprs
[c
- 064].offset
= getu16(data
);
489 ins
->oprs
[c
- 064].segment
&= ~(SEG_32BIT
|SEG_64BIT
);
490 } else if (osize
== 32) {
491 ins
->oprs
[c
- 064].offset
= getu32(data
);
493 ins
->oprs
[c
- 064].segment
&= ~SEG_64BIT
;
494 ins
->oprs
[c
- 064].segment
|= SEG_32BIT
;
496 if (segsize
!= osize
) {
497 ins
->oprs
[c
- 064].type
=
498 (ins
->oprs
[c
- 064].type
& ~SIZE_MASK
)
499 | ((osize
== 16) ? BITS16
: BITS32
);
501 } else if (c
>= 070 && c
<= 072) {
502 ins
->oprs
[c
- 070].offset
= getu32(data
);
504 ins
->oprs
[c
- 070].segment
|= SEG_32BIT
| SEG_RELATIVE
;
505 } else if (c
>= 0100 && c
< 0130) {
507 ins
->oprs
[c
& 07].basereg
= ((modrm
>> 3)&7)+
508 (ins
->rex
& REX_R
? 8 : 0);
509 ins
->oprs
[c
& 07].segment
|= SEG_RMREG
;
510 data
= do_ea(data
, modrm
, asize
, segsize
,
511 &ins
->oprs
[(c
>> 3) & 07], ins
->rex
);
512 } else if (c
>= 0130 && c
<= 0132) {
513 ins
->oprs
[c
- 0130].offset
= getu16(data
);
515 } else if (c
>= 0140 && c
<= 0142) {
516 ins
->oprs
[c
- 0140].offset
= getu32(data
);
518 } else if (c
>= 0200 && c
<= 0277) {
520 if (((modrm
>> 3) & 07) != (c
& 07))
521 return FALSE
; /* spare field doesn't match up */
522 data
= do_ea(data
, modrm
, asize
, segsize
,
523 &ins
->oprs
[(c
>> 3) & 07], ins
->rex
);
524 } else if (c
>= 0300 && c
<= 0302) {
526 } else if (c
== 0310) {
531 } else if (c
== 0311) {
536 } else if (c
== 0312) {
537 if (asize
!= segsize
)
541 } else if (c
== 0313) {
546 } else if (c
== 0320) {
551 } else if (c
== 0321) {
556 } else if (c
== 0322) {
557 if (osize
!= (segsize
== 16) ? 16 : 32)
561 } else if (c
== 0323) {
562 ins
->rex
|= REX_W
; /* 64-bit only instruction */
564 } else if (c
== 0324) {
565 if (!(ins
->rex
& (REX_P
|REX_W
)) || osize
!= 64)
567 } else if (c
== 0330) {
568 int t
= *r
++, d
= *data
++;
569 if (d
< t
|| d
> t
+ 15)
572 ins
->condition
= d
- t
;
573 } else if (c
== 0331) {
576 } else if (c
== 0332) {
577 if (prefix
->rep
!= 0xF2)
579 } else if (c
== 0333) {
580 if (prefix
->rep
!= 0xF3)
583 } else if (c
== 0334) {
588 } else if (c
== 0335) {
591 } else if (c
== 0364) {
594 } else if (c
== 0365) {
597 } else if (c
== 0366) {
601 } else if (c
== 0367) {
609 * Check for unused rep or a/o prefixes.
613 ins
->prefixes
[ins
->nprefix
++] = P_LOCK
;
615 ins
->prefixes
[ins
->nprefix
++] = drep
;
616 if (!a_used
&& asize
!= segsize
)
617 ins
->prefixes
[ins
->nprefix
++] = asize
== 16 ? P_A16
: P_A32
;
618 if (!o_used
&& osize
== ((segsize
== 16) ? 32 : 16))
619 ins
->prefixes
[ins
->nprefix
++] = osize
== 16 ? P_O16
: P_O32
;
621 /* Fix: check for redundant REX prefixes */
623 return data
- origdata
;
626 int32_t disasm(uint8_t *data
, char *output
, int outbufsize
, int segsize
,
627 int32_t offset
, int autosync
, uint32_t prefer
)
629 const struct itemplate
* const *p
, * const *best_p
;
630 int length
, best_length
= 0;
636 uint32_t goodness
, best
;
638 struct prefix_info prefix
;
640 memset(&ins
, 0, sizeof ins
);
645 memset(&prefix
, 0, sizeof prefix
);
646 prefix
.asize
= segsize
;
647 prefix
.osize
= (segsize
== 64) ? 32 : segsize
;
651 if (*data
== 0xF3 || *data
== 0xF2)
652 prefix
.rep
= *data
++;
653 else if (*data
== 0xF0)
654 prefix
.lock
= *data
++;
655 else if (*data
== 0x2E)
656 segover
= "cs", prefix
.seg
= *data
++;
657 else if (*data
== 0x36)
658 segover
= "ss", prefix
.seg
= *data
++;
659 else if (*data
== 0x3E)
660 segover
= "ds", prefix
.seg
= *data
++;
661 else if (*data
== 0x26)
662 segover
= "es", prefix
.seg
= *data
++;
663 else if (*data
== 0x64)
664 segover
= "fs", prefix
.seg
= *data
++;
665 else if (*data
== 0x65)
666 segover
= "gs", prefix
.seg
= *data
++;
667 else if (*data
== 0x66) {
668 prefix
.osize
= (segsize
== 16) ? 32 : 16;
669 prefix
.osp
= *data
++;
670 } else if (*data
== 0x67) {
671 prefix
.asize
= (segsize
== 32) ? 16 : 32;
672 prefix
.asp
= *data
++;
673 } else if (segsize
== 64 && (*data
& 0xf0) == REX_P
) {
674 prefix
.rex
= *data
++;
675 if (prefix
.rex
& REX_W
)
677 break; /* REX is always the last prefix */
683 best
= -1; /* Worst possible */
687 for (p
= itable
[*data
]; *p
; p
++) {
688 if ((length
= matches(*p
, data
, &prefix
, segsize
, &tmp_ins
))) {
691 * Final check to make sure the types of r/m match up.
692 * XXX: Need to make sure this is actually correct.
694 for (i
= 0; i
< (*p
)->operands
; i
++) {
696 /* If it's a mem-only EA but we have a register, die. */
697 ((tmp_ins
.oprs
[i
].segment
& SEG_RMREG
) &&
698 !(MEMORY
& ~(*p
)->opd
[i
])) ||
699 /* If it's a reg-only EA but we have a memory ref, die. */
700 (!(tmp_ins
.oprs
[i
].segment
& SEG_RMREG
) &&
701 !(REG_EA
& ~(*p
)->opd
[i
]) &&
702 !((*p
)->opd
[i
] & REG_SMASK
)) ||
703 /* Register type mismatch (eg FS vs REG_DESS): die. */
704 ((((*p
)->opd
[i
] & (REGISTER
| FPUREG
)) ||
705 (tmp_ins
.oprs
[i
].segment
& SEG_RMREG
)) &&
706 !whichreg((*p
)->opd
[i
],
707 tmp_ins
.oprs
[i
].basereg
, tmp_ins
.rex
))) {
714 * Note: we always prefer instructions which incorporate
715 * prefixes in the instructions themselves. This is to allow
716 * e.g. PAUSE to be preferred to REP NOP, and deal with
717 * MMX/SSE instructions where prefixes are used to select
718 * between MMX and SSE register sets or outright opcode
722 goodness
= ((*p
)->flags
& IF_PFMASK
) ^ prefer
;
723 if (tmp_ins
.nprefix
< best_pref
||
724 (tmp_ins
.nprefix
== best_pref
&& goodness
< best
)) {
725 /* This is the best one found so far */
728 best_pref
= tmp_ins
.nprefix
;
729 best_length
= length
;
737 return 0; /* no instruction was matched */
739 /* Pick the best match */
741 length
= best_length
;
745 /* TODO: snprintf returns the value that the string would have if
746 * the buffer were long enough, and not the actual length of
747 * the returned string, so each instance of using the return
748 * value of snprintf should actually be checked to assure that
749 * the return value is "sane." Maybe a macro wrapper could
750 * be used for that purpose.
752 for (i
= 0; i
< ins
.nprefix
; i
++)
753 switch (ins
.prefixes
[i
]) {
755 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "lock ");
758 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "rep ");
761 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "repe ");
764 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "repne ");
767 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "a16 ");
770 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "a32 ");
773 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "o16 ");
776 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "o32 ");
782 for (i
= 0; i
< (int)elements(ico
); i
++)
783 if ((*p
)->opcode
== ico
[i
]) {
785 snprintf(output
+ slen
, outbufsize
- slen
, "%s%s", icn
[i
],
786 whichcond(ins
.condition
));
789 if (i
>= (int)elements(ico
))
791 snprintf(output
+ slen
, outbufsize
- slen
, "%s",
792 insn_names
[(*p
)->opcode
]);
794 length
+= data
- origdata
; /* fix up for prefixes */
795 for (i
= 0; i
< (*p
)->operands
; i
++) {
796 output
[slen
++] = (colon
? ':' : i
== 0 ? ' ' : ',');
798 if (ins
.oprs
[i
].segment
& SEG_RELATIVE
) {
799 ins
.oprs
[i
].offset
+= offset
+ length
;
801 * sort out wraparound
803 if (!(ins
.oprs
[i
].segment
& (SEG_32BIT
|SEG_64BIT
)))
804 ins
.oprs
[i
].offset
&= 0xffff;
806 * add sync marker, if autosync is on
809 add_sync(ins
.oprs
[i
].offset
, 0L);
812 if ((*p
)->opd
[i
] & COLON
)
817 if (((*p
)->opd
[i
] & (REGISTER
| FPUREG
)) ||
818 (ins
.oprs
[i
].segment
& SEG_RMREG
)) {
819 ins
.oprs
[i
].basereg
= whichreg((*p
)->opd
[i
],
820 ins
.oprs
[i
].basereg
, ins
.rex
);
821 if ((*p
)->opd
[i
] & TO
)
822 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "to ");
823 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "%s",
824 reg_names
[ins
.oprs
[i
].basereg
-
826 } else if (!(UNITY
& ~(*p
)->opd
[i
])) {
827 output
[slen
++] = '1';
828 } else if ((*p
)->opd
[i
] & IMMEDIATE
) {
829 if ((*p
)->opd
[i
] & BITS8
) {
831 snprintf(output
+ slen
, outbufsize
- slen
, "byte ");
832 if (ins
.oprs
[i
].segment
& SEG_SIGNED
) {
833 if (ins
.oprs
[i
].offset
< 0) {
834 ins
.oprs
[i
].offset
*= -1;
835 output
[slen
++] = '-';
837 output
[slen
++] = '+';
839 } else if ((*p
)->opd
[i
] & BITS16
) {
841 snprintf(output
+ slen
, outbufsize
- slen
, "word ");
842 } else if ((*p
)->opd
[i
] & BITS32
) {
844 snprintf(output
+ slen
, outbufsize
- slen
, "dword ");
845 } else if ((*p
)->opd
[i
] & BITS64
) {
847 snprintf(output
+ slen
, outbufsize
- slen
, "qword ");
848 } else if ((*p
)->opd
[i
] & NEAR
) {
850 snprintf(output
+ slen
, outbufsize
- slen
, "near ");
851 } else if ((*p
)->opd
[i
] & SHORT
) {
853 snprintf(output
+ slen
, outbufsize
- slen
, "short ");
856 snprintf(output
+ slen
, outbufsize
- slen
, "0x%"PRIx64
"",
858 } else if (!(MEM_OFFS
& ~(*p
)->opd
[i
])) {
860 snprintf(output
+ slen
, outbufsize
- slen
, "[%s%s%s0x%"PRIx64
"]",
861 (segover
? segover
: ""),
862 (segover
? ":" : ""),
863 (ins
.oprs
[i
].addr_size
==
864 32 ? "dword " : ins
.oprs
[i
].addr_size
==
865 16 ? "word " : ""), ins
.oprs
[i
].offset
);
867 } else if (!(REGMEM
& ~(*p
)->opd
[i
])) {
869 if ((*p
)->opd
[i
] & BITS8
)
871 snprintf(output
+ slen
, outbufsize
- slen
, "byte ");
872 if ((*p
)->opd
[i
] & BITS16
)
874 snprintf(output
+ slen
, outbufsize
- slen
, "word ");
875 if ((*p
)->opd
[i
] & BITS32
)
877 snprintf(output
+ slen
, outbufsize
- slen
, "dword ");
878 if ((*p
)->opd
[i
] & BITS64
)
880 snprintf(output
+ slen
, outbufsize
- slen
, "qword ");
881 if ((*p
)->opd
[i
] & BITS80
)
883 snprintf(output
+ slen
, outbufsize
- slen
, "tword ");
884 if ((*p
)->opd
[i
] & FAR
)
885 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "far ");
886 if ((*p
)->opd
[i
] & NEAR
)
888 snprintf(output
+ slen
, outbufsize
- slen
, "near ");
889 output
[slen
++] = '[';
890 if (ins
.oprs
[i
].addr_size
)
891 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "%s",
892 (ins
.oprs
[i
].addr_size
== 64 ? "qword " :
893 ins
.oprs
[i
].addr_size
== 32 ? "dword " :
894 ins
.oprs
[i
].addr_size
== 16 ? "word " :
896 if (ins
.oprs
[i
].eaflags
& EAF_REL
)
897 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "rel ");
900 snprintf(output
+ slen
, outbufsize
- slen
, "%s:",
904 if (ins
.oprs
[i
].basereg
!= -1) {
905 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "%s",
906 reg_names
[(ins
.oprs
[i
].basereg
-
910 if (ins
.oprs
[i
].indexreg
!= -1) {
912 output
[slen
++] = '+';
913 slen
+= snprintf(output
+ slen
, outbufsize
- slen
, "%s",
914 reg_names
[(ins
.oprs
[i
].indexreg
-
916 if (ins
.oprs
[i
].scale
> 1)
918 snprintf(output
+ slen
, outbufsize
- slen
, "*%d",
922 if (ins
.oprs
[i
].segment
& SEG_DISP8
) {
924 int8_t offset
= ins
.oprs
[i
].offset
;
930 snprintf(output
+ slen
, outbufsize
- slen
, "%s0x%"PRIx8
"",
931 minus
? "-" : "+", offset
);
932 } else if (ins
.oprs
[i
].segment
& SEG_DISP16
) {
934 int16_t offset
= ins
.oprs
[i
].offset
;
940 snprintf(output
+ slen
, outbufsize
- slen
, "%s0x%"PRIx16
"",
941 minus
? "-" : started
? "+" : "", offset
);
942 } else if (ins
.oprs
[i
].segment
& SEG_DISP32
) {
944 int32_t offset
= ins
.oprs
[i
].offset
;
949 prefix
= started
? "+" : "";
952 snprintf(output
+ slen
, outbufsize
- slen
,
953 "%s0x%"PRIx32
"", prefix
, offset
);
955 output
[slen
++] = ']';
958 snprintf(output
+ slen
, outbufsize
- slen
, "<operand%d>",
963 if (segover
) { /* unused segment override */
965 int count
= slen
+ 1;
967 p
[count
+ 3] = p
[count
];
968 strncpy(output
, segover
, 2);
974 int32_t eatbyte(uint8_t *data
, char *output
, int outbufsize
)
976 snprintf(output
, outbufsize
, "db 0x%02X", *data
);