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[nasm/autotest.git] / disasm.c
blobb27ca3900cf9f6081880bd48b3ba84f23cedc8cb
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <limits.h>
14 #include <inttypes.h>
15
16 #include "nasm.h"
17 #include "disasm.h"
18 #include "sync.h"
19 #include "insns.h"
20
21 #include "names.c"
22
23 /*
24 * Flags that go into the `segment' field of `insn' structures
25 * during disassembly.
26 */
27 #define SEG_RELATIVE 1
28 #define SEG_32BIT 2
29 #define SEG_RMREG 4
30 #define SEG_DISP8 8
31 #define SEG_DISP16 16
32 #define SEG_DISP32 32
33 #define SEG_NODISP 64
34 #define SEG_SIGNED 128
35 #define SEG_64BIT 256
36
37 #include "regdis.c"
38
39 #define getu8(x) (*(uint8_t *)(x))
40 #if defined(__i386__) || defined(__x86_64__)
41 /* Littleendian CPU which can handle unaligned references */
42 #define getu16(x) (*(uint16_t *)(x))
43 #define getu32(x) (*(uint32_t *)(x))
44 #define getu64(x) (*(uint64_t *)(x))
45 #else
46 static uint16_t getu16(uint8_t *data)
47 {
48 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
49 }
50 static uint32_t getu32(uint8_t *data)
51 {
52 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
53 }
54 static uint64_t getu64(uint8_t *data)
55 {
56 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
57 }
58 #endif
59
60 #define gets8(x) ((int8_t)getu8(x))
61 #define gets16(x) ((int16_t)getu16(x))
62 #define gets32(x) ((int32_t)getu32(x))
63 #define gets64(x) ((int64_t)getu64(x))
64
65 /* Important: regval must already have been adjusted for rex extensions */
66 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
67 {
68 if (!(REG_AL & ~regflags))
69 return R_AL;
70 if (!(REG_AX & ~regflags))
71 return R_AX;
72 if (!(REG_EAX & ~regflags))
73 return R_EAX;
74 if (!(REG_RAX & ~regflags))
75 return R_RAX;
76 if (!(REG_DL & ~regflags))
77 return R_DL;
78 if (!(REG_DX & ~regflags))
79 return R_DX;
80 if (!(REG_EDX & ~regflags))
81 return R_EDX;
82 if (!(REG_RDX & ~regflags))
83 return R_RDX;
84 if (!(REG_CL & ~regflags))
85 return R_CL;
86 if (!(REG_CX & ~regflags))
87 return R_CX;
88 if (!(REG_ECX & ~regflags))
89 return R_ECX;
90 if (!(REG_RCX & ~regflags))
91 return R_RCX;
92 if (!(FPU0 & ~regflags))
93 return R_ST0;
94 if (!(REG_CS & ~regflags))
95 return (regval == 1) ? R_CS : 0;
96 if (!(REG_DESS & ~regflags))
97 return (regval == 0 || regval == 2
98 || regval == 3 ? rd_sreg[regval] : 0);
99 if (!(REG_FSGS & ~regflags))
100 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
101 if (!(REG_SEG67 & ~regflags))
102 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
103
104 /* All the entries below look up regval in an 16-entry array */
105 if (regval < 0 || regval > 15)
106 return 0;
107
108 if (!((REGMEM | BITS8) & ~regflags)) {
109 if (rex & REX_P)
110 return rd_reg8_rex[regval];
111 else
112 return rd_reg8[regval];
113 }
114 if (!((REGMEM | BITS16) & ~regflags))
115 return rd_reg16[regval];
116 if (!((REGMEM | BITS32) & ~regflags))
117 return rd_reg32[regval];
118 if (!((REGMEM | BITS64) & ~regflags))
119 return rd_reg64[regval];
120 if (!(REG_SREG & ~regflags))
121 return rd_sreg[regval & 7]; /* Ignore REX */
122 if (!(REG_CREG & ~regflags))
123 return rd_creg[regval];
124 if (!(REG_DREG & ~regflags))
125 return rd_dreg[regval];
126 if (!(REG_TREG & ~regflags)) {
127 if (rex & REX_P)
128 return 0; /* TR registers are ill-defined with rex */
129 return rd_treg[regval];
130 }
131 if (!(FPUREG & ~regflags))
132 return rd_fpureg[regval & 7]; /* Ignore REX */
133 if (!(MMXREG & ~regflags))
134 return rd_mmxreg[regval & 7]; /* Ignore REX */
135 if (!(XMMREG & ~regflags))
136 return rd_xmmreg[regval];
137
138 return 0;
139 }
140
141 static const char *whichcond(int condval)
142 {
143 static int conds[] = {
144 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
145 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
146 };
147 return conditions[conds[condval]];
148 }
149
150 /*
151 * Process an effective address (ModRM) specification.
152 */
153 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
154 int segsize, operand * op, int rex)
155 {
156 int mod, rm, scale, index, base;
157
158 mod = (modrm >> 6) & 03;
159 rm = modrm & 07;
160
161 if (mod == 3) { /* pure register version */
162 op->basereg = rm+(rex & REX_B ? 8 : 0);
163 op->segment |= SEG_RMREG;
164 return data;
165 }
166
167 op->addr_size = 0;
168 op->eaflags = 0;
169
170 if (asize == 16) {
171 /*
172 * <mod> specifies the displacement size (none, byte or
173 * word), and <rm> specifies the register combination.
174 * Exception: mod=0,rm=6 does not specify [BP] as one might
175 * expect, but instead specifies [disp16].
176 */
177 op->indexreg = op->basereg = -1;
178 op->scale = 1; /* always, in 16 bits */
179 switch (rm) {
180 case 0:
181 op->basereg = R_BX;
182 op->indexreg = R_SI;
183 break;
184 case 1:
185 op->basereg = R_BX;
186 op->indexreg = R_DI;
187 break;
188 case 2:
189 op->basereg = R_BP;
190 op->indexreg = R_SI;
191 break;
192 case 3:
193 op->basereg = R_BP;
194 op->indexreg = R_DI;
195 break;
196 case 4:
197 op->basereg = R_SI;
198 break;
199 case 5:
200 op->basereg = R_DI;
201 break;
202 case 6:
203 op->basereg = R_BP;
204 break;
205 case 7:
206 op->basereg = R_BX;
207 break;
208 }
209 if (rm == 6 && mod == 0) { /* special case */
210 op->basereg = -1;
211 if (segsize != 16)
212 op->addr_size = 16;
213 mod = 2; /* fake disp16 */
214 }
215 switch (mod) {
216 case 0:
217 op->segment |= SEG_NODISP;
218 break;
219 case 1:
220 op->segment |= SEG_DISP8;
221 op->offset = (int8_t)*data++;
222 break;
223 case 2:
224 op->segment |= SEG_DISP16;
225 op->offset = *data++;
226 op->offset |= ((unsigned)*data++) << 8;
227 break;
228 }
229 return data;
230 } else {
231 /*
232 * Once again, <mod> specifies displacement size (this time
233 * none, byte or *dword*), while <rm> specifies the base
234 * register. Again, [EBP] is missing, replaced by a pure
235 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
236 * and RIP-relative addressing in 64-bit mode.
237 *
238 * However, rm=4
239 * indicates not a single base register, but instead the
240 * presence of a SIB byte...
241 */
242 int a64 = asize == 64;
243
244 op->indexreg = -1;
245
246 if (a64)
247 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
248 else
249 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
250
251 if (rm == 5 && mod == 0) {
252 if (segsize == 64) {
253 op->eaflags |= EAF_REL;
254 op->segment |= SEG_RELATIVE;
255 mod = 2; /* fake disp32 */
256 }
257
258 if (asize != 64)
259 op->addr_size = asize;
260
261 op->basereg = -1;
262 mod = 2; /* fake disp32 */
263 }
264
265 if (rm == 4) { /* process SIB */
266 scale = (*data >> 6) & 03;
267 index = (*data >> 3) & 07;
268 base = *data & 07;
269 data++;
270
271 op->scale = 1 << scale;
272
273 if (index == 4)
274 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
275 else if (a64)
276 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
277 else
278 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
279
280 if (base == 5 && mod == 0) {
281 op->basereg = -1;
282 mod = 2; /* Fake disp32 */
283 } else if (a64)
284 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
285 else
286 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
287
288 if (segsize != 32)
289 op->addr_size = 32;
290 }
291
292 switch (mod) {
293 case 0:
294 op->segment |= SEG_NODISP;
295 break;
296 case 1:
297 op->segment |= SEG_DISP8;
298 op->offset = gets8(data);
299 data++;
300 break;
301 case 2:
302 op->segment |= SEG_DISP32;
303 op->offset = getu32(data);
304 data += 4;
305 break;
306 }
307 return data;
308 }
309 }
310
311 /*
312 * Determine whether the instruction template in t corresponds to the data
313 * stream in data. Return the number of bytes matched if so.
314 */
315 static int matches(const struct itemplate *t, uint8_t *data, int asize,
316 int osize, int segsize, int rep, insn * ins,
317 int rex, int *rexout, int lock)
318 {
319 uint8_t *r = (uint8_t *)(t->code);
320 uint8_t *origdata = data;
321 int a_used = FALSE, o_used = FALSE;
322 int drep = 0;
323
324 ins->oprs[0].segment = ins->oprs[1].segment =
325 ins->oprs[2].segment =
326 ins->oprs[0].addr_size = ins->oprs[1].addr_size =
327 ins->oprs[2].addr_size = (segsize == 64 ? SEG_64BIT :
328 segsize == 32 ? SEG_32BIT : 0);
329 ins->condition = -1;
330
331 *rexout = rex;
332
333 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
334 return FALSE;
335
336 if (rep == 0xF2)
337 drep = P_REPNE;
338 else if (rep == 0xF3)
339 drep = P_REP;
340
341 while (*r) {
342 int c = *r++;
343
344 /* FIX: change this into a switch */
345 if (c >= 01 && c <= 03) {
346 while (c--)
347 if (*r++ != *data++)
348 return FALSE;
349 } else if (c == 04) {
350 switch (*data++) {
351 case 0x07:
352 ins->oprs[0].basereg = 0;
353 break;
354 case 0x17:
355 ins->oprs[0].basereg = 2;
356 break;
357 case 0x1F:
358 ins->oprs[0].basereg = 3;
359 break;
360 default:
361 return FALSE;
362 }
363 } else if (c == 05) {
364 switch (*data++) {
365 case 0xA1:
366 ins->oprs[0].basereg = 4;
367 break;
368 case 0xA9:
369 ins->oprs[0].basereg = 5;
370 break;
371 default:
372 return FALSE;
373 }
374 } else if (c == 06) {
375 switch (*data++) {
376 case 0x06:
377 ins->oprs[0].basereg = 0;
378 break;
379 case 0x0E:
380 ins->oprs[0].basereg = 1;
381 break;
382 case 0x16:
383 ins->oprs[0].basereg = 2;
384 break;
385 case 0x1E:
386 ins->oprs[0].basereg = 3;
387 break;
388 default:
389 return FALSE;
390 }
391 } else if (c == 07) {
392 switch (*data++) {
393 case 0xA0:
394 ins->oprs[0].basereg = 4;
395 break;
396 case 0xA8:
397 ins->oprs[0].basereg = 5;
398 break;
399 default:
400 return FALSE;
401 }
402 } else if (c >= 010 && c <= 012) {
403 int t = *r++, d = *data++;
404 if (d < t || d > t + 7)
405 return FALSE;
406 else {
407 ins->oprs[c - 010].basereg = (d-t)+(rex & REX_B ? 8 : 0);
408 ins->oprs[c - 010].segment |= SEG_RMREG;
409 }
410 } else if (c == 017) {
411 if (*data++)
412 return FALSE;
413 } else if (c >= 014 && c <= 016) {
414 ins->oprs[c - 014].offset = (int8_t)*data++;
415 ins->oprs[c - 014].segment |= SEG_SIGNED;
416 } else if (c >= 020 && c <= 022) {
417 ins->oprs[c - 020].offset = *data++;
418 } else if (c >= 024 && c <= 026) {
419 ins->oprs[c - 024].offset = *data++;
420 } else if (c >= 030 && c <= 032) {
421 ins->oprs[c - 030].offset = getu16(data);
422 data += 2;
423 } else if (c >= 034 && c <= 036) {
424 if (osize == 32) {
425 ins->oprs[c - 034].offset = getu32(data);
426 data += 4;
427 } else {
428 ins->oprs[c - 034].offset = getu16(data);
429 data += 2;
430 }
431 if (segsize != asize)
432 ins->oprs[c - 034].addr_size = asize;
433 } else if (c >= 040 && c <= 042) {
434 ins->oprs[c - 040].offset = getu32(data);
435 data += 4;
436 } else if (c >= 044 && c <= 046) {
437 switch (asize) {
438 case 16:
439 ins->oprs[c - 044].offset = getu16(data);
440 data += 2;
441 break;
442 case 32:
443 ins->oprs[c - 044].offset = getu32(data);
444 data += 4;
445 break;
446 case 64:
447 ins->oprs[c - 044].offset = getu64(data);
448 data += 8;
449 break;
450 }
451 if (segsize != asize)
452 ins->oprs[c - 044].addr_size = asize;
453 } else if (c >= 050 && c <= 052) {
454 ins->oprs[c - 050].offset = gets8(data++);
455 ins->oprs[c - 050].segment |= SEG_RELATIVE;
456 } else if (c >= 054 && c <= 056) {
457 ins->oprs[c - 054].offset = getu64(data);
458 data += 8;
459 } else if (c >= 060 && c <= 062) {
460 ins->oprs[c - 060].offset = gets16(data);
461 data += 2;
462 ins->oprs[c - 060].segment |= SEG_RELATIVE;
463 ins->oprs[c - 060].segment &= ~SEG_32BIT;
464 } else if (c >= 064 && c <= 066) {
465 if (osize == 16) {
466 ins->oprs[c - 064].offset = getu16(data);
467 data += 2;
468 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
469 } else if (osize == 32) {
470 ins->oprs[c - 064].offset = getu32(data);
471 data += 4;
472 ins->oprs[c - 064].segment &= ~SEG_64BIT;
473 ins->oprs[c - 064].segment |= SEG_32BIT;
474 }
475 if (segsize != osize) {
476 ins->oprs[c - 064].type =
477 (ins->oprs[c - 064].type & ~SIZE_MASK)
478 | ((osize == 16) ? BITS16 : BITS32);
479 }
480 } else if (c >= 070 && c <= 072) {
481 ins->oprs[c - 070].offset = getu32(data);
482 data += 4;
483 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
484 } else if (c >= 0100 && c < 0130) {
485 int modrm = *data++;
486 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+(rex & REX_R ? 8 : 0);
487 ins->oprs[c & 07].segment |= SEG_RMREG;
488 data = do_ea(data, modrm, asize, segsize,
489 &ins->oprs[(c >> 3) & 07], rex);
490 } else if (c >= 0130 && c <= 0132) {
491 ins->oprs[c - 0130].offset = getu16(data);
492 data += 2;
493 } else if (c >= 0140 && c <= 0142) {
494 ins->oprs[c - 0140].offset = getu32(data);
495 data += 4;
496 } else if (c >= 0200 && c <= 0277) {
497 int modrm = *data++;
498 if (((modrm >> 3) & 07) != (c & 07))
499 return FALSE; /* spare field doesn't match up */
500 data = do_ea(data, modrm, asize, segsize,
501 &ins->oprs[(c >> 3) & 07], rex);
502 } else if (c >= 0300 && c <= 0302) {
503 a_used = TRUE;
504 } else if (c == 0310) {
505 if (asize != 16)
506 return FALSE;
507 else
508 a_used = TRUE;
509 } else if (c == 0311) {
510 if (asize == 16)
511 return FALSE;
512 else
513 a_used = TRUE;
514 } else if (c == 0312) {
515 if (asize != segsize)
516 return FALSE;
517 else
518 a_used = TRUE;
519 } else if (c == 0313) {
520 if (asize != 64)
521 return FALSE;
522 else
523 a_used = TRUE;
524 } else if (c == 0320) {
525 if (osize != 16)
526 return FALSE;
527 else
528 o_used = TRUE;
529 } else if (c == 0321) {
530 if (osize != 32)
531 return FALSE;
532 else
533 o_used = TRUE;
534 } else if (c == 0322) {
535 if (osize != (segsize == 16) ? 16 : 32)
536 return FALSE;
537 else
538 o_used = TRUE;
539 } else if (c == 0323) {
540 rex |= REX_W; /* 64-bit only instruction */
541 osize = 64;
542 } else if (c == 0324) {
543 if (!(rex & (REX_P|REX_W)) || osize != 64)
544 return FALSE;
545 } else if (c == 0330) {
546 int t = *r++, d = *data++;
547 if (d < t || d > t + 15)
548 return FALSE;
549 else
550 ins->condition = d - t;
551 } else if (c == 0331) {
552 if (rep)
553 return FALSE;
554 } else if (c == 0332) {
555 if (drep == P_REP)
556 drep = P_REPE;
557 } else if (c == 0333) {
558 if (rep != 0xF3)
559 return FALSE;
560 drep = 0;
561 } else if (c == 0334) {
562 if (lock) {
563 rex |= REX_R;
564 lock = 0;
565 }
566 } else if (c == 0366) {
567 /* Fix: should look specifically for the presence of the prefix */
568 if (osize != ((segsize == 16) ? 32 : 16))
569 return FALSE;
570 o_used = TRUE;
571 }
572 }
573
574 /*
575 * Check for unused rep or a/o prefixes.
576 */
577 ins->nprefix = 0;
578 if (lock)
579 ins->prefixes[ins->nprefix++] = P_LOCK;
580 if (drep)
581 ins->prefixes[ins->nprefix++] = drep;
582 if (!a_used && asize != segsize)
583 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
584 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
585 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
586
587 /* Fix: check for redundant REX prefixes */
588
589 *rexout = rex;
590 return data - origdata;
591 }
592
593 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
594 int32_t offset, int autosync, uint32_t prefer)
595 {
596 const struct itemplate * const *p, * const *best_p;
597 int length, best_length = 0;
598 char *segover;
599 int rep, lock, asize, osize, i, slen, colon, rex, rexout;
600 int best_rex, best_pref;
601 uint8_t *origdata;
602 int works;
603 insn tmp_ins, ins;
604 uint32_t goodness, best;
605
606 memset(&ins, 0, sizeof ins);
607
608 /*
609 * Scan for prefixes.
610 */
611 asize = segsize;
612 osize = (segsize == 64) ? 32 : segsize;
613 rex = 0;
614 segover = NULL;
615 rep = lock = 0;
616 origdata = data;
617 for (;;) {
618 if (*data == 0xF3 || *data == 0xF2)
619 rep = *data++;
620 else if (*data == 0xF0)
621 lock = *data++;
622 else if (*data == 0x2E)
623 segover = "cs", data++;
624 else if (*data == 0x36)
625 segover = "ss", data++;
626 else if (*data == 0x3E)
627 segover = "ds", data++;
628 else if (*data == 0x26)
629 segover = "es", data++;
630 else if (*data == 0x64)
631 segover = "fs", data++;
632 else if (*data == 0x65)
633 segover = "gs", data++;
634 else if (*data == 0x66) {
635 osize = (segsize == 16) ? 32 : 16;
636 data++;
637 } else if (*data == 0x67) {
638 asize = (segsize == 32) ? 16 : 32;
639 data++;
640 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
641 rex = *data++;
642 if (rex & REX_W)
643 osize = 64;
644 break; /* REX is always the last prefix */
645 } else {
646 break;
647 }
648 }
649
650 best = -1; /* Worst possible */
651 best_p = NULL;
652 best_rex = 0;
653 best_pref = INT_MAX;
654
655 for (p = itable[*data]; *p; p++) {
656 if ((length = matches(*p, data, asize, osize, segsize, rep,
657 &tmp_ins, rex, &rexout, lock))) {
658 works = TRUE;
659 /*
660 * Final check to make sure the types of r/m match up.
661 * XXX: Need to make sure this is actually correct.
662 */
663 for (i = 0; i < (*p)->operands; i++) {
664 if (
665 /* If it's a mem-only EA but we have a register, die. */
666 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
667 !(MEMORY & ~(*p)->opd[i])) ||
668 /* If it's a reg-only EA but we have a memory ref, die. */
669 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
670 !(REG_EA & ~(*p)->opd[i]) &&
671 !((*p)->opd[i] & REG_SMASK)) ||
672 /* Register type mismatch (eg FS vs REG_DESS): die. */
673 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
674 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
675 !whichreg((*p)->opd[i],
676 tmp_ins.oprs[i].basereg, rexout))) {
677 works = FALSE;
678 break;
679 }
680 }
681
682 /*
683 * Note: we always prefer instructions which incorporate
684 * prefixes in the instructions themselves. This is to allow
685 * e.g. PAUSE to be preferred to REP NOP, and deal with
686 * MMX/SSE instructions where prefixes are used to select
687 * between MMX and SSE register sets or outright opcode
688 * selection.
689 */
690 if (works) {
691 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
692 if (tmp_ins.nprefix < best_pref ||
693 (tmp_ins.nprefix == best_pref && goodness < best)) {
694 /* This is the best one found so far */
695 best = goodness;
696 best_p = p;
697 best_pref = tmp_ins.nprefix;
698 best_length = length;
699 ins = tmp_ins;
700 best_rex = rexout;
701 }
702 }
703 }
704 }
705
706 if (!best_p)
707 return 0; /* no instruction was matched */
708
709 /* Pick the best match */
710 p = best_p;
711 length = best_length;
712 rex = best_rex;
713 if (best_rex & REX_W)
714 osize = 64;
715
716 slen = 0;
717
718 /* TODO: snprintf returns the value that the string would have if
719 * the buffer were long enough, and not the actual length of
720 * the returned string, so each instance of using the return
721 * value of snprintf should actually be checked to assure that
722 * the return value is "sane." Maybe a macro wrapper could
723 * be used for that purpose.
724 */
725 for (i = 0; i < ins.nprefix; i++)
726 switch (ins.prefixes[i]) {
727 case P_LOCK:
728 slen += snprintf(output + slen, outbufsize - slen, "lock ");
729 break;
730 case P_REP:
731 slen += snprintf(output + slen, outbufsize - slen, "rep ");
732 break;
733 case P_REPE:
734 slen += snprintf(output + slen, outbufsize - slen, "repe ");
735 break;
736 case P_REPNE:
737 slen += snprintf(output + slen, outbufsize - slen, "repne ");
738 break;
739 case P_A16:
740 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
741 break;
742 case P_A32:
743 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
744 break;
745 case P_O16:
746 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
747 break;
748 case P_O32:
749 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
750 break;
751 default:
752 break;
753 }
754
755 for (i = 0; i < (int)elements(ico); i++)
756 if ((*p)->opcode == ico[i]) {
757 slen +=
758 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
759 whichcond(ins.condition));
760 break;
761 }
762 if (i >= (int)elements(ico))
763 slen +=
764 snprintf(output + slen, outbufsize - slen, "%s",
765 insn_names[(*p)->opcode]);
766 colon = FALSE;
767 length += data - origdata; /* fix up for prefixes */
768 for (i = 0; i < (*p)->operands; i++) {
769 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
770
771 if (ins.oprs[i].segment & SEG_RELATIVE) {
772 ins.oprs[i].offset += offset + length;
773 /*
774 * sort out wraparound
775 */
776 if (!(ins.oprs[i].segment & (SEG_32BIT|SEG_64BIT)))
777 ins.oprs[i].offset &= 0xffff;
778 /*
779 * add sync marker, if autosync is on
780 */
781 if (autosync)
782 add_sync(ins.oprs[i].offset, 0L);
783 }
784
785 if ((*p)->opd[i] & COLON)
786 colon = TRUE;
787 else
788 colon = FALSE;
789
790 if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
791 (ins.oprs[i].segment & SEG_RMREG)) {
792 ins.oprs[i].basereg = whichreg((*p)->opd[i],
793 ins.oprs[i].basereg, rex);
794 if ((*p)->opd[i] & TO)
795 slen += snprintf(output + slen, outbufsize - slen, "to ");
796 slen += snprintf(output + slen, outbufsize - slen, "%s",
797 reg_names[ins.oprs[i].basereg -
798 EXPR_REG_START]);
799 } else if (!(UNITY & ~(*p)->opd[i])) {
800 output[slen++] = '1';
801 } else if ((*p)->opd[i] & IMMEDIATE) {
802 if ((*p)->opd[i] & BITS8) {
803 slen +=
804 snprintf(output + slen, outbufsize - slen, "byte ");
805 if (ins.oprs[i].segment & SEG_SIGNED) {
806 if (ins.oprs[i].offset < 0) {
807 ins.oprs[i].offset *= -1;
808 output[slen++] = '-';
809 } else
810 output[slen++] = '+';
811 }
812 } else if ((*p)->opd[i] & BITS16) {
813 slen +=
814 snprintf(output + slen, outbufsize - slen, "word ");
815 } else if ((*p)->opd[i] & BITS32) {
816 slen +=
817 snprintf(output + slen, outbufsize - slen, "dword ");
818 } else if ((*p)->opd[i] & BITS64) {
819 slen +=
820 snprintf(output + slen, outbufsize - slen, "qword ");
821 } else if ((*p)->opd[i] & NEAR) {
822 slen +=
823 snprintf(output + slen, outbufsize - slen, "near ");
824 } else if ((*p)->opd[i] & SHORT) {
825 slen +=
826 snprintf(output + slen, outbufsize - slen, "short ");
827 }
828 slen +=
829 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
830 ins.oprs[i].offset);
831 } else if (!(MEM_OFFS & ~(*p)->opd[i])) {
832 slen +=
833 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
834 ((const char*)segover ? (const char*)segover : ""), /* placate type mistmatch warning */
835 ((const char*)segover ? ":" : ""), /* by using (const char*) instead of uint8_t* */
836 (ins.oprs[i].addr_size ==
837 32 ? "dword " : ins.oprs[i].addr_size ==
838 16 ? "word " : ""), ins.oprs[i].offset);
839 segover = NULL;
840 } else if (!(REGMEM & ~(*p)->opd[i])) {
841 int started = FALSE;
842 if ((*p)->opd[i] & BITS8)
843 slen +=
844 snprintf(output + slen, outbufsize - slen, "byte ");
845 if ((*p)->opd[i] & BITS16)
846 slen +=
847 snprintf(output + slen, outbufsize - slen, "word ");
848 if ((*p)->opd[i] & BITS32)
849 slen +=
850 snprintf(output + slen, outbufsize - slen, "dword ");
851 if ((*p)->opd[i] & BITS64)
852 slen +=
853 snprintf(output + slen, outbufsize - slen, "qword ");
854 if ((*p)->opd[i] & BITS80)
855 slen +=
856 snprintf(output + slen, outbufsize - slen, "tword ");
857 if ((*p)->opd[i] & FAR)
858 slen += snprintf(output + slen, outbufsize - slen, "far ");
859 if ((*p)->opd[i] & NEAR)
860 slen +=
861 snprintf(output + slen, outbufsize - slen, "near ");
862 output[slen++] = '[';
863 if (ins.oprs[i].addr_size)
864 slen += snprintf(output + slen, outbufsize - slen, "%s",
865 (ins.oprs[i].addr_size == 64 ? "qword " :
866 ins.oprs[i].addr_size == 32 ? "dword " :
867 ins.oprs[i].addr_size == 16 ? "word " :
868 ""));
869 if (ins.oprs[i].eaflags & EAF_REL)
870 slen += snprintf(output + slen, outbufsize - slen, "rel ");
871 if (segover) {
872 slen +=
873 snprintf(output + slen, outbufsize - slen, "%s:",
874 segover);
875 segover = NULL;
876 }
877 if (ins.oprs[i].basereg != -1) {
878 slen += snprintf(output + slen, outbufsize - slen, "%s",
879 reg_names[(ins.oprs[i].basereg -
880 EXPR_REG_START)]);
881 started = TRUE;
882 }
883 if (ins.oprs[i].indexreg != -1) {
884 if (started)
885 output[slen++] = '+';
886 slen += snprintf(output + slen, outbufsize - slen, "%s",
887 reg_names[(ins.oprs[i].indexreg -
888 EXPR_REG_START)]);
889 if (ins.oprs[i].scale > 1)
890 slen +=
891 snprintf(output + slen, outbufsize - slen, "*%d",
892 ins.oprs[i].scale);
893 started = TRUE;
894 }
895 if (ins.oprs[i].segment & SEG_DISP8) {
896 int minus = 0;
897 int8_t offset = ins.oprs[i].offset;
898 if (offset < 0) {
899 minus = 1;
900 offset = -offset;
901 }
902 slen +=
903 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
904 minus ? "-" : "+", offset);
905 } else if (ins.oprs[i].segment & SEG_DISP16) {
906 int minus = 0;
907 int16_t offset = ins.oprs[i].offset;
908 if (offset < 0) {
909 minus = 1;
910 offset = -offset;
911 }
912 slen +=
913 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
914 minus ? "-" : started ? "+" : "", offset);
915 } else if (ins.oprs[i].segment & SEG_DISP32) {
916 char *prefix = "";
917 int32_t offset = ins.oprs[i].offset;
918 if (offset < 0) {
919 offset = -offset;
920 prefix = "-";
921 } else {
922 prefix = started ? "+" : "";
923 }
924 slen +=
925 snprintf(output + slen, outbufsize - slen,
926 "%s0x%"PRIx32"", prefix, offset);
927 }
928 output[slen++] = ']';
929 } else {
930 slen +=
931 snprintf(output + slen, outbufsize - slen, "<operand%d>",
932 i);
933 }
934 }
935 output[slen] = '\0';
936 if (segover) { /* unused segment override */
937 char *p = output;
938 int count = slen + 1;
939 while (count--)
940 p[count + 3] = p[count];
941 strncpy(output, segover, 2);
942 output[2] = ' ';
943 }
944 return length;
945 }
946
947 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
948 {
949 snprintf(output, outbufsize, "db 0x%02X", *data);
950 return 1;
951 }
Automatic testing