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Fix the handling of \324 for computing the length
[nasm/autotest.git] / disasm.c
blob26273d850149ddbc1342f950f9f0172f504b208e
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <inttypes.h>
14
15 #include "nasm.h"
16 #include "disasm.h"
17 #include "sync.h"
18 #include "insns.h"
19
20 #include "names.c"
21
22 extern struct itemplate **itable[];
23
24 /*
25 * Flags that go into the `segment' field of `insn' structures
26 * during disassembly.
27 */
28 #define SEG_RELATIVE 1
29 #define SEG_32BIT 2
30 #define SEG_RMREG 4
31 #define SEG_DISP8 8
32 #define SEG_DISP16 16
33 #define SEG_DISP32 32
34 #define SEG_NODISP 64
35 #define SEG_SIGNED 128
36 #define SEG_64BIT 256
37
38 /*
39 * REX flags
40 */
41 #define REX_P 0x40 /* REX prefix present */
42 #define REX_W 0x08 /* 64-bit operand size */
43 #define REX_R 0x04 /* ModRM reg extension */
44 #define REX_X 0x02 /* SIB index extension */
45 #define REX_B 0x01 /* ModRM r/m extension */
46
47 #include "regdis.c"
48
49 #define getu8(x) (*(uint8_t *)(x))
50 #if defined(__i386__) || defined(__x86_64__)
51 /* Littleendian CPU which can handle unaligned references */
52 #define getu16(x) (*(uint16_t *)(x))
53 #define getu32(x) (*(uint32_t *)(x))
54 #define getu64(x) (*(uint64_t *)(x))
55 #else
56 static uint16_t getu16(uint8_t *data)
57 {
58 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
59 }
60 static uint32_t getu32(uint8_t *data)
61 {
62 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
63 }
64 static uint64_t getu64(uint8_t *data)
65 {
66 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
67 }
68 #endif
69
70 #define gets8(x) ((int8_t)getu8(x))
71 #define gets16(x) ((int16_t)getu16(x))
72 #define gets32(x) ((int32_t)getu32(x))
73 #define gets64(x) ((int64_t)getu64(x))
74
75 /* Important: regval must already have been adjusted for rex extensions */
76 static int whichreg(int32_t regflags, int regval, int rex)
77 {
78 if (!(REG_AL & ~regflags))
79 return R_AL;
80 if (!(REG_AX & ~regflags))
81 return R_AX;
82 if (!(REG_EAX & ~regflags))
83 return R_EAX;
84 if (!(REG_RAX & ~regflags))
85 return R_RAX;
86 if (!(REG_DL & ~regflags))
87 return R_DL;
88 if (!(REG_DX & ~regflags))
89 return R_DX;
90 if (!(REG_EDX & ~regflags))
91 return R_EDX;
92 if (!(REG_RDX & ~regflags))
93 return R_RDX;
94 if (!(REG_CL & ~regflags))
95 return R_CL;
96 if (!(REG_CX & ~regflags))
97 return R_CX;
98 if (!(REG_ECX & ~regflags))
99 return R_ECX;
100 if (!(REG_RCX & ~regflags))
101 return R_RCX;
102 if (!(FPU0 & ~regflags))
103 return R_ST0;
104 if (!(REG_CS & ~regflags))
105 return (regval == 1) ? R_CS : 0;
106 if (!(REG_DESS & ~regflags))
107 return (regval == 0 || regval == 2
108 || regval == 3 ? rd_sreg[regval] : 0);
109 if (!(REG_FSGS & ~regflags))
110 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
111 if (!(REG_SEG67 & ~regflags))
112 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
113
114 /* All the entries below look up regval in an 16-entry array */
115 if (regval < 0 || regval > 15)
116 return 0;
117
118 if (!((REGMEM | BITS8) & ~regflags)) {
119 if (rex & REX_P)
120 return rd_reg8_rex[regval];
121 else
122 return rd_reg8[regval];
123 }
124 if (!((REGMEM | BITS16) & ~regflags))
125 return rd_reg16[regval];
126 if (!((REGMEM | BITS32) & ~regflags))
127 return rd_reg32[regval];
128 if (!((REGMEM | BITS64) & ~regflags))
129 return rd_reg64[regval];
130 if (!(REG_SREG & ~regflags))
131 return rd_sreg[regval & 7]; /* Ignore REX */
132 if (!(REG_CREG & ~regflags))
133 return rd_creg[regval];
134 if (!(REG_DREG & ~regflags))
135 return rd_dreg[regval];
136 if (!(REG_TREG & ~regflags)) {
137 if (rex & REX_P)
138 return 0; /* TR registers are ill-defined with rex */
139 return rd_treg[regval];
140 }
141 if (!(FPUREG & ~regflags))
142 return rd_fpureg[regval & 7]; /* Ignore REX */
143 if (!(MMXREG & ~regflags))
144 return rd_mmxreg[regval & 7]; /* Ignore REX */
145 if (!(XMMREG & ~regflags))
146 return rd_xmmreg[regval];
147
148 return 0;
149 }
150
151 static const char *whichcond(int condval)
152 {
153 static int conds[] = {
154 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
155 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
156 };
157 return conditions[conds[condval]];
158 }
159
160 /*
161 * Process an effective address (ModRM) specification.
162 */
163 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
164 int segsize, operand * op, int rex)
165 {
166 int mod, rm, scale, index, base;
167
168 mod = (modrm >> 6) & 03;
169 rm = modrm & 07;
170
171 if (mod == 3) { /* pure register version */
172 op->basereg = rm+(rex & REX_B ? 8 : 0);
173 op->segment |= SEG_RMREG;
174 return data;
175 }
176
177 op->addr_size = 0;
178
179 if (asize == 16) {
180 /*
181 * <mod> specifies the displacement size (none, byte or
182 * word), and <rm> specifies the register combination.
183 * Exception: mod=0,rm=6 does not specify [BP] as one might
184 * expect, but instead specifies [disp16].
185 */
186 op->indexreg = op->basereg = -1;
187 op->scale = 1; /* always, in 16 bits */
188 switch (rm) {
189 case 0:
190 op->basereg = R_BX;
191 op->indexreg = R_SI;
192 break;
193 case 1:
194 op->basereg = R_BX;
195 op->indexreg = R_DI;
196 break;
197 case 2:
198 op->basereg = R_BP;
199 op->indexreg = R_SI;
200 break;
201 case 3:
202 op->basereg = R_BP;
203 op->indexreg = R_DI;
204 break;
205 case 4:
206 op->basereg = R_SI;
207 break;
208 case 5:
209 op->basereg = R_DI;
210 break;
211 case 6:
212 op->basereg = R_BP;
213 break;
214 case 7:
215 op->basereg = R_BX;
216 break;
217 }
218 if (rm == 6 && mod == 0) { /* special case */
219 op->basereg = -1;
220 if (segsize != 16)
221 op->addr_size = 16;
222 mod = 2; /* fake disp16 */
223 }
224 switch (mod) {
225 case 0:
226 op->segment |= SEG_NODISP;
227 break;
228 case 1:
229 op->segment |= SEG_DISP8;
230 op->offset = (int8_t)*data++;
231 break;
232 case 2:
233 op->segment |= SEG_DISP16;
234 op->offset = *data++;
235 op->offset |= ((unsigned)*data++) << 8;
236 break;
237 }
238 return data;
239 } else {
240 /*
241 * Once again, <mod> specifies displacement size (this time
242 * none, byte or *dword*), while <rm> specifies the base
243 * register. Again, [EBP] is missing, replaced by a pure
244 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
245 * and RIP-relative addressing in 64-bit mode.
246 *
247 * However, rm=4
248 * indicates not a single base register, but instead the
249 * presence of a SIB byte...
250 */
251 int a64 = asize == 64;
252
253 op->indexreg = -1;
254
255 if (a64)
256 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
257 else
258 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
259
260 if (rm == 5 && mod == 0) {
261 if (segsize == 64) {
262 op->basereg = R_RIP;
263 op->segment |= SEG_RELATIVE;
264 mod = 2; /* fake disp32 */
265 } else {
266 op->basereg = -1;
267 if (segsize != 32)
268 op->addr_size = 32;
269 mod = 2; /* fake disp32 */
270 }
271 }
272
273 if (rm == 4) { /* process SIB */
274 scale = (*data >> 6) & 03;
275 index = (*data >> 3) & 07;
276 base = *data & 07;
277 data++;
278
279 op->scale = 1 << scale;
280
281 if (index == 4)
282 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
283 else if (a64)
284 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
285 else
286 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
287
288 if (base == 5 && mod == 0) {
289 op->basereg = -1;
290 mod = 2; /* Fake disp32 */
291 } else if (a64)
292 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
293 else
294 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
295 }
296
297 switch (mod) {
298 case 0:
299 op->segment |= SEG_NODISP;
300 break;
301 case 1:
302 op->segment |= SEG_DISP8;
303 op->offset = gets8(data);
304 data++;
305 break;
306 case 2:
307 op->segment |= SEG_DISP32;
308 op->offset = getu32(data);
309 data += 4;
310 break;
311 }
312 return data;
313 }
314 }
315
316 /*
317 * Determine whether the instruction template in t corresponds to the data
318 * stream in data. Return the number of bytes matched if so.
319 */
320 static int matches(struct itemplate *t, uint8_t *data, int asize,
321 int osize, int segsize, int rep, insn * ins,
322 int rex, int *rexout, int lock)
323 {
324 uint8_t *r = (uint8_t *)(t->code);
325 uint8_t *origdata = data;
326 int a_used = FALSE, o_used = FALSE;
327 int drep = 0;
328
329 *rexout = rex;
330
331 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
332 return FALSE;
333
334 if (rep == 0xF2)
335 drep = P_REPNE;
336 else if (rep == 0xF3)
337 drep = P_REP;
338
339 while (*r) {
340 int c = *r++;
341
342 /* FIX: change this into a switch */
343 if (c >= 01 && c <= 03) {
344 while (c--)
345 if (*r++ != *data++)
346 return FALSE;
347 } else if (c == 04) {
348 switch (*data++) {
349 case 0x07:
350 ins->oprs[0].basereg = 0;
351 break;
352 case 0x17:
353 ins->oprs[0].basereg = 2;
354 break;
355 case 0x1F:
356 ins->oprs[0].basereg = 3;
357 break;
358 default:
359 return FALSE;
360 }
361 } else if (c == 05) {
362 switch (*data++) {
363 case 0xA1:
364 ins->oprs[0].basereg = 4;
365 break;
366 case 0xA9:
367 ins->oprs[0].basereg = 5;
368 break;
369 default:
370 return FALSE;
371 }
372 } else if (c == 06) {
373 switch (*data++) {
374 case 0x06:
375 ins->oprs[0].basereg = 0;
376 break;
377 case 0x0E:
378 ins->oprs[0].basereg = 1;
379 break;
380 case 0x16:
381 ins->oprs[0].basereg = 2;
382 break;
383 case 0x1E:
384 ins->oprs[0].basereg = 3;
385 break;
386 default:
387 return FALSE;
388 }
389 } else if (c == 07) {
390 switch (*data++) {
391 case 0xA0:
392 ins->oprs[0].basereg = 4;
393 break;
394 case 0xA8:
395 ins->oprs[0].basereg = 5;
396 break;
397 default:
398 return FALSE;
399 }
400 } else if (c >= 010 && c <= 012) {
401 int t = *r++, d = *data++;
402 if (d < t || d > t + 7)
403 return FALSE;
404 else {
405 ins->oprs[c - 010].basereg = (d-t)+(rex & REX_B ? 8 : 0);
406 ins->oprs[c - 010].segment |= SEG_RMREG;
407 }
408 } else if (c == 017) {
409 if (*data++)
410 return FALSE;
411 } else if (c >= 014 && c <= 016) {
412 ins->oprs[c - 014].offset = (int8_t)*data++;
413 ins->oprs[c - 014].segment |= SEG_SIGNED;
414 } else if (c >= 020 && c <= 022) {
415 ins->oprs[c - 020].offset = *data++;
416 } else if (c >= 024 && c <= 026) {
417 ins->oprs[c - 024].offset = *data++;
418 } else if (c >= 030 && c <= 032) {
419 ins->oprs[c - 030].offset = getu16(data);
420 data += 2;
421 } else if (c >= 034 && c <= 036) {
422 if (osize == 32) {
423 ins->oprs[c - 034].offset = getu32(data);
424 data += 4;
425 } else {
426 ins->oprs[c - 034].offset = getu16(data);
427 data += 2;
428 }
429 if (segsize != asize)
430 ins->oprs[c - 034].addr_size = asize;
431 } else if (c >= 040 && c <= 042) {
432 ins->oprs[c - 040].offset = getu32(data);
433 data += 4;
434 } else if (c >= 044 && c <= 046) {
435 switch (asize) {
436 case 16:
437 ins->oprs[c - 044].offset = getu16(data);
438 data += 2;
439 break;
440 case 32:
441 ins->oprs[c - 044].offset = getu32(data);
442 data += 4;
443 break;
444 case 64:
445 ins->oprs[c - 044].offset = getu64(data);
446 data += 8;
447 break;
448 }
449 if (segsize != asize)
450 ins->oprs[c - 044].addr_size = asize;
451 } else if (c >= 050 && c <= 052) {
452 ins->oprs[c - 050].offset = gets8(data++);
453 ins->oprs[c - 050].segment |= SEG_RELATIVE;
454 } else if (c >= 054 && c <= 056) {
455 ins->oprs[c - 054].offset = getu64(data);
456 data += 8;
457 } else if (c >= 060 && c <= 062) {
458 ins->oprs[c - 060].offset = gets16(data);
459 data += 2;
460 ins->oprs[c - 060].segment |= SEG_RELATIVE;
461 ins->oprs[c - 060].segment &= ~SEG_32BIT;
462 } else if (c >= 064 && c <= 066) {
463 if (osize == 16) {
464 ins->oprs[c - 064].offset = getu16(data);
465 data += 2;
466 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
467 } else if (osize == 32) {
468 ins->oprs[c - 064].offset = getu32(data);
469 data += 4;
470 ins->oprs[c - 064].segment &= ~SEG_64BIT;
471 ins->oprs[c - 064].segment |= SEG_32BIT;
472 }
473 if (segsize != osize) {
474 ins->oprs[c - 064].type =
475 (ins->oprs[c - 064].type & NON_SIZE)
476 | ((osize == 16) ? BITS16 : BITS32);
477 }
478 } else if (c >= 070 && c <= 072) {
479 ins->oprs[c - 070].offset = getu32(data);
480 data += 4;
481 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
482 } else if (c >= 0100 && c < 0130) {
483 int modrm = *data++;
484 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+(rex & REX_R ? 8 : 0);
485 ins->oprs[c & 07].segment |= SEG_RMREG;
486 data = do_ea(data, modrm, asize, segsize,
487 &ins->oprs[(c >> 3) & 07], rex);
488 } else if (c >= 0130 && c <= 0132) {
489 ins->oprs[c - 0130].offset = getu16(data);
490 data += 2;
491 } else if (c >= 0140 && c <= 0142) {
492 ins->oprs[c - 0140].offset = getu32(data);
493 data += 4;
494 } else if (c >= 0200 && c <= 0277) {
495 int modrm = *data++;
496 if (((modrm >> 3) & 07) != (c & 07))
497 return FALSE; /* spare field doesn't match up */
498 data = do_ea(data, modrm, asize, segsize,
499 &ins->oprs[(c >> 3) & 07], rex);
500 } else if (c >= 0300 && c <= 0302) {
501 a_used = TRUE;
502 } else if (c == 0310) {
503 if (asize != 16)
504 return FALSE;
505 else
506 a_used = TRUE;
507 } else if (c == 0311) {
508 if (asize == 16)
509 return FALSE;
510 else
511 a_used = TRUE;
512 } else if (c == 0312) {
513 if (asize != segsize)
514 return FALSE;
515 else
516 a_used = TRUE;
517 } else if (c == 0320) {
518 if (osize != 16)
519 return FALSE;
520 else
521 o_used = TRUE;
522 } else if (c == 0321) {
523 if (osize != 32)
524 return FALSE;
525 else
526 o_used = TRUE;
527 } else if (c == 0322) {
528 if (osize != (segsize == 16) ? 16 : 32)
529 return FALSE;
530 else
531 o_used = TRUE;
532 } else if (c == 0323) {
533 rex |= REX_W; /* 64-bit only instruction */
534 osize = 64;
535 } else if (c == 0324) {
536 if (!(rex & (REX_P|REX_W)) || osize != 64)
537 return FALSE;
538 } else if (c == 0330) {
539 int t = *r++, d = *data++;
540 if (d < t || d > t + 15)
541 return FALSE;
542 else
543 ins->condition = d - t;
544 } else if (c == 0331) {
545 if (rep)
546 return FALSE;
547 } else if (c == 0332) {
548 if (drep == P_REP)
549 drep = P_REPE;
550 } else if (c == 0333) {
551 if (rep != 0xF3)
552 return FALSE;
553 drep = 0;
554 } else if (c == 0334) {
555 if (lock) {
556 rex |= REX_R;
557 lock = 0;
558 }
559 }
560 }
561
562 /*
563 * Check for unused rep or a/o prefixes.
564 */
565 ins->nprefix = 0;
566 if (lock)
567 ins->prefixes[ins->nprefix++] = P_LOCK;
568 if (drep)
569 ins->prefixes[ins->nprefix++] = drep;
570 if (!a_used && asize != segsize)
571 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
572 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
573 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
574
575 /* Fix: check for redundant REX prefixes */
576
577 *rexout = rex;
578 return data - origdata;
579 }
580
581 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
582 int32_t offset, int autosync, uint32_t prefer)
583 {
584 struct itemplate **p, **best_p;
585 int length, best_length = 0;
586 char *segover;
587 int rep, lock, asize, osize, i, slen, colon, rex, rexout, best_rex;
588 uint8_t *origdata;
589 int works;
590 insn tmp_ins, ins;
591 uint32_t goodness, best;
592
593 /*
594 * Scan for prefixes.
595 */
596 asize = segsize;
597 osize = (segsize == 64) ? 32 : segsize;
598 rex = 0;
599 segover = NULL;
600 rep = lock = 0;
601 origdata = data;
602 for (;;) {
603 if (*data == 0xF3 || *data == 0xF2)
604 rep = *data++;
605 else if (*data == 0xF0)
606 lock = *data++;
607 else if (*data == 0x2E)
608 segover = "cs", data++;
609 else if (*data == 0x36)
610 segover = "ss", data++;
611 else if (*data == 0x3E)
612 segover = "ds", data++;
613 else if (*data == 0x26)
614 segover = "es", data++;
615 else if (*data == 0x64)
616 segover = "fs", data++;
617 else if (*data == 0x65)
618 segover = "gs", data++;
619 else if (*data == 0x66) {
620 osize = (segsize == 16) ? 32 : 16;
621 data++;
622 } else if (*data == 0x67) {
623 asize = (segsize == 32) ? 16 : 32;
624 data++;
625 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
626 rex = *data++;
627 if (rex & REX_W)
628 osize = 64;
629 break; /* REX is always the last prefix */
630 } else {
631 break;
632 }
633 }
634
635 tmp_ins.oprs[0].segment = tmp_ins.oprs[1].segment =
636 tmp_ins.oprs[2].segment =
637 tmp_ins.oprs[0].addr_size = tmp_ins.oprs[1].addr_size =
638 tmp_ins.oprs[2].addr_size = (segsize == 64 ? SEG_64BIT :
639 segsize == 32 ? SEG_32BIT : 0);
640 tmp_ins.condition = -1;
641 best = -1; /* Worst possible */
642 best_p = NULL;
643 best_rex = 0;
644 for (p = itable[*data]; *p; p++) {
645 if ((length = matches(*p, data, asize, osize, segsize, rep,
646 &tmp_ins, rex, &rexout, lock))) {
647 works = TRUE;
648 /*
649 * Final check to make sure the types of r/m match up.
650 */
651 for (i = 0; i < (*p)->operands; i++) {
652 if (
653 /* If it's a mem-only EA but we have a register, die. */
654 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
655 !(MEMORY & ~(*p)->opd[i])) ||
656 /* If it's a reg-only EA but we have a memory ref, die. */
657 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
658 !(REGNORM & ~(*p)->opd[i]) &&
659 !((*p)->opd[i] & REG_SMASK)) ||
660 /* Register type mismatch (eg FS vs REG_DESS): die. */
661 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
662 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
663 !whichreg((*p)->opd[i],
664 tmp_ins.oprs[i].basereg, rexout))) {
665 works = FALSE;
666 break;
667 }
668 }
669
670 if (works) {
671 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
672 if (goodness < best) {
673 /* This is the best one found so far */
674 best = goodness;
675 best_p = p;
676 best_length = length;
677 ins = tmp_ins;
678 best_rex = rexout;
679 }
680 }
681 }
682 }
683
684 if (!best_p)
685 return 0; /* no instruction was matched */
686
687 /* Pick the best match */
688 p = best_p;
689 length = best_length;
690 rex = best_rex;
691 if (best_rex & REX_W)
692 osize = 64;
693
694 slen = 0;
695
696 /* TODO: snprintf returns the value that the string would have if
697 * the buffer were long enough, and not the actual length of
698 * the returned string, so each instance of using the return
699 * value of snprintf should actually be checked to assure that
700 * the return value is "sane." Maybe a macro wrapper could
701 * be used for that purpose.
702 */
703 for (i = 0; i < ins.nprefix; i++)
704 switch (ins.prefixes[i]) {
705 case P_LOCK:
706 slen += snprintf(output + slen, outbufsize - slen, "lock ");
707 break;
708 case P_REP:
709 slen += snprintf(output + slen, outbufsize - slen, "rep ");
710 break;
711 case P_REPE:
712 slen += snprintf(output + slen, outbufsize - slen, "repe ");
713 break;
714 case P_REPNE:
715 slen += snprintf(output + slen, outbufsize - slen, "repne ");
716 break;
717 case P_A16:
718 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
719 break;
720 case P_A32:
721 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
722 break;
723 case P_O16:
724 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
725 break;
726 case P_O32:
727 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
728 break;
729 }
730
731 for (i = 0; i < elements(ico); i++)
732 if ((*p)->opcode == ico[i]) {
733 slen +=
734 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
735 whichcond(ins.condition));
736 break;
737 }
738 if (i >= elements(ico))
739 slen +=
740 snprintf(output + slen, outbufsize - slen, "%s",
741 insn_names[(*p)->opcode]);
742 colon = FALSE;
743 length += data - origdata; /* fix up for prefixes */
744 for (i = 0; i < (*p)->operands; i++) {
745 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
746
747 if (ins.oprs[i].segment & SEG_RELATIVE) {
748 ins.oprs[i].offset += offset + length;
749 /*
750 * sort out wraparound
751 */
752 if (!(ins.oprs[i].segment & (SEG_32BIT|SEG_64BIT)))
753 ins.oprs[i].offset &= 0xffff;
754 /*
755 * add sync marker, if autosync is on
756 */
757 if (autosync)
758 add_sync(ins.oprs[i].offset, 0L);
759 }
760
761 if ((*p)->opd[i] & COLON)
762 colon = TRUE;
763 else
764 colon = FALSE;
765
766 if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
767 (ins.oprs[i].segment & SEG_RMREG)) {
768 ins.oprs[i].basereg = whichreg((*p)->opd[i],
769 ins.oprs[i].basereg, rex);
770 if ((*p)->opd[i] & TO)
771 slen += snprintf(output + slen, outbufsize - slen, "to ");
772 slen += snprintf(output + slen, outbufsize - slen, "%s",
773 reg_names[ins.oprs[i].basereg -
774 EXPR_REG_START]);
775 } else if (!(UNITY & ~(*p)->opd[i])) {
776 output[slen++] = '1';
777 } else if ((*p)->opd[i] & IMMEDIATE) {
778 if ((*p)->opd[i] & BITS8) {
779 slen +=
780 snprintf(output + slen, outbufsize - slen, "byte ");
781 if (ins.oprs[i].segment & SEG_SIGNED) {
782 if (ins.oprs[i].offset < 0) {
783 ins.oprs[i].offset *= -1;
784 output[slen++] = '-';
785 } else
786 output[slen++] = '+';
787 }
788 } else if ((*p)->opd[i] & BITS16) {
789 slen +=
790 snprintf(output + slen, outbufsize - slen, "word ");
791 } else if ((*p)->opd[i] & BITS32) {
792 slen +=
793 snprintf(output + slen, outbufsize - slen, "dword ");
794 } else if ((*p)->opd[i] & BITS64) {
795 slen +=
796 snprintf(output + slen, outbufsize - slen, "qword ");
797 } else if ((*p)->opd[i] & NEAR) {
798 slen +=
799 snprintf(output + slen, outbufsize - slen, "near ");
800 } else if ((*p)->opd[i] & SHORT) {
801 slen +=
802 snprintf(output + slen, outbufsize - slen, "short ");
803 }
804 slen +=
805 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
806 ins.oprs[i].offset);
807 } else if (!(MEM_OFFS & ~(*p)->opd[i])) {
808 slen +=
809 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
810 ((const char*)segover ? (const char*)segover : ""), /* placate type mistmatch warning */
811 ((const char*)segover ? ":" : ""), /* by using (const char*) instead of uint8_t* */
812 (ins.oprs[i].addr_size ==
813 32 ? "dword " : ins.oprs[i].addr_size ==
814 16 ? "word " : ""), ins.oprs[i].offset);
815 segover = NULL;
816 } else if (!(REGMEM & ~(*p)->opd[i])) {
817 int started = FALSE;
818 if ((*p)->opd[i] & BITS8)
819 slen +=
820 snprintf(output + slen, outbufsize - slen, "byte ");
821 if ((*p)->opd[i] & BITS16)
822 slen +=
823 snprintf(output + slen, outbufsize - slen, "word ");
824 if ((*p)->opd[i] & BITS32)
825 slen +=
826 snprintf(output + slen, outbufsize - slen, "dword ");
827 if ((*p)->opd[i] & BITS64)
828 slen +=
829 snprintf(output + slen, outbufsize - slen, "qword ");
830 if ((*p)->opd[i] & BITS80)
831 slen +=
832 snprintf(output + slen, outbufsize - slen, "tword ");
833 if ((*p)->opd[i] & FAR)
834 slen += snprintf(output + slen, outbufsize - slen, "far ");
835 if ((*p)->opd[i] & NEAR)
836 slen +=
837 snprintf(output + slen, outbufsize - slen, "near ");
838 output[slen++] = '[';
839 if (ins.oprs[i].addr_size)
840 slen += snprintf(output + slen, outbufsize - slen, "%s",
841 (ins.oprs[i].addr_size == 64 ? "qword " :
842 ins.oprs[i].addr_size == 32 ? "dword " :
843 ins.oprs[i].addr_size == 16 ? "word " :
844 ""));
845 if (segover) {
846 slen +=
847 snprintf(output + slen, outbufsize - slen, "%s:",
848 segover);
849 segover = NULL;
850 }
851 if (ins.oprs[i].basereg != -1) {
852 slen += snprintf(output + slen, outbufsize - slen, "%s",
853 reg_names[(ins.oprs[i].basereg -
854 EXPR_REG_START)]);
855 started = TRUE;
856 }
857 if (ins.oprs[i].indexreg != -1) {
858 if (started)
859 output[slen++] = '+';
860 slen += snprintf(output + slen, outbufsize - slen, "%s",
861 reg_names[(ins.oprs[i].indexreg -
862 EXPR_REG_START)]);
863 if (ins.oprs[i].scale > 1)
864 slen +=
865 snprintf(output + slen, outbufsize - slen, "*%d",
866 ins.oprs[i].scale);
867 started = TRUE;
868 }
869 if (ins.oprs[i].segment & SEG_DISP8) {
870 int minus = 0;
871 int8_t offset = ins.oprs[i].offset;
872 if (offset < 0) {
873 minus = 1;
874 offset = -offset;
875 }
876 slen +=
877 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
878 minus ? "-" : "+", offset);
879 } else if (ins.oprs[i].segment & SEG_DISP16) {
880 int minus = 0;
881 int16_t offset = ins.oprs[i].offset;
882 if (offset < 0) {
883 minus = 1;
884 offset = -offset;
885 }
886 slen +=
887 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
888 minus ? "-" : started ? "+" : "", offset);
889 } else if (ins.oprs[i].segment & SEG_DISP32) {
890 char *prefix = "";
891 int32_t offset = ins.oprs[i].offset;
892 if (ins.oprs[i].basereg == R_RIP) {
893 prefix = ":";
894 } else if (offset < 0) {
895 offset = -offset;
896 prefix = "-";
897 } else {
898 prefix = started ? "+" : "";
899 }
900 slen +=
901 snprintf(output + slen, outbufsize - slen,
902 "%s0x%"PRIx32"", prefix, offset);
903 }
904 output[slen++] = ']';
905 } else {
906 slen +=
907 snprintf(output + slen, outbufsize - slen, "<operand%d>",
908 i);
909 }
910 }
911 output[slen] = '\0';
912 if (segover) { /* unused segment override */
913 char *p = output;
914 int count = slen + 1;
915 while (count--)
916 p[count + 3] = p[count];
917 strncpy(output, segover, 2);
918 output[2] = ' ';
919 }
920 return length;
921 }
922
923 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
924 {
925 snprintf(output, outbufsize, "db 0x%02X", *data);
926 return 1;
927 }
Automatic testing