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Fix literal F2 and F3 prefixes
[nasm/autotest.git] / disasm.c
blob0452c29546f8350050428b9e85a1759aacda2222
1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <limits.h>
14 #include <inttypes.h>
15
16 #include "nasm.h"
17 #include "disasm.h"
18 #include "sync.h"
19 #include "insns.h"
20
21 #include "names.c"
22
23 /*
24 * Flags that go into the `segment' field of `insn' structures
25 * during disassembly.
26 */
27 #define SEG_RELATIVE 1
28 #define SEG_32BIT 2
29 #define SEG_RMREG 4
30 #define SEG_DISP8 8
31 #define SEG_DISP16 16
32 #define SEG_DISP32 32
33 #define SEG_NODISP 64
34 #define SEG_SIGNED 128
35 #define SEG_64BIT 256
36
37 #include "regdis.c"
38
39 /*
40 * Prefix information
41 */
42 struct prefix_info {
43 uint8_t osize; /* Operand size */
44 uint8_t asize; /* Address size */
45 uint8_t osp; /* Operand size prefix present */
46 uint8_t asp; /* Address size prefix present */
47 uint8_t rep; /* Rep prefix present */
48 uint8_t seg; /* Segment override prefix present */
49 uint8_t lock; /* Lock prefix present */
50 uint8_t rex; /* Rex prefix present */
51 };
52
53 #define getu8(x) (*(uint8_t *)(x))
54 #if defined(__i386__) || defined(__x86_64__)
55 /* Littleendian CPU which can handle unaligned references */
56 #define getu16(x) (*(uint16_t *)(x))
57 #define getu32(x) (*(uint32_t *)(x))
58 #define getu64(x) (*(uint64_t *)(x))
59 #else
60 static uint16_t getu16(uint8_t *data)
61 {
62 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
63 }
64 static uint32_t getu32(uint8_t *data)
65 {
66 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
67 }
68 static uint64_t getu64(uint8_t *data)
69 {
70 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
71 }
72 #endif
73
74 #define gets8(x) ((int8_t)getu8(x))
75 #define gets16(x) ((int16_t)getu16(x))
76 #define gets32(x) ((int32_t)getu32(x))
77 #define gets64(x) ((int64_t)getu64(x))
78
79 /* Important: regval must already have been adjusted for rex extensions */
80 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
81 {
82 if (!(regflags & (REGISTER|REGMEM)))
83 return 0; /* Registers not permissible?! */
84
85 regflags |= REGISTER;
86
87 if (!(REG_AL & ~regflags))
88 return R_AL;
89 if (!(REG_AX & ~regflags))
90 return R_AX;
91 if (!(REG_EAX & ~regflags))
92 return R_EAX;
93 if (!(REG_RAX & ~regflags))
94 return R_RAX;
95 if (!(REG_DL & ~regflags))
96 return R_DL;
97 if (!(REG_DX & ~regflags))
98 return R_DX;
99 if (!(REG_EDX & ~regflags))
100 return R_EDX;
101 if (!(REG_RDX & ~regflags))
102 return R_RDX;
103 if (!(REG_CL & ~regflags))
104 return R_CL;
105 if (!(REG_CX & ~regflags))
106 return R_CX;
107 if (!(REG_ECX & ~regflags))
108 return R_ECX;
109 if (!(REG_RCX & ~regflags))
110 return R_RCX;
111 if (!(FPU0 & ~regflags))
112 return R_ST0;
113 if (!(REG_CS & ~regflags))
114 return (regval == 1) ? R_CS : 0;
115 if (!(REG_DESS & ~regflags))
116 return (regval == 0 || regval == 2
117 || regval == 3 ? rd_sreg[regval] : 0);
118 if (!(REG_FSGS & ~regflags))
119 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
120 if (!(REG_SEG67 & ~regflags))
121 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
122
123 /* All the entries below look up regval in an 16-entry array */
124 if (regval < 0 || regval > 15)
125 return 0;
126
127 if (!(REG8 & ~regflags)) {
128 if (rex & REX_P)
129 return rd_reg8_rex[regval];
130 else
131 return rd_reg8[regval];
132 }
133 if (!(REG16 & ~regflags))
134 return rd_reg16[regval];
135 if (!(REG32 & ~regflags))
136 return rd_reg32[regval];
137 if (!(REG64 & ~regflags))
138 return rd_reg64[regval];
139 if (!(REG_SREG & ~regflags))
140 return rd_sreg[regval & 7]; /* Ignore REX */
141 if (!(REG_CREG & ~regflags))
142 return rd_creg[regval];
143 if (!(REG_DREG & ~regflags))
144 return rd_dreg[regval];
145 if (!(REG_TREG & ~regflags)) {
146 if (rex & REX_P)
147 return 0; /* TR registers are ill-defined with rex */
148 return rd_treg[regval];
149 }
150 if (!(FPUREG & ~regflags))
151 return rd_fpureg[regval & 7]; /* Ignore REX */
152 if (!(MMXREG & ~regflags))
153 return rd_mmxreg[regval & 7]; /* Ignore REX */
154 if (!(XMMREG & ~regflags))
155 return rd_xmmreg[regval];
156
157 return 0;
158 }
159
160 static const char *whichcond(int condval)
161 {
162 static int conds[] = {
163 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
164 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
165 };
166 return conditions[conds[condval]];
167 }
168
169 /*
170 * Process an effective address (ModRM) specification.
171 */
172 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
173 int segsize, operand * op, int rex)
174 {
175 int mod, rm, scale, index, base;
176
177 mod = (modrm >> 6) & 03;
178 rm = modrm & 07;
179
180 if (mod == 3) { /* pure register version */
181 op->basereg = rm+(rex & REX_B ? 8 : 0);
182 op->segment |= SEG_RMREG;
183 return data;
184 }
185
186 op->addr_size = 0;
187 op->eaflags = 0;
188
189 if (asize == 16) {
190 /*
191 * <mod> specifies the displacement size (none, byte or
192 * word), and <rm> specifies the register combination.
193 * Exception: mod=0,rm=6 does not specify [BP] as one might
194 * expect, but instead specifies [disp16].
195 */
196 op->indexreg = op->basereg = -1;
197 op->scale = 1; /* always, in 16 bits */
198 switch (rm) {
199 case 0:
200 op->basereg = R_BX;
201 op->indexreg = R_SI;
202 break;
203 case 1:
204 op->basereg = R_BX;
205 op->indexreg = R_DI;
206 break;
207 case 2:
208 op->basereg = R_BP;
209 op->indexreg = R_SI;
210 break;
211 case 3:
212 op->basereg = R_BP;
213 op->indexreg = R_DI;
214 break;
215 case 4:
216 op->basereg = R_SI;
217 break;
218 case 5:
219 op->basereg = R_DI;
220 break;
221 case 6:
222 op->basereg = R_BP;
223 break;
224 case 7:
225 op->basereg = R_BX;
226 break;
227 }
228 if (rm == 6 && mod == 0) { /* special case */
229 op->basereg = -1;
230 if (segsize != 16)
231 op->addr_size = 16;
232 mod = 2; /* fake disp16 */
233 }
234 switch (mod) {
235 case 0:
236 op->segment |= SEG_NODISP;
237 break;
238 case 1:
239 op->segment |= SEG_DISP8;
240 op->offset = (int8_t)*data++;
241 break;
242 case 2:
243 op->segment |= SEG_DISP16;
244 op->offset = *data++;
245 op->offset |= ((unsigned)*data++) << 8;
246 break;
247 }
248 return data;
249 } else {
250 /*
251 * Once again, <mod> specifies displacement size (this time
252 * none, byte or *dword*), while <rm> specifies the base
253 * register. Again, [EBP] is missing, replaced by a pure
254 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
255 * and RIP-relative addressing in 64-bit mode.
256 *
257 * However, rm=4
258 * indicates not a single base register, but instead the
259 * presence of a SIB byte...
260 */
261 int a64 = asize == 64;
262
263 op->indexreg = -1;
264
265 if (a64)
266 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
267 else
268 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
269
270 if (rm == 5 && mod == 0) {
271 if (segsize == 64) {
272 op->eaflags |= EAF_REL;
273 op->segment |= SEG_RELATIVE;
274 mod = 2; /* fake disp32 */
275 }
276
277 if (asize != 64)
278 op->addr_size = asize;
279
280 op->basereg = -1;
281 mod = 2; /* fake disp32 */
282 }
283
284 if (rm == 4) { /* process SIB */
285 scale = (*data >> 6) & 03;
286 index = (*data >> 3) & 07;
287 base = *data & 07;
288 data++;
289
290 op->scale = 1 << scale;
291
292 if (index == 4)
293 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
294 else if (a64)
295 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
296 else
297 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
298
299 if (base == 5 && mod == 0) {
300 op->basereg = -1;
301 mod = 2; /* Fake disp32 */
302 } else if (a64)
303 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
304 else
305 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
306
307 if (segsize != 32)
308 op->addr_size = 32;
309 }
310
311 switch (mod) {
312 case 0:
313 op->segment |= SEG_NODISP;
314 break;
315 case 1:
316 op->segment |= SEG_DISP8;
317 op->offset = gets8(data);
318 data++;
319 break;
320 case 2:
321 op->segment |= SEG_DISP32;
322 op->offset = getu32(data);
323 data += 4;
324 break;
325 }
326 return data;
327 }
328 }
329
330 /*
331 * Determine whether the instruction template in t corresponds to the data
332 * stream in data. Return the number of bytes matched if so.
333 */
334 static int matches(const struct itemplate *t, uint8_t *data,
335 const struct prefix_info *prefix, int segsize, insn *ins)
336 {
337 uint8_t *r = (uint8_t *)(t->code);
338 uint8_t *origdata = data;
339 int a_used = FALSE, o_used = FALSE;
340 enum prefixes drep = 0;
341 uint8_t lock = prefix->lock;
342 int osize = prefix->osize;
343 int asize = prefix->asize;
344
345 ins->oprs[0].segment = ins->oprs[1].segment =
346 ins->oprs[2].segment =
347 ins->oprs[0].addr_size = ins->oprs[1].addr_size =
348 ins->oprs[2].addr_size = (segsize == 64 ? SEG_64BIT :
349 segsize == 32 ? SEG_32BIT : 0);
350 ins->condition = -1;
351 ins->rex = prefix->rex;
352
353 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
354 return FALSE;
355
356 if (prefix->rep == 0xF2)
357 drep = P_REPNE;
358 else if (prefix->rep == 0xF3)
359 drep = P_REP;
360
361 while (*r) {
362 int c = *r++;
363
364 /* FIX: change this into a switch */
365 if (c >= 01 && c <= 03) {
366 while (c--)
367 if (*r++ != *data++)
368 return FALSE;
369 } else if (c == 04) {
370 switch (*data++) {
371 case 0x07:
372 ins->oprs[0].basereg = 0;
373 break;
374 case 0x17:
375 ins->oprs[0].basereg = 2;
376 break;
377 case 0x1F:
378 ins->oprs[0].basereg = 3;
379 break;
380 default:
381 return FALSE;
382 }
383 } else if (c == 05) {
384 switch (*data++) {
385 case 0xA1:
386 ins->oprs[0].basereg = 4;
387 break;
388 case 0xA9:
389 ins->oprs[0].basereg = 5;
390 break;
391 default:
392 return FALSE;
393 }
394 } else if (c == 06) {
395 switch (*data++) {
396 case 0x06:
397 ins->oprs[0].basereg = 0;
398 break;
399 case 0x0E:
400 ins->oprs[0].basereg = 1;
401 break;
402 case 0x16:
403 ins->oprs[0].basereg = 2;
404 break;
405 case 0x1E:
406 ins->oprs[0].basereg = 3;
407 break;
408 default:
409 return FALSE;
410 }
411 } else if (c == 07) {
412 switch (*data++) {
413 case 0xA0:
414 ins->oprs[0].basereg = 4;
415 break;
416 case 0xA8:
417 ins->oprs[0].basereg = 5;
418 break;
419 default:
420 return FALSE;
421 }
422 } else if (c >= 010 && c <= 012) {
423 int t = *r++, d = *data++;
424 if (d < t || d > t + 7)
425 return FALSE;
426 else {
427 ins->oprs[c - 010].basereg = (d-t)+
428 (ins->rex & REX_B ? 8 : 0);
429 ins->oprs[c - 010].segment |= SEG_RMREG;
430 }
431 } else if (c == 017) {
432 if (*data++)
433 return FALSE;
434 } else if (c >= 014 && c <= 016) {
435 ins->oprs[c - 014].offset = (int8_t)*data++;
436 ins->oprs[c - 014].segment |= SEG_SIGNED;
437 } else if (c >= 020 && c <= 022) {
438 ins->oprs[c - 020].offset = *data++;
439 } else if (c >= 024 && c <= 026) {
440 ins->oprs[c - 024].offset = *data++;
441 } else if (c >= 030 && c <= 032) {
442 ins->oprs[c - 030].offset = getu16(data);
443 data += 2;
444 } else if (c >= 034 && c <= 036) {
445 if (osize == 32) {
446 ins->oprs[c - 034].offset = getu32(data);
447 data += 4;
448 } else {
449 ins->oprs[c - 034].offset = getu16(data);
450 data += 2;
451 }
452 if (segsize != asize)
453 ins->oprs[c - 034].addr_size = asize;
454 } else if (c >= 040 && c <= 042) {
455 ins->oprs[c - 040].offset = getu32(data);
456 data += 4;
457 } else if (c >= 044 && c <= 046) {
458 switch (asize) {
459 case 16:
460 ins->oprs[c - 044].offset = getu16(data);
461 data += 2;
462 break;
463 case 32:
464 ins->oprs[c - 044].offset = getu32(data);
465 data += 4;
466 break;
467 case 64:
468 ins->oprs[c - 044].offset = getu64(data);
469 data += 8;
470 break;
471 }
472 if (segsize != asize)
473 ins->oprs[c - 044].addr_size = asize;
474 } else if (c >= 050 && c <= 052) {
475 ins->oprs[c - 050].offset = gets8(data++);
476 ins->oprs[c - 050].segment |= SEG_RELATIVE;
477 } else if (c >= 054 && c <= 056) {
478 ins->oprs[c - 054].offset = getu64(data);
479 data += 8;
480 } else if (c >= 060 && c <= 062) {
481 ins->oprs[c - 060].offset = gets16(data);
482 data += 2;
483 ins->oprs[c - 060].segment |= SEG_RELATIVE;
484 ins->oprs[c - 060].segment &= ~SEG_32BIT;
485 } else if (c >= 064 && c <= 066) {
486 if (osize == 16) {
487 ins->oprs[c - 064].offset = getu16(data);
488 data += 2;
489 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
490 } else if (osize == 32) {
491 ins->oprs[c - 064].offset = getu32(data);
492 data += 4;
493 ins->oprs[c - 064].segment &= ~SEG_64BIT;
494 ins->oprs[c - 064].segment |= SEG_32BIT;
495 }
496 if (segsize != osize) {
497 ins->oprs[c - 064].type =
498 (ins->oprs[c - 064].type & ~SIZE_MASK)
499 | ((osize == 16) ? BITS16 : BITS32);
500 }
501 } else if (c >= 070 && c <= 072) {
502 ins->oprs[c - 070].offset = getu32(data);
503 data += 4;
504 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
505 } else if (c >= 0100 && c < 0130) {
506 int modrm = *data++;
507 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
508 (ins->rex & REX_R ? 8 : 0);
509 ins->oprs[c & 07].segment |= SEG_RMREG;
510 data = do_ea(data, modrm, asize, segsize,
511 &ins->oprs[(c >> 3) & 07], ins->rex);
512 } else if (c >= 0130 && c <= 0132) {
513 ins->oprs[c - 0130].offset = getu16(data);
514 data += 2;
515 } else if (c >= 0140 && c <= 0142) {
516 ins->oprs[c - 0140].offset = getu32(data);
517 data += 4;
518 } else if (c >= 0200 && c <= 0277) {
519 int modrm = *data++;
520 if (((modrm >> 3) & 07) != (c & 07))
521 return FALSE; /* spare field doesn't match up */
522 data = do_ea(data, modrm, asize, segsize,
523 &ins->oprs[(c >> 3) & 07], ins->rex);
524 } else if (c >= 0300 && c <= 0302) {
525 a_used = TRUE;
526 } else if (c == 0310) {
527 if (asize != 16)
528 return FALSE;
529 else
530 a_used = TRUE;
531 } else if (c == 0311) {
532 if (asize == 16)
533 return FALSE;
534 else
535 a_used = TRUE;
536 } else if (c == 0312) {
537 if (asize != segsize)
538 return FALSE;
539 else
540 a_used = TRUE;
541 } else if (c == 0313) {
542 if (asize != 64)
543 return FALSE;
544 else
545 a_used = TRUE;
546 } else if (c == 0320) {
547 if (osize != 16)
548 return FALSE;
549 else
550 o_used = TRUE;
551 } else if (c == 0321) {
552 if (osize != 32)
553 return FALSE;
554 else
555 o_used = TRUE;
556 } else if (c == 0322) {
557 if (osize != (segsize == 16) ? 16 : 32)
558 return FALSE;
559 else
560 o_used = TRUE;
561 } else if (c == 0323) {
562 ins->rex |= REX_W; /* 64-bit only instruction */
563 osize = 64;
564 } else if (c == 0324) {
565 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
566 return FALSE;
567 } else if (c == 0330) {
568 int t = *r++, d = *data++;
569 if (d < t || d > t + 15)
570 return FALSE;
571 else
572 ins->condition = d - t;
573 } else if (c == 0331) {
574 if (prefix->rep)
575 return FALSE;
576 } else if (c == 0332) {
577 if (prefix->rep != 0xF2)
578 return FALSE;
579 } else if (c == 0333) {
580 if (prefix->rep != 0xF3)
581 return FALSE;
582 drep = 0;
583 } else if (c == 0334) {
584 if (lock) {
585 ins->rex |= REX_R;
586 lock = 0;
587 }
588 } else if (c == 0335) {
589 if (drep == P_REP)
590 drep = P_REPE;
591 } else if (c == 0364) {
592 if (prefix->osp)
593 return FALSE;
594 } else if (c == 0365) {
595 if (prefix->asp)
596 return FALSE;
597 } else if (c == 0366) {
598 if (!prefix->osp)
599 return FALSE;
600 o_used = TRUE;
601 } else if (c == 0367) {
602 if (!prefix->asp)
603 return FALSE;
604 o_used = TRUE;
605 }
606 }
607
608 /*
609 * Check for unused rep or a/o prefixes.
610 */
611 ins->nprefix = 0;
612 if (lock)
613 ins->prefixes[ins->nprefix++] = P_LOCK;
614 if (drep)
615 ins->prefixes[ins->nprefix++] = drep;
616 if (!a_used && asize != segsize)
617 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
618 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
619 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
620
621 /* Fix: check for redundant REX prefixes */
622
623 return data - origdata;
624 }
625
626 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
627 int32_t offset, int autosync, uint32_t prefer)
628 {
629 const struct itemplate * const *p, * const *best_p;
630 int length, best_length = 0;
631 char *segover;
632 int i, slen, colon;
633 uint8_t *origdata;
634 int works;
635 insn tmp_ins, ins;
636 uint32_t goodness, best;
637 int best_pref;
638 struct prefix_info prefix;
639
640 memset(&ins, 0, sizeof ins);
641
642 /*
643 * Scan for prefixes.
644 */
645 memset(&prefix, 0, sizeof prefix);
646 prefix.asize = segsize;
647 prefix.osize = (segsize == 64) ? 32 : segsize;
648 segover = NULL;
649 origdata = data;
650 for (;;) {
651 if (*data == 0xF3 || *data == 0xF2)
652 prefix.rep = *data++;
653 else if (*data == 0xF0)
654 prefix.lock = *data++;
655 else if (*data == 0x2E)
656 segover = "cs", prefix.seg = *data++;
657 else if (*data == 0x36)
658 segover = "ss", prefix.seg = *data++;
659 else if (*data == 0x3E)
660 segover = "ds", prefix.seg = *data++;
661 else if (*data == 0x26)
662 segover = "es", prefix.seg = *data++;
663 else if (*data == 0x64)
664 segover = "fs", prefix.seg = *data++;
665 else if (*data == 0x65)
666 segover = "gs", prefix.seg = *data++;
667 else if (*data == 0x66) {
668 prefix.osize = (segsize == 16) ? 32 : 16;
669 prefix.osp = *data++;
670 } else if (*data == 0x67) {
671 prefix.asize = (segsize == 32) ? 16 : 32;
672 prefix.asp = *data++;
673 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
674 prefix.rex = *data++;
675 if (prefix.rex & REX_W)
676 prefix.osize = 64;
677 break; /* REX is always the last prefix */
678 } else {
679 break;
680 }
681 }
682
683 best = -1; /* Worst possible */
684 best_p = NULL;
685 best_pref = INT_MAX;
686
687 for (p = itable[*data]; *p; p++) {
688 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
689 works = TRUE;
690 /*
691 * Final check to make sure the types of r/m match up.
692 * XXX: Need to make sure this is actually correct.
693 */
694 for (i = 0; i < (*p)->operands; i++) {
695 if (
696 /* If it's a mem-only EA but we have a register, die. */
697 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
698 !(MEMORY & ~(*p)->opd[i])) ||
699 /* If it's a reg-only EA but we have a memory ref, die. */
700 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
701 !(REG_EA & ~(*p)->opd[i]) &&
702 !((*p)->opd[i] & REG_SMASK)) ||
703 /* Register type mismatch (eg FS vs REG_DESS): die. */
704 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
705 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
706 !whichreg((*p)->opd[i],
707 tmp_ins.oprs[i].basereg, tmp_ins.rex))) {
708 works = FALSE;
709 break;
710 }
711 }
712
713 /*
714 * Note: we always prefer instructions which incorporate
715 * prefixes in the instructions themselves. This is to allow
716 * e.g. PAUSE to be preferred to REP NOP, and deal with
717 * MMX/SSE instructions where prefixes are used to select
718 * between MMX and SSE register sets or outright opcode
719 * selection.
720 */
721 if (works) {
722 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
723 if (tmp_ins.nprefix < best_pref ||
724 (tmp_ins.nprefix == best_pref && goodness < best)) {
725 /* This is the best one found so far */
726 best = goodness;
727 best_p = p;
728 best_pref = tmp_ins.nprefix;
729 best_length = length;
730 ins = tmp_ins;
731 }
732 }
733 }
734 }
735
736 if (!best_p)
737 return 0; /* no instruction was matched */
738
739 /* Pick the best match */
740 p = best_p;
741 length = best_length;
742
743 slen = 0;
744
745 /* TODO: snprintf returns the value that the string would have if
746 * the buffer were long enough, and not the actual length of
747 * the returned string, so each instance of using the return
748 * value of snprintf should actually be checked to assure that
749 * the return value is "sane." Maybe a macro wrapper could
750 * be used for that purpose.
751 */
752 for (i = 0; i < ins.nprefix; i++)
753 switch (ins.prefixes[i]) {
754 case P_LOCK:
755 slen += snprintf(output + slen, outbufsize - slen, "lock ");
756 break;
757 case P_REP:
758 slen += snprintf(output + slen, outbufsize - slen, "rep ");
759 break;
760 case P_REPE:
761 slen += snprintf(output + slen, outbufsize - slen, "repe ");
762 break;
763 case P_REPNE:
764 slen += snprintf(output + slen, outbufsize - slen, "repne ");
765 break;
766 case P_A16:
767 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
768 break;
769 case P_A32:
770 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
771 break;
772 case P_O16:
773 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
774 break;
775 case P_O32:
776 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
777 break;
778 default:
779 break;
780 }
781
782 for (i = 0; i < (int)elements(ico); i++)
783 if ((*p)->opcode == ico[i]) {
784 slen +=
785 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
786 whichcond(ins.condition));
787 break;
788 }
789 if (i >= (int)elements(ico))
790 slen +=
791 snprintf(output + slen, outbufsize - slen, "%s",
792 insn_names[(*p)->opcode]);
793 colon = FALSE;
794 length += data - origdata; /* fix up for prefixes */
795 for (i = 0; i < (*p)->operands; i++) {
796 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
797
798 if (ins.oprs[i].segment & SEG_RELATIVE) {
799 ins.oprs[i].offset += offset + length;
800 /*
801 * sort out wraparound
802 */
803 if (!(ins.oprs[i].segment & (SEG_32BIT|SEG_64BIT)))
804 ins.oprs[i].offset &= 0xffff;
805 /*
806 * add sync marker, if autosync is on
807 */
808 if (autosync)
809 add_sync(ins.oprs[i].offset, 0L);
810 }
811
812 if ((*p)->opd[i] & COLON)
813 colon = TRUE;
814 else
815 colon = FALSE;
816
817 if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
818 (ins.oprs[i].segment & SEG_RMREG)) {
819 ins.oprs[i].basereg = whichreg((*p)->opd[i],
820 ins.oprs[i].basereg, ins.rex);
821 if ((*p)->opd[i] & TO)
822 slen += snprintf(output + slen, outbufsize - slen, "to ");
823 slen += snprintf(output + slen, outbufsize - slen, "%s",
824 reg_names[ins.oprs[i].basereg -
825 EXPR_REG_START]);
826 } else if (!(UNITY & ~(*p)->opd[i])) {
827 output[slen++] = '1';
828 } else if ((*p)->opd[i] & IMMEDIATE) {
829 if ((*p)->opd[i] & BITS8) {
830 slen +=
831 snprintf(output + slen, outbufsize - slen, "byte ");
832 if (ins.oprs[i].segment & SEG_SIGNED) {
833 if (ins.oprs[i].offset < 0) {
834 ins.oprs[i].offset *= -1;
835 output[slen++] = '-';
836 } else
837 output[slen++] = '+';
838 }
839 } else if ((*p)->opd[i] & BITS16) {
840 slen +=
841 snprintf(output + slen, outbufsize - slen, "word ");
842 } else if ((*p)->opd[i] & BITS32) {
843 slen +=
844 snprintf(output + slen, outbufsize - slen, "dword ");
845 } else if ((*p)->opd[i] & BITS64) {
846 slen +=
847 snprintf(output + slen, outbufsize - slen, "qword ");
848 } else if ((*p)->opd[i] & NEAR) {
849 slen +=
850 snprintf(output + slen, outbufsize - slen, "near ");
851 } else if ((*p)->opd[i] & SHORT) {
852 slen +=
853 snprintf(output + slen, outbufsize - slen, "short ");
854 }
855 slen +=
856 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
857 ins.oprs[i].offset);
858 } else if (!(MEM_OFFS & ~(*p)->opd[i])) {
859 slen +=
860 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
861 (segover ? segover : ""),
862 (segover ? ":" : ""),
863 (ins.oprs[i].addr_size ==
864 32 ? "dword " : ins.oprs[i].addr_size ==
865 16 ? "word " : ""), ins.oprs[i].offset);
866 segover = NULL;
867 } else if (!(REGMEM & ~(*p)->opd[i])) {
868 int started = FALSE;
869 if ((*p)->opd[i] & BITS8)
870 slen +=
871 snprintf(output + slen, outbufsize - slen, "byte ");
872 if ((*p)->opd[i] & BITS16)
873 slen +=
874 snprintf(output + slen, outbufsize - slen, "word ");
875 if ((*p)->opd[i] & BITS32)
876 slen +=
877 snprintf(output + slen, outbufsize - slen, "dword ");
878 if ((*p)->opd[i] & BITS64)
879 slen +=
880 snprintf(output + slen, outbufsize - slen, "qword ");
881 if ((*p)->opd[i] & BITS80)
882 slen +=
883 snprintf(output + slen, outbufsize - slen, "tword ");
884 if ((*p)->opd[i] & FAR)
885 slen += snprintf(output + slen, outbufsize - slen, "far ");
886 if ((*p)->opd[i] & NEAR)
887 slen +=
888 snprintf(output + slen, outbufsize - slen, "near ");
889 output[slen++] = '[';
890 if (ins.oprs[i].addr_size)
891 slen += snprintf(output + slen, outbufsize - slen, "%s",
892 (ins.oprs[i].addr_size == 64 ? "qword " :
893 ins.oprs[i].addr_size == 32 ? "dword " :
894 ins.oprs[i].addr_size == 16 ? "word " :
895 ""));
896 if (ins.oprs[i].eaflags & EAF_REL)
897 slen += snprintf(output + slen, outbufsize - slen, "rel ");
898 if (segover) {
899 slen +=
900 snprintf(output + slen, outbufsize - slen, "%s:",
901 segover);
902 segover = NULL;
903 }
904 if (ins.oprs[i].basereg != -1) {
905 slen += snprintf(output + slen, outbufsize - slen, "%s",
906 reg_names[(ins.oprs[i].basereg -
907 EXPR_REG_START)]);
908 started = TRUE;
909 }
910 if (ins.oprs[i].indexreg != -1) {
911 if (started)
912 output[slen++] = '+';
913 slen += snprintf(output + slen, outbufsize - slen, "%s",
914 reg_names[(ins.oprs[i].indexreg -
915 EXPR_REG_START)]);
916 if (ins.oprs[i].scale > 1)
917 slen +=
918 snprintf(output + slen, outbufsize - slen, "*%d",
919 ins.oprs[i].scale);
920 started = TRUE;
921 }
922 if (ins.oprs[i].segment & SEG_DISP8) {
923 int minus = 0;
924 int8_t offset = ins.oprs[i].offset;
925 if (offset < 0) {
926 minus = 1;
927 offset = -offset;
928 }
929 slen +=
930 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
931 minus ? "-" : "+", offset);
932 } else if (ins.oprs[i].segment & SEG_DISP16) {
933 int minus = 0;
934 int16_t offset = ins.oprs[i].offset;
935 if (offset < 0) {
936 minus = 1;
937 offset = -offset;
938 }
939 slen +=
940 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
941 minus ? "-" : started ? "+" : "", offset);
942 } else if (ins.oprs[i].segment & SEG_DISP32) {
943 char *prefix = "";
944 int32_t offset = ins.oprs[i].offset;
945 if (offset < 0) {
946 offset = -offset;
947 prefix = "-";
948 } else {
949 prefix = started ? "+" : "";
950 }
951 slen +=
952 snprintf(output + slen, outbufsize - slen,
953 "%s0x%"PRIx32"", prefix, offset);
954 }
955 output[slen++] = ']';
956 } else {
957 slen +=
958 snprintf(output + slen, outbufsize - slen, "<operand%d>",
959 i);
960 }
961 }
962 output[slen] = '\0';
963 if (segover) { /* unused segment override */
964 char *p = output;
965 int count = slen + 1;
966 while (count--)
967 p[count + 3] = p[count];
968 strncpy(output, segover, 2);
969 output[2] = ' ';
970 }
971 return length;
972 }
973
974 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
975 {
976 snprintf(output, outbufsize, "db 0x%02X", *data);
977 return 1;
978 }
Automatic testing