added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / watchdog / omap_wdt.c
blob2f2ce7429f5bb86f18cb3d381ad22f43c57624cb
1 /*
2 * omap_wdt.c
4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
14 * History:
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
42 #include <linux/bitops.h>
43 #include <linux/io.h>
44 #include <linux/uaccess.h>
45 #include <mach/hardware.h>
46 #include <mach/prcm.h>
48 #include "omap_wdt.h"
50 static struct platform_device *omap_wdt_dev;
52 static unsigned timer_margin;
53 module_param(timer_margin, uint, 0);
54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
56 static unsigned int wdt_trgr_pattern = 0x1234;
57 static spinlock_t wdt_lock;
59 struct omap_wdt_dev {
60 void __iomem *base; /* physical */
61 struct device *dev;
62 int omap_wdt_users;
63 struct clk *armwdt_ck;
64 struct clk *mpu_wdt_ick;
65 struct clk *mpu_wdt_fck;
66 struct resource *mem;
67 struct miscdevice omap_wdt_miscdev;
70 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
72 void __iomem *base = wdev->base;
74 /* wait for posted write to complete */
75 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
76 cpu_relax();
78 wdt_trgr_pattern = ~wdt_trgr_pattern;
79 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
81 /* wait for posted write to complete */
82 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
83 cpu_relax();
84 /* reloaded WCRR from WLDR */
87 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
89 void __iomem *base = wdev->base;
91 /* Sequence to enable the watchdog */
92 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
93 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94 cpu_relax();
96 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
97 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
98 cpu_relax();
101 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
103 void __iomem *base = wdev->base;
105 /* sequence required to disable watchdog */
106 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
107 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
108 cpu_relax();
110 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
111 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
112 cpu_relax();
115 static void omap_wdt_adjust_timeout(unsigned new_timeout)
117 if (new_timeout < TIMER_MARGIN_MIN)
118 new_timeout = TIMER_MARGIN_DEFAULT;
119 if (new_timeout > TIMER_MARGIN_MAX)
120 new_timeout = TIMER_MARGIN_MAX;
121 timer_margin = new_timeout;
124 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
126 u32 pre_margin = GET_WLDR_VAL(timer_margin);
127 void __iomem *base = wdev->base;
129 /* just count up at 32 KHz */
130 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
131 cpu_relax();
133 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
134 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
135 cpu_relax();
139 * Allow only one task to hold it open
141 static int omap_wdt_open(struct inode *inode, struct file *file)
143 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
144 void __iomem *base = wdev->base;
146 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
147 return -EBUSY;
149 if (cpu_is_omap16xx())
150 clk_enable(wdev->armwdt_ck); /* Enable the clock */
152 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
153 clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */
154 clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */
157 /* initialize prescaler */
158 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
159 cpu_relax();
161 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
162 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
163 cpu_relax();
165 file->private_data = (void *) wdev;
167 omap_wdt_set_timeout(wdev);
168 omap_wdt_enable(wdev);
170 return nonseekable_open(inode, file);
173 static int omap_wdt_release(struct inode *inode, struct file *file)
175 struct omap_wdt_dev *wdev = file->private_data;
178 * Shut off the timer unless NOWAYOUT is defined.
180 #ifndef CONFIG_WATCHDOG_NOWAYOUT
182 omap_wdt_disable(wdev);
184 if (cpu_is_omap16xx())
185 clk_disable(wdev->armwdt_ck); /* Disable the clock */
187 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
188 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
189 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
191 #else
192 printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
193 #endif
194 wdev->omap_wdt_users = 0;
196 return 0;
199 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
200 size_t len, loff_t *ppos)
202 struct omap_wdt_dev *wdev = file->private_data;
204 /* Refresh LOAD_TIME. */
205 if (len) {
206 spin_lock(&wdt_lock);
207 omap_wdt_ping(wdev);
208 spin_unlock(&wdt_lock);
210 return len;
213 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
214 unsigned long arg)
216 struct omap_wdt_dev *wdev;
217 int new_margin;
218 static const struct watchdog_info ident = {
219 .identity = "OMAP Watchdog",
220 .options = WDIOF_SETTIMEOUT,
221 .firmware_version = 0,
224 wdev = file->private_data;
226 switch (cmd) {
227 case WDIOC_GETSUPPORT:
228 return copy_to_user((struct watchdog_info __user *)arg, &ident,
229 sizeof(ident));
230 case WDIOC_GETSTATUS:
231 return put_user(0, (int __user *)arg);
232 case WDIOC_GETBOOTSTATUS:
233 if (cpu_is_omap16xx())
234 return put_user(__raw_readw(ARM_SYSST),
235 (int __user *)arg);
236 if (cpu_is_omap24xx())
237 return put_user(omap_prcm_get_reset_sources(),
238 (int __user *)arg);
239 case WDIOC_KEEPALIVE:
240 spin_lock(&wdt_lock);
241 omap_wdt_ping(wdev);
242 spin_unlock(&wdt_lock);
243 return 0;
244 case WDIOC_SETTIMEOUT:
245 if (get_user(new_margin, (int __user *)arg))
246 return -EFAULT;
247 omap_wdt_adjust_timeout(new_margin);
249 spin_lock(&wdt_lock);
250 omap_wdt_disable(wdev);
251 omap_wdt_set_timeout(wdev);
252 omap_wdt_enable(wdev);
254 omap_wdt_ping(wdev);
255 spin_unlock(&wdt_lock);
256 /* Fall */
257 case WDIOC_GETTIMEOUT:
258 return put_user(timer_margin, (int __user *)arg);
259 default:
260 return -ENOTTY;
264 static const struct file_operations omap_wdt_fops = {
265 .owner = THIS_MODULE,
266 .write = omap_wdt_write,
267 .unlocked_ioctl = omap_wdt_ioctl,
268 .open = omap_wdt_open,
269 .release = omap_wdt_release,
272 static int __init omap_wdt_probe(struct platform_device *pdev)
274 struct resource *res, *mem;
275 struct omap_wdt_dev *wdev;
276 int ret;
278 /* reserve static register mappings */
279 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
280 if (!res) {
281 ret = -ENOENT;
282 goto err_get_resource;
285 if (omap_wdt_dev) {
286 ret = -EBUSY;
287 goto err_busy;
290 mem = request_mem_region(res->start, res->end - res->start + 1,
291 pdev->name);
292 if (!mem) {
293 ret = -EBUSY;
294 goto err_busy;
297 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
298 if (!wdev) {
299 ret = -ENOMEM;
300 goto err_kzalloc;
303 wdev->omap_wdt_users = 0;
304 wdev->mem = mem;
306 if (cpu_is_omap16xx()) {
307 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
308 if (IS_ERR(wdev->armwdt_ck)) {
309 ret = PTR_ERR(wdev->armwdt_ck);
310 wdev->armwdt_ck = NULL;
311 goto err_clk;
315 if (cpu_is_omap24xx()) {
316 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
317 if (IS_ERR(wdev->mpu_wdt_ick)) {
318 ret = PTR_ERR(wdev->mpu_wdt_ick);
319 wdev->mpu_wdt_ick = NULL;
320 goto err_clk;
322 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
323 if (IS_ERR(wdev->mpu_wdt_fck)) {
324 ret = PTR_ERR(wdev->mpu_wdt_fck);
325 wdev->mpu_wdt_fck = NULL;
326 goto err_clk;
330 if (cpu_is_omap34xx()) {
331 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
332 if (IS_ERR(wdev->mpu_wdt_ick)) {
333 ret = PTR_ERR(wdev->mpu_wdt_ick);
334 wdev->mpu_wdt_ick = NULL;
335 goto err_clk;
337 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
338 if (IS_ERR(wdev->mpu_wdt_fck)) {
339 ret = PTR_ERR(wdev->mpu_wdt_fck);
340 wdev->mpu_wdt_fck = NULL;
341 goto err_clk;
344 wdev->base = ioremap(res->start, res->end - res->start + 1);
345 if (!wdev->base) {
346 ret = -ENOMEM;
347 goto err_ioremap;
350 platform_set_drvdata(pdev, wdev);
352 omap_wdt_disable(wdev);
353 omap_wdt_adjust_timeout(timer_margin);
355 wdev->omap_wdt_miscdev.parent = &pdev->dev;
356 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
357 wdev->omap_wdt_miscdev.name = "watchdog";
358 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
360 ret = misc_register(&(wdev->omap_wdt_miscdev));
361 if (ret)
362 goto err_misc;
364 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
365 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
366 timer_margin);
368 /* autogate OCP interface clock */
369 __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
371 omap_wdt_dev = pdev;
373 return 0;
375 err_misc:
376 platform_set_drvdata(pdev, NULL);
377 iounmap(wdev->base);
379 err_ioremap:
380 wdev->base = NULL;
382 err_clk:
383 if (wdev->armwdt_ck)
384 clk_put(wdev->armwdt_ck);
385 if (wdev->mpu_wdt_ick)
386 clk_put(wdev->mpu_wdt_ick);
387 if (wdev->mpu_wdt_fck)
388 clk_put(wdev->mpu_wdt_fck);
389 kfree(wdev);
391 err_kzalloc:
392 release_mem_region(res->start, res->end - res->start + 1);
394 err_busy:
395 err_get_resource:
397 return ret;
400 static void omap_wdt_shutdown(struct platform_device *pdev)
402 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
404 if (wdev->omap_wdt_users)
405 omap_wdt_disable(wdev);
408 static int omap_wdt_remove(struct platform_device *pdev)
410 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
411 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
413 if (!res)
414 return -ENOENT;
416 misc_deregister(&(wdev->omap_wdt_miscdev));
417 release_mem_region(res->start, res->end - res->start + 1);
418 platform_set_drvdata(pdev, NULL);
420 if (wdev->armwdt_ck) {
421 clk_put(wdev->armwdt_ck);
422 wdev->armwdt_ck = NULL;
425 if (wdev->mpu_wdt_ick) {
426 clk_put(wdev->mpu_wdt_ick);
427 wdev->mpu_wdt_ick = NULL;
430 if (wdev->mpu_wdt_fck) {
431 clk_put(wdev->mpu_wdt_fck);
432 wdev->mpu_wdt_fck = NULL;
434 iounmap(wdev->base);
436 kfree(wdev);
437 omap_wdt_dev = NULL;
439 return 0;
442 #ifdef CONFIG_PM
444 /* REVISIT ... not clear this is the best way to handle system suspend; and
445 * it's very inappropriate for selective device suspend (e.g. suspending this
446 * through sysfs rather than by stopping the watchdog daemon). Also, this
447 * may not play well enough with NOWAYOUT...
450 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
452 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
454 if (wdev->omap_wdt_users)
455 omap_wdt_disable(wdev);
457 return 0;
460 static int omap_wdt_resume(struct platform_device *pdev)
462 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
464 if (wdev->omap_wdt_users) {
465 omap_wdt_enable(wdev);
466 omap_wdt_ping(wdev);
469 return 0;
472 #else
473 #define omap_wdt_suspend NULL
474 #define omap_wdt_resume NULL
475 #endif
477 static struct platform_driver omap_wdt_driver = {
478 .probe = omap_wdt_probe,
479 .remove = omap_wdt_remove,
480 .shutdown = omap_wdt_shutdown,
481 .suspend = omap_wdt_suspend,
482 .resume = omap_wdt_resume,
483 .driver = {
484 .owner = THIS_MODULE,
485 .name = "omap_wdt",
489 static int __init omap_wdt_init(void)
491 spin_lock_init(&wdt_lock);
492 return platform_driver_register(&omap_wdt_driver);
495 static void __exit omap_wdt_exit(void)
497 platform_driver_unregister(&omap_wdt_driver);
500 module_init(omap_wdt_init);
501 module_exit(omap_wdt_exit);
503 MODULE_AUTHOR("George G. Davis");
504 MODULE_LICENSE("GPL");
505 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
506 MODULE_ALIAS("platform:omap_wdt");