2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
14 * This file is licenced under the GPL.
18 #error "This file is PCI bus glue. CONFIG_PCI must be defined."
21 #include <linux/pci.h>
25 /* constants used to work around PM-related transfer
26 * glitches in some AMD 700 series southbridges
28 #define AB_REG_BAR 0xf0
29 #define AB_INDX(addr) ((addr) + 0x00)
30 #define AB_DATA(addr) ((addr) + 0x04)
34 #define NB_PCIE_INDX_ADDR 0xe0
35 #define NB_PCIE_INDX_DATA 0xe4
36 #define PCIE_P_CNTL 0x10040
37 #define BIF_NB 0x10002
39 static struct pci_dev
*amd_smbus_dev
;
40 static struct pci_dev
*amd_hb_dev
;
41 static int amd_ohci_iso_count
;
43 /*-------------------------------------------------------------------------*/
45 static int broken_suspend(struct usb_hcd
*hcd
)
47 device_init_wakeup(&hcd
->self
.root_hub
->dev
, 0);
51 /* AMD 756, for most chips (early revs), corrupts register
52 * values on read ... so enable the vendor workaround.
54 static int ohci_quirk_amd756(struct usb_hcd
*hcd
)
56 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
58 ohci
->flags
= OHCI_QUIRK_AMD756
;
59 ohci_dbg (ohci
, "AMD756 erratum 4 workaround\n");
61 /* also erratum 10 (suspend/resume issues) */
62 return broken_suspend(hcd
);
65 /* Apple's OHCI driver has a lot of bizarre workarounds
66 * for this chip. Evidently control and bulk lists
67 * can get confused. (B&W G3 models, and ...)
69 static int ohci_quirk_opti(struct usb_hcd
*hcd
)
71 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
73 ohci_dbg (ohci
, "WARNING: OPTi workarounds unavailable\n");
78 /* Check for NSC87560. We have to look at the bridge (fn1) to
79 * identify the USB (fn2). This quirk might apply to more or
82 static int ohci_quirk_ns(struct usb_hcd
*hcd
)
84 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
87 b
= pci_get_slot (pdev
->bus
, PCI_DEVFN (PCI_SLOT (pdev
->devfn
), 1));
88 if (b
&& b
->device
== PCI_DEVICE_ID_NS_87560_LIO
89 && b
->vendor
== PCI_VENDOR_ID_NS
) {
90 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
92 ohci
->flags
|= OHCI_QUIRK_SUPERIO
;
93 ohci_dbg (ohci
, "Using NSC SuperIO setup\n");
100 /* Check for Compaq's ZFMicro chipset, which needs short
101 * delays before control or bulk queues get re-activated
102 * in finish_unlinks()
104 static int ohci_quirk_zfmicro(struct usb_hcd
*hcd
)
106 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
108 ohci
->flags
|= OHCI_QUIRK_ZFMICRO
;
109 ohci_dbg(ohci
, "enabled Compaq ZFMicro chipset quirks\n");
114 /* Check for Toshiba SCC OHCI which has big endian registers
115 * and little endian in memory data structures
117 static int ohci_quirk_toshiba_scc(struct usb_hcd
*hcd
)
119 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
121 /* That chip is only present in the southbridge of some
122 * cell based platforms which are supposed to select
123 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
124 * that was the case though.
126 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
127 ohci
->flags
|= OHCI_QUIRK_BE_MMIO
;
128 ohci_dbg (ohci
, "enabled big endian Toshiba quirk\n");
131 ohci_err (ohci
, "unsupported big endian Toshiba quirk\n");
136 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
139 static void ohci_quirk_nec_worker(struct work_struct
*work
)
141 struct ohci_hcd
*ohci
= container_of(work
, struct ohci_hcd
, nec_work
);
144 status
= ohci_init(ohci
);
146 ohci_err(ohci
, "Restarting NEC controller failed in %s, %d\n",
147 "ohci_init", status
);
151 status
= ohci_restart(ohci
);
153 ohci_err(ohci
, "Restarting NEC controller failed in %s, %d\n",
154 "ohci_restart", status
);
157 static int ohci_quirk_nec(struct usb_hcd
*hcd
)
159 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
161 ohci
->flags
|= OHCI_QUIRK_NEC
;
162 INIT_WORK(&ohci
->nec_work
, ohci_quirk_nec_worker
);
163 ohci_dbg (ohci
, "enabled NEC chipset lost interrupt quirk\n");
168 static int ohci_quirk_amd700(struct usb_hcd
*hcd
)
170 struct ohci_hcd
*ohci
= hcd_to_ohci(hcd
);
174 amd_smbus_dev
= pci_get_device(PCI_VENDOR_ID_ATI
,
175 PCI_DEVICE_ID_ATI_SBX00_SMBUS
, NULL
);
179 pci_read_config_byte(amd_smbus_dev
, PCI_REVISION_ID
, &rev
);
180 if ((rev
> 0x3b) || (rev
< 0x30)) {
181 pci_dev_put(amd_smbus_dev
);
182 amd_smbus_dev
= NULL
;
186 amd_ohci_iso_count
++;
189 amd_hb_dev
= pci_get_device(PCI_VENDOR_ID_AMD
, 0x9600, NULL
);
191 ohci
->flags
|= OHCI_QUIRK_AMD_ISO
;
192 ohci_dbg(ohci
, "enabled AMD ISO transfers quirk\n");
198 * The hardware normally enables the A-link power management feature, which
199 * lets the system lower the power consumption in idle states.
201 * Assume the system is configured to have USB 1.1 ISO transfers going
202 * to or from a USB device. Without this quirk, that stream may stutter
203 * or have breaks occasionally. For transfers going to speakers, this
204 * makes a very audible mess...
206 * That audio playback corruption is due to the audio stream getting
207 * interrupted occasionally when the link goes in lower power state
208 * This USB quirk prevents the link going into that lower power state
209 * during audio playback or other ISO operations.
211 static void quirk_amd_pll(int on
)
215 u32 bit
= (on
> 0) ? 1 : 0;
217 pci_read_config_dword(amd_smbus_dev
, AB_REG_BAR
, &addr
);
219 /* BIT names/meanings are NDA-protected, sorry ... */
221 outl(AX_INDXC
, AB_INDX(addr
));
222 outl(0x40, AB_DATA(addr
));
223 outl(AX_DATAC
, AB_INDX(addr
));
224 val
= inl(AB_DATA(addr
));
225 val
&= ~((1 << 3) | (1 << 4) | (1 << 9));
226 val
|= (bit
<< 3) | ((!bit
) << 4) | ((!bit
) << 9);
227 outl(val
, AB_DATA(addr
));
231 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_ADDR
, addr
);
233 pci_read_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, &val
);
234 val
&= ~(1 | (1 << 3) | (1 << 4) | (1 << 9) | (1 << 12));
235 val
|= bit
| (bit
<< 3) | (bit
<< 12);
236 val
|= ((!bit
) << 4) | ((!bit
) << 9);
237 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, val
);
240 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_ADDR
, addr
);
242 pci_read_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, &val
);
245 pci_write_config_dword(amd_hb_dev
, NB_PCIE_INDX_DATA
, val
);
249 static void amd_iso_dev_put(void)
251 amd_ohci_iso_count
--;
252 if (amd_ohci_iso_count
== 0) {
254 pci_dev_put(amd_smbus_dev
);
255 amd_smbus_dev
= NULL
;
258 pci_dev_put(amd_hb_dev
);
265 /* List of quirks for OHCI */
266 static const struct pci_device_id ohci_pci_quirks
[] = {
268 PCI_DEVICE(PCI_VENDOR_ID_AMD
, 0x740c),
269 .driver_data
= (unsigned long)ohci_quirk_amd756
,
272 PCI_DEVICE(PCI_VENDOR_ID_OPTI
, 0xc861),
273 .driver_data
= (unsigned long)ohci_quirk_opti
,
276 PCI_DEVICE(PCI_VENDOR_ID_NS
, PCI_ANY_ID
),
277 .driver_data
= (unsigned long)ohci_quirk_ns
,
280 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ
, 0xa0f8),
281 .driver_data
= (unsigned long)ohci_quirk_zfmicro
,
284 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2
, 0x01b6),
285 .driver_data
= (unsigned long)ohci_quirk_toshiba_scc
,
288 PCI_DEVICE(PCI_VENDOR_ID_NEC
, PCI_DEVICE_ID_NEC_USB
),
289 .driver_data
= (unsigned long)ohci_quirk_nec
,
292 /* Toshiba portege 4000 */
293 .vendor
= PCI_VENDOR_ID_AL
,
295 .subvendor
= PCI_VENDOR_ID_TOSHIBA
,
297 .driver_data
= (unsigned long) broken_suspend
,
300 PCI_DEVICE(PCI_VENDOR_ID_ITE
, 0x8152),
301 .driver_data
= (unsigned long) broken_suspend
,
304 PCI_DEVICE(PCI_VENDOR_ID_ATI
, 0x4397),
305 .driver_data
= (unsigned long)ohci_quirk_amd700
,
308 PCI_DEVICE(PCI_VENDOR_ID_ATI
, 0x4398),
309 .driver_data
= (unsigned long)ohci_quirk_amd700
,
312 PCI_DEVICE(PCI_VENDOR_ID_ATI
, 0x4399),
313 .driver_data
= (unsigned long)ohci_quirk_amd700
,
316 /* FIXME for some of the early AMD 760 southbridges, OHCI
317 * won't work at all. blacklist them.
323 static int ohci_pci_reset (struct usb_hcd
*hcd
)
325 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
328 if (hcd
->self
.controller
) {
329 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
330 const struct pci_device_id
*quirk_id
;
332 quirk_id
= pci_match_id(ohci_pci_quirks
, pdev
);
333 if (quirk_id
!= NULL
) {
334 int (*quirk
)(struct usb_hcd
*ohci
);
335 quirk
= (void *)quirk_id
->driver_data
;
340 ohci_hcd_init (ohci
);
341 return ohci_init (ohci
);
347 static int __devinit
ohci_pci_start (struct usb_hcd
*hcd
)
349 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
352 #ifdef CONFIG_PM /* avoid warnings about unused pdev */
353 if (hcd
->self
.controller
) {
354 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
356 /* RWC may not be set for add-in PCI cards, since boot
357 * firmware probably ignored them. This transfers PCI
358 * PM wakeup capabilities.
360 if (device_can_wakeup(&pdev
->dev
))
361 ohci
->hc_control
|= OHCI_CTRL_RWC
;
363 #endif /* CONFIG_PM */
365 ret
= ohci_run (ohci
);
367 ohci_err (ohci
, "can't start\n");
375 static int ohci_pci_suspend (struct usb_hcd
*hcd
, pm_message_t message
)
377 struct ohci_hcd
*ohci
= hcd_to_ohci (hcd
);
381 /* Root hub was already suspended. Disable irq emission and
382 * mark HW unaccessible, bail out if RH has been resumed. Use
383 * the spinlock to properly synchronize with possible pending
384 * RH suspend or resume activity.
386 * This is still racy as hcd->state is manipulated outside of
387 * any locks =P But that will be a different fix.
389 spin_lock_irqsave (&ohci
->lock
, flags
);
390 if (hcd
->state
!= HC_STATE_SUSPENDED
) {
394 ohci_writel(ohci
, OHCI_INTR_MIE
, &ohci
->regs
->intrdisable
);
395 (void)ohci_readl(ohci
, &ohci
->regs
->intrdisable
);
397 /* make sure snapshot being resumed re-enumerates everything */
398 if (message
.event
== PM_EVENT_PRETHAW
)
399 ohci_usb_reset(ohci
);
401 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
403 spin_unlock_irqrestore (&ohci
->lock
, flags
);
409 static int ohci_pci_resume (struct usb_hcd
*hcd
)
411 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
412 ohci_finish_controller_resume(hcd
);
416 #endif /* CONFIG_PM */
419 /*-------------------------------------------------------------------------*/
421 static const struct hc_driver ohci_pci_hc_driver
= {
422 .description
= hcd_name
,
423 .product_desc
= "OHCI Host Controller",
424 .hcd_priv_size
= sizeof(struct ohci_hcd
),
427 * generic hardware linkage
430 .flags
= HCD_MEMORY
| HCD_USB11
,
433 * basic lifecycle operations
435 .reset
= ohci_pci_reset
,
436 .start
= ohci_pci_start
,
438 .shutdown
= ohci_shutdown
,
441 .pci_suspend
= ohci_pci_suspend
,
442 .pci_resume
= ohci_pci_resume
,
446 * managing i/o requests and associated device resources
448 .urb_enqueue
= ohci_urb_enqueue
,
449 .urb_dequeue
= ohci_urb_dequeue
,
450 .endpoint_disable
= ohci_endpoint_disable
,
455 .get_frame_number
= ohci_get_frame
,
460 .hub_status_data
= ohci_hub_status_data
,
461 .hub_control
= ohci_hub_control
,
463 .bus_suspend
= ohci_bus_suspend
,
464 .bus_resume
= ohci_bus_resume
,
466 .start_port_reset
= ohci_start_port_reset
,
469 /*-------------------------------------------------------------------------*/
472 static const struct pci_device_id pci_ids
[] = { {
473 /* handle any USB OHCI controller */
474 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI
, ~0),
475 .driver_data
= (unsigned long) &ohci_pci_hc_driver
,
476 }, { /* end: all zeroes */ }
478 MODULE_DEVICE_TABLE (pci
, pci_ids
);
480 /* pci driver glue; this is a "new style" PCI driver module */
481 static struct pci_driver ohci_pci_driver
= {
482 .name
= (char *) hcd_name
,
485 .probe
= usb_hcd_pci_probe
,
486 .remove
= usb_hcd_pci_remove
,
489 .suspend
= usb_hcd_pci_suspend
,
490 .resume
= usb_hcd_pci_resume
,
493 .shutdown
= usb_hcd_pci_shutdown
,