2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/reboot.h>
34 #include <linux/usb.h>
35 #include <linux/moduleparam.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/debugfs.h>
39 #include "../core/hcd.h"
41 #include <asm/byteorder.h>
44 #include <asm/system.h>
45 #include <asm/unaligned.h>
47 /*-------------------------------------------------------------------------*/
50 * EHCI hc_driver implementation ... experimental, incomplete.
51 * Based on the final 1.0 register interface specification.
53 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
54 * First was PCMCIA, like ISA; then CardBus, which is PCI.
55 * Next comes "CardBay", using USB 2.0 signals.
57 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
58 * Special thanks to Intel and VIA for providing host controllers to
59 * test this driver on, and Cypress (including In-System Design) for
60 * providing early devices for those host controllers to talk to!
63 #define DRIVER_AUTHOR "David Brownell"
64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
66 static const char hcd_name
[] = "ehci_hcd";
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
84 #define EHCI_IAA_MSECS 10 /* arbitrary */
85 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
86 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
87 #define EHCI_SHRINK_FRAMES 5 /* async qh unlink delay */
89 /* Initial IRQ latency: faster than hw default */
90 static int log2_irq_thresh
= 0; // 0 to 6
91 module_param (log2_irq_thresh
, int, S_IRUGO
);
92 MODULE_PARM_DESC (log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
94 /* initial park setting: slower than hw default */
95 static unsigned park
= 0;
96 module_param (park
, uint
, S_IRUGO
);
97 MODULE_PARM_DESC (park
, "park setting; 1-3 back-to-back async packets");
99 /* for flakey hardware, ignore overcurrent indicators */
100 static int ignore_oc
= 0;
101 module_param (ignore_oc
, bool, S_IRUGO
);
102 MODULE_PARM_DESC (ignore_oc
, "ignore bogus hardware overcurrent indications");
104 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
106 /*-------------------------------------------------------------------------*/
109 #include "ehci-dbg.c"
111 /*-------------------------------------------------------------------------*/
114 * handshake - spin reading hc until handshake completes or fails
115 * @ptr: address of hc register to be read
116 * @mask: bits to look at in result of read
117 * @done: value of those bits when handshake succeeds
118 * @usec: timeout in microseconds
120 * Returns negative errno, or zero on success
122 * Success happens when the "mask" bits have the specified value (hardware
123 * handshake done). There are two failure modes: "usec" have passed (major
124 * hardware flakeout), or the register reads as all-ones (hardware removed).
126 * That last failure should_only happen in cases like physical cardbus eject
127 * before driver shutdown. But it also seems to be caused by bugs in cardbus
128 * bridge shutdown: shutting down the bridge before the devices using it.
130 static int handshake (struct ehci_hcd
*ehci
, void __iomem
*ptr
,
131 u32 mask
, u32 done
, int usec
)
136 result
= ehci_readl(ehci
, ptr
);
137 if (result
== ~(u32
)0) /* card removed */
148 /* force HC to halt state from unknown (EHCI spec section 2.3) */
149 static int ehci_halt (struct ehci_hcd
*ehci
)
151 u32 temp
= ehci_readl(ehci
, &ehci
->regs
->status
);
153 /* disable any irqs left enabled by previous code */
154 ehci_writel(ehci
, 0, &ehci
->regs
->intr_enable
);
156 if ((temp
& STS_HALT
) != 0)
159 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
161 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
162 return handshake (ehci
, &ehci
->regs
->status
,
163 STS_HALT
, STS_HALT
, 16 * 125);
166 static int handshake_on_error_set_halt(struct ehci_hcd
*ehci
, void __iomem
*ptr
,
167 u32 mask
, u32 done
, int usec
)
171 error
= handshake(ehci
, ptr
, mask
, done
, usec
);
174 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
175 ehci_err(ehci
, "force halt; handhake %p %08x %08x -> %d\n",
176 ptr
, mask
, done
, error
);
182 /* put TDI/ARC silicon into EHCI mode */
183 static void tdi_reset (struct ehci_hcd
*ehci
)
185 u32 __iomem
*reg_ptr
;
188 reg_ptr
= (u32 __iomem
*)(((u8 __iomem
*)ehci
->regs
) + USBMODE
);
189 tmp
= ehci_readl(ehci
, reg_ptr
);
190 tmp
|= USBMODE_CM_HC
;
191 /* The default byte access to MMR space is LE after
192 * controller reset. Set the required endian mode
193 * for transfer buffers to match the host microprocessor
195 if (ehci_big_endian_mmio(ehci
))
197 ehci_writel(ehci
, tmp
, reg_ptr
);
200 /* reset a non-running (STS_HALT == 1) controller */
201 static int ehci_reset (struct ehci_hcd
*ehci
)
204 u32 command
= ehci_readl(ehci
, &ehci
->regs
->command
);
206 command
|= CMD_RESET
;
207 dbg_cmd (ehci
, "reset", command
);
208 ehci_writel(ehci
, command
, &ehci
->regs
->command
);
209 ehci_to_hcd(ehci
)->state
= HC_STATE_HALT
;
210 ehci
->next_statechange
= jiffies
;
211 retval
= handshake (ehci
, &ehci
->regs
->command
,
212 CMD_RESET
, 0, 250 * 1000);
217 if (ehci_is_TDI(ehci
))
223 /* idle the controller (from running) */
224 static void ehci_quiesce (struct ehci_hcd
*ehci
)
229 if (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))
233 /* wait for any schedule enables/disables to take effect */
234 temp
= ehci_readl(ehci
, &ehci
->regs
->command
) << 10;
235 temp
&= STS_ASS
| STS_PSS
;
236 if (handshake_on_error_set_halt(ehci
, &ehci
->regs
->status
,
237 STS_ASS
| STS_PSS
, temp
, 16 * 125))
240 /* then disable anything that's still active */
241 temp
= ehci_readl(ehci
, &ehci
->regs
->command
);
242 temp
&= ~(CMD_ASE
| CMD_IAAD
| CMD_PSE
);
243 ehci_writel(ehci
, temp
, &ehci
->regs
->command
);
245 /* hardware can take 16 microframes to turn off ... */
246 handshake_on_error_set_halt(ehci
, &ehci
->regs
->status
,
247 STS_ASS
| STS_PSS
, 0, 16 * 125);
250 /*-------------------------------------------------------------------------*/
252 static void end_unlink_async(struct ehci_hcd
*ehci
);
253 static void ehci_work(struct ehci_hcd
*ehci
);
255 #include "ehci-hub.c"
256 #include "ehci-mem.c"
258 #include "ehci-sched.c"
260 /*-------------------------------------------------------------------------*/
262 static void ehci_iaa_watchdog(unsigned long param
)
264 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
267 spin_lock_irqsave (&ehci
->lock
, flags
);
269 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
270 * So we need this watchdog, but must protect it against both
271 * (a) SMP races against real IAA firing and retriggering, and
272 * (b) clean HC shutdown, when IAA watchdog was pending.
275 && !timer_pending(&ehci
->iaa_watchdog
)
276 && HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
)) {
279 /* If we get here, IAA is *REALLY* late. It's barely
280 * conceivable that the system is so busy that CMD_IAAD
281 * is still legitimately set, so let's be sure it's
282 * clear before we read STS_IAA. (The HC should clear
283 * CMD_IAAD when it sets STS_IAA.)
285 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
287 ehci_writel(ehci
, cmd
& ~CMD_IAAD
,
288 &ehci
->regs
->command
);
290 /* If IAA is set here it either legitimately triggered
291 * before we cleared IAAD above (but _way_ late, so we'll
292 * still count it as lost) ... or a silicon erratum:
293 * - VIA seems to set IAA without triggering the IRQ;
294 * - IAAD potentially cleared without setting IAA.
296 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
297 if ((status
& STS_IAA
) || !(cmd
& CMD_IAAD
)) {
298 COUNT (ehci
->stats
.lost_iaa
);
299 ehci_writel(ehci
, STS_IAA
, &ehci
->regs
->status
);
302 ehci_vdbg(ehci
, "IAA watchdog: status %x cmd %x\n",
304 end_unlink_async(ehci
);
307 spin_unlock_irqrestore(&ehci
->lock
, flags
);
310 static void ehci_watchdog(unsigned long param
)
312 struct ehci_hcd
*ehci
= (struct ehci_hcd
*) param
;
315 spin_lock_irqsave(&ehci
->lock
, flags
);
317 /* stop async processing after it's idled a bit */
318 if (test_bit (TIMER_ASYNC_OFF
, &ehci
->actions
))
319 start_unlink_async (ehci
, ehci
->async
);
321 /* ehci could run by timer, without IRQs ... */
324 spin_unlock_irqrestore (&ehci
->lock
, flags
);
327 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
328 * The firmware seems to think that powering off is a wakeup event!
329 * This routine turns off remote wakeup and everything else, on all ports.
331 static void ehci_turn_off_all_ports(struct ehci_hcd
*ehci
)
333 int port
= HCS_N_PORTS(ehci
->hcs_params
);
336 ehci_writel(ehci
, PORT_RWC_BITS
,
337 &ehci
->regs
->port_status
[port
]);
341 * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
342 * Should be called with ehci->lock held.
344 static void ehci_silence_controller(struct ehci_hcd
*ehci
)
347 ehci_turn_off_all_ports(ehci
);
349 /* make BIOS/etc use companion controller during reboot */
350 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
352 /* unblock posted writes */
353 ehci_readl(ehci
, &ehci
->regs
->configured_flag
);
356 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
357 * This forcibly disables dma and IRQs, helping kexec and other cases
358 * where the next system software may expect clean state.
360 static void ehci_shutdown(struct usb_hcd
*hcd
)
362 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
364 del_timer_sync(&ehci
->watchdog
);
365 del_timer_sync(&ehci
->iaa_watchdog
);
367 spin_lock_irq(&ehci
->lock
);
368 ehci_silence_controller(ehci
);
369 spin_unlock_irq(&ehci
->lock
);
372 static void ehci_port_power (struct ehci_hcd
*ehci
, int is_on
)
376 if (!HCS_PPC (ehci
->hcs_params
))
379 ehci_dbg (ehci
, "...power%s ports...\n", is_on
? "up" : "down");
380 for (port
= HCS_N_PORTS (ehci
->hcs_params
); port
> 0; )
381 (void) ehci_hub_control(ehci_to_hcd(ehci
),
382 is_on
? SetPortFeature
: ClearPortFeature
,
385 /* Flush those writes */
386 ehci_readl(ehci
, &ehci
->regs
->command
);
390 /*-------------------------------------------------------------------------*/
393 * ehci_work is called from some interrupts, timers, and so on.
394 * it calls driver completion functions, after dropping ehci->lock.
396 static void ehci_work (struct ehci_hcd
*ehci
)
398 timer_action_done (ehci
, TIMER_IO_WATCHDOG
);
400 /* another CPU may drop ehci->lock during a schedule scan while
401 * it reports urb completions. this flag guards against bogus
402 * attempts at re-entrant schedule scanning.
408 if (ehci
->next_uframe
!= -1)
409 scan_periodic (ehci
);
412 /* the IO watchdog guards against hardware or driver bugs that
413 * misplace IRQs, and should let us run completely without IRQs.
414 * such lossage has been observed on both VT6202 and VT8235.
416 if (HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
) &&
417 (ehci
->async
->qh_next
.ptr
!= NULL
||
418 ehci
->periodic_sched
!= 0))
419 timer_action (ehci
, TIMER_IO_WATCHDOG
);
423 * Called when the ehci_hcd module is removed.
425 static void ehci_stop (struct usb_hcd
*hcd
)
427 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
429 ehci_dbg (ehci
, "stop\n");
431 /* no more interrupts ... */
432 del_timer_sync (&ehci
->watchdog
);
433 del_timer_sync(&ehci
->iaa_watchdog
);
435 spin_lock_irq(&ehci
->lock
);
436 if (HC_IS_RUNNING (hcd
->state
))
439 ehci_silence_controller(ehci
);
441 spin_unlock_irq(&ehci
->lock
);
443 remove_companion_file(ehci
);
444 remove_debug_files (ehci
);
446 /* root hub is shut down separately (first, when possible) */
447 spin_lock_irq (&ehci
->lock
);
450 spin_unlock_irq (&ehci
->lock
);
451 ehci_mem_cleanup (ehci
);
454 ehci_dbg (ehci
, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
455 ehci
->stats
.normal
, ehci
->stats
.error
, ehci
->stats
.reclaim
,
456 ehci
->stats
.lost_iaa
);
457 ehci_dbg (ehci
, "complete %ld unlink %ld\n",
458 ehci
->stats
.complete
, ehci
->stats
.unlink
);
461 dbg_status (ehci
, "ehci_stop completed",
462 ehci_readl(ehci
, &ehci
->regs
->status
));
465 /* one-time init, only for memory state */
466 static int ehci_init(struct usb_hcd
*hcd
)
468 struct ehci_hcd
*ehci
= hcd_to_ehci(hcd
);
473 spin_lock_init(&ehci
->lock
);
475 init_timer(&ehci
->watchdog
);
476 ehci
->watchdog
.function
= ehci_watchdog
;
477 ehci
->watchdog
.data
= (unsigned long) ehci
;
479 init_timer(&ehci
->iaa_watchdog
);
480 ehci
->iaa_watchdog
.function
= ehci_iaa_watchdog
;
481 ehci
->iaa_watchdog
.data
= (unsigned long) ehci
;
484 * hw default: 1K periodic list heads, one per frame.
485 * periodic_size can shrink by USBCMD update if hcc_params allows.
487 ehci
->periodic_size
= DEFAULT_I_TDPS
;
488 INIT_LIST_HEAD(&ehci
->cached_itd_list
);
489 if ((retval
= ehci_mem_init(ehci
, GFP_KERNEL
)) < 0)
492 /* controllers may cache some of the periodic schedule ... */
493 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
494 if (HCC_ISOC_CACHE(hcc_params
)) // full frame cache
496 else // N microframes cached
497 ehci
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
499 ehci
->reclaim
= NULL
;
500 ehci
->next_uframe
= -1;
501 ehci
->clock_frame
= -1;
504 * dedicate a qh for the async ring head, since we couldn't unlink
505 * a 'real' qh without stopping the async schedule [4.8]. use it
506 * as the 'reclamation list head' too.
507 * its dummy is used in hw_alt_next of many tds, to prevent the qh
508 * from automatically advancing to the next td after short reads.
510 ehci
->async
->qh_next
.qh
= NULL
;
511 ehci
->async
->hw_next
= QH_NEXT(ehci
, ehci
->async
->qh_dma
);
512 ehci
->async
->hw_info1
= cpu_to_hc32(ehci
, QH_HEAD
);
513 ehci
->async
->hw_token
= cpu_to_hc32(ehci
, QTD_STS_HALT
);
514 ehci
->async
->hw_qtd_next
= EHCI_LIST_END(ehci
);
515 ehci
->async
->qh_state
= QH_STATE_LINKED
;
516 ehci
->async
->hw_alt_next
= QTD_NEXT(ehci
, ehci
->async
->dummy
->qtd_dma
);
518 /* clear interrupt enables, set irq latency */
519 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
521 temp
= 1 << (16 + log2_irq_thresh
);
522 if (HCC_CANPARK(hcc_params
)) {
523 /* HW default park == 3, on hardware that supports it (like
524 * NVidia and ALI silicon), maximizes throughput on the async
525 * schedule by avoiding QH fetches between transfers.
527 * With fast usb storage devices and NForce2, "park" seems to
528 * make problems: throughput reduction (!), data errors...
531 park
= min(park
, (unsigned) 3);
535 ehci_dbg(ehci
, "park %d\n", park
);
537 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
538 /* periodic schedule size can be smaller than default */
540 temp
|= (EHCI_TUNE_FLS
<< 2);
541 switch (EHCI_TUNE_FLS
) {
542 case 0: ehci
->periodic_size
= 1024; break;
543 case 1: ehci
->periodic_size
= 512; break;
544 case 2: ehci
->periodic_size
= 256; break;
548 ehci
->command
= temp
;
553 /* start HC running; it's halted, ehci_init() has been run (once) */
554 static int ehci_run (struct usb_hcd
*hcd
)
556 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
561 hcd
->uses_new_polling
= 1;
564 /* EHCI spec section 4.1 */
565 if ((retval
= ehci_reset(ehci
)) != 0) {
566 ehci_mem_cleanup(ehci
);
569 ehci_writel(ehci
, ehci
->periodic_dma
, &ehci
->regs
->frame_list
);
570 ehci_writel(ehci
, (u32
)ehci
->async
->qh_dma
, &ehci
->regs
->async_next
);
573 * hcc_params controls whether ehci->regs->segment must (!!!)
574 * be used; it constrains QH/ITD/SITD and QTD locations.
575 * pci_pool consistent memory always uses segment zero.
576 * streaming mappings for I/O buffers, like pci_map_single(),
577 * can return segments above 4GB, if the device allows.
579 * NOTE: the dma mask is visible through dma_supported(), so
580 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
581 * Scsi_Host.highmem_io, and so forth. It's readonly to all
582 * host side drivers though.
584 hcc_params
= ehci_readl(ehci
, &ehci
->caps
->hcc_params
);
585 if (HCC_64BIT_ADDR(hcc_params
)) {
586 ehci_writel(ehci
, 0, &ehci
->regs
->segment
);
588 // this is deeply broken on almost all architectures
589 if (!dma_set_mask(hcd
->self
.controller
, DMA_64BIT_MASK
))
590 ehci_info(ehci
, "enabled 64bit DMA\n");
595 // Philips, Intel, and maybe others need CMD_RUN before the
596 // root hub will detect new devices (why?); NEC doesn't
597 ehci
->command
&= ~(CMD_LRESET
|CMD_IAAD
|CMD_PSE
|CMD_ASE
|CMD_RESET
);
598 ehci
->command
|= CMD_RUN
;
599 ehci_writel(ehci
, ehci
->command
, &ehci
->regs
->command
);
600 dbg_cmd (ehci
, "init", ehci
->command
);
603 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
604 * are explicitly handed to companion controller(s), so no TT is
605 * involved with the root hub. (Except where one is integrated,
606 * and there's no companion controller unless maybe for USB OTG.)
608 * Turning on the CF flag will transfer ownership of all ports
609 * from the companions to the EHCI controller. If any of the
610 * companions are in the middle of a port reset at the time, it
611 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
612 * guarantees that no resets are in progress. After we set CF,
613 * a short delay lets the hardware catch up; new resets shouldn't
614 * be started before the port switching actions could complete.
616 down_write(&ehci_cf_port_reset_rwsem
);
617 hcd
->state
= HC_STATE_RUNNING
;
618 ehci_writel(ehci
, FLAG_CF
, &ehci
->regs
->configured_flag
);
619 ehci_readl(ehci
, &ehci
->regs
->command
); /* unblock posted writes */
621 up_write(&ehci_cf_port_reset_rwsem
);
623 temp
= HC_VERSION(ehci_readl(ehci
, &ehci
->caps
->hc_capbase
));
625 "USB %x.%x started, EHCI %x.%02x%s\n",
626 ((ehci
->sbrn
& 0xf0)>>4), (ehci
->sbrn
& 0x0f),
627 temp
>> 8, temp
& 0xff,
628 ignore_oc
? ", overcurrent ignored" : "");
630 ehci_writel(ehci
, INTR_MASK
,
631 &ehci
->regs
->intr_enable
); /* Turn On Interrupts */
633 /* GRR this is run-once init(), being done every time the HC starts.
634 * So long as they're part of class devices, we can't do it init()
635 * since the class device isn't created that early.
637 create_debug_files(ehci
);
638 create_companion_file(ehci
);
643 /*-------------------------------------------------------------------------*/
645 static irqreturn_t
ehci_irq (struct usb_hcd
*hcd
)
647 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
648 u32 status
, masked_status
, pcd_status
= 0, cmd
;
651 spin_lock (&ehci
->lock
);
653 status
= ehci_readl(ehci
, &ehci
->regs
->status
);
655 /* e.g. cardbus physical eject */
656 if (status
== ~(u32
) 0) {
657 ehci_dbg (ehci
, "device removed\n");
661 masked_status
= status
& INTR_MASK
;
662 if (!masked_status
) { /* irq sharing? */
663 spin_unlock(&ehci
->lock
);
667 /* clear (just) interrupts */
668 ehci_writel(ehci
, masked_status
, &ehci
->regs
->status
);
669 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
673 /* unrequested/ignored: Frame List Rollover */
674 dbg_status (ehci
, "irq", status
);
677 /* INT, ERR, and IAA interrupt rates can be throttled */
679 /* normal [4.15.1.2] or error [4.15.1.1] completion */
680 if (likely ((status
& (STS_INT
|STS_ERR
)) != 0)) {
681 if (likely ((status
& STS_ERR
) == 0))
682 COUNT (ehci
->stats
.normal
);
684 COUNT (ehci
->stats
.error
);
688 /* complete the unlinking of some qh [4.15.2.3] */
689 if (status
& STS_IAA
) {
690 /* guard against (alleged) silicon errata */
691 if (cmd
& CMD_IAAD
) {
692 ehci_writel(ehci
, cmd
& ~CMD_IAAD
,
693 &ehci
->regs
->command
);
694 ehci_dbg(ehci
, "IAA with IAAD still set?\n");
697 COUNT(ehci
->stats
.reclaim
);
698 end_unlink_async(ehci
);
700 ehci_dbg(ehci
, "IAA with nothing to reclaim?\n");
703 /* remote wakeup [4.3.1] */
704 if (status
& STS_PCD
) {
705 unsigned i
= HCS_N_PORTS (ehci
->hcs_params
);
707 /* kick root hub later */
710 /* resume root hub? */
711 if (!(cmd
& CMD_RUN
))
712 usb_hcd_resume_root_hub(hcd
);
715 int pstatus
= ehci_readl(ehci
,
716 &ehci
->regs
->port_status
[i
]);
718 if (pstatus
& PORT_OWNER
)
720 if (!(test_bit(i
, &ehci
->suspended_ports
) &&
721 ((pstatus
& PORT_RESUME
) ||
722 !(pstatus
& PORT_SUSPEND
)) &&
723 (pstatus
& PORT_PE
) &&
724 ehci
->reset_done
[i
] == 0))
727 /* start 20 msec resume signaling from this port,
728 * and make khubd collect PORT_STAT_C_SUSPEND to
729 * stop that signaling.
731 ehci
->reset_done
[i
] = jiffies
+ msecs_to_jiffies (20);
732 ehci_dbg (ehci
, "port %d remote wakeup\n", i
+ 1);
733 mod_timer(&hcd
->rh_timer
, ehci
->reset_done
[i
]);
737 /* PCI errors [4.15.2.4] */
738 if (unlikely ((status
& STS_FATAL
) != 0)) {
739 ehci_err(ehci
, "fatal error\n");
740 dbg_cmd(ehci
, "fatal", cmd
);
741 dbg_status(ehci
, "fatal", status
);
745 ehci_writel(ehci
, 0, &ehci
->regs
->configured_flag
);
746 /* generic layer kills/unlinks all urbs, then
747 * uses ehci_stop to clean up the rest
754 spin_unlock (&ehci
->lock
);
756 usb_hcd_poll_rh_status(hcd
);
760 /*-------------------------------------------------------------------------*/
763 * non-error returns are a promise to giveback() the urb later
764 * we drop ownership so next owner (or urb unlink) can get it
766 * urb + dev is in hcd.self.controller.urb_list
767 * we're queueing TDs onto software and hardware lists
769 * hcd-specific init for hcpriv hasn't been done yet
771 * NOTE: control, bulk, and interrupt share the same code to append TDs
772 * to a (possibly active) QH, and the same QH scanning code.
774 static int ehci_urb_enqueue (
779 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
780 struct list_head qtd_list
;
782 INIT_LIST_HEAD (&qtd_list
);
784 switch (usb_pipetype (urb
->pipe
)) {
786 /* qh_completions() code doesn't handle all the fault cases
787 * in multi-TD control transfers. Even 1KB is rare anyway.
789 if (urb
->transfer_buffer_length
> (16 * 1024))
792 /* case PIPE_BULK: */
794 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
796 return submit_async(ehci
, urb
, &qtd_list
, mem_flags
);
799 if (!qh_urb_transaction (ehci
, urb
, &qtd_list
, mem_flags
))
801 return intr_submit(ehci
, urb
, &qtd_list
, mem_flags
);
803 case PIPE_ISOCHRONOUS
:
804 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
805 return itd_submit (ehci
, urb
, mem_flags
);
807 return sitd_submit (ehci
, urb
, mem_flags
);
811 static void unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
814 if (!HC_IS_RUNNING(ehci_to_hcd(ehci
)->state
) && ehci
->reclaim
)
815 end_unlink_async(ehci
);
817 /* if it's not linked then there's nothing to do */
818 if (qh
->qh_state
!= QH_STATE_LINKED
)
821 /* defer till later if busy */
822 else if (ehci
->reclaim
) {
823 struct ehci_qh
*last
;
825 for (last
= ehci
->reclaim
;
827 last
= last
->reclaim
)
829 qh
->qh_state
= QH_STATE_UNLINK_WAIT
;
832 /* start IAA cycle */
834 start_unlink_async (ehci
, qh
);
837 /* remove from hardware lists
838 * completions normally happen asynchronously
841 static int ehci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
843 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
848 spin_lock_irqsave (&ehci
->lock
, flags
);
849 rc
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
853 switch (usb_pipetype (urb
->pipe
)) {
854 // case PIPE_CONTROL:
857 qh
= (struct ehci_qh
*) urb
->hcpriv
;
860 switch (qh
->qh_state
) {
861 case QH_STATE_LINKED
:
862 case QH_STATE_COMPLETING
:
863 unlink_async(ehci
, qh
);
865 case QH_STATE_UNLINK
:
866 case QH_STATE_UNLINK_WAIT
:
867 /* already started */
876 qh
= (struct ehci_qh
*) urb
->hcpriv
;
879 switch (qh
->qh_state
) {
880 case QH_STATE_LINKED
:
881 intr_deschedule (ehci
, qh
);
884 qh_completions (ehci
, qh
);
887 ehci_dbg (ehci
, "bogus qh %p state %d\n",
892 /* reschedule QH iff another request is queued */
893 if (!list_empty (&qh
->qtd_list
)
894 && HC_IS_RUNNING (hcd
->state
)) {
895 rc
= qh_schedule(ehci
, qh
);
897 /* An error here likely indicates handshake failure
898 * or no space left in the schedule. Neither fault
899 * should happen often ...
901 * FIXME kill the now-dysfunctional queued urbs
905 "can't reschedule qh %p, err %d",
910 case PIPE_ISOCHRONOUS
:
913 // wait till next completion, do it then.
914 // completion irqs can wait up to 1024 msec,
918 spin_unlock_irqrestore (&ehci
->lock
, flags
);
922 /*-------------------------------------------------------------------------*/
924 // bulk qh holds the data toggle
927 ehci_endpoint_disable (struct usb_hcd
*hcd
, struct usb_host_endpoint
*ep
)
929 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
931 struct ehci_qh
*qh
, *tmp
;
933 /* ASSERT: any requests/urbs are being unlinked */
934 /* ASSERT: nobody can be submitting urbs for this any more */
937 spin_lock_irqsave (&ehci
->lock
, flags
);
942 /* endpoints can be iso streams. for now, we don't
943 * accelerate iso completions ... so spin a while.
945 if (qh
->hw_info1
== 0) {
946 ehci_vdbg (ehci
, "iso delay\n");
950 if (!HC_IS_RUNNING (hcd
->state
))
951 qh
->qh_state
= QH_STATE_IDLE
;
952 switch (qh
->qh_state
) {
953 case QH_STATE_LINKED
:
954 for (tmp
= ehci
->async
->qh_next
.qh
;
956 tmp
= tmp
->qh_next
.qh
)
958 /* periodic qh self-unlinks on empty */
961 unlink_async (ehci
, qh
);
963 case QH_STATE_UNLINK
: /* wait for hw to finish? */
964 case QH_STATE_UNLINK_WAIT
:
966 spin_unlock_irqrestore (&ehci
->lock
, flags
);
967 schedule_timeout_uninterruptible(1);
969 case QH_STATE_IDLE
: /* fully unlinked */
970 if (list_empty (&qh
->qtd_list
)) {
974 /* else FALL THROUGH */
977 /* caller was supposed to have unlinked any requests;
978 * that's not our job. just leak this memory.
980 ehci_err (ehci
, "qh %p (#%02x) state %d%s\n",
981 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
982 list_empty (&qh
->qtd_list
) ? "" : "(has tds)");
987 spin_unlock_irqrestore (&ehci
->lock
, flags
);
991 static int ehci_get_frame (struct usb_hcd
*hcd
)
993 struct ehci_hcd
*ehci
= hcd_to_ehci (hcd
);
994 return (ehci_readl(ehci
, &ehci
->regs
->frame_index
) >> 3) %
998 /*-------------------------------------------------------------------------*/
1000 MODULE_DESCRIPTION(DRIVER_DESC
);
1001 MODULE_AUTHOR (DRIVER_AUTHOR
);
1002 MODULE_LICENSE ("GPL");
1005 #include "ehci-pci.c"
1006 #define PCI_DRIVER ehci_pci_driver
1009 #ifdef CONFIG_USB_EHCI_FSL
1010 #include "ehci-fsl.c"
1011 #define PLATFORM_DRIVER ehci_fsl_driver
1014 #ifdef CONFIG_SOC_AU1200
1015 #include "ehci-au1xxx.c"
1016 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
1019 #ifdef CONFIG_PPC_PS3
1020 #include "ehci-ps3.c"
1021 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
1024 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1025 #include "ehci-ppc-of.c"
1026 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1029 #ifdef CONFIG_PLAT_ORION
1030 #include "ehci-orion.c"
1031 #define PLATFORM_DRIVER ehci_orion_driver
1034 #ifdef CONFIG_ARCH_IXP4XX
1035 #include "ehci-ixp4xx.c"
1036 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1039 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1040 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1041 #error "missing bus glue for ehci-hcd"
1044 static int __init
ehci_hcd_init(void)
1051 printk(KERN_INFO
"%s: " DRIVER_DESC
"\n", hcd_name
);
1052 set_bit(USB_EHCI_LOADED
, &usb_hcds_loaded
);
1053 if (test_bit(USB_UHCI_LOADED
, &usb_hcds_loaded
) ||
1054 test_bit(USB_OHCI_LOADED
, &usb_hcds_loaded
))
1055 printk(KERN_WARNING
"Warning! ehci_hcd should always be loaded"
1056 " before uhci_hcd and ohci_hcd, not after\n");
1058 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1060 sizeof(struct ehci_qh
), sizeof(struct ehci_qtd
),
1061 sizeof(struct ehci_itd
), sizeof(struct ehci_sitd
));
1064 ehci_debug_root
= debugfs_create_dir("ehci", NULL
);
1065 if (!ehci_debug_root
) {
1071 #ifdef PLATFORM_DRIVER
1072 retval
= platform_driver_register(&PLATFORM_DRIVER
);
1078 retval
= pci_register_driver(&PCI_DRIVER
);
1083 #ifdef PS3_SYSTEM_BUS_DRIVER
1084 retval
= ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER
);
1089 #ifdef OF_PLATFORM_DRIVER
1090 retval
= of_register_platform_driver(&OF_PLATFORM_DRIVER
);
1096 #ifdef OF_PLATFORM_DRIVER
1097 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1100 #ifdef PS3_SYSTEM_BUS_DRIVER
1101 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1105 pci_unregister_driver(&PCI_DRIVER
);
1108 #ifdef PLATFORM_DRIVER
1109 platform_driver_unregister(&PLATFORM_DRIVER
);
1113 debugfs_remove(ehci_debug_root
);
1114 ehci_debug_root
= NULL
;
1117 clear_bit(USB_EHCI_LOADED
, &usb_hcds_loaded
);
1120 module_init(ehci_hcd_init
);
1122 static void __exit
ehci_hcd_cleanup(void)
1124 #ifdef OF_PLATFORM_DRIVER
1125 of_unregister_platform_driver(&OF_PLATFORM_DRIVER
);
1127 #ifdef PLATFORM_DRIVER
1128 platform_driver_unregister(&PLATFORM_DRIVER
);
1131 pci_unregister_driver(&PCI_DRIVER
);
1133 #ifdef PS3_SYSTEM_BUS_DRIVER
1134 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER
);
1137 debugfs_remove(ehci_debug_root
);
1139 clear_bit(USB_EHCI_LOADED
, &usb_hcds_loaded
);
1141 module_exit(ehci_hcd_cleanup
);