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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / staging / rtl8187se / r8180_core.c
blob66de5cc8ddf119a85d4b66c4829bfe4c97422b90
1 /*
2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License)
5
6 Parts of this driver are based on the GPL part of the official
7 Realtek driver.
8
9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon.
11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15
16 RSSI calc function from 'The Deuce'
17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19
20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors.
22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also.
25 */
26
27 #if 0
28 double __floatsidf (int i) { return i; }
29 unsigned int __fixunsdfsi (double d) { return d; }
30 double __adddf3(double a, double b) { return a+b; }
31 double __addsf3(float a, float b) { return a+b; }
32 double __subdf3(double a, double b) { return a-b; }
33 double __extendsfdf2(float a) {return a;}
34 #endif
35
36
37 #undef DEBUG_TX_DESC2
38 #undef RX_DONT_PASS_UL
39 #undef DEBUG_EPROM
40 #undef DEBUG_RX_VERBOSE
41 #undef DUMMY_RX
42 #undef DEBUG_ZERO_RX
43 #undef DEBUG_RX_SKB
44 #undef DEBUG_TX_FRAG
45 #undef DEBUG_RX_FRAG
46 #undef DEBUG_TX_FILLDESC
47 #undef DEBUG_TX
48 #undef DEBUG_IRQ
49 #undef DEBUG_RX
50 #undef DEBUG_RXALLOC
51 #undef DEBUG_REGISTERS
52 #undef DEBUG_RING
53 #undef DEBUG_IRQ_TASKLET
54 #undef DEBUG_TX_ALLOC
55 #undef DEBUG_TX_DESC
56
57 //#define DEBUG_TX
58 //#define DEBUG_TX_DESC2
59 //#define DEBUG_RX
60 //#define DEBUG_RX_SKB
61
62 //#define CONFIG_RTL8180_IO_MAP
63 #include <linux/syscalls.h>
64 //#include <linux/fcntl.h>
65 //#include <asm/uaccess.h>
66 #include "r8180_hw.h"
67 #include "r8180.h"
68 #include "r8180_sa2400.h" /* PHILIPS Radio frontend */
69 #include "r8180_max2820.h" /* MAXIM Radio frontend */
70 #include "r8180_gct.h" /* GCT Radio frontend */
71 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
72 #include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
73 #include "r8180_93cx6.h" /* Card EEPROM */
74 #include "r8180_wx.h"
75 #include "r8180_dm.h"
76
77 #ifdef CONFIG_RTL8180_PM
78 #include "r8180_pm.h"
79 #endif
80
81 #ifdef ENABLE_DOT11D
82 #include "dot11d.h"
83 #endif
84
85 #ifdef CONFIG_RTL8185B
86 //#define CONFIG_RTL8180_IO_MAP
87 #endif
88
89 #ifndef PCI_VENDOR_ID_BELKIN
90 #define PCI_VENDOR_ID_BELKIN 0x1799
91 #endif
92 #ifndef PCI_VENDOR_ID_DLINK
93 #define PCI_VENDOR_ID_DLINK 0x1186
94 #endif
95
96 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
97 {
98 .vendor = PCI_VENDOR_ID_REALTEK,
99 // .device = 0x8180,
100 .device = 0x8199,
101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID,
103 .driver_data = 0,
104 },
105 #if 0
106 {
107 .vendor = PCI_VENDOR_ID_BELKIN,
108 .device = 0x6001,
109 .subvendor = PCI_ANY_ID,
110 .subdevice = PCI_ANY_ID,
111 .driver_data = 1,
112 },
113 { /* Belkin F5D6020 v3 */
114 .vendor = PCI_VENDOR_ID_BELKIN,
115 .device = 0x6020,
116 .subvendor = PCI_ANY_ID,
117 .subdevice = PCI_ANY_ID,
118 .driver_data = 2,
119 },
120 { /* D-Link DWL-610 */
121 .vendor = PCI_VENDOR_ID_DLINK,
122 .device = 0x3300,
123 .subvendor = PCI_ANY_ID,
124 .subdevice = PCI_ANY_ID,
125 .driver_data = 3,
126 },
127 {
128 .vendor = PCI_VENDOR_ID_REALTEK,
129 .device = 0x8185,
130 .subvendor = PCI_ANY_ID,
131 .subdevice = PCI_ANY_ID,
132 .driver_data = 4,
133 },
134 #endif
135 {
136 .vendor = 0,
137 .device = 0,
138 .subvendor = 0,
139 .subdevice = 0,
140 .driver_data = 0,
141 }
142 };
143
144
145 static char* ifname = "wlan%d";
146 static int hwseqnum = 0;
147 //static char* ifname = "ath%d";
148 static int hwwep = 0;
149 static int channels = 0x3fff;
150
151 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
152 #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
153 MODULE_LICENSE("GPL");
154 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
155 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
156 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
157
158
159
160 /*
161 MODULE_PARM(ifname, "s");
162 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
163
164 MODULE_PARM(hwseqnum,"i");
165 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
166
167 MODULE_PARM(hwwep,"i");
168 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
169
170 MODULE_PARM(channels,"i");
171 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
172 */
173
174 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
175 module_param(ifname, charp, S_IRUGO|S_IWUSR );
176 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
177 module_param(hwwep,int, S_IRUGO|S_IWUSR);
178 module_param(channels,int, S_IRUGO|S_IWUSR);
179 #else
180 MODULE_PARM(ifname, "s");
181 MODULE_PARM(hwseqnum,"i");
182 MODULE_PARM(hwwep,"i");
183 MODULE_PARM(channels,"i");
184 #endif
185
186 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
187 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
188 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
189 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
190 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
191
192
193 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
194 const struct pci_device_id *id);
195
196 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
197
198 static void rtl8180_shutdown (struct pci_dev *pdev)
199 {
200 struct net_device *dev = pci_get_drvdata(pdev);
201 dev->stop(dev);
202 pci_disable_device(pdev);
203 }
204
205 static struct pci_driver rtl8180_pci_driver = {
206 .name = RTL8180_MODULE_NAME, /* Driver name */
207 .id_table = rtl8180_pci_id_tbl, /* PCI_ID table */
208 .probe = rtl8180_pci_probe, /* probe fn */
209 .remove = __devexit_p(rtl8180_pci_remove),/* remove fn */
210 #ifdef CONFIG_RTL8180_PM
211 .suspend = rtl8180_suspend, /* PM suspend fn */
212 .resume = rtl8180_resume, /* PM resume fn */
213 #else
214 .suspend = NULL, /* PM suspend fn */
215 .resume = NULL, /* PM resume fn */
216 #endif
217 .shutdown = rtl8180_shutdown,
218 };
219
220
221
222 #ifdef CONFIG_RTL8180_IO_MAP
223
224 u8 read_nic_byte(struct net_device *dev, int x)
225 {
226 return 0xff&inb(dev->base_addr +x);
227 }
228
229 u32 read_nic_dword(struct net_device *dev, int x)
230 {
231 return inl(dev->base_addr +x);
232 }
233
234 u16 read_nic_word(struct net_device *dev, int x)
235 {
236 return inw(dev->base_addr +x);
237 }
238
239 void write_nic_byte(struct net_device *dev, int x,u8 y)
240 {
241 outb(y&0xff,dev->base_addr +x);
242 }
243
244 void write_nic_word(struct net_device *dev, int x,u16 y)
245 {
246 outw(y,dev->base_addr +x);
247 }
248
249 void write_nic_dword(struct net_device *dev, int x,u32 y)
250 {
251 outl(y,dev->base_addr +x);
252 }
253
254 #else /* RTL_IO_MAP */
255
256 u8 read_nic_byte(struct net_device *dev, int x)
257 {
258 return 0xff&readb((u8*)dev->mem_start +x);
259 }
260
261 u32 read_nic_dword(struct net_device *dev, int x)
262 {
263 return readl((u8*)dev->mem_start +x);
264 }
265
266 u16 read_nic_word(struct net_device *dev, int x)
267 {
268 return readw((u8*)dev->mem_start +x);
269 }
270
271 void write_nic_byte(struct net_device *dev, int x,u8 y)
272 {
273 writeb(y,(u8*)dev->mem_start +x);
274 udelay(20);
275 }
276
277 void write_nic_dword(struct net_device *dev, int x,u32 y)
278 {
279 writel(y,(u8*)dev->mem_start +x);
280 udelay(20);
281 }
282
283 void write_nic_word(struct net_device *dev, int x,u16 y)
284 {
285 writew(y,(u8*)dev->mem_start +x);
286 udelay(20);
287 }
288
289 #endif /* RTL_IO_MAP */
290
291
292
293
294
295 inline void force_pci_posting(struct net_device *dev)
296 {
297 read_nic_byte(dev,EPROM_CMD);
298 #ifndef CONFIG_RTL8180_IO_MAP
299 mb();
300 #endif
301 }
302
303
304 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
305 void set_nic_rxring(struct net_device *dev);
306 void set_nic_txring(struct net_device *dev);
307 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
308 void rtl8180_commit(struct net_device *dev);
309 void rtl8180_start_tx_beacon(struct net_device *dev);
310
311 /****************************************************************************
312 -----------------------------PROCFS STUFF-------------------------
313 *****************************************************************************/
314
315 static struct proc_dir_entry *rtl8180_proc = NULL;
316
317 static int proc_get_registers(char *page, char **start,
318 off_t offset, int count,
319 int *eof, void *data)
320 {
321 struct net_device *dev = data;
322 // struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
323
324 int len = 0;
325 int i,n;
326
327 int max=0xff;
328
329 /* This dump the current register page */
330 for(n=0;n<=max;)
331 {
332 //printk( "\nD: %2x> ", n);
333 len += snprintf(page + len, count - len,
334 "\nD: %2x > ",n);
335
336 for(i=0;i<16 && n<=max;i++,n++)
337 len += snprintf(page + len, count - len,
338 "%2x ",read_nic_byte(dev,n));
339
340 // printk("%2x ",read_nic_byte(dev,n));
341 }
342 len += snprintf(page + len, count - len,"\n");
343
344
345
346 *eof = 1;
347 return len;
348
349 }
350
351 int get_curr_tx_free_desc(struct net_device *dev, int priority);
352
353 static int proc_get_stats_hw(char *page, char **start,
354 off_t offset, int count,
355 int *eof, void *data)
356 {
357 //struct net_device *dev = data;
358 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
359
360 int len = 0;
361 #ifdef CONFIG_RTL8185B
362
363 #else
364 len += snprintf(page + len, count - len,
365 "NIC int: %lu\n"
366 "Total int: %lu\n"
367 "--------------------\n"
368 "LP avail desc %d\n"
369 "NP avail desc %d\n"
370 "--------------------\n"
371 "LP phys dma addr %x\n"
372 "LP NIC ptr %x\n"
373 "LP virt 32base %x\n"
374 "LP virt 32tail %x\n"
375 "--------------------\n"
376 "NP phys dma addr %x\n"
377 "NP NIC ptr %x\n"
378 "NP virt 32base %x\n"
379 "NP virt 32tail %x\n"
380 "--------------------\n"
381 "BP phys dma addr %x\n"
382 "BP NIC ptr %x\n"
383 "BP virt 32base %x\n"
384 "BP virt 32tail %x\n",
385 priv->stats.ints,
386 priv->stats.shints,
387 get_curr_tx_free_desc(dev,LOW_PRIORITY),
388 get_curr_tx_free_desc(dev,NORM_PRIORITY),
389 (u32)priv->txvipringdma,
390 read_nic_dword(dev,TLPDA),
391 (u32)priv->txvipring,
392 (u32)priv->txvipringtail,
393 (u32)priv->txvopringdma,
394 read_nic_dword(dev,TNPDA),
395 (u32)priv->txvopring,
396 (u32)priv->txvopringtail,
397 (u32)priv->txbeaconringdma,
398 read_nic_dword(dev,TBDA),
399 (u32)priv->txbeaconring,
400 (u32)priv->txbeaconringtail);
401 #endif
402 *eof = 1;
403 return len;
404 }
405
406
407 static int proc_get_stats_rx(char *page, char **start,
408 off_t offset, int count,
409 int *eof, void *data)
410 {
411 struct net_device *dev = data;
412 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
413
414 int len = 0;
415
416 len += snprintf(page + len, count - len,
417 /* "RX descriptor not available: %lu\n"
418 "RX incomplete (missing last descriptor): %lu\n"
419 "RX not data: %lu\n"
420 //"RX descriptor pointer reset: %lu\n"
421 "RX descriptor pointer lost: %lu\n"
422 //"RX pointer workaround: %lu\n"
423 "RX error int: %lu\n"
424 "RX fifo overflow: %lu\n"
425 "RX int: %lu\n"
426 "RX packet: %lu\n"
427 "RX bytes: %lu\n"
428 "RX DMA fail: %lu\n",
429 priv->stats.rxrdu,
430 priv->stats.rxnolast,
431 priv->stats.rxnodata,
432 //priv->stats.rxreset,
433 priv->stats.rxnopointer,
434 //priv->stats.rxwrkaround,
435 priv->stats.rxerr,
436 priv->stats.rxoverflow,
437 priv->stats.rxint,
438 priv->ieee80211->stats.rx_packets,
439 priv->ieee80211->stats.rx_bytes,
440 priv->stats.rxdmafail */
441 "RX OK: %lu\n"
442 "RX Retry: %lu\n"
443 "RX CRC Error(0-500): %lu\n"
444 "RX CRC Error(500-1000): %lu\n"
445 "RX CRC Error(>1000): %lu\n"
446 "RX ICV Error: %lu\n",
447 priv->stats.rxint,
448 priv->stats.rxerr,
449 priv->stats.rxcrcerrmin,
450 priv->stats.rxcrcerrmid,
451 priv->stats.rxcrcerrmax,
452 priv->stats.rxicverr
453 );
454
455 *eof = 1;
456 return len;
457 }
458
459 #if 0
460 static int proc_get_stats_ieee(char *page, char **start,
461 off_t offset, int count,
462 int *eof, void *data)
463 {
464 struct net_device *dev = data;
465 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
466
467 int len = 0;
468
469 len += snprintf(page + len, count - len,
470 "TXed association requests: %u\n"
471 "TXed authentication requests: %u\n"
472 "RXed successful association response: %u\n"
473 "RXed failed association response: %u\n"
474 "RXed successful authentication response: %u\n"
475 "RXed failed authentication response: %u\n"
476 "Association requests without response: %u\n"
477 "Authentication requests without response: %u\n"
478 "TX probe response: %u\n"
479 "RX probe request: %u\n"
480 "TX probe request: %lu\n"
481 "RX authentication requests: %lu\n"
482 "RX association requests: %lu\n"
483 "Reassociations: %lu\n",
484 priv->ieee80211->ieee_stats.tx_ass,
485 priv->ieee80211->ieee_stats.tx_aut,
486 priv->ieee80211->ieee_stats.rx_ass_ok,
487 priv->ieee80211->ieee_stats.rx_ass_err,
488 priv->ieee80211->ieee_stats.rx_aut_ok,
489 priv->ieee80211->ieee_stats.rx_aut_err,
490 priv->ieee80211->ieee_stats.ass_noresp,
491 priv->ieee80211->ieee_stats.aut_noresp,
492 priv->ieee80211->ieee_stats.tx_probe,
493 priv->ieee80211->ieee_stats.rx_probe,
494 priv->ieee80211->ieee_stats.tx_probe_rq,
495 priv->ieee80211->ieee_stats.rx_auth_rq,
496 priv->ieee80211->ieee_stats.rx_assoc_rq,
497 priv->ieee80211->ieee_stats.reassoc);
498
499 *eof = 1;
500 return len;
501 }
502 #endif
503 #if 0
504 static int proc_get_stats_ap(char *page, char **start,
505 off_t offset, int count,
506 int *eof, void *data)
507 {
508 struct net_device *dev = data;
509 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
510 struct mac_htable_t *list;
511 int i;
512 int len = 0;
513
514 if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
515 len += snprintf(page + len, count - len,
516 "Card is not acting as AP...\n"
517 );
518 }else{
519 len += snprintf(page + len, count - len,
520 "List of associated STA:\n"
521 );
522
523 for(i=0;i<MAC_HTABLE_ENTRY;i++)
524 for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
525 len += snprintf(page + len, count - len,
526 MACSTR"\n",MAC2STR(list->adr));
527 }
528
529 }
530 *eof = 1;
531 return len;
532 }
533 #endif
534
535 static int proc_get_stats_tx(char *page, char **start,
536 off_t offset, int count,
537 int *eof, void *data)
538 {
539 struct net_device *dev = data;
540 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
541
542 int len = 0;
543 unsigned long totalOK;
544
545 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
546 len += snprintf(page + len, count - len,
547 /* "TX normal priority ok int: %lu\n"
548 "TX normal priority error int: %lu\n"
549 "TX high priority ok int: %lu\n"
550 "TX high priority failed error int: %lu\n"
551 "TX low priority ok int: %lu\n"
552 "TX low priority failed error int: %lu\n"
553 "TX bytes: %lu\n"
554 "TX packets: %lu\n"
555 "TX queue resume: %lu\n"
556 "TX queue stopped?: %d\n"
557 "TX fifo overflow: %lu\n"
558 //"SW TX stop: %lu\n"
559 //"SW TX wake: %lu\n"
560 "TX beacon: %lu\n"
561 "TX beacon aborted: %lu\n",
562 priv->stats.txnpokint,
563 priv->stats.txnperr,
564 priv->stats.txhpokint,
565 priv->stats.txhperr,
566 priv->stats.txlpokint,
567 priv->stats.txlperr,
568 priv->ieee80211->stats.tx_bytes,
569 priv->ieee80211->stats.tx_packets,
570 priv->stats.txresumed,
571 netif_queue_stopped(dev),
572 priv->stats.txoverflow,
573 //priv->ieee80211->ieee_stats.swtxstop,
574 //priv->ieee80211->ieee_stats.swtxawake,
575 priv->stats.txbeacon,
576 priv->stats.txbeaconerr */
577 "TX OK: %lu\n"
578 "TX Error: %lu\n"
579 "TX Retry: %lu\n"
580 "TX beacon OK: %lu\n"
581 "TX beacon error: %lu\n",
582 totalOK,
583 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
584 priv->stats.txretry,
585 priv->stats.txbeacon,
586 priv->stats.txbeaconerr
587 );
588
589 *eof = 1;
590 return len;
591 }
592
593
594 #if WIRELESS_EXT < 17
595 static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
596 {
597 struct r8180_priv *priv = ieee80211_priv(dev);
598
599 return &priv->wstats;
600 }
601 #endif
602 void rtl8180_proc_module_init(void)
603 {
604 DMESG("Initializing proc filesystem");
605 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
606 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, proc_net);
607 #else
608 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
609 #endif
610 }
611
612
613 void rtl8180_proc_module_remove(void)
614 {
615 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
616 remove_proc_entry(RTL8180_MODULE_NAME, proc_net);
617 #else
618 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
619 #endif
620 }
621
622
623 void rtl8180_proc_remove_one(struct net_device *dev)
624 {
625 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
626 if (priv->dir_dev) {
627 remove_proc_entry("stats-hw", priv->dir_dev);
628 remove_proc_entry("stats-tx", priv->dir_dev);
629 remove_proc_entry("stats-rx", priv->dir_dev);
630 // remove_proc_entry("stats-ieee", priv->dir_dev);
631 // remove_proc_entry("stats-ap", priv->dir_dev);
632 remove_proc_entry("registers", priv->dir_dev);
633 remove_proc_entry(dev->name, rtl8180_proc);
634 priv->dir_dev = NULL;
635 }
636 }
637
638
639 void rtl8180_proc_init_one(struct net_device *dev)
640 {
641 struct proc_dir_entry *e;
642 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
643 priv->dir_dev = create_proc_entry(dev->name,
644 S_IFDIR | S_IRUGO | S_IXUGO,
645 rtl8180_proc);
646 if (!priv->dir_dev) {
647 DMESGE("Unable to initialize /proc/net/rtl8180/%s\n",
648 dev->name);
649 return;
650 }
651
652 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
653 priv->dir_dev, proc_get_stats_hw, dev);
654
655 if (!e) {
656 DMESGE("Unable to initialize "
657 "/proc/net/rtl8180/%s/stats-hw\n",
658 dev->name);
659 }
660
661 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
662 priv->dir_dev, proc_get_stats_rx, dev);
663
664 if (!e) {
665 DMESGE("Unable to initialize "
666 "/proc/net/rtl8180/%s/stats-rx\n",
667 dev->name);
668 }
669
670
671 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
672 priv->dir_dev, proc_get_stats_tx, dev);
673
674 if (!e) {
675 DMESGE("Unable to initialize "
676 "/proc/net/rtl8180/%s/stats-tx\n",
677 dev->name);
678 }
679 #if 0
680 e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
681 priv->dir_dev, proc_get_stats_ieee, dev);
682
683 if (!e) {
684 DMESGE("Unable to initialize "
685 "/proc/net/rtl8180/%s/stats-ieee\n",
686 dev->name);
687 }
688 #endif
689 #if 0
690 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
691 priv->dir_dev, proc_get_stats_ap, dev);
692
693 if (!e) {
694 DMESGE("Unable to initialize "
695 "/proc/net/rtl8180/%s/stats-ap\n",
696 dev->name);
697 }
698 #endif
699
700 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
701 priv->dir_dev, proc_get_registers, dev);
702
703 if (!e) {
704 DMESGE("Unable to initialize "
705 "/proc/net/rtl8180/%s/registers\n",
706 dev->name);
707 }
708 }
709 /****************************************************************************
710 -----------------------------MISC STUFF-------------------------
711 *****************************************************************************/
712 /*
713 FIXME: check if we can use some standard already-existent
714 data type+functions in kernel
715 */
716
717 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
718 struct buffer **bufferhead)
719 {
720 #ifdef DEBUG_RING
721 DMESG("adding buffer to TX/RX struct");
722 #endif
723
724 struct buffer *tmp;
725
726 if(! *buffer){
727
728 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
729
730 if (*buffer == NULL) {
731 DMESGE("Failed to kmalloc head of TX/RX struct");
732 return -1;
733 }
734 (*buffer)->next=*buffer;
735 (*buffer)->buf=buf;
736 (*buffer)->dma=dma;
737 if(bufferhead !=NULL)
738 (*bufferhead) = (*buffer);
739 return 0;
740 }
741 tmp=*buffer;
742
743 while(tmp->next!=(*buffer)) tmp=tmp->next;
744 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
745 DMESGE("Failed to kmalloc TX/RX struct");
746 return -1;
747 }
748 tmp->next->buf=buf;
749 tmp->next->dma=dma;
750 tmp->next->next=*buffer;
751
752 return 0;
753 }
754
755
756 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
757 consistent)
758 {
759
760 struct buffer *tmp,*next;
761 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
762 struct pci_dev *pdev=priv->pdev;
763 //int i;
764
765 if(! *buffer) return;
766
767 /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
768
769 */
770 tmp=*buffer;
771 do{
772 next=tmp->next;
773 if(consistent){
774 pci_free_consistent(pdev,len,
775 tmp->buf,tmp->dma);
776 }else{
777 pci_unmap_single(pdev, tmp->dma,
778 len,PCI_DMA_FROMDEVICE);
779 kfree(tmp->buf);
780 }
781 kfree(tmp);
782 tmp = next;
783 }
784 while(next != *buffer);
785
786 *buffer=NULL;
787 }
788
789
790 void print_buffer(u32 *buffer, int len)
791 {
792 int i;
793 u8 *buf =(u8*)buffer;
794
795 printk("ASCII BUFFER DUMP (len: %x):\n",len);
796
797 for(i=0;i<len;i++)
798 printk("%c",buf[i]);
799
800 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
801
802 for(i=0;i<len;i++)
803 printk("%02x",buf[i]);
804
805 printk("\n");
806 }
807
808
809 int get_curr_tx_free_desc(struct net_device *dev, int priority)
810 {
811 struct r8180_priv *priv = ieee80211_priv(dev);
812 u32* tail;
813 u32* head;
814 int ret;
815
816 switch (priority){
817 case MANAGE_PRIORITY:
818 head = priv->txmapringhead;
819 tail = priv->txmapringtail;
820 break;
821 case BK_PRIORITY:
822 head = priv->txbkpringhead;
823 tail = priv->txbkpringtail;
824 break;
825 case BE_PRIORITY:
826 head = priv->txbepringhead;
827 tail = priv->txbepringtail;
828 break;
829 case VI_PRIORITY:
830 head = priv->txvipringhead;
831 tail = priv->txvipringtail;
832 break;
833 case VO_PRIORITY:
834 head = priv->txvopringhead;
835 tail = priv->txvopringtail;
836 break;
837 case HI_PRIORITY:
838 head = priv->txhpringhead;
839 tail = priv->txhpringtail;
840 break;
841 default:
842 return -1;
843 }
844
845 //DMESG("%x %x", head, tail);
846
847 /* FIXME FIXME FIXME FIXME */
848
849 #if 0
850 if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
851 return (head - tail)/8/4;
852 #else
853 if( head <= tail )
854 ret = priv->txringcount - (tail - head)/8;
855 else
856 ret = (head - tail)/8;
857
858 if(ret > priv->txringcount ) DMESG("BUG");
859 return ret;
860 #endif
861 }
862
863
864 short check_nic_enought_desc(struct net_device *dev, int priority)
865 {
866 struct r8180_priv *priv = ieee80211_priv(dev);
867 struct ieee80211_device *ieee = netdev_priv(dev);
868
869 int requiredbyte, required;
870 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
871
872 if(ieee->current_network.QoS_Enable) {
873 requiredbyte += 2;
874 };
875
876 required = requiredbyte / (priv->txbuffsize-4);
877 if (requiredbyte % priv->txbuffsize) required++;
878 /* for now we keep two free descriptor as a safety boundary
879 * between the tail and the head
880 */
881
882 return (required+2 < get_curr_tx_free_desc(dev,priority));
883 }
884
885
886 /* This function is only for debuging purpose */
887 void check_tx_ring(struct net_device *dev, int pri)
888 {
889 static int maxlog =3;
890 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
891 u32* tmp;
892 struct buffer *buf;
893 int i;
894 int nic;
895 u32* tail;
896 u32* head;
897 u32* begin;
898 u32 nicbegin;
899 struct buffer* buffer;
900
901 maxlog --;
902 if (maxlog <0 ) return;
903
904 switch(pri) {
905 case MANAGE_PRIORITY:
906 tail = priv->txmapringtail;
907 begin = priv->txmapring;
908 head = priv->txmapringhead;
909 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
910 buffer = priv->txmapbufs;
911 nicbegin = priv->txmapringdma;
912 break;
913
914
915 case BK_PRIORITY:
916 tail = priv->txbkpringtail;
917 begin = priv->txbkpring;
918 head = priv->txbkpringhead;
919 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
920 buffer = priv->txbkpbufs;
921 nicbegin = priv->txbkpringdma;
922 break;
923
924 case BE_PRIORITY:
925 tail = priv->txbepringtail;
926 begin = priv->txbepring;
927 head = priv->txbepringhead;
928 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
929 buffer = priv->txbepbufs;
930 nicbegin = priv->txbepringdma;
931 break;
932
933 case VI_PRIORITY:
934 tail = priv->txvipringtail;
935 begin = priv->txvipring;
936 head = priv->txvipringhead;
937 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
938 buffer = priv->txvipbufs;
939 nicbegin = priv->txvipringdma;
940 break;
941
942
943 case VO_PRIORITY:
944 tail = priv->txvopringtail;
945 begin = priv->txvopring;
946 head = priv->txvopringhead;
947 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
948 buffer = priv->txvopbufs;
949 nicbegin = priv->txvopringdma;
950 break;
951
952 case HI_PRIORITY:
953 tail = priv->txhpringtail;
954 begin = priv->txhpring;
955 head = priv->txhpringhead;
956 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
957 buffer = priv->txhpbufs;
958 nicbegin = priv->txhpringdma;
959 break;
960
961 default:
962 return ;
963 break;
964 }
965
966 if(!priv->txvopbufs)
967 DMESGE ("NIC TX ack, but TX queue corrupted!");
968 else{
969
970 for(i=0,buf=buffer, tmp=begin;
971 tmp<begin+(priv->txringcount)*8;
972 tmp+=8,buf=buf->next,i++)
973
974 DMESG("BUF%d %s %x %s. Next : %x",i,
975 *tmp & (1<<31) ? "filled" : "empty",
976 *(buf->buf),
977 *tmp & (1<<15)? "ok": "err", *(tmp+4));
978 }
979
980 DMESG("nic at %d",
981 (nic-nicbegin) / 8 /4);
982 DMESG("tail at %d", ((int)tail - (int)begin) /8 /4);
983 DMESG("head at %d", ((int)head - (int)begin) /8 /4);
984 DMESG("check free desc returns %d", check_nic_enought_desc(dev,pri));
985 DMESG("free desc is %d\n", get_curr_tx_free_desc(dev,pri));
986 //rtl8180_reset(dev);
987 return;
988 }
989
990
991
992 /* this function is only for debugging purpose */
993 void check_rxbuf(struct net_device *dev)
994 {
995 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
996 u32* tmp;
997 struct buffer *buf;
998 u8 rx_desc_size;
999
1000 #ifdef CONFIG_RTL8185B
1001 rx_desc_size = 8;
1002 #else
1003 rx_desc_size = 4;
1004 #endif
1005
1006 if(!priv->rxbuffer)
1007 DMESGE ("NIC RX ack, but RX queue corrupted!");
1008
1009 else{
1010
1011 for(buf=priv->rxbuffer, tmp=priv->rxring;
1012 tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
1013 tmp+=rx_desc_size, buf=buf->next)
1014
1015 DMESG("BUF %s %x",
1016 *tmp & (1<<31) ? "empty" : "filled",
1017 *(buf->buf));
1018 }
1019
1020 return;
1021 }
1022
1023
1024 void dump_eprom(struct net_device *dev)
1025 {
1026 int i;
1027 for(i=0; i<63; i++)
1028 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
1029 }
1030
1031
1032 void rtl8180_dump_reg(struct net_device *dev)
1033 {
1034 int i;
1035 int n;
1036 int max=0xff;
1037
1038 DMESG("Dumping NIC register map");
1039
1040 for(n=0;n<=max;)
1041 {
1042 printk( "\nD: %2x> ", n);
1043 for(i=0;i<16 && n<=max;i++,n++)
1044 printk("%2x ",read_nic_byte(dev,n));
1045 }
1046 printk("\n");
1047 }
1048
1049
1050 void fix_tx_fifo(struct net_device *dev)
1051 {
1052 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1053 u32 *tmp;
1054 int i;
1055 #ifdef DEBUG_TX_ALLOC
1056 DMESG("FIXING TX FIFOs");
1057 #endif
1058 for (tmp=priv->txmapring, i=0;
1059 i < priv->txringcount;
1060 tmp+=8, i++){
1061 *tmp = *tmp &~ (1<<31);
1062 }
1063
1064 for (tmp=priv->txbkpring, i=0;
1065 i < priv->txringcount;
1066 tmp+=8, i++) {
1067 *tmp = *tmp &~ (1<<31);
1068 }
1069
1070 for (tmp=priv->txbepring, i=0;
1071 i < priv->txringcount;
1072 tmp+=8, i++){
1073 *tmp = *tmp &~ (1<<31);
1074 }
1075 for (tmp=priv->txvipring, i=0;
1076 i < priv->txringcount;
1077 tmp+=8, i++) {
1078 *tmp = *tmp &~ (1<<31);
1079 }
1080
1081 for (tmp=priv->txvopring, i=0;
1082 i < priv->txringcount;
1083 tmp+=8, i++){
1084 *tmp = *tmp &~ (1<<31);
1085 }
1086
1087 for (tmp=priv->txhpring, i=0;
1088 i < priv->txringcount;
1089 tmp+=8,i++){
1090 *tmp = *tmp &~ (1<<31);
1091 }
1092
1093 for (tmp=priv->txbeaconring, i=0;
1094 i < priv->txbeaconcount;
1095 tmp+=8, i++){
1096 *tmp = *tmp &~ (1<<31);
1097 }
1098 #ifdef DEBUG_TX_ALLOC
1099 DMESG("TX FIFOs FIXED");
1100 #endif
1101 priv->txmapringtail = priv->txmapring;
1102 priv->txmapringhead = priv->txmapring;
1103 priv->txmapbufstail = priv->txmapbufs;
1104
1105 priv->txbkpringtail = priv->txbkpring;
1106 priv->txbkpringhead = priv->txbkpring;
1107 priv->txbkpbufstail = priv->txbkpbufs;
1108
1109 priv->txbepringtail = priv->txbepring;
1110 priv->txbepringhead = priv->txbepring;
1111 priv->txbepbufstail = priv->txbepbufs;
1112
1113 priv->txvipringtail = priv->txvipring;
1114 priv->txvipringhead = priv->txvipring;
1115 priv->txvipbufstail = priv->txvipbufs;
1116
1117 priv->txvopringtail = priv->txvopring;
1118 priv->txvopringhead = priv->txvopring;
1119 priv->txvopbufstail = priv->txvopbufs;
1120
1121 priv->txhpringtail = priv->txhpring;
1122 priv->txhpringhead = priv->txhpring;
1123 priv->txhpbufstail = priv->txhpbufs;
1124
1125 priv->txbeaconringtail = priv->txbeaconring;
1126 priv->txbeaconbufstail = priv->txbeaconbufs;
1127 set_nic_txring(dev);
1128
1129 ieee80211_reset_queue(priv->ieee80211);
1130 priv->ack_tx_to_ieee = 0;
1131 }
1132
1133
1134 void fix_rx_fifo(struct net_device *dev)
1135 {
1136 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1137 u32 *tmp;
1138 struct buffer *rxbuf;
1139 u8 rx_desc_size;
1140
1141 #ifdef CONFIG_RTL8185B
1142 rx_desc_size = 8; // 4*8 = 32 bytes
1143 #else
1144 rx_desc_size = 4;
1145 #endif
1146
1147 #ifdef DEBUG_RXALLOC
1148 DMESG("FIXING RX FIFO");
1149 check_rxbuf(dev);
1150 #endif
1151
1152 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1153 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1154 tmp+=rx_desc_size,rxbuf=rxbuf->next){
1155 *(tmp+2) = rxbuf->dma;
1156 *tmp=*tmp &~ 0xfff;
1157 *tmp=*tmp | priv->rxbuffersize;
1158 *tmp |= (1<<31);
1159 }
1160
1161 #ifdef DEBUG_RXALLOC
1162 DMESG("RX FIFO FIXED");
1163 check_rxbuf(dev);
1164 #endif
1165
1166 priv->rxringtail=priv->rxring;
1167 priv->rxbuffer=priv->rxbufferhead;
1168 priv->rx_skb_complete=1;
1169 set_nic_rxring(dev);
1170 }
1171
1172
1173 /****************************************************************************
1174 ------------------------------HW STUFF---------------------------
1175 *****************************************************************************/
1176
1177 unsigned char QUALITY_MAP[] = {
1178 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1179 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1180 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1181 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1182 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1183 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1184 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1185 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1186 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1187 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1188 };
1189
1190 unsigned char STRENGTH_MAP[] = {
1191 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1192 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1193 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1194 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1195 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1196 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1197 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1198 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1199 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1200 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1201 };
1202
1203 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1204 //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1205 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1206 u32 temp;
1207 u32 temp2;
1208 u32 temp3;
1209 u32 lsb;
1210 u32 q;
1211 u32 orig_qual;
1212 u8 _rssi;
1213
1214 q = *qual;
1215 orig_qual = *qual;
1216 _rssi = 0; // avoid gcc complains..
1217
1218 if (q <= 0x4e) {
1219 temp = QUALITY_MAP[q];
1220 } else {
1221 if( q & 0x80 ) {
1222 temp = 0x32;
1223 } else {
1224 temp = 1;
1225 }
1226 }
1227
1228 *qual = temp;
1229 temp2 = *rssi;
1230
1231 switch(priv->rf_chip){
1232 case RFCHIPID_RFMD:
1233 lsb = temp2 & 1;
1234 temp2 &= 0x7e;
1235 if ( !lsb || !(temp2 <= 0x3c) ) {
1236 temp2 = 0x64;
1237 } else {
1238 temp2 = 100 * temp2 / 0x3c;
1239 }
1240 *rssi = temp2 & 0xff;
1241 _rssi = temp2 & 0xff;
1242 break;
1243 case RFCHIPID_INTERSIL:
1244 lsb = temp2;
1245 temp2 &= 0xfffffffe;
1246 temp2 *= 251;
1247 temp3 = temp2;
1248 temp2 <<= 6;
1249 temp3 += temp2;
1250 temp3 <<= 1;
1251 temp2 = 0x4950df;
1252 temp2 -= temp3;
1253 lsb &= 1;
1254 if ( temp2 <= 0x3e0000 ) {
1255 if ( temp2 < 0xffef0000 )
1256 temp2 = 0xffef0000;
1257 } else {
1258 temp2 = 0x3e0000;
1259 }
1260 if ( !lsb ) {
1261 temp2 -= 0xf0000;
1262 } else {
1263 temp2 += 0xf0000;
1264 }
1265
1266 temp3 = 0x4d0000;
1267 temp3 -= temp2;
1268 temp3 *= 100;
1269 temp3 = temp3 / 0x6d;
1270 temp3 >>= 0x10;
1271 _rssi = temp3 & 0xff;
1272 *rssi = temp3 & 0xff;
1273 break;
1274 case RFCHIPID_GCT:
1275 lsb = temp2 & 1;
1276 temp2 &= 0x7e;
1277 if ( ! lsb || !(temp2 <= 0x3c) ){
1278 temp2 = 0x64;
1279 } else {
1280 temp2 = (100 * temp2) / 0x3c;
1281 }
1282 *rssi = temp2 & 0xff;
1283 _rssi = temp2 & 0xff;
1284 break;
1285 case RFCHIPID_PHILIPS:
1286 if( orig_qual <= 0x4e ){
1287 _rssi = STRENGTH_MAP[orig_qual];
1288 *rssi = _rssi;
1289 } else {
1290 orig_qual -= 0x80;
1291 if ( !orig_qual ){
1292 _rssi = 1;
1293 *rssi = 1;
1294 } else {
1295 _rssi = 0x32;
1296 *rssi = 0x32;
1297 }
1298 }
1299 break;
1300
1301 /* case 4 */
1302 case RFCHIPID_MAXIM:
1303 lsb = temp2 & 1;
1304 temp2 &= 0x7e;
1305 temp2 >>= 1;
1306 temp2 += 0x42;
1307 if( lsb != 0 ){
1308 temp2 += 0xa;
1309 }
1310 *rssi = temp2 & 0xff;
1311 _rssi = temp2 & 0xff;
1312 break;
1313 }
1314
1315 if ( _rssi < 0x64 ){
1316 if ( _rssi == 0 ) {
1317 *rssi = 1;
1318 }
1319 } else {
1320 *rssi = 0x64;
1321 }
1322
1323 return;
1324 }
1325
1326
1327 void rtl8180_irq_enable(struct net_device *dev)
1328 {
1329 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1330 priv->irq_enabled = 1;
1331 /*
1332 write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1333 INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1334 INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1335 INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1336 */
1337 write_nic_word(dev,INTA_MASK, priv->irq_mask);
1338 }
1339
1340
1341 void rtl8180_irq_disable(struct net_device *dev)
1342 {
1343 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1344
1345 #ifdef CONFIG_RTL8185B
1346 write_nic_dword(dev,IMR,0);
1347 #else
1348 write_nic_word(dev,INTA_MASK,0);
1349 #endif
1350 force_pci_posting(dev);
1351 priv->irq_enabled = 0;
1352 }
1353
1354
1355 void rtl8180_set_mode(struct net_device *dev,int mode)
1356 {
1357 u8 ecmd;
1358 ecmd=read_nic_byte(dev, EPROM_CMD);
1359 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1360 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1361 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1362 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1363 write_nic_byte(dev, EPROM_CMD, ecmd);
1364 }
1365
1366 void rtl8180_adapter_start(struct net_device *dev);
1367 void rtl8180_beacon_tx_enable(struct net_device *dev);
1368
1369 void rtl8180_update_msr(struct net_device *dev)
1370 {
1371 struct r8180_priv *priv = ieee80211_priv(dev);
1372 u8 msr;
1373 u32 rxconf;
1374
1375 msr = read_nic_byte(dev, MSR);
1376 msr &= ~ MSR_LINK_MASK;
1377
1378 rxconf=read_nic_dword(dev,RX_CONF);
1379
1380 if(priv->ieee80211->state == IEEE80211_LINKED)
1381 {
1382 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1383 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1384 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1385 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1386 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1387 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1388 else
1389 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1390 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1391
1392 }else {
1393 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1394 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1395 }
1396
1397 write_nic_byte(dev, MSR, msr);
1398 write_nic_dword(dev, RX_CONF, rxconf);
1399
1400 }
1401
1402
1403
1404 void rtl8180_set_chan(struct net_device *dev,short ch)
1405 {
1406 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1407
1408 if((ch > 14) || (ch < 1))
1409 {
1410 printk("In %s: Invalid chnanel %d\n", __func__, ch);
1411 return;
1412 }
1413
1414 priv->chan=ch;
1415 //printk("in %s:channel is %d\n",__func__,ch);
1416 priv->rf_set_chan(dev,priv->chan);
1417
1418 }
1419
1420
1421 void rtl8180_rx_enable(struct net_device *dev)
1422 {
1423 u8 cmd;
1424 u32 rxconf;
1425 /* for now we accept data, management & ctl frame*/
1426 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1427
1428 rxconf=read_nic_dword(dev,RX_CONF);
1429 rxconf = rxconf &~ MAC_FILTER_MASK;
1430 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1431 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1432 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1433 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1434 // rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1435 if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1436
1437 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1438 dev->flags & IFF_PROMISC){
1439 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1440 }else{
1441 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1442 if(priv->card_8185 == 0)
1443 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1444 }
1445
1446 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1447 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1448 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1449 }*/
1450
1451 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1452 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1453 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1454 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1455 }
1456
1457 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1458 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1459
1460 //if(!priv->card_8185){
1461 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1462 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1463 //}
1464
1465 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1466 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1467 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1468
1469 //if(!priv->card_8185)
1470 rxconf = rxconf | RCR_ONLYERLPKT;
1471
1472 rxconf = rxconf &~ RCR_CS_MASK;
1473 if(!priv->card_8185)
1474 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1475 // rxconf &=~ 0xfff00000;
1476 // rxconf |= 0x90100000;//9014f76f;
1477 write_nic_dword(dev, RX_CONF, rxconf);
1478
1479 fix_rx_fifo(dev);
1480
1481 #ifdef DEBUG_RX
1482 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1483 #endif
1484 cmd=read_nic_byte(dev,CMD);
1485 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1486
1487 /* In rtl8139 driver seems that DMA threshold has to be written
1488 * after enabling RX, so we rewrite RX_CONFIG register
1489 */
1490 //mdelay(100);
1491 // write_nic_dword(dev, RX_CONF, rxconf);
1492
1493 }
1494
1495
1496 void set_nic_txring(struct net_device *dev)
1497 {
1498 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1499 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1500
1501 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1502 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1503 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1504 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1505 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1506 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1507 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1508 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1509 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1510 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1511 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1512 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1513
1514 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1515 }
1516
1517
1518 void rtl8180_conttx_enable(struct net_device *dev)
1519 {
1520 u32 txconf;
1521 txconf = read_nic_dword(dev,TX_CONF);
1522 txconf = txconf &~ TX_LOOPBACK_MASK;
1523 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1524 write_nic_dword(dev,TX_CONF,txconf);
1525 }
1526
1527
1528 void rtl8180_conttx_disable(struct net_device *dev)
1529 {
1530 u32 txconf;
1531 txconf = read_nic_dword(dev,TX_CONF);
1532 txconf = txconf &~ TX_LOOPBACK_MASK;
1533 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1534 write_nic_dword(dev,TX_CONF,txconf);
1535 }
1536
1537
1538 void rtl8180_tx_enable(struct net_device *dev)
1539 {
1540 u8 cmd;
1541 u8 tx_agc_ctl;
1542 u8 byte;
1543 u32 txconf;
1544 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1545 txconf= read_nic_dword(dev,TX_CONF);
1546
1547
1548 if(priv->card_8185){
1549
1550
1551 byte = read_nic_byte(dev,CW_CONF);
1552 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1553 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1554 write_nic_byte(dev, CW_CONF, byte);
1555
1556 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1557 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1558 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1559 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1560 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1561 /*
1562 write_nic_word(dev, 0x5e, 0x01);
1563 force_pci_posting(dev);
1564 mdelay(1);
1565 write_nic_word(dev, 0xfe, 0x10);
1566 force_pci_posting(dev);
1567 mdelay(1);
1568 write_nic_word(dev, 0x5e, 0x00);
1569 force_pci_posting(dev);
1570 mdelay(1);
1571 */
1572 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1573 }
1574
1575 if(priv->card_8185){
1576
1577 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1578
1579 }else{
1580
1581 if(hwseqnum)
1582 txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1583 else
1584 txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1585 }
1586
1587 txconf = txconf &~ TX_LOOPBACK_MASK;
1588 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1589 txconf = txconf &~ TCR_DPRETRY_MASK;
1590 txconf = txconf &~ TCR_RTSRETRY_MASK;
1591 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1592 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1593 txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1594
1595 if(priv->card_8185){
1596 if(priv->hw_plcp_len)
1597 txconf = txconf &~ TCR_PLCP_LEN;
1598 else
1599 txconf = txconf | TCR_PLCP_LEN;
1600 }else{
1601 txconf = txconf &~ TCR_SAT;
1602 }
1603 txconf = txconf &~ TCR_MXDMA_MASK;
1604 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1605 txconf = txconf | TCR_CWMIN;
1606 txconf = txconf | TCR_DISCW;
1607
1608 // if(priv->ieee80211->hw_wep)
1609 // txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1610 // else
1611 txconf=txconf | (1<<TX_NOICV_SHIFT);
1612
1613 write_nic_dword(dev,TX_CONF,txconf);
1614
1615
1616 fix_tx_fifo(dev);
1617
1618 #ifdef DEBUG_TX
1619 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1620 #endif
1621
1622 cmd=read_nic_byte(dev,CMD);
1623 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1624
1625 // mdelay(100);
1626 write_nic_dword(dev,TX_CONF,txconf);
1627 // #endif
1628 /*
1629 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1630 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1631 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1632 */
1633 }
1634
1635
1636 void rtl8180_beacon_tx_enable(struct net_device *dev)
1637 {
1638 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1639
1640 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1641 #ifdef CONFIG_RTL8185B
1642 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1643 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1644 #else
1645 priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1646 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1647 #endif
1648 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1649 }
1650
1651
1652 void rtl8180_beacon_tx_disable(struct net_device *dev)
1653 {
1654 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1655
1656 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1657 #ifdef CONFIG_RTL8185B
1658 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1659 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1660 #else
1661 priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1662 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1663 #endif
1664 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1665
1666 }
1667
1668
1669 void rtl8180_rtx_disable(struct net_device *dev)
1670 {
1671 u8 cmd;
1672 struct r8180_priv *priv = ieee80211_priv(dev);
1673
1674 cmd=read_nic_byte(dev,CMD);
1675 write_nic_byte(dev, CMD, cmd &~ \
1676 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1677 force_pci_posting(dev);
1678 mdelay(10);
1679 /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1680 udelay(10);
1681 */
1682
1683 if(!priv->rx_skb_complete)
1684 dev_kfree_skb_any(priv->rx_skb);
1685 }
1686
1687 #if 0
1688 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1689 {
1690 int i;
1691 u32 *tmp;
1692 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1693
1694 priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1695 sizeof(u32)*8*count,
1696 &priv->txbeaconringdma);
1697 if (!priv->txbeaconring) return -1;
1698 for (tmp=priv->txbeaconring,i=0;i<count;i++){
1699 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1700 /*
1701 *(tmp+2) = (u32)dma_tmp;
1702 *(tmp+3) = bufsize;
1703 */
1704 if(i+1<count)
1705 *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1706 else
1707 *(tmp+4) = (u32)priv->txbeaconringdma;
1708
1709 tmp=tmp+8;
1710 }
1711 return 0;
1712 }
1713 #endif
1714
1715 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1716 int addr)
1717 {
1718 int i;
1719 u32 *desc;
1720 u32 *tmp;
1721 dma_addr_t dma_desc, dma_tmp;
1722 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1723 struct pci_dev *pdev = priv->pdev;
1724 void *buf;
1725
1726 if((bufsize & 0xfff) != bufsize) {
1727 DMESGE ("TX buffer allocation too large");
1728 return 0;
1729 }
1730 desc = (u32*)pci_alloc_consistent(pdev,
1731 sizeof(u32)*8*count+256, &dma_desc);
1732 if(desc==NULL) return -1;
1733 if(dma_desc & 0xff){
1734
1735 /*
1736 * descriptor's buffer must be 256 byte aligned
1737 * we shouldn't be here, since we set DMA mask !
1738 */
1739 DMESGW("Fixing TX alignment");
1740 desc = (u32*)((u8*)desc + 256);
1741 #if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR))
1742 desc = (u32*)((u64)desc &~ 0xff);
1743 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1744 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff);
1745 #else
1746 desc = (u32*)((u32)desc &~ 0xff);
1747 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1748 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff);
1749 #endif
1750 }
1751 tmp=desc;
1752 for (i=0;i<count;i++)
1753 {
1754 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1755 if (buf == NULL) return -ENOMEM;
1756
1757 switch(addr) {
1758 #if 0
1759 case TX_NORMPRIORITY_RING_ADDR:
1760 if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1761 DMESGE("Unable to allocate mem for buffer NP");
1762 return -ENOMEM;
1763 }
1764 break;
1765
1766 case TX_LOWPRIORITY_RING_ADDR:
1767 if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1768 DMESGE("Unable to allocate mem for buffer LP");
1769 return -ENOMEM;
1770 }
1771 break;
1772
1773 case TX_HIGHPRIORITY_RING_ADDR:
1774 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1775 DMESGE("Unable to allocate mem for buffer HP");
1776 return -ENOMEM;
1777 }
1778 break;
1779 #else
1780 case TX_MANAGEPRIORITY_RING_ADDR:
1781 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1782 DMESGE("Unable to allocate mem for buffer NP");
1783 return -ENOMEM;
1784 }
1785 break;
1786
1787 case TX_BKPRIORITY_RING_ADDR:
1788 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1789 DMESGE("Unable to allocate mem for buffer LP");
1790 return -ENOMEM;
1791 }
1792 break;
1793 case TX_BEPRIORITY_RING_ADDR:
1794 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1795 DMESGE("Unable to allocate mem for buffer NP");
1796 return -ENOMEM;
1797 }
1798 break;
1799
1800 case TX_VIPRIORITY_RING_ADDR:
1801 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1802 DMESGE("Unable to allocate mem for buffer LP");
1803 return -ENOMEM;
1804 }
1805 break;
1806 case TX_VOPRIORITY_RING_ADDR:
1807 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1808 DMESGE("Unable to allocate mem for buffer NP");
1809 return -ENOMEM;
1810 }
1811 break;
1812 #endif
1813 case TX_HIGHPRIORITY_RING_ADDR:
1814 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1815 DMESGE("Unable to allocate mem for buffer HP");
1816 return -ENOMEM;
1817 }
1818 break;
1819 case TX_BEACON_RING_ADDR:
1820 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1821 DMESGE("Unable to allocate mem for buffer BP");
1822 return -ENOMEM;
1823 }
1824 break;
1825 }
1826 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1827 *(tmp+2) = (u32)dma_tmp;
1828 *(tmp+3) = bufsize;
1829
1830 if(i+1<count)
1831 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1832 else
1833 *(tmp+4) = (u32)dma_desc;
1834
1835 tmp=tmp+8;
1836 }
1837
1838 switch(addr) {
1839 case TX_MANAGEPRIORITY_RING_ADDR:
1840 priv->txmapringdma=dma_desc;
1841 priv->txmapring=desc;
1842 break;
1843
1844 case TX_BKPRIORITY_RING_ADDR:
1845 priv->txbkpringdma=dma_desc;
1846 priv->txbkpring=desc;
1847 break;
1848
1849 case TX_BEPRIORITY_RING_ADDR:
1850 priv->txbepringdma=dma_desc;
1851 priv->txbepring=desc;
1852 break;
1853
1854 case TX_VIPRIORITY_RING_ADDR:
1855 priv->txvipringdma=dma_desc;
1856 priv->txvipring=desc;
1857 break;
1858
1859 case TX_VOPRIORITY_RING_ADDR:
1860 priv->txvopringdma=dma_desc;
1861 priv->txvopring=desc;
1862 break;
1863
1864 case TX_HIGHPRIORITY_RING_ADDR:
1865 priv->txhpringdma=dma_desc;
1866 priv->txhpring=desc;
1867 break;
1868
1869 case TX_BEACON_RING_ADDR:
1870 priv->txbeaconringdma=dma_desc;
1871 priv->txbeaconring=desc;
1872 break;
1873
1874 }
1875
1876 #ifdef DEBUG_TX
1877 DMESG("Tx dma physical address: %x",dma_desc);
1878 #endif
1879
1880 return 0;
1881 }
1882
1883
1884 void free_tx_desc_rings(struct net_device *dev)
1885 {
1886
1887 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1888 struct pci_dev *pdev=priv->pdev;
1889 int count = priv->txringcount;
1890
1891 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1892 priv->txmapring, priv->txmapringdma);
1893 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1894
1895 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1896 priv->txbkpring, priv->txbkpringdma);
1897 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1898
1899 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1900 priv->txbepring, priv->txbepringdma);
1901 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1902
1903 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1904 priv->txvipring, priv->txvipringdma);
1905 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1906
1907 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1908 priv->txvopring, priv->txvopringdma);
1909 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1910
1911 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1912 priv->txhpring, priv->txhpringdma);
1913 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1914
1915 count = priv->txbeaconcount;
1916 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1917 priv->txbeaconring, priv->txbeaconringdma);
1918 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1919 }
1920
1921 #if 0
1922 void free_beacon_desc_ring(struct net_device *dev,int count)
1923 {
1924
1925 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1926 struct pci_dev *pdev=priv->pdev;
1927
1928 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1929 priv->txbeaconring, priv->txbeaconringdma);
1930
1931 if (priv->beacon_buf)
1932 pci_free_consistent(priv->pdev,
1933 priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1934
1935 }
1936 #endif
1937 void free_rx_desc_ring(struct net_device *dev)
1938 {
1939 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1940 struct pci_dev *pdev = priv->pdev;
1941
1942 int count = priv->rxringcount;
1943
1944 #ifdef CONFIG_RTL8185B
1945 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1946 priv->rxring, priv->rxringdma);
1947 #else
1948 pci_free_consistent(pdev, sizeof(u32)*4*count+256,
1949 priv->rxring, priv->rxringdma);
1950 #endif
1951
1952 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1953 }
1954
1955
1956 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1957 {
1958 int i;
1959 u32 *desc;
1960 u32 *tmp;
1961 dma_addr_t dma_desc,dma_tmp;
1962 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1963 struct pci_dev *pdev=priv->pdev;
1964 void *buf;
1965 u8 rx_desc_size;
1966
1967 #ifdef CONFIG_RTL8185B
1968 rx_desc_size = 8; // 4*8 = 32 bytes
1969 #else
1970 rx_desc_size = 4;
1971 #endif
1972
1973 if((bufsize & 0xfff) != bufsize){
1974 DMESGE ("RX buffer allocation too large");
1975 return -1;
1976 }
1977
1978 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1979 &dma_desc);
1980
1981 if(dma_desc & 0xff){
1982
1983 /*
1984 * descriptor's buffer must be 256 byte aligned
1985 * should never happen since we specify the DMA mask
1986 */
1987
1988 DMESGW("Fixing RX alignment");
1989 desc = (u32*)((u8*)desc + 256);
1990 #if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR))
1991 desc = (u32*)((u64)desc &~ 0xff);
1992 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1993 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff);
1994 #else
1995 desc = (u32*)((u32)desc &~ 0xff);
1996 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1997 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff);
1998 #endif
1999 }
2000
2001 priv->rxring=desc;
2002 priv->rxringdma=dma_desc;
2003 tmp=desc;
2004
2005 for (i=0;i<count;i++){
2006
2007 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
2008 DMESGE("Failed to kmalloc RX buffer");
2009 return -1;
2010 }
2011
2012 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
2013 PCI_DMA_FROMDEVICE);
2014
2015 #ifdef DEBUG_ZERO_RX
2016 int j;
2017 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
2018 #endif
2019
2020 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
2021 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
2022 &(priv->rxbufferhead))){
2023 DMESGE("Unable to allocate mem RX buf");
2024 return -1;
2025 }
2026 *tmp = 0; //zero pads the header of the descriptor
2027 *tmp = *tmp |( bufsize&0xfff);
2028 *(tmp+2) = (u32)dma_tmp;
2029 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
2030
2031 #ifdef DEBUG_RXALLOC
2032 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
2033 (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
2034 #endif
2035
2036 tmp=tmp+rx_desc_size;
2037 }
2038
2039 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
2040
2041
2042 #ifdef DEBUG_RXALLOC
2043 DMESG("RX DMA physical address: %x",dma_desc);
2044 #endif
2045
2046 return 0;
2047 }
2048
2049
2050 void set_nic_rxring(struct net_device *dev)
2051 {
2052 u8 pgreg;
2053 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2054
2055 //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2056
2057 pgreg=read_nic_byte(dev, PGSELECT);
2058 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
2059
2060 //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2061
2062 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
2063 }
2064
2065
2066 void rtl8180_reset(struct net_device *dev)
2067 {
2068 //u32 txconf = 0x80e00707; //FIXME: Make me understandable
2069 u8 cr;
2070
2071 //write_nic_dword(dev,TX_CONF,txconf);
2072
2073 rtl8180_irq_disable(dev);
2074
2075 cr=read_nic_byte(dev,CMD);
2076 cr = cr & 2;
2077 cr = cr | (1<<CMD_RST_SHIFT);
2078 write_nic_byte(dev,CMD,cr);
2079
2080 force_pci_posting(dev);
2081
2082 mdelay(200);
2083
2084 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
2085 DMESGW("Card reset timeout!");
2086 else
2087 DMESG("Card successfully reset");
2088
2089 //#ifndef CONFIG_RTL8185B
2090 rtl8180_set_mode(dev,EPROM_CMD_LOAD);
2091 force_pci_posting(dev);
2092 mdelay(200);
2093 //#endif
2094 }
2095
2096 inline u16 ieeerate2rtlrate(int rate)
2097 {
2098 switch(rate){
2099 case 10:
2100 return 0;
2101 case 20:
2102 return 1;
2103 case 55:
2104 return 2;
2105 case 110:
2106 return 3;
2107 case 60:
2108 return 4;
2109 case 90:
2110 return 5;
2111 case 120:
2112 return 6;
2113 case 180:
2114 return 7;
2115 case 240:
2116 return 8;
2117 case 360:
2118 return 9;
2119 case 480:
2120 return 10;
2121 case 540:
2122 return 11;
2123 default:
2124 return 3;
2125
2126 }
2127 }
2128
2129 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
2130 inline u16 rtl8180_rate2rate(short rate)
2131 {
2132 if (rate >12) return 10;
2133 return rtl_rate[rate];
2134 }
2135 inline u8 rtl8180_IsWirelessBMode(u16 rate)
2136 {
2137 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2138 return 1;
2139 else return 0;
2140 }
2141 u16 N_DBPSOfRate(u16 DataRate);
2142 u16 ComputeTxTime(
2143 u16 FrameLength,
2144 u16 DataRate,
2145 u8 bManagementFrame,
2146 u8 bShortPreamble
2147 )
2148 {
2149 u16 FrameTime;
2150 u16 N_DBPS;
2151 u16 Ceiling;
2152
2153 if( rtl8180_IsWirelessBMode(DataRate) )
2154 {
2155 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2156 { // long preamble
2157 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2158 }
2159 else
2160 { // Short preamble
2161 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2162 }
2163 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2164 FrameTime ++;
2165 } else { //802.11g DSSS-OFDM PLCP length field calculation.
2166 N_DBPS = N_DBPSOfRate(DataRate);
2167 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2168 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2169 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2170 }
2171 return FrameTime;
2172 }
2173 u16 N_DBPSOfRate(u16 DataRate)
2174 {
2175 u16 N_DBPS = 24;
2176
2177 switch(DataRate)
2178 {
2179 case 60:
2180 N_DBPS = 24;
2181 break;
2182
2183 case 90:
2184 N_DBPS = 36;
2185 break;
2186
2187 case 120:
2188 N_DBPS = 48;
2189 break;
2190
2191 case 180:
2192 N_DBPS = 72;
2193 break;
2194
2195 case 240:
2196 N_DBPS = 96;
2197 break;
2198
2199 case 360:
2200 N_DBPS = 144;
2201 break;
2202
2203 case 480:
2204 N_DBPS = 192;
2205 break;
2206
2207 case 540:
2208 N_DBPS = 216;
2209 break;
2210
2211 default:
2212 break;
2213 }
2214
2215 return N_DBPS;
2216 }
2217
2218 //{by amy 080312
2219 //
2220 // Description:
2221 // For Netgear case, they want good-looking singal strength.
2222 // 2004.12.05, by rcnjko.
2223 //
2224 long
2225 NetgearSignalStrengthTranslate(
2226 long LastSS,
2227 long CurrSS
2228 )
2229 {
2230 long RetSS;
2231
2232 // Step 1. Scale mapping.
2233 if(CurrSS >= 71 && CurrSS <= 100)
2234 {
2235 RetSS = 90 + ((CurrSS - 70) / 3);
2236 }
2237 else if(CurrSS >= 41 && CurrSS <= 70)
2238 {
2239 RetSS = 78 + ((CurrSS - 40) / 3);
2240 }
2241 else if(CurrSS >= 31 && CurrSS <= 40)
2242 {
2243 RetSS = 66 + (CurrSS - 30);
2244 }
2245 else if(CurrSS >= 21 && CurrSS <= 30)
2246 {
2247 RetSS = 54 + (CurrSS - 20);
2248 }
2249 else if(CurrSS >= 5 && CurrSS <= 20)
2250 {
2251 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2252 }
2253 else if(CurrSS == 4)
2254 {
2255 RetSS = 36;
2256 }
2257 else if(CurrSS == 3)
2258 {
2259 RetSS = 27;
2260 }
2261 else if(CurrSS == 2)
2262 {
2263 RetSS = 18;
2264 }
2265 else if(CurrSS == 1)
2266 {
2267 RetSS = 9;
2268 }
2269 else
2270 {
2271 RetSS = CurrSS;
2272 }
2273 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2274
2275 // Step 2. Smoothing.
2276 if(LastSS > 0)
2277 {
2278 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2279 }
2280 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2281
2282 return RetSS;
2283 }
2284 //
2285 // Description:
2286 // Translate 0-100 signal strength index into dBm.
2287 //
2288 long
2289 TranslateToDbm8185(
2290 u8 SignalStrengthIndex // 0-100 index.
2291 )
2292 {
2293 long SignalPower; // in dBm.
2294
2295 // Translate to dBm (x=0.5y-95).
2296 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2297 SignalPower -= 95;
2298
2299 return SignalPower;
2300 }
2301 //
2302 // Description:
2303 // Perform signal smoothing for dynamic mechanism.
2304 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2305 // No dramatic adjustion is apply because dynamic mechanism need some degree
2306 // of correctness. Ported from 8187B.
2307 // 2007-02-26, by Bruce.
2308 //
2309 void
2310 PerformUndecoratedSignalSmoothing8185(
2311 struct r8180_priv *priv,
2312 bool bCckRate
2313 )
2314 {
2315
2316
2317 // Determin the current packet is CCK rate.
2318 priv->bCurCCKPkt = bCckRate;
2319
2320 if(priv->UndecoratedSmoothedSS >= 0)
2321 {
2322 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2323 }
2324 else
2325 {
2326 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2327 }
2328
2329 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2330
2331 // printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2332 // printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2333
2334 //if(priv->CurCCKRSSI >= 0 && bCckRate)
2335 if(bCckRate)
2336 {
2337 priv->CurCCKRSSI = priv->RSSI;
2338 }
2339 else
2340 {
2341 priv->CurCCKRSSI = 0;
2342 }
2343
2344 // Boundary checking.
2345 // TODO: The overflow condition does happen, if we want to fix,
2346 // we shall recalculate thresholds first.
2347 if(priv->UndecoratedSmoothedSS > 100)
2348 {
2349 // printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2350 }
2351 if(priv->UndecoratedSmoothedSS < 0)
2352 {
2353 // printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2354 }
2355
2356 }
2357
2358 //by amy 080312}
2359
2360 /* This is rough RX isr handling routine*/
2361 void rtl8180_rx(struct net_device *dev)
2362 {
2363 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2364 struct sk_buff *tmp_skb;
2365
2366 //struct sk_buff *skb;
2367 short first,last;
2368 u32 len;
2369 int lastlen;
2370 unsigned char quality, signal;
2371 u8 rate;
2372 //u32 *prism_hdr;
2373 u32 *tmp,*tmp2;
2374 u8 rx_desc_size;
2375 u8 padding;
2376 //u32 count=0;
2377 char rxpower = 0;
2378 u32 RXAGC = 0;
2379 long RxAGC_dBm = 0;
2380 u8 LNA=0, BB=0;
2381 u8 LNA_gain[4]={02, 17, 29, 39};
2382 u8 Antenna = 0;
2383 struct ieee80211_hdr *hdr;//by amy
2384 u16 fc,type;
2385 u8 bHwError = 0,bCRC = 0,bICV = 0;
2386 //bHwError = 0;
2387 //bCRC = 0;
2388 //bICV = 0;
2389 bool bCckRate = false;
2390 u8 RSSI = 0;
2391 long SignalStrengthIndex = 0;//+by amy 080312
2392 // u8 SignalStrength = 0;
2393 struct ieee80211_rx_stats stats = {
2394 .signal = 0,
2395 .noise = -98,
2396 .rate = 0,
2397 // .mac_time = jiffies,
2398 .freq = IEEE80211_24GHZ_BAND,
2399 };
2400
2401 #ifdef CONFIG_RTL8185B
2402 stats.nic_type = NIC_8185B;
2403 rx_desc_size = 8;
2404
2405 #else
2406 stats.nic_type = NIC_8185;
2407 rx_desc_size = 4;
2408 #endif
2409 //printk("receive frame!%d\n",count++);
2410 //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2411 //else {
2412
2413 if ((*(priv->rxringtail)) & (1<<31)) {
2414
2415 /* we have got an RX int, but the descriptor
2416 * we are pointing is empty*/
2417
2418 priv->stats.rxnodata++;
2419 priv->ieee80211->stats.rx_errors++;
2420
2421 /* if (! *(priv->rxring) & (1<<31)) {
2422
2423 priv->stats.rxreset++;
2424 priv->rxringtail=priv->rxring;
2425 priv->rxbuffer=priv->rxbufferhead;
2426
2427 }else{*/
2428
2429 #if 0
2430 /* Maybe it is possible that the NIC has skipped some descriptors or
2431 * it has reset its internal pointer to the beginning of the ring
2432 * we search for the first filled descriptor in the ring, or we break
2433 * putting again the pointer in the old location if we do not found any.
2434 * This is quite dangerous, what does happen if the nic writes
2435 * two descriptor (say A and B) when we have just checked the descriptor
2436 * A and we are going to check the descriptor B..This might happen if the
2437 * interrupt was dummy, there was not really filled descriptors and
2438 * the NIC didn't lose pointer
2439 */
2440
2441 //priv->stats.rxwrkaround++;
2442
2443 tmp = priv->rxringtail;
2444 while (*(priv->rxringtail) & (1<<31)){
2445
2446 priv->rxringtail+=4;
2447
2448 if(priv->rxringtail >=
2449 (priv->rxring)+(priv->rxringcount )*4)
2450 priv->rxringtail=priv->rxring;
2451
2452 priv->rxbuffer=(priv->rxbuffer->next);
2453
2454 if(priv->rxringtail == tmp ){
2455 //DMESG("EE: Could not find RX pointer");
2456 priv->stats.rxnopointer++;
2457 break;
2458 }
2459 }
2460 #else
2461
2462 tmp2 = NULL;
2463 tmp = priv->rxringtail;
2464 do{
2465 if(tmp == priv->rxring)
2466 //tmp = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2467 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2468 else
2469 tmp -= rx_desc_size;
2470
2471 if(! (*tmp & (1<<31)))
2472 tmp2 = tmp;
2473 }while(tmp != priv->rxring);
2474
2475 if(tmp2) priv->rxringtail = tmp2;
2476 #endif
2477 //}
2478 }
2479
2480 /* while there are filled descriptors */
2481 while(!(*(priv->rxringtail) & (1<<31))){
2482 if(*(priv->rxringtail) & (1<<26))
2483 DMESGW("RX buffer overflow");
2484 if(*(priv->rxringtail) & (1<<12))
2485 priv->stats.rxicverr++;
2486
2487 if(*(priv->rxringtail) & (1<<27)){
2488 priv->stats.rxdmafail++;
2489 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2490 goto drop;
2491 }
2492
2493 pci_dma_sync_single_for_cpu(priv->pdev,
2494 priv->rxbuffer->dma,
2495 priv->rxbuffersize * \
2496 sizeof(u8),
2497 PCI_DMA_FROMDEVICE);
2498
2499 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2500 if(first) priv->rx_prevlen=0;
2501
2502 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2503 if(last){
2504 lastlen=((*priv->rxringtail) &0xfff);
2505
2506 /* if the last descriptor (that should
2507 * tell us the total packet len) tell
2508 * us something less than the descriptors
2509 * len we had until now, then there is some
2510 * problem..
2511 * workaround to prevent kernel panic
2512 */
2513 if(lastlen < priv->rx_prevlen)
2514 len=0;
2515 else
2516 len=lastlen-priv->rx_prevlen;
2517
2518 if(*(priv->rxringtail) & (1<<13)) {
2519 //lastlen=((*priv->rxringtail) &0xfff);
2520 if ((*(priv->rxringtail) & 0xfff) <500)
2521 priv->stats.rxcrcerrmin++;
2522 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2523 priv->stats.rxcrcerrmax++;
2524 else
2525 priv->stats.rxcrcerrmid++;
2526
2527 }
2528
2529 }else{
2530 len = priv->rxbuffersize;
2531 }
2532
2533 #ifdef CONFIG_RTL8185B
2534 if(first && last) {
2535 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2536 }else if(first) {
2537 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2538 if(padding) {
2539 len -= 2;
2540 }
2541 }else {
2542 padding = 0;
2543 }
2544 #ifdef CONFIG_RTL818X_S
2545 padding = 0;
2546 #endif
2547 #endif
2548 priv->rx_prevlen+=len;
2549
2550 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2551 /* HW is probably passing several buggy frames
2552 * without FD or LD flag set.
2553 * Throw this garbage away to prevent skb
2554 * memory exausting
2555 */
2556 if(!priv->rx_skb_complete)
2557 dev_kfree_skb_any(priv->rx_skb);
2558 priv->rx_skb_complete = 1;
2559 }
2560
2561 #ifdef DEBUG_RX_FRAG
2562 DMESG("Iteration.. len %x",len);
2563 if(first) DMESG ("First descriptor");
2564 if(last) DMESG("Last descriptor");
2565
2566 #endif
2567 #ifdef DEBUG_RX_VERBOSE
2568 print_buffer( priv->rxbuffer->buf, len);
2569 #endif
2570
2571 #ifdef CONFIG_RTL8185B
2572 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2573 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2574
2575 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2576
2577 stats.mac_time[0] = *(priv->rxringtail+1);
2578 stats.mac_time[1] = *(priv->rxringtail+2);
2579 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2580 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2581
2582 #else
2583 signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
2584 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2585
2586 quality=((*(priv->rxringtail+1)) & (0xff));
2587
2588 stats.mac_time[0] = *(priv->rxringtail+2);
2589 stats.mac_time[1] = *(priv->rxringtail+3);
2590 #endif
2591 rate=((*(priv->rxringtail)) &
2592 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2593
2594 stats.rate = rtl8180_rate2rate(rate);
2595 //DMESG("%d",rate);
2596 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2597 // printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2598 //by amy for antenna
2599 if(!rtl8180_IsWirelessBMode(stats.rate))
2600 { // OFDM rate.
2601
2602 RxAGC_dBm = rxpower+1; //bias
2603 }
2604 else
2605 { // CCK rate.
2606 RxAGC_dBm = signal;//bit 0 discard
2607
2608 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2609 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0
2610
2611 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2612
2613 RxAGC_dBm +=4; //bias
2614 }
2615
2616 if(RxAGC_dBm & 0x80) //absolute value
2617 RXAGC= ~(RxAGC_dBm)+1;
2618 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2619 // Translate RXAGC into 1-100.
2620 if(!rtl8180_IsWirelessBMode(stats.rate))
2621 { // OFDM rate.
2622 if(RXAGC>90)
2623 RXAGC=90;
2624 else if(RXAGC<25)
2625 RXAGC=25;
2626 RXAGC=(90-RXAGC)*100/65;
2627 }
2628 else
2629 { // CCK rate.
2630 if(RXAGC>95)
2631 RXAGC=95;
2632 else if(RXAGC<30)
2633 RXAGC=30;
2634 RXAGC=(95-RXAGC)*100/65;
2635 }
2636 priv->SignalStrength = (u8)RXAGC;
2637 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin
2638 priv->RxPower = rxpower;
2639 priv->RSSI = RSSI;
2640 //{by amy 080312
2641 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2642 if(quality >= 127)
2643 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2644 else if(quality < 27)
2645 quality = 100;
2646 else
2647 quality = 127 - quality;
2648 priv->SignalQuality = quality;
2649 if(!priv->card_8185)
2650 printk("check your card type\n");
2651
2652 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2653 stats.signalstrength = RXAGC;
2654 if(stats.signalstrength > 100)
2655 stats.signalstrength = 100;
2656 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2657 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2658 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2659 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2660 //by amy 080312}
2661 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2662 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2663 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2664 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2665 hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2666 fc = le16_to_cpu(hdr->frame_ctl);
2667 type = WLAN_FC_GET_TYPE(fc);
2668
2669 if((IEEE80211_FTYPE_CTL != type) &&
2670 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2671 && (!bHwError) && (!bCRC)&& (!bICV))
2672 {
2673 //by amy 080312
2674 // Perform signal smoothing for dynamic mechanism on demand.
2675 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2676 // No dramatic adjustion is apply because dynamic mechanism need some degree
2677 // of correctness. 2007.01.23, by shien chang.
2678 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2679 //
2680 // For good-looking singal strength.
2681 //
2682 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2683 priv->LastSignalStrengthInPercent,
2684 priv->SignalStrength);
2685
2686 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2687 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2688 //
2689 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
2690 // so we record the correct power here.
2691 //
2692 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2693 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2694
2695 // Figure out which antenna that received the lasted packet.
2696 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2697 //by amy 080312
2698 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2699 }
2700
2701 //by amy for antenna
2702
2703
2704
2705
2706
2707
2708 #ifndef DUMMY_RX
2709 if(first){
2710 if(!priv->rx_skb_complete){
2711 /* seems that HW sometimes fails to reiceve and
2712 doesn't provide the last descriptor */
2713 #ifdef DEBUG_RX_SKB
2714 DMESG("going to free incomplete skb");
2715 #endif
2716 dev_kfree_skb_any(priv->rx_skb);
2717 priv->stats.rxnolast++;
2718 #ifdef DEBUG_RX_SKB
2719 DMESG("free incomplete skb OK");
2720 #endif
2721 }
2722 /* support for prism header has been originally added by Christian */
2723 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2724
2725 #if 0
2726 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2727 if(! priv->rx_skb) goto drop;
2728
2729 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2730 prism_hdr[0]=htonl(0x80211001); //version
2731 prism_hdr[1]=htonl(0x40); //length
2732 prism_hdr[2]=htonl(stats.mac_time[1]); //mactime (HIGH)
2733 prism_hdr[3]=htonl(stats.mac_time[0]); //mactime (LOW)
2734 rdtsc(prism_hdr[5], prism_hdr[4]); //hostime (LOW+HIGH)
2735 prism_hdr[4]=htonl(prism_hdr[4]); //Byte-Order aendern
2736 prism_hdr[5]=htonl(prism_hdr[5]); //Byte-Order aendern
2737 prism_hdr[6]=0x00; //phytype
2738 prism_hdr[7]=htonl(priv->chan); //channel
2739 prism_hdr[8]=htonl(stats.rate); //datarate
2740 prism_hdr[9]=0x00; //antenna
2741 prism_hdr[10]=0x00; //priority
2742 prism_hdr[11]=0x00; //ssi_type
2743 prism_hdr[12]=htonl(stats.signal); //ssi_signal
2744 prism_hdr[13]=htonl(stats.noise); //ssi_noise
2745 prism_hdr[14]=0x00; //preamble
2746 prism_hdr[15]=0x00; //encoding
2747
2748 #endif
2749 }else{
2750 priv->rx_skb = dev_alloc_skb(len+2);
2751 if( !priv->rx_skb) goto drop;
2752 #ifdef DEBUG_RX_SKB
2753 DMESG("Alloc initial skb %x",len+2);
2754 #endif
2755 }
2756
2757 priv->rx_skb_complete=0;
2758 priv->rx_skb->dev=dev;
2759 }else{
2760 /* if we are here we should have already RXed
2761 * the first frame.
2762 * If we get here and the skb is not allocated then
2763 * we have just throw out garbage (skb not allocated)
2764 * and we are still rxing garbage....
2765 */
2766 if(!priv->rx_skb_complete){
2767
2768 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2769
2770 if(!tmp_skb) goto drop;
2771
2772 tmp_skb->dev=dev;
2773 #ifdef DEBUG_RX_SKB
2774 DMESG("Realloc skb %x",len+2);
2775 #endif
2776
2777 #ifdef DEBUG_RX_SKB
2778 DMESG("going copy prev frag %x",priv->rx_skb->len);
2779 #endif
2780 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2781 priv->rx_skb->data,
2782 priv->rx_skb->len);
2783 #ifdef DEBUG_RX_SKB
2784 DMESG("skb copy prev frag complete");
2785 #endif
2786
2787 dev_kfree_skb_any(priv->rx_skb);
2788 #ifdef DEBUG_RX_SKB
2789 DMESG("prev skb free ok");
2790 #endif
2791
2792 priv->rx_skb=tmp_skb;
2793 }
2794 }
2795 #ifdef DEBUG_RX_SKB
2796 DMESG("going to copy current payload %x",len);
2797 #endif
2798 if(!priv->rx_skb_complete) {
2799 #ifdef CONFIG_RTL8185B
2800 if(padding) {
2801 memcpy(skb_put(priv->rx_skb,len),
2802 (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2803 } else {
2804 #endif
2805 memcpy(skb_put(priv->rx_skb,len),
2806 priv->rxbuffer->buf,len);
2807 #ifdef CONFIG_RTL8185B
2808 }
2809 #endif
2810 }
2811 #ifdef DEBUG_RX_SKB
2812 DMESG("current fragment skb copy complete");
2813 #endif
2814
2815 if(last && !priv->rx_skb_complete){
2816
2817 #ifdef DEBUG_RX_SKB
2818 DMESG("Got last fragment");
2819 #endif
2820
2821 if(priv->rx_skb->len > 4)
2822 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2823 #ifdef DEBUG_RX_SKB
2824 DMESG("yanked out crc, passing to the upper layer");
2825 #endif
2826
2827 #ifndef RX_DONT_PASS_UL
2828 if(!ieee80211_rx(priv->ieee80211,
2829 priv->rx_skb, &stats)){
2830 #ifdef DEBUG_RX
2831 DMESGW("Packet not consumed");
2832 #endif
2833 #endif // RX_DONT_PASS_UL
2834
2835 dev_kfree_skb_any(priv->rx_skb);
2836 #ifndef RX_DONT_PASS_UL
2837 }
2838 #endif
2839 #ifdef DEBUG_RX
2840 else{
2841 DMESG("Rcv frag");
2842 }
2843 #endif
2844 priv->rx_skb_complete=1;
2845 }
2846
2847 #endif //DUMMY_RX
2848
2849 pci_dma_sync_single_for_device(priv->pdev,
2850 priv->rxbuffer->dma,
2851 priv->rxbuffersize * \
2852 sizeof(u8),
2853 PCI_DMA_FROMDEVICE);
2854
2855
2856 drop: // this is used when we have not enought mem
2857
2858 /* restore the descriptor */
2859 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2860 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2861 *(priv->rxringtail)=
2862 *(priv->rxringtail) | priv->rxbuffersize;
2863
2864 *(priv->rxringtail)=
2865 *(priv->rxringtail) | (1<<31);
2866 //^empty descriptor
2867
2868 //wmb();
2869
2870 #ifdef DEBUG_RX
2871 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2872 #endif
2873 //unsigned long flags;
2874 //spin_lock_irqsave(&priv->irq_lock,flags);
2875
2876 priv->rxringtail+=rx_desc_size;
2877 if(priv->rxringtail >=
2878 (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2879 priv->rxringtail=priv->rxring;
2880
2881 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2882
2883
2884 priv->rxbuffer=(priv->rxbuffer->next);
2885
2886 }
2887
2888
2889
2890 // if(get_curr_tx_free_desc(dev,priority))
2891 // ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2892
2893
2894
2895 }
2896
2897
2898 void rtl8180_dma_kick(struct net_device *dev, int priority)
2899 {
2900 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2901
2902 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2903 /*
2904
2905 switch(priority){
2906
2907 case LOW_PRIORITY:
2908
2909 write_nic_byte(dev,TX_DMA_POLLING,
2910 (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2911 priv->dma_poll_mask);
2912 break;
2913
2914 case NORM_PRIORITY:
2915
2916 write_nic_byte(dev,TX_DMA_POLLING,
2917 (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2918 priv->dma_poll_mask);
2919 break;
2920
2921 case HI_PRIORITY:
2922
2923 write_nic_byte(dev,TX_DMA_POLLING,
2924 (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2925 priv->dma_poll_mask);
2926 break;
2927
2928 }
2929 */
2930 write_nic_byte(dev, TX_DMA_POLLING,
2931 (1 << (priority + 1)) | priv->dma_poll_mask);
2932 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2933
2934 force_pci_posting(dev);
2935 }
2936
2937 #if 0
2938 void rtl8180_tx_queues_stop(struct net_device *dev)
2939 {
2940 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2941 u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2942 dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2943 dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2944 dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2945
2946 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2947 write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2948 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2949 }
2950 #endif
2951
2952 void rtl8180_data_hard_stop(struct net_device *dev)
2953 {
2954 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2955
2956 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2957 #ifdef CONFIG_RTL8185B
2958 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2959 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2960 #else
2961 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2962 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2963 #endif
2964 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2965 }
2966
2967
2968 void rtl8180_data_hard_resume(struct net_device *dev)
2969 {
2970 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2971
2972 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2973 #ifdef CONFIG_RTL8185B
2974 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2975 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2976 #else
2977 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2978 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2979 #endif
2980 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2981 }
2982
2983
2984 /* this function TX data frames when the ieee80211 stack requires this.
2985 * It checks also if we need to stop the ieee tx queue, eventually do it
2986 */
2987 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2988 rate)
2989 {
2990 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2991 int mode;
2992 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
2993 short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2994 unsigned long flags;
2995 int priority;
2996 //static int count = 0;
2997
2998 mode = priv->ieee80211->iw_mode;
2999
3000 rate = ieeerate2rtlrate(rate);
3001 /*
3002 * This function doesn't require lock because we make
3003 * sure it's called with the tx_lock already acquired.
3004 * this come from the kernel's hard_xmit callback (trought
3005 * the ieee stack, or from the try_wake_queue (again trought
3006 * the ieee stack.
3007 */
3008 #ifdef CONFIG_RTL8185B
3009 priority = AC2Q(skb->priority);
3010 #else
3011 priority = LOW_PRIORITY;
3012 #endif
3013 spin_lock_irqsave(&priv->tx_lock,flags);
3014
3015 if(priv->ieee80211->bHwRadioOff)
3016 {
3017 spin_unlock_irqrestore(&priv->tx_lock,flags);
3018
3019 return;
3020 }
3021
3022 //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
3023 if (!check_nic_enought_desc(dev, priority)){
3024 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
3025 // get_curr_tx_free_desc(dev, priority));
3026 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
3027 get_curr_tx_free_desc(dev, priority));
3028 //printk(KERN_WARNING "==============================================================> \n");
3029 ieee80211_stop_queue(priv->ieee80211);
3030 }
3031 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
3032 if (!check_nic_enought_desc(dev, priority))
3033 ieee80211_stop_queue(priv->ieee80211);
3034
3035 //dev_kfree_skb_any(skb);
3036 spin_unlock_irqrestore(&priv->tx_lock,flags);
3037
3038 }
3039
3040 /* This is a rough attempt to TX a frame
3041 * This is called by the ieee 80211 stack to TX management frames.
3042 * If the ring is full packet are dropped (for data frame the queue
3043 * is stopped before this can happen). For this reason it is better
3044 * if the descriptors are larger than the largest management frame
3045 * we intend to TX: i'm unsure what the HW does if it will not found
3046 * the last fragment of a frame because it has been dropped...
3047 * Since queues for Management and Data frames are different we
3048 * might use a different lock than tx_lock (for example mgmt_tx_lock)
3049 */
3050 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
3051 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
3052 {
3053 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3054
3055 unsigned long flags;
3056
3057 int priority;
3058
3059 #ifdef CONFIG_RTL8185B
3060 priority = MANAGE_PRIORITY;
3061 #else
3062 priority = NORM_PRIORITY;
3063 #endif
3064
3065 spin_lock_irqsave(&priv->tx_lock,flags);
3066
3067 if(priv->ieee80211->bHwRadioOff)
3068 {
3069 spin_unlock_irqrestore(&priv->tx_lock,flags);
3070
3071 dev_kfree_skb_any(skb);
3072 return 0;
3073 }
3074
3075 rtl8180_tx(dev, skb->data, skb->len, priority,
3076 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3077
3078 priv->ieee80211->stats.tx_bytes+=skb->len;
3079 priv->ieee80211->stats.tx_packets++;
3080 spin_unlock_irqrestore(&priv->tx_lock,flags);
3081
3082 dev_kfree_skb_any(skb);
3083 return 0;
3084 }
3085
3086 // longpre 144+48 shortpre 72+24
3087 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
3088 {
3089 u16 duration;
3090 u16 drift;
3091 *ext=0;
3092
3093 switch(rate){
3094 case 0://1mbps
3095 *ext=0;
3096 duration = ((len+4)<<4) /0x2;
3097 drift = ((len+4)<<4) % 0x2;
3098 if(drift ==0 ) break;
3099 duration++;
3100 break;
3101
3102 case 1://2mbps
3103 *ext=0;
3104 duration = ((len+4)<<4) /0x4;
3105 drift = ((len+4)<<4) % 0x4;
3106 if(drift ==0 ) break;
3107 duration++;
3108 break;
3109
3110 case 2: //5.5mbps
3111 *ext=0;
3112 duration = ((len+4)<<4) /0xb;
3113 drift = ((len+4)<<4) % 0xb;
3114 if(drift ==0 )
3115 break;
3116 duration++;
3117 break;
3118
3119 default:
3120 case 3://11mbps
3121 *ext=0;
3122 duration = ((len+4)<<4) /0x16;
3123 drift = ((len+4)<<4) % 0x16;
3124 if(drift ==0 )
3125 break;
3126 duration++;
3127 if(drift > 6)
3128 break;
3129 *ext=1;
3130 break;
3131 }
3132
3133 return duration;
3134 }
3135
3136
3137 void rtl8180_prepare_beacon(struct net_device *dev)
3138 {
3139
3140 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3141
3142 struct sk_buff *skb;
3143
3144 u16 word = read_nic_word(dev, BcnItv);
3145 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
3146 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
3147 write_nic_word(dev, BcnItv, word);
3148
3149
3150 skb = ieee80211_get_beacon(priv->ieee80211);
3151 if(skb){
3152 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
3153 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3154 dev_kfree_skb_any(skb);
3155 }
3156 #if 0
3157 //DMESG("size %x",len);
3158 if(*tail & (1<<31)){
3159
3160 //DMESG("No more beacon TX desc");
3161 return ;
3162
3163 }
3164 //while(! *tail & (1<<31)){
3165 *tail= 0; // zeroes header
3166
3167 *tail = *tail| (1<<29) ; //fist segment of the packet
3168 *tail = (*tail) | (1<<28); // last segment
3169 // *tail = *tail | (1<<18); // this is a beacon frame
3170 *(tail+3)=*(tail+3) &~ 0xfff;
3171 *(tail+3)=*(tail+3) | len; // buffer lenght
3172 *tail = *tail |len;
3173 // zeroes the second 32-bits dword of the descriptor
3174 *(tail+1)= 0;
3175 *tail = *tail | (rate << 24);
3176
3177 duration = rtl8180_len2duration(len,rate,&ext);
3178
3179 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3180
3181 *tail = *tail | (1<<31);
3182 //^ descriptor ready to be txed
3183 if((tail - begin)/8 == priv->txbeaconcount-1)
3184 tail=begin;
3185 else
3186 tail=tail+8;
3187 //}
3188 #endif
3189 }
3190
3191 /* This function do the real dirty work: it enqueues a TX command
3192 * descriptor in the ring buffer, copyes the frame in a TX buffer
3193 * and kicks the NIC to ensure it does the DMA transfer.
3194 */
3195 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
3196 short morefrag, short descfrag, int rate)
3197 {
3198 struct r8180_priv *priv = ieee80211_priv(dev);
3199 u32 *tail,*temp_tail;
3200 u32 *begin;
3201 u32 *buf;
3202 int i;
3203 int remain;
3204 int buflen;
3205 int count;
3206 //u16 AckCtsTime;
3207 //u16 FrameTime;
3208 u16 duration;
3209 short ext;
3210 struct buffer* buflist;
3211 //unsigned long flags;
3212 #ifdef CONFIG_RTL8185B
3213 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
3214 u8 dest[ETH_ALEN];
3215 u8 bUseShortPreamble = 0;
3216 u8 bCTSEnable = 0;
3217 u8 bRTSEnable = 0;
3218 //u16 RTSRate = 22;
3219 //u8 RetryLimit = 0;
3220 u16 Duration = 0;
3221 u16 RtsDur = 0;
3222 u16 ThisFrameTime = 0;
3223 u16 TxDescDuration = 0;
3224 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3225 #endif
3226
3227 switch(priority) {
3228 case MANAGE_PRIORITY:
3229 tail=priv->txmapringtail;
3230 begin=priv->txmapring;
3231 buflist = priv->txmapbufstail;
3232 count = priv->txringcount;
3233 break;
3234
3235 case BK_PRIORITY:
3236 tail=priv->txbkpringtail;
3237 begin=priv->txbkpring;
3238 buflist = priv->txbkpbufstail;
3239 count = priv->txringcount;
3240 break;
3241
3242 case BE_PRIORITY:
3243 tail=priv->txbepringtail;
3244 begin=priv->txbepring;
3245 buflist = priv->txbepbufstail;
3246 count = priv->txringcount;
3247 break;
3248
3249 case VI_PRIORITY:
3250 tail=priv->txvipringtail;
3251 begin=priv->txvipring;
3252 buflist = priv->txvipbufstail;
3253 count = priv->txringcount;
3254 break;
3255
3256 case VO_PRIORITY:
3257 tail=priv->txvopringtail;
3258 begin=priv->txvopring;
3259 buflist = priv->txvopbufstail;
3260 count = priv->txringcount;
3261 break;
3262
3263 case HI_PRIORITY:
3264 tail=priv->txhpringtail;
3265 begin=priv->txhpring;
3266 buflist = priv->txhpbufstail;
3267 count = priv->txringcount;
3268 break;
3269
3270 case BEACON_PRIORITY:
3271 tail=priv->txbeaconringtail;
3272 begin=priv->txbeaconring;
3273 buflist = priv->txbeaconbufstail;
3274 count = priv->txbeaconcount;
3275 break;
3276
3277 default:
3278 return -1;
3279 break;
3280 }
3281
3282 //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3283 #if 1
3284 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3285 if (is_multicast_ether_addr(dest) ||
3286 is_broadcast_ether_addr(dest))
3287 {
3288 Duration = 0;
3289 RtsDur = 0;
3290 bRTSEnable = 0;
3291 bCTSEnable = 0;
3292
3293 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3294 TxDescDuration = ThisFrameTime;
3295 } else {// Unicast packet
3296 //u8 AckRate;
3297 u16 AckTime;
3298
3299 //YJ,add,080828,for Keep alive
3300 priv->NumTxUnicast++;
3301
3302 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3303 //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3304 // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3305 //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3306 //For simplicity, just use the 1M basic rate
3307 //AckTime = ComputeTxTime(14, 540,0, 0); // AckCTSLng = 14 use 1M bps send
3308 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3309 //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send
3310
3311 if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3312 { // RTS/CTS.
3313 u16 RtsTime, CtsTime;
3314 //u16 CtsRate;
3315 bRTSEnable = 1;
3316 bCTSEnable = 0;
3317
3318 // Rate and time required for RTS.
3319 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3320 // Rate and time required for CTS.
3321 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3322
3323 // Figure out time required to transmit this frame.
3324 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3325 rtl8180_rate2rate(rate),
3326 0,
3327 bUseShortPreamble);
3328
3329 // RTS-CTS-ThisFrame-ACK.
3330 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3331
3332 TxDescDuration = RtsTime + RtsDur;
3333 }
3334 else {// Normal case.
3335 bCTSEnable = 0;
3336 bRTSEnable = 0;
3337 RtsDur = 0;
3338
3339 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3340 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3341 }
3342
3343 if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3344 // ThisFrame-ACK.
3345 Duration = aSifsTime + AckTime;
3346 } else { // One or more fragments remained.
3347 u16 NextFragTime;
3348 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3349 rtl8180_rate2rate(rate),
3350 0,
3351 bUseShortPreamble );
3352
3353 //ThisFrag-ACk-NextFrag-ACK.
3354 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3355 }
3356
3357 } // End of Unicast packet
3358
3359 frag_hdr->duration_id = Duration;
3360 #endif
3361
3362 buflen=priv->txbuffsize;
3363 remain=len;
3364 temp_tail = tail;
3365 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3366 while(remain!=0){
3367 #ifdef DEBUG_TX_FRAG
3368 DMESG("TX iteration");
3369 #endif
3370 #ifdef DEBUG_TX
3371 DMESG("TX: filling descriptor %x",(u32)tail);
3372 #endif
3373 mb();
3374 if(!buflist){
3375 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3376 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3377 return -1;
3378 }
3379 buf=buflist->buf;
3380
3381 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3382
3383 DMESGW("No more TX desc, returning %x of %x",
3384 remain,len);
3385 priv->stats.txrdu++;
3386 #ifdef DEBUG_TX_DESC
3387 check_tx_ring(dev,priority);
3388 // netif_stop_queue(dev);
3389 // netif_carrier_off(dev);
3390 #endif
3391 // spin_unlock_irqrestore(&priv->tx_lock,flags);
3392
3393 return remain;
3394
3395 }
3396
3397 *tail= 0; // zeroes header
3398 *(tail+1) = 0;
3399 *(tail+3) = 0;
3400 *(tail+5) = 0;
3401 *(tail+6) = 0;
3402 *(tail+7) = 0;
3403
3404 if(priv->card_8185){
3405 //FIXME: this should be triggered by HW encryption parameters.
3406 *tail |= (1<<15); //no encrypt
3407 // *tail |= (1<<30); //raise int when completed
3408 }
3409 // *tail = *tail | (1<<16);
3410 if(remain==len && !descfrag) {
3411 ownbit_flag = false; //added by david woo,2007.12.14
3412 #ifdef DEBUG_TX_FRAG
3413 DMESG("First descriptor");
3414 #endif
3415 *tail = *tail| (1<<29) ; //fist segment of the packet
3416 *tail = *tail |(len);
3417 } else {
3418 ownbit_flag = true;
3419 }
3420
3421 for(i=0;i<buflen&& remain >0;i++,remain--){
3422 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3423 if(remain == 4 && i+4 >= buflen) break;
3424 /* ensure the last desc has at least 4 bytes payload */
3425
3426 }
3427 txbuf = txbuf + i;
3428 *(tail+3)=*(tail+3) &~ 0xfff;
3429 *(tail+3)=*(tail+3) | i; // buffer lenght
3430 // Use short preamble or not
3431 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3432 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long!
3433 // *tail |= (1<<16); // enable short preamble mode.
3434
3435 #ifdef CONFIG_RTL8185B
3436 if(bCTSEnable) {
3437 *tail |= (1<<18);
3438 }
3439
3440 if(bRTSEnable) //rts enable
3441 {
3442 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3443 *tail |= (1<<23);//rts enable
3444 *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3445 }
3446 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3447 // *(tail+3) |= (0xe6<<16);
3448 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3449 #else
3450 //Use RTS or not
3451 #ifdef CONFIG_RTL8187B
3452 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
3453 #else
3454 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
3455 #endif
3456 *tail |= (1<<23); //enalbe RTS function
3457 *tail |= (0<<19); //use 1M bps send RTS packet
3458 AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3459 FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
3460 // RTS/CTS time is calculate as follow
3461 duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime;
3462 *(tail+1) |= duration; //Need to edit here! ----hikaru
3463 }else{
3464 *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
3465 }
3466 #endif
3467
3468 *tail = *tail | ((rate&0xf) << 24);
3469 //DMESG("rate %d",rate);
3470
3471 if(priv->card_8185){
3472
3473 #if 0
3474 *(tail+5)&= ~(1<<24); /* tx ant 0 */
3475
3476 *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3477 *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3478
3479 *(tail+5) &=
3480 ~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3481 *(tail+5) |= (7<<8); // Max retry limit
3482
3483 *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3484 *(tail+5) |= (8<<4); // Max contention window
3485 *(tail+6) |= 4; // Min contention window
3486 #endif
3487 // *(tail+5) = 0;
3488 }
3489
3490 /* hw_plcp_len is not used for rtl8180 chip */
3491 /* FIXME */
3492 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3493
3494 duration = rtl8180_len2duration(len,
3495 rate,&ext);
3496
3497
3498 #ifdef DEBUG_TX
3499 DMESG("PLCP duration %d",duration );
3500 //DMESG("drift %d",drift);
3501 DMESG("extension %s", (ext==1) ? "on":"off");
3502 #endif
3503 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3504 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3505 }
3506
3507 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3508 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3509
3510 #ifdef DEBUG_TX_FRAG
3511 if(!remain)DMESG("Last descriptor");
3512 if(morefrag)DMESG("More frag");
3513 #endif
3514 *(tail+5) = *(tail+5)|(2<<27);
3515 *(tail+7) = *(tail+7)|(1<<4);
3516
3517 wmb();
3518 if(ownbit_flag)
3519 {
3520 *tail = *tail | (1<<31); // descriptor ready to be txed
3521 }
3522
3523 #ifdef DEBUG_TX_DESC2
3524 printk("tx desc is:\n");
3525 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3526 tail[4], tail[5], tail[6], tail[7]);
3527 #endif
3528
3529 if((tail - begin)/8 == count-1)
3530 tail=begin;
3531
3532 else
3533 tail=tail+8;
3534
3535 buflist=buflist->next;
3536
3537 mb();
3538
3539 switch(priority) {
3540 case MANAGE_PRIORITY:
3541 priv->txmapringtail=tail;
3542 priv->txmapbufstail=buflist;
3543 break;
3544
3545 case BK_PRIORITY:
3546 priv->txbkpringtail=tail;
3547 priv->txbkpbufstail=buflist;
3548 break;
3549
3550 case BE_PRIORITY:
3551 priv->txbepringtail=tail;
3552 priv->txbepbufstail=buflist;
3553 break;
3554
3555 case VI_PRIORITY:
3556 priv->txvipringtail=tail;
3557 priv->txvipbufstail=buflist;
3558 break;
3559
3560 case VO_PRIORITY:
3561 priv->txvopringtail=tail;
3562 priv->txvopbufstail=buflist;
3563 break;
3564
3565 case HI_PRIORITY:
3566 priv->txhpringtail=tail;
3567 priv->txhpbufstail = buflist;
3568 break;
3569
3570 case BEACON_PRIORITY:
3571 /* the HW seems to be happy with the 1st
3572 * descriptor filled and the 2nd empty...
3573 * So always update descriptor 1 and never
3574 * touch 2nd
3575 */
3576 // priv->txbeaconringtail=tail;
3577 // priv->txbeaconbufstail=buflist;
3578
3579 break;
3580
3581 }
3582
3583 //rtl8180_dma_kick(dev,priority);
3584 }
3585 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3586 rtl8180_dma_kick(dev,priority);
3587 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3588
3589 return 0;
3590
3591 }
3592
3593
3594 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3595
3596
3597 void rtl8180_link_change(struct net_device *dev)
3598 {
3599 struct r8180_priv *priv = ieee80211_priv(dev);
3600 u16 beacon_interval;
3601
3602 struct ieee80211_network *net = &priv->ieee80211->current_network;
3603 // rtl8180_adapter_start(dev);
3604 rtl8180_update_msr(dev);
3605
3606
3607 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3608
3609 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3610 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3611
3612
3613 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL);
3614 beacon_interval &= ~ BEACON_INTERVAL_MASK;
3615 beacon_interval |= net->beacon_interval;
3616 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3617
3618 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3619
3620
3621 /*
3622 u16 atim = read_nic_dword(dev,ATIM);
3623 u16 = u16 &~ ATIM_MASK;
3624 u16 = u16 | beacon->atim;
3625 */
3626 #if 0
3627 if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3628 if (priv->hw_wep) {
3629 DMESG("Enabling hardware WEP support");
3630 rtl8180_set_hw_wep(dev);
3631 priv->ieee80211->host_encrypt=0;
3632 priv->ieee80211->host_decrypt=0;
3633 }
3634 #ifndef CONFIG_IEEE80211_NOWEP
3635 else {
3636 priv->ieee80211->host_encrypt=1;
3637 priv->ieee80211->host_decrypt=1;
3638 }
3639 #endif
3640 }
3641 #ifndef CONFIG_IEEE80211_NOWEP
3642 else{
3643 priv->ieee80211->host_encrypt=0;
3644 priv->ieee80211->host_decrypt=0;
3645 }
3646 #endif
3647 #endif
3648
3649
3650 if(priv->card_8185)
3651 rtl8180_set_chan(dev, priv->chan);
3652
3653
3654 }
3655
3656 void rtl8180_rq_tx_ack(struct net_device *dev){
3657
3658 struct r8180_priv *priv = ieee80211_priv(dev);
3659 // printk("====================>%s\n",__func__);
3660 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3661 priv->ack_tx_to_ieee = 1;
3662 }
3663
3664 short rtl8180_is_tx_queue_empty(struct net_device *dev){
3665
3666 struct r8180_priv *priv = ieee80211_priv(dev);
3667 u32* d;
3668
3669 for (d = priv->txmapring;
3670 d < priv->txmapring + priv->txringcount;d+=8)
3671 if(*d & (1<<31)) return 0;
3672
3673 for (d = priv->txbkpring;
3674 d < priv->txbkpring + priv->txringcount;d+=8)
3675 if(*d & (1<<31)) return 0;
3676
3677 for (d = priv->txbepring;
3678 d < priv->txbepring + priv->txringcount;d+=8)
3679 if(*d & (1<<31)) return 0;
3680
3681 for (d = priv->txvipring;
3682 d < priv->txvipring + priv->txringcount;d+=8)
3683 if(*d & (1<<31)) return 0;
3684
3685 for (d = priv->txvopring;
3686 d < priv->txvopring + priv->txringcount;d+=8)
3687 if(*d & (1<<31)) return 0;
3688
3689 for (d = priv->txhpring;
3690 d < priv->txhpring + priv->txringcount;d+=8)
3691 if(*d & (1<<31)) return 0;
3692 return 1;
3693 }
3694 /* FIXME FIXME 5msecs is random */
3695 #define HW_WAKE_DELAY 5
3696
3697 void rtl8180_hw_wakeup(struct net_device *dev)
3698 {
3699 unsigned long flags;
3700
3701 struct r8180_priv *priv = ieee80211_priv(dev);
3702
3703 spin_lock_irqsave(&priv->ps_lock,flags);
3704 //DMESG("Waken up!");
3705 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3706
3707 if(priv->rf_wakeup)
3708 priv->rf_wakeup(dev);
3709 // mdelay(HW_WAKE_DELAY);
3710 spin_unlock_irqrestore(&priv->ps_lock,flags);
3711 }
3712
3713 void rtl8180_hw_sleep_down(struct net_device *dev)
3714 {
3715 unsigned long flags;
3716
3717 struct r8180_priv *priv = ieee80211_priv(dev);
3718
3719 spin_lock_irqsave(&priv->ps_lock,flags);
3720 //DMESG("Sleep!");
3721
3722 if(priv->rf_sleep)
3723 priv->rf_sleep(dev);
3724 spin_unlock_irqrestore(&priv->ps_lock,flags);
3725 }
3726
3727
3728 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3729 {
3730
3731 struct r8180_priv *priv = ieee80211_priv(dev);
3732
3733 u32 rb = jiffies;
3734 unsigned long flags;
3735
3736 spin_lock_irqsave(&priv->ps_lock,flags);
3737
3738 /* Writing HW register with 0 equals to disable
3739 * the timer, that is not really what we want
3740 */
3741 tl -= MSECS(4+16+7);
3742
3743 //if(tl == 0) tl = 1;
3744
3745 /* FIXME HACK FIXME HACK */
3746 // force_pci_posting(dev);
3747 //mdelay(1);
3748
3749 // rb = read_nic_dword(dev, TSFTR);
3750
3751 /* If the interval in witch we are requested to sleep is too
3752 * short then give up and remain awake
3753 */
3754 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3755 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3756 spin_unlock_irqrestore(&priv->ps_lock,flags);
3757 printk("too short to sleep\n");
3758 return;
3759 }
3760
3761 // write_nic_dword(dev, TimerInt, tl);
3762 // rb = read_nic_dword(dev, TSFTR);
3763 {
3764 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3765 // if (tl<rb)
3766
3767 //lzm,add,080828
3768 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3769
3770 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3771 }
3772 /* if we suspect the TimerInt is gone beyond tl
3773 * while setting it, then give up
3774 */
3775 #if 1
3776 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3777 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3778 spin_unlock_irqrestore(&priv->ps_lock,flags);
3779 return;
3780 }
3781 #endif
3782 // if(priv->rf_sleep)
3783 // priv->rf_sleep(dev);
3784
3785 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3786 spin_unlock_irqrestore(&priv->ps_lock,flags);
3787 }
3788
3789
3790 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3791 #if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
3792 void rtl8180_wmm_param_update(struct work_struct * work)
3793 {
3794 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3795 //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3796 struct net_device *dev = ieee->dev;
3797 #else
3798 void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
3799 {
3800 struct net_device *dev = ieee->dev;
3801 struct r8180_priv *priv = ieee80211_priv(dev);
3802 #endif
3803 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3804 u8 mode = ieee->current_network.mode;
3805 AC_CODING eACI;
3806 AC_PARAM AcParam;
3807 PAC_PARAM pAcParam;
3808 u8 i;
3809
3810 #ifndef CONFIG_RTL8185B
3811 //for legacy 8185 keep the PARAM unchange.
3812 return;
3813 #else
3814 if(!ieee->current_network.QoS_Enable){
3815 //legacy ac_xx_param update
3816 AcParam.longData = 0;
3817 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3818 AcParam.f.AciAifsn.f.ACM = 0;
3819 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3820 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3821 AcParam.f.TXOPLimit = 0;
3822 for(eACI = 0; eACI < AC_MAX; eACI++){
3823 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3824 {
3825 u8 u1bAIFS;
3826 u32 u4bAcParam;
3827 pAcParam = (PAC_PARAM)(&AcParam);
3828 // Retrive paramters to udpate.
3829 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3830 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3831 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3832 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3833 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3834 switch(eACI){
3835 case AC1_BK:
3836 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3837 break;
3838
3839 case AC0_BE:
3840 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3841 break;
3842
3843 case AC2_VI:
3844 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3845 break;
3846
3847 case AC3_VO:
3848 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3849 break;
3850
3851 default:
3852 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3853 break;
3854 }
3855 }
3856 }
3857 return;
3858 }
3859
3860 for(i = 0; i < AC_MAX; i++){
3861 //AcParam.longData = 0;
3862 pAcParam = (AC_PARAM * )ac_param;
3863 {
3864 AC_CODING eACI;
3865 u8 u1bAIFS;
3866 u32 u4bAcParam;
3867
3868 // Retrive paramters to udpate.
3869 eACI = pAcParam->f.AciAifsn.f.ACI;
3870 //Mode G/A: slotTimeTimer = 9; Mode B: 20
3871 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3872 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
3873 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
3874 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
3875 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3876
3877 switch(eACI){
3878 case AC1_BK:
3879 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3880 break;
3881
3882 case AC0_BE:
3883 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3884 break;
3885
3886 case AC2_VI:
3887 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3888 break;
3889
3890 case AC3_VO:
3891 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3892 break;
3893
3894 default:
3895 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3896 break;
3897 }
3898 }
3899 ac_param += (sizeof(AC_PARAM));
3900 }
3901 #endif
3902 }
3903
3904 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3905 void rtl8180_tx_irq_wq(struct work_struct *work);
3906 #else
3907 void rtl8180_tx_irq_wq(struct net_device *dev);
3908 #endif
3909
3910
3911
3912
3913 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3914 void rtl8180_restart_wq(struct work_struct *work);
3915 //void rtl8180_rq_tx_ack(struct work_struct *work);
3916 #else
3917 void rtl8180_restart_wq(struct net_device *dev);
3918 //void rtl8180_rq_tx_ack(struct net_device *dev);
3919 #endif
3920 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3921 void rtl8180_watch_dog_wq(struct work_struct *work);
3922 #else
3923 void rtl8180_watch_dog_wq(struct net_device *dev);
3924 #endif
3925 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3926 void rtl8180_hw_wakeup_wq(struct work_struct *work);
3927 #else
3928 void rtl8180_hw_wakeup_wq(struct net_device *dev);
3929 #endif
3930
3931 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3932 void rtl8180_hw_sleep_wq(struct work_struct *work);
3933 #else
3934 void rtl8180_hw_sleep_wq(struct net_device *dev);
3935 #endif
3936
3937
3938
3939 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3940 void rtl8180_sw_antenna_wq(struct work_struct *work);
3941 #else
3942 void rtl8180_sw_antenna_wq(struct net_device *dev);
3943 #endif
3944 void rtl8180_watch_dog(struct net_device *dev);
3945 void watch_dog_adaptive(unsigned long data)
3946 {
3947 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3948 // DMESG("---->watch_dog_adaptive()\n");
3949 if(!priv->up)
3950 {
3951 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3952 return;
3953 }
3954
3955 // queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3956 //{by amy 080312
3957 #if 1
3958 // Tx High Power Mechanism.
3959 #ifdef HIGH_POWER
3960 if(CheckHighPower((struct net_device *)data))
3961 {
3962 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3963 }
3964 #endif
3965
3966 #ifdef CONFIG_RTL818X_S
3967 // Tx Power Tracking on 87SE.
3968 #ifdef TX_TRACK
3969 //if( priv->bTxPowerTrack ) //lzm mod 080826
3970 if( CheckTxPwrTracking((struct net_device *)data));
3971 TxPwrTracking87SE((struct net_device *)data);
3972 #endif
3973 #endif
3974
3975 // Perform DIG immediately.
3976 #ifdef SW_DIG
3977 if(CheckDig((struct net_device *)data) == true)
3978 {
3979 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3980 }
3981 #endif
3982 #endif
3983 //by amy 080312}
3984 rtl8180_watch_dog((struct net_device *)data);
3985
3986
3987 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3988
3989 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3990 add_timer(&priv->watch_dog_timer);
3991 // DMESG("<----watch_dog_adaptive()\n");
3992 }
3993
3994 #ifdef ENABLE_DOT11D
3995
3996 static CHANNEL_LIST ChannelPlan[] = {
3997 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC
3998 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
3999 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
4000 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI.
4001 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI.
4002 {{14,36,40,44,48,52,56,60,64},9}, //MKK
4003 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
4004 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel.
4005 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC
4006 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
4007 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
4008 };
4009
4010 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
4011 {
4012 int i;
4013
4014 //lzm add 080826
4015 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
4016 ieee->IbssStartChnl=0;
4017
4018 switch (channel_plan)
4019 {
4020 case COUNTRY_CODE_FCC:
4021 case COUNTRY_CODE_IC:
4022 case COUNTRY_CODE_ETSI:
4023 case COUNTRY_CODE_SPAIN:
4024 case COUNTRY_CODE_FRANCE:
4025 case COUNTRY_CODE_MKK:
4026 case COUNTRY_CODE_MKK1:
4027 case COUNTRY_CODE_ISRAEL:
4028 case COUNTRY_CODE_TELEC:
4029 {
4030 Dot11d_Init(ieee);
4031 ieee->bGlobalDomain = false;
4032 if (ChannelPlan[channel_plan].Len != 0){
4033 // Clear old channel map
4034 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4035 // Set new channel map
4036 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
4037 {
4038 if(ChannelPlan[channel_plan].Channel[i] <= 14)
4039 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
4040 }
4041 }
4042 break;
4043 }
4044 case COUNTRY_CODE_GLOBAL_DOMAIN:
4045 {
4046 GET_DOT11D_INFO(ieee)->bEnabled = 0;
4047 Dot11d_Reset(ieee);
4048 ieee->bGlobalDomain = true;
4049 break;
4050 }
4051 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
4052 {
4053 ieee->MinPassiveChnlNum=12;
4054 ieee->IbssStartChnl= 10;
4055 break;
4056 }
4057 default:
4058 {
4059 Dot11d_Init(ieee);
4060 ieee->bGlobalDomain = false;
4061 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4062 for (i=1;i<=14;i++)
4063 {
4064 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
4065 }
4066 break;
4067 }
4068 }
4069 }
4070 #endif
4071
4072 //Add for RF power on power off by lizhaoming 080512
4073 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4074 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
4075 #else
4076 void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
4077 #endif
4078
4079 //YJ,add,080828
4080 static void rtl8180_statistics_init(struct Stats *pstats)
4081 {
4082 memset(pstats, 0, sizeof(struct Stats));
4083 }
4084 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
4085 {
4086 memset(plink_detect, 0, sizeof(link_detect_t));
4087 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
4088 }
4089 //YJ,add,080828,end
4090
4091 short rtl8180_init(struct net_device *dev)
4092 {
4093 struct r8180_priv *priv = ieee80211_priv(dev);
4094 u16 word;
4095 u16 version;
4096 u8 hw_version;
4097 //u8 config3;
4098 u32 usValue;
4099 u16 tmpu16;
4100 int i, j;
4101
4102 #ifdef ENABLE_DOT11D
4103 #if 0
4104 for(i=0;i<0xFF;i++) {
4105 if(i%16 == 0)
4106 printk("\n[%x]: ", i/16);
4107 printk("\t%4.4x", eprom_read(dev,i));
4108 }
4109 #endif
4110 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
4111 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
4112 printk("rtl8180_init:Error channel plan! Set to default.\n");
4113 priv->channel_plan = 0;
4114 }
4115 //priv->channel_plan = 9; //Global Domain
4116
4117 DMESG("Channel plan is %d\n",priv->channel_plan);
4118 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
4119 #else
4120 int ch;
4121 //Set Default Channel Plan
4122 if(!channels){
4123 DMESG("No channels, aborting");
4124 return -1;
4125 }
4126 ch=channels;
4127 priv->channel_plan = 0;//hikaru
4128 // set channels 1..14 allowed in given locale
4129 for (i=1; i<=14; i++) {
4130 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
4131 ch >>= 1;
4132 }
4133 #endif
4134
4135 //memcpy(priv->stats,0,sizeof(struct Stats));
4136
4137 //FIXME: these constants are placed in a bad pleace.
4138 priv->txbuffsize = 2048;//1024;
4139 priv->txringcount = 32;//32;
4140 priv->rxbuffersize = 2048;//1024;
4141 priv->rxringcount = 64;//32;
4142 priv->txbeaconcount = 2;
4143 priv->rx_skb_complete = 1;
4144 //priv->txnp_pending.ispending=0;
4145 /* ^^ the SKB does not containt a partial RXed
4146 * packet (is empty)
4147 */
4148
4149 #ifdef CONFIG_RTL8185B
4150 #ifdef CONFIG_RTL818X_S
4151 priv->RegThreeWireMode = HW_THREE_WIRE_SI;
4152 #else
4153 priv->RegThreeWireMode = SW_THREE_WIRE;
4154 #endif
4155 #endif
4156
4157 //Add for RF power on power off by lizhaoming 080512
4158 priv->RFChangeInProgress = false;
4159 priv->SetRFPowerStateInProgress = false;
4160 priv->RFProgType = 0;
4161 priv->bInHctTest = false;
4162
4163 priv->irq_enabled=0;
4164
4165 //YJ,modified,080828
4166 #if 0
4167 priv->stats.rxdmafail=0;
4168 priv->stats.txrdu=0;
4169 priv->stats.rxrdu=0;
4170 priv->stats.rxnolast=0;
4171 priv->stats.rxnodata=0;
4172 //priv->stats.rxreset=0;
4173 //priv->stats.rxwrkaround=0;
4174 priv->stats.rxnopointer=0;
4175 priv->stats.txnperr=0;
4176 priv->stats.txresumed=0;
4177 priv->stats.rxerr=0;
4178 priv->stats.rxoverflow=0;
4179 priv->stats.rxint=0;
4180 priv->stats.txnpokint=0;
4181 priv->stats.txhpokint=0;
4182 priv->stats.txhperr=0;
4183 priv->stats.ints=0;
4184 priv->stats.shints=0;
4185 priv->stats.txoverflow=0;
4186 priv->stats.txbeacon=0;
4187 priv->stats.txbeaconerr=0;
4188 priv->stats.txlperr=0;
4189 priv->stats.txlpokint=0;
4190 priv->stats.txretry=0;//tony 20060601
4191 priv->stats.rxcrcerrmin=0;
4192 priv->stats.rxcrcerrmid=0;
4193 priv->stats.rxcrcerrmax=0;
4194 priv->stats.rxicverr=0;
4195 #else
4196 rtl8180_statistics_init(&priv->stats);
4197 rtl8180_link_detect_init(&priv->link_detect);
4198 #endif
4199 //YJ,modified,080828,end
4200
4201
4202 priv->ack_tx_to_ieee = 0;
4203 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4204 priv->ieee80211->iw_mode = IW_MODE_INFRA;
4205 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
4206 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4207 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
4208 priv->ieee80211->active_scan = 1;
4209 priv->ieee80211->rate = 110; //11 mbps
4210 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
4211 priv->ieee80211->host_encrypt = 1;
4212 priv->ieee80211->host_decrypt = 1;
4213 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
4214 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
4215 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
4216 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
4217
4218 priv->hw_wep = hwwep;
4219 priv->prism_hdr=0;
4220 priv->dev=dev;
4221 priv->retry_rts = DEFAULT_RETRY_RTS;
4222 priv->retry_data = DEFAULT_RETRY_DATA;
4223 priv->RFChangeInProgress = false;
4224 priv->SetRFPowerStateInProgress = false;
4225 priv->RFProgType = 0;
4226 priv->bInHctTest = false;
4227 priv->bInactivePs = true;//false;
4228 priv->ieee80211->bInactivePs = priv->bInactivePs;
4229 priv->bSwRfProcessing = false;
4230 priv->eRFPowerState = eRfOff;
4231 priv->RfOffReason = 0;
4232 priv->LedStrategy = SW_LED_MODE0;
4233 //priv->NumRxOkInPeriod = 0; //YJ,del,080828
4234 //priv->NumTxOkInPeriod = 0; //YJ,del,080828
4235 priv->TxPollingTimes = 0;//lzm add 080826
4236 priv->bLeisurePs = true;
4237 priv->dot11PowerSaveMode = eActive;
4238 //by amy for antenna
4239 priv->AdMinCheckPeriod = 5;
4240 priv->AdMaxCheckPeriod = 10;
4241 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
4242 priv->AdMaxRxSsThreshold = 30;//60->30
4243 priv->AdRxSsThreshold = 20;//50->20
4244 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
4245 priv->AdTickCount = 0;
4246 priv->AdRxSignalStrength = -1;
4247 priv->RegSwAntennaDiversityMechanism = 0;
4248 priv->RegDefaultAntenna = 0;
4249 priv->SignalStrength = 0;
4250 priv->AdRxOkCnt = 0;
4251 priv->CurrAntennaIndex = 0;
4252 priv->AdRxSsBeforeSwitched = 0;
4253 init_timer(&priv->SwAntennaDiversityTimer);
4254 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
4255 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
4256 //by amy for antenna
4257 //{by amy 080312
4258 priv->bDigMechanism = 1;
4259 priv->InitialGain = 6;
4260 priv->bXtalCalibration = false;
4261 priv->XtalCal_Xin = 0;
4262 priv->XtalCal_Xout = 0;
4263 priv->bTxPowerTrack = false;
4264 priv->ThermalMeter = 0;
4265 priv->FalseAlarmRegValue = 0;
4266 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
4267 priv->DIG_NumberFallbackVote = 0;
4268 priv->DIG_NumberUpgradeVote = 0;
4269 priv->LastSignalStrengthInPercent = 0;
4270 priv->Stats_SignalStrength = 0;
4271 priv->LastRxPktAntenna = 0;
4272 priv->SignalQuality = 0; // in 0-100 index.
4273 priv->Stats_SignalQuality = 0;
4274 priv->RecvSignalPower = 0; // in dBm.
4275 priv->Stats_RecvSignalPower = 0;
4276 priv->AdMainAntennaRxOkCnt = 0;
4277 priv->AdAuxAntennaRxOkCnt = 0;
4278 priv->bHWAdSwitched = false;
4279 priv->bRegHighPowerMechanism = true;
4280 priv->RegHiPwrUpperTh = 77;
4281 priv->RegHiPwrLowerTh = 75;
4282 priv->RegRSSIHiPwrUpperTh = 70;
4283 priv->RegRSSIHiPwrLowerTh = 20;
4284 priv->bCurCCKPkt = false;
4285 priv->UndecoratedSmoothedSS = -1;
4286 priv->bToUpdateTxPwr = false;
4287 priv->CurCCKRSSI = 0;
4288 priv->RxPower = 0;
4289 priv->RSSI = 0;
4290 //YJ,add,080828
4291 priv->NumTxOkTotal = 0;
4292 priv->NumTxUnicast = 0;
4293 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
4294 priv->PowerProfile = POWER_PROFILE_AC;
4295 //YJ,add,080828,end
4296 //by amy for rate adaptive
4297 priv->CurrRetryCnt=0;
4298 priv->LastRetryCnt=0;
4299 priv->LastTxokCnt=0;
4300 priv->LastRxokCnt=0;
4301 priv->LastRetryRate=0;
4302 priv->bTryuping=0;
4303 priv->CurrTxRate=0;
4304 priv->CurrRetryRate=0;
4305 priv->TryupingCount=0;
4306 priv->TryupingCountNoData=0;
4307 priv->TryDownCountLowData=0;
4308 priv->LastTxOKBytes=0;
4309 priv->LastFailTxRate=0;
4310 priv->LastFailTxRateSS=0;
4311 priv->FailTxRateCount=0;
4312 priv->LastTxThroughput=0;
4313 priv->NumTxOkBytesTotal=0;
4314 priv->ForcedDataRate = 0;
4315 priv->RegBModeGainStage = 1;
4316
4317 //by amy for rate adaptive
4318 //by amy 080312}
4319 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4320 spin_lock_init(&priv->irq_lock);
4321 spin_lock_init(&priv->irq_th_lock);
4322 spin_lock_init(&priv->tx_lock);
4323 spin_lock_init(&priv->ps_lock);
4324 spin_lock_init(&priv->rf_ps_lock);
4325 sema_init(&priv->wx_sem,1);
4326 sema_init(&priv->rf_state,1);
4327 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4328 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4329 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4330 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4331 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4332 //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4333 //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4334 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4335 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4336 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4337 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4338
4339 //add for RF power on power off by lizhaoming 080512
4340 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4341 #else
4342 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4343 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq,dev);
4344 //INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq,dev);
4345 INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq,dev);
4346 INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq,dev);
4347 //INIT_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq,dev);
4348 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update,priv->ieee80211);
4349 INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);//+by amy 080312
4350 INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);//+by amy 080312
4351 INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);//+by amy 080312
4352
4353 //add for RF power on power off by lizhaoming 080512
4354 INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
4355 #endif
4356 //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4357
4358 tasklet_init(&priv->irq_rx_tasklet,
4359 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4360 (unsigned long)priv);
4361 //by amy
4362 init_timer(&priv->watch_dog_timer);
4363 priv->watch_dog_timer.data = (unsigned long)dev;
4364 priv->watch_dog_timer.function = watch_dog_adaptive;
4365 //by amy
4366
4367 //{by amy 080312
4368 //by amy for rate adaptive
4369 init_timer(&priv->rateadapter_timer);
4370 priv->rateadapter_timer.data = (unsigned long)dev;
4371 priv->rateadapter_timer.function = timer_rate_adaptive;
4372 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4373 priv->bEnhanceTxPwr=false;
4374 //by amy for rate adaptive
4375 //by amy 080312}
4376 //priv->ieee80211->func =
4377 // kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4378 //memset(priv->ieee80211->func, 0,
4379 // sizeof(struct ieee80211_helper_functions));
4380
4381 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4382 priv->ieee80211->set_chan = rtl8180_set_chan;
4383 priv->ieee80211->link_change = rtl8180_link_change;
4384 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4385 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4386 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4387
4388 priv->ieee80211->init_wmmparam_flag = 0;
4389
4390 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4391 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4392 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4393
4394 #ifdef CONFIG_RTL8185B
4395 priv->MWIEnable = 0;
4396
4397 priv->ShortRetryLimit = 7;
4398 priv->LongRetryLimit = 7;
4399 priv->EarlyRxThreshold = 7;
4400
4401 priv->CSMethod = (0x01 << 29);
4402
4403 priv->TransmitConfig =
4404 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW
4405 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4406 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
4407 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
4408 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4409
4410 priv->ReceiveConfig =
4411 #ifdef CONFIG_RTL818X_S
4412 #else
4413 priv->CSMethod |
4414 #endif
4415 // RCR_ENMARP |
4416 RCR_AMF | RCR_ADF | //accept management/data
4417 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4418 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
4419 //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
4420 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4421 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4422 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4423
4424 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4425 IMR_THPDER | IMR_THPDOK |
4426 IMR_TVODER | IMR_TVODOK |
4427 IMR_TVIDER | IMR_TVIDOK |
4428 IMR_TBEDER | IMR_TBEDOK |
4429 IMR_TBKDER | IMR_TBKDOK |
4430 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4431 IMR_RER | IMR_ROK |
4432 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4433
4434 priv->InitialGain = 6;
4435 #endif
4436
4437 hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4438
4439 switch (hw_version){
4440 #ifdef CONFIG_RTL8185B
4441 case HW_VERID_R8185B_B:
4442 #ifdef CONFIG_RTL818X_S
4443 priv->card_8185 = VERSION_8187S_C;
4444 DMESG("MAC controller is a RTL8187SE b/g");
4445 priv->phy_ver = 2;
4446 break;
4447 #else
4448 DMESG("MAC controller is a RTL8185B b/g");
4449 priv->card_8185 = 3;
4450 priv->phy_ver = 2;
4451 break;
4452 #endif
4453 #endif
4454 case HW_VERID_R8185_ABC:
4455 DMESG("MAC controller is a RTL8185 b/g");
4456 priv->card_8185 = 1;
4457 /* you should not find a card with 8225 PHY ver < C*/
4458 priv->phy_ver = 2;
4459 break;
4460
4461 case HW_VERID_R8185_D:
4462 DMESG("MAC controller is a RTL8185 b/g (V. D)");
4463 priv->card_8185 = 2;
4464 /* you should not find a card with 8225 PHY ver < C*/
4465 priv->phy_ver = 2;
4466 break;
4467
4468 case HW_VERID_R8180_ABCD:
4469 DMESG("MAC controller is a RTL8180");
4470 priv->card_8185 = 0;
4471 break;
4472
4473 case HW_VERID_R8180_F:
4474 DMESG("MAC controller is a RTL8180 (v. F)");
4475 priv->card_8185 = 0;
4476 break;
4477
4478 default:
4479 DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4480 priv->card_8185 = 0;
4481 break;
4482 }
4483
4484 if(priv->card_8185){
4485 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4486 priv->ieee80211->short_slot = 1;
4487 }
4488 /* you should not found any 8185 Ver B Card */
4489 priv->card_8185_Bversion = 0;
4490
4491 #ifdef CONFIG_RTL8185B
4492 #ifdef CONFIG_RTL818X_S
4493 // just for sync 85
4494 priv->card_type = PCI;
4495 DMESG("This is a PCI NIC");
4496 #else
4497 config3 = read_nic_byte(dev, CONFIG3);
4498 if(config3 & 0x8){
4499 priv->card_type = CARDBUS;
4500 DMESG("This is a CARDBUS NIC");
4501 }
4502 else if( config3 & 0x4){
4503 priv->card_type = MINIPCI;
4504 DMESG("This is a MINI-PCI NIC");
4505 }else{
4506 priv->card_type = PCI;
4507 DMESG("This is a PCI NIC");
4508 }
4509 #endif
4510 #endif
4511 priv->enable_gpio0 = 0;
4512
4513 //by amy for antenna
4514 #ifdef CONFIG_RTL8185B
4515 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4516 DMESG("usValue is 0x%x\n",usValue);
4517 #ifdef CONFIG_RTL818X_S
4518 //3Read AntennaDiversity
4519 // SW Antenna Diversity.
4520 if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4521 {
4522 priv->EEPROMSwAntennaDiversity = false;
4523 //printk("EEPROM Disable SW Antenna Diversity\n");
4524 }
4525 else
4526 {
4527 priv->EEPROMSwAntennaDiversity = true;
4528 //printk("EEPROM Enable SW Antenna Diversity\n");
4529 }
4530 // Default Antenna to use.
4531 if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4532 {
4533 priv->EEPROMDefaultAntenna1 = false;
4534 //printk("EEPROM Default Antenna 0\n");
4535 }
4536 else
4537 {
4538 priv->EEPROMDefaultAntenna1 = true;
4539 //printk("EEPROM Default Antenna 1\n");
4540 }
4541
4542 //
4543 // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4544 //
4545 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4546 {// 0: default from EEPROM.
4547 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4548 }
4549 else
4550 {// 1:disable antenna diversity, 2: enable antenna diversity.
4551 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4552 }
4553 //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4554
4555
4556 //
4557 // Default antenna settings. Added by Roger, 2007.11.05.
4558 //
4559 if( priv->RegDefaultAntenna == 0)
4560 {// 0: default from EEPROM.
4561 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4562 }
4563 else
4564 {// 1: main, 2: aux.
4565 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4566 }
4567 //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4568 #endif
4569 #endif
4570 //by amy for antenna
4571 /* rtl8185 can calc plcp len in HW.*/
4572 priv->hw_plcp_len = 1;
4573
4574 priv->plcp_preamble_mode = 2;
4575 /*the eeprom type is stored in RCR register bit #6 */
4576 if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4577 priv->epromtype=EPROM_93c56;
4578 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4579 }else{
4580 priv->epromtype=EPROM_93c46;
4581 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4582 }
4583
4584 dev->get_stats = rtl8180_stats;
4585
4586 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4587 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4588 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4589 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4590 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4591 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4592 //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4593
4594
4595 for(i=1,j=0; i<14; i+=2,j++){
4596
4597 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4598 priv->chtxpwr[i]=word & 0xff;
4599 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4600 #ifdef DEBUG_EPROM
4601 DMESG("tx word %x:%x",j,word);
4602 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4603 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4604 #endif
4605 }
4606 if(priv->card_8185){
4607 for(i=1,j=0; i<14; i+=2,j++){
4608
4609 word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4610 priv->chtxpwr_ofdm[i]=word & 0xff;
4611 priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4612 #ifdef DEBUG_EPROM
4613 DMESG("ofdm tx word %x:%x",j,word);
4614 DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4615 DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4616 #endif
4617 }
4618 }
4619 //{by amy 080312
4620 //3Read crystal calibtration and thermal meter indication on 87SE.
4621
4622 // By SD3 SY's request. Added by Roger, 2007.12.11.
4623
4624 tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4625
4626 //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4627
4628 // Crystal calibration for Xin and Xout resp.
4629 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4630 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4631 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4632 priv->bXtalCalibration = true;
4633
4634 // Thermal meter reference indication.
4635 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4636 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4637 priv->bTxPowerTrack = true;
4638
4639 //by amy 080312}
4640 #ifdef CONFIG_RTL8185B
4641 word = eprom_read(dev,EPROM_TXPW_BASE);
4642 priv->cck_txpwr_base = word & 0xf;
4643 priv->ofdm_txpwr_base = (word>>4) & 0xf;
4644 #endif
4645
4646 version = eprom_read(dev,EPROM_VERSION);
4647 DMESG("EEPROM version %x",version);
4648 if( (!priv->card_8185) && version < 0x0101){
4649 DMESG ("EEPROM version too old, assuming defaults");
4650 DMESG ("If you see this message *plase* send your \
4651 DMESG output to andreamrl@tiscali.it THANKS");
4652 priv->digphy=1;
4653 priv->antb=0;
4654 priv->diversity=1;
4655 priv->cs_treshold=0xc;
4656 priv->rcr_csense=1;
4657 priv->rf_chip=RFCHIPID_PHILIPS;
4658 }else{
4659 if(!priv->card_8185){
4660 u8 rfparam = eprom_read(dev,RF_PARAM);
4661 DMESG("RfParam: %x",rfparam);
4662
4663 priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4664 priv->antb = rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4665
4666 priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4667 RF_PARAM_CARRIERSENSE_SHIFT;
4668
4669 priv->diversity =
4670 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4671 }else{
4672 priv->rcr_csense = 3;
4673 }
4674
4675 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4676
4677 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4678 }
4679
4680 #ifdef CONFIG_RTL8185B
4681 #ifdef CONFIG_RTL818X_S
4682 priv->rf_chip = RF_ZEBRA4;
4683 priv->rf_sleep = rtl8225z4_rf_sleep;
4684 priv->rf_wakeup = rtl8225z4_rf_wakeup;
4685 #else
4686 priv->rf_chip = RF_ZEBRA2;
4687 #endif
4688 //DMESG("Card reports RF frontend Realtek 8225z2");
4689 //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4690 //DMESGW("use it with care and at your own risk and");
4691 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4692
4693 priv->rf_close = rtl8225z2_rf_close;
4694 priv->rf_init = rtl8225z2_rf_init;
4695 priv->rf_set_chan = rtl8225z2_rf_set_chan;
4696 priv->rf_set_sens = NULL;
4697 //priv->rf_sleep = rtl8225_rf_sleep;
4698 //priv->rf_wakeup = rtl8225_rf_wakeup;
4699
4700 #else
4701 /* check RF frontend chipset */
4702 switch (priv->rf_chip) {
4703
4704 case RFCHIPID_RTL8225:
4705
4706 if(priv->card_8185){
4707 DMESG("Card reports RF frontend Realtek 8225");
4708 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4709 DMESGW("use it with care and at your own risk and");
4710 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4711
4712 priv->rf_close = rtl8225_rf_close;
4713 priv->rf_init = rtl8225_rf_init;
4714 priv->rf_set_chan = rtl8225_rf_set_chan;
4715 priv->rf_set_sens = NULL;
4716 priv->rf_sleep = rtl8225_rf_sleep;
4717 priv->rf_wakeup = rtl8225_rf_wakeup;
4718
4719 }else{
4720 DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
4721 DMESGW("This could not be... something went wrong....");
4722 return -ENODEV;
4723 }
4724 break;
4725
4726 case RFCHIPID_RTL8255:
4727 if(priv->card_8185){
4728 DMESG("Card reports RF frontend Realtek 8255");
4729 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4730 DMESGW("use it with care and at your own risk and");
4731 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4732
4733 priv->rf_close = rtl8255_rf_close;
4734 priv->rf_init = rtl8255_rf_init;
4735 priv->rf_set_chan = rtl8255_rf_set_chan;
4736 priv->rf_set_sens = NULL;
4737 priv->rf_sleep = NULL;
4738 priv->rf_wakeup = NULL;
4739
4740 }else{
4741 DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
4742 DMESGW("This could not be... something went wrong....");
4743 return -ENODEV;
4744 }
4745 break;
4746
4747
4748 case RFCHIPID_INTERSIL:
4749 DMESGW("Card reports RF frontend by Intersil.");
4750 DMESGW("This driver has NO support for this chipset.");
4751 return -ENODEV;
4752 break;
4753
4754 case RFCHIPID_RFMD:
4755 DMESGW("Card reports RF frontend by RFMD.");
4756 DMESGW("This driver has NO support for this chipset.");
4757 return -ENODEV;
4758 break;
4759
4760 case RFCHIPID_GCT:
4761 DMESGW("Card reports RF frontend by GCT.");
4762 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4763 DMESGW("use it with care and at your own risk and");
4764 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4765 priv->rf_close = gct_rf_close;
4766 priv->rf_init = gct_rf_init;
4767 priv->rf_set_chan = gct_rf_set_chan;
4768 priv->rf_set_sens = NULL;
4769 priv->rf_sleep = NULL;
4770 priv->rf_wakeup = NULL;
4771 break;
4772
4773 case RFCHIPID_MAXIM:
4774 DMESGW("Card reports RF frontend by MAXIM.");
4775 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4776 DMESGW("use it with care and at your own risk and");
4777 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4778 priv->rf_close = maxim_rf_close;
4779 priv->rf_init = maxim_rf_init;
4780 priv->rf_set_chan = maxim_rf_set_chan;
4781 priv->rf_set_sens = NULL;
4782 priv->rf_sleep = NULL;
4783 priv->rf_wakeup = NULL;
4784 break;
4785
4786 case RFCHIPID_PHILIPS:
4787 DMESG("Card reports RF frontend by Philips.");
4788 DMESG("OK! Philips SA2400 radio chipset is supported.");
4789 priv->rf_close = sa2400_rf_close;
4790 priv->rf_init = sa2400_rf_init;
4791 priv->rf_set_chan = sa2400_rf_set_chan;
4792 priv->rf_set_sens = sa2400_rf_set_sens;
4793 priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
4794 priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
4795 priv->rf_sleep = NULL;
4796 priv->rf_wakeup = NULL;
4797
4798 if(priv->digphy){
4799 DMESGW("Digital PHY found");
4800 DMESGW("Philips DIGITAL PHY is untested! *Please*\
4801 report success/failure to <andreamrl@tiscali.it>");
4802 }else{
4803 DMESG ("Analog PHY found");
4804 }
4805
4806 break;
4807
4808 default:
4809 DMESGW("Unknown RF module %x",priv->rf_chip);
4810 DMESGW("Exiting...");
4811 return -1;
4812
4813 }
4814 #endif
4815
4816
4817 if(!priv->card_8185){
4818 if(priv->antb)
4819 DMESG ("Antenna B is default antenna");
4820 else
4821 DMESG ("Antenna A is default antenna");
4822
4823 if(priv->diversity)
4824 DMESG ("Antenna diversity is enabled");
4825 else
4826 DMESG("Antenna diversity is disabled");
4827
4828 DMESG("Carrier sense %d",priv->rcr_csense);
4829 }
4830
4831 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4832 return -ENOMEM;
4833
4834 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4835 TX_MANAGEPRIORITY_RING_ADDR))
4836 return -ENOMEM;
4837
4838 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4839 TX_BKPRIORITY_RING_ADDR))
4840 return -ENOMEM;
4841
4842 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4843 TX_BEPRIORITY_RING_ADDR))
4844 return -ENOMEM;
4845
4846 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4847 TX_VIPRIORITY_RING_ADDR))
4848 return -ENOMEM;
4849
4850 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4851 TX_VOPRIORITY_RING_ADDR))
4852 return -ENOMEM;
4853
4854 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4855 TX_HIGHPRIORITY_RING_ADDR))
4856 return -ENOMEM;
4857
4858 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4859 TX_BEACON_RING_ADDR))
4860 return -ENOMEM;
4861
4862
4863 //priv->beacon_buf=NULL;
4864
4865 if(!priv->card_8185){
4866
4867 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4868 DMESG ("40-bit WEP is supported in hardware");
4869 else
4870 DMESG ("40-bit WEP is NOT supported in hardware");
4871
4872 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4873 DMESG ("104-bit WEP is supported in hardware");
4874 else
4875 DMESG ("104-bit WEP is NOT supported in hardware");
4876 }
4877 #if !defined(SA_SHIRQ)
4878 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4879 #else
4880 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4881 #endif
4882 DMESGE("Error allocating IRQ %d",dev->irq);
4883 return -1;
4884 }else{
4885 priv->irq=dev->irq;
4886 DMESG("IRQ %d",dev->irq);
4887 }
4888
4889 #ifdef DEBUG_EPROM
4890 dump_eprom(dev);
4891 #endif
4892
4893 return 0;
4894
4895 }
4896
4897
4898 void rtl8180_no_hw_wep(struct net_device *dev)
4899 {
4900 struct r8180_priv *priv = ieee80211_priv(dev);
4901
4902 if(!priv->card_8185)
4903 {
4904 u8 security;
4905
4906 security = read_nic_byte(dev, SECURITY);
4907 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4908 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4909
4910 write_nic_byte(dev, SECURITY, security);
4911
4912 }else{
4913
4914 //FIXME!!!
4915 }
4916 /*
4917 write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4918 (1<<TX_NOICV_SHIFT) );
4919 */
4920 // priv->ieee80211->hw_wep=0;
4921 }
4922
4923
4924 void rtl8180_set_hw_wep(struct net_device *dev)
4925 {
4926 struct r8180_priv *priv = ieee80211_priv(dev);
4927 u8 pgreg;
4928 u8 security;
4929 u32 key0_word4;
4930
4931 pgreg=read_nic_byte(dev, PGSELECT);
4932 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4933
4934 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4935 key0_word4 &= ~ 0xff;
4936 key0_word4 |= priv->key0[3]& 0xff;
4937 write_nic_dword(dev,KEY0,(priv->key0[0]));
4938 write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4939 write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4940 write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4941
4942 /*
4943 TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4944 */
4945
4946 security = read_nic_byte(dev,SECURITY);
4947 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4948 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4949 security &= ~ SECURITY_ENCRYP_MASK;
4950 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4951
4952 write_nic_byte(dev, SECURITY, security);
4953
4954 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4955 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4956 read_nic_dword(dev,KEY0));
4957
4958 //priv->ieee80211->hw_wep=1;
4959 }
4960
4961
4962 void rtl8185_rf_pins_enable(struct net_device *dev)
4963 {
4964 // u16 tmp;
4965 // tmp = read_nic_word(dev, RFPinsEnable);
4966 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4967 // write_nic_word(dev, RFPinsEnable,7 | tmp);
4968 }
4969
4970
4971 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4972 {
4973 u8 conf3;
4974
4975 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4976
4977 conf3 = read_nic_byte(dev, CONFIG3);
4978 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4979 write_nic_dword(dev, ANAPARAM2, a);
4980
4981 conf3 = read_nic_byte(dev, CONFIG3);
4982 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4983 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4984
4985 }
4986
4987
4988 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4989 {
4990 u8 conf3;
4991
4992 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4993
4994 conf3 = read_nic_byte(dev, CONFIG3);
4995 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4996 write_nic_dword(dev, ANAPARAM, a);
4997
4998 conf3 = read_nic_byte(dev, CONFIG3);
4999 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
5000 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5001 }
5002
5003
5004 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
5005 {
5006 write_nic_byte(dev, TX_ANTENNA, ant);
5007 force_pci_posting(dev);
5008 mdelay(1);
5009 }
5010
5011
5012 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
5013 {
5014 //u8 phyr;
5015 u32 phyw;
5016 //int i;
5017
5018 adr |= 0x80;
5019
5020 phyw= ((data<<8) | adr);
5021 #if 0
5022
5023 write_nic_dword(dev, PHY_ADR, phyw);
5024
5025 //read_nic_dword(dev, PHY_ADR);
5026 for(i=0;i<10;i++){
5027 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
5028 phyr = read_nic_byte(dev, PHY_READ);
5029 if(phyr == (data&0xff)) break;
5030
5031 }
5032 #else
5033 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
5034 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
5035 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
5036 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
5037 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
5038 #endif
5039 /* this is ok to fail when we write AGC table. check for AGC table might be
5040 * done by masking with 0x7f instead of 0xff
5041 */
5042 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
5043 }
5044
5045
5046 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
5047 {
5048 data = data & 0xff;
5049 rtl8185_write_phy(dev, adr, data);
5050 }
5051
5052
5053 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
5054 {
5055 data = data & 0xff;
5056 rtl8185_write_phy(dev, adr, data | 0x10000);
5057 }
5058
5059
5060 /* 70*3 = 210 ms
5061 * I hope this is enougth
5062 */
5063 #define MAX_PHY 70
5064 void write_phy(struct net_device *dev, u8 adr, u8 data)
5065 {
5066 u32 phy;
5067 int i;
5068
5069 phy = 0xff0000;
5070 phy |= adr;
5071 phy |= 0x80; /* this should enable writing */
5072 phy |= (data<<8);
5073
5074 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword
5075 write_nic_dword(dev,PHY_ADR, phy);
5076
5077 phy= 0xffff00;
5078 phy |= adr;
5079
5080 write_nic_dword(dev,PHY_ADR, phy);
5081 for(i=0;i<MAX_PHY;i++){
5082 phy=read_nic_dword(dev,PHY_ADR);
5083 phy= phy & 0xff0000;
5084 phy= phy >> 16;
5085 if(phy == data){ //SUCCESS!
5086 force_pci_posting(dev);
5087 mdelay(3); //random value
5088 #ifdef DEBUG_BB
5089 DMESG("Phy wr %x,%x",adr,data);
5090 #endif
5091 return;
5092 }else{
5093 force_pci_posting(dev);
5094 mdelay(3); //random value
5095 }
5096 }
5097 DMESGW ("Phy writing %x %x failed!", adr,data);
5098 }
5099
5100 void rtl8185_set_rate(struct net_device *dev)
5101 {
5102 int i;
5103 u16 word;
5104 int basic_rate,min_rr_rate,max_rr_rate;
5105
5106 // struct r8180_priv *priv = ieee80211_priv(dev);
5107
5108 //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
5109 // priv->ieee80211->state == IEEE80211_LINKED){
5110 basic_rate = ieeerate2rtlrate(240);
5111 min_rr_rate = ieeerate2rtlrate(60);
5112 max_rr_rate = ieeerate2rtlrate(240);
5113
5114 //
5115 // }else{
5116 // basic_rate = ieeerate2rtlrate(20);
5117 // min_rr_rate = ieeerate2rtlrate(10);
5118 // max_rr_rate = ieeerate2rtlrate(110);
5119 // }
5120
5121 write_nic_byte(dev, RESP_RATE,
5122 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
5123
5124 word = read_nic_word(dev, BRSR);
5125 word &= ~BRSR_MBR_8185;
5126
5127
5128 for(i=0;i<=basic_rate;i++)
5129 word |= (1<<i);
5130
5131 write_nic_word(dev, BRSR, word);
5132 //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
5133 }
5134
5135
5136
5137 void rtl8180_adapter_start(struct net_device *dev)
5138 {
5139 struct r8180_priv *priv = ieee80211_priv(dev);
5140 u32 anaparam;
5141 u16 word;
5142 u8 config3;
5143 // int i;
5144
5145 rtl8180_rtx_disable(dev);
5146 rtl8180_reset(dev);
5147
5148 /* seems that 0xffff or 0xafff will cause
5149 * HW interrupt line crash
5150 */
5151
5152 //priv->irq_mask = 0xafff;
5153 // priv->irq_mask = 0x4fcf;
5154
5155 /* enable beacon timeout, beacon TX ok and err
5156 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
5157 * RX ok and ERR, and GP timer */
5158 priv->irq_mask = 0x6fcf;
5159
5160 priv->dma_poll_mask = 0;
5161
5162 rtl8180_beacon_tx_disable(dev);
5163
5164 if(priv->card_type == CARDBUS ){
5165 config3=read_nic_byte(dev, CONFIG3);
5166 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
5167 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
5168 read_nic_word(dev, FEMR));
5169 }
5170 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5171 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
5172 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
5173 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5174
5175 rtl8180_update_msr(dev);
5176
5177 if(!priv->card_8185){
5178 anaparam = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
5179 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
5180
5181 rtl8180_set_anaparam(dev,anaparam);
5182 }
5183 /* These might be unnecessary since we do in rx_enable / tx_enable */
5184 fix_rx_fifo(dev);
5185 fix_tx_fifo(dev);
5186 /*set_nic_rxring(dev);
5187 set_nic_txring(dev);*/
5188
5189 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5190
5191 /*
5192 The following is very strange. seems to be that 1 means test mode,
5193 but we need to acknolwledges the nic when a packet is ready
5194 altought we set it to 0
5195 */
5196
5197 write_nic_byte(dev,
5198 CONFIG2, read_nic_byte(dev,CONFIG2) &~\
5199 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
5200 //^the nic isn't in test mode
5201 if(priv->card_8185)
5202 write_nic_byte(dev,
5203 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
5204
5205 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5206
5207 write_nic_dword(dev,INT_TIMEOUT,0);
5208 #ifdef DEBUG_REGISTERS
5209 rtl8180_dump_reg(dev);
5210 #endif
5211
5212 if(!priv->card_8185)
5213 {
5214 /*
5215 experimental - this might be needed to calibrate AGC,
5216 anyway it shouldn't hurt
5217 */
5218 write_nic_byte(dev, CONFIG5,
5219 read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
5220 read_nic_byte(dev, CONFIG5);
5221 udelay(15);
5222 write_nic_byte(dev, CONFIG5,
5223 read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
5224 }else{
5225
5226 write_nic_byte(dev, WPA_CONFIG, 0);
5227 //write_nic_byte(dev, TESTR, 0xd);
5228 }
5229
5230 rtl8180_no_hw_wep(dev);
5231
5232 if(priv->card_8185){
5233 rtl8185_set_rate(dev);
5234 write_nic_byte(dev, RATE_FALLBACK, 0x81);
5235 // write_nic_byte(dev, 0xdf, 0x15);
5236 }else{
5237 word = read_nic_word(dev, BRSR);
5238 word &= ~BRSR_MBR;
5239 word &= ~BRSR_BPLCP;
5240 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
5241 //by amy
5242 word |= 0x0f;
5243 //by amy
5244 write_nic_word(dev, BRSR, word);
5245 }
5246
5247
5248 if(priv->card_8185){
5249 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
5250
5251 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
5252 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5253 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
5254 |(1<<CONFIG3_CLKRUN_SHIFT));
5255 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5256
5257 }
5258
5259 priv->rf_init(dev);
5260
5261 if(priv->rf_set_sens != NULL)
5262 priv->rf_set_sens(dev,priv->sens);
5263 rtl8180_irq_enable(dev);
5264
5265 netif_start_queue(dev);
5266 /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
5267
5268 DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
5269
5270 DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
5271 if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
5272 if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
5273 if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
5274 }
5275
5276
5277
5278 /* this configures registers for beacon tx and enables it via
5279 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
5280 * be used to stop beacon transmission
5281 */
5282 void rtl8180_start_tx_beacon(struct net_device *dev)
5283 {
5284 // struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5285 u16 word;
5286 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5287
5288 DMESG("Enabling beacon TX");
5289 //write_nic_byte(dev, 0x42,0xe6);// TCR
5290 // set_nic_txring(dev);
5291 // fix_tx_fifo(dev);
5292 rtl8180_prepare_beacon(dev);
5293 rtl8180_irq_disable(dev);
5294 rtl8180_beacon_tx_enable(dev);
5295 #if 0
5296 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5297 //write_nic_byte(dev,0x9d,0x20); //DMA Poll
5298 //write_nic_word(dev,0x7a,0);
5299 //write_nic_word(dev,0x7a,0x8000);
5300
5301 #if 0
5302 word = read_nic_word(dev, BcnItv);
5303 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
5304 word |= priv->ieee80211->current_network.beacon_interval;//0x64;
5305 write_nic_word(dev, BcnItv, word);
5306 #endif
5307 #endif
5308 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
5309 write_nic_word(dev, AtimWnd,word);// word |=
5310 //priv->ieee80211->current_network.atim_window);
5311
5312 word = read_nic_word(dev, BintrItv);
5313 word &= ~BintrItv_BintrItv;
5314 word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
5315 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
5316 // FIXME: check if correct ^^ worked with 0x3e8;
5317 */
5318 write_nic_word(dev, BintrItv, word);
5319
5320
5321 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5322
5323 // rtl8180_beacon_tx_enable(dev);
5324 #ifdef CONFIG_RTL8185B
5325 rtl8185b_irq_enable(dev);
5326 #else
5327 rtl8180_irq_enable(dev);
5328 #endif
5329 /* VV !!!!!!!!!! VV*/
5330 /*
5331 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5332 write_nic_byte(dev,0x9d,0x00);
5333 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5334 */
5335 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5336
5337 }
5338
5339
5340
5341 /***************************************************************************
5342 -------------------------------NET STUFF---------------------------
5343 ***************************************************************************/
5344 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
5345 {
5346 struct r8180_priv *priv = ieee80211_priv(dev);
5347
5348 return &priv->ieee80211->stats;
5349 }
5350 //
5351 // Change current and default preamble mode.
5352 // 2005.01.06, by rcnjko.
5353 //
5354 bool
5355 MgntActSet_802_11_PowerSaveMode(
5356 struct r8180_priv *priv,
5357 RT_PS_MODE rtPsMode
5358 )
5359 {
5360
5361 // Currently, we do not change power save mode on IBSS mode.
5362 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5363 {
5364 return false;
5365 }
5366
5367 //
5368 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
5369 // some AP will not response to our mgnt frames with PwrMgt bit set,
5370 // e.g. cannot associate the AP.
5371 // So I commented out it. 2005.02.16, by rcnjko.
5372 //
5373 // // Change device's power save mode.
5374 // Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
5375
5376 // Update power save mode configured.
5377 // priv->dot11PowerSaveMode = rtPsMode;
5378 priv->ieee80211->ps = rtPsMode;
5379 // Determine ListenInterval.
5380 #if 0
5381 if(priv->dot11PowerSaveMode == eMaxPs)
5382 {
5383 priv->ieee80211->ListenInterval = 10;
5384 }
5385 else
5386 {
5387 priv->ieee80211->ListenInterval = 2;
5388 }
5389 #endif
5390 return true;
5391 }
5392
5393 //================================================================================
5394 // Leisure Power Save in linked state.
5395 //================================================================================
5396
5397 //
5398 // Description:
5399 // Enter the leisure power save mode.
5400 //
5401 void
5402 LeisurePSEnter(
5403 struct r8180_priv *priv
5404 )
5405 {
5406 if (priv->bLeisurePs)
5407 {
5408 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
5409 {
5410 //printk("----Enter PS\n");
5411 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
5412 }
5413 }
5414 }
5415
5416
5417 //
5418 // Description:
5419 // Leave the leisure power save mode.
5420 //
5421 void
5422 LeisurePSLeave(
5423 struct r8180_priv *priv
5424 )
5425 {
5426 if (priv->bLeisurePs)
5427 {
5428 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
5429 {
5430 //printk("----Leave PS\n");
5431 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
5432 }
5433 }
5434 }
5435 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5436 void rtl8180_hw_wakeup_wq (struct work_struct *work)
5437 {
5438 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5439 // struct ieee80211_device * ieee = (struct ieee80211_device*)
5440 // container_of(work, struct ieee80211_device, watch_dog_wq);
5441 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5442 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
5443 struct net_device *dev = ieee->dev;
5444 #else
5445 void rtl8180_hw_wakeup_wq(struct net_device *dev)
5446 {
5447 struct r8180_priv *priv = ieee80211_priv(dev);
5448 #endif
5449
5450 // printk("dev is %d\n",dev);
5451 // printk("&*&(^*(&(&=========>%s()\n", __func__);
5452 rtl8180_hw_wakeup(dev);
5453
5454 }
5455
5456 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5457 void rtl8180_hw_sleep_wq (struct work_struct *work)
5458 {
5459 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5460 // struct ieee80211_device * ieee = (struct ieee80211_device*)
5461 // container_of(work, struct ieee80211_device, watch_dog_wq);
5462 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5463 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
5464 struct net_device *dev = ieee->dev;
5465 #else
5466 void rtl8180_hw_sleep_wq(struct net_device *dev)
5467 {
5468 struct r8180_priv *priv = ieee80211_priv(dev);
5469 #endif
5470
5471 rtl8180_hw_sleep_down(dev);
5472 }
5473
5474 //YJ,add,080828,for KeepAlive
5475 static void MgntLinkKeepAlive(struct r8180_priv *priv )
5476 {
5477 if (priv->keepAliveLevel == 0)
5478 return;
5479
5480 if(priv->ieee80211->state == IEEE80211_LINKED)
5481 {
5482 //
5483 // Keep-Alive.
5484 //
5485 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
5486
5487 if ( (priv->keepAliveLevel== 2) ||
5488 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
5489 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
5490 )
5491 {
5492 priv->link_detect.IdleCount++;
5493
5494 //
5495 // Send a Keep-Alive packet packet to AP if we had been idle for a while.
5496 //
5497 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
5498 {
5499 priv->link_detect.IdleCount = 0;
5500 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5501 }
5502 }
5503 else
5504 {
5505 priv->link_detect.IdleCount = 0;
5506 }
5507 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5508 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5509 }
5510 }
5511 //YJ,add,080828,for KeepAlive,end
5512
5513 static u8 read_acadapter_file(char *filename);
5514 void rtl8180_watch_dog(struct net_device *dev)
5515 {
5516 struct r8180_priv *priv = ieee80211_priv(dev);
5517 bool bEnterPS = false;
5518 bool bBusyTraffic = false;
5519 u32 TotalRxNum = 0;
5520 u16 SlotIndex = 0;
5521 u16 i = 0;
5522 #ifdef ENABLE_IPS
5523 if(priv->ieee80211->actscanning == false){
5524 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5525 IPSEnter(dev);
5526 }
5527 }
5528 #endif
5529 //YJ,add,080828,for link state check
5530 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5531 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5532 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5533 for( i=0; i<priv->link_detect.SlotNum; i++ )
5534 TotalRxNum+= priv->link_detect.RxFrameNum[i];
5535 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5536 if(TotalRxNum == 0){
5537 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5538 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5539 }
5540 }
5541
5542 //YJ,add,080828,for KeepAlive
5543 MgntLinkKeepAlive(priv);
5544
5545 //YJ,add,080828,for LPS
5546 #ifdef ENABLE_LPS
5547 if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5548 {
5549 //Turn on LeisurePS on battery power
5550 //printk("!!!!!On battery power\n");
5551 priv->bLeisurePs = true;
5552 }
5553 else if(priv->PowerProfile == POWER_PROFILE_AC )
5554 {
5555 // Turn off LeisurePS on AC power
5556 //printk("----On AC power\n");
5557 LeisurePSLeave(priv);
5558 priv->bLeisurePs= false;
5559 }
5560 #endif
5561
5562 #if 0
5563 #ifndef ENABLE_LPS
5564 if(priv->ieee80211->state == IEEE80211_LINKED){
5565 if( priv->NumRxOkInPeriod> 666 ||
5566 priv->NumTxOkInPeriod > 666 ) {
5567 bBusyTraffic = true;
5568 }
5569 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5570 bEnterPS= true;
5571 }
5572 if(bEnterPS) {
5573 LeisurePSEnter(priv);
5574 }
5575 else {
5576 LeisurePSLeave(priv);
5577 }
5578 }
5579 else {
5580 LeisurePSLeave(priv);
5581 }
5582 #endif
5583 priv->NumRxOkInPeriod = 0;
5584 priv->NumTxOkInPeriod = 0;
5585 priv->ieee80211->NumRxData = 0;
5586 #else
5587 #ifdef ENABLE_LPS
5588 if(priv->ieee80211->state == IEEE80211_LINKED){
5589 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5590 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5591 if( priv->link_detect.NumRxOkInPeriod> 666 ||
5592 priv->link_detect.NumTxOkInPeriod> 666 ) {
5593 bBusyTraffic = true;
5594 }
5595 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5596 || (priv->link_detect.NumRxOkInPeriod > 2)) {
5597 bEnterPS= false;
5598 }
5599 else {
5600 bEnterPS= true;
5601 }
5602
5603 if(bEnterPS) {
5604 LeisurePSEnter(priv);
5605 }
5606 else {
5607 LeisurePSLeave(priv);
5608 }
5609 }
5610 else{
5611 LeisurePSLeave(priv);
5612 }
5613 #endif
5614 priv->link_detect.bBusyTraffic = bBusyTraffic;
5615 priv->link_detect.NumRxOkInPeriod = 0;
5616 priv->link_detect.NumTxOkInPeriod = 0;
5617 priv->ieee80211->NumRxDataInPeriod = 0;
5618 priv->ieee80211->NumRxBcnInPeriod = 0;
5619 #endif
5620 }
5621 int _rtl8180_up(struct net_device *dev)
5622 {
5623 struct r8180_priv *priv = ieee80211_priv(dev);
5624 //int i;
5625
5626 priv->up=1;
5627
5628 DMESG("Bringing up iface");
5629 #ifdef CONFIG_RTL8185B
5630 rtl8185b_adapter_start(dev);
5631 rtl8185b_rx_enable(dev);
5632 rtl8185b_tx_enable(dev);
5633 #else
5634 rtl8180_adapter_start(dev);
5635 rtl8180_rx_enable(dev);
5636 rtl8180_tx_enable(dev);
5637 #endif
5638 #ifdef ENABLE_IPS
5639 if(priv->bInactivePs){
5640 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5641 IPSLeave(dev);
5642 }
5643 #endif
5644 //by amy 080312
5645 #ifdef RATE_ADAPT
5646 timer_rate_adaptive((unsigned long)dev);
5647 #endif
5648 //by amy 080312
5649 watch_dog_adaptive((unsigned long)dev);
5650 #ifdef SW_ANTE
5651 if(priv->bSwAntennaDiverity)
5652 SwAntennaDiversityTimerCallback(dev);
5653 #endif
5654 // IPSEnter(dev);
5655 ieee80211_softmac_start_protocol(priv->ieee80211);
5656
5657 //Add for RF power on power off by lizhaoming 080512
5658 // priv->eRFPowerState = eRfOn;
5659 // printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5660 // queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5661
5662 return 0;
5663 }
5664
5665
5666 int rtl8180_open(struct net_device *dev)
5667 {
5668 struct r8180_priv *priv = ieee80211_priv(dev);
5669 int ret;
5670
5671 down(&priv->wx_sem);
5672 ret = rtl8180_up(dev);
5673 up(&priv->wx_sem);
5674 return ret;
5675
5676 }
5677
5678
5679 int rtl8180_up(struct net_device *dev)
5680 {
5681 struct r8180_priv *priv = ieee80211_priv(dev);
5682
5683 if (priv->up == 1) return -1;
5684
5685 return _rtl8180_up(dev);
5686 }
5687
5688
5689 int rtl8180_close(struct net_device *dev)
5690 {
5691 struct r8180_priv *priv = ieee80211_priv(dev);
5692 int ret;
5693
5694 down(&priv->wx_sem);
5695 ret = rtl8180_down(dev);
5696 up(&priv->wx_sem);
5697
5698 return ret;
5699
5700 }
5701
5702 int rtl8180_down(struct net_device *dev)
5703 {
5704 struct r8180_priv *priv = ieee80211_priv(dev);
5705
5706 if (priv->up == 0) return -1;
5707
5708 priv->up=0;
5709
5710 ieee80211_softmac_stop_protocol(priv->ieee80211);
5711 /* FIXME */
5712 if (!netif_queue_stopped(dev))
5713 netif_stop_queue(dev);
5714 rtl8180_rtx_disable(dev);
5715 rtl8180_irq_disable(dev);
5716 del_timer_sync(&priv->watch_dog_timer);
5717 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5718 //{by amy 080312
5719 del_timer_sync(&priv->rateadapter_timer);
5720 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5721 //by amy 080312}
5722 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5723 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5724 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5725 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5726 del_timer_sync(&priv->SwAntennaDiversityTimer);
5727 SetZebraRFPowerState8185(dev,eRfOff);
5728 //ieee80211_softmac_stop_protocol(priv->ieee80211);
5729 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5730 priv->ieee80211->state = IEEE80211_NOLINK;
5731 return 0;
5732 }
5733
5734 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5735 void rtl8180_restart_wq(struct work_struct *work)
5736 {
5737 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5738 struct net_device *dev = priv->dev;
5739 #else
5740 void rtl8180_restart_wq(struct net_device *dev)
5741 {
5742 struct r8180_priv *priv = ieee80211_priv(dev);
5743 #endif
5744 down(&priv->wx_sem);
5745
5746 rtl8180_commit(dev);
5747
5748 up(&priv->wx_sem);
5749 }
5750
5751 void rtl8180_restart(struct net_device *dev)
5752 {
5753 struct r8180_priv *priv = ieee80211_priv(dev);
5754 //rtl8180_commit(dev);
5755 schedule_work(&priv->reset_wq);
5756 //DMESG("TXTIMEOUT");
5757 }
5758
5759
5760 void rtl8180_commit(struct net_device *dev)
5761 {
5762 struct r8180_priv *priv = ieee80211_priv(dev);
5763
5764 if (priv->up == 0) return ;
5765 //+by amy 080312
5766 del_timer_sync(&priv->watch_dog_timer);
5767 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5768 //{by amy 080312
5769 //by amy for rate adaptive
5770 del_timer_sync(&priv->rateadapter_timer);
5771 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5772 //by amy for rate adaptive
5773 //by amy 080312}
5774 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5775 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5776 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5777 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5778 del_timer_sync(&priv->SwAntennaDiversityTimer);
5779 ieee80211_softmac_stop_protocol(priv->ieee80211);
5780 rtl8180_irq_disable(dev);
5781 rtl8180_rtx_disable(dev);
5782 _rtl8180_up(dev);
5783 }
5784
5785
5786 static void r8180_set_multicast(struct net_device *dev)
5787 {
5788 struct r8180_priv *priv = ieee80211_priv(dev);
5789 short promisc;
5790
5791 //down(&priv->wx_sem);
5792
5793 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5794
5795 if (promisc != priv->promisc)
5796 rtl8180_restart(dev);
5797
5798 priv->promisc = promisc;
5799
5800 //up(&priv->wx_sem);
5801 }
5802
5803 #if 0
5804 /* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5805 int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5806 {
5807 struct r8180_priv *priv = ieee80211_priv(dev);
5808 int ret;
5809 unsigned long flags;
5810
5811 spin_lock_irqsave(&priv->tx_lock,flags);
5812 ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5813 spin_unlock_irqrestore(&priv->tx_lock,flags);
5814 return ret;
5815 }
5816 #endif
5817
5818 int r8180_set_mac_adr(struct net_device *dev, void *mac)
5819 {
5820 struct r8180_priv *priv = ieee80211_priv(dev);
5821 struct sockaddr *addr = mac;
5822
5823 down(&priv->wx_sem);
5824
5825 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5826
5827 if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5828 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5829
5830 if (priv->up) {
5831 rtl8180_down(dev);
5832 rtl8180_up(dev);
5833 }
5834
5835 up(&priv->wx_sem);
5836
5837 return 0;
5838 }
5839
5840 /* based on ipw2200 driver */
5841 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5842 {
5843 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5844
5845 struct iwreq *wrq = (struct iwreq *) rq;
5846 int ret=-1;
5847 switch (cmd) {
5848 case RTL_IOCTL_WPA_SUPPLICANT:
5849 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5850 return ret;
5851
5852 default:
5853 return -EOPNOTSUPP;
5854 }
5855
5856 return -EOPNOTSUPP;
5857 }
5858
5859
5860
5861 /****************************************************************************
5862 -----------------------------PCI STUFF---------------------------
5863 *****************************************************************************/
5864
5865
5866 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5867 const struct pci_device_id *id)
5868 {
5869 unsigned long ioaddr = 0;
5870 struct net_device *dev = NULL;
5871 struct r8180_priv *priv= NULL;
5872 //u8 *ptr;
5873 u8 unit = 0;
5874
5875 #ifdef CONFIG_RTL8180_IO_MAP
5876 unsigned long pio_start, pio_len, pio_flags;
5877 #else
5878 unsigned long pmem_start, pmem_len, pmem_flags;
5879 #endif //end #ifdef RTL_IO_MAP
5880
5881 DMESG("Configuring chip resources");
5882
5883 if( pci_enable_device (pdev) ){
5884 DMESG("Failed to enable PCI device");
5885 return -EIO;
5886 }
5887
5888 pci_set_master(pdev);
5889 //pci_set_wmi(pdev);
5890 pci_set_dma_mask(pdev, 0xffffff00ULL);
5891 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5892 dev = alloc_ieee80211(sizeof(struct r8180_priv));
5893 if (!dev)
5894 return -ENOMEM;
5895 priv = ieee80211_priv(dev);
5896 priv->ieee80211 = netdev_priv(dev);
5897
5898 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
5899 SET_MODULE_OWNER(dev);
5900 #endif
5901 pci_set_drvdata(pdev, dev);
5902 SET_NETDEV_DEV(dev, &pdev->dev);
5903
5904 priv = ieee80211_priv(dev);
5905 // memset(priv,0,sizeof(struct r8180_priv));
5906 priv->pdev=pdev;
5907
5908
5909 #ifdef CONFIG_RTL8180_IO_MAP
5910
5911 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5912 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5913 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5914
5915 if (!(pio_flags & IORESOURCE_IO)) {
5916 DMESG("region #0 not a PIO resource, aborting");
5917 goto fail;
5918 }
5919
5920 //DMESG("IO space @ 0x%08lx", pio_start );
5921 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5922 DMESG("request_region failed!");
5923 goto fail;
5924 }
5925
5926 ioaddr = pio_start;
5927 dev->base_addr = ioaddr; // device I/O address
5928
5929 #else
5930
5931 pmem_start = pci_resource_start(pdev, 1);
5932 pmem_len = pci_resource_len(pdev, 1);
5933 pmem_flags = pci_resource_flags (pdev, 1);
5934
5935 if (!(pmem_flags & IORESOURCE_MEM)) {
5936 DMESG("region #1 not a MMIO resource, aborting");
5937 goto fail;
5938 }
5939
5940 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5941 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5942 DMESG("request_mem_region failed!");
5943 goto fail;
5944 }
5945
5946
5947 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5948 if( ioaddr == (unsigned long)NULL ){
5949 DMESG("ioremap failed!");
5950 // release_mem_region( pmem_start, pmem_len );
5951 goto fail1;
5952 }
5953
5954 dev->mem_start = ioaddr; // shared mem start
5955 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5956
5957 #endif //end #ifdef RTL_IO_MAP
5958
5959 #ifdef CONFIG_RTL8185B
5960 //pci_read_config_byte(pdev, 0x05, ptr);
5961 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5962 pci_read_config_byte(pdev, 0x05, &unit);
5963 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5964 #endif
5965
5966 dev->irq = pdev->irq;
5967 priv->irq = 0;
5968
5969 dev->open = rtl8180_open;
5970 dev->stop = rtl8180_close;
5971 //dev->hard_start_xmit = ieee80211_xmit;
5972 dev->tx_timeout = rtl8180_restart;
5973 dev->wireless_handlers = &r8180_wx_handlers_def;
5974 dev->do_ioctl = rtl8180_ioctl;
5975 dev->set_multicast_list = r8180_set_multicast;
5976 dev->set_mac_address = r8180_set_mac_adr;
5977
5978 #if WIRELESS_EXT >= 12
5979 #if WIRELESS_EXT < 17
5980 dev->get_wireless_stats = r8180_get_wireless_stats;
5981 #endif
5982 dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
5983 #endif
5984
5985 dev->type=ARPHRD_ETHER;
5986 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5987
5988 if (dev_alloc_name(dev, ifname) < 0){
5989 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5990 ifname = "wlan%d";
5991 // ifname = "ath%d";
5992 dev_alloc_name(dev, ifname);
5993 }
5994
5995
5996 if(rtl8180_init(dev)!=0){
5997 DMESG("Initialization failed");
5998 goto fail1;
5999 }
6000
6001 netif_carrier_off(dev);
6002
6003 register_netdev(dev);
6004
6005 rtl8180_proc_init_one(dev);
6006
6007 DMESG("Driver probe completed\n");
6008 return 0;
6009
6010 fail1:
6011
6012 #ifdef CONFIG_RTL8180_IO_MAP
6013
6014 if( dev->base_addr != 0 ){
6015
6016 release_region(dev->base_addr,
6017 pci_resource_len(pdev, 0) );
6018 }
6019 #else
6020 if( dev->mem_start != (unsigned long)NULL ){
6021 iounmap( (void *)dev->mem_start );
6022 release_mem_region( pci_resource_start(pdev, 1),
6023 pci_resource_len(pdev, 1) );
6024 }
6025 #endif //end #ifdef RTL_IO_MAP
6026
6027
6028 fail:
6029 if(dev){
6030
6031 if (priv->irq) {
6032 free_irq(dev->irq, dev);
6033 dev->irq=0;
6034 }
6035 free_ieee80211(dev);
6036 }
6037
6038 pci_disable_device(pdev);
6039
6040 DMESG("wlan driver load failed\n");
6041 pci_set_drvdata(pdev, NULL);
6042 return -ENODEV;
6043
6044 }
6045
6046
6047 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
6048 {
6049 struct r8180_priv *priv;
6050 struct net_device *dev = pci_get_drvdata(pdev);
6051 if(dev){
6052
6053 unregister_netdev(dev);
6054
6055 priv=ieee80211_priv(dev);
6056
6057 rtl8180_proc_remove_one(dev);
6058 rtl8180_down(dev);
6059 priv->rf_close(dev);
6060 rtl8180_reset(dev);
6061 //rtl8180_rtx_disable(dev);
6062 //rtl8180_irq_disable(dev);
6063 mdelay(10);
6064 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
6065 //force_pci_posting(dev);
6066 //mdelay(10);
6067
6068 if(priv->irq){
6069
6070 DMESG("Freeing irq %d",dev->irq);
6071 free_irq(dev->irq, dev);
6072 priv->irq=0;
6073
6074 }
6075
6076 free_rx_desc_ring(dev);
6077 free_tx_desc_rings(dev);
6078 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6079
6080 #ifdef CONFIG_RTL8180_IO_MAP
6081
6082 if( dev->base_addr != 0 ){
6083
6084 release_region(dev->base_addr,
6085 pci_resource_len(pdev, 0) );
6086 }
6087 #else
6088 if( dev->mem_start != (unsigned long)NULL ){
6089 iounmap( (void *)dev->mem_start );
6090 release_mem_region( pci_resource_start(pdev, 1),
6091 pci_resource_len(pdev, 1) );
6092 }
6093 #endif /*end #ifdef RTL_IO_MAP*/
6094
6095 free_ieee80211(dev);
6096 }
6097 pci_disable_device(pdev);
6098
6099 DMESG("wlan driver removed\n");
6100 }
6101
6102
6103 /* fun with the built-in ieee80211 stack... */
6104 extern int ieee80211_crypto_init(void);
6105 extern void ieee80211_crypto_deinit(void);
6106 extern int ieee80211_crypto_tkip_init(void);
6107 extern void ieee80211_crypto_tkip_exit(void);
6108 extern int ieee80211_crypto_ccmp_init(void);
6109 extern void ieee80211_crypto_ccmp_exit(void);
6110 extern int ieee80211_crypto_wep_init(void);
6111 extern void ieee80211_crypto_wep_exit(void);
6112
6113 static int __init rtl8180_pci_module_init(void)
6114 {
6115 int ret;
6116
6117 ret = ieee80211_crypto_init();
6118 if (ret) {
6119 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
6120 return ret;
6121 }
6122 ret = ieee80211_crypto_tkip_init();
6123 if (ret) {
6124 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
6125 return ret;
6126 }
6127 ret = ieee80211_crypto_ccmp_init();
6128 if (ret) {
6129 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
6130 return ret;
6131 }
6132 ret = ieee80211_crypto_wep_init();
6133 if (ret) {
6134 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
6135 return ret;
6136 }
6137
6138 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
6139 / RTL8185 based WLAN cards\n");
6140 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
6141 DMESG("Initializing module");
6142 DMESG("Wireless extensions version %d", WIRELESS_EXT);
6143 rtl8180_proc_module_init();
6144
6145 #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
6146 if(0!=pci_module_init(&rtl8180_pci_driver))
6147 #else
6148 if(0!=pci_register_driver(&rtl8180_pci_driver))
6149 #endif
6150 //if(0!=pci_module_init(&rtl8180_pci_driver))
6151 {
6152 DMESG("No device found");
6153 /*pci_unregister_driver (&rtl8180_pci_driver);*/
6154 return -ENODEV;
6155 }
6156 return 0;
6157 }
6158
6159
6160 static void __exit rtl8180_pci_module_exit(void)
6161 {
6162 pci_unregister_driver (&rtl8180_pci_driver);
6163 rtl8180_proc_module_remove();
6164 ieee80211_crypto_tkip_exit();
6165 ieee80211_crypto_ccmp_exit();
6166 ieee80211_crypto_wep_exit();
6167 ieee80211_crypto_deinit();
6168 DMESG("Exiting");
6169 }
6170
6171
6172 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
6173 {
6174 unsigned long flags;
6175 short enough_desc;
6176 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6177
6178 spin_lock_irqsave(&priv->tx_lock,flags);
6179 enough_desc = check_nic_enought_desc(dev,pri);
6180 spin_unlock_irqrestore(&priv->tx_lock,flags);
6181
6182 if(enough_desc)
6183 ieee80211_wake_queue(priv->ieee80211);
6184 }
6185
6186 /*****************************************************************************
6187 -----------------------------IRQ STUFF---------------------------
6188 ******************************************************************************/
6189
6190 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
6191 {
6192 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6193
6194 u32 *tail; //tail virtual addr
6195 u32 *head; //head virtual addr
6196 u32 *begin;//start of ring virtual addr
6197 u32 *nicv; //nic pointer virtual addr
6198 // u32 *txdv; //packet just TXed
6199 u32 nic; //nic pointer physical addr
6200 u32 nicbegin;// start of ring physical addr
6201 // short txed;
6202 unsigned long flag;
6203 /* physical addr are ok on 32 bits since we set DMA mask*/
6204
6205 int offs;
6206 int j,i;
6207 int hd;
6208 if (error) priv->stats.txretry++; //tony 20060601
6209 spin_lock_irqsave(&priv->tx_lock,flag);
6210 switch(pri) {
6211 case MANAGE_PRIORITY:
6212 tail = priv->txmapringtail;
6213 begin = priv->txmapring;
6214 head = priv->txmapringhead;
6215 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
6216 nicbegin = priv->txmapringdma;
6217 break;
6218
6219 case BK_PRIORITY:
6220 tail = priv->txbkpringtail;
6221 begin = priv->txbkpring;
6222 head = priv->txbkpringhead;
6223 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
6224 nicbegin = priv->txbkpringdma;
6225 break;
6226
6227 case BE_PRIORITY:
6228 tail = priv->txbepringtail;
6229 begin = priv->txbepring;
6230 head = priv->txbepringhead;
6231 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
6232 nicbegin = priv->txbepringdma;
6233 break;
6234
6235 case VI_PRIORITY:
6236 tail = priv->txvipringtail;
6237 begin = priv->txvipring;
6238 head = priv->txvipringhead;
6239 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
6240 nicbegin = priv->txvipringdma;
6241 break;
6242
6243 case VO_PRIORITY:
6244 tail = priv->txvopringtail;
6245 begin = priv->txvopring;
6246 head = priv->txvopringhead;
6247 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
6248 nicbegin = priv->txvopringdma;
6249 break;
6250
6251 case HI_PRIORITY:
6252 tail = priv->txhpringtail;
6253 begin = priv->txhpring;
6254 head = priv->txhpringhead;
6255 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
6256 nicbegin = priv->txhpringdma;
6257 break;
6258
6259 default:
6260 spin_unlock_irqrestore(&priv->tx_lock,flag);
6261 return ;
6262 }
6263 /* DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
6264 *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
6265 (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
6266 priv->txnpring)/8);
6267 */
6268 //nicv = (u32*) ((nic - nicbegin) + (int)begin);
6269 nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
6270 if((head <= tail && (nicv > tail || nicv < head)) ||
6271 (head > tail && (nicv > tail && nicv < head))){
6272
6273 DMESGW("nic has lost pointer");
6274 #ifdef DEBUG_TX_DESC
6275 //check_tx_ring(dev,NORM_PRIORITY);
6276 check_tx_ring(dev,pri);
6277 #endif
6278 spin_unlock_irqrestore(&priv->tx_lock,flag);
6279 rtl8180_restart(dev);
6280 return;
6281 }
6282
6283 /* we check all the descriptors between the head and the nic,
6284 * but not the currenly pointed by the nic (the next to be txed)
6285 * and the previous of the pointed (might be in process ??)
6286 */
6287 //if (head == nic) return;
6288 //DMESG("%x %x",head,nic);
6289 offs = (nic - nicbegin);
6290 //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
6291
6292 offs = offs / 8 /4;
6293
6294 hd = (head - begin) /8;
6295
6296 if(offs >= hd)
6297 j = offs - hd;
6298 else
6299 j = offs + (priv->txringcount -1 -hd);
6300 // j= priv->txringcount -1- (hd - offs);
6301
6302 j-=2;
6303 if(j<0) j=0;
6304
6305
6306 for(i=0;i<j;i++)
6307 {
6308 // printk("+++++++++++++check status desc\n");
6309 if((*head) & (1<<31))
6310 break;
6311 if(((*head)&(0x10000000)) != 0){
6312 // printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
6313 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
6314 #if 1
6315 if(!error)
6316 {
6317 priv->NumTxOkTotal++;
6318 // printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
6319 }
6320 #endif
6321 // printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
6322 }
6323 if(!error){
6324 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
6325 }
6326 // printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
6327 *head = *head &~ (1<<31);
6328
6329 if((head - begin)/8 == priv->txringcount-1)
6330 head=begin;
6331
6332 else
6333 head+=8;
6334 }
6335 #if 0
6336 if(nicv == begin)
6337 txdv = begin + (priv->txringcount -1)*8;
6338 else
6339 txdv = nicv - 8;
6340
6341 txed = !(txdv[0] &(1<<31));
6342
6343 if(txed){
6344 if(!(txdv[0] & (1<<15))) error = 1;
6345 //if(!(txdv[0] & (1<<30))) error = 1;
6346 if(error)DMESG("%x",txdv[0]);
6347 }
6348 #endif
6349 //DMESG("%x",txdv[0]);
6350 /* the head has been moved to the last certainly TXed
6351 * (or at least processed by the nic) packet.
6352 * The driver take forcefully owning of all these packets
6353 * If the packet previous of the nic pointer has been
6354 * processed this doesn't matter: it will be checked
6355 * here at the next round. Anyway if no more packet are
6356 * TXed no memory leak occour at all.
6357 */
6358
6359 switch(pri) {
6360 case MANAGE_PRIORITY:
6361 priv->txmapringhead = head;
6362 //printk("1==========================================> priority check!\n");
6363 if(priv->ack_tx_to_ieee){
6364 // try to implement power-save mode 2008.1.22
6365 // printk("2==========================================> priority check!\n");
6366 #if 1
6367 if(rtl8180_is_tx_queue_empty(dev)){
6368 // printk("tx queue empty, after send null sleep packet, try to sleep !\n");
6369 priv->ack_tx_to_ieee = 0;
6370 ieee80211_ps_tx_ack(priv->ieee80211,!error);
6371 }
6372 #endif
6373 }
6374 break;
6375
6376 case BK_PRIORITY:
6377 priv->txbkpringhead = head;
6378 break;
6379
6380 case BE_PRIORITY:
6381 priv->txbepringhead = head;
6382 break;
6383
6384 case VI_PRIORITY:
6385 priv->txvipringhead = head;
6386 break;
6387
6388 case VO_PRIORITY:
6389 priv->txvopringhead = head;
6390 break;
6391
6392 case HI_PRIORITY:
6393 priv->txhpringhead = head;
6394 break;
6395 }
6396
6397 /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
6398 (priv->txnpringtail - priv->txnpring) /8,
6399 offs );
6400 */
6401
6402 spin_unlock_irqrestore(&priv->tx_lock,flag);
6403
6404 }
6405
6406 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6407 void rtl8180_tx_irq_wq(struct work_struct *work)
6408 {
6409 //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
6410 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
6411 struct ieee80211_device * ieee = (struct ieee80211_device*)
6412 container_of(dwork, struct ieee80211_device, watch_dog_wq);
6413 struct net_device *dev = ieee->dev;
6414 #else
6415 void rtl8180_tx_irq_wq(struct net_device *dev)
6416 {
6417 //struct r8180_priv *priv = ieee80211_priv(dev);
6418 #endif
6419 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6420 }
6421 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
6422 {
6423 struct net_device *dev = (struct net_device *) netdev;
6424 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6425 unsigned long flags;
6426 u32 inta;
6427
6428 /* We should return IRQ_NONE, but for now let me keep this */
6429 if(priv->irq_enabled == 0) return IRQ_HANDLED;
6430
6431 spin_lock_irqsave(&priv->irq_th_lock,flags);
6432
6433 #ifdef CONFIG_RTL8185B
6434 //ISR: 4bytes
6435 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6436 write_nic_dword(dev,ISR,inta); // reset int situation
6437 #else
6438 inta = read_nic_word(dev,INTA) & priv->irq_mask;
6439 write_nic_word(dev,INTA,inta); // reset int situation
6440 #endif
6441
6442 priv->stats.shints++;
6443
6444 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6445
6446 if(!inta){
6447 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6448 return IRQ_HANDLED;
6449 /*
6450 most probably we can safely return IRQ_NONE,
6451 but for now is better to avoid problems
6452 */
6453 }
6454
6455 if(inta == 0xffff){
6456 /* HW disappared */
6457 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6458 return IRQ_HANDLED;
6459 }
6460
6461 priv->stats.ints++;
6462 #ifdef DEBUG_IRQ
6463 DMESG("NIC irq %x",inta);
6464 #endif
6465 //priv->irqpending = inta;
6466
6467
6468 if(!netif_running(dev)) {
6469 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6470 return IRQ_HANDLED;
6471 }
6472
6473 if(inta & ISR_TimeOut){
6474 write_nic_dword(dev, TimerInt, 0);
6475 //DMESG("=================>waking up");
6476 // rtl8180_hw_wakeup(dev);
6477 }
6478
6479 if(inta & ISR_TBDOK){
6480 priv->stats.txbeacon++;
6481 }
6482
6483 if(inta & ISR_TBDER){
6484 priv->stats.txbeaconerr++;
6485 }
6486
6487 if(inta & IMR_TMGDOK ) {
6488 // priv->NumTxOkTotal++;
6489 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6490 // schedule_work(&priv->tx_irq_wq);
6491
6492 }
6493
6494 if(inta & ISR_THPDER){
6495 #ifdef DEBUG_TX
6496 DMESG ("TX high priority ERR");
6497 #endif
6498 priv->stats.txhperr++;
6499 rtl8180_tx_isr(dev,HI_PRIORITY,1);
6500 priv->ieee80211->stats.tx_errors++;
6501 }
6502
6503 if(inta & ISR_THPDOK){ //High priority tx ok
6504 #ifdef DEBUG_TX
6505 DMESG ("TX high priority OK");
6506 #endif
6507 // priv->NumTxOkTotal++;
6508 //priv->NumTxOkInPeriod++; //YJ,del,080828
6509 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6510 priv->stats.txhpokint++;
6511 rtl8180_tx_isr(dev,HI_PRIORITY,0);
6512 }
6513
6514 if(inta & ISR_RER) {
6515 priv->stats.rxerr++;
6516 #ifdef DEBUG_RX
6517 DMESGW("RX error int");
6518 #endif
6519 }
6520 #ifdef CONFIG_RTL8185B
6521 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
6522 priv->stats.txbkperr++;
6523 priv->ieee80211->stats.tx_errors++;
6524 #ifdef DEBUG_TX
6525 DMESGW("TX bkp error int");
6526 #endif
6527 //tasklet_schedule(&priv->irq_tx_tasklet);
6528 rtl8180_tx_isr(dev,BK_PRIORITY,1);
6529 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6530 }
6531
6532 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
6533 priv->stats.txbeperr++;
6534 priv->ieee80211->stats.tx_errors++;
6535 #ifdef DEBUG_TX
6536 DMESGW("TX bep error int");
6537 #endif
6538 rtl8180_tx_isr(dev,BE_PRIORITY,1);
6539 //tasklet_schedule(&priv->irq_tx_tasklet);
6540 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6541 }
6542 #endif
6543 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
6544 priv->stats.txnperr++;
6545 priv->ieee80211->stats.tx_errors++;
6546 #ifdef DEBUG_TX
6547 DMESGW("TX np error int");
6548 #endif
6549 //tasklet_schedule(&priv->irq_tx_tasklet);
6550 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
6551 #ifdef CONFIG_RTL8185B
6552 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
6553 #endif
6554 }
6555
6556 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
6557 priv->stats.txlperr++;
6558 priv->ieee80211->stats.tx_errors++;
6559 #ifdef DEBUG_TX
6560 DMESGW("TX lp error int");
6561 #endif
6562 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
6563 //tasklet_schedule(&priv->irq_tx_tasklet);
6564 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6565 }
6566
6567 if(inta & ISR_ROK){
6568 #ifdef DEBUG_RX
6569 DMESG("Frame arrived !");
6570 #endif
6571 //priv->NumRxOkInPeriod++; //YJ,del,080828
6572 priv->stats.rxint++;
6573 tasklet_schedule(&priv->irq_rx_tasklet);
6574 }
6575
6576 if(inta & ISR_RQoSOK ){
6577 #ifdef DEBUG_RX
6578 DMESG("QoS Frame arrived !");
6579 #endif
6580 //priv->NumRxOkInPeriod++; //YJ,del,080828
6581 priv->stats.rxint++;
6582 tasklet_schedule(&priv->irq_rx_tasklet);
6583 }
6584 if(inta & ISR_BcnInt) {
6585 //DMESG("Preparing Beacons");
6586 rtl8180_prepare_beacon(dev);
6587 }
6588
6589 if(inta & ISR_RDU){
6590 //#ifdef DEBUG_RX
6591 DMESGW("No RX descriptor available");
6592 priv->stats.rxrdu++;
6593 //#endif
6594 tasklet_schedule(&priv->irq_rx_tasklet);
6595 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6596
6597 }
6598 if(inta & ISR_RXFOVW){
6599 #ifdef DEBUG_RX
6600 DMESGW("RX fifo overflow");
6601 #endif
6602 priv->stats.rxoverflow++;
6603 tasklet_schedule(&priv->irq_rx_tasklet);
6604 //queue_work(priv->workqueue ,&priv->restart_work);
6605 }
6606
6607 if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6608
6609 if(inta & ISR_TNPDOK){ //Normal priority tx ok
6610 #ifdef DEBUG_TX
6611 DMESG ("TX normal priority OK");
6612 #endif
6613 // priv->NumTxOkTotal++;
6614 //priv->NumTxOkInPeriod++; //YJ,del,080828
6615 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6616 // priv->ieee80211->stats.tx_packets++;
6617 priv->stats.txnpokint++;
6618 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6619 }
6620
6621 if(inta & ISR_TLPDOK){ //Low priority tx ok
6622 #ifdef DEBUG_TX
6623 DMESG ("TX low priority OK");
6624 #endif
6625 // priv->NumTxOkTotal++;
6626 //priv->NumTxOkInPeriod++; //YJ,del,080828
6627 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6628 // priv->ieee80211->stats.tx_packets++;
6629 priv->stats.txlpokint++;
6630 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6631 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6632 }
6633
6634 #ifdef CONFIG_RTL8185B
6635 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6636 priv->stats.txbkpokint++;
6637 #ifdef DEBUG_TX
6638 DMESGW("TX bk priority ok");
6639 #endif
6640 // priv->NumTxOkTotal++;
6641 //priv->NumTxOkInPeriod++; //YJ,del,080828
6642 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6643 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6644 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6645 }
6646
6647 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6648 priv->stats.txbeperr++;
6649 #ifdef DEBUG_TX
6650 DMESGW("TX be priority ok");
6651 #endif
6652 // priv->NumTxOkTotal++;
6653 //priv->NumTxOkInPeriod++; //YJ,del,080828
6654 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6655 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6656 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6657 }
6658 #endif
6659 force_pci_posting(dev);
6660 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6661
6662 return IRQ_HANDLED;
6663 }
6664
6665
6666 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6667 {
6668 // unsigned long flags;
6669
6670 /* spin_lock_irqsave(&priv->irq_lock, flags);
6671 priv->irq_mask &=~IMR_ROK;
6672 priv->irq_mask &=~IMR_RDU;
6673
6674 rtl8180_irq_enable(priv->dev);
6675 spin_unlock_irqrestore(&priv->irq_lock, flags);
6676 */
6677 rtl8180_rx(priv->dev);
6678
6679 /* spin_lock_irqsave(&priv->irq_lock, flags);
6680 priv->irq_mask |= IMR_ROK;
6681 priv->irq_mask |= IMR_RDU;
6682 rtl8180_irq_enable(priv->dev);
6683 spin_unlock_irqrestore(&priv->irq_lock, flags);
6684 */
6685 }
6686
6687 /****************************************************************************
6688 lizhaoming--------------------------- RF power on/power off -----------------
6689 *****************************************************************************/
6690
6691 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6692 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6693 {
6694 //struct delayed_work *dwork = container_of(work, struct delayed_work, work);
6695 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6696 struct net_device *dev = ieee->dev;
6697 struct r8180_priv *priv = ieee80211_priv(dev);
6698 #else
6699 void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
6700 {
6701 struct net_device *dev = ieee->dev;
6702 struct r8180_priv *priv = ieee80211_priv(dev);
6703 #endif
6704
6705 //u16 tmp2byte;
6706 u8 btPSR;
6707 u8 btConfig0;
6708 RT_RF_POWER_STATE eRfPowerStateToSet;
6709 bool bActuallySet=false;
6710
6711 char *argv[3];
6712 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6713 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6714 static int readf_count = 0;
6715 //printk("============>%s in \n", __func__);
6716
6717 #ifdef ENABLE_LPS
6718 if(readf_count % 10 == 0)
6719 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6720
6721 readf_count = (readf_count+1)%0xffff;
6722 #endif
6723 #if 0
6724 if(priv->up == 0)//driver stopped
6725 {
6726 printk("\nDo nothing...");
6727 goto out;
6728 }
6729 else
6730 #endif
6731 {
6732 // We should turn off LED before polling FF51[4].
6733
6734 //Turn off LED.
6735 btPSR = read_nic_byte(dev, PSR);
6736 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6737
6738 //It need to delay 4us suggested by Jong, 2008-01-16
6739 udelay(4);
6740
6741 //HW radio On/Off according to the value of FF51[4](config0)
6742 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6743
6744 //Turn on LED.
6745 write_nic_byte(dev, PSR, btPSR| BIT3);
6746
6747 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
6748
6749 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6750 {
6751 priv->ieee80211->bHwRadioOff = false;
6752 bActuallySet = true;
6753 }
6754 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6755 {
6756 priv->ieee80211->bHwRadioOff = true;
6757 bActuallySet = true;
6758 }
6759
6760 if(bActuallySet)
6761 {
6762 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6763
6764 /* To update the UI status for Power status changed */
6765 if(priv->ieee80211->bHwRadioOff == true)
6766 argv[1] = "RFOFF";
6767 else{
6768 //if(!priv->RfOffReason)
6769 argv[1] = "RFON";
6770 //else
6771 // argv[1] = "RFOFF";
6772 }
6773 argv[0] = RadioPowerPath;
6774 argv[2] = NULL;
6775
6776 call_usermodehelper(RadioPowerPath,argv,envp,1);
6777 }
6778
6779 }
6780
6781 }
6782
6783 static u8 read_acadapter_file(char *filename)
6784 {
6785 //#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
6786 #if 0
6787 int fd;
6788 char buf[1];
6789 char ret[50];
6790 int i = 0;
6791 int n = 0;
6792 mm_segment_t old_fs = get_fs();
6793 set_fs(KERNEL_DS);
6794
6795 fd = sys_open(filename, O_RDONLY, 0);
6796 if (fd >= 0) {
6797 while (sys_read(fd, buf, 1) == 1)
6798 {
6799 i++;
6800 if(i>10)
6801 {
6802 if(buf[0]!=' ')
6803 {
6804 ret[n]=buf[0];
6805 n++;
6806 }
6807 }
6808 }
6809 sys_close(fd);
6810 }
6811 ret[n]='\0';
6812 // printk("%s \n", ret);
6813 set_fs(old_fs);
6814
6815 if(strncmp(ret, "off-line",8) == 0)
6816 {
6817 return 1;
6818 }
6819 #endif
6820 return 0;
6821 }
6822
6823 /***************************************************************************
6824 ------------------- module init / exit stubs ----------------
6825 ****************************************************************************/
6826 module_init(rtl8180_pci_module_init);
6827 module_exit(rtl8180_pci_module_exit);
6828
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK