2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
4 * Written 2000 by Adam Fritzler
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 Ringnode MC16
11 * - Madge Smart 16/4 Ringnode MC32 (??)
16 * Modification History:
17 * 16-Jan-00 AF Created
20 static const char version
[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/init.h>
27 #include <linux/netdevice.h>
28 #include <linux/trdevice.h>
30 #include <asm/system.h>
35 #include "madgemc.h" /* Madge-specific constants */
37 #define MADGEMC_IO_EXTENT 32
38 #define MADGEMC_SIF_OFFSET 0x08
42 * These are read from the BIA ROM.
45 unsigned int cardtype
;
50 * These are read from the MCA POS registers.
52 unsigned int burstmode
:2;
53 unsigned int fairness
:1; /* 0 = Fair, 1 = Unfair */
54 unsigned int arblevel
:4;
55 unsigned int ringspeed
:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
56 unsigned int cabletype
:1; /* 0 = RJ45, 1 = DB9 */
59 static int madgemc_open(struct net_device
*dev
);
60 static int madgemc_close(struct net_device
*dev
);
61 static int madgemc_chipset_init(struct net_device
*dev
);
62 static void madgemc_read_rom(struct net_device
*dev
, struct card_info
*card
);
63 static unsigned short madgemc_setnselout_pins(struct net_device
*dev
);
64 static void madgemc_setcabletype(struct net_device
*dev
, int type
);
66 static int madgemc_mcaproc(char *buf
, int slot
, void *d
);
68 static void madgemc_setregpage(struct net_device
*dev
, int page
);
69 static void madgemc_setsifsel(struct net_device
*dev
, int val
);
70 static void madgemc_setint(struct net_device
*dev
, int val
);
72 static irqreturn_t
madgemc_interrupt(int irq
, void *dev_id
);
75 * These work around paging, however they don't guarentee you're on the
78 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
79 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
80 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
81 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
84 * Read a byte-length value from the register.
86 static unsigned short madgemc_sifreadb(struct net_device
*dev
, unsigned short reg
)
92 madgemc_setregpage(dev
, 1);
94 madgemc_setregpage(dev
, 0);
100 * Write a byte-length value to a register.
102 static void madgemc_sifwriteb(struct net_device
*dev
, unsigned short val
, unsigned short reg
)
107 madgemc_setregpage(dev
, 1);
109 madgemc_setregpage(dev
, 0);
115 * Read a word-length value from a register
117 static unsigned short madgemc_sifreadw(struct net_device
*dev
, unsigned short reg
)
123 madgemc_setregpage(dev
, 1);
125 madgemc_setregpage(dev
, 0);
131 * Write a word-length value to a register.
133 static void madgemc_sifwritew(struct net_device
*dev
, unsigned short val
, unsigned short reg
)
138 madgemc_setregpage(dev
, 1);
140 madgemc_setregpage(dev
, 0);
147 static int __devinit
madgemc_probe(struct device
*device
)
149 static int versionprinted
;
150 struct net_device
*dev
;
151 struct net_local
*tp
;
152 struct card_info
*card
;
153 struct mca_device
*mdev
= to_mca_device(device
);
156 if (versionprinted
++ == 0)
157 printk("%s", version
);
159 if(mca_device_claimed(mdev
))
161 mca_device_set_claim(mdev
, 1);
163 dev
= alloc_trdev(sizeof(struct net_local
));
165 printk("madgemc: unable to allocate dev space\n");
166 mca_device_set_claim(mdev
, 0);
173 card
= kmalloc(sizeof(struct card_info
), GFP_KERNEL
);
175 printk("madgemc: unable to allocate card struct\n");
181 * Parse configuration information. This all comes
182 * directly from the publicly available @002d.ADF.
183 * Get it from Madge or your local ADF library.
189 dev
->base_addr
= 0x0a20 +
190 ((mdev
->pos
[2] & MC16_POS2_ADDR2
)?0x0400:0) +
191 ((mdev
->pos
[0] & MC16_POS0_ADDR1
)?0x1000:0) +
192 ((mdev
->pos
[3] & MC16_POS3_ADDR3
)?0x2000:0);
197 switch(mdev
->pos
[0] >> 6) { /* upper two bits */
198 case 0x1: dev
->irq
= 3; break;
199 case 0x2: dev
->irq
= 9; break; /* IRQ 2 = IRQ 9 */
200 case 0x3: dev
->irq
= 10; break;
201 default: dev
->irq
= 0; break;
205 printk("%s: invalid IRQ\n", dev
->name
);
210 if (!request_region(dev
->base_addr
, MADGEMC_IO_EXTENT
,
212 printk(KERN_INFO
"madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev
->slot
, dev
->base_addr
);
213 dev
->base_addr
+= MADGEMC_SIF_OFFSET
;
217 dev
->base_addr
+= MADGEMC_SIF_OFFSET
;
222 card
->arblevel
= ((mdev
->pos
[0] >> 1) & 0x7) + 8;
225 * Burst mode and Fairness
227 card
->burstmode
= ((mdev
->pos
[2] >> 6) & 0x3);
228 card
->fairness
= ((mdev
->pos
[2] >> 4) & 0x1);
233 if ((mdev
->pos
[1] >> 2)&0x1)
234 card
->ringspeed
= 2; /* not selected */
235 else if ((mdev
->pos
[2] >> 5) & 0x1)
236 card
->ringspeed
= 1; /* 16Mb */
238 card
->ringspeed
= 0; /* 4Mb */
243 if ((mdev
->pos
[1] >> 6)&0x1)
244 card
->cabletype
= 1; /* STP/DB9 */
246 card
->cabletype
= 0; /* UTP/RJ-45 */
250 * ROM Info. This requires us to actually twiddle
251 * bits on the card, so we must ensure above that
252 * the base address is free of conflict (request_region above).
254 madgemc_read_rom(dev
, card
);
256 if (card
->manid
!= 0x4d) { /* something went wrong */
257 printk(KERN_INFO
"%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev
->name
, card
->manid
);
261 if ((card
->cardtype
!= 0x08) && (card
->cardtype
!= 0x0d)) {
262 printk(KERN_INFO
"%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev
->name
, card
->cardtype
);
267 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
268 if ((card
->cardtype
== 0x08) && (card
->cardrev
<= 0x01))
273 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
275 (card
->cardtype
== 0x08)?MADGEMC16_CARDNAME
:
276 MADGEMC32_CARDNAME
, card
->cardrev
,
277 dev
->base_addr
, dev
->irq
);
279 if (card
->cardtype
== 0x0d)
280 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev
->name
);
282 if (card
->ringspeed
==2) { /* Unknown */
283 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev
->name
);
284 card
->ringspeed
= 1; /* default to 16mb */
287 printk("%s: RAM Size: %dKB\n", dev
->name
, card
->ramsize
);
289 printk("%s: Ring Speed: %dMb/sec on %s\n", dev
->name
,
290 (card
->ringspeed
)?16:4,
291 card
->cabletype
?"STP/DB9":"UTP/RJ-45");
292 printk("%s: Arbitration Level: %d\n", dev
->name
,
295 printk("%s: Burst Mode: ", dev
->name
);
296 switch(card
->burstmode
) {
297 case 0: printk("Cycle steal"); break;
298 case 1: printk("Limited burst"); break;
299 case 2: printk("Delayed release"); break;
300 case 3: printk("Immediate release"); break;
302 printk(" (%s)\n", (card
->fairness
)?"Unfair":"Fair");
306 * Enable SIF before we assign the interrupt handler,
307 * just in case we get spurious interrupts that need
310 outb(0, dev
->base_addr
+ MC_CONTROL_REG0
); /* sanity */
311 madgemc_setsifsel(dev
, 1);
312 if (request_irq(dev
->irq
, madgemc_interrupt
, IRQF_SHARED
,
318 madgemc_chipset_init(dev
); /* enables interrupts! */
319 madgemc_setcabletype(dev
, card
->cabletype
);
321 /* Setup MCA structures */
322 mca_device_set_name(mdev
, (card
->cardtype
== 0x08)?MADGEMC16_CARDNAME
:MADGEMC32_CARDNAME
);
323 mca_set_adapter_procfn(mdev
->slot
, madgemc_mcaproc
, dev
);
325 printk("%s: Ring Station Address: %pM\n",
326 dev
->name
, dev
->dev_addr
);
328 if (tmsdev_init(dev
, device
)) {
329 printk("%s: unable to get memory for dev->priv.\n",
334 tp
= netdev_priv(dev
);
337 * The MC16 is physically a 32bit card. However, Madge
338 * insists on calling it 16bit, so I'll assume here that
339 * they know what they're talking about. Cut off DMA
342 tp
->setnselout
= madgemc_setnselout_pins
;
343 tp
->sifwriteb
= madgemc_sifwriteb
;
344 tp
->sifreadb
= madgemc_sifreadb
;
345 tp
->sifwritew
= madgemc_sifwritew
;
346 tp
->sifreadw
= madgemc_sifreadw
;
347 tp
->DataRate
= (card
->ringspeed
)?SPEED_16
:SPEED_4
;
349 memcpy(tp
->ProductID
, "Madge MCA 16/4 ", PROD_ID_SIZE
+ 1);
351 dev
->open
= madgemc_open
;
352 dev
->stop
= madgemc_close
;
355 dev_set_drvdata(device
, dev
);
357 if (register_netdev(dev
) == 0)
360 dev_set_drvdata(device
, NULL
);
363 free_irq(dev
->irq
, dev
);
365 release_region(dev
->base_addr
-MADGEMC_SIF_OFFSET
,
372 mca_device_set_claim(mdev
, 0);
377 * Handle interrupts generated by the card
379 * The MicroChannel Madge cards need slightly more handling
380 * after an interrupt than other TMS380 cards do.
382 * First we must make sure it was this card that generated the
383 * interrupt (since interrupt sharing is allowed). Then,
384 * because we're using level-triggered interrupts (as is
385 * standard on MCA), we must toggle the interrupt line
386 * on the card in order to claim and acknowledge the interrupt.
387 * Once that is done, the interrupt should be handlable in
388 * the normal tms380tr_interrupt() routine.
390 * There's two ways we can check to see if the interrupt is ours,
391 * both with their own disadvantages...
393 * 1) Read in the SIFSTS register from the TMS controller. This
394 * is guarenteed to be accurate, however, there's a fairly
395 * large performance penalty for doing so: the Madge chips
396 * must request the register from the Eagle, the Eagle must
397 * read them from its internal bus, and then take the route
398 * back out again, for a 16bit read.
400 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
401 * The major disadvantage here is that the accuracy of the
402 * bit is in question. However, it cuts out the extra read
403 * cycles it takes to read the Eagle's SIF, as its only an
404 * 8bit read, and theoretically the Madge bit is directly
405 * connected to the interrupt latch coming out of the Eagle
406 * hardware (that statement is not verified).
408 * I can't determine which of these methods has the best win. For now,
409 * we make a compromise. Use the Madge way for the first interrupt,
410 * which should be the fast-path, and then once we hit the first
411 * interrupt, keep on trying using the SIF method until we've
412 * exhausted all contiguous interrupts.
415 static irqreturn_t
madgemc_interrupt(int irq
, void *dev_id
)
418 struct net_device
*dev
;
421 printk("madgemc_interrupt: was not passed a dev_id!\n");
425 dev
= (struct net_device
*)dev_id
;
427 /* Make sure its really us. -- the Madge way */
428 pending
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
429 if (!(pending
& MC_CONTROL_REG0_SINTR
))
430 return IRQ_NONE
; /* not our interrupt */
433 * Since we're level-triggered, we may miss the rising edge
434 * of the next interrupt while we're off handling this one,
435 * so keep checking until the SIF verifies that it has nothing
438 pending
= STS_SYSTEM_IRQ
;
440 if (pending
& STS_SYSTEM_IRQ
) {
442 /* Toggle the interrupt to reset the latch on card */
443 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
444 outb(reg1
^ MC_CONTROL_REG1_SINTEN
,
445 dev
->base_addr
+ MC_CONTROL_REG1
);
446 outb(reg1
, dev
->base_addr
+ MC_CONTROL_REG1
);
448 /* Continue handling as normal */
449 tms380tr_interrupt(irq
, dev_id
);
451 pending
= SIFREADW(SIFSTS
); /* restart - the SIF way */
457 return IRQ_HANDLED
; /* not reachable */
461 * Set the card to the prefered ring speed.
463 * Unlike newer cards, the MC16/32 have their speed selection
464 * circuit connected to the Madge ASICs and not to the TMS380
465 * NSELOUT pins. Set the ASIC bits correctly here, and return
466 * zero to leave the TMS NSELOUT bits unaffected.
469 static unsigned short madgemc_setnselout_pins(struct net_device
*dev
)
472 struct net_local
*tp
= netdev_priv(dev
);
474 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
476 if(tp
->DataRate
== SPEED_16
)
477 reg1
|= MC_CONTROL_REG1_SPEED_SEL
; /* add for 16mb */
478 else if (reg1
& MC_CONTROL_REG1_SPEED_SEL
)
479 reg1
^= MC_CONTROL_REG1_SPEED_SEL
; /* remove for 4mb */
480 outb(reg1
, dev
->base_addr
+ MC_CONTROL_REG1
);
482 return 0; /* no change */
486 * Set the register page. This equates to the SRSX line
489 * Register selection is normally done via three contiguous
490 * bits. However, some boards (such as the MC16/32) use only
491 * two bits, plus a separate bit in the glue chip. This
492 * sets the SRSX bit (the top bit). See page 4-17 in the
493 * Yellow Book for which registers are affected.
496 static void madgemc_setregpage(struct net_device
*dev
, int page
)
500 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
501 if ((page
== 0) && (reg1
& MC_CONTROL_REG1_SRSX
)) {
502 outb(reg1
^ MC_CONTROL_REG1_SRSX
,
503 dev
->base_addr
+ MC_CONTROL_REG1
);
505 else if (page
== 1) {
506 outb(reg1
| MC_CONTROL_REG1_SRSX
,
507 dev
->base_addr
+ MC_CONTROL_REG1
);
509 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
515 * The SIF registers are not mapped into register space by default
516 * Set this to 1 to map them, 0 to map the BIA ROM.
519 static void madgemc_setsifsel(struct net_device
*dev
, int val
)
523 reg0
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
524 if ((val
== 0) && (reg0
& MC_CONTROL_REG0_SIFSEL
)) {
525 outb(reg0
^ MC_CONTROL_REG0_SIFSEL
,
526 dev
->base_addr
+ MC_CONTROL_REG0
);
527 } else if (val
== 1) {
528 outb(reg0
| MC_CONTROL_REG0_SIFSEL
,
529 dev
->base_addr
+ MC_CONTROL_REG0
);
531 reg0
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
537 * Enable SIF interrupts
539 * This does not enable interrupts in the SIF, but rather
540 * enables SIF interrupts to be passed onto the host.
543 static void madgemc_setint(struct net_device
*dev
, int val
)
547 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
548 if ((val
== 0) && (reg1
& MC_CONTROL_REG1_SINTEN
)) {
549 outb(reg1
^ MC_CONTROL_REG1_SINTEN
,
550 dev
->base_addr
+ MC_CONTROL_REG1
);
551 } else if (val
== 1) {
552 outb(reg1
| MC_CONTROL_REG1_SINTEN
,
553 dev
->base_addr
+ MC_CONTROL_REG1
);
560 * Cable type is set via control register 7. Bit zero high
561 * for UTP, low for STP.
563 static void madgemc_setcabletype(struct net_device
*dev
, int type
)
565 outb((type
==0)?MC_CONTROL_REG7_CABLEUTP
:MC_CONTROL_REG7_CABLESTP
,
566 dev
->base_addr
+ MC_CONTROL_REG7
);
570 * Enable the functions of the Madge chipset needed for
571 * full working order.
573 static int madgemc_chipset_init(struct net_device
*dev
)
575 outb(0, dev
->base_addr
+ MC_CONTROL_REG1
); /* pull SRESET low */
576 tms380tr_wait(100); /* wait for card to reset */
578 /* bring back into normal operating mode */
579 outb(MC_CONTROL_REG1_NSRESET
, dev
->base_addr
+ MC_CONTROL_REG1
);
581 /* map SIF registers */
582 madgemc_setsifsel(dev
, 1);
584 /* enable SIF interrupts */
585 madgemc_setint(dev
, 1);
591 * Disable the board, and put back into power-up state.
593 static void madgemc_chipset_close(struct net_device
*dev
)
595 /* disable interrupts */
596 madgemc_setint(dev
, 0);
597 /* unmap SIF registers */
598 madgemc_setsifsel(dev
, 0);
604 * Read the card type (MC16 or MC32) from the card.
606 * The configuration registers are stored in two separate
607 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
608 * for page zero, or setting bit 3 for page one.
610 * Page zero contains the following data:
611 * Byte 0: Manufacturer ID (0x4D -- ASCII "M")
615 * Byte 2: Card revision
616 * Byte 3: Mirror of POS config register 0
617 * Byte 4: Mirror of POS 1
618 * Byte 5: Mirror of POS 2
620 * Page one contains the following data:
622 * Byte 1-6: BIA, MSB to LSB.
624 * Note that to read the BIA, we must unmap the SIF registers
625 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
626 * will reside in the same logical location. For this reason,
627 * _never_ read the BIA while the Eagle processor is running!
628 * The SIF will be completely inaccessible until the BIA operation
632 static void madgemc_read_rom(struct net_device
*dev
, struct card_info
*card
)
634 unsigned long ioaddr
;
635 unsigned char reg0
, reg1
, tmpreg0
, i
;
637 ioaddr
= dev
->base_addr
;
639 reg0
= inb(ioaddr
+ MC_CONTROL_REG0
);
640 reg1
= inb(ioaddr
+ MC_CONTROL_REG1
);
642 /* Switch to page zero and unmap SIF */
643 tmpreg0
= reg0
& ~(MC_CONTROL_REG0_PAGE
+ MC_CONTROL_REG0_SIFSEL
);
644 outb(tmpreg0
, ioaddr
+ MC_CONTROL_REG0
);
646 card
->manid
= inb(ioaddr
+ MC_ROM_MANUFACTURERID
);
647 card
->cardtype
= inb(ioaddr
+ MC_ROM_ADAPTERID
);
648 card
->cardrev
= inb(ioaddr
+ MC_ROM_REVISION
);
650 /* Switch to rom page one */
651 outb(tmpreg0
| MC_CONTROL_REG0_PAGE
, ioaddr
+ MC_CONTROL_REG0
);
655 for (i
= 0; i
< 6; i
++)
656 dev
->dev_addr
[i
] = inb(ioaddr
+ MC_ROM_BIA_START
+ i
);
658 /* Restore original register values */
659 outb(reg0
, ioaddr
+ MC_CONTROL_REG0
);
660 outb(reg1
, ioaddr
+ MC_CONTROL_REG1
);
665 static int madgemc_open(struct net_device
*dev
)
668 * Go ahead and reinitialize the chipset again, just to
669 * make sure we didn't get left in a bad state.
671 madgemc_chipset_init(dev
);
676 static int madgemc_close(struct net_device
*dev
)
679 madgemc_chipset_close(dev
);
684 * Give some details available from /proc/mca/slotX
686 static int madgemc_mcaproc(char *buf
, int slot
, void *d
)
688 struct net_device
*dev
= (struct net_device
*)d
;
689 struct net_local
*tp
= netdev_priv(dev
);
690 struct card_info
*curcard
= tp
->tmspriv
;
693 len
+= sprintf(buf
+len
, "-------\n");
695 struct net_local
*tp
= netdev_priv(dev
);
697 len
+= sprintf(buf
+len
, "Card Revision: %d\n", curcard
->cardrev
);
698 len
+= sprintf(buf
+len
, "RAM Size: %dkb\n", curcard
->ramsize
);
699 len
+= sprintf(buf
+len
, "Cable type: %s\n", (curcard
->cabletype
)?"STP/DB9":"UTP/RJ-45");
700 len
+= sprintf(buf
+len
, "Configured ring speed: %dMb/sec\n", (curcard
->ringspeed
)?16:4);
701 len
+= sprintf(buf
+len
, "Running ring speed: %dMb/sec\n", (tp
->DataRate
==SPEED_16
)?16:4);
702 len
+= sprintf(buf
+len
, "Device: %s\n", dev
->name
);
703 len
+= sprintf(buf
+len
, "IO Port: 0x%04lx\n", dev
->base_addr
);
704 len
+= sprintf(buf
+len
, "IRQ: %d\n", dev
->irq
);
705 len
+= sprintf(buf
+len
, "Arbitration Level: %d\n", curcard
->arblevel
);
706 len
+= sprintf(buf
+len
, "Burst Mode: ");
707 switch(curcard
->burstmode
) {
708 case 0: len
+= sprintf(buf
+len
, "Cycle steal"); break;
709 case 1: len
+= sprintf(buf
+len
, "Limited burst"); break;
710 case 2: len
+= sprintf(buf
+len
, "Delayed release"); break;
711 case 3: len
+= sprintf(buf
+len
, "Immediate release"); break;
713 len
+= sprintf(buf
+len
, " (%s)\n", (curcard
->fairness
)?"Unfair":"Fair");
715 len
+= sprintf(buf
+len
, "Ring Station Address: %pM\n",
718 len
+= sprintf(buf
+len
, "Card not configured\n");
723 static int __devexit
madgemc_remove(struct device
*device
)
725 struct net_device
*dev
= dev_get_drvdata(device
);
726 struct net_local
*tp
;
727 struct card_info
*card
;
731 tp
= netdev_priv(dev
);
736 unregister_netdev(dev
);
737 release_region(dev
->base_addr
-MADGEMC_SIF_OFFSET
, MADGEMC_IO_EXTENT
);
738 free_irq(dev
->irq
, dev
);
741 dev_set_drvdata(device
, NULL
);
746 static short madgemc_adapter_ids
[] __initdata
= {
751 static struct mca_driver madgemc_driver
= {
752 .id_table
= madgemc_adapter_ids
,
755 .bus
= &mca_bus_type
,
756 .probe
= madgemc_probe
,
757 .remove
= __devexit_p(madgemc_remove
),
761 static int __init
madgemc_init (void)
763 return mca_register_driver (&madgemc_driver
);
766 static void __exit
madgemc_exit (void)
768 mca_unregister_driver (&madgemc_driver
);
771 module_init(madgemc_init
);
772 module_exit(madgemc_exit
);
774 MODULE_LICENSE("GPL");