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added 2.6.29.6 aldebaran kernel
[nao-ulib.git] / kernel / 2.6.29.6-aldebaran-rt / drivers / media / video / cx23885 / cx23885-cards.c
blobcaa098beeecf60f91f0a8482e5e2407d4d2f4fd7
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30
31 /* ------------------------------------------------------------------ */
32 /* board config info */
33
34 struct cx23885_board cx23885_boards[] = {
35 [CX23885_BOARD_UNKNOWN] = {
36 .name = "UNKNOWN/GENERIC",
37 /* Ensure safe default for unknown boards */
38 .clk_freq = 0,
39 .input = {{
40 .type = CX23885_VMUX_COMPOSITE1,
41 .vmux = 0,
42 }, {
43 .type = CX23885_VMUX_COMPOSITE2,
44 .vmux = 1,
45 }, {
46 .type = CX23885_VMUX_COMPOSITE3,
47 .vmux = 2,
48 }, {
49 .type = CX23885_VMUX_COMPOSITE4,
50 .vmux = 3,
51 } },
52 },
53 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
54 .name = "Hauppauge WinTV-HVR1800lp",
55 .portc = CX23885_MPEG_DVB,
56 .input = {{
57 .type = CX23885_VMUX_TELEVISION,
58 .vmux = 0,
59 .gpio0 = 0xff00,
60 }, {
61 .type = CX23885_VMUX_DEBUG,
62 .vmux = 0,
63 .gpio0 = 0xff01,
64 }, {
65 .type = CX23885_VMUX_COMPOSITE1,
66 .vmux = 1,
67 .gpio0 = 0xff02,
68 }, {
69 .type = CX23885_VMUX_SVIDEO,
70 .vmux = 2,
71 .gpio0 = 0xff02,
72 } },
73 },
74 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
75 .name = "Hauppauge WinTV-HVR1800",
76 .porta = CX23885_ANALOG_VIDEO,
77 .portb = CX23885_MPEG_ENCODER,
78 .portc = CX23885_MPEG_DVB,
79 .tuner_type = TUNER_PHILIPS_TDA8290,
80 .tuner_addr = 0x42, /* 0x84 >> 1 */
81 .input = {{
82 .type = CX23885_VMUX_TELEVISION,
83 .vmux = CX25840_VIN7_CH3 |
84 CX25840_VIN5_CH2 |
85 CX25840_VIN2_CH1,
86 .gpio0 = 0,
87 }, {
88 .type = CX23885_VMUX_COMPOSITE1,
89 .vmux = CX25840_VIN7_CH3 |
90 CX25840_VIN4_CH2 |
91 CX25840_VIN6_CH1,
92 .gpio0 = 0,
93 }, {
94 .type = CX23885_VMUX_SVIDEO,
95 .vmux = CX25840_VIN7_CH3 |
96 CX25840_VIN4_CH2 |
97 CX25840_VIN8_CH1 |
98 CX25840_SVIDEO_ON,
99 .gpio0 = 0,
100 } },
101 },
102 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
103 .name = "Hauppauge WinTV-HVR1250",
104 .portc = CX23885_MPEG_DVB,
105 .input = {{
106 .type = CX23885_VMUX_TELEVISION,
107 .vmux = 0,
108 .gpio0 = 0xff00,
109 }, {
110 .type = CX23885_VMUX_DEBUG,
111 .vmux = 0,
112 .gpio0 = 0xff01,
113 }, {
114 .type = CX23885_VMUX_COMPOSITE1,
115 .vmux = 1,
116 .gpio0 = 0xff02,
117 }, {
118 .type = CX23885_VMUX_SVIDEO,
119 .vmux = 2,
120 .gpio0 = 0xff02,
121 } },
122 },
123 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
124 .name = "DViCO FusionHDTV5 Express",
125 .portb = CX23885_MPEG_DVB,
126 },
127 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
128 .name = "Hauppauge WinTV-HVR1500Q",
129 .portc = CX23885_MPEG_DVB,
130 },
131 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
132 .name = "Hauppauge WinTV-HVR1500",
133 .portc = CX23885_MPEG_DVB,
134 },
135 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
136 .name = "Hauppauge WinTV-HVR1200",
137 .portc = CX23885_MPEG_DVB,
138 },
139 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
140 .name = "Hauppauge WinTV-HVR1700",
141 .portc = CX23885_MPEG_DVB,
142 },
143 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
144 .name = "Hauppauge WinTV-HVR1400",
145 .portc = CX23885_MPEG_DVB,
146 },
147 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
148 .name = "DViCO FusionHDTV7 Dual Express",
149 .portb = CX23885_MPEG_DVB,
150 .portc = CX23885_MPEG_DVB,
151 },
152 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
153 .name = "DViCO FusionHDTV DVB-T Dual Express",
154 .portb = CX23885_MPEG_DVB,
155 .portc = CX23885_MPEG_DVB,
156 },
157 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
158 .name = "Leadtek Winfast PxDVR3200 H",
159 .portc = CX23885_MPEG_DVB,
160 },
161 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
162 .name = "Compro VideoMate E650F",
163 .portc = CX23885_MPEG_DVB,
164 },
165 };
166 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
167
168 /* ------------------------------------------------------------------ */
169 /* PCI subsystem IDs */
170
171 struct cx23885_subid cx23885_subids[] = {
172 {
173 .subvendor = 0x0070,
174 .subdevice = 0x3400,
175 .card = CX23885_BOARD_UNKNOWN,
176 }, {
177 .subvendor = 0x0070,
178 .subdevice = 0x7600,
179 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
180 }, {
181 .subvendor = 0x0070,
182 .subdevice = 0x7800,
183 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
184 }, {
185 .subvendor = 0x0070,
186 .subdevice = 0x7801,
187 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
188 }, {
189 .subvendor = 0x0070,
190 .subdevice = 0x7809,
191 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
192 }, {
193 .subvendor = 0x0070,
194 .subdevice = 0x7911,
195 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
196 }, {
197 .subvendor = 0x18ac,
198 .subdevice = 0xd500,
199 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
200 }, {
201 .subvendor = 0x0070,
202 .subdevice = 0x7790,
203 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
204 }, {
205 .subvendor = 0x0070,
206 .subdevice = 0x7797,
207 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
208 }, {
209 .subvendor = 0x0070,
210 .subdevice = 0x7710,
211 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
212 }, {
213 .subvendor = 0x0070,
214 .subdevice = 0x7717,
215 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
216 }, {
217 .subvendor = 0x0070,
218 .subdevice = 0x71d1,
219 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
220 }, {
221 .subvendor = 0x0070,
222 .subdevice = 0x71d3,
223 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
224 }, {
225 .subvendor = 0x0070,
226 .subdevice = 0x8101,
227 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
228 }, {
229 .subvendor = 0x0070,
230 .subdevice = 0x8010,
231 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
232 }, {
233 .subvendor = 0x18ac,
234 .subdevice = 0xd618,
235 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
236 }, {
237 .subvendor = 0x18ac,
238 .subdevice = 0xdb78,
239 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
240 }, {
241 .subvendor = 0x107d,
242 .subdevice = 0x6681,
243 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
244 }, {
245 .subvendor = 0x185b,
246 .subdevice = 0xe800,
247 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
248 },
249 };
250 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
251
252 void cx23885_card_list(struct cx23885_dev *dev)
253 {
254 int i;
255
256 if (0 == dev->pci->subsystem_vendor &&
257 0 == dev->pci->subsystem_device) {
258 printk(KERN_INFO
259 "%s: Board has no valid PCIe Subsystem ID and can't\n"
260 "%s: be autodetected. Pass card=<n> insmod option\n"
261 "%s: to workaround that. Redirect complaints to the\n"
262 "%s: vendor of the TV card. Best regards,\n"
263 "%s: -- tux\n",
264 dev->name, dev->name, dev->name, dev->name, dev->name);
265 } else {
266 printk(KERN_INFO
267 "%s: Your board isn't known (yet) to the driver.\n"
268 "%s: Try to pick one of the existing card configs via\n"
269 "%s: card=<n> insmod option. Updating to the latest\n"
270 "%s: version might help as well.\n",
271 dev->name, dev->name, dev->name, dev->name);
272 }
273 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
274 dev->name);
275 for (i = 0; i < cx23885_bcount; i++)
276 printk(KERN_INFO "%s: card=%d -> %s\n",
277 dev->name, i, cx23885_boards[i].name);
278 }
279
280 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
281 {
282 struct tveeprom tv;
283
284 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
285 eeprom_data);
286
287 /* Make sure we support the board model */
288 switch (tv.model) {
289 case 71009:
290 /* WinTV-HVR1200 (PCIe, Retail, full height)
291 * DVB-T and basic analog */
292 case 71359:
293 /* WinTV-HVR1200 (PCIe, OEM, half height)
294 * DVB-T and basic analog */
295 case 71439:
296 /* WinTV-HVR1200 (PCIe, OEM, half height)
297 * DVB-T and basic analog */
298 case 71449:
299 /* WinTV-HVR1200 (PCIe, OEM, full height)
300 * DVB-T and basic analog */
301 case 71939:
302 /* WinTV-HVR1200 (PCIe, OEM, half height)
303 * DVB-T and basic analog */
304 case 71949:
305 /* WinTV-HVR1200 (PCIe, OEM, full height)
306 * DVB-T and basic analog */
307 case 71959:
308 /* WinTV-HVR1200 (PCIe, OEM, full height)
309 * DVB-T and basic analog */
310 case 71979:
311 /* WinTV-HVR1200 (PCIe, OEM, half height)
312 * DVB-T and basic analog */
313 case 71999:
314 /* WinTV-HVR1200 (PCIe, OEM, full height)
315 * DVB-T and basic analog */
316 case 76601:
317 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
318 channel ATSC and MPEG2 HW Encoder */
319 case 77001:
320 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
321 and Basic analog */
322 case 77011:
323 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
324 and Basic analog */
325 case 77041:
326 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
327 and Basic analog */
328 case 77051:
329 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
330 and Basic analog */
331 case 78011:
332 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
333 Dual channel ATSC and MPEG2 HW Encoder */
334 case 78501:
335 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
336 Dual channel ATSC and MPEG2 HW Encoder */
337 case 78521:
338 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
339 Dual channel ATSC and MPEG2 HW Encoder */
340 case 78531:
341 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
342 Dual channel ATSC and MPEG2 HW Encoder */
343 case 78631:
344 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
345 Dual channel ATSC and MPEG2 HW Encoder */
346 case 79001:
347 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
348 ATSC and Basic analog */
349 case 79101:
350 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
351 ATSC and Basic analog */
352 case 79561:
353 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
354 ATSC and Basic analog */
355 case 79571:
356 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
357 ATSC and Basic analog */
358 case 79671:
359 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
360 ATSC and Basic analog */
361 case 80019:
362 /* WinTV-HVR1400 (Express Card, Retail, IR,
363 * DVB-T and Basic analog */
364 case 81509:
365 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
366 * DVB-T and MPEG2 HW Encoder */
367 case 81519:
368 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
369 * DVB-T and MPEG2 HW Encoder */
370 break;
371 default:
372 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
373 dev->name, tv.model);
374 break;
375 }
376
377 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
378 dev->name, tv.model);
379 }
380
381 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
382 {
383 struct cx23885_tsport *port = priv;
384 struct cx23885_dev *dev = port->dev;
385 u32 bitmask = 0;
386
387 if (command == XC2028_RESET_CLK)
388 return 0;
389
390 if (command != 0) {
391 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
392 __func__, command);
393 return -EINVAL;
394 }
395
396 switch (dev->board) {
397 case CX23885_BOARD_HAUPPAUGE_HVR1400:
398 case CX23885_BOARD_HAUPPAUGE_HVR1500:
399 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
400 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
401 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
402 /* Tuner Reset Command */
403 bitmask = 0x04;
404 break;
405 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
406 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
407 /* Two identical tuners on two different i2c buses,
408 * we need to reset the correct gpio. */
409 if (port->nr == 0)
410 bitmask = 0x01;
411 else if (port->nr == 1)
412 bitmask = 0x04;
413 break;
414 }
415
416 if (bitmask) {
417 /* Drive the tuner into reset and back out */
418 cx_clear(GP0_IO, bitmask);
419 mdelay(200);
420 cx_set(GP0_IO, bitmask);
421 }
422
423 return 0;
424 }
425
426 void cx23885_gpio_setup(struct cx23885_dev *dev)
427 {
428 switch (dev->board) {
429 case CX23885_BOARD_HAUPPAUGE_HVR1250:
430 /* GPIO-0 cx24227 demodulator reset */
431 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
432 break;
433 case CX23885_BOARD_HAUPPAUGE_HVR1500:
434 /* GPIO-0 cx24227 demodulator */
435 /* GPIO-2 xc3028 tuner */
436
437 /* Put the parts into reset */
438 cx_set(GP0_IO, 0x00050000);
439 cx_clear(GP0_IO, 0x00000005);
440 msleep(5);
441
442 /* Bring the parts out of reset */
443 cx_set(GP0_IO, 0x00050005);
444 break;
445 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
446 /* GPIO-0 cx24227 demodulator reset */
447 /* GPIO-2 xc5000 tuner reset */
448 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
449 break;
450 case CX23885_BOARD_HAUPPAUGE_HVR1800:
451 /* GPIO-0 656_CLK */
452 /* GPIO-1 656_D0 */
453 /* GPIO-2 8295A Reset */
454 /* GPIO-3-10 cx23417 data0-7 */
455 /* GPIO-11-14 cx23417 addr0-3 */
456 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
457 /* GPIO-19 IR_RX */
458
459 /* CX23417 GPIO's */
460 /* EIO15 Zilog Reset */
461 /* EIO14 S5H1409/CX24227 Reset */
462
463 /* Force the TDA8295A into reset and back */
464 cx_set(GP0_IO, 0x00040004);
465 mdelay(20);
466 cx_clear(GP0_IO, 0x00000004);
467 mdelay(20);
468 cx_set(GP0_IO, 0x00040004);
469 mdelay(20);
470 break;
471 case CX23885_BOARD_HAUPPAUGE_HVR1200:
472 /* GPIO-0 tda10048 demodulator reset */
473 /* GPIO-2 tda18271 tuner reset */
474
475 /* Put the parts into reset and back */
476 cx_set(GP0_IO, 0x00050000);
477 mdelay(20);
478 cx_clear(GP0_IO, 0x00000005);
479 mdelay(20);
480 cx_set(GP0_IO, 0x00050005);
481 break;
482 case CX23885_BOARD_HAUPPAUGE_HVR1700:
483 /* GPIO-0 TDA10048 demodulator reset */
484 /* GPIO-2 TDA8295A Reset */
485 /* GPIO-3-10 cx23417 data0-7 */
486 /* GPIO-11-14 cx23417 addr0-3 */
487 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
488
489 /* The following GPIO's are on the interna AVCore (cx25840) */
490 /* GPIO-19 IR_RX */
491 /* GPIO-20 IR_TX 416/DVBT Select */
492 /* GPIO-21 IIS DAT */
493 /* GPIO-22 IIS WCLK */
494 /* GPIO-23 IIS BCLK */
495
496 /* Put the parts into reset and back */
497 cx_set(GP0_IO, 0x00050000);
498 mdelay(20);
499 cx_clear(GP0_IO, 0x00000005);
500 mdelay(20);
501 cx_set(GP0_IO, 0x00050005);
502 break;
503 case CX23885_BOARD_HAUPPAUGE_HVR1400:
504 /* GPIO-0 Dibcom7000p demodulator reset */
505 /* GPIO-2 xc3028L tuner reset */
506 /* GPIO-13 LED */
507
508 /* Put the parts into reset and back */
509 cx_set(GP0_IO, 0x00050000);
510 mdelay(20);
511 cx_clear(GP0_IO, 0x00000005);
512 mdelay(20);
513 cx_set(GP0_IO, 0x00050005);
514 break;
515 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
516 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
517 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
518 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
519 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
520
521 /* Put the parts into reset and back */
522 cx_set(GP0_IO, 0x000f0000);
523 mdelay(20);
524 cx_clear(GP0_IO, 0x0000000f);
525 mdelay(20);
526 cx_set(GP0_IO, 0x000f000f);
527 break;
528 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
529 /* GPIO-0 portb xc3028 reset */
530 /* GPIO-1 portb zl10353 reset */
531 /* GPIO-2 portc xc3028 reset */
532 /* GPIO-3 portc zl10353 reset */
533
534 /* Put the parts into reset and back */
535 cx_set(GP0_IO, 0x000f0000);
536 mdelay(20);
537 cx_clear(GP0_IO, 0x0000000f);
538 mdelay(20);
539 cx_set(GP0_IO, 0x000f000f);
540 break;
541 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
542 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
543 /* GPIO-2 xc3028 tuner reset */
544
545 /* The following GPIO's are on the internal AVCore (cx25840) */
546 /* GPIO-? zl10353 demod reset */
547
548 /* Put the parts into reset and back */
549 cx_set(GP0_IO, 0x00040000);
550 mdelay(20);
551 cx_clear(GP0_IO, 0x00000004);
552 mdelay(20);
553 cx_set(GP0_IO, 0x00040004);
554 break;
555 }
556 }
557
558 int cx23885_ir_init(struct cx23885_dev *dev)
559 {
560 switch (dev->board) {
561 case CX23885_BOARD_HAUPPAUGE_HVR1250:
562 case CX23885_BOARD_HAUPPAUGE_HVR1500:
563 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
564 case CX23885_BOARD_HAUPPAUGE_HVR1800:
565 case CX23885_BOARD_HAUPPAUGE_HVR1200:
566 case CX23885_BOARD_HAUPPAUGE_HVR1400:
567 /* FIXME: Implement me */
568 break;
569 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
570 request_module("ir-kbd-i2c");
571 break;
572 }
573
574 return 0;
575 }
576
577 void cx23885_card_setup(struct cx23885_dev *dev)
578 {
579 struct cx23885_tsport *ts1 = &dev->ts1;
580 struct cx23885_tsport *ts2 = &dev->ts2;
581
582 static u8 eeprom[256];
583
584 if (dev->i2c_bus[0].i2c_rc == 0) {
585 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
586 tveeprom_read(&dev->i2c_bus[0].i2c_client,
587 eeprom, sizeof(eeprom));
588 }
589
590 switch (dev->board) {
591 case CX23885_BOARD_HAUPPAUGE_HVR1250:
592 case CX23885_BOARD_HAUPPAUGE_HVR1500:
593 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
594 case CX23885_BOARD_HAUPPAUGE_HVR1400:
595 if (dev->i2c_bus[0].i2c_rc == 0)
596 hauppauge_eeprom(dev, eeprom+0x80);
597 break;
598 case CX23885_BOARD_HAUPPAUGE_HVR1800:
599 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
600 case CX23885_BOARD_HAUPPAUGE_HVR1200:
601 case CX23885_BOARD_HAUPPAUGE_HVR1700:
602 if (dev->i2c_bus[0].i2c_rc == 0)
603 hauppauge_eeprom(dev, eeprom+0xc0);
604 break;
605 }
606
607 switch (dev->board) {
608 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
609 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
610 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
611 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
612 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
613 /* break omitted intentionally */
614 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
615 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
616 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
617 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
618 break;
619 case CX23885_BOARD_HAUPPAUGE_HVR1800:
620 /* Defaults for VID B - Analog encoder */
621 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
622 ts1->gen_ctrl_val = 0x10e;
623 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
624 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
625
626 /* APB_TSVALERR_POL (active low)*/
627 ts1->vld_misc_val = 0x2000;
628 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
629
630 /* Defaults for VID C */
631 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
632 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
633 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
634 break;
635 case CX23885_BOARD_HAUPPAUGE_HVR1250:
636 case CX23885_BOARD_HAUPPAUGE_HVR1500:
637 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
638 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
639 case CX23885_BOARD_HAUPPAUGE_HVR1200:
640 case CX23885_BOARD_HAUPPAUGE_HVR1700:
641 case CX23885_BOARD_HAUPPAUGE_HVR1400:
642 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
643 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
644 default:
645 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
646 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
647 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
648 }
649
650 /* Certain boards support analog, or require the avcore to be
651 * loaded, ensure this happens.
652 */
653 switch (dev->board) {
654 case CX23885_BOARD_HAUPPAUGE_HVR1800:
655 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
656 case CX23885_BOARD_HAUPPAUGE_HVR1700:
657 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
658 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
659 request_module("cx25840");
660 break;
661 }
662 }
663
664 /* ------------------------------------------------------------------ */
Nao low-level kernelspace/userspace library that runs on our robots, Nao-Team HTWK