kernel/2.6.29.6-aldebaran-rt/drivers/media/dvb/frontends/sp887x.c

   1 /*
   2    Driver for the Spase sp887x demodulator
   3 */
   4
   5 /*
   6  * This driver needs external firmware. Please use the command
   7  * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
   8  * download/extract it, and then copy it to /usr/lib/hotplug/firmware
   9  * or /lib/firmware (depending on configuration of firmware hotplug).
  10  */
  11 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
  12
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15 #include <linux/device.h>
  16 #include <linux/firmware.h>
  17 #include <linux/string.h>
  18 #include <linux/slab.h>
  19
  20 #include "dvb_frontend.h"
  21 #include "sp887x.h"
  22
  23
  24 struct sp887x_state {
  25         struct i2c_adapter* i2c;
  26         const struct sp887x_config* config;
  27         struct dvb_frontend frontend;
  28
  29         /* demodulator private data */
  30         u8 initialised:1;
  31 };
  32
  33 static int debug;
  34 #define dprintk(args...) \
  35         do { \
  36                 if (debug) printk(KERN_DEBUG "sp887x: " args); \
  37         } while (0)
  38
  39 static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
  40 {
  41         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
  42         int err;
  43
  44         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  45                 printk ("%s: i2c write error (addr %02x, err == %i)\n",
  46                         __func__, state->config->demod_address, err);
  47                 return -EREMOTEIO;
  48         }
  49
  50         return 0;
  51 }
  52
  53 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
  54 {
  55         u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
  56         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
  57         int ret;
  58
  59         if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  60                 /**
  61                  *  in case of soft reset we ignore ACK errors...
  62                  */
  63                 if (!(reg == 0xf1a && data == 0x000 &&
  64                         (ret == -EREMOTEIO || ret == -EFAULT)))
  65                 {
  66                         printk("%s: writereg error "
  67                                "(reg %03x, data %03x, ret == %i)\n",
  68                                __func__, reg & 0xffff, data & 0xffff, ret);
  69                         return ret;
  70                 }
  71         }
  72
  73         return 0;
  74 }
  75
  76 static int sp887x_readreg (struct sp887x_state* state, u16 reg)
  77 {
  78         u8 b0 [] = { reg >> 8 , reg & 0xff };
  79         u8 b1 [2];
  80         int ret;
  81         struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
  82                          { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
  83
  84         if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
  85                 printk("%s: readreg error (ret == %i)\n", __func__, ret);
  86                 return -1;
  87         }
  88
  89         return (((b1[0] << 8) | b1[1]) & 0xfff);
  90 }
  91
  92 static void sp887x_microcontroller_stop (struct sp887x_state* state)
  93 {
  94         dprintk("%s\n", __func__);
  95         sp887x_writereg(state, 0xf08, 0x000);
  96         sp887x_writereg(state, 0xf09, 0x000);
  97
  98         /* microcontroller STOP */
  99         sp887x_writereg(state, 0xf00, 0x000);
 100 }
 101
 102 static void sp887x_microcontroller_start (struct sp887x_state* state)
 103 {
 104         dprintk("%s\n", __func__);
 105         sp887x_writereg(state, 0xf08, 0x000);
 106         sp887x_writereg(state, 0xf09, 0x000);
 107
 108         /* microcontroller START */
 109         sp887x_writereg(state, 0xf00, 0x001);
 110 }
 111
 112 static void sp887x_setup_agc (struct sp887x_state* state)
 113 {
 114         /* setup AGC parameters */
 115         dprintk("%s\n", __func__);
 116         sp887x_writereg(state, 0x33c, 0x054);
 117         sp887x_writereg(state, 0x33b, 0x04c);
 118         sp887x_writereg(state, 0x328, 0x000);
 119         sp887x_writereg(state, 0x327, 0x005);
 120         sp887x_writereg(state, 0x326, 0x001);
 121         sp887x_writereg(state, 0x325, 0x001);
 122         sp887x_writereg(state, 0x324, 0x001);
 123         sp887x_writereg(state, 0x318, 0x050);
 124         sp887x_writereg(state, 0x317, 0x3fe);
 125         sp887x_writereg(state, 0x316, 0x001);
 126         sp887x_writereg(state, 0x313, 0x005);
 127         sp887x_writereg(state, 0x312, 0x002);
 128         sp887x_writereg(state, 0x306, 0x000);
 129         sp887x_writereg(state, 0x303, 0x000);
 130 }
 131
 132 #define BLOCKSIZE 30
 133 #define FW_SIZE 0x4000
 134 /**
 135  *  load firmware and setup MPEG interface...
 136  */
 137 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
 138 {
 139         struct sp887x_state* state = fe->demodulator_priv;
 140         u8 buf [BLOCKSIZE+2];
 141         int i;
 142         int fw_size = fw->size;
 143         const unsigned char *mem = fw->data;
 144
 145         dprintk("%s\n", __func__);
 146
 147         /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
 148         if (fw_size < FW_SIZE+10)
 149                 return -ENODEV;
 150
 151         mem = fw->data + 10;
 152
 153         /* soft reset */
 154         sp887x_writereg(state, 0xf1a, 0x000);
 155
 156         sp887x_microcontroller_stop (state);
 157
 158         printk ("%s: firmware upload... ", __func__);
 159
 160         /* setup write pointer to -1 (end of memory) */
 161         /* bit 0x8000 in address is set to enable 13bit mode */
 162         sp887x_writereg(state, 0x8f08, 0x1fff);
 163
 164         /* dummy write (wrap around to start of memory) */
 165         sp887x_writereg(state, 0x8f0a, 0x0000);
 166
 167         for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
 168                 int c = BLOCKSIZE;
 169                 int err;
 170
 171                 if (i+c > FW_SIZE)
 172                         c = FW_SIZE - i;
 173
 174                 /* bit 0x8000 in address is set to enable 13bit mode */
 175                 /* bit 0x4000 enables multibyte read/write transfers */
 176                 /* write register is 0xf0a */
 177                 buf[0] = 0xcf;
 178                 buf[1] = 0x0a;
 179
 180                 memcpy(&buf[2], mem + i, c);
 181
 182                 if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
 183                         printk ("failed.\n");
 184                         printk ("%s: i2c error (err == %i)\n", __func__, err);
 185                         return err;
 186                 }
 187         }
 188
 189         /* don't write RS bytes between packets */
 190         sp887x_writereg(state, 0xc13, 0x001);
 191
 192         /* suppress clock if (!data_valid) */
 193         sp887x_writereg(state, 0xc14, 0x000);
 194
 195         /* setup MPEG interface... */
 196         sp887x_writereg(state, 0xc1a, 0x872);
 197         sp887x_writereg(state, 0xc1b, 0x001);
 198         sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
 199         sp887x_writereg(state, 0xc1a, 0x871);
 200
 201         /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
 202         sp887x_writereg(state, 0x301, 0x002);
 203
 204         sp887x_setup_agc(state);
 205
 206         /* bit 0x010: enable data valid signal */
 207         sp887x_writereg(state, 0xd00, 0x010);
 208         sp887x_writereg(state, 0x0d1, 0x000);
 209         return 0;
 210 };
 211
 212 static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
 213 {
 214         int known_parameters = 1;
 215
 216         *reg0xc05 = 0x000;
 217
 218         switch (p->u.ofdm.constellation) {
 219         case QPSK:
 220                 break;
 221         case QAM_16:
 222                 *reg0xc05 |= (1 << 10);
 223                 break;
 224         case QAM_64:
 225                 *reg0xc05 |= (2 << 10);
 226                 break;
 227         case QAM_AUTO:
 228                 known_parameters = 0;
 229                 break;
 230         default:
 231                 return -EINVAL;
 232         };
 233
 234         switch (p->u.ofdm.hierarchy_information) {
 235         case HIERARCHY_NONE:
 236                 break;
 237         case HIERARCHY_1:
 238                 *reg0xc05 |= (1 << 7);
 239                 break;
 240         case HIERARCHY_2:
 241                 *reg0xc05 |= (2 << 7);
 242                 break;
 243         case HIERARCHY_4:
 244                 *reg0xc05 |= (3 << 7);
 245                 break;
 246         case HIERARCHY_AUTO:
 247                 known_parameters = 0;
 248                 break;
 249         default:
 250                 return -EINVAL;
 251         };
 252
 253         switch (p->u.ofdm.code_rate_HP) {
 254         case FEC_1_2:
 255                 break;
 256         case FEC_2_3:
 257                 *reg0xc05 |= (1 << 3);
 258                 break;
 259         case FEC_3_4:
 260                 *reg0xc05 |= (2 << 3);
 261                 break;
 262         case FEC_5_6:
 263                 *reg0xc05 |= (3 << 3);
 264                 break;
 265         case FEC_7_8:
 266                 *reg0xc05 |= (4 << 3);
 267                 break;
 268         case FEC_AUTO:
 269                 known_parameters = 0;
 270                 break;
 271         default:
 272                 return -EINVAL;
 273         };
 274
 275         if (known_parameters)
 276                 *reg0xc05 |= (2 << 1);  /* use specified parameters */
 277         else
 278                 *reg0xc05 |= (1 << 1);  /* enable autoprobing */
 279
 280         return 0;
 281 }
 282
 283 /**
 284  *  estimates division of two 24bit numbers,
 285  *  derived from the ves1820/stv0299 driver code
 286  */
 287 static void divide (int n, int d, int *quotient_i, int *quotient_f)
 288 {
 289         unsigned int q, r;
 290
 291         r = (n % d) << 8;
 292         q = (r / d);
 293
 294         if (quotient_i)
 295                 *quotient_i = q;
 296
 297         if (quotient_f) {
 298                 r = (r % d) << 8;
 299                 q = (q << 8) | (r / d);
 300                 r = (r % d) << 8;
 301                 *quotient_f = (q << 8) | (r / d);
 302         }
 303 }
 304
 305 static void sp887x_correct_offsets (struct sp887x_state* state,
 306                                     struct dvb_frontend_parameters *p,
 307                                     int actual_freq)
 308 {
 309         static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
 310         int bw_index = p->u.ofdm.bandwidth - BANDWIDTH_8_MHZ;
 311         int freq_offset = actual_freq - p->frequency;
 312         int sysclock = 61003; //[kHz]
 313         int ifreq = 36000000;
 314         int freq;
 315         int frequency_shift;
 316
 317         if (p->inversion == INVERSION_ON)
 318                 freq = ifreq - freq_offset;
 319         else
 320                 freq = ifreq + freq_offset;
 321
 322         divide(freq / 333, sysclock, NULL, &frequency_shift);
 323
 324         if (p->inversion == INVERSION_ON)
 325                 frequency_shift = -frequency_shift;
 326
 327         /* sample rate correction */
 328         sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
 329         sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
 330
 331         /* carrier offset correction */
 332         sp887x_writereg(state, 0x309, frequency_shift >> 12);
 333         sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
 334 }
 335
 336 static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
 337                                              struct dvb_frontend_parameters *p)
 338 {
 339         struct sp887x_state* state = fe->demodulator_priv;
 340         unsigned actual_freq;
 341         int err;
 342         u16 val, reg0xc05;
 343
 344         if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ &&
 345             p->u.ofdm.bandwidth != BANDWIDTH_7_MHZ &&
 346             p->u.ofdm.bandwidth != BANDWIDTH_6_MHZ)
 347                 return -EINVAL;
 348
 349         if ((err = configure_reg0xc05(p, &reg0xc05)))
 350                 return err;
 351
 352         sp887x_microcontroller_stop(state);
 353
 354         /* setup the PLL */
 355         if (fe->ops.tuner_ops.set_params) {
 356                 fe->ops.tuner_ops.set_params(fe, p);
 357                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 358         }
 359         if (fe->ops.tuner_ops.get_frequency) {
 360                 fe->ops.tuner_ops.get_frequency(fe, &actual_freq);
 361                 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 362         } else {
 363                 actual_freq = p->frequency;
 364         }
 365
 366         /* read status reg in order to clear <pending irqs */
 367         sp887x_readreg(state, 0x200);
 368
 369         sp887x_correct_offsets(state, p, actual_freq);
 370
 371         /* filter for 6/7/8 Mhz channel */
 372         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 373                 val = 2;
 374         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 375                 val = 1;
 376         else
 377                 val = 0;
 378
 379         sp887x_writereg(state, 0x311, val);
 380
 381         /* scan order: 2k first = 0, 8k first = 1 */
 382         if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K)
 383                 sp887x_writereg(state, 0x338, 0x000);
 384         else
 385                 sp887x_writereg(state, 0x338, 0x001);
 386
 387         sp887x_writereg(state, 0xc05, reg0xc05);
 388
 389         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 390                 val = 2 << 3;
 391         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 392                 val = 3 << 3;
 393         else
 394                 val = 0 << 3;
 395
 396         /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
 397          * optimize algorithm for given bandwidth...
 398          */
 399         sp887x_writereg(state, 0xf14, 0x160 | val);
 400         sp887x_writereg(state, 0xf15, 0x000);
 401
 402         sp887x_microcontroller_start(state);
 403         return 0;
 404 }
 405
 406 static int sp887x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 407 {
 408         struct sp887x_state* state = fe->demodulator_priv;
 409         u16 snr12 = sp887x_readreg(state, 0xf16);
 410         u16 sync0x200 = sp887x_readreg(state, 0x200);
 411         u16 sync0xf17 = sp887x_readreg(state, 0xf17);
 412
 413         *status = 0;
 414
 415         if (snr12 > 0x00f)
 416                 *status |= FE_HAS_SIGNAL;
 417
 418         //if (sync0x200 & 0x004)
 419         //      *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
 420
 421         //if (sync0x200 & 0x008)
 422         //      *status |= FE_HAS_VITERBI;
 423
 424         if ((sync0xf17 & 0x00f) == 0x002) {
 425                 *status |= FE_HAS_LOCK;
 426                 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
 427         }
 428
 429         if (sync0x200 & 0x001) {        /* tuner adjustment requested...*/
 430                 int steps = (sync0x200 >> 4) & 0x00f;
 431                 if (steps & 0x008)
 432                         steps = -steps;
 433                 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
 434                        steps);
 435         }
 436
 437         return 0;
 438 }
 439
 440 static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
 441 {
 442         struct sp887x_state* state = fe->demodulator_priv;
 443
 444         *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
 445                (sp887x_readreg(state, 0xc07) << 6);
 446         sp887x_writereg(state, 0xc08, 0x000);
 447         sp887x_writereg(state, 0xc07, 0x000);
 448         if (*ber >= 0x3fff0)
 449                 *ber = ~0;
 450
 451         return 0;
 452 }
 453
 454 static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 455 {
 456         struct sp887x_state* state = fe->demodulator_priv;
 457
 458         u16 snr12 = sp887x_readreg(state, 0xf16);
 459         u32 signal = 3 * (snr12 << 4);
 460         *strength = (signal < 0xffff) ? signal : 0xffff;
 461
 462         return 0;
 463 }
 464
 465 static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
 466 {
 467         struct sp887x_state* state = fe->demodulator_priv;
 468
 469         u16 snr12 = sp887x_readreg(state, 0xf16);
 470         *snr = (snr12 << 4) | (snr12 >> 8);
 471
 472         return 0;
 473 }
 474
 475 static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 476 {
 477         struct sp887x_state* state = fe->demodulator_priv;
 478
 479         *ucblocks = sp887x_readreg(state, 0xc0c);
 480         if (*ucblocks == 0xfff)
 481                 *ucblocks = ~0;
 482
 483         return 0;
 484 }
 485
 486 static int sp887x_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 487 {
 488         struct sp887x_state* state = fe->demodulator_priv;
 489
 490         if (enable) {
 491                 return sp887x_writereg(state, 0x206, 0x001);
 492         } else {
 493                 return sp887x_writereg(state, 0x206, 0x000);
 494         }
 495 }
 496
 497 static int sp887x_sleep(struct dvb_frontend* fe)
 498 {
 499         struct sp887x_state* state = fe->demodulator_priv;
 500
 501         /* tristate TS output and disable interface pins */
 502         sp887x_writereg(state, 0xc18, 0x000);
 503
 504         return 0;
 505 }
 506
 507 static int sp887x_init(struct dvb_frontend* fe)
 508 {
 509         struct sp887x_state* state = fe->demodulator_priv;
 510         const struct firmware *fw = NULL;
 511         int ret;
 512
 513         if (!state->initialised) {
 514                 /* request the firmware, this will block until someone uploads it */
 515                 printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
 516                 ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
 517                 if (ret) {
 518                         printk("sp887x: no firmware upload (timeout or file not found?)\n");
 519                         return ret;
 520                 }
 521
 522                 ret = sp887x_initial_setup(fe, fw);
 523                 release_firmware(fw);
 524                 if (ret) {
 525                         printk("sp887x: writing firmware to device failed\n");
 526                         return ret;
 527                 }
 528                 printk("sp887x: firmware upload complete\n");
 529                 state->initialised = 1;
 530         }
 531
 532         /* enable TS output and interface pins */
 533         sp887x_writereg(state, 0xc18, 0x00d);
 534
 535         return 0;
 536 }
 537
 538 static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
 539 {
 540         fesettings->min_delay_ms = 350;
 541         fesettings->step_size = 166666*2;
 542         fesettings->max_drift = (166666*2)+1;
 543         return 0;
 544 }
 545
 546 static void sp887x_release(struct dvb_frontend* fe)
 547 {
 548         struct sp887x_state* state = fe->demodulator_priv;
 549         kfree(state);
 550 }
 551
 552 static struct dvb_frontend_ops sp887x_ops;
 553
 554 struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
 555                                    struct i2c_adapter* i2c)
 556 {
 557         struct sp887x_state* state = NULL;
 558
 559         /* allocate memory for the internal state */
 560         state = kmalloc(sizeof(struct sp887x_state), GFP_KERNEL);
 561         if (state == NULL) goto error;
 562
 563         /* setup the state */
 564         state->config = config;
 565         state->i2c = i2c;
 566         state->initialised = 0;
 567
 568         /* check if the demod is there */
 569         if (sp887x_readreg(state, 0x0200) < 0) goto error;
 570
 571         /* create dvb_frontend */
 572         memcpy(&state->frontend.ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
 573         state->frontend.demodulator_priv = state;
 574         return &state->frontend;
 575
 576 error:
 577         kfree(state);
 578         return NULL;
 579 }
 580
 581 static struct dvb_frontend_ops sp887x_ops = {
 582
 583         .info = {
 584                 .name = "Spase SP887x DVB-T",
 585                 .type = FE_OFDM,
 586                 .frequency_min =  50500000,
 587                 .frequency_max = 858000000,
 588                 .frequency_stepsize = 166666,
 589                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 590                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 591                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
 592                         FE_CAN_RECOVER
 593         },
 594
 595         .release = sp887x_release,
 596
 597         .init = sp887x_init,
 598         .sleep = sp887x_sleep,
 599         .i2c_gate_ctrl = sp887x_i2c_gate_ctrl,
 600
 601         .set_frontend = sp887x_setup_frontend_parameters,
 602         .get_tune_settings = sp887x_get_tune_settings,
 603
 604         .read_status = sp887x_read_status,
 605         .read_ber = sp887x_read_ber,
 606         .read_signal_strength = sp887x_read_signal_strength,
 607         .read_snr = sp887x_read_snr,
 608         .read_ucblocks = sp887x_read_ucblocks,
 609 };
 610
 611 module_param(debug, int, 0644);
 612 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 613
 614 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
 615 MODULE_LICENSE("GPL");
 616
 617 EXPORT_SYMBOL(sp887x_attach);