2 * include/asm-s390/system.h
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Derived from "include/asm-i386/system.h"
11 #ifndef __ASM_SYSTEM_H
12 #define __ASM_SYSTEM_H
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <asm/types.h>
17 #include <asm/ptrace.h>
18 #include <asm/setup.h>
19 #include <asm/processor.h>
20 #include <asm/lowcore.h>
26 extern struct task_struct
*__switch_to(void *, void *);
28 static inline void save_fp_regs(s390_fp_regs
*fpregs
)
35 : "=m" (*fpregs
) : "a" (fpregs
), "m" (*fpregs
) : "memory");
36 if (!MACHINE_HAS_IEEE
)
52 : "=m" (*fpregs
) : "a" (fpregs
), "m" (*fpregs
) : "memory");
55 static inline void restore_fp_regs(s390_fp_regs
*fpregs
)
62 : : "a" (fpregs
), "m" (*fpregs
));
63 if (!MACHINE_HAS_IEEE
)
79 : : "a" (fpregs
), "m" (*fpregs
));
82 static inline void save_access_regs(unsigned int *acrs
)
84 asm volatile("stam 0,15,0(%0)" : : "a" (acrs
) : "memory");
87 static inline void restore_access_regs(unsigned int *acrs
)
89 asm volatile("lam 0,15,0(%0)" : : "a" (acrs
));
92 #define switch_to(prev,next,last) do { \
95 save_fp_regs(&prev->thread.fp_regs); \
96 restore_fp_regs(&next->thread.fp_regs); \
97 save_access_regs(&prev->thread.acrs[0]); \
98 restore_access_regs(&next->thread.acrs[0]); \
99 prev = __switch_to(prev,next); \
102 extern void account_vtime(struct task_struct
*, struct task_struct
*);
103 extern void account_tick_vtime(struct task_struct
*);
104 extern void account_system_vtime(struct task_struct
*);
107 extern void pfault_irq_init(void);
108 extern int pfault_init(void);
109 extern void pfault_fini(void);
110 #else /* CONFIG_PFAULT */
111 #define pfault_irq_init() do { } while (0)
112 #define pfault_init() ({-1;})
113 #define pfault_fini() do { } while (0)
114 #endif /* CONFIG_PFAULT */
116 #ifdef CONFIG_PAGE_STATES
117 extern void cmma_init(void);
119 static inline void cmma_init(void) { }
122 #define finish_arch_switch(prev) do { \
123 set_fs(current->thread.mm_segment); \
124 account_vtime(prev, current); \
127 #define nop() asm volatile("nop")
129 #define xchg(ptr,x) \
131 __typeof__(*(ptr)) __ret; \
132 __ret = (__typeof__(*(ptr))) \
133 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
137 extern void __xchg_called_with_bad_pointer(void);
139 static inline unsigned long __xchg(unsigned long x
, void * ptr
, int size
)
141 unsigned long addr
, old
;
146 addr
= (unsigned long) ptr
;
147 shift
= (3 ^ (addr
& 3)) << 3;
156 : "=&d" (old
), "=m" (*(int *) addr
)
157 : "d" (x
<< shift
), "d" (~(255 << shift
)), "a" (addr
),
158 "m" (*(int *) addr
) : "memory", "cc", "0");
161 addr
= (unsigned long) ptr
;
162 shift
= (2 ^ (addr
& 2)) << 3;
171 : "=&d" (old
), "=m" (*(int *) addr
)
172 : "d" (x
<< shift
), "d" (~(65535 << shift
)), "a" (addr
),
173 "m" (*(int *) addr
) : "memory", "cc", "0");
178 "0: cs %0,%2,0(%3)\n"
180 : "=&d" (old
), "=m" (*(int *) ptr
)
181 : "d" (x
), "a" (ptr
), "m" (*(int *) ptr
)
188 "0: csg %0,%2,0(%3)\n"
190 : "=&d" (old
), "=m" (*(long *) ptr
)
191 : "d" (x
), "a" (ptr
), "m" (*(long *) ptr
)
194 #endif /* __s390x__ */
196 __xchg_called_with_bad_pointer();
201 * Atomic compare and exchange. Compare OLD with MEM, if identical,
202 * store NEW in MEM. Return the initial value in MEM. Success is
203 * indicated by comparing RETURN with OLD.
206 #define __HAVE_ARCH_CMPXCHG 1
208 #define cmpxchg(ptr, o, n) \
209 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
210 (unsigned long)(n), sizeof(*(ptr))))
212 extern void __cmpxchg_called_with_bad_pointer(void);
214 static inline unsigned long
215 __cmpxchg(volatile void *ptr
, unsigned long old
, unsigned long new, int size
)
217 unsigned long addr
, prev
, tmp
;
222 addr
= (unsigned long) ptr
;
223 shift
= (3 ^ (addr
& 3)) << 3;
237 : "=&d" (prev
), "=&d" (tmp
)
238 : "d" (old
<< shift
), "d" (new << shift
), "a" (ptr
),
239 "d" (~(255 << shift
))
241 return prev
>> shift
;
243 addr
= (unsigned long) ptr
;
244 shift
= (2 ^ (addr
& 2)) << 3;
258 : "=&d" (prev
), "=&d" (tmp
)
259 : "d" (old
<< shift
), "d" (new << shift
), "a" (ptr
),
260 "d" (~(65535 << shift
))
262 return prev
>> shift
;
266 : "=&d" (prev
) : "0" (old
), "d" (new), "a" (ptr
)
273 : "=&d" (prev
) : "0" (old
), "d" (new), "a" (ptr
)
276 #endif /* __s390x__ */
278 __cmpxchg_called_with_bad_pointer();
283 * Force strict CPU ordering.
284 * And yes, this is required on UP too when we're talking
287 * This is very similar to the ppc eieio/sync instruction in that is
288 * does a checkpoint syncronisation & makes sure that
289 * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
292 #define eieio() asm volatile("bcr 15,0" : : : "memory")
293 #define SYNC_OTHER_CORES(x) eieio()
295 #define rmb() eieio()
296 #define wmb() eieio()
297 #define read_barrier_depends() do { } while(0)
298 #define smp_mb() mb()
299 #define smp_rmb() rmb()
300 #define smp_wmb() wmb()
301 #define smp_read_barrier_depends() read_barrier_depends()
302 #define smp_mb__before_clear_bit() smp_mb()
303 #define smp_mb__after_clear_bit() smp_mb()
306 #define set_mb(var, value) do { var = value; mb(); } while (0)
310 #define __ctl_load(array, low, high) ({ \
311 typedef struct { char _[sizeof(array)]; } addrtype; \
313 " lctlg %1,%2,0(%0)\n" \
314 : : "a" (&array), "i" (low), "i" (high), \
315 "m" (*(addrtype *)(&array))); \
318 #define __ctl_store(array, low, high) ({ \
319 typedef struct { char _[sizeof(array)]; } addrtype; \
321 " stctg %2,%3,0(%1)\n" \
322 : "=m" (*(addrtype *)(&array)) \
323 : "a" (&array), "i" (low), "i" (high)); \
326 #else /* __s390x__ */
328 #define __ctl_load(array, low, high) ({ \
329 typedef struct { char _[sizeof(array)]; } addrtype; \
331 " lctl %1,%2,0(%0)\n" \
332 : : "a" (&array), "i" (low), "i" (high), \
333 "m" (*(addrtype *)(&array))); \
336 #define __ctl_store(array, low, high) ({ \
337 typedef struct { char _[sizeof(array)]; } addrtype; \
339 " stctl %2,%3,0(%1)\n" \
340 : "=m" (*(addrtype *)(&array)) \
341 : "a" (&array), "i" (low), "i" (high)); \
344 #endif /* __s390x__ */
346 #define __ctl_set_bit(cr, bit) ({ \
347 unsigned long __dummy; \
348 __ctl_store(__dummy, cr, cr); \
349 __dummy |= 1UL << (bit); \
350 __ctl_load(__dummy, cr, cr); \
353 #define __ctl_clear_bit(cr, bit) ({ \
354 unsigned long __dummy; \
355 __ctl_store(__dummy, cr, cr); \
356 __dummy &= ~(1UL << (bit)); \
357 __ctl_load(__dummy, cr, cr); \
360 #include <linux/irqflags.h>
362 #include <asm-generic/cmpxchg-local.h>
364 static inline unsigned long __cmpxchg_local(volatile void *ptr
,
366 unsigned long new, int size
)
375 return __cmpxchg(ptr
, old
, new, size
);
377 return __cmpxchg_local_generic(ptr
, old
, new, size
);
384 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
387 #define cmpxchg_local(ptr, o, n) \
388 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
389 (unsigned long)(n), sizeof(*(ptr))))
391 #define cmpxchg64_local(ptr, o, n) \
393 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
394 cmpxchg_local((ptr), (o), (n)); \
397 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
401 * Use to set psw mask except for the first byte which
402 * won't be changed by this function.
405 __set_psw_mask(unsigned long mask
)
407 __load_psw_mask(mask
| (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8)));
410 #define local_mcck_enable() __set_psw_mask(psw_kernel_bits)
411 #define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
415 extern void smp_ctl_set_bit(int cr
, int bit
);
416 extern void smp_ctl_clear_bit(int cr
, int bit
);
417 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
418 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
422 #define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
423 #define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
425 #endif /* CONFIG_SMP */
427 static inline unsigned int stfl(void)
430 " .insn s,0xb2b10000,0(0)\n" /* stfl */
433 return S390_lowcore
.stfl_fac_list
;
436 static inline int __stfle(unsigned long long *list
, int doublewords
)
438 typedef struct { unsigned long long _
[doublewords
]; } addrtype
;
439 register unsigned long __nr
asm("0") = doublewords
- 1;
441 asm volatile(".insn s,0xb2b00000,%0" /* stfle */
442 : "=m" (*(addrtype
*) list
), "+d" (__nr
) : : "cc");
446 static inline int stfle(unsigned long long *list
, int doublewords
)
448 if (!(stfl() & (1UL << 24)))
450 return __stfle(list
, doublewords
);
453 static inline unsigned short stap(void)
455 unsigned short cpu_address
;
457 asm volatile("stap %0" : "=m" (cpu_address
));
461 extern void (*_machine_restart
)(char *command
);
462 extern void (*_machine_halt
)(void);
463 extern void (*_machine_power_off
)(void);
465 #define arch_align_stack(x) (x)
467 #ifdef CONFIG_TRACE_IRQFLAGS
468 extern psw_t sysc_restore_trace_psw
;
469 extern psw_t io_restore_trace_psw
;
472 #endif /* __KERNEL__ */