kernel/2.6.29.6-aldebaran-rt/arch/cris/include/arch-v32/arch/cache.h

   1 #ifndef _ASM_CRIS_ARCH_CACHE_H
   2 #define _ASM_CRIS_ARCH_CACHE_H
   3
   4 #include <arch/hwregs/dma.h>
   5
   6 /* A cache-line is 32 bytes. */
   7 #define L1_CACHE_BYTES 32
   8 #define L1_CACHE_SHIFT 5
   9
  10 void flush_dma_list(dma_descr_data *descr);
  11 void flush_dma_descr(dma_descr_data *descr, int flush_buf);
  12
  13 #define flush_dma_context(c) \
  14   flush_dma_list(phys_to_virt((c)->saved_data));
  15
  16 void cris_flush_cache_range(void *buf, unsigned long len);
  17 void cris_flush_cache(void);
  18
  19 #endif /* _ASM_CRIS_ARCH_CACHE_H */