2 * Toshiba RBTX4939 setup routines.
3 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
4 * and RBTX49xx patch from CELF patch archive.
6 * Copyright (C) 2000-2001,2005-2007 Toshiba Corporation
7 * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/platform_device.h>
16 #include <linux/leds.h>
17 #include <linux/interrupt.h>
18 #include <linux/smc91x.h>
19 #include <asm/reboot.h>
20 #include <asm/txx9/generic.h>
21 #include <asm/txx9/pci.h>
22 #include <asm/txx9/rbtx4939.h>
24 static void rbtx4939_machine_restart(char *command
)
27 writeb(1, rbtx4939_reseten_addr
);
28 writeb(1, rbtx4939_softreset_addr
);
33 static void __init
rbtx4939_time_init(void)
38 #if defined(__BIG_ENDIAN) && \
39 (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE))
40 #define HAVE_RBTX4939_IOSWAB
41 #define IS_CE1_ADDR(addr) \
42 ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
43 static u16
rbtx4939_ioswabw(volatile u16
*a
, u16 x
)
45 return IS_CE1_ADDR(a
) ? x
: le16_to_cpu(x
);
47 static u16
rbtx4939_mem_ioswabw(volatile u16
*a
, u16 x
)
49 return !IS_CE1_ADDR(a
) ? x
: le16_to_cpu(x
);
51 #endif /* __BIG_ENDIAN && CONFIG_SMC91X */
53 static void __init
rbtx4939_pci_setup(void)
56 int extarb
= !(__raw_readq(&tx4939_ccfgptr
->ccfg
) & TX4939_CCFG_PCIARB
);
57 struct pci_controller
*c
= &txx9_primary_pcic
;
59 register_pci_controller(c
);
61 tx4939_report_pciclk();
62 tx4927_pcic_setup(tx4939_pcicptr
, c
, extarb
);
63 if (!(__raw_readq(&tx4939_ccfgptr
->pcfg
) & TX4939_PCFG_ATA1MODE
) &&
64 (__raw_readq(&tx4939_ccfgptr
->pcfg
) &
65 (TX4939_PCFG_ET0MODE
| TX4939_PCFG_ET1MODE
))) {
66 tx4939_report_pci1clk();
68 /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
69 c
= txx9_alloc_pci_controller(NULL
, 0, 0x10000, 0, 0x10000);
70 register_pci_controller(c
);
71 tx4927_pcic_setup(tx4939_pcic1ptr
, c
, 0);
74 tx4939_setup_pcierr_irq();
75 #endif /* CONFIG_PCI */
78 static unsigned long long default_ebccr
[] __initdata
= {
79 0x01c0000000007608ULL
, /* 64M ROM */
80 0x017f000000007049ULL
, /* 1M IOC */
81 0x0180000000408608ULL
, /* ISA */
85 static void __init
rbtx4939_ebusc_setup(void)
90 /* use user-configured speed */
91 sp
= TX4939_EBUSC_CR(0) & 0x30;
92 default_ebccr
[0] |= sp
;
93 default_ebccr
[1] |= sp
;
94 default_ebccr
[2] |= sp
;
95 /* initialise by myself */
96 for (i
= 0; i
< ARRAY_SIZE(default_ebccr
); i
++) {
98 ____raw_writeq(default_ebccr
[i
],
99 &tx4939_ebuscptr
->cr
[i
]);
101 ____raw_writeq(____raw_readq(&tx4939_ebuscptr
->cr
[i
])
103 &tx4939_ebuscptr
->cr
[i
]);
107 static void __init
rbtx4939_update_ioc_pen(void)
109 __u64 pcfg
= ____raw_readq(&tx4939_ccfgptr
->pcfg
);
110 __u64 ccfg
= ____raw_readq(&tx4939_ccfgptr
->ccfg
);
111 __u8 pe1
= readb(rbtx4939_pe1_addr
);
112 __u8 pe2
= readb(rbtx4939_pe2_addr
);
113 __u8 pe3
= readb(rbtx4939_pe3_addr
);
114 if (pcfg
& TX4939_PCFG_ATA0MODE
)
115 pe1
|= RBTX4939_PE1_ATA(0);
117 pe1
&= ~RBTX4939_PE1_ATA(0);
118 if (pcfg
& TX4939_PCFG_ATA1MODE
) {
119 pe1
|= RBTX4939_PE1_ATA(1);
120 pe1
&= ~(RBTX4939_PE1_RMII(0) | RBTX4939_PE1_RMII(1));
122 pe1
&= ~RBTX4939_PE1_ATA(1);
123 if (pcfg
& TX4939_PCFG_ET0MODE
)
124 pe1
|= RBTX4939_PE1_RMII(0);
126 pe1
&= ~RBTX4939_PE1_RMII(0);
127 if (pcfg
& TX4939_PCFG_ET1MODE
)
128 pe1
|= RBTX4939_PE1_RMII(1);
130 pe1
&= ~RBTX4939_PE1_RMII(1);
132 if (ccfg
& TX4939_CCFG_PTSEL
)
133 pe3
&= ~(RBTX4939_PE3_VP
| RBTX4939_PE3_VP_P
|
137 (TX4939_PCFG_VSSMODE
| TX4939_PCFG_VPSMODE
);
139 pe3
&= ~(RBTX4939_PE3_VP
| RBTX4939_PE3_VP_P
|
141 else if (vmode
== TX4939_PCFG_VPSMODE
) {
142 pe3
|= RBTX4939_PE3_VP_P
;
143 pe3
&= ~(RBTX4939_PE3_VP
| RBTX4939_PE3_VP_S
);
144 } else if (vmode
== TX4939_PCFG_VSSMODE
) {
145 pe3
|= RBTX4939_PE3_VP
| RBTX4939_PE3_VP_S
;
146 pe3
&= ~RBTX4939_PE3_VP_P
;
148 pe3
|= RBTX4939_PE3_VP
| RBTX4939_PE3_VP_P
;
149 pe3
&= ~RBTX4939_PE3_VP_S
;
152 if (pcfg
& TX4939_PCFG_SPIMODE
) {
153 if (pcfg
& TX4939_PCFG_SIO2MODE_GPIO
)
154 pe2
&= ~(RBTX4939_PE2_SIO2
| RBTX4939_PE2_SIO0
);
156 if (pcfg
& TX4939_PCFG_SIO2MODE_SIO2
) {
157 pe2
|= RBTX4939_PE2_SIO2
;
158 pe2
&= ~RBTX4939_PE2_SIO0
;
160 pe2
|= RBTX4939_PE2_SIO0
;
161 pe2
&= ~RBTX4939_PE2_SIO2
;
164 if (pcfg
& TX4939_PCFG_SIO3MODE
)
165 pe2
|= RBTX4939_PE2_SIO3
;
167 pe2
&= ~RBTX4939_PE2_SIO3
;
168 pe2
&= ~RBTX4939_PE2_SPI
;
170 pe2
|= RBTX4939_PE2_SPI
;
171 pe2
&= ~(RBTX4939_PE2_SIO3
| RBTX4939_PE2_SIO2
|
174 if ((pcfg
& TX4939_PCFG_I2SMODE_MASK
) == TX4939_PCFG_I2SMODE_GPIO
)
175 pe2
|= RBTX4939_PE2_GPIO
;
177 pe2
&= ~RBTX4939_PE2_GPIO
;
178 writeb(pe1
, rbtx4939_pe1_addr
);
179 writeb(pe2
, rbtx4939_pe2_addr
);
180 writeb(pe3
, rbtx4939_pe3_addr
);
183 #define RBTX4939_MAX_7SEGLEDS 8
185 #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
186 static u8 led_val
[RBTX4939_MAX_7SEGLEDS
];
187 struct rbtx4939_led_data
{
188 struct led_classdev cdev
;
193 /* Use "dot" in 7seg LEDs */
194 static void rbtx4939_led_brightness_set(struct led_classdev
*led_cdev
,
195 enum led_brightness value
)
197 struct rbtx4939_led_data
*led_dat
=
198 container_of(led_cdev
, struct rbtx4939_led_data
, cdev
);
199 unsigned int num
= led_dat
->num
;
202 local_irq_save(flags
);
203 led_val
[num
] = (led_val
[num
] & 0x7f) | (value
? 0x80 : 0);
204 writeb(led_val
[num
], rbtx4939_7seg_addr(num
/ 4, num
% 4));
205 local_irq_restore(flags
);
208 static int __init
rbtx4939_led_probe(struct platform_device
*pdev
)
210 struct rbtx4939_led_data
*leds_data
;
212 static char *default_triggers
[] __initdata
= {
218 leds_data
= kzalloc(sizeof(*leds_data
) * RBTX4939_MAX_7SEGLEDS
,
222 for (i
= 0; i
< RBTX4939_MAX_7SEGLEDS
; i
++) {
224 struct rbtx4939_led_data
*led_dat
= &leds_data
[i
];
227 led_dat
->cdev
.brightness_set
= rbtx4939_led_brightness_set
;
228 sprintf(led_dat
->name
, "rbtx4939:amber:%u", i
);
229 led_dat
->cdev
.name
= led_dat
->name
;
230 if (i
< ARRAY_SIZE(default_triggers
))
231 led_dat
->cdev
.default_trigger
= default_triggers
[i
];
232 rc
= led_classdev_register(&pdev
->dev
, &led_dat
->cdev
);
235 led_dat
->cdev
.brightness_set(&led_dat
->cdev
, 0);
241 static struct platform_driver rbtx4939_led_driver
= {
243 .name
= "rbtx4939-led",
244 .owner
= THIS_MODULE
,
248 static void __init
rbtx4939_led_setup(void)
250 platform_device_register_simple("rbtx4939-led", -1, NULL
, 0);
251 platform_driver_probe(&rbtx4939_led_driver
, rbtx4939_led_probe
);
254 static inline void rbtx4939_led_setup(void)
259 static void __rbtx4939_7segled_putc(unsigned int pos
, unsigned char val
)
261 #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
263 local_irq_save(flags
);
264 /* bit7: reserved for LED class */
265 led_val
[pos
] = (led_val
[pos
] & 0x80) | (val
& 0x7f);
267 local_irq_restore(flags
);
269 writeb(val
, rbtx4939_7seg_addr(pos
/ 4, pos
% 4));
272 static void rbtx4939_7segled_putc(unsigned int pos
, unsigned char val
)
274 /* convert from map_to_seg7() notation */
276 ((val
& 0x40) >> 6) |
277 ((val
& 0x20) >> 4) |
278 ((val
& 0x10) >> 2) |
279 ((val
& 0x04) << 2) |
280 ((val
& 0x02) << 4) |
282 __rbtx4939_7segled_putc(pos
, val
);
285 static void __init
rbtx4939_arch_init(void)
287 rbtx4939_pci_setup();
290 static void __init
rbtx4939_device_init(void)
292 unsigned long smc_addr
= RBTX4939_ETHER_ADDR
- IO_BASE
;
293 struct resource smc_res
[] = {
296 .end
= smc_addr
+ 0x10 - 1,
297 .flags
= IORESOURCE_MEM
,
299 .start
= RBTX4939_IRQ_ETHER
,
300 /* override default irq flag defined in smc91x.h */
301 .flags
= IORESOURCE_IRQ
| IRQF_TRIGGER_LOW
,
304 struct smc91x_platdata smc_pdata
= {
305 .flags
= SMC91X_USE_16BIT
,
307 struct platform_device
*pdev
;
308 #if defined(CONFIG_TC35815) || defined(CONFIG_TC35815_MODULE)
310 unsigned char ethaddr
[2][6];
311 u8 bdipsw
= readb(rbtx4939_bdipsw_addr
) & 0x0f;
313 for (i
= 0; i
< 2; i
++) {
314 unsigned long area
= CKSEG1
+ 0x1fff0000 + (i
* 0x10);
316 memcpy(ethaddr
[i
], (void *)area
, 6);
323 for (j
= 0; j
< 3; j
++)
324 buf
[j
] = le16_to_cpup((u16
*)(area
+ j
* 2));
325 memcpy(ethaddr
[i
], buf
, 6);
328 tx4939_ethaddr_init(ethaddr
[0], ethaddr
[1]);
330 pdev
= platform_device_alloc("smc91x", -1);
332 platform_device_add_resources(pdev
, smc_res
, ARRAY_SIZE(smc_res
)) ||
333 platform_device_add_data(pdev
, &smc_pdata
, sizeof(smc_pdata
)) ||
334 platform_device_add(pdev
))
335 platform_device_put(pdev
);
336 rbtx4939_led_setup();
342 static void __init
rbtx4939_setup(void)
346 rbtx4939_ebusc_setup();
347 /* always enable ATA0 */
348 txx9_set64(&tx4939_ccfgptr
->pcfg
, TX4939_PCFG_ATA0MODE
);
349 rbtx4939_update_ioc_pen();
350 if (txx9_master_clock
== 0)
351 txx9_master_clock
= 20000000;
353 #ifdef HAVE_RBTX4939_IOSWAB
354 ioswabw
= rbtx4939_ioswabw
;
355 __mem_ioswabw
= rbtx4939_mem_ioswabw
;
358 _machine_restart
= rbtx4939_machine_restart
;
360 txx9_7segled_init(RBTX4939_MAX_7SEGLEDS
, rbtx4939_7segled_putc
);
361 for (i
= 0; i
< RBTX4939_MAX_7SEGLEDS
; i
++)
362 txx9_7segled_putc(i
, '-');
363 pr_info("RBTX4939 (Rev %02x) --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
364 readb(rbtx4939_board_rev_addr
), readb(rbtx4939_ioc_rev_addr
),
365 readb(rbtx4939_udipsw_addr
), readb(rbtx4939_bdipsw_addr
));
368 txx9_alloc_pci_controller(&txx9_primary_pcic
, 0, 0, 0, 0);
369 txx9_board_pcibios_setup
= tx4927_pcibios_setup
;
371 set_io_port_base(RBTX4939_ETHER_BASE
);
374 tx4939_sio_init(TX4939_SCLK0(txx9_master_clock
), 0);
377 struct txx9_board_vec rbtx4939_vec __initdata
= {
378 .system
= "Tothiba RBTX4939",
379 .prom_init
= rbtx4939_prom_init
,
380 .mem_setup
= rbtx4939_setup
,
381 .irq_setup
= rbtx4939_irq_setup
,
382 .time_init
= rbtx4939_time_init
,
383 .device_init
= rbtx4939_device_init
,
384 .arch_init
= rbtx4939_arch_init
,
386 .pci_map_irq
= tx4939_pci_map_irq
,