kernel/2.6.29.6-aldebaran-rt/arch/arm/include/asm/bitops.h

   1 /*
   2  * Copyright 1995, Russell King.
   3  * Various bits and pieces copyrights include:
   4  *  Linus Torvalds (test_bit).
   5  * Big endian support: Copyright 2001, Nicolas Pitre
   6  *  reworked by rmk.
   7  *
   8  * bit 0 is the LSB of an "unsigned long" quantity.
   9  *
  10  * Please note that the code in this file should never be included
  11  * from user space.  Many of these are not implemented in assembler
  12  * since they would be too costly.  Also, they require privileged
  13  * instructions (which are not available from user mode) to ensure
  14  * that they are atomic.
  15  */
  16
  17 #ifndef __ASM_ARM_BITOPS_H
  18 #define __ASM_ARM_BITOPS_H
  19
  20 #ifdef __KERNEL__
  21
  22 #ifndef _LINUX_BITOPS_H
  23 #error only <linux/bitops.h> can be included directly
  24 #endif
  25
  26 #include <linux/compiler.h>
  27 #include <asm/system.h>
  28 #include <asm/memory.h>
  29
  30 #define smp_mb__before_clear_bit()      mb()
  31 #define smp_mb__after_clear_bit()       mb()
  32
  33 /*
  34  * These functions are the basis of our bit ops.
  35  *
  36  * First, the atomic bitops. These use native endian.
  37  */
  38 static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p)
  39 {
  40         unsigned long flags;
  41         unsigned long mask = 1UL << (bit & 31);
  42
  43         p += bit >> 5;
  44
  45         raw_local_irq_save(flags);
  46         *p |= mask;
  47         raw_local_irq_restore(flags);
  48 }
  49
  50 static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p)
  51 {
  52         unsigned long flags;
  53         unsigned long mask = 1UL << (bit & 31);
  54
  55         p += bit >> 5;
  56
  57         raw_local_irq_save(flags);
  58         *p &= ~mask;
  59         raw_local_irq_restore(flags);
  60 }
  61
  62 static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p)
  63 {
  64         unsigned long flags;
  65         unsigned long mask = 1UL << (bit & 31);
  66
  67         p += bit >> 5;
  68
  69         raw_local_irq_save(flags);
  70         *p ^= mask;
  71         raw_local_irq_restore(flags);
  72 }
  73
  74 static inline int
  75 ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p)
  76 {
  77         unsigned long flags;
  78         unsigned int res;
  79         unsigned long mask = 1UL << (bit & 31);
  80
  81         p += bit >> 5;
  82
  83         raw_local_irq_save(flags);
  84         res = *p;
  85         *p = res | mask;
  86         raw_local_irq_restore(flags);
  87
  88         return res & mask;
  89 }
  90
  91 static inline int
  92 ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p)
  93 {
  94         unsigned long flags;
  95         unsigned int res;
  96         unsigned long mask = 1UL << (bit & 31);
  97
  98         p += bit >> 5;
  99
 100         raw_local_irq_save(flags);
 101         res = *p;
 102         *p = res & ~mask;
 103         raw_local_irq_restore(flags);
 104
 105         return res & mask;
 106 }
 107
 108 static inline int
 109 ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p)
 110 {
 111         unsigned long flags;
 112         unsigned int res;
 113         unsigned long mask = 1UL << (bit & 31);
 114
 115         p += bit >> 5;
 116
 117         raw_local_irq_save(flags);
 118         res = *p;
 119         *p = res ^ mask;
 120         raw_local_irq_restore(flags);
 121
 122         return res & mask;
 123 }
 124
 125 #include <asm-generic/bitops/non-atomic.h>
 126
 127 /*
 128  *  A note about Endian-ness.
 129  *  -------------------------
 130  *
 131  * When the ARM is put into big endian mode via CR15, the processor
 132  * merely swaps the order of bytes within words, thus:
 133  *
 134  *          ------------ physical data bus bits -----------
 135  *          D31 ... D24  D23 ... D16  D15 ... D8  D7 ... D0
 136  * little     byte 3       byte 2       byte 1      byte 0
 137  * big        byte 0       byte 1       byte 2      byte 3
 138  *
 139  * This means that reading a 32-bit word at address 0 returns the same
 140  * value irrespective of the endian mode bit.
 141  *
 142  * Peripheral devices should be connected with the data bus reversed in
 143  * "Big Endian" mode.  ARM Application Note 61 is applicable, and is
 144  * available from http://www.arm.com/.
 145  *
 146  * The following assumes that the data bus connectivity for big endian
 147  * mode has been followed.
 148  *
 149  * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0.
 150  */
 151
 152 /*
 153  * Little endian assembly bitops.  nr = 0 -> byte 0 bit 0.
 154  */
 155 extern void _set_bit_le(int nr, volatile unsigned long * p);
 156 extern void _clear_bit_le(int nr, volatile unsigned long * p);
 157 extern void _change_bit_le(int nr, volatile unsigned long * p);
 158 extern int _test_and_set_bit_le(int nr, volatile unsigned long * p);
 159 extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p);
 160 extern int _test_and_change_bit_le(int nr, volatile unsigned long * p);
 161 extern int _find_first_zero_bit_le(const void * p, unsigned size);
 162 extern int _find_next_zero_bit_le(const void * p, int size, int offset);
 163 extern int _find_first_bit_le(const unsigned long *p, unsigned size);
 164 extern int _find_next_bit_le(const unsigned long *p, int size, int offset);
 165
 166 /*
 167  * Big endian assembly bitops.  nr = 0 -> byte 3 bit 0.
 168  */
 169 extern void _set_bit_be(int nr, volatile unsigned long * p);
 170 extern void _clear_bit_be(int nr, volatile unsigned long * p);
 171 extern void _change_bit_be(int nr, volatile unsigned long * p);
 172 extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
 173 extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
 174 extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
 175 extern int _find_first_zero_bit_be(const void * p, unsigned size);
 176 extern int _find_next_zero_bit_be(const void * p, int size, int offset);
 177 extern int _find_first_bit_be(const unsigned long *p, unsigned size);
 178 extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
 179
 180 #ifndef CONFIG_SMP
 181 /*
 182  * The __* form of bitops are non-atomic and may be reordered.
 183  */
 184 #define ATOMIC_BITOP_LE(name,nr,p)              \
 185         (__builtin_constant_p(nr) ?             \
 186          ____atomic_##name(nr, p) :             \
 187          _##name##_le(nr,p))
 188
 189 #define ATOMIC_BITOP_BE(name,nr,p)              \
 190         (__builtin_constant_p(nr) ?             \
 191          ____atomic_##name(nr, p) :             \
 192          _##name##_be(nr,p))
 193 #else
 194 #define ATOMIC_BITOP_LE(name,nr,p)      _##name##_le(nr,p)
 195 #define ATOMIC_BITOP_BE(name,nr,p)      _##name##_be(nr,p)
 196 #endif
 197
 198 #define NONATOMIC_BITOP(name,nr,p)              \
 199         (____nonatomic_##name(nr, p))
 200
 201 #ifndef __ARMEB__
 202 /*
 203  * These are the little endian, atomic definitions.
 204  */
 205 #define set_bit(nr,p)                   ATOMIC_BITOP_LE(set_bit,nr,p)
 206 #define clear_bit(nr,p)                 ATOMIC_BITOP_LE(clear_bit,nr,p)
 207 #define change_bit(nr,p)                ATOMIC_BITOP_LE(change_bit,nr,p)
 208 #define test_and_set_bit(nr,p)          ATOMIC_BITOP_LE(test_and_set_bit,nr,p)
 209 #define test_and_clear_bit(nr,p)        ATOMIC_BITOP_LE(test_and_clear_bit,nr,p)
 210 #define test_and_change_bit(nr,p)       ATOMIC_BITOP_LE(test_and_change_bit,nr,p)
 211 #define find_first_zero_bit(p,sz)       _find_first_zero_bit_le(p,sz)
 212 #define find_next_zero_bit(p,sz,off)    _find_next_zero_bit_le(p,sz,off)
 213 #define find_first_bit(p,sz)            _find_first_bit_le(p,sz)
 214 #define find_next_bit(p,sz,off)         _find_next_bit_le(p,sz,off)
 215
 216 #define WORD_BITOFF_TO_LE(x)            ((x))
 217
 218 #else
 219
 220 /*
 221  * These are the big endian, atomic definitions.
 222  */
 223 #define set_bit(nr,p)                   ATOMIC_BITOP_BE(set_bit,nr,p)
 224 #define clear_bit(nr,p)                 ATOMIC_BITOP_BE(clear_bit,nr,p)
 225 #define change_bit(nr,p)                ATOMIC_BITOP_BE(change_bit,nr,p)
 226 #define test_and_set_bit(nr,p)          ATOMIC_BITOP_BE(test_and_set_bit,nr,p)
 227 #define test_and_clear_bit(nr,p)        ATOMIC_BITOP_BE(test_and_clear_bit,nr,p)
 228 #define test_and_change_bit(nr,p)       ATOMIC_BITOP_BE(test_and_change_bit,nr,p)
 229 #define find_first_zero_bit(p,sz)       _find_first_zero_bit_be(p,sz)
 230 #define find_next_zero_bit(p,sz,off)    _find_next_zero_bit_be(p,sz,off)
 231 #define find_first_bit(p,sz)            _find_first_bit_be(p,sz)
 232 #define find_next_bit(p,sz,off)         _find_next_bit_be(p,sz,off)
 233
 234 #define WORD_BITOFF_TO_LE(x)            ((x) ^ 0x18)
 235
 236 #endif
 237
 238 #if __LINUX_ARM_ARCH__ < 5
 239
 240 #include <asm-generic/bitops/ffz.h>
 241 #include <asm-generic/bitops/__fls.h>
 242 #include <asm-generic/bitops/__ffs.h>
 243 #include <asm-generic/bitops/fls.h>
 244 #include <asm-generic/bitops/ffs.h>
 245
 246 #else
 247
 248 static inline int constant_fls(int x)
 249 {
 250         int r = 32;
 251
 252         if (!x)
 253                 return 0;
 254         if (!(x & 0xffff0000u)) {
 255                 x <<= 16;
 256                 r -= 16;
 257         }
 258         if (!(x & 0xff000000u)) {
 259                 x <<= 8;
 260                 r -= 8;
 261         }
 262         if (!(x & 0xf0000000u)) {
 263                 x <<= 4;
 264                 r -= 4;
 265         }
 266         if (!(x & 0xc0000000u)) {
 267                 x <<= 2;
 268                 r -= 2;
 269         }
 270         if (!(x & 0x80000000u)) {
 271                 x <<= 1;
 272                 r -= 1;
 273         }
 274         return r;
 275 }
 276
 277 /*
 278  * On ARMv5 and above those functions can be implemented around
 279  * the clz instruction for much better code efficiency.
 280  */
 281
 282 static inline int fls(int x)
 283 {
 284         int ret;
 285
 286         if (__builtin_constant_p(x))
 287                return constant_fls(x);
 288
 289         asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
 290         ret = 32 - ret;
 291         return ret;
 292 }
 293
 294 #define __fls(x) (fls(x) - 1)
 295 #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
 296 #define __ffs(x) (ffs(x) - 1)
 297 #define ffz(x) __ffs( ~(x) )
 298
 299 #endif
 300
 301 #include <asm-generic/bitops/fls64.h>
 302
 303 #include <asm-generic/bitops/sched.h>
 304 #include <asm-generic/bitops/hweight.h>
 305 #include <asm-generic/bitops/lock.h>
 306
 307 /*
 308  * Ext2 is defined to use little-endian byte ordering.
 309  * These do not need to be atomic.
 310  */
 311 #define ext2_set_bit(nr,p)                      \
 312                 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 313 #define ext2_set_bit_atomic(lock,nr,p)          \
 314                 test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 315 #define ext2_clear_bit(nr,p)                    \
 316                 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 317 #define ext2_clear_bit_atomic(lock,nr,p)        \
 318                 test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 319 #define ext2_test_bit(nr,p)                     \
 320                 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 321 #define ext2_find_first_zero_bit(p,sz)          \
 322                 _find_first_zero_bit_le(p,sz)
 323 #define ext2_find_next_zero_bit(p,sz,off)       \
 324                 _find_next_zero_bit_le(p,sz,off)
 325 #define ext2_find_next_bit(p, sz, off) \
 326                 _find_next_bit_le(p, sz, off)
 327
 328 /*
 329  * Minix is defined to use little-endian byte ordering.
 330  * These do not need to be atomic.
 331  */
 332 #define minix_set_bit(nr,p)                     \
 333                 __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 334 #define minix_test_bit(nr,p)                    \
 335                 test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 336 #define minix_test_and_set_bit(nr,p)            \
 337                 __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 338 #define minix_test_and_clear_bit(nr,p)          \
 339                 __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p))
 340 #define minix_find_first_zero_bit(p,sz)         \
 341                 _find_first_zero_bit_le(p,sz)
 342
 343 #endif /* __KERNEL__ */
 344
 345 #endif /* _ARM_BITOPS_H */