src/fenv/aarch64/fenv.s

   1 .global fegetround
   2 .type fegetround,%function
   3 fegetround:
   4         mrs x0, fpcr
   5         and w0, w0, #0xc00000
   6         ret
   7
   8 .global __fesetround
   9 .type __fesetround,%function
  10 __fesetround:
  11         mrs x1, fpcr
  12         bic w1, w1, #0xc00000
  13         orr w1, w1, w0
  14         msr fpcr, x1
  15         mov w0, #0
  16         ret
  17
  18 .global fetestexcept
  19 .type fetestexcept,%function
  20 fetestexcept:
  21         and w0, w0, #0x1f
  22         mrs x1, fpsr
  23         and w0, w0, w1
  24         ret
  25
  26 .global feclearexcept
  27 .type feclearexcept,%function
  28 feclearexcept:
  29         and w0, w0, #0x1f
  30         mrs x1, fpsr
  31         bic w1, w1, w0
  32         msr fpsr, x1
  33         mov w0, #0
  34         ret
  35
  36 .global feraiseexcept
  37 .type feraiseexcept,%function
  38 feraiseexcept:
  39         and w0, w0, #0x1f
  40         mrs x1, fpsr
  41         orr w1, w1, w0
  42         msr fpsr, x1
  43         mov w0, #0
  44         ret
  45
  46 .global fegetenv
  47 .type fegetenv,%function
  48 fegetenv:
  49         mrs x1, fpcr
  50         mrs x2, fpsr
  51         stp w1, w2, [x0]
  52         mov w0, #0
  53         ret
  54
  55 // TODO preserve some bits
  56 .global fesetenv
  57 .type fesetenv,%function
  58 fesetenv:
  59         mov x1, #0
  60         mov x2, #0
  61         cmn x0, #1
  62         b.eq 1f
  63         ldp w1, w2, [x0]
  64 1:      msr fpcr, x1
  65         msr fpsr, x2
  66         mov w0, #0
  67         ret