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riscv: define REG_S1 and REG_S2
[musl.git] / crt / x32 / crtn.s
blob29198b77514e5a9db31ea0e665a09ad0624f4ac5
1 .section .init
2 pop %rax
3 ret
4
5 .section .fini
6 pop %rax
7 ret
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