riscv: define REG_S1 and REG_S2
[musl.git] / crt / powerpc64 / crtn.s
bloba7a9f4a07d17f0fc66ff519e6633d08623e83c95
1 .section .init
2 .align 2
3 addi 1, 1, 32
4 ld 0, 16(1)
5 mtlr 0
6 blr
8 .section .fini
9 .align 2
10 addi 1, 1, 32
11 ld 0, 16(1)
12 mtlr 0
13 blr